Bug 111557

Summary: [CI][DRMTIP] igt@kms_chamelium@dp-mode-timings - fail - Failed assertion: video_params.hsync_offset == mode_hsync_offset
Product: DRI Reporter: Lakshmi <lakshminarayana.vudum>
Component: DRM/IntelAssignee: Intel GFX Bugs mailing list <intel-gfx-bugs>
Status: RESOLVED MOVED QA Contact: Intel GFX Bugs mailing list <intel-gfx-bugs>
Severity: major    
Priority: high CC: intel-gfx-bugs
Version: DRI git   
Hardware: Other   
OS: All   
Whiteboard:
i915 platform: ICL i915 features: display/Other

Description Lakshmi 2019-09-04 13:58:29 UTC
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_359/fi-icl-u2/igt@kms_chamelium@dp-mode-timings.html
	
Starting subtest: dp-mode-timings
(kms_chamelium:1123) CRITICAL: Test assertion failure function check_mode, file ../tests/kms_chamelium.c:975:
(kms_chamelium:1123) CRITICAL: Failed assertion: video_params.hsync_offset == mode_hsync_offset
Subtest dp-mode-timings failed.
Comment 1 CI Bug Log 2019-09-04 14:00:15 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL: igt@kms_chamelium@dp-mode-timings - fail - Failed assertion: video_params.hsync_offset == mode_hsync_offset 
  - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_359/fi-icl-u2/igt@kms_chamelium@dp-mode-timings.html
Comment 2 emersion 2019-09-04 14:07:21 UTC
This test always fails for DP (but passes for HDMI). It's a driver bug, not a test issue. hsync_offset and vsync_offset are always off.

(kms_chamelium:1123) DEBUG: hsync_offset: got 192, expected 88
(kms_chamelium:1123) DEBUG: vsync_offset: got 41, expected 4

I'm not sure what the user impact is. Worst case scenario, a corrupted video signal.
Comment 3 Lakshmi 2019-09-10 10:07:22 UTC
(In reply to emersion from comment #2)
> This test always fails for DP (but passes for HDMI). It's a driver bug, not
> a test issue. hsync_offset and vsync_offset are always off.
> 
> (kms_chamelium:1123) DEBUG: hsync_offset: got 192, expected 88
> (kms_chamelium:1123) DEBUG: vsync_offset: got 41, expected 4
> 
> I'm not sure what the user impact is. Worst case scenario, a corrupted video
> signal.

Based on the assessment, setting the severity and priority.
Comment 4 CI Bug Log 2019-09-13 07:23:04 UTC
A CI Bug Log filter associated to this bug has been updated:

{- ICL: igt@kms_chamelium@dp-mode-timings - fail - Failed assertion: video_params.hsync_offset == mode_hsync_offset  -}
{+ KBL ICL: igt@kms_chamelium@dp-mode-timings - fail - Failed assertion: video_params.hsync_offset == mode_hsync_offset  +}

New failures caught by the filter:

  * https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_367/fi-kbl-7500u/igt@kms_chamelium@dp-mode-timings.html
Comment 5 Martin Peres 2019-11-29 19:26:01 UTC
-- GitLab Migration Automatic Message --

This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity.

You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/drm/intel/issues/394.

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