|Summary:||[965 OGLC] depthrange.c test case fails|
|Product:||Mesa||Reporter:||Ian Romanick <idr>|
|Component:||Drivers/DRI/i965||Assignee:||Eric Anholt <eric>|
|Status:||VERIFIED FIXED||QA Contact:|
|i915 platform:||i915 features:|
|Bug Depends on:|
Description Ian Romanick 2009-01-07 12:29:33 UTC
2 of the 3 subcases in the depthrange.c test fail. I bisected down to the following commit. There must still be some bit if state that isn't being handled. api-fogcoord.c and fptex.c are also new failures, but I haven't bisected them down yet. commit e1a92175542c6645c23cc78f2a4fcd36dd0235e6 Author: Eric Anholt <email@example.com> Date: Wed Dec 31 00:02:43 2008 -0800 intel: Add support for glBitmap as metaops using GL calls. This lets us avoid software fallbacks when clients forget to turn some state off (engine demo) or just do crazy things to test conformance (OGLC). This should probably be brought into mesa generic code so other drivers can make use of it. Bug #19016.
Comment 1 Eric Anholt 2009-01-07 13:35:50 UTC
reproduced. nothing jumps out at me as obviously wrong in the current code.
Comment 2 Gordon Jin 2009-01-07 18:28:10 UTC
seems dup with bug#19413. (I'm asking Haien to always CC idr when reporting oglc bugs) but fptex.c passes on our 965.
Comment 3 Ian Romanick 2009-01-08 10:35:37 UTC
(In reply to comment #2) > seems dup with bug#19413. (I'm asking Haien to always CC idr when reporting > oglc bugs) > > but fptex.c passes on our 965. Yes, the fptex.c failure is different. See bug #19468.
Comment 4 Gordon Jin 2009-01-08 17:04:06 UTC
(In reply to comment #3) > (In reply to comment #2) > > but fptex.c passes on our 965. > > Yes, the fptex.c failure is different. See bug #19468. fptex.c passes on my side because we are using mesa intel-2008-q4 branch, and Brian's patch isn't on that branch.
Comment 5 Eric Anholt 2009-02-26 00:22:25 UTC
commit 160c3617fc8867edc445b1ba62fc996c4630cc35 Author: Eric Anholt <firstname.lastname@example.org> Date: Thu Feb 26 00:18:46 2009 -0800 intel: Disable creating DRI2 FBconfigs with depth size != color size. While it's a nice idea to be able to allow clients to choose a smaller (or bigger for 16bpp screens!) depth size, right now DRI2 hands back a buffer with a size that matches the drawable, rather than being based off of the visual. This led to problems in readback as parts of the driver disagreed on what format the depth buffer was really in. Fixes the remainder of bug #19447. commit 2b34275a784501225f605f11db801b5f2d7cdc64 Author: Eric Anholt <email@example.com> Date: Wed Feb 25 23:58:38 2009 -0800 intel: Add span code for z24 without stencil. It seems that in this case the Mesa code is handing us x8z24 values instead of z24s8 values, so we need to not do the rotation. Fixes half of OGLconform depthrange.c. Bug #19447.
Comment 6 Shuang He 2009-07-15 17:58:22 UTC
Thanks, verified on G45 against: Libdrm (master)3f3c5be6f908272199ccf53f108b1124bfe0a00e Mesa (master)3a3b83e5112b725e22f05b32a273a2351b820944 Xf86_video_intel (master)b74bf3f9a65af9e72921d4e9028d9d4d023f8bc6 Kernel
Comment 7 Adam Jackson 2009-08-24 12:31:37 UTC
Mass version move, cvs -> git