Bug 97610 - [CIK] Fullscreen video with Firefox only shows "tiled pixel garbage"
Summary: [CIK] Fullscreen video with Firefox only shows "tiled pixel garbage"
Status: RESOLVED DUPLICATE of bug 97504
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/Gallium/radeonsi (show other bugs)
Version: git
Hardware: x86-64 (AMD64) Linux (All)
: medium normal
Assignee: Default DRI bug account
QA Contact: Default DRI bug account
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2016-09-06 12:11 UTC by Kai
Modified: 2016-09-09 18:32 UTC (History)
0 users

See Also:
i915 platform:
i915 features:


Attachments
Example of the effect of playing a video in fullscreen mode with Firefox and amdgpu (3.63 MB, image/png)
2016-09-06 12:11 UTC, Kai
Details

Description Kai 2016-09-06 12:11:08 UTC
Created attachment 126240 [details]
Example of the effect of playing a video in fullscreen mode with Firefox and amdgpu

When playing any (HTML5) video in fullscreen mode with Firefox (tested versions: 48.0.x and 49.0 Beta 1) on my CIK GPU with the amdgpu DDX I'm only getting tiled pixel garbage close to what can be seen in the attached screenshot (please note, that taking the screenshot changes the colours of the pixels and some parts of the screen, but the effect remains). Sometimes it takes a second or two to manifest and it usually starts with the "outer tile border".

I can *not* reproduce this behaviour if I:
 - switch to the radeon stack (kernel and DDX), or
 - use modesetting instead of the amdgpu DDX on top of the amdgpu kernel driver (side question: is there any advantage to using the amdgpu DDX over modesetting?)

Also no other video playback program (mpv, VLC) or different browser (Chromium) seem to exhibit this problem. And to ensure this is not some funny encoding issue I downloaded a video Firefox was choking on and played it back with the other programs (different/no hardware acceleration or the VO used has no effect), but they still were fine.

To test this just open any video on YouTube, Twitch or any other page (actually local files work as well) in fullscreen with Firefox.

The stack exhibiting this problem (with Debian testing as a base) is:
GPU: Hawaii PRO [Radeon R9 290] (ChipID = 0x67b1)
Mesa: Git:master/dc3bb5db8c
libdrm: 2.4.70-1
LLVM: SVN:trunk/r280672 (4.0 devel)
X.Org: 2:1.18.4-1
Linux: 4.7.2
Firmware: Git:master/c170c8d957 (placed in /lib/firmware/updates; fallback would be firmware-amd-graphics/20160110-1)
libclc: Git:master/88b82a6f70
DDX (amdgpu): Git:master/6a1ba044c2

Let me know, if you need anything else.
Comment 1 Tom St Denis 2016-09-06 12:55:17 UTC
Something I noted when trying amdgpu on my Bonaire was that some of the tile mode registers are not the same between AMDGPU and radeon.  For example, with HAWAII tile mode 7 is 

		tile[7] = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
			   PIPE_CONFIG(ADDR_SURF_P4_16x16) |
			   MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
			   TILE_SPLIT(split_equal_to_row_size));

with amdgpu and 

                tile[7] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
                           MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
                           PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
                           TILE_SPLIT(split_equal_to_row_size));

with radeon (specifically the PIPE_CONFIG() and ARRAY_MODE() values are different).

I don't know if this is related but I never got a satisfactory answer as to why this is the case.
Comment 2 Kai 2016-09-06 13:34:45 UTC
(In reply to Tom St Denis from comment #1)
> Something I noted when trying amdgpu on my Bonaire was that some of the tile
> mode registers are not the same between AMDGPU and radeon.  For example,
> with HAWAII tile mode 7 is 
> 
> 		tile[7] = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) |
> 			   PIPE_CONFIG(ADDR_SURF_P4_16x16) |
> 			   MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING) |
> 			   TILE_SPLIT(split_equal_to_row_size));
> 
> with amdgpu and 
> 
>                 tile[7] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
>                            MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)
> |
>                            PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
>                            TILE_SPLIT(split_equal_to_row_size));
> 
> with radeon (specifically the PIPE_CONFIG() and ARRAY_MODE() values are
> different).
> 
> I don't know if this is related but I never got a satisfactory answer as to
> why this is the case.

So, basically copying the config from radeon (cik.c; the num_pipe_configs == 16 case for my Hawaii) to amdgpu (gfx_v7_0.c) should do the trick if this is the cause? Or are there other parts I'd need to change if I touch the tile configuration? And: shouldn't modesetting hitting this as well, if it's a kernel issue? Or does modesetting only use a reduced set of tiling configurations?
Comment 3 Michel Dänzer 2016-09-08 06:35:40 UTC
I can reproduce the problem on Kaveri, but not on Tonga.

It does look like some kind of tiling parameter mismatch, but since xf86-video-amdgpu doesn't deal with tiling parameters directly, it's more likely that the problem is in Mesa or even lower in the stack. Reassigning to Mesa for now.
Comment 4 Michel Dänzer 2016-09-09 03:02:36 UTC
Looks like this was an SDMA issue.

*** This bug has been marked as a duplicate of bug 97504 ***
Comment 5 Marek Olšák 2016-09-09 18:26:58 UTC
Mesa doesn't use the PRT tile modes.
Comment 6 Kai 2016-09-09 18:32:03 UTC
(In reply to Marek Olšák from comment #5)
> Mesa doesn't use the PRT tile modes.

Thanks for the information!


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