Bug 96625 - GPU lockup when using r600g VDPAU on powerpc
Summary: GPU lockup when using r600g VDPAU on powerpc
Status: RESOLVED MOVED
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/Gallium/r600 (show other bugs)
Version: unspecified
Hardware: PowerPC Linux (All)
: medium enhancement
Assignee: Default DRI bug account
QA Contact: Default DRI bug account
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2016-06-21 23:49 UTC by j.ribeirovega
Modified: 2019-09-18 19:21 UTC (History)
1 user (show)

See Also:
i915 platform:
i915 features:


Attachments
dmesg (66.27 KB, text/plain)
2016-06-21 23:49 UTC, j.ribeirovega
Details

Description j.ribeirovega 2016-06-21 23:49:42 UTC
Created attachment 124649 [details]
dmesg

I installed a Radeon HD6670 on a PowerMac G5 Quad, hoping to use VDPAU to play videos. 

When using mpv with opengl and vdpau hwdec and testing with a 720p sample from samplevideos the gpu locks up and I am forced to reboot.

Attached dmesg after crash.
Comment 1 Christian König 2016-06-22 07:22:13 UTC
Yeah that is a known issue. Big endian systems are not really supported by the hardware any more.

Because of this we would need to add manual byte swapping in the userspace driver and nobody had the time yet to do so.
Comment 2 intermediadc@hotmail.com 2016-06-22 11:00:23 UTC
and this is bad :-( we are many here with this issue
im facing it on e5500 freescale P5020 and on G5 Quad
Comment 3 Christian König 2016-06-22 11:08:57 UTC
Well feel free to provide patches. The relevant source is in src/gallium/drivers/radeon/radeon_uvd.c.

Probably all the 32 and 16 bit fields set into the message and feedback buffer in get_h264_msg(), get_h265_msg(), get_vc1_msg(), get_mpeg2_msg(), get_mpeg4_msg() and ruvd_end_frame() needs to be byte swapped.

It should actually be pretty trivial to do so, it's just a huge bunch of work nobody so far has time to work on.
Comment 4 Mathieu Malaterre 2016-06-23 07:56:42 UTC
Dear Christian König,

I see that you are working for AMD, so I assume that you are representing your employer here when you say "[...]pretty trivial to do so, it's just a huge bunch of work nobody so far has time to work on.[...]"

Would you care clarifying AMD position with regards to Big Endian machine(s) ?

Specifically:

1. When a bug is carefully reported, a proper diagnosis is found (by yourself in the case of #96625). It is correct to assume that none of the AMD employee will work on addressing it. The patch is required to be prepared by customer(s) of an AMD card instead.

2. When a bug is carefully reported, a patch is prepared and reviewed (by yourself in the case of #95017). It is correct to assume that none of the AMD employee will work on actually merging the patch upstream.

Regards
Comment 5 Daniel Stone 2016-06-23 08:00:17 UTC
Mathieu - I don't work for AMD or any related company, but I can tell you that demanding engineers provide position statements on behalf of 10,000-employee companies isn't going to work. Christian is an engineer who is just working to improve open source, and you're putting him in a very unfair position.
Comment 6 Mathieu Malaterre 2016-06-23 08:29:10 UTC
Daniel - I've been re-reading my questions twice but completely failed to understand what you called 'unfair position'.

Christian - Based on Daniel feedback, I sincerely apologize for putting you in an 'unfair position'.
Comment 7 Christian König 2016-06-23 08:45:53 UTC
Well to answer your question from a technical point of view:

The ring buffers and IBs can be byte swapped by the MC, but in difference to older generations the hardware does no actively support big endian architectures any more.

So you need to do all the byte swapping on the driver side before giving the data to the hardware.

Linux support for big endian architectures are only done best effort. So we can help develop features and fix bugs, but don't actively spend time on coding things.
Comment 8 Alex Deucher 2016-06-23 13:29:54 UTC
We are happy to apply good patches.
Comment 9 Rui Salvaterra 2016-06-23 14:37:45 UTC
(In reply to Christian König from comment #3)
> Well feel free to provide patches. The relevant source is in
> src/gallium/drivers/radeon/radeon_uvd.c.
> 
> Probably all the 32 and 16 bit fields set into the message and feedback
> buffer in get_h264_msg(), get_h265_msg(), get_vc1_msg(), get_mpeg2_msg(),
> get_mpeg4_msg() and ruvd_end_frame() needs to be byte swapped.
> 
> It should actually be pretty trivial to do so, it's just a huge bunch of
> work nobody so far has time to work on.

Hi, Christian,

I'm not at all familiar with the Mesa codebase, but doesn't it provide arch-specific endian helpers, akin to the Linux kernel ({b,l}e_to_cpu and friends)? If not, maybe it would be an interesting GSoC project, assuming such patches were accepted?

Best regards,

Rui
Comment 10 Alex Deucher 2016-06-23 15:21:25 UTC
(In reply to Rui Salvaterra from comment #9)
> (In reply to Christian König from comment #3)
> > Well feel free to provide patches. The relevant source is in
> > src/gallium/drivers/radeon/radeon_uvd.c.
> > 
> > Probably all the 32 and 16 bit fields set into the message and feedback
> > buffer in get_h264_msg(), get_h265_msg(), get_vc1_msg(), get_mpeg2_msg(),
> > get_mpeg4_msg() and ruvd_end_frame() needs to be byte swapped.
> > 
> > It should actually be pretty trivial to do so, it's just a huge bunch of
> > work nobody so far has time to work on.
> 
> Hi, Christian,
> 
> I'm not at all familiar with the Mesa codebase, but doesn't it provide
> arch-specific endian helpers, akin to the Linux kernel ({b,l}e_to_cpu and
> friends)? If not, maybe it would be an interesting GSoC project, assuming
> such patches were accepted?

Yes, endian swap helpers exist in mesa.
Comment 11 GitLab Migration User 2019-09-18 19:21:48 UTC
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