Attachment 102162 Details for Bug 80463 – Possible fix

[patch] Possible fix

0001-drm-i915-fix-SNB-runtime-PM.patch (text/plain), 5.51 KB, created by Paulo Zanoni on 2014-07-02 21:24:42 UTC

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Creator: Paulo Zanoni

Created: 2014-07-02 21:24:42 UTC

Size: 5.51 KB

patch

obsolete

>From 8da702b290b03e83ed62ca632979ed79de6d4f05 Mon Sep 17 00:00:00 2001
>From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>Date: Wed, 2 Jul 2014 18:21:46 -0300
>Subject: [PATCH] drm/i915: fix SNB runtime PM
>
>This patch does a lot of different things and should be split into
>many smaller patches.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80464
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80465
>Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>---
> drivers/gpu/drm/i915/i915_debugfs.c  |  2 ++
> drivers/gpu/drm/i915/i915_drv.h      |  1 +
> drivers/gpu/drm/i915/intel_display.c |  7 +++++++
> drivers/gpu/drm/i915/intel_lvds.c    | 27 ++++++++++++++++-----------
> drivers/gpu/drm/i915/intel_pm.c      |  3 ++-
> 5 files changed, 28 insertions(+), 12 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>index a93b3bf..31d34cc 100644
>--- a/drivers/gpu/drm/i915/i915_debugfs.c
>+++ b/drivers/gpu/drm/i915/i915_debugfs.c
>@@ -2134,6 +2134,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
> 		return "VGA";
> 	case POWER_DOMAIN_AUDIO:
> 		return "AUDIO";
>+	case POWER_DOMAIN_PLLS:
>+		return "PLLS";
> 	case POWER_DOMAIN_INIT:
> 		return "INIT";
> 	default:
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index cf0ae05..3021796 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -130,6 +130,7 @@ enum intel_display_power_domain {
> 	POWER_DOMAIN_VGA,
> 	POWER_DOMAIN_AUDIO,
> 	POWER_DOMAIN_INIT,
>+	POWER_DOMAIN_PLLS,
> 
> 	POWER_DOMAIN_NUM,
> };
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index 3241338..fad53d4 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -7257,6 +7257,10 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
> 	struct drm_i915_private *dev_priv = dev->dev_private;
> 	uint32_t tmp;
> 
>+	if (!intel_display_power_enabled(dev_priv,
>+					 POWER_DOMAIN_PIPE(crtc->pipe)))
>+		return false;
>+
> 	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
> 
>@@ -11292,6 +11296,9 @@ static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv,
> {
> 	uint32_t val;
> 
>+	if (!intel_display_power_enabled(dev_priv, POWER_DOMAIN_PLLS))
>+		return false;
>+
> 	val = I915_READ(PCH_DPLL(pll->id));
> 	hw_state->dpll = val;
> 	hw_state->fp0 = I915_READ(PCH_FP0(pll->id));
>diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
>index 4d29a83..a96dcb6 100644
>--- a/drivers/gpu/drm/i915/intel_lvds.c
>+++ b/drivers/gpu/drm/i915/intel_lvds.c
>@@ -51,6 +51,7 @@ struct intel_lvds_encoder {
> 
> 	bool is_dual_link;
> 	u32 reg;
>+	int bpp;
> 
> 	struct intel_lvds_connector *attached_connector;
> };
>@@ -72,6 +73,11 @@ static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
> 	struct drm_i915_private *dev_priv = dev->dev_private;
> 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
> 	u32 tmp;
>+	enum intel_display_power_domain power_domain;
>+
>+	power_domain = intel_display_port_power_domain(encoder);
>+	if (!intel_display_power_enabled(dev_priv, power_domain))
>+		return false;
> 
> 	tmp = I915_READ(lvds_encoder->reg);
> 
>@@ -264,14 +270,12 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> 				      struct intel_crtc_config *pipe_config)
> {
> 	struct drm_device *dev = intel_encoder->base.dev;
>-	struct drm_i915_private *dev_priv = dev->dev_private;
> 	struct intel_lvds_encoder *lvds_encoder =
> 		to_lvds_encoder(&intel_encoder->base);
> 	struct intel_connector *intel_connector =
> 		&lvds_encoder->attached_connector->base;
> 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
> 	struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
>-	unsigned int lvds_bpp;
> 
> 	/* Should never happen!! */
> 	if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
>@@ -279,16 +283,11 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
> 		return false;
> 	}
> 
>-	if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
>-	    LVDS_A3_POWER_UP)
>-		lvds_bpp = 8*3;
>-	else
>-		lvds_bpp = 6*3;
>-
>-	if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
>+	if (lvds_encoder->bpp != pipe_config->pipe_bpp &&
>+	    !pipe_config->bw_constrained) {
> 		DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
>-			      pipe_config->pipe_bpp, lvds_bpp);
>-		pipe_config->pipe_bpp = lvds_bpp;
>+			      pipe_config->pipe_bpp, lvds_encoder->bpp);
>+		pipe_config->pipe_bpp = lvds_encoder->bpp;
> 	}
> 
> 	/*
>@@ -1081,6 +1080,12 @@ out:
> 	DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
> 		      lvds_encoder->is_dual_link ? "dual" : "single");
> 
>+	if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
>+	    LVDS_A3_POWER_UP)
>+		lvds_encoder->bpp = 8*3;
>+	else
>+		lvds_encoder->bpp = 6*3;
>+
> 	/*
> 	 * Unlock registers and just
> 	 * leave them unlocked
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 82dc3c3..63e790d 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -6272,7 +6272,8 @@ EXPORT_SYMBOL_GPL(i915_release_power_well);
> 	BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) |		\
> 	BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) |		\
> 	BIT(POWER_DOMAIN_PORT_CRT) |			\
>-	BIT(POWER_DOMAIN_INIT))
>+	BIT(POWER_DOMAIN_INIT) |			\
>+	BIT(POWER_DOMAIN_PLLS))
> #define HSW_DISPLAY_POWER_DOMAINS (				\
> 	(POWER_DOMAIN_MASK & ~HSW_ALWAYS_ON_POWER_DOMAINS) |	\
> 	BIT(POWER_DOMAIN_INIT))
>-- 
>2.0.0
>

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