Attachment 104309 Details for Bug 79575 – r600_debug_vs.log

r600_debug_vs.log

r600_debug_vs.log (text/plain), 227.15 KB, created by Andrei Slavoiu on 2014-08-08 19:29:29 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Andrei Slavoiu

Created: 2014-08-08 19:29:29 UTC

Size: 227.15 KB

patch

obsolete

>make: Entering directory '/home/andrei/x/wine/dlls/d3d8/tests'
>../../../tools/runtest -q -P wine -T ../../.. -M d3d8.dll -p d3d8_test.exe.so device && touch device.ok
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %14 = getelementptr [6 x <16 x i8>] addrspace(2)* %3, i64 0, i32 2
>  %15 = load <16 x i8> addrspace(2)* %14, !tbaa !0
>  %16 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = add i32 %5, %10
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %18)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = lshr i32 %7, 16
>  %25 = and i32 %24, 127
>  %26 = call i32 @llvm.SI.tid()
>  %27 = icmp ult i32 %26, %25
>  br i1 %27, label %if-true-block, label %endif-block
>
>if-true-block:                                    ; preds = %main_body
>  %28 = add i32 %8, %26
>  %29 = mul i32 %9, 4
>  %30 = mul i32 %28, 4
>  %31 = add i32 %30, %29
>  %32 = bitcast float %20 to i32
>  call void @llvm.SI.tbuffer.store.i32(<16 x i8> %15, i32 %32, i32 1, i32 %31, i32 0, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare i32 @llvm.SI.tid() #2
>
>declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	V_MBCNT_LO_U32_B32_e64 v4, -1, 0, 0, 0                                    ; D2460004 000100C1
>	V_MBCNT_HI_U32_B32_e32 v4, -1, v4                                         ; 480808C1
>	S_LSHR_B32 s0, s12, 16                                                    ; 9000900C
>	S_AND_B32 s0, s0, 0x7f                                                    ; 8700FF00 0000007F
>	V_CMP_LT_U32_e64 s[0:1], v4, s0, 0, 0                                     ; D1820000 00000104
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	S_AND_SAVEEXEC_B64 s[0:1], s[0:1]                                         ; BE802400
>	S_XOR_B64 s[0:1], exec, s[0:1]                                            ; 8980007E
>	V_ADD_I32_e32 v4, s13, v4                                                 ; 4A08080D
>	V_LSHLREV_B32_e32 v4, 2, v4                                               ; 34080882
>	V_LSHL_B32_e64 v5, s14, 2, 0, 0                                           ; D2320005 0001040E
>	V_ADD_I32_e32 v4, v4, v5                                                  ; 4A080B04
>	S_LOAD_DWORDX4 s[4:7], s[6:7], 0x8                                        ; C0820708
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	TBUFFER_STORE_FORMAT_X v0, 0x0, -1, 0, -1, 0, 4, 4, v4, s[4:7], -1, 0, 0  ; EA245000 80410004
>	S_WAITCNT vmcnt(0) expcnt(0)                                              ; BF8C0700
>	S_OR_B64 exec, exec, s[0:1]                                               ; 88FE007E
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: MOV OUT[2], SV[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = bitcast i32 %10 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %27, float 0.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v4, v5, v6, v7                                       ; F800020F 07060504
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 0, 0, v4, v5, v6, v7                                       ; F80000CF 07060504
>	V_MOV_B32_e32 v0, 0.000000e+00                                            ; 7E000280
>	EXP 4, 13, 0, 1, 0, v0, v0, v3, v0                                        ; F80008D4 00030000
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %14 = getelementptr [6 x <16 x i8>] addrspace(2)* %3, i64 0, i32 2
>  %15 = load <16 x i8> addrspace(2)* %14, !tbaa !0
>  %16 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = add i32 %5, %10
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %18)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = lshr i32 %7, 16
>  %25 = and i32 %24, 127
>  %26 = call i32 @llvm.SI.tid()
>  %27 = icmp ult i32 %26, %25
>  br i1 %27, label %if-true-block, label %endif-block
>
>if-true-block:                                    ; preds = %main_body
>  %28 = add i32 %8, %26
>  %29 = mul i32 %9, 4
>  %30 = mul i32 %28, 4
>  %31 = add i32 %30, %29
>  %32 = bitcast float %20 to i32
>  call void @llvm.SI.tbuffer.store.i32(<16 x i8> %15, i32 %32, i32 1, i32 %31, i32 0, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare i32 @llvm.SI.tid() #2
>
>declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	V_MBCNT_LO_U32_B32_e64 v4, -1, 0, 0, 0                                    ; D2460004 000100C1
>	V_MBCNT_HI_U32_B32_e32 v4, -1, v4                                         ; 480808C1
>	S_LSHR_B32 s0, s12, 16                                                    ; 9000900C
>	S_AND_B32 s0, s0, 0x7f                                                    ; 8700FF00 0000007F
>	V_CMP_LT_U32_e64 s[0:1], v4, s0, 0, 0                                     ; D1820000 00000104
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	S_AND_SAVEEXEC_B64 s[0:1], s[0:1]                                         ; BE802400
>	S_XOR_B64 s[0:1], exec, s[0:1]                                            ; 8980007E
>	V_ADD_I32_e32 v4, s13, v4                                                 ; 4A08080D
>	V_LSHLREV_B32_e32 v4, 2, v4                                               ; 34080882
>	V_LSHL_B32_e64 v5, s14, 2, 0, 0                                           ; D2320005 0001040E
>	V_ADD_I32_e32 v4, v4, v5                                                  ; 4A080B04
>	S_LOAD_DWORDX4 s[4:7], s[6:7], 0x8                                        ; C0820708
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	TBUFFER_STORE_FORMAT_X v0, 0x0, -1, 0, -1, 0, 4, 4, v4, s[4:7], -1, 0, 0  ; EA245000 80410004
>	S_WAITCNT vmcnt(0) expcnt(0)                                              ; BF8C0700
>	S_OR_B64 exec, exec, s[0:1]                                               ; 88FE007E
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: MOV OUT[2], SV[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = bitcast i32 %10 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %27, float 0.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v4, v5, v6, v7                                       ; F800020F 07060504
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 0, 0, v4, v5, v6, v7                                       ; F80000CF 07060504
>	V_MOV_B32_e32 v0, 0.000000e+00                                            ; 7E000280
>	EXP 4, 13, 0, 1, 0, v0, v0, v3, v0                                        ; F80008D4 00030000
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %14 = getelementptr [6 x <16 x i8>] addrspace(2)* %3, i64 0, i32 2
>  %15 = load <16 x i8> addrspace(2)* %14, !tbaa !0
>  %16 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = add i32 %5, %10
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %18)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = lshr i32 %7, 16
>  %25 = and i32 %24, 127
>  %26 = call i32 @llvm.SI.tid()
>  %27 = icmp ult i32 %26, %25
>  br i1 %27, label %if-true-block, label %endif-block
>
>if-true-block:                                    ; preds = %main_body
>  %28 = add i32 %8, %26
>  %29 = mul i32 %9, 4
>  %30 = mul i32 %28, 4
>  %31 = add i32 %30, %29
>  %32 = bitcast float %20 to i32
>  call void @llvm.SI.tbuffer.store.i32(<16 x i8> %15, i32 %32, i32 1, i32 %31, i32 0, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare i32 @llvm.SI.tid() #2
>
>declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	V_MBCNT_LO_U32_B32_e64 v4, -1, 0, 0, 0                                    ; D2460004 000100C1
>	V_MBCNT_HI_U32_B32_e32 v4, -1, v4                                         ; 480808C1
>	S_LSHR_B32 s0, s12, 16                                                    ; 9000900C
>	S_AND_B32 s0, s0, 0x7f                                                    ; 8700FF00 0000007F
>	V_CMP_LT_U32_e64 s[0:1], v4, s0, 0, 0                                     ; D1820000 00000104
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	S_AND_SAVEEXEC_B64 s[0:1], s[0:1]                                         ; BE802400
>	S_XOR_B64 s[0:1], exec, s[0:1]                                            ; 8980007E
>	V_ADD_I32_e32 v4, s13, v4                                                 ; 4A08080D
>	V_LSHLREV_B32_e32 v4, 2, v4                                               ; 34080882
>	V_LSHL_B32_e64 v5, s14, 2, 0, 0                                           ; D2320005 0001040E
>	V_ADD_I32_e32 v4, v4, v5                                                  ; 4A080B04
>	S_LOAD_DWORDX4 s[4:7], s[6:7], 0x8                                        ; C0820708
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	TBUFFER_STORE_FORMAT_X v0, 0x0, -1, 0, -1, 0, 4, 4, v4, s[4:7], -1, 0, 0  ; EA245000 80410004
>	S_WAITCNT vmcnt(0) expcnt(0)                                              ; BF8C0700
>	S_OR_B64 exec, exec, s[0:1]                                               ; 88FE007E
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: MOV OUT[2], SV[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = bitcast i32 %10 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %27, float 0.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v4, v5, v6, v7                                       ; F800020F 07060504
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 0, 0, v4, v5, v6, v7                                       ; F80000CF 07060504
>	V_MOV_B32_e32 v0, 0.000000e+00                                            ; 7E000280
>	EXP 4, 13, 0, 1, 0, v0, v0, v3, v0                                        ; F80008D4 00030000
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %14 = getelementptr [6 x <16 x i8>] addrspace(2)* %3, i64 0, i32 2
>  %15 = load <16 x i8> addrspace(2)* %14, !tbaa !0
>  %16 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = add i32 %5, %10
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %18)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = lshr i32 %7, 16
>  %25 = and i32 %24, 127
>  %26 = call i32 @llvm.SI.tid()
>  %27 = icmp ult i32 %26, %25
>  br i1 %27, label %if-true-block, label %endif-block
>
>if-true-block:                                    ; preds = %main_body
>  %28 = add i32 %8, %26
>  %29 = mul i32 %9, 4
>  %30 = mul i32 %28, 4
>  %31 = add i32 %30, %29
>  %32 = bitcast float %20 to i32
>  call void @llvm.SI.tbuffer.store.i32(<16 x i8> %15, i32 %32, i32 1, i32 %31, i32 0, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare i32 @llvm.SI.tid() #2
>
>declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	V_MBCNT_LO_U32_B32_e64 v4, -1, 0, 0, 0                                    ; D2460004 000100C1
>	V_MBCNT_HI_U32_B32_e32 v4, -1, v4                                         ; 480808C1
>	S_LSHR_B32 s0, s12, 16                                                    ; 9000900C
>	S_AND_B32 s0, s0, 0x7f                                                    ; 8700FF00 0000007F
>	V_CMP_LT_U32_e64 s[0:1], v4, s0, 0, 0                                     ; D1820000 00000104
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	S_AND_SAVEEXEC_B64 s[0:1], s[0:1]                                         ; BE802400
>	S_XOR_B64 s[0:1], exec, s[0:1]                                            ; 8980007E
>	V_ADD_I32_e32 v4, s13, v4                                                 ; 4A08080D
>	V_LSHLREV_B32_e32 v4, 2, v4                                               ; 34080882
>	V_LSHL_B32_e64 v5, s14, 2, 0, 0                                           ; D2320005 0001040E
>	V_ADD_I32_e32 v4, v4, v5                                                  ; 4A080B04
>	S_LOAD_DWORDX4 s[4:7], s[6:7], 0x8                                        ; C0820708
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	TBUFFER_STORE_FORMAT_X v0, 0x0, -1, 0, -1, 0, 4, 4, v4, s[4:7], -1, 0, 0  ; EA245000 80410004
>	S_WAITCNT vmcnt(0) expcnt(0)                                              ; BF8C0700
>	S_OR_B64 exec, exec, s[0:1]                                               ; 88FE007E
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: MOV OUT[2], SV[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = bitcast i32 %10 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %27, float 0.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v4, v5, v6, v7                                       ; F800020F 07060504
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 0, 0, v4, v5, v6, v7                                       ; F80000CF 07060504
>	V_MOV_B32_e32 v0, 0.000000e+00                                            ; 7E000280
>	EXP 4, 13, 0, 1, 0, v0, v0, v3, v0                                        ; F80008D4 00030000
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  %73 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %74 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %75 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %76 = call float @llvm.AMDIL.clamp.(float %44, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %73, float %74, float %75, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	V_ADD_F32_e64 v5, v4, 0, 1, 0                                             ; D2060805 00010104
>	V_ADD_F32_e64 v6, v3, 0, 1, 0                                             ; D2060806 00010103
>	V_ADD_F32_e64 v7, v2, 0, 1, 0                                             ; D2060807 00010102
>	V_ADD_F32_e64 v1, v1, 0, 1, 0                                             ; D2060801 00010101
>	EXP 15, 32, 0, 0, 0, v1, v7, v6, v5                                       ; F800020F 05060701
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], FOG
>DCL CONST[0..7]
>DCL TEMP[0]
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV OUT[1].yzw, IMM[0].xxxy
>  1: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  2: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  3: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  4: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  5: DP4 TEMP[0], IN[0], CONST[6]
>  6: ABS OUT[1].x, TEMP[0]
>  7: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = call float @llvm.SI.load.const(<16 x i8> %12, i32 96)
>  %30 = call float @llvm.SI.load.const(<16 x i8> %12, i32 100)
>  %31 = call float @llvm.SI.load.const(<16 x i8> %12, i32 104)
>  %32 = call float @llvm.SI.load.const(<16 x i8> %12, i32 108)
>  %33 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %34 = load <16 x i8> addrspace(2)* %33, !tbaa !0
>  %35 = add i32 %5, %7
>  %36 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %34, i32 0, i32 %35)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = extractelement <4 x float> %36, i32 1
>  %39 = extractelement <4 x float> %36, i32 2
>  %40 = extractelement <4 x float> %36, i32 3
>  %41 = fmul float %37, %13
>  %42 = fmul float %37, %14
>  %43 = fmul float %37, %15
>  %44 = fmul float %37, %16
>  %45 = fmul float %38, %17
>  %46 = fadd float %45, %41
>  %47 = fmul float %38, %18
>  %48 = fadd float %47, %42
>  %49 = fmul float %38, %19
>  %50 = fadd float %49, %43
>  %51 = fmul float %38, %20
>  %52 = fadd float %51, %44
>  %53 = fmul float %39, %21
>  %54 = fadd float %53, %46
>  %55 = fmul float %39, %22
>  %56 = fadd float %55, %48
>  %57 = fmul float %39, %23
>  %58 = fadd float %57, %50
>  %59 = fmul float %39, %24
>  %60 = fadd float %59, %52
>  %61 = fmul float %40, %25
>  %62 = fadd float %61, %54
>  %63 = fmul float %40, %26
>  %64 = fadd float %63, %56
>  %65 = fmul float %40, %27
>  %66 = fadd float %65, %58
>  %67 = fmul float %40, %28
>  %68 = fadd float %67, %60
>  %69 = fmul float %37, %29
>  %70 = fmul float %38, %30
>  %71 = fadd float %69, %70
>  %72 = fmul float %39, %31
>  %73 = fadd float %71, %72
>  %74 = fmul float %40, %32
>  %75 = fadd float %73, %74
>  %76 = call float @fabs(float %75)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %76, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %62, float %64, float %66, float %68)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readonly
>declare float @fabs(float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x19                                      ; C2020119
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v1, v4                                                  ; 10080901
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x18                                      ; C2020118
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v0, v5, v4, 0, 0                                            ; D2820004 04120B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1a                                      ; C202011A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1b                                      ; C202011B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	V_MOV_B32_e32 v5, 0x7fffffff                                              ; 7E0A02FF 7FFFFFFF
>	V_AND_B32_e32 v4, v4, v5                                                  ; 36080B04
>	V_MOV_B32_e32 v5, 1.000000e+00                                            ; 7E0A02F2
>	V_MOV_B32_e32 v6, 0.000000e+00                                            ; 7E0C0280
>	EXP 15, 32, 0, 0, 0, v4, v6, v6, v5                                       ; F800020F 05060604
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = fmul float %33, %13
>  %38 = fmul float %33, %14
>  %39 = fmul float %33, %15
>  %40 = fmul float %33, %16
>  %41 = fmul float %34, %17
>  %42 = fadd float %41, %37
>  %43 = fmul float %34, %18
>  %44 = fadd float %43, %38
>  %45 = fmul float %34, %19
>  %46 = fadd float %45, %39
>  %47 = fmul float %34, %20
>  %48 = fadd float %47, %40
>  %49 = fmul float %35, %21
>  %50 = fadd float %49, %42
>  %51 = fmul float %35, %22
>  %52 = fadd float %51, %44
>  %53 = fmul float %35, %23
>  %54 = fadd float %53, %46
>  %55 = fmul float %35, %24
>  %56 = fadd float %55, %48
>  %57 = fmul float %36, %25
>  %58 = fadd float %57, %50
>  %59 = fmul float %36, %26
>  %60 = fadd float %59, %52
>  %61 = fmul float %36, %27
>  %62 = fadd float %61, %54
>  %63 = fmul float %36, %28
>  %64 = fadd float %63, %56
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %58, float %60, float %62, float %64)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  %73 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %74 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %75 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %76 = call float @llvm.AMDIL.clamp.(float %44, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %73, float %74, float %75, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	V_ADD_F32_e64 v5, v4, 0, 1, 0                                             ; D2060805 00010104
>	V_ADD_F32_e64 v6, v3, 0, 1, 0                                             ; D2060806 00010103
>	V_ADD_F32_e64 v7, v2, 0, 1, 0                                             ; D2060807 00010102
>	V_ADD_F32_e64 v1, v1, 0, 1, 0                                             ; D2060801 00010101
>	EXP 15, 32, 0, 0, 0, v1, v7, v6, v5                                       ; F800020F 05060701
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  %73 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %74 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %75 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %76 = call float @llvm.AMDIL.clamp.(float %44, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %73, float %74, float %75, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	V_ADD_F32_e64 v5, v4, 0, 1, 0                                             ; D2060805 00010104
>	V_ADD_F32_e64 v6, v3, 0, 1, 0                                             ; D2060806 00010103
>	V_ADD_F32_e64 v7, v2, 0, 1, 0                                             ; D2060807 00010102
>	V_ADD_F32_e64 v1, v1, 0, 1, 0                                             ; D2060801 00010101
>	EXP 15, 32, 0, 0, 0, v1, v7, v6, v5                                       ; F800020F 05060701
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %41, float %42, float %43, float %44)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>fixme:win:EnumDisplayDevicesW ((null),0,0x32f6a8,0x00000000), stub!
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %14 = getelementptr [6 x <16 x i8>] addrspace(2)* %3, i64 0, i32 2
>  %15 = load <16 x i8> addrspace(2)* %14, !tbaa !0
>  %16 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = add i32 %5, %10
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %18)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = lshr i32 %7, 16
>  %25 = and i32 %24, 127
>  %26 = call i32 @llvm.SI.tid()
>  %27 = icmp ult i32 %26, %25
>  br i1 %27, label %if-true-block, label %endif-block
>
>if-true-block:                                    ; preds = %main_body
>  %28 = add i32 %8, %26
>  %29 = mul i32 %9, 4
>  %30 = mul i32 %28, 4
>  %31 = add i32 %30, %29
>  %32 = bitcast float %20 to i32
>  call void @llvm.SI.tbuffer.store.i32(<16 x i8> %15, i32 %32, i32 1, i32 %31, i32 0, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare i32 @llvm.SI.tid() #2
>
>declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	V_MBCNT_LO_U32_B32_e64 v4, -1, 0, 0, 0                                    ; D2460004 000100C1
>	V_MBCNT_HI_U32_B32_e32 v4, -1, v4                                         ; 480808C1
>	S_LSHR_B32 s0, s12, 16                                                    ; 9000900C
>	S_AND_B32 s0, s0, 0x7f                                                    ; 8700FF00 0000007F
>	V_CMP_LT_U32_e64 s[0:1], v4, s0, 0, 0                                     ; D1820000 00000104
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	S_AND_SAVEEXEC_B64 s[0:1], s[0:1]                                         ; BE802400
>	S_XOR_B64 s[0:1], exec, s[0:1]                                            ; 8980007E
>	V_ADD_I32_e32 v4, s13, v4                                                 ; 4A08080D
>	V_LSHLREV_B32_e32 v4, 2, v4                                               ; 34080882
>	V_LSHL_B32_e64 v5, s14, 2, 0, 0                                           ; D2320005 0001040E
>	V_ADD_I32_e32 v4, v4, v5                                                  ; 4A080B04
>	S_LOAD_DWORDX4 s[4:7], s[6:7], 0x8                                        ; C0820708
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	TBUFFER_STORE_FORMAT_X v0, 0x0, -1, 0, -1, 0, 4, 4, v4, s[4:7], -1, 0, 0  ; EA245000 80410004
>	S_WAITCNT vmcnt(0) expcnt(0)                                              ; BF8C0700
>	S_OR_B64 exec, exec, s[0:1]                                               ; 88FE007E
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: MOV OUT[2], SV[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = bitcast i32 %10 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %27, float 0.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v4, v5, v6, v7                                       ; F800020F 07060504
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 0, 0, v4, v5, v6, v7                                       ; F80000CF 07060504
>	V_MOV_B32_e32 v0, 0.000000e+00                                            ; 7E000280
>	EXP 4, 13, 0, 1, 0, v0, v0, v3, v0                                        ; F80008D4 00030000
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %14 = getelementptr [6 x <16 x i8>] addrspace(2)* %3, i64 0, i32 2
>  %15 = load <16 x i8> addrspace(2)* %14, !tbaa !0
>  %16 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = add i32 %5, %10
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %18)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = lshr i32 %7, 16
>  %25 = and i32 %24, 127
>  %26 = call i32 @llvm.SI.tid()
>  %27 = icmp ult i32 %26, %25
>  br i1 %27, label %if-true-block, label %endif-block
>
>if-true-block:                                    ; preds = %main_body
>  %28 = add i32 %8, %26
>  %29 = mul i32 %9, 4
>  %30 = mul i32 %28, 4
>  %31 = add i32 %30, %29
>  %32 = bitcast float %20 to i32
>  call void @llvm.SI.tbuffer.store.i32(<16 x i8> %15, i32 %32, i32 1, i32 %31, i32 0, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare i32 @llvm.SI.tid() #2
>
>declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	V_MBCNT_LO_U32_B32_e64 v4, -1, 0, 0, 0                                    ; D2460004 000100C1
>	V_MBCNT_HI_U32_B32_e32 v4, -1, v4                                         ; 480808C1
>	S_LSHR_B32 s0, s12, 16                                                    ; 9000900C
>	S_AND_B32 s0, s0, 0x7f                                                    ; 8700FF00 0000007F
>	V_CMP_LT_U32_e64 s[0:1], v4, s0, 0, 0                                     ; D1820000 00000104
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	S_AND_SAVEEXEC_B64 s[0:1], s[0:1]                                         ; BE802400
>	S_XOR_B64 s[0:1], exec, s[0:1]                                            ; 8980007E
>	V_ADD_I32_e32 v4, s13, v4                                                 ; 4A08080D
>	V_LSHLREV_B32_e32 v4, 2, v4                                               ; 34080882
>	V_LSHL_B32_e64 v5, s14, 2, 0, 0                                           ; D2320005 0001040E
>	V_ADD_I32_e32 v4, v4, v5                                                  ; 4A080B04
>	S_LOAD_DWORDX4 s[4:7], s[6:7], 0x8                                        ; C0820708
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	TBUFFER_STORE_FORMAT_X v0, 0x0, -1, 0, -1, 0, 4, 4, v4, s[4:7], -1, 0, 0  ; EA245000 80410004
>	S_WAITCNT vmcnt(0) expcnt(0)                                              ; BF8C0700
>	S_OR_B64 exec, exec, s[0:1]                                               ; 88FE007E
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: MOV OUT[2], SV[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = bitcast i32 %10 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %27, float 0.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v4, v5, v6, v7                                       ; F800020F 07060504
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 0, 0, v4, v5, v6, v7                                       ; F80000CF 07060504
>	V_MOV_B32_e32 v0, 0.000000e+00                                            ; 7E000280
>	EXP 4, 13, 0, 1, 0, v0, v0, v3, v0                                        ; F80008D4 00030000
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  %73 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %74 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %75 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %76 = call float @llvm.AMDIL.clamp.(float %44, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %73, float %74, float %75, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	V_ADD_F32_e64 v5, v4, 0, 1, 0                                             ; D2060805 00010104
>	V_ADD_F32_e64 v6, v3, 0, 1, 0                                             ; D2060806 00010103
>	V_ADD_F32_e64 v7, v2, 0, 1, 0                                             ; D2060807 00010102
>	V_ADD_F32_e64 v1, v1, 0, 1, 0                                             ; D2060801 00010101
>	EXP 15, 32, 0, 0, 0, v1, v7, v6, v5                                       ; F800020F 05060701
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], FOG
>DCL CONST[0..7]
>DCL TEMP[0]
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>  0: MOV OUT[1].yzw, IMM[0].xxxy
>  1: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  2: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  3: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  4: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  5: DP4 TEMP[0], IN[0], CONST[6]
>  6: ABS OUT[1].x, TEMP[0]
>  7: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = call float @llvm.SI.load.const(<16 x i8> %12, i32 96)
>  %30 = call float @llvm.SI.load.const(<16 x i8> %12, i32 100)
>  %31 = call float @llvm.SI.load.const(<16 x i8> %12, i32 104)
>  %32 = call float @llvm.SI.load.const(<16 x i8> %12, i32 108)
>  %33 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %34 = load <16 x i8> addrspace(2)* %33, !tbaa !0
>  %35 = add i32 %5, %7
>  %36 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %34, i32 0, i32 %35)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = extractelement <4 x float> %36, i32 1
>  %39 = extractelement <4 x float> %36, i32 2
>  %40 = extractelement <4 x float> %36, i32 3
>  %41 = fmul float %37, %13
>  %42 = fmul float %37, %14
>  %43 = fmul float %37, %15
>  %44 = fmul float %37, %16
>  %45 = fmul float %38, %17
>  %46 = fadd float %45, %41
>  %47 = fmul float %38, %18
>  %48 = fadd float %47, %42
>  %49 = fmul float %38, %19
>  %50 = fadd float %49, %43
>  %51 = fmul float %38, %20
>  %52 = fadd float %51, %44
>  %53 = fmul float %39, %21
>  %54 = fadd float %53, %46
>  %55 = fmul float %39, %22
>  %56 = fadd float %55, %48
>  %57 = fmul float %39, %23
>  %58 = fadd float %57, %50
>  %59 = fmul float %39, %24
>  %60 = fadd float %59, %52
>  %61 = fmul float %40, %25
>  %62 = fadd float %61, %54
>  %63 = fmul float %40, %26
>  %64 = fadd float %63, %56
>  %65 = fmul float %40, %27
>  %66 = fadd float %65, %58
>  %67 = fmul float %40, %28
>  %68 = fadd float %67, %60
>  %69 = fmul float %37, %29
>  %70 = fmul float %38, %30
>  %71 = fadd float %69, %70
>  %72 = fmul float %39, %31
>  %73 = fadd float %71, %72
>  %74 = fmul float %40, %32
>  %75 = fadd float %73, %74
>  %76 = call float @fabs(float %75)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %76, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %62, float %64, float %66, float %68)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readonly
>declare float @fabs(float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readonly }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x19                                      ; C2020119
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v1, v4                                                  ; 10080901
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x18                                      ; C2020118
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v0, v5, v4, 0, 0                                            ; D2820004 04120B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1a                                      ; C202011A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1b                                      ; C202011B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	V_MOV_B32_e32 v5, 0x7fffffff                                              ; 7E0A02FF 7FFFFFFF
>	V_AND_B32_e32 v4, v4, v5                                                  ; 36080B04
>	V_MOV_B32_e32 v5, 1.000000e+00                                            ; 7E0A02F2
>	V_MOV_B32_e32 v6, 0.000000e+00                                            ; 7E0C0280
>	EXP 15, 32, 0, 0, 0, v4, v6, v6, v5                                       ; F800020F 05060604
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = fmul float %33, %13
>  %38 = fmul float %33, %14
>  %39 = fmul float %33, %15
>  %40 = fmul float %33, %16
>  %41 = fmul float %34, %17
>  %42 = fadd float %41, %37
>  %43 = fmul float %34, %18
>  %44 = fadd float %43, %38
>  %45 = fmul float %34, %19
>  %46 = fadd float %45, %39
>  %47 = fmul float %34, %20
>  %48 = fadd float %47, %40
>  %49 = fmul float %35, %21
>  %50 = fadd float %49, %42
>  %51 = fmul float %35, %22
>  %52 = fadd float %51, %44
>  %53 = fmul float %35, %23
>  %54 = fadd float %53, %46
>  %55 = fmul float %35, %24
>  %56 = fadd float %55, %48
>  %57 = fmul float %36, %25
>  %58 = fadd float %57, %50
>  %59 = fmul float %36, %26
>  %60 = fadd float %59, %52
>  %61 = fmul float %36, %27
>  %62 = fadd float %61, %54
>  %63 = fmul float %36, %28
>  %64 = fadd float %63, %56
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %58, float %60, float %62, float %64)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  %73 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %74 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %75 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %76 = call float @llvm.AMDIL.clamp.(float %44, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %73, float %74, float %75, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	V_ADD_F32_e64 v5, v4, 0, 1, 0                                             ; D2060805 00010104
>	V_ADD_F32_e64 v6, v3, 0, 1, 0                                             ; D2060806 00010103
>	V_ADD_F32_e64 v7, v2, 0, 1, 0                                             ; D2060807 00010102
>	V_ADD_F32_e64 v1, v1, 0, 1, 0                                             ; D2060801 00010101
>	EXP 15, 32, 0, 0, 0, v1, v7, v6, v5                                       ; F800020F 05060701
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  %73 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %74 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %75 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %76 = call float @llvm.AMDIL.clamp.(float %44, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %73, float %74, float %75, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	V_ADD_F32_e64 v5, v4, 0, 1, 0                                             ; D2060805 00010104
>	V_ADD_F32_e64 v6, v3, 0, 1, 0                                             ; D2060806 00010103
>	V_ADD_F32_e64 v7, v2, 0, 1, 0                                             ; D2060807 00010102
>	V_ADD_F32_e64 v1, v1, 0, 1, 0                                             ; D2060801 00010101
>	EXP 15, 32, 0, 0, 0, v1, v7, v6, v5                                       ; F800020F 05060701
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %41, float %42, float %43, float %44)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>fixme:win:EnumDisplayDevicesW ((null),0,0x32f6a8,0x00000000), stub!
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v1, v2, v3, v4                                       ; F800020F 04030201
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL OUT[0], POSITION
>  0: MOV OUT[0], IN[0]
>  1: END
>STREAMOUT
>  0: BUF0[0..0] <- OUT[0].x
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %14 = getelementptr [6 x <16 x i8>] addrspace(2)* %3, i64 0, i32 2
>  %15 = load <16 x i8> addrspace(2)* %14, !tbaa !0
>  %16 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %17 = load <16 x i8> addrspace(2)* %16, !tbaa !0
>  %18 = add i32 %5, %10
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %18)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = lshr i32 %7, 16
>  %25 = and i32 %24, 127
>  %26 = call i32 @llvm.SI.tid()
>  %27 = icmp ult i32 %26, %25
>  br i1 %27, label %if-true-block, label %endif-block
>
>if-true-block:                                    ; preds = %main_body
>  %28 = add i32 %8, %26
>  %29 = mul i32 %9, 4
>  %30 = mul i32 %28, 4
>  %31 = add i32 %30, %29
>  %32 = bitcast float %20 to i32
>  call void @llvm.SI.tbuffer.store.i32(<16 x i8> %15, i32 %32, i32 1, i32 %31, i32 0, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %20, float %21, float %22, float %23)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare i32 @llvm.SI.tid() #2
>
>declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000000
>	V_MBCNT_LO_U32_B32_e64 v4, -1, 0, 0, 0                                    ; D2460004 000100C1
>	V_MBCNT_HI_U32_B32_e32 v4, -1, v4                                         ; 480808C1
>	S_LSHR_B32 s0, s12, 16                                                    ; 9000900C
>	S_AND_B32 s0, s0, 0x7f                                                    ; 8700FF00 0000007F
>	V_CMP_LT_U32_e64 s[0:1], v4, s0, 0, 0                                     ; D1820000 00000104
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	S_AND_SAVEEXEC_B64 s[0:1], s[0:1]                                         ; BE802400
>	S_XOR_B64 s[0:1], exec, s[0:1]                                            ; 8980007E
>	V_ADD_I32_e32 v4, s13, v4                                                 ; 4A08080D
>	V_LSHLREV_B32_e32 v4, 2, v4                                               ; 34080882
>	V_LSHL_B32_e64 v5, s14, 2, 0, 0                                           ; D2320005 0001040E
>	V_ADD_I32_e32 v4, v4, v5                                                  ; 4A080B04
>	S_LOAD_DWORDX4 s[4:7], s[6:7], 0x8                                        ; C0820708
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	TBUFFER_STORE_FORMAT_X v0, 0x0, -1, 0, -1, 0, 4, 4, v4, s[4:7], -1, 0, 0  ; EA245000 80410004
>	S_WAITCNT vmcnt(0) expcnt(0)                                              ; BF8C0700
>	S_OR_B64 exec, exec, s[0:1]                                               ; 88FE007E
>	EXP 15, 12, 0, 1, 0, v0, v1, v2, v3                                       ; F80008CF 03020100
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: MOV OUT[2], SV[0]
>  3: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = add i32 %5, %7
>  %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
>  %15 = extractelement <4 x float> %14, i32 0
>  %16 = extractelement <4 x float> %14, i32 1
>  %17 = extractelement <4 x float> %14, i32 2
>  %18 = extractelement <4 x float> %14, i32 3
>  %19 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %20 = load <16 x i8> addrspace(2)* %19, !tbaa !0
>  %21 = add i32 %5, %7
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %21)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = bitcast i32 %10 to float
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %23, float %24, float %25, float %26)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %15, float %16, float %17, float %18)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %27, float 0.000000e+00)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x4                                        ; C0800904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 32, 0, 0, 0, v4, v5, v6, v7                                       ; F800020F 07060504
>	S_LOAD_DWORDX4 s[0:3], s[8:9], 0x0                                        ; C0800900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[4:7], s[0:3][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80000400
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	EXP 15, 12, 0, 0, 0, v4, v5, v6, v7                                       ; F80000CF 07060504
>	V_MOV_B32_e32 v0, 0.000000e+00                                            ; 7E000280
>	EXP 4, 13, 0, 1, 0, v0, v0, v3, v0                                        ; F80008D4 00030000
>	S_ENDPGM                                                                  ; BF810000
>
>VERT
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV_SAT OUT[1], IN[1]
>  5: END
>; ModuleID = 'tgsi'
>
>define void @main([17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, [6 x <16 x i8>] addrspace(2)* inreg, [16 x <16 x i8>] addrspace(2)* inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
>main_body:
>  %11 = getelementptr [17 x <16 x i8>] addrspace(2)* %0, i64 0, i32 0
>  %12 = load <16 x i8> addrspace(2)* %11, !tbaa !0
>  %13 = call float @llvm.SI.load.const(<16 x i8> %12, i32 0)
>  %14 = call float @llvm.SI.load.const(<16 x i8> %12, i32 4)
>  %15 = call float @llvm.SI.load.const(<16 x i8> %12, i32 8)
>  %16 = call float @llvm.SI.load.const(<16 x i8> %12, i32 12)
>  %17 = call float @llvm.SI.load.const(<16 x i8> %12, i32 16)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %12, i32 20)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %12, i32 24)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %12, i32 28)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %12, i32 32)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %12, i32 36)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %12, i32 40)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %12, i32 44)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %12, i32 48)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %12, i32 52)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %12, i32 56)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %12, i32 60)
>  %29 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 0
>  %30 = load <16 x i8> addrspace(2)* %29, !tbaa !0
>  %31 = add i32 %5, %7
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %31)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = extractelement <4 x float> %32, i32 2
>  %36 = extractelement <4 x float> %32, i32 3
>  %37 = getelementptr [16 x <16 x i8>] addrspace(2)* %4, i64 0, i32 1
>  %38 = load <16 x i8> addrspace(2)* %37, !tbaa !0
>  %39 = add i32 %5, %7
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %38, i32 0, i32 %39)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fmul float %33, %13
>  %46 = fmul float %33, %14
>  %47 = fmul float %33, %15
>  %48 = fmul float %33, %16
>  %49 = fmul float %34, %17
>  %50 = fadd float %49, %45
>  %51 = fmul float %34, %18
>  %52 = fadd float %51, %46
>  %53 = fmul float %34, %19
>  %54 = fadd float %53, %47
>  %55 = fmul float %34, %20
>  %56 = fadd float %55, %48
>  %57 = fmul float %35, %21
>  %58 = fadd float %57, %50
>  %59 = fmul float %35, %22
>  %60 = fadd float %59, %52
>  %61 = fmul float %35, %23
>  %62 = fadd float %61, %54
>  %63 = fmul float %35, %24
>  %64 = fadd float %63, %56
>  %65 = fmul float %36, %25
>  %66 = fadd float %65, %58
>  %67 = fmul float %36, %26
>  %68 = fadd float %67, %60
>  %69 = fmul float %36, %27
>  %70 = fadd float %69, %62
>  %71 = fmul float %36, %28
>  %72 = fadd float %71, %64
>  %73 = call float @llvm.AMDIL.clamp.(float %41, float 0.000000e+00, float 1.000000e+00)
>  %74 = call float @llvm.AMDIL.clamp.(float %42, float 0.000000e+00, float 1.000000e+00)
>  %75 = call float @llvm.AMDIL.clamp.(float %43, float 0.000000e+00, float 1.000000e+00)
>  %76 = call float @llvm.AMDIL.clamp.(float %44, float 0.000000e+00, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %73, float %74, float %75, float %76)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %66, float %68, float %70, float %72)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>; Function Attrs: readnone
>declare float @llvm.AMDIL.clamp.(float, float, float) #2
>
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
>
>attributes #0 = { "ShaderType"="1" "unsafe-fp-math"="true" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { readnone }
>
>!0 = metadata !{metadata !"const", null, i32 1}
>
>Shader Disassembly:
>
>	V_ADD_I32_e32 v0, s10, v0                                                 ; 4A00000A
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x4                                        ; C0820904
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	BUFFER_LOAD_FORMAT_XYZW v[1:4], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010100
>	S_WAITCNT vmcnt(0)                                                        ; BF8C0770
>	V_ADD_F32_e64 v5, v4, 0, 1, 0                                             ; D2060805 00010104
>	V_ADD_F32_e64 v6, v3, 0, 1, 0                                             ; D2060806 00010103
>	V_ADD_F32_e64 v7, v2, 0, 1, 0                                             ; D2060807 00010102
>	V_ADD_F32_e64 v1, v1, 0, 1, 0                                             ; D2060801 00010101
>	EXP 15, 32, 0, 0, 0, v1, v7, v6, v5                                       ; F800020F 05060701
>	S_LOAD_DWORDX4 s[4:7], s[8:9], 0x0                                        ; C0820900
>	S_WAITCNT expcnt(0) lgkmcnt(0)                                            ; BF8C000F
>	BUFFER_LOAD_FORMAT_XYZW v[0:3], s[4:7][v0] + 0x0 + 0, glc=0, slc=0, tfe=0 ; E00C2000 80010000
>	S_LOAD_DWORDX4 s[0:3], s[0:1], 0x0                                        ; C0800100
>	S_WAITCNT vmcnt(0) lgkmcnt(0)                                             ; BF8C0070
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x3                                       ; C2020103
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v4, s4                                                      ; 7E080204
>	V_MUL_F32_e32 v4, v0, v4                                                  ; 10080900
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x7                                       ; C2020107
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v1, v5, v4, 0, 0                                            ; D2820004 04120B01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xb                                       ; C202010B
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v2, v5, v4, 0, 0                                            ; D2820004 04120B02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xf                                       ; C202010F
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MAD_F32 v4, v3, v5, v4, 0, 0                                            ; D2820004 04120B03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x2                                       ; C2020102
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v5, s4                                                      ; 7E0A0204
>	V_MUL_F32_e32 v5, v0, v5                                                  ; 100A0B00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x6                                       ; C2020106
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v1, v6, v5, 0, 0                                            ; D2820005 04160D01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xa                                       ; C202010A
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v2, v6, v5, 0, 0                                            ; D2820005 04160D02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xe                                       ; C202010E
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MAD_F32 v5, v3, v6, v5, 0, 0                                            ; D2820005 04160D03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x1                                       ; C2020101
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v6, s4                                                      ; 7E0C0204
>	V_MUL_F32_e32 v6, v0, v6                                                  ; 100C0D00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x5                                       ; C2020105
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v1, v7, v6, 0, 0                                            ; D2820006 041A0F01
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x9                                       ; C2020109
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v2, v7, v6, 0, 0                                            ; D2820006 041A0F02
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0xd                                       ; C202010D
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MAD_F32 v6, v3, v7, v6, 0, 0                                            ; D2820006 041A0F03
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x0                                       ; C2020100
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v7, s4                                                      ; 7E0E0204
>	V_MUL_F32_e32 v7, v0, v7                                                  ; 100E0F00
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x4                                       ; C2020104
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v1, v8, v7, 0, 0                                            ; D2820007 041E1101
>	S_BUFFER_LOAD_DWORD s4, s[0:3], 0x8                                       ; C2020108
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s4                                                      ; 7E100204
>	V_MAD_F32 v7, v2, v8, v7, 0, 0                                            ; D2820007 041E1102
>	S_BUFFER_LOAD_DWORD s0, s[0:3], 0xc                                       ; C200010C
>	S_WAITCNT lgkmcnt(0)                                                      ; BF8C007F
>	V_MOV_B32_e32 v8, s0                                                      ; 7E100200
>	V_MAD_F32 v0, v3, v8, v7, 0, 0                                            ; D2820000 041E1103
>	EXP 15, 12, 0, 1, 0, v0, v6, v5, v4                                       ; F80008CF 04050600
>	S_ENDPGM                                                                  ; BF810000
>
>wine: Unhandled exception 0xc000008d in thread 9 at address 0x7aaf093a (thread 0009), starting debugger...
>Unhandled exception: denormal float operand in 32-bit code (0x7aaf081f).
>Register dump:
> CS:0023 SS:002b DS:002b ES:002b FS:0063 GS:006b
> EIP:7aaf081f ESP:00329950 EBP:003299d8 EFLAGS:00210287(  R- --  I S - -P-C)
> EAX:00329b2c EBX:7b7ea000 ECX:00000001 EDX:7b36440e
> ESI:7e17feac EDI:00329b18
>Stack dump:
>0x00329950:  7e17fe84 00000a1f 00000040 7e1615e8
>0x00329960:  7e1615ec 00329d80 ffffffff 00000000
>0x00329970:  7b36440e 7e17fed4 ffffffff 00000000
>0x00329980:  ffffffff 00329b01 00329b00 00329b40
>0x00329990:  00329b01 000000ab 00000000 7b7ea000
>0x003299a0:  7cc147bc 7e1614b0 7cc14500 7b0a618c
>Backtrace:
>=>0 0x7aaf081f _ZNK4llvm17AMDGPUMCInstLower5lowerEPKNS_12MachineInstrERNS_6MCInstE+0xef() in libllvm-3.5svn.so (0x003299d8)
>  1 0x7aaf0c5e _ZN4llvm16AMDGPUAsmPrinter15EmitInstructionEPKNS_12MachineInstrE+0xbd() in libllvm-3.5svn.so (0x7e17fe84)
>  2 0x7ae100b8 _ZN4llvm10AsmPrinter16EmitFunctionBodyEv+0x8c7() in libllvm-3.5svn.so (0x00329d68)
>  3 0x7aad8990 _ZN4llvm16AMDGPUAsmPrinter20runOnMachineFunctionERNS_15MachineFunctionE+0x2cf() in libllvm-3.5svn.so (0x00329e38)
>  4 0x7b0ae924 _ZN4llvm19MachineFunctionPass13runOnFunctionERNS_8FunctionE+0x73() in libllvm-3.5svn.so (0x7cc16408)
>  5 0x7acf108b _ZN4llvm13FPPassManager13runOnFunctionERNS_8FunctionE+0x20a() in libllvm-3.5svn.so (0x00329ee8)
>  6 0x7acf13d8 _ZN4llvm13FPPassManager11runOnModuleERNS_6ModuleE+0x37() in libllvm-3.5svn.so (0x7ccdeab0)
>  7 0x7acf16e4 _ZN4llvm6legacy15PassManagerImpl3runERNS_6ModuleE+0x2f3() in libllvm-3.5svn.so (0x7e1290a8)
>  8 0x7acf18a6 _ZN4llvm6legacy11PassManager3runERNS_6ModuleE+0x25() in libllvm-3.5svn.so (0x7cbfd530)
>  9 0x7b288502 _ZL21LLVMTargetMachineEmitP23LLVMOpaqueTargetMachineP16LLVMOpaqueModuleRN4llvm21formatted_raw_ostreamE19LLVMCodeGenFileTypePPc+0xc1() in libllvm-3.5svn.so (0x7cbfd530)
>  10 0x7b288720 LLVMTargetMachineEmitToMemoryBuffer+0x14f() in libllvm-3.5svn.so (0x0032a040)
>  11 0x7daf444e radeon_llvm_compile+0x205() in radeonsi_dri.so (0x7b7f4c00)
>  12 0x7dba5d0d si_compile_llvm+0x94() in radeonsi_dri.so (0x7cc97230)
>  13 0x7dba66bd si_pipe_shader_create+0x634() in radeonsi_dri.so (0x0032dc9c)
>  14 0x7dbac51c si_shader_select+0x2eb() in radeonsi_dri.so (0x7cbecc70)
>  15 0x7dbac643 si_create_shader_state+0x8a() in radeonsi_dri.so (0x7e3d9528)
>  16 0x7da04b51 ureg_create_shader+0x50() in radeonsi_dri.so (0x7cd5b758)
>  17 0x7da2b5da util_make_empty_fragment_shader+0xb1() in radeonsi_dri.so (0x0032f018)
>  18 0x7da12637 util_blitter_create+0x386() in radeonsi_dri.so (0x7e0c9820)
>  19 0x7db9f6e0 si_create_context+0x16f() in radeonsi_dri.so (0x7e0ab6d8)
>  20 0x7d8fd4c7 st_api_create_context+0x76() in radeonsi_dri.so (0x7e0aafac)
>  21 0x7d9ba8cf dri_create_context+0x1ee() in radeonsi_dri.so (0x7e0aafac)
>  22 0x7d9b70d5 driCreateContextAttribs+0x31c() in radeonsi_dri.so (0x00000001)
>  23 0x7dff7d13 dri2_create_context_attribs+0x1a2() in libgl.so.1 (0x7cbf2ab0)
>  24 0x7dfcbe0d glXCreateContextAttribsARB+0x1ac() in libgl.so.1 (0x0032f658)
>  25 0x7e4251c3 create_glxcontext.isra+0x52() in winex11 (0x0032f688)
>  26 0x7e4254f8 X11DRV_wglCreateContextAttribsARB+0x187(hdc=<is not available>, hShareContext=<is not available>, attribList=<is not available>) [/home/andrei/x/wine/dlls/winex11.drv/opengl.c:2081] in winex11 (0x0032f6d8)
>  27 0x7e9e46da wglCreateContextAttribsARB+0x99(hdc=<couldn't compute location>, share=<couldn't compute location>, attribs=<couldn't compute location>) [/home/andrei/x/wine/dlls/opengl32/wgl.c:268] in opengl32 (0x0032f718)
>  28 0x7ea99829 context_create+0x388(swapchain=0x11fdd8, target=0x11cdb0, ds_format=0x131c10) [/home/andrei/x/wine/dlls/wined3d/context.c:1543] in wined3d (0x0032f7a8)
>  29 0x7eb2f5b7 wined3d_swapchain_create+0x8d6(device=<couldn't compute location>, desc=<couldn't compute location>, parent=<couldn't compute location>, parent_ops=<couldn't compute location>, swapchain=<couldn't compute location>) [/home/andrei/x/wine/dlls/wined3d/swapchain.c:923] in wined3d (0x0032f878)
>  30 0x7efe7ed0 d3d8_swapchain_create+0x7f(device=0x127388, desc=0x32fa24, swapchain=0x32f8fc) [/home/andrei/x/wine/dlls/d3d8/swapchain.c:167] in d3d8 (0x0032f8c8)
>  31 0x7efdceda device_parent_create_swapchain+0x49(device_parent=<couldn't compute location>, desc=<couldn't compute location>, swapchain=<couldn't compute location>) [/home/andrei/x/wine/dlls/d3d8/device.c:3034] in d3d8 (0x0032f918)
>  32 0x7eaadc8c wined3d_device_init_3d+0xeb(device=<couldn't compute location>, swapchain_desc=<couldn't compute location>) [/home/andrei/x/wine/dlls/wined3d/device.c:896] in wined3d (0x0032f9d8)
>  33 0x7efe4ca2 device_init+0x141(device=0x127388, parent=0x127370, wined3d=0x127688, adapter=0, device_type=D3DDEVTYPE_HAL, focus_window=0x20048, flags=0x42, parameters=0x32fc4c) [/home/andrei/x/wine/dlls/d3d8/device.c:3134] in d3d8 (0x0032fa78)
>  34 0x7efe50e6 d3d8_CreateDevice+0xb5(iface=<couldn't compute location>, adapter=<couldn't compute location>, device_type=<couldn't compute location>, focus_window=<couldn't compute location>, flags=<couldn't compute location>, parameters=<couldn't compute location>, device=<couldn't compute location>) [/home/andrei/x/wine/dlls/d3d8/directx.c:369] in d3d8 (0x0032fae8)
>  35 0x7ebc414b func_device+0x48a() [/home/andrei/x/wine/dlls/d3d8/tests/device.c:2602] in d3d8_test (0x0032fd38)
>  36 0x7ebaa284 main+0x383(argc=<is not available>, argv=<is not available>) [/home/andrei/x/wine/dlls/d3d8/tests/../../../include/wine/test.h:584] in d3d8_test (0x0032fe18)
>  37 0x7ebe7ce0 __wine_spec_exe_entry+0x7f(peb=<couldn't compute location>) [/home/andrei/x/wine/dlls/winecrt0/exe_entry.c:36] in d3d8_test (0x0032fe58)
>  38 0x7b85f4fc call_process_entry+0xb() in kernel32 (0x0032fe78)
>  39 0x7b860593 start_process+0x62(peb=<couldn't compute location>) [/home/andrei/x/wine/dlls/kernel32/process.c:1097] in kernel32 (0x0032feb8)
>  40 0x7bc7fd90 call_thread_func_wrapper+0xb() in ntdll (0x0032fed8)
>  41 0x7bc82d1d call_thread_func+0x7c(entry=0x7b860530, arg=0x7ffdf000, frame=0x32ffc8) [/home/andrei/x/wine/dlls/ntdll/signal_i386.c:2637] in ntdll (0x0032ffa8)
>  42 0x7bc7fd6e call_thread_entry_point+0x11() in ntdll (0x0032ffc8)
>  43 0x7bc53dee start_process+0x1d(kernel_start=0x7b860530) [/home/andrei/x/wine/dlls/ntdll/loader.c:2856] in ntdll (0x0032ffe8)
>  44 0xf75b969d wine_call_on_stack+0x1c() in libwine.so.1 (0x00000000)
>  45 0xf75b975b wine_switch_to_stack+0x2a(func=0x7bc53dd0, arg=0x7b860530, stack=0x330000) [/home/andrei/x/wine/libs/wine/port.c:59] in libwine.so.1 (0xffa3c848)
>  46 0x7bc59939 LdrInitializeThunk+0x238(kernel_start=<couldn't compute location>, unknown2=<couldn't compute location>, unknown3=<couldn't compute location>, unknown4=<couldn't compute location>) [/home/andrei/x/wine/dlls/ntdll/loader.c:2910] in ntdll (0xffa3c888)
>  47 0x7b866db3 __wine_kernel_init+0xa12() [/home/andrei/x/wine/dlls/kernel32/process.c:1269] in kernel32 (0xffa3d9a8)
>  48 0x7bc5a863 __wine_process_init+0x192() [/home/andrei/x/wine/dlls/ntdll/loader.c:3119] in ntdll (0xffa3da38)
>  49 0xf75b6e18 wine_init+0x2c7(argc=0x3, argv=0xffa3df84, error="", error_size=0x400) [/home/andrei/x/wine/libs/wine/loader.c:958] in libwine.so.1 (0xffa3da98)
>  50 0x7bf00d5c main+0x8b(argc=<is not available>, argv=<is not available>) [/home/andrei/x/wine/loader/main.c:237] in <wine-loader> (0xffa3dee8)
>  51 0xf73c1443 __libc_start_main+0xf2() in libc.so.6 (0x00000000)
>0x7aaf081f _ZNK4llvm17AMDGPUMCInstLower5lowerEPKNS_12MachineInstrERNS_6MCInstE+0xef in libllvm-3.5svn.so: fstpl	0xffffffb0(%ebp)
>Modules:
>Module	Address			Debug info	Name (72 modules)
>ELF	7a3d8000-7b7fd000	Dwarf           libllvm-3.5svn.so
>ELF	7b800000-7ba5f000	Dwarf           kernel32<elf>
>  \-PE	7b810000-7ba5f000	\               kernel32
>ELF	7bc00000-7bce4000	Dwarf           ntdll<elf>
>  \-PE	7bc10000-7bce4000	\               ntdll
>ELF	7bf00000-7bf04000	Dwarf           <wine-loader>
>ELF	7cb40000-7cb65000	Deferred        imm32<elf>
>  \-PE	7cb50000-7cb65000	\               imm32
>ELF	7cde8000-7cdee000	Deferred        libtxc_dxtn.so
>ELF	7d5f0000-7d63e000	Deferred        libncurses.so.5
>ELF	7d640000-7d648000	Deferred        libffi.so.6
>ELF	7d648000-7d663000	Deferred        libgcc_s.so.1
>ELF	7d758000-7d766000	Deferred        libdrm_radeon.so.1
>ELF	7d768000-7d781000	Deferred        libelf.so.1
>ELF	7d788000-7df65000	Dwarf           radeonsi_dri.so
>ELF	7df68000-7df71000	Deferred        librt.so.1
>ELF	7df78000-7df8e000	Deferred        libudev.so.1
>ELF	7df90000-7df9c000	Deferred        libdrm.so.2
>ELF	7dfa0000-7dfb7000	Deferred        libxcb-glx.so.0
>ELF	7dfb8000-7e045000	Dwarf           libgl.so.1
>ELF	7e188000-7e18e000	Deferred        libxfixes.so.3
>ELF	7e190000-7e19b000	Deferred        libxcursor.so.1
>ELF	7e1a0000-7e1b1000	Deferred        libxi.so.6
>ELF	7e1b8000-7e1bc000	Deferred        libxcomposite.so.1
>ELF	7e1c0000-7e1cb000	Deferred        libxrandr.so.2
>ELF	7e1d0000-7e1db000	Deferred        libxrender.so.1
>ELF	7e1e0000-7e1e7000	Deferred        libxxf86vm.so.1
>ELF	7e1e8000-7e209000	Deferred        libxcb.so.1
>ELF	7e210000-7e348000	Deferred        libx11.so.6
>ELF	7e348000-7e35b000	Deferred        libxext.so.6
>ELF	7e360000-7e365000	Deferred        libxcb-dri2.so.0
>ELF	7e368000-7e36a000	Deferred        libx11-xcb.so.1
>ELF	7e370000-7e374000	Deferred        libxdamage.so.1
>ELF	7e378000-7e391000	Deferred        libglapi.so.0
>ELF	7e3e0000-7e3e4000	Deferred        libxinerama.so.1
>ELF	7e3e8000-7e47c000	Dwarf           winex11<elf>
>  \-PE	7e3f0000-7e47c000	\               winex11
>ELF	7e480000-7e4a8000	Deferred        libexpat.so.1
>ELF	7e4a8000-7e4e3000	Deferred        libfontconfig.so.1
>ELF	7e4e8000-7e520000	Deferred        libpng16.so.16
>ELF	7e520000-7e531000	Deferred        libbz2.so.1
>ELF	7e538000-7e54e000	Deferred        libz.so.1
>ELF	7e550000-7e5f1000	Deferred        libfreetype.so.6
>ELF	7e5f8000-7e5ff000	Deferred        libxdmcp.so.6
>ELF	7e600000-7e604000	Deferred        libxau.so.6
>ELF	7e638000-7e652000	Deferred        version<elf>
>  \-PE	7e640000-7e652000	\               version
>ELF	7e658000-7e7b4000	Deferred        user32<elf>
>  \-PE	7e670000-7e7b4000	\               user32
>ELF	7e7b8000-7e82b000	Deferred        advapi32<elf>
>  \-PE	7e7c0000-7e82b000	\               advapi32
>ELF	7e830000-7e948000	Deferred        gdi32<elf>
>  \-PE	7e840000-7e948000	\               gdi32
>ELF	7e948000-7ea57000	Dwarf           opengl32<elf>
>  \-PE	7e960000-7ea57000	\               opengl32
>ELF	7ea58000-7eb98000	Dwarf           wined3d<elf>
>  \-PE	7ea70000-7eb98000	\               wined3d
>ELF	7eb98000-7ebfa000	Dwarf           d3d8_test<elf>
>  \-PE	7eba0000-7ebfa000	\               d3d8_test
>ELF	7ef70000-7ef7d000	Deferred        libnss_files.so.2
>ELF	7ef80000-7ef8c000	Deferred        libnss_nis.so.2
>ELF	7ef90000-7efa9000	Deferred        libnsl.so.1
>ELF	7efb0000-7efb9000	Deferred        libnss_compat.so.2
>ELF	7efc8000-7effc000	Dwarf           d3d8<elf>
>  \-PE	7efd0000-7effc000	\               d3d8
>ELF	f7358000-f739d000	Deferred        libm.so.6
>ELF	f73a0000-f73a4000	Deferred        libdl.so.2
>ELF	f73a8000-f754b000	Dwarf           libc.so.6
>ELF	f7550000-f756b000	Deferred        libpthread.so.0
>ELF	f75b0000-f7766000	Dwarf           libwine.so.1
>ELF	f7768000-f778a000	Deferred        ld-linux.so.2
>ELF	f7790000-f7791000	Deferred        [vdso].so
>Threads:
>process  tid      prio (all id:s are in hex)
>00000008 (D) Z:\home\andrei\x\wine\dlls\d3d8\tests\d3d8_test.exe
>	00000009    0 <==
>0000000e services.exe
>	00000020    0
>	0000001e    0
>	00000016    0
>	00000014    0
>	00000010    0
>	0000000f    0
>00000012 winedevice.exe
>	0000001b    0
>	00000018    0
>	00000017    0
>	00000013    0
>00000019 plugplay.exe
>	00000021    0
>	0000001f    0
>	0000001a    0
>0000001c explorer.exe
>	0000001d    0
>Makefile:159: recipe for target 'device.ok' failed
>make: *** [device.ok] Error 141
>make: Leaving directory '/home/andrei/x/wine/dlls/d3d8/tests'

Actions: View

Attachments on bug 79575: 104309 | 104462

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.