Attachment 105813 Details for Bug 83497 – [PATCH] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk

[patch] [PATCH] drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk

0001-drm-i915-Don-t-enable-IPS-when-pixel-rate-exceeds-95.patch (text/plain), 3.92 KB, created by Ville Syrjala on 2014-09-05 16:28:22 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Ville Syrjala

Created: 2014-09-05 16:28:22 UTC

Size: 3.92 KB

patch

obsolete

>From e097ec9c0af18fd3fabf6d1e1314d7cf9be3489b Mon Sep 17 00:00:00 2001
>From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
>Date: Fri, 5 Sep 2014 19:10:35 +0300
>Subject: [PATCH] drm/i915: Don't enable IPS when pixel rate exceeds 95% of
> cdclk
>MIME-Version: 1.0
>Content-Type: text/plain; charset=UTF-8
>Content-Transfer-Encoding: 8bit
>
>Bspec says we shouldn't enable IPS on BDW when the pipe pixel rate
>exceeds 95% of the core display clock. Apparently this can cause
>underruns.
>
>There's no similar restriction listed for HSW, so leave that one alone
>for now.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497
>Signed-off-by: Ville SyrjÃ¤lÃ¤ <ville.syrjala@linux.intel.com>
>---
> drivers/gpu/drm/i915/intel_display.c | 10 ++++++++--
> drivers/gpu/drm/i915/intel_drv.h     |  1 +
> drivers/gpu/drm/i915/intel_pm.c      | 16 +++++++---------
> 3 files changed, 16 insertions(+), 11 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index 965eb3c..ca729e5 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -5244,9 +5244,15 @@ retry:
> static void hsw_compute_ips_config(struct intel_crtc *crtc,
> 				   struct intel_crtc_config *pipe_config)
> {
>+	struct drm_device *dev = crtc->base.dev;
>+	struct drm_i915_private *dev_priv = dev->dev_private;
>+
> 	pipe_config->ips_enabled = i915.enable_ips &&
>-				   hsw_crtc_supports_ips(crtc) &&
>-				   pipe_config->pipe_bpp <= 24;
>+		hsw_crtc_supports_ips(crtc) &&
>+		pipe_config->pipe_bpp <= 24 &&
>+		(IS_HASWELL(dev) ||
>+		 ilk_pipe_pixel_rate(pipe_config) <=
>+		 95 * intel_ddi_get_cdclk_freq(dev_priv) / 100);
> }
> 
> static int intel_crtc_compute_config(struct intel_crtc *crtc,
>diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>index a505bf3..a75c123 100644
>--- a/drivers/gpu/drm/i915/intel_drv.h
>+++ b/drivers/gpu/drm/i915/intel_drv.h
>@@ -1093,6 +1093,7 @@ void intel_runtime_pm_put(struct drm_i915_private *dev_priv);
> void intel_init_runtime_pm(struct drm_i915_private *dev_priv);
> void intel_fini_runtime_pm(struct drm_i915_private *dev_priv);
> void ilk_wm_get_hw_state(struct drm_device *dev);
>+uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_config *pipe_config);
> 
> 
> /* intel_sdvo.c */
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 45f71e6..b0cbfd2 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -1836,23 +1836,21 @@ static void i845_update_wm(struct drm_crtc *unused_crtc)
> 	I915_WRITE(FW_BLC, fwater_lo);
> }
> 
>-static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
>-				    struct drm_crtc *crtc)
>+uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_config *pipe_config)
> {
>-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> 	uint32_t pixel_rate;
> 
>-	pixel_rate = intel_crtc->config.adjusted_mode.crtc_clock;
>+	pixel_rate = pipe_config->adjusted_mode.crtc_clock;
> 
> 	/* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
> 	 * adjust the pixel_rate here. */
> 
>-	if (intel_crtc->config.pch_pfit.enabled) {
>+	if (pipe_config->pch_pfit.enabled) {
> 		uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
>-		uint32_t pfit_size = intel_crtc->config.pch_pfit.size;
>+		uint32_t pfit_size = pipe_config->pch_pfit.size;
> 
>-		pipe_w = intel_crtc->config.pipe_src_w;
>-		pipe_h = intel_crtc->config.pipe_src_h;
>+		pipe_w = pipe_config->pipe_src_w;
>+		pipe_h = pipe_config->pipe_src_h;
> 		pfit_w = (pfit_size >> 16) & 0xFFFF;
> 		pfit_h = pfit_size & 0xFFFF;
> 		if (pipe_w < pfit_w)
>@@ -2371,7 +2369,7 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
> 
> 	p->active = true;
> 	p->pipe_htotal = intel_crtc->config.adjusted_mode.crtc_htotal;
>-	p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
>+	p->pixel_rate = ilk_pipe_pixel_rate(&intel_crtc->config);
> 	p->pri.bytes_per_pixel = crtc->primary->fb->bits_per_pixel / 8;
> 	p->cur.bytes_per_pixel = 4;
> 	p->pri.horiz_pixels = intel_crtc->config.pipe_src_w;
>-- 
>1.8.5.5
>

Actions: View | Splinter Review

Attachments on bug 83497: 105813

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.