Attachment 106758 Details for Bug 83207 – patch 1/2

[patch] patch 1/2

0001-drm-i915-Put-logical-pipe_control-emission-into-a-he.patch (text/plain), 2.51 KB, created by Rodrigo Vivi on 2014-09-23 20:28:54 UTC

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Creator: Rodrigo Vivi

Created: 2014-09-23 20:28:54 UTC

Size: 2.51 KB

patch

obsolete

>From d5a1e01ff0b2812598834cb7b938b66794a070ad Mon Sep 17 00:00:00 2001
>From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>Date: Tue, 23 Sep 2014 06:20:33 -0700
>Subject: [PATCH 1/2] drm/i915: Put logical pipe_control emission into a
> helper.
>
>To be used for a Workaroud. Similar to:
>
>commit 884ceacee308f0e4616d0c933518af2639f7b1d8
>Author: Kenneth Graunke <kenneth@whitecape.org>
>Date:   Sat Jun 28 02:04:20 2014 +0300
>
>    drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.
>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>---
> drivers/gpu/drm/i915/intel_lrc.c | 35 +++++++++++++++++++++--------------
> 1 file changed, 21 insertions(+), 14 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>index 803fc38..992d6d06 100644
>--- a/drivers/gpu/drm/i915/intel_lrc.c
>+++ b/drivers/gpu/drm/i915/intel_lrc.c
>@@ -1128,6 +1128,26 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
> 	return 0;
> }
> 
>+static int gen8_emit_pipe_control(struct intel_ringbuffer *ringbuf,
>+				  u32 flags, u32 scratch_addr)
>+{
>+	int ret;
>+
>+	ret = intel_logical_ring_begin(ringbuf, 6);
>+	if (ret)
>+		return ret;
>+
>+	intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6));
>+	intel_logical_ring_emit(ringbuf, flags);
>+	intel_logical_ring_emit(ringbuf, scratch_addr);
>+	intel_logical_ring_emit(ringbuf, 0);
>+	intel_logical_ring_emit(ringbuf, 0);
>+	intel_logical_ring_emit(ringbuf, 0);
>+	intel_logical_ring_advance(ringbuf);
>+
>+	return 0;
>+}
>+
> static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
> 				  u32 invalidate_domains,
> 				  u32 flush_domains)
>@@ -1135,7 +1155,6 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
> 	struct intel_engine_cs *ring = ringbuf->ring;
> 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
> 	u32 flags = 0;
>-	int ret;
> 
> 	flags |= PIPE_CONTROL_CS_STALL;
> 
>@@ -1155,19 +1174,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
> 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
> 	}
> 
>-	ret = intel_logical_ring_begin(ringbuf, 6);
>-	if (ret)
>-		return ret;
>-
>-	intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6));
>-	intel_logical_ring_emit(ringbuf, flags);
>-	intel_logical_ring_emit(ringbuf, scratch_addr);
>-	intel_logical_ring_emit(ringbuf, 0);
>-	intel_logical_ring_emit(ringbuf, 0);
>-	intel_logical_ring_emit(ringbuf, 0);
>-	intel_logical_ring_advance(ringbuf);
>-
>-	return 0;
>+	return gen8_emit_pipe_control(ringbuf, flags, scratch_addr);
> }
> 
> static u32 gen8_get_seqno(struct intel_engine_cs *ring, bool lazy_coherency)
>-- 
>1.9.3
>

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Attachments on bug 83207: 106758 | 106759 | 107170 | 107215 | 108334 | 108553 | 108554 | 108997 | 109004

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