Attachment 109923 Details for Bug 86654 – dmesg

dmesg

pm_rps_min-max-config-idle.dmesg (text/plain), 123.60 KB, created by Guo Jinxian on 2014-11-24 05:47:06 UTC

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Creator: Guo Jinxian

Created: 2014-11-24 05:47:06 UTC

Size: 123.60 KB

patch

obsolete

>[    1.016801] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection
>[    1.016837] e1000e 0000:00:19.0 eth0: MAC: 11, PHY: 12, PBA No: FFFFFF-0FF
>[    1.016855] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.2.15-k
>[    1.016857] igb: Copyright (c) 2007-2014 Intel Corporation.
>[    1.016883] usbcore: registered new interface driver catc
>[    1.016894] usbcore: registered new interface driver kaweth
>[    1.016898] pegasus: v0.9.3 (2013/04/25), Pegasus/Pegasus II USB Ethernet driver
>[    1.016909] usbcore: registered new interface driver pegasus
>[    1.016920] usbcore: registered new interface driver rtl8150
>[    1.016933] usbcore: registered new interface driver asix
>[    1.016944] usbcore: registered new interface driver ax88179_178a
>[    1.016955] usbcore: registered new interface driver cdc_ether
>[    1.016967] usbcore: registered new interface driver dm9601
>[    1.016979] usbcore: registered new interface driver gl620a
>[    1.016990] usbcore: registered new interface driver net1080
>[    1.017001] usbcore: registered new interface driver plusb
>[    1.017013] usbcore: registered new interface driver rndis_host
>[    1.017026] usbcore: registered new interface driver cdc_subset
>[    1.017038] usbcore: registered new interface driver zaurus
>[    1.017051] usbcore: registered new interface driver MOSCHIP usb-ethernet driver
>[    1.017070] usbcore: registered new interface driver cdc_ncm
>[    1.017221] xhci_hcd 0000:00:14.0: can't derive routing for PCI INT A
>[    1.017225] xhci_hcd 0000:00:14.0: PCI INT A: no GSI
>[    1.017246] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.017281] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1
>[    1.017368] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    1.017381] xhci_hcd 0000:00:14.0: irq 42 for MSI/MSI-X
>[    1.017434] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
>[    1.017437] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    1.017440] usb usb1: Product: xHCI Host Controller
>[    1.017443] usb usb1: Manufacturer: Linux 3.18.0-rc5_drm-intel-next-queued_03b0b6_20141124+ xhci-hcd
>[    1.017446] usb usb1: SerialNumber: 0000:00:14.0
>[    1.017546] hub 1-0:1.0: USB hub found
>[    1.017561] hub 1-0:1.0: 11 ports detected
>[    1.020613] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.020648] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[    1.020677] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
>[    1.020680] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    1.020683] usb usb2: Product: xHCI Host Controller
>[    1.020685] usb usb2: Manufacturer: Linux 3.18.0-rc5_drm-intel-next-queued_03b0b6_20141124+ xhci-hcd
>[    1.020688] usb usb2: SerialNumber: 0000:00:14.0
>[    1.020776] hub 2-0:1.0: USB hub found
>[    1.020786] hub 2-0:1.0: 4 ports detected
>[    1.021530] usb: failed to peer usb2-port3 and usb1-port11 by location (usb2-port3:none) (usb1-port11:usb2-port2)
>[    1.021534] usb usb2-port3: failed to peer to usb1-port11 (-16)
>[    1.021536] usb: port power management may be unreliable
>[    1.021940] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    1.021945] ehci-pci: EHCI PCI platform driver
>[    1.021972] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>[    1.021978] ohci-pci: OHCI PCI platform driver
>[    1.021993] uhci_hcd: USB Universal Host Controller Interface driver
>[    1.022030] usbcore: registered new interface driver usb-storage
>[    1.022066] i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
>[    1.022069] i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
>[    1.022472] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    1.022545] mousedev: PS/2 mouse device common for all mice
>[    1.022650] rtc_cmos 00:02: RTC can wake from S4
>[    1.022780] rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
>[    1.022814] rtc_cmos 00:02: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    1.022829] i2c /dev entries driver
>[    1.022860] hidraw: raw HID events driver (C) Jiri Kosina
>[    1.023116] usbcore: registered new interface driver usbhid
>[    1.023119] usbhid: USB HID core driver
>[    1.023201] TCP: cubic registered
>[    1.023216] Initializing XFRM netlink socket
>[    1.023225] NET: Registered protocol family 17
>[    1.023251] Key type dns_resolver registered
>[    1.023709] registered taskstats version 1
>[    1.024127] Btrfs loaded
>[    1.024379]   Magic number: 6:120:444
>[    1.024491] PM: Hibernation image not present or could not be loaded.
>[    1.024503] Warning: unable to open an initial console.
>[    1.057951] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0
>[    1.155164] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    1.155408] ata2.00: ATA-9: INTEL SSDSC2BB240G4, D2010370, max UDMA/133
>[    1.155412] ata2.00: 468862128 sectors, multi 1: LBA48 NCQ (depth 31/32)
>[    1.155739] ata2.00: configured for UDMA/133
>[    1.155831] scsi 1:0:0:0: Direct-Access     ATA      INTEL SSDSC2BB24 0370 PQ: 0 ANSI: 5
>[    1.156005] sd 1:0:0:0: [sda] 468862128 512-byte logical blocks: (240 GB/223 GiB)
>[    1.156010] sd 1:0:0:0: [sda] 4096-byte physical blocks
>[    1.156020] sd 1:0:0:0: Attached scsi generic sg0 type 0
>[    1.156074] sd 1:0:0:0: [sda] Write Protect is off
>[    1.156078] sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    1.156103] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    1.157455]  sda: sda1 sda2 sda3
>[    1.157703] sd 1:0:0:0: [sda] Attached SCSI disk
>[    1.161573] Freeing unused kernel memory: 23416K (ffffffff81c4b000 - ffffffff83329000)
>[    1.190809] dracut: dracut-018-35.git20120510.fc17
>[    1.214729] udevd[1441]: starting version 182
>[    1.229370] [drm] Initialized drm 1.1.0 20060810
>[    1.230317] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input1
>[    1.233439] ACPI: Lid Switch [LID0]
>[    1.233521] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input2
>[    1.233613] ACPI: Power Button [PWRB]
>[    1.233677] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input3
>[    1.233761] ACPI: Sleep Button [SLPB]
>[    1.233829] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input4
>[    1.233875] ACPI: Power Button [PWRF]
>[    1.236554] Setting dangerous option enable_fbc - tainting kernel
>[    1.237314] [drm:i915_dump_device_info] i915 device info: gen=8, pciid=0x1616 rev=0x09 flags=is_mobile,need_gfx_hws,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,
>[    1.237331] [drm:intel_detect_pch] This is Broadwell, assuming LynxPoint LP PCH
>[    1.237399] [drm] Memory usable by graphics device = 4096M
>[    1.237405] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    1.237407] [drm:i915_gem_gtt_init] GTT stolen size = 32M
>[    1.237409] [drm:i915_gem_gtt_init] ppgtt mode: 1
>[    1.237411] [drm] Replacing VGA console driver
>[    1.238331] [drm:intel_opregion_setup] graphic opregion physical addr: 0xac776018
>[    1.238342] [drm:intel_opregion_setup] Public ACPI methods supported
>[    1.238344] [drm:intel_opregion_setup] SWSCI supported
>[    1.244110] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00700483
>[    1.244112] [drm:intel_opregion_setup] ASLE supported
>[    1.244189] i915 0000:00:02.0: irq 43 for MSI/MSI-X
>[    1.244200] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    1.244203] [drm] Driver supports precise vblank timestamp query.
>[    1.244206] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    1.244208] [drm:validate_vbt] Using VBT from OpRegion: $VBT HASWELL        d
>[    1.244211] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    1.244212] [drm:parse_general_definitions] crt_ddc_bus_pin: 2
>[    1.244214] [drm:parse_lfp_panel_data] DRRS supported mode is static
>[    1.244216] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    1.244218] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x8 0xa
>[    1.244220] [drm:parse_lfp_panel_data] VBT initial LVDS value 30033c
>[    1.244222] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 255
>[    1.244224] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[    1.244226] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[    1.244227] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    1.244229] [drm:parse_driver_features] DRRS State Enabled:1
>[    1.244231] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    1.244233] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[    1.244234] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    1.244236] [drm:parse_ddi_port] VBT HDMI level shift for port B: 3
>[    1.244237] [drm:parse_ddi_port] Port C VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0
>[    1.244238] [drm:parse_ddi_port] VBT HDMI level shift for port C: 3
>[    1.244291] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    1.244295] [drm:i915_gem_init_stolen] found 33554432 bytes of stolen memory at ae000000
>[    1.244298] [drm:intel_display_power_get] enabling always-on
>[    1.244299] [drm:intel_display_power_get] enabling display
>[    1.244358] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec)
>[    1.244360] [drm:intel_print_wm_latency] Primary WM1 latency 50 (25.0 usec)
>[    1.244361] [drm:intel_print_wm_latency] Primary WM2 latency 90 (45.0 usec)
>[    1.244363] [drm:intel_print_wm_latency] Primary WM3 latency 130 (65.0 usec)
>[    1.244364] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec)
>[    1.244365] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec)
>[    1.244367] [drm:intel_print_wm_latency] Sprite WM1 latency 50 (25.0 usec)
>[    1.244368] [drm:intel_print_wm_latency] Sprite WM2 latency 90 (45.0 usec)
>[    1.244369] [drm:intel_print_wm_latency] Sprite WM3 latency 130 (65.0 usec)
>[    1.244370] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec)
>[    1.244372] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec)
>[    1.244373] [drm:intel_print_wm_latency] Cursor WM1 latency 50 (25.0 usec)
>[    1.244374] [drm:intel_print_wm_latency] Cursor WM2 latency 90 (45.0 usec)
>[    1.244376] [drm:intel_print_wm_latency] Cursor WM3 latency 130 (65.0 usec)
>[    1.244377] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec)
>[    1.244379] [drm:intel_modeset_init] 3 display pipes available.
>[    1.244392] [drm:intel_ddi_pll_init] CDCLK running at 675000KHz
>[    1.244394] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    1.244702] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[    1.244753] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000
>[    1.244754] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
>[    1.244756] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
>[    1.244757] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
>[    1.244759] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[    1.244839] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    1.244848] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    1.245256] [drm:intel_dp_get_dpcd] DPCD: 11 0a 02 00 00 00 00 00 00 00 00 00 00 00 00
>[    1.245561] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
>[    1.267083] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.267085] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    1.267092] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 937/937
>[    1.267102] [drm:intel_dp_init_connector] Adding DP connector on port B
>[    1.267150] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[    1.271109] [drm:intel_modeset_readout_hw_state] [CRTC:8] hw state readout: enabled
>[    1.271111] [drm:intel_modeset_readout_hw_state] [CRTC:12] hw state readout: disabled
>[    1.271113] [drm:intel_modeset_readout_hw_state] [CRTC:16] hw state readout: disabled
>[    1.271115] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[    1.271117] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[    1.271121] [drm:intel_modeset_readout_hw_state] [ENCODER:18:TMDS-18] hw state readout: enabled, pipe A
>[    1.271123] [drm:intel_modeset_readout_hw_state] [ENCODER:27:TMDS-27] hw state readout: disabled, pipe A
>[    1.271124] [drm:intel_modeset_readout_hw_state] [ENCODER:29:DP MST-29] hw state readout: disabled, pipe A
>[    1.271125] [drm:intel_modeset_readout_hw_state] [ENCODER:30:DP MST-30] hw state readout: disabled, pipe B
>[    1.271127] [drm:intel_modeset_readout_hw_state] [ENCODER:31:DP MST-31] hw state readout: disabled, pipe C
>[    1.271128] [drm:intel_modeset_readout_hw_state] [ENCODER:34:TMDS-34] hw state readout: disabled, pipe A
>[    1.271131] [drm:intel_modeset_readout_hw_state] [CONNECTOR:19:eDP-1] hw state readout: enabled
>[    1.271132] [drm:intel_modeset_readout_hw_state] [CONNECTOR:28:DP-1] hw state readout: disabled
>[    1.271134] [drm:intel_modeset_readout_hw_state] [CONNECTOR:32:HDMI-A-1] hw state readout: disabled
>[    1.271136] [drm:intel_modeset_readout_hw_state] [CONNECTOR:35:HDMI-A-2] hw state readout: disabled
>[    1.271139] [drm:intel_dump_pipe_config] [CRTC:8][setup_hw_state] config for pipe A
>[    1.271140] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.271141] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.271143] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.271145] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    1.271147] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.271148] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.271149] [drm:intel_dump_pipe_config] requested mode:
>[    1.271152] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 1920 0 0 0 1080 0 0 0 0x0 0x0
>[    1.271153] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.271155] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa
>[    1.271157] [drm:intel_dump_crtc_timings] crtc timings: 138779 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x0 flags: 0xa
>[    1.271158] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.271159] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    1.271161] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.271162] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x07800438, enabled
>[    1.271163] [drm:intel_dump_pipe_config] ips: 0
>[    1.271165] [drm:intel_dump_pipe_config] double wide: 0
>[    1.271167] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    1.271170] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    1.271171] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    1.271173] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    1.271175] [drm:intel_dump_pipe_config] [CRTC:12][setup_hw_state] config for pipe B
>[    1.271176] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    1.271177] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    1.271179] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.271180] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.271182] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.271183] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.271184] [drm:intel_dump_pipe_config] requested mode:
>[    1.271186] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.271187] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.271189] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.271191] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    1.271192] [drm:intel_dump_pipe_config] port clock: 0
>[    1.271193] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    1.271194] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.271196] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.271197] [drm:intel_dump_pipe_config] ips: 0
>[    1.271198] [drm:intel_dump_pipe_config] double wide: 0
>[    1.271199] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    1.271202] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    1.271204] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    1.271205] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    1.271207] [drm:intel_dump_pipe_config] [CRTC:16][setup_hw_state] config for pipe C
>[    1.271208] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    1.271209] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    1.271210] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.271212] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.271213] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.271214] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.271215] [drm:intel_dump_pipe_config] requested mode:
>[    1.271217] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.271218] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.271220] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.271222] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    1.271223] [drm:intel_dump_pipe_config] port clock: 0
>[    1.271224] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    1.271226] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.271227] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.271228] [drm:intel_dump_pipe_config] ips: 0
>[    1.271229] [drm:intel_dump_pipe_config] double wide: 0
>[    1.271234] [drm:intel_connector_check_state] [CONNECTOR:19:eDP-1]
>[    1.271237] [drm:check_encoder_state] [ENCODER:18:TMDS-18]
>[    1.271238] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[    1.271240] [drm:check_encoder_state] [ENCODER:29:DP MST-29]
>[    1.271241] [drm:check_encoder_state] [ENCODER:30:DP MST-30]
>[    1.271242] [drm:check_encoder_state] [ENCODER:31:DP MST-31]
>[    1.271243] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[    1.271245] [drm:check_crtc_state] [CRTC:8]
>[    1.271251] [drm:check_crtc_state] [CRTC:12]
>[    1.271252] [drm:check_crtc_state] [CRTC:16]
>[    1.271254] [drm:check_shared_dpll_state] WRPLL 1
>[    1.271255] [drm:check_shared_dpll_state] WRPLL 2
>[    1.271260] [drm:ironlake_get_plane_config] pipe/plane 0/0 with fb: size=1920x1080@32, offset=0, pitch 7680, size 0x7e9000
>[    1.271261] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=7e9000
>[    1.271265] [drm:i915_pages_create_for_stolen] offset=0x0, size=8294400
>[    1.271268] [drm:intel_alloc_plane_obj] plane fb obj ffff880002d54000
>[    1.271271] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 7e9000
>[    1.271272] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [7e9000, fffff000]
>[    1.273908] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    1.273911] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    1.273946] [drm:i915_gem_context_init] HW context support initialized
>[    1.273952] [drm:init_status_page] render ring hws offset: 0x007fb000
>[    1.274011] [drm:intel_init_pipe_control] render ring pipe control offset: 0x0081c000
>[    1.274016] [drm:init_status_page] bsd ring hws offset: 0x0081d000
>[    1.274060] [drm:init_status_page] blitter ring hws offset: 0x0083e000
>[    1.274118] [drm:init_status_page] video enhancement ring hws offset: 0x0085f000
>[    1.274161] [drm:intel_ring_workarounds_emit] Number of Workarounds emitted: 6
>[    1.274311] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    1.274331] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:eDP-1]
>[    1.274334] [drm:intel_dp_detect] [CONNECTOR:19:eDP-1]
>[    1.274350] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.274355] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:eDP-1] probed modes :
>[    1.274359] [drm:drm_mode_debug_printmodeline] Modeline 20:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    1.274363] [drm:drm_mode_debug_printmodeline] Modeline 21:"1920x1080" 40 92520 1920 1966 1996 2080 1080 1082 1086 1112 0x40 0xa
>[    1.274365] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:DP-1]
>[    1.274367] [drm:intel_dp_detect] [CONNECTOR:28:DP-1]
>[    1.274372] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:DP-1] disconnected
>[    1.274374] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:HDMI-A-1]
>[    1.274376] [drm:intel_hdmi_detect] [CONNECTOR:32:HDMI-A-1]
>[    1.274534] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    1.274536] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    1.274538] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:HDMI-A-1] disconnected
>[    1.274541] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[    1.274543] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[    1.274699] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    1.274701] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    1.274703] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[    1.274705] [drm:drm_setup_crtcs] 
>[    1.274708] [drm:drm_enable_connectors] connector 19 enabled? yes
>[    1.274709] [drm:drm_enable_connectors] connector 28 enabled? no
>[    1.274711] [drm:drm_enable_connectors] connector 32 enabled? no
>[    1.274713] [drm:drm_enable_connectors] connector 35 enabled? no
>[    1.274716] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    1.274717] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1
>[    1.274720] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:8]: 1920x1080
>[    1.274722] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    1.274724] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    1.274725] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    1.274728] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 8
>[    1.274730] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    1.274733] [drm:i915_gem_object_create_stolen] creating stolen object: size=7e9000
>[    1.274739] [drm:i915_pages_create_for_stolen] offset=0x7e9000, size=8294400
>[    1.275471] [drm:intelfb_create] allocated 1920x1080 fb: 0x00881000, bo ffff880002ba0000
>[    1.275523] fbcon: inteldrmfb (fb0) is primary device
>[    1.275592] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    1.275594] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[    1.275595] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.275597] [drm:drm_mode_debug_printmodeline] Modeline 37:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    1.275598] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=1
>[    1.275599] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    1.275601] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    1.275603] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    1.275606] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    1.275610] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    1.275611] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    1.275613] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    1.275614] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    1.275614] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.275615] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.275616] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.275618] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    1.275619] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.275619] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.275620] [drm:intel_dump_pipe_config] requested mode:
>[    1.275621] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    1.275622] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.275623] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    1.275625] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    1.275626] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.275626] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    1.275627] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.275628] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.275629] [drm:intel_dump_pipe_config] ips: 1
>[    1.275629] [drm:intel_dump_pipe_config] double wide: 0
>[    1.275643] [drm:intel_edp_backlight_off] 
>[    1.282282] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    1.282353] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input5
>[    1.282470] [drm] Initialized i915 1.6.0 20141121 for 0000:00:02.0 on minor 0
>[    1.373040] usb 1-1: new high-speed USB device number 2 using xhci_hcd
>[    1.475977] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    1.478137] [drm:edp_panel_off] Turn eDP port A panel power off
>[    1.478140] [drm:wait_panel_off] Wait for panel power off time
>[    1.478143] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    1.532947] [drm:wait_panel_status] Wait complete
>[    1.532951] [drm:intel_update_fbc] no output, disabling
>[    1.532954] [drm:intel_display_power_put] disabling display
>[    1.532955] [drm:hsw_set_power_well] Requesting to disable the power well
>[    1.532969] [drm:edp_panel_on] Turn eDP port A panel power on
>[    1.532971] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    1.541158] usb 1-1: New USB device found, idVendor=07a6, idProduct=8515
>[    1.541159] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
>[    1.541160] usb 1-1: Product: USB To LAN Converter
>[    1.541161] usb 1-1: Manufacturer: ADMtek
>[    1.541162] usb 1-1: SerialNumber: 0001
>[    1.541982] pegasus 1-1:1.0: setup Pegasus II specific registers
>[    1.642946] pegasus 1-1:1.0: eth1, ADMtek ADM8515 "Pegasus II" USB-2.0 Ethernet, 00:00:e8:00:05:c8
>[    1.782808] tsc: Refined TSC clocksource calibration: 2294.691 MHz
>[    2.078643] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    2.078644] [drm:wait_panel_status] Wait complete
>[    2.078647] [drm:wait_panel_on] Wait for panel power on
>[    2.078650] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[    2.287528] [drm:wait_panel_status] Wait complete
>[    2.287532] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    2.287538] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    2.288591] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    2.289180] [drm:intel_dp_start_link_train] clock recovery OK
>[    2.290068] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    2.290298] [drm:intel_edp_backlight_on] 
>[    2.290299] [drm:intel_panel_enable_backlight] pipe A
>[    2.290305] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[    2.290310] [drm:intel_psr_enable] PSR not supported by this panel
>[    2.290316] [drm:ironlake_update_primary_plane] Writing base 00881000 00000000 0 0 7680
>[    2.325508] [drm:intel_update_fbc] framebuffer not tiled or fenced, disabling compression
>[    2.325511] [drm:intel_connector_check_state] [CONNECTOR:19:eDP-1]
>[    2.325513] [drm:check_encoder_state] [ENCODER:18:TMDS-18]
>[    2.325515] [drm:check_encoder_state] [ENCODER:27:TMDS-27]
>[    2.325516] [drm:check_encoder_state] [ENCODER:29:DP MST-29]
>[    2.325516] [drm:check_encoder_state] [ENCODER:30:DP MST-30]
>[    2.325517] [drm:check_encoder_state] [ENCODER:31:DP MST-31]
>[    2.325517] [drm:check_encoder_state] [ENCODER:34:TMDS-34]
>[    2.325519] [drm:check_crtc_state] [CRTC:8]
>[    2.325525] [drm:check_crtc_state] [CRTC:12]
>[    2.325525] [drm:check_crtc_state] [CRTC:16]
>[    2.325526] [drm:check_shared_dpll_state] WRPLL 1
>[    2.325527] [drm:check_shared_dpll_state] WRPLL 2
>[    2.325538] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[    2.325540] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[    2.325541] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    2.325543] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.325544] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[    2.325545] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[    2.325545] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    2.325546] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.325551] Console: switching to colour frame buffer device 240x67
>[    2.325558] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    2.325559] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    2.325560] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    2.325561] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.325563] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    2.325565] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    2.325569] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.325570] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    2.325571] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.325572] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    2.325573] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.325573] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.325575] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.325576] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    2.325577] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.325578] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.325578] [drm:intel_dump_pipe_config] requested mode:
>[    2.325580] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.325581] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.325582] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.325584] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    2.325584] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.325585] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.325586] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.325587] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.325588] [drm:intel_dump_pipe_config] ips: 1
>[    2.325588] [drm:intel_dump_pipe_config] double wide: 0
>[    2.333197] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    2.333232] i915 0000:00:02.0: registered panic notifier
>[    2.336862] dracut: Starting plymouth daemon
>[    2.342985] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    2.342988] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    2.342990] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    2.342992] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.342993] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    2.342996] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    2.343001] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.343002] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    2.343003] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.343004] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    2.343005] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.343005] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.343007] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.343008] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    2.343009] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.343010] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.343010] [drm:intel_dump_pipe_config] requested mode:
>[    2.343012] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.343013] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.343015] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.343016] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    2.343017] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.343017] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.343018] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.343019] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.343020] [drm:intel_dump_pipe_config] ips: 1
>[    2.343020] [drm:intel_dump_pipe_config] double wide: 0
>[    2.355689] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    2.355693] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    2.355694] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    2.355696] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.355698] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    2.355701] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    2.355705] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.355706] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    2.355707] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.355708] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    2.355709] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.355709] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.355711] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.355712] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    2.355713] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.355714] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.355714] [drm:intel_dump_pipe_config] requested mode:
>[    2.355716] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.355717] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.355718] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.355720] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    2.355721] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.355721] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.355722] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.355723] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.355724] [drm:intel_dump_pipe_config] ips: 1
>[    2.355724] [drm:intel_dump_pipe_config] double wide: 0
>[    2.419892] EXT4-fs (sda2): INFO: recovery required on readonly filesystem
>[    2.419936] EXT4-fs (sda2): write access will be enabled during recovery
>[    2.453216] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    2.453368] ACPI: AC Adapter [ADP1] (on-line)
>[    2.475655] random: nonblocking pool is initialized
>[    2.489358] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    2.489457] ACPI: Battery Slot [BAT0] (battery present)
>[    2.489552] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    2.489638] ACPI: Battery Slot [BAT1] (battery absent)
>[    2.489782] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    2.489869] ACPI: Battery Slot [BAT2] (battery absent)
>[    2.501317] snd_hda_intel 0000:00:03.0: enabling device (0000 -> 0002)
>[    2.501513] [drm:intel_display_power_get] enabling display
>[    2.501517] [drm:hsw_set_power_well] Enabling power well
>[    2.501551] snd_hda_intel 0000:00:03.0: irq 44 for MSI/MSI-X
>[    2.501604] i801_smbus 0000:00:1f.3: enabling device (0001 -> 0003)
>[    2.501761] ACPI Warning: SystemIO range 0x000000000000efa0-0x000000000000efbf conflicts with OpRegion 0x000000000000efa0-0x000000000000efaf (\_SB_.PCI0.SBUS.SMBI) (20140926/utaddress-258)
>[    2.501906] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    2.505293] input: PC Speaker as /devices/platform/pcspkr/input/input6
>[    2.518303] iTCO_vendor_support: vendor-support=0
>[    2.518529] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[    2.518624] iTCO_wdt: Found a Wildcat Point_LP TCO device (Version=2, TCOBASE=0x1860)
>[    2.519330] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[    2.520214] ppdev: user-space parallel port driver
>[    2.522309] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    2.522312] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    2.522313] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    2.522315] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.522317] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    2.522319] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    2.522324] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.522325] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    2.522326] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.522327] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    2.522328] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.522329] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.522330] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.522332] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    2.522333] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.522333] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.522334] [drm:intel_dump_pipe_config] requested mode:
>[    2.522336] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.522337] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.522338] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    2.522340] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    2.522340] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.522341] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.522342] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.522343] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.522344] [drm:intel_dump_pipe_config] ips: 1
>[    2.522344] [drm:intel_dump_pipe_config] double wide: 0
>[    2.595886] EXT4-fs (sda2): recovery complete
>[    2.597740] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
>[    2.624235] dracut: Checking ext4: /dev/sda2
>[    2.624394] dracut: issuing e2fsck -a  /dev/sda2
>[    2.633183] dracut: /dev/sda2: clean, 1023150/13598720 files, 29811718/54372608 blocks
>[    2.635596] dracut: Remounting /dev/sda2 with -o errors=remount-ro,ro
>[    2.644679] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: errors=remount-ro
>[    2.649839] dracut: Mounted root filesystem /dev/sda2
>[    2.660735] device-mapper: uevent: version 1.0.3
>[    2.662913] device-mapper: ioctl: 4.28.0-ioctl (2014-09-17) initialised: dm-devel@redhat.com
>[    2.721147] dracut: Switching root
>[    2.738271] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[    2.782277] Switched to clocksource tsc
>[    2.786440] init: ureadahead main process (2788) terminated with status 5
>[    3.897494] systemd-udevd[2905]: starting version 204
>[    3.992764] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    3.992768] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    3.992771] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    3.992774] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.992776] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    3.992779] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    3.992785] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    3.992786] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    3.992789] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    3.992791] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    3.992791] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.992793] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    3.992795] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.992797] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    3.992798] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.992799] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.992800] [drm:intel_dump_pipe_config] requested mode:
>[    3.992804] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    3.992804] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.992807] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    3.992810] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    3.992811] [drm:intel_dump_pipe_config] port clock: 270000
>[    3.992812] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    3.992814] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.992815] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.992815] [drm:intel_dump_pipe_config] ips: 1
>[    3.992816] [drm:intel_dump_pipe_config] double wide: 0
>[    4.011528] init: Failed to spawn ufw pre-start process: unable to execute: No such file or directory
>[    4.015475] init: Failed to spawn ufw post-stop process: unable to execute: No such file or directory
>[    4.049920] systemd-udevd[3560]: could not open moddep file '/lib/modules/3.18.0-rc5_drm-intel-next-queued_03b0b6_20141124+/modules.dep.bin'
>[    4.054788] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    4.054792] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    4.054794] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    4.054797] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    4.054799] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    4.054802] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    4.054809] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    4.054810] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    4.054812] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    4.054814] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    4.054815] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    4.054816] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    4.054817] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.054819] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    4.054821] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    4.054822] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    4.054823] [drm:intel_dump_pipe_config] requested mode:
>[    4.054826] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    4.054827] [drm:intel_dump_pipe_config] adjusted mode:
>[    4.054829] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    4.054832] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    4.054833] [drm:intel_dump_pipe_config] port clock: 270000
>[    4.054834] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    4.054835] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    4.054837] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.054838] [drm:intel_dump_pipe_config] ips: 1
>[    4.054838] [drm:intel_dump_pipe_config] double wide: 0
>[    4.064607] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    4.064611] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    4.064613] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    4.064617] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    4.064619] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    4.064622] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    4.064629] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    4.064630] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    4.064632] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    4.064634] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    4.064635] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    4.064636] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    4.064638] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.064639] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    4.064641] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    4.064642] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    4.064643] [drm:intel_dump_pipe_config] requested mode:
>[    4.064647] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    4.064647] [drm:intel_dump_pipe_config] adjusted mode:
>[    4.064650] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    4.064653] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    4.064654] [drm:intel_dump_pipe_config] port clock: 270000
>[    4.064655] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    4.064656] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    4.064658] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.064658] [drm:intel_dump_pipe_config] ips: 1
>[    4.064659] [drm:intel_dump_pipe_config] double wide: 0
>[    4.071088] pegasus 1-1:1.0 eth6: renamed from eth1
>[    4.077856] [drm:i915_gem_open] 
>[    4.077888] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    4.077892] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    4.077893] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    4.077896] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    4.077898] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    4.077901] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    4.077907] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    4.077908] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    4.077911] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    4.077912] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    4.077913] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    4.077914] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    4.077916] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.077918] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    4.077920] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    4.077923] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    4.077924] [drm:intel_dump_pipe_config] requested mode:
>[    4.077928] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    4.077930] [drm:intel_dump_pipe_config] adjusted mode:
>[    4.077933] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    4.077936] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    4.077938] [drm:intel_dump_pipe_config] port clock: 270000
>[    4.077940] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    4.077942] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    4.077944] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.077946] [drm:intel_dump_pipe_config] ips: 1
>[    4.077948] [drm:intel_dump_pipe_config] double wide: 0
>[    4.077950] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[    4.077952] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[    4.077954] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    4.077956] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    4.077958] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[    4.077960] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[    4.077962] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    4.077964] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    4.077976] [drm:i915_gem_open] 
>[    4.078019] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[    4.078024] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[    4.078033] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[    4.078047] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:eDP-1]
>[    4.078049] [drm:intel_dp_detect] [CONNECTOR:19:eDP-1]
>[    4.078060] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    4.078064] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:19:eDP-1] probed modes :
>[    4.078068] [drm:drm_mode_debug_printmodeline] Modeline 20:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    4.078071] [drm:drm_mode_debug_printmodeline] Modeline 21:"1920x1080" 40 92520 1920 1966 1996 2080 1080 1082 1086 1112 0x40 0xa
>[    4.078075] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[    4.087711] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[    4.087717] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:DP-1]
>[    4.087719] [drm:intel_dp_detect] [CONNECTOR:28:DP-1]
>[    4.087728] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:DP-1] disconnected
>[    4.087733] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[    4.087735] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:DP-1]
>[    4.087737] [drm:intel_dp_detect] [CONNECTOR:28:DP-1]
>[    4.087742] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:DP-1] disconnected
>[    4.087747] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    4.087750] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:HDMI-A-1]
>[    4.087752] [drm:intel_hdmi_detect] [CONNECTOR:32:HDMI-A-1]
>[    4.087918] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    4.087921] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    4.087924] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:HDMI-A-1] disconnected
>[    4.087929] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[    4.087931] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:HDMI-A-1]
>[    4.087933] [drm:intel_hdmi_detect] [CONNECTOR:32:HDMI-A-1]
>[    4.088114] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    4.088116] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    4.088118] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:32:HDMI-A-1] disconnected
>[    4.088124] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[    4.088126] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[    4.088128] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[    4.088310] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    4.088312] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    4.088351] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[    4.088355] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[    4.088357] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2]
>[    4.088359] [drm:intel_hdmi_detect] [CONNECTOR:35:HDMI-A-2]
>[    4.088535] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    4.088539] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    4.088563] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:35:HDMI-A-2] disconnected
>[    4.088584] [drm:add_framebuffer_internal] [FB:36]
>[    4.142516] Adding 16440316k swap on /dev/sda3.  Priority:-1 extents:1 across:16440316k SS
>[    4.148962] init: Failed to spawn ufw pre-start process: unable to execute: No such file or directory
>[    4.151275] init: Failed to spawn ufw post-stop process: unable to execute: No such file or directory
>[    4.162554] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro
>[    4.215492] init: Failed to spawn ufw pre-start process: unable to execute: No such file or directory
>[    4.218273] init: Failed to spawn ufw post-stop process: unable to execute: No such file or directory
>[    4.244905] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE
>[    4.247441] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    4.247452] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    4.283757] init: Failed to spawn ufw pre-start process: unable to execute: No such file or directory
>[    4.286906] init: Failed to spawn ufw post-stop process: unable to execute: No such file or directory
>[    4.290831] init: statd-mounting (/lib/modules/3.17.0_drm-intel-nightly_1361e3_20141018+) main process (3692) killed by TERM signal
>[    4.355462] init: idmapd-mounting (/lib/modules/3.17.0_drm-intel-nightly_1361e3_20141018+) main process (3691) killed by TERM signal
>[    4.356240] init: failsafe main process (3886) killed by TERM signal
>[    4.375197] init: Failed to spawn bluetooth main process: unable to execute: No such file or directory
>[    4.385211] init: Failed to spawn ufw pre-start process: unable to execute: No such file or directory
>[    4.392151] init: Failed to spawn ufw post-stop process: unable to execute: No such file or directory
>[    4.777290] e1000e 0000:00:19.0: irq 41 for MSI/MSI-X
>[    4.811711] init: avahi-cups-reload main process (4164) terminated with status 1
>[    4.878152] e1000e 0000:00:19.0: irq 41 for MSI/MSI-X
>[    5.101982] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    5.101988] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    5.101990] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    5.101993] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.101995] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    5.101998] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    5.102003] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    5.102005] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    5.102007] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    5.102009] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    5.102010] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.102011] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    5.102013] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.102015] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    5.102017] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.102018] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.102019] [drm:intel_dump_pipe_config] requested mode:
>[    5.102022] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.102023] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.102025] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.102027] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    5.102028] [drm:intel_dump_pipe_config] port clock: 270000
>[    5.102030] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    5.102031] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.102033] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.102034] [drm:intel_dump_pipe_config] ips: 1
>[    5.102035] [drm:intel_dump_pipe_config] double wide: 0
>[    5.102037] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[    5.102039] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[    5.102041] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    5.102042] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    5.102044] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[    5.102045] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[    5.102047] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    5.102048] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    5.102076] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[    5.102077] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[    5.102078] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[    5.102079] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.102081] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[    5.102082] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[    5.102089] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    5.102090] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[    5.102091] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    5.102092] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[    5.102093] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.102093] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    5.102094] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.102096] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[    5.102097] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.102097] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.102098] [drm:intel_dump_pipe_config] requested mode:
>[    5.102100] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.102100] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.102102] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[    5.102103] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[    5.102104] [drm:intel_dump_pipe_config] port clock: 270000
>[    5.102104] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    5.102105] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.102106] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.102106] [drm:intel_dump_pipe_config] ips: 1
>[    5.102107] [drm:intel_dump_pipe_config] double wide: 0
>[   23.219944] [drm:i915_gem_open] 
>[   23.219986] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   23.219989] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   23.219991] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   23.219994] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   23.219996] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   23.219999] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   23.220005] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   23.220006] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   23.220009] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   23.220010] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   23.220016] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   23.220018] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   23.220020] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   23.220021] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   23.220023] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   23.220025] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   23.220026] [drm:intel_dump_pipe_config] requested mode:
>[   23.220028] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   23.220030] [drm:intel_dump_pipe_config] adjusted mode:
>[   23.220032] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   23.220034] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   23.220035] [drm:intel_dump_pipe_config] port clock: 270000
>[   23.220036] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   23.220038] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   23.220040] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   23.220041] [drm:intel_dump_pipe_config] ips: 1
>[   23.220042] [drm:intel_dump_pipe_config] double wide: 0
>[   23.220044] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[   23.220046] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[   23.220047] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   23.220049] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   23.220051] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[   23.220052] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[   23.220054] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   23.220055] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   23.231518] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   23.231521] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   23.231522] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   23.231524] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   23.231526] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   23.231529] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   23.231533] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   23.231534] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   23.231535] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   23.231536] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   23.231537] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   23.231538] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   23.231539] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   23.231540] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   23.231541] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   23.231542] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   23.231543] [drm:intel_dump_pipe_config] requested mode:
>[   23.231545] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   23.231545] [drm:intel_dump_pipe_config] adjusted mode:
>[   23.231547] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   23.231549] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   23.231549] [drm:intel_dump_pipe_config] port clock: 270000
>[   23.231550] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   23.231551] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   23.231552] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   23.231552] [drm:intel_dump_pipe_config] ips: 1
>[   23.231553] [drm:intel_dump_pipe_config] double wide: 0
>[   23.238934] [drm:i915_gem_open] 
>[   23.238953] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[   23.239348] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[   23.239357] [drm:add_framebuffer_internal] [FB:36]
>[   23.239488] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[   23.239492] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[   23.239597] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   23.239607] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[   23.239742] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[   23.239746] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[   23.239766] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   23.239770] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[   23.239790] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[   23.239793] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[   23.282886] [drm:add_framebuffer_internal] [FB:36]
>[   23.283082] [drm:drm_mode_setcrtc] [CRTC:8]
>[   23.283085] [drm:drm_mode_setcrtc] [CONNECTOR:19:eDP-1]
>[   23.283088] [drm:intel_crtc_set_config] [CRTC:8] [FB:36] #connectors=1 (x y) (0 0)
>[   23.283092] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=1
>[   23.283094] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   23.283097] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   23.283099] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   23.283103] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   23.283108] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   23.283110] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   23.283112] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   23.283113] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   23.283115] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   23.283116] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   23.283118] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   23.283120] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   23.283121] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   23.283123] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   23.283124] [drm:intel_dump_pipe_config] requested mode:
>[   23.283126] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x0 0xa
>[   23.283128] [drm:intel_dump_pipe_config] adjusted mode:
>[   23.283130] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   23.283132] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   23.283133] [drm:intel_dump_pipe_config] port clock: 270000
>[   23.283134] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   23.283136] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   23.283138] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   23.283139] [drm:intel_dump_pipe_config] ips: 1
>[   23.283140] [drm:intel_dump_pipe_config] double wide: 0
>[   23.285793] [drm:ironlake_update_primary_plane] Writing base 00000000 00000000 0 0 7680
>[   23.294888] [drm:i915_setup_compression] reserved 8294400 bytes of contiguous stolen space for FBC
>[   23.294900] [drm:drm_mode_setcrtc] [CRTC:12]
>[   23.294901] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[   23.294903] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[   23.294905] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   23.294907] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   23.294910] [drm:drm_mode_setcrtc] [CRTC:16]
>[   23.294911] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[   23.294913] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[   23.294914] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   23.294916] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   23.344864] [drm:gen7_enable_fbc] enabled fbc on plane A
>[   23.378154] [drm:gen8_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[   29.441976] [drm:i915_gem_open] 
>[   29.473632] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   67.694045] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   67.694047] [drm:intel_set_config_compute_mode_changes] crtc has no fb, will flip
>[   67.694048] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=1
>[   67.694050] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.694052] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   67.694053] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   67.694056] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   67.694061] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   67.694061] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   67.694063] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   67.694064] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   67.694065] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   67.694066] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   67.694067] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   67.694068] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   67.694069] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   67.694070] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   67.694071] [drm:intel_dump_pipe_config] requested mode:
>[   67.694073] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.694073] [drm:intel_dump_pipe_config] adjusted mode:
>[   67.694075] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.694076] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   67.694077] [drm:intel_dump_pipe_config] port clock: 270000
>[   67.694078] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   67.694079] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   67.694080] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   67.694080] [drm:intel_dump_pipe_config] ips: 1
>[   67.694081] [drm:intel_dump_pipe_config] double wide: 0
>[   67.694085] [drm:intel_update_fbc] no output, disabling
>[   67.694086] [drm:intel_update_fbc] unsupported config, disabling FBC
>[   67.694087] [drm:ironlake_disable_fbc] disabled FBC
>[   67.694090] [drm:ironlake_update_primary_plane] Writing base 00881000 00000000 0 0 7680
>[   67.702770] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[   67.702773] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[   67.702774] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.702776] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   67.702777] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[   67.702778] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[   67.702779] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.702781] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   67.702785] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   67.702786] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   67.702787] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.702788] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   67.702789] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   67.702791] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   67.702795] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   67.702796] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   67.702798] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   67.702799] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   67.702799] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   67.702800] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   67.702801] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   67.702803] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   67.702804] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   67.702804] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   67.702805] [drm:intel_dump_pipe_config] requested mode:
>[   67.702807] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.702807] [drm:intel_dump_pipe_config] adjusted mode:
>[   67.702809] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.702811] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   67.702811] [drm:intel_dump_pipe_config] port clock: 270000
>[   67.702812] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   67.702813] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   67.702814] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   67.702814] [drm:intel_dump_pipe_config] ips: 1
>[   67.702815] [drm:intel_dump_pipe_config] double wide: 0
>[   67.702823] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   67.702824] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   67.702825] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.702826] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   67.702827] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   67.702828] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   67.702831] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   67.702832] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   67.702833] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   67.702833] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   67.702834] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   67.702835] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   67.702836] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   67.702837] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   67.702838] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   67.702839] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   67.702839] [drm:intel_dump_pipe_config] requested mode:
>[   67.702841] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.702841] [drm:intel_dump_pipe_config] adjusted mode:
>[   67.702842] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.702844] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   67.702844] [drm:intel_dump_pipe_config] port clock: 270000
>[   67.702845] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   67.702846] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   67.702847] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   67.702847] [drm:intel_dump_pipe_config] ips: 1
>[   67.702848] [drm:intel_dump_pipe_config] double wide: 0
>[   67.710050] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   67.710051] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   67.710052] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.710053] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   67.710054] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   67.710055] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   67.710058] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   67.710058] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   67.710059] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   67.710060] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   67.710061] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   67.710061] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   67.710062] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   67.710063] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   67.710064] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   67.710065] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   67.710065] [drm:intel_dump_pipe_config] requested mode:
>[   67.710067] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.710067] [drm:intel_dump_pipe_config] adjusted mode:
>[   67.710069] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.710070] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   67.710071] [drm:intel_dump_pipe_config] port clock: 270000
>[   67.710071] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   67.710072] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   67.710073] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   67.710074] [drm:intel_dump_pipe_config] ips: 1
>[   67.710074] [drm:intel_dump_pipe_config] double wide: 0
>[   67.719451] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   67.719455] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   67.719457] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.719460] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   67.719462] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   67.719465] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   67.719470] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   67.719472] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   67.719474] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   67.719476] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   67.719477] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   67.719478] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   67.719480] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   67.719482] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   67.719484] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   67.719485] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   67.719486] [drm:intel_dump_pipe_config] requested mode:
>[   67.719489] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.719490] [drm:intel_dump_pipe_config] adjusted mode:
>[   67.719492] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   67.719494] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   67.719496] [drm:intel_dump_pipe_config] port clock: 270000
>[   67.719497] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   67.719499] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   67.719500] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   67.719502] [drm:intel_dump_pipe_config] ips: 1
>[   67.719503] [drm:intel_dump_pipe_config] double wide: 0
>[   67.719505] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[   67.719506] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[   67.719508] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.719510] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   67.719511] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[   67.719513] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[   67.719514] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   67.719516] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   92.585299] pm_rps: executing
>[   92.585396] [drm:i915_gem_open] 
>[   92.585432] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[   92.585436] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[   92.585445] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   92.585449] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   92.585452] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[   92.585457] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[   92.585462] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   92.585464] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[   92.585469] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   92.585471] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[   92.585472] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   92.585474] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   92.585480] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   92.585481] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[   92.585483] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   92.585485] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   92.585486] [drm:intel_dump_pipe_config] requested mode:
>[   92.585495] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   92.585497] [drm:intel_dump_pipe_config] adjusted mode:
>[   92.585499] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[   92.585502] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[   92.585503] [drm:intel_dump_pipe_config] port clock: 270000
>[   92.585504] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   92.585506] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   92.585507] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   92.585508] [drm:intel_dump_pipe_config] ips: 1
>[   92.585510] [drm:intel_dump_pipe_config] double wide: 0
>[   92.585512] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[   92.585519] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[   92.585527] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   92.585532] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   92.585533] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[   92.585535] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[   92.585536] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[   92.585538] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   92.585550] [drm:i915_gem_open] 
>[   92.585758] [drm:i915_gem_open] 
>[   92.585932] pm_rps: starting subtest min-max-config-idle
>[  101.262531] [drm:i915_gem_open] 
>[  101.272281] [drm:i915_gem_open] 
>[  101.272308] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[  103.376639] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  103.376643] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  103.376647] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  103.376649] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  103.376651] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  103.376654] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  103.376658] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  103.376659] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  103.376661] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  103.376662] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  103.376662] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  103.376663] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  103.376664] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  103.376666] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  103.376667] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  103.376668] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  103.376668] [drm:intel_dump_pipe_config] requested mode:
>[  103.376670] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  103.376671] [drm:intel_dump_pipe_config] adjusted mode:
>[  103.376672] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  103.376674] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  103.376675] [drm:intel_dump_pipe_config] port clock: 270000
>[  103.376675] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  103.376676] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  103.376677] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  103.376678] [drm:intel_dump_pipe_config] ips: 1
>[  103.376678] [drm:intel_dump_pipe_config] double wide: 0
>[  103.376680] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[  103.376681] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[  103.376682] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  103.376684] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  103.376684] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[  103.376685] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[  103.376686] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  103.376687] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  106.687819] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  106.687824] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  106.687826] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  106.687828] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  106.687831] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  106.687834] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  106.687839] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  106.687840] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  106.687843] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  106.687844] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  106.687846] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  106.687847] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  106.687849] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  106.687855] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  106.687857] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  106.687858] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  106.687859] [drm:intel_dump_pipe_config] requested mode:
>[  106.687862] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  106.687863] [drm:intel_dump_pipe_config] adjusted mode:
>[  106.687865] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  106.687868] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  106.687869] [drm:intel_dump_pipe_config] port clock: 270000
>[  106.687870] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  106.687872] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  106.687873] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  106.687874] [drm:intel_dump_pipe_config] ips: 1
>[  106.687876] [drm:intel_dump_pipe_config] double wide: 0
>[  106.687878] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[  106.687880] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[  106.687881] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  106.687883] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  106.687884] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[  106.687886] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[  106.687887] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  106.687889] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  109.099382] [drm:i915_gem_open] 
>[  109.099423] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  109.099427] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  109.099429] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  109.099432] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  109.099434] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  109.099437] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  109.099443] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  109.099444] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  109.099447] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  109.099448] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  109.099449] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  109.099451] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  109.099453] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  109.099455] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  109.099456] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  109.099458] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  109.099459] [drm:intel_dump_pipe_config] requested mode:
>[  109.099461] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  109.099463] [drm:intel_dump_pipe_config] adjusted mode:
>[  109.099465] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  109.099467] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  109.099468] [drm:intel_dump_pipe_config] port clock: 270000
>[  109.099470] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  109.099471] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  109.099473] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  109.099474] [drm:intel_dump_pipe_config] ips: 1
>[  109.099475] [drm:intel_dump_pipe_config] double wide: 0
>[  109.099477] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[  109.099479] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[  109.099481] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  109.099483] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  109.099484] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[  109.099486] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[  109.099487] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  109.099489] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  109.101790] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  109.101793] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  109.101794] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  109.101796] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  109.101798] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  109.101801] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  109.101805] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  109.101806] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  109.101808] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  109.101809] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  109.101809] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  109.101810] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  109.101812] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  109.101813] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  109.101814] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  109.101815] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  109.101815] [drm:intel_dump_pipe_config] requested mode:
>[  109.101817] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  109.101818] [drm:intel_dump_pipe_config] adjusted mode:
>[  109.101820] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  109.101821] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  109.101822] [drm:intel_dump_pipe_config] port clock: 270000
>[  109.101822] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  109.101824] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  109.101824] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  109.101825] [drm:intel_dump_pipe_config] ips: 1
>[  109.101826] [drm:intel_dump_pipe_config] double wide: 0
>[  109.109087] [drm:i915_gem_open] 
>[  109.109103] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[  109.109562] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[  109.109574] [drm:add_framebuffer_internal] [FB:36]
>[  109.109723] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[  109.109726] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[6]
>[  109.109796] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[  109.109805] [drm:drm_mode_getconnector] [CONNECTOR:19:?]
>[  109.109937] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[  109.109941] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[  109.109962] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[  109.109965] [drm:drm_mode_getconnector] [CONNECTOR:32:?]
>[  109.109987] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[  109.109990] [drm:drm_mode_getconnector] [CONNECTOR:35:?]
>[  109.141889] [drm:add_framebuffer_internal] [FB:36]
>[  109.142087] [drm:drm_mode_setcrtc] [CRTC:8]
>[  109.142091] [drm:drm_mode_setcrtc] [CONNECTOR:19:eDP-1]
>[  109.142093] [drm:intel_crtc_set_config] [CRTC:8] [FB:36] #connectors=1 (x y) (0 0)
>[  109.142097] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=1
>[  109.142099] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  109.142102] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  109.142104] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  109.142107] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  109.142113] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  109.142114] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  109.142117] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  109.142119] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  109.142120] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  109.142121] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  109.142123] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  109.142125] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  109.142127] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  109.142128] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  109.142129] [drm:intel_dump_pipe_config] requested mode:
>[  109.142132] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x0 0xa
>[  109.142133] [drm:intel_dump_pipe_config] adjusted mode:
>[  109.142135] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  109.142138] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  109.142139] [drm:intel_dump_pipe_config] port clock: 270000
>[  109.142140] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  109.142142] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  109.142143] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  109.142145] [drm:intel_dump_pipe_config] ips: 1
>[  109.142146] [drm:intel_dump_pipe_config] double wide: 0
>[  109.144810] [drm:ironlake_update_primary_plane] Writing base 0108E000 00000000 0 0 7680
>[  109.145676] [drm:i915_setup_compression] reserved 8294400 bytes of contiguous stolen space for FBC
>[  109.145691] [drm:drm_mode_setcrtc] [CRTC:12]
>[  109.145693] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[  109.145695] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[  109.145697] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  109.145699] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  109.145702] [drm:drm_mode_setcrtc] [CRTC:16]
>[  109.145703] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[  109.145705] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[  109.145706] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  109.145708] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  109.195239] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  113.986454] [drm:i915_gem_open] 
>[  114.011295] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[  114.894916] [drm:i915_gem_open] 
>[  114.920422] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[  115.514903] [drm:i915_gem_open] 
>[  115.540517] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[  117.357350] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  117.357353] [drm:intel_set_config_compute_mode_changes] crtc has no fb, will flip
>[  117.357354] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=1
>[  117.357356] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.357358] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  117.357359] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  117.357362] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  117.357366] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  117.357367] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  117.357369] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  117.357370] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  117.357371] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  117.357371] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  117.357373] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  117.357374] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  117.357375] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  117.357376] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  117.357377] [drm:intel_dump_pipe_config] requested mode:
>[  117.357379] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.357379] [drm:intel_dump_pipe_config] adjusted mode:
>[  117.357381] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.357382] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  117.357383] [drm:intel_dump_pipe_config] port clock: 270000
>[  117.357384] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  117.357385] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  117.357386] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  117.357386] [drm:intel_dump_pipe_config] ips: 1
>[  117.357387] [drm:intel_dump_pipe_config] double wide: 0
>[  117.357391] [drm:intel_update_fbc] no output, disabling
>[  117.357392] [drm:intel_update_fbc] unsupported config, disabling FBC
>[  117.357393] [drm:ironlake_disable_fbc] disabled FBC
>[  117.357396] [drm:ironlake_update_primary_plane] Writing base 00881000 00000000 0 0 7680
>[  117.357637] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[  117.357639] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[  117.357640] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.357641] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  117.357642] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[  117.357643] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[  117.357644] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.357645] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  117.357649] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  117.357650] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  117.357651] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.357652] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  117.357653] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  117.357654] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  117.357657] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  117.357658] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  117.357659] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  117.357660] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  117.357660] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  117.357661] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  117.357667] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  117.357668] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  117.357669] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  117.357670] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  117.357670] [drm:intel_dump_pipe_config] requested mode:
>[  117.357672] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.357673] [drm:intel_dump_pipe_config] adjusted mode:
>[  117.357674] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.357676] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  117.357676] [drm:intel_dump_pipe_config] port clock: 270000
>[  117.357677] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  117.357678] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  117.357678] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  117.357679] [drm:intel_dump_pipe_config] ips: 1
>[  117.357679] [drm:intel_dump_pipe_config] double wide: 0
>[  117.357688] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  117.357689] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  117.357689] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.357691] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  117.357691] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  117.357692] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  117.357695] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  117.357696] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  117.357697] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  117.357698] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  117.357698] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  117.357699] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  117.357700] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  117.357701] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  117.357702] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  117.357703] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  117.357703] [drm:intel_dump_pipe_config] requested mode:
>[  117.357705] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.357705] [drm:intel_dump_pipe_config] adjusted mode:
>[  117.357707] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.357708] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  117.357708] [drm:intel_dump_pipe_config] port clock: 270000
>[  117.357709] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  117.357710] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  117.357711] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  117.357711] [drm:intel_dump_pipe_config] ips: 1
>[  117.357712] [drm:intel_dump_pipe_config] double wide: 0
>[  117.364929] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  117.364930] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  117.364931] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.364932] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  117.364933] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  117.364934] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  117.364937] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  117.364938] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  117.364939] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  117.364939] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  117.364940] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  117.364941] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  117.364942] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  117.364943] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  117.364944] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  117.364944] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  117.364945] [drm:intel_dump_pipe_config] requested mode:
>[  117.364946] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.364947] [drm:intel_dump_pipe_config] adjusted mode:
>[  117.364948] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.364950] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  117.364950] [drm:intel_dump_pipe_config] port clock: 270000
>[  117.364951] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  117.364952] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  117.364953] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  117.364953] [drm:intel_dump_pipe_config] ips: 1
>[  117.364954] [drm:intel_dump_pipe_config] double wide: 0
>[  117.374339] [drm:intel_crtc_set_config] [CRTC:8] [FB:38] #connectors=1 (x y) (0 0)
>[  117.374344] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  117.374346] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.374349] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  117.374351] [drm:connected_sink_compute_bpp] [CONNECTOR:19:eDP-1] checking for sink bpp constrains
>[  117.374354] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  117.374360] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  117.374361] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  117.374363] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  117.374365] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe A
>[  117.374366] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  117.374367] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  117.374369] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  117.374371] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  117.374373] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  117.374374] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  117.374376] [drm:intel_dump_pipe_config] requested mode:
>[  117.374378] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.374380] [drm:intel_dump_pipe_config] adjusted mode:
>[  117.374382] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  117.374384] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  117.374385] [drm:intel_dump_pipe_config] port clock: 270000
>[  117.374386] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  117.374388] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  117.374390] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  117.374391] [drm:intel_dump_pipe_config] ips: 1
>[  117.374392] [drm:intel_dump_pipe_config] double wide: 0
>[  117.374394] [drm:intel_crtc_set_config] [CRTC:12] [NOFB]
>[  117.374396] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:12], mode_changed=0, fb_changed=0
>[  117.374397] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.374399] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  117.374401] [drm:intel_crtc_set_config] [CRTC:16] [NOFB]
>[  117.374402] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:16], mode_changed=0, fb_changed=0
>[  117.374404] [drm:intel_modeset_stage_output_state] [CONNECTOR:19:eDP-1] to [CRTC:8]
>[  117.374405] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0

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Attachments on bug 86654: 109923

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