Attachment 110411 Details for Bug 86974 – Gdb output on the assert

Gdb output on the assert

witcher2-gdb.txt (text/plain), 41.84 KB, created by Eero Tamminen on 2014-12-03 13:33:51 UTC

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Creator: Eero Tamminen

Created: 2014-12-03 13:33:51 UTC

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patch

obsolete

>Program received signal SIGABRT, Aborted.
>[Switching to Thread 19179]
>0xf7fd9ca0 in __kernel_vsyscall ()
>(gdb) bt
>#0  0xf7fd9ca0 in __kernel_vsyscall ()
>#1  0xf7959577 in __GI_raise (sig=sig@entry=6) at ../nptl/sysdeps/unix/sysv/linux/raise.c:56
>#2  0xf795acf3 in __GI_abort () at abort.c:89
>#3  0xf79526c7 in __assert_fail_base (fmt=0xf7a8f8d4 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n", assertion=assertion@entry=0xf6c2ccb3 "inst->force_writemask_all", 
>    file=file@entry=0xf6c2c4a4 "../../../../../../src/mesa/drivers/dri/i965/brw_fs_generator.cpp", line=line@entry=1567, 
>    function=function@entry=0xf6c2d140 <fs_generator::generate_code(cfg_t const*, int)::__PRETTY_FUNCTION__> "int fs_generator::generate_code(const cfg_t*, int)")
>    at assert.c:92
>#4  0xf7952777 in __GI___assert_fail (assertion=0xf6c2ccb3 "inst->force_writemask_all", 
>    file=0xf6c2c4a4 "../../../../../../src/mesa/drivers/dri/i965/brw_fs_generator.cpp", line=1567, 
>    function=0xf6c2d140 <fs_generator::generate_code(cfg_t const*, int)::__PRETTY_FUNCTION__> "int fs_generator::generate_code(const cfg_t*, int)") at assert.c:101
>#5  0xf6b144c2 in fs_generator::generate_code (this=0xedffe46c, cfg=0xf4c9b730, dispatch_width=8)
>    at ../../../../../../src/mesa/drivers/dri/i965/brw_fs_generator.cpp:1567
>#6  0xf6af8199 in brw_wm_fs_emit (brw=0xed944068, mem_ctx=0xf4ca1e08, key=0xedfff050, prog_data=0xedffeed4, fp=0xf4c9ede0, prog=0xf4c9ba30, 
>    final_assembly_size=0xedffeed0) at ../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:3723
>#7  0xf6b7629c in do_wm_prog (brw=0xed944068, prog=0xf4c9ba30, fp=0xf4c9ede0, key=0xedfff050) at ../../../../../../src/mesa/drivers/dri/i965/brw_wm.c:187
>#8  0xf6af7281 in brw_fs_precompile (ctx=0xed944068, shader_prog=0xf4c9ba30, prog=0xf4c9ede0) at ../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:3801
>#9  0xf6b4f4bc in brw_shader_precompile (sh_prog=<optimized out>, ctx=<optimized out>) at ../../../../../../src/mesa/drivers/dri/i965/brw_shader.cpp:65
>#10 brw_link_shader (ctx=0xed944068, shProg=0xf4c9ba30) at ../../../../../../src/mesa/drivers/dri/i965/brw_shader.cpp:264
>#11 0xf69f5a1f in _mesa_glsl_link_shader (ctx=0xed944068, prog=0xf4c9ba30) at ../../../src/mesa/program/ir_to_mesa.cpp:3038
>#12 0xf68e6e57 in link_program (ctx=0xed944068, program=<optimized out>) at ../../../src/mesa/main/shaderapi.c:919
>#13 0xf78c1132 in shared_dispatch_stub_509 (program=3) at ./shared-glapi/glapi_mapi_tmp.h:17885
>#14 0x481013ce in ?? ()
>#15 0x480b79f4 in ?? ()
>#16 0x4806c3a2 in ?? ()
>#17 0x480b988c in ?? ()
>#18 0x480b9a1b in ?? ()
>#19 0x4816700c in ?? ()
>#20 0xf7adff16 in start_thread (arg=0xedfffb40) at pthread_create.c:309
>#21 0xf7a169fe in clone () at ../sysdeps/unix/sysv/linux/i386/clone.S:129
>(gdb) up
>#1  0xf7959577 in __GI_raise (sig=sig@entry=6) at ../nptl/sysdeps/unix/sysv/linux/raise.c:56
>56      ../nptl/sysdeps/unix/sysv/linux/raise.c: No such file or directory.
>(gdb) 
>#2  0xf795acf3 in __GI_abort () at abort.c:89
>89      abort.c: No such file or directory.
>(gdb) 
>#3  0xf79526c7 in __assert_fail_base (fmt=0xf7a8f8d4 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n", assertion=assertion@entry=0xf6c2ccb3 "inst->force_writemask_all", 
>    file=file@entry=0xf6c2c4a4 "../../../../../../src/mesa/drivers/dri/i965/brw_fs_generator.cpp", line=line@entry=1567, 
>    function=function@entry=0xf6c2d140 <fs_generator::generate_code(cfg_t const*, int)::__PRETTY_FUNCTION__> "int fs_generator::generate_code(const cfg_t*, int)")
>    at assert.c:92
>92      assert.c: No such file or directory.
>(gdb) 
>#4  0xf7952777 in __GI___assert_fail (assertion=0xf6c2ccb3 "inst->force_writemask_all", 
>    file=0xf6c2c4a4 "../../../../../../src/mesa/drivers/dri/i965/brw_fs_generator.cpp", line=1567, 
>    function=0xf6c2d140 <fs_generator::generate_code(cfg_t const*, int)::__PRETTY_FUNCTION__> "int fs_generator::generate_code(const cfg_t*, int)") at assert.c:101
>101     in assert.c
>(gdb) 
>#5  0xf6b144c2 in fs_generator::generate_code (this=0xedffe46c, cfg=0xf4c9b730, dispatch_width=8)
>    at ../../../../../../src/mesa/drivers/dri/i965/brw_fs_generator.cpp:1567
>1567             assert(inst->force_writemask_all);
>(gdb) info locals
>src = {{type = BRW_REGISTER_TYPE_UD, file = 1, nr = 9, subnr = 8, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {
>        swizzle = 0, writemask = 1, indirect_offset = 0, pad1 = 0}, f = 3,58732407e-43, d = 256, ud = 256}}, {type = BRW_REGISTER_TYPE_UD, file = 3, nr = 0, subnr = 0, 
>    negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 1, writemask = 0, indirect_offset = 0, pad1 = 0}, 
>      f = 1,40129846e-45, d = 1, ud = 1}}, {type = BRW_REGISTER_TYPE_F, file = 1, nr = 4, subnr = 16, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>    address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 1, indirect_offset = 0, pad1 = 0}, f = 3,58732407e-43, d = 256, ud = 256}}}
>dst = {type = BRW_REGISTER_TYPE_D, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {
>      swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}
>inst = 0x16800001
>__PRETTY_FUNCTION__ = "int fs_generator::generate_code(const cfg_t*, int)"
>before_size = 6
>after_size = 4068
>annotation = {mem_ctx = 0x0, ann = 0x0, ann_count = 0, ann_size = 0, cur_block = 0}
>(gdb) print inst->force_writemask_all
>$1 = false
>(gdb) up
>#6  0xf6af8199 in brw_wm_fs_emit (brw=0xed944068, mem_ctx=0xf4ca1e08, key=0xedfff050, prog_data=0xedffeed4, fp=0xf4c9ede0, prog=0xf4c9ba30, 
>    final_assembly_size=0xedffeed0) at ../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:3723
>3723          g.generate_code(simd8_cfg, 8);
>(gdb) info locals
>start_busy = <optimized out>
>start_time = <optimized out>
>v2 = {<backend_visitor> = {<ir_visitor> = {_vptr.ir_visitor = 0xf6d51888 <vtable for fs_visitor+8>}, brw = 0xed944068, ctx = 0xed944068, shader = 0xf4c9d428, 
>    shader_prog = 0xf4c9ba30, prog = 0xf4c9ede0, stage_prog_data = 0xedffeed4, mem_ctx = 0xf4ca1e08, instructions = {head = 0xedffe9a4, tail = 0x0, 
>      tail_pred = 0xedffe9a0}, cfg = 0xf4c9a448, stage = MESA_SHADER_FRAGMENT}, reg_null_f = {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, 
>      reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 5, width = 4, hstride = 1, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>      negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 16 '\020', effective_width = 0 '\000', stride = 1 '\001'}, reg_null_d = {<backend_reg> = {
>      file = HW_REG, type = BRW_REGISTER_TYPE_D, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_D, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, 
>        vstride = 5, width = 4, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>          f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 16 '\020', effective_width = 0 '\000', 
>    stride = 1 '\001'}, reg_null_ud = {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {
>        type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 5, width = 4, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {
>            swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, 
>    reladdr = 0x0, width = 16 '\020', effective_width = 0 '\000', stride = 1 '\001'}, key = 0xedfff050, prog_data = 0xedffeed4, sanity_param_count = 0, 
>  param_size = 0xf4c9e8b0, virtual_grf_sizes = 0xedd56b80, virtual_grf_count = 128, virtual_grf_array_size = 64, virtual_grf_start = 0xedd54658, 
>  virtual_grf_end = 0xf4ca0a48, live_intervals = 0xf4c9b220, regs_live_at_ip = 0x0, uniforms = 0, last_scratch = 0, pull_constant_loc = 0xf4ca1ee8, 
>  push_constant_loc = 0xf4c2bab0, variable_ht = 0xf4c9cc60, frag_depth = {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, 
>      fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, 
>        dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, 
>    reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 1 '\001'}, sample_mask = {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, 
>      reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>    subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 1 '\001'}, outputs = {{<backend_reg> = {file = GRF, 
>        type = BRW_REGISTER_TYPE_F, reg = 7, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, 
>          vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, 
>            ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 16 '\020', effective_width = 0 '\000', stride = 1 '\001'}, 
>    {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, 
>          negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, 
>              pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', 
>      stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, 
>          file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, 
>              indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', 
>      effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {
>          type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {
>            bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, 
>        fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, 
>          dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, 
>      reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, 
>        reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>      subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, 
>        type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, 
>          vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, 
>            ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, 
>    {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, 
>          negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, 
>              pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', 
>      stride = 0 '\000'}}, output_components = {4, 0, 0, 0, 0, 0, 0, 0}, dual_src_output = {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, 
>      reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>    subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 1 '\001'}, do_dual_src = false, first_non_payload_grf = 8, max_grf = 112, 
>  fp_temp_regs = 0xedd13610, fp_input_regs = 0xedd13ad0, current_annotation = 0x0, base_ir = 0x0, failed = false, fail_msg = 0xf7ad5000 "\250\235\032", 
>  simd16_unsupported = false, no16_msg = 0x0, result = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_F, reg = 9, reg_offset = 0, fixed_hw_reg = {
>        type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {
>            swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>    width = 16 '\020', effective_width = 0 '\000', stride = 1 '\001'}, payload = {source_depth_reg = 0 '\000', source_w_reg = 0 '\000', aa_dest_stencil_reg = 0 '\000', 
>    dest_depth_reg = 0 '\000', sample_pos_reg = 0 '\000', sample_mask_in_reg = 0 '\000', barycentric_coord_reg = "\002\000\000\000\000", num_regs = 6 '\006'}, 
>  source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_F, reg = 3, reg_offset = 0, 
>      fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, 
>        dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, 
>    reladdr = 0x0, width = 16 '\020', effective_width = 0 '\000', stride = 1 '\001'}, pixel_y = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_F, reg = 4, 
>      reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>    subreg_offset = 0, reladdr = 0x0, width = 16 '\020', effective_width = 0 '\000', stride = 1 '\001'}, wpos_w = {<backend_reg> = {file = GRF, 
>      type = BRW_REGISTER_TYPE_F, reg = 5, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, 
>---Type <return> to continue, or q <return> to quit---
>        width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>      negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 16 '\020', effective_width = 0 '\000', stride = 1 '\001'}, pixel_w = {<backend_reg> = {
>      file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, 
>        vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>          f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>    stride = 1 '\001'}, delta_x = {{<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, 
>          file = 1, nr = 2, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, 
>              writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, 
>      reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, 
>        reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>        negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {
>        file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, 
>          abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>            f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>      stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, 
>          nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, 
>              indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, 
>        fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, 
>          dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, 
>      subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, 
>        reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>        negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}}, delta_y = {{<backend_reg> = {
>        file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 3, subnr = 0, negate = 0, 
>          abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>            f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>      stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, 
>          nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, 
>              indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, 
>        fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, 
>          dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, 
>      subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, 
>        reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>        negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {
>        file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 1, subnr = 0, negate = 0, 
>          abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>            f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>      stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, 
>          nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, 
>              indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}}, shader_start_time = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_UD, reg = 0, 
>      reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>    subreg_offset = 0, reladdr = 0x0, width = 4 '\004', effective_width = 0 '\000', stride = 0 '\000'}, grf_used = 128, spilled_any_registers = false, 
>  dispatch_width = 16}
>g = {brw = 0xed944068, ctx = 0xed944068, p = 0xedd56fd0, stage = MESA_SHADER_FRAGMENT, key = 0xedfff050, prog_data = 0xedffeed4, shader_prog = 0xf4c9ba30, 
>  prog = 0xf4c9ede0, dispatch_width = 8, discard_halt_patches = {head = 0xedffe494, tail = 0x0, tail_pred = 0xedffe490}, runtime_check_aads_emit = false, 
>  debug_flag = false, mem_ctx = 0xf4ca1e08}
>shader = <optimized out>
>v = {<backend_visitor> = {<ir_visitor> = {_vptr.ir_visitor = 0xf6d51888 <vtable for fs_visitor+8>}, brw = 0xed944068, ctx = 0xed944068, shader = 0xf4c9d428, 
>    shader_prog = 0xf4c9ba30, prog = 0xf4c9ede0, stage_prog_data = 0xedffeed4, mem_ctx = 0xf4ca1e08, instructions = {head = 0xedffe4c8, tail = 0x0, 
>      tail_pred = 0xedffe4c4}, cfg = 0xf4c9b730, stage = MESA_SHADER_FRAGMENT}, reg_null_f = {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, 
>      reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>      negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, reg_null_d = {<backend_reg> = {
>      file = HW_REG, type = BRW_REGISTER_TYPE_D, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_D, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, 
>        vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>          f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>    stride = 1 '\001'}, reg_null_ud = {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {
>        type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {
>            swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, 
>    reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, key = 0xedfff050, prog_data = 0xedffeed4, sanity_param_count = 0, 
>  param_size = 0xf4c9e8b0, virtual_grf_sizes = 0xf4c9fcf0, virtual_grf_count = 128, virtual_grf_array_size = 64, virtual_grf_start = 0xedd54298, 
>---Type <return> to continue, or q <return> to quit---
>  virtual_grf_end = 0xf4ca1e48, live_intervals = 0xf4c9b4d8, regs_live_at_ip = 0x0, uniforms = 0, last_scratch = 0, pull_constant_loc = 0xf4ca1ee8, 
>  push_constant_loc = 0xf4c2bab0, variable_ht = 0xf4c9eb20, frag_depth = {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, 
>      fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, 
>        dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, 
>    reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 1 '\001'}, sample_mask = {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, 
>      reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>    subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 1 '\001'}, outputs = {{<backend_reg> = {file = GRF, 
>        type = BRW_REGISTER_TYPE_F, reg = 7, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, 
>          vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, 
>            ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {
>        file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, 
>          abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, 
>            d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, 
>    {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, 
>          negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, 
>              pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', 
>      stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, 
>          file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, 
>              indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', 
>      effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {
>          type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {
>            bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, 
>        fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, 
>          dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, 
>      reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, 
>        reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>      subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}, {<backend_reg> = {file = BAD_FILE, 
>        type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, 
>          vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, 
>            ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 0 '\000'}}, 
>  output_components = {4, 0, 0, 0, 0, 0, 0, 0}, dual_src_output = {<backend_reg> = {file = BAD_FILE, type = BRW_REGISTER_TYPE_UD, reg = 0, reg_offset = 0, 
>      fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, 
>        dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, 
>    reladdr = 0x0, width = 0 '\000', effective_width = 0 '\000', stride = 1 '\001'}, do_dual_src = false, first_non_payload_grf = 6, max_grf = 112, 
>  fp_temp_regs = 0xf6c16390, fp_input_regs = 0x0, current_annotation = 0x0, base_ir = 0x0, failed = false, fail_msg = 0xedffec38 "", simd16_unsupported = false, 
>  no16_msg = 0x0, result = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_F, reg = 9, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, 
>        nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, 
>            indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', 
>    effective_width = 0 '\000', stride = 1 '\001'}, payload = {source_depth_reg = 0 '\000', source_w_reg = 0 '\000', aa_dest_stencil_reg = 0 '\000', 
>    dest_depth_reg = 0 '\000', sample_pos_reg = 0 '\000', sample_mask_in_reg = 0 '\000', barycentric_coord_reg = "\002\000\000\000\000", num_regs = 4 '\004'}, 
>  source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_F, reg = 3, reg_offset = 0, 
>      fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, address_mode = 0, pad0 = 0, 
>        dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, subreg_offset = 0, 
>    reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, pixel_y = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_F, reg = 4, 
>      reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>    subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, wpos_w = {<backend_reg> = {file = GRF, 
>      type = BRW_REGISTER_TYPE_F, reg = 5, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, 
>        width = 0, hstride = 0, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>      negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, pixel_w = {<backend_reg> = {
>      file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, 
>        vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>          f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>    stride = 1 '\001'}, delta_x = {{<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, 
>          file = 1, nr = 2, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, 
>              writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, 
>      reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, 
>        reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>        negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {
>        file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, 
>          abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>            f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>      stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, 
>---Type <return> to continue, or q <return> to quit---
>          nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, 
>              indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, 
>        fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, 
>          dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, 
>      subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, 
>        reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>        negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}}, delta_y = {{<backend_reg> = {
>        file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 3, subnr = 0, negate = 0, 
>          abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>            f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>      stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, 
>          nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, 
>              indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, 
>        fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, 
>          dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, 
>      subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, 
>        reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, 
>          address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, 
>        negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}, {<backend_reg> = {
>        file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, nr = 1, subnr = 0, negate = 0, 
>          abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, indirect_offset = 0, pad1 = 0}, 
>            f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, width = 8 '\b', effective_width = 0 '\000', 
>      stride = 1 '\001'}, {<backend_reg> = {file = HW_REG, type = BRW_REGISTER_TYPE_F, reg = 0, reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_F, file = 1, 
>          nr = 1, subnr = 0, negate = 0, abs = 0, vstride = 4, width = 3, hstride = 1, address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 228, writemask = 15, 
>              indirect_offset = 0, pad1 = 0}, f = 5,70048215e-42, d = 4068, ud = 4068}}, negate = false, abs = false}, subreg_offset = 0, reladdr = 0x0, 
>      width = 8 '\b', effective_width = 0 '\000', stride = 1 '\001'}}, shader_start_time = {<backend_reg> = {file = GRF, type = BRW_REGISTER_TYPE_UD, reg = 0, 
>      reg_offset = 0, fixed_hw_reg = {type = BRW_REGISTER_TYPE_UD, file = 0, nr = 0, subnr = 0, negate = 0, abs = 0, vstride = 0, width = 0, hstride = 0, 
>        address_mode = 0, pad0 = 0, dw1 = {bits = {swizzle = 0, writemask = 0, indirect_offset = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, negate = false, abs = false}, 
>    subreg_offset = 0, reladdr = 0x0, width = 4 '\004', effective_width = 0 '\000', stride = 0 '\000'}, grf_used = 128, spilled_any_registers = false, 
>  dispatch_width = 8}
>simd16_cfg = <optimized out>
>simd8_cfg = <optimized out>
>no_simd8 = <optimized out>

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Attachments on bug 86974: 110411 | 110413 | 110789

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