Attachment 111884 Details for Bug 88136 – dmesg

dmesg

dmesg_pnv2_kms_flip_0107.txt (text/plain), 127.54 KB, created by lu hua on 2015-01-07 07:13:38 UTC

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Creator: lu hua

Created: 2015-01-07 07:13:38 UTC

Size: 127.54 KB

patch

obsolete

>[   93.460299] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.460305] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.460310] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.460316] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.460321] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.460325] [drm:intel_dump_pipe_config] requested mode:
>[   93.460333] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.460338] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.460346] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.460353] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.460358] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.460363] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.460368] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.460373] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.460378] [drm:intel_dump_pipe_config] ips: 0
>[   93.460382] [drm:intel_dump_pipe_config] double wide: 0
>[   93.462440] [drm:intel_display_power_get] enabling always-on
>[   93.463175] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.463184] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.463192] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.463199] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.463206] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.463213] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.463220] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.463228] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.463235] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.463243] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.463251] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.463274] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   93.463291] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.463300] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.463308] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.463316] [drm:check_crtc_state] [CRTC:18]
>[   93.463324] [drm:check_crtc_state] [CRTC:21]
>[   93.480217] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.480230] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.480242] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.480250] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.480256] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.480263] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.480270] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.480278] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.480290] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.522130] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.522147] [drm:intel_display_power_put] disabling always-on
>[   93.522158] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.522164] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.522169] [drm:check_crtc_state] [CRTC:18]
>[   93.522175] [drm:check_crtc_state] [CRTC:21]
>[   93.522211] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.522222] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.522229] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   93.522235] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.522241] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.522246] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.522251] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.522256] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.522260] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.522266] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.522274] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.522284] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.522289] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.522293] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.522298] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.522304] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.522310] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.522316] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.522320] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.522324] [drm:intel_dump_pipe_config] requested mode:
>[   93.522333] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.522337] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.522345] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.522353] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.522357] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.522362] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.522368] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.522373] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.522377] [drm:intel_dump_pipe_config] ips: 0
>[   93.522381] [drm:intel_dump_pipe_config] double wide: 0
>[   93.524433] [drm:intel_display_power_get] enabling always-on
>[   93.525177] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.525185] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.525193] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.525199] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.525205] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.525213] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.525219] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.525226] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.525232] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.525239] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.525247] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.525272] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   93.525291] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.525299] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.525310] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.525318] [drm:check_crtc_state] [CRTC:18]
>[   93.525326] [drm:check_crtc_state] [CRTC:21]
>[   93.542208] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.542220] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.542233] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.542242] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.542248] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.542255] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.542262] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.542270] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.542282] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.584132] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.584150] [drm:intel_display_power_put] disabling always-on
>[   93.584161] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.584166] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.584173] [drm:check_crtc_state] [CRTC:18]
>[   93.584178] [drm:check_crtc_state] [CRTC:21]
>[   93.584215] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.584226] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.584233] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   93.584239] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.584245] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.584249] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.584255] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.584259] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.584264] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.584270] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.584278] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.584287] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.584293] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.584297] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.584302] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.584308] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.584313] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.584319] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.584324] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.584328] [drm:intel_dump_pipe_config] requested mode:
>[   93.584336] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.584341] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.584349] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.584356] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.584361] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.584366] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.584371] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.584376] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.584381] [drm:intel_dump_pipe_config] ips: 0
>[   93.584385] [drm:intel_dump_pipe_config] double wide: 0
>[   93.586434] [drm:intel_display_power_get] enabling always-on
>[   93.587180] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.587189] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.587198] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.587204] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.587210] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.587220] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.587227] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.587234] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.587240] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.587248] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.587255] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.587280] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   93.587298] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.587306] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.587314] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.587322] [drm:check_crtc_state] [CRTC:18]
>[   93.587329] [drm:check_crtc_state] [CRTC:21]
>[   93.604214] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.604226] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.604238] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.604246] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.604252] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.604260] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.604267] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.604275] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.604287] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.646130] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.646148] [drm:intel_display_power_put] disabling always-on
>[   93.646159] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.646164] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.646170] [drm:check_crtc_state] [CRTC:18]
>[   93.646176] [drm:check_crtc_state] [CRTC:21]
>[   93.646212] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.646223] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.646230] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   93.646236] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.646242] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.646246] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.646252] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.646256] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.646261] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.646267] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.646275] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.646284] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.646290] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.646294] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.646299] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.646305] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.646311] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.646316] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.646321] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.646325] [drm:intel_dump_pipe_config] requested mode:
>[   93.646334] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.646338] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.646346] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.646354] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.646358] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.646363] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.646369] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.646374] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.646378] [drm:intel_dump_pipe_config] ips: 0
>[   93.646382] [drm:intel_dump_pipe_config] double wide: 0
>[   93.648436] [drm:intel_display_power_get] enabling always-on
>[   93.649184] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.649192] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.649200] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.649207] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.649213] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.649220] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.649225] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.649233] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.649239] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.649247] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.649254] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.649279] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   93.649297] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.649306] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.649313] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.649322] [drm:check_crtc_state] [CRTC:18]
>[   93.649329] [drm:check_crtc_state] [CRTC:21]
>[   93.666216] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.666228] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.666241] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.666249] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.666255] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.666262] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.666270] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.666277] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.666289] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.708151] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.708169] [drm:intel_display_power_put] disabling always-on
>[   93.708180] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.708185] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.708192] [drm:check_crtc_state] [CRTC:18]
>[   93.708197] [drm:check_crtc_state] [CRTC:21]
>[   93.708235] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.708246] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.708252] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   93.708258] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.708264] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.708269] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.708274] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.708279] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.708283] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.708289] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.708297] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.708306] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.708312] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.708316] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.708321] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.708327] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.708332] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.708338] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.708343] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.708347] [drm:intel_dump_pipe_config] requested mode:
>[   93.708356] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.708360] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.708368] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.708376] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.708380] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.708385] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.708390] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.708396] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.708400] [drm:intel_dump_pipe_config] ips: 0
>[   93.708404] [drm:intel_dump_pipe_config] double wide: 0
>[   93.710465] [drm:intel_display_power_get] enabling always-on
>[   93.711209] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.711218] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.711227] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.711234] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.711241] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.711249] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.711256] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.711263] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.711271] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.711279] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.711287] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.711310] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   93.711327] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.711335] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.711343] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.711351] [drm:check_crtc_state] [CRTC:18]
>[   93.711358] [drm:check_crtc_state] [CRTC:21]
>[   93.728243] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.728255] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.728268] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.728276] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.728282] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.728289] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.728296] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.728304] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.728316] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.770132] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.770149] [drm:intel_display_power_put] disabling always-on
>[   93.770160] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.770165] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.770172] [drm:check_crtc_state] [CRTC:18]
>[   93.770177] [drm:check_crtc_state] [CRTC:21]
>[   93.770213] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.770224] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.770231] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   93.770237] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.770243] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.770247] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.770253] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.770257] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.770262] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.770268] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.770275] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.770285] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.770290] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.770295] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.770299] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.770305] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.770311] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.770317] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.770322] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.770326] [drm:intel_dump_pipe_config] requested mode:
>[   93.770334] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.770339] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.770347] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.770354] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.770359] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.770364] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.770369] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.770374] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.770379] [drm:intel_dump_pipe_config] ips: 0
>[   93.770383] [drm:intel_dump_pipe_config] double wide: 0
>[   93.773066] [drm:intel_display_power_get] enabling always-on
>[   93.773808] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.773816] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.773825] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.773832] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.773839] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.773847] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.773854] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.773865] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.773872] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.773879] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.773888] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.773911] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   93.773930] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.773937] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.773945] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.773953] [drm:check_crtc_state] [CRTC:18]
>[   93.773960] [drm:check_crtc_state] [CRTC:21]
>[   93.790852] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.790865] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.790878] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.790886] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.790892] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.790900] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.790906] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.790914] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.790926] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.833129] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.833146] [drm:intel_display_power_put] disabling always-on
>[   93.833157] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.833163] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.833169] [drm:check_crtc_state] [CRTC:18]
>[   93.833175] [drm:check_crtc_state] [CRTC:21]
>[   93.833211] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.833223] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.833229] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   93.833235] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.833241] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.833246] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.833251] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.833256] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.833261] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.833267] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.833274] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.833284] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.833289] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.833293] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.833298] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.833304] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.833310] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.833316] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.833320] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.833324] [drm:intel_dump_pipe_config] requested mode:
>[   93.833333] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.833337] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.833345] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.833353] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.833357] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.833362] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.833368] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.833373] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.833377] [drm:intel_dump_pipe_config] ips: 0
>[   93.833381] [drm:intel_dump_pipe_config] double wide: 0
>[   93.835449] [drm:intel_display_power_get] enabling always-on
>[   93.836197] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.836205] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.836213] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.836219] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.836225] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.836232] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.836238] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.836246] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.836252] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.836259] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.836266] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.836291] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   93.836311] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.836320] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.836327] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.836335] [drm:check_crtc_state] [CRTC:18]
>[   93.836342] [drm:check_crtc_state] [CRTC:21]
>[   93.853211] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.853224] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.853236] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.853244] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.853251] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.853258] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.853265] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.853273] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.853286] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.895130] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.895148] [drm:intel_display_power_put] disabling always-on
>[   93.895159] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.895165] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.895171] [drm:check_crtc_state] [CRTC:18]
>[   93.895176] [drm:check_crtc_state] [CRTC:21]
>[   93.895213] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.895224] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.895231] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   93.895237] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.895243] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.895247] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.895253] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.895257] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.895262] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.895268] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.895275] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.895285] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.895290] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.895295] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.895299] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.895306] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.895311] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.895317] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.895322] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.895332] [drm:intel_dump_pipe_config] requested mode:
>[   93.895344] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.895350] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.895362] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.895375] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.895381] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.895387] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.895393] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.895398] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.895402] [drm:intel_dump_pipe_config] ips: 0
>[   93.895406] [drm:intel_dump_pipe_config] double wide: 0
>[   93.897467] [drm:intel_display_power_get] enabling always-on
>[   93.898216] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.898225] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.898234] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.898241] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.898247] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.898255] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.898263] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.898271] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.898277] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.898285] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.898293] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.898317] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   93.898334] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.898342] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.898349] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.898357] [drm:check_crtc_state] [CRTC:18]
>[   93.898365] [drm:check_crtc_state] [CRTC:21]
>[   93.915270] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.915283] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.915295] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.915304] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.915310] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.915317] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.915324] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.915332] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.915344] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.957127] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   93.957144] [drm:intel_display_power_put] disabling always-on
>[   93.957155] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.957161] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.957167] [drm:check_crtc_state] [CRTC:18]
>[   93.957172] [drm:check_crtc_state] [CRTC:21]
>[   93.957207] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.957219] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   93.957225] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   93.957231] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   93.957237] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.957242] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.957247] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   93.957252] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.957257] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   93.957263] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   93.957270] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   93.957279] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   93.957285] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   93.957289] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   93.957294] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   93.957300] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.957306] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   93.957311] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   93.957316] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   93.957320] [drm:intel_dump_pipe_config] requested mode:
>[   93.957329] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.957333] [drm:intel_dump_pipe_config] adjusted mode:
>[   93.957341] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   93.957348] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   93.957353] [drm:intel_dump_pipe_config] port clock: 65000
>[   93.957358] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   93.957363] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   93.957369] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.957373] [drm:intel_dump_pipe_config] ips: 0
>[   93.957377] [drm:intel_dump_pipe_config] double wide: 0
>[   93.959446] [drm:intel_display_power_get] enabling always-on
>[   93.960199] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   93.960207] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   93.960215] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   93.960222] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   93.960228] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   93.960235] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   93.960241] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   93.960248] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   93.960254] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   93.960261] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   93.960268] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   93.960293] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   93.960312] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   93.960320] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   93.960328] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   93.960337] [drm:check_crtc_state] [CRTC:18]
>[   93.960345] [drm:check_crtc_state] [CRTC:21]
>[   93.977240] [drm:drm_mode_setcrtc] [CRTC:21]
>[   93.977253] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   93.977266] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   93.977273] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   93.977279] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   93.977285] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   93.977291] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   93.977299] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   93.977311] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.019132] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.019150] [drm:intel_display_power_put] disabling always-on
>[   94.019160] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.019166] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.019171] [drm:check_crtc_state] [CRTC:18]
>[   94.019177] [drm:check_crtc_state] [CRTC:21]
>[   94.019212] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.019223] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.019230] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.019235] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.019241] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.019246] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.019251] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.019256] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.019261] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.019267] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.019274] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.019284] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.019289] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.019293] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.019298] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.019304] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.019310] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.019316] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.019320] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.019324] [drm:intel_dump_pipe_config] requested mode:
>[   94.019333] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.019337] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.019345] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.019353] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.019357] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.019362] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.019368] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.019373] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.019377] [drm:intel_dump_pipe_config] ips: 0
>[   94.019381] [drm:intel_dump_pipe_config] double wide: 0
>[   94.021451] [drm:intel_display_power_get] enabling always-on
>[   94.022196] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.022204] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.022212] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.022219] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.022225] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.022233] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.022240] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.022248] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.022255] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.022263] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.022271] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.022297] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.022315] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.022323] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.022331] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.022339] [drm:check_crtc_state] [CRTC:18]
>[   94.022347] [drm:check_crtc_state] [CRTC:21]
>[   94.039226] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.039239] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.039252] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.039260] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.039266] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.039274] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.039280] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.039288] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.039300] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.081132] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.081150] [drm:intel_display_power_put] disabling always-on
>[   94.081161] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.081166] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.081172] [drm:check_crtc_state] [CRTC:18]
>[   94.081178] [drm:check_crtc_state] [CRTC:21]
>[   94.081215] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.081226] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.081233] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.081239] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.081245] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.081250] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.081255] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.081260] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.081264] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.081271] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.081278] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.081287] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.081293] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.081297] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.081302] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.081308] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.081314] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.081319] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.081324] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.081328] [drm:intel_dump_pipe_config] requested mode:
>[   94.081337] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.081341] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.081349] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.081356] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.081361] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.081366] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.081371] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.081376] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.081381] [drm:intel_dump_pipe_config] ips: 0
>[   94.081385] [drm:intel_dump_pipe_config] double wide: 0
>[   94.083436] [drm:intel_display_power_get] enabling always-on
>[   94.084187] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.084195] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.084203] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.084210] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.084216] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.084224] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.084230] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.084237] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.084243] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.084250] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.084258] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.084284] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.084303] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.084312] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.084321] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.084330] [drm:check_crtc_state] [CRTC:18]
>[   94.084337] [drm:check_crtc_state] [CRTC:21]
>[   94.101206] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.101219] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.101231] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.101239] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.101246] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.101253] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.101260] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.101268] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.101280] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.143134] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.143152] [drm:intel_display_power_put] disabling always-on
>[   94.143163] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.143169] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.143174] [drm:check_crtc_state] [CRTC:18]
>[   94.143180] [drm:check_crtc_state] [CRTC:21]
>[   94.143216] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.143228] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.143235] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.143241] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.143248] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.143254] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.143261] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.143267] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.143274] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.143283] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.143296] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.143309] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.143315] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.143319] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.143324] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.143330] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.143335] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.143341] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.143346] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.143350] [drm:intel_dump_pipe_config] requested mode:
>[   94.143359] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.143363] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.143371] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.143379] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.143383] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.143388] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.143393] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.143399] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.143403] [drm:intel_dump_pipe_config] ips: 0
>[   94.143407] [drm:intel_dump_pipe_config] double wide: 0
>[   94.145463] [drm:intel_display_power_get] enabling always-on
>[   94.146211] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.146220] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.146228] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.146236] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.146242] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.146251] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.146257] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.146264] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.146273] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.146280] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.146288] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.146316] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.146334] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.146343] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.146350] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.146358] [drm:check_crtc_state] [CRTC:18]
>[   94.146366] [drm:check_crtc_state] [CRTC:21]
>[   94.163271] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.163283] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.163296] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.163305] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.163310] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.163317] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.163323] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.163332] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.163343] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.205126] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.205144] [drm:intel_display_power_put] disabling always-on
>[   94.205154] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.205159] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.205166] [drm:check_crtc_state] [CRTC:18]
>[   94.205171] [drm:check_crtc_state] [CRTC:21]
>[   94.205207] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.205218] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.205225] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.205231] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.205237] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.205241] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.205247] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.205251] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.205256] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.205262] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.205269] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.205279] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.205285] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.205289] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.205293] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.205300] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.205305] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.205311] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.205316] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.205320] [drm:intel_dump_pipe_config] requested mode:
>[   94.205328] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.205333] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.205341] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.205349] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.205353] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.205358] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.205363] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.205369] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.205373] [drm:intel_dump_pipe_config] ips: 0
>[   94.205377] [drm:intel_dump_pipe_config] double wide: 0
>[   94.207438] [drm:intel_display_power_get] enabling always-on
>[   94.208182] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.208191] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.208199] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.208206] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.208212] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.208220] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.208226] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.208233] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.208239] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.208246] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.208254] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.208278] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.208297] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.208307] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.208314] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.208325] [drm:check_crtc_state] [CRTC:18]
>[   94.208334] [drm:check_crtc_state] [CRTC:21]
>[   94.225212] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.225224] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.225236] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.225245] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.225252] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.225259] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.225265] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.225274] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.225286] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.267074] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.267092] [drm:intel_display_power_put] disabling always-on
>[   94.267103] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.267109] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.267115] [drm:check_crtc_state] [CRTC:18]
>[   94.267120] [drm:check_crtc_state] [CRTC:21]
>[   94.267157] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.267169] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.267175] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.267181] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.267187] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.267192] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.267197] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.267202] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.267207] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.267213] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.267220] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.267229] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.267235] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.267239] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.267244] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.267250] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.267256] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.267261] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.267266] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.267270] [drm:intel_dump_pipe_config] requested mode:
>[   94.267279] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.267283] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.267291] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.267299] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.267303] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.267308] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.267313] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.267319] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.267323] [drm:intel_dump_pipe_config] ips: 0
>[   94.267327] [drm:intel_dump_pipe_config] double wide: 0
>[   94.269371] [drm:intel_display_power_get] enabling always-on
>[   94.270151] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.270160] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.270167] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.270174] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.270186] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.270201] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.270208] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.270215] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.270222] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.270230] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.270237] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.270262] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.270281] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.270291] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.270299] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.270307] [drm:check_crtc_state] [CRTC:18]
>[   94.270316] [drm:check_crtc_state] [CRTC:21]
>[   94.287203] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.287216] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.287228] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.287237] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.287243] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.287251] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.287258] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.287267] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.287280] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.329128] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.329147] [drm:intel_display_power_put] disabling always-on
>[   94.329157] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.329163] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.329169] [drm:check_crtc_state] [CRTC:18]
>[   94.329174] [drm:check_crtc_state] [CRTC:21]
>[   94.329213] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.329224] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.329231] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.329237] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.329243] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.329248] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.329253] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.329258] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.329262] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.329268] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.329276] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.329285] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.329291] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.329295] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.329300] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.329306] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.329311] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.329317] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.329322] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.329326] [drm:intel_dump_pipe_config] requested mode:
>[   94.329335] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.329339] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.329347] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.329354] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.329359] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.329364] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.329369] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.329374] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.329379] [drm:intel_dump_pipe_config] ips: 0
>[   94.329383] [drm:intel_dump_pipe_config] double wide: 0
>[   94.331450] [drm:intel_display_power_get] enabling always-on
>[   94.332196] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.332204] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.332212] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.332218] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.332225] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.332232] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.332239] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.332246] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.332253] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.332261] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.332268] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.332294] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.332313] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.332322] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.332330] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.332338] [drm:check_crtc_state] [CRTC:18]
>[   94.332346] [drm:check_crtc_state] [CRTC:21]
>[   94.349225] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.349238] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.349250] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.349259] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.349265] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.349272] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.349278] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.349286] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.349298] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.391072] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.391089] [drm:intel_display_power_put] disabling always-on
>[   94.391100] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.391106] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.391111] [drm:check_crtc_state] [CRTC:18]
>[   94.391117] [drm:check_crtc_state] [CRTC:21]
>[   94.391153] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.391164] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.391171] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.391177] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.391183] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.391188] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.391193] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.391198] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.391203] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.391209] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.391216] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.391226] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.391231] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.391236] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.391240] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.391246] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.391252] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.391258] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.391263] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.391266] [drm:intel_dump_pipe_config] requested mode:
>[   94.391275] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.391279] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.391287] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.391295] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.391300] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.391304] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.391310] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.391315] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.391319] [drm:intel_dump_pipe_config] ips: 0
>[   94.391324] [drm:intel_dump_pipe_config] double wide: 0
>[   94.393354] [drm:intel_display_power_get] enabling always-on
>[   94.394133] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.394141] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.394156] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.394163] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.394170] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.394178] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.394185] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.394192] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.394199] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.394208] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.394216] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.394242] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.394260] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.394270] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.394279] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.394288] [drm:check_crtc_state] [CRTC:18]
>[   94.394296] [drm:check_crtc_state] [CRTC:21]
>[   94.411173] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.411186] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.411199] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.411207] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.411214] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.411220] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.411227] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.411235] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.411246] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.453124] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.453142] [drm:intel_display_power_put] disabling always-on
>[   94.453153] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.453158] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.453164] [drm:check_crtc_state] [CRTC:18]
>[   94.453170] [drm:check_crtc_state] [CRTC:21]
>[   94.453206] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.453216] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.453223] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.453229] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.453235] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.453240] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.453245] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.453250] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.453254] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.453261] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.453268] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.453277] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.453283] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.453287] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.453292] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.453298] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.453304] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.453309] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.453314] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.453318] [drm:intel_dump_pipe_config] requested mode:
>[   94.453327] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.453331] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.453339] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.453347] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.453351] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.453356] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.453361] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.453367] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.453371] [drm:intel_dump_pipe_config] ips: 0
>[   94.453375] [drm:intel_dump_pipe_config] double wide: 0
>[   94.455440] [drm:intel_display_power_get] enabling always-on
>[   94.456190] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.456199] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.456207] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.456213] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.456220] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.456227] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.456233] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.456240] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.456247] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.456254] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.456261] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.456285] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.456303] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.456312] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.456320] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.456329] [drm:check_crtc_state] [CRTC:18]
>[   94.456337] [drm:check_crtc_state] [CRTC:21]
>[   94.473217] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.473230] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.473242] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.473251] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.473257] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.473264] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.473271] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.473279] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.473290] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.515071] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.515089] [drm:intel_display_power_put] disabling always-on
>[   94.515100] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.515105] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.515111] [drm:check_crtc_state] [CRTC:18]
>[   94.515117] [drm:check_crtc_state] [CRTC:21]
>[   94.515155] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.515167] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.515173] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.515179] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.515185] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.515190] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.515195] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.515200] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.515204] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.515211] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.515218] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.515227] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.515233] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.515237] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.515242] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.515248] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.515254] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.515259] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.515264] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.515268] [drm:intel_dump_pipe_config] requested mode:
>[   94.515277] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.515281] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.515289] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.515297] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.515301] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.515306] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.515311] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.515317] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.515321] [drm:intel_dump_pipe_config] ips: 0
>[   94.515325] [drm:intel_dump_pipe_config] double wide: 0
>[   94.517360] [drm:intel_display_power_get] enabling always-on
>[   94.518141] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.518150] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.518158] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.518164] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.518170] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.518177] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.518183] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.518190] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.518196] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.518204] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.518211] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.518236] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.518255] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.518265] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.518273] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.518281] [drm:check_crtc_state] [CRTC:18]
>[   94.518291] [drm:check_crtc_state] [CRTC:21]
>[   94.535170] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.535183] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.535195] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.535203] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.535209] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.535216] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.535224] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.535232] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.535244] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.577126] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.577144] [drm:intel_display_power_put] disabling always-on
>[   94.577155] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.577160] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.577166] [drm:check_crtc_state] [CRTC:18]
>[   94.577172] [drm:check_crtc_state] [CRTC:21]
>[   94.577207] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.577219] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.577226] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.577232] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.577238] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.577242] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.577248] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.577252] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.577257] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.577263] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.577271] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.577280] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.577286] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.577290] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.577295] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.577301] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.577307] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.577312] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.577317] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.577321] [drm:intel_dump_pipe_config] requested mode:
>[   94.577330] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.577334] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.577342] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.577350] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.577354] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.577359] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.577364] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.577370] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.577374] [drm:intel_dump_pipe_config] ips: 0
>[   94.577378] [drm:intel_dump_pipe_config] double wide: 0
>[   94.579444] [drm:intel_display_power_get] enabling always-on
>[   94.580195] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.580204] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.580212] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.580218] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.580224] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.580231] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.580237] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.580244] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.580250] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.580257] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.580264] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.580290] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.580309] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.580317] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.580324] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.580333] [drm:check_crtc_state] [CRTC:18]
>[   94.580341] [drm:check_crtc_state] [CRTC:21]
>[   94.597220] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.597233] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.597245] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.597253] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.597260] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.597267] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.597273] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.597281] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.597293] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.639074] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.639091] [drm:intel_display_power_put] disabling always-on
>[   94.639102] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.639108] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.639114] [drm:check_crtc_state] [CRTC:18]
>[   94.639119] [drm:check_crtc_state] [CRTC:21]
>[   94.639155] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.639167] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.639173] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.639179] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.639185] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.639190] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.639195] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.639200] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.639205] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.639211] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.639219] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.639228] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.639233] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.639238] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.639242] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.639249] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.639254] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.639260] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.639265] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.639269] [drm:intel_dump_pipe_config] requested mode:
>[   94.639277] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.639281] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.639290] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.639297] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.639302] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.639306] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.639312] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.639317] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.639322] [drm:intel_dump_pipe_config] ips: 0
>[   94.639326] [drm:intel_dump_pipe_config] double wide: 0
>[   94.641357] [drm:intel_display_power_get] enabling always-on
>[   94.642137] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.642149] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.642157] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.642164] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.642170] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.642178] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.642185] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.642193] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.642200] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.642208] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.642216] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.642242] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.642269] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.642280] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.642288] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.642297] [drm:check_crtc_state] [CRTC:18]
>[   94.642305] [drm:check_crtc_state] [CRTC:21]
>[   94.659173] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.659186] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.659198] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.659206] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.659212] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.659219] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.659227] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.659234] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.659246] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.701071] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.701088] [drm:intel_display_power_put] disabling always-on
>[   94.701099] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.701104] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.701110] [drm:check_crtc_state] [CRTC:18]
>[   94.701116] [drm:check_crtc_state] [CRTC:21]
>[   94.701152] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.701163] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.701170] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.701176] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.701182] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.701187] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.701192] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.701197] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.701201] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.701208] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.701215] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.701224] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.701230] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.701234] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.701239] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.701245] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.701251] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.701256] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.701261] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.701265] [drm:intel_dump_pipe_config] requested mode:
>[   94.701274] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.701278] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.701286] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.701293] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.701298] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.701303] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.701308] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.701313] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.701318] [drm:intel_dump_pipe_config] ips: 0
>[   94.701322] [drm:intel_dump_pipe_config] double wide: 0
>[   94.703356] [drm:intel_display_power_get] enabling always-on
>[   94.704147] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.704175] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.704185] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.704192] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.704199] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.704207] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.704213] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.704220] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.704226] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.704233] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.704240] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.704267] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.704286] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.704294] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.704302] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.704311] [drm:check_crtc_state] [CRTC:18]
>[   94.704318] [drm:check_crtc_state] [CRTC:21]
>[   94.721196] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.721208] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.721220] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.721228] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.721235] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.721242] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.721249] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.721257] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.721269] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.763126] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.763143] [drm:intel_display_power_put] disabling always-on
>[   94.763154] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.763160] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.763165] [drm:check_crtc_state] [CRTC:18]
>[   94.763171] [drm:check_crtc_state] [CRTC:21]
>[   94.763207] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.763219] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.763225] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.763231] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.763237] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.763242] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.763247] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.763252] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.763256] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.763263] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.763270] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.763279] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.763285] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.763289] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.763294] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.763300] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.763306] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.763311] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.763316] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.763320] [drm:intel_dump_pipe_config] requested mode:
>[   94.763329] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.763333] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.763341] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.763348] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.763353] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.763358] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.763363] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.763369] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.763373] [drm:intel_dump_pipe_config] ips: 0
>[   94.763377] [drm:intel_dump_pipe_config] double wide: 0
>[   94.765445] [drm:intel_display_power_get] enabling always-on
>[   94.766192] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.766201] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.766210] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.766216] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.766225] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.766232] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.766239] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.766246] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.766253] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.766260] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.766268] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.766292] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.766310] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.766318] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.766325] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.766333] [drm:check_crtc_state] [CRTC:18]
>[   94.766341] [drm:check_crtc_state] [CRTC:21]
>[   94.783230] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.783243] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.783255] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.783264] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.783270] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.783277] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.783284] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.783292] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.783303] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.825071] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.825089] [drm:intel_display_power_put] disabling always-on
>[   94.825100] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.825105] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.825111] [drm:check_crtc_state] [CRTC:18]
>[   94.825117] [drm:check_crtc_state] [CRTC:21]
>[   94.825153] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.825165] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.825171] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.825177] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.825183] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.825188] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.825193] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.825198] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.825203] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.825209] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.825216] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.825226] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.825231] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.825235] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.825240] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.825246] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.825252] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.825258] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.825262] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.825266] [drm:intel_dump_pipe_config] requested mode:
>[   94.825275] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.825279] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.825287] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.825295] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.825300] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.825304] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.825310] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.825315] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.825319] [drm:intel_dump_pipe_config] ips: 0
>[   94.825324] [drm:intel_dump_pipe_config] double wide: 0
>[   94.827357] [drm:intel_display_power_get] enabling always-on
>[   94.828147] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.828156] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.828164] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.828180] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.828186] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.828194] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.828201] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.828208] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.828215] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.828223] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.828231] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.828257] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.828276] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.828286] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.828294] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.828303] [drm:check_crtc_state] [CRTC:18]
>[   94.828311] [drm:check_crtc_state] [CRTC:21]
>[   94.845184] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.845197] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.845209] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.845217] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.845224] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.845231] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.845238] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.845246] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.845258] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.887071] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.887089] [drm:intel_display_power_put] disabling always-on
>[   94.887100] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.887105] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.887111] [drm:check_crtc_state] [CRTC:18]
>[   94.887117] [drm:check_crtc_state] [CRTC:21]
>[   94.887153] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.887164] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.887171] [drm:intel_crtc_set_config] [CRTC:21] [FB:38] #connectors=1 (x y) (0 0)
>[   94.887177] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.887183] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.887188] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.887193] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.887198] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.887203] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.887209] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.887216] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.887226] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.887231] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.887235] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.887240] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.887246] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.887252] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.887257] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.887262] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.887266] [drm:intel_dump_pipe_config] requested mode:
>[   94.887275] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.887279] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.887287] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.887295] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.887300] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.887304] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.887310] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.887315] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.887319] [drm:intel_dump_pipe_config] ips: 0
>[   94.887324] [drm:intel_dump_pipe_config] double wide: 0
>[   94.891458] [drm:intel_display_power_get] enabling always-on
>[   94.893293] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.893302] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.893311] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.893317] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.893324] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.893332] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.893339] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.893347] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.893353] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.893363] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.893371] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.893398] [drm:i9xx_update_primary_plane] Writing base 003C0000 00000000 0 0 4096
>[   94.893416] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.893424] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.893432] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.893440] [drm:check_crtc_state] [CRTC:18]
>[   94.893447] [drm:check_crtc_state] [CRTC:21]
>[   94.910300] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.910312] [drm:intel_crtc_set_config] [CRTC:21] [NOFB]
>[   94.910323] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.910330] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.910336] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.910343] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.910350] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   94.910356] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   94.910365] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.952082] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.952100] [drm:intel_display_power_put] disabling always-on
>[   94.952111] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.952116] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.952123] [drm:check_crtc_state] [CRTC:18]
>[   94.952128] [drm:check_crtc_state] [CRTC:21]
>[   94.952167] [drm:drm_mode_setcrtc] [CRTC:21]
>[   94.952177] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[   94.952184] [drm:intel_crtc_set_config] [CRTC:21] [FB:37] #connectors=1 (x y) (0 0)
>[   94.952190] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   94.952196] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=0
>[   94.952200] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.952206] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.952210] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.952215] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   94.952221] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.952229] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   94.952238] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   94.952243] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.952247] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.952252] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   94.952258] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.952264] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.952270] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.952274] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.952278] [drm:intel_dump_pipe_config] requested mode:
>[   94.952287] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.952291] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.952300] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.952307] [drm:intel_dump_crtc_timings] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[   94.952312] [drm:intel_dump_pipe_config] port clock: 65000
>[   94.952316] [drm:intel_dump_pipe_config] pipe src size: 1024x768
>[   94.952322] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   94.952327] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.952331] [drm:intel_dump_pipe_config] ips: 0
>[   94.952336] [drm:intel_dump_pipe_config] double wide: 0
>[   94.955921] [drm:intel_display_power_get] enabling always-on
>[   94.956666] [drm:intel_calculate_wm] FIFO entries required for mode: 14
>[   94.956675] [drm:intel_calculate_wm] FIFO watermark level: 488
>[   94.956683] [drm:pineview_update_wm] DSPFW1 register is f4030f0f
>[   94.956690] [drm:intel_calculate_wm] FIFO entries required for mode: 16
>[   94.956696] [drm:intel_calculate_wm] FIFO watermark level: 491
>[   94.956703] [drm:intel_calculate_wm] FIFO entries required for mode: 136
>[   94.956710] [drm:intel_calculate_wm] FIFO watermark level: 366
>[   94.956717] [drm:intel_calculate_wm] FIFO entries required for mode: 138
>[   94.956723] [drm:intel_calculate_wm] FIFO watermark level: 369
>[   94.956730] [drm:pineview_update_wm] DSPFW3 register is 3f3f016e
>[   94.956737] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   94.956763] [drm:i9xx_update_primary_plane] Writing base 01000000 00000000 0 0 4096
>[   94.956783] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[   94.956793] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   94.956803] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   94.956812] [drm:check_crtc_state] [CRTC:18]
>[   94.956821] [drm:check_crtc_state] [CRTC:21]
>[   94.958798] kms_flip: exiting, ret=99
>[   94.958989] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   94.958997] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   94.959002] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:21]
>[   94.959046] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   94.959054] [drm:intel_crtc_set_config] [CRTC:21] [FB:32] #connectors=1 (x y) (0 0)
>[   94.959059] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[   94.959069] [drm:drm_mode_debug_printmodeline] Modeline 40:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   94.959077] [drm:drm_mode_debug_printmodeline] Modeline 31:"1024x600" 60 45000 1024 1072 1104 1200 600 603 609 625 0x48 0xa
>[   94.959082] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=1, fb_changed=1
>[   94.959085] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.959088] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[   94.959091] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   94.959095] [drm:intel_modeset_stage_output_state] [CONNECTOR:22:LVDS-1] to [CRTC:21]
>[   94.959098] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.959101] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   94.959106] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   94.959114] [drm:connected_sink_compute_bpp] [CONNECTOR:22:LVDS-1] checking for sink bpp constrains
>[   94.959120] [drm:intel_lvds_compute_config] forcing display bpp (was 24) to LVDS (18)
>[   94.959130] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   94.959134] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   94.959140] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   94.959143] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   94.959148] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.959153] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   94.959158] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   94.959161] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   94.959163] [drm:intel_dump_pipe_config] requested mode:
>[   94.959172] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x600" 60 45000 1024 1072 1104 1200 600 603 609 625 0x48 0xa
>[   94.959174] [drm:intel_dump_pipe_config] adjusted mode:
>[   94.959183] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x600" 60 45000 1024 1072 1104 1200 600 603 609 625 0x48 0xa
>[   94.959190] [drm:intel_dump_crtc_timings] crtc timings: 45000 1024 1072 1104 1200 600 603 609 625, type: 0x48 flags: 0xa
>[   94.959193] [drm:intel_dump_pipe_config] port clock: 45000
>[   94.959197] [drm:intel_dump_pipe_config] pipe src size: 1024x600
>[   94.959201] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000008, ratios: 0x00000000, lvds border: 0x00000000
>[   94.959205] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.959208] [drm:intel_dump_pipe_config] ips: 0
>[   94.959211] [drm:intel_dump_pipe_config] double wide: 0
>[   94.959217] [drm:i9xx_get_refclk] using SSC reference clock of 100000 kHz
>[   94.961487] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.999127] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[   94.999850] [drm:intel_calculate_wm] FIFO entries required for mode: 10
>[   94.999853] [drm:intel_calculate_wm] FIFO watermark level: 492
>[   94.999856] [drm:pineview_update_wm] DSPFW1 register is f6030f0f
>[   94.999858] [drm:intel_calculate_wm] FIFO entries required for mode: 12
>[   94.999860] [drm:intel_calculate_wm] FIFO watermark level: 495
>[   94.999863] [drm:intel_calculate_wm] FIFO entries required for mode: 95
>[   94.999865] [drm:intel_calculate_wm] FIFO watermark level: 407
>[   94.999868] [drm:intel_calculate_wm] FIFO entries required for mode: 96
>[   94.999870] [drm:intel_calculate_wm] FIFO watermark level: 411
>[   94.999873] [drm:pineview_update_wm] DSPFW3 register is 3f3f0197
>[   94.999875] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[   95.001126] [drm:i9xx_update_primary_plane] Writing base 00160000 00000000 0 0 4096
>[   95.001135] [drm:intel_connector_check_state] [CONNECTOR:22:LVDS-1]
>[   95.001140] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[   95.001142] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[   95.001146] [drm:check_crtc_state] [CRTC:18]
>[   95.001149] [drm:check_crtc_state] [CRTC:21]
>[   95.019345] [drm:intel_crtc_set_config] [CRTC:18] [NOFB]
>[   95.019357] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:18], mode_changed=0, fb_changed=0
>[   95.019364] [drm:intel_modeset_stage_output_state] [CONNECTOR:22:LVDS-1] to [CRTC:21]
>[   95.019371] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   95.019379] [drm:intel_crtc_set_config] [CRTC:21] [FB:32] #connectors=1 (x y) (0 0)
>[   95.019386] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:21], mode_changed=0, fb_changed=0
>[   95.019391] [drm:intel_modeset_stage_output_state] [CONNECTOR:22:LVDS-1] to [CRTC:21]
>[   95.019397] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   95.019405] [drm:connected_sink_compute_bpp] [CONNECTOR:22:LVDS-1] checking for sink bpp constrains
>[   95.019411] [drm:intel_lvds_compute_config] forcing display bpp (was 24) to LVDS (18)
>[   95.019421] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   95.019427] [drm:intel_dump_pipe_config] [CRTC:21][modeset] config for pipe B
>[   95.019431] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   95.019436] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   95.019442] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   95.019447] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   95.019453] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   95.019458] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   95.019462] [drm:intel_dump_pipe_config] requested mode:
>[   95.019470] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x600" 60 45000 1024 1072 1104 1200 600 603 609 625 0x48 0xa
>[   95.019475] [drm:intel_dump_pipe_config] adjusted mode:
>[   95.019483] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x600" 60 45000 1024 1072 1104 1200 600 603 609 625 0x48 0xa
>[   95.019490] [drm:intel_dump_crtc_timings] crtc timings: 45000 1024 1072 1104 1200 600 603 609 625, type: 0x48 flags: 0xa
>[   95.019495] [drm:intel_dump_pipe_config] port clock: 45000
>[   95.019500] [drm:intel_dump_pipe_config] pipe src size: 1024x600
>[   95.019505] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000008, ratios: 0x00000000, lvds border: 0x00000000
>[   95.019510] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   95.019515] [drm:intel_dump_pipe_config] ips: 0
>[   95.019519] [drm:intel_dump_pipe_config] double wide: 0
>[  695.263143] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  695.545117] [drm:i9xx_pfit_disable] disabling pfit, current: 0x00000008
>[  695.545125] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  695.545129] [drm:intel_display_power_put] disabling always-on
>[  695.545135] [drm:check_encoder_state] [ENCODER:23:LVDS-23]
>[  695.545138] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[  695.545142] [drm:check_crtc_state] [CRTC:18]
>[  695.545145] [drm:check_crtc_state] [CRTC:21]

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