Attachment 113446 Details for Bug 89127 – dmesg

dmesg

dmesg_skly05_kms_flip_0213.txt (text/plain), 124.83 KB, created by lu hua on 2015-02-13 05:38:20 UTC

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Creator: lu hua

Created: 2015-02-13 05:38:20 UTC

Size: 124.83 KB

patch

obsolete

>[    3.496302] [drm:skl_set_power_well] Disabling DDI B power well
>[    3.496303] [drm:intel_display_power_put] disabling power well 2
>[    3.496306] [drm:skl_set_power_well] Disabling power well 2
>[    3.496307] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[    3.496309] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[    3.496310] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[    3.496312] [drm:intel_display_power_get] enabling power well 2
>[    3.496314] [drm:skl_set_power_well] Enabling power well 2
>[    3.496316] [drm:intel_display_power_get] enabling DDI C power well
>[    3.496318] [drm:skl_set_power_well] Enabling DDI C power well
>[    3.496326] [drm:intel_display_power_put] disabling DDI C power well
>[    3.496329] [drm:skl_set_power_well] Disabling DDI C power well
>[    3.496330] [drm:intel_display_power_put] disabling power well 2
>[    3.496333] [drm:skl_set_power_well] Disabling power well 2
>[    3.496334] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[    3.496336] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[    3.496337] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[    3.496339] [drm:intel_display_power_get] enabling power well 2
>[    3.496341] [drm:skl_set_power_well] Enabling power well 2
>[    3.496343] [drm:intel_display_power_get] enabling DDI C power well
>[    3.496345] [drm:skl_set_power_well] Enabling DDI C power well
>[    3.496589] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    3.496590] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[    3.496592] [drm:intel_display_power_put] disabling DDI C power well
>[    3.496594] [drm:skl_set_power_well] Disabling DDI C power well
>[    3.496595] [drm:intel_display_power_put] disabling power well 2
>[    3.496598] [drm:skl_set_power_well] Disabling power well 2
>[    3.496600] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[    3.496604] [drm:drm_setup_crtcs] 
>[    3.496606] [drm:drm_enable_connectors] connector 34 enabled? yes
>[    3.496607] [drm:drm_enable_connectors] connector 43 enabled? no
>[    3.496608] [drm:drm_enable_connectors] connector 47 enabled? no
>[    3.496610] [drm:drm_enable_connectors] connector 50 enabled? no
>[    3.496611] [drm:drm_enable_connectors] connector 54 enabled? no
>[    3.496614] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    3.496616] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    3.496618] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 3200x1800
>[    3.496620] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    3.496621] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    3.496623] [drm:intel_fb_initial_config] connector DP-2 not enabled, skipping
>[    3.496624] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping
>[    3.496627] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 20 (0,0)
>[    3.496634] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496638] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8801491f96c0 state to ffff880147a93d80
>[    3.496641] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880000040400 state to ffff880147a93d80
>[    3.496643] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496649] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496671] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[    3.496680] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496683] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496685] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496687] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88009b9e00c0 state to ffff880147a93d80
>[    3.496689] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496691] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496693] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496695] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496697] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496700] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88009b9e1480 state to ffff880147a93d80
>[    3.496701] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496703] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496705] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496707] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496709] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496711] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88009b993e40 state to ffff880147a93d80
>[    3.496712] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496714] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496716] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496717] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496719] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496721] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88009b993c00 state to ffff880147a93d80
>[    3.496722] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496724] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496726] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496727] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496729] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496731] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88009b993a80 state to ffff880147a93d80
>[    3.496733] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496734] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496736] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496737] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496739] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496741] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88009b993540 state to ffff880147a93d80
>[    3.496743] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496744] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496746] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496747] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496749] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496751] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88009b993240 state to ffff880147a93d80
>[    3.496753] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496754] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496756] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496757] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496760] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496762] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88009b9930c0 state to ffff880147a93d80
>[    3.496763] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496765] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496767] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496768] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496770] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496772] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88009b993840 state to ffff880147a93d80
>[    3.496773] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496775] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496777] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496778] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496780] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496782] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff88009b993780 state to ffff880147a93d80
>[    3.496783] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496785] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496787] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496788] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496790] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880147a93d80
>[    3.496793] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff88009b9936c0 state to ffff880147a93d80
>[    3.496794] [drm:drm_atomic_check_only] checking ffff880147a93d80
>[    3.496795] [drm:drm_atomic_commit] commiting ffff880147a93d80
>[    3.496797] [drm:drm_atomic_state_clear] Clearing atomic state ffff880147a93d80
>[    3.496799] [drm:drm_atomic_state_free] Freeing atomic state ffff880147a93d80
>[    3.496802] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.496805] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.496807] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.496811] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.496813] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.496817] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.496819] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.496821] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.496823] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.496826] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.496828] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.496830] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.496831] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.496834] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.496837] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.496839] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.496841] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.496842] [drm:intel_dump_pipe_config] requested mode:
>[    3.496846] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.496847] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.496851] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.496854] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.496856] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.496857] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.496859] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.496861] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.496862] [drm:intel_dump_pipe_config] ips: 0
>[    3.496864] [drm:intel_dump_pipe_config] double wide: 0
>[    3.496865] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[    3.496868] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[    3.496870] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.496872] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    3.496874] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[    3.496876] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[    3.496878] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.496880] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    3.496891] Console: switching to colour frame buffer device 400x112
>[    3.496902] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.496905] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.496907] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.496909] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.496911] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.496914] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.496915] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.496917] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.496919] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.496921] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.496923] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.496924] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.496926] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.496929] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.496931] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.496933] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.496935] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.496936] [drm:intel_dump_pipe_config] requested mode:
>[    3.496940] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.496941] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.496944] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.496947] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.496948] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.496950] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.496952] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.496954] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.496955] [drm:intel_dump_pipe_config] ips: 0
>[    3.496956] [drm:intel_dump_pipe_config] double wide: 0
>[    3.529619] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    3.529677] i915 0000:00:02.0: registered panic notifier
>[    3.649112] asix 1-5.4:1.0 eth0: register 'asix' at usb-0000:00:14.0-5.4, ASIX AX88772 USB 2.0 Ethernet, 8c:ae:4c:ec:98:a9
>[    3.667995] dracut: Starting plymouth daemon
>[    3.681958] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.681964] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.681967] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.681971] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.681975] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.681980] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.681982] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.681985] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.681987] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.681990] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.681992] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.681994] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.681995] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.681998] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.682001] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.682004] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.682005] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.682006] [drm:intel_dump_pipe_config] requested mode:
>[    3.682011] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.682012] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.682015] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.682019] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.682020] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.682022] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.682024] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.682026] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.682027] [drm:intel_dump_pipe_config] ips: 0
>[    3.682029] [drm:intel_dump_pipe_config] double wide: 0
>[    3.720421] [drm] RC6 on
>[    3.725870] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    3.725877] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.725880] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    3.725884] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.725887] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    3.725893] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    3.725895] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    3.725897] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    3.725899] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    3.725903] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.725905] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.725906] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.725908] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.725911] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.725913] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    3.725915] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.725917] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.725918] [drm:intel_dump_pipe_config] requested mode:
>[    3.725923] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.725924] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.725928] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    3.725931] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    3.725933] [drm:intel_dump_pipe_config] port clock: 540000
>[    3.725934] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    3.725936] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.725938] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.725940] [drm:intel_dump_pipe_config] ips: 0
>[    3.725941] [drm:intel_dump_pipe_config] double wide: 0
>[    3.761199] Switched to clocksource tsc
>[    3.892840] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    3.893154] ACPI: AC Adapter [ADP1] (on-line)
>[    4.020972] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    4.021139] ACPI: Battery Slot [BAT0] (battery present)
>[    4.021461] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    4.021611] ACPI: Battery Slot [BAT1] (battery absent)
>[    4.021903] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    4.022058] ACPI: Battery Slot [BAT2] (battery absent)
>[    4.034163] wmi: Mapper loaded
>[    4.045002] i801_smbus 0000:00:1f.4: enabling device (0000 -> 0003)
>[    4.045406] ACPI Warning: SystemIO range 0x000000000000efa0-0x000000000000efbf conflicts with OpRegion 0x000000000000efa0-0x000000000000efaf (\_SB_.PCI0.SBUS.SMBI) (20141107/utaddress-258)
>[    4.045665] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    4.048069] input: PC Speaker as /devices/platform/pcspkr/input/input6
>[    4.049275] snd_hda_intel 0000:00:1f.3: enabling device (0000 -> 0002)
>[    4.077457] ppdev: user-space parallel port driver
>[    4.078918] sound hdaudioC0D0: autoconfig for ALC286: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>[    4.079036] sound hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    4.079130] sound hdaudioC0D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>[    4.079210] sound hdaudioC0D0:    mono: mono_out=0x0
>[    4.079212] sound hdaudioC0D0:    inputs:
>[    4.079216] sound hdaudioC0D0:      Mic=0x18
>[    4.079219] sound hdaudioC0D0:      Internal Mic=0x12
>[    4.079225] sound hdaudioC0D0:      Line=0x1a
>[    4.088457] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    4.088463] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    4.088466] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    4.088471] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    4.088474] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    4.088479] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    4.088481] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    4.088483] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    4.088485] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    4.088489] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    4.088491] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    4.088492] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    4.088494] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    4.088497] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.088499] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    4.088502] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    4.088504] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    4.088505] [drm:intel_dump_pipe_config] requested mode:
>[    4.088510] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    4.088511] [drm:intel_dump_pipe_config] adjusted mode:
>[    4.088514] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    4.088518] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    4.088519] [drm:intel_dump_pipe_config] port clock: 540000
>[    4.088521] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    4.088523] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    4.088525] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.088526] [drm:intel_dump_pipe_config] ips: 0
>[    4.088527] [drm:intel_dump_pipe_config] double wide: 0
>[    4.149066] EXT4-fs (sda2): INFO: recovery required on readonly filesystem
>[    4.149158] EXT4-fs (sda2): write access will be enabled during recovery
>[    4.211264] EXT4-fs (sda2): recovery complete
>[    4.224065] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
>[    4.292642] dracut: Checking ext4: /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a
>[    4.292988] dracut: issuing e2fsck -a  /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a
>[    4.354509] dracut: /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a: clean, 831732/13598720 files, 32634712/54366208 blocks
>[    4.355336] dracut: Remounting /dev/disk/by-uuid/f53c75c6-eeb6-4aa4-98a8-51aeb7219d2a with -o errors=remount-ro,ro
>[    4.398590] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: errors=remount-ro
>[    4.403751] dracut: Mounted root filesystem /dev/sda2
>[    4.421334] device-mapper: uevent: version 1.0.3
>[    4.421581] device-mapper: ioctl: 4.29.0-ioctl (2014-10-28) initialised: dm-devel@redhat.com
>[    4.535809] dracut: Switching root
>[    4.612258] random: init urandom read with 62 bits of entropy available
>[    4.678118] init: plymouth-upstart-bridge main process (2986) terminated with status 1
>[    4.678276] init: plymouth-upstart-bridge main process ended, respawning
>[    4.686274] init: plymouth-upstart-bridge main process (2996) terminated with status 1
>[    4.686366] init: plymouth-upstart-bridge main process ended, respawning
>[    4.689866] init: plymouth-upstart-bridge main process (2998) terminated with status 1
>[    4.689956] init: plymouth-upstart-bridge main process ended, respawning
>[    4.693901] init: plymouth-upstart-bridge main process (2999) terminated with status 1
>[    4.694046] init: plymouth-upstart-bridge main process ended, respawning
>[    4.697356] init: plymouth-upstart-bridge main process (3001) terminated with status 1
>[    4.697445] init: plymouth-upstart-bridge main process ended, respawning
>[    4.701328] init: plymouth-upstart-bridge main process (3002) terminated with status 1
>[    4.701417] init: plymouth-upstart-bridge main process ended, respawning
>[    4.704262] init: plymouth-upstart-bridge main process (3004) terminated with status 1
>[    4.704349] init: plymouth-upstart-bridge main process ended, respawning
>[    4.707897] init: plymouth-upstart-bridge main process (3005) terminated with status 1
>[    4.708029] init: plymouth-upstart-bridge main process ended, respawning
>[    4.711063] init: plymouth-upstart-bridge main process (3007) terminated with status 1
>[    4.711153] init: plymouth-upstart-bridge main process ended, respawning
>[    4.714363] init: plymouth-upstart-bridge main process (3008) terminated with status 1
>[    4.714451] init: plymouth-upstart-bridge main process ended, respawning
>[    4.718884] init: plymouth-upstart-bridge main process (3010) terminated with status 1
>[    4.719024] init: plymouth-upstart-bridge respawning too fast, stopped
>[    4.731751] init: ureadahead main process (2989) terminated with status 5
>[    5.063410] systemd-udevd[3123]: starting version 204
>[    5.422681] systemd-udevd[3850]: could not open moddep file '/lib/modules/3.19.0-rc7_drm-intel-nightly_b4442e_20150208+/modules.dep.bin'
>[    5.466918] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.466926] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.466930] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.466936] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.466940] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.466947] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.466949] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.466953] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.466956] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.466960] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.466963] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.466965] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.466968] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.466972] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.466976] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.466979] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.466981] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.466983] [drm:intel_dump_pipe_config] requested mode:
>[    5.466989] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.466991] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.466996] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.467001] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.467003] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.467005] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.467008] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.467011] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.467013] [drm:intel_dump_pipe_config] ips: 0
>[    5.467015] [drm:intel_dump_pipe_config] double wide: 0
>[    5.492014] asix 1-5.4:1.0 eth4: renamed from eth0
>[    5.509435] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.509443] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.509450] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.509459] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.509465] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.509471] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.509473] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.509477] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.509480] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.509484] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.509487] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.509489] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.509491] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.509496] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.509500] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.509503] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.509506] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.509507] [drm:intel_dump_pipe_config] requested mode:
>[    5.509513] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.509514] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.509517] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.509521] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.509522] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.509524] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.509526] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.509528] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.509529] [drm:intel_dump_pipe_config] ips: 0
>[    5.509531] [drm:intel_dump_pipe_config] double wide: 0
>[    5.545538] systemd-udevd[3845]: renamed network interface eth0 to eth4
>[    5.545713] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.545721] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.545725] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.545730] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.545734] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.545741] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.545743] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.545747] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.545749] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.545753] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.545756] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.545758] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.545760] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.545764] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.545768] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.545772] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.545774] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.545775] [drm:intel_dump_pipe_config] requested mode:
>[    5.545786] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.545788] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.545793] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.545798] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.545800] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.545802] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.545805] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.545808] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.545810] [drm:intel_dump_pipe_config] ips: 0
>[    5.545811] [drm:intel_dump_pipe_config] double wide: 0
>[    5.632346] Adding 16440316k swap on /dev/sda3.  Priority:-1 extents:1 across:16440316k SS
>[    5.684286] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro
>[    5.685999] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    5.686006] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    5.686010] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    5.686016] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    5.686019] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    5.686027] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[    5.686029] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    5.686033] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    5.686035] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    5.686039] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    5.686042] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    5.686044] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    5.686046] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    5.686050] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    5.686054] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    5.686057] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    5.686060] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    5.686061] [drm:intel_dump_pipe_config] requested mode:
>[    5.686068] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.686069] [drm:intel_dump_pipe_config] adjusted mode:
>[    5.686075] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    5.686080] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    5.686081] [drm:intel_dump_pipe_config] port clock: 540000
>[    5.686084] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    5.686087] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    5.686089] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    5.686091] [drm:intel_dump_pipe_config] ips: 0
>[    5.686092] [drm:intel_dump_pipe_config] double wide: 0
>[    6.003259] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE
>[    6.294230] init: failsafe main process (4137) killed by TERM signal
>[    6.428590] init: bluetooth main process (4223) terminated with status 1
>[    6.428607] init: bluetooth main process ended, respawning
>[    6.500450] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    6.500496] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    6.523826] init: bluetooth main process (4289) terminated with status 1
>[    6.523850] init: bluetooth main process ended, respawning
>[    6.581884] init: cups main process (4274) killed by HUP signal
>[    6.581913] init: cups main process ended, respawning
>[    6.597738] init: bluetooth main process (4339) terminated with status 1
>[    6.597763] init: bluetooth main process ended, respawning
>[    6.617788] random: nonblocking pool is initialized
>[    6.638699] init: bluetooth main process (4370) terminated with status 1
>[    6.638725] init: bluetooth main process ended, respawning
>[    6.685272] init: bluetooth main process (4396) terminated with status 1
>[    6.685299] init: bluetooth main process ended, respawning
>[    6.719632] init: bluetooth main process (4431) terminated with status 1
>[    6.719649] init: bluetooth main process ended, respawning
>[    6.754801] init: bluetooth main process (4464) terminated with status 1
>[    6.754824] init: bluetooth main process ended, respawning
>[    6.758176] asix 1-5.4:1.0 eth4: link down
>[    6.923685] init: bluetooth main process (4500) terminated with status 1
>[    6.923708] init: bluetooth main process ended, respawning
>[    7.136824] init: gdm main process (4570) killed by TERM signal
>[    7.138864] init: bluetooth main process (4630) terminated with status 1
>[    7.138884] init: bluetooth main process ended, respawning
>[    7.184140] init: bluetooth main process (4678) terminated with status 1
>[    7.184165] init: bluetooth main process ended, respawning
>[    7.221479] init: bluetooth main process (4709) terminated with status 1
>[    7.221496] init: bluetooth respawning too fast, stopped
>[    9.739505] asix 1-5.4:1.0 eth4: link up, 100Mbps, full-duplex, lpa 0xCDE1
>[   60.263270] kms_flip: executing
>[   60.263410] [drm:i915_gem_open] 
>[   60.265954] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   60.265959] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   60.266866] [drm:i915_gem_open] 
>[   60.269402] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   60.269406] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   60.269425] [drm:i915_gem_open] 
>[   60.271922] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   60.271925] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   60.271938] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.271955] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.271969] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.271974] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   60.271978] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   60.271992] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   60.272040] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   60.272381] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   60.272711] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   60.272729] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   60.272735] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   60.272741] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   60.272747] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   60.272753] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.272762] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.272766] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.272769] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.272772] [drm:intel_display_power_get] enabling power well 2
>[   60.272777] [drm:skl_set_power_well] Enabling power well 2
>[   60.272780] [drm:intel_display_power_get] enabling DDI B power well
>[   60.272783] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.272793] [drm:intel_display_power_put] disabling DDI B power well
>[   60.272797] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.272799] [drm:intel_display_power_put] disabling power well 2
>[   60.272803] [drm:skl_set_power_well] Disabling power well 2
>[   60.272806] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.272810] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.272813] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.272815] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.272818] [drm:intel_display_power_get] enabling power well 2
>[   60.272821] [drm:skl_set_power_well] Enabling power well 2
>[   60.272824] [drm:intel_display_power_get] enabling DDI B power well
>[   60.272827] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.272837] [drm:intel_display_power_put] disabling DDI B power well
>[   60.272840] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.272843] [drm:intel_display_power_put] disabling power well 2
>[   60.272846] [drm:skl_set_power_well] Disabling power well 2
>[   60.272849] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.272857] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.272861] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.272864] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.272866] [drm:intel_display_power_get] enabling power well 2
>[   60.272870] [drm:skl_set_power_well] Enabling power well 2
>[   60.272873] [drm:intel_display_power_get] enabling DDI B power well
>[   60.272876] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.273130] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.273134] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.273137] [drm:intel_display_power_put] disabling DDI B power well
>[   60.273148] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.273158] [drm:intel_display_power_put] disabling power well 2
>[   60.273169] [drm:skl_set_power_well] Disabling power well 2
>[   60.273180] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.273191] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.273202] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.273212] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.273221] [drm:intel_display_power_get] enabling power well 2
>[   60.273231] [drm:skl_set_power_well] Enabling power well 2
>[   60.273241] [drm:intel_display_power_get] enabling DDI B power well
>[   60.273247] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.273490] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.273494] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.273496] [drm:intel_display_power_put] disabling DDI B power well
>[   60.273500] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.273502] [drm:intel_display_power_put] disabling power well 2
>[   60.273506] [drm:skl_set_power_well] Disabling power well 2
>[   60.273508] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.273514] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.273519] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.273521] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.273524] [drm:intel_display_power_get] enabling power well 2
>[   60.273527] [drm:skl_set_power_well] Enabling power well 2
>[   60.273530] [drm:intel_display_power_get] enabling DDI C power well
>[   60.273533] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.273543] [drm:intel_display_power_put] disabling DDI C power well
>[   60.273546] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.273549] [drm:intel_display_power_put] disabling power well 2
>[   60.273552] [drm:skl_set_power_well] Disabling power well 2
>[   60.273555] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.273559] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.273561] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.273564] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.273566] [drm:intel_display_power_get] enabling power well 2
>[   60.273569] [drm:skl_set_power_well] Enabling power well 2
>[   60.273572] [drm:intel_display_power_get] enabling DDI C power well
>[   60.273576] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.273585] [drm:intel_display_power_put] disabling DDI C power well
>[   60.273589] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.273591] [drm:intel_display_power_put] disabling power well 2
>[   60.273595] [drm:skl_set_power_well] Disabling power well 2
>[   60.273597] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.273602] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.273605] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.273608] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.273610] [drm:intel_display_power_get] enabling power well 2
>[   60.273613] [drm:skl_set_power_well] Enabling power well 2
>[   60.273616] [drm:intel_display_power_get] enabling DDI C power well
>[   60.273620] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.273862] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.273865] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.273868] [drm:intel_display_power_put] disabling DDI C power well
>[   60.273872] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.273874] [drm:intel_display_power_put] disabling power well 2
>[   60.273877] [drm:skl_set_power_well] Disabling power well 2
>[   60.273880] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.273884] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.273887] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.273889] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.273892] [drm:intel_display_power_get] enabling power well 2
>[   60.273895] [drm:skl_set_power_well] Enabling power well 2
>[   60.273898] [drm:intel_display_power_get] enabling DDI C power well
>[   60.273901] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.274155] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.274166] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.274176] [drm:intel_display_power_put] disabling DDI C power well
>[   60.274187] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.274196] [drm:intel_display_power_put] disabling power well 2
>[   60.274206] [drm:skl_set_power_well] Disabling power well 2
>[   60.274217] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.274800] kms_flip: starting subtest absolute-wf_vblank
>[   60.274851] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.274857] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.274863] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.274867] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.274872] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.274875] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   60.274878] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   60.275217] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   60.275548] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   60.275560] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   60.275566] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   60.275571] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   60.275577] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   60.275582] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.275603] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.275608] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.275612] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.275615] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   60.275617] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   60.275948] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   60.276295] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   60.276305] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   60.276310] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   60.276315] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   60.276320] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   60.276325] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.276338] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.276343] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.276347] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.276350] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   60.276353] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   60.276683] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   60.277014] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   60.277022] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   60.277026] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   60.277031] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   60.277036] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   60.277040] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.277050] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277055] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277059] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.277062] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.277065] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.277067] [drm:intel_display_power_get] enabling power well 2
>[   60.277071] [drm:skl_set_power_well] Enabling power well 2
>[   60.277074] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277078] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.277096] [drm:intel_display_power_put] disabling DDI B power well
>[   60.277100] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.277103] [drm:intel_display_power_put] disabling power well 2
>[   60.277106] [drm:skl_set_power_well] Disabling power well 2
>[   60.277109] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.277113] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.277116] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.277118] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.277121] [drm:intel_display_power_get] enabling power well 2
>[   60.277124] [drm:skl_set_power_well] Enabling power well 2
>[   60.277127] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277130] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.277141] [drm:intel_display_power_put] disabling DDI B power well
>[   60.277153] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.277163] [drm:intel_display_power_put] disabling power well 2
>[   60.277172] [drm:skl_set_power_well] Disabling power well 2
>[   60.277183] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.277195] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277207] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277218] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.277227] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.277230] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.277232] [drm:intel_display_power_get] enabling power well 2
>[   60.277235] [drm:skl_set_power_well] Enabling power well 2
>[   60.277238] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277241] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.277251] [drm:intel_display_power_put] disabling DDI B power well
>[   60.277254] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.277257] [drm:intel_display_power_put] disabling power well 2
>[   60.277260] [drm:skl_set_power_well] Disabling power well 2
>[   60.277263] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.277267] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.277269] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.277272] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.277274] [drm:intel_display_power_get] enabling power well 2
>[   60.277277] [drm:skl_set_power_well] Enabling power well 2
>[   60.277280] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277284] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.277293] [drm:intel_display_power_put] disabling DDI B power well
>[   60.277297] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.277299] [drm:intel_display_power_put] disabling power well 2
>[   60.277303] [drm:skl_set_power_well] Disabling power well 2
>[   60.277305] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.277311] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277315] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277318] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.277321] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.277323] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.277326] [drm:intel_display_power_get] enabling power well 2
>[   60.277329] [drm:skl_set_power_well] Enabling power well 2
>[   60.277332] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277335] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.277345] [drm:intel_display_power_put] disabling DDI B power well
>[   60.277348] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.277351] [drm:intel_display_power_put] disabling power well 2
>[   60.277354] [drm:skl_set_power_well] Disabling power well 2
>[   60.277357] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.277361] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   60.277363] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   60.277366] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   60.277368] [drm:intel_display_power_get] enabling power well 2
>[   60.277371] [drm:skl_set_power_well] Enabling power well 2
>[   60.277374] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277377] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.277387] [drm:intel_display_power_put] disabling DDI B power well
>[   60.277390] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.277393] [drm:intel_display_power_put] disabling power well 2
>[   60.277396] [drm:skl_set_power_well] Disabling power well 2
>[   60.277399] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   60.277404] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277408] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.277412] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.277415] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.277418] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.277420] [drm:intel_display_power_get] enabling power well 2
>[   60.277435] [drm:skl_set_power_well] Enabling power well 2
>[   60.277449] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277462] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.277718] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.277721] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.277724] [drm:intel_display_power_put] disabling DDI B power well
>[   60.277728] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.277730] [drm:intel_display_power_put] disabling power well 2
>[   60.277734] [drm:skl_set_power_well] Disabling power well 2
>[   60.277737] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.277740] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.277743] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.277746] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.277748] [drm:intel_display_power_get] enabling power well 2
>[   60.277751] [drm:skl_set_power_well] Enabling power well 2
>[   60.277754] [drm:intel_display_power_get] enabling DDI B power well
>[   60.277757] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.278001] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.278004] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.278006] [drm:intel_display_power_put] disabling DDI B power well
>[   60.278010] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.278012] [drm:intel_display_power_put] disabling power well 2
>[   60.278016] [drm:skl_set_power_well] Disabling power well 2
>[   60.278019] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.278025] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.278029] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.278033] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.278036] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.278038] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.278041] [drm:intel_display_power_get] enabling power well 2
>[   60.278044] [drm:skl_set_power_well] Enabling power well 2
>[   60.278047] [drm:intel_display_power_get] enabling DDI B power well
>[   60.278050] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.278294] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.278297] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.278300] [drm:intel_display_power_put] disabling DDI B power well
>[   60.278303] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.278306] [drm:intel_display_power_put] disabling power well 2
>[   60.278309] [drm:skl_set_power_well] Disabling power well 2
>[   60.278312] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.278316] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.278319] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.278321] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.278324] [drm:intel_display_power_get] enabling power well 2
>[   60.278327] [drm:skl_set_power_well] Enabling power well 2
>[   60.278330] [drm:intel_display_power_get] enabling DDI B power well
>[   60.278333] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.278576] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.278579] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.278582] [drm:intel_display_power_put] disabling DDI B power well
>[   60.278585] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.278588] [drm:intel_display_power_put] disabling power well 2
>[   60.278591] [drm:skl_set_power_well] Disabling power well 2
>[   60.278594] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.278600] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.278604] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.278608] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.278611] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.278613] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.278616] [drm:intel_display_power_get] enabling power well 2
>[   60.278619] [drm:skl_set_power_well] Enabling power well 2
>[   60.278622] [drm:intel_display_power_get] enabling DDI B power well
>[   60.278625] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.278868] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.278871] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.278873] [drm:intel_display_power_put] disabling DDI B power well
>[   60.278877] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.278879] [drm:intel_display_power_put] disabling power well 2
>[   60.278883] [drm:skl_set_power_well] Disabling power well 2
>[   60.278886] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.278889] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   60.278892] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   60.278894] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   60.278897] [drm:intel_display_power_get] enabling power well 2
>[   60.278900] [drm:skl_set_power_well] Enabling power well 2
>[   60.278903] [drm:intel_display_power_get] enabling DDI B power well
>[   60.278906] [drm:skl_set_power_well] Enabling DDI B power well
>[   60.279203] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   60.279212] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   60.279218] [drm:intel_display_power_put] disabling DDI B power well
>[   60.279224] [drm:skl_set_power_well] Disabling DDI B power well
>[   60.279228] [drm:intel_display_power_put] disabling power well 2
>[   60.279232] [drm:skl_set_power_well] Disabling power well 2
>[   60.279238] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   60.279257] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279265] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279279] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.279290] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.279295] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.279299] [drm:intel_display_power_get] enabling power well 2
>[   60.279304] [drm:skl_set_power_well] Enabling power well 2
>[   60.279308] [drm:intel_display_power_get] enabling DDI C power well
>[   60.279317] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.279334] [drm:intel_display_power_put] disabling DDI C power well
>[   60.279340] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.279346] [drm:intel_display_power_put] disabling power well 2
>[   60.279353] [drm:skl_set_power_well] Disabling power well 2
>[   60.279358] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.279364] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.279369] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.279373] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.279376] [drm:intel_display_power_get] enabling power well 2
>[   60.279381] [drm:skl_set_power_well] Enabling power well 2
>[   60.279385] [drm:intel_display_power_get] enabling DDI C power well
>[   60.279390] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.279400] [drm:intel_display_power_put] disabling DDI C power well
>[   60.279405] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.279409] [drm:intel_display_power_put] disabling power well 2
>[   60.279414] [drm:skl_set_power_well] Disabling power well 2
>[   60.279418] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.279428] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279434] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279440] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.279444] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.279448] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.279451] [drm:intel_display_power_get] enabling power well 2
>[   60.279456] [drm:skl_set_power_well] Enabling power well 2
>[   60.279460] [drm:intel_display_power_get] enabling DDI C power well
>[   60.279465] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.279476] [drm:intel_display_power_put] disabling DDI C power well
>[   60.279481] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.279485] [drm:intel_display_power_put] disabling power well 2
>[   60.279490] [drm:skl_set_power_well] Disabling power well 2
>[   60.279494] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.279499] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.279504] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.279508] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.279511] [drm:intel_display_power_get] enabling power well 2
>[   60.279516] [drm:skl_set_power_well] Enabling power well 2
>[   60.279520] [drm:intel_display_power_get] enabling DDI C power well
>[   60.279525] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.279536] [drm:intel_display_power_put] disabling DDI C power well
>[   60.279541] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.279544] [drm:intel_display_power_put] disabling power well 2
>[   60.279549] [drm:skl_set_power_well] Disabling power well 2
>[   60.279553] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.279559] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279564] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279567] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.279570] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.279573] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.279575] [drm:intel_display_power_get] enabling power well 2
>[   60.279578] [drm:skl_set_power_well] Enabling power well 2
>[   60.279581] [drm:intel_display_power_get] enabling DDI C power well
>[   60.279585] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.279594] [drm:intel_display_power_put] disabling DDI C power well
>[   60.279597] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.279600] [drm:intel_display_power_put] disabling power well 2
>[   60.279603] [drm:skl_set_power_well] Disabling power well 2
>[   60.279606] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.279609] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   60.279612] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   60.279615] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   60.279617] [drm:intel_display_power_get] enabling power well 2
>[   60.279620] [drm:skl_set_power_well] Enabling power well 2
>[   60.279623] [drm:intel_display_power_get] enabling DDI C power well
>[   60.279626] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.279636] [drm:intel_display_power_put] disabling DDI C power well
>[   60.279639] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.279642] [drm:intel_display_power_put] disabling power well 2
>[   60.279645] [drm:skl_set_power_well] Disabling power well 2
>[   60.279648] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   60.279653] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279657] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.279661] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.279664] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.279667] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.279669] [drm:intel_display_power_get] enabling power well 2
>[   60.279672] [drm:skl_set_power_well] Enabling power well 2
>[   60.279675] [drm:intel_display_power_get] enabling DDI C power well
>[   60.279679] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.280044] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.280051] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.280055] [drm:intel_display_power_put] disabling DDI C power well
>[   60.280059] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.280062] [drm:intel_display_power_put] disabling power well 2
>[   60.280065] [drm:skl_set_power_well] Disabling power well 2
>[   60.280069] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.280078] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.280099] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.280111] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.280122] [drm:intel_display_power_get] enabling power well 2
>[   60.280132] [drm:skl_set_power_well] Enabling power well 2
>[   60.280142] [drm:intel_display_power_get] enabling DDI C power well
>[   60.280151] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.280408] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.280413] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.280417] [drm:intel_display_power_put] disabling DDI C power well
>[   60.280422] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.280426] [drm:intel_display_power_put] disabling power well 2
>[   60.280431] [drm:skl_set_power_well] Disabling power well 2
>[   60.280435] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.280450] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.280457] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.280463] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.280468] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.280471] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.280476] [drm:intel_display_power_get] enabling power well 2
>[   60.280480] [drm:skl_set_power_well] Enabling power well 2
>[   60.280493] [drm:intel_display_power_get] enabling DDI C power well
>[   60.280504] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.280758] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.280763] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.280767] [drm:intel_display_power_put] disabling DDI C power well
>[   60.280772] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.280776] [drm:intel_display_power_put] disabling power well 2
>[   60.280780] [drm:skl_set_power_well] Disabling power well 2
>[   60.280783] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.280788] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.280791] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.280793] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.280796] [drm:intel_display_power_get] enabling power well 2
>[   60.280799] [drm:skl_set_power_well] Enabling power well 2
>[   60.280802] [drm:intel_display_power_get] enabling DDI C power well
>[   60.280805] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.281049] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.281052] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.281055] [drm:intel_display_power_put] disabling DDI C power well
>[   60.281058] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.281061] [drm:intel_display_power_put] disabling power well 2
>[   60.281064] [drm:skl_set_power_well] Disabling power well 2
>[   60.281067] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.281075] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.281089] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.281101] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.281111] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.281121] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.281131] [drm:intel_display_power_get] enabling power well 2
>[   60.281141] [drm:skl_set_power_well] Enabling power well 2
>[   60.281147] [drm:intel_display_power_get] enabling DDI C power well
>[   60.281151] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.281395] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.281399] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.281401] [drm:intel_display_power_put] disabling DDI C power well
>[   60.281405] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.281407] [drm:intel_display_power_put] disabling power well 2
>[   60.281411] [drm:skl_set_power_well] Disabling power well 2
>[   60.281414] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.281418] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   60.281421] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   60.281424] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   60.281427] [drm:intel_display_power_get] enabling power well 2
>[   60.281430] [drm:skl_set_power_well] Enabling power well 2
>[   60.281433] [drm:intel_display_power_get] enabling DDI C power well
>[   60.281436] [drm:skl_set_power_well] Enabling DDI C power well
>[   60.281680] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   60.281683] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   60.281685] [drm:intel_display_power_put] disabling DDI C power well
>[   60.281689] [drm:skl_set_power_well] Disabling DDI C power well
>[   60.281691] [drm:intel_display_power_put] disabling power well 2
>[   60.281695] [drm:skl_set_power_well] Disabling power well 2
>[   60.281698] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   60.281705] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.281710] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   60.281714] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.281717] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   60.281720] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   60.282073] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   60.282415] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   60.282431] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   60.282438] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   60.282444] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   60.282449] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   60.282458] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   60.282534] [drm:add_framebuffer_internal] [FB:56]
>[   60.282540] [drm:add_framebuffer_internal] [FB:58]
>[   60.282548] [drm:add_framebuffer_internal] [FB:59]
>[   60.586010] [drm:drm_mode_setcrtc] [CRTC:20]
>[   60.586022] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[   60.586028] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0)
>[   60.586035] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[   60.586039] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   60.586045] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   60.586050] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   60.586057] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[   60.586060] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   60.586064] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[   60.586067] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[   60.586072] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   60.586076] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   60.586078] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   60.586081] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   60.586085] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   60.586089] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[   60.586093] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   60.586096] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   60.586099] [drm:intel_dump_pipe_config] requested mode:
>[   60.586105] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   60.586107] [drm:intel_dump_pipe_config] adjusted mode:
>[   60.586112] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   60.586117] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[   60.586131] [drm:intel_dump_pipe_config] port clock: 540000
>[   60.586134] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   60.586142] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   60.586154] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   60.586163] [drm:intel_dump_pipe_config] ips: 0
>[   60.586174] [drm:intel_dump_pipe_config] double wide: 0
>[   60.586187] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5dcc0
>[   60.586200] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004d5d300 state to ffff880146e5dcc0
>[   60.586212] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880148c32c00 state to ffff880146e5dcc0
>[   60.586217] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004d5d300 to [CRTC:20]
>[   60.586222] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff880004d5d300
>[   60.586237] [drm:drm_atomic_check_only] checking ffff880146e5dcc0
>[   60.586254] [drm:drm_atomic_commit] commiting ffff880146e5dcc0
>[   60.588697] [drm:skylake_update_primary_plane] Writing base 078C0000 0,0,3200,1800 pitch=12800
>[   60.588708] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5dcc0
>[   60.588713] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5dcc0
>[   63.283711] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   63.283755] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   70.609350] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[   70.609369] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[   70.609377] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[   70.609385] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   70.609388] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   70.609392] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[   70.609398] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   70.609411] [drm:intel_edp_backlight_off] 
>[   70.810527] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   70.820530] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   70.820582] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   70.820772] [drm:edp_panel_off] Turn eDP port A panel power off
>[   70.820798] [drm:wait_panel_off] Wait for panel power off time
>[   70.820816] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000
>[   70.875615] [drm:wait_panel_status] Wait complete
>[   70.875648] [drm:intel_fbc_update] no output, disabling
>[   70.875657] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5dcc0
>[   70.875665] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004d5d540 state to ffff880146e5dcc0
>[   70.875670] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880148c32c00 state to ffff880146e5dcc0
>[   70.875673] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880004d5d540 to [NOCRTC]
>[   70.875676] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880004d5d540
>[   70.875679] [drm:drm_atomic_check_only] checking ffff880146e5dcc0
>[   70.875685] [drm:drm_atomic_commit] commiting ffff880146e5dcc0
>[   70.875696] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5dcc0
>[   70.875701] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5dcc0
>[   70.875709] [drm:intel_display_power_put] disabling DDI A/E power well
>[   70.875714] [drm:skl_set_power_well] Disabling DDI A/E power well
>[   70.875717] [drm:intel_display_power_put] disabling MISC IO power well
>[   70.875720] [drm:skl_set_power_well] Disabling MISC IO power well
>[   70.875723] [drm:intel_display_power_put] disabling power well 1
>[   70.875728] [drm:skl_set_power_well] Disabling power well 1
>[   70.875760] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   70.875764] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   70.875767] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   70.875769] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   70.875772] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   70.875775] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   70.875777] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   70.875780] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   70.875782] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   70.875785] [drm:check_crtc_state] [CRTC:20]
>[   70.875789] [drm:check_crtc_state] [CRTC:25]
>[   70.875791] [drm:check_crtc_state] [CRTC:30]
>[   70.875794] [drm:check_shared_dpll_state] DPLL 1
>[   70.875798] [drm:check_shared_dpll_state] DPLL 2
>[   70.875800] [drm:check_shared_dpll_state] DPLL 3
>[   70.882950] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   70.882958] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   70.882964] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   70.882969] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   70.882972] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   70.882976] [drm:intel_display_power_get] enabling power well 1
>[   70.882983] [drm:skl_set_power_well] Enabling power well 1
>[   70.882986] [drm:intel_display_power_get] enabling MISC IO power well
>[   70.882990] [drm:skl_set_power_well] Enabling MISC IO power well
>[   70.882993] [drm:intel_display_power_get] enabling DDI A/E power well
>[   70.882996] [drm:skl_set_power_well] Enabling DDI A/E power well
>[   70.883009] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   70.883019] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   71.422540] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   71.422552] [drm:wait_panel_status] Wait complete
>[   71.422593] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[   71.422602] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[   71.623887] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   71.624239] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   71.624261] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   71.624268] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   71.624274] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   71.624279] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   71.624292] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   71.624354] [drm:add_framebuffer_internal] [FB:56]
>[   71.624360] [drm:add_framebuffer_internal] [FB:58]
>[   71.624368] [drm:add_framebuffer_internal] [FB:59]
>[   71.832398] [drm:drm_mode_setcrtc] [CRTC:25]
>[   71.832412] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[   71.832420] [drm:intel_crtc_set_config] [CRTC:25] [FB:56] #connectors=1 (x y) (0 0)
>[   71.832427] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   71.832430] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[   71.832438] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   71.832447] [drm:drm_mode_debug_printmodeline] Modeline 60:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   71.832452] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=1, fb_changed=0
>[   71.832456] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[   71.832462] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:25]
>[   71.832466] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[   71.832471] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[   71.832477] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   71.832482] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   71.832488] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[   71.832491] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   71.832496] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[   71.832499] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[   71.832504] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   71.832507] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[   71.832510] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   71.832522] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   71.832526] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   71.832531] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[   71.832545] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   71.832556] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   71.832566] [drm:intel_dump_pipe_config] requested mode:
>[   71.832579] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   71.832589] [drm:intel_dump_pipe_config] adjusted mode:
>[   71.832601] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   71.832609] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[   71.832611] [drm:intel_dump_pipe_config] port clock: 540000
>[   71.832614] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   71.832618] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   71.832621] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   71.832624] [drm:intel_dump_pipe_config] ips: 0
>[   71.832627] [drm:intel_dump_pipe_config] double wide: 0
>[   71.832638] [drm:intel_display_power_get] enabling power well 2
>[   71.832643] [drm:skl_set_power_well] Enabling power well 2
>[   71.832650] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880143e8dd80
>[   71.832655] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88009b9d6480 state to ffff880143e8dd80
>[   71.832660] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff88009a871c00 state to ffff880143e8dd80
>[   71.832663] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009b9d6480 to [CRTC:25]
>[   71.832666] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88009b9d6480
>[   71.832669] [drm:drm_atomic_check_only] checking ffff880143e8dd80
>[   71.832676] [drm:drm_atomic_commit] commiting ffff880143e8dd80
>[   71.834968] [drm:drm_atomic_state_clear] Clearing atomic state ffff880143e8dd80
>[   71.834974] [drm:drm_atomic_state_free] Freeing atomic state ffff880143e8dd80
>[   71.834993] [drm:edp_panel_on] Turn eDP port A panel power on
>[   71.835002] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   71.835020] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[   71.835029] [drm:wait_panel_status] Wait complete
>[   71.835053] [drm:wait_panel_on] Wait for panel power on
>[   71.835071] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[   72.043758] [drm:wait_panel_status] Wait complete
>[   72.044893] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   72.045552] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[   72.046194] [drm:intel_dp_start_link_train] clock recovery OK
>[   72.047146] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[   72.048087] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   72.048366] [drm:skl_wm_flush_pipe] flush pipe B (pass 3)
>[   72.048378] [drm:intel_edp_backlight_on] 
>[   72.048381] [drm:intel_panel_enable_backlight] pipe B
>[   72.048421] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[   72.048461] [drm:intel_psr_match_conditions] PSR disable by flag
>[   72.048464] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   72.048472] [drm:skylake_update_primary_plane] Writing base 078C0000 0,0,3200,1800 pitch=12800
>[   72.048480] [drm:intel_fbc_update] disabled per chip default
>[   72.048494] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[   72.048500] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   72.048504] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   72.048507] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   72.048509] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   72.048512] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   72.048514] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   72.048517] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   72.048519] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   72.048522] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   72.048525] [drm:check_crtc_state] [CRTC:20]
>[   72.048529] [drm:check_crtc_state] [CRTC:25]
>[   72.048554] [drm:check_crtc_state] [CRTC:30]
>[   72.048567] [drm:check_shared_dpll_state] DPLL 1
>[   72.048578] [drm:check_shared_dpll_state] DPLL 2
>[   72.048588] [drm:check_shared_dpll_state] DPLL 3
>[   75.053193] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   75.053237] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   75.054741] kms_flip: exiting, ret=99
>[   75.054849] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[   75.054853] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009ab46600 state to ffff880146e5d3c0
>[   75.054856] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[   75.054860] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[   75.054863] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[   75.054865] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[   75.054868] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[   75.054870] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88009ab46cc0 state to ffff880146e5d3c0
>[   75.054872] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[   75.054874] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[   75.054876] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[   75.054877] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[   75.054879] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[   75.054882] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88009ab46f00 state to ffff880146e5d3c0
>[   75.054883] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[   75.054884] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[   75.054886] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[   75.054888] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[   75.054890] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[   75.054893] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88009ab46780 state to ffff880146e5d3c0
>[   75.054894] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[   75.054896] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[   75.054898] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[   75.054899] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[   75.054901] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[   75.054904] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88009ab46240 state to ffff880146e5d3c0
>[   75.054907] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880148c31000 state to ffff880146e5d3c0
>[   75.054909] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[   75.054935] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.062584] ------------[ cut here ]------------
>[  135.062622] WARNING: CPU: 0 PID: 5242 at drivers/gpu/drm/i915/intel_display.c:3612 intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915]()
>[  135.062625] WARN_ON(wait_event_timeout(dev_priv->pending_flip_queue, !intel_crtc_has_pending_flip(crtc), 60*HZ) == 0)
>[  135.062670] Modules linked in: dm_mod snd_hda_codec_realtek snd_hda_codec_generic ppdev snd_hda_intel snd_hda_controller pcspkr snd_hda_codec snd_hwdep snd_pcm snd_timer i2c_i801 snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea
>[  135.062675] CPU: 0 PID: 5242 Comm: kms_flip Not tainted 3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198
>[  135.062677] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015
>[  135.062681]  0000000000000000 0000000000000009 ffffffff8179a69b ffff880143f3f8e8
>[  135.062683]  ffffffff8103bdec ffffffff833b3a80 ffffffffa00d7244 ffffffff833b3a80
>[  135.062686]  ffff880144282000 0000000000000000 ffff8801440b9800 ffff880004ed0000
>[  135.062687] Call Trace:
>[  135.062695]  [<ffffffff8179a69b>] ? dump_stack+0x40/0x50
>[  135.062702]  [<ffffffff8103bdec>] ? warn_slowpath_common+0x98/0xb0
>[  135.062725]  [<ffffffffa00d7244>] ? intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915]
>[  135.062729]  [<ffffffff8103be9c>] ? warn_slowpath_fmt+0x45/0x4a
>[  135.062736]  [<ffffffff81064f7a>] ? prepare_to_wait_event+0xb0/0xec
>[  135.062755]  [<ffffffffa00d7244>] ? intel_crtc_wait_for_pending_flips+0xec/0x1ad [i915]
>[  135.062760]  [<ffffffff81065284>] ? add_wait_queue+0x3c/0x3c
>[  135.062778]  [<ffffffffa00d73f9>] ? intel_begin_crtc_commit+0xf4/0x15e [i915]
>[  135.062786]  [<ffffffffa0062a72>] ? drm_atomic_helper_commit_planes+0x4b/0x149 [drm_kms_helper]
>[  135.062808]  [<ffffffffa00ee7fd>] ? intel_atomic_commit+0xa3/0xc9 [i915]
>[  135.062815]  [<ffffffffa006328a>] ? drm_atomic_helper_plane_set_property+0x62/0x9c [drm_kms_helper]
>[  135.062880]  [<ffffffffa001723f>] ? drm_mode_plane_set_obj_prop+0x22/0x48 [drm]
>[  135.062886]  [<ffffffffa006528f>] ? restore_fbdev_mode+0x55/0xc3 [drm_kms_helper]
>[  135.062892]  [<ffffffffa00665ff>] ? drm_fb_helper_restore_fbdev_mode_unlocked+0x1f/0x56 [drm_kms_helper]
>[  135.062897]  [<ffffffffa0066664>] ? drm_fb_helper_set_par+0x2e/0x33 [drm_kms_helper]
>[  135.062918]  [<ffffffffa00eb9fa>] ? intel_fb_initial_config+0x4d1/0x4d1 [i915]
>[  135.062936]  [<ffffffffa00eba0b>] ? intel_fbdev_set_par+0x11/0x55 [i915]
>[  135.062940]  [<ffffffff813820db>] ? fb_set_var+0x246/0x32c
>[  135.062946]  [<ffffffff8134577b>] ? vsnprintf+0x70/0x3cc
>[  135.062952]  [<ffffffff8110dce2>] ? kmem_cache_alloc_trace+0x2a/0x104
>[  135.062958]  [<ffffffff8137a6e0>] ? fbcon_blank+0x71/0x230
>[  135.062963]  [<ffffffff81112176>] ? do_dentry_open+0x1f1/0x2a6
>[  135.062968]  [<ffffffff813ce94b>] ? do_unblank_screen+0xef/0x169
>[  135.062972]  [<ffffffff813c6f94>] ? vt_ioctl+0x4b0/0xf7f
>[  135.062977]  [<ffffffff813be628>] ? tty_ioctl+0x946/0x9b5
>[  135.062981]  [<ffffffff8112069f>] ? do_filp_open+0x2b/0x6f
>[  135.062986]  [<ffffffff8112241d>] ? do_vfs_ioctl+0x412/0x459
>[  135.062990]  [<ffffffff81129d70>] ? __fd_install+0x15/0x43
>[  135.062994]  [<ffffffff811224ad>] ? SyS_ioctl+0x49/0x78
>[  135.062998]  [<ffffffff817a0092>] ? system_call_fastpath+0x12/0x17
>[  135.063000] ---[ end trace 342b78d921c2a6a6 ]---
>[  135.063001] ------------[ cut here ]------------
>[  135.063022] WARNING: CPU: 0 PID: 5242 at drivers/gpu/drm/i915/intel_display.c:3617 intel_crtc_wait_for_pending_flips+0x126/0x1ad [i915]()
>[  135.063022] Removing stuck page flip
>[  135.063037] Modules linked in: dm_mod snd_hda_codec_realtek snd_hda_codec_generic ppdev snd_hda_intel snd_hda_controller pcspkr snd_hda_codec snd_hwdep snd_pcm snd_timer i2c_i801 snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm cfbfillrect cfbimgblt cfbcopyarea
>[  135.063041] CPU: 0 PID: 5242 Comm: kms_flip Tainted: G        W      3.19.0-rc7_drm-intel-nightly_b4442e_20150208+ #198
>[  135.063042] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015
>[  135.063045]  0000000000000000 0000000000000009 ffffffff8179a69b ffff880143f3f8e8
>[  135.063047]  ffffffff8103bdec ffffffff833b3a80 ffffffffa00d727e ffffffff833b3a80
>[  135.063049]  ffff880144282000 0000000000000000 ffff8801440b9800 ffff880004ed0000
>[  135.063050] Call Trace:
>[  135.063054]  [<ffffffff8179a69b>] ? dump_stack+0x40/0x50
>[  135.063059]  [<ffffffff8103bdec>] ? warn_slowpath_common+0x98/0xb0
>[  135.063076]  [<ffffffffa00d727e>] ? intel_crtc_wait_for_pending_flips+0x126/0x1ad [i915]
>[  135.063081]  [<ffffffff8103be9c>] ? warn_slowpath_fmt+0x45/0x4a
>[  135.063086]  [<ffffffff81064f7a>] ? prepare_to_wait_event+0xb0/0xec
>[  135.063102]  [<ffffffffa00d727e>] ? intel_crtc_wait_for_pending_flips+0x126/0x1ad [i915]
>[  135.063106]  [<ffffffff81065284>] ? add_wait_queue+0x3c/0x3c
>[  135.063123]  [<ffffffffa00d73f9>] ? intel_begin_crtc_commit+0xf4/0x15e [i915]
>[  135.063130]  [<ffffffffa0062a72>] ? drm_atomic_helper_commit_planes+0x4b/0x149 [drm_kms_helper]
>[  135.063149]  [<ffffffffa00ee7fd>] ? intel_atomic_commit+0xa3/0xc9 [i915]
>[  135.063156]  [<ffffffffa006328a>] ? drm_atomic_helper_plane_set_property+0x62/0x9c [drm_kms_helper]
>[  135.063169]  [<ffffffffa001723f>] ? drm_mode_plane_set_obj_prop+0x22/0x48 [drm]
>[  135.063175]  [<ffffffffa006528f>] ? restore_fbdev_mode+0x55/0xc3 [drm_kms_helper]
>[  135.063181]  [<ffffffffa00665ff>] ? drm_fb_helper_restore_fbdev_mode_unlocked+0x1f/0x56 [drm_kms_helper]
>[  135.063186]  [<ffffffffa0066664>] ? drm_fb_helper_set_par+0x2e/0x33 [drm_kms_helper]
>[  135.063204]  [<ffffffffa00eb9fa>] ? intel_fb_initial_config+0x4d1/0x4d1 [i915]
>[  135.063221]  [<ffffffffa00eba0b>] ? intel_fbdev_set_par+0x11/0x55 [i915]
>[  135.063224]  [<ffffffff813820db>] ? fb_set_var+0x246/0x32c
>[  135.063229]  [<ffffffff8134577b>] ? vsnprintf+0x70/0x3cc
>[  135.063233]  [<ffffffff8110dce2>] ? kmem_cache_alloc_trace+0x2a/0x104
>[  135.063238]  [<ffffffff8137a6e0>] ? fbcon_blank+0x71/0x230
>[  135.063243]  [<ffffffff81112176>] ? do_dentry_open+0x1f1/0x2a6
>[  135.063247]  [<ffffffff813ce94b>] ? do_unblank_screen+0xef/0x169
>[  135.063250]  [<ffffffff813c6f94>] ? vt_ioctl+0x4b0/0xf7f
>[  135.063254]  [<ffffffff813be628>] ? tty_ioctl+0x946/0x9b5
>[  135.063258]  [<ffffffff8112069f>] ? do_filp_open+0x2b/0x6f
>[  135.063262]  [<ffffffff8112241d>] ? do_vfs_ioctl+0x412/0x459
>[  135.063266]  [<ffffffff81129d70>] ? __fd_install+0x15/0x43
>[  135.063270]  [<ffffffff811224ad>] ? SyS_ioctl+0x49/0x78
>[  135.063273]  [<ffffffff817a0092>] ? system_call_fastpath+0x12/0x17
>[  135.063275] ---[ end trace 342b78d921c2a6a7 ]---
>[  135.063302] [drm:skylake_update_primary_plane] Writing base 02CC0000 0,0,3200,1800 pitch=12800
>[  135.063315] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063320] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063326] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[  135.063330] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff88009a298480 state to ffff880146e5d3c0
>[  135.063333] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[  135.063336] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.063339] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063340] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063343] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[  135.063346] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88009a298b40 state to ffff880146e5d3c0
>[  135.063347] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[  135.063349] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.063351] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063360] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063362] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[  135.063364] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88009a2980c0 state to ffff880146e5d3c0
>[  135.063365] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[  135.063367] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.063370] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063371] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063373] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[  135.063376] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff88009a298300 state to ffff880146e5d3c0
>[  135.063377] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[  135.063379] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.063381] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063383] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063385] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[  135.063387] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88009a298780 state to ffff880146e5d3c0
>[  135.063389] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[  135.063390] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.063392] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063394] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063396] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[  135.063398] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff88009a298f00 state to ffff880146e5d3c0
>[  135.063399] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[  135.063401] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.063402] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063404] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063406] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5d3c0
>[  135.063408] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff88009a2983c0 state to ffff880146e5d3c0
>[  135.063409] [drm:drm_atomic_check_only] checking ffff880146e5d3c0
>[  135.063411] [drm:drm_atomic_commit] commiting ffff880146e5d3c0
>[  135.063413] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5d3c0
>[  135.063414] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5d3c0
>[  135.063418] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[  135.063422] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  135.063425] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[  135.063428] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  135.063429] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  135.063432] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  135.063433] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  135.063437] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  135.063440] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  135.063445] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  135.063446] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  135.063449] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  135.063451] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  135.063454] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  135.063456] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  135.063457] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  135.063459] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  135.063462] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  135.063465] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  135.063467] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  135.063469] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  135.063470] [drm:intel_dump_pipe_config] requested mode:
>[  135.063475] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  135.063476] [drm:intel_dump_pipe_config] adjusted mode:
>[  135.063479] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  135.063483] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  135.063484] [drm:intel_dump_pipe_config] port clock: 540000
>[  135.063486] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  135.063488] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  135.063490] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  135.063491] [drm:intel_dump_pipe_config] ips: 0
>[  135.063492] [drm:intel_dump_pipe_config] double wide: 0
>[  135.063511] [drm:intel_edp_backlight_off] 
>[  135.264589] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  135.274522] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  135.274569] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  135.274751] [drm:edp_panel_off] Turn eDP port A panel power off
>[  135.274774] [drm:wait_panel_off] Wait for panel power off time
>[  135.274791] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  135.329602] [drm:wait_panel_status] Wait complete
>[  135.329631] [drm:intel_fbc_update] no output, disabling
>[  135.329638] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5dea0
>[  135.329644] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88009a2986c0 state to ffff880146e5dea0
>[  135.329648] [drm:drm_atomic_get_crtc_state] Added [CRTC:25] ffff880148c35c00 state to ffff880146e5dea0
>[  135.329650] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009a2986c0 to [NOCRTC]
>[  135.329652] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88009a2986c0
>[  135.329653] [drm:drm_atomic_check_only] checking ffff880146e5dea0
>[  135.329658] [drm:drm_atomic_commit] commiting ffff880146e5dea0
>[  135.329668] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5dea0
>[  135.329671] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5dea0
>[  135.329680] [drm:intel_display_power_put] disabling power well 2
>[  135.329684] [drm:skl_set_power_well] Disabling power well 2
>[  135.329688] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880146e5dea0
>[  135.329690] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88009a298000 state to ffff880146e5dea0
>[  135.329692] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880148c35c00 state to ffff880146e5dea0
>[  135.329694] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88009a298000 to [CRTC:20]
>[  135.329696] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff88009a298000
>[  135.329697] [drm:drm_atomic_check_only] checking ffff880146e5dea0
>[  135.329701] [drm:drm_atomic_commit] commiting ffff880146e5dea0
>[  135.329709] [drm:drm_atomic_state_clear] Clearing atomic state ffff880146e5dea0
>[  135.329711] [drm:drm_atomic_state_free] Freeing atomic state ffff880146e5dea0
>[  135.329726] [drm:edp_panel_on] Turn eDP port A panel power on
>[  135.329734] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  135.875700] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  135.875709] [drm:wait_panel_status] Wait complete
>[  135.875732] [drm:wait_panel_on] Wait for panel power on
>[  135.875748] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  136.084700] [drm:wait_panel_status] Wait complete
>[  136.084718] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[  136.084765] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  136.085870] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  136.086521] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[  136.087160] [drm:intel_dp_start_link_train] clock recovery OK
>[  136.088109] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[  136.089049] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  136.089326] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[  136.089337] [drm:intel_edp_backlight_on] 
>[  136.089339] [drm:intel_panel_enable_backlight] pipe A
>[  136.089378] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  136.089417] [drm:intel_psr_match_conditions] PSR disable by flag
>[  136.089418] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[  136.089425] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[  136.089430] [drm:intel_fbc_update] disabled per chip default
>[  136.089443] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[  136.089447] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[  136.089450] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[  136.089452] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[  136.089453] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[  136.089455] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[  136.089456] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[  136.089457] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[  136.089459] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[  136.089460] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[  136.089462] [drm:check_crtc_state] [CRTC:20]
>[  136.089477] [drm:check_crtc_state] [CRTC:25]
>[  136.089482] [drm:check_crtc_state] [CRTC:30]
>[  136.089485] [drm:check_shared_dpll_state] DPLL 1
>[  136.089487] [drm:check_shared_dpll_state] DPLL 2
>[  136.089489] [drm:check_shared_dpll_state] DPLL 3
>[  136.089494] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[  136.089499] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[  136.089501] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  136.089505] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  136.089508] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[  136.089510] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[  136.089512] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  136.089515] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  136.304688] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304698] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880004d5d240 state to ffff880004d5bd80
>[  136.304703] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880004c6d800 state to ffff880004d5bd80
>[  136.304707] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304713] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304734] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[  136.304745] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304749] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304753] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304757] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880004d5d900 state to ffff880004d5bd80
>[  136.304760] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304763] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304767] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304770] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304773] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304777] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880004d5d0c0 state to ffff880004d5bd80
>[  136.304779] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304782] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304786] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304789] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304792] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304795] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880004d5db40 state to ffff880004d5bd80
>[  136.304798] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304801] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304804] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304807] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304810] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304814] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880004d5d180 state to ffff880004d5bd80
>[  136.304816] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304819] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304822] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304825] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304828] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304832] [drm:drm_atomic_get_plane_state] Added [PLANE:24] ffff880004d5d540 state to ffff880004d5bd80
>[  136.304834] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304837] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304840] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304843] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304846] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304849] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880004d5dd80 state to ffff880004d5bd80
>[  136.304852] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304855] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304858] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304861] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304864] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304867] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880004d5d300 state to ffff880004d5bd80
>[  136.304870] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304873] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304876] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304878] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304882] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304885] [drm:drm_atomic_get_plane_state] Added [PLANE:28] ffff880004d5dcc0 state to ffff880004d5bd80
>[  136.304888] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304891] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304894] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304897] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304900] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304903] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880004d5d6c0 state to ffff880004d5bd80
>[  136.304906] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304908] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304911] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304914] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304917] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304921] [drm:drm_atomic_get_plane_state] Added [PLANE:31] ffff880144219a80 state to ffff880004d5bd80
>[  136.304924] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304927] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304930] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304932] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304936] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880004d5bd80
>[  136.304939] [drm:drm_atomic_get_plane_state] Added [PLANE:32] ffff880144219600 state to ffff880004d5bd80
>[  136.304941] [drm:drm_atomic_check_only] checking ffff880004d5bd80
>[  136.304944] [drm:drm_atomic_commit] commiting ffff880004d5bd80
>[  136.304947] [drm:drm_atomic_state_clear] Clearing atomic state ffff880004d5bd80
>[  136.304950] [drm:drm_atomic_state_free] Freeing atomic state ffff880004d5bd80
>[  136.304955] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[  136.304962] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  136.304966] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  136.304972] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  136.304976] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[  136.304983] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 361310KHz
>[  136.304986] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[  136.304990] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[  136.304993] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[  136.304997] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[  136.305001] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  136.305003] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  136.305006] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[  136.305010] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  136.305014] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  136.305018] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  136.305021] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  136.305023] [drm:intel_dump_pipe_config] requested mode:
>[  136.305029] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  136.305032] [drm:intel_dump_pipe_config] adjusted mode:
>[  136.305036] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  136.305041] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  136.305044] [drm:intel_dump_pipe_config] port clock: 540000
>[  136.305047] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[  136.305051] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  136.305054] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  136.305057] [drm:intel_dump_pipe_config] ips: 0
>[  136.305059] [drm:intel_dump_pipe_config] double wide: 0
>[  136.305063] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[  136.305067] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[  136.305070] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  136.305074] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  136.305078] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[  136.305081] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[  136.305084] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[  136.305088] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  139.094567] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[  139.094609] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007

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Attachments on bug 89127: 113446 | 114181

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