Attachment 113933 Details for Bug 89401 – dmesg

dmesg

dmesg.txt (text/plain), 123.49 KB, created by Ding Heng on 2015-03-03 06:14:32 UTC

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Creator: Ding Heng

Created: 2015-03-03 06:14:32 UTC

Size: 123.49 KB

patch

obsolete

>[    3.844777] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.844783] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.844787] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    3.844791] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.844797] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.844803] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[    3.844808] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.844813] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.844817] [drm:intel_dump_pipe_config] requested mode:
>[    3.844824] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[    3.844828] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.844835] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[    3.844842] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[    3.844846] [drm:intel_dump_pipe_config] port clock: 270000
>[    3.844851] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[    3.844856] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.844861] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.844865] [drm:intel_dump_pipe_config] ips: 0
>[    3.844869] [drm:intel_dump_pipe_config] double wide: 0
>[    3.844879] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[    3.844886] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[    3.844891] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[    3.844896] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[    3.844902] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    3.844908] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[    3.844927] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    3.844933] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[    3.844937] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    3.844941] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    3.844947] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.844952] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.844958] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.844962] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.844966] [drm:intel_dump_pipe_config] requested mode:
>[    3.844973] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    3.844978] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.844985] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    3.844991] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[    3.844996] [drm:intel_dump_pipe_config] port clock: 106500
>[    3.845000] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[    3.845005] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.845010] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.845015] [drm:intel_dump_pipe_config] ips: 0
>[    3.845019] [drm:intel_dump_pipe_config] double wide: 0
>[    3.845153] dracut: error: unexpectedly disconnected from boot status daemon
>[    3.866900] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[    3.866908] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    3.866912] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[    3.866915] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[    3.866919] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.866924] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[    3.866926] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[    3.866971] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[    3.866975] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[    3.866978] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[    3.866982] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    3.866985] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.866987] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    3.866989] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    3.866992] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.866996] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[    3.866999] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.867001] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.867002] [drm:intel_dump_pipe_config] requested mode:
>[    3.867008] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[    3.867009] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.867014] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[    3.867018] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[    3.867020] [drm:intel_dump_pipe_config] port clock: 270000
>[    3.867022] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[    3.867025] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.867028] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.867030] [drm:intel_dump_pipe_config] ips: 0
>[    3.867031] [drm:intel_dump_pipe_config] double wide: 0
>[    3.867040] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[    3.867045] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[    3.867048] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[    3.867050] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[    3.867054] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    3.867058] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[    3.867061] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    3.867064] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[    3.867066] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    3.867068] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    3.867071] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.867074] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.867077] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.867079] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.867081] [drm:intel_dump_pipe_config] requested mode:
>[    3.867085] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    3.867087] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.867092] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    3.867096] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[    3.867098] [drm:intel_dump_pipe_config] port clock: 106500
>[    3.867100] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[    3.867103] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.867105] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.867107] [drm:intel_dump_pipe_config] ips: 0
>[    3.867109] [drm:intel_dump_pipe_config] double wide: 0
>[    3.896857] usb 1-1.4: New USB device found, idVendor=05e3, idProduct=0608
>[    3.896987] usb 1-1.4: New USB device strings: Mfr=0, Product=1, SerialNumber=0
>[    3.897097] usb 1-1.4: Product: USB2.0 Hub
>[    3.899034] hub 1-1.4:1.0: USB hub found
>[    3.899494] hub 1-1.4:1.0: 4 ports detected
>[    4.167971] usb 1-1.4.1: new high-speed USB device number 5 using ehci-pci
>[    4.201615] ACPI: Deprecated procfs I/F for AC is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    4.212437] ACPI: AC Adapter [ADP0] (on-line)
>[    4.242877] wmi: Mapper loaded
>[    4.274866] usb 1-1.4.1: New USB device found, idVendor=0bda, idProduct=579a
>[    4.274985] usb 1-1.4.1: New USB device strings: Mfr=3, Product=1, SerialNumber=2
>[    4.275097] usb 1-1.4.1: Product: Lenovo EasyCamera
>[    4.275171] usb 1-1.4.1: Manufacturer: J58E4O6G7
>[    4.275241] usb 1-1.4.1: SerialNumber: 200901010001
>[    4.285005] ACPI: Deprecated procfs I/F for battery is loaded, please retry with CONFIG_ACPI_PROCFS_POWER cleared
>[    4.289385] ACPI: Battery Slot [BAT0] (battery present)
>[    4.351628] usb 1-1.4.2: new high-speed USB device number 6 using ehci-pci
>[    4.363791] ACPI Warning: SystemIO range 0x0000000000003000-0x000000000000301f conflicts with OpRegion 0x0000000000003000-0x000000000000300f (\_SB_.PCI0.SBUS.SMBI) (20150204/utaddress-258)
>[    4.367168] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
>[    4.367187] r8169 0000:03:00.0: can't disable ASPM; OS doesn't have ASPM control
>[    4.378809] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    4.379131] r8169 0000:03:00.0 (unnamed net_device) (uninitialized): unknown MAC, using family default
>[    4.389380] r8169 0000:03:00.0 (unnamed net_device) (uninitialized): rtl_chipcmd_cond == 1 (loop: 100, delay: 100).
>[    4.392389] [drm:nouveau_display_options] Loading Nouveau with parameters:
>[    4.392392] [drm:nouveau_display_options] ... tv_disable   : 0
>[    4.392394] [drm:nouveau_display_options] ... ignorelid    : 0
>[    4.392396] [drm:nouveau_display_options] ... duallink     : 1
>[    4.392397] [drm:nouveau_display_options] ... nofbaccel    : 0
>[    4.392399] [drm:nouveau_display_options] ... config       : (null)
>[    4.392401] [drm:nouveau_display_options] ... debug        : (null)
>[    4.392403] [drm:nouveau_display_options] ... noaccel      : 0
>[    4.392404] [drm:nouveau_display_options] ... modeset      : -1
>[    4.392406] [drm:nouveau_display_options] ... runpm        : -1
>[    4.392408] [drm:nouveau_display_options] ... vram_pushbuf : 0
>[    4.392410] [drm:nouveau_display_options] ... pstate       : 0
>[    4.392767] nouveau 0000:01:00.0: enabling device (0006 -> 0007)
>[    4.397756] input: PC Speaker as /devices/platform/pcspkr/input/input8
>[    4.406461] nouveau E[  DEVICE][0000:01:00.0] unknown chipset, 0xffffffff
>[    4.410357] nouveau E[     DRM] failed to create 0x00000080, -22
>[    4.425676] r8169 0000:03:00.0 eth1: RTL8168b/8111b at 0xffffc9000064c000, ff:ff:ff:ff:ff:ff, XID 9cf0f8ff IRQ 89
>[    4.429724] r8169 0000:03:00.0 eth1: jumbo features [frames: 4080 bytes, tx checksumming: ko]
>[    4.429741] nouveau: probe of 0000:01:00.0 failed with error -22
>[    4.431993] usb 1-1.4.2: New USB device found, idVendor=0bda, idProduct=0129
>[    4.431997] usb 1-1.4.2: New USB device strings: Mfr=1, Product=2, SerialNumber=3
>[    4.432001] usb 1-1.4.2: Product: USB2.0-CRW
>[    4.432004] usb 1-1.4.2: Manufacturer: Generic
>[    4.432007] usb 1-1.4.2: SerialNumber: 20100201396000000
>[    4.439307] EXT4-fs (sda8): INFO: recovery required on readonly filesystem
>[    4.439310] EXT4-fs (sda8): write access will be enabled during recovery
>[    4.450812] sound hdaudioC0D0: CX20751/2: BIOS auto-probing.
>[    4.452173] sound hdaudioC0D0: autoconfig for CX20751/2: line_outs=1 (0x17/0x0/0x0/0x0/0x0) type:speaker
>[    4.452177] sound hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    4.452181] sound hdaudioC0D0:    hp_outs=1 (0x16/0x0/0x0/0x0/0x0)
>[    4.452184] sound hdaudioC0D0:    mono: mono_out=0x0
>[    4.452186] sound hdaudioC0D0:    inputs:
>[    4.452191] sound hdaudioC0D0:      Internal Mic=0x1a
>[    4.452194] sound hdaudioC0D0:      Mic=0x19
>[    4.455487] sound hdaudioC0D0: Enable sync_write for stable communication
>[    4.515885] usb 1-1.4.3: new full-speed USB device number 7 using ehci-pci
>[    4.548548] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[    4.548557] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    4.548561] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[    4.548564] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[    4.548568] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    4.548573] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[    4.548576] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[    4.548582] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[    4.548586] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[    4.548589] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[    4.548593] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    4.548596] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    4.548598] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    4.548600] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    4.548604] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.548607] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[    4.548610] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    4.548612] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    4.548614] [drm:intel_dump_pipe_config] requested mode:
>[    4.548619] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[    4.548621] [drm:intel_dump_pipe_config] adjusted mode:
>[    4.548626] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[    4.548630] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[    4.548632] [drm:intel_dump_pipe_config] port clock: 270000
>[    4.548634] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[    4.548637] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    4.548640] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.548642] [drm:intel_dump_pipe_config] ips: 0
>[    4.548644] [drm:intel_dump_pipe_config] double wide: 0
>[    4.548652] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[    4.548657] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[    4.548660] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[    4.548662] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[    4.548666] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[    4.548669] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[    4.548673] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    4.548676] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[    4.548678] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    4.548680] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    4.548683] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.548686] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    4.548689] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    4.548691] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    4.548693] [drm:intel_dump_pipe_config] requested mode:
>[    4.548697] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    4.548699] [drm:intel_dump_pipe_config] adjusted mode:
>[    4.548704] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[    4.548708] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[    4.548710] [drm:intel_dump_pipe_config] port clock: 106500
>[    4.548712] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[    4.548715] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    4.548718] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.548719] [drm:intel_dump_pipe_config] ips: 0
>[    4.548721] [drm:intel_dump_pipe_config] double wide: 0
>[    4.584250] iTCO_vendor_support: vendor-support=0
>[    4.591859] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[    4.595077] usb 1-1.4.3: New USB device found, idVendor=0cf3, idProduct=3004
>[    4.595082] usb 1-1.4.3: New USB device strings: Mfr=0, Product=0, SerialNumber=0
>[    4.602797] iTCO_wdt: Found a Bay Trail SoC TCO device (Version=3, TCOBASE=0x0460)
>[    4.619805] Linux video capture interface: v2.00
>[    4.623879] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[    4.632492] uvcvideo: Found UVC 1.00 device Lenovo EasyCamera (0bda:579a)
>[    4.639657] input: Lenovo EasyCamera as /devices/pci0000:00/0000:00:1d.0/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input9
>[    4.644165] usbcore: registered new interface driver uvcvideo
>[    4.644967] r8169 0000:03:00.0 p3p1: renamed from eth1
>[    4.651431] USB Video Class driver (1.1.1)
>[    4.702478] random: nonblocking pool is initialized
>[    4.821083] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[    4.821122] [drm:valleyview_enable_rps] GPLL enabled? yes
>[    4.821127] [drm:valleyview_enable_rps] GPU status: 0x0000c6d0
>[    4.821132] [drm:valleyview_enable_rps] current GPU freq: 312 MHz (198)
>[    4.821137] [drm:valleyview_enable_rps] setting GPU freq to 645 MHz (214)
>[    6.218348] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[    6.218364] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    7.500094] EXT4-fs (sda8): recovery complete
>[    7.516968] EXT4-fs (sda8): mounted filesystem with ordered data mode. Opts: (null)
>[    7.698905] dracut: Checking ext4: /dev/sda8
>[    7.702902] dracut: issuing e2fsck -a  /dev/sda8
>[    7.922762] dracut: /dev/sda8: clean, 871078/22691840 files, 23449109/90749696 blocks
>[    7.927538] dracut: Remounting /dev/sda8 with -o errors=remount-ro,ro
>[    7.984711] EXT4-fs (sda8): mounted filesystem with ordered data mode. Opts: errors=remount-ro
>[    8.081583] dracut: Mounted root filesystem /dev/sda8
>[    8.177320] device-mapper: uevent: version 1.0.3
>[    8.182276] device-mapper: ioctl: 4.30.0-ioctl (2014-12-22) initialised: dm-devel@redhat.com
>[    8.377008] dracut: Switching root
>[    9.353307] init: plymouth-upstart-bridge main process (2457) terminated with status 1
>[    9.356698] init: plymouth-upstart-bridge main process ended, respawning
>[    9.378730] init: plymouth-upstart-bridge main process (2466) terminated with status 1
>[    9.382083] init: plymouth-upstart-bridge main process ended, respawning
>[    9.396801] init: plymouth-upstart-bridge main process (2469) terminated with status 1
>[    9.400137] init: plymouth-upstart-bridge main process ended, respawning
>[    9.414326] init: plymouth-upstart-bridge main process (2471) terminated with status 1
>[    9.417503] init: plymouth-upstart-bridge main process ended, respawning
>[    9.434647] init: plymouth-upstart-bridge main process (2473) terminated with status 1
>[    9.437707] init: plymouth-upstart-bridge main process ended, respawning
>[    9.455862] init: plymouth-upstart-bridge main process (2476) terminated with status 1
>[    9.458983] init: plymouth-upstart-bridge main process ended, respawning
>[    9.473269] init: plymouth-upstart-bridge main process (2479) terminated with status 1
>[    9.476336] init: plymouth-upstart-bridge main process ended, respawning
>[    9.489652] init: plymouth-upstart-bridge main process (2481) terminated with status 1
>[    9.492653] init: plymouth-upstart-bridge main process ended, respawning
>[    9.505965] init: plymouth-upstart-bridge main process (2483) terminated with status 1
>[    9.508916] init: plymouth-upstart-bridge main process ended, respawning
>[    9.522263] init: plymouth-upstart-bridge main process (2485) terminated with status 1
>[    9.525273] init: plymouth-upstart-bridge main process ended, respawning
>[    9.537531] init: plymouth-upstart-bridge main process (2487) terminated with status 1
>[    9.540587] init: plymouth-upstart-bridge respawning too fast, stopped
>[    9.633402] init: ureadahead main process (2459) terminated with status 5
>[   11.822942] systemd-udevd[2594]: starting version 204
>[   13.046454] systemd-udevd[3121]: could not open moddep file '/lib/modules/4.0.0-rc1_drm-intel-testing_820fa2_20150228_+/modules.dep.bin'
>[   13.732637] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[   13.732646] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   13.732650] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[   13.732653] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[   13.732658] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   13.732664] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[   13.732667] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[   13.732673] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[   13.732677] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[   13.732679] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[   13.732683] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   13.732686] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   13.732688] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[   13.732691] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   13.732694] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   13.732698] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[   13.732701] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   13.732703] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   13.732705] [drm:intel_dump_pipe_config] requested mode:
>[   13.732710] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[   13.732712] [drm:intel_dump_pipe_config] adjusted mode:
>[   13.732716] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[   13.732721] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[   13.732723] [drm:intel_dump_pipe_config] port clock: 270000
>[   13.732725] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   13.732728] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   13.732730] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   13.732732] [drm:intel_dump_pipe_config] ips: 0
>[   13.732734] [drm:intel_dump_pipe_config] double wide: 0
>[   13.732742] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[   13.732747] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[   13.732750] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[   13.732753] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[   13.732756] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   13.732760] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   13.732763] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   13.732766] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[   13.732768] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   13.732770] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   13.732773] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   13.732776] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   13.732779] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   13.732781] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   13.732783] [drm:intel_dump_pipe_config] requested mode:
>[   13.732787] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   13.732789] [drm:intel_dump_pipe_config] adjusted mode:
>[   13.732794] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   13.732798] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[   13.732800] [drm:intel_dump_pipe_config] port clock: 106500
>[   13.732802] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[   13.732805] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   13.732807] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   13.732809] [drm:intel_dump_pipe_config] ips: 0
>[   13.732811] [drm:intel_dump_pipe_config] double wide: 0
>[   13.744043] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[   13.744051] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   13.744055] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[   13.744057] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[   13.744062] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   13.744067] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[   13.744069] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[   13.744075] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[   13.744079] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[   13.744081] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[   13.744085] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   13.744088] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   13.744090] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[   13.744092] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   13.744096] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   13.744099] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[   13.744102] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   13.744104] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   13.744106] [drm:intel_dump_pipe_config] requested mode:
>[   13.744111] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[   13.744113] [drm:intel_dump_pipe_config] adjusted mode:
>[   13.744118] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[   13.744122] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[   13.744124] [drm:intel_dump_pipe_config] port clock: 270000
>[   13.744126] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   13.744129] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   13.744132] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   13.744133] [drm:intel_dump_pipe_config] ips: 0
>[   13.744135] [drm:intel_dump_pipe_config] double wide: 0
>[   13.744143] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[   13.744148] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[   13.744151] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[   13.744154] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[   13.744157] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   13.744160] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[   13.744164] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   13.744166] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[   13.744168] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   13.744171] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   13.744174] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   13.744177] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   13.744180] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   13.744182] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   13.744183] [drm:intel_dump_pipe_config] requested mode:
>[   13.744188] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   13.744190] [drm:intel_dump_pipe_config] adjusted mode:
>[   13.744195] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[   13.744199] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[   13.744201] [drm:intel_dump_pipe_config] port clock: 106500
>[   13.744203] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[   13.744206] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   13.744208] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   13.744210] [drm:intel_dump_pipe_config] ips: 0
>[   13.744212] [drm:intel_dump_pipe_config] double wide: 0
>[   14.167666] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE
>[   15.263394] asix 1-1.3:1.0 eth4: renamed from eth0
>[   15.269350] systemd-udevd[3115]: renamed network interface eth0 to eth4
>[   17.073007] Adding 3999740k swap on /dev/sda6.  Priority:-1 extents:1 across:3999740k 
>[   17.398332] asix 1-1.3:1.0 eth4: link down
>[   17.860006] EXT4-fs (sda8): re-mounted. Opts: errors=remount-ro
>[   18.775905] init: plymouth-log main process (3423) terminated with status 1
>[   19.119303] init: idmapd-mounting (/lib/modules/3.18.0_stable_b2776b_20141216_debug+) main process (3351) killed by TERM signal
>[   19.320398] asix 1-1.3:1.0 eth4: link up, 100Mbps, full-duplex, lpa 0xC5E1
>[   20.284062] init: cups main process (3545) killed by HUP signal
>[   20.284106] init: cups main process ended, respawning
>[   20.432443] init: bluetooth main process (3558) terminated with status 1
>[   20.432491] init: bluetooth main process ended, respawning
>[   20.549781] init: bluetooth main process (3606) terminated with status 1
>[   20.549828] init: bluetooth main process ended, respawning
>[   20.613327] init: bluetooth main process (3647) terminated with status 1
>[   20.613372] init: bluetooth main process ended, respawning
>[   20.676550] init: bluetooth main process (3676) terminated with status 1
>[   20.676626] init: bluetooth main process ended, respawning
>[   20.740248] init: bluetooth main process (3700) terminated with status 1
>[   20.740292] init: bluetooth main process ended, respawning
>[   20.801876] init: bluetooth main process (3725) terminated with status 1
>[   20.801922] init: bluetooth main process ended, respawning
>[   20.867133] init: bluetooth main process (3749) terminated with status 1
>[   20.867177] init: bluetooth main process ended, respawning
>[   20.929127] init: bluetooth main process (3778) terminated with status 1
>[   20.929173] init: bluetooth main process ended, respawning
>[   20.992928] init: bluetooth main process (3802) terminated with status 1
>[   20.992974] init: bluetooth main process ended, respawning
>[   21.057417] init: bluetooth main process (3826) terminated with status 1
>[   21.057463] init: bluetooth main process ended, respawning
>[   21.124104] init: bluetooth main process (3853) terminated with status 1
>[   21.124150] init: bluetooth respawning too fast, stopped
>[  141.903214] init: plymouth-stop pre-start process (4274) terminated with status 1
>[  513.157660] package-data-do[6492]: segfault at 170a6 ip 00000000000170a6 sp 00007ffe6854c578 error 14 in python2.7[400000+2bd000]
>[  514.087272] apport[6493]: segfault at 16fe6 ip 0000000000016fe6 sp 00007ffc17d9dbf8 error 14 in python3.4[400000+354000]
>[  514.087333] Process 6493(apport) has RLIMIT_CORE set to 1
>[  514.087339] Aborting core
>[  704.138101] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  704.147912] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[  704.147926] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  704.147934] [drm:intel_edp_backlight_off] 
>[  704.348507] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  704.348876] [drm:edp_panel_off] Turn eDP port C panel power off
>[  704.348884] [drm:wait_panel_off] Wait for panel power off time
>[  704.348891] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  704.392527] [drm:wait_panel_status] Wait complete
>[  704.398555] [drm:intel_dp_link_down] 
>[  704.449689] [drm:g4x_check_srwm] SR watermark: display plane 82, cursor 2
>[  704.449693] [drm:g4x_check_srwm] SR watermark: display plane 162, cursor 2
>[  704.449697] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=111, cursor=2, SR: plane=82, cursor=2
>[  704.449706] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[  704.449717] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[  704.449802] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[  704.449840] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[  704.451595] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[  704.453574] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[  704.453586] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[  704.453592] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[  704.453597] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[  704.453601] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[  704.453606] [drm:check_crtc_state] [CRTC:20]
>[  704.453614] [drm:check_crtc_state] [CRTC:25]
>[  704.453694] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  704.474594] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[  704.474599] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[  704.474615] [drm:intel_display_power_put] disabling dpio-common
>[  704.476641] [drm:intel_display_power_put] disabling display
>[  704.478579] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[  704.478584] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[  704.478588] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[  704.478593] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[  704.478598] [drm:check_crtc_state] [CRTC:20]
>[  704.478604] [drm:check_crtc_state] [CRTC:25]
>[ 1295.670606] perf interrupt took too long (2933 > 2500), lowering kernel.perf_event_max_sample_rate to 50000
>[ 2495.403863] perf interrupt took too long (5110 > 5000), lowering kernel.perf_event_max_sample_rate to 25000
>[ 3634.370024] [drm:i915_gem_open] 
>[ 3634.371964] [drm:i915_gem_open] 
>[ 3634.372530] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3634.372641] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3634.372670] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3634.372687] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3634.372699] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[ 3634.372720] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1]
>[ 3634.372729] [drm:intel_dp_detect] [CONNECTOR:38:eDP-1]
>[ 3634.372770] [drm:intel_display_power_get] enabling display
>[ 3634.374660] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[ 3634.375021] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[ 3634.376577] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[ 3634.378584] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[ 3634.380582] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[ 3634.382585] [drm:intel_display_power_get] enabling dpio-common
>[ 3634.384675] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3634.384682] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[ 3634.384688] [drm:vlv_power_sequencer_pipe] picked pipe A power sequencer for port C
>[ 3634.384713] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[ 3634.384720] [drm:vlv_power_sequencer_kick] kicking pipe A power sequencer for port C
>[ 3634.393226] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[ 3634.711963] [drm:wait_panel_status] Wait complete
>[ 3634.711978] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[ 3634.711985] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[ 3634.805118] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[ 3634.805127] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[ 3634.805132] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[ 3634.805470] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[ 3634.913485] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[ 3634.913887] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[ 3634.913916] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[ 3634.913928] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1] probed modes :
>[ 3634.913936] [drm:drm_mode_debug_printmodeline] Modeline 39:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3634.914030] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[ 3634.914265] [drm:add_framebuffer_internal] [FB:47]
>[ 3635.262104] [drm:drm_mode_setcrtc] [CRTC:20]
>[ 3635.262220] [drm:drm_mode_setcrtc] [CONNECTOR:38:eDP-1]
>[ 3635.262228] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[ 3635.262237] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[ 3635.262243] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3635.262248] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3635.262255] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3635.262290] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3635.262296] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3635.262304] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3635.262311] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3635.262315] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3635.262322] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3635.262327] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3635.262331] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3635.262336] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3635.262341] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3635.262347] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3635.262353] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3635.262357] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3635.262361] [drm:intel_dump_pipe_config] requested mode:
>[ 3635.262373] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3635.262382] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3635.262392] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3635.262403] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3635.262411] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3635.262419] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3635.262428] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3635.262437] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3635.262445] [drm:intel_dump_pipe_config] ips: 0
>[ 3635.262453] [drm:intel_dump_pipe_config] double wide: 0
>[ 3635.270583] [drm:edp_panel_on] Turn eDP port C panel power on
>[ 3635.270593] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[ 3635.270603] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[ 3635.270609] [drm:wait_panel_status] Wait complete
>[ 3635.270617] [drm:wait_panel_on] Wait for panel power on
>[ 3635.270625] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[ 3635.424556] [drm:wait_panel_status] Wait complete
>[ 3635.424567] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[ 3635.424579] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[ 3635.424706] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3635.424720] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[ 3635.429570] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[ 3635.430528] [drm:intel_dp_start_link_train] clock recovery OK
>[ 3635.431785] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[ 3635.432199] [drm:g4x_check_srwm] SR watermark: display plane 56, cursor 2
>[ 3635.432206] [drm:g4x_check_srwm] SR watermark: display plane 109, cursor 2
>[ 3635.432212] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=2, cursor=2, SR: plane=56, cursor=2
>[ 3635.432223] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[ 3635.432253] [drm:intel_edp_backlight_on] 
>[ 3635.432258] [drm:intel_panel_enable_backlight] pipe A
>[ 3635.432290] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[ 3635.432311] [drm:intel_psr_enable] PSR not supported by this panel
>[ 3635.432325] [drm:i9xx_update_primary_plane] Writing base 00046000 00000000 0 0 5504
>[ 3635.432348] [drm:intel_connector_check_state] [CONNECTOR:38:eDP-1]
>[ 3635.432365] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 3635.432374] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 3635.432381] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 3635.432389] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 3635.432429] [drm:check_crtc_state] [CRTC:20]
>[ 3635.432468] [drm:check_crtc_state] [CRTC:25]
>[ 3637.938723] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[ 3637.938740] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[ 3640.436919] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[ 3640.436932] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[ 3640.436938] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [NOCRTC]
>[ 3640.436943] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 3640.436948] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3640.436953] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 3640.436958] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 3640.436964] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[ 3640.436976] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 3640.450635] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3640.450654] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[ 3640.450664] [drm:intel_edp_backlight_off] 
>[ 3640.651868] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[ 3640.652322] [drm:edp_panel_off] Turn eDP port C panel power off
>[ 3640.652332] [drm:wait_panel_off] Wait for panel power off time
>[ 3640.652341] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[ 3640.696334] [drm:wait_panel_status] Wait complete
>[ 3640.701855] [drm:intel_dp_link_down] 
>[ 3640.753147] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 3640.753159] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[ 3640.753230] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[ 3640.754812] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[ 3640.756769] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[ 3640.758766] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[ 3640.760788] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 3640.760798] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 3640.760805] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 3640.760811] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 3640.760818] [drm:check_crtc_state] [CRTC:20]
>[ 3640.760826] [drm:check_crtc_state] [CRTC:25]
>[ 3640.763569] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3640.763590] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3640.763602] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[ 3640.763611] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:VGA-1]
>[ 3640.763618] [drm:intel_crt_detect] [CONNECTOR:28:VGA-1] force=1
>[ 3640.763646] [drm:valleyview_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0x40000
>[ 3640.766768] [drm:valleyview_crt_detect_hotplug] valleyview hotplug adpa=0x3040000, result 1
>[ 3640.766774] [drm:intel_crt_detect] CRT detected via hotplug
>[ 3640.779469] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[ 3640.779523] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:28:VGA-1] probed modes :
>[ 3640.779532] [drm:drm_mode_debug_printmodeline] Modeline 45:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3640.779539] [drm:drm_mode_debug_printmodeline] Modeline 77:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 3640.779546] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 3640.779553] [drm:drm_mode_debug_printmodeline] Modeline 65:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[ 3640.779561] [drm:drm_mode_debug_printmodeline] Modeline 48:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[ 3640.779568] [drm:drm_mode_debug_printmodeline] Modeline 59:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[ 3640.779575] [drm:drm_mode_debug_printmodeline] Modeline 60:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[ 3640.779582] [drm:drm_mode_debug_printmodeline] Modeline 61:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[ 3640.779589] [drm:drm_mode_debug_printmodeline] Modeline 62:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[ 3640.779596] [drm:drm_mode_debug_printmodeline] Modeline 49:"800x600" 85 56250 800 832 896 1048 600 601 604 631 0x40 0x5
>[ 3640.779603] [drm:drm_mode_debug_printmodeline] Modeline 63:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[ 3640.779610] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[ 3640.779617] [drm:drm_mode_debug_printmodeline] Modeline 51:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[ 3640.779624] [drm:drm_mode_debug_printmodeline] Modeline 52:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[ 3640.779632] [drm:drm_mode_debug_printmodeline] Modeline 50:"640x480" 85 36000 640 696 752 832 480 481 484 509 0x40 0xa
>[ 3640.779639] [drm:drm_mode_debug_printmodeline] Modeline 53:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 3640.779646] [drm:drm_mode_debug_printmodeline] Modeline 54:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[ 3640.779653] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 3640.779660] [drm:drm_mode_debug_printmodeline] Modeline 56:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 3640.779667] [drm:drm_mode_debug_printmodeline] Modeline 57:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 3640.779685] [drm:drm_mode_getconnector] [CONNECTOR:28:?]
>[ 3640.779842] [drm:add_framebuffer_internal] [FB:47]
>[ 3640.809359] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100800, dig 0x00000000
>[ 3640.809369] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[ 3640.809374] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 1 - cnt: 0
>[ 3640.809378] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[ 3640.809693] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[ 3640.809731] [drm:i915_hotplug_work_func] Connector VGA-1 (pin 1) received hotplug event.
>[ 3640.809739] [drm:intel_crt_detect] [CONNECTOR:28:VGA-1] force=0
>[ 3640.809815] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[ 3640.809824] [drm:valleyview_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0x3040000
>[ 3640.813806] [drm:valleyview_crt_detect_hotplug] valleyview hotplug adpa=0x3040000, result 1
>[ 3640.813814] [drm:intel_crt_detect] CRT detected via hotplug
>[ 3640.868949] [drm:drm_mode_setcrtc] [CRTC:20]
>[ 3640.868971] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[ 3640.868979] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[ 3640.868987] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 3640.868992] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 3640.868999] [drm:drm_mode_debug_printmodeline] Modeline 58:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3640.869006] [drm:drm_mode_debug_printmodeline] Modeline 66:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3640.869012] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[ 3640.869017] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:20]
>[ 3640.869022] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 3640.869027] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 3640.869031] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 3640.869037] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[ 3640.869044] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3640.869050] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3640.869056] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3640.869060] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3640.869065] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3640.869070] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3640.869076] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3640.869081] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3640.869086] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3640.869090] [drm:intel_dump_pipe_config] requested mode:
>[ 3640.869097] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3640.869101] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3640.869108] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3640.869115] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[ 3640.869119] [drm:intel_dump_pipe_config] port clock: 106500
>[ 3640.869124] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[ 3640.869129] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3640.869134] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3640.869138] [drm:intel_dump_pipe_config] ips: 0
>[ 3640.869143] [drm:intel_dump_pipe_config] double wide: 0
>[ 3640.871713] [drm:g4x_check_srwm] SR watermark: display plane 82, cursor 2
>[ 3640.871720] [drm:g4x_check_srwm] SR watermark: display plane 162, cursor 2
>[ 3640.871726] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=111, cursor=2, B: plane=2, cursor=2, SR: plane=82, cursor=2
>[ 3640.871737] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[ 3640.871764] [drm:i9xx_update_primary_plane] Writing base 00A4E000 00000000 0 0 5760
>[ 3640.871790] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[ 3640.871802] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 3640.871810] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 3640.871817] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 3640.871854] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 3640.871861] [drm:check_crtc_state] [CRTC:20]
>[ 3640.871893] [drm:check_crtc_state] [CRTC:25]
>[ 3645.876188] [drm:add_framebuffer_internal] [FB:66]
>[ 3645.964733] [drm:drm_mode_setcrtc] [CRTC:20]
>[ 3645.964756] [drm:drm_mode_setcrtc] [CONNECTOR:28:VGA-1]
>[ 3645.964763] [drm:intel_crtc_set_config] [CRTC:20] [FB:66] #connectors=1 (x y) (0 0)
>[ 3645.964771] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 3645.964779] [drm:drm_mode_debug_printmodeline] Modeline 66:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3645.964787] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 3645.964792] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1
>[ 3645.964798] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:20]
>[ 3645.964805] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3645.964812] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3645.964819] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3645.964825] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3645.964829] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3645.964833] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3645.964839] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3645.964845] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3645.964850] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3645.964855] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3645.964859] [drm:intel_dump_pipe_config] requested mode:
>[ 3645.964866] [drm:drm_mode_debug_printmodeline] Modeline 0:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 3645.964870] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3645.964877] [drm:drm_mode_debug_printmodeline] Modeline 0:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 3645.964883] [drm:intel_dump_crtc_timings] crtc timings: 135000 1280 1296 1440 1688 1024 1025 1028 1066, type: 0x40 flags: 0x5
>[ 3645.964888] [drm:intel_dump_pipe_config] port clock: 135000
>[ 3645.964892] [drm:intel_dump_pipe_config] pipe src size: 1280x1024
>[ 3645.964897] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3645.964902] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3645.964907] [drm:intel_dump_pipe_config] ips: 0
>[ 3645.964911] [drm:intel_dump_pipe_config] double wide: 0
>[ 3645.965013] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 3645.987172] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 3645.987183] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[ 3645.996018] [drm:g4x_check_srwm] SR watermark: display plane 104, cursor 2
>[ 3645.996026] [drm:g4x_check_srwm] SR watermark: display plane 205, cursor 2
>[ 3645.996032] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=140, cursor=2, B: plane=2, cursor=2, SR: plane=104, cursor=2
>[ 3645.996043] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[ 3645.996069] [drm:i9xx_update_primary_plane] Writing base 00F40000 00000000 0 0 5120
>[ 3645.996094] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[ 3645.996106] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 3645.996114] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 3645.996120] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 3645.996127] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 3645.996133] [drm:check_crtc_state] [CRTC:20]
>[ 3645.996164] [drm:check_crtc_state] [CRTC:25]
>[ 3650.659442] [drm:i9xx_update_primary_plane] Writing base 00F40000 00000000 0 0 5120
>[ 3650.659563] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[ 3650.659569] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 3650.659574] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 3650.659579] [drm:drm_mode_debug_printmodeline] Modeline 44:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3650.659582] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1
>[ 3650.659584] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 3650.659587] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [NOCRTC]
>[ 3650.659589] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 3650.659592] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3650.659594] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 3650.659596] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 3650.659600] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3650.659604] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3650.659607] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3650.659612] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3650.659616] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3650.659618] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3650.659622] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3650.659625] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3650.659627] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3650.659629] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3650.659633] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3650.659636] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3650.659639] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3650.659641] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3650.659643] [drm:intel_dump_pipe_config] requested mode:
>[ 3650.659648] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3650.659650] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3650.659654] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3650.659658] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3650.659660] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3650.659663] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3650.659665] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3650.659668] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3650.659670] [drm:intel_dump_pipe_config] ips: 0
>[ 3650.659672] [drm:intel_dump_pipe_config] double wide: 0
>[ 3650.659679] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 3650.679044] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 3650.679048] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[ 3650.679068] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[ 3650.681027] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[ 3650.682984] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[ 3650.684982] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[ 3650.687912] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3650.687917] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[ 3650.687924] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[ 3650.687927] [drm:wait_panel_status] Wait complete
>[ 3650.687936] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[ 3650.687939] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[ 3650.781088] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[ 3650.781091] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[ 3650.781094] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[ 3650.781133] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[ 3650.889471] [drm:edp_panel_on] Turn eDP port C panel power on
>[ 3650.889479] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[ 3650.889487] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[ 3650.889490] [drm:wait_panel_status] Wait complete
>[ 3650.889496] [drm:wait_panel_on] Wait for panel power on
>[ 3650.889502] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[ 3651.043562] [drm:wait_panel_status] Wait complete
>[ 3651.043569] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[ 3651.043579] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[ 3651.043716] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3651.043727] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[ 3651.044682] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[ 3651.045431] [drm:intel_dp_start_link_train] clock recovery OK
>[ 3651.046722] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[ 3651.047171] [drm:g4x_check_srwm] SR watermark: display plane 56, cursor 2
>[ 3651.047174] [drm:g4x_check_srwm] SR watermark: display plane 109, cursor 2
>[ 3651.047178] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=2, cursor=2, SR: plane=56, cursor=2
>[ 3651.047187] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[ 3651.047214] [drm:intel_edp_backlight_on] 
>[ 3651.047217] [drm:intel_panel_enable_backlight] pipe A
>[ 3651.047246] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[ 3651.047265] [drm:intel_psr_enable] PSR not supported by this panel
>[ 3651.047277] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3651.047303] [drm:intel_connector_check_state] [CONNECTOR:38:eDP-1]
>[ 3651.047317] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 3651.047323] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 3651.047328] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 3651.047333] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 3651.047338] [drm:check_crtc_state] [CRTC:20]
>[ 3651.047374] [drm:check_crtc_state] [CRTC:25]
>[ 3651.047387] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[ 3651.047393] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 3651.047396] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=1, fb_changed=0
>[ 3651.047398] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 3651.047401] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3651.047404] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3651.047406] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 3651.047409] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 3651.047412] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[ 3651.047417] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3651.047421] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3651.047424] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[ 3651.047426] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[ 3651.047428] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3651.047432] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3651.047434] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3651.047437] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3651.047440] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3651.047441] [drm:intel_dump_pipe_config] requested mode:
>[ 3651.047447] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3651.047448] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3651.047453] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3651.047457] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[ 3651.047459] [drm:intel_dump_pipe_config] port clock: 106500
>[ 3651.047461] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[ 3651.047464] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3651.047467] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3651.047469] [drm:intel_dump_pipe_config] ips: 0
>[ 3651.047471] [drm:intel_dump_pipe_config] double wide: 0
>[ 3651.048536] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 3651.048540] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=111, cursor=2, SR: plane=0, cursor=0
>[ 3651.048566] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3651.048585] [drm:intel_connector_check_state] [CONNECTOR:38:eDP-1]
>[ 3651.048593] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[ 3651.048604] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 3651.048609] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 3651.048614] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 3651.048619] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 3651.048624] [drm:check_crtc_state] [CRTC:20]
>[ 3651.048658] [drm:check_crtc_state] [CRTC:25]
>[ 3651.049192] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=3906/3906
>[ 3651.049209] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[ 3651.066425] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3651.066526] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3651.066582] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[ 3651.066593] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[ 3651.066599] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3651.066604] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3651.066611] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3651.066618] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3651.066623] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3651.066631] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3651.066638] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3651.066643] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3651.066649] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3651.066654] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3651.066659] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3651.066663] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3651.066669] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3651.066675] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3651.066681] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3651.066685] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3651.066689] [drm:intel_dump_pipe_config] requested mode:
>[ 3651.066697] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3651.066701] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3651.066708] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3651.066715] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3651.066719] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3651.066724] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3651.066729] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3651.066734] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3651.066738] [drm:intel_dump_pipe_config] ips: 0
>[ 3651.066743] [drm:intel_dump_pipe_config] double wide: 0
>[ 3651.066752] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[ 3651.066759] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[ 3651.066765] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3651.066770] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3651.066776] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[ 3651.066782] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3651.066788] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3651.066793] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[ 3651.066798] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[ 3651.066802] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3651.066808] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3651.066813] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3651.066819] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3651.066823] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3651.066827] [drm:intel_dump_pipe_config] requested mode:
>[ 3651.066834] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3651.066839] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3651.066845] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3651.066852] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[ 3651.066857] [drm:intel_dump_pipe_config] port clock: 106500
>[ 3651.066861] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[ 3651.066866] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3651.066871] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3651.066876] [drm:intel_dump_pipe_config] ips: 0
>[ 3651.066880] [drm:intel_dump_pipe_config] double wide: 0
>[ 3651.869758] [drm:i915_gem_open] 
>[ 3651.871140] [drm:i915_gem_open] 
>[ 3651.871608] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3651.871634] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3651.871654] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3651.871671] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3651.871683] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[ 3651.871692] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1]
>[ 3651.871698] [drm:intel_dp_detect] [CONNECTOR:38:eDP-1]
>[ 3651.872120] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[ 3651.872539] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[ 3651.872567] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[ 3651.872578] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1] probed modes :
>[ 3651.872586] [drm:drm_mode_debug_printmodeline] Modeline 39:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3651.872604] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[ 3651.872727] [drm:add_framebuffer_internal] [FB:47]
>[ 3651.945333] [drm:drm_mode_setcrtc] [CRTC:20]
>[ 3651.945356] [drm:drm_mode_setcrtc] [CONNECTOR:38:eDP-1]
>[ 3651.945364] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[ 3651.945373] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[ 3651.945379] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3651.945385] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3651.945392] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3651.945399] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3651.945404] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3651.945412] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3651.945418] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3651.945423] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3651.945430] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3651.945435] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3651.945440] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3651.945444] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3651.945450] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3651.945456] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3651.945462] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3651.945466] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3651.945470] [drm:intel_dump_pipe_config] requested mode:
>[ 3651.945478] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3651.945482] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3651.945489] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3651.945496] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3651.945500] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3651.945504] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3651.945510] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3651.945515] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3651.945519] [drm:intel_dump_pipe_config] ips: 0
>[ 3651.945523] [drm:intel_dump_pipe_config] double wide: 0
>[ 3651.945590] [drm:i9xx_update_primary_plane] Writing base 00A54000 00000000 0 0 5504
>[ 3654.376094] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[ 3654.376111] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[ 3655.967893] [drm:i9xx_update_primary_plane] Writing base 00A54000 00000000 0 0 5504
>[ 3655.967991] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3655.968045] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[ 3655.968053] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[ 3655.968056] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3655.968059] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3655.968064] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3655.968068] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3655.968071] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3655.968077] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3655.968080] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3655.968083] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3655.968086] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3655.968089] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3655.968091] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3655.968143] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3655.968146] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3655.968150] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3655.968153] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3655.968155] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3655.968157] [drm:intel_dump_pipe_config] requested mode:
>[ 3655.968162] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3655.968164] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3655.968169] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3655.968173] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3655.968175] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3655.968177] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3655.968180] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3655.968182] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3655.968184] [drm:intel_dump_pipe_config] ips: 0
>[ 3655.968186] [drm:intel_dump_pipe_config] double wide: 0
>[ 3655.968232] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3655.982206] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[ 3655.982215] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[ 3655.982219] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3655.982221] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3655.982226] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[ 3655.982231] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3655.982235] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3655.982238] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[ 3655.982240] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[ 3655.982242] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3655.982246] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3655.982249] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3655.982252] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3655.982254] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3655.982256] [drm:intel_dump_pipe_config] requested mode:
>[ 3655.982261] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3655.982263] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3655.982267] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3655.982272] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[ 3655.982274] [drm:intel_dump_pipe_config] port clock: 106500
>[ 3655.982276] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[ 3655.982279] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3655.982282] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3655.982284] [drm:intel_dump_pipe_config] ips: 0
>[ 3655.982285] [drm:intel_dump_pipe_config] double wide: 0
>[ 3655.997185] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3655.997288] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3655.997345] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[ 3655.997355] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[ 3655.997361] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3655.997366] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3655.997373] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3655.997380] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3655.997385] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3655.997393] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3655.997399] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3655.997404] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3655.997410] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3655.997416] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3655.997420] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3655.997425] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3655.997430] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3655.997436] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3655.997442] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3655.997447] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3655.997451] [drm:intel_dump_pipe_config] requested mode:
>[ 3655.997459] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3655.997463] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3655.997470] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3655.997476] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3655.997481] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3655.997486] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3655.997491] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3655.997496] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3655.997500] [drm:intel_dump_pipe_config] ips: 0
>[ 3655.997504] [drm:intel_dump_pipe_config] double wide: 0
>[ 3655.997514] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[ 3655.997521] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[ 3655.997526] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3655.997532] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3655.997537] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[ 3655.997543] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3655.997550] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3655.997555] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[ 3655.997559] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[ 3655.997563] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3655.997569] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3655.997575] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3655.997580] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3655.997585] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3655.997589] [drm:intel_dump_pipe_config] requested mode:
>[ 3655.997596] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3655.997600] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3655.997607] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3655.997614] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[ 3655.997618] [drm:intel_dump_pipe_config] port clock: 106500
>[ 3655.997623] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[ 3655.997628] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3655.997633] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3655.997637] [drm:intel_dump_pipe_config] ips: 0
>[ 3655.997642] [drm:intel_dump_pipe_config] double wide: 0
>[ 3656.937667] [drm:i915_gem_open] 
>[ 3656.938791] [drm:i915_gem_open] 
>[ 3656.939509] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3656.939535] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3656.939556] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3656.939572] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[ 3656.939584] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[ 3656.939594] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1]
>[ 3656.939599] [drm:intel_dp_detect] [CONNECTOR:38:eDP-1]
>[ 3656.939646] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 3656.939661] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[ 3656.940140] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[ 3656.940560] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[ 3656.940593] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[ 3656.940605] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1] probed modes :
>[ 3656.940613] [drm:drm_mode_debug_printmodeline] Modeline 39:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3656.940636] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[ 3656.940773] [drm:add_framebuffer_internal] [FB:47]
>[ 3657.013211] [drm:drm_mode_setcrtc] [CRTC:20]
>[ 3657.013233] [drm:drm_mode_setcrtc] [CONNECTOR:38:eDP-1]
>[ 3657.013241] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[ 3657.013250] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[ 3657.013256] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3657.013261] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3657.013268] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3657.013275] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3657.013280] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3657.013288] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3657.013294] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3657.013299] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3657.013305] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3657.013311] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3657.013315] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3657.013319] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3657.013325] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3657.013331] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3657.013337] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3657.013341] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3657.013345] [drm:intel_dump_pipe_config] requested mode:
>[ 3657.013353] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3657.013357] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3657.013364] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3657.013370] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3657.013375] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3657.013379] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3657.013384] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3657.013389] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3657.013394] [drm:intel_dump_pipe_config] ips: 0
>[ 3657.013398] [drm:intel_dump_pipe_config] double wide: 0
>[ 3657.013466] [drm:i9xx_update_primary_plane] Writing base 00A51000 00000000 0 0 5504
>[ 3658.602054] [drm:i9xx_update_primary_plane] Writing base 00A51000 00000000 0 0 5504
>[ 3658.602213] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3658.602332] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[ 3658.602339] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[ 3658.602343] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3658.602346] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3658.602350] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3658.602439] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3658.602442] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3658.602448] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3658.602451] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3658.602454] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3658.602457] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3658.602460] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3658.602462] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3658.602465] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3658.602468] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3658.602472] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3658.602475] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3658.602477] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3658.602479] [drm:intel_dump_pipe_config] requested mode:
>[ 3658.602485] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3658.602486] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3658.602491] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3658.602495] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3658.602497] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3658.602499] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3658.602502] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3658.602505] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3658.602507] [drm:intel_dump_pipe_config] ips: 0
>[ 3658.602509] [drm:intel_dump_pipe_config] double wide: 0
>[ 3658.602555] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3658.616545] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[ 3658.616554] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[ 3658.616558] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3658.616561] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3658.616565] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[ 3658.616570] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3658.616574] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3658.616578] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[ 3658.616580] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[ 3658.616582] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3658.616585] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3658.616588] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3658.616591] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3658.616593] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3658.616595] [drm:intel_dump_pipe_config] requested mode:
>[ 3658.616600] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3658.616602] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3658.616607] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3658.616611] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[ 3658.616621] [drm:intel_dump_pipe_config] port clock: 106500
>[ 3658.616624] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[ 3658.616626] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3658.616629] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3658.616631] [drm:intel_dump_pipe_config] ips: 0
>[ 3658.616633] [drm:intel_dump_pipe_config] double wide: 0
>[ 3658.631918] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3658.632019] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[ 3658.632076] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[ 3658.632085] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[ 3658.632091] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3658.632097] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3658.632103] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 3658.632111] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[ 3658.632116] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[ 3658.632124] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[ 3658.632130] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[ 3658.632135] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[ 3658.632142] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[ 3658.632147] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[ 3658.632151] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 3658.632156] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[ 3658.632162] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3658.632168] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[ 3658.632173] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3658.632178] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3658.632182] [drm:intel_dump_pipe_config] requested mode:
>[ 3658.632189] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3658.632194] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3658.632201] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[ 3658.632207] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[ 3658.632212] [drm:intel_dump_pipe_config] port clock: 270000
>[ 3658.632216] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[ 3658.632222] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3658.632227] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3658.632231] [drm:intel_dump_pipe_config] ips: 0
>[ 3658.632235] [drm:intel_dump_pipe_config] double wide: 0
>[ 3658.632245] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[ 3658.632252] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[ 3658.632289] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[ 3658.632295] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[ 3658.632301] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[ 3658.632308] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[ 3658.632314] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 3658.632319] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[ 3658.632324] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[ 3658.632328] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 3658.632334] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3658.632339] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 3658.632345] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[ 3658.632349] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 3658.632353] [drm:intel_dump_pipe_config] requested mode:
>[ 3658.632360] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3658.632365] [drm:intel_dump_pipe_config] adjusted mode:
>[ 3658.632372] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[ 3658.632378] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[ 3658.632383] [drm:intel_dump_pipe_config] port clock: 106500
>[ 3658.632387] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[ 3658.632392] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 3658.632397] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 3658.632402] [drm:intel_dump_pipe_config] ips: 0
>[ 3658.632406] [drm:intel_dump_pipe_config] double wide: 0
>[ 3659.444416] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[ 3659.444432] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[ 4260.308999] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 4260.319385] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[ 4260.319399] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[ 4260.319406] [drm:intel_edp_backlight_off] 
>[ 4260.519777] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[ 4260.520275] [drm:edp_panel_off] Turn eDP port C panel power off
>[ 4260.520282] [drm:wait_panel_off] Wait for panel power off time
>[ 4260.520289] [drm:wait_panel_status] mask b0000000 value 00000000 status e0000003 control abcd0000
>[ 4260.564107] [drm:wait_panel_status] Wait complete
>[ 4260.569798] [drm:intel_dp_link_down] 
>[ 4260.621152] [drm:g4x_check_srwm] SR watermark: display plane 82, cursor 2
>[ 4260.621156] [drm:g4x_check_srwm] SR watermark: display plane 162, cursor 2
>[ 4260.621160] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=111, cursor=2, SR: plane=82, cursor=2
>[ 4260.621169] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[ 4260.621179] [drm:intel_display_power_put] disabling dpio-tx-c-23
>[ 4260.622851] [drm:intel_display_power_put] disabling dpio-tx-c-01
>[ 4260.624854] [drm:intel_display_power_put] disabling dpio-tx-b-23
>[ 4260.626852] [drm:intel_display_power_put] disabling dpio-tx-b-01
>[ 4260.628867] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[ 4260.628878] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 4260.628884] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 4260.628889] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 4260.628893] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 4260.628898] [drm:check_crtc_state] [CRTC:20]
>[ 4260.628906] [drm:check_crtc_state] [CRTC:25]
>[ 4260.628944] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 4260.653893] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[ 4260.653899] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=2, cursor=2, B: plane=2, cursor=2, SR: plane=0, cursor=0
>[ 4260.653914] [drm:intel_display_power_put] disabling dpio-common
>[ 4260.655893] [drm:intel_display_power_put] disabling display
>[ 4260.657901] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[ 4260.657907] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[ 4260.657912] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[ 4260.657916] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[ 4260.657921] [drm:check_crtc_state] [CRTC:20]
>[ 4260.657927] [drm:check_crtc_state] [CRTC:25]
>[ 4260.658063] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=3906/3906
>[13583.465527] [drm:i915_gem_open] 
>[13583.466554] [drm:i915_gem_open] 
>[13583.466949] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[13583.466975] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[13583.466995] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[13583.467011] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[4] ENCODERS[4]
>[13583.467023] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[13583.467033] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1]
>[13583.467038] [drm:intel_dp_detect] [CONNECTOR:38:eDP-1]
>[13583.467048] [drm:intel_display_power_get] enabling display
>[13583.468230] [drm:i915_redisable_vga_power_on] Something enabled VGA plane, disabling it
>[13583.468544] [drm:intel_display_power_get] enabling dpio-tx-b-01
>[13583.470203] [drm:intel_display_power_get] enabling dpio-tx-b-23
>[13583.472211] [drm:intel_display_power_get] enabling dpio-tx-c-01
>[13583.474221] [drm:intel_display_power_get] enabling dpio-tx-c-23
>[13583.476213] [drm:intel_display_power_get] enabling dpio-common
>[13583.478226] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[13583.478233] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[13583.478239] [drm:vlv_power_sequencer_pipe] picked pipe A power sequencer for port C
>[13583.478252] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x87d00001, PP_OFF 0x1f40001, PP_DIV 0x270f05
>[13583.478259] [drm:vlv_power_sequencer_kick] kicking pipe A power sequencer for port C
>[13583.484853] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000000
>[13583.814935] [drm:wait_panel_status] Wait complete
>[13583.814953] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[13583.814961] [drm:edp_panel_vdd_on] eDP port C panel power wasn't enabled
>[13583.908399] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00100000, dig 0x00000000
>[13583.908431] [drm:intel_hpd_irq_handler] digital hpd port C - long
>[13583.908449] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 5 - cnt: 0
>[13583.908555] [drm:intel_dp_hpd_pulse] ignoring long hpd on eDP port C
>[13584.016589] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[13584.017039] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[13584.017069] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[13584.017081] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:38:eDP-1] probed modes :
>[13584.017089] [drm:drm_mode_debug_printmodeline] Modeline 39:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[13584.017111] [drm:drm_mode_getconnector] [CONNECTOR:38:?]
>[13584.017247] [drm:add_framebuffer_internal] [FB:47]
>[13584.089246] [drm:drm_mode_setcrtc] [CRTC:20]
>[13584.089269] [drm:drm_mode_setcrtc] [CONNECTOR:38:eDP-1]
>[13584.089277] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[13584.089286] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[13584.089293] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[13584.089298] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[13584.089305] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[13584.089312] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[13584.089317] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[13584.089325] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[13584.089331] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[13584.089336] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[13584.089343] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[13584.089348] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[13584.089353] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[13584.089357] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[13584.089363] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13584.089369] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[13584.089374] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13584.089379] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[13584.089383] [drm:intel_dump_pipe_config] requested mode:
>[13584.089390] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[13584.089395] [drm:intel_dump_pipe_config] adjusted mode:
>[13584.089402] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[13584.089408] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[13584.089413] [drm:intel_dump_pipe_config] port clock: 270000
>[13584.089417] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[13584.089422] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13584.089427] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13584.089432] [drm:intel_dump_pipe_config] ips: 0
>[13584.089436] [drm:intel_dump_pipe_config] double wide: 0
>[13584.095875] [drm:edp_panel_on] Turn eDP port C panel power on
>[13584.095885] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[13584.095894] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[13584.095900] [drm:wait_panel_status] Wait complete
>[13584.095908] [drm:wait_panel_on] Wait for panel power on
>[13584.095916] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[13584.250279] [drm:wait_panel_status] Wait complete
>[13584.250293] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[13584.250305] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[13584.250334] [drm:edp_panel_vdd_on] Turning eDP port C VDD on
>[13584.250347] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[13584.254988] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[13584.255953] [drm:intel_dp_start_link_train] clock recovery OK
>[13584.257209] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[13584.257626] [drm:g4x_check_srwm] SR watermark: display plane 56, cursor 2
>[13584.257633] [drm:g4x_check_srwm] SR watermark: display plane 109, cursor 2
>[13584.257639] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=2, cursor=2, SR: plane=56, cursor=2
>[13584.257650] [drm:intel_set_memory_cxsr] memory self-refresh is enabled
>[13584.257669] [drm:intel_edp_backlight_on] 
>[13584.257674] [drm:intel_panel_enable_backlight] pipe A
>[13584.257683] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[13584.257705] [drm:intel_psr_enable] PSR not supported by this panel
>[13584.257719] [drm:i9xx_update_primary_plane] Writing base 00A51000 00000000 0 0 5504
>[13584.257745] [drm:intel_connector_check_state] [CONNECTOR:38:eDP-1]
>[13584.257762] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[13584.257771] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[13584.257779] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[13584.257786] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[13584.257795] [drm:check_crtc_state] [CRTC:20]
>[13584.257864] [drm:check_crtc_state] [CRTC:25]
>[13586.762934] [drm:edp_panel_vdd_off_sync] Turning eDP port C VDD off
>[13586.762951] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[13587.428721] [drm:i9xx_update_primary_plane] Writing base 00A51000 00000000 0 0 5504
>[13587.428837] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[13587.428844] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[13587.428848] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[13587.428851] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[13587.428855] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[13587.428860] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[13587.428862] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[13587.428868] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[13587.428872] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[13587.428875] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[13587.428878] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[13587.428881] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[13587.428883] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[13587.428886] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[13587.428889] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13587.428893] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[13587.428896] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13587.428900] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[13587.428901] [drm:intel_dump_pipe_config] requested mode:
>[13587.428907] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[13587.428908] [drm:intel_dump_pipe_config] adjusted mode:
>[13587.428913] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[13587.428917] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[13587.428919] [drm:intel_dump_pipe_config] port clock: 270000
>[13587.428922] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[13587.428924] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13587.428927] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13587.428929] [drm:intel_dump_pipe_config] ips: 0
>[13587.428931] [drm:intel_dump_pipe_config] double wide: 0
>[13587.428977] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[13587.442684] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[13587.442693] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=1, fb_changed=0
>[13587.442697] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[13587.442699] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[13587.442704] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[13587.442709] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[13587.442713] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[13587.442716] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[13587.442718] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[13587.442720] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[13587.442724] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13587.442727] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13587.442730] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13587.442732] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[13587.442734] [drm:intel_dump_pipe_config] requested mode:
>[13587.442739] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[13587.442741] [drm:intel_dump_pipe_config] adjusted mode:
>[13587.442746] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[13587.442750] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[13587.442752] [drm:intel_dump_pipe_config] port clock: 106500
>[13587.442754] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[13587.442757] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13587.442759] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13587.442761] [drm:intel_dump_pipe_config] ips: 0
>[13587.442763] [drm:intel_dump_pipe_config] double wide: 0
>[13587.443846] [drm:intel_set_memory_cxsr] memory self-refresh is disabled
>[13587.443850] [drm:valleyview_update_wm] Setting FIFO watermarks - A: plane=109, cursor=2, B: plane=111, cursor=2, SR: plane=0, cursor=0
>[13587.443880] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[13587.443901] [drm:intel_connector_check_state] [CONNECTOR:38:eDP-1]
>[13587.443910] [drm:intel_connector_check_state] [CONNECTOR:28:VGA-1]
>[13587.443920] [drm:check_encoder_state] [ENCODER:29:DAC-29]
>[13587.443926] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[13587.443931] [drm:check_encoder_state] [ENCODER:35:TMDS-35]
>[13587.443936] [drm:check_encoder_state] [ENCODER:37:TMDS-37]
>[13587.443942] [drm:check_crtc_state] [CRTC:20]
>[13587.443976] [drm:check_crtc_state] [CRTC:25]
>[13587.444103] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=3906/3906
>[13587.444107] [drm:intel_panel_actually_set_backlight] set backlight PWM = 3906
>[13587.458790] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[13587.458890] [drm:i9xx_update_primary_plane] Writing base 0055C000 00000000 0 0 5760
>[13587.458946] [drm:intel_crtc_set_config] [CRTC:20] [FB:67] #connectors=1 (x y) (0 0)
>[13587.458956] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[13587.458963] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[13587.458968] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[13587.458974] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[13587.458981] [drm:connected_sink_compute_bpp] [CONNECTOR:38:eDP-1] checking for sink bpp constrains
>[13587.458986] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18
>[13587.458995] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 0a pixel clock 71000KHz
>[13587.459001] [drm:intel_dp_compute_config] DP link bw 0a lane count 1 clock 270000 bpp 18
>[13587.459005] [drm:intel_dp_compute_config] DP link bw required 127800 available 216000
>[13587.459011] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[13587.459017] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[13587.459021] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[13587.459026] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[13587.459031] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13587.459037] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 2481629, gmch_n: 4194304, link_m: 137868, link_n: 524288, tu: 64
>[13587.459043] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13587.459047] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[13587.459052] [drm:intel_dump_pipe_config] requested mode:
>[13587.459059] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[13587.459063] [drm:intel_dump_pipe_config] adjusted mode:
>[13587.459070] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 71000 1366 1404 1426 1482 768 771 777 798 0x48 0xa
>[13587.459077] [drm:intel_dump_crtc_timings] crtc timings: 71000 1366 1404 1426 1482 768 771 777 798, type: 0x48 flags: 0xa
>[13587.459082] [drm:intel_dump_pipe_config] port clock: 270000
>[13587.459086] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[13587.459091] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13587.459096] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13587.459101] [drm:intel_dump_pipe_config] ips: 0
>[13587.459105] [drm:intel_dump_pipe_config] double wide: 0
>[13587.459114] [drm:intel_crtc_set_config] [CRTC:25] [FB:67] #connectors=1 (x y) (0 0)
>[13587.459122] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[13587.459127] [drm:intel_modeset_stage_output_state] [CONNECTOR:38:eDP-1] to [CRTC:20]
>[13587.459132] [drm:intel_modeset_stage_output_state] [CONNECTOR:28:VGA-1] to [CRTC:25]
>[13587.459138] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[13587.459144] [drm:connected_sink_compute_bpp] [CONNECTOR:28:VGA-1] checking for sink bpp constrains
>[13587.459150] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[13587.459155] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[13587.459159] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[13587.459164] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[13587.459170] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13587.459175] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13587.459180] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13587.459185] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[13587.459189] [drm:intel_dump_pipe_config] requested mode:
>[13587.459196] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[13587.459200] [drm:intel_dump_pipe_config] adjusted mode:
>[13587.459207] [drm:drm_mode_debug_printmodeline] Modeline 0:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x48 0x6
>[13587.459214] [drm:intel_dump_crtc_timings] crtc timings: 106500 1440 1520 1672 1904 900 903 909 934, type: 0x48 flags: 0x6
>[13587.459219] [drm:intel_dump_pipe_config] port clock: 106500
>[13587.459223] [drm:intel_dump_pipe_config] pipe src size: 1440x900
>[13587.459228] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13587.459233] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13587.459237] [drm:intel_dump_pipe_config] ips: 0
>[13587.459242] [drm:intel_dump_pipe_config] double wide: 0
>[13591.706083] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00000800, dig 0x00000000
>[13591.706094] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 1 - cnt: 0
>[13591.706176] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[13591.706184] [drm:i915_hotplug_work_func] Connector VGA-1 (pin 1) received hotplug event.
>[13591.706192] [drm:intel_crt_detect] [CONNECTOR:28:VGA-1] force=0
>[13591.706205] [drm:valleyview_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0xc3f40010
>[13591.723934] [drm:valleyview_crt_detect_hotplug] valleyview hotplug adpa=0xc3f40010, result 1
>[13591.723943] [drm:intel_crt_detect] CRT detected via hotplug

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Attachments on bug 89401: 113933

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