Attachment 114181 Details for Bug 89127 – dmesg-update

dmesg-update

dmesg_skly05_kms_slip_0310.txt (text/plain), 124.68 KB, created by lu hua on 2015-03-10 03:14:41 UTC

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Creator: lu hua

Created: 2015-03-10 03:14:41 UTC

Size: 124.68 KB

patch

obsolete

>[    6.387219] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.387220] [drm:intel_dump_pipe_config] adjusted mode:
>[    6.387225] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.387230] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    6.387232] [drm:intel_dump_pipe_config] port clock: 540000
>[    6.387234] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    6.387236] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    6.387238] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    6.387240] [drm:intel_dump_pipe_config] ips: 0
>[    6.387242] [drm:intel_dump_pipe_config] double wide: 0
>[    6.436910] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    6.436918] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    6.436922] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    6.436928] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    6.436932] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    6.436939] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[    6.436941] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    6.436945] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    6.436947] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    6.436952] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    6.436955] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    6.436956] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    6.436958] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    6.436962] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    6.436966] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    6.436970] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    6.436972] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    6.436973] [drm:intel_dump_pipe_config] requested mode:
>[    6.436980] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.436981] [drm:intel_dump_pipe_config] adjusted mode:
>[    6.436987] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.436992] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    6.436994] [drm:intel_dump_pipe_config] port clock: 540000
>[    6.436996] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    6.436999] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    6.437001] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    6.437003] [drm:intel_dump_pipe_config] ips: 0
>[    6.437004] [drm:intel_dump_pipe_config] double wide: 0
>[    6.454244] asix 1-5:1.0 eth5: renamed from eth0
>[    6.486414] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    6.486421] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    6.486425] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    6.486430] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    6.486434] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    6.486440] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[    6.486442] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    6.486446] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    6.486448] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    6.486453] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    6.486456] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    6.486457] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    6.486459] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    6.486463] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    6.486467] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    6.486470] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    6.486472] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    6.486474] [drm:intel_dump_pipe_config] requested mode:
>[    6.486480] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.486482] [drm:intel_dump_pipe_config] adjusted mode:
>[    6.486487] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.486491] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    6.486493] [drm:intel_dump_pipe_config] port clock: 540000
>[    6.486495] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    6.486498] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    6.486501] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    6.486502] [drm:intel_dump_pipe_config] ips: 0
>[    6.486504] [drm:intel_dump_pipe_config] double wide: 0
>[    6.541373] systemd-udevd[3868]: renamed network interface eth0 to eth5
>[    6.567088] Adding 16440316k swap on /dev/sda3.  Priority:-1 extents:1 across:16440316k SS
>[    6.692772] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro
>[    6.700469] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[    6.700477] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    6.700481] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[    6.700487] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    6.700491] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[    6.700497] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[    6.700500] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[    6.700503] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[    6.700506] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[    6.700511] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[    6.700514] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    6.700516] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    6.700518] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[    6.700522] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    6.700526] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[    6.700529] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    6.700532] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    6.700533] [drm:intel_dump_pipe_config] requested mode:
>[    6.700540] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.700542] [drm:intel_dump_pipe_config] adjusted mode:
>[    6.700547] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[    6.700553] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[    6.700555] [drm:intel_dump_pipe_config] port clock: 540000
>[    6.700558] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    6.700561] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    6.700564] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    6.700565] [drm:intel_dump_pipe_config] ips: 0
>[    6.700567] [drm:intel_dump_pipe_config] double wide: 0
>[    6.998727] init: Failed to obtain startpar-bridge instance: Unknown parameter: INSTANCE
>[    7.303322] init: failsafe main process (4152) killed by TERM signal
>[    7.420787] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    7.420833] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    7.471093] init: bluetooth main process (4243) terminated with status 1
>[    7.471118] init: bluetooth main process ended, respawning
>[    7.602969] init: bluetooth main process (4310) terminated with status 1
>[    7.602994] init: bluetooth main process ended, respawning
>[    7.671130] init: bluetooth main process (4356) terminated with status 1
>[    7.671157] init: bluetooth main process ended, respawning
>[    7.766476] init: bluetooth main process (4404) terminated with status 1
>[    7.766492] init: bluetooth main process ended, respawning
>[    7.827201] init: bluetooth main process (4436) terminated with status 1
>[    7.827225] init: bluetooth main process ended, respawning
>[    7.868281] asix 1-5:1.0 eth5: link up, 100Mbps, full-duplex, lpa 0xC5E1
>[    7.890221] init: bluetooth main process (4489) terminated with status 1
>[    7.890246] init: bluetooth main process ended, respawning
>[    8.078671] asix 1-5:1.0 eth5: link up, 100Mbps, full-duplex, lpa 0xC5E1
>[    8.284207] init: bluetooth main process (4614) terminated with status 1
>[    8.284229] init: bluetooth main process ended, respawning
>[    8.352108] init: gdm main process (4583) killed by TERM signal
>[    8.372324] init: bluetooth main process (4676) terminated with status 1
>[    8.372348] init: bluetooth main process ended, respawning
>[    8.414651] init: bluetooth main process (4709) terminated with status 1
>[    8.414670] init: bluetooth main process ended, respawning
>[    8.451339] init: bluetooth main process (4739) terminated with status 1
>[    8.451357] init: bluetooth main process ended, respawning
>[    8.483708] init: bluetooth main process (4778) terminated with status 1
>[    8.483726] init: bluetooth respawning too fast, stopped
>[   51.687229] kms_flip: executing
>[   51.687397] [drm:i915_gem_open] 
>[   51.689289] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   51.689295] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   51.690203] [drm:i915_gem_open] 
>[   51.692094] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   51.692099] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   51.692138] [drm:i915_gem_open] 
>[   51.693998] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   51.694003] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   51.694025] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.694044] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.694061] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.694074] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   51.694081] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   51.694097] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   51.694145] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[   51.694507] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   51.694842] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   51.694862] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   51.694869] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   51.694875] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   51.694880] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   51.694890] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.694898] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.694902] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.694905] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.694908] [drm:intel_display_power_get] enabling power well 2
>[   51.694912] [drm:skl_set_power_well] Enabling power well 2
>[   51.694920] [drm:intel_display_power_get] enabling DDI B power well
>[   51.694923] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.694934] [drm:intel_display_power_put] disabling DDI B power well
>[   51.694937] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.694940] [drm:intel_display_power_put] disabling power well 2
>[   51.694943] [drm:skl_set_power_well] Disabling power well 2
>[   51.694947] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.694951] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.694953] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.694956] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.694958] [drm:intel_display_power_get] enabling power well 2
>[   51.694962] [drm:skl_set_power_well] Enabling power well 2
>[   51.694968] [drm:intel_display_power_get] enabling DDI B power well
>[   51.694971] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.694981] [drm:intel_display_power_put] disabling DDI B power well
>[   51.694984] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.694987] [drm:intel_display_power_put] disabling power well 2
>[   51.694990] [drm:skl_set_power_well] Disabling power well 2
>[   51.694993] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.695002] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.695005] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.695008] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.695011] [drm:intel_display_power_get] enabling power well 2
>[   51.695014] [drm:skl_set_power_well] Enabling power well 2
>[   51.695021] [drm:intel_display_power_get] enabling DDI B power well
>[   51.695024] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.695281] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.695292] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.695302] [drm:intel_display_power_put] disabling DDI B power well
>[   51.695312] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.695322] [drm:intel_display_power_put] disabling power well 2
>[   51.695332] [drm:skl_set_power_well] Disabling power well 2
>[   51.695343] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.695353] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.695356] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.695359] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.695361] [drm:intel_display_power_get] enabling power well 2
>[   51.695364] [drm:skl_set_power_well] Enabling power well 2
>[   51.695371] [drm:intel_display_power_get] enabling DDI B power well
>[   51.695374] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.695617] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.695620] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.695623] [drm:intel_display_power_put] disabling DDI B power well
>[   51.695626] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.695629] [drm:intel_display_power_put] disabling power well 2
>[   51.695632] [drm:skl_set_power_well] Disabling power well 2
>[   51.695635] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.695644] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.695659] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.695674] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.695688] [drm:intel_display_power_get] enabling power well 2
>[   51.695697] [drm:skl_set_power_well] Enabling power well 2
>[   51.695703] [drm:intel_display_power_get] enabling DDI C power well
>[   51.695706] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.695716] [drm:intel_display_power_put] disabling DDI C power well
>[   51.695719] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.695722] [drm:intel_display_power_put] disabling power well 2
>[   51.695725] [drm:skl_set_power_well] Disabling power well 2
>[   51.695728] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.695732] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.695734] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.695737] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.695739] [drm:intel_display_power_get] enabling power well 2
>[   51.695742] [drm:skl_set_power_well] Enabling power well 2
>[   51.695749] [drm:intel_display_power_get] enabling DDI C power well
>[   51.695752] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.695761] [drm:intel_display_power_put] disabling DDI C power well
>[   51.695765] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.695767] [drm:intel_display_power_put] disabling power well 2
>[   51.695775] [drm:skl_set_power_well] Disabling power well 2
>[   51.695790] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.695806] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.695819] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.695833] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.695839] [drm:intel_display_power_get] enabling power well 2
>[   51.695842] [drm:skl_set_power_well] Enabling power well 2
>[   51.695848] [drm:intel_display_power_get] enabling DDI C power well
>[   51.695852] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.696094] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.696097] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.696100] [drm:intel_display_power_put] disabling DDI C power well
>[   51.696103] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.696106] [drm:intel_display_power_put] disabling power well 2
>[   51.696109] [drm:skl_set_power_well] Disabling power well 2
>[   51.696112] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.696115] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.696118] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.696121] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.696123] [drm:intel_display_power_get] enabling power well 2
>[   51.696126] [drm:skl_set_power_well] Enabling power well 2
>[   51.696133] [drm:intel_display_power_get] enabling DDI C power well
>[   51.696136] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.696393] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.696397] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.696401] [drm:intel_display_power_put] disabling DDI C power well
>[   51.696407] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.696409] [drm:intel_display_power_put] disabling power well 2
>[   51.696413] [drm:skl_set_power_well] Disabling power well 2
>[   51.696416] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.697325] kms_flip: starting subtest absolute-wf_vblank
>[   51.697367] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.697372] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.697378] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.697382] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.697386] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.697390] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   51.697393] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   51.697739] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   51.698070] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   51.698082] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   51.698087] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   51.698093] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   51.698098] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   51.698104] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.698126] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.698130] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.698135] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.698137] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   51.698140] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   51.698476] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   51.698807] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   51.698816] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   51.698820] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   51.698824] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   51.698829] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   51.698834] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.698847] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.698851] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.698855] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.698858] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   51.698861] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   51.699190] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   51.699524] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   51.699532] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   51.699536] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   51.699541] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   51.699545] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   51.699550] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.699562] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699566] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699570] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.699572] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.699575] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.699578] [drm:intel_display_power_get] enabling power well 2
>[   51.699582] [drm:skl_set_power_well] Enabling power well 2
>[   51.699589] [drm:intel_display_power_get] enabling DDI B power well
>[   51.699592] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.699602] [drm:intel_display_power_put] disabling DDI B power well
>[   51.699606] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.699608] [drm:intel_display_power_put] disabling power well 2
>[   51.699611] [drm:skl_set_power_well] Disabling power well 2
>[   51.699615] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.699618] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.699621] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.699624] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.699626] [drm:intel_display_power_get] enabling power well 2
>[   51.699629] [drm:skl_set_power_well] Enabling power well 2
>[   51.699636] [drm:intel_display_power_get] enabling DDI B power well
>[   51.699639] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.699648] [drm:intel_display_power_put] disabling DDI B power well
>[   51.699652] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.699654] [drm:intel_display_power_put] disabling power well 2
>[   51.699658] [drm:skl_set_power_well] Disabling power well 2
>[   51.699660] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.699666] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699670] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699674] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.699677] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.699679] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.699681] [drm:intel_display_power_get] enabling power well 2
>[   51.699685] [drm:skl_set_power_well] Enabling power well 2
>[   51.699691] [drm:intel_display_power_get] enabling DDI B power well
>[   51.699694] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.699703] [drm:intel_display_power_put] disabling DDI B power well
>[   51.699707] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.699709] [drm:intel_display_power_put] disabling power well 2
>[   51.699713] [drm:skl_set_power_well] Disabling power well 2
>[   51.699716] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.699719] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.699722] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.699724] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.699726] [drm:intel_display_power_get] enabling power well 2
>[   51.699729] [drm:skl_set_power_well] Enabling power well 2
>[   51.699736] [drm:intel_display_power_get] enabling DDI B power well
>[   51.699739] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.699748] [drm:intel_display_power_put] disabling DDI B power well
>[   51.699752] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.699754] [drm:intel_display_power_put] disabling power well 2
>[   51.699758] [drm:skl_set_power_well] Disabling power well 2
>[   51.699760] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.699765] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699769] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699773] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.699776] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.699778] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.699780] [drm:intel_display_power_get] enabling power well 2
>[   51.699784] [drm:skl_set_power_well] Enabling power well 2
>[   51.699790] [drm:intel_display_power_get] enabling DDI B power well
>[   51.699793] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.699802] [drm:intel_display_power_put] disabling DDI B power well
>[   51.699806] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.699808] [drm:intel_display_power_put] disabling power well 2
>[   51.699812] [drm:skl_set_power_well] Disabling power well 2
>[   51.699815] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.699818] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.699821] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   51.699823] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   51.699825] [drm:intel_display_power_get] enabling power well 2
>[   51.699828] [drm:skl_set_power_well] Enabling power well 2
>[   51.699835] [drm:intel_display_power_get] enabling DDI B power well
>[   51.699838] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.699847] [drm:intel_display_power_put] disabling DDI B power well
>[   51.699851] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.699853] [drm:intel_display_power_put] disabling power well 2
>[   51.699857] [drm:skl_set_power_well] Disabling power well 2
>[   51.699859] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   51.699864] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699869] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.699872] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.699875] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.699878] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.699880] [drm:intel_display_power_get] enabling power well 2
>[   51.699883] [drm:skl_set_power_well] Enabling power well 2
>[   51.699890] [drm:intel_display_power_get] enabling DDI B power well
>[   51.699893] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.700139] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.700143] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.700146] [drm:intel_display_power_put] disabling DDI B power well
>[   51.700150] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.700152] [drm:intel_display_power_put] disabling power well 2
>[   51.700155] [drm:skl_set_power_well] Disabling power well 2
>[   51.700158] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.700163] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.700166] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.700169] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.700171] [drm:intel_display_power_get] enabling power well 2
>[   51.700174] [drm:skl_set_power_well] Enabling power well 2
>[   51.700181] [drm:intel_display_power_get] enabling DDI B power well
>[   51.700184] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.700438] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.700447] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.700453] [drm:intel_display_power_put] disabling DDI B power well
>[   51.700458] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.700462] [drm:intel_display_power_put] disabling power well 2
>[   51.700467] [drm:skl_set_power_well] Disabling power well 2
>[   51.700473] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.700491] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.700497] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.700504] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.700508] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.700512] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.700517] [drm:intel_display_power_get] enabling power well 2
>[   51.700522] [drm:skl_set_power_well] Enabling power well 2
>[   51.700531] [drm:intel_display_power_get] enabling DDI B power well
>[   51.700535] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.700787] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.700791] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.700794] [drm:intel_display_power_put] disabling DDI B power well
>[   51.700798] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.700800] [drm:intel_display_power_put] disabling power well 2
>[   51.700803] [drm:skl_set_power_well] Disabling power well 2
>[   51.700807] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.700812] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.700815] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.700817] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.700820] [drm:intel_display_power_get] enabling power well 2
>[   51.700823] [drm:skl_set_power_well] Enabling power well 2
>[   51.700829] [drm:intel_display_power_get] enabling DDI B power well
>[   51.700833] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.701077] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.701080] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.701083] [drm:intel_display_power_put] disabling DDI B power well
>[   51.701087] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.701089] [drm:intel_display_power_put] disabling power well 2
>[   51.701092] [drm:skl_set_power_well] Disabling power well 2
>[   51.701095] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.701104] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701108] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701112] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.701115] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.701117] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.701120] [drm:intel_display_power_get] enabling power well 2
>[   51.701123] [drm:skl_set_power_well] Enabling power well 2
>[   51.701129] [drm:intel_display_power_get] enabling DDI B power well
>[   51.701132] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.701379] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.701383] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.701387] [drm:intel_display_power_put] disabling DDI B power well
>[   51.701392] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.701396] [drm:intel_display_power_put] disabling power well 2
>[   51.701405] [drm:skl_set_power_well] Disabling power well 2
>[   51.701412] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.701418] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   51.701423] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   51.701427] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   51.701431] [drm:intel_display_power_get] enabling power well 2
>[   51.701439] [drm:skl_set_power_well] Enabling power well 2
>[   51.701451] [drm:intel_display_power_get] enabling DDI B power well
>[   51.701456] [drm:skl_set_power_well] Enabling DDI B power well
>[   51.701700] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   51.701703] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.701705] [drm:intel_display_power_put] disabling DDI B power well
>[   51.701709] [drm:skl_set_power_well] Disabling DDI B power well
>[   51.701711] [drm:intel_display_power_put] disabling power well 2
>[   51.701715] [drm:skl_set_power_well] Disabling power well 2
>[   51.701718] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   51.701724] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701728] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701732] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.701735] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.701737] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.701740] [drm:intel_display_power_get] enabling power well 2
>[   51.701743] [drm:skl_set_power_well] Enabling power well 2
>[   51.701750] [drm:intel_display_power_get] enabling DDI C power well
>[   51.701753] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.701762] [drm:intel_display_power_put] disabling DDI C power well
>[   51.701766] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.701768] [drm:intel_display_power_put] disabling power well 2
>[   51.701772] [drm:skl_set_power_well] Disabling power well 2
>[   51.701775] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.701778] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.701781] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.701783] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.701785] [drm:intel_display_power_get] enabling power well 2
>[   51.701789] [drm:skl_set_power_well] Enabling power well 2
>[   51.701795] [drm:intel_display_power_get] enabling DDI C power well
>[   51.701798] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.701807] [drm:intel_display_power_put] disabling DDI C power well
>[   51.701811] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.701813] [drm:intel_display_power_put] disabling power well 2
>[   51.701817] [drm:skl_set_power_well] Disabling power well 2
>[   51.701820] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.701825] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701829] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701832] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.701835] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.701838] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.701840] [drm:intel_display_power_get] enabling power well 2
>[   51.701843] [drm:skl_set_power_well] Enabling power well 2
>[   51.701849] [drm:intel_display_power_get] enabling DDI C power well
>[   51.701853] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.701862] [drm:intel_display_power_put] disabling DDI C power well
>[   51.701865] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.701868] [drm:intel_display_power_put] disabling power well 2
>[   51.701871] [drm:skl_set_power_well] Disabling power well 2
>[   51.701874] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.701877] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.701880] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.701882] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.701885] [drm:intel_display_power_get] enabling power well 2
>[   51.701888] [drm:skl_set_power_well] Enabling power well 2
>[   51.701894] [drm:intel_display_power_get] enabling DDI C power well
>[   51.701897] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.701907] [drm:intel_display_power_put] disabling DDI C power well
>[   51.701910] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.701913] [drm:intel_display_power_put] disabling power well 2
>[   51.701916] [drm:skl_set_power_well] Disabling power well 2
>[   51.701919] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.701924] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701928] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.701932] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.701934] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.701937] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.701939] [drm:intel_display_power_get] enabling power well 2
>[   51.701942] [drm:skl_set_power_well] Enabling power well 2
>[   51.701949] [drm:intel_display_power_get] enabling DDI C power well
>[   51.701952] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.701961] [drm:intel_display_power_put] disabling DDI C power well
>[   51.701965] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.701967] [drm:intel_display_power_put] disabling power well 2
>[   51.701970] [drm:skl_set_power_well] Disabling power well 2
>[   51.701973] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.701976] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   51.701979] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   51.701981] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   51.701984] [drm:intel_display_power_get] enabling power well 2
>[   51.701987] [drm:skl_set_power_well] Enabling power well 2
>[   51.701993] [drm:intel_display_power_get] enabling DDI C power well
>[   51.701996] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.702006] [drm:intel_display_power_put] disabling DDI C power well
>[   51.702009] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.702012] [drm:intel_display_power_put] disabling power well 2
>[   51.702015] [drm:skl_set_power_well] Disabling power well 2
>[   51.702018] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   51.702023] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.702027] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.702030] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.702033] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.702036] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.702038] [drm:intel_display_power_get] enabling power well 2
>[   51.702041] [drm:skl_set_power_well] Enabling power well 2
>[   51.702048] [drm:intel_display_power_get] enabling DDI C power well
>[   51.702051] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.702301] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.702312] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.702321] [drm:intel_display_power_put] disabling DDI C power well
>[   51.702331] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.702342] [drm:intel_display_power_put] disabling power well 2
>[   51.702351] [drm:skl_set_power_well] Disabling power well 2
>[   51.702362] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.702371] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.702381] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.702392] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.702402] [drm:intel_display_power_get] enabling power well 2
>[   51.702412] [drm:skl_set_power_well] Enabling power well 2
>[   51.702426] [drm:intel_display_power_get] enabling DDI C power well
>[   51.702436] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.702687] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.702691] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.702695] [drm:intel_display_power_put] disabling DDI C power well
>[   51.702700] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.702704] [drm:intel_display_power_put] disabling power well 2
>[   51.702709] [drm:skl_set_power_well] Disabling power well 2
>[   51.702713] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.702723] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.702729] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.702735] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.702739] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.702743] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.702747] [drm:intel_display_power_get] enabling power well 2
>[   51.702752] [drm:skl_set_power_well] Enabling power well 2
>[   51.702760] [drm:intel_display_power_get] enabling DDI C power well
>[   51.702764] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.703008] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.703011] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.703014] [drm:intel_display_power_put] disabling DDI C power well
>[   51.703017] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.703020] [drm:intel_display_power_put] disabling power well 2
>[   51.703023] [drm:skl_set_power_well] Disabling power well 2
>[   51.703026] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.703030] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.703033] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.703035] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.703038] [drm:intel_display_power_get] enabling power well 2
>[   51.703041] [drm:skl_set_power_well] Enabling power well 2
>[   51.703047] [drm:intel_display_power_get] enabling DDI C power well
>[   51.703050] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.703299] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.703303] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.703307] [drm:intel_display_power_put] disabling DDI C power well
>[   51.703312] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.703316] [drm:intel_display_power_put] disabling power well 2
>[   51.703324] [drm:skl_set_power_well] Disabling power well 2
>[   51.703332] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.703341] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.703347] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.703353] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.703363] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.703367] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.703371] [drm:intel_display_power_get] enabling power well 2
>[   51.703375] [drm:skl_set_power_well] Enabling power well 2
>[   51.703386] [drm:intel_display_power_get] enabling DDI C power well
>[   51.703391] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.703634] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.703637] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.703639] [drm:intel_display_power_put] disabling DDI C power well
>[   51.703643] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.703645] [drm:intel_display_power_put] disabling power well 2
>[   51.703649] [drm:skl_set_power_well] Disabling power well 2
>[   51.703651] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.703655] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   51.703658] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   51.703660] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   51.703663] [drm:intel_display_power_get] enabling power well 2
>[   51.703666] [drm:skl_set_power_well] Enabling power well 2
>[   51.703672] [drm:intel_display_power_get] enabling DDI C power well
>[   51.703676] [drm:skl_set_power_well] Enabling DDI C power well
>[   51.703918] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   51.703920] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   51.703923] [drm:intel_display_power_put] disabling DDI C power well
>[   51.703926] [drm:skl_set_power_well] Disabling DDI C power well
>[   51.703929] [drm:intel_display_power_put] disabling power well 2
>[   51.703932] [drm:skl_set_power_well] Disabling power well 2
>[   51.703935] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   51.703944] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.703948] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   51.703952] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.703954] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   51.703957] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   51.704297] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   51.704631] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   51.704641] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   51.704646] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   51.704651] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   51.704655] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   51.704661] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   51.704730] [drm:add_framebuffer_internal] [FB:56]
>[   51.704739] [drm:add_framebuffer_internal] [FB:58]
>[   51.704750] [drm:add_framebuffer_internal] [FB:59]
>[   52.007234] [drm:drm_mode_setcrtc] [CRTC:20]
>[   52.007247] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[   52.007254] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0)
>[   52.007261] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[   52.007265] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   52.007281] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   52.007285] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   52.007300] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[   52.007313] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   52.007320] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[   52.007323] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[   52.007327] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   52.007331] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   52.007333] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   52.007336] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   52.007340] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   52.007344] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[   52.007347] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   52.007350] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   52.007352] [drm:intel_dump_pipe_config] requested mode:
>[   52.007358] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   52.007361] [drm:intel_dump_pipe_config] adjusted mode:
>[   52.007367] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   52.007373] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[   52.007377] [drm:intel_dump_pipe_config] port clock: 540000
>[   52.007380] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   52.007384] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   52.007388] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   52.007391] [drm:intel_dump_pipe_config] ips: 0
>[   52.007395] [drm:intel_dump_pipe_config] double wide: 0
>[   52.009847] [drm:skylake_update_primary_plane] Writing base 078C0000 0,0,3200,1800 pitch=12800
>[   54.706847] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   54.706891] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   62.040843] [drm:intel_crtc_set_config] [CRTC:20] [NOFB]
>[   62.040854] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[   62.040858] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[   62.040862] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch
>[   62.040866] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch
>[   62.040870] [drm:intel_modeset_stage_output_state] [CRTC:20] disabled, full mode switch
>[   62.040875] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[   62.040887] [drm:intel_edp_backlight_off] 
>[   62.241676] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   62.253699] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   62.253751] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   62.253941] [drm:edp_panel_off] Turn eDP port A panel power off
>[   62.253966] [drm:wait_panel_off] Wait for panel power off time
>[   62.253984] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   62.308777] [drm:wait_panel_status] Wait complete
>[   62.308830] [drm:intel_display_power_put] disabling DDI A/E power well
>[   62.308836] [drm:skl_set_power_well] Disabling DDI A/E power well
>[   62.308839] [drm:intel_display_power_put] disabling MISC IO power well
>[   62.308843] [drm:skl_set_power_well] Disabling MISC IO power well
>[   62.308845] [drm:intel_display_power_put] disabling power well 1
>[   62.308850] [drm:skl_set_power_well] Disabling power well 1
>[   62.308882] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   62.308886] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   62.308888] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   62.308891] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   62.308894] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   62.308896] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   62.308899] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   62.308901] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   62.308903] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   62.308906] [drm:check_crtc_state] [CRTC:20]
>[   62.308910] [drm:check_crtc_state] [CRTC:25]
>[   62.308912] [drm:check_crtc_state] [CRTC:30]
>[   62.308915] [drm:check_shared_dpll_state] DPLL 1
>[   62.308918] [drm:check_shared_dpll_state] DPLL 2
>[   62.308921] [drm:check_shared_dpll_state] DPLL 3
>[   62.316025] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   62.316032] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   62.316038] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   62.316042] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   62.316046] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   62.316050] [drm:intel_display_power_get] enabling power well 1
>[   62.316057] [drm:skl_set_power_well] Enabling power well 1
>[   62.316098] [drm:intel_display_power_get] enabling MISC IO power well
>[   62.316101] [drm:skl_set_power_well] Enabling MISC IO power well
>[   62.316104] [drm:intel_display_power_get] enabling DDI A/E power well
>[   62.316107] [drm:skl_set_power_well] Enabling DDI A/E power well
>[   62.316121] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   62.316130] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   62.854770] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   62.854783] [drm:wait_panel_status] Wait complete
>[   62.854823] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[   62.854833] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[   63.056231] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   63.056583] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   63.056607] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   63.056614] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   63.056621] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   63.056626] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   63.056650] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   63.056751] [drm:add_framebuffer_internal] [FB:56]
>[   63.056769] [drm:add_framebuffer_internal] [FB:58]
>[   63.056792] [drm:add_framebuffer_internal] [FB:59]
>[   63.256251] [drm:drm_mode_setcrtc] [CRTC:25]
>[   63.256266] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[   63.256274] [drm:intel_crtc_set_config] [CRTC:25] [FB:56] #connectors=1 (x y) (0 0)
>[   63.256281] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   63.256285] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[   63.256292] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   63.256299] [drm:drm_mode_debug_printmodeline] Modeline 60:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   63.256304] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=1, fb_changed=0
>[   63.256308] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch
>[   63.256312] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:25]
>[   63.256317] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch
>[   63.256322] [drm:intel_modeset_stage_output_state] [CRTC:25] enabled, full mode switch
>[   63.256328] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   63.256334] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   63.256342] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[   63.256346] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   63.256351] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[   63.256354] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[   63.256359] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   63.256362] [drm:intel_dump_pipe_config] [CRTC:25][modeset] config for pipe B
>[   63.256364] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   63.256367] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   63.256371] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   63.256375] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[   63.256379] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   63.256382] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   63.256384] [drm:intel_dump_pipe_config] requested mode:
>[   63.256389] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   63.256392] [drm:intel_dump_pipe_config] adjusted mode:
>[   63.256396] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   63.256401] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[   63.256403] [drm:intel_dump_pipe_config] port clock: 540000
>[   63.256406] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   63.256410] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   63.256413] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   63.256415] [drm:intel_dump_pipe_config] ips: 0
>[   63.256418] [drm:intel_dump_pipe_config] double wide: 0
>[   63.256428] [drm:intel_display_power_get] enabling power well 2
>[   63.256432] [drm:skl_set_power_well] Enabling power well 2
>[   63.258723] [drm:edp_panel_on] Turn eDP port A panel power on
>[   63.258733] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   63.258751] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[   63.258760] [drm:wait_panel_status] Wait complete
>[   63.258784] [drm:wait_panel_on] Wait for panel power on
>[   63.258801] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[   63.467907] [drm:wait_panel_status] Wait complete
>[   63.469034] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   63.469684] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[   63.470330] [drm:intel_dp_start_link_train] clock recovery OK
>[   63.471280] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[   63.472221] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   63.472499] [drm:skl_wm_flush_pipe] flush pipe B (pass 3)
>[   63.472514] [drm:intel_edp_backlight_on] 
>[   63.472519] [drm:intel_panel_enable_backlight] pipe B
>[   63.472559] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[   63.472599] [drm:intel_psr_match_conditions] PSR disable by flag
>[   63.472602] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   63.472611] [drm:skylake_update_primary_plane] Writing base 078C0000 0,0,3200,1800 pitch=12800
>[   63.472632] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[   63.472637] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   63.472642] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   63.472645] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   63.472647] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   63.472650] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   63.472652] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   63.472655] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   63.472657] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   63.472660] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   63.472662] [drm:check_crtc_state] [CRTC:20]
>[   63.472667] [drm:check_crtc_state] [CRTC:25]
>[   63.472684] [drm:check_crtc_state] [CRTC:30]
>[   63.472688] [drm:check_shared_dpll_state] DPLL 1
>[   63.472697] [drm:check_shared_dpll_state] DPLL 2
>[   63.472700] [drm:check_shared_dpll_state] DPLL 3
>[   63.539320] ------------[ cut here ]------------
>[   63.539367] WARNING: CPU: 2 PID: 0 at drivers/gpu/drm/i915/intel_display.c:9826 intel_check_page_flip+0xa6/0xc1 [i915]()
>[   63.539371] Kicking stuck page flip: queued at 1, now 5
>[   63.539373] Modules linked in: dm_mod ppdev snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep snd_pcm pcspkr i2c_i801 snd_timer snd soundcore wmi battery parport_pc parport ac acpi_cpufreq i915 button video drm_kms_helper drm
>[   63.539402] CPU: 2 PID: 0 Comm: swapper/2 Not tainted 4.0.0-rc3_drm-intel-nightly_c09a3b_20150310+ #104
>[   63.539405] Hardware name: Intel Corporation Skylake Client platform/Skylake Y LPDDR3 RVP3, BIOS SKLSE2R1.86C.B069.R00.1501192136 01/19/2015
>[   63.539408]  0000000000000000 0000000000000009 ffffffff81793a7f ffff88014e483e18
>[   63.539414]  ffffffff8103bcf8 ffff880148e479a0 ffffffffa00d12f1 0000000000000002
>[   63.539418]  ffff880148e47800 ffff880004c2c000 0000000000000001 0000000000000001
>[   63.539423] Call Trace:
>[   63.539426]  <IRQ>  [<ffffffff81793a7f>] ? dump_stack+0x40/0x50
>[   63.539443]  [<ffffffff8103bcf8>] ? warn_slowpath_common+0x98/0xb0
>[   63.539469]  [<ffffffffa00d12f1>] ? intel_check_page_flip+0xa6/0xc1 [i915]
>[   63.539476]  [<ffffffff8103bd55>] ? warn_slowpath_fmt+0x45/0x4a
>[   63.539504]  [<ffffffffa00c1b6d>] ? __intel_pageflip_stall_check+0xaf/0xd8 [i915]
>[   63.539529]  [<ffffffffa00d12f1>] ? intel_check_page_flip+0xa6/0xc1 [i915]
>[   63.539557]  [<ffffffffa00a8e3a>] ? gen8_irq_handler+0x1fb/0x345 [i915]
>[   63.539563]  [<ffffffff81071c70>] ? handle_irq_event_percpu+0x34/0x15b
>[   63.539569]  [<ffffffff81081e69>] ? update_wall_time+0x524/0x53d
>[   63.539573]  [<ffffffff81071dc5>] ? handle_irq_event+0x2e/0x4c
>[   63.539578]  [<ffffffff8107430e>] ? handle_edge_irq+0xba/0xcf
>[   63.539583]  [<ffffffff81004313>] ? handle_irq+0x15/0x1d
>[   63.539588]  [<ffffffff81003dd7>] ? do_IRQ+0x41/0xc0
>[   63.539593]  [<ffffffff81799daa>] ? common_interrupt+0x6a/0x6a
>[   63.539595]  <EOI>  [<ffffffff816acead>] ? cpuidle_enter_state+0x71/0x11e
>[   63.539608]  [<ffffffff816ace91>] ? cpuidle_enter_state+0x55/0x11e
>[   63.539616]  [<ffffffff8106526b>] ? cpu_startup_entry+0x1f7/0x34d
>[   63.539620] ---[ end trace 0d2c93c119121b88 ]---
>[   66.476308] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   66.476352] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   73.712772] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[   73.712782] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=1, fb_changed=0
>[   73.712786] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[   73.712789] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch
>[   73.712793] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch
>[   73.712797] [drm:intel_modeset_stage_output_state] [CRTC:25] disabled, full mode switch
>[   73.712802] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[   73.712814] [drm:intel_edp_backlight_off] 
>[   73.913125] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   73.925141] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   73.925193] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   73.925383] [drm:edp_panel_off] Turn eDP port A panel power off
>[   73.925408] [drm:wait_panel_off] Wait for panel power off time
>[   73.925426] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[   73.980216] [drm:wait_panel_status] Wait complete
>[   73.980270] [drm:intel_display_power_put] disabling power well 2
>[   73.980275] [drm:skl_set_power_well] Disabling power well 2
>[   73.980279] [drm:intel_display_power_put] disabling DDI A/E power well
>[   73.980282] [drm:skl_set_power_well] Disabling DDI A/E power well
>[   73.980285] [drm:intel_display_power_put] disabling MISC IO power well
>[   73.980289] [drm:skl_set_power_well] Disabling MISC IO power well
>[   73.980291] [drm:intel_display_power_put] disabling power well 1
>[   73.980296] [drm:skl_set_power_well] Disabling power well 1
>[   73.980328] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   73.980332] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   73.980335] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   73.980337] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   73.980339] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   73.980342] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   73.980344] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   73.980347] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   73.980349] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   73.980352] [drm:check_crtc_state] [CRTC:20]
>[   73.980356] [drm:check_crtc_state] [CRTC:25]
>[   73.980358] [drm:check_crtc_state] [CRTC:30]
>[   73.980362] [drm:check_shared_dpll_state] DPLL 1
>[   73.980365] [drm:check_shared_dpll_state] DPLL 2
>[   73.980367] [drm:check_shared_dpll_state] DPLL 3
>[   73.987485] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   73.987492] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   73.987497] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   73.987502] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1]
>[   73.987506] [drm:intel_dp_detect] [CONNECTOR:34:eDP-1]
>[   73.987510] [drm:intel_display_power_get] enabling power well 1
>[   73.987516] [drm:skl_set_power_well] Enabling power well 1
>[   73.987557] [drm:intel_display_power_get] enabling MISC IO power well
>[   73.987560] [drm:skl_set_power_well] Enabling MISC IO power well
>[   73.987563] [drm:intel_display_power_get] enabling DDI A/E power well
>[   73.987567] [drm:skl_set_power_well] Enabling DDI A/E power well
>[   73.987580] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   73.987589] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   74.526300] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[   74.570291] [drm:wait_panel_status] Wait complete
>[   74.570336] [drm:edp_panel_vdd_on] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[   74.570346] [drm:edp_panel_vdd_on] eDP port A panel power wasn't enabled
>[   74.771680] [drm:intel_dp_probe_oui] Sink OUI: 0022b9
>[   74.772032] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[   74.772056] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   74.772063] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:eDP-1] probed modes :
>[   74.772069] [drm:drm_mode_debug_printmodeline] Modeline 35:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   74.772074] [drm:drm_mode_debug_printmodeline] Modeline 36:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[   74.772087] [drm:drm_mode_getconnector] [CONNECTOR:34:?]
>[   74.772199] [drm:add_framebuffer_internal] [FB:56]
>[   74.772217] [drm:add_framebuffer_internal] [FB:58]
>[   74.772238] [drm:add_framebuffer_internal] [FB:59]
>[   74.969585] [drm:drm_mode_setcrtc] [CRTC:30]
>[   74.969600] [drm:drm_mode_setcrtc] [CONNECTOR:34:eDP-1]
>[   74.969607] [drm:intel_crtc_set_config] [CRTC:30] [FB:56] #connectors=1 (x y) (0 0)
>[   74.969614] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   74.969618] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[   74.969625] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   74.969632] [drm:drm_mode_debug_printmodeline] Modeline 60:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   74.969636] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=1, fb_changed=0
>[   74.969640] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch
>[   74.969645] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:30]
>[   74.969649] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch
>[   74.969655] [drm:intel_modeset_stage_output_state] [CRTC:30] enabled, full mode switch
>[   74.969661] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[   74.969666] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   74.969675] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[   74.969679] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   74.969684] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[   74.969688] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[   74.969692] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   74.969696] [drm:intel_dump_pipe_config] [CRTC:30][modeset] config for pipe C
>[   74.969698] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   74.969701] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   74.969705] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   74.969709] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[   74.969713] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   74.969715] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   74.969718] [drm:intel_dump_pipe_config] requested mode:
>[   74.969723] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   74.969726] [drm:intel_dump_pipe_config] adjusted mode:
>[   74.969730] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   74.969735] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[   74.969737] [drm:intel_dump_pipe_config] port clock: 540000
>[   74.969740] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   74.969743] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   74.969746] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   74.969749] [drm:intel_dump_pipe_config] ips: 0
>[   74.969751] [drm:intel_dump_pipe_config] double wide: 0
>[   74.969762] [drm:intel_display_power_get] enabling power well 2
>[   74.969766] [drm:skl_set_power_well] Enabling power well 2
>[   74.972082] [drm:edp_panel_on] Turn eDP port A panel power on
>[   74.972092] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   74.972111] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0008
>[   74.972125] [drm:wait_panel_status] Wait complete
>[   74.972149] [drm:wait_panel_on] Wait for panel power on
>[   74.972167] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd000b
>[   75.181358] [drm:wait_panel_status] Wait complete
>[   75.182485] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   75.183134] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[   75.183781] [drm:intel_dp_start_link_train] clock recovery OK
>[   75.184731] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[   75.185671] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   75.185950] [drm:skl_wm_flush_pipe] flush pipe C (pass 3)
>[   75.185965] [drm:intel_edp_backlight_on] 
>[   75.185969] [drm:intel_panel_enable_backlight] pipe C
>[   75.186010] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[   75.186050] [drm:intel_psr_match_conditions] PSR disable by flag
>[   75.186053] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   75.186062] [drm:skylake_update_primary_plane] Writing base 078C0000 0,0,3200,1800 pitch=12800
>[   75.186082] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[   75.186088] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   75.186092] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   75.186095] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   75.186097] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   75.186100] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   75.186102] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   75.186105] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   75.186107] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   75.186110] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   75.186113] [drm:check_crtc_state] [CRTC:20]
>[   75.186117] [drm:check_crtc_state] [CRTC:25]
>[   75.186121] [drm:check_crtc_state] [CRTC:30]
>[   75.186138] [drm:check_shared_dpll_state] DPLL 1
>[   75.186142] [drm:check_shared_dpll_state] DPLL 2
>[   75.186150] [drm:check_shared_dpll_state] DPLL 3
>[   78.189706] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   78.189750] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   85.259502] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[   85.259513] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=1, fb_changed=0
>[   85.259517] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [NOCRTC]
>[   85.259520] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch
>[   85.259524] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch
>[   85.259528] [drm:intel_modeset_stage_output_state] [CRTC:30] disabled, full mode switch
>[   85.259532] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[   85.259544] [drm:intel_edp_backlight_off] 
>[   85.460558] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   85.472570] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   85.472622] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   85.472812] [drm:edp_panel_off] Turn eDP port A panel power off
>[   85.472837] [drm:wait_panel_off] Wait for panel power off time
>[   85.472856] [drm:wait_panel_status] mask b0000000 value 00000000 status a0000003 control abcd0000
>[   85.527604] [drm:wait_panel_status] Wait complete
>[   85.527658] [drm:intel_display_power_put] disabling power well 2
>[   85.527663] [drm:skl_set_power_well] Disabling power well 2
>[   85.527667] [drm:intel_display_power_put] disabling DDI A/E power well
>[   85.527671] [drm:skl_set_power_well] Disabling DDI A/E power well
>[   85.527673] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.527677] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.527679] [drm:intel_display_power_put] disabling power well 1
>[   85.527684] [drm:skl_set_power_well] Disabling power well 1
>[   85.527716] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   85.527719] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   85.527722] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   85.527725] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   85.527727] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   85.527730] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   85.527732] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   85.527735] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   85.527737] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   85.527740] [drm:check_crtc_state] [CRTC:20]
>[   85.527743] [drm:check_crtc_state] [CRTC:25]
>[   85.527746] [drm:check_crtc_state] [CRTC:30]
>[   85.527749] [drm:check_shared_dpll_state] DPLL 1
>[   85.527752] [drm:check_shared_dpll_state] DPLL 2
>[   85.527754] [drm:check_shared_dpll_state] DPLL 3
>[   85.534867] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.534874] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.534880] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   85.534885] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   85.534888] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   85.534892] [drm:intel_display_power_get] enabling power well 1
>[   85.534898] [drm:skl_set_power_well] Enabling power well 1
>[   85.534939] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.534943] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.534945] [drm:intel_display_power_get] enabling power well 2
>[   85.534949] [drm:skl_set_power_well] Enabling power well 2
>[   85.534958] [drm:intel_display_power_get] enabling DDI B power well
>[   85.534961] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.534971] [drm:intel_display_power_put] disabling DDI B power well
>[   85.534975] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.534978] [drm:intel_display_power_put] disabling power well 2
>[   85.534981] [drm:skl_set_power_well] Disabling power well 2
>[   85.534984] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.534988] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.534990] [drm:intel_display_power_put] disabling power well 1
>[   85.534995] [drm:skl_set_power_well] Disabling power well 1
>[   85.534998] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   85.535003] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   85.535006] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   85.535008] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   85.535010] [drm:intel_display_power_get] enabling power well 1
>[   85.535017] [drm:skl_set_power_well] Enabling power well 1
>[   85.535056] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.535059] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.535062] [drm:intel_display_power_get] enabling power well 2
>[   85.535065] [drm:skl_set_power_well] Enabling power well 2
>[   85.535072] [drm:intel_display_power_get] enabling DDI B power well
>[   85.535076] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.535085] [drm:intel_display_power_put] disabling DDI B power well
>[   85.535089] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.535091] [drm:intel_display_power_put] disabling power well 2
>[   85.535095] [drm:skl_set_power_well] Disabling power well 2
>[   85.535097] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.535101] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.535104] [drm:intel_display_power_put] disabling power well 1
>[   85.535108] [drm:skl_set_power_well] Disabling power well 1
>[   85.535111] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   85.535125] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.535129] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.535133] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   85.535136] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   85.535138] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   85.535141] [drm:intel_display_power_get] enabling power well 1
>[   85.535147] [drm:skl_set_power_well] Enabling power well 1
>[   85.535186] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.535189] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.535192] [drm:intel_display_power_get] enabling power well 2
>[   85.535195] [drm:skl_set_power_well] Enabling power well 2
>[   85.535202] [drm:intel_display_power_get] enabling DDI B power well
>[   85.535206] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.535215] [drm:intel_display_power_put] disabling DDI B power well
>[   85.535219] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.535221] [drm:intel_display_power_put] disabling power well 2
>[   85.535225] [drm:skl_set_power_well] Disabling power well 2
>[   85.535227] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.535231] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.535233] [drm:intel_display_power_put] disabling power well 1
>[   85.535238] [drm:skl_set_power_well] Disabling power well 1
>[   85.535241] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   85.535244] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   85.535247] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   85.535249] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   85.535252] [drm:intel_display_power_get] enabling power well 1
>[   85.535258] [drm:skl_set_power_well] Enabling power well 1
>[   85.535297] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.535300] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.535303] [drm:intel_display_power_get] enabling power well 2
>[   85.535306] [drm:skl_set_power_well] Enabling power well 2
>[   85.535313] [drm:intel_display_power_get] enabling DDI B power well
>[   85.535316] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.535326] [drm:intel_display_power_put] disabling DDI B power well
>[   85.535330] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.535332] [drm:intel_display_power_put] disabling power well 2
>[   85.535336] [drm:skl_set_power_well] Disabling power well 2
>[   85.535338] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.535342] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.535344] [drm:intel_display_power_put] disabling power well 1
>[   85.535349] [drm:skl_set_power_well] Disabling power well 1
>[   85.535352] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   85.535358] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.535362] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.535366] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   85.535369] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   85.535371] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   85.535373] [drm:intel_display_power_get] enabling power well 1
>[   85.535379] [drm:skl_set_power_well] Enabling power well 1
>[   85.535418] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.535422] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.535425] [drm:intel_display_power_get] enabling power well 2
>[   85.535436] [drm:skl_set_power_well] Enabling power well 2
>[   85.535445] [drm:intel_display_power_get] enabling DDI B power well
>[   85.535454] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.535469] [drm:intel_display_power_put] disabling DDI B power well
>[   85.535480] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.535490] [drm:intel_display_power_put] disabling power well 2
>[   85.535501] [drm:skl_set_power_well] Disabling power well 2
>[   85.535509] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.535519] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.535528] [drm:intel_display_power_put] disabling power well 1
>[   85.535540] [drm:skl_set_power_well] Disabling power well 1
>[   85.535549] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   85.535558] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   85.535567] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1]
>[   85.535577] [drm:intel_dp_detect] [CONNECTOR:43:DP-1]
>[   85.535587] [drm:intel_display_power_get] enabling power well 1
>[   85.535600] [drm:skl_set_power_well] Enabling power well 1
>[   85.535647] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.535654] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.535658] [drm:intel_display_power_get] enabling power well 2
>[   85.535662] [drm:skl_set_power_well] Enabling power well 2
>[   85.535671] [drm:intel_display_power_get] enabling DDI B power well
>[   85.535676] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.535687] [drm:intel_display_power_put] disabling DDI B power well
>[   85.535692] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.535696] [drm:intel_display_power_put] disabling power well 2
>[   85.535701] [drm:skl_set_power_well] Disabling power well 2
>[   85.535705] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.535710] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.535714] [drm:intel_display_power_put] disabling power well 1
>[   85.535720] [drm:skl_set_power_well] Disabling power well 1
>[   85.535724] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected
>[   85.535736] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.535742] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.535748] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   85.535752] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   85.535757] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   85.535761] [drm:intel_display_power_get] enabling power well 1
>[   85.535769] [drm:skl_set_power_well] Enabling power well 1
>[   85.535811] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.535816] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.535820] [drm:intel_display_power_get] enabling power well 2
>[   85.535824] [drm:skl_set_power_well] Enabling power well 2
>[   85.535833] [drm:intel_display_power_get] enabling DDI B power well
>[   85.535838] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.536097] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   85.536102] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   85.536107] [drm:intel_display_power_put] disabling DDI B power well
>[   85.536112] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.536116] [drm:intel_display_power_put] disabling power well 2
>[   85.536121] [drm:skl_set_power_well] Disabling power well 2
>[   85.536125] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.536130] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.536134] [drm:intel_display_power_put] disabling power well 1
>[   85.536140] [drm:skl_set_power_well] Disabling power well 1
>[   85.536144] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   85.536150] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   85.536155] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   85.536159] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   85.536163] [drm:intel_display_power_get] enabling power well 1
>[   85.536171] [drm:skl_set_power_well] Enabling power well 1
>[   85.536212] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.536220] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.536224] [drm:intel_display_power_get] enabling power well 2
>[   85.536229] [drm:skl_set_power_well] Enabling power well 2
>[   85.536238] [drm:intel_display_power_get] enabling DDI B power well
>[   85.536243] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.536495] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   85.536498] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   85.536501] [drm:intel_display_power_put] disabling DDI B power well
>[   85.536504] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.536507] [drm:intel_display_power_put] disabling power well 2
>[   85.536510] [drm:skl_set_power_well] Disabling power well 2
>[   85.536513] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.536517] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.536519] [drm:intel_display_power_put] disabling power well 1
>[   85.536524] [drm:skl_set_power_well] Disabling power well 1
>[   85.536527] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   85.536537] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.536541] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.536545] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   85.536547] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   85.536550] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   85.536552] [drm:intel_display_power_get] enabling power well 1
>[   85.536559] [drm:skl_set_power_well] Enabling power well 1
>[   85.536598] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.536601] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.536604] [drm:intel_display_power_get] enabling power well 2
>[   85.536607] [drm:skl_set_power_well] Enabling power well 2
>[   85.536614] [drm:intel_display_power_get] enabling DDI B power well
>[   85.536618] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.536954] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   85.536961] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   85.536965] [drm:intel_display_power_put] disabling DDI B power well
>[   85.536969] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.536972] [drm:intel_display_power_put] disabling power well 2
>[   85.536976] [drm:skl_set_power_well] Disabling power well 2
>[   85.536978] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.536982] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.536984] [drm:intel_display_power_put] disabling power well 1
>[   85.536989] [drm:skl_set_power_well] Disabling power well 1
>[   85.536993] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   85.537002] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   85.537006] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   85.537009] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   85.537012] [drm:intel_display_power_get] enabling power well 1
>[   85.537018] [drm:skl_set_power_well] Enabling power well 1
>[   85.537058] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.537061] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.537064] [drm:intel_display_power_get] enabling power well 2
>[   85.537068] [drm:skl_set_power_well] Enabling power well 2
>[   85.537076] [drm:intel_display_power_get] enabling DDI B power well
>[   85.537080] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.537325] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   85.537329] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   85.537331] [drm:intel_display_power_put] disabling DDI B power well
>[   85.537335] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.537337] [drm:intel_display_power_put] disabling power well 2
>[   85.537341] [drm:skl_set_power_well] Disabling power well 2
>[   85.537343] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.537347] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.537349] [drm:intel_display_power_put] disabling power well 1
>[   85.537354] [drm:skl_set_power_well] Disabling power well 1
>[   85.537357] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   85.537374] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.537379] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.537383] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   85.537386] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   85.537388] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   85.537391] [drm:intel_display_power_get] enabling power well 1
>[   85.537397] [drm:skl_set_power_well] Enabling power well 1
>[   85.537452] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.537455] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.537458] [drm:intel_display_power_get] enabling power well 2
>[   85.537461] [drm:skl_set_power_well] Enabling power well 2
>[   85.537469] [drm:intel_display_power_get] enabling DDI B power well
>[   85.537472] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.537771] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   85.537778] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   85.537782] [drm:intel_display_power_put] disabling DDI B power well
>[   85.537786] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.537789] [drm:intel_display_power_put] disabling power well 2
>[   85.537793] [drm:skl_set_power_well] Disabling power well 2
>[   85.537795] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.537799] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.537801] [drm:intel_display_power_put] disabling power well 1
>[   85.537806] [drm:skl_set_power_well] Disabling power well 1
>[   85.537810] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   85.537817] [drm:drm_mode_getconnector] [CONNECTOR:47:?]
>[   85.537821] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1]
>[   85.537823] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   85.537827] [drm:intel_display_power_get] enabling power well 1
>[   85.537833] [drm:skl_set_power_well] Enabling power well 1
>[   85.537872] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.537876] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.537878] [drm:intel_display_power_get] enabling power well 2
>[   85.537882] [drm:skl_set_power_well] Enabling power well 2
>[   85.537890] [drm:intel_display_power_get] enabling DDI B power well
>[   85.537894] [drm:skl_set_power_well] Enabling DDI B power well
>[   85.538189] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   85.538196] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   85.538200] [drm:intel_display_power_put] disabling DDI B power well
>[   85.538205] [drm:skl_set_power_well] Disabling DDI B power well
>[   85.538207] [drm:intel_display_power_put] disabling power well 2
>[   85.538211] [drm:skl_set_power_well] Disabling power well 2
>[   85.538214] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.538217] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.538220] [drm:intel_display_power_put] disabling power well 1
>[   85.538225] [drm:skl_set_power_well] Disabling power well 1
>[   85.538228] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-1] disconnected
>[   85.538245] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.538250] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.538254] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   85.538258] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   85.538261] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   85.538264] [drm:intel_display_power_get] enabling power well 1
>[   85.538271] [drm:skl_set_power_well] Enabling power well 1
>[   85.538310] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.538313] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.538316] [drm:intel_display_power_get] enabling power well 2
>[   85.538320] [drm:skl_set_power_well] Enabling power well 2
>[   85.538328] [drm:intel_display_power_get] enabling DDI C power well
>[   85.538331] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.538341] [drm:intel_display_power_put] disabling DDI C power well
>[   85.538345] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.538347] [drm:intel_display_power_put] disabling power well 2
>[   85.538351] [drm:skl_set_power_well] Disabling power well 2
>[   85.538353] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.538357] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.538360] [drm:intel_display_power_put] disabling power well 1
>[   85.538364] [drm:skl_set_power_well] Disabling power well 1
>[   85.538367] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   85.538371] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   85.538374] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   85.538376] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   85.538379] [drm:intel_display_power_get] enabling power well 1
>[   85.538385] [drm:skl_set_power_well] Enabling power well 1
>[   85.538424] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.538442] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.538446] [drm:intel_display_power_get] enabling power well 2
>[   85.538450] [drm:skl_set_power_well] Enabling power well 2
>[   85.538458] [drm:intel_display_power_get] enabling DDI C power well
>[   85.538461] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.538471] [drm:intel_display_power_put] disabling DDI C power well
>[   85.538475] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.538477] [drm:intel_display_power_put] disabling power well 2
>[   85.538481] [drm:skl_set_power_well] Disabling power well 2
>[   85.538483] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.538492] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.538503] [drm:intel_display_power_put] disabling power well 1
>[   85.538514] [drm:skl_set_power_well] Disabling power well 1
>[   85.538524] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   85.538539] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.538551] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.538562] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   85.538572] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   85.538582] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   85.538592] [drm:intel_display_power_get] enabling power well 1
>[   85.538605] [drm:skl_set_power_well] Enabling power well 1
>[   85.538644] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.538647] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.538650] [drm:intel_display_power_get] enabling power well 2
>[   85.538653] [drm:skl_set_power_well] Enabling power well 2
>[   85.538661] [drm:intel_display_power_get] enabling DDI C power well
>[   85.538664] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.538674] [drm:intel_display_power_put] disabling DDI C power well
>[   85.538677] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.538680] [drm:intel_display_power_put] disabling power well 2
>[   85.538684] [drm:skl_set_power_well] Disabling power well 2
>[   85.538686] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.538689] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.538692] [drm:intel_display_power_put] disabling power well 1
>[   85.538697] [drm:skl_set_power_well] Disabling power well 1
>[   85.538699] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   85.538703] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   85.538705] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   85.538708] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   85.538710] [drm:intel_display_power_get] enabling power well 1
>[   85.538716] [drm:skl_set_power_well] Enabling power well 1
>[   85.538755] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.538758] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.538761] [drm:intel_display_power_get] enabling power well 2
>[   85.538764] [drm:skl_set_power_well] Enabling power well 2
>[   85.538772] [drm:intel_display_power_get] enabling DDI C power well
>[   85.538775] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.538784] [drm:intel_display_power_put] disabling DDI C power well
>[   85.538788] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.538790] [drm:intel_display_power_put] disabling power well 2
>[   85.538794] [drm:skl_set_power_well] Disabling power well 2
>[   85.538797] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.538800] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.538803] [drm:intel_display_power_put] disabling power well 1
>[   85.538807] [drm:skl_set_power_well] Disabling power well 1
>[   85.538810] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   85.538816] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.538820] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.538824] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   85.538826] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   85.538829] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   85.538831] [drm:intel_display_power_get] enabling power well 1
>[   85.538837] [drm:skl_set_power_well] Enabling power well 1
>[   85.538878] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.538889] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.538904] [drm:intel_display_power_get] enabling power well 2
>[   85.538918] [drm:skl_set_power_well] Enabling power well 2
>[   85.538936] [drm:intel_display_power_get] enabling DDI C power well
>[   85.538950] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.538970] [drm:intel_display_power_put] disabling DDI C power well
>[   85.538984] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.538996] [drm:intel_display_power_put] disabling power well 2
>[   85.539000] [drm:skl_set_power_well] Disabling power well 2
>[   85.539003] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.539006] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.539009] [drm:intel_display_power_put] disabling power well 1
>[   85.539013] [drm:skl_set_power_well] Disabling power well 1
>[   85.539016] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   85.539019] [drm:drm_mode_getconnector] [CONNECTOR:50:?]
>[   85.539022] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2]
>[   85.539025] [drm:intel_dp_detect] [CONNECTOR:50:DP-2]
>[   85.539027] [drm:intel_display_power_get] enabling power well 1
>[   85.539033] [drm:skl_set_power_well] Enabling power well 1
>[   85.539072] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.539075] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.539078] [drm:intel_display_power_get] enabling power well 2
>[   85.539081] [drm:skl_set_power_well] Enabling power well 2
>[   85.539089] [drm:intel_display_power_get] enabling DDI C power well
>[   85.539092] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.539101] [drm:intel_display_power_put] disabling DDI C power well
>[   85.539105] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.539108] [drm:intel_display_power_put] disabling power well 2
>[   85.539111] [drm:skl_set_power_well] Disabling power well 2
>[   85.539114] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.539117] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.539120] [drm:intel_display_power_put] disabling power well 1
>[   85.539124] [drm:skl_set_power_well] Disabling power well 1
>[   85.539127] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:50:DP-2] disconnected
>[   85.539133] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.539137] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.539140] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   85.539143] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   85.539146] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   85.539149] [drm:intel_display_power_get] enabling power well 1
>[   85.539155] [drm:skl_set_power_well] Enabling power well 1
>[   85.539195] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.539209] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.539223] [drm:intel_display_power_get] enabling power well 2
>[   85.539236] [drm:skl_set_power_well] Enabling power well 2
>[   85.539252] [drm:intel_display_power_get] enabling DDI C power well
>[   85.539267] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.539533] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   85.539536] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   85.539539] [drm:intel_display_power_put] disabling DDI C power well
>[   85.539542] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.539545] [drm:intel_display_power_put] disabling power well 2
>[   85.539549] [drm:skl_set_power_well] Disabling power well 2
>[   85.539551] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.539555] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.539557] [drm:intel_display_power_put] disabling power well 1
>[   85.539562] [drm:skl_set_power_well] Disabling power well 1
>[   85.539565] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   85.539569] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   85.539571] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   85.539574] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   85.539577] [drm:intel_display_power_get] enabling power well 1
>[   85.539583] [drm:skl_set_power_well] Enabling power well 1
>[   85.539622] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.539625] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.539628] [drm:intel_display_power_get] enabling power well 2
>[   85.539631] [drm:skl_set_power_well] Enabling power well 2
>[   85.539639] [drm:intel_display_power_get] enabling DDI C power well
>[   85.539642] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.539887] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   85.539890] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   85.539892] [drm:intel_display_power_put] disabling DDI C power well
>[   85.539896] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.539898] [drm:intel_display_power_put] disabling power well 2
>[   85.539902] [drm:skl_set_power_well] Disabling power well 2
>[   85.539904] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.539908] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.539910] [drm:intel_display_power_put] disabling power well 1
>[   85.539915] [drm:skl_set_power_well] Disabling power well 1
>[   85.539918] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   85.539925] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.539930] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.539933] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   85.539936] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   85.539938] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   85.539941] [drm:intel_display_power_get] enabling power well 1
>[   85.539947] [drm:skl_set_power_well] Enabling power well 1
>[   85.539986] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.539989] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.539992] [drm:intel_display_power_get] enabling power well 2
>[   85.539995] [drm:skl_set_power_well] Enabling power well 2
>[   85.540003] [drm:intel_display_power_get] enabling DDI C power well
>[   85.540006] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.540249] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   85.540252] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   85.540255] [drm:intel_display_power_put] disabling DDI C power well
>[   85.540258] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.540261] [drm:intel_display_power_put] disabling power well 2
>[   85.540264] [drm:skl_set_power_well] Disabling power well 2
>[   85.540267] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.540271] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.540273] [drm:intel_display_power_put] disabling power well 1
>[   85.540278] [drm:skl_set_power_well] Disabling power well 1
>[   85.540280] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   85.540284] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   85.540287] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   85.540289] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   85.540292] [drm:intel_display_power_get] enabling power well 1
>[   85.540298] [drm:skl_set_power_well] Enabling power well 1
>[   85.540337] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.540340] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.540343] [drm:intel_display_power_get] enabling power well 2
>[   85.540346] [drm:skl_set_power_well] Enabling power well 2
>[   85.540354] [drm:intel_display_power_get] enabling DDI C power well
>[   85.540357] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.540553] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   85.540562] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   85.540568] [drm:intel_display_power_put] disabling DDI C power well
>[   85.540575] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.540579] [drm:intel_display_power_put] disabling power well 2
>[   85.540584] [drm:skl_set_power_well] Disabling power well 2
>[   85.540588] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.540593] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.540596] [drm:intel_display_power_put] disabling power well 1
>[   85.540603] [drm:skl_set_power_well] Disabling power well 1
>[   85.540608] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   85.540631] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.540638] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[5] ENCODERS[9]
>[   85.540644] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   85.540649] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   85.540653] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   85.540658] [drm:intel_display_power_get] enabling power well 1
>[   85.540666] [drm:skl_set_power_well] Enabling power well 1
>[   85.540709] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.540714] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.540718] [drm:intel_display_power_get] enabling power well 2
>[   85.540722] [drm:skl_set_power_well] Enabling power well 2
>[   85.540737] [drm:intel_display_power_get] enabling DDI C power well
>[   85.540749] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.541012] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   85.541018] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   85.541022] [drm:intel_display_power_put] disabling DDI C power well
>[   85.541027] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.541031] [drm:intel_display_power_put] disabling power well 2
>[   85.541036] [drm:skl_set_power_well] Disabling power well 2
>[   85.541039] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.541043] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.541045] [drm:intel_display_power_put] disabling power well 1
>[   85.541050] [drm:skl_set_power_well] Disabling power well 1
>[   85.541053] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   85.541059] [drm:drm_mode_getconnector] [CONNECTOR:54:?]
>[   85.541062] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2]
>[   85.541064] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   85.541067] [drm:intel_display_power_get] enabling power well 1
>[   85.541073] [drm:skl_set_power_well] Enabling power well 1
>[   85.541112] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.541116] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.541119] [drm:intel_display_power_get] enabling power well 2
>[   85.541122] [drm:skl_set_power_well] Enabling power well 2
>[   85.541130] [drm:intel_display_power_get] enabling DDI C power well
>[   85.541133] [drm:skl_set_power_well] Enabling DDI C power well
>[   85.541377] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[   85.541380] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   85.541383] [drm:intel_display_power_put] disabling DDI C power well
>[   85.541386] [drm:skl_set_power_well] Disabling DDI C power well
>[   85.541389] [drm:intel_display_power_put] disabling power well 2
>[   85.541393] [drm:skl_set_power_well] Disabling power well 2
>[   85.541395] [drm:intel_display_power_put] disabling MISC IO power well
>[   85.541399] [drm:skl_set_power_well] Disabling MISC IO power well
>[   85.541401] [drm:intel_display_power_put] disabling power well 1
>[   85.541406] [drm:skl_set_power_well] Disabling power well 1
>[   85.541409] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:54:HDMI-A-2] disconnected
>[   85.542714] kms_flip: exiting, ret=0
>[   85.542833] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[   85.542837] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   85.542839] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=0
>[   85.542842] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] encoder changed, full mode switch
>[   85.542844] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   85.542846] [drm:intel_modeset_stage_output_state] [ENCODER:33:TMDS-33] crtc changed, full mode switch
>[   85.542848] [drm:intel_modeset_stage_output_state] [CRTC:20] enabled, full mode switch
>[   85.542852] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   85.542855] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   85.542860] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[   85.542862] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   85.542865] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[   85.542868] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[   85.542873] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   85.542875] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   85.542877] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   85.542879] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   85.542882] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   85.542886] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[   85.542890] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   85.542892] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   85.542895] [drm:intel_dump_pipe_config] requested mode:
>[   85.542901] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   85.542902] [drm:intel_dump_pipe_config] adjusted mode:
>[   85.542907] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   85.542912] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[   85.542913] [drm:intel_dump_pipe_config] port clock: 540000
>[   85.542914] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   85.542917] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   85.542918] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   85.542920] [drm:intel_dump_pipe_config] ips: 0
>[   85.542921] [drm:intel_dump_pipe_config] double wide: 0
>[   85.542928] [drm:intel_display_power_get] enabling power well 1
>[   85.542934] [drm:skl_set_power_well] Enabling power well 1
>[   85.542976] [drm:intel_display_power_get] enabling MISC IO power well
>[   85.542979] [drm:skl_set_power_well] Enabling MISC IO power well
>[   85.542981] [drm:intel_display_power_get] enabling DDI A/E power well
>[   85.542983] [drm:skl_set_power_well] Enabling DDI A/E power well
>[   85.543011] [drm:edp_panel_on] Turn eDP port A panel power on
>[   85.543019] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   86.073744] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[   86.073753] [drm:wait_panel_status] Wait complete
>[   86.073776] [drm:wait_panel_on] Wait for panel power on
>[   86.073793] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[   86.282744] [drm:wait_panel_status] Wait complete
>[   86.282763] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   86.282810] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[   86.283930] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   86.284581] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[   86.285219] [drm:intel_dp_start_link_train] clock recovery OK
>[   86.286168] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[   86.287107] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   86.287383] [drm:skl_wm_flush_pipe] flush pipe A (pass 3)
>[   86.287397] [drm:intel_edp_backlight_on] 
>[   86.287399] [drm:intel_panel_enable_backlight] pipe A
>[   86.287438] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[   86.287477] [drm:intel_psr_match_conditions] PSR disable by flag
>[   86.287478] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   86.287486] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[   86.287504] [drm:intel_connector_check_state] [CONNECTOR:34:eDP-1]
>[   86.287509] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[   86.287511] [drm:check_encoder_state] [ENCODER:42:TMDS-42]
>[   86.287514] [drm:check_encoder_state] [ENCODER:44:DP MST-44]
>[   86.287515] [drm:check_encoder_state] [ENCODER:45:DP MST-45]
>[   86.287516] [drm:check_encoder_state] [ENCODER:46:DP MST-46]
>[   86.287518] [drm:check_encoder_state] [ENCODER:49:TMDS-49]
>[   86.287524] [drm:check_encoder_state] [ENCODER:51:DP MST-51]
>[   86.287525] [drm:check_encoder_state] [ENCODER:52:DP MST-52]
>[   86.287526] [drm:check_encoder_state] [ENCODER:53:DP MST-53]
>[   86.287528] [drm:check_crtc_state] [CRTC:20]
>[   86.287544] [drm:check_crtc_state] [CRTC:25]
>[   86.287545] [drm:check_crtc_state] [CRTC:30]
>[   86.287547] [drm:check_shared_dpll_state] DPLL 1
>[   86.287550] [drm:check_shared_dpll_state] DPLL 2
>[   86.287552] [drm:check_shared_dpll_state] DPLL 3
>[   86.287557] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[   86.287561] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[   86.287563] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   86.287567] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   86.287570] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[   86.287573] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[   86.287575] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   86.287578] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   86.325676] [drm:skylake_update_primary_plane] Writing base 016C0000 0,0,3200,1800 pitch=12800
>[   86.325720] [drm:intel_crtc_set_config] [CRTC:20] [FB:57] #connectors=1 (x y) (0 0)
>[   86.325727] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   86.325731] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   86.325737] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   86.325741] [drm:connected_sink_compute_bpp] [CONNECTOR:34:eDP-1] checking for sink bpp constrains
>[   86.325747] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[   86.325750] [drm:intel_dp_compute_config] clamping bpp for eDP panel to BIOS-provided 18
>[   86.325753] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 18
>[   86.325756] [drm:intel_dp_compute_config] DP link bw required 650358 available 1728000
>[   86.325761] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1
>[   86.325764] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   86.325767] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   86.325769] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   86.325774] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   86.325778] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3157174, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[   86.325781] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   86.325784] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   86.325786] [drm:intel_dump_pipe_config] requested mode:
>[   86.325792] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   86.325794] [drm:intel_dump_pipe_config] adjusted mode:
>[   86.325799] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[   86.325804] [drm:intel_dump_crtc_timings] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[   86.325806] [drm:intel_dump_pipe_config] port clock: 540000
>[   86.325809] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   86.325812] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   86.325815] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   86.325818] [drm:intel_dump_pipe_config] ips: 0
>[   86.325820] [drm:intel_dump_pipe_config] double wide: 0
>[   86.325824] [drm:intel_crtc_set_config] [CRTC:25] [NOFB]
>[   86.325828] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:25], mode_changed=0, fb_changed=0
>[   86.325831] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   86.325835] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   86.325841] [drm:intel_crtc_set_config] [CRTC:30] [NOFB]
>[   86.325845] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:30], mode_changed=0, fb_changed=0
>[   86.325848] [drm:intel_modeset_stage_output_state] [CONNECTOR:34:eDP-1] to [CRTC:20]
>[   86.325851] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   89.295133] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   89.295177] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007

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