Attachment 115712 Details for Bug 90258 – patch to fix the issue

[patch] patch to fix the issue

0001-i965-fs-set-execution-size-to-8-with-simd8-ddy-instr.patch (text/plain), 1.42 KB, created by Tapani Pälli on 2015-05-12 11:20:56 UTC

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Creator: Tapani Pälli

Created: 2015-05-12 11:20:56 UTC

Size: 1.42 KB

patch

obsolete

>From 2c2c6905f59883e44f081d134d952a008bd2a46a Mon Sep 17 00:00:00 2001
>From: =?UTF-8?q?Tapani=20P=C3=A4lli?= <tapani.palli@intel.com>
>Date: Tue, 12 May 2015 14:13:23 +0300
>Subject: [PATCH] i965/fs: set execution size to 8 with simd8 ddy instruction
>MIME-Version: 1.0
>Content-Type: text/plain; charset=UTF-8
>Content-Transfer-Encoding: 8bit
>
>Commit dd5c825 changed the way how execution size for instructions
>get set. Previously it was based on destination register width, now
>it is set explicitly when emitting instructions.
>
>Signed-off-by: Tapani PÃ¤lli <tapani.palli@intel.com>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90258
>---
> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>index ba2a12f..5ccb00c 100644
>--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>@@ -928,6 +928,7 @@ fs_generator::generate_ddy(enum opcode opcode,
>       brw_set_default_access_mode(p, BRW_ALIGN_16);
>       if (unroll_to_simd8) {
>          brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
>+         brw_set_default_exec_size(p, BRW_EXECUTE_8);
>          if (negate_value) {
>             brw_ADD(p, firsthalf(dst), firsthalf(src1), negate(firsthalf(src0)));
>             brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
>-- 
>2.1.0
>

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