Attachment 116017 Details for Bug 90622 – dmesg with drm.debug=0x06, from boot until the segfault

dmesg with drm.debug=0x06, from boot until the segfault

dmesg.full (text/plain), 176.17 KB, created by ken moffat on 2015-05-24 21:24:32 UTC

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Creator: ken moffat

Created: 2015-05-24 21:24:32 UTC

Size: 176.17 KB

patch

obsolete

>[    0.000000] CPU0 microcode updated early to revision 0x29, date = 2013-06-12
>[    0.000000] Linux version 4.0.4 (root@jtm1) (gcc version 5.1.0 (GCC) ) #1 SMP PREEMPT Sun May 24 01:47:19 BST 2015
>[    0.000000] Command line: BOOT_IMAGE=/vmlinuz-4.0.4-sda6 root=/dev/sda6 ro drm.debug=0x06
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000001fffffff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000020000000-0x00000000201fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000020200000-0x000000003fffffff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000040000000-0x00000000401fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000040200000-0x00000000d9dfefff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000d9dff000-0x00000000da4a5fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000da4a6000-0x00000000da725fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000da726000-0x00000000da72afff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000da72b000-0x00000000da76dfff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000da76e000-0x00000000dadddfff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dadde000-0x00000000dafdffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dafe0000-0x00000000daffffff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000db800000-0x00000000df9fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000011f5fffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] SMBIOS 2.7 present.
>[    0.000000] DMI: Gigabyte Tecohnology Co., Ltd. H61M-S2PV/H61M-S2PV, BIOS FC 02/15/2012
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] e820: last_pfn = 0x11f600 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: uncachable
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-BFFFF uncachable
>[    0.000000]   C0000-CFFFF write-protect
>[    0.000000]   D0000-E7FFF uncachable
>[    0.000000]   E8000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 000000000 mask F00000000 write-back
>[    0.000000]   1 base 100000000 mask FE0000000 write-back
>[    0.000000]   2 base 0E0000000 mask FE0000000 uncachable
>[    0.000000]   3 base 0DC000000 mask FFC000000 uncachable
>[    0.000000]   4 base 0DB800000 mask FFF800000 uncachable
>[    0.000000]   5 base 11F800000 mask FFF800000 uncachable
>[    0.000000]   6 base 11F600000 mask FFFE00000 uncachable
>[    0.000000]   7 disabled
>[    0.000000]   8 disabled
>[    0.000000]   9 disabled
>[    0.000000] PAT configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- UC  
>[    0.000000] e820: update [mem 0xdb800000-0xffffffff] usable ==> reserved
>[    0.000000] e820: last_pfn = 0xdb000 max_arch_pfn = 0x400000000
>[    0.000000] found SMP MP-table at [mem 0x000fcaf0-0x000fcaff] mapped at [ffff8800000fcaf0]
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000097000] 97000 size 24576
>[    0.000000] reserving inaccessible SNB gfx pages
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x01b96000, 0x01b96fff] PGTABLE
>[    0.000000] BRK [0x01b97000, 0x01b97fff] PGTABLE
>[    0.000000] BRK [0x01b98000, 0x01b98fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x11f400000-0x11f5fffff]
>[    0.000000]  [mem 0x11f400000-0x11f5fffff] page 2M
>[    0.000000] BRK [0x01b99000, 0x01b99fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x11f3fffff]
>[    0.000000]  [mem 0x100000000-0x11f3fffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0xc0000000-0xd9dfefff]
>[    0.000000]  [mem 0xc0000000-0xd9bfffff] page 2M
>[    0.000000]  [mem 0xd9c00000-0xd9dfefff] page 4k
>[    0.000000] BRK [0x01b9a000, 0x01b9afff] PGTABLE
>[    0.000000] BRK [0x01b9b000, 0x01b9bfff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xda76e000-0xdadddfff]
>[    0.000000]  [mem 0xda76e000-0xda7fffff] page 4k
>[    0.000000]  [mem 0xda800000-0xdabfffff] page 2M
>[    0.000000]  [mem 0xdac00000-0xdadddfff] page 4k
>[    0.000000] init_memory_mapping: [mem 0xdafe0000-0xdaffffff]
>[    0.000000]  [mem 0xdafe0000-0xdaffffff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x00100000-0x1fffffff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x1fffffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x20200000-0x3fffffff]
>[    0.000000]  [mem 0x20200000-0x3fffffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x40200000-0xbfffffff]
>[    0.000000]  [mem 0x40200000-0xbfffffff] page 2M
>[    0.000000] RAMDISK: [mem 0x37fe4000-0x37fe9fff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000000F0450 000024 (v02 ALASKA)
>[    0.000000] ACPI: XSDT 0x00000000DA708070 000064 (v01 ALASKA A M I    01072009 AMI  00010013)
>[    0.000000] ACPI: FACP 0x00000000DA711648 0000F4 (v04 ALASKA A M I    01072009 AMI  00010013)
>[    0.000000] ACPI: DSDT 0x00000000DA708170 0094D8 (v02 ALASKA A M I    00000012 INTL 20051117)
>[    0.000000] ACPI: FACS 0x00000000DA724F80 000040
>[    0.000000] ACPI: APIC 0x00000000DA711740 000072 (v03 ALASKA A M I    01072009 AMI  00010013)
>[    0.000000] ACPI: MCFG 0x00000000DA7117B8 00003C (v01 ALASKA A M I    01072009 MSFT 00000097)
>[    0.000000] ACPI: HPET 0x00000000DA7117F8 000038 (v01 ALASKA A M I    01072009 AMI. 00000005)
>[    0.000000] ACPI: SSDT 0x00000000DA711830 00036D (v01 SataRe SataTabl 00001000 INTL 20091112)
>[    0.000000] ACPI: SSDT 0x00000000DA711BA0 0009AA (v01 PmRef  Cpu0Ist  00003000 INTL 20051117)
>[    0.000000] ACPI: SSDT 0x00000000DA712550 000A92 (v01 PmRef  CpuPm    00003000 INTL 20051117)
>[    0.000000] ACPI: BGRT 0x00000000DA712FE8 000038 (v00 ALASKA A M I    01072009 AMI  00010013)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000]  [ffffea0000000000-ffffea00047fffff] PMD -> [ffff88011ac00000-ffff88011ebfffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[    0.000000]   Normal   [mem 0x0000000100000000-0x000000011f5fffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x0000000000001000-0x000000000009cfff]
>[    0.000000]   node   0: [mem 0x0000000000100000-0x000000001fffffff]
>[    0.000000]   node   0: [mem 0x0000000020200000-0x000000003fffffff]
>[    0.000000]   node   0: [mem 0x0000000040200000-0x00000000d9dfefff]
>[    0.000000]   node   0: [mem 0x00000000da76e000-0x00000000dadddfff]
>[    0.000000]   node   0: [mem 0x00000000dafe0000-0x00000000daffffff]
>[    0.000000]   node   0: [mem 0x0000000100000000-0x000000011f5fffff]
>[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000011f5fffff]
>[    0.000000] On node 0 totalpages: 1021483
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 156 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 13891 pages used for memmap
>[    0.000000]   DMA32 zone: 888975 pages, LIFO batch:31
>[    0.000000]   Normal zone: 2008 pages used for memmap
>[    0.000000]   Normal zone: 128512 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xdba00000-0xdf9fffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x408
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x01] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled)
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1])
>[    0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009d000-0x0009dfff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x20000000-0x201fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x40000000-0x401fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xd9dff000-0xda4a5fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xda4a6000-0xda725fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xda726000-0xda72afff]
>[    0.000000] PM: Registered nosave memory: [mem 0xda72b000-0xda76dfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdadde000-0xdafdffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdb000000-0xdb7fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdb800000-0xdf9fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdfa00000-0xf7ffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed00000-0xfed03fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[    0.000000] e820: [mem 0xdfa00000-0xf7ffffff] available for PCI devices
>[    0.000000] setup_percpu: NR_CPUS:4 nr_cpumask_bits:4 nr_cpu_ids:4 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 30 pages/cpu @ffff88011f200000 s84312 r8192 d30376 u524288
>[    0.000000] pcpu-alloc: s84312 r8192 d30376 u524288 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 
>[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 1005364
>[    0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-4.0.4-sda6 root=/dev/sda6 ro drm.debug=0x06
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
>[    0.000000] xsave: enabled xstate_bv 0x7, cntxt size 0x340 using standard form
>[    0.000000] AGP: Checking aperture...
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] Memory: 3935092K/4085932K available (5934K kernel code, 677K rwdata, 3264K rodata, 1144K init, 804K bss, 150840K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>[    0.000000] Preemptible hierarchical RCU implementation.
>[    0.000000] 	RCU kthread priority: 1.
>[    0.000000] NR_IRQS:4352 nr_irqs:456 16
>[    0.000000] Console: colour VGA+ 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] tsc: Detected 3292.605 MHz processor
>[    0.000001] Calibrating delay loop (skipped), value calculated using timer frequency.. 6585.21 BogoMIPS (lpj=13170420)
>[    0.000123] pid_max: default: 32768 minimum: 301
>[    0.000185] ACPI: Core revision 20150204
>[    0.008544] ACPI: All ACPI Tables successfully acquired
>[    0.008878] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes)
>[    0.008942] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes)
>[    0.009140] CPU: Physical Processor ID: 0
>[    0.009199] CPU: Processor Core ID: 0
>[    0.009259] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.009320] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.009384] mce: CPU supports 7 MCE banks
>[    0.009451] CPU0: Thermal monitoring enabled (TM1)
>[    0.009514] process: using mwait in idle threads
>[    0.009575] Last level iTLB entries: 4KB 512, 2MB 8, 4MB 8
>[    0.009636] Last level dTLB entries: 4KB 512, 2MB 32, 4MB 32, 1GB 0
>[    0.009784] Freeing SMP alternatives memory: 12K (ffffffff81ac8000 - ffffffff81acb000)
>[    0.009859] ftrace: allocating 27519 entries in 108 pages
>[    0.020446] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.060196] TSC deadline timer enabled
>[    0.060199] smpboot: CPU0: Intel(R) Core(TM) i3-2120 CPU @ 3.30GHz (fam: 06, model: 2a, stepping: 07)
>[    0.060421] Performance Events: PEBS fmt1+, 16-deep LBR, SandyBridge events, full-width counters, Intel PMU driver.
>[    0.060724] ... version:                3
>[    0.060782] ... bit width:              48
>[    0.060841] ... generic registers:      4
>[    0.060899] ... value mask:             0000ffffffffffff
>[    0.060960] ... max period:             0000ffffffffffff
>[    0.061019] ... fixed-purpose events:   3
>[    0.061078] ... event mask:             000000070000000f
>[    0.092309] x86: Booting SMP configuration:
>[    0.092368] .... node  #0, CPUs:      #1
>[    0.103774] CPU1 microcode updated early to revision 0x29, date = 2013-06-12
>[    0.113922]  #2
>[    0.135312]  #3
>[    0.148403] x86: Booted up 1 node, 4 CPUs
>[    0.148516] smpboot: Total of 4 processors activated (26340.84 BogoMIPS)
>[    0.150699] devtmpfs: initialized
>[    0.150947] PM: Registering ACPI NVS region [mem 0xda4a6000-0xda725fff] (2621440 bytes)
>[    0.151063] PM: Registering ACPI NVS region [mem 0xda72b000-0xda76dfff] (274432 bytes)
>[    0.151342] NET: Registered protocol family 16
>[    0.160410] cpuidle: using governor ladder
>[    0.166557] cpuidle: using governor menu
>[    0.166683] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
>[    0.166757] ACPI: bus type PCI registered
>[    0.167501] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.167578] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
>[    0.167680] PCI: Using configuration type 1 for base access
>[    0.180623] ACPI: Added _OSI(Module Device)
>[    0.180683] ACPI: Added _OSI(Processor Device)
>[    0.180742] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.180802] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.183744] ACPI: Executed 1 blocks of module-level executable AML code
>[    0.187412] ACPI: Dynamic OEM Table Load:
>[    0.187561] ACPI: SSDT 0xFFFF88011A834000 00083B (v01 PmRef  Cpu0Cst  00003001 INTL 20051117)
>[    0.188326] ACPI: Dynamic OEM Table Load:
>[    0.188475] ACPI: SSDT 0xFFFF88011AB78C00 000303 (v01 PmRef  ApIst    00003000 INTL 20051117)
>[    0.189142] ACPI: Dynamic OEM Table Load:
>[    0.189288] ACPI: SSDT 0xFFFF88011AB98000 000119 (v01 PmRef  ApCst    00003000 INTL 20051117)
>[    0.190586] ACPI: Interpreter enabled
>[    0.190654] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20150204/hwxface-580)
>[    0.190825] ACPI: (supports S0 S1 S3 S4 S5)
>[    0.190884] ACPI: Using IOAPIC for interrupt routing
>[    0.190968] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.198277] ACPI: Power Resource [FN00] (off)
>[    0.198424] ACPI: Power Resource [FN01] (off)
>[    0.198566] ACPI: Power Resource [FN02] (off)
>[    0.198708] ACPI: Power Resource [FN03] (off)
>[    0.198849] ACPI: Power Resource [FN04] (off)
>[    0.199520] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])
>[    0.199585] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.199713] \_SB_.PCI0:_OSC invalid UUID
>[    0.199714] _OSC request data:1 1f 0 
>[    0.199717] acpi PNP0A08:00: _OSC failed (AE_ERROR); disabling ASPM
>[    0.200071] PCI host bridge to bus 0000:00
>[    0.200132] pci_bus 0000:00: root bus resource [bus 00-3e]
>[    0.200193] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[    0.200256] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    0.200320] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    0.200394] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window]
>[    0.200472] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window]
>[    0.200546] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window]
>[    0.200620] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window]
>[    0.200694] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff window]
>[    0.200768] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff window]
>[    0.200842] pci_bus 0000:00: root bus resource [mem 0xdfa00000-0xfeafffff window]
>[    0.200922] pci 0000:00:00.0: [8086:0100] type 00 class 0x060000
>[    0.201017] pci 0000:00:02.0: [8086:0102] type 00 class 0x030000
>[    0.201025] pci 0000:00:02.0: reg 0x10: [mem 0xf7800000-0xf7bfffff 64bit]
>[    0.201031] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref]
>[    0.201035] pci 0000:00:02.0: reg 0x20: [io  0xf000-0xf03f]
>[    0.201146] pci 0000:00:16.0: [8086:1c3a] type 00 class 0x078000
>[    0.201167] pci 0000:00:16.0: reg 0x10: [mem 0xf7d0a000-0xf7d0a00f 64bit]
>[    0.201240] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.201337] pci 0000:00:1a.0: [8086:1c2d] type 00 class 0x0c0320
>[    0.201356] pci 0000:00:1a.0: reg 0x10: [mem 0xf7d08000-0xf7d083ff]
>[    0.201443] pci 0000:00:1a.0: PME# supported from D0 D3hot D3cold
>[    0.201512] pci 0000:00:1a.0: System wakeup disabled by ACPI
>[    0.201614] pci 0000:00:1b.0: [8086:1c20] type 00 class 0x040300
>[    0.201629] pci 0000:00:1b.0: reg 0x10: [mem 0xf7d00000-0xf7d03fff 64bit]
>[    0.201701] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    0.201756] pci 0000:00:1b.0: System wakeup disabled by ACPI
>[    0.201853] pci 0000:00:1c.0: [8086:1c10] type 01 class 0x060400
>[    0.201933] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.201990] pci 0000:00:1c.0: System wakeup disabled by ACPI
>[    0.202090] pci 0000:00:1c.4: [8086:1c18] type 01 class 0x060400
>[    0.202170] pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold
>[    0.202227] pci 0000:00:1c.4: System wakeup disabled by ACPI
>[    0.202324] pci 0000:00:1c.5: [8086:244e] type 01 class 0x060401
>[    0.202404] pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
>[    0.202460] pci 0000:00:1c.5: System wakeup disabled by ACPI
>[    0.202562] pci 0000:00:1d.0: [8086:1c26] type 00 class 0x0c0320
>[    0.202581] pci 0000:00:1d.0: reg 0x10: [mem 0xf7d07000-0xf7d073ff]
>[    0.202668] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.202736] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.202836] pci 0000:00:1f.0: [8086:1c5c] type 00 class 0x060100
>[    0.203018] pci 0000:00:1f.2: [8086:1c02] type 00 class 0x010601
>[    0.203034] pci 0000:00:1f.2: reg 0x10: [io  0xf0b0-0xf0b7]
>[    0.203041] pci 0000:00:1f.2: reg 0x14: [io  0xf0a0-0xf0a3]
>[    0.203047] pci 0000:00:1f.2: reg 0x18: [io  0xf090-0xf097]
>[    0.203054] pci 0000:00:1f.2: reg 0x1c: [io  0xf080-0xf083]
>[    0.203061] pci 0000:00:1f.2: reg 0x20: [io  0xf060-0xf07f]
>[    0.203068] pci 0000:00:1f.2: reg 0x24: [mem 0xf7d06000-0xf7d067ff]
>[    0.203111] pci 0000:00:1f.2: PME# supported from D3hot
>[    0.203194] pci 0000:00:1f.3: [8086:1c22] type 00 class 0x0c0500
>[    0.203207] pci 0000:00:1f.3: reg 0x10: [mem 0xf7d05000-0xf7d050ff 64bit]
>[    0.203226] pci 0000:00:1f.3: reg 0x20: [io  0xf040-0xf05f]
>[    0.203369] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.203509] pci 0000:02:00.0: [1969:1083] type 00 class 0x020000
>[    0.203539] pci 0000:02:00.0: reg 0x10: [mem 0xf7c00000-0xf7c3ffff 64bit]
>[    0.203553] pci 0000:02:00.0: reg 0x18: [io  0xe000-0xe07f]
>[    0.203692] pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>[    0.203722] pci 0000:02:00.0: System wakeup disabled by ACPI
>[    0.208501] pci 0000:00:1c.4: PCI bridge to [bus 02]
>[    0.208583] pci 0000:00:1c.4:   bridge window [io  0xe000-0xefff]
>[    0.208587] pci 0000:00:1c.4:   bridge window [mem 0xf7c00000-0xf7cfffff]
>[    0.208665] pci 0000:03:00.0: [1283:8892] type 01 class 0x060401
>[    0.208825] pci 0000:03:00.0: supports D1 D2
>[    0.208826] pci 0000:03:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>[    0.208855] pci 0000:03:00.0: System wakeup disabled by ACPI
>[    0.208946] pci 0000:00:1c.5: PCI bridge to [bus 03-04] (subtractive decode)
>[    0.209018] pci 0000:00:1c.5:   bridge window [io  0x0000-0x0cf7 window] (subtractive decode)
>[    0.209020] pci 0000:00:1c.5:   bridge window [io  0x0d00-0xffff window] (subtractive decode)
>[    0.209021] pci 0000:00:1c.5:   bridge window [mem 0x000a0000-0x000bffff window] (subtractive decode)
>[    0.209023] pci 0000:00:1c.5:   bridge window [mem 0x000d0000-0x000d3fff window] (subtractive decode)
>[    0.209024] pci 0000:00:1c.5:   bridge window [mem 0x000d4000-0x000d7fff window] (subtractive decode)
>[    0.209026] pci 0000:00:1c.5:   bridge window [mem 0x000d8000-0x000dbfff window] (subtractive decode)
>[    0.209027] pci 0000:00:1c.5:   bridge window [mem 0x000dc000-0x000dffff window] (subtractive decode)
>[    0.209029] pci 0000:00:1c.5:   bridge window [mem 0x000e0000-0x000e3fff window] (subtractive decode)
>[    0.209030] pci 0000:00:1c.5:   bridge window [mem 0x000e4000-0x000e7fff window] (subtractive decode)
>[    0.209032] pci 0000:00:1c.5:   bridge window [mem 0xdfa00000-0xfeafffff window] (subtractive decode)
>[    0.209181] pci 0000:03:00.0: PCI bridge to [bus 04] (subtractive decode)
>[    0.209269] pci 0000:03:00.0:   bridge window [io  0x0000-0x0cf7 window] (subtractive decode)
>[    0.209270] pci 0000:03:00.0:   bridge window [io  0x0d00-0xffff window] (subtractive decode)
>[    0.209272] pci 0000:03:00.0:   bridge window [mem 0x000a0000-0x000bffff window] (subtractive decode)
>[    0.209273] pci 0000:03:00.0:   bridge window [mem 0x000d0000-0x000d3fff window] (subtractive decode)
>[    0.209275] pci 0000:03:00.0:   bridge window [mem 0x000d4000-0x000d7fff window] (subtractive decode)
>[    0.209276] pci 0000:03:00.0:   bridge window [mem 0x000d8000-0x000dbfff window] (subtractive decode)
>[    0.209278] pci 0000:03:00.0:   bridge window [mem 0x000dc000-0x000dffff window] (subtractive decode)
>[    0.209280] pci 0000:03:00.0:   bridge window [mem 0x000e0000-0x000e3fff window] (subtractive decode)
>[    0.209281] pci 0000:03:00.0:   bridge window [mem 0x000e4000-0x000e7fff window] (subtractive decode)
>[    0.209283] pci 0000:03:00.0:   bridge window [mem 0xdfa00000-0xfeafffff window] (subtractive decode)
>[    0.209315] pci_bus 0000:00: on NUMA node 0
>[    0.209854] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.210438] ACPI: PCI Interrupt Link [LNKB] (IRQs *3 4 5 6 10 11 12 14 15)
>[    0.211020] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 *10 11 12 14 15)
>[    0.211604] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 *10 11 12 14 15)
>[    0.212185] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.212866] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.213545] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 *5 6 10 11 12 14 15)
>[    0.214127] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    0.214872] ACPI: Enabled 4 GPEs in block 00 to 3F
>[    0.215083] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.215145] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.215221] vgaarb: loaded
>[    0.215278] vgaarb: bridge control possible 0000:00:02.0
>[    0.215386] SCSI subsystem initialized
>[    0.215482] libata version 3.00 loaded.
>[    0.215487] ACPI: bus type USB registered
>[    0.215564] usbcore: registered new interface driver usbfs
>[    0.215633] usbcore: registered new interface driver hub
>[    0.215707] usbcore: registered new device driver usb
>[    0.215788] pps_core: LinuxPPS API ver. 1 registered
>[    0.215848] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>[    0.215927] PTP clock support registered
>[    0.216010] Advanced Linux Sound Architecture Driver Initialized.
>[    0.216081] PCI: Using ACPI for IRQ routing
>[    0.217584] PCI: pci_cache_line_size set to 64 bytes
>[    0.217621] e820: reserve RAM buffer [mem 0x0009d800-0x0009ffff]
>[    0.217622] e820: reserve RAM buffer [mem 0xd9dff000-0xdbffffff]
>[    0.217624] e820: reserve RAM buffer [mem 0xdadde000-0xdbffffff]
>[    0.217625] e820: reserve RAM buffer [mem 0xdb000000-0xdbffffff]
>[    0.217627] e820: reserve RAM buffer [mem 0x11f600000-0x11fffffff]
>[    0.217789] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.218231] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.221315] Switched to clocksource hpet
>[    0.224325] pnp: PnP ACPI init
>[    0.224471] system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved
>[    0.224536] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    0.224610] system 00:01: [io  0x0680-0x069f] has been reserved
>[    0.224672] system 00:01: [io  0x0200-0x020f] has been reserved
>[    0.224734] system 00:01: [io  0xffff] has been reserved
>[    0.224795] system 00:01: [io  0xffff] has been reserved
>[    0.224856] system 00:01: [io  0x0400-0x0453] could not be reserved
>[    0.224919] system 00:01: [io  0x0458-0x047f] has been reserved
>[    0.224981] system 00:01: [io  0x0500-0x057f] has been reserved
>[    0.225043] system 00:01: [io  0x164e-0x164f] has been reserved
>[    0.225105] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.225134] pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.225181] system 00:03: [io  0x0454-0x0457] has been reserved
>[    0.225244] system 00:03: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[    0.225400] system 00:04: [io  0x0a00-0x0a0f] has been reserved
>[    0.225462] system 00:04: [io  0x0a30-0x0a3f] has been reserved
>[    0.225524] system 00:04: [io  0x0a20-0x0a2f] has been reserved
>[    0.225587] system 00:04: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.225628] pnp 00:05: Plug and Play ACPI device, IDs PNP0303 PNP030b (active)
>[    0.225683] pnp 00:06: Plug and Play ACPI device, IDs PNP0f03 PNP0f13 (active)
>[    0.225846] pnp 00:07: [dma 0 disabled]
>[    0.225887] pnp 00:07: Plug and Play ACPI device, IDs PNP0501 (active)
>[    0.226206] pnp 00:08: [dma 0 disabled]
>[    0.226322] pnp 00:08: Plug and Play ACPI device, IDs PNP0400 (active)
>[    0.226371] system 00:09: [io  0x04d0-0x04d1] has been reserved
>[    0.226434] system 00:09: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.226668] system 00:0a: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    0.226732] system 00:0a: [mem 0xfed10000-0xfed17fff] has been reserved
>[    0.226795] system 00:0a: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.226858] system 00:0a: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.226921] system 00:0a: [mem 0xf8000000-0xfbffffff] has been reserved
>[    0.226984] system 00:0a: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    0.227047] system 00:0a: [mem 0xfed90000-0xfed93fff] has been reserved
>[    0.227110] system 00:0a: [mem 0xfed45000-0xfed8ffff] has been reserved
>[    0.227174] system 00:0a: [mem 0xff000000-0xffffffff] has been reserved
>[    0.227237] system 00:0a: [mem 0xfee00000-0xfeefffff] could not be reserved
>[    0.227301] system 00:0a: [mem 0xdfa00000-0xdfa00fff] has been reserved
>[    0.227364] system 00:0a: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.227529] system 00:0b: [mem 0x20000000-0x201fffff] has been reserved
>[    0.227592] system 00:0b: [mem 0x40000000-0x401fffff] has been reserved
>[    0.227656] system 00:0b: Plug and Play ACPI device, IDs PNP0c01 (active)
>[    0.227678] pnp: PnP ACPI: found 12 devices
>[    0.233776] pci 0000:00:1c.0: bridge window [io  0x1000-0x0fff] to [bus 01] add_size 1000
>[    0.233779] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 01] add_size 200000
>[    0.233781] pci 0000:00:1c.0: bridge window [mem 0x00100000-0x000fffff] to [bus 01] add_size 200000
>[    0.233811] pci 0000:00:1c.0: res[8]=[mem 0x00100000-0x000fffff] get_res_add_size add_size 200000
>[    0.233813] pci 0000:00:1c.0: res[9]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000
>[    0.233814] pci 0000:00:1c.0: res[7]=[io  0x1000-0x0fff] get_res_add_size add_size 1000
>[    0.233821] pci 0000:00:1c.0: BAR 8: assigned [mem 0xdfb00000-0xdfcfffff]
>[    0.233890] pci 0000:00:1c.0: BAR 9: assigned [mem 0xdfd00000-0xdfefffff 64bit pref]
>[    0.233966] pci 0000:00:1c.0: BAR 7: assigned [io  0x2000-0x2fff]
>[    0.234028] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.234090] pci 0000:00:1c.0:   bridge window [io  0x2000-0x2fff]
>[    0.234155] pci 0000:00:1c.0:   bridge window [mem 0xdfb00000-0xdfcfffff]
>[    0.234220] pci 0000:00:1c.0:   bridge window [mem 0xdfd00000-0xdfefffff 64bit pref]
>[    0.234298] pci 0000:00:1c.4: PCI bridge to [bus 02]
>[    0.234360] pci 0000:00:1c.4:   bridge window [io  0xe000-0xefff]
>[    0.234424] pci 0000:00:1c.4:   bridge window [mem 0xf7c00000-0xf7cfffff]
>[    0.234493] pci 0000:03:00.0: PCI bridge to [bus 04]
>[    0.234575] pci 0000:00:1c.5: PCI bridge to [bus 03-04]
>[    0.234645] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[    0.234647] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[    0.234648] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.234650] pci_bus 0000:00: resource 7 [mem 0x000d0000-0x000d3fff window]
>[    0.234651] pci_bus 0000:00: resource 8 [mem 0x000d4000-0x000d7fff window]
>[    0.234653] pci_bus 0000:00: resource 9 [mem 0x000d8000-0x000dbfff window]
>[    0.234654] pci_bus 0000:00: resource 10 [mem 0x000dc000-0x000dffff window]
>[    0.234655] pci_bus 0000:00: resource 11 [mem 0x000e0000-0x000e3fff window]
>[    0.234657] pci_bus 0000:00: resource 12 [mem 0x000e4000-0x000e7fff window]
>[    0.234658] pci_bus 0000:00: resource 13 [mem 0xdfa00000-0xfeafffff window]
>[    0.234660] pci_bus 0000:01: resource 0 [io  0x2000-0x2fff]
>[    0.234661] pci_bus 0000:01: resource 1 [mem 0xdfb00000-0xdfcfffff]
>[    0.234663] pci_bus 0000:01: resource 2 [mem 0xdfd00000-0xdfefffff 64bit pref]
>[    0.234664] pci_bus 0000:02: resource 0 [io  0xe000-0xefff]
>[    0.234665] pci_bus 0000:02: resource 1 [mem 0xf7c00000-0xf7cfffff]
>[    0.234667] pci_bus 0000:03: resource 4 [io  0x0000-0x0cf7 window]
>[    0.234668] pci_bus 0000:03: resource 5 [io  0x0d00-0xffff window]
>[    0.234670] pci_bus 0000:03: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.234671] pci_bus 0000:03: resource 7 [mem 0x000d0000-0x000d3fff window]
>[    0.234673] pci_bus 0000:03: resource 8 [mem 0x000d4000-0x000d7fff window]
>[    0.234674] pci_bus 0000:03: resource 9 [mem 0x000d8000-0x000dbfff window]
>[    0.234675] pci_bus 0000:03: resource 10 [mem 0x000dc000-0x000dffff window]
>[    0.234677] pci_bus 0000:03: resource 11 [mem 0x000e0000-0x000e3fff window]
>[    0.234678] pci_bus 0000:03: resource 12 [mem 0x000e4000-0x000e7fff window]
>[    0.234680] pci_bus 0000:03: resource 13 [mem 0xdfa00000-0xfeafffff window]
>[    0.234681] pci_bus 0000:04: resource 4 [io  0x0000-0x0cf7 window]
>[    0.234683] pci_bus 0000:04: resource 5 [io  0x0d00-0xffff window]
>[    0.234684] pci_bus 0000:04: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.234685] pci_bus 0000:04: resource 7 [mem 0x000d0000-0x000d3fff window]
>[    0.234687] pci_bus 0000:04: resource 8 [mem 0x000d4000-0x000d7fff window]
>[    0.234688] pci_bus 0000:04: resource 9 [mem 0x000d8000-0x000dbfff window]
>[    0.234690] pci_bus 0000:04: resource 10 [mem 0x000dc000-0x000dffff window]
>[    0.234691] pci_bus 0000:04: resource 11 [mem 0x000e0000-0x000e3fff window]
>[    0.234692] pci_bus 0000:04: resource 12 [mem 0x000e4000-0x000e7fff window]
>[    0.234694] pci_bus 0000:04: resource 13 [mem 0xdfa00000-0xfeafffff window]
>[    0.234718] NET: Registered protocol family 2
>[    0.234880] TCP established hash table entries: 32768 (order: 6, 262144 bytes)
>[    0.235000] TCP bind hash table entries: 32768 (order: 7, 524288 bytes)
>[    0.235121] TCP: Hash tables configured (established 32768 bind 32768)
>[    0.235198] TCP: reno registered
>[    0.235257] UDP hash table entries: 2048 (order: 4, 65536 bytes)
>[    0.235328] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes)
>[    0.235428] NET: Registered protocol family 1
>[    0.235550] RPC: Registered named UNIX socket transport module.
>[    0.235619] RPC: Registered udp transport module.
>[    0.235679] RPC: Registered tcp transport module.
>[    0.235738] RPC: Registered tcp NFSv4.1 backchannel transport module.
>[    0.235817] pci 0000:00:02.0: BIOS left Intel GPU interrupts enabled; disabling
>[    0.235900] pci 0000:00:02.0: Video device with shadowed ROM
>[    0.273450] PCI: CLS 64 bytes, default 64
>[    0.273493] Unpacking initramfs...
>[    0.273623] Freeing initrd memory: 24K (ffff880037fe4000 - ffff880037fea000)
>[    0.273689] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    0.273751] software IO TLB [mem 0xd5dff000-0xd9dff000] (64MB) mapped at [ffff8800d5dff000-ffff8800d9dfefff]
>[    0.274027] RAPL PMU detected, hw unit 2^-16 Joules, API unit is 2^-32 Joules, 3 fixed counters 163840 ms ovfl timer
>[    0.274176] microcode: CPU0 sig=0x206a7, pf=0x2, revision=0x29
>[    0.274241] microcode: CPU1 sig=0x206a7, pf=0x2, revision=0x29
>[    0.274307] microcode: CPU2 sig=0x206a7, pf=0x2, revision=0x29
>[    0.274373] microcode: CPU3 sig=0x206a7, pf=0x2, revision=0x29
>[    0.274473] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    0.274727] Scanning for low memory corruption every 60 seconds
>[    0.274990] futex hash table entries: 1024 (order: 4, 65536 bytes)
>[    0.275072] audit: initializing netlink subsys (disabled)
>[    0.275144] audit: type=2000 audit(1432499983.272:1): initialized
>[    0.275464] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    0.277814] io scheduler noop registered
>[    0.277875] io scheduler deadline registered
>[    0.277984] io scheduler cfq registered (default)
>[    0.278353] intel_idle: MWAIT substates: 0x1120
>[    0.278354] intel_idle: v0.4 model 0x2A
>[    0.278355] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    0.278575] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0
>[    0.278653] ACPI: Power Button [PWRB]
>[    0.278747] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
>[    0.279467] ACPI: Power Button [PWRF]
>[    0.280369] thermal LNXTHERM:00: registered as thermal_zone0
>[    0.280431] ACPI: Thermal Zone [TZ00] (28 C)
>[    0.280746] thermal LNXTHERM:01: registered as thermal_zone1
>[    0.280808] ACPI: Thermal Zone [TZ01] (30 C)
>[    0.280911] GHES: HEST is not enabled!
>[    0.291680] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>[    0.312166] 00:07: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
>[    0.312728] Linux agpgart interface v0.103
>[    0.312820] Hangcheck: starting hangcheck timer 0.9.1 (tick is 180 seconds, margin is 60 seconds).
>[    0.312907] [drm] Initialized drm 1.1.0 20060810
>[    0.313340] [drm:i915_dump_device_info] i915 device info: gen=6, pciid=0x0102 rev=0x09 flags=need_gfx_hws,has_fbc,has_hotplug,has_llc,
>[    0.313347] [drm:intel_detect_pch] Found CougarPoint PCH
>[    0.313414] [drm] Memory usable by graphics device = 2048M
>[    0.313475] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    0.313477] [drm:i915_gem_gtt_init] GTT stolen size = 64M
>[    0.313478] [drm:i915_gem_gtt_init] ppgtt mode: 1
>[    0.313479] [drm] Replacing VGA console driver
>[    0.314001] Console: switching to colour dummy device 80x25
>[    0.314403] [drm:intel_opregion_setup] graphic opregion physical addr: 0xda721018
>[    0.314407] [drm:intel_opregion_setup] SWSCI supported
>[    0.341338] [drm:swsci_setup] SWSCI GBDA callbacks 00000cf3, SBCB callbacks 00000241
>[    0.341399] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    0.341404] [drm] Driver supports precise vblank timestamp query.
>[    0.341408] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    0.341410] [drm:validate_vbt] Using VBT from OpRegion: $VBT SNB/IVB-DESKTOPd
>[    0.341412] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 1 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    0.341413] [drm:parse_general_definitions] crt_ddc_bus_pin: 2
>[    0.341415] [drm:parse_lfp_panel_data] DRRS supported mode is static
>[    0.341417] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    0.341419] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
>[    0.341420] [drm:parse_lfp_panel_data] VBT initial LVDS value 300
>[    0.341422] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 255
>[    0.341424] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[    0.341426] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[    0.341427] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    0.341428] [drm:parse_driver_features] DRRS State Enabled:1
>[    0.341429] [drm:parse_psr] No PSR BDB found.
>[    0.341436] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    0.341440] [drm:i915_gem_init_stolen] found 67108864 bytes of stolen memory at dba00000
>[    0.341442] [drm:intel_display_power_get] enabling always-on
>[    0.341478] [drm:intel_print_wm_latency] Primary WM0 latency 7 (0.7 usec)
>[    0.341479] [drm:intel_print_wm_latency] Primary WM1 latency 3 (1.5 usec)
>[    0.341480] [drm:intel_print_wm_latency] Primary WM2 latency 4 (2.0 usec)
>[    0.341481] [drm:intel_print_wm_latency] Primary WM3 latency 22 (11.0 usec)
>[    0.341483] [drm:intel_print_wm_latency] Sprite WM0 latency 7 (0.7 usec)
>[    0.341484] [drm:intel_print_wm_latency] Sprite WM1 latency 3 (1.5 usec)
>[    0.341485] [drm:intel_print_wm_latency] Sprite WM2 latency 4 (2.0 usec)
>[    0.341486] [drm:intel_print_wm_latency] Sprite WM3 latency 22 (11.0 usec)
>[    0.341488] [drm:intel_print_wm_latency] Cursor WM0 latency 7 (0.7 usec)
>[    0.341489] [drm:intel_print_wm_latency] Cursor WM1 latency 3 (1.5 usec)
>[    0.341490] [drm:intel_print_wm_latency] Cursor WM2 latency 4 (2.0 usec)
>[    0.341491] [drm:intel_print_wm_latency] Cursor WM3 latency 22 (11.0 usec)
>[    0.341492] [drm:snb_wm_latency_quirk] WM latency values increased to avoid potential underruns
>[    0.341493] [drm:intel_print_wm_latency] Primary WM0 latency 12 (1.2 usec)
>[    0.341494] [drm:intel_print_wm_latency] Primary WM1 latency 3 (1.5 usec)
>[    0.341496] [drm:intel_print_wm_latency] Primary WM2 latency 4 (2.0 usec)
>[    0.341497] [drm:intel_print_wm_latency] Primary WM3 latency 22 (11.0 usec)
>[    0.341498] [drm:intel_print_wm_latency] Sprite WM0 latency 12 (1.2 usec)
>[    0.341499] [drm:intel_print_wm_latency] Sprite WM1 latency 3 (1.5 usec)
>[    0.341500] [drm:intel_print_wm_latency] Sprite WM2 latency 4 (2.0 usec)
>[    0.341501] [drm:intel_print_wm_latency] Sprite WM3 latency 22 (11.0 usec)
>[    0.341502] [drm:intel_print_wm_latency] Cursor WM0 latency 12 (1.2 usec)
>[    0.341504] [drm:intel_print_wm_latency] Cursor WM1 latency 3 (1.5 usec)
>[    0.341505] [drm:intel_print_wm_latency] Cursor WM2 latency 4 (2.0 usec)
>[    0.341506] [drm:intel_print_wm_latency] Cursor WM3 latency 22 (11.0 usec)
>[    0.341508] [drm:intel_modeset_init] 2 display pipes available.
>[    0.341519] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    0.341828] [drm:intel_lvds_init] LVDS is not present in VBT
>[    0.341864] [drm:intel_crt_reset] crt adpa set to 0x80f40010
>[    0.341867] [drm:intel_gmbus_force_bit] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[    0.342228] [drm:intel_sdvo_read_byte] i2c transfer returned -6
>[    0.342229] [drm:intel_sdvo_init] No SDVO device found on SDVOB
>[    0.342245] [drm:intel_gmbus_force_bit] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[    0.342278] [drm:intel_dp_init_connector] Adding DP connector on port B
>[    0.342301] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[    0.342388] [drm:ironlake_init_pch_refclk] has_panel 0 has_lvds 0 has_ck505 0
>[    0.342399] [drm:intel_modeset_readout_hw_state] [CRTC:20] hw state readout: enabled
>[    0.342400] [drm:intel_modeset_readout_hw_state] [CRTC:24] hw state readout: disabled
>[    0.342404] [drm:intel_modeset_readout_hw_state] PCH DPLL A hw state readout: crtc_mask 0x00000001, on 1
>[    0.342408] [drm:intel_modeset_readout_hw_state] PCH DPLL B hw state readout: crtc_mask 0x00000000, on 0
>[    0.342411] [drm:intel_modeset_readout_hw_state] [ENCODER:27:DAC-27] hw state readout: enabled, pipe A
>[    0.342413] [drm:intel_modeset_readout_hw_state] [ENCODER:28:TMDS-28] hw state readout: disabled, pipe A
>[    0.342415] [drm:intel_modeset_readout_hw_state] [ENCODER:33:TMDS-33] hw state readout: disabled, pipe A
>[    0.342417] [drm:intel_modeset_readout_hw_state] [CONNECTOR:26:VGA-1] hw state readout: enabled
>[    0.342419] [drm:intel_modeset_readout_hw_state] [CONNECTOR:29:HDMI-A-1] hw state readout: disabled
>[    0.342421] [drm:intel_modeset_readout_hw_state] [CONNECTOR:34:DP-1] hw state readout: disabled
>[    0.342424] [drm:intel_dump_pipe_config] [CRTC:20][setup_hw_state] config for pipe A
>[    0.342425] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    0.342426] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.342428] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 4, gmch_m: 659903, gmch_n: 8388608, link_m: 54991, link_n: 524288, tu: 64
>[    0.342430] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.342431] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.342432] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.342433] [drm:intel_dump_pipe_config] requested mode:
>[    0.342435] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 720 0 0 0 400 0 0 0 0x0 0x0
>[    0.342436] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.342437] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x6
>[    0.342439] [drm:intel_dump_crtc_timings] crtc timings: 28200 720 738 846 900 400 413 415 449, type: 0x0 flags: 0x6
>[    0.342440] [drm:intel_dump_pipe_config] port clock: 28200
>[    0.342441] [drm:intel_dump_pipe_config] pipe src size: 720x400
>[    0.342443] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.342444] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x02d00190, enabled
>[    0.342445] [drm:intel_dump_pipe_config] ips: 0
>[    0.342446] [drm:intel_dump_pipe_config] double wide: 0
>[    0.342447] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    0.342449] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    0.342450] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    0.342452] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    0.342454] [drm:intel_dump_pipe_config] [CRTC:24][setup_hw_state] config for pipe B
>[    0.342455] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    0.342456] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    0.342457] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.342459] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.342460] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.342461] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.342462] [drm:intel_dump_pipe_config] requested mode:
>[    0.342464] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.342464] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.342466] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.342468] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    0.342468] [drm:intel_dump_pipe_config] port clock: 0
>[    0.342469] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    0.342471] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.342472] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.342473] [drm:intel_dump_pipe_config] ips: 0
>[    0.342474] [drm:intel_dump_pipe_config] double wide: 0
>[    0.342477] [drm:intel_connector_check_state] [CONNECTOR:26:VGA-1]
>[    0.342481] [drm:check_encoder_state] [ENCODER:27:DAC-27]
>[    0.342483] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[    0.342484] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[    0.342486] [drm:check_crtc_state] [CRTC:20]
>[    0.342495] [drm:check_crtc_state] [CRTC:24]
>[    0.342496] [drm:check_shared_dpll_state] PCH DPLL A
>[    0.342499] [drm:check_shared_dpll_state] PCH DPLL B
>[    0.342505] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [0, 7ffff000]
>[    0.343880] [drm:gen6_ppgtt_init] Allocated pde space (2M) at GTT entry: 7fdf0
>[    0.343908] [drm:i915_gem_context_init] HW context support initialized
>[    0.343914] [drm:init_status_page] render ring hws offset: 0x7fff2000
>[    0.343956] [drm:intel_init_pipe_control] render ring pipe control offset: 0x00020000
>[    0.343961] [drm:init_status_page] bsd ring hws offset: 0x00021000
>[    0.343995] [drm:init_status_page] blitter ring hws offset: 0x00042000
>[    0.344082] [drm:gen6_check_mch_setup] Wrong MCH_SSKPD value: 0x16040307 This can cause underruns.
>[    0.344134] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:VGA-1]
>[    0.344137] [drm:intel_crt_detect] [CONNECTOR:26:VGA-1] force=1
>[    0.344140] [drm:intel_ironlake_crt_detect_hotplug] trigger hotplug detect cycle: adpa=0x83f40010
>[    0.344474] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    0.344736] acpi device:49: registered as cooling_device9
>[    0.344806] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input2
>[    0.344831] [drm] Initialized i915 1.6.0 20150130 for 0000:00:02.0 on minor 0
>[    0.344940] ahci 0000:00:1f.2: version 3.0
>[    0.357340] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0x83f40010, result 1
>[    0.357344] [drm:intel_crt_detect] CRT detected via hotplug
>[    0.357349] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:VGA-1] status updated from 3 to 1
>[    0.357359] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 4 ports 3 Gbps 0x33 impl SATA mode
>[    0.357378] ahci 0000:00:1f.2: flags: 64bit ncq led clo pio slum part ems apst 
>[    0.370456] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.370487] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:VGA-1] probed modes :
>[    0.370490] [drm:drm_mode_debug_printmodeline] Modeline 36:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.370492] [drm:drm_mode_debug_printmodeline] Modeline 40:"1280x1024" 76 141813 1280 1376 1512 1744 1024 1025 1028 1070 0x0 0x6
>[    0.370493] [drm:drm_mode_debug_printmodeline] Modeline 50:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    0.370495] [drm:drm_mode_debug_printmodeline] Modeline 39:"1280x1024" 67 123228 1280 1368 1504 1728 1024 1025 1028 1064 0x0 0x6
>[    0.370497] [drm:drm_mode_debug_printmodeline] Modeline 37:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    0.370499] [drm:drm_mode_debug_printmodeline] Modeline 38:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[    0.370501] [drm:drm_mode_debug_printmodeline] Modeline 41:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    0.370502] [drm:drm_mode_debug_printmodeline] Modeline 51:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    0.370504] [drm:drm_mode_debug_printmodeline] Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[    0.370506] [drm:drm_mode_debug_printmodeline] Modeline 42:"1024x768" 66 71639 1024 1080 1192 1360 768 769 772 798 0x0 0x6
>[    0.370508] [drm:drm_mode_debug_printmodeline] Modeline 53:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    0.370509] [drm:drm_mode_debug_printmodeline] Modeline 54:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[    0.370511] [drm:drm_mode_debug_printmodeline] Modeline 55:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    0.370513] [drm:drm_mode_debug_printmodeline] Modeline 56:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[    0.370514] [drm:drm_mode_debug_printmodeline] Modeline 43:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    0.370516] [drm:drm_mode_debug_printmodeline] Modeline 44:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[    0.370518] [drm:drm_mode_debug_printmodeline] Modeline 45:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    0.370519] [drm:drm_mode_debug_printmodeline] Modeline 46:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[    0.370521] [drm:drm_mode_debug_printmodeline] Modeline 47:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[    0.370523] [drm:drm_mode_debug_printmodeline] Modeline 48:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    0.370524] [drm:drm_mode_debug_printmodeline] Modeline 49:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    0.370526] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:HDMI-A-1]
>[    0.370527] [drm:intel_hdmi_detect] [CONNECTOR:29:HDMI-A-1]
>[    0.370698] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    0.370701] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    0.370705] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:HDMI-A-1] status updated from 3 to 2
>[    0.370709] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:HDMI-A-1] disconnected
>[    0.370712] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1]
>[    0.370715] [drm:intel_dp_detect] [CONNECTOR:34:DP-1]
>[    0.370719] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] status updated from 3 to 2
>[    0.370722] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] disconnected
>[    0.370725] [drm:drm_setup_crtcs] 
>[    0.370729] [drm:drm_enable_connectors] connector 26 enabled? yes
>[    0.370731] [drm:drm_enable_connectors] connector 29 enabled? no
>[    0.370733] [drm:drm_enable_connectors] connector 34 enabled? no
>[    0.370736] [drm:intel_fb_initial_config] looking for cmdline mode on connector VGA-1
>[    0.370738] [drm:intel_fb_initial_config] looking for preferred mode on connector VGA-1 0
>[    0.370742] [drm:intel_fb_initial_config] connector VGA-1 on pipe A [CRTC:20]: 1600x1200
>[    0.370744] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    0.370746] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    0.370749] [drm:drm_setup_crtcs] desired mode 1600x1200 set on crtc 20 (0,0)
>[    0.370753] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    0.370756] [drm:i915_gem_object_create_stolen] creating stolen object: size=753000
>[    0.370762] [drm:i915_pages_create_for_stolen] offset=0x0, size=7680000
>[    0.371557] [drm:intelfb_create] allocated 1600x1200 fb: 0x00063000, bo ffff8800d54be000
>[    0.371651] fbcon: inteldrmfb (fb0) is primary device
>[    0.371681] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88011a070960
>[    0.371683] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88011a10f840 state to ffff88011a070960
>[    0.371684] [drm:drm_atomic_check_only] checking ffff88011a070960
>[    0.371685] [drm:drm_atomic_commit] commiting ffff88011a070960
>[    0.371687] [drm:drm_atomic_state_clear] Clearing atomic state ffff88011a070960
>[    0.371688] [drm:drm_atomic_state_free] Freeing atomic state ffff88011a070960
>[    0.371689] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88011a070960
>[    0.371690] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88011a10f900 state to ffff88011a070960
>[    0.371691] [drm:drm_atomic_check_only] checking ffff88011a070960
>[    0.371692] [drm:drm_atomic_commit] commiting ffff88011a070960
>[    0.371692] [drm:drm_atomic_state_clear] Clearing atomic state ffff88011a070960
>[    0.371693] [drm:drm_atomic_state_free] Freeing atomic state ffff88011a070960
>[    0.371694] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88011a070960
>[    0.371695] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88011a10f9c0 state to ffff88011a070960
>[    0.371696] [drm:drm_atomic_check_only] checking ffff88011a070960
>[    0.371696] [drm:drm_atomic_commit] commiting ffff88011a070960
>[    0.371697] [drm:drm_atomic_state_clear] Clearing atomic state ffff88011a070960
>[    0.371697] [drm:drm_atomic_state_free] Freeing atomic state ffff88011a070960
>[    0.371698] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88011a070960
>[    0.371700] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88011a10fa80 state to ffff88011a070960
>[    0.371700] [drm:drm_atomic_check_only] checking ffff88011a070960
>[    0.371701] [drm:drm_atomic_commit] commiting ffff88011a070960
>[    0.371701] [drm:drm_atomic_state_clear] Clearing atomic state ffff88011a070960
>[    0.371702] [drm:drm_atomic_state_free] Freeing atomic state ffff88011a070960
>[    0.371703] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88011a070960
>[    0.371704] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88011a10fb40 state to ffff88011a070960
>[    0.371704] [drm:drm_atomic_check_only] checking ffff88011a070960
>[    0.371705] [drm:drm_atomic_commit] commiting ffff88011a070960
>[    0.371706] [drm:drm_atomic_state_clear] Clearing atomic state ffff88011a070960
>[    0.371706] [drm:drm_atomic_state_free] Freeing atomic state ffff88011a070960
>[    0.371707] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88011a070960
>[    0.371708] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88011a10fc00 state to ffff88011a070960
>[    0.371709] [drm:drm_atomic_check_only] checking ffff88011a070960
>[    0.371710] [drm:drm_atomic_commit] commiting ffff88011a070960
>[    0.371710] [drm:drm_atomic_state_clear] Clearing atomic state ffff88011a070960
>[    0.371711] [drm:drm_atomic_state_free] Freeing atomic state ffff88011a070960
>[    0.371712] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[    0.371713] [drm:intel_set_config_compute_mode_changes] crtc has no fb, will flip
>[    0.371714] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[    0.371715] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.371717] [drm:drm_mode_debug_printmodeline] Modeline 57:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.371717] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1
>[    0.371718] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[    0.371720] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    0.371721] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[    0.371723] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[    0.371724] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    0.371725] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    0.371725] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    0.371726] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.371727] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[    0.371728] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.371729] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.371730] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.371730] [drm:intel_dump_pipe_config] requested mode:
>[    0.371731] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.371732] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.371733] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.371734] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[    0.371735] [drm:intel_dump_pipe_config] port clock: 162000
>[    0.371735] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[    0.371736] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.371737] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.371738] [drm:intel_dump_pipe_config] ips: 0
>[    0.371738] [drm:intel_dump_pipe_config] double wide: 0
>[    0.371751] [drm:intel_get_shared_dpll] CRTC:20 allocated PCH DPLL A
>[    0.371751] [drm:intel_get_shared_dpll] using PCH DPLL A for pipe A
>[    0.381919] scsi host0: ahci
>[    0.382125] scsi host1: ahci
>[    0.382273] scsi host2: ahci
>[    0.382418] scsi host3: ahci
>[    0.382543] scsi host4: ahci
>[    0.382647] scsi host5: ahci
>[    0.382688] ata1: SATA max UDMA/133 abar m2048@0xf7d06000 port 0xf7d06100 irq 25
>[    0.382689] ata2: SATA max UDMA/133 abar m2048@0xf7d06000 port 0xf7d06180 irq 25
>[    0.382690] ata3: DUMMY
>[    0.382690] ata4: DUMMY
>[    0.382692] ata5: SATA max UDMA/133 abar m2048@0xf7d06000 port 0xf7d06300 irq 25
>[    0.382693] ata6: SATA max UDMA/133 abar m2048@0xf7d06000 port 0xf7d06380 irq 25
>[    0.382825] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    0.382828] ehci-pci: EHCI PCI platform driver
>[    0.382945] ehci-pci 0000:00:1a.0: EHCI Host Controller
>[    0.382979] ehci-pci 0000:00:1a.0: new USB bus registered, assigned bus number 1
>[    0.382990] ehci-pci 0000:00:1a.0: debug port 2
>[    0.386880] ehci-pci 0000:00:1a.0: cache line size of 64 is not supported
>[    0.386892] ehci-pci 0000:00:1a.0: irq 16, io mem 0xf7d08000
>[    0.397318] ehci-pci 0000:00:1a.0: USB 2.0 started, EHCI 1.00
>[    0.397446] hub 1-0:1.0: USB hub found
>[    0.397450] hub 1-0:1.0: 2 ports detected
>[    0.397648] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    0.397679] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 2
>[    0.397689] ehci-pci 0000:00:1d.0: debug port 2
>[    0.401333] [drm:intel_disable_shared_dpll] disable PCH DPLL A (active 1, on? 1) for crtc 20
>[    0.401337] [drm:intel_disable_shared_dpll] disabling PCH DPLL A
>[    0.401588] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    0.401598] ehci-pci 0000:00:1d.0: irq 23, io mem 0xf7d07000
>[    0.401745] [drm:intel_fbc_update] no output, disabling
>[    0.401749] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88011aab2a80
>[    0.401754] [drm:intel_prepare_shared_dpll] setting up PCH DPLL A
>[    0.403093] [drm:gen6_fdi_link_train] FDI_RX_IIR 0x700
>[    0.403094] [drm:gen6_fdi_link_train] FDI train 1 done.
>[    0.403742] [drm:gen6_fdi_link_train] FDI_RX_IIR 0x600
>[    0.403743] [drm:gen6_fdi_link_train] FDI train 2 done.
>[    0.403744] [drm:gen6_fdi_link_train] FDI train done.
>[    0.403746] [drm:intel_enable_shared_dpll] enable PCH DPLL A (active 0, on? 0) for crtc 20
>[    0.403747] [drm:intel_enable_shared_dpll] enabling PCH DPLL A
>[    0.405604] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[    0.405605] [drm:intel_fbc_update] disabled per chip default
>[    0.405608] [drm:intel_connector_check_state] [CONNECTOR:26:VGA-1]
>[    0.405611] [drm:check_encoder_state] [ENCODER:27:DAC-27]
>[    0.405613] [drm:check_encoder_state] [ENCODER:28:TMDS-28]
>[    0.405614] [drm:check_encoder_state] [ENCODER:33:TMDS-33]
>[    0.405616] [drm:check_crtc_state] [CRTC:20]
>[    0.405625] [drm:check_crtc_state] [CRTC:24]
>[    0.405625] [drm:check_shared_dpll_state] PCH DPLL A
>[    0.405628] [drm:check_shared_dpll_state] PCH DPLL B
>[    0.405631] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    0.405633] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    0.405634] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[    0.405635] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    0.405637] [drm:drm_fb_helper_hotplug_event] 
>[    0.405638] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:VGA-1]
>[    0.405639] [drm:intel_crt_detect] [CONNECTOR:26:VGA-1] force=1
>[    0.405640] [drm:intel_ironlake_crt_detect_hotplug] ironlake hotplug adpa=0x83f40018, result 1
>[    0.405641] [drm:intel_crt_detect] CRT detected via hotplug
>[    0.413319] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    0.413462] hub 2-0:1.0: USB hub found
>[    0.413467] hub 2-0:1.0: 2 ports detected
>[    0.413578] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>[    0.413582] ohci-pci: OHCI PCI platform driver
>[    0.413593] uhci_hcd: USB Universal Host Controller Interface driver
>[    0.413619] usbcore: registered new interface driver usblp
>[    0.413662] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f03:PS2M] at 0x60,0x64 irq 1,12
>[    0.414094] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    0.414116] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    0.414245] mousedev: PS/2 mouse device common for all mice
>[    0.414444] rtc_cmos 00:02: RTC can wake from S4
>[    0.414580] rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0
>[    0.414605] rtc_cmos 00:02: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    0.414720] it87: Found IT8728F chip at 0xa30, revision 1
>[    0.414736] it87: Beeping is supported
>[    0.415019] Intel P-state driver initializing.
>[    0.415594] usbcore: registered new interface driver usbhid
>[    0.415594] usbhid: USB HID core driver
>[    0.416197] oprofile: using NMI interrupt.
>[    0.416215] Netfilter messages via NETLINK v0.30.
>[    0.416227] nf_conntrack version 0.5.0 (16384 buckets, 65536 max)
>[    0.416370] ctnetlink v0.93: registering with nfnetlink.
>[    0.416399] nf_tables: (c) 2007-2009 Patrick McHardy <kaber@trash.net>
>[    0.416405] nf_tables_compat: (c) 2012 Pablo Neira Ayuso <pablo@netfilter.org>
>[    0.416595] ip_tables: (C) 2000-2006 Netfilter Core Team
>[    0.416639] TCP: cubic registered
>[    0.416898] NET: Registered protocol family 10
>[    0.417255] NET: Registered protocol family 17
>[    0.417681] sctp: Hash tables configured (established 65536 bind 65536)
>[    0.418679] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.418710] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:26:VGA-1] probed modes :
>[    0.418716] [drm:drm_mode_debug_printmodeline] Modeline 36:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.418719] [drm:drm_mode_debug_printmodeline] Modeline 40:"1280x1024" 76 141813 1280 1376 1512 1744 1024 1025 1028 1070 0x0 0x6
>[    0.418722] [drm:drm_mode_debug_printmodeline] Modeline 50:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    0.418726] [drm:drm_mode_debug_printmodeline] Modeline 39:"1280x1024" 67 123228 1280 1368 1504 1728 1024 1025 1028 1064 0x0 0x6
>[    0.418729] [drm:drm_mode_debug_printmodeline] Modeline 37:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    0.418733] [drm:drm_mode_debug_printmodeline] Modeline 38:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[    0.418737] [drm:drm_mode_debug_printmodeline] Modeline 41:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    0.418741] [drm:drm_mode_debug_printmodeline] Modeline 51:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    0.418746] [drm:drm_mode_debug_printmodeline] Modeline 52:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[    0.418750] [drm:drm_mode_debug_printmodeline] Modeline 42:"1024x768" 66 71639 1024 1080 1192 1360 768 769 772 798 0x0 0x6
>[    0.418754] [drm:drm_mode_debug_printmodeline] Modeline 53:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    0.418758] [drm:drm_mode_debug_printmodeline] Modeline 54:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[    0.418762] [drm:drm_mode_debug_printmodeline] Modeline 55:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    0.418766] [drm:drm_mode_debug_printmodeline] Modeline 56:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[    0.418770] [drm:drm_mode_debug_printmodeline] Modeline 43:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    0.418773] [drm:drm_mode_debug_printmodeline] Modeline 44:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[    0.418776] [drm:drm_mode_debug_printmodeline] Modeline 45:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    0.418779] [drm:drm_mode_debug_printmodeline] Modeline 46:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[    0.418782] [drm:drm_mode_debug_printmodeline] Modeline 47:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[    0.418784] [drm:drm_mode_debug_printmodeline] Modeline 48:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    0.418787] [drm:drm_mode_debug_printmodeline] Modeline 49:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    0.418789] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:HDMI-A-1]
>[    0.418791] [drm:intel_hdmi_detect] [CONNECTOR:29:HDMI-A-1]
>[    0.418950] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    0.418952] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    0.418954] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:29:HDMI-A-1] disconnected
>[    0.418956] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1]
>[    0.418957] [drm:intel_dp_detect] [CONNECTOR:34:DP-1]
>[    0.418961] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:34:DP-1] disconnected
>[    0.418966] [drm:drm_setup_crtcs] 
>[    0.418969] [drm:drm_enable_connectors] connector 26 enabled? yes
>[    0.418970] [drm:drm_enable_connectors] connector 29 enabled? no
>[    0.418971] [drm:drm_enable_connectors] connector 34 enabled? no
>[    0.418973] [drm:intel_fb_initial_config] looking for cmdline mode on connector VGA-1
>[    0.418975] [drm:intel_fb_initial_config] looking for preferred mode on connector VGA-1 0
>[    0.418977] [drm:intel_fb_initial_config] connector VGA-1 on pipe A [CRTC:20]: 1600x1200
>[    0.418978] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    0.418979] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    0.418981] [drm:drm_setup_crtcs] desired mode 1600x1200 set on crtc 20 (0,0)
>[    0.418989] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800daac6ae0
>[    0.418993] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800d55f5e40 state to ffff8800daac6ae0
>[    0.418996] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d5680800 state to ffff8800daac6ae0
>[    0.418998] [drm:drm_atomic_check_only] checking ffff8800daac6ae0
>[    0.419002] [drm:drm_atomic_commit] commiting ffff8800daac6ae0
>[    0.419022] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[    0.419028] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800daac6ae0
>[    0.419030] [drm:drm_atomic_state_free] Freeing atomic state ffff8800daac6ae0
>[    0.419033] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800daac6ae0
>[    0.419036] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800d55f5f00 state to ffff8800daac6ae0
>[    0.419037] [drm:drm_atomic_check_only] checking ffff8800daac6ae0
>[    0.419038] [drm:drm_atomic_commit] commiting ffff8800daac6ae0
>[    0.419040] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800daac6ae0
>[    0.419042] [drm:drm_atomic_state_free] Freeing atomic state ffff8800daac6ae0
>[    0.419044] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800daac6ae0
>[    0.419046] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88011a10f900 state to ffff8800daac6ae0
>[    0.419047] [drm:drm_atomic_check_only] checking ffff8800daac6ae0
>[    0.419049] [drm:drm_atomic_commit] commiting ffff8800daac6ae0
>[    0.419050] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800daac6ae0
>[    0.419051] [drm:drm_atomic_state_free] Freeing atomic state ffff8800daac6ae0
>[    0.419053] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800daac6ae0
>[    0.419055] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88011a10f9c0 state to ffff8800daac6ae0
>[    0.419056] [drm:drm_atomic_check_only] checking ffff8800daac6ae0
>[    0.419058] [drm:drm_atomic_commit] commiting ffff8800daac6ae0
>[    0.419059] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800daac6ae0
>[    0.419060] [drm:drm_atomic_state_free] Freeing atomic state ffff8800daac6ae0
>[    0.419063] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800daac6ae0
>[    0.419065] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88011a10fa80 state to ffff8800daac6ae0
>[    0.419066] [drm:drm_atomic_check_only] checking ffff8800daac6ae0
>[    0.419067] [drm:drm_atomic_commit] commiting ffff8800daac6ae0
>[    0.419068] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800daac6ae0
>[    0.419070] [drm:drm_atomic_state_free] Freeing atomic state ffff8800daac6ae0
>[    0.419072] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800daac6ae0
>[    0.419074] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88011a10fb40 state to ffff8800daac6ae0
>[    0.419075] [drm:drm_atomic_check_only] checking ffff8800daac6ae0
>[    0.419076] [drm:drm_atomic_commit] commiting ffff8800daac6ae0
>[    0.419077] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800daac6ae0
>[    0.419079] [drm:drm_atomic_state_free] Freeing atomic state ffff8800daac6ae0
>[    0.419081] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[    0.419084] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    0.419086] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[    0.419089] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    0.419092] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[    0.419094] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[    0.419096] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    0.419098] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    0.419099] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    0.419100] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.419103] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[    0.419105] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.419107] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.419108] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.419109] [drm:intel_dump_pipe_config] requested mode:
>[    0.419112] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.419112] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.419115] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.419118] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[    0.419119] [drm:intel_dump_pipe_config] port clock: 162000
>[    0.419120] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[    0.419122] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.419123] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.419124] [drm:intel_dump_pipe_config] ips: 0
>[    0.419125] [drm:intel_dump_pipe_config] double wide: 0
>[    0.419127] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    0.419129] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    0.419131] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[    0.419133] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    0.419343] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[    0.419345] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    0.419347] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[    0.419349] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    0.419350] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[    0.419352] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[    0.419354] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    0.419355] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    0.419356] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    0.419357] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.419360] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[    0.419362] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.419364] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.419365] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.419366] [drm:intel_dump_pipe_config] requested mode:
>[    0.419368] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.419369] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.419371] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.419374] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[    0.419375] [drm:intel_dump_pipe_config] port clock: 162000
>[    0.419376] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[    0.419377] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.419378] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.419379] [drm:intel_dump_pipe_config] ips: 0
>[    0.419380] [drm:intel_dump_pipe_config] double wide: 0
>[    0.429244] Console: switching to colour frame buffer device 133x54
>[    0.429252] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[    0.429255] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    0.429256] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[    0.429259] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    0.429261] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[    0.429263] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[    0.429264] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    0.429266] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    0.429267] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    0.429268] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.429270] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[    0.429272] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.429274] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.429275] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.429276] [drm:intel_dump_pipe_config] requested mode:
>[    0.429279] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.429279] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.429282] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    0.429284] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[    0.429285] [drm:intel_dump_pipe_config] port clock: 162000
>[    0.429286] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[    0.429288] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.429289] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.429290] [drm:intel_dump_pipe_config] ips: 0
>[    0.429291] [drm:intel_dump_pipe_config] double wide: 0
>[    0.437678] sound hdaudioC0D2: autoconfig for ALC887-VD: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:line
>[    0.437681] sound hdaudioC0D2:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    0.437684] sound hdaudioC0D2:    hp_outs=1 (0x1b/0x0/0x0/0x0/0x0)
>[    0.437687] sound hdaudioC0D2:    mono: mono_out=0x0
>[    0.437689] sound hdaudioC0D2:    inputs:
>[    0.437692] sound hdaudioC0D2:      Rear Mic=0x18
>[    0.437695] sound hdaudioC0D2:      Front Mic=0x19
>[    0.437698] sound hdaudioC0D2:      Line=0x1a
>[    0.437701] sound hdaudioC0D2:      CD=0x1c
>[    0.442620] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input3
>[    0.543783] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    0.543784] i915 0000:00:02.0: registered panic notifier
>[    0.549780] console [netcon0] enabled
>[    0.553224] netconsole: network logging started
>[    0.556698] rtc_cmos 00:02: setting system clock to 2015-05-24 20:39:44 UTC (1432499984)
>[    0.560461] ALSA device list:
>[    0.563803]   #0: HDA Intel PCH at 0xf7d00000 irq 26
>[    0.701362] ata2: SATA link down (SStatus 0 SControl 300)
>[    0.704616] ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
>[    0.707928] ata5: SATA link down (SStatus 0 SControl 300)
>[    0.711378] usb 1-1: new high-speed USB device number 2 using ehci-pci
>[    0.714869] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
>[    0.718497] ACPI Error: [DSSP] Namespace lookup failure, AE_NOT_FOUND (20150204/psargs-359)
>[    0.721909] ACPI Error: Method parse/execution failed [\_SB_.PCI0.SAT0.SPT5._GTF] (Node ffff88011a8a2438), AE_NOT_FOUND (20150204/psparse-536)
>[    0.725341] usb 2-1: new high-speed USB device number 2 using ehci-pci
>[    0.731923] ata6.00: ATAPI: HL-DT-ST DVDRAM GH22NS70, EX01, max UDMA/100
>[    0.735407] ACPI Error: [DSSP] Namespace lookup failure, AE_NOT_FOUND (20150204/psargs-359)
>[    0.739130] ACPI Error: Method parse/execution failed [\_SB_.PCI0.SAT0.SPT0._GTF] (Node ffff88011a8a21e0), AE_NOT_FOUND (20150204/psparse-536)
>[    0.746374] ata1.00: ATA-8: ST500DM002-1BC142, JC4B, max UDMA/133
>[    0.749726] ata1.00: 976773168 sectors, multi 16: LBA48 NCQ (depth 31/32)
>[    0.753210] ACPI Error: [DSSP] Namespace lookup failure, AE_NOT_FOUND (20150204/psargs-359)
>[    0.756889] ACPI Error: Method parse/execution failed [\_SB_.PCI0.SAT0.SPT5._GTF] (Node ffff88011a8a2438), AE_NOT_FOUND (20150204/psparse-536)
>[    0.764331] ata6.00: configured for UDMA/100
>[    0.769075] ACPI Error: [DSSP] Namespace lookup failure, AE_NOT_FOUND (20150204/psargs-359)
>[    0.772691] ACPI Error: Method parse/execution failed [\_SB_.PCI0.SAT0.SPT0._GTF] (Node ffff88011a8a21e0), AE_NOT_FOUND (20150204/psparse-536)
>[    0.779933] ata1.00: configured for UDMA/133
>[    0.783676] scsi 0:0:0:0: Direct-Access     ATA      ST500DM002-1BC14 JC4B PQ: 0 ANSI: 5
>[    0.787525] sd 0:0:0:0: Attached scsi generic sg0 type 0
>[    0.787536] sd 0:0:0:0: [sda] 976773168 512-byte logical blocks: (500 GB/465 GiB)
>[    0.787630] sd 0:0:0:0: [sda] Write Protect is off
>[    0.787634] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    0.787666] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    0.804353] scsi 5:0:0:0: CD-ROM            HL-DT-ST DVDRAM GH22NS70  EX01 PQ: 0 ANSI: 5
>[    0.818900]  sda: sda1 sda2 sda3 sda4 sda5 sda6 sda7 sda8 sda9 sda10 sda11 sda12 sda13 sda14
>[    0.823406] sd 0:0:0:0: [sda] Attached SCSI disk
>[    0.832807] sr 5:0:0:0: [sr0] scsi3-mmc drive: 48x/48x writer dvd-ram cd/rw xa/form2 cdda tray
>[    0.836262] cdrom: Uniform CD-ROM driver Revision: 3.20
>[    0.839848] sr 5:0:0:0: Attached scsi CD-ROM sr0
>[    0.839933] sr 5:0:0:0: Attached scsi generic sg1 type 5
>[    0.850300] hub 1-1:1.0: USB hub found
>[    0.854005] hub 1-1:1.0: 4 ports detected
>[    0.858435] EXT3-fs (sda6): error: couldn't mount because of unsupported optional features (240)
>[    0.863150] EXT2-fs (sda6): error: couldn't mount because of unsupported optional features (240)
>[    0.867890] hub 2-1:1.0: USB hub found
>[    0.871506] hub 2-1:1.0: 6 ports detected
>[    0.892705] EXT4-fs (sda6): mounted filesystem with ordered data mode. Opts: (null)
>[    0.897127] VFS: Mounted root (ext4 filesystem) readonly on device 8:6.
>[    0.927800] devtmpfs: mounted
>[    0.932422] Freeing unused kernel memory: 1144K (ffffffff819aa000 - ffffffff81ac8000)
>[    1.273333] tsc: Refined TSC clocksource calibration: 3292.521 MHz
>[    1.793326] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on RC6p off RC6pp off
>[    1.809302] [drm:gen6_enable_rps] Overclocking supported. Max: 1100MHz, Overclock max: 1100MHz
>[    1.905119] udevd[212]: starting version 3.0
>[    1.969834] random: udevd urandom read with 80 bits of entropy available
>[    2.277362] Switched to clocksource tsc
>[    2.314624] atl1c 0000:02:00.0: version 1.0.1.1-NAPI
>[    2.356722] ACPI Warning: SystemIO range 0x000000000000F040-0x000000000000F05F conflicts with OpRegion 0x000000000000F040-0x000000000000F04F (\_SB_.PCI0.SBUS.SMBI) (20150204/utaddress-254)
>[    2.356731] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    2.623066] random: nonblocking pool is initialized
>[    2.703721] input: ImPS/2 Generic Wheel Mouse as /devices/platform/i8042/serio1/input/input5
>[    6.276577] Adding 6291452k swap on /dev/sda8.  Priority:-1 extents:1 across:6291452k 
>[    6.311216] EXT4-fs (sda6): re-mounted. Opts: (null)
>[    6.737193] EXT4-fs (sda6): re-mounted. Opts: (null)
>[    6.781983] EXT4-fs (sda3): mounted filesystem with ordered data mode. Opts: (null)
>[    6.864807] EXT4-fs (sda4): warning: maximal mount count reached, running e2fsck is recommended
>[    6.866742] EXT4-fs (sda4): mounted filesystem with ordered data mode. Opts: (null)
>[    7.625582] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[    7.625585] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    7.625586] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[    7.625588] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    7.625590] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[    7.625592] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[    7.625593] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    7.625594] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    7.625594] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[    7.625595] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    7.625596] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[    7.625597] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    7.625598] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    7.625599] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    7.625599] [drm:intel_dump_pipe_config] requested mode:
>[    7.625601] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    7.625601] [drm:intel_dump_pipe_config] adjusted mode:
>[    7.625602] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[    7.625604] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[    7.625604] [drm:intel_dump_pipe_config] port clock: 162000
>[    7.625605] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[    7.625606] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    7.625607] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    7.625607] [drm:intel_dump_pipe_config] ips: 0
>[    7.625607] [drm:intel_dump_pipe_config] double wide: 0
>[    8.372554] atl1c 0000:02:00.0: atl1c: eth0 NIC Link is Up<1000 Mbps Full Duplex>
>[   14.569109] IPTABLES Packet Dropped: IN=eth0 OUT= MAC=50:e5:49:15:cb:53:2c:b0:5d:04:33:bb:08:00 SRC=192.168.7.254 DST=192.168.7.147 LEN=328 TOS=0x00 PREC=0x00 TTL=128 ID=57005 PROTO=UDP SPT=67 DPT=68 LEN=308 
>[  116.324407] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  116.324413] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  116.324415] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  116.324418] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  116.324421] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  116.324425] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  116.324426] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  116.324428] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  116.324429] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  116.324430] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  116.324441] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  116.324442] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  116.324443] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  116.324443] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  116.324444] [drm:intel_dump_pipe_config] requested mode:
>[  116.324446] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  116.324446] [drm:intel_dump_pipe_config] adjusted mode:
>[  116.324447] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  116.324449] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  116.324449] [drm:intel_dump_pipe_config] port clock: 162000
>[  116.324450] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  116.324451] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  116.324451] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  116.324452] [drm:intel_dump_pipe_config] ips: 0
>[  116.324452] [drm:intel_dump_pipe_config] double wide: 0
>[  151.872396] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  151.872401] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  151.872404] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  151.872407] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  151.872410] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  151.872413] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  151.872415] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  151.872417] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  151.872418] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  151.872419] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  151.872422] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  151.872424] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  151.872433] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  151.872434] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  151.872434] [drm:intel_dump_pipe_config] requested mode:
>[  151.872436] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  151.872436] [drm:intel_dump_pipe_config] adjusted mode:
>[  151.872437] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  151.872439] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  151.872439] [drm:intel_dump_pipe_config] port clock: 162000
>[  151.872440] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  151.872441] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  151.872441] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  151.872442] [drm:intel_dump_pipe_config] ips: 0
>[  151.872442] [drm:intel_dump_pipe_config] double wide: 0
>[  190.680553] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  190.680558] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  190.680561] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  190.680564] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  190.680567] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  190.680571] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  190.680572] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  190.680574] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  190.680575] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  190.680577] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  190.680579] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  190.680589] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  190.680590] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  190.680590] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  190.680591] [drm:intel_dump_pipe_config] requested mode:
>[  190.680592] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  190.680593] [drm:intel_dump_pipe_config] adjusted mode:
>[  190.680594] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  190.680595] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  190.680596] [drm:intel_dump_pipe_config] port clock: 162000
>[  190.680596] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  190.680597] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  190.680598] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  190.680599] [drm:intel_dump_pipe_config] ips: 0
>[  190.680599] [drm:intel_dump_pipe_config] double wide: 0
>[  194.697383] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  194.697386] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  194.697388] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  194.697391] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  194.697393] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  194.697396] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  194.697398] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  194.697399] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  194.697400] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  194.697401] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  194.697404] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  194.697406] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  194.697408] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  194.697409] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  194.697410] [drm:intel_dump_pipe_config] requested mode:
>[  194.697413] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  194.697414] [drm:intel_dump_pipe_config] adjusted mode:
>[  194.697424] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  194.697425] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  194.697426] [drm:intel_dump_pipe_config] port clock: 162000
>[  194.697426] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  194.697427] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  194.697428] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  194.697428] [drm:intel_dump_pipe_config] ips: 0
>[  194.697429] [drm:intel_dump_pipe_config] double wide: 0
>[  215.231717] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  215.231721] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  215.231724] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  215.231726] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  215.231729] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  215.231732] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  215.231734] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  215.231736] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  215.231737] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  215.231738] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  215.231740] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  215.231750] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  215.231751] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  215.231752] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  215.231752] [drm:intel_dump_pipe_config] requested mode:
>[  215.231754] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  215.231754] [drm:intel_dump_pipe_config] adjusted mode:
>[  215.231756] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  215.231757] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  215.231757] [drm:intel_dump_pipe_config] port clock: 162000
>[  215.231758] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  215.231759] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  215.231760] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  215.231760] [drm:intel_dump_pipe_config] ips: 0
>[  215.231761] [drm:intel_dump_pipe_config] double wide: 0
>[  220.171761] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  220.171765] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  220.171767] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  220.171770] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  220.171772] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  220.171775] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  220.171777] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  220.171779] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  220.171780] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  220.171781] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  220.171791] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  220.171792] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  220.171793] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  220.171794] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  220.171794] [drm:intel_dump_pipe_config] requested mode:
>[  220.171796] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  220.171797] [drm:intel_dump_pipe_config] adjusted mode:
>[  220.171798] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  220.171799] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  220.171800] [drm:intel_dump_pipe_config] port clock: 162000
>[  220.171800] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  220.171801] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  220.171802] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  220.171802] [drm:intel_dump_pipe_config] ips: 0
>[  220.171803] [drm:intel_dump_pipe_config] double wide: 0
>[  224.264631] [drm:i915_gem_open] 
>[  224.264645] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  224.264658] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.264662] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800d5015600 state to ffff8800d4b87600
>[  224.264664] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88011a35a400 state to ffff8800d4b87600
>[  224.264665] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.264669] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.264681] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[  224.264686] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.264688] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.264690] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.264691] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800d5015480 state to ffff8800d4b87600
>[  224.264693] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.264694] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.264695] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.264696] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.264698] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.264701] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800d5015180 state to ffff8800d4b87600
>[  224.264703] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.264704] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.264707] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.264709] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.264711] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.264714] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800d5015240 state to ffff8800d4b87600
>[  224.264716] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.264718] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.264719] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.264720] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.264722] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.264723] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800d5015b40 state to ffff8800d4b87600
>[  224.264724] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.264725] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.264727] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.264728] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.264729] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.264731] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88011aab2f00 state to ffff8800d4b87600
>[  224.264732] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.264734] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.264735] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.264736] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.264738] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  224.264741] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  224.264742] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.264744] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  224.264746] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  224.264749] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  224.264750] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  224.264752] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  224.264753] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  224.264754] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  224.264756] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  224.264757] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  224.264759] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  224.264760] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  224.264761] [drm:intel_dump_pipe_config] requested mode:
>[  224.264763] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.264764] [drm:intel_dump_pipe_config] adjusted mode:
>[  224.264766] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.264768] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  224.264769] [drm:intel_dump_pipe_config] port clock: 162000
>[  224.264770] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  224.264771] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  224.264773] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  224.264774] [drm:intel_dump_pipe_config] ips: 0
>[  224.264774] [drm:intel_dump_pipe_config] double wide: 0
>[  224.264776] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  224.264778] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  224.264779] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.264780] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  224.444552] [drm:i915_gem_open] 
>[  224.444593] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4180
>[  224.444596] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800d4a776c0 state to ffff8800d51f4180
>[  224.444598] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d5352c00 state to ffff8800d51f4180
>[  224.444599] [drm:drm_atomic_check_only] checking ffff8800d51f4180
>[  224.444602] [drm:drm_atomic_commit] commiting ffff8800d51f4180
>[  224.444615] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[  224.444620] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4180
>[  224.444622] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4180
>[  224.444624] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4180
>[  224.444626] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800d4a773c0 state to ffff8800d51f4180
>[  224.444627] [drm:drm_atomic_check_only] checking ffff8800d51f4180
>[  224.444628] [drm:drm_atomic_commit] commiting ffff8800d51f4180
>[  224.444629] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4180
>[  224.444630] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4180
>[  224.444632] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4180
>[  224.444634] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800d4a77900 state to ffff8800d51f4180
>[  224.444635] [drm:drm_atomic_check_only] checking ffff8800d51f4180
>[  224.444636] [drm:drm_atomic_commit] commiting ffff8800d51f4180
>[  224.444637] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4180
>[  224.444638] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4180
>[  224.444640] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4180
>[  224.444641] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800d4a77d80 state to ffff8800d51f4180
>[  224.444642] [drm:drm_atomic_check_only] checking ffff8800d51f4180
>[  224.444643] [drm:drm_atomic_commit] commiting ffff8800d51f4180
>[  224.444645] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4180
>[  224.444646] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4180
>[  224.444647] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4180
>[  224.444649] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800d4a77300 state to ffff8800d51f4180
>[  224.444650] [drm:drm_atomic_check_only] checking ffff8800d51f4180
>[  224.444651] [drm:drm_atomic_commit] commiting ffff8800d51f4180
>[  224.444652] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4180
>[  224.444653] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4180
>[  224.444655] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4180
>[  224.444657] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800d4a779c0 state to ffff8800d51f4180
>[  224.444658] [drm:drm_atomic_check_only] checking ffff8800d51f4180
>[  224.444659] [drm:drm_atomic_commit] commiting ffff8800d51f4180
>[  224.444660] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4180
>[  224.444661] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4180
>[  224.444663] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  224.444666] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  224.444668] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.444670] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  224.444672] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  224.444674] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  224.444676] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  224.444677] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  224.444678] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  224.444679] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  224.444681] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  224.444683] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  224.444684] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  224.444685] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  224.444686] [drm:intel_dump_pipe_config] requested mode:
>[  224.444688] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.444689] [drm:intel_dump_pipe_config] adjusted mode:
>[  224.444691] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.444693] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  224.444694] [drm:intel_dump_pipe_config] port clock: 162000
>[  224.444695] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  224.444696] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  224.444698] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  224.444699] [drm:intel_dump_pipe_config] ips: 0
>[  224.444700] [drm:intel_dump_pipe_config] double wide: 0
>[  224.444702] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  224.444703] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  224.444705] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.444706] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  224.665470] [drm:i915_gem_open] 
>[  224.665483] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  224.674519] [drm:i915_gem_open] 
>[  224.674528] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  224.674531] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  224.675074] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  224.675084] [drm:drm_mode_addfb2] [FB:59]
>[  224.675515] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4ba0
>[  224.675517] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800d4a77240 state to ffff8800d51f4ba0
>[  224.675519] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d5352400 state to ffff8800d51f4ba0
>[  224.675520] [drm:drm_atomic_check_only] checking ffff8800d51f4ba0
>[  224.675522] [drm:drm_atomic_commit] commiting ffff8800d51f4ba0
>[  224.675534] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[  224.675538] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4ba0
>[  224.675539] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4ba0
>[  224.675540] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4ba0
>[  224.675541] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800d4a776c0 state to ffff8800d51f4ba0
>[  224.675542] [drm:drm_atomic_check_only] checking ffff8800d51f4ba0
>[  224.675543] [drm:drm_atomic_commit] commiting ffff8800d51f4ba0
>[  224.675543] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4ba0
>[  224.675544] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4ba0
>[  224.675545] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4ba0
>[  224.675546] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800d4a773c0 state to ffff8800d51f4ba0
>[  224.675547] [drm:drm_atomic_check_only] checking ffff8800d51f4ba0
>[  224.675547] [drm:drm_atomic_commit] commiting ffff8800d51f4ba0
>[  224.675548] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4ba0
>[  224.675549] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4ba0
>[  224.675550] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4ba0
>[  224.675551] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800d4a77900 state to ffff8800d51f4ba0
>[  224.675551] [drm:drm_atomic_check_only] checking ffff8800d51f4ba0
>[  224.675552] [drm:drm_atomic_commit] commiting ffff8800d51f4ba0
>[  224.675552] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4ba0
>[  224.675553] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4ba0
>[  224.675554] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4ba0
>[  224.675555] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800d4a77d80 state to ffff8800d51f4ba0
>[  224.675555] [drm:drm_atomic_check_only] checking ffff8800d51f4ba0
>[  224.675556] [drm:drm_atomic_commit] commiting ffff8800d51f4ba0
>[  224.675557] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4ba0
>[  224.675557] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4ba0
>[  224.675558] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d51f4ba0
>[  224.675559] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800d4a77300 state to ffff8800d51f4ba0
>[  224.675560] [drm:drm_atomic_check_only] checking ffff8800d51f4ba0
>[  224.675561] [drm:drm_atomic_commit] commiting ffff8800d51f4ba0
>[  224.675561] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d51f4ba0
>[  224.675562] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d51f4ba0
>[  224.675563] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  224.675566] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  224.675567] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.675568] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  224.675570] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  224.675572] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  224.675572] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  224.675574] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  224.675574] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  224.675575] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  224.675576] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  224.675577] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  224.675578] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  224.675579] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  224.675579] [drm:intel_dump_pipe_config] requested mode:
>[  224.675581] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.675581] [drm:intel_dump_pipe_config] adjusted mode:
>[  224.675582] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.675584] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  224.675584] [drm:intel_dump_pipe_config] port clock: 162000
>[  224.675585] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  224.675586] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  224.675586] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  224.675587] [drm:intel_dump_pipe_config] ips: 0
>[  224.675587] [drm:intel_dump_pipe_config] double wide: 0
>[  224.675588] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  224.675589] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  224.675590] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.675591] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  224.683366] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.683370] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88011aab2f00 state to ffff8800d4b87600
>[  224.683372] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88011a35a400 state to ffff8800d4b87600
>[  224.683373] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.683376] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.683384] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[  224.683387] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.683389] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.683391] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.683393] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800d5012b40 state to ffff8800d4b87600
>[  224.683394] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.683396] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.683397] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.683398] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.683400] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.683401] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800d5012d80 state to ffff8800d4b87600
>[  224.683402] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.683404] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.683405] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.683406] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.683407] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.683409] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800d5012780 state to ffff8800d4b87600
>[  224.683410] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.683411] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.683412] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.683414] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.683415] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.683417] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800d5012900 state to ffff8800d4b87600
>[  224.683418] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.683419] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.683420] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.683421] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.683423] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87600
>[  224.683424] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800d5012600 state to ffff8800d4b87600
>[  224.683425] [drm:drm_atomic_check_only] checking ffff8800d4b87600
>[  224.683426] [drm:drm_atomic_commit] commiting ffff8800d4b87600
>[  224.683427] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800d4b87600
>[  224.683429] [drm:drm_atomic_state_free] Freeing atomic state ffff8800d4b87600
>[  224.683430] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  224.683432] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  224.683434] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.683436] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  224.683438] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  224.683440] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  224.683441] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  224.683442] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  224.683443] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  224.683444] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  224.683446] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  224.683447] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  224.683449] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  224.683450] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  224.683451] [drm:intel_dump_pipe_config] requested mode:
>[  224.683453] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.683454] [drm:intel_dump_pipe_config] adjusted mode:
>[  224.683456] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  224.683458] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  224.683459] [drm:intel_dump_pipe_config] port clock: 162000
>[  224.683460] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  224.683461] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  224.683462] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  224.683463] [drm:intel_dump_pipe_config] ips: 0
>[  224.683464] [drm:intel_dump_pipe_config] double wide: 0
>[  224.683466] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  224.683467] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  224.683469] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  224.683470] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  237.991380] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  237.991384] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  237.991386] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  237.991389] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  237.991391] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  237.991394] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  237.991395] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  237.991397] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  237.991398] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  237.991399] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  237.991402] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  237.991404] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  237.991406] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  237.991407] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  237.991408] [drm:intel_dump_pipe_config] requested mode:
>[  237.991418] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  237.991418] [drm:intel_dump_pipe_config] adjusted mode:
>[  237.991419] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  237.991421] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  237.991421] [drm:intel_dump_pipe_config] port clock: 162000
>[  237.991422] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  237.991423] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  237.991423] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  237.991424] [drm:intel_dump_pipe_config] ips: 0
>[  237.991424] [drm:intel_dump_pipe_config] double wide: 0
>[  249.973082] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  249.973087] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  249.973089] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  249.973092] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  249.973095] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  249.973098] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  249.973100] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  249.973102] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  249.973103] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  249.973104] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  249.973107] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  249.973116] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  249.973117] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  249.973118] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  249.973119] [drm:intel_dump_pipe_config] requested mode:
>[  249.973120] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  249.973121] [drm:intel_dump_pipe_config] adjusted mode:
>[  249.973122] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  249.973123] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  249.973124] [drm:intel_dump_pipe_config] port clock: 162000
>[  249.973124] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  249.973125] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  249.973126] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  249.973126] [drm:intel_dump_pipe_config] ips: 0
>[  249.973127] [drm:intel_dump_pipe_config] double wide: 0
>[  303.960525] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  303.960531] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  303.960533] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  303.960536] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  303.960539] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  303.960542] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  303.960544] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  303.960546] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  303.960547] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  303.960548] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  303.960559] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  303.960560] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  303.960561] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  303.960561] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  303.960562] [drm:intel_dump_pipe_config] requested mode:
>[  303.960563] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  303.960564] [drm:intel_dump_pipe_config] adjusted mode:
>[  303.960565] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  303.960566] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  303.960567] [drm:intel_dump_pipe_config] port clock: 162000
>[  303.960567] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  303.960568] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  303.960569] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  303.960570] [drm:intel_dump_pipe_config] ips: 0
>[  303.960570] [drm:intel_dump_pipe_config] double wide: 0
>[  310.713784] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  310.713788] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  310.713790] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  310.713793] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  310.713795] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  310.713798] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  310.713800] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  310.713801] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  310.713802] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  310.713803] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  310.713806] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  310.713808] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  310.713810] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  310.713811] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  310.713812] [drm:intel_dump_pipe_config] requested mode:
>[  310.713815] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  310.713816] [drm:intel_dump_pipe_config] adjusted mode:
>[  310.713826] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  310.713827] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  310.713827] [drm:intel_dump_pipe_config] port clock: 162000
>[  310.713828] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  310.713829] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  310.713829] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  310.713830] [drm:intel_dump_pipe_config] ips: 0
>[  310.713830] [drm:intel_dump_pipe_config] double wide: 0
>[  316.856991] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  316.856995] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  316.856997] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  316.856999] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  316.857001] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  316.857004] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  316.857006] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  316.857007] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  316.857008] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  316.857009] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  316.857012] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  316.857014] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  316.857016] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  316.857017] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  316.857018] [drm:intel_dump_pipe_config] requested mode:
>[  316.857021] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  316.857022] [drm:intel_dump_pipe_config] adjusted mode:
>[  316.857032] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  316.857033] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  316.857034] [drm:intel_dump_pipe_config] port clock: 162000
>[  316.857034] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  316.857035] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  316.857036] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  316.857036] [drm:intel_dump_pipe_config] ips: 0
>[  316.857037] [drm:intel_dump_pipe_config] double wide: 0
>[  318.858032] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  318.858036] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  318.858038] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  318.858041] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  318.858043] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  318.858046] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  318.858048] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  318.858049] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  318.858050] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  318.858051] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  318.858054] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  318.858056] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  318.858058] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  318.858060] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  318.858060] [drm:intel_dump_pipe_config] requested mode:
>[  318.858063] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  318.858072] [drm:intel_dump_pipe_config] adjusted mode:
>[  318.858073] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  318.858074] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  318.858075] [drm:intel_dump_pipe_config] port clock: 162000
>[  318.858075] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  318.858076] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  318.858077] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  318.858077] [drm:intel_dump_pipe_config] ips: 0
>[  318.858078] [drm:intel_dump_pipe_config] double wide: 0
>[  325.301720] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  325.301724] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  325.301726] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  325.301728] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  325.301731] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  325.301733] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  325.301735] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  325.301737] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  325.301738] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  325.301739] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  325.301742] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  325.301743] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  325.301753] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  325.301754] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  325.301754] [drm:intel_dump_pipe_config] requested mode:
>[  325.301756] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  325.301756] [drm:intel_dump_pipe_config] adjusted mode:
>[  325.301757] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  325.301759] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  325.301760] [drm:intel_dump_pipe_config] port clock: 162000
>[  325.301760] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  325.301761] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  325.301762] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  325.301762] [drm:intel_dump_pipe_config] ips: 0
>[  325.301763] [drm:intel_dump_pipe_config] double wide: 0
>[  327.045055] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  327.045059] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  327.045061] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  327.045063] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  327.045066] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  327.045068] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  327.045070] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  327.045072] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  327.045072] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  327.045074] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  327.045076] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  327.045078] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  327.045080] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  327.045082] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  327.045083] [drm:intel_dump_pipe_config] requested mode:
>[  327.045086] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  327.045095] [drm:intel_dump_pipe_config] adjusted mode:
>[  327.045096] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  327.045097] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  327.045098] [drm:intel_dump_pipe_config] port clock: 162000
>[  327.045098] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  327.045099] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  327.045100] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  327.045100] [drm:intel_dump_pipe_config] ips: 0
>[  327.045101] [drm:intel_dump_pipe_config] double wide: 0
>[  341.391565] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  341.391570] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  341.391572] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  341.391575] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  341.391578] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  341.391582] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  341.391583] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  341.391585] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  341.391586] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  341.391587] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  341.391597] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  341.391598] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  341.391599] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  341.391600] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  341.391600] [drm:intel_dump_pipe_config] requested mode:
>[  341.391602] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  341.391602] [drm:intel_dump_pipe_config] adjusted mode:
>[  341.391604] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  341.391605] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  341.391605] [drm:intel_dump_pipe_config] port clock: 162000
>[  341.391606] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  341.391607] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  341.391608] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  341.391608] [drm:intel_dump_pipe_config] ips: 0
>[  341.391609] [drm:intel_dump_pipe_config] double wide: 0
>[  343.622620] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  343.622624] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  343.622626] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  343.622628] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  343.622631] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  343.622634] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  343.622635] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  343.622637] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  343.622638] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  343.622639] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  343.622641] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  343.622643] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  343.622645] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  343.622647] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  343.622648] [drm:intel_dump_pipe_config] requested mode:
>[  343.622658] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  343.622659] [drm:intel_dump_pipe_config] adjusted mode:
>[  343.622660] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  343.622661] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  343.622662] [drm:intel_dump_pipe_config] port clock: 162000
>[  343.622662] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  343.622663] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  343.622664] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  343.622664] [drm:intel_dump_pipe_config] ips: 0
>[  343.622665] [drm:intel_dump_pipe_config] double wide: 0
>[  350.781325] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  350.781329] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  350.781331] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  350.781334] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  350.781336] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  350.781339] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  350.781341] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  350.781342] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  350.781343] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  350.781344] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  350.781347] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  350.781349] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  350.781351] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  350.781352] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  350.781353] [drm:intel_dump_pipe_config] requested mode:
>[  350.781363] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  350.781364] [drm:intel_dump_pipe_config] adjusted mode:
>[  350.781365] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  350.781366] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  350.781367] [drm:intel_dump_pipe_config] port clock: 162000
>[  350.781367] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  350.781368] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  350.781369] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  350.781370] [drm:intel_dump_pipe_config] ips: 0
>[  350.781370] [drm:intel_dump_pipe_config] double wide: 0
>[  352.274115] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  352.274119] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  352.274121] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  352.274124] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  352.274126] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  352.274129] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  352.274130] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  352.274132] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  352.274133] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  352.274134] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  352.274137] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  352.274139] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  352.274141] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  352.274142] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  352.274143] [drm:intel_dump_pipe_config] requested mode:
>[  352.274146] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  352.274147] [drm:intel_dump_pipe_config] adjusted mode:
>[  352.274157] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  352.274158] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  352.274158] [drm:intel_dump_pipe_config] port clock: 162000
>[  352.274159] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  352.274160] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  352.274161] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  352.274161] [drm:intel_dump_pipe_config] ips: 0
>[  352.274162] [drm:intel_dump_pipe_config] double wide: 0
>[  371.768219] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  371.768223] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  371.768225] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  371.768228] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  371.768230] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  371.768233] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  371.768235] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  371.768236] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  371.768237] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  371.768238] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  371.768241] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  371.768243] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  371.768245] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  371.768246] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  371.768255] [drm:intel_dump_pipe_config] requested mode:
>[  371.768257] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  371.768257] [drm:intel_dump_pipe_config] adjusted mode:
>[  371.768258] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  371.768259] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  371.768260] [drm:intel_dump_pipe_config] port clock: 162000
>[  371.768260] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  371.768261] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  371.768262] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  371.768263] [drm:intel_dump_pipe_config] ips: 0
>[  371.768263] [drm:intel_dump_pipe_config] double wide: 0
>[  379.310365] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  379.310369] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  379.310371] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  379.310373] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  379.310376] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  379.310379] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  379.310380] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  379.310382] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  379.310383] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  379.310384] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  379.310387] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  379.310389] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  379.310391] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  379.310392] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  379.310393] [drm:intel_dump_pipe_config] requested mode:
>[  379.310396] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  379.310397] [drm:intel_dump_pipe_config] adjusted mode:
>[  379.310406] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  379.310407] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  379.310408] [drm:intel_dump_pipe_config] port clock: 162000
>[  379.310408] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  379.310409] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  379.310410] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  379.310411] [drm:intel_dump_pipe_config] ips: 0
>[  379.310411] [drm:intel_dump_pipe_config] double wide: 0
>[  390.535036] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  390.535040] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  390.535042] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  390.535044] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  390.535047] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  390.535049] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  390.535051] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  390.535052] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  390.535053] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  390.535055] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  390.535057] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  390.535059] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  390.535061] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  390.535063] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  390.535064] [drm:intel_dump_pipe_config] requested mode:
>[  390.535074] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  390.535075] [drm:intel_dump_pipe_config] adjusted mode:
>[  390.535076] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  390.535077] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  390.535077] [drm:intel_dump_pipe_config] port clock: 162000
>[  390.535078] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  390.535079] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  390.535080] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  390.535080] [drm:intel_dump_pipe_config] ips: 0
>[  390.535081] [drm:intel_dump_pipe_config] double wide: 0
>[  392.123234] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  392.123238] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  392.123240] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  392.123243] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  392.123245] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  392.123248] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  392.123249] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  392.123251] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  392.123252] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  392.123253] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  392.123256] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  392.123258] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  392.123260] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  392.123261] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  392.123262] [drm:intel_dump_pipe_config] requested mode:
>[  392.123272] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  392.123273] [drm:intel_dump_pipe_config] adjusted mode:
>[  392.123274] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  392.123275] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  392.123276] [drm:intel_dump_pipe_config] port clock: 162000
>[  392.123276] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  392.123277] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  392.123278] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  392.123278] [drm:intel_dump_pipe_config] ips: 0
>[  392.123279] [drm:intel_dump_pipe_config] double wide: 0
>[  397.758418] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  397.758422] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  397.758424] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  397.758427] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  397.758429] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  397.758432] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  397.758433] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  397.758435] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  397.758436] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  397.758437] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  397.758440] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  397.758442] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  397.758444] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  397.758445] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  397.758446] [drm:intel_dump_pipe_config] requested mode:
>[  397.758455] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  397.758456] [drm:intel_dump_pipe_config] adjusted mode:
>[  397.758457] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  397.758458] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  397.758459] [drm:intel_dump_pipe_config] port clock: 162000
>[  397.758459] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  397.758460] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  397.758461] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  397.758461] [drm:intel_dump_pipe_config] ips: 0
>[  397.758462] [drm:intel_dump_pipe_config] double wide: 0
>[  425.248932] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  425.248949] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  425.248952] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  425.248955] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  425.248957] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  425.248969] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  425.248970] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  425.248971] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  425.248971] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  425.248972] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  425.248973] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  425.248974] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  425.248975] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  425.248976] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  425.248976] [drm:intel_dump_pipe_config] requested mode:
>[  425.248978] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  425.248978] [drm:intel_dump_pipe_config] adjusted mode:
>[  425.248979] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  425.248981] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  425.248981] [drm:intel_dump_pipe_config] port clock: 162000
>[  425.248982] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  425.248983] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  425.248984] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  425.248984] [drm:intel_dump_pipe_config] ips: 0
>[  425.248984] [drm:intel_dump_pipe_config] double wide: 0
>[  428.460142] [drm:i915_gem_open] 
>[  428.460183] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  428.460186] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88011a10fb40 state to ffff880119e50ea0
>[  428.460189] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d5347800 state to ffff880119e50ea0
>[  428.460190] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  428.460194] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  428.460206] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[  428.460211] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  428.460213] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  428.460215] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  428.460216] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88011a10fa80 state to ffff880119e50ea0
>[  428.460218] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  428.460219] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  428.460220] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  428.460221] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  428.460223] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  428.460225] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88011a10f900 state to ffff880119e50ea0
>[  428.460226] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  428.460227] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  428.460228] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  428.460229] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  428.460231] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  428.460233] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88011aab2f00 state to ffff880119e50ea0
>[  428.460234] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  428.460235] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  428.460236] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  428.460237] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  428.460239] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  428.460240] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88011aab2cc0 state to ffff880119e50ea0
>[  428.460241] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  428.460243] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  428.460244] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  428.460245] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  428.460246] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  428.460248] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800d5571a80 state to ffff880119e50ea0
>[  428.460249] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  428.460250] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  428.460252] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  428.460253] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  428.460255] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  428.460258] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  428.460260] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  428.460262] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  428.460264] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  428.460266] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  428.460267] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  428.460269] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  428.460270] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  428.460271] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  428.460273] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  428.460274] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  428.460276] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  428.460277] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  428.460278] [drm:intel_dump_pipe_config] requested mode:
>[  428.460280] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  428.460281] [drm:intel_dump_pipe_config] adjusted mode:
>[  428.460283] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  428.460285] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  428.460286] [drm:intel_dump_pipe_config] port clock: 162000
>[  428.460287] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  428.460288] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  428.460289] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  428.460290] [drm:intel_dump_pipe_config] ips: 0
>[  428.460291] [drm:intel_dump_pipe_config] double wide: 0
>[  428.460293] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  428.460294] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  428.460296] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  428.460297] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  429.025564] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  429.025567] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  429.025568] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  429.025570] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  429.025571] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  429.025574] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  429.025575] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  429.025576] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  429.025576] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  429.025577] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  429.025578] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  429.025579] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  429.025580] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  429.025581] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  429.025581] [drm:intel_dump_pipe_config] requested mode:
>[  429.025583] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  429.025583] [drm:intel_dump_pipe_config] adjusted mode:
>[  429.025585] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  429.025586] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  429.025586] [drm:intel_dump_pipe_config] port clock: 162000
>[  429.025587] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  429.025588] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  429.025589] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  429.025589] [drm:intel_dump_pipe_config] ips: 0
>[  429.025590] [drm:intel_dump_pipe_config] double wide: 0
>[  429.030656] [drm:i915_gem_open] 
>[  429.030669] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  429.030908] [drm:i915_gem_open] 
>[  429.030920] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  429.030924] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  429.031115] [drm:drm_mode_getresources] CRTC[2] CONNECTORS[3] ENCODERS[3]
>[  429.031124] [drm:drm_mode_addfb2] [FB:59]
>[  429.071277] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  429.071279] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800d5015180 state to ffff880119e50ea0
>[  429.071281] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d5199c00 state to ffff880119e50ea0
>[  429.071282] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  429.071285] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  429.071299] [drm:ironlake_update_primary_plane] Writing base 00063000 00000000 0 0 6400
>[  429.071304] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  429.071305] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  429.071307] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  429.071308] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800d5015600 state to ffff880119e50ea0
>[  429.071309] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  429.071310] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  429.071310] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  429.071311] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  429.071312] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  429.071313] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800d5015b40 state to ffff880119e50ea0
>[  429.071314] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  429.071314] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  429.071315] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  429.071316] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  429.071317] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  429.071319] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800d4aae0c0 state to ffff880119e50ea0
>[  429.071319] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  429.071320] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  429.071321] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  429.071321] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  429.071322] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  429.071323] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800d4aaea80 state to ffff880119e50ea0
>[  429.071324] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  429.071325] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  429.071325] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  429.071326] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  429.071327] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880119e50ea0
>[  429.071328] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800d4aaec00 state to ffff880119e50ea0
>[  429.071329] [drm:drm_atomic_check_only] checking ffff880119e50ea0
>[  429.071329] [drm:drm_atomic_commit] commiting ffff880119e50ea0
>[  429.071330] [drm:drm_atomic_state_clear] Clearing atomic state ffff880119e50ea0
>[  429.071331] [drm:drm_atomic_state_free] Freeing atomic state ffff880119e50ea0
>[  429.071332] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0)
>[  429.071334] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[  429.071335] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  429.071337] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  429.071338] [drm:connected_sink_compute_bpp] [CONNECTOR:26:VGA-1] checking for sink bpp constrains
>[  429.071341] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
>[  429.071341] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  429.071342] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  429.071343] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[  429.071343] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  429.071345] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 7549747, gmch_n: 8388608, link_m: 314572, link_n: 524288, tu: 64
>[  429.071346] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  429.071347] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  429.071347] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  429.071348] [drm:intel_dump_pipe_config] requested mode:
>[  429.071349] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  429.071350] [drm:intel_dump_pipe_config] adjusted mode:
>[  429.071351] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x48 0x5
>[  429.071352] [drm:intel_dump_crtc_timings] crtc timings: 162000 1600 1664 1856 2160 1200 1201 1204 1250, type: 0x48 flags: 0x5
>[  429.071353] [drm:intel_dump_pipe_config] port clock: 162000
>[  429.071353] [drm:intel_dump_pipe_config] pipe src size: 1600x1200
>[  429.071354] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  429.071355] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  429.071356] [drm:intel_dump_pipe_config] ips: 0
>[  429.071356] [drm:intel_dump_pipe_config] double wide: 0
>[  429.071357] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  429.071358] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[  429.071359] [drm:intel_modeset_stage_output_state] [CONNECTOR:26:VGA-1] to [CRTC:20]
>[  429.071360] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[  471.970330] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800d4b87de0
> snipped here, clearly after the segfault.

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Attachments on bug 90622: 116015 | 116016 | 116017

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