Attachment 117629 Details for Bug 89959 – drm/i915/gen9: Disable gather at set shader bit

[patch] drm/i915/gen9: Disable gather at set shader bit

0002-drm-i915-gen9-Disable-gather-at-set-shader-bit.patch (text/plain), 2.70 KB, created by Mika Kuoppala on 2015-08-11 14:53:56 UTC

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Creator: Mika Kuoppala

Created: 2015-08-11 14:53:56 UTC

Size: 2.70 KB

patch

obsolete

>From 1749241208a1ca9952b5caf41e214fa38da6a58e Mon Sep 17 00:00:00 2001
>From: Arun Siluvery <arun.siluvery@linux.intel.com>
>Date: Tue, 11 Aug 2015 15:44:32 +0100
>Subject: [PATCH 2/2] drm/i915/gen9: Disable gather at set shader bit
>
>From Gen9, Push constant instruction parsing behaviour varies according to
>whether set shader is enabled or not. If we want legacy behaviour then it
>can be achieved by disabling set shader.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89959
>
>Cc: Ben Widawsky <benjamin.widawsky@intel.com>
>Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>Cc: Mika Kuoppala <mika.kuoppala@intel.com>
>Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
>---
> drivers/gpu/drm/i915/i915_reg.h         |  5 +++++
> drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++
> 2 files changed, 15 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index 6786e94..683e36a 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -1729,6 +1729,10 @@ enum skl_disp_power_wells {
> #define FW_BLC		0x020d8
> #define FW_BLC2		0x020dc
> #define FW_BLC_SELF	0x020e0 /* 915+ only */
>+#define CS_RCS_BE       0x20D8
>+#define   CS_RCS_DISABLE_GATHER_AT_SHADER    (1<<7)
>+#define RS_CHICKEN      0x20DC
>+#define   RS_CHICKEN_DISABLE_GATHER_AT_SHADER  (1<<2)
> #define   FW_BLC_SELF_EN_MASK      (1<<31)
> #define   FW_BLC_SELF_FIFO_MASK    (1<<16) /* 945 only */
> #define   FW_BLC_SELF_EN           (1<<15) /* 945 only */
>@@ -5843,6 +5847,7 @@ enum skl_disp_power_wells {
> # define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC	((1<<10) | (1<<26))
> # define GEN9_RHWO_OPTIMIZATION_DISABLE		(1<<14)
> #define COMMON_SLICE_CHICKEN2			0x7014
>+#define  GEN9_DISABLE_GATHER_SET_SHADER_SLICE   (1<<12)
> # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE	(1<<0)
> 
> #define HIZ_CHICKEN					0x7018
>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>index 2f1f4f7..bc57a63 100644
>--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>@@ -983,6 +983,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> 		tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE;
> 	WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp);
> 
>+	/* Chicken bits to disable set shader is in multiple places,
>+	 * set bits in all required registers to disable it correctly
>+	 */
>+	WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2, GEN9_DISABLE_GATHER_SET_SHADER_SLICE);
>+	if ((IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_D0) ||
>+	    (IS_BROXTON(dev) && INTEL_REVID(dev) == BXT_REVID_A0))
>+		WA_SET_BIT_MASKED(RS_CHICKEN, RS_CHICKEN_DISABLE_GATHER_AT_SHADER);
>+	else
>+		WA_SET_BIT_MASKED(CS_RCS_BE, CS_RCS_DISABLE_GATHER_AT_SHADER);
>+
> 	return 0;
> }
> 
>-- 
>2.1.4
>

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