Attachment 118206 Details for Bug 91973 – dmesg before and after / modInfo output

dmesg before and after / modInfo output

bugReport.txt (text/plain), 599.76 KB, created by G.Legrain on 2015-09-11 07:15:35 UTC

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Creator: G.Legrain

Created: 2015-09-11 07:15:35 UTC

Size: 599.76 KB

patch

obsolete

>dmesg BEFORE loosing projector output :
>=======================================
>
>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 4.1.6-1-ARCH (builduser@tobias) (gcc version 5.2.0 (GCC) ) #1 SMP PREEMPT Mon Aug 17 08:52:28 CEST 2015
>[    0.000000] Command line: BOOT_IMAGE=/vmlinuz-linux root=UUID=061f9214-dd9e-4aa5-89d6-95be27ddc857 rw quiet pcie_aspm=force drm.debug=0x1e log_buf_len=1M
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000c8d02fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000c8d03000-0x00000000c91b9fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000c91ba000-0x00000000dadbcfff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dadbd000-0x00000000dae7ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dae80000-0x00000000daeacfff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000daead000-0x00000000db7f8fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000db7f9000-0x00000000dba93fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dba94000-0x00000000dbafdfff] type 20
>[    0.000000] BIOS-e820: [mem 0x00000000dbafe000-0x00000000dbafefff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dd000000-0x00000000df7fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000021e7fffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.31 by American Megatrends
>[    0.000000] efi:  ACPI=0xdae8c000  ACPI 2.0=0xdae8c000  SMBIOS=0xf0000 
>[    0.000000] SMBIOS 2.8 present.
>[    0.000000] DMI: Dell Inc. XPS 13 9343/0TRX4F, BIOS A05 07/14/2015
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] e820: last_pfn = 0x21e800 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: uncachable
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-DFFFF uncachable
>[    0.000000]   E0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 0000000000 mask 7E00000000 write-back
>[    0.000000]   1 base 0200000000 mask 7FF0000000 write-back
>[    0.000000]   2 base 0210000000 mask 7FF8000000 write-back
>[    0.000000]   3 base 0218000000 mask 7FFC000000 write-back
>[    0.000000]   4 base 021C000000 mask 7FFE000000 write-back
>[    0.000000]   5 base 021E000000 mask 7FFF800000 write-back
>[    0.000000]   6 base 00E0000000 mask 7FE0000000 uncachable
>[    0.000000]   7 base 00DE000000 mask 7FFE000000 uncachable
>[    0.000000]   8 base 00DD000000 mask 7FFF000000 uncachable
>[    0.000000]   9 disabled
>[    0.000000] PAT configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- UC  
>[    0.000000] e820: update [mem 0xdd000000-0xffffffff] usable ==> reserved
>[    0.000000] e820: last_pfn = 0xdbaff max_arch_pfn = 0x400000000
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x01b2f000, 0x01b2ffff] PGTABLE
>[    0.000000] BRK [0x01b30000, 0x01b30fff] PGTABLE
>[    0.000000] BRK [0x01b31000, 0x01b31fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x21e600000-0x21e7fffff]
>[    0.000000]  [mem 0x21e600000-0x21e7fffff] page 2M
>[    0.000000] BRK [0x01b32000, 0x01b32fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x200000000-0x21e5fffff]
>[    0.000000]  [mem 0x200000000-0x21e5fffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x1e0000000-0x1ffffffff]
>[    0.000000]  [mem 0x1e0000000-0x1ffffffff] page 1G
>[    0.000000] init_memory_mapping: [mem 0x00100000-0xc8d02fff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x3fffffff] page 2M
>[    0.000000]  [mem 0x40000000-0xbfffffff] page 1G
>[    0.000000]  [mem 0xc0000000-0xc8bfffff] page 2M
>[    0.000000]  [mem 0xc8c00000-0xc8d02fff] page 4k
>[    0.000000] init_memory_mapping: [mem 0xc91ba000-0xdadbcfff]
>[    0.000000]  [mem 0xc91ba000-0xc91fffff] page 4k
>[    0.000000]  [mem 0xc9200000-0xdabfffff] page 2M
>[    0.000000]  [mem 0xdac00000-0xdadbcfff] page 4k
>[    0.000000] BRK [0x01b33000, 0x01b33fff] PGTABLE
>[    0.000000] BRK [0x01b34000, 0x01b34fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xdbafe000-0xdbafefff]
>[    0.000000]  [mem 0xdbafe000-0xdbafefff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x1dfffffff]
>[    0.000000]  [mem 0x100000000-0x1dfffffff] page 1G
>[    0.000000] log_buf_len: 1048576 bytes
>[    0.000000] early log buf free: 518696(98%)
>[    0.000000] RAMDISK: [mem 0x37612000-0x37b00fff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000DAE8C000 000024 (v02 DELL  )
>[    0.000000] ACPI: XSDT 0x00000000DAE8C0B8 0000F4 (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FACP 0x00000000DAE9F778 00010C (v05 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: DSDT 0x00000000DAE8C240 013538 (v02 DELL   CBX3     01072009 INTL 20120913)
>[    0.000000] ACPI: FACS 0x00000000DB7F6F80 000040
>[    0.000000] ACPI: APIC 0x00000000DAE9F888 000084 (v03 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FPDT 0x00000000DAE9F910 000044 (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FIDT 0x00000000DAE9F958 00009C (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: MCFG 0x00000000DAE9F9F8 00003C (v01 DELL   CBX3     01072009 MSFT 00000097)
>[    0.000000] ACPI: HPET 0x00000000DAE9FA38 000038 (v01 DELL   CBX3     01072009 AMI. 00000005)
>[    0.000000] ACPI: SSDT 0x00000000DAE9FA70 000455 (v01 SataRe SataTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: UEFI 0x00000000DAE9FEC8 000042 (v01                 00000000      00000000)
>[    0.000000] ACPI: SSDT 0x00000000DAE9FF10 0004AE (v02 Intel_ Tpm2Tabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA03C0 00004B (v02 MeSsdt MeSsdt   00003000 INTL 20120913)
>[    0.000000] ACPI: TPM2 0x00000000DAEA0410 000034 (v03                 00000000      00000000)
>[    0.000000] ACPI: SSDT 0x00000000DAEA0448 000CDB (v02 Ther_R Ther_Rvp 00001000 INTL 20120913)
>[    0.000000] ACPI: ASF! 0x00000000DAEA1128 0000A0 (v32 INTEL   HCG     00000001 TFSM 000F4240)
>[    0.000000] ACPI: SSDT 0x00000000DAEA11C8 00051F (v02 PmRef  Cpu0Ist  00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA16E8 000B74 (v02 CpuRef CpuSsdt  00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA2260 0001C7 (v02 PmRef  LakeTiny 00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA2428 0003A5 (v02 CppcTa CppcTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: PCCT 0x00000000DAEA27D0 00006E (v05 PcctTa PcctTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA2840 000AC4 (v02 Cpc_Ta Cpc_Tabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA3308 004207 (v02 SaSsdt SaSsdt   00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA7510 004646 (v01 DptfTa DptfTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SLIC 0x00000000DAEABB58 000176 (v03 DELL   CBX3     01072009 MSFT 00010013)
>[    0.000000] ACPI: MSDM 0x00000000DAEABCD0 000055 (v03 DELL   CBX3     06222004 AMI  00010013)
>[    0.000000] ACPI: DMAR 0x00000000DAEABD28 0000D4 (v01 INTEL  BDW      00000001 INTL 00000001)
>[    0.000000] ACPI: CSRT 0x00000000DAEABE00 0000C4 (v01 INTL   BDW-ULT  00000001 INTL 20100528)
>[    0.000000] ACPI: BGRT 0x00000000DAEABEC8 000038 (v00                 01072009 AMI  00010013)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000021e7fffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x21e6f9000-0x21e6fcfff]
>[    0.000000]  [ffffea0000000000-ffffea00087fffff] PMD -> [ffff880215e00000-ffff88021ddfffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[    0.000000]   Normal   [mem 0x0000000100000000-0x000000021e7fffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>[    0.000000]   node   0: [mem 0x0000000000059000-0x000000000009dfff]
>[    0.000000]   node   0: [mem 0x0000000000100000-0x00000000c8d02fff]
>[    0.000000]   node   0: [mem 0x00000000c91ba000-0x00000000dadbcfff]
>[    0.000000]   node   0: [mem 0x00000000dbafe000-0x00000000dbafefff]
>[    0.000000]   node   0: [mem 0x0000000100000000-0x000000021e7fffff]
>[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000021e7fffff]
>[    0.000000] On node 0 totalpages: 2068643
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 22 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 13925 pages used for memmap
>[    0.000000]   DMA32 zone: 891143 pages, LIFO batch:31
>[    0.000000]   Normal zone: 18336 pages used for memmap
>[    0.000000]   Normal zone: 1173504 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xdd800000-0xdf7fffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] high dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-39
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00058fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xc8d03000-0xc91b9fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdadbd000-0xdae7ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdae80000-0xdaeacfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdaead000-0xdb7f8fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdb7f9000-0xdba93fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdba94000-0xdbafdfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdbaff000-0xdcffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdd000000-0xdf7fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdf800000-0xf7ffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed00000-0xfed03fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[    0.000000] e820: [mem 0xdf800000-0xf7ffffff] available for PCI devices
>[    0.000000] Booting paravirtualized kernel on bare hardware
>[    0.000000] clocksource refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370452778343963 ns
>[    0.000000] setup_percpu: NR_CPUS:128 nr_cpumask_bits:128 nr_cpu_ids:4 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 33 pages/cpu @ffff88021e400000 s95576 r8192 d31400 u524288
>[    0.000000] pcpu-alloc: s95576 r8192 d31400 u524288 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 2036296
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-linux root=UUID=061f9214-dd9e-4aa5-89d6-95be27ddc857 rw quiet pcie_aspm=force drm.debug=0x1e log_buf_len=1M
>[    0.000000] PCIe ASPM is forcibly enabled
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] xsave: enabled xstate_bv 0x7, cntxt size 0x340 using standard form
>[    0.000000] AGP: Checking aperture...
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] Calgary: detecting Calgary via BIOS EBDA area
>[    0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[    0.000000] Memory: 7966056K/8274572K available (5699K kernel code, 893K rwdata, 1732K rodata, 1180K init, 1152K bss, 308516K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>[    0.000000] Preemptible hierarchical RCU implementation.
>[    0.000000] 	RCU dyntick-idle grace-period acceleration is enabled.
>[    0.000000] 	RCU restricting CPUs from NR_CPUS=128 to nr_cpu_ids=4.
>[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
>[    0.000000] NR_IRQS:8448 nr_irqs:728 16
>[    0.000000] Console: colour dummy device 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] clocksource hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484882848 ns
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] spurious 8259A interrupt: IRQ7.
>[    0.000000] tsc: Detected 2294.771 MHz processor
>[    0.000025] Calibrating delay loop (skipped), value calculated using timer frequency.. 4591.77 BogoMIPS (lpj=7649236)
>[    0.000027] pid_max: default: 32768 minimum: 301
>[    0.000031] ACPI: Core revision 20150410
>[    0.021527] ACPI: All ACPI Tables successfully acquired
>[    0.022189] Security Framework initialized
>[    0.022193] Yama: becoming mindful.
>[    0.022615] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.023990] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[    0.024584] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.024592] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.024760] Initializing cgroup subsys blkio
>[    0.024762] Initializing cgroup subsys memory
>[    0.024767] Initializing cgroup subsys devices
>[    0.024769] Initializing cgroup subsys freezer
>[    0.024771] Initializing cgroup subsys net_cls
>[    0.024790] CPU: Physical Processor ID: 0
>[    0.024791] CPU: Processor Core ID: 0
>[    0.024795] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.024796] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.025749] mce: CPU supports 7 MCE banks
>[    0.025760] CPU0: Thermal monitoring enabled (TM1)
>[    0.025767] process: using mwait in idle threads
>[    0.025769] Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8
>[    0.025770] Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4
>[    0.026066] Freeing SMP alternatives memory: 20K (ffffffff81a08000 - ffffffff81a0d000)
>[    0.031194] ftrace: allocating 21563 entries in 85 pages
>[    0.039544] dmar: Host address width 39
>[    0.039546] dmar: DRHD base: 0x000000fed90000 flags: 0x0
>[    0.039554] dmar: IOMMU 0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap 7e1ff0505e
>[    0.039556] dmar: DRHD base: 0x000000fed91000 flags: 0x1
>[    0.039560] dmar: IOMMU 1: reg_base_addr fed91000 ver 1:0 cap d2008c20660462 ecap f010da
>[    0.039561] dmar: RMRR base: 0x000000db9e5000 end: 0x000000db9f3fff
>[    0.039562] dmar: RMRR base: 0x000000dd000000 end: 0x000000df7fffff
>[    0.039563] dmar: ANDD device: 1 name: \_SB.PCI0.SDMA
>[    0.039565] IOAPIC id 2 under DRHD base  0xfed91000 IOMMU 1
>[    0.039566] HPET id 0 under DRHD base 0xfed91000
>[    0.039858] x2apic is disabled because BIOS sets x2apic opt out bit. You can use 'intremap=no_x2apic_optout' to override the BIOS setting.
>[    0.039868] Enabled IRQ remapping in xapic mode
>[    0.039869] x2apic: IRQ remapping doesn't support X2APIC mode
>[    0.040483] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.073472] TSC deadline timer enabled
>[    0.073474] smpboot: CPU0: Intel(R) Core(TM) i5-5300U CPU @ 2.30GHz (fam: 06, model: 3d, stepping: 04)
>[    0.073495] Performance Events: PEBS fmt2+, 16-deep LBR, Broadwell events, full-width counters, Intel PMU driver.
>[    0.073512] ... version:                3
>[    0.073512] ... bit width:              48
>[    0.073513] ... generic registers:      4
>[    0.073514] ... value mask:             0000ffffffffffff
>[    0.073515] ... max period:             0000ffffffffffff
>[    0.073515] ... fixed-purpose events:   3
>[    0.073516] ... event mask:             000000070000000f
>[    0.093591] x86: Booting SMP configuration:
>[    0.093592] .... node  #0, CPUs:      #1
>[    0.107755] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>[    0.114436]  #2 #3
>[    0.149411] x86: Booted up 1 node, 4 CPUs
>[    0.149414] smpboot: Total of 4 processors activated (18365.09 BogoMIPS)
>[    0.152729] devtmpfs: initialized
>[    0.154446] PM: Registering ACPI NVS region [mem 0xdaead000-0xdb7f8fff] (9748480 bytes)
>[    0.154594] clocksource jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370867519511994 ns
>[    0.154661] pinctrl core: initialized pinctrl subsystem
>[    0.154693] RTC time:  6:32:31, date: 09/11/15
>[    0.154790] NET: Registered protocol family 16
>[    0.166062] cpuidle: using governor ladder
>[    0.186057] cpuidle: using governor menu
>[    0.186085] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
>[    0.186087] ACPI: bus type PCI registered
>[    0.186088] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.186144] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.186146] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
>[    0.186220] PCI: Using configuration type 1 for base access
>[    0.186226] dmi type 0xB1 record - unknown flag
>[    0.199649] ACPI: Added _OSI(Module Device)
>[    0.199651] ACPI: Added _OSI(Processor Device)
>[    0.199652] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.199653] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.204784] ACPI: Executed 16 blocks of module-level executable AML code
>[    0.212068] ACPI: Dynamic OEM Table Load:
>[    0.212074] ACPI: SSDT 0xFFFF880214040800 0003D3 (v02 PmRef  Cpu0Cst  00003001 INTL 20120913)
>[    0.212898] ACPI: Dynamic OEM Table Load:
>[    0.212903] ACPI: SSDT 0xFFFF88021478B000 0005AA (v02 PmRef  ApIst    00003000 INTL 20120913)
>[    0.213762] ACPI: Dynamic OEM Table Load:
>[    0.213766] ACPI: SSDT 0xFFFF880214001600 000119 (v02 PmRef  ApCst    00003000 INTL 20120913)
>[    0.215188] ACPI : EC: EC started
>[    0.217815] ACPI: Interpreter enabled
>[    0.217825] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20150410/hwxface-580)
>[    0.217833] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20150410/hwxface-580)
>[    0.217848] ACPI: (supports S0 S3 S4 S5)
>[    0.217850] ACPI: Using IOAPIC for interrupt routing
>[    0.217884] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.219399] ACPI: Power Resource [PG00] (on)
>[    0.219722] ACPI: Power Resource [PG01] (on)
>[    0.220018] ACPI: Power Resource [PG02] (on)
>[    0.231449] ACPI: Power Resource [FN00] (off)
>[    0.231507] ACPI: Power Resource [FN01] (off)
>[    0.231562] ACPI: Power Resource [FN02] (off)
>[    0.231617] ACPI: Power Resource [FN03] (off)
>[    0.231670] ACPI: Power Resource [FN04] (off)
>[    0.232396] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])
>[    0.232401] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.232840] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
>[    0.232842] acpi PNP0A08:00: FADT indicates ASPM is unsupported, using BIOS configuration
>[    0.233148] PCI host bridge to bus 0000:00
>[    0.233151] pci_bus 0000:00: root bus resource [bus 00-3e]
>[    0.233152] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[    0.233154] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    0.233155] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    0.233157] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window]
>[    0.233158] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window]
>[    0.233159] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window]
>[    0.233160] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window]
>[    0.233161] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window]
>[    0.233163] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window]
>[    0.233164] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window]
>[    0.233165] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window]
>[    0.233166] pci_bus 0000:00: root bus resource [mem 0xdf800000-0xfeafffff window]
>[    0.233172] pci 0000:00:00.0: [8086:1604] type 00 class 0x060000
>[    0.233246] pci 0000:00:02.0: [8086:1616] type 00 class 0x030000
>[    0.233255] pci 0000:00:02.0: reg 0x10: [mem 0xf6000000-0xf6ffffff 64bit]
>[    0.233260] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref]
>[    0.233264] pci 0000:00:02.0: reg 0x20: [io  0xf000-0xf03f]
>[    0.233342] pci 0000:00:03.0: [8086:160c] type 00 class 0x040300
>[    0.233349] pci 0000:00:03.0: reg 0x10: [mem 0xf721c000-0xf721ffff 64bit]
>[    0.233420] pci 0000:00:04.0: [8086:1603] type 00 class 0x118000
>[    0.233428] pci 0000:00:04.0: reg 0x10: [mem 0xf7210000-0xf7217fff 64bit]
>[    0.233515] pci 0000:00:14.0: [8086:9cb1] type 00 class 0x0c0330
>[    0.233529] pci 0000:00:14.0: reg 0x10: [mem 0xf7200000-0xf720ffff 64bit]
>[    0.233577] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.233618] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.233647] pci 0000:00:16.0: [8086:9cba] type 00 class 0x078000
>[    0.233664] pci 0000:00:16.0: reg 0x10: [mem 0xf7226000-0xf722601f 64bit]
>[    0.233720] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.233797] pci 0000:00:1b.0: [8086:9ca0] type 00 class 0x040300
>[    0.233809] pci 0000:00:1b.0: reg 0x10: [mem 0xf7218000-0xf721bfff 64bit]
>[    0.233849] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    0.233896] pci 0000:00:1b.0: System wakeup disabled by ACPI
>[    0.233923] pci 0000:00:1c.0: [8086:9c90] type 01 class 0x060400
>[    0.233974] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.234037] pci 0000:00:1c.0: System wakeup disabled by ACPI
>[    0.234068] pci 0000:00:1c.3: [8086:9c96] type 01 class 0x060400
>[    0.234118] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
>[    0.234178] pci 0000:00:1c.3: System wakeup disabled by ACPI
>[    0.234210] pci 0000:00:1d.0: [8086:9ca6] type 00 class 0x0c0320
>[    0.234225] pci 0000:00:1d.0: reg 0x10: [mem 0xf7223000-0xf72233ff]
>[    0.234295] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.234338] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.234368] pci 0000:00:1f.0: [8086:9cc3] type 00 class 0x060100
>[    0.234518] pci 0000:00:1f.2: [8086:9c83] type 00 class 0x010601
>[    0.234529] pci 0000:00:1f.2: reg 0x10: [io  0xf0b0-0xf0b7]
>[    0.234534] pci 0000:00:1f.2: reg 0x14: [io  0xf0a0-0xf0a3]
>[    0.234541] pci 0000:00:1f.2: reg 0x18: [io  0xf090-0xf097]
>[    0.234547] pci 0000:00:1f.2: reg 0x1c: [io  0xf080-0xf083]
>[    0.234552] pci 0000:00:1f.2: reg 0x20: [io  0xf060-0xf07f]
>[    0.234558] pci 0000:00:1f.2: reg 0x24: [mem 0xf7222000-0xf72227ff]
>[    0.234583] pci 0000:00:1f.2: PME# supported from D3hot
>[    0.234641] pci 0000:00:1f.3: [8086:9ca2] type 00 class 0x0c0500
>[    0.234653] pci 0000:00:1f.3: reg 0x10: [mem 0xf7221000-0xf72210ff 64bit]
>[    0.234669] pci 0000:00:1f.3: reg 0x20: [io  0xf040-0xf05f]
>[    0.234745] pci 0000:00:1f.6: [8086:9ca4] type 00 class 0x118000
>[    0.234768] pci 0000:00:1f.6: reg 0x10: [mem 0xf7220000-0xf7220fff 64bit]
>[    0.234964] pci 0000:01:00.0: [10ec:5249] type 00 class 0xff0000
>[    0.234984] pci 0000:01:00.0: reg 0x10: [mem 0xf7100000-0xf7100fff]
>[    0.235094] pci 0000:01:00.0: supports D1 D2
>[    0.235095] pci 0000:01:00.0: PME# supported from D1 D2 D3hot D3cold
>[    0.235122] pci 0000:01:00.0: System wakeup disabled by ACPI
>[    0.242792] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.242796] pci 0000:00:1c.0:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.242896] pci 0000:02:00.0: [8086:095a] type 00 class 0x028000
>[    0.242940] pci 0000:02:00.0: reg 0x10: [mem 0xf7000000-0xf7001fff 64bit]
>[    0.243104] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
>[    0.243145] pci 0000:02:00.0: System wakeup disabled by ACPI
>[    0.252807] pci 0000:00:1c.3: PCI bridge to [bus 02]
>[    0.252811] pci 0000:00:1c.3:   bridge window [mem 0xf7000000-0xf70fffff]
>[    0.254798] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254836] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254871] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254905] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254940] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254975] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.255011] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.255048] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.256085] ACPI: Enabled 3 GPEs in block 00 to 7F
>[    0.256132] ACPI : EC: GPE = 0x27, I/O: command/status = 0x934, data = 0x930
>[    0.256217] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.256219] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.256221] vgaarb: loaded
>[    0.256222] vgaarb: bridge control possible 0000:00:02.0
>[    0.256317] PCI: Using ACPI for IRQ routing
>[    0.257471] PCI: pci_cache_line_size set to 64 bytes
>[    0.257539] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    0.257540] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>[    0.257541] e820: reserve RAM buffer [mem 0xc8d03000-0xcbffffff]
>[    0.257542] e820: reserve RAM buffer [mem 0xdadbd000-0xdbffffff]
>[    0.257543] e820: reserve RAM buffer [mem 0xdbaff000-0xdbffffff]
>[    0.257544] e820: reserve RAM buffer [mem 0x21e800000-0x21fffffff]
>[    0.257629] NetLabel: Initializing
>[    0.257630] NetLabel:  domain hash size = 128
>[    0.257630] NetLabel:  protocols = UNLABELED CIPSOv4
>[    0.257640] NetLabel:  unlabeled traffic allowed by default
>[    0.257659] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.257663] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.259684] Switched to clocksource hpet
>[    0.263910] pnp: PnP ACPI init
>[    0.264076] system 00:00: [io  0x0680-0x069f] has been reserved
>[    0.264078] system 00:00: [io  0xffff] has been reserved
>[    0.264079] system 00:00: [io  0xffff] has been reserved
>[    0.264081] system 00:00: [io  0xffff] has been reserved
>[    0.264082] system 00:00: [io  0x1800-0x18fe] could not be reserved
>[    0.264083] system 00:00: [io  0x164e-0x164f] has been reserved
>[    0.264086] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.264128] pnp 00:01: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.264155] system 00:02: [io  0x1854-0x1857] has been reserved
>[    0.264157] system 00:02: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[    0.264265] pnp 00:03: Plug and Play ACPI device, IDs PNP0303 (active)
>[    0.264283] pnp 00:04: Plug and Play ACPI device, IDs DLL0665 PNP0f13 (active)
>[    0.264397] system 00:05: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    0.264398] system 00:05: [mem 0xfed10000-0xfed17fff] has been reserved
>[    0.264400] system 00:05: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.264401] system 00:05: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.264403] system 00:05: [mem 0xf8000000-0xfbffffff] has been reserved
>[    0.264404] system 00:05: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    0.264405] system 00:05: [mem 0xfed90000-0xfed93fff] could not be reserved
>[    0.264407] system 00:05: [mem 0xfed45000-0xfed8ffff] has been reserved
>[    0.264408] system 00:05: [mem 0xff000000-0xffffffff] has been reserved
>[    0.264409] system 00:05: [mem 0xfee00000-0xfeefffff] could not be reserved
>[    0.264411] system 00:05: [mem 0xf7fe0000-0xf7feffff] has been reserved
>[    0.264412] system 00:05: [mem 0xf7ff0000-0xf7ffffff] has been reserved
>[    0.264414] system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.264774] system 00:06: [mem 0xfe102000-0xfe102fff] has been reserved
>[    0.264776] system 00:06: [mem 0xfe104000-0xfe104fff] has been reserved
>[    0.264777] system 00:06: [mem 0xfe106000-0xfe106fff] has been reserved
>[    0.264779] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.272945] pnp: PnP ACPI: found 7 devices
>[    0.279186] clocksource acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>[    0.279205] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.279210] pci 0000:00:1c.0:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.279216] pci 0000:00:1c.3: PCI bridge to [bus 02]
>[    0.279219] pci 0000:00:1c.3:   bridge window [mem 0xf7000000-0xf70fffff]
>[    0.279226] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[    0.279227] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[    0.279228] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.279230] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window]
>[    0.279231] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window]
>[    0.279232] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window]
>[    0.279233] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window]
>[    0.279234] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window]
>[    0.279235] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window]
>[    0.279237] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window]
>[    0.279238] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window]
>[    0.279239] pci_bus 0000:00: resource 15 [mem 0xdf800000-0xfeafffff window]
>[    0.279240] pci_bus 0000:01: resource 1 [mem 0xf7100000-0xf71fffff]
>[    0.279242] pci_bus 0000:02: resource 1 [mem 0xf7000000-0xf70fffff]
>[    0.279269] NET: Registered protocol family 2
>[    0.279410] TCP established hash table entries: 65536 (order: 7, 524288 bytes)
>[    0.279522] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    0.279622] TCP: Hash tables configured (established 65536 bind 65536)
>[    0.279648] UDP hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.279668] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.279717] NET: Registered protocol family 1
>[    0.279729] pci 0000:00:02.0: Video device with shadowed ROM
>[    0.296457] PCI: CLS 64 bytes, default 64
>[    0.296501] Unpacking initramfs...
>[    0.358453] Freeing initrd memory: 5052K (ffff880037612000 - ffff880037b01000)
>[    0.358467] dmar: ACPI device "INTL9C60:00" under DMAR at fed91000 as 00:15.0
>[    0.358477] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    0.358479] software IO TLB [mem 0xd289a000-0xd689a000] (64MB) mapped at [ffff8800d289a000-ffff8800d6899fff]
>[    0.358520] RAPL PMU detected, API unit is 2^-32 Joules, 4 fixed counters 655360 ms ovfl timer
>[    0.358521] hw unit of domain pp0-core 2^-14 Joules
>[    0.358521] hw unit of domain package 2^-14 Joules
>[    0.358522] hw unit of domain dram 2^-14 Joules
>[    0.358523] hw unit of domain pp1-gpu 2^-14 Joules
>[    0.358589] microcode: CPU0 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358596] microcode: CPU1 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358600] microcode: CPU2 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358605] microcode: CPU3 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358642] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    0.358665] Scanning for low memory corruption every 60 seconds
>[    0.358852] futex hash table entries: 1024 (order: 4, 65536 bytes)
>[    0.358863] Initialise system trusted keyring
>[    0.359118] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    0.360202] zpool: loaded
>[    0.360204] zbud: loaded
>[    0.360337] VFS: Disk quotas dquot_6.6.0
>[    0.360365] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    0.360475] Key type big_key registered
>[    0.360642] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
>[    0.360675] io scheduler noop registered
>[    0.360677] io scheduler deadline registered
>[    0.360708] io scheduler cfq registered (default)
>[    0.361055] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
>[    0.361057] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
>[    0.361060] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
>[    0.361070] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt
>[    0.361071] pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
>[    0.361074] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded
>[    0.361079] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    0.361091] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>[    0.361110] efifb: probing for efifb
>[    0.361129] efifb: framebuffer at 0xe0000000, mapped to 0xffffc90001000000, using 8128k, total 8128k
>[    0.361130] efifb: mode is 1920x1080x32, linelength=7680, pages=1
>[    0.361131] efifb: scrolling: redraw
>[    0.361132] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
>[    0.364990] Console: switching to colour frame buffer device 240x67
>[    0.368646] fb0: EFI VGA frame buffer device
>[    0.368654] intel_idle: MWAIT substates: 0x11142120
>[    0.368655] intel_idle: v0.4 model 0x3D
>[    0.368656] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    0.368850] GHES: HEST is not enabled!
>[    0.368895] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>[    0.369229] Linux agpgart interface v0.103
>[    0.369456] rtc_cmos 00:01: RTC can wake from S4
>[    0.369568] rtc_cmos 00:01: rtc core: registered rtc_cmos as rtc0
>[    0.369592] rtc_cmos 00:01: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    0.369602] Intel P-state driver initializing.
>[    0.369737] ledtrig-cpu: registered to indicate activity on CPUs
>[    0.370483] NET: Registered protocol family 10
>[    0.370936] NET: Registered protocol family 17
>[    0.371644] Loading compiled-in X.509 certificates
>[    0.371678] registered taskstats version 1
>[    0.372565]   Magic number: 15:954:518
>[    0.372641] acpi LNXPOWER:02: hash matches
>[    0.372719] rtc_cmos 00:01: setting system clock to 2015-09-11 06:32:32 UTC (1441953152)
>[    0.372979] PM: Hibernation image not present or could not be loaded.
>[    0.373657] Freeing unused kernel memory: 1180K (ffffffff818e1000 - ffffffff81a08000)
>[    0.373660] Write protecting the kernel read-only data: 8192k
>[    0.374228] Freeing unused kernel memory: 432K (ffff880001594000 - ffff880001600000)
>[    0.374441] Freeing unused kernel memory: 316K (ffff8800017b1000 - ffff880001800000)
>[    0.383141] random: systemd-tmpfile urandom read with 5 bits of entropy available
>[    0.386200] [drm] Initialized drm 1.1.0 20060810
>[    0.387417] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input0
>[    0.388933] ACPI: Lid Switch [LID0]
>[    0.388987] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1
>[    0.388990] ACPI: Power Button [PBTN]
>[    0.389022] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input2
>[    0.389024] ACPI: Sleep Button [SBTN]
>[    0.389060] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input3
>[    0.389061] ACPI: Power Button [PWRF]
>[    0.393094] [drm:i915_dump_device_info] i915 device info: gen=8, pciid=0x1616 rev=0x09 flags=is_mobile,need_gfx_hws,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,
>[    0.393109] [drm:intel_detect_pch] Found LynxPoint LP PCH
>[    0.393180] [drm] Memory usable by graphics device = 4096M
>[    0.393182] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    0.393183] [drm:i915_gem_gtt_init] GTT stolen size = 32M
>[    0.393184] [drm:i915_gem_gtt_init] ppgtt mode: 2
>[    0.393185] checking generic (e0000000 7f0000) vs hw (e0000000 10000000)
>[    0.393186] fb: switching to inteldrmfb from EFI VGA
>[    0.393200] Console: switching to colour dummy device 80x25
>[    0.393266] [drm] Replacing VGA console driver
>[    0.393696] [drm:intel_opregion_setup] graphic opregion physical addr: 0xdb7ec018
>[    0.393704] [drm:intel_opregion_setup] Public ACPI methods supported
>[    0.393705] [drm:intel_opregion_setup] SWSCI supported
>[    0.393707] [drm] ACPI BIOS requests an excessive sleep of 25000 ms, using 1500 ms instead
>[    0.399819] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00700483
>[    0.399822] [drm:intel_opregion_setup] ASLE supported
>[    0.399879] [drm:intel_device_info_runtime_init] slice total: 0
>[    0.399880] [drm:intel_device_info_runtime_init] subslice total: 0
>[    0.399881] [drm:intel_device_info_runtime_init] subslice per slice: 0
>[    0.399882] [drm:intel_device_info_runtime_init] EU total: 0
>[    0.399883] [drm:intel_device_info_runtime_init] EU per subslice: 0
>[    0.399884] [drm:intel_device_info_runtime_init] has slice power gating: n
>[    0.399885] [drm:intel_device_info_runtime_init] has subslice power gating: n
>[    0.399886] [drm:intel_device_info_runtime_init] has EU power gating: n
>[    0.399887] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    0.399888] [drm] Driver supports precise vblank timestamp query.
>[    0.399890] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    0.399892] [drm:validate_vbt] Using VBT from OpRegion: $VBT HASWELL        d
>[    0.399894] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    0.399895] [drm:parse_general_definitions] crt_ddc_bus_pin: 0
>[    0.399897] [drm:parse_lfp_panel_data] DRRS supported mode is seamless
>[    0.399899] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    0.399901] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 69300 1366 1398 1430 1470 768 771 776 786 0x8 0xa
>[    0.399903] [drm:parse_lfp_panel_data] VBT initial LVDS value 300
>[    0.399904] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 10, level 255
>[    0.399906] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[    0.399908] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[    0.399909] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    0.399910] [drm:parse_driver_features] DRRS State Enabled:0
>[    0.399912] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    0.399913] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[    0.399914] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    0.399916] [drm:parse_ddi_port] VBT HDMI level shift for port B: 6
>[    0.399938] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    0.399944] [drm:i915_gem_init_stolen] found 33554432 bytes of stolen memory at dd800000
>[    0.399946] [drm:intel_display_power_get] enabling always-on
>[    0.399947] [drm:intel_display_power_get] enabling display
>[    0.400004] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec)
>[    0.400005] [drm:intel_print_wm_latency] Primary WM1 latency 50 (25.0 usec)
>[    0.400006] [drm:intel_print_wm_latency] Primary WM2 latency 90 (45.0 usec)
>[    0.400008] [drm:intel_print_wm_latency] Primary WM3 latency 130 (65.0 usec)
>[    0.400009] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec)
>[    0.400010] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec)
>[    0.400011] [drm:intel_print_wm_latency] Sprite WM1 latency 50 (25.0 usec)
>[    0.400012] [drm:intel_print_wm_latency] Sprite WM2 latency 90 (45.0 usec)
>[    0.400013] [drm:intel_print_wm_latency] Sprite WM3 latency 130 (65.0 usec)
>[    0.400014] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec)
>[    0.400015] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec)
>[    0.400017] [drm:intel_print_wm_latency] Cursor WM1 latency 50 (25.0 usec)
>[    0.400018] [drm:intel_print_wm_latency] Cursor WM2 latency 90 (45.0 usec)
>[    0.400019] [drm:intel_print_wm_latency] Cursor WM3 latency 130 (65.0 usec)
>[    0.400020] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec)
>[    0.400022] [drm:intel_modeset_init] 3 display pipes available.
>[    0.400034] [drm:intel_ddi_pll_init] CDCLK running at 540000KHz
>[    0.400037] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    0.400346] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[    0.400397] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000
>[    0.400398] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
>[    0.400399] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
>[    0.400401] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
>[    0.400402] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[    0.400439] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    0.400445] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    0.401020] [drm:intel_dp_get_dpcd] DPCD: 12 0a 02 41 00 00 00 00 00 00 00 00 00 0b 00
>[    0.401331] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[    0.401627] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[    0.401629] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[    0.401631] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[    0.401640] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
>[    0.404994] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.404995] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    0.405000] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 488/937
>[    0.405019] [drm:intel_dp_init_connector] Adding DP connector on port B
>[    0.405060] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[    0.410424] [drm:intel_modeset_readout_hw_state] [CRTC:20] hw state readout: enabled
>[    0.410427] [drm:intel_modeset_readout_hw_state] [CRTC:24] hw state readout: disabled
>[    0.410429] [drm:intel_modeset_readout_hw_state] [CRTC:28] hw state readout: disabled
>[    0.410431] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[    0.410432] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[    0.410436] [drm:intel_ddi_get_config] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp
>[    0.410437] [drm:intel_modeset_readout_hw_state] [ENCODER:30:TMDS-30] hw state readout: enabled, pipe A
>[    0.410439] [drm:intel_modeset_readout_hw_state] [ENCODER:38:TMDS-38] hw state readout: disabled, pipe A
>[    0.410440] [drm:intel_modeset_readout_hw_state] [ENCODER:40:DP MST-40] hw state readout: disabled, pipe A
>[    0.410442] [drm:intel_modeset_readout_hw_state] [ENCODER:41:DP MST-41] hw state readout: disabled, pipe B
>[    0.410443] [drm:intel_modeset_readout_hw_state] [ENCODER:42:DP MST-42] hw state readout: disabled, pipe C
>[    0.410445] [drm:intel_modeset_readout_hw_state] [CONNECTOR:31:eDP-1] hw state readout: enabled
>[    0.410446] [drm:intel_modeset_readout_hw_state] [CONNECTOR:39:DP-1] hw state readout: disabled
>[    0.410448] [drm:intel_modeset_readout_hw_state] [CONNECTOR:43:HDMI-A-1] hw state readout: disabled
>[    0.410453] [drm:intel_dump_pipe_config] [CRTC:20][setup_hw_state] config for pipe A
>[    0.410454] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    0.410455] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.410456] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410458] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    0.410459] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.410460] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.410461] [drm:intel_dump_pipe_config] requested mode:
>[    0.410463] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 1920 0 0 0 1080 0 0 0 0x0 0x0
>[    0.410464] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.410466] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa
>[    0.410468] [drm:intel_dump_crtc_timings] crtc timings: 138499 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x0 flags: 0xa
>[    0.410469] [drm:intel_dump_pipe_config] port clock: 270000
>[    0.410470] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    0.410471] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.410472] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.410473] [drm:intel_dump_pipe_config] ips: 0
>[    0.410474] [drm:intel_dump_pipe_config] double wide: 0
>[    0.410476] [drm:intel_dump_pipe_config] [CRTC:24][setup_hw_state] config for pipe B
>[    0.410477] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    0.410478] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    0.410479] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410480] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410481] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.410482] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.410483] [drm:intel_dump_pipe_config] requested mode:
>[    0.410485] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410486] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.410487] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410489] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    0.410490] [drm:intel_dump_pipe_config] port clock: 0
>[    0.410491] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    0.410492] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.410493] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.410494] [drm:intel_dump_pipe_config] ips: 0
>[    0.410495] [drm:intel_dump_pipe_config] double wide: 0
>[    0.410496] [drm:intel_dump_pipe_config] [CRTC:28][setup_hw_state] config for pipe C
>[    0.410497] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    0.410498] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    0.410499] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410501] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410502] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.410503] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.410504] [drm:intel_dump_pipe_config] requested mode:
>[    0.410505] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410506] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.410507] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410509] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    0.410510] [drm:intel_dump_pipe_config] port clock: 0
>[    0.410511] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    0.410512] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.410513] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.410514] [drm:intel_dump_pipe_config] ips: 0
>[    0.410515] [drm:intel_dump_pipe_config] double wide: 0
>[    0.410520] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[    0.410522] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[    0.410523] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[    0.410525] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[    0.410526] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[    0.410527] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[    0.410528] [drm:check_crtc_state] [CRTC:20]
>[    0.410533] [drm:check_crtc_state] [CRTC:24]
>[    0.410535] [drm:check_crtc_state] [CRTC:28]
>[    0.410536] [drm:check_shared_dpll_state] WRPLL 1
>[    0.410537] [drm:check_shared_dpll_state] WRPLL 2
>[    0.410542] [drm:ironlake_get_initial_plane_config] pipe A with fb: size=1920x1080@32, offset=0, pitch 7680, size 0x7e9000
>[    0.410543] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=7e9000
>[    0.410547] [drm:i915_pages_create_for_stolen] offset=0x0, size=8294400
>[    0.410551] [drm:intel_alloc_initial_plane_obj] initial plane fb obj ffff8800da344000
>[    0.410587] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 7e9000
>[    0.410589] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [7e9000, fffff000]
>[    0.412332] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    0.412334] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    0.412335] [drm:i915_gem_context_init] LR context support initialized
>[    0.412404] [drm:intel_init_pipe_control] render ring pipe control offset: 0x0081d000
>[    0.412511] [drm:gen8_init_common_ring] Execlists enabled for render ring
>[    0.412516] [drm:gen8_init_common_ring] Execlists enabled for bsd ring
>[    0.412519] [drm:gen8_init_common_ring] Execlists enabled for blitter ring
>[    0.412522] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring
>[    0.412641] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    0.412671] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    0.412675] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    0.412679] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] status updated from 3 to 1
>[    0.412688] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.412692] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    0.412695] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.412696] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    0.412698] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    0.412702] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] status updated from 3 to 2
>[    0.412703] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    0.412705] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    0.412706] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    0.412859] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    0.412860] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[    0.413020] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    0.413022] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    0.413024] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] status updated from 3 to 2
>[    0.413028] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    0.413032] [drm:drm_setup_crtcs] 
>[    0.413044] [drm:drm_enable_connectors] connector 31 enabled? yes
>[    0.413045] [drm:drm_enable_connectors] connector 39 enabled? no
>[    0.413046] [drm:drm_enable_connectors] connector 43 enabled? no
>[    0.413048] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    0.413050] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    0.413052] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080
>[    0.413053] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    0.413055] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    0.413056] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0)
>[    0.413058] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    0.413060] [drm:i915_gem_object_create_stolen] creating stolen object: size=7e9000
>[    0.413064] [drm:i915_pages_create_for_stolen] offset=0x7e9000, size=8294400
>[    0.413705] [drm:intelfb_create] allocated 1920x1080 fb: 0x00885000, bo ffff8800374e0000
>[    0.413778] fbcon: inteldrmfb (fb0) is primary device
>[    0.413824] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413826] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800da3cb6c0 state to ffff880213791060
>[    0.413828] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8802137f9400 state to ffff880213791060
>[    0.413828] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413831] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413842] [drm:intel_fbc_update] disabled per chip default
>[    0.413844] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413845] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413847] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413847] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800da3cb780 state to ffff880213791060
>[    0.413848] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413849] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413849] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413850] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413851] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413851] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800da3cb840 state to ffff880213791060
>[    0.413852] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413852] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413853] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413854] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413854] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413855] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800da3cb900 state to ffff880213791060
>[    0.413855] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413856] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413857] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413857] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413858] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413858] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800da3cb9c0 state to ffff880213791060
>[    0.413859] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413859] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413860] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413860] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413861] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413862] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800da3cba80 state to ffff880213791060
>[    0.413862] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413863] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413863] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413864] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413864] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413865] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800da3cbb40 state to ffff880213791060
>[    0.413866] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413866] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413867] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413867] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413868] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413869] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800da3cbc00 state to ffff880213791060
>[    0.413869] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413870] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413870] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413871] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413872] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413872] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8800da3cbcc0 state to ffff880213791060
>[    0.413873] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413873] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413874] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413875] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413876] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    0.413877] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[    0.413878] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.413880] [drm:drm_mode_debug_printmodeline] Modeline 46:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.413881] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1
>[    0.413881] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413882] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8802146a8180 state to ffff880213791060
>[    0.413883] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8802137f9400 state to ffff880213791060
>[    0.413884] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    0.413885] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8802146a81a0 state to ffff880213791060
>[    0.413886] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8802146a81c0 state to ffff880213791060
>[    0.413887] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff880213791060
>[    0.413888] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    0.413889] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    0.413891] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    0.413894] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    0.413894] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    0.413896] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    0.413897] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    0.413897] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    0.413898] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.413898] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.413899] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    0.413900] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.413900] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.413901] [drm:intel_dump_pipe_config] requested mode:
>[    0.413902] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.413902] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.413903] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.413905] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    0.413905] [drm:intel_dump_pipe_config] port clock: 270000
>[    0.413905] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    0.413906] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.413907] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.413907] [drm:intel_dump_pipe_config] ips: 1
>[    0.413908] [drm:intel_dump_pipe_config] double wide: 0
>[    0.413912] [drm:intel_edp_backlight_off] 
>[    0.414269] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    0.415708] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input4
>[    0.415755] [drm] Initialized i915 1.6.0 20150327 for 0000:00:02.0 on minor 0
>[    0.616205] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    0.630745] [drm:edp_panel_off] Turn eDP port A panel power off
>[    0.630748] [drm:wait_panel_off] Wait for panel power off time
>[    0.630751] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    0.690989] [drm:wait_panel_status] Wait complete
>[    0.691003] [drm:intel_display_power_put] disabling display
>[    0.691005] [drm:hsw_set_power_well] Requesting to disable the power well
>[    0.691009] [drm:drm_atomic_set_fb_for_plane] Set [FB:47] for plane state ffff8800da3cb240
>[    0.691027] [drm:edp_panel_on] Turn eDP port A panel power on
>[    0.691029] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    1.232576] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    1.232578] [drm:wait_panel_status] Wait complete
>[    1.232581] [drm:wait_panel_on] Wait for panel power on
>[    1.232583] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[    1.359167] tsc: Refined TSC clocksource calibration: 2294.688 MHz
>[    1.359170] clocksource tsc: mask: 0xffffffffffffffff max_cycles: 0x21139aef754, max_idle_ns: 440795211890 ns
>[    1.452633] [drm:wait_panel_status] Wait complete
>[    1.452641] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    1.452647] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    1.453725] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    1.454321] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[    1.454906] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[    1.455492] [drm:intel_dp_start_link_train] clock recovery OK
>[    1.456386] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[    1.457272] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[    1.458158] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    1.458399] [drm:intel_edp_backlight_on] 
>[    1.458401] [drm:intel_panel_enable_backlight] pipe A
>[    1.458408] [drm:intel_panel_actually_set_backlight] set backlight PWM = 488
>[    1.459048] [drm:intel_psr_match_conditions] PSR disable by flag
>[    1.459049] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[    1.493832] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[    1.493835] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[    1.493836] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[    1.493837] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[    1.493838] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[    1.493838] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[    1.493840] [drm:check_crtc_state] [CRTC:20]
>[    1.493846] [drm:check_crtc_state] [CRTC:24]
>[    1.493846] [drm:check_crtc_state] [CRTC:28]
>[    1.493847] [drm:check_shared_dpll_state] WRPLL 1
>[    1.493848] [drm:check_shared_dpll_state] WRPLL 2
>[    1.493850] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    1.493852] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    1.493864] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    1.493866] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    1.493867] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880214015c00
>[    1.493869] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880212ed92a0 state to ffff880214015c00
>[    1.493870] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880037845400 state to ffff880214015c00
>[    1.493871] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.493872] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880212ed92c0 state to ffff880214015c00
>[    1.493873] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880212ed92e0 state to ffff880214015c00
>[    1.493875] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff880214015c00
>[    1.493876] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.493877] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff880037845800 state to ffff880214015c00
>[    1.493877] [drm:drm_atomic_state_clear] Clearing atomic state ffff880214015c00
>[    1.493878] [drm:drm_atomic_state_free] Freeing atomic state ffff880214015c00
>[    1.493880] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    1.493881] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    1.493881] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880214015c00
>[    1.493882] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880212ed92e0 state to ffff880214015c00
>[    1.493883] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880037845800 state to ffff880214015c00
>[    1.493884] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.493884] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880212ed92c0 state to ffff880214015c00
>[    1.493885] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880212ed92a0 state to ffff880214015c00
>[    1.493886] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff880214015c00
>[    1.493887] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.493887] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff880037845400 state to ffff880214015c00
>[    1.493888] [drm:drm_atomic_state_clear] Clearing atomic state ffff880214015c00
>[    1.493889] [drm:drm_atomic_state_free] Freeing atomic state ffff880214015c00
>[    1.493891] [drm:drm_fb_helper_hotplug_event] 
>[    1.493893] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    1.493893] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    1.493901] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.493903] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    1.493905] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.493906] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    1.493906] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    1.493908] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    1.493909] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    1.493910] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    1.494112] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    1.494113] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[    1.494296] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    1.494298] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    1.494301] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    1.494306] [drm:drm_setup_crtcs] 
>[    1.494308] [drm:drm_enable_connectors] connector 31 enabled? yes
>[    1.494309] [drm:drm_enable_connectors] connector 39 enabled? no
>[    1.494309] [drm:drm_enable_connectors] connector 43 enabled? no
>[    1.494311] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    1.494312] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    1.494313] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080
>[    1.494314] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    1.494314] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    1.494316] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0)
>[    1.494321] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494323] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800da33a300 state to ffff88021367b900
>[    1.494325] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b900
>[    1.494326] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494328] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494345] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494346] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494347] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494348] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800da33a3c0 state to ffff88021367b900
>[    1.494349] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494350] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494351] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494351] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494352] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494353] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800da33a180 state to ffff88021367b900
>[    1.494353] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494354] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494355] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494356] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494356] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494357] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800da33a0c0 state to ffff88021367b900
>[    1.494358] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494359] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494359] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494360] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494361] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494362] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800da33a000 state to ffff88021367b900
>[    1.494362] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494363] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494363] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494364] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494365] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494367] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800da33a240 state to ffff88021367b900
>[    1.494367] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494368] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494368] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494369] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494370] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494371] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800da33a900 state to ffff88021367b900
>[    1.494371] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494372] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494373] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494373] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494374] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494375] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800da33a9c0 state to ffff88021367b900
>[    1.494375] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494376] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494377] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494377] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494378] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494379] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88021402b300 state to ffff88021367b900
>[    1.494380] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494380] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494381] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494382] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494383] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    1.494384] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    1.494385] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494387] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804f60 state to ffff88021367b900
>[    1.494388] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b900
>[    1.494388] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494390] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804e60 state to ffff88021367b900
>[    1.494391] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880214025f60 state to ffff88021367b900
>[    1.494392] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021367b900
>[    1.494393] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    1.494395] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    1.494397] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    1.494401] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    1.494402] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    1.494403] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    1.494404] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    1.494405] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.494405] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.494406] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.494407] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    1.494408] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.494409] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.494409] [drm:intel_dump_pipe_config] requested mode:
>[    1.494411] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494411] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.494412] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494414] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    1.494414] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.494415] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    1.494415] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.494416] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.494417] [drm:intel_dump_pipe_config] ips: 1
>[    1.494417] [drm:intel_dump_pipe_config] double wide: 0
>[    1.494418] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494419] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494421] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    1.494422] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    1.494423] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494424] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804f00 state to ffff88021367b900
>[    1.494425] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b900
>[    1.494425] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494426] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804e60 state to ffff88021367b900
>[    1.494427] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880215804f60 state to ffff88021367b900
>[    1.494428] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff88021367b900
>[    1.494429] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.494429] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff88021313bc00 state to ffff88021367b900
>[    1.494430] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494431] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494432] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    1.494432] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    1.494433] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494434] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804e60 state to ffff88021367b900
>[    1.494435] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313bc00 state to ffff88021367b900
>[    1.494435] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494436] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804f00 state to ffff88021367b900
>[    1.494437] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880214025f60 state to ffff88021367b900
>[    1.494438] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff88021367b900
>[    1.494438] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.494439] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff88021313b800 state to ffff88021367b900
>[    1.494440] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494440] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494447] Console: switching to colour frame buffer device 240x67
>[    1.494453] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    1.494454] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    1.494455] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b960
>[    1.494455] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804ee0 state to ffff88021367b960
>[    1.494456] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b960
>[    1.494457] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494458] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804f00 state to ffff88021367b960
>[    1.494458] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880215804e60 state to ffff88021367b960
>[    1.494459] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021367b960
>[    1.494460] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    1.494461] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    1.494462] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    1.494464] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    1.494465] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    1.494466] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    1.494466] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    1.494467] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.494467] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.494468] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.494469] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    1.494470] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.494470] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.494471] [drm:intel_dump_pipe_config] requested mode:
>[    1.494472] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494472] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.494474] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494475] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    1.494475] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.494476] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    1.494476] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.494477] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.494477] [drm:intel_dump_pipe_config] ips: 1
>[    1.494478] [drm:intel_dump_pipe_config] double wide: 0
>[    1.494478] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b960
>[    1.494479] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b960
>[    1.498426] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    1.498427] i915 0000:00:02.0: registered panic notifier
>[    1.558523] sdhci: Secure Digital Host Controller Interface driver
>[    1.558526] sdhci: Copyright(c) Pierre Ossman
>[    1.560940] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
>[    1.561483] i8042: Warning: Keylock active
>[    1.563639] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    1.563673] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    1.568756] rtsx_pci 0000:01:00.0: enabling device (0000 -> 0002)
>[    1.568893] rtsx_pci 0000:01:00.0: rtsx_pci_acquire_irq: pcr->msi_en = 1, pci->irq = 45
>[    1.569415] ACPI: bus type USB registered
>[    1.569435] usbcore: registered new interface driver usbfs
>[    1.569443] usbcore: registered new interface driver hub
>[    1.569467] usbcore: registered new device driver usb
>[    1.570152] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    1.570345] ehci-pci: EHCI PCI platform driver
>[    1.570510] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    1.570517] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 1
>[    1.570529] ehci-pci 0000:00:1d.0: debug port 2
>[    1.571170] SCSI subsystem initialized
>[    1.572846] libata version 3.00 loaded.
>[    1.574434] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    1.574450] ehci-pci 0000:00:1d.0: irq 21, io mem 0xf7223000
>[    1.582303] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    1.582600] hub 1-0:1.0: USB hub found
>[    1.582608] hub 1-0:1.0: 3 ports detected
>[    1.582921] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.582928] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[    1.583008] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810
>[    1.583014] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    1.583224] hub 2-0:1.0: USB hub found
>[    1.583238] hub 2-0:1.0: 11 ports detected
>[    1.587719] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input5
>[    1.588047] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.588052] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 3
>[    1.588225] hub 3-0:1.0: USB hub found
>[    1.588236] hub 3-0:1.0: 4 ports detected
>[    1.589526] ahci 0000:00:1f.2: version 3.0
>[    1.589669] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled
>[    1.602300] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 4 ports 6 Gbps 0x8 impl SATA mode
>[    1.602303] ahci 0000:00:1f.2: flags: 64bit ncq stag pm led clo only pio slum part deso sadm sds apst 
>[    1.602711] scsi host0: ahci
>[    1.602827] scsi host1: ahci
>[    1.602918] scsi host2: ahci
>[    1.603003] scsi host3: ahci
>[    1.603046] ata1: DUMMY
>[    1.603047] ata2: DUMMY
>[    1.603048] ata3: DUMMY
>[    1.603050] ata4: SATA max UDMA/133 abar m2048@0xf7222000 port 0xf7222280 irq 47
>[    1.888876] usb 1-1: new high-speed USB device number 2 using ehci-pci
>[    1.922201] ata4: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    1.924246] ata4.00: READ LOG DMA EXT failed, trying unqueued
>[    1.924298] ata4.00: failed to get NCQ Send/Recv Log Emask 0x1
>[    1.924300] ata4.00: ATA-9: SAMSUNG SSD PM851 M.2 2280 256GB, EXT25D0Q, max UDMA/133
>[    1.924301] ata4.00: 500118192 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    1.924662] ata4.00: failed to get NCQ Send/Recv Log Emask 0x1
>[    1.924699] ata4.00: configured for UDMA/133
>[    1.924855] scsi 3:0:0:0: Direct-Access     ATA      SAMSUNG SSD PM85 5D0Q PQ: 0 ANSI: 5
>[    1.927304] sd 3:0:0:0: [sda] 500118192 512-byte logical blocks: (256 GB/238 GiB)
>[    1.927401] sd 3:0:0:0: [sda] Write Protect is off
>[    1.927403] sd 3:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    1.927431] sd 3:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    1.928713]  sda: sda1 sda2 sda3 sda4 sda5 sda6 sda7 sda8 sda9
>[    1.929336] sd 3:0:0:0: [sda] Attached SCSI disk
>[    1.945435] usb 2-2: new full-speed USB device number 2 using xhci_hcd
>[    1.979870] EXT4-fs (sda4): mounted filesystem with ordered data mode. Opts: (null)
>[    2.012526] hub 1-1:1.0: USB hub found
>[    2.012623] hub 1-1:1.0: 8 ports detected
>[    2.022732] ip_tables: (C) 2000-2006 Netfilter Core Team
>[    2.028108] systemd[1]: systemd 225 running in system mode. (+PAM -AUDIT -SELINUX -IMA -APPARMOR +SMACK -SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID -ELFUTILS +KMOD +IDN)
>[    2.028219] systemd[1]: Detected architecture x86-64.
>[    2.028408] systemd[1]: Set hostname to <tsokar>.
>[    2.078460] systemd[1]: Created slice Root Slice.
>[    2.078509] systemd[1]: Listening on Device-mapper event daemon FIFOs.
>[    2.078540] systemd[1]: Listening on udev Control Socket.
>[    2.078629] systemd[1]: Created slice System Slice.
>[    2.078743] systemd[1]: Created slice system-systemd\x2dfsck.slice.
>[    2.078773] systemd[1]: Listening on LVM2 metadata daemon socket.
>[    2.078806] systemd[1]: Listening on Journal Socket.
>[    2.079178] systemd[1]: Mounting Huge Pages File System...
>[    2.079460] systemd[1]: Starting Remount Root and Kernel File Systems...
>[    2.079786] systemd[1]: Starting Create list of required static device nodes for the current kernel...
>[    2.081004] systemd[1]: Mounting Temporary Directory...
>[    2.081540] systemd[1]: Starting Setup Virtual Console...
>[    2.082095] systemd[1]: Mounting POSIX Message Queue File System...
>[    2.082624] systemd[1]: Mounting Debug File System...
>[    2.084182] systemd[1]: Starting Apply Kernel Variables...
>[    2.085040] systemd[1]: Mounting Configuration File System...
>[    2.085147] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
>[    2.085324] systemd[1]: Created slice system-getty.slice.
>[    2.085396] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
>[    2.085414] systemd[1]: Reached target Encrypted Volumes.
>[    2.085677] systemd[1]: Listening on udev Kernel Socket.
>[    2.085889] EXT4-fs (sda4): re-mounted. Opts: data=ordered
>[    2.087991] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
>[    2.088009] systemd[1]: Reached target Paths.
>[    2.088107] systemd[1]: Created slice User and Session Slice.
>[    2.088122] systemd[1]: Reached target Slices.
>[    2.088152] systemd[1]: Listening on Journal Socket (/dev/log).
>[    2.088487] systemd[1]: Starting Journal Service...
>[    2.088502] systemd[1]: Reached target Remote File Systems.
>[    2.088720] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point.
>[    2.089479] systemd[1]: Starting Set Up Additional Binary Formats...
>[    2.090048] systemd[1]: Mounted Huge Pages File System.
>[    2.090072] systemd[1]: Mounted POSIX Message Queue File System.
>[    2.090083] systemd[1]: Mounted Configuration File System.
>[    2.090095] systemd[1]: Mounted Debug File System.
>[    2.090104] systemd[1]: Mounted Temporary Directory.
>[    2.090321] systemd[1]: Started Remount Root and Kernel File Systems.
>[    2.090470] systemd[1]: Started Create list of required static device nodes for the current kernel.
>[    2.092570] systemd[1]: Started Apply Kernel Variables.
>[    2.092749] systemd[1]: proc-sys-fs-binfmt_misc.automount: Got automount request for /proc/sys/fs/binfmt_misc, triggered by 203 (systemd-binfmt)
>[    2.099964] systemd[1]: Mounting Arbitrary Executable File Formats File System...
>[    2.101726] systemd[1]: Starting udev Coldplug all Devices...
>[    2.102216] systemd[1]: Starting Create Static Device Nodes in /dev...
>[    2.102606] systemd[1]: Starting Load/Save Random Seed...
>[    2.103360] systemd[1]: Mounted Arbitrary Executable File Formats File System.
>[    2.108555] systemd[1]: Started Set Up Additional Binary Formats.
>[    2.110785] systemd[1]: Started Load/Save Random Seed.
>[    2.123628] systemd[1]: Started Setup Virtual Console.
>[    2.125454] systemd[1]: Started Create Static Device Nodes in /dev.
>[    2.125514] systemd[1]: Reached target Local File Systems (Pre).
>[    2.125923] systemd[1]: Starting udev Kernel Device Manager...
>[    2.135488] systemd[1]: Started udev Coldplug all Devices.
>[    2.173034] systemd[1]: Started udev Kernel Device Manager.
>[    2.193784] ACPI: AC Adapter [AC] (off-line)
>[    2.200782] proc_thermal 0000:00:04.0: enabling device (0000 -> 0002)
>[    2.204330] ACPI Warning: \_SB_.IETM._ART: Return Package type mismatch at index 0 - found Integer, expected Reference (20150410/nspredef-297)
>[    2.204511] ACPI: Invalid package element [0]: got number, expecting [R]
>[    2.204513] _ART package 0 is invalid, ignored
>[    2.239556] hidraw: raw HID events driver (C) Jiri Kosina
>[    2.243152] dw_dmac INTL9C60:00: DesignWare DMA Controller, 8 channels
>[    2.251640] random: nonblocking pool is initialized
>[    2.263176] systemd[1]: Started Journal Service.
>[    2.271205] systemd-journald[200]: Received request to flush runtime journal from PID 1
>[    2.278583] usb 2-3: new full-speed USB device number 3 using xhci_hcd
>[    2.322878] thermal LNXTHERM:00: registered as thermal_zone3
>[    2.322882] ACPI: Thermal Zone [THM] (25 C)
>[    2.340705] thermal LNXTHERM:01: registered as thermal_zone5
>[    2.340708] ACPI: Thermal Zone [TZ00] (50 C)
>[    2.351701] ACPI Warning: SystemIO range 0x000000000000F040-0x000000000000F05F conflicts with OpRegion 0x000000000000F040-0x000000000000F04F (\_SB_.PCI0.SBUS.SMBI) (20150410/utaddress-254)
>[    2.351709] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    2.351849] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>[    2.353178] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=562/937
>[    2.353183] [drm:intel_panel_actually_set_backlight] set backlight PWM = 577
>[    2.353983] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[    2.361607] Switched to clocksource tsc
>[    2.366072] snd_hda_intel 0000:00:03.0: enabling device (0000 -> 0002)
>[    2.366357] snd_hda_intel 0000:00:03.0: bound 0000:00:02.0 (ops i915_exit [i915])
>[    2.366383] snd_hda_intel 0000:00:1b.0: enabling device (0000 -> 0002)
>[    2.366644] thermal LNXTHERM:02: registered as thermal_zone9
>[    2.366646] ACPI: Thermal Zone [TZ01] (50 C)
>[    2.367460] ACPI: Battery Slot [BAT0] (battery present)
>[    2.367878] wmi: Mapper loaded
>[    2.369430] [drm:intel_display_power_get] enabling display
>[    2.369434] [drm:hsw_set_power_well] Enabling power well
>[    2.372611] cfg80211: Calling CRDA to update world regulatory domain
>[    2.374770] input: PC Speaker as /devices/platform/pcspkr/input/input7
>[    2.380185] Intel(R) Wireless WiFi driver for Linux
>[    2.380188] Copyright(c) 2003- 2015 Intel Corporation
>[    2.380260] iwlwifi 0000:02:00.0: enabling device (0000 -> 0002)
>[    2.381375] snd_hda_codec_realtek hdaudioC1D0: autoconfig for ALC3263: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>[    2.381380] snd_hda_codec_realtek hdaudioC1D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    2.381393] snd_hda_codec_realtek hdaudioC1D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>[    2.381395] snd_hda_codec_realtek hdaudioC1D0:    mono: mono_out=0x0
>[    2.381396] snd_hda_codec_realtek hdaudioC1D0:    inputs:
>[    2.381399] snd_hda_codec_realtek hdaudioC1D0:      Headset Mic=0x18
>[    2.381401] snd_hda_codec_realtek hdaudioC1D0:      Headphone Mic=0x1a
>[    2.381403] snd_hda_codec_realtek hdaudioC1D0:      Internal Mic=0x12
>[    2.384651] iwlwifi 0000:02:00.0: loaded firmware version 25.30.13.0 op_mode iwlmvm
>[    2.385681] input: HDA Intel HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/sound/card0/input9
>[    2.385727] input: HDA Intel HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/sound/card0/input10
>[    2.385766] input: HDA Intel HDMI HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:03.0/sound/card0/input11
>[    2.390728] AVX2 version of gcm_enc/dec engaged.
>[    2.390731] AES CTR mode by8 optimization enabled
>[    2.402479] input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/sound/card1/input8
>[    2.402619] input: HDA Intel PCH Headphone Mic as /devices/pci0000:00/0000:00:1b.0/sound/card1/input12
>[    2.413475] iwlwifi 0000:02:00.0: Detected Intel(R) Dual Band Wireless AC 7265, REV=0x210
>[    2.413566] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.413764] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.419357] EXT4-fs (sda7): mounted filesystem with ordered data mode. Opts: (null)
>[    2.432765] EXT4-fs (sda8): mounted filesystem with ordered data mode. Opts: (null)
>[    2.434515] EXT4-fs (sda6): mounted filesystem with ordered data mode. Opts: (null)
>[    2.452004] Adding 13311996k swap on /dev/sda9.  Priority:-1 extents:1 across:13311996k SSFS
>[    2.452351] usb 2-3: No LPM exit latency info found, disabling LPM.
>[    2.464398] dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2)
>[    2.467740] EXT4-fs (sda5): mounted filesystem with ordered data mode. Opts: (null)
>[    2.470757] intel_rapl: Found RAPL domain package
>[    2.470761] intel_rapl: Found RAPL domain core
>[    2.470763] intel_rapl: Found RAPL domain uncore
>[    2.470765] intel_rapl: Found RAPL domain dram
>[    2.485291] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.495759] iTCO_vendor_support: vendor-support=0
>[    2.496686] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[    2.496735] iTCO_wdt: Found a Wildcat Point_LP TCO device (Version=2, TCOBASE=0x1860)
>[    2.496801] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[    2.496806] input: Dell WMI hotkeys as /devices/virtual/input/input13
>[    2.497338] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.498428] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.500581] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.500707] input: DLL0665:01 06CB:76AD UNKNOWN as /devices/pci0000:00/INT3433:00/i2c-9/i2c-DLL0665:01/0018:06CB:76AD.0001/input/input14
>[    2.500815] hid-multitouch 0018:06CB:76AD.0001: input,hidraw0: <UNKNOWN> HID v1.00 Mouse [DLL0665:01 06CB:76AD] on 
>[    2.501354] ieee80211 phy0: Selected rate control algorithm 'iwl-mvm-rs'
>[    2.511582] mousedev: PS/2 mouse device common for all mice
>[    2.520537] iwlwifi 0000:02:00.0 wlp2s0: renamed from wlan0
>[    2.527335] Non-volatile memory driver v1.3
>[    2.608653] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.608655] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.608657] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880212be7b40
>[    2.608660] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020f2e6c80 state to ffff880212be7b40
>[    2.608662] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88020f116800 state to ffff880212be7b40
>[    2.608663] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.608665] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020f2e6ca0 state to ffff880212be7b40
>[    2.608667] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020f2e6cc0 state to ffff880212be7b40
>[    2.608668] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff880212be7b40
>[    2.608670] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.608672] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.608674] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.608679] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.608680] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.608682] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.608683] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.608684] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.608685] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.608686] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.608687] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.608688] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.608689] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.608690] [drm:intel_dump_pipe_config] requested mode:
>[    2.608692] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.608693] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.608695] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.608697] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.608698] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.608699] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.608700] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.608701] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.608702] [drm:intel_dump_pipe_config] ips: 1
>[    2.608702] [drm:intel_dump_pipe_config] double wide: 0
>[    2.608704] [drm:drm_atomic_state_clear] Clearing atomic state ffff880212be7b40
>[    2.608705] [drm:drm_atomic_state_free] Freeing atomic state ffff880212be7b40
>[    2.611737] usb 2-5: new high-speed USB device number 4 using xhci_hcd
>[    2.616707] [drm:i915_gem_open] 
>[    2.617522] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.617523] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.617531] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.617979] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.617983] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88020f1ba900 state to ffff880037983d80
>[    2.617986] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b2c00 state to ffff880037983d80
>[    2.617989] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.617993] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618012] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618015] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618018] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618020] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88020f1bacc0 state to ffff880037983d80
>[    2.618022] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618024] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618025] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618027] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618029] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618031] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88020f1bad80 state to ffff880037983d80
>[    2.618032] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618033] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618035] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618037] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618038] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618040] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88020f1baa80 state to ffff880037983d80
>[    2.618042] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618044] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618046] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618047] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618049] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618051] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88020f1ba540 state to ffff880037983d80
>[    2.618052] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618054] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618056] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618057] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618059] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618061] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88020f1ba480 state to ffff880037983d80
>[    2.618062] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618064] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618066] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618067] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618069] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618071] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88020f1ba6c0 state to ffff880037983d80
>[    2.618073] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618075] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618076] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618078] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618080] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618082] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88020f1ba600 state to ffff880037983d80
>[    2.618083] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618085] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618087] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618089] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618090] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618093] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88020f1bac00 state to ffff880037983d80
>[    2.618094] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618096] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618097] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618099] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618102] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.618105] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.618107] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618111] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da5b240 state to ffff880037983d80
>[    2.618114] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b2c00 state to ffff880037983d80
>[    2.618116] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.618119] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da5b220 state to ffff880037983d80
>[    2.618121] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da5b200 state to ffff880037983d80
>[    2.618123] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff880037983d80
>[    2.618126] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.618128] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.618132] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.618137] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.618139] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.618141] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.618144] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.618145] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.618147] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.618149] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.618151] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.618153] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.618155] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.618156] [drm:intel_dump_pipe_config] requested mode:
>[    2.618159] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.618161] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.618164] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.618166] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.618168] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.618169] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.618171] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.618173] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.618174] [drm:intel_dump_pipe_config] ips: 1
>[    2.618176] [drm:intel_dump_pipe_config] double wide: 0
>[    2.618178] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618180] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618182] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.618185] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.618187] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618189] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da5b200 state to ffff880037983d80
>[    2.618191] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b2c00 state to ffff880037983d80
>[    2.618193] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.618195] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da5b220 state to ffff880037983d80
>[    2.618197] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da5b240 state to ffff880037983d80
>[    2.618199] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff880037983d80
>[    2.618201] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.618203] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff8800375b3400 state to ffff880037983d80
>[    2.618205] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618207] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618208] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.618210] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.618212] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618214] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da5b240 state to ffff880037983d80
>[    2.618216] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b3400 state to ffff880037983d80
>[    2.618217] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.618219] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da5b220 state to ffff880037983d80
>[    2.618221] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da5b200 state to ffff880037983d80
>[    2.618223] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff880037983d80
>[    2.618224] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.618226] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff8800375b2c00 state to ffff880037983d80
>[    2.618228] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618229] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.639542] [drm:i915_gem_open] 
>[    2.639979] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.639981] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.640315] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640318] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88020e682240 state to ffff88021371fcc0
>[    2.640320] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640322] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640325] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640340] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640342] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640343] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640345] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88020e6823c0 state to ffff88021371fcc0
>[    2.640346] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640347] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640348] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640349] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640350] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640351] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88020e682480 state to ffff88021371fcc0
>[    2.640352] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640353] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640354] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640355] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640356] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640358] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88020e682e40 state to ffff88021371fcc0
>[    2.640358] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640359] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640361] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640361] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640363] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640364] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88020e682900 state to ffff88021371fcc0
>[    2.640365] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640365] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640367] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640367] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640369] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640370] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88020e682f00 state to ffff88021371fcc0
>[    2.640371] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640372] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640373] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640374] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640375] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640376] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88020e6820c0 state to ffff88021371fcc0
>[    2.640377] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640378] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640379] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640380] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640381] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640382] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88020e682540 state to ffff88021371fcc0
>[    2.640383] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640384] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640385] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640386] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640387] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640388] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88020e682840 state to ffff88021371fcc0
>[    2.640389] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640390] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640391] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640392] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640394] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.640396] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.640397] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640399] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da800a0 state to ffff88021371fcc0
>[    2.640400] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640401] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.640403] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da80080 state to ffff88021371fcc0
>[    2.640404] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da80060 state to ffff88021371fcc0
>[    2.640405] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021371fcc0
>[    2.640407] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.640409] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.640412] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.640416] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.640417] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.640418] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.640420] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.640421] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.640422] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.640423] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.640424] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.640425] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.640426] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.640427] [drm:intel_dump_pipe_config] requested mode:
>[    2.640429] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.640430] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.640431] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.640433] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.640434] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.640434] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.640435] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.640436] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.640437] [drm:intel_dump_pipe_config] ips: 1
>[    2.640438] [drm:intel_dump_pipe_config] double wide: 0
>[    2.640439] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640440] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640442] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.640443] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.640444] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640446] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da80060 state to ffff88021371fcc0
>[    2.640447] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640448] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.640449] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da80080 state to ffff88021371fcc0
>[    2.640450] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da800a0 state to ffff88021371fcc0
>[    2.640451] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff88021371fcc0
>[    2.640452] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.640454] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff8800d7154800 state to ffff88021371fcc0
>[    2.640454] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640455] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640456] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.640458] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.640459] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640460] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da800a0 state to ffff88021371fcc0
>[    2.640461] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7154800 state to ffff88021371fcc0
>[    2.640462] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.640463] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da80080 state to ffff88021371fcc0
>[    2.640464] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da80060 state to ffff88021371fcc0
>[    2.640465] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff88021371fcc0
>[    2.640466] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.640467] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640468] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640469] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.657275] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.657277] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.657279] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fde0
>[    2.657281] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da80180 state to ffff88021371fde0
>[    2.657283] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880212bdbc00 state to ffff88021371fde0
>[    2.657284] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.657285] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da801a0 state to ffff88021371fde0
>[    2.657287] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da801c0 state to ffff88021371fde0
>[    2.657288] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021371fde0
>[    2.657289] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.657290] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.657294] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.657297] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.657297] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.657299] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.657300] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.657301] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.657301] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.657302] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.657303] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.657303] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.657304] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.657304] [drm:intel_dump_pipe_config] requested mode:
>[    2.657306] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.657306] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.657307] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.657308] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.657309] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.657309] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.657310] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.657311] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.657311] [drm:intel_dump_pipe_config] ips: 1
>[    2.657311] [drm:intel_dump_pipe_config] double wide: 0
>[    2.657312] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fde0
>[    2.657313] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fde0
>[    2.661273] [drm:i915_gem_open] 
>[    2.661726] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.661727] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.661736] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.662746] [drm:i915_gem_open] 
>[    2.663157] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.663159] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.663164] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.663167] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.664848] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.664858] [drm:drm_mode_addfb2] [FB:46]
>[    2.665046] [drm:internal_framebuffer_create] could not create framebuffer
>[    2.665050] [drm:internal_framebuffer_create] could not create framebuffer
>[    2.665089] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665091] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665159] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    2.665192] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    2.665323] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    2.665327] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    2.665351] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    2.665353] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    2.696290] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[    2.696409] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.696598] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.722195] [drm:drm_mode_addfb2] [FB:46]
>[    2.756557] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.756759] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.778149] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[    2.856291] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[    3.355383] usbcore: registered new interface driver usbhid
>[    3.355387] usbhid: USB HID core driver
>[    3.394140] cfg80211: Calling CRDA to update world regulatory domain
>[    3.447447] [drm:drm_mode_setcrtc] [CRTC:20]
>[    3.447451] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[    3.447453] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[    3.447455] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[    3.447457] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8802128779c0
>[    3.447459] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020db06600 state to ffff8802128779c0
>[    3.447461] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88020ffd1c00 state to ffff8802128779c0
>[    3.447462] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    3.447463] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020db06620 state to ffff8802128779c0
>[    3.447465] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020db06640 state to ffff8802128779c0
>[    3.447466] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff8802128779c0
>[    3.447468] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.447470] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    3.447472] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    3.447475] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    3.447476] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    3.447478] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    3.447479] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.447480] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.447480] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    3.447482] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.447483] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    3.447484] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.447485] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.447485] [drm:intel_dump_pipe_config] requested mode:
>[    3.447487] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x0 0xa
>[    3.447488] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.447489] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    3.447491] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    3.447492] [drm:intel_dump_pipe_config] port clock: 270000
>[    3.447492] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    3.447493] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.447494] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.447495] [drm:intel_dump_pipe_config] ips: 1
>[    3.447496] [drm:intel_dump_pipe_config] double wide: 0
>[    3.447498] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378499c0
>[    3.459582] [drm:drm_atomic_state_clear] Clearing atomic state ffff8802128779c0
>[    3.459587] [drm:drm_atomic_state_free] Freeing atomic state ffff8802128779c0
>[    3.569295] [drm:i915_gem_open] 
>[    3.569787] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    3.569789] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    3.577466] cfg80211: Calling CRDA to update world regulatory domain
>[    3.630111] cfg80211: Calling CRDA to update world regulatory domain
>[    3.738236] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8900
>[    3.801576] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f1ba240
>[    3.869197] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:14.0/usb2/2-2/2-2:1.0/0003:046D:C52F.0002/input/input16
>[    3.869310] hid-generic 0003:046D:C52F.0002: input,hidraw1: USB HID v1.11 Mouse [Logitech USB Receiver] on usb-0000:00:14.0-2/input0
>[    3.870027] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:14.0/usb2/2-2/2-2:1.1/0003:046D:C52F.0003/input/input17
>[    3.921297] hid-generic 0003:046D:C52F.0003: input,hiddev0,hidraw2: USB HID v1.11 Device [Logitech USB Receiver] on usb-0000:00:14.0-2/input1
>[    4.317765] [drm:intel_display_power_put] disabling display
>[    4.317770] [drm:hsw_set_power_well] Requesting to disable the power well
>[    4.384537] media: Linux media interface: v0.10
>[    4.384588] Bluetooth: Core ver 2.20
>[    4.384607] NET: Registered protocol family 31
>[    4.384609] Bluetooth: HCI device and connection manager initialized
>[    4.384612] Bluetooth: HCI socket layer initialized
>[    4.384615] Bluetooth: L2CAP socket layer initialized
>[    4.384620] Bluetooth: SCO socket layer initialized
>[    4.388305] usbcore: registered new interface driver btusb
>[    4.389890] Linux video capture interface: v2.00
>[    4.397103] uvcvideo: Found UVC 1.00 device Integrated_Webcam_HD (0bda:5682)
>[    4.403968] Bluetooth: hci0: read Intel version: 370810011003110e0f
>[    4.403970] Bluetooth: hci0: Intel device is already patched. patch num: 0f
>[    4.406758] input: Integrated_Webcam_HD as /devices/pci0000:00/0000:00:14.0/usb2/2-5/2-5:1.0/input/input18
>[    4.406841] usbcore: registered new interface driver uvcvideo
>[    4.406843] USB Video Class driver (1.1.1)
>[    4.464083] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    4.464092] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    4.664455] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    4.664461] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    4.664462] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    4.664474] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    4.664477] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    4.664479] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    4.664483] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    6.080129] wlp2s0: authenticate with a4:56:30:5c:e5:d1
>[    6.083702] wlp2s0: send auth to a4:56:30:5c:e5:d1 (try 1/3)
>[    6.154925] wlp2s0: authenticated
>[    6.156456] wlp2s0: associate with a4:56:30:5c:e5:d1 (try 1/3)
>[    6.161597] wlp2s0: RX AssocResp from a4:56:30:5c:e5:d1 (capab=0x431 status=0 aid=2)
>[    6.167067] wlp2s0: associated
>[    6.167095] IPv6: ADDRCONF(NETDEV_CHANGE): wlp2s0: link becomes ready
>[    6.362107] wlp2s0: Limiting TX power to 17 dBm as advertised by a4:56:30:5c:e5:d1
>[   11.547568] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d2757180
>[   13.480845] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24ecb40
>[   13.673831] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802137a0a80
>[   13.815646] [drm:i915_gem_open] 
>[   13.816149] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   13.816151] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   13.850535] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   13.850538] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   13.850540] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   13.851387] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   13.942642] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880213121540
>[   13.986701] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   13.986704] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   13.986706] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   13.992807] [drm:drm_mode_addfb2] [FB:48]
>[   14.033550] [drm:drm_mode_addfb2] [FB:49]
>[   14.762705] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=562/937
>[   14.762709] [drm:intel_panel_actually_set_backlight] set backlight PWM = 577
>[   14.794860] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   14.794864] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[   14.794865] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   14.794871] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[   14.794878] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   14.794880] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[   14.794881] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   14.795040] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   14.795042] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   14.795197] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   14.795199] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   14.795201] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[   15.878541] [drm:i915_gem_open] 
>[   15.879268] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   15.879270] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   15.931297] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   15.931301] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   15.931303] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   15.932251] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   16.113872] [drm:i915_gem_open] 
>[   16.114665] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.114668] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.174212] [drm:intel_display_power_get] enabling display
>[   16.174217] [drm:hsw_set_power_well] Enabling power well
>[   16.178482] [drm:drm_atomic_set_fb_for_plane] Set [FB:50] for plane state ffff880202bea240
>[   16.178831] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880202beac00
>[   16.182759] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.182763] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.182765] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   16.185921] [drm:drm_mode_addfb2] [FB:50]
>[   16.495683] [drm:i915_gem_open] 
>[   16.496110] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.496112] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.544765] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.544768] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.544770] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   16.545712] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   16.756246] [drm:i915_gem_open] 
>[   16.756978] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.756981] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.825510] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.825514] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.825517] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   16.826769] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   17.024815] [drm:i915_gem_open] 
>[   17.025537] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   17.025540] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   17.088004] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   17.088008] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   17.088011] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   17.089052] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   17.270268] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   17.270272] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   17.270275] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   17.320070] [drm:drm_mode_addfb2] [FB:51]
>[   17.359766] [drm:drm_mode_addfb2] [FB:52]
>[   17.418296] [drm:drm_mode_addfb2] [FB:53]
>[   18.033474] fuse init (API version 7.23)
>[   19.562762] [drm:i915_gem_open] 
>[   19.563507] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   19.563510] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   20.914912] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   20.916033] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202ac1000
>[   22.001932] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   22.001939] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[   22.001942] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[   22.001955] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   22.001959] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[   22.001963] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[   22.001967] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   22.140024] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed8c2f00
>[   22.337555] [drm:intel_display_power_put] disabling display
>[   22.337560] [drm:hsw_set_power_well] Requesting to disable the power well
>[   22.604437] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1180
>[   22.608220] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd19c0
>[   22.614894] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1180
>[   22.621871] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966e40
>[   22.628603] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1900
>[   22.635510] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1cc0
>[   22.642188] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.648956] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde3c0
>[   22.655680] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966780
>[   22.662472] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966f00
>[   22.669148] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a36c0
>[   22.675847] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a3000
>[   22.682510] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.689761] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123180
>[   22.696231] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123f00
>[   22.702978] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.709756] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bded80
>[   22.716514] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.723410] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123240
>[   22.730072] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966840
>[   22.736914] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdee40
>[   22.743385] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   22.750358] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdee40
>[   22.757507] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.763912] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdee40
>[   22.770648] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.777603] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.784170] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.790908] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.797668] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.804452] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.811243] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.817961] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.824749] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.831271] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.838313] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966540
>[   22.844970] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966840
>[   22.851801] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966f00
>[   22.858563] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.865591] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.872159] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.878924] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.885469] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.892455] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.899178] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.906029] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.912791] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.919669] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966240
>[   22.926281] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966300
>[   22.932971] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966240
>[   22.940085] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   22.946605] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966240
>[   22.953305] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   22.959904] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c540
>[   22.966876] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c480
>[   22.973595] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde3c0
>[   22.980376] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.986985] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c3c0
>[   22.993844] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a36c0
>[   23.000494] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a3000
>[   23.007463] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c180
>[   23.014179] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c0c0
>[   23.020883] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c9c0
>[   23.027658] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5cc00
>[   23.034436] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c9c0
>[   23.041392] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a36c0
>[   23.047920] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde3c0
>[   23.054702] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c9c0
>[   23.061479] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c3c0
>[   23.068278] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.075008] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a0600
>[   23.081762] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.088502] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a0780
>[   23.095279] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.102037] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.108795] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.115554] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.122245] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.128902] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.135807] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.142555] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.149288] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.156049] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.162819] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.169593] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.176330] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617c00
>[   23.183090] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617480
>[   23.189866] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617c00
>[   23.196615] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617480
>[   23.203339] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617c00
>[   23.230364] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617480
>[   23.237021] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617780
>[   23.243666] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800376170c0
>[   23.257432] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.264179] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d240
>[   23.270934] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c27d7cc0
>[   23.277697] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307df00
>[   23.284477] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044cc0
>[   23.291238] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044c00
>[   23.298017] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044900
>[   23.304772] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c480
>[   23.311510] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c600
>[   23.318261] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c3c0
>[   23.406138] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb0609c0
>[   23.412890] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060780
>[   23.419514] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060480
>[   23.419624] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060780
>[   23.426161] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbf00
>[   23.433139] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbe40
>[   23.439734] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbcc0
>[   23.446493] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbb40
>[   23.447874] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbcc0
>[   23.453414] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbb40
>[   23.460192] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.466901] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db840
>[   23.473554] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.480477] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db540
>[   23.487195] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.493969] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db240
>[   23.514253] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.575047] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db0c0
>[   23.595297] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.601996] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db0c0
>[   24.818844] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bf85b0c0
>[   24.919991] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617cc0
>[   24.940462] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88003771fd80
>[   24.954024] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88003771fb40
>[   24.960789] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   25.035102] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abd6c0
>[   25.048650] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abde40
>[   25.055378] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abd9c0
>[   25.062176] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abde40
>[   25.068873] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213120d80
>[   25.075647] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9f9c0
>[   25.082372] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213120f00
>[   25.089129] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682240
>[   25.095862] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e6826c0
>[   25.102653] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682780
>[   25.109300] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e6826c0
>[   25.116181] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9fcc0
>[   25.116290] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9fe40
>[   25.123011] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060540
>[   25.129690] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848780
>[   25.136391] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848480
>[   25.143023] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800378486c0
>[   25.150006] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848c00
>[   25.156839] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060c00
>[   25.163557] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060000
>[   25.170291] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876300
>[   25.176985] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876180
>[   25.183842] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a0480
>[   25.190583] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c240
>[   25.192244] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1840
>[   25.197369] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1cc0
>[   25.203972] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1840
>[   25.210877] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd19c0
>[   25.217624] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1840
>[   25.224303] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee8763c0
>[   25.231094] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876900
>[   25.237824] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee8763c0
>[   25.244752] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876840
>[   25.420356] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044000
>[   25.427092] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc0440c0
>[   25.433870] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044000
>[   25.440610] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044cc0
>[   25.447341] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044d80
>[   25.453963] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.460872] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848540
>[   25.467633] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.474288] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848540
>[   25.481198] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.487906] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848000
>[   25.494636] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.501420] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213120480
>[   25.508180] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   25.514914] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30900
>[   25.521660] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   25.528466] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   25.530348] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682c00
>[   25.535200] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682780
>[   25.541956] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000b40
>[   25.548669] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000840
>[   25.555435] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000300
>[   25.562237] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000000
>[   25.636602] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f448b0c0
>[   25.710815] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213794cc0
>[   25.940771] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9eb40
>[   26.048804] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9e300
>[   26.055467] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9e540
>[   26.062404] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.069158] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc6c0
>[   26.075961] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.082674] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc6c0
>[   26.089410] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.089825] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc6c0
>[   26.096202] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.102986] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dcb40
>[   26.109764] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802130920c0
>[   26.116518] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213092600
>[   26.123260] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5f00
>[   26.130005] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5d80
>[   26.136760] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5c00
>[   26.143581] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5d80
>[   26.150334] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5840
>[   26.157112] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5180
>[   26.163905] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed8759c0
>[   26.170552] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5540
>[   26.177193] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde0c0
>[   26.184203] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5180
>[   26.190930] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875780
>[   26.197721] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875600
>[   26.204284] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875000
>[   26.211221] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde300
>[   26.217957] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875e40
>[   26.224733] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875480
>[   26.231498] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875000
>[   26.231863] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875480
>[   26.238288] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba480
>[   26.245159] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5180
>[   26.251914] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875300
>[   26.258657] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bad80
>[   26.265318] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba900
>[   26.272006] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bad80
>[   26.278934] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875300
>[   26.285670] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bad80
>[   26.292641] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c27866c0
>[   26.299278] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c2786600
>[   26.306078] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   26.312846] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bded80
>[   26.313191] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   26.319564] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bded80
>[   26.326354] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c2786780
>[   26.326732] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c2786cc0
>[   26.333159] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   26.339940] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdec00
>[   26.346746] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde180
>[   26.353536] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdeb40
>[   26.357679] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde180
>[   26.360356] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdeb40
>[   26.367115] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde840
>[   26.373749] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdeb40
>[   26.380658] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde840
>[   26.387440] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9e240
>[   26.394195] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdecc0
>[   26.401021] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9ed80
>[   26.407731] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba900
>[   26.407970] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bab40
>[   26.414550] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba900
>[   26.462151] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0480
>[   26.468828] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0180
>[   26.475686] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0480
>[   26.482430] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0180
>[   26.489266] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d03c0
>[   26.496081] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0e67300
>[   26.502815] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d06c0
>[   26.509589] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0a80
>[   26.570485] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0e673c0
>[   26.665505] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f303c0
>[   26.672261] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30480
>[   26.679024] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   26.685429] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30480
>[   26.692563] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   26.712869] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123a80
>[   26.719633] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb1239c0
>[   26.821137] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0e67900
>[   26.821512] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb1239c0
>[   26.949586] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c66f00
>[   26.963139] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c666c0
>[   26.976697] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c66000
>[   26.990190] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c666c0
>[   27.543138] wlp2s0: deauthenticating from a4:56:30:5c:e5:d1 by local choice (Reason: 3=DEAUTH_LEAVING)
>[   28.490736] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f268ef00
>[   28.497437] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f268e780
>[   28.504367] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d240
>[   28.504632] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db480
>[   28.511116] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d3c0
>[   28.517858] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db600
>[   28.524588] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db6c0
>[   28.531358] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbc00
>[   28.531456] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db6c0
>[   28.538067] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307dc00
>[   28.544880] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   28.551564] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d180
>[   28.558389] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966f00
>[   28.565195] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee9669c0
>[   28.571809] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f268b840
>[   28.578662] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966540
>[   28.585441] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966480
>[   28.592270] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966000
>[   28.598870] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044300
>[   28.605687] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044d80
>[   28.612440] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044c00
>[   28.619190] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044d80
>[   28.625884] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966cc0
>[   30.413873] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbf5a80
>[   30.534703] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880212eed180
>[   32.099145] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cbbd1d80
>
>
>
>
>dmesg AFTER loosing projector output:
>=====================================
>
>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 4.1.6-1-ARCH (builduser@tobias) (gcc version 5.2.0 (GCC) ) #1 SMP PREEMPT Mon Aug 17 08:52:28 CEST 2015
>[    0.000000] Command line: BOOT_IMAGE=/vmlinuz-linux root=UUID=061f9214-dd9e-4aa5-89d6-95be27ddc857 rw quiet pcie_aspm=force drm.debug=0x1e log_buf_len=1M
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000c8d02fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000c8d03000-0x00000000c91b9fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000c91ba000-0x00000000dadbcfff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dadbd000-0x00000000dae7ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dae80000-0x00000000daeacfff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000daead000-0x00000000db7f8fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000db7f9000-0x00000000dba93fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dba94000-0x00000000dbafdfff] type 20
>[    0.000000] BIOS-e820: [mem 0x00000000dbafe000-0x00000000dbafefff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dd000000-0x00000000df7fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000021e7fffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.31 by American Megatrends
>[    0.000000] efi:  ACPI=0xdae8c000  ACPI 2.0=0xdae8c000  SMBIOS=0xf0000 
>[    0.000000] SMBIOS 2.8 present.
>[    0.000000] DMI: Dell Inc. XPS 13 9343/0TRX4F, BIOS A05 07/14/2015
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] e820: last_pfn = 0x21e800 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: uncachable
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-DFFFF uncachable
>[    0.000000]   E0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 0000000000 mask 7E00000000 write-back
>[    0.000000]   1 base 0200000000 mask 7FF0000000 write-back
>[    0.000000]   2 base 0210000000 mask 7FF8000000 write-back
>[    0.000000]   3 base 0218000000 mask 7FFC000000 write-back
>[    0.000000]   4 base 021C000000 mask 7FFE000000 write-back
>[    0.000000]   5 base 021E000000 mask 7FFF800000 write-back
>[    0.000000]   6 base 00E0000000 mask 7FE0000000 uncachable
>[    0.000000]   7 base 00DE000000 mask 7FFE000000 uncachable
>[    0.000000]   8 base 00DD000000 mask 7FFF000000 uncachable
>[    0.000000]   9 disabled
>[    0.000000] PAT configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- UC  
>[    0.000000] e820: update [mem 0xdd000000-0xffffffff] usable ==> reserved
>[    0.000000] e820: last_pfn = 0xdbaff max_arch_pfn = 0x400000000
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x01b2f000, 0x01b2ffff] PGTABLE
>[    0.000000] BRK [0x01b30000, 0x01b30fff] PGTABLE
>[    0.000000] BRK [0x01b31000, 0x01b31fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x21e600000-0x21e7fffff]
>[    0.000000]  [mem 0x21e600000-0x21e7fffff] page 2M
>[    0.000000] BRK [0x01b32000, 0x01b32fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x200000000-0x21e5fffff]
>[    0.000000]  [mem 0x200000000-0x21e5fffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x1e0000000-0x1ffffffff]
>[    0.000000]  [mem 0x1e0000000-0x1ffffffff] page 1G
>[    0.000000] init_memory_mapping: [mem 0x00100000-0xc8d02fff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x3fffffff] page 2M
>[    0.000000]  [mem 0x40000000-0xbfffffff] page 1G
>[    0.000000]  [mem 0xc0000000-0xc8bfffff] page 2M
>[    0.000000]  [mem 0xc8c00000-0xc8d02fff] page 4k
>[    0.000000] init_memory_mapping: [mem 0xc91ba000-0xdadbcfff]
>[    0.000000]  [mem 0xc91ba000-0xc91fffff] page 4k
>[    0.000000]  [mem 0xc9200000-0xdabfffff] page 2M
>[    0.000000]  [mem 0xdac00000-0xdadbcfff] page 4k
>[    0.000000] BRK [0x01b33000, 0x01b33fff] PGTABLE
>[    0.000000] BRK [0x01b34000, 0x01b34fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xdbafe000-0xdbafefff]
>[    0.000000]  [mem 0xdbafe000-0xdbafefff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x1dfffffff]
>[    0.000000]  [mem 0x100000000-0x1dfffffff] page 1G
>[    0.000000] log_buf_len: 1048576 bytes
>[    0.000000] early log buf free: 518696(98%)
>[    0.000000] RAMDISK: [mem 0x37612000-0x37b00fff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000DAE8C000 000024 (v02 DELL  )
>[    0.000000] ACPI: XSDT 0x00000000DAE8C0B8 0000F4 (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FACP 0x00000000DAE9F778 00010C (v05 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: DSDT 0x00000000DAE8C240 013538 (v02 DELL   CBX3     01072009 INTL 20120913)
>[    0.000000] ACPI: FACS 0x00000000DB7F6F80 000040
>[    0.000000] ACPI: APIC 0x00000000DAE9F888 000084 (v03 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FPDT 0x00000000DAE9F910 000044 (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FIDT 0x00000000DAE9F958 00009C (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: MCFG 0x00000000DAE9F9F8 00003C (v01 DELL   CBX3     01072009 MSFT 00000097)
>[    0.000000] ACPI: HPET 0x00000000DAE9FA38 000038 (v01 DELL   CBX3     01072009 AMI. 00000005)
>[    0.000000] ACPI: SSDT 0x00000000DAE9FA70 000455 (v01 SataRe SataTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: UEFI 0x00000000DAE9FEC8 000042 (v01                 00000000      00000000)
>[    0.000000] ACPI: SSDT 0x00000000DAE9FF10 0004AE (v02 Intel_ Tpm2Tabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA03C0 00004B (v02 MeSsdt MeSsdt   00003000 INTL 20120913)
>[    0.000000] ACPI: TPM2 0x00000000DAEA0410 000034 (v03                 00000000      00000000)
>[    0.000000] ACPI: SSDT 0x00000000DAEA0448 000CDB (v02 Ther_R Ther_Rvp 00001000 INTL 20120913)
>[    0.000000] ACPI: ASF! 0x00000000DAEA1128 0000A0 (v32 INTEL   HCG     00000001 TFSM 000F4240)
>[    0.000000] ACPI: SSDT 0x00000000DAEA11C8 00051F (v02 PmRef  Cpu0Ist  00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA16E8 000B74 (v02 CpuRef CpuSsdt  00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA2260 0001C7 (v02 PmRef  LakeTiny 00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA2428 0003A5 (v02 CppcTa CppcTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: PCCT 0x00000000DAEA27D0 00006E (v05 PcctTa PcctTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA2840 000AC4 (v02 Cpc_Ta Cpc_Tabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA3308 004207 (v02 SaSsdt SaSsdt   00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEA7510 004646 (v01 DptfTa DptfTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SLIC 0x00000000DAEABB58 000176 (v03 DELL   CBX3     01072009 MSFT 00010013)
>[    0.000000] ACPI: MSDM 0x00000000DAEABCD0 000055 (v03 DELL   CBX3     06222004 AMI  00010013)
>[    0.000000] ACPI: DMAR 0x00000000DAEABD28 0000D4 (v01 INTEL  BDW      00000001 INTL 00000001)
>[    0.000000] ACPI: CSRT 0x00000000DAEABE00 0000C4 (v01 INTL   BDW-ULT  00000001 INTL 20100528)
>[    0.000000] ACPI: BGRT 0x00000000DAEABEC8 000038 (v00                 01072009 AMI  00010013)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000021e7fffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x21e6f9000-0x21e6fcfff]
>[    0.000000]  [ffffea0000000000-ffffea00087fffff] PMD -> [ffff880215e00000-ffff88021ddfffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[    0.000000]   Normal   [mem 0x0000000100000000-0x000000021e7fffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>[    0.000000]   node   0: [mem 0x0000000000059000-0x000000000009dfff]
>[    0.000000]   node   0: [mem 0x0000000000100000-0x00000000c8d02fff]
>[    0.000000]   node   0: [mem 0x00000000c91ba000-0x00000000dadbcfff]
>[    0.000000]   node   0: [mem 0x00000000dbafe000-0x00000000dbafefff]
>[    0.000000]   node   0: [mem 0x0000000100000000-0x000000021e7fffff]
>[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000021e7fffff]
>[    0.000000] On node 0 totalpages: 2068643
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 22 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 13925 pages used for memmap
>[    0.000000]   DMA32 zone: 891143 pages, LIFO batch:31
>[    0.000000]   Normal zone: 18336 pages used for memmap
>[    0.000000]   Normal zone: 1173504 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xdd800000-0xdf7fffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] high dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-39
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00058fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xc8d03000-0xc91b9fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdadbd000-0xdae7ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdae80000-0xdaeacfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdaead000-0xdb7f8fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdb7f9000-0xdba93fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdba94000-0xdbafdfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdbaff000-0xdcffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdd000000-0xdf7fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdf800000-0xf7ffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed00000-0xfed03fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[    0.000000] e820: [mem 0xdf800000-0xf7ffffff] available for PCI devices
>[    0.000000] Booting paravirtualized kernel on bare hardware
>[    0.000000] clocksource refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370452778343963 ns
>[    0.000000] setup_percpu: NR_CPUS:128 nr_cpumask_bits:128 nr_cpu_ids:4 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 33 pages/cpu @ffff88021e400000 s95576 r8192 d31400 u524288
>[    0.000000] pcpu-alloc: s95576 r8192 d31400 u524288 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 2036296
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-linux root=UUID=061f9214-dd9e-4aa5-89d6-95be27ddc857 rw quiet pcie_aspm=force drm.debug=0x1e log_buf_len=1M
>[    0.000000] PCIe ASPM is forcibly enabled
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] xsave: enabled xstate_bv 0x7, cntxt size 0x340 using standard form
>[    0.000000] AGP: Checking aperture...
>[    0.000000] AGP: No AGP bridge found
>[    0.000000] Calgary: detecting Calgary via BIOS EBDA area
>[    0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[    0.000000] Memory: 7966056K/8274572K available (5699K kernel code, 893K rwdata, 1732K rodata, 1180K init, 1152K bss, 308516K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>[    0.000000] Preemptible hierarchical RCU implementation.
>[    0.000000] 	RCU dyntick-idle grace-period acceleration is enabled.
>[    0.000000] 	RCU restricting CPUs from NR_CPUS=128 to nr_cpu_ids=4.
>[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
>[    0.000000] NR_IRQS:8448 nr_irqs:728 16
>[    0.000000] Console: colour dummy device 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] clocksource hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484882848 ns
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] spurious 8259A interrupt: IRQ7.
>[    0.000000] tsc: Detected 2294.771 MHz processor
>[    0.000025] Calibrating delay loop (skipped), value calculated using timer frequency.. 4591.77 BogoMIPS (lpj=7649236)
>[    0.000027] pid_max: default: 32768 minimum: 301
>[    0.000031] ACPI: Core revision 20150410
>[    0.021527] ACPI: All ACPI Tables successfully acquired
>[    0.022189] Security Framework initialized
>[    0.022193] Yama: becoming mindful.
>[    0.022615] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.023990] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[    0.024584] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.024592] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.024760] Initializing cgroup subsys blkio
>[    0.024762] Initializing cgroup subsys memory
>[    0.024767] Initializing cgroup subsys devices
>[    0.024769] Initializing cgroup subsys freezer
>[    0.024771] Initializing cgroup subsys net_cls
>[    0.024790] CPU: Physical Processor ID: 0
>[    0.024791] CPU: Processor Core ID: 0
>[    0.024795] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.024796] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.025749] mce: CPU supports 7 MCE banks
>[    0.025760] CPU0: Thermal monitoring enabled (TM1)
>[    0.025767] process: using mwait in idle threads
>[    0.025769] Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8
>[    0.025770] Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4
>[    0.026066] Freeing SMP alternatives memory: 20K (ffffffff81a08000 - ffffffff81a0d000)
>[    0.031194] ftrace: allocating 21563 entries in 85 pages
>[    0.039544] dmar: Host address width 39
>[    0.039546] dmar: DRHD base: 0x000000fed90000 flags: 0x0
>[    0.039554] dmar: IOMMU 0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap 7e1ff0505e
>[    0.039556] dmar: DRHD base: 0x000000fed91000 flags: 0x1
>[    0.039560] dmar: IOMMU 1: reg_base_addr fed91000 ver 1:0 cap d2008c20660462 ecap f010da
>[    0.039561] dmar: RMRR base: 0x000000db9e5000 end: 0x000000db9f3fff
>[    0.039562] dmar: RMRR base: 0x000000dd000000 end: 0x000000df7fffff
>[    0.039563] dmar: ANDD device: 1 name: \_SB.PCI0.SDMA
>[    0.039565] IOAPIC id 2 under DRHD base  0xfed91000 IOMMU 1
>[    0.039566] HPET id 0 under DRHD base 0xfed91000
>[    0.039858] x2apic is disabled because BIOS sets x2apic opt out bit. You can use 'intremap=no_x2apic_optout' to override the BIOS setting.
>[    0.039868] Enabled IRQ remapping in xapic mode
>[    0.039869] x2apic: IRQ remapping doesn't support X2APIC mode
>[    0.040483] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.073472] TSC deadline timer enabled
>[    0.073474] smpboot: CPU0: Intel(R) Core(TM) i5-5300U CPU @ 2.30GHz (fam: 06, model: 3d, stepping: 04)
>[    0.073495] Performance Events: PEBS fmt2+, 16-deep LBR, Broadwell events, full-width counters, Intel PMU driver.
>[    0.073512] ... version:                3
>[    0.073512] ... bit width:              48
>[    0.073513] ... generic registers:      4
>[    0.073514] ... value mask:             0000ffffffffffff
>[    0.073515] ... max period:             0000ffffffffffff
>[    0.073515] ... fixed-purpose events:   3
>[    0.073516] ... event mask:             000000070000000f
>[    0.093591] x86: Booting SMP configuration:
>[    0.093592] .... node  #0, CPUs:      #1
>[    0.107755] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>[    0.114436]  #2 #3
>[    0.149411] x86: Booted up 1 node, 4 CPUs
>[    0.149414] smpboot: Total of 4 processors activated (18365.09 BogoMIPS)
>[    0.152729] devtmpfs: initialized
>[    0.154446] PM: Registering ACPI NVS region [mem 0xdaead000-0xdb7f8fff] (9748480 bytes)
>[    0.154594] clocksource jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 6370867519511994 ns
>[    0.154661] pinctrl core: initialized pinctrl subsystem
>[    0.154693] RTC time:  6:32:31, date: 09/11/15
>[    0.154790] NET: Registered protocol family 16
>[    0.166062] cpuidle: using governor ladder
>[    0.186057] cpuidle: using governor menu
>[    0.186085] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
>[    0.186087] ACPI: bus type PCI registered
>[    0.186088] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.186144] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.186146] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
>[    0.186220] PCI: Using configuration type 1 for base access
>[    0.186226] dmi type 0xB1 record - unknown flag
>[    0.199649] ACPI: Added _OSI(Module Device)
>[    0.199651] ACPI: Added _OSI(Processor Device)
>[    0.199652] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.199653] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.204784] ACPI: Executed 16 blocks of module-level executable AML code
>[    0.212068] ACPI: Dynamic OEM Table Load:
>[    0.212074] ACPI: SSDT 0xFFFF880214040800 0003D3 (v02 PmRef  Cpu0Cst  00003001 INTL 20120913)
>[    0.212898] ACPI: Dynamic OEM Table Load:
>[    0.212903] ACPI: SSDT 0xFFFF88021478B000 0005AA (v02 PmRef  ApIst    00003000 INTL 20120913)
>[    0.213762] ACPI: Dynamic OEM Table Load:
>[    0.213766] ACPI: SSDT 0xFFFF880214001600 000119 (v02 PmRef  ApCst    00003000 INTL 20120913)
>[    0.215188] ACPI : EC: EC started
>[    0.217815] ACPI: Interpreter enabled
>[    0.217825] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20150410/hwxface-580)
>[    0.217833] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20150410/hwxface-580)
>[    0.217848] ACPI: (supports S0 S3 S4 S5)
>[    0.217850] ACPI: Using IOAPIC for interrupt routing
>[    0.217884] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.219399] ACPI: Power Resource [PG00] (on)
>[    0.219722] ACPI: Power Resource [PG01] (on)
>[    0.220018] ACPI: Power Resource [PG02] (on)
>[    0.231449] ACPI: Power Resource [FN00] (off)
>[    0.231507] ACPI: Power Resource [FN01] (off)
>[    0.231562] ACPI: Power Resource [FN02] (off)
>[    0.231617] ACPI: Power Resource [FN03] (off)
>[    0.231670] ACPI: Power Resource [FN04] (off)
>[    0.232396] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])
>[    0.232401] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.232840] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
>[    0.232842] acpi PNP0A08:00: FADT indicates ASPM is unsupported, using BIOS configuration
>[    0.233148] PCI host bridge to bus 0000:00
>[    0.233151] pci_bus 0000:00: root bus resource [bus 00-3e]
>[    0.233152] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[    0.233154] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    0.233155] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    0.233157] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window]
>[    0.233158] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window]
>[    0.233159] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window]
>[    0.233160] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window]
>[    0.233161] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window]
>[    0.233163] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window]
>[    0.233164] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window]
>[    0.233165] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window]
>[    0.233166] pci_bus 0000:00: root bus resource [mem 0xdf800000-0xfeafffff window]
>[    0.233172] pci 0000:00:00.0: [8086:1604] type 00 class 0x060000
>[    0.233246] pci 0000:00:02.0: [8086:1616] type 00 class 0x030000
>[    0.233255] pci 0000:00:02.0: reg 0x10: [mem 0xf6000000-0xf6ffffff 64bit]
>[    0.233260] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref]
>[    0.233264] pci 0000:00:02.0: reg 0x20: [io  0xf000-0xf03f]
>[    0.233342] pci 0000:00:03.0: [8086:160c] type 00 class 0x040300
>[    0.233349] pci 0000:00:03.0: reg 0x10: [mem 0xf721c000-0xf721ffff 64bit]
>[    0.233420] pci 0000:00:04.0: [8086:1603] type 00 class 0x118000
>[    0.233428] pci 0000:00:04.0: reg 0x10: [mem 0xf7210000-0xf7217fff 64bit]
>[    0.233515] pci 0000:00:14.0: [8086:9cb1] type 00 class 0x0c0330
>[    0.233529] pci 0000:00:14.0: reg 0x10: [mem 0xf7200000-0xf720ffff 64bit]
>[    0.233577] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.233618] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.233647] pci 0000:00:16.0: [8086:9cba] type 00 class 0x078000
>[    0.233664] pci 0000:00:16.0: reg 0x10: [mem 0xf7226000-0xf722601f 64bit]
>[    0.233720] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.233797] pci 0000:00:1b.0: [8086:9ca0] type 00 class 0x040300
>[    0.233809] pci 0000:00:1b.0: reg 0x10: [mem 0xf7218000-0xf721bfff 64bit]
>[    0.233849] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold
>[    0.233896] pci 0000:00:1b.0: System wakeup disabled by ACPI
>[    0.233923] pci 0000:00:1c.0: [8086:9c90] type 01 class 0x060400
>[    0.233974] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.234037] pci 0000:00:1c.0: System wakeup disabled by ACPI
>[    0.234068] pci 0000:00:1c.3: [8086:9c96] type 01 class 0x060400
>[    0.234118] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
>[    0.234178] pci 0000:00:1c.3: System wakeup disabled by ACPI
>[    0.234210] pci 0000:00:1d.0: [8086:9ca6] type 00 class 0x0c0320
>[    0.234225] pci 0000:00:1d.0: reg 0x10: [mem 0xf7223000-0xf72233ff]
>[    0.234295] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold
>[    0.234338] pci 0000:00:1d.0: System wakeup disabled by ACPI
>[    0.234368] pci 0000:00:1f.0: [8086:9cc3] type 00 class 0x060100
>[    0.234518] pci 0000:00:1f.2: [8086:9c83] type 00 class 0x010601
>[    0.234529] pci 0000:00:1f.2: reg 0x10: [io  0xf0b0-0xf0b7]
>[    0.234534] pci 0000:00:1f.2: reg 0x14: [io  0xf0a0-0xf0a3]
>[    0.234541] pci 0000:00:1f.2: reg 0x18: [io  0xf090-0xf097]
>[    0.234547] pci 0000:00:1f.2: reg 0x1c: [io  0xf080-0xf083]
>[    0.234552] pci 0000:00:1f.2: reg 0x20: [io  0xf060-0xf07f]
>[    0.234558] pci 0000:00:1f.2: reg 0x24: [mem 0xf7222000-0xf72227ff]
>[    0.234583] pci 0000:00:1f.2: PME# supported from D3hot
>[    0.234641] pci 0000:00:1f.3: [8086:9ca2] type 00 class 0x0c0500
>[    0.234653] pci 0000:00:1f.3: reg 0x10: [mem 0xf7221000-0xf72210ff 64bit]
>[    0.234669] pci 0000:00:1f.3: reg 0x20: [io  0xf040-0xf05f]
>[    0.234745] pci 0000:00:1f.6: [8086:9ca4] type 00 class 0x118000
>[    0.234768] pci 0000:00:1f.6: reg 0x10: [mem 0xf7220000-0xf7220fff 64bit]
>[    0.234964] pci 0000:01:00.0: [10ec:5249] type 00 class 0xff0000
>[    0.234984] pci 0000:01:00.0: reg 0x10: [mem 0xf7100000-0xf7100fff]
>[    0.235094] pci 0000:01:00.0: supports D1 D2
>[    0.235095] pci 0000:01:00.0: PME# supported from D1 D2 D3hot D3cold
>[    0.235122] pci 0000:01:00.0: System wakeup disabled by ACPI
>[    0.242792] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.242796] pci 0000:00:1c.0:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.242896] pci 0000:02:00.0: [8086:095a] type 00 class 0x028000
>[    0.242940] pci 0000:02:00.0: reg 0x10: [mem 0xf7000000-0xf7001fff 64bit]
>[    0.243104] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
>[    0.243145] pci 0000:02:00.0: System wakeup disabled by ACPI
>[    0.252807] pci 0000:00:1c.3: PCI bridge to [bus 02]
>[    0.252811] pci 0000:00:1c.3:   bridge window [mem 0xf7000000-0xf70fffff]
>[    0.254798] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254836] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254871] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254905] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254940] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.254975] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.255011] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.255048] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.256085] ACPI: Enabled 3 GPEs in block 00 to 7F
>[    0.256132] ACPI : EC: GPE = 0x27, I/O: command/status = 0x934, data = 0x930
>[    0.256217] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.256219] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.256221] vgaarb: loaded
>[    0.256222] vgaarb: bridge control possible 0000:00:02.0
>[    0.256317] PCI: Using ACPI for IRQ routing
>[    0.257471] PCI: pci_cache_line_size set to 64 bytes
>[    0.257539] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    0.257540] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>[    0.257541] e820: reserve RAM buffer [mem 0xc8d03000-0xcbffffff]
>[    0.257542] e820: reserve RAM buffer [mem 0xdadbd000-0xdbffffff]
>[    0.257543] e820: reserve RAM buffer [mem 0xdbaff000-0xdbffffff]
>[    0.257544] e820: reserve RAM buffer [mem 0x21e800000-0x21fffffff]
>[    0.257629] NetLabel: Initializing
>[    0.257630] NetLabel:  domain hash size = 128
>[    0.257630] NetLabel:  protocols = UNLABELED CIPSOv4
>[    0.257640] NetLabel:  unlabeled traffic allowed by default
>[    0.257659] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.257663] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.259684] Switched to clocksource hpet
>[    0.263910] pnp: PnP ACPI init
>[    0.264076] system 00:00: [io  0x0680-0x069f] has been reserved
>[    0.264078] system 00:00: [io  0xffff] has been reserved
>[    0.264079] system 00:00: [io  0xffff] has been reserved
>[    0.264081] system 00:00: [io  0xffff] has been reserved
>[    0.264082] system 00:00: [io  0x1800-0x18fe] could not be reserved
>[    0.264083] system 00:00: [io  0x164e-0x164f] has been reserved
>[    0.264086] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.264128] pnp 00:01: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.264155] system 00:02: [io  0x1854-0x1857] has been reserved
>[    0.264157] system 00:02: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[    0.264265] pnp 00:03: Plug and Play ACPI device, IDs PNP0303 (active)
>[    0.264283] pnp 00:04: Plug and Play ACPI device, IDs DLL0665 PNP0f13 (active)
>[    0.264397] system 00:05: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    0.264398] system 00:05: [mem 0xfed10000-0xfed17fff] has been reserved
>[    0.264400] system 00:05: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.264401] system 00:05: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.264403] system 00:05: [mem 0xf8000000-0xfbffffff] has been reserved
>[    0.264404] system 00:05: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    0.264405] system 00:05: [mem 0xfed90000-0xfed93fff] could not be reserved
>[    0.264407] system 00:05: [mem 0xfed45000-0xfed8ffff] has been reserved
>[    0.264408] system 00:05: [mem 0xff000000-0xffffffff] has been reserved
>[    0.264409] system 00:05: [mem 0xfee00000-0xfeefffff] could not be reserved
>[    0.264411] system 00:05: [mem 0xf7fe0000-0xf7feffff] has been reserved
>[    0.264412] system 00:05: [mem 0xf7ff0000-0xf7ffffff] has been reserved
>[    0.264414] system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.264774] system 00:06: [mem 0xfe102000-0xfe102fff] has been reserved
>[    0.264776] system 00:06: [mem 0xfe104000-0xfe104fff] has been reserved
>[    0.264777] system 00:06: [mem 0xfe106000-0xfe106fff] has been reserved
>[    0.264779] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.272945] pnp: PnP ACPI: found 7 devices
>[    0.279186] clocksource acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>[    0.279205] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.279210] pci 0000:00:1c.0:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.279216] pci 0000:00:1c.3: PCI bridge to [bus 02]
>[    0.279219] pci 0000:00:1c.3:   bridge window [mem 0xf7000000-0xf70fffff]
>[    0.279226] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[    0.279227] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[    0.279228] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.279230] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window]
>[    0.279231] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window]
>[    0.279232] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window]
>[    0.279233] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window]
>[    0.279234] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window]
>[    0.279235] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window]
>[    0.279237] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window]
>[    0.279238] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window]
>[    0.279239] pci_bus 0000:00: resource 15 [mem 0xdf800000-0xfeafffff window]
>[    0.279240] pci_bus 0000:01: resource 1 [mem 0xf7100000-0xf71fffff]
>[    0.279242] pci_bus 0000:02: resource 1 [mem 0xf7000000-0xf70fffff]
>[    0.279269] NET: Registered protocol family 2
>[    0.279410] TCP established hash table entries: 65536 (order: 7, 524288 bytes)
>[    0.279522] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    0.279622] TCP: Hash tables configured (established 65536 bind 65536)
>[    0.279648] UDP hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.279668] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.279717] NET: Registered protocol family 1
>[    0.279729] pci 0000:00:02.0: Video device with shadowed ROM
>[    0.296457] PCI: CLS 64 bytes, default 64
>[    0.296501] Unpacking initramfs...
>[    0.358453] Freeing initrd memory: 5052K (ffff880037612000 - ffff880037b01000)
>[    0.358467] dmar: ACPI device "INTL9C60:00" under DMAR at fed91000 as 00:15.0
>[    0.358477] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    0.358479] software IO TLB [mem 0xd289a000-0xd689a000] (64MB) mapped at [ffff8800d289a000-ffff8800d6899fff]
>[    0.358520] RAPL PMU detected, API unit is 2^-32 Joules, 4 fixed counters 655360 ms ovfl timer
>[    0.358521] hw unit of domain pp0-core 2^-14 Joules
>[    0.358521] hw unit of domain package 2^-14 Joules
>[    0.358522] hw unit of domain dram 2^-14 Joules
>[    0.358523] hw unit of domain pp1-gpu 2^-14 Joules
>[    0.358589] microcode: CPU0 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358596] microcode: CPU1 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358600] microcode: CPU2 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358605] microcode: CPU3 sig=0x306d4, pf=0x40, revision=0x1f
>[    0.358642] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    0.358665] Scanning for low memory corruption every 60 seconds
>[    0.358852] futex hash table entries: 1024 (order: 4, 65536 bytes)
>[    0.358863] Initialise system trusted keyring
>[    0.359118] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    0.360202] zpool: loaded
>[    0.360204] zbud: loaded
>[    0.360337] VFS: Disk quotas dquot_6.6.0
>[    0.360365] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    0.360475] Key type big_key registered
>[    0.360642] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
>[    0.360675] io scheduler noop registered
>[    0.360677] io scheduler deadline registered
>[    0.360708] io scheduler cfq registered (default)
>[    0.361055] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
>[    0.361057] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
>[    0.361060] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
>[    0.361070] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt
>[    0.361071] pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
>[    0.361074] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded
>[    0.361079] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    0.361091] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>[    0.361110] efifb: probing for efifb
>[    0.361129] efifb: framebuffer at 0xe0000000, mapped to 0xffffc90001000000, using 8128k, total 8128k
>[    0.361130] efifb: mode is 1920x1080x32, linelength=7680, pages=1
>[    0.361131] efifb: scrolling: redraw
>[    0.361132] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
>[    0.364990] Console: switching to colour frame buffer device 240x67
>[    0.368646] fb0: EFI VGA frame buffer device
>[    0.368654] intel_idle: MWAIT substates: 0x11142120
>[    0.368655] intel_idle: v0.4 model 0x3D
>[    0.368656] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    0.368850] GHES: HEST is not enabled!
>[    0.368895] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>[    0.369229] Linux agpgart interface v0.103
>[    0.369456] rtc_cmos 00:01: RTC can wake from S4
>[    0.369568] rtc_cmos 00:01: rtc core: registered rtc_cmos as rtc0
>[    0.369592] rtc_cmos 00:01: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    0.369602] Intel P-state driver initializing.
>[    0.369737] ledtrig-cpu: registered to indicate activity on CPUs
>[    0.370483] NET: Registered protocol family 10
>[    0.370936] NET: Registered protocol family 17
>[    0.371644] Loading compiled-in X.509 certificates
>[    0.371678] registered taskstats version 1
>[    0.372565]   Magic number: 15:954:518
>[    0.372641] acpi LNXPOWER:02: hash matches
>[    0.372719] rtc_cmos 00:01: setting system clock to 2015-09-11 06:32:32 UTC (1441953152)
>[    0.372979] PM: Hibernation image not present or could not be loaded.
>[    0.373657] Freeing unused kernel memory: 1180K (ffffffff818e1000 - ffffffff81a08000)
>[    0.373660] Write protecting the kernel read-only data: 8192k
>[    0.374228] Freeing unused kernel memory: 432K (ffff880001594000 - ffff880001600000)
>[    0.374441] Freeing unused kernel memory: 316K (ffff8800017b1000 - ffff880001800000)
>[    0.383141] random: systemd-tmpfile urandom read with 5 bits of entropy available
>[    0.386200] [drm] Initialized drm 1.1.0 20060810
>[    0.387417] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input0
>[    0.388933] ACPI: Lid Switch [LID0]
>[    0.388987] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1
>[    0.388990] ACPI: Power Button [PBTN]
>[    0.389022] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input2
>[    0.389024] ACPI: Sleep Button [SBTN]
>[    0.389060] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input3
>[    0.389061] ACPI: Power Button [PWRF]
>[    0.393094] [drm:i915_dump_device_info] i915 device info: gen=8, pciid=0x1616 rev=0x09 flags=is_mobile,need_gfx_hws,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,
>[    0.393109] [drm:intel_detect_pch] Found LynxPoint LP PCH
>[    0.393180] [drm] Memory usable by graphics device = 4096M
>[    0.393182] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    0.393183] [drm:i915_gem_gtt_init] GTT stolen size = 32M
>[    0.393184] [drm:i915_gem_gtt_init] ppgtt mode: 2
>[    0.393185] checking generic (e0000000 7f0000) vs hw (e0000000 10000000)
>[    0.393186] fb: switching to inteldrmfb from EFI VGA
>[    0.393200] Console: switching to colour dummy device 80x25
>[    0.393266] [drm] Replacing VGA console driver
>[    0.393696] [drm:intel_opregion_setup] graphic opregion physical addr: 0xdb7ec018
>[    0.393704] [drm:intel_opregion_setup] Public ACPI methods supported
>[    0.393705] [drm:intel_opregion_setup] SWSCI supported
>[    0.393707] [drm] ACPI BIOS requests an excessive sleep of 25000 ms, using 1500 ms instead
>[    0.399819] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00700483
>[    0.399822] [drm:intel_opregion_setup] ASLE supported
>[    0.399879] [drm:intel_device_info_runtime_init] slice total: 0
>[    0.399880] [drm:intel_device_info_runtime_init] subslice total: 0
>[    0.399881] [drm:intel_device_info_runtime_init] subslice per slice: 0
>[    0.399882] [drm:intel_device_info_runtime_init] EU total: 0
>[    0.399883] [drm:intel_device_info_runtime_init] EU per subslice: 0
>[    0.399884] [drm:intel_device_info_runtime_init] has slice power gating: n
>[    0.399885] [drm:intel_device_info_runtime_init] has subslice power gating: n
>[    0.399886] [drm:intel_device_info_runtime_init] has EU power gating: n
>[    0.399887] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    0.399888] [drm] Driver supports precise vblank timestamp query.
>[    0.399890] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    0.399892] [drm:validate_vbt] Using VBT from OpRegion: $VBT HASWELL        d
>[    0.399894] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    0.399895] [drm:parse_general_definitions] crt_ddc_bus_pin: 0
>[    0.399897] [drm:parse_lfp_panel_data] DRRS supported mode is seamless
>[    0.399899] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    0.399901] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 69300 1366 1398 1430 1470 768 771 776 786 0x8 0xa
>[    0.399903] [drm:parse_lfp_panel_data] VBT initial LVDS value 300
>[    0.399904] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 10, level 255
>[    0.399906] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[    0.399908] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[    0.399909] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    0.399910] [drm:parse_driver_features] DRRS State Enabled:0
>[    0.399912] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    0.399913] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[    0.399914] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    0.399916] [drm:parse_ddi_port] VBT HDMI level shift for port B: 6
>[    0.399938] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    0.399944] [drm:i915_gem_init_stolen] found 33554432 bytes of stolen memory at dd800000
>[    0.399946] [drm:intel_display_power_get] enabling always-on
>[    0.399947] [drm:intel_display_power_get] enabling display
>[    0.400004] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec)
>[    0.400005] [drm:intel_print_wm_latency] Primary WM1 latency 50 (25.0 usec)
>[    0.400006] [drm:intel_print_wm_latency] Primary WM2 latency 90 (45.0 usec)
>[    0.400008] [drm:intel_print_wm_latency] Primary WM3 latency 130 (65.0 usec)
>[    0.400009] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec)
>[    0.400010] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec)
>[    0.400011] [drm:intel_print_wm_latency] Sprite WM1 latency 50 (25.0 usec)
>[    0.400012] [drm:intel_print_wm_latency] Sprite WM2 latency 90 (45.0 usec)
>[    0.400013] [drm:intel_print_wm_latency] Sprite WM3 latency 130 (65.0 usec)
>[    0.400014] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec)
>[    0.400015] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec)
>[    0.400017] [drm:intel_print_wm_latency] Cursor WM1 latency 50 (25.0 usec)
>[    0.400018] [drm:intel_print_wm_latency] Cursor WM2 latency 90 (45.0 usec)
>[    0.400019] [drm:intel_print_wm_latency] Cursor WM3 latency 130 (65.0 usec)
>[    0.400020] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec)
>[    0.400022] [drm:intel_modeset_init] 3 display pipes available.
>[    0.400034] [drm:intel_ddi_pll_init] CDCLK running at 540000KHz
>[    0.400037] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    0.400346] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[    0.400397] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000
>[    0.400398] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
>[    0.400399] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
>[    0.400401] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
>[    0.400402] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[    0.400439] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    0.400445] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    0.401020] [drm:intel_dp_get_dpcd] DPCD: 12 0a 02 41 00 00 00 00 00 00 00 00 00 0b 00
>[    0.401331] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[    0.401627] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[    0.401629] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[    0.401631] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[    0.401640] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
>[    0.404994] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.404995] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    0.405000] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 488/937
>[    0.405019] [drm:intel_dp_init_connector] Adding DP connector on port B
>[    0.405060] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[    0.410424] [drm:intel_modeset_readout_hw_state] [CRTC:20] hw state readout: enabled
>[    0.410427] [drm:intel_modeset_readout_hw_state] [CRTC:24] hw state readout: disabled
>[    0.410429] [drm:intel_modeset_readout_hw_state] [CRTC:28] hw state readout: disabled
>[    0.410431] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[    0.410432] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[    0.410436] [drm:intel_ddi_get_config] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp
>[    0.410437] [drm:intel_modeset_readout_hw_state] [ENCODER:30:TMDS-30] hw state readout: enabled, pipe A
>[    0.410439] [drm:intel_modeset_readout_hw_state] [ENCODER:38:TMDS-38] hw state readout: disabled, pipe A
>[    0.410440] [drm:intel_modeset_readout_hw_state] [ENCODER:40:DP MST-40] hw state readout: disabled, pipe A
>[    0.410442] [drm:intel_modeset_readout_hw_state] [ENCODER:41:DP MST-41] hw state readout: disabled, pipe B
>[    0.410443] [drm:intel_modeset_readout_hw_state] [ENCODER:42:DP MST-42] hw state readout: disabled, pipe C
>[    0.410445] [drm:intel_modeset_readout_hw_state] [CONNECTOR:31:eDP-1] hw state readout: enabled
>[    0.410446] [drm:intel_modeset_readout_hw_state] [CONNECTOR:39:DP-1] hw state readout: disabled
>[    0.410448] [drm:intel_modeset_readout_hw_state] [CONNECTOR:43:HDMI-A-1] hw state readout: disabled
>[    0.410453] [drm:intel_dump_pipe_config] [CRTC:20][setup_hw_state] config for pipe A
>[    0.410454] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    0.410455] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.410456] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410458] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    0.410459] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.410460] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.410461] [drm:intel_dump_pipe_config] requested mode:
>[    0.410463] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 1920 0 0 0 1080 0 0 0 0x0 0x0
>[    0.410464] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.410466] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa
>[    0.410468] [drm:intel_dump_crtc_timings] crtc timings: 138499 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x0 flags: 0xa
>[    0.410469] [drm:intel_dump_pipe_config] port clock: 270000
>[    0.410470] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    0.410471] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.410472] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.410473] [drm:intel_dump_pipe_config] ips: 0
>[    0.410474] [drm:intel_dump_pipe_config] double wide: 0
>[    0.410476] [drm:intel_dump_pipe_config] [CRTC:24][setup_hw_state] config for pipe B
>[    0.410477] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    0.410478] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    0.410479] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410480] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410481] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.410482] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.410483] [drm:intel_dump_pipe_config] requested mode:
>[    0.410485] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410486] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.410487] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410489] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    0.410490] [drm:intel_dump_pipe_config] port clock: 0
>[    0.410491] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    0.410492] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.410493] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.410494] [drm:intel_dump_pipe_config] ips: 0
>[    0.410495] [drm:intel_dump_pipe_config] double wide: 0
>[    0.410496] [drm:intel_dump_pipe_config] [CRTC:28][setup_hw_state] config for pipe C
>[    0.410497] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    0.410498] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    0.410499] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410501] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.410502] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.410503] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.410504] [drm:intel_dump_pipe_config] requested mode:
>[    0.410505] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410506] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.410507] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.410509] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    0.410510] [drm:intel_dump_pipe_config] port clock: 0
>[    0.410511] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    0.410512] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.410513] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.410514] [drm:intel_dump_pipe_config] ips: 0
>[    0.410515] [drm:intel_dump_pipe_config] double wide: 0
>[    0.410520] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[    0.410522] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[    0.410523] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[    0.410525] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[    0.410526] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[    0.410527] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[    0.410528] [drm:check_crtc_state] [CRTC:20]
>[    0.410533] [drm:check_crtc_state] [CRTC:24]
>[    0.410535] [drm:check_crtc_state] [CRTC:28]
>[    0.410536] [drm:check_shared_dpll_state] WRPLL 1
>[    0.410537] [drm:check_shared_dpll_state] WRPLL 2
>[    0.410542] [drm:ironlake_get_initial_plane_config] pipe A with fb: size=1920x1080@32, offset=0, pitch 7680, size 0x7e9000
>[    0.410543] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=7e9000
>[    0.410547] [drm:i915_pages_create_for_stolen] offset=0x0, size=8294400
>[    0.410551] [drm:intel_alloc_initial_plane_obj] initial plane fb obj ffff8800da344000
>[    0.410587] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 7e9000
>[    0.410589] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [7e9000, fffff000]
>[    0.412332] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    0.412334] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    0.412335] [drm:i915_gem_context_init] LR context support initialized
>[    0.412404] [drm:intel_init_pipe_control] render ring pipe control offset: 0x0081d000
>[    0.412511] [drm:gen8_init_common_ring] Execlists enabled for render ring
>[    0.412516] [drm:gen8_init_common_ring] Execlists enabled for bsd ring
>[    0.412519] [drm:gen8_init_common_ring] Execlists enabled for blitter ring
>[    0.412522] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring
>[    0.412641] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    0.412671] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    0.412675] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    0.412679] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] status updated from 3 to 1
>[    0.412688] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    0.412692] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    0.412695] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.412696] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    0.412698] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    0.412702] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] status updated from 3 to 2
>[    0.412703] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    0.412705] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    0.412706] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    0.412859] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    0.412860] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[    0.413020] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    0.413022] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    0.413024] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] status updated from 3 to 2
>[    0.413028] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    0.413032] [drm:drm_setup_crtcs] 
>[    0.413044] [drm:drm_enable_connectors] connector 31 enabled? yes
>[    0.413045] [drm:drm_enable_connectors] connector 39 enabled? no
>[    0.413046] [drm:drm_enable_connectors] connector 43 enabled? no
>[    0.413048] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    0.413050] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    0.413052] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080
>[    0.413053] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    0.413055] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    0.413056] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0)
>[    0.413058] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    0.413060] [drm:i915_gem_object_create_stolen] creating stolen object: size=7e9000
>[    0.413064] [drm:i915_pages_create_for_stolen] offset=0x7e9000, size=8294400
>[    0.413705] [drm:intelfb_create] allocated 1920x1080 fb: 0x00885000, bo ffff8800374e0000
>[    0.413778] fbcon: inteldrmfb (fb0) is primary device
>[    0.413824] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413826] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800da3cb6c0 state to ffff880213791060
>[    0.413828] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8802137f9400 state to ffff880213791060
>[    0.413828] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413831] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413842] [drm:intel_fbc_update] disabled per chip default
>[    0.413844] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413845] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413847] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413847] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800da3cb780 state to ffff880213791060
>[    0.413848] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413849] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413849] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413850] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413851] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413851] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800da3cb840 state to ffff880213791060
>[    0.413852] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413852] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413853] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413854] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413854] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413855] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800da3cb900 state to ffff880213791060
>[    0.413855] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413856] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413857] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413857] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413858] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413858] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800da3cb9c0 state to ffff880213791060
>[    0.413859] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413859] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413860] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413860] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413861] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413862] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800da3cba80 state to ffff880213791060
>[    0.413862] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413863] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413863] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413864] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413864] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413865] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800da3cbb40 state to ffff880213791060
>[    0.413866] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413866] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413867] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413867] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413868] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413869] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800da3cbc00 state to ffff880213791060
>[    0.413869] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413870] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413870] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413871] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413872] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413872] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8800da3cbcc0 state to ffff880213791060
>[    0.413873] [drm:drm_atomic_check_only] checking ffff880213791060
>[    0.413873] [drm:drm_atomic_commit] commiting ffff880213791060
>[    0.413874] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    0.413875] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    0.413876] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    0.413877] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[    0.413878] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    0.413880] [drm:drm_mode_debug_printmodeline] Modeline 46:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.413881] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1
>[    0.413881] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880213791060
>[    0.413882] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8802146a8180 state to ffff880213791060
>[    0.413883] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8802137f9400 state to ffff880213791060
>[    0.413884] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    0.413885] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8802146a81a0 state to ffff880213791060
>[    0.413886] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8802146a81c0 state to ffff880213791060
>[    0.413887] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff880213791060
>[    0.413888] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    0.413889] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    0.413891] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    0.413894] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    0.413894] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    0.413896] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    0.413897] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    0.413897] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    0.413898] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    0.413898] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    0.413899] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    0.413900] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    0.413900] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    0.413901] [drm:intel_dump_pipe_config] requested mode:
>[    0.413902] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.413902] [drm:intel_dump_pipe_config] adjusted mode:
>[    0.413903] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    0.413905] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    0.413905] [drm:intel_dump_pipe_config] port clock: 270000
>[    0.413905] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    0.413906] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    0.413907] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    0.413907] [drm:intel_dump_pipe_config] ips: 1
>[    0.413908] [drm:intel_dump_pipe_config] double wide: 0
>[    0.413912] [drm:intel_edp_backlight_off] 
>[    0.414269] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    0.415708] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input4
>[    0.415755] [drm] Initialized i915 1.6.0 20150327 for 0000:00:02.0 on minor 0
>[    0.616205] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    0.630745] [drm:edp_panel_off] Turn eDP port A panel power off
>[    0.630748] [drm:wait_panel_off] Wait for panel power off time
>[    0.630751] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    0.690989] [drm:wait_panel_status] Wait complete
>[    0.691003] [drm:intel_display_power_put] disabling display
>[    0.691005] [drm:hsw_set_power_well] Requesting to disable the power well
>[    0.691009] [drm:drm_atomic_set_fb_for_plane] Set [FB:47] for plane state ffff8800da3cb240
>[    0.691027] [drm:edp_panel_on] Turn eDP port A panel power on
>[    0.691029] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    1.232576] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    1.232578] [drm:wait_panel_status] Wait complete
>[    1.232581] [drm:wait_panel_on] Wait for panel power on
>[    1.232583] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[    1.359167] tsc: Refined TSC clocksource calibration: 2294.688 MHz
>[    1.359170] clocksource tsc: mask: 0xffffffffffffffff max_cycles: 0x21139aef754, max_idle_ns: 440795211890 ns
>[    1.452633] [drm:wait_panel_status] Wait complete
>[    1.452641] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    1.452647] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    1.453725] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    1.454321] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[    1.454906] [drm:intel_dp_set_signal_levels] Using signal levels 04000000
>[    1.455492] [drm:intel_dp_start_link_train] clock recovery OK
>[    1.456386] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[    1.457272] [drm:intel_dp_set_signal_levels] Using signal levels 05000000
>[    1.458158] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    1.458399] [drm:intel_edp_backlight_on] 
>[    1.458401] [drm:intel_panel_enable_backlight] pipe A
>[    1.458408] [drm:intel_panel_actually_set_backlight] set backlight PWM = 488
>[    1.459048] [drm:intel_psr_match_conditions] PSR disable by flag
>[    1.459049] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[    1.493832] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[    1.493835] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[    1.493836] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[    1.493837] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[    1.493838] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[    1.493838] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[    1.493840] [drm:check_crtc_state] [CRTC:20]
>[    1.493846] [drm:check_crtc_state] [CRTC:24]
>[    1.493846] [drm:check_crtc_state] [CRTC:28]
>[    1.493847] [drm:check_shared_dpll_state] WRPLL 1
>[    1.493848] [drm:check_shared_dpll_state] WRPLL 2
>[    1.493850] [drm:drm_atomic_state_clear] Clearing atomic state ffff880213791060
>[    1.493852] [drm:drm_atomic_state_free] Freeing atomic state ffff880213791060
>[    1.493864] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    1.493866] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    1.493867] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880214015c00
>[    1.493869] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880212ed92a0 state to ffff880214015c00
>[    1.493870] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880037845400 state to ffff880214015c00
>[    1.493871] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.493872] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880212ed92c0 state to ffff880214015c00
>[    1.493873] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880212ed92e0 state to ffff880214015c00
>[    1.493875] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff880214015c00
>[    1.493876] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.493877] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff880037845800 state to ffff880214015c00
>[    1.493877] [drm:drm_atomic_state_clear] Clearing atomic state ffff880214015c00
>[    1.493878] [drm:drm_atomic_state_free] Freeing atomic state ffff880214015c00
>[    1.493880] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    1.493881] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    1.493881] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880214015c00
>[    1.493882] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880212ed92e0 state to ffff880214015c00
>[    1.493883] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880037845800 state to ffff880214015c00
>[    1.493884] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.493884] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880212ed92c0 state to ffff880214015c00
>[    1.493885] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880212ed92a0 state to ffff880214015c00
>[    1.493886] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff880214015c00
>[    1.493887] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.493887] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff880037845400 state to ffff880214015c00
>[    1.493888] [drm:drm_atomic_state_clear] Clearing atomic state ffff880214015c00
>[    1.493889] [drm:drm_atomic_state_free] Freeing atomic state ffff880214015c00
>[    1.493891] [drm:drm_fb_helper_hotplug_event] 
>[    1.493893] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    1.493893] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    1.493901] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.493903] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    1.493905] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.493906] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    1.493906] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    1.493908] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    1.493909] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    1.493910] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    1.494112] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    1.494113] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[    1.494296] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[    1.494298] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    1.494301] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    1.494306] [drm:drm_setup_crtcs] 
>[    1.494308] [drm:drm_enable_connectors] connector 31 enabled? yes
>[    1.494309] [drm:drm_enable_connectors] connector 39 enabled? no
>[    1.494309] [drm:drm_enable_connectors] connector 43 enabled? no
>[    1.494311] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    1.494312] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    1.494313] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080
>[    1.494314] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    1.494314] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    1.494316] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0)
>[    1.494321] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494323] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800da33a300 state to ffff88021367b900
>[    1.494325] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b900
>[    1.494326] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494328] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494345] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494346] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494347] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494348] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800da33a3c0 state to ffff88021367b900
>[    1.494349] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494350] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494351] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494351] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494352] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494353] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800da33a180 state to ffff88021367b900
>[    1.494353] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494354] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494355] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494356] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494356] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494357] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800da33a0c0 state to ffff88021367b900
>[    1.494358] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494359] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494359] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494360] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494361] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494362] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800da33a000 state to ffff88021367b900
>[    1.494362] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494363] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494363] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494364] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494365] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494367] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800da33a240 state to ffff88021367b900
>[    1.494367] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494368] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494368] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494369] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494370] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494371] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800da33a900 state to ffff88021367b900
>[    1.494371] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494372] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494373] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494373] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494374] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494375] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800da33a9c0 state to ffff88021367b900
>[    1.494375] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494376] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494377] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494377] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494378] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494379] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88021402b300 state to ffff88021367b900
>[    1.494380] [drm:drm_atomic_check_only] checking ffff88021367b900
>[    1.494380] [drm:drm_atomic_commit] commiting ffff88021367b900
>[    1.494381] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494382] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494383] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    1.494384] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    1.494385] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494387] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804f60 state to ffff88021367b900
>[    1.494388] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b900
>[    1.494388] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494390] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804e60 state to ffff88021367b900
>[    1.494391] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880214025f60 state to ffff88021367b900
>[    1.494392] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021367b900
>[    1.494393] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    1.494395] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    1.494397] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    1.494401] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    1.494402] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    1.494403] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    1.494404] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    1.494405] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.494405] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.494406] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.494407] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    1.494408] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.494409] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.494409] [drm:intel_dump_pipe_config] requested mode:
>[    1.494411] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494411] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.494412] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494414] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    1.494414] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.494415] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    1.494415] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.494416] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.494417] [drm:intel_dump_pipe_config] ips: 1
>[    1.494417] [drm:intel_dump_pipe_config] double wide: 0
>[    1.494418] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494419] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494421] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    1.494422] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    1.494423] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494424] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804f00 state to ffff88021367b900
>[    1.494425] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b900
>[    1.494425] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494426] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804e60 state to ffff88021367b900
>[    1.494427] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880215804f60 state to ffff88021367b900
>[    1.494428] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff88021367b900
>[    1.494429] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.494429] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff88021313bc00 state to ffff88021367b900
>[    1.494430] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494431] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494432] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    1.494432] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    1.494433] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b900
>[    1.494434] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804e60 state to ffff88021367b900
>[    1.494435] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313bc00 state to ffff88021367b900
>[    1.494435] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494436] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804f00 state to ffff88021367b900
>[    1.494437] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880214025f60 state to ffff88021367b900
>[    1.494438] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff88021367b900
>[    1.494438] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    1.494439] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff88021313b800 state to ffff88021367b900
>[    1.494440] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b900
>[    1.494440] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b900
>[    1.494447] Console: switching to colour frame buffer device 240x67
>[    1.494453] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    1.494454] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    1.494455] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021367b960
>[    1.494455] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880215804ee0 state to ffff88021367b960
>[    1.494456] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88021313b800 state to ffff88021367b960
>[    1.494457] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.494458] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880215804f00 state to ffff88021367b960
>[    1.494458] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880215804e60 state to ffff88021367b960
>[    1.494459] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021367b960
>[    1.494460] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    1.494461] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    1.494462] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    1.494464] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    1.494465] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    1.494466] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    1.494466] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    1.494467] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.494467] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.494468] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.494469] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    1.494470] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.494470] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.494471] [drm:intel_dump_pipe_config] requested mode:
>[    1.494472] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494472] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.494474] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    1.494475] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    1.494475] [drm:intel_dump_pipe_config] port clock: 270000
>[    1.494476] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    1.494476] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.494477] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.494477] [drm:intel_dump_pipe_config] ips: 1
>[    1.494478] [drm:intel_dump_pipe_config] double wide: 0
>[    1.494478] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021367b960
>[    1.494479] [drm:drm_atomic_state_free] Freeing atomic state ffff88021367b960
>[    1.498426] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    1.498427] i915 0000:00:02.0: registered panic notifier
>[    1.558523] sdhci: Secure Digital Host Controller Interface driver
>[    1.558526] sdhci: Copyright(c) Pierre Ossman
>[    1.560940] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
>[    1.561483] i8042: Warning: Keylock active
>[    1.563639] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    1.563673] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    1.568756] rtsx_pci 0000:01:00.0: enabling device (0000 -> 0002)
>[    1.568893] rtsx_pci 0000:01:00.0: rtsx_pci_acquire_irq: pcr->msi_en = 1, pci->irq = 45
>[    1.569415] ACPI: bus type USB registered
>[    1.569435] usbcore: registered new interface driver usbfs
>[    1.569443] usbcore: registered new interface driver hub
>[    1.569467] usbcore: registered new device driver usb
>[    1.570152] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    1.570345] ehci-pci: EHCI PCI platform driver
>[    1.570510] ehci-pci 0000:00:1d.0: EHCI Host Controller
>[    1.570517] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 1
>[    1.570529] ehci-pci 0000:00:1d.0: debug port 2
>[    1.571170] SCSI subsystem initialized
>[    1.572846] libata version 3.00 loaded.
>[    1.574434] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported
>[    1.574450] ehci-pci 0000:00:1d.0: irq 21, io mem 0xf7223000
>[    1.582303] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00
>[    1.582600] hub 1-0:1.0: USB hub found
>[    1.582608] hub 1-0:1.0: 3 ports detected
>[    1.582921] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.582928] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[    1.583008] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810
>[    1.583014] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    1.583224] hub 2-0:1.0: USB hub found
>[    1.583238] hub 2-0:1.0: 11 ports detected
>[    1.587719] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input5
>[    1.588047] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    1.588052] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 3
>[    1.588225] hub 3-0:1.0: USB hub found
>[    1.588236] hub 3-0:1.0: 4 ports detected
>[    1.589526] ahci 0000:00:1f.2: version 3.0
>[    1.589669] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled
>[    1.602300] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 4 ports 6 Gbps 0x8 impl SATA mode
>[    1.602303] ahci 0000:00:1f.2: flags: 64bit ncq stag pm led clo only pio slum part deso sadm sds apst 
>[    1.602711] scsi host0: ahci
>[    1.602827] scsi host1: ahci
>[    1.602918] scsi host2: ahci
>[    1.603003] scsi host3: ahci
>[    1.603046] ata1: DUMMY
>[    1.603047] ata2: DUMMY
>[    1.603048] ata3: DUMMY
>[    1.603050] ata4: SATA max UDMA/133 abar m2048@0xf7222000 port 0xf7222280 irq 47
>[    1.888876] usb 1-1: new high-speed USB device number 2 using ehci-pci
>[    1.922201] ata4: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    1.924246] ata4.00: READ LOG DMA EXT failed, trying unqueued
>[    1.924298] ata4.00: failed to get NCQ Send/Recv Log Emask 0x1
>[    1.924300] ata4.00: ATA-9: SAMSUNG SSD PM851 M.2 2280 256GB, EXT25D0Q, max UDMA/133
>[    1.924301] ata4.00: 500118192 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    1.924662] ata4.00: failed to get NCQ Send/Recv Log Emask 0x1
>[    1.924699] ata4.00: configured for UDMA/133
>[    1.924855] scsi 3:0:0:0: Direct-Access     ATA      SAMSUNG SSD PM85 5D0Q PQ: 0 ANSI: 5
>[    1.927304] sd 3:0:0:0: [sda] 500118192 512-byte logical blocks: (256 GB/238 GiB)
>[    1.927401] sd 3:0:0:0: [sda] Write Protect is off
>[    1.927403] sd 3:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    1.927431] sd 3:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    1.928713]  sda: sda1 sda2 sda3 sda4 sda5 sda6 sda7 sda8 sda9
>[    1.929336] sd 3:0:0:0: [sda] Attached SCSI disk
>[    1.945435] usb 2-2: new full-speed USB device number 2 using xhci_hcd
>[    1.979870] EXT4-fs (sda4): mounted filesystem with ordered data mode. Opts: (null)
>[    2.012526] hub 1-1:1.0: USB hub found
>[    2.012623] hub 1-1:1.0: 8 ports detected
>[    2.022732] ip_tables: (C) 2000-2006 Netfilter Core Team
>[    2.028108] systemd[1]: systemd 225 running in system mode. (+PAM -AUDIT -SELINUX -IMA -APPARMOR +SMACK -SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID -ELFUTILS +KMOD +IDN)
>[    2.028219] systemd[1]: Detected architecture x86-64.
>[    2.028408] systemd[1]: Set hostname to <tsokar>.
>[    2.078460] systemd[1]: Created slice Root Slice.
>[    2.078509] systemd[1]: Listening on Device-mapper event daemon FIFOs.
>[    2.078540] systemd[1]: Listening on udev Control Socket.
>[    2.078629] systemd[1]: Created slice System Slice.
>[    2.078743] systemd[1]: Created slice system-systemd\x2dfsck.slice.
>[    2.078773] systemd[1]: Listening on LVM2 metadata daemon socket.
>[    2.078806] systemd[1]: Listening on Journal Socket.
>[    2.079178] systemd[1]: Mounting Huge Pages File System...
>[    2.079460] systemd[1]: Starting Remount Root and Kernel File Systems...
>[    2.079786] systemd[1]: Starting Create list of required static device nodes for the current kernel...
>[    2.081004] systemd[1]: Mounting Temporary Directory...
>[    2.081540] systemd[1]: Starting Setup Virtual Console...
>[    2.082095] systemd[1]: Mounting POSIX Message Queue File System...
>[    2.082624] systemd[1]: Mounting Debug File System...
>[    2.084182] systemd[1]: Starting Apply Kernel Variables...
>[    2.085040] systemd[1]: Mounting Configuration File System...
>[    2.085147] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
>[    2.085324] systemd[1]: Created slice system-getty.slice.
>[    2.085396] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
>[    2.085414] systemd[1]: Reached target Encrypted Volumes.
>[    2.085677] systemd[1]: Listening on udev Kernel Socket.
>[    2.085889] EXT4-fs (sda4): re-mounted. Opts: data=ordered
>[    2.087991] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
>[    2.088009] systemd[1]: Reached target Paths.
>[    2.088107] systemd[1]: Created slice User and Session Slice.
>[    2.088122] systemd[1]: Reached target Slices.
>[    2.088152] systemd[1]: Listening on Journal Socket (/dev/log).
>[    2.088487] systemd[1]: Starting Journal Service...
>[    2.088502] systemd[1]: Reached target Remote File Systems.
>[    2.088720] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point.
>[    2.089479] systemd[1]: Starting Set Up Additional Binary Formats...
>[    2.090048] systemd[1]: Mounted Huge Pages File System.
>[    2.090072] systemd[1]: Mounted POSIX Message Queue File System.
>[    2.090083] systemd[1]: Mounted Configuration File System.
>[    2.090095] systemd[1]: Mounted Debug File System.
>[    2.090104] systemd[1]: Mounted Temporary Directory.
>[    2.090321] systemd[1]: Started Remount Root and Kernel File Systems.
>[    2.090470] systemd[1]: Started Create list of required static device nodes for the current kernel.
>[    2.092570] systemd[1]: Started Apply Kernel Variables.
>[    2.092749] systemd[1]: proc-sys-fs-binfmt_misc.automount: Got automount request for /proc/sys/fs/binfmt_misc, triggered by 203 (systemd-binfmt)
>[    2.099964] systemd[1]: Mounting Arbitrary Executable File Formats File System...
>[    2.101726] systemd[1]: Starting udev Coldplug all Devices...
>[    2.102216] systemd[1]: Starting Create Static Device Nodes in /dev...
>[    2.102606] systemd[1]: Starting Load/Save Random Seed...
>[    2.103360] systemd[1]: Mounted Arbitrary Executable File Formats File System.
>[    2.108555] systemd[1]: Started Set Up Additional Binary Formats.
>[    2.110785] systemd[1]: Started Load/Save Random Seed.
>[    2.123628] systemd[1]: Started Setup Virtual Console.
>[    2.125454] systemd[1]: Started Create Static Device Nodes in /dev.
>[    2.125514] systemd[1]: Reached target Local File Systems (Pre).
>[    2.125923] systemd[1]: Starting udev Kernel Device Manager...
>[    2.135488] systemd[1]: Started udev Coldplug all Devices.
>[    2.173034] systemd[1]: Started udev Kernel Device Manager.
>[    2.193784] ACPI: AC Adapter [AC] (off-line)
>[    2.200782] proc_thermal 0000:00:04.0: enabling device (0000 -> 0002)
>[    2.204330] ACPI Warning: \_SB_.IETM._ART: Return Package type mismatch at index 0 - found Integer, expected Reference (20150410/nspredef-297)
>[    2.204511] ACPI: Invalid package element [0]: got number, expecting [R]
>[    2.204513] _ART package 0 is invalid, ignored
>[    2.239556] hidraw: raw HID events driver (C) Jiri Kosina
>[    2.243152] dw_dmac INTL9C60:00: DesignWare DMA Controller, 8 channels
>[    2.251640] random: nonblocking pool is initialized
>[    2.263176] systemd[1]: Started Journal Service.
>[    2.271205] systemd-journald[200]: Received request to flush runtime journal from PID 1
>[    2.278583] usb 2-3: new full-speed USB device number 3 using xhci_hcd
>[    2.322878] thermal LNXTHERM:00: registered as thermal_zone3
>[    2.322882] ACPI: Thermal Zone [THM] (25 C)
>[    2.340705] thermal LNXTHERM:01: registered as thermal_zone5
>[    2.340708] ACPI: Thermal Zone [TZ00] (50 C)
>[    2.351701] ACPI Warning: SystemIO range 0x000000000000F040-0x000000000000F05F conflicts with OpRegion 0x000000000000F040-0x000000000000F04F (\_SB_.PCI0.SBUS.SMBI) (20150410/utaddress-254)
>[    2.351709] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    2.351849] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>[    2.353178] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=562/937
>[    2.353183] [drm:intel_panel_actually_set_backlight] set backlight PWM = 577
>[    2.353983] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[    2.361607] Switched to clocksource tsc
>[    2.366072] snd_hda_intel 0000:00:03.0: enabling device (0000 -> 0002)
>[    2.366357] snd_hda_intel 0000:00:03.0: bound 0000:00:02.0 (ops i915_exit [i915])
>[    2.366383] snd_hda_intel 0000:00:1b.0: enabling device (0000 -> 0002)
>[    2.366644] thermal LNXTHERM:02: registered as thermal_zone9
>[    2.366646] ACPI: Thermal Zone [TZ01] (50 C)
>[    2.367460] ACPI: Battery Slot [BAT0] (battery present)
>[    2.367878] wmi: Mapper loaded
>[    2.369430] [drm:intel_display_power_get] enabling display
>[    2.369434] [drm:hsw_set_power_well] Enabling power well
>[    2.372611] cfg80211: Calling CRDA to update world regulatory domain
>[    2.374770] input: PC Speaker as /devices/platform/pcspkr/input/input7
>[    2.380185] Intel(R) Wireless WiFi driver for Linux
>[    2.380188] Copyright(c) 2003- 2015 Intel Corporation
>[    2.380260] iwlwifi 0000:02:00.0: enabling device (0000 -> 0002)
>[    2.381375] snd_hda_codec_realtek hdaudioC1D0: autoconfig for ALC3263: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>[    2.381380] snd_hda_codec_realtek hdaudioC1D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    2.381393] snd_hda_codec_realtek hdaudioC1D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>[    2.381395] snd_hda_codec_realtek hdaudioC1D0:    mono: mono_out=0x0
>[    2.381396] snd_hda_codec_realtek hdaudioC1D0:    inputs:
>[    2.381399] snd_hda_codec_realtek hdaudioC1D0:      Headset Mic=0x18
>[    2.381401] snd_hda_codec_realtek hdaudioC1D0:      Headphone Mic=0x1a
>[    2.381403] snd_hda_codec_realtek hdaudioC1D0:      Internal Mic=0x12
>[    2.384651] iwlwifi 0000:02:00.0: loaded firmware version 25.30.13.0 op_mode iwlmvm
>[    2.385681] input: HDA Intel HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/sound/card0/input9
>[    2.385727] input: HDA Intel HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/sound/card0/input10
>[    2.385766] input: HDA Intel HDMI HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:03.0/sound/card0/input11
>[    2.390728] AVX2 version of gcm_enc/dec engaged.
>[    2.390731] AES CTR mode by8 optimization enabled
>[    2.402479] input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:1b.0/sound/card1/input8
>[    2.402619] input: HDA Intel PCH Headphone Mic as /devices/pci0000:00/0000:00:1b.0/sound/card1/input12
>[    2.413475] iwlwifi 0000:02:00.0: Detected Intel(R) Dual Band Wireless AC 7265, REV=0x210
>[    2.413566] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.413764] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.419357] EXT4-fs (sda7): mounted filesystem with ordered data mode. Opts: (null)
>[    2.432765] EXT4-fs (sda8): mounted filesystem with ordered data mode. Opts: (null)
>[    2.434515] EXT4-fs (sda6): mounted filesystem with ordered data mode. Opts: (null)
>[    2.452004] Adding 13311996k swap on /dev/sda9.  Priority:-1 extents:1 across:13311996k SSFS
>[    2.452351] usb 2-3: No LPM exit latency info found, disabling LPM.
>[    2.464398] dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2)
>[    2.467740] EXT4-fs (sda5): mounted filesystem with ordered data mode. Opts: (null)
>[    2.470757] intel_rapl: Found RAPL domain package
>[    2.470761] intel_rapl: Found RAPL domain core
>[    2.470763] intel_rapl: Found RAPL domain uncore
>[    2.470765] intel_rapl: Found RAPL domain dram
>[    2.485291] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.495759] iTCO_vendor_support: vendor-support=0
>[    2.496686] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[    2.496735] iTCO_wdt: Found a Wildcat Point_LP TCO device (Version=2, TCOBASE=0x1860)
>[    2.496801] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[    2.496806] input: Dell WMI hotkeys as /devices/virtual/input/input13
>[    2.497338] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.498428] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.500581] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    2.500707] input: DLL0665:01 06CB:76AD UNKNOWN as /devices/pci0000:00/INT3433:00/i2c-9/i2c-DLL0665:01/0018:06CB:76AD.0001/input/input14
>[    2.500815] hid-multitouch 0018:06CB:76AD.0001: input,hidraw0: <UNKNOWN> HID v1.00 Mouse [DLL0665:01 06CB:76AD] on 
>[    2.501354] ieee80211 phy0: Selected rate control algorithm 'iwl-mvm-rs'
>[    2.511582] mousedev: PS/2 mouse device common for all mice
>[    2.520537] iwlwifi 0000:02:00.0 wlp2s0: renamed from wlan0
>[    2.527335] Non-volatile memory driver v1.3
>[    2.608653] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.608655] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.608657] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880212be7b40
>[    2.608660] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020f2e6c80 state to ffff880212be7b40
>[    2.608662] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88020f116800 state to ffff880212be7b40
>[    2.608663] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.608665] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020f2e6ca0 state to ffff880212be7b40
>[    2.608667] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020f2e6cc0 state to ffff880212be7b40
>[    2.608668] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff880212be7b40
>[    2.608670] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.608672] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.608674] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.608679] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.608680] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.608682] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.608683] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.608684] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.608685] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.608686] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.608687] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.608688] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.608689] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.608690] [drm:intel_dump_pipe_config] requested mode:
>[    2.608692] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.608693] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.608695] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.608697] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.608698] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.608699] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.608700] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.608701] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.608702] [drm:intel_dump_pipe_config] ips: 1
>[    2.608702] [drm:intel_dump_pipe_config] double wide: 0
>[    2.608704] [drm:drm_atomic_state_clear] Clearing atomic state ffff880212be7b40
>[    2.608705] [drm:drm_atomic_state_free] Freeing atomic state ffff880212be7b40
>[    2.611737] usb 2-5: new high-speed USB device number 4 using xhci_hcd
>[    2.616707] [drm:i915_gem_open] 
>[    2.617522] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.617523] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.617531] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.617979] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.617983] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88020f1ba900 state to ffff880037983d80
>[    2.617986] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b2c00 state to ffff880037983d80
>[    2.617989] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.617993] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618012] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618015] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618018] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618020] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88020f1bacc0 state to ffff880037983d80
>[    2.618022] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618024] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618025] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618027] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618029] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618031] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88020f1bad80 state to ffff880037983d80
>[    2.618032] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618033] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618035] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618037] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618038] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618040] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88020f1baa80 state to ffff880037983d80
>[    2.618042] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618044] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618046] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618047] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618049] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618051] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88020f1ba540 state to ffff880037983d80
>[    2.618052] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618054] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618056] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618057] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618059] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618061] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88020f1ba480 state to ffff880037983d80
>[    2.618062] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618064] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618066] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618067] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618069] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618071] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88020f1ba6c0 state to ffff880037983d80
>[    2.618073] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618075] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618076] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618078] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618080] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618082] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88020f1ba600 state to ffff880037983d80
>[    2.618083] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618085] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618087] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618089] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618090] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618093] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88020f1bac00 state to ffff880037983d80
>[    2.618094] [drm:drm_atomic_check_only] checking ffff880037983d80
>[    2.618096] [drm:drm_atomic_commit] commiting ffff880037983d80
>[    2.618097] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618099] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618102] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.618105] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.618107] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618111] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da5b240 state to ffff880037983d80
>[    2.618114] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b2c00 state to ffff880037983d80
>[    2.618116] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.618119] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da5b220 state to ffff880037983d80
>[    2.618121] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da5b200 state to ffff880037983d80
>[    2.618123] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff880037983d80
>[    2.618126] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.618128] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.618132] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.618137] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.618139] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.618141] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.618144] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.618145] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.618147] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.618149] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.618151] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.618153] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.618155] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.618156] [drm:intel_dump_pipe_config] requested mode:
>[    2.618159] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.618161] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.618164] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.618166] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.618168] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.618169] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.618171] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.618173] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.618174] [drm:intel_dump_pipe_config] ips: 1
>[    2.618176] [drm:intel_dump_pipe_config] double wide: 0
>[    2.618178] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618180] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618182] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.618185] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.618187] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618189] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da5b200 state to ffff880037983d80
>[    2.618191] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b2c00 state to ffff880037983d80
>[    2.618193] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.618195] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da5b220 state to ffff880037983d80
>[    2.618197] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da5b240 state to ffff880037983d80
>[    2.618199] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff880037983d80
>[    2.618201] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.618203] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff8800375b3400 state to ffff880037983d80
>[    2.618205] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618207] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.618208] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.618210] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.618212] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037983d80
>[    2.618214] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da5b240 state to ffff880037983d80
>[    2.618216] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800375b3400 state to ffff880037983d80
>[    2.618217] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.618219] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da5b220 state to ffff880037983d80
>[    2.618221] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da5b200 state to ffff880037983d80
>[    2.618223] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff880037983d80
>[    2.618224] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.618226] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff8800375b2c00 state to ffff880037983d80
>[    2.618228] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037983d80
>[    2.618229] [drm:drm_atomic_state_free] Freeing atomic state ffff880037983d80
>[    2.639542] [drm:i915_gem_open] 
>[    2.639979] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.639981] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.640315] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640318] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88020e682240 state to ffff88021371fcc0
>[    2.640320] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640322] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640325] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640340] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640342] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640343] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640345] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88020e6823c0 state to ffff88021371fcc0
>[    2.640346] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640347] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640348] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640349] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640350] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640351] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88020e682480 state to ffff88021371fcc0
>[    2.640352] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640353] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640354] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640355] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640356] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640358] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88020e682e40 state to ffff88021371fcc0
>[    2.640358] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640359] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640361] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640361] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640363] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640364] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88020e682900 state to ffff88021371fcc0
>[    2.640365] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640365] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640367] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640367] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640369] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640370] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88020e682f00 state to ffff88021371fcc0
>[    2.640371] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640372] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640373] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640374] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640375] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640376] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88020e6820c0 state to ffff88021371fcc0
>[    2.640377] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640378] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640379] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640380] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640381] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640382] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88020e682540 state to ffff88021371fcc0
>[    2.640383] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640384] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640385] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640386] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640387] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640388] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88020e682840 state to ffff88021371fcc0
>[    2.640389] [drm:drm_atomic_check_only] checking ffff88021371fcc0
>[    2.640390] [drm:drm_atomic_commit] commiting ffff88021371fcc0
>[    2.640391] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640392] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640394] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.640396] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.640397] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640399] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da800a0 state to ffff88021371fcc0
>[    2.640400] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640401] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.640403] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da80080 state to ffff88021371fcc0
>[    2.640404] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da80060 state to ffff88021371fcc0
>[    2.640405] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021371fcc0
>[    2.640407] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.640409] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.640412] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.640416] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.640417] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.640418] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.640420] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.640421] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.640422] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.640423] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.640424] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.640425] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.640426] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.640427] [drm:intel_dump_pipe_config] requested mode:
>[    2.640429] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.640430] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.640431] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.640433] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.640434] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.640434] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.640435] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.640436] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.640437] [drm:intel_dump_pipe_config] ips: 1
>[    2.640438] [drm:intel_dump_pipe_config] double wide: 0
>[    2.640439] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640440] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640442] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.640443] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.640444] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640446] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da80060 state to ffff88021371fcc0
>[    2.640447] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640448] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.640449] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da80080 state to ffff88021371fcc0
>[    2.640450] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da800a0 state to ffff88021371fcc0
>[    2.640451] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff88021371fcc0
>[    2.640452] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.640454] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff8800d7154800 state to ffff88021371fcc0
>[    2.640454] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640455] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.640456] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.640458] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.640459] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fcc0
>[    2.640460] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da800a0 state to ffff88021371fcc0
>[    2.640461] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d7154800 state to ffff88021371fcc0
>[    2.640462] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.640463] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da80080 state to ffff88021371fcc0
>[    2.640464] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da80060 state to ffff88021371fcc0
>[    2.640465] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:28] to ffff88021371fcc0
>[    2.640466] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.640467] [drm:drm_atomic_get_crtc_state] Added [CRTC:28] ffff8800d7155400 state to ffff88021371fcc0
>[    2.640468] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fcc0
>[    2.640469] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fcc0
>[    2.657275] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.657277] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.657279] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88021371fde0
>[    2.657281] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020da80180 state to ffff88021371fde0
>[    2.657283] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880212bdbc00 state to ffff88021371fde0
>[    2.657284] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.657285] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020da801a0 state to ffff88021371fde0
>[    2.657287] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020da801c0 state to ffff88021371fde0
>[    2.657288] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff88021371fde0
>[    2.657289] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.657290] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.657294] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    2.657297] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    2.657297] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    2.657299] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.657300] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.657301] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.657301] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.657302] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.657303] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    2.657303] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.657304] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.657304] [drm:intel_dump_pipe_config] requested mode:
>[    2.657306] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.657306] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.657307] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    2.657308] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    2.657309] [drm:intel_dump_pipe_config] port clock: 270000
>[    2.657309] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    2.657310] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.657311] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.657311] [drm:intel_dump_pipe_config] ips: 1
>[    2.657311] [drm:intel_dump_pipe_config] double wide: 0
>[    2.657312] [drm:drm_atomic_state_clear] Clearing atomic state ffff88021371fde0
>[    2.657313] [drm:drm_atomic_state_free] Freeing atomic state ffff88021371fde0
>[    2.661273] [drm:i915_gem_open] 
>[    2.661726] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.661727] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.661736] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.662746] [drm:i915_gem_open] 
>[    2.663157] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.663159] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.663164] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.663167] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.664848] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.664858] [drm:drm_mode_addfb2] [FB:46]
>[    2.665046] [drm:internal_framebuffer_create] could not create framebuffer
>[    2.665050] [drm:internal_framebuffer_create] could not create framebuffer
>[    2.665089] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665091] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665159] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    2.665192] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    2.665323] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    2.665327] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    2.665351] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    2.665353] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    2.696290] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[    2.696409] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.696598] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.722195] [drm:drm_mode_addfb2] [FB:46]
>[    2.756557] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.756759] iwlwifi 0000:02:00.0: L1 Enabled - LTR Disabled
>[    2.778149] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[    2.856291] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[    3.355383] usbcore: registered new interface driver usbhid
>[    3.355387] usbhid: USB HID core driver
>[    3.394140] cfg80211: Calling CRDA to update world regulatory domain
>[    3.447447] [drm:drm_mode_setcrtc] [CRTC:20]
>[    3.447451] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[    3.447453] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[    3.447455] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[    3.447457] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8802128779c0
>[    3.447459] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff88020db06600 state to ffff8802128779c0
>[    3.447461] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88020ffd1c00 state to ffff8802128779c0
>[    3.447462] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    3.447463] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff88020db06620 state to ffff8802128779c0
>[    3.447465] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff88020db06640 state to ffff8802128779c0
>[    3.447466] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff8802128779c0
>[    3.447468] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    3.447470] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    3.447472] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[    3.447475] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[    3.447476] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[    3.447478] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    3.447479] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    3.447480] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    3.447480] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    3.447482] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    3.447483] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[    3.447484] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    3.447485] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    3.447485] [drm:intel_dump_pipe_config] requested mode:
>[    3.447487] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x0 0xa
>[    3.447488] [drm:intel_dump_pipe_config] adjusted mode:
>[    3.447489] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    3.447491] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[    3.447492] [drm:intel_dump_pipe_config] port clock: 270000
>[    3.447492] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[    3.447493] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    3.447494] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    3.447495] [drm:intel_dump_pipe_config] ips: 1
>[    3.447496] [drm:intel_dump_pipe_config] double wide: 0
>[    3.447498] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378499c0
>[    3.459582] [drm:drm_atomic_state_clear] Clearing atomic state ffff8802128779c0
>[    3.459587] [drm:drm_atomic_state_free] Freeing atomic state ffff8802128779c0
>[    3.569295] [drm:i915_gem_open] 
>[    3.569787] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    3.569789] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    3.577466] cfg80211: Calling CRDA to update world regulatory domain
>[    3.630111] cfg80211: Calling CRDA to update world regulatory domain
>[    3.738236] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8900
>[    3.801576] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f1ba240
>[    3.869197] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:14.0/usb2/2-2/2-2:1.0/0003:046D:C52F.0002/input/input16
>[    3.869310] hid-generic 0003:046D:C52F.0002: input,hidraw1: USB HID v1.11 Mouse [Logitech USB Receiver] on usb-0000:00:14.0-2/input0
>[    3.870027] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:14.0/usb2/2-2/2-2:1.1/0003:046D:C52F.0003/input/input17
>[    3.921297] hid-generic 0003:046D:C52F.0003: input,hiddev0,hidraw2: USB HID v1.11 Device [Logitech USB Receiver] on usb-0000:00:14.0-2/input1
>[    4.317765] [drm:intel_display_power_put] disabling display
>[    4.317770] [drm:hsw_set_power_well] Requesting to disable the power well
>[    4.384537] media: Linux media interface: v0.10
>[    4.384588] Bluetooth: Core ver 2.20
>[    4.384607] NET: Registered protocol family 31
>[    4.384609] Bluetooth: HCI device and connection manager initialized
>[    4.384612] Bluetooth: HCI socket layer initialized
>[    4.384615] Bluetooth: L2CAP socket layer initialized
>[    4.384620] Bluetooth: SCO socket layer initialized
>[    4.388305] usbcore: registered new interface driver btusb
>[    4.389890] Linux video capture interface: v2.00
>[    4.397103] uvcvideo: Found UVC 1.00 device Integrated_Webcam_HD (0bda:5682)
>[    4.403968] Bluetooth: hci0: read Intel version: 370810011003110e0f
>[    4.403970] Bluetooth: hci0: Intel device is already patched. patch num: 0f
>[    4.406758] input: Integrated_Webcam_HD as /devices/pci0000:00/0000:00:14.0/usb2/2-5/2-5:1.0/input/input18
>[    4.406841] usbcore: registered new interface driver uvcvideo
>[    4.406843] USB Video Class driver (1.1.1)
>[    4.464083] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    4.464092] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    4.664455] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    4.664461] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    4.664462] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    4.664474] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    4.664477] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    4.664479] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[    4.664483] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    6.080129] wlp2s0: authenticate with a4:56:30:5c:e5:d1
>[    6.083702] wlp2s0: send auth to a4:56:30:5c:e5:d1 (try 1/3)
>[    6.154925] wlp2s0: authenticated
>[    6.156456] wlp2s0: associate with a4:56:30:5c:e5:d1 (try 1/3)
>[    6.161597] wlp2s0: RX AssocResp from a4:56:30:5c:e5:d1 (capab=0x431 status=0 aid=2)
>[    6.167067] wlp2s0: associated
>[    6.167095] IPv6: ADDRCONF(NETDEV_CHANGE): wlp2s0: link becomes ready
>[    6.362107] wlp2s0: Limiting TX power to 17 dBm as advertised by a4:56:30:5c:e5:d1
>[   11.547568] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d2757180
>[   13.480845] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24ecb40
>[   13.673831] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802137a0a80
>[   13.815646] [drm:i915_gem_open] 
>[   13.816149] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   13.816151] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   13.850535] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   13.850538] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   13.850540] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   13.851387] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   13.942642] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880213121540
>[   13.986701] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   13.986704] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   13.986706] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   13.992807] [drm:drm_mode_addfb2] [FB:48]
>[   14.033550] [drm:drm_mode_addfb2] [FB:49]
>[   14.762705] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=562/937
>[   14.762709] [drm:intel_panel_actually_set_backlight] set backlight PWM = 577
>[   14.794860] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   14.794864] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[   14.794865] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   14.794871] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[   14.794878] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   14.794880] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[   14.794881] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   14.795040] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   14.795042] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   14.795197] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   14.795199] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   14.795201] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[   15.878541] [drm:i915_gem_open] 
>[   15.879268] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   15.879270] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   15.931297] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   15.931301] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   15.931303] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   15.932251] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   16.113872] [drm:i915_gem_open] 
>[   16.114665] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.114668] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.174212] [drm:intel_display_power_get] enabling display
>[   16.174217] [drm:hsw_set_power_well] Enabling power well
>[   16.178482] [drm:drm_atomic_set_fb_for_plane] Set [FB:50] for plane state ffff880202bea240
>[   16.178831] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880202beac00
>[   16.182759] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.182763] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.182765] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   16.185921] [drm:drm_mode_addfb2] [FB:50]
>[   16.495683] [drm:i915_gem_open] 
>[   16.496110] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.496112] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.544765] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.544768] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.544770] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   16.545712] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   16.756246] [drm:i915_gem_open] 
>[   16.756978] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.756981] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.825510] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   16.825514] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   16.825517] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   16.826769] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   17.024815] [drm:i915_gem_open] 
>[   17.025537] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   17.025540] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   17.088004] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   17.088008] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   17.088011] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   17.089052] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   17.270268] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   17.270272] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   17.270275] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   17.320070] [drm:drm_mode_addfb2] [FB:51]
>[   17.359766] [drm:drm_mode_addfb2] [FB:52]
>[   17.418296] [drm:drm_mode_addfb2] [FB:53]
>[   18.033474] fuse init (API version 7.23)
>[   19.562762] [drm:i915_gem_open] 
>[   19.563507] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   19.563510] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   20.914912] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   20.916033] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202ac1000
>[   22.001932] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   22.001939] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[   22.001942] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[   22.001955] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   22.001959] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[   22.001963] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[   22.001967] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   22.140024] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed8c2f00
>[   22.337555] [drm:intel_display_power_put] disabling display
>[   22.337560] [drm:hsw_set_power_well] Requesting to disable the power well
>[   22.604437] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1180
>[   22.608220] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd19c0
>[   22.614894] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1180
>[   22.621871] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966e40
>[   22.628603] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1900
>[   22.635510] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1cc0
>[   22.642188] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.648956] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde3c0
>[   22.655680] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966780
>[   22.662472] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966f00
>[   22.669148] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a36c0
>[   22.675847] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a3000
>[   22.682510] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.689761] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123180
>[   22.696231] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123f00
>[   22.702978] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.709756] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bded80
>[   22.716514] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.723410] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123240
>[   22.730072] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966840
>[   22.736914] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdee40
>[   22.743385] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   22.750358] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdee40
>[   22.757507] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.763912] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdee40
>[   22.770648] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.777603] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.784170] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.790908] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.797668] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.804452] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.811243] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.817961] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.824749] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.831271] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde900
>[   22.838313] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966540
>[   22.844970] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966840
>[   22.851801] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966f00
>[   22.858563] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.865591] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.872159] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.878924] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.885469] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.892455] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.899178] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.906029] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.912791] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde9c0
>[   22.919669] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966240
>[   22.926281] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966300
>[   22.932971] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966240
>[   22.940085] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   22.946605] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966240
>[   22.953305] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   22.959904] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c540
>[   22.966876] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c480
>[   22.973595] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde3c0
>[   22.980376] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde780
>[   22.986985] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c3c0
>[   22.993844] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a36c0
>[   23.000494] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a3000
>[   23.007463] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c180
>[   23.014179] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c0c0
>[   23.020883] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c9c0
>[   23.027658] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5cc00
>[   23.034436] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c9c0
>[   23.041392] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800da3a36c0
>[   23.047920] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde3c0
>[   23.054702] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c9c0
>[   23.061479] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c3c0
>[   23.068278] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.075008] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a0600
>[   23.081762] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.088502] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a0780
>[   23.095279] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.102037] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.108795] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.115554] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.122245] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.128902] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.135807] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.142555] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.149288] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.156049] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.162819] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a00c0
>[   23.169593] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.176330] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617c00
>[   23.183090] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617480
>[   23.189866] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617c00
>[   23.196615] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617480
>[   23.203339] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617c00
>[   23.230364] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617480
>[   23.237021] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617780
>[   23.243666] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800376170c0
>[   23.257432] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966180
>[   23.264179] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d240
>[   23.270934] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c27d7cc0
>[   23.277697] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307df00
>[   23.284477] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044cc0
>[   23.291238] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044c00
>[   23.298017] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044900
>[   23.304772] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c480
>[   23.311510] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c600
>[   23.318261] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c3c0
>[   23.406138] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb0609c0
>[   23.412890] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060780
>[   23.419514] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060480
>[   23.419624] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060780
>[   23.426161] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbf00
>[   23.433139] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbe40
>[   23.439734] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbcc0
>[   23.446493] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbb40
>[   23.447874] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbcc0
>[   23.453414] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbb40
>[   23.460192] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.466901] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db840
>[   23.473554] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.480477] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db540
>[   23.487195] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.493969] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db240
>[   23.514253] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.575047] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db0c0
>[   23.595297] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   23.601996] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db0c0
>[   24.818844] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bf85b0c0
>[   24.919991] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037617cc0
>[   24.940462] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88003771fd80
>[   24.954024] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88003771fb40
>[   24.960789] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   25.035102] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abd6c0
>[   25.048650] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abde40
>[   25.055378] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abd9c0
>[   25.062176] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202abde40
>[   25.068873] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213120d80
>[   25.075647] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9f9c0
>[   25.082372] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213120f00
>[   25.089129] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682240
>[   25.095862] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e6826c0
>[   25.102653] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682780
>[   25.109300] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e6826c0
>[   25.116181] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9fcc0
>[   25.116290] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9fe40
>[   25.123011] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060540
>[   25.129690] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848780
>[   25.136391] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848480
>[   25.143023] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800378486c0
>[   25.150006] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848c00
>[   25.156839] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060c00
>[   25.163557] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb060000
>[   25.170291] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876300
>[   25.176985] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876180
>[   25.183842] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802137a0480
>[   25.190583] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bde5c240
>[   25.192244] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1840
>[   25.197369] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1cc0
>[   25.203972] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1840
>[   25.210877] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd19c0
>[   25.217624] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbd1840
>[   25.224303] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee8763c0
>[   25.231094] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876900
>[   25.237824] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee8763c0
>[   25.244752] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee876840
>[   25.420356] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044000
>[   25.427092] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc0440c0
>[   25.433870] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044000
>[   25.440610] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044cc0
>[   25.447341] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044d80
>[   25.453963] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.460872] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848540
>[   25.467633] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.474288] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848540
>[   25.481198] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.487906] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848000
>[   25.494636] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880037848840
>[   25.501420] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213120480
>[   25.508180] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   25.514914] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30900
>[   25.521660] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   25.528466] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   25.530348] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682c00
>[   25.535200] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020e682780
>[   25.541956] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000b40
>[   25.548669] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000840
>[   25.555435] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000300
>[   25.562237] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb000000
>[   25.636602] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f448b0c0
>[   25.710815] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213794cc0
>[   25.940771] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9eb40
>[   26.048804] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9e300
>[   26.055467] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9e540
>[   26.062404] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.069158] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc6c0
>[   26.075961] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.082674] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc6c0
>[   26.089410] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.089825] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc6c0
>[   26.096202] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dc600
>[   26.102986] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800375dcb40
>[   26.109764] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802130920c0
>[   26.116518] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880213092600
>[   26.123260] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5f00
>[   26.130005] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5d80
>[   26.136760] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5c00
>[   26.143581] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5d80
>[   26.150334] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5840
>[   26.157112] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5180
>[   26.163905] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed8759c0
>[   26.170552] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5540
>[   26.177193] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde0c0
>[   26.184203] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5180
>[   26.190930] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875780
>[   26.197721] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875600
>[   26.204284] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875000
>[   26.211221] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde300
>[   26.217957] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875e40
>[   26.224733] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875480
>[   26.231498] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875000
>[   26.231863] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875480
>[   26.238288] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba480
>[   26.245159] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8802131a5180
>[   26.251914] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875300
>[   26.258657] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bad80
>[   26.265318] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba900
>[   26.272006] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bad80
>[   26.278934] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ed875300
>[   26.285670] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bad80
>[   26.292641] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c27866c0
>[   26.299278] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c2786600
>[   26.306078] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   26.312846] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bded80
>[   26.313191] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   26.319564] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bded80
>[   26.326354] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c2786780
>[   26.326732] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800c2786cc0
>[   26.333159] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdef00
>[   26.339940] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdec00
>[   26.346746] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde180
>[   26.353536] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdeb40
>[   26.357679] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde180
>[   26.360356] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdeb40
>[   26.367115] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde840
>[   26.373749] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdeb40
>[   26.380658] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bde840
>[   26.387440] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9e240
>[   26.394195] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880202bdecc0
>[   26.401021] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0f9ed80
>[   26.407731] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba900
>[   26.407970] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1bab40
>[   26.414550] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88020f1ba900
>[   26.462151] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0480
>[   26.468828] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0180
>[   26.475686] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0480
>[   26.482430] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0180
>[   26.489266] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d03c0
>[   26.496081] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0e67300
>[   26.502815] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d06c0
>[   26.509589] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d25d0a80
>[   26.570485] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0e673c0
>[   26.665505] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f303c0
>[   26.672261] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30480
>[   26.679024] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   26.685429] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30480
>[   26.692563] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800d9f30e40
>[   26.712869] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb123a80
>[   26.719633] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb1239c0
>[   26.821137] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0e67900
>[   26.821512] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bb1239c0
>[   26.949586] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c66f00
>[   26.963139] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c666c0
>[   26.976697] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c66000
>[   26.990190] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f0c666c0
>[   27.543138] wlp2s0: deauthenticating from a4:56:30:5c:e5:d1 by local choice (Reason: 3=DEAUTH_LEAVING)
>[   28.490736] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f268ef00
>[   28.497437] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f268e780
>[   28.504367] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d240
>[   28.504632] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db480
>[   28.511116] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d3c0
>[   28.517858] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db600
>[   28.524588] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db6c0
>[   28.531358] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7dbc00
>[   28.531456] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db6c0
>[   28.538067] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307dc00
>[   28.544880] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800be7db9c0
>[   28.551564] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff88021307d180
>[   28.558389] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966f00
>[   28.565195] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee9669c0
>[   28.571809] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801f268b840
>[   28.578662] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966540
>[   28.585441] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966480
>[   28.592270] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966000
>[   28.598870] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044300
>[   28.605687] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044d80
>[   28.612440] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044c00
>[   28.619190] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800bc044d80
>[   28.625884] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8801ee966cc0
>[   30.413873] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff8800cbbf5a80
>[   30.534703] [drm:drm_atomic_set_fb_for_plane] Set [FB:54] for plane state ffff880212eed180
>[   32.099145] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cbbd1d80
>[   46.405351] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eea80
>[   46.405693] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eec00
>[   46.413109] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eef00
>[   51.103458] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00200000, dig 0x10101012
>[   51.103464] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[   51.103466] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 0
>[   51.103484] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[   51.103929] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[   51.103932] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[   51.103934] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[   51.103936] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[   51.104382] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[   51.104385] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[   51.104387] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[   51.104399] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   51.105057] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[   51.105060] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[   51.105062] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[   51.105064] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[   51.109767] [drm:intel_hpd_irq_event] [CONNECTOR:39:DP-1] status updated from disconnected to connected
>[   51.109771] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   51.109943] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   51.109944] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   51.110107] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   51.110108] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.111001] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[   51.111006] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   51.111009] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[   51.111011] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[   51.111023] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   51.111027] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[   51.111031] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[   51.111035] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   51.111039] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   51.111041] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[   51.111042] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   51.111491] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[   51.111495] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[   51.111498] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[   51.111500] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[   51.116212] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   51.116218] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] probed modes :
>[   51.116220] [drm:drm_mode_debug_printmodeline] Modeline 54:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[   51.116221] [drm:drm_mode_debug_printmodeline] Modeline 60:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   51.116223] [drm:drm_mode_debug_printmodeline] Modeline 62:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[   51.116224] [drm:drm_mode_debug_printmodeline] Modeline 63:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[   51.116226] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   51.116228] [drm:drm_mode_debug_printmodeline] Modeline 57:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   51.116229] [drm:drm_mode_debug_printmodeline] Modeline 55:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[   51.116231] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[   51.116232] [drm:drm_mode_debug_printmodeline] Modeline 61:"1152x864" 60 81579 1152 1216 1336 1520 864 865 868 895 0x0 0x6
>[   51.116234] [drm:drm_mode_debug_printmodeline] Modeline 56:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[   51.116235] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   51.116237] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   51.116241] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   51.116262] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   51.116264] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[   51.116265] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   51.116418] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   51.116420] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   51.116574] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   51.116575] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   51.116577] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[   61.454986] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   61.454990] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   61.454992] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   63.620582] [drm:i915_gem_open] 
>[   63.621008] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   63.621009] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   63.673097] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b180
>[   64.781452] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060000
>[   64.787962] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060cc0
>[   64.794991] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060000
>[   64.801792] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0e653c0
>[   64.808658] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0e65480
>[   64.815292] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020d0d3840
>[   64.822124] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268ec00
>[   64.828855] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e900
>[   64.835610] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e300
>[   64.842391] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e900
>[   64.849132] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e300
>[   64.855694] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88003771f600
>[   64.862685] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060cc0
>[   64.869389] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88003771f300
>[   64.876167] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88003771f780
>[   64.882961] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88003771f300
>[   64.889739] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88003771fc00
>[   64.896595] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060e40
>[   64.903305] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e67e40
>[   64.910097] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88003771f9c0
>[   64.944032] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0e65900
>[   64.950835] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88003771f9c0
>[   64.957676] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e300
>[   64.964412] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060f00
>[   64.991491] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b180
>[   64.998351] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801fb3c1600
>[   65.944703] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202beaa80
>[   65.951558] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0de76c0
>[   65.958011] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0de7780
>[   65.964969] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bea3c0
>[   65.971781] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bea780
>[   65.978526] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bea3c0
>[   65.985263] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202beaf00
>[   65.992100] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bea3c0
>[   65.998847] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bea240
>[   66.005706] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202beaa80
>[   66.012480] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bea240
>[   66.019236] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0de7900
>[   66.025994] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0de79c0
>[   66.032738] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0de7a80
>[   66.039490] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0de7cc0
>[   66.046323] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268b900
>[   66.053120] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268b9c0
>[   66.059901] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268b900
>[   66.066671] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268b0c0
>[   66.073460] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268b840
>[   66.080211] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268b0c0
>[   66.086851] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037849180
>[   66.093830] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037849f00
>[   66.100555] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f3900
>[   66.107389] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dcc00
>[   66.114132] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dc6c0
>[   66.120932] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dcc00
>[   66.127738] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dcb40
>[   66.134485] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dcc00
>[   66.140999] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dc0c0
>[   66.147996] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dc840
>[   66.215713] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db600
>[   66.222469] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbd80
>[   66.229199] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db3c0
>[   66.235959] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbd80
>[   66.242738] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db3c0
>[   66.249479] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbc00
>[   66.256290] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db3c0
>[   66.263138] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbb40
>[   66.269765] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbe40
>[   66.276537] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbb40
>[   66.296790] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaabd80
>[   66.303640] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaabb40
>[   66.310375] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaabd80
>[   66.317122] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db9c0
>[   66.323997] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db780
>[   66.330639] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db9c0
>[   66.337470] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbf00
>[   66.344257] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db9c0
>[   66.350985] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db900
>[   66.357918] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbb40
>[   66.364536] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794cc0
>[   66.371355] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794d80
>[   66.377931] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe83c0
>[   66.432301] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8300
>[   66.439088] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe83c0
>[   66.445992] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8900
>[   66.452661] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378f9180
>[   66.473003] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794780
>[   66.486401] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794e40
>[   66.493433] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794780
>[   66.500044] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378f9180
>[   66.506895] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8900
>[   66.513658] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27866c0
>[   66.520208] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2786cc0
>[   66.527248] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27866c0
>[   66.534036] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2786000
>[   66.540831] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27866c0
>[   66.547597] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794e40
>[   66.554396] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794780
>[   66.561205] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794e40
>[   66.567963] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794780
>[   66.574733] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794e40
>[   66.588370] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794d80
>[   66.601637] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2786780
>[   66.608696] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27863c0
>[   66.615479] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2786480
>[   66.622066] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8900
>[   66.628885] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2786480
>[   66.635702] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448bc00
>[   66.642486] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b540
>[   66.649247] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448bf00
>[   66.655770] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b9c0
>[   66.662757] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448bf00
>[   66.669572] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b0c0
>[   66.676288] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b840
>[   66.683015] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2786480
>[   66.689864] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b840
>[   66.696545] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802140396c0
>[   66.703364] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802140390c0
>[   66.710131] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039c00
>[   66.716923] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039a80
>[   66.723754] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039c00
>[   66.730418] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039000
>[   66.737247] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039c00
>[   66.744022] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039000
>[   66.750814] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039d80
>[   66.757593] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039000
>[   66.764294] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d25d0480
>[   66.770913] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d25d0240
>[   66.777897] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d25d0480
>[   66.784721] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d25d0180
>[   66.791601] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d25d0480
>[   66.798236] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d25d0540
>[   66.873091] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037617780
>[   66.920395] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eeb40
>[   67.333223] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2732000
>[   67.339650] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060600
>[   67.372950] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   67.372953] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[   67.372955] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[   67.372964] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   67.372967] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[   67.372969] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[   67.372972] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   67.373045] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   67.373047] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[   67.373049] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   67.373488] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[   67.373491] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[   67.373492] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[   67.373493] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[   67.378224] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   67.378234] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] probed modes :
>[   67.378236] [drm:drm_mode_debug_printmodeline] Modeline 54:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[   67.378238] [drm:drm_mode_debug_printmodeline] Modeline 60:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[   67.378239] [drm:drm_mode_debug_printmodeline] Modeline 62:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[   67.378241] [drm:drm_mode_debug_printmodeline] Modeline 63:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[   67.378242] [drm:drm_mode_debug_printmodeline] Modeline 58:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   67.378244] [drm:drm_mode_debug_printmodeline] Modeline 57:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[   67.378245] [drm:drm_mode_debug_printmodeline] Modeline 55:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[   67.378247] [drm:drm_mode_debug_printmodeline] Modeline 59:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[   67.378248] [drm:drm_mode_debug_printmodeline] Modeline 61:"1152x864" 60 81579 1152 1216 1336 1520 864 865 868 895 0x0 0x6
>[   67.378250] [drm:drm_mode_debug_printmodeline] Modeline 56:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[   67.378251] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   67.378253] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   67.378265] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   67.378292] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   67.378294] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[   67.378295] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   67.378456] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   67.378458] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   67.378622] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   67.378624] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   67.378626] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[   67.392661] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   67.392664] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   67.392666] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   67.393528] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   67.524821] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   67.524825] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   67.524826] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   68.022314] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b9c0
>[   68.029072] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b0c0
>[   68.035766] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060600
>[   68.042317] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375d9f00
>[   68.049356] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375d96c0
>[   68.056073] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060600
>[   68.062888] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848c00
>[   68.069618] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848480
>[   68.076524] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848000
>[   68.083139] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848b40
>[   68.089896] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848000
>[   68.096686] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378480c0
>[   68.103419] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848000
>[   68.110149] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e66300
>[   68.117017] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e66900
>[   68.123719] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e66300
>[   68.130397] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e66540
>[   68.137229] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e66300
>[   68.143984] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e66600
>[   68.150795] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e666c0
>[   68.157517] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0e66600
>[   68.164304] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213193c00
>[   68.171014] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802131933c0
>[   68.177626] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213193c00
>[   68.184313] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213193e40
>[   68.191297] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213193c00
>[   68.198061] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848000
>[   68.204545] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060600
>[   68.211372] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848000
>[   68.218380] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6d80
>[   68.225140] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6cc0
>[   68.231895] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6900
>[   68.238672] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6cc0
>[   68.245446] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6900
>[   68.252232] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa66c0
>[   68.258720] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6900
>[   68.265731] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6480
>[   68.272462] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6900
>[   68.279102] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6480
>[   68.285999] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6300
>[   68.292516] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6240
>[   68.299541] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa60c0
>[   68.306326] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa6000
>[   68.313152] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed875000
>[   68.319878] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed875600
>[   68.326729] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213193c00
>[   68.333400] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378f5c00
>[   68.340181] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378f59c0
>[   68.346947] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378f5300
>[   68.353729] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378f59c0
>[   68.360302] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213193c00
>[   68.367253] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbb40
>[   68.374013] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db900
>[   68.380559] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbf00
>[   68.387320] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db900
>[   68.394229] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbf00
>[   68.401172] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db780
>[   68.407760] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbf00
>[   68.414568] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db3c0
>[   68.421337] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7dbf00
>[   68.428073] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed875900
>[   68.434853] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed8756c0
>[   68.441385] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed875900
>[   68.448401] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed8759c0
>[   68.455108] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed875900
>[   68.461630] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ed8759c0
>[   68.475413] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa8840
>[   68.502459] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa8300
>[   68.522746] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa80c0
>[   68.529633] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa8000
>[   68.536327] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7e40
>[   68.543005] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7d80
>[   68.549796] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7c00
>[   68.556781] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7b40
>[   68.563331] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa79c0
>[   68.570096] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7900
>[   68.576648] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa79c0
>[   68.590489] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa76c0
>[   68.596995] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7540
>[   68.610809] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7480
>[   68.617621] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7300
>[   68.624391] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7240
>[   68.631168] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa70c0
>[   68.637937] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7240
>[   68.644484] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa7000
>[   68.651243] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5f00
>[   68.657931] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5e40
>[   68.665021] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5c00
>[   68.671746] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5e40
>[   68.678386] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5b40
>[   68.685266] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa59c0
>[   68.691994] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5b40
>[   68.698813] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5780
>[   68.705533] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5b40
>[   68.712265] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa56c0
>[   68.719010] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5540
>[   68.725556] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa56c0
>[   68.759678] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa50c0
>[   69.992003] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787e40
>[   69.998709] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787000
>[   70.005581] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0e18600
>[   70.012400] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787540
>[   70.019131] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d0e18d80
>[   70.025939] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375dc180
>[   70.032698] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da600
>[   70.039303] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da0c0
>[   70.046460] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8600
>[   70.052912] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f89c0
>[   70.059755] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5b40
>[   70.066473] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da9c0
>[   70.073429] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46daa80
>[   70.080165] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787780
>[   70.086934] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787a80
>[   70.093667] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787780
>[   70.100447] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde23600
>[   70.107039] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde233c0
>[   70.113748] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5240
>[   70.161488] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787000
>[   70.168319] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e9c0
>[   70.175108] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268ef00
>[   70.181782] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e6829c0
>[   70.188635] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682d80
>[   70.317783] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf4240
>[   70.324643] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf4c00
>[   70.331474] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268eb40
>[   70.338286] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e900
>[   70.344910] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf4a80
>[   70.351543] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf40c0
>[   70.358303] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf4a80
>[   70.365287] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf4000
>[   70.378707] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf4a80
>[   70.459851] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bde000
>[   70.473236] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bde180
>[   70.480219] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bdeb40
>[   70.486926] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bde3c0
>[   70.493450] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bdeb40
>[   70.500578] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bde840
>[   70.507324] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202bde540
>[   70.513729] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee877840
>[   70.520785] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e0c0
>[   70.527571] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375e8480
>[   70.534300] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf4a80
>[   70.540653] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b240
>[   70.588310] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd1b40
>[   70.595206] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cb954180
>[   70.608782] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b900
>[   70.615617] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd1840
>[   70.622422] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd1600
>[   70.629143] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cb9543c0
>[   70.635719] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd19c0
>[   70.642761] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85ba80
>[   70.649711] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85bcc0
>[   70.656358] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85ba80
>[   70.670034] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b240
>[   70.683785] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd1c00
>[   70.690419] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd1cc0
>[   70.697248] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cb954840
>[   70.717784] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd1cc0
>[   70.724553] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbd19c0
>[   70.737757] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bf85b240
>[   70.744843] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cb954180
>[   71.031159] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966240
>[   71.619272] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044b40
>[   71.625774] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5e40
>[   71.632562] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5900
>[   71.639654] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5840
>[   71.646187] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5b40
>[   71.653109] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5840
>[   71.659936] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800be7db480
>[   71.666688] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800377d53c0
>[   71.673508] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800377d5c00
>[   71.680312] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800377d53c0
>[   71.686830] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800377d5c00
>[   71.693791] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5480
>[   71.700621] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5240
>[   71.707329] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5180
>[   71.714236] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5000
>[   71.720862] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa5180
>[   71.727883] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448be40
>[   71.734464] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b840
>[   71.741266] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448be40
>[   71.747995] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b0c0
>[   71.754805] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448be40
>[   71.761531] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800377d5a80
>[   71.768276] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800377d5f00
>[   71.802158] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966300
>[   71.808922] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966780
>[   71.815741] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966cc0
>[   71.822505] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966780
>[   71.829256] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee9660c0
>[   71.836035] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee9669c0
>[   71.842803] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee9660c0
>[   71.849666] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966b40
>[   71.856323] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee9660c0
>[   71.863097] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966c00
>[   71.869951] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966a80
>[   71.876590] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966c00
>[   71.883455] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee9666c0
>[   71.890146] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966c00
>[   71.896928] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378ee540
>[   71.903733] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eec00
>[   71.910436] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378ee540
>[   71.917240] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378ee480
>[   71.924137] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378ee840
>[   71.930763] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eef00
>[   71.937531] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eeb40
>[   71.944279] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f30a80
>[   71.951005] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f30180
>[   71.957873] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f30840
>[   71.957944] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f30180
>[   71.964654] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f30f00
>[   71.971417] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f309c0
>[   71.978164] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f303c0
>[   71.984906] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f309c0
>[   71.984990] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f303c0
>[   71.991628] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378eeb40
>[   71.998460] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed180
>[   72.005212] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed480
>[   72.011745] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed180
>[   72.018776] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed480
>[   72.025336] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed0c0
>[   72.032309] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da33a3c0
>[   72.039077] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da33a180
>[   72.045825] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed0c0
>[   72.052586] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da33a180
>[   72.059355] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed0c0
>[   72.066122] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448bb40
>[   72.072870] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b540
>[   72.079638] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b480
>[   72.086383] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b540
>[   72.093144] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f448b480
>[   72.099897] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213718a80
>[   72.106644] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213718c00
>[   72.113410] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802137189c0
>[   72.120168] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213718c00
>[   72.126952] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802137189c0
>[   72.133761] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c900
>[   72.140373] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c6c0
>[   72.147348] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c3c0
>[   72.153906] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5cf00
>[   72.160871] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c480
>[   72.167638] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c180
>[   72.174435] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c480
>[   72.181273] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5cc00
>[   72.188027] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5cd80
>[   72.194708] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c000
>[   72.201549] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5cb40
>[   72.208349] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c000
>[   72.215165] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5ce40
>[   72.222026] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802137189c0
>[   72.228715] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039cc0
>[   72.235484] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802140393c0
>[   72.242041] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039d80
>[   72.249038] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039e40
>[   72.255815] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039300
>[   72.262646] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802140399c0
>[   72.269441] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039300
>[   72.276032] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039900
>[   72.283040] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039a80
>[   72.289790] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880214039b40
>[   72.303423] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802140390c0
>[   72.357777] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020aaa76c0
>[   72.364678] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5ce40
>[   72.371338] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c000
>[   72.384903] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c300
>[   72.398623] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5cc00
>[   72.439178] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c300
>[   72.446004] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c480
>[   72.453005] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c0c0
>[   72.459567] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c480
>[   72.466058] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c540
>[   72.473006] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde5c480
>[   72.520602] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed480
>[   72.527286] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed540
>[   72.534035] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed6c0
>[   72.547591] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed540
>[   72.561149] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880212eed3c0
>[   72.595055] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f30f00
>[   72.615328] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9f30cc0
>[   72.662744] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378ee540
>[   72.696402] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee9663c0
>[   72.716497] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee966b40
>[   72.723347] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213718b40
>[   72.932979] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cb954480
>[   72.987402] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cb954d80
>[   73.007799] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213718b40
>[   79.488231] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f80c0
>[   79.501824] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8840
>[   79.508677] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213120d80
>[   79.515384] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213120480
>[   79.522270] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f80c0
>[   79.528989] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8900
>[   79.535752] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f80c0
>[   79.542560] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8840
>[   79.549330] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f80c0
>[   79.556113] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8f00
>[   79.562949] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f83c0
>[   79.569686] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268b9c0
>[   79.576467] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213120c00
>[   79.583257] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213120480
>[   79.590062] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268ee40
>[   79.596563] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e480
>[   79.603545] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268ee40
>[   79.610344] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e780
>[   79.617149] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268ee40
>[   79.623896] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e840
>[   79.630660] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e240
>[   79.637148] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e840
>[   79.644151] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e300
>[   79.650926] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e840
>[   79.657676] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268ef00
>[   79.664519] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e0c0
>[   79.671254] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268ef00
>[   79.677979] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682780
>[   79.684975] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e6829c0
>[   79.691488] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682b40
>[   79.698230] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682240
>[   79.705025] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037659840
>[   79.711789] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682b40
>[   79.718599] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682a80
>[   79.725502] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682b40
>[   79.732216] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682a80
>[   79.738690] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682b40
>[   79.745630] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e6826c0
>[   79.752358] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020e682240
>[   79.799771] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8840
>[   79.813329] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe86c0
>[   79.819865] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8840
>[   79.826628] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe86c0
>[   79.833549] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8840
>[   79.840325] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5180
>[   79.847058] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5840
>[   79.853878] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5180
>[   79.860683] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46dac00
>[   79.867206] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46daf00
>[   79.874199] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46dab40
>[   79.880719] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46daf00
>[   79.887728] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46dab40
>[   79.894320] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da9c0
>[   79.901005] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46dab40
>[   79.908015] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da540
>[   79.914586] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da000
>[   79.921309] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da540
>[   79.928402] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46dacc0
>[   79.934793] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f46da540
>[   79.941820] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5180
>[   79.948376] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2732b40
>[   79.955382] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2732300
>[   79.962105] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2732e40
>[   79.968864] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2732300
>[   79.975714] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe86c0
>[   79.982168] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8d80
>[   79.989125] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802129d0000
>[   79.995930] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802129d0240
>[   80.002772] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802129d0cc0
>[   80.009424] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8802129d00c0
>[   80.015935] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037617480
>[   80.022972] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037617e40
>[   80.029742] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037617480
>[   80.036515] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037617000
>[   80.043231] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037617c00
>[   80.049972] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037617a80
>[   80.056752] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24bd3c0
>[   80.063512] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24bd300
>[   80.070272] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24bd180
>[   80.077020] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24bd9c0
>[   80.083776] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24bd180
>[   80.090495] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8b40
>[   80.097254] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8a80
>[   80.103969] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8240
>[   80.110826] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8300
>[   80.117562] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8240
>[   80.124350] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27326c0
>[   80.131065] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2732c00
>[   80.137849] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27326c0
>[   80.144630] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2732600
>[   80.151113] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27326c0
>[   80.158100] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5180
>[   80.164878] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c27326c0
>[   80.171703] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202ba5180
>[   80.178169] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8e40
>[   80.185173] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe83c0
>[   80.198667] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8900
>[   80.205470] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88021307dcc0
>[   80.212323] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8900
>[   80.218979] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d9fe8240
>[   80.225829] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202beb840
>[   80.232565] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202beb240
>[   80.239425] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202beb600
>[   80.246084] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202beb780
>[   80.642874] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801fb3c1900
>[   80.649010] [drm:drm_mode_addfb2] [FB:48]
>[   80.649405] [drm:drm_mode_setcrtc] [CRTC:20]
>[   80.649412] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[   80.649414] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0)
>[   80.649418] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[   80.649420] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc2233c0
>[   80.649424] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8800907c48a0 state to ffff8800bc2233c0
>[   80.649427] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88020d283000 state to ffff8800bc2233c0
>[   80.649428] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   80.649429] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8800907c48c0 state to ffff8800bc2233c0
>[   80.649431] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8800907c48e0 state to ffff8800bc2233c0
>[   80.649432] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff8800bc2233c0
>[   80.649434] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   80.649436] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   80.649441] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[   80.649448] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   80.649449] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[   80.649451] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   80.649453] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   80.649454] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   80.649454] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   80.649456] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   80.649457] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[   80.649458] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   80.649459] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   80.649459] [drm:intel_dump_pipe_config] requested mode:
>[   80.649463] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x0 0xa
>[   80.649464] [drm:intel_dump_pipe_config] adjusted mode:
>[   80.649465] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[   80.649467] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[   80.649468] [drm:intel_dump_pipe_config] port clock: 270000
>[   80.649468] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[   80.649469] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   80.649470] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   80.649471] [drm:intel_dump_pipe_config] ips: 1
>[   80.649472] [drm:intel_dump_pipe_config] double wide: 0
>[   80.649474] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880213794e40
>[   80.651672] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc2233c0
>[   80.651677] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc2233c0
>[   80.652978] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a0780
>[   80.653698] [drm:drm_mode_setcrtc] [CRTC:24]
>[   80.653704] [drm:drm_mode_setcrtc] [CONNECTOR:39:DP-1]
>[   80.653707] [drm:intel_crtc_set_config] [CRTC:24] [FB:48] #connectors=1 (x y) (1920 0)
>[   80.653710] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[   80.653712] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[   80.653715] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   80.653718] [drm:drm_mode_debug_printmodeline] Modeline 67:"" 0 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x0 0x6
>[   80.653721] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=1
>[   80.653724] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88020f10d060
>[   80.653726] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] encoder changed, full mode switch
>[   80.653729] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8800bc048320 state to ffff88020f10d060
>[   80.653732] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88020d2d4400 state to ffff88020f10d060
>[   80.653734] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   80.653736] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8800bc048300 state to ffff88020f10d060
>[   80.653738] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] to [CRTC:24]
>[   80.653740] [drm:intel_modeset_stage_output_state] [ENCODER:38:TMDS-38] crtc changed, full mode switch
>[   80.653742] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8800bc0482e0 state to ffff88020f10d060
>[   80.653744] [drm:intel_modeset_stage_output_state] [CRTC:24] enabled, full mode switch
>[   80.653747] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff88020f10d060
>[   80.653749] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[   80.653752] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff88020d2d7400 state to ffff88020f10d060
>[   80.653754] [drm:connected_sink_compute_bpp] [CONNECTOR:39:DP-1] checking for sink bpp constrains
>[   80.653757] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 146250KHz
>[   80.653764] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[   80.653766] [drm:intel_dp_compute_config] DP link bw required 351000 available 432000
>[   80.653768] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   80.653770] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[   80.653772] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   80.653773] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   80.653775] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   80.653777] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6815744, gmch_n: 8388608, link_m: 283989, link_n: 524288, tu: 64
>[   80.653779] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   80.653781] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   80.653782] [drm:intel_dump_pipe_config] requested mode:
>[   80.653786] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x0 0x6
>[   80.653787] [drm:intel_dump_pipe_config] adjusted mode:
>[   80.653790] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x0 0x6
>[   80.653793] [drm:intel_dump_crtc_timings] crtc timings: 146250 1680 1784 1960 2240 1050 1053 1059 1089, type: 0x0 flags: 0x6
>[   80.653794] [drm:intel_dump_pipe_config] port clock: 270000
>[   80.653796] [drm:intel_dump_pipe_config] pipe src size: 1680x1050
>[   80.653798] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   80.653800] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   80.653801] [drm:intel_dump_pipe_config] ips: 0
>[   80.653803] [drm:intel_dump_pipe_config] double wide: 0
>[   80.653810] [drm:intel_display_power_get] enabling display
>[   80.653813] [drm:hsw_set_power_well] Enabling power well
>[   80.653821] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801fb3c1900
>[   80.654974] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   80.655605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[   80.656225] [drm:intel_dp_start_link_train] clock recovery OK
>[   80.658312] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[   80.685049] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[   80.685053] [drm:intel_connector_check_state] [CONNECTOR:39:DP-1]
>[   80.685056] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[   80.685058] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[   80.685060] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[   80.685061] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[   80.685062] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[   80.685063] [drm:check_crtc_state] [CRTC:20]
>[   80.685070] [drm:check_crtc_state] [CRTC:24]
>[   80.685075] [drm:check_crtc_state] [CRTC:28]
>[   80.685077] [drm:check_shared_dpll_state] WRPLL 1
>[   80.685078] [drm:check_shared_dpll_state] WRPLL 2
>[   80.685080] [drm:drm_atomic_state_clear] Clearing atomic state ffff88020f10d060
>[   80.685082] [drm:drm_atomic_state_free] Freeing atomic state ffff88020f10d060
>[   80.685115] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800375dc900
>[   80.862813] [drm:drm_mode_addfb2] [FB:67]
>[   97.156691] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5240
>[   97.163429] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5c00
>[   97.170230] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5d80
>[   97.177082] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5c00
>[   97.183721] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5300
>[   97.190450] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5c00
>[   97.197280] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5540
>[   97.204176] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5000
>[   97.210846] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde23b40
>[   97.217672] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802130920c0
>[   97.224397] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde23b40
>[   97.231162] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6e40
>[   97.237933] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6cc0
>[   97.244770] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6e40
>[   97.251342] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6780
>[   97.251460] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6e40
>[   97.258413] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6480
>[   97.265156] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6180
>[   97.271912] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde23b40
>[   97.278707] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6180
>[   97.285516] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1480
>[   97.292039] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1000
>[   97.299004] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c13c0
>[   97.305626] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1000
>[   97.312464] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb123300
>[   97.319182] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb123f00
>[   97.326128] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb123240
>[   97.332920] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a5900
>[   97.339564] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802131a59c0
>[   97.346488] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa6c0
>[   97.353296] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa480
>[   97.360101] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa540
>[   97.366887] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaac00
>[   97.386999] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb123480
>[   97.394000] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb1233c0
>[   97.400817] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb123000
>[   97.407567] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1b40
>[   97.414226] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb1233c0
>[   97.421169] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880214039780
>[   97.427881] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137189c0
>[   97.434725] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaab40
>[   97.441235] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa9c0
>[   97.448203] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa000
>[   97.455136] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa180
>[   97.461884] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa000
>[   97.468320] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa0c0
>[   97.475462] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020f1ba180
>[   97.482053] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa000
>[   97.488855] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaac00
>[   97.495692] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaaa000
>[   97.502235] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb060b40
>[   97.509432] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139ae0c0
>[   97.509540] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139aea80
>[   97.516008] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880214039840
>[   97.522839] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802140390c0
>[   97.529520] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880214039840
>[   97.536233] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880214039cc0
>[   97.543225] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802140393c0
>[   97.549922] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880214039780
>[   97.556680] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802140393c0
>[   97.563401] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800d24eca80
>[   97.570154] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139ae0c0
>[   97.576939] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800d24ec6c0
>[   97.583758] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139ae0c0
>[   97.590227] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139aea80
>[   97.597228] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682e40
>[   97.603956] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682240
>[   97.610510] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682e40
>[   97.617466] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5c9c0
>[   97.624305] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5c300
>[   97.631108] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800375dc9c0
>[   97.637613] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682b40
>[   97.644366] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682600
>[   97.651430] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682cc0
>[   97.658084] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682600
>[   97.664854] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682c00
>[   97.671781] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139aea80
>[   97.678471] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682c00
>[   97.685300] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5cc00
>[   97.691719] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5ca80
>[   97.698714] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682c00
>[   97.705600] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a03c0
>[   97.712220] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120480
>[   97.719116] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a0480
>[   97.725966] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a0d80
>[   97.732646] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a03c0
>[   97.739403] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000540
>[   97.746152] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000cc0
>[   97.752922] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000b40
>[   97.759740] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000cc0
>[   97.766434] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb0009c0
>[   97.773133] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5ce40
>[   97.780181] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213794900
>[   97.786712] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000780
>[   97.793544] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120b40
>[   97.800411] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120480
>[   97.807086] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120b40
>[   97.813921] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a03c0
>[   97.820767] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120b40
>[   97.827615] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044cc0
>[   97.834267] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da0f3480
>[   97.841013] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da0f3f00
>[   97.847858] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954e40
>[   97.854597] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954f00
>[   97.861452] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954e40
>[   97.868182] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb9540c0
>[   97.874946] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954e40
>[   97.881705] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954180
>[   97.888540] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954e40
>[   97.895400] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954180
>[   97.902017] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1f00
>[   97.908782] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1000
>[   97.915164] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1900
>[   97.922302] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1780
>[   97.929130] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1900
>[   97.935926] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5ce40
>[   97.936032] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880037849600
>[   97.942785] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800378499c0
>[   97.949619] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880037849780
>[   97.956417] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5ce40
>[   97.963364] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880202ac1840
>[   97.969899] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880202ac1540
>[   97.976723] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880202ac1840
>[   97.983454] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880202ac1b40
>[   97.990269] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880202ac1780
>[   97.996885] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880202ac19c0
>[   98.098448] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880202ba59c0
>[   98.152551] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0e67cc0
>[   99.315071] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880037849780
>[   99.321920] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880037849d80
>[   99.322031] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880037849780
>[   99.328635] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0e67cc0
>[   99.332099] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd19c0
>[   99.335373] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1a80
>[   99.342247] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1780
>[   99.349042] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880214039840
>[   99.355787] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbd1000
>[   99.362514] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801ed875d80
>[   99.368997] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801ed8756c0
>[   99.376109] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801ed875540
>[   99.382849] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0f9fa80
>[   99.389636] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0f9f900
>[   99.396328] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0e67cc0
>[   99.403116] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954180
>[   99.409972] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954c00
>[   99.416682] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0f9fc00
>[   99.423404] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb9540c0
>[   99.430169] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954cc0
>[   99.436951] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb9540c0
>[   99.443726] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0f9f600
>[   99.444241] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954a80
>[   99.450521] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb9540c0
>[   99.450801] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb954a80
>[   99.457278] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb9540c0
>[   99.464018] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da0f3480
>[   99.470787] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da0f3900
>[   99.477358] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da0f3480
>[   99.484288] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cb9540c0
>[   99.491065] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da0f3480
>[   99.497854] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213718e40
>[   99.504599] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213718d80
>[   99.511526] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da3a3f00
>[   99.518191] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0f9f600
>[   99.524978] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801f0f9fc00
>[   99.531798] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800da3a36c0
>[   99.538589] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc0446c0
>[   99.545357] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044a80
>[   99.552131] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044c00
>[   99.559031] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044a80
>[   99.565703] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044480
>[   99.572296] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044540
>[   99.579223] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1b40
>[   99.585858] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1000
>[   99.592847] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1840
>[   99.599658] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c16c0
>[   99.606335] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c13c0
>[   99.613132] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1c00
>[   99.619912] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c13c0
>[   99.626759] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1f00
>[   99.633274] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88021309d0c0
>[   99.639922] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8801fb3c1f00
>[   99.660465] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6300
>[   99.667236] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6900
>[   99.673823] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6300
>[   99.680835] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6840
>[   99.687583] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213718f00
>[   99.694336] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044840
>[   99.701081] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044d80
>[   99.707820] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044840
>[   99.714612] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213794540
>[   99.721355] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213794d80
>[   99.728126] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6300
>[   99.734773] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6d80
>[   99.741688] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020aaa6300
>[   99.748498] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213794240
>[   99.755289] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213794cc0
>[   99.762087] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044840
>[   99.768719] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb0009c0
>[   99.775678] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000780
>[   99.782537] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000a80
>[   99.789232] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000780
>[   99.795984] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000900
>[   99.802788] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000b40
>[   99.809561] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000900
>[   99.816475] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000540
>[   99.823200] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb000240
>[   99.829851] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb0006c0
>[   99.836682] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bc044840
>[   99.836751] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bb0006c0
>[   99.843458] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a03c0
>[   99.850090] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a0480
>[   99.856870] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802137a0600
>[   99.863819] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120b40
>[   99.870578] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120f00
>[   99.884184] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120c00
>[   99.890969] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193cc0
>[   99.897726] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213718f00
>[   99.911396] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193900
>[   99.918115] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193c00
>[   99.924926] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193a80
>[   99.938422] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193cc0
>[   99.972399] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800375dc180
>[  100.006278] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800375dccc0
>[  100.013019] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193cc0
>[  100.019817] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682c00
>[  100.026581] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682e40
>[  100.033501] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682cc0
>[  100.040090] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682e40
>[  100.046866] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682b40
>[  100.053616] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682e40
>[  100.060383] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682b40
>[  100.067209] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682d80
>[  100.073948] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682b40
>[  100.074006] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682d80
>[  100.080734] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682240
>[  100.087535] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193cc0
>[  100.107797] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5c300
>[  100.155253] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde5cf00
>[  100.236405] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde23b40
>[  100.710552] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800377d53c0
>[  100.717502] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2732000
>[  100.722321] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2732180
>[  100.724130] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2732000
>[  100.731090] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c27323c0
>[  100.737563] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2732000
>[  100.744630] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c27323c0
>[  100.756247] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2732e40
>[  100.758469] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c27329c0
>[  100.765112] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2732b40
>[  100.772740] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2787000
>[  100.777528] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[  100.777532] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[  100.777535] [drm:i915_gem_context_create_ioctl] HW context 2 created
>[  100.778384] [drm:i915_gem_context_destroy_ioctl] HW context 2 destroyed
>[  100.778650] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2787f00
>[  100.785408] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2787000
>[  100.792544] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c27870c0
>[  100.795810] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[  100.795814] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[  100.795816] [drm:i915_gem_context_create_ioctl] HW context 2 created
>[  100.798946] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2787cc0
>[  100.805756] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c27870c0
>[  100.813057] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde239c0
>[  100.819552] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde23a80
>[  100.826128] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde239c0
>[  100.832870] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbf5300
>[  100.839719] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800cbbf5900
>[  100.846436] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde239c0
>[  100.853337] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139ae300
>[  100.860028] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139ae6c0
>[  100.866926] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8802139aea80
>[  100.873600] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800bde239c0
>[  100.880284] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682240
>[  100.886991] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682d80
>[  100.893668] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e6826c0
>[  100.900552] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e682e40
>[  100.907207] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff88020e6826c0
>[  100.920576] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff8800c2787b40
>[  101.192046] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193a80
>[  101.198685] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193b40
>[  101.205639] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193a80
>[  101.212162] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880037848c00
>[  101.218989] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193e40
>[  101.225892] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193780
>[  101.232630] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193a80
>[  101.239270] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213193780
>[  101.246395] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120c00
>[  101.246438] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120d80
>[  101.252784] [drm:drm_atomic_set_fb_for_plane] Set [FB:66] for plane state ffff880213120b40
>[  101.252799] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120c00
>[  101.260347] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880213120d80
>[  101.260367] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120b40
>[  101.268996] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5000
>[  101.273059] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5840
>[  101.279794] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375e8540
>[  101.286492] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848b40
>[  101.293230] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802137a00c0
>[  101.300242] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120b40
>[  101.306647] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802137a03c0
>[  101.313697] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802137a00c0
>[  101.320582] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000300
>[  101.327254] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000900
>[  101.333988] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848840
>[  101.340818] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848000
>[  101.347425] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848c00
>[  101.354328] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8240
>[  101.361070] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8840
>[  101.367827] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8900
>[  101.374836] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802146add80
>[  101.381515] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed8756c0
>[  101.388255] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875e40
>[  101.394817] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875000
>[  101.401814] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875cc0
>[  101.408601] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875300
>[  101.415352] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875780
>[  101.421770] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875300
>[  101.428951] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802146add80
>[  101.435619] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039180
>[  101.442347] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039840
>[  101.449219] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039b40
>[  101.455771] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039840
>[  101.462409] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802140390c0
>[  101.469331] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039840
>[  101.475920] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802140390c0
>[  101.482986] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802140393c0
>[  101.489729] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802140390c0
>[  101.496510] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb0606c0
>[  101.503195] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060f00
>[  101.509728] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb0606c0
>[  101.516862] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060840
>[  101.523588] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb0606c0
>[  101.530278] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  101.537171] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060b40
>[  101.543789] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  101.550579] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966f00
>[  101.557341] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966540
>[  101.570709] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213794240
>[  101.577535] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213794900
>[  101.584441] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213794240
>[  101.591290] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213092d80
>[  101.597905] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213794240
>[  101.604504] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa66c0
>[  101.611377] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa6c00
>[  101.618023] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa66c0
>[  101.625090] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa6540
>[  101.631681] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa63c0
>[  101.638509] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa60c0
>[  101.645174] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa6780
>[  101.651909] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa60c0
>[  101.665616] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801fb3c1e40
>[  101.679094] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801fb3c1840
>[  101.685797] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801fb3c1e40
>[  101.692425] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801fb3c1000
>[  101.699310] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801fb3c1e40
>[  101.706066] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801fb3c1000
>[  101.726487] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044540
>[  101.787291] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  101.794193] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  101.801055] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb1236c0
>[  101.807482] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123840
>[  101.814509] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123f00
>[  101.821214] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123840
>[  101.828002] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb1239c0
>[  101.834590] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123900
>[  101.848301] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213718d80
>[  101.861660] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213718e40
>[  101.868530] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123900
>[  101.875381] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213718e40
>[  101.882111] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8840
>[  101.888966] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8540
>[  101.909106] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8000
>[  101.949637] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d24ec480
>[  101.956570] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f3f00
>[  101.963247] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954c00
>[  101.970083] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954600
>[  101.976910] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954300
>[  102.051196] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954780
>[  102.085077] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954180
>[  102.294494] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375fd9c0
>[  102.294613] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375fd000
>[  102.298328] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd1780
>[  103.071852] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771f900
>[  103.078593] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771fd80
>[  103.085440] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771f900
>[  103.085518] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771fd80
>[  103.092219] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771f780
>[  103.099015] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea900
>[  103.105776] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bead80
>[  103.106137] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea900
>[  103.112580] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea240
>[  103.119399] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea900
>[  103.126184] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea240
>[  103.133073] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea6c0
>[  103.139706] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea240
>[  103.146512] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202beacc0
>[  103.153334] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bea240
>[  103.160172] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771f780
>[  103.166990] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213121c00
>[  103.173670] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771f780
>[  103.180502] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954840
>[  103.187044] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954e40
>[  103.193997] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954780
>[  103.200823] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954240
>[  103.207563] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954780
>[  103.214373] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb9549c0
>[  103.221246] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954d80
>[  103.227869] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954600
>[  103.234489] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954f00
>[  103.241422] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954600
>[  103.248299] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954cc0
>[  103.254792] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954b40
>[  103.336359] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f448b900
>[  103.397505] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5cd80
>[  103.404163] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c000
>[  103.410890] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c9c0
>[  103.424469] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c000
>[  103.431101] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c300
>[  103.438019] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c000
>[  103.444794] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c6c0
>[  103.451590] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c000
>[  103.458352] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c6c0
>[  103.465244] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5cc00
>[  103.471653] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c6c0
>[  103.478632] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5ca80
>[  103.485459] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c6c0
>[  103.492219] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5ca80
>[  103.499176] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f448b900
>[  103.505723] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5ca80
>[  103.512511] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5000
>[  103.519063] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5840
>[  103.526274] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5600
>[  103.532922] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5cc0
>[  103.539262] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5600
>[  103.546318] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5c00
>[  103.553120] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5300
>[  103.559894] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5180
>[  103.566718] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732540
>[  103.573380] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732d80
>[  103.580138] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732c00
>[  103.586935] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732000
>[  103.593615] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732180
>[  103.600400] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732cc0
>[  103.607139] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5300
>[  103.613994] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5e40
>[  103.627499] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5180
>[  103.634276] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5ca80
>[  104.289574] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8e40
>[  104.314016] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde236c0
>[  105.111606] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c927180
>[  105.876959] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c925780
>[  106.127820] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c907b40
>[  106.127854] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c907a80
>[  106.204041] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb9540c0
>[  106.204091] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cb954b40
>[  106.227034] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c906f00
>[  106.227067] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c906e40
>[  106.366733] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f3840
>[  106.366779] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800da0f39c0
>[  106.391883] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954c00
>[  106.392043] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cb954f00
>[  106.424951] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c907900
>[  106.424985] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c9079c0
>[  106.458177] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c9b89c0
>[  106.458693] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c9b8900
>[  106.554331] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c9b8780
>[  106.554376] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c9b8900
>[  106.561490] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c9b8600
>[  106.561534] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c9b8900
>[  106.591808] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c9b7c00
>[  106.591851] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c9b7b40
>[  106.625163] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c925d80
>[  106.625196] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c925e40
>[  106.750551] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c905900
>[  106.750586] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c905840
>[  106.760924] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c905240
>[  106.760957] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c905840
>[  106.790669] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732900
>[  106.790698] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800c2732d80
>[  106.822492] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c908840
>[  106.822534] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c908900
>[  106.855964] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c904240
>[  106.855999] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c904180
>[  106.972038] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c903300
>[  106.972073] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c903240
>[  106.987556] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c904180
>[  106.987658] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c903240
>[  112.350868] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba56c0
>[  112.350896] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880202ba5180
>[  113.050867] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d25d0a80
>[  113.050895] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d25d0d80
>[  113.682808] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771f540
>[  113.682835] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88003771ff00
>[  114.130322] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bdef00
>[  114.130349] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880202bded80
>[  115.115323] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88008c8fcc00
>[  115.115361] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88008c8fcb40
>[  115.148344] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044540
>[  115.148381] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bc0449c0
>[  115.249150] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23a80
>[  115.249180] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bde23480
>[  115.249224] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23a80
>[  115.249241] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bde23480
>[  115.444344] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f448b540
>[  115.444392] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801f448b3c0
>[  115.455382] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d277db40
>[  115.455421] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d277da80
>[  115.482212] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d277d6c0
>[  115.482243] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d277da80
>[  115.673620] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaaacc0
>[  115.673659] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88020aaaa6c0
>[  116.912312] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dc300
>[  116.912339] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800375dc240
>[  122.802473] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d25d0480
>[  122.802499] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d25d0000
>[  126.362222] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682780
>[  126.368843] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e6826c0
>[  126.375617] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682780
>[  126.382367] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e6829c0
>[  126.389114] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682780
>[  126.395902] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e6823c0
>[  126.402757] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682e40
>[  126.409520] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e6823c0
>[  126.416323] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682240
>[  126.423111] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e6823c0
>[  126.429902] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682240
>[  126.436745] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da3a36c0
>[  126.443474] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682240
>[  126.450223] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732840
>[  126.457031] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27329c0
>[  126.463870] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732840
>[  126.470466] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732240
>[  126.477383] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732840
>[  126.484249] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732c00
>[  126.490916] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732840
>[  126.497483] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732000
>[  126.504523] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732180
>[  126.511219] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732000
>[  126.517973] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732300
>[  126.524535] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27326c0
>[  126.531555] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732d80
>[  126.538314] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682240
>[  126.545148] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732d80
>[  126.551822] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213193cc0
>[  126.558357] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213193840
>[  126.565397] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131939c0
>[  126.572194] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131933c0
>[  126.578989] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131939c0
>[  126.585738] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213193f00
>[  126.592314] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213193a80
>[  126.599311] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732d80
>[  126.606103] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213193a80
>[  126.612923] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120240
>[  126.619648] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120e40
>[  126.626353] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120c00
>[  126.633197] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213193a80
>[  126.639919] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213120c00
>[  126.660158] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8cc0
>[  126.687319] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617e40
>[  126.694264] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617d80
>[  126.700880] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617480
>[  126.707642] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617d80
>[  126.714444] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  126.721256] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617d80
>[  126.728045] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  126.734881] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617c00
>[  126.741547] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  126.748356] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848480
>[  126.755064] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848d80
>[  126.761889] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848480
>[  126.768455] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848d80
>[  126.775394] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848480
>[  126.782191] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848540
>[  126.788965] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848480
>[  126.795777] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848540
>[  126.802557] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848480
>[  126.809494] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848a80
>[  126.816174] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848e40
>[  126.822885] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fe8e40
>[  126.829387] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f780
>[  126.836422] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f240
>[  126.843263] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9ff00
>[  126.850020] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f3c0
>[  126.856688] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9ff00
>[  126.863485] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fcc0
>[  126.870253] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fa80
>[  126.877023] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  126.883824] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac19c0
>[  126.890600] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac13c0
>[  126.897517] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1cc0
>[  126.904174] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1a80
>[  126.910950] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1f00
>[  126.917767] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1540
>[  126.924470] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1f00
>[  126.931126] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1840
>[  126.938005] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1f00
>[  126.944774] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1840
>[  126.951595] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1780
>[  126.958349] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1840
>[  126.965113] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1180
>[  126.971619] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1840
>[  126.978447] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1180
>[  126.985399] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848b40
>[  126.992194] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848c00
>[  126.998814] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  127.005638] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848c00
>[  127.012454] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  127.019026] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000840
>[  127.026002] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000300
>[  127.032570] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000240
>[  127.039742] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb0006c0
>[  127.046393] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000240
>[  127.053250] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000a80
>[  127.059907] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000240
>[  127.066718] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb0003c0
>[  127.073321] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000900
>[  127.080598] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  127.087122] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1180
>[  127.093802] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  127.100628] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044480
>[  127.107605] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044780
>[  127.114184] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044c00
>[  127.120968] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044000
>[  127.127787] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044c00
>[  127.134573] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044900
>[  127.141175] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044540
>[  127.148193] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0446c0
>[  127.154855] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044540
>[  127.161678] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044cc0
>[  127.168495] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  127.175244] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  127.182028] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044300
>[  127.188825] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  127.195410] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044a80
>[  127.202410] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123900
>[  127.209149] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123000
>[  127.215951] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123e40
>[  127.222746] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123000
>[  127.229570] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123a80
>[  127.236363] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123540
>[  127.243109] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123a80
>[  127.249909] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123cc0
>[  127.256667] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123a80
>[  127.263499] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123480
>[  127.270272] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123180
>[  127.276999] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123480
>[  127.283852] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378f9b40
>[  127.290602] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000900
>[  127.297402] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000a80
>[  127.304145] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000900
>[  127.608528] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  127.615231] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044cc0
>[  127.622000] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  127.628688] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044cc0
>[  127.635343] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044540
>[  127.642391] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044cc0
>[  127.649282] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044900
>[  127.656054] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044cc0
>[  127.662732] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044900
>[  127.669624] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044000
>[  127.676301] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044900
>[  127.683229] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044480
>[  127.689922] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044900
>[  127.696595] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044480
>[  127.703385] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044d80
>[  127.777841] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde233c0
>[  127.784681] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  127.791643] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23300
>[  127.798248] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23180
>[  127.805033] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23300
>[  127.811816] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  127.818457] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23300
>[  127.825367] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044d80
>[  127.832166] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b900
>[  127.838862] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85ba80
>[  127.845736] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b300
>[  127.852566] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b240
>[  127.859255] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b300
>[  127.866131] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85be40
>[  127.872830] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b300
>[  127.879711] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b480
>[  127.886394] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b000
>[  127.893015] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac19c0
>[  127.900104] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848b40
>[  127.906725] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848840
>[  127.913551] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848f00
>[  127.920421] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848a80
>[  127.927211] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848f00
>[  127.934019] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848540
>[  127.940715] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848f00
>[  127.947435] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848d80
>[  127.954277] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848f00
>[  127.961032] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848d80
>[  127.967548] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617000
>[  127.974515] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617a80
>[  127.981352] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617180
>[  127.988141] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd240
>[  127.994612] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617a80
>[  128.001565] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617900
>[  128.008371] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617a80
>[  128.015203] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800376176c0
>[  128.021857] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617300
>[  128.028888] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800376176c0
>[  128.035626] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617780
>[  128.042300] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800376176c0
>[  128.049211] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848d80
>[  128.055963] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  128.062689] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fcc0
>[  128.069485] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  128.076435] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  128.083090] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f3c0
>[  128.089806] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f000
>[  128.096620] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f780
>[  128.103341] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f000
>[  128.110181] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  128.116922] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fe40
>[  128.123671] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f840
>[  128.130338] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f9c0
>[  128.137223] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f840
>[  128.144041] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f900
>[  128.150585] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fd80
>[  128.157630] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f900
>[  128.164432] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b000
>[  128.171156] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044d80
>[  128.177923] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786cc0
>[  128.184699] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786a80
>[  128.191424] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786cc0
>[  128.198216] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786540
>[  128.204985] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786cc0
>[  128.211760] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786480
>[  128.218416] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27860c0
>[  128.225345] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786480
>[  128.232196] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786e40
>[  128.238914] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786480
>[  128.245738] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27863c0
>[  128.252670] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044d80
>[  128.259274] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27863c0
>[  128.266165] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307d240
>[  128.272982] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307d3c0
>[  128.279471] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307d240
>[  128.286574] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307dc00
>[  128.293285] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307d240
>[  128.651822] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b3c0
>[  128.658529] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85bd80
>[  128.665488] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b480
>[  128.672364] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85bf00
>[  128.678875] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b480
>[  128.685716] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b600
>[  128.692180] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b480
>[  128.699278] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b240
>[  128.706040] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b780
>[  128.712753] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b900
>[  128.719541] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b780
>[  128.726485] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b0c0
>[  128.733094] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b780
>[  128.739809] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307d240
>[  128.746600] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  128.753406] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23180
>[  128.760271] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde236c0
>[  128.767113] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde239c0
>[  128.767133] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23b40
>[  128.767222] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde236c0
>[  128.767295] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde239c0
>[  128.773734] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde23a80
>[  128.773749] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde236c0
>[  128.780542] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde23e40
>[  128.780563] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23a80
>[  128.787408] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde23000
>[  128.787421] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bde23e40
>[  128.794222] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bde23f00
>[  128.801034] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88021307d240
>[  128.807809] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d24bd000
>[  128.814600] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037659f00
>[  128.821428] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037659840
>[  128.828300] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8900
>[  128.835072] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  128.841875] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8900
>[  128.848792] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8600
>[  128.903450] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800376599c0
>[  128.944214] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044900
>[  128.950972] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044780
>[  128.957680] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044900
>[  128.964549] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044e40
>[  128.971376] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044c00
>[  128.977925] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bb060b40
>[  128.984931] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044e40
>[  128.984951] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044b40
>[  128.991547] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bc044540
>[  128.991564] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044e40
>[  128.991681] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044b40
>[  128.998523] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.005225] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.012043] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.018874] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.025647] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.032184] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.039181] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.045945] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.052703] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.059449] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.065978] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.072992] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.113601] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.120359] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.127130] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.133722] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.140719] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.147293] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.154343] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.161130] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.167950] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.174767] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044180
>[  129.181377] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0449c0
>[  129.188462] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc0440c0
>[  129.188477] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc044540
>[  129.188586] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc0449c0
>[  129.188597] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bc0440c0
>[  129.195257] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.195270] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bc0449c0
>[  129.202143] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.209016] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.215542] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.222310] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.229284] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.236045] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.242797] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.249309] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.256231] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.263115] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.601223] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.607874] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.614661] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.621559] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.628349] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044cc0
>[  129.635134] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8cc0
>[  129.641652] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8d80
>[  129.648455] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8cc0
>[  129.655202] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8d80
>[  129.661928] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8cc0
>[  129.668685] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8d80
>[  129.675454] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8cc0
>[  129.682215] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8d80
>[  129.688986] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8cc0
>[  129.695713] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8d80
>[  129.695771] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8cc0
>[  129.702719] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8d80
>[  129.709559] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc0440c0
>[  129.709640] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044300
>[  129.716382] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc0440c0
>[  129.723346] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.729922] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044c00
>[  129.736758] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800bc044540
>[  129.743681] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.750230] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.757017] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.763808] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.770608] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.777424] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.784245] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.791055] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.797643] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.804623] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.811445] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.818234] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.838664] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.845235] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.852225] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.859025] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.865597] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.872587] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.879411] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.886186] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.892992] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.899547] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.906555] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.913129] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.920126] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.926928] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.933565] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.940254] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.947432] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.954021] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.974404] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.981010] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  129.987982] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  129.994800] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  130.001574] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  130.008379] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  130.014988] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  130.021966] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  130.028782] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  130.035579] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  130.049171] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  130.055985] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9fb40
>[  130.062813] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  130.123951] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9f900
>[  130.130543] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  130.137513] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9f900
>[  130.144085] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9ff00
>[  130.150861] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f0f9f900
>[  130.157640] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378483c0
>[  130.164400] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848f00
>[  130.171479] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378480c0
>[  130.178221] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848f00
>[  130.184878] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378480c0
>[  130.191739] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848300
>[  130.198201] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800378480c0
>[  130.205169] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848300
>[  130.211766] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848540
>[  130.218705] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848300
>[  130.225471] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848480
>[  130.232018] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848300
>[  130.239010] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848480
>[  130.245785] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848240
>[  130.252621] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848480
>[  130.259410] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848240
>[  130.266146] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.272880] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848240
>[  130.279672] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.293305] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.299885] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.313698] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.327188] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.367996] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.374791] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.388402] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.395208] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.402025] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.415666] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.476678] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.483704] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.490438] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.497183] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.503725] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.510677] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.517471] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.524242] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.531035] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.544615] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  130.578570] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848cc0
>[  130.598922] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848a80
>[  134.682721] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.689221] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.695975] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.702728] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.709495] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.716251] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.723297] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.730000] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.736763] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.743538] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.750272] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.757042] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.763801] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.770557] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.777329] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.784096] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.790862] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.797631] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.804381] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.811120] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.817875] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.824614] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.831390] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.838150] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.844891] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.851663] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.858421] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.865177] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.871931] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.878707] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.885443] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.892217] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.898973] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.905729] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.912488] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.932761] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.939511] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.946269] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.959756] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.966517] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.973271] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.980059] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  134.986825] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  134.993512] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  135.000397] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f86c0
>[  135.006838] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8780
>[  135.013978] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800da0f8000
>[  135.020714] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801f268e300
>[  135.027449] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.034198] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.040950] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.047721] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.054466] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.061233] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.067976] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.074755] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.088239] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.095009] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.101776] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.135549] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.149063] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.155840] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.162613] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.169396] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.176188] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.182969] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.189754] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.196561] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.203328] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.210075] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.216840] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.223577] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.230352] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.237094] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.257383] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.264129] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.284392] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.291165] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.297704] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.311440] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.318204] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.324946] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.345209] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.399254] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.406012] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.412762] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.419507] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.426252] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.432802] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.439793] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.446577] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.453310] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.460091] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.466821] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.473591] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.480360] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.493926] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.507399] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.520902] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.527441] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd240
>[  135.534436] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd3c0
>[  135.581728] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd0c0
>[  135.608772] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abdcc0
>[  135.615505] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd0c0
>[  135.622041] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd300
>[  135.642590] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abdc00
>[  135.676371] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abdb40
>[  135.811490] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abdc00
>[  135.845276] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abdb40
>[  141.233123] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880037848480
>[  141.239908] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd000
>[  141.246753] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abdc00
>[  141.253464] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd000
>[  141.260007] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd180
>[  141.267009] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abd000
>[  141.273600] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abdc00
>[  141.273617] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd6c0
>[  141.280646] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff880202abde40
>[  141.280661] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abdc00
>[  141.287316] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880202abd6c0
>[  141.287357] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abde40
>[  141.287468] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abdc00
>[  141.294165] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.300872] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.307770] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378483c0
>[  141.314429] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.321229] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8180
>[  141.327784] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8840
>[  141.334608] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848240
>[  141.341613] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8a80
>[  141.348071] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.355233] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.361988] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.368777] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.375062] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.381787] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.388803] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.395335] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.402135] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.408874] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.415595] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.422343] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.429129] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.435883] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.483527] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.490212] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.496912] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.503601] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.510530] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.517141] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.524204] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8e40
>[  141.530946] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f80c0
>[  141.537373] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.544359] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.551132] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.557914] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.564717] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.571480] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.578283] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.585089] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.591899] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.598667] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.605460] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.612229] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.619032] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.625839] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.632605] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.639388] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.646176] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.652947] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.659714] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.666466] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.673249] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.680028] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.686792] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.693576] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.700333] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.707096] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  141.713839] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abda80
>[  141.747660] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd540
>[  142.568863] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801f268ecc0
>[  145.559417] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.566044] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.572804] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.579570] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.586344] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.593110] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.599883] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.606678] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.613480] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.620307] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.627117] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.633910] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.640720] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.647510] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.654337] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.661149] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.667945] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.674723] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.681511] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.688307] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.695077] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.701888] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23840
>[  145.708683] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23780
>[  145.715504] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.722292] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.735846] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.749448] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.756253] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.763075] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.769873] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.776675] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.783462] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.790247] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.797014] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.803661] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.810589] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.817386] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.824192] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.830992] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.837795] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.844597] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.851400] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.858224] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.865018] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.871843] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.878637] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.885464] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.892222] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.899023] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.905826] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.912629] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.919351] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.926173] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.933012] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  145.939811] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f480
>[  145.946637] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  145.960133] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  145.966659] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  145.973415] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  145.980406] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  145.987161] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  145.993977] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  146.000772] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  146.007609] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  146.014153] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  146.020877] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  146.027650] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  146.034387] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  146.041161] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060300
>[  146.047917] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060000
>[  146.394552] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.143293] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.150039] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.156775] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.163524] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.170305] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.177055] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.183826] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.190601] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.197345] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.204124] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.210906] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.217673] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.224448] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.231214] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.251554] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.265081] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.271869] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.278646] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.285415] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.292176] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.298945] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.305699] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.312459] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.319209] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.325964] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  147.332716] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9fb40
>[  147.346234] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0f9f300
>[  148.654587] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88020f1ba180
>[  157.000279] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802146add80
>[  157.000314] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bf85b000
>[  157.138422] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85bb40
>[  157.277793] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bf85be40
>[  157.561362] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23600
>[  157.561400] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800bde239c0
>[  157.597556] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bf85b000
>[  157.682313] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23300
>[  157.682354] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde23b40
>[  158.126846] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617a80
>[  158.126881] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037617300
>[  158.160562] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8840
>[  158.160594] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8600
>[  158.284284] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8d80
>[  158.284317] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8600
>[  158.296006] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039b40
>[  158.296040] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039c00
>[  158.328242] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037880600
>[  158.328357] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8d80
>[  158.361524] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1f00
>[  158.361571] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1b40
>[  158.452706] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039cc0
>[  158.452749] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039e40
>[  158.464350] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039a80
>[  158.464385] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880214039e40
>[  158.495050] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed8753c0
>[  158.495077] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed8750c0
>[  158.633289] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268b240
>[  158.633334] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268ba80
>[  158.660770] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb0606c0
>[  158.660928] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac13c0
>[  158.694322] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee9666c0
>[  158.694354] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966840
>[  158.803670] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268b3c0
>[  158.803706] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268bf00
>[  158.826564] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba5840
>[  158.826592] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba50c0
>[  158.860279] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966c00
>[  158.860387] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abdf00
>[  158.962584] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd300
>[  158.962774] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966840
>[  158.991807] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba5240
>[  158.991840] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba5180
>[  159.024947] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802137a0780
>[  159.025063] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268ef00
>[  159.120642] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268e780
>[  159.120683] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268ef00
>[  159.129710] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268e9c0
>[  159.129744] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268ef00
>[  159.158146] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d24bd9c0
>[  159.158180] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d24bd0c0
>[  159.270886] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba5180
>[  159.270960] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba50c0
>[  159.291005] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bebb40
>[  159.291144] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202beb9c0
>[  159.323300] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb0006c0
>[  159.323336] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb000780
>[  159.420033] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848540
>[  159.420067] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378480c0
>[  159.429419] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848300
>[  159.429449] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378480c0
>[  159.457933] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378f9600
>[  159.458046] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202beb780
>[  159.577304] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba5780
>[  159.577347] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba53c0
>[  159.590305] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966c00
>[  159.590337] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966240
>[  159.623120] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966f00
>[  159.623150] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966240
>[  159.722681] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee9660c0
>[  159.722722] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966240
>[  159.732078] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966300
>[  159.732121] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966240
>[  159.756931] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5600
>[  159.756963] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a59c0
>[  159.868500] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5a80
>[  159.868551] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a59c0
>[  159.889409] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba53c0
>[  159.889443] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268ba80
>[  159.922076] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a59c0
>[  159.922107] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dc240
>[  160.002132] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dc300
>[  160.002170] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dc240
>[  160.964464] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268b000
>[  160.964490] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268b3c0
>[  165.093289] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27866c0
>[  165.093345] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786540
>[  165.541501] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268b6c0
>[  165.541525] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268b780
>[  165.619261] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268bd80
>[  165.619291] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268b780
>[  165.639603] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2787840
>[  165.639747] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d25d0180
>[  165.673155] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d25d0f00
>[  165.673190] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d25d0180
>[  165.757444] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d24bd3c0
>[  165.757484] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d24bd180
>[  165.772455] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d24bde40
>[  165.772491] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d24bd180
>[  165.804708] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5cc0
>[  165.804744] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5300
>[  165.903590] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5180
>[  165.903633] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5300
>[  165.913060] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307dd80
>[  165.913111] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021307d3c0
>[  165.937884] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966540
>[  165.937919] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966840
>[  165.970437] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966e40
>[  165.970468] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966840
>[  166.071402] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268e3c0
>[  166.071435] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268eb40
>[  166.080607] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802129d0cc0
>[  166.080640] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802129d0000
>[  166.106212] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0e676c0
>[  166.106344] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0e67480
>[  166.140171] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268ec00
>[  166.140194] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268ecc0
>[  166.250865] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213794d80
>[  166.250894] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213794540
>[  166.272206] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268e300
>[  166.272235] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268e600
>[  166.306091] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0e67540
>[  166.306123] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0e67d80
>[  166.419265] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966b40
>[  166.419307] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966c00
>[  166.438985] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123180
>[  166.439020] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123600
>[  166.471693] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ee966c00
>[  166.471723] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb123600
>[  166.573654] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771fc00
>[  166.573699] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771fb40
>[  166.604131] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848000
>[  166.604159] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848840
>[  168.064811] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802129d0000
>[  168.064843] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802129d0240
>[  168.097239] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682240
>[  168.097274] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020e682b40
>[  168.234806] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800378480c0
>[  168.234849] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848840
>[  168.264048] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213092780
>[  168.264080] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802130920c0
>[  168.396471] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880037848840
>[  168.396509] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802130920c0
>[  168.406739] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771ff00
>[  168.406774] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771fc00
>[  168.430567] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268e840
>[  168.430911] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f268e480
>[  168.572805] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786cc0
>[  168.572837] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786e40
>[  168.597535] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802139ae0c0
>[  168.597720] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9f30840
>[  168.631141] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802139aea80
>[  168.631186] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802139ae0c0
>[  168.740391] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213718cc0
>[  168.740419] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802139ae0c0
>[  168.762321] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abd480
>[  168.762350] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202abdf00
>[  168.876081] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771fd80
>[  168.876120] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88003771f780
>[  169.260686] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5cb40
>[  169.260715] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c540
>[  169.294679] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88021309d0c0
>[  169.294709] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c540
>[  169.401367] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802137949c0
>[  169.401406] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213794cc0
>[  169.427782] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f3480
>[  169.427813] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375fdc00
>[  169.538795] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875540
>[  169.538823] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875480
>[  169.560898] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0e66540
>[  169.560935] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0e669c0
>[  169.697405] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375d9cc0
>[  169.697448] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375d9f00
>[  169.727423] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd1a80
>[  169.727533] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f46dab40
>[  169.860095] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875780
>[  169.860125] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801ed875300
>[  169.892837] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060600
>[  169.892868] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bb060780
>[  169.996709] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880212eed600
>[  169.996758] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880212eed0c0
>[  170.024252] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bde9c0
>[  170.024280] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bdec00
>[  170.160934] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf4e40
>[  170.160966] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf4b40
>[  170.190592] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf4a80
>[  170.190623] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf4b40
>[  170.326827] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954300
>[  170.326866] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954240
>[  170.356210] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802136cdd80
>[  170.356240] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cb954240
>[  170.488010] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1540
>[  170.488040] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ac1d80
>[  170.521787] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786480
>[  170.521818] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2786cc0
>[  170.623125] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bde780
>[  170.623158] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bde0c0
>[  170.654300] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bdecc0
>[  170.654332] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bde0c0
>[  170.757122] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27326c0
>[  170.757157] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c27323c0
>[  170.819299] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c2732c00
>[  170.819413] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020aaa6840
>[  171.384259] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f0e67e40
>[  171.517666] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8801f46dad80
>[  171.948044] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880213718f00
>[  171.948183] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202beb9c0
>[  171.981829] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5780
>[  171.981861] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a53c0
>[  172.110504] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba5b40
>[  172.110534] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba59c0
>[  172.119237] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba5240
>[  172.119266] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202ba59c0
>[  172.146629] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800377d5900
>[  172.146659] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800377d53c0
>[  172.179351] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd10c0
>[  172.179384] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd1840
>[  172.270076] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd1000
>[  172.270102] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd1840
>[  172.282027] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd1900
>[  172.282055] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbd1840
>[  172.311385] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800377d5900
>[  172.311413] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800377d5780
>[  172.418976] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800377d5900
>[  172.419008] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800377d5780
>[  172.443156] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dc840
>[  172.443186] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dc3c0
>[  172.475944] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dcb40
>[  172.475976] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375dc3c0
>[  172.540038] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fecb40
>[  172.540071] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d9fecf00
>[  172.547432] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00200000, dig 0x10101012
>[  172.547439] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  172.547442] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 0
>[  172.547472] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  172.547732] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  172.547737] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  172.547740] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  172.547746] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  172.547755] [drm:intel_hpd_irq_event] [CONNECTOR:39:DP-1] status updated from connected to disconnected
>[  172.547757] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  172.547928] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  172.547930] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  172.548089] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  172.548092] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  172.549806] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[  172.549811] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  172.549814] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[  172.549817] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[  172.549830] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  172.549834] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[  172.549837] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  172.549841] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  172.549844] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  172.549846] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[  172.549848] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  172.549852] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[  172.549859] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  172.549860] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[  172.549862] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  172.550035] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  172.550037] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  172.550189] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  172.550191] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  172.550193] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[  172.558128] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375fdc00
>[  172.558165] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375fd9c0
>[  172.576313] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5300
>[  172.576343] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802131a5540
>[  172.694531] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375fd240
>[  172.694563] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375fdb40
>[  172.709885] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202beb900
>[  172.709921] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff880202bebf00
>[  172.743185] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5cb40
>[  172.743221] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5cc00
>[  172.855126] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802137a00c0
>[  172.855157] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8802137a03c0
>[  172.877049] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c600
>[  172.877079] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800bde5c180
>[  173.285826] [drm:drm_mode_setcrtc] [CRTC:24]
>[  173.285829] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  173.285831] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  173.285833] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801ce78d780
>[  173.285835] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] to [NOCRTC]
>[  173.285836] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] encoder changed, full mode switch
>[  173.285839] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880090462cc0 state to ffff8801ce78d780
>[  173.285841] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800c837fc00 state to ffff8801ce78d780
>[  173.285842] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  173.285843] [drm:intel_modeset_stage_output_state] [ENCODER:38:TMDS-38] crtc changed, full mode switch
>[  173.285845] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880090462ce0 state to ffff8801ce78d780
>[  173.285846] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff8800c837f800 state to ffff8801ce78d780
>[  173.285847] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880090462d00 state to ffff8801ce78d780
>[  173.285849] [drm:intel_modeset_stage_output_state] [CRTC:24] disabled, full mode switch
>[  173.285850] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff8801ce78d780
>[  173.285852] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  173.288058] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800378f59c0
>[  173.288068] [drm:intel_display_power_put] disabling display
>[  173.288070] [drm:hsw_set_power_well] Requesting to disable the power well
>[  173.288074] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[  173.288076] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[  173.288078] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  173.288079] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[  173.288080] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[  173.288081] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[  173.288082] [drm:check_crtc_state] [CRTC:20]
>[  173.288088] [drm:check_crtc_state] [CRTC:24]
>[  173.288088] [drm:check_crtc_state] [CRTC:28]
>[  173.288089] [drm:check_shared_dpll_state] WRPLL 1
>[  173.288091] [drm:check_shared_dpll_state] WRPLL 2
>[  173.288092] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801ce78d780
>[  173.288094] [drm:drm_atomic_state_free] Freeing atomic state ffff8801ce78d780
>[  173.288106] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800da0f8000
>[  173.288426] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8d80
>[  173.288490] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8600
>[  173.288506] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8d80
>[  173.288518] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8600
>[  173.288530] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8d80
>[  173.288675] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800da0f8600
>[  173.291281] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801ed875240
>[  173.294389] [drm:drm_mode_addfb2] [FB:46]
>[  173.294792] [drm:drm_mode_setcrtc] [CRTC:20]
>[  173.294799] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[  173.294802] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[  173.294805] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[  173.294807] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801ce78dcc0
>[  173.294811] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880090462e00 state to ffff8801ce78dcc0
>[  173.294813] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800c837fc00 state to ffff8801ce78dcc0
>[  173.294815] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  173.294817] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880090462e20 state to ffff8801ce78dcc0
>[  173.294818] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880090462e40 state to ffff8801ce78dcc0
>[  173.294819] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff8801ce78dcc0
>[  173.294821] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  173.294824] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[  173.294829] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[  173.294837] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  173.294838] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[  173.294840] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  173.294842] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  173.294843] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  173.294843] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  173.294845] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  173.294846] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[  173.294848] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  173.294848] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  173.294849] [drm:intel_dump_pipe_config] requested mode:
>[  173.294853] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x0 0xa
>[  173.294853] [drm:intel_dump_pipe_config] adjusted mode:
>[  173.294855] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  173.294857] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[  173.294857] [drm:intel_dump_pipe_config] port clock: 270000
>[  173.294858] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  173.294859] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  173.294860] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  173.294861] [drm:intel_dump_pipe_config] ips: 1
>[  173.294862] [drm:intel_dump_pipe_config] double wide: 0
>[  173.294866] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800375e8540
>[  173.302338] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801ce78dcc0
>[  173.302342] [drm:drm_atomic_state_free] Freeing atomic state ffff8801ce78dcc0
>[  173.303180] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787cc0
>[  173.304389] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c2787000
>[  173.304866] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00200000, dig 0x10101012
>[  173.304872] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  173.304873] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 1
>[  173.305604] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  173.306366] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[  173.306371] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[  173.306373] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[  173.306375] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[  173.306826] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  173.306830] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  173.306832] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  173.306835] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  173.307273] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[  173.307277] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[  173.307279] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[  173.307280] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[  173.312164] [drm:intel_hpd_irq_event] [CONNECTOR:39:DP-1] status updated from disconnected to connected
>[  173.312168] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  173.312328] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  173.312330] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  173.312488] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  173.312491] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  173.313575] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[  173.313580] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  173.313583] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[  173.313587] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[  173.313598] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  173.313602] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[  173.313605] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  173.313609] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  173.313612] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  173.313614] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[  173.313616] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  173.314063] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[  173.314066] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[  173.314068] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[  173.314070] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[  173.318804] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  173.318810] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] probed modes :
>[  173.318812] [drm:drm_mode_debug_printmodeline] Modeline 50:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[  173.318814] [drm:drm_mode_debug_printmodeline] Modeline 58:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  173.318815] [drm:drm_mode_debug_printmodeline] Modeline 60:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  173.318817] [drm:drm_mode_debug_printmodeline] Modeline 61:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  173.318818] [drm:drm_mode_debug_printmodeline] Modeline 56:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  173.318820] [drm:drm_mode_debug_printmodeline] Modeline 55:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  173.318821] [drm:drm_mode_debug_printmodeline] Modeline 53:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  173.318823] [drm:drm_mode_debug_printmodeline] Modeline 57:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  173.318824] [drm:drm_mode_debug_printmodeline] Modeline 59:"1152x864" 60 81579 1152 1216 1336 1520 864 865 868 895 0x0 0x6
>[  173.318826] [drm:drm_mode_debug_printmodeline] Modeline 54:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[  173.318827] [drm:drm_mode_debug_printmodeline] Modeline 62:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  173.318829] [drm:drm_mode_debug_printmodeline] Modeline 63:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  173.318835] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  173.318858] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  173.318860] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[  173.318861] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  173.319020] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  173.319021] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  173.319173] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  173.319174] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  173.319175] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[  173.430708] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800375e8480
>[  173.447820] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee877cc0
>[  173.447868] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8801ee877900
>[  173.492542] [drm:drm_mode_addfb2] [FB:64]
>[  174.110094] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800cbbf5840
>[  174.115812] [drm:drm_mode_addfb2] [FB:46]
>[  174.116197] [drm:drm_mode_setcrtc] [CRTC:20]
>[  174.116200] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[  174.116202] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[  174.116205] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[  174.116206] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801ce78dea0
>[  174.116209] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880090462f40 state to ffff8801ce78dea0
>[  174.116211] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d9c13000 state to ffff8801ce78dea0
>[  174.116224] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  174.116226] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880090462f60 state to ffff8801ce78dea0
>[  174.116227] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880090462f80 state to ffff8801ce78dea0
>[  174.116229] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff8801ce78dea0
>[  174.116231] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  174.116233] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[  174.116239] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[  174.116247] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  174.116247] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[  174.116250] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  174.116251] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  174.116252] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  174.116253] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  174.116254] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  174.116256] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[  174.116257] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  174.116258] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  174.116258] [drm:intel_dump_pipe_config] requested mode:
>[  174.116260] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x0 0xa
>[  174.116261] [drm:intel_dump_pipe_config] adjusted mode:
>[  174.116263] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  174.116264] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[  174.116265] [drm:intel_dump_pipe_config] port clock: 270000
>[  174.116266] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  174.116267] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  174.116268] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  174.116269] [drm:intel_dump_pipe_config] ips: 1
>[  174.116269] [drm:intel_dump_pipe_config] double wide: 0
>[  174.116272] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5540
>[  174.119464] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801ce78dea0
>[  174.119467] [drm:drm_atomic_state_free] Freeing atomic state ffff8801ce78dea0
>[  174.120392] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf5e40
>[  174.122325] [drm:drm_mode_setcrtc] [CRTC:24]
>[  174.122341] [drm:drm_mode_setcrtc] [CONNECTOR:39:DP-1]
>[  174.122345] [drm:intel_crtc_set_config] [CRTC:24] [FB:46] #connectors=1 (x y) (1920 0)
>[  174.122354] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  174.122356] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  174.122361] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801ce78dea0
>[  174.122364] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] encoder changed, full mode switch
>[  174.122371] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff880090462f80 state to ffff8801ce78dea0
>[  174.122376] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d9c13000 state to ffff8801ce78dea0
>[  174.122378] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  174.122381] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff880090462f60 state to ffff8801ce78dea0
>[  174.122382] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] to [CRTC:24]
>[  174.122384] [drm:intel_modeset_stage_output_state] [ENCODER:38:TMDS-38] crtc changed, full mode switch
>[  174.122387] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff880090462f40 state to ffff8801ce78dea0
>[  174.122390] [drm:intel_modeset_stage_output_state] [CRTC:24] enabled, full mode switch
>[  174.122393] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff8801ce78dea0
>[  174.122397] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  174.122403] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff88020da73c00 state to ffff8801ce78dea0
>[  174.122405] [drm:connected_sink_compute_bpp] [CONNECTOR:39:DP-1] checking for sink bpp constrains
>[  174.122410] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 146250KHz
>[  174.122422] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  174.122424] [drm:intel_dp_compute_config] DP link bw required 351000 available 432000
>[  174.122428] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  174.122430] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  174.122431] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  174.122433] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  174.122435] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  174.122437] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6815744, gmch_n: 8388608, link_m: 283989, link_n: 524288, tu: 64
>[  174.122438] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  174.122439] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  174.122440] [drm:intel_dump_pipe_config] requested mode:
>[  174.122443] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x0 0x6
>[  174.122444] [drm:intel_dump_pipe_config] adjusted mode:
>[  174.122447] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x0 0x6
>[  174.122450] [drm:intel_dump_crtc_timings] crtc timings: 146250 1680 1784 1960 2240 1050 1053 1059 1089, type: 0x0 flags: 0x6
>[  174.122452] [drm:intel_dump_pipe_config] port clock: 270000
>[  174.122453] [drm:intel_dump_pipe_config] pipe src size: 1680x1050
>[  174.122455] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  174.122456] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  174.122457] [drm:intel_dump_pipe_config] ips: 0
>[  174.122458] [drm:intel_dump_pipe_config] double wide: 0
>[  174.122490] [drm:intel_display_power_get] enabling display
>[  174.122499] [drm:hsw_set_power_well] Enabling power well
>[  174.122511] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800cbbf5240
>[  174.123693] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  174.124321] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  174.124938] [drm:intel_dp_start_link_train] clock recovery OK
>[  174.127881] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  174.169521] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[  174.169526] [drm:intel_connector_check_state] [CONNECTOR:39:DP-1]
>[  174.169530] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[  174.169531] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  174.169533] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[  174.169534] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[  174.169536] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[  174.169537] [drm:check_crtc_state] [CRTC:20]
>[  174.169544] [drm:check_crtc_state] [CRTC:24]
>[  174.169550] [drm:check_crtc_state] [CRTC:28]
>[  174.169552] [drm:check_shared_dpll_state] WRPLL 1
>[  174.169553] [drm:check_shared_dpll_state] WRPLL 2
>[  174.169555] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801ce78dea0
>[  174.169561] [drm:drm_atomic_state_free] Freeing atomic state ffff8801ce78dea0
>[  174.169614] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800cbbf53c0
>[  174.169627] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8800cbbf5300
>[  174.357739] [drm:drm_mode_addfb2] [FB:64]
>[  175.877174] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00200000, dig 0x10101012
>[  175.877179] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  175.877180] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 0
>[  175.877202] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  175.877212] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  175.877214] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  175.877216] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  175.877218] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  175.877223] [drm:intel_hpd_irq_event] [CONNECTOR:39:DP-1] status updated from connected to disconnected
>[  175.877225] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  175.877399] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  175.877400] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  175.877586] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  175.877588] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  175.878711] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[  175.878722] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  175.878728] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[  175.878733] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[  175.878754] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  175.878761] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[  175.878769] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  175.878777] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  175.878784] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  175.878789] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[  175.878797] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  175.878805] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[  175.878828] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  175.878833] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[  175.878838] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  175.879023] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  175.879029] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  175.879215] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  175.879223] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  175.879229] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[  176.531141] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801f448b0c0
>[  176.531155] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801f448b600
>[  176.634746] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00200000, dig 0x10101012
>[  176.634750] [drm:intel_hpd_irq_handler] digital hpd port B - long
>[  176.634752] [drm:intel_hpd_irq_handler] Received HPD interrupt on PIN 4 - cnt: 1
>[  176.634762] [drm:intel_dp_hpd_pulse] got hpd irq on port B - long
>[  176.634792] [drm:drm_mode_setcrtc] [CRTC:24]
>[  176.634796] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[  176.634800] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  176.634803] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801f462fb40
>[  176.634805] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] to [NOCRTC]
>[  176.634807] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] encoder changed, full mode switch
>[  176.634811] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8802061ed180 state to ffff8801f462fb40
>[  176.634814] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88020d870000 state to ffff8801f462fb40
>[  176.634816] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  176.634818] [drm:intel_modeset_stage_output_state] [ENCODER:38:TMDS-38] crtc changed, full mode switch
>[  176.634820] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8802061ed1a0 state to ffff8801f462fb40
>[  176.634823] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff88020d870400 state to ffff8801f462fb40
>[  176.634825] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8802061ed1c0 state to ffff8801f462fb40
>[  176.634827] [drm:intel_modeset_stage_output_state] [CRTC:24] disabled, full mode switch
>[  176.634830] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff8801f462fb40
>[  176.634833] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 2
>[  176.635208] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[  176.635211] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[  176.635212] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[  176.635214] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[  176.637032] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800c2732840
>[  176.637051] [drm:intel_display_power_put] disabling display
>[  176.637053] [drm:hsw_set_power_well] Requesting to disable the power well
>[  176.637056] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[  176.637058] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[  176.637059] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  176.637060] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[  176.637061] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[  176.637062] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[  176.637063] [drm:check_crtc_state] [CRTC:20]
>[  176.637068] [drm:check_crtc_state] [CRTC:24]
>[  176.637069] [drm:check_crtc_state] [CRTC:28]
>[  176.637070] [drm:check_shared_dpll_state] WRPLL 1
>[  176.637071] [drm:check_shared_dpll_state] WRPLL 2
>[  176.637073] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801f462fb40
>[  176.637075] [drm:drm_atomic_state_free] Freeing atomic state ffff8801f462fb40
>[  176.637536] [drm:i915_hotplug_work_func] running encoder hotplug functions
>[  176.637540] [drm:i915_hotplug_work_func] Connector DP-1 (pin 4) received hotplug event.
>[  176.637542] [drm:i915_hotplug_work_func] Connector HDMI-A-1 (pin 4) received hotplug event.
>[  176.637544] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  176.638614] [drm:drm_mode_addfb2] [FB:46]
>[  176.639090] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[  176.639093] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[  176.639094] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[  176.639095] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[  176.643825] [drm:intel_hpd_irq_event] [CONNECTOR:39:DP-1] status updated from disconnected to connected
>[  176.643829] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  176.643987] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  176.643988] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  176.644140] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  176.644141] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  176.644175] [drm:drm_mode_setcrtc] [CRTC:20]
>[  176.644180] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[  176.644182] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[  176.644185] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[  176.644186] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801b8121180
>[  176.644189] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8801edb425a0 state to ffff8801b8121180
>[  176.644191] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801f46ff400 state to ffff8801b8121180
>[  176.644192] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  176.644194] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8801edb425c0 state to ffff8801b8121180
>[  176.644195] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8801edb425e0 state to ffff8801b8121180
>[  176.644197] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff8801b8121180
>[  176.644198] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  176.644200] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[  176.644203] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[  176.644207] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  176.644208] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[  176.644209] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  176.644210] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  176.644212] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  176.644212] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  176.644214] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  176.644215] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[  176.644216] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  176.644217] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  176.644218] [drm:intel_dump_pipe_config] requested mode:
>[  176.644220] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x0 0xa
>[  176.644220] [drm:intel_dump_pipe_config] adjusted mode:
>[  176.644222] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  176.644224] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[  176.644224] [drm:intel_dump_pipe_config] port clock: 270000
>[  176.644225] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  176.644226] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  176.644227] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  176.644228] [drm:intel_dump_pipe_config] ips: 1
>[  176.644229] [drm:intel_dump_pipe_config] double wide: 0
>[  176.644231] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800be7db9c0
>[  176.654189] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801b8121180
>[  176.654193] [drm:drm_atomic_state_free] Freeing atomic state ffff8801b8121180
>[  176.655411] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[  176.655418] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  176.655426] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[  176.655428] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[  176.655449] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  176.655463] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[  176.655466] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  176.655471] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[  176.655475] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  176.655477] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[  176.655478] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[  176.655929] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 01 00 03 01 01 02 00 00 00 00 00 00
>[  176.655932] [drm:intel_dp_print_rates] source rates: 162000,270000,540000,
>[  176.655933] [drm:intel_dp_print_rates] sink rates: 162000,270000,
>[  176.655934] [drm:intel_dp_print_rates] common rates: 162000,270000,
>[  176.660670] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  176.660689] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] probed modes :
>[  176.660691] [drm:drm_mode_debug_printmodeline] Modeline 49:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x48 0xa
>[  176.660692] [drm:drm_mode_debug_printmodeline] Modeline 57:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[  176.660694] [drm:drm_mode_debug_printmodeline] Modeline 59:"1400x1050" 60 121750 1400 1488 1632 1864 1050 1053 1057 1089 0x40 0x6
>[  176.660695] [drm:drm_mode_debug_printmodeline] Modeline 60:"1600x900" 60 118963 1600 1696 1864 2128 900 901 904 932 0x0 0x6
>[  176.660696] [drm:drm_mode_debug_printmodeline] Modeline 55:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  176.660698] [drm:drm_mode_debug_printmodeline] Modeline 54:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[  176.660699] [drm:drm_mode_debug_printmodeline] Modeline 50:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
>[  176.660701] [drm:drm_mode_debug_printmodeline] Modeline 56:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9
>[  176.660702] [drm:drm_mode_debug_printmodeline] Modeline 58:"1152x864" 60 81579 1152 1216 1336 1520 864 865 868 895 0x0 0x6
>[  176.660703] [drm:drm_mode_debug_printmodeline] Modeline 53:"1280x720" 60 74440 1280 1336 1472 1664 720 721 724 746 0x0 0x6
>[  176.660705] [drm:drm_mode_debug_printmodeline] Modeline 61:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  176.660706] [drm:drm_mode_debug_printmodeline] Modeline 62:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  176.660712] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[  176.660733] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[  176.660735] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[  176.660736] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[  176.660915] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  176.660916] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  176.661090] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  176.661092] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[  176.661093] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[  176.836217] [drm:drm_mode_addfb2] [FB:63]
>[  177.455510] [drm:drm_mode_addfb2] [FB:46]
>[  177.456300] [drm:drm_mode_setcrtc] [CRTC:20]
>[  177.456313] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[  177.456319] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[  177.456324] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[  177.456327] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801b8121a20
>[  177.456332] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8801edb426c0 state to ffff8801b8121a20
>[  177.456340] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801f46ff400 state to ffff8801b8121a20
>[  177.456341] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  177.456344] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8801edb426e0 state to ffff8801b8121a20
>[  177.456346] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8801edb42700 state to ffff8801b8121a20
>[  177.456348] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:20] to ffff8801b8121a20
>[  177.456352] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  177.456365] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[  177.456371] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 138500KHz
>[  177.456377] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  177.456378] [drm:intel_dp_compute_config] DP link bw required 332400 available 432000
>[  177.456380] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  177.456381] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[  177.456384] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  177.456384] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  177.456386] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  177.456387] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64
>[  177.456388] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  177.456389] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  177.456390] [drm:intel_dump_pipe_config] requested mode:
>[  177.456392] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x0 0xa
>[  177.456393] [drm:intel_dump_pipe_config] adjusted mode:
>[  177.456395] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0xa
>[  177.456397] [drm:intel_dump_crtc_timings] crtc timings: 138500 1920 1968 2000 2080 1080 1083 1088 1111, type: 0x48 flags: 0xa
>[  177.456398] [drm:intel_dump_pipe_config] port clock: 270000
>[  177.456401] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  177.456402] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  177.456403] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  177.456404] [drm:intel_dump_pipe_config] ips: 1
>[  177.456405] [drm:intel_dump_pipe_config] double wide: 0
>[  177.456408] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d25d0600
>[  177.471417] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801b8121a20
>[  177.471423] [drm:drm_atomic_state_free] Freeing atomic state ffff8801b8121a20
>[  177.474749] [drm:drm_mode_setcrtc] [CRTC:24]
>[  177.474768] [drm:drm_mode_setcrtc] [CONNECTOR:39:DP-1]
>[  177.474772] [drm:intel_crtc_set_config] [CRTC:24] [FB:46] #connectors=1 (x y) (1920 0)
>[  177.474779] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  177.474781] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0
>[  177.474783] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8801b8121a20
>[  177.474786] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] encoder changed, full mode switch
>[  177.474793] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31] ffff8801edb42700 state to ffff8801b8121a20
>[  177.474798] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801f46fdc00 state to ffff8801b8121a20
>[  177.474800] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[  177.474801] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff8801edb426e0 state to ffff8801b8121a20
>[  177.474802] [drm:intel_modeset_stage_output_state] [CONNECTOR:39:DP-1] to [CRTC:24]
>[  177.474803] [drm:intel_modeset_stage_output_state] [ENCODER:38:TMDS-38] crtc changed, full mode switch
>[  177.474806] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:43] ffff8801edb426c0 state to ffff8801b8121a20
>[  177.474810] [drm:intel_modeset_stage_output_state] [CRTC:24] enabled, full mode switch
>[  177.474812] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:24] to ffff8801b8121a20
>[  177.474814] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  177.474818] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff8801f46fe400 state to ffff8801b8121a20
>[  177.474821] [drm:connected_sink_compute_bpp] [CONNECTOR:39:DP-1] checking for sink bpp constrains
>[  177.474830] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 270000 pixel clock 146250KHz
>[  177.474844] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  177.474845] [drm:intel_dp_compute_config] DP link bw required 351000 available 432000
>[  177.474848] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  177.474851] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B
>[  177.474852] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[  177.474853] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  177.474854] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  177.474856] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6815744, gmch_n: 8388608, link_m: 283989, link_n: 524288, tu: 64
>[  177.474857] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[  177.474858] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[  177.474859] [drm:intel_dump_pipe_config] requested mode:
>[  177.474861] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x0 0x6
>[  177.474862] [drm:intel_dump_pipe_config] adjusted mode:
>[  177.474864] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x0 0x6
>[  177.474866] [drm:intel_dump_crtc_timings] crtc timings: 146250 1680 1784 1960 2240 1050 1053 1059 1089, type: 0x0 flags: 0x6
>[  177.474867] [drm:intel_dump_pipe_config] port clock: 270000
>[  177.474868] [drm:intel_dump_pipe_config] pipe src size: 1680x1050
>[  177.474869] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  177.474870] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  177.474873] [drm:intel_dump_pipe_config] ips: 0
>[  177.474874] [drm:intel_dump_pipe_config] double wide: 0
>[  177.474887] [drm:intel_display_power_get] enabling display
>[  177.474893] [drm:hsw_set_power_well] Enabling power well
>[  177.474912] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d25d0f00
>[  177.476124] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  177.476776] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  177.477419] [drm:intel_dp_start_link_train] clock recovery OK
>[  177.480402] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  177.521416] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[  177.521424] [drm:intel_connector_check_state] [CONNECTOR:39:DP-1]
>[  177.521429] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[  177.521431] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[  177.521434] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[  177.521435] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[  177.521436] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[  177.521438] [drm:check_crtc_state] [CRTC:20]
>[  177.521450] [drm:check_crtc_state] [CRTC:24]
>[  177.521462] [drm:check_crtc_state] [CRTC:28]
>[  177.521465] [drm:check_shared_dpll_state] WRPLL 1
>[  177.521466] [drm:check_shared_dpll_state] WRPLL 2
>[  177.521470] [drm:drm_atomic_state_clear] Clearing atomic state ffff8801b8121a20
>[  177.521472] [drm:drm_atomic_state_free] Freeing atomic state ffff8801b8121a20
>[  177.695653] [drm:drm_mode_addfb2] [FB:63]
>[  181.223647] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786600
>[  181.223678] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8800c2786cc0
>[  181.229682] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786540
>[  181.229699] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8800c2786600
>[  181.236689] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.236704] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8800c2786540
>[  181.243441] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786600
>[  181.243456] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8800c2786cc0
>[  181.250220] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786540
>[  181.250236] [drm:drm_atomic_set_fb_for_plane] Set [FB:65] for plane state ffff8800c2786600
>[  181.256971] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.256985] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800c2786540
>[  181.263714] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.270253] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.277263] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.284035] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.290835] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.297606] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.304101] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.311137] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.317635] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.324624] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.331392] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.338171] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.344925] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.351686] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.358404] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.365157] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.371939] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.378710] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.385470] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.392249] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.399001] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.405783] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.412551] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.419324] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.425872] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  181.459980] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  181.466745] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  183.497072] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800c2786cc0
>[  183.497152] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>[  183.497496] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c2786cc0
>[  183.507362] [drm:drm_atomic_set_fb_for_plane] Set [FB:64] for plane state ffff8800c27860c0
>
>
>
>modInfo output:
>===============
>filename:       /lib/modules/4.1.6-1-ARCH/kernel/drivers/gpu/drm/i915/i915.ko.gz
>license:        GPL and additional rights
>description:    Intel Graphics
>author:         Intel Corporation
>author:         Tungsten Graphics, Inc.
>alias:          pci:v00008086d0000192Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000192Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00001926sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000191Dsv*sd*bc03sc*i*
>alias:          pci:v00008086d0000191Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000191Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00001912sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000191Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00001921sv*sd*bc03sc*i*
>alias:          pci:v00008086d00001916sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000190Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000190Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00001902sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000190Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00001906sv*sd*bc03sc*i*
>alias:          pci:v00008086d000022B3sv*sd*bc03sc*i*
>alias:          pci:v00008086d000022B2sv*sd*bc03sc*i*
>alias:          pci:v00008086d000022B1sv*sd*bc03sc*i*
>alias:          pci:v00008086d000022B0sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000162Dsv*sd*bc03sc*i*
>alias:          pci:v00008086d0000162Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000162Esv*sd*bc03sc*i*
>alias:          pci:v00008086d0000162Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00001626sv*sd*bc03sc*i*
>alias:          pci:v00008086d00001622sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000161Dsv*sd*bc03sc*i*
>alias:          pci:v00008086d0000161Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000160Dsv*sd*bc03sc*i*
>alias:          pci:v00008086d0000160Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000161Esv*sd*bc03sc*i*
>alias:          pci:v00008086d0000161Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00001616sv*sd*bc03sc*i*
>alias:          pci:v00008086d00001612sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000160Esv*sd*bc03sc*i*
>alias:          pci:v00008086d0000160Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00001606sv*sd*bc03sc*i*
>alias:          pci:v00008086d00001602sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000155sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000157sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000F33sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000F32sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000F31sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000F30sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D26sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D16sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D06sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A2Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A1Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A0Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A26sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A16sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A06sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C26sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C16sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C06sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000426sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000416sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000406sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D2Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D1Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D0Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D2Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D1Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D0Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D2Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D1Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D0Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D22sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D12sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000D02sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A2Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A1Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A0Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A2Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A1Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A0Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A22sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A12sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000A02sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C2Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C1Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C0Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C2Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C1Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C0Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C2Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C1Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C0Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C22sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C12sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000C02sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000042Esv*sd*bc03sc*i*
>alias:          pci:v00008086d0000041Esv*sd*bc03sc*i*
>alias:          pci:v00008086d0000040Esv*sd*bc03sc*i*
>alias:          pci:v00008086d0000042Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d0000041Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d0000040Bsv*sd*bc03sc*i*
>alias:          pci:v00008086d0000042Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000041Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000040Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000422sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000412sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000402sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000016Asv*sd*bc03sc*i*
>alias:          pci:v00008086d0000015Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000162sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000152sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000166sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000156sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000016Asv0000152Dsd00008990bc03sc*i*
>alias:          pci:v00008086d00000126sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000116sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000106sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000010Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00000122sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000112sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000102sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000046sv*sd*bc03sc*i*
>alias:          pci:v00008086d00000042sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000A011sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000A001sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002E92sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002E42sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002E32sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002E22sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002E12sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002E02sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002A42sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002A12sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002A02sv*sd*bc03sc*i*
>alias:          pci:v00008086d000029D2sv*sd*bc03sc*i*
>alias:          pci:v00008086d000029C2sv*sd*bc03sc*i*
>alias:          pci:v00008086d000029B2sv*sd*bc03sc*i*
>alias:          pci:v00008086d000029A2sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002992sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002982sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002972sv*sd*bc03sc*i*
>alias:          pci:v00008086d000027AEsv*sd*bc03sc*i*
>alias:          pci:v00008086d000027A2sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002772sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002592sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000258Asv*sd*bc03sc*i*
>alias:          pci:v00008086d00002582sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002572sv*sd*bc03sc*i*
>alias:          pci:v00008086d0000358Esv*sd*bc03sc*i*
>alias:          pci:v00008086d00003582sv*sd*bc03sc*i*
>alias:          pci:v00008086d00002562sv*sd*bc03sc*i*
>alias:          pci:v00008086d00003577sv*sd*bc03sc*i*
>depends:        drm_kms_helper,drm,intel-gtt,i2c-core,video,button,i2c-algo-bit
>intree:         Y
>vermagic:       4.1.6-1-ARCH SMP preempt mod_unload modversions 
>parm:           modeset:Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, 1=on, -1=force vga console preference [default]) (int)
>parm:           panel_ignore_lid:Override lid status (0=autodetect, 1=autodetect disabled [default], -1=force lid closed, -2=force lid open) (int)
>parm:           semaphores:Use semaphores for inter-ring sync (default: -1 (use per-chip defaults)) (int)
>parm:           enable_rc6:Enable power-saving render C-state 6. Different stages can be selected via bitmask values (0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. default: -1 (use per-chip default) (int)
>parm:           enable_fbc:Enable frame buffer compression for power savings (default: -1 (use per-chip default)) (int)
>parm:           lvds_downclock:Use panel (LVDS/eDP) downclocking for power savings (default: false) (int)
>parm:           lvds_channel_mode:Specify LVDS channel mode (0=probe BIOS [default], 1=single-channel, 2=dual-channel) (int)
>parm:           lvds_use_ssc:Use Spread Spectrum Clock with panels [LVDS/eDP] (default: auto from VBT) (int)
>parm:           vbt_sdvo_panel_type:Override/Ignore selection of SDVO panel mode in the VBT (-2=ignore, -1=auto [default], index in VBT BIOS table) (int)
>parm:           reset:Attempt GPU resets (default: true) (bool)
>parm:           enable_hangcheck:Periodically check GPU activity for detecting hangs. WARNING: Disabling this can cause system wide hangs. (default: true) (bool)
>parm:           enable_ppgtt:Override PPGTT usage. (-1=auto [default], 0=disabled, 1=aliasing, 2=full) (int)
>parm:           enable_execlists:Override execlists usage. (-1=auto [default], 0=disabled, 1=enabled) (int)
>parm:           enable_psr:Enable PSR (default: false) (int)
>parm:           preliminary_hw_support:Enable preliminary hardware support. (int)
>parm:           disable_power_well:Disable the power well when possible (default: true) (int)
>parm:           enable_ips:Enable IPS (default: true) (int)
>parm:           fastboot:Try to skip unnecessary mode sets at boot time (default: false) (bool)
>parm:           prefault_disable:Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only. (bool)
>parm:           load_detect_test:Force-enable the VGA load detect code for testing (default:false). For developers only. (bool)
>parm:           invert_brightness:Invert backlight brightness (-1 force normal, 0 machine defaults, 1 force inversion), please report PCI device ID, subsystem vendor and subsystem device ID to dri-devel@lists.freedesktop.org, if your machine needs it. It will then be included in an upcoming module version. (int)
>parm:           disable_display:Disable display (default: false) (bool)
>parm:           disable_vtd_wa:Disable all VT-d workarounds (default: false) (bool)
>parm:           enable_cmd_parser:Enable command parsing (1=enabled [default], 0=disabled) (int)
>parm:           use_mmio_flip:use MMIO flips (-1=never, 0=driver discretion [default], 1=always) (int)
>parm:           mmio_debug:Enable the MMIO debug code for the first N failures (default: off). This may negatively affect performance. (int)
>parm:           verbose_state_checks:Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions. (bool)
>parm:           nuclear_pageflip:Force atomic modeset functionality; only planes work for now (default: false). (bool)
>

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