Attachment 121637 Details for Bug 94073 – NIR before and after out-of-SSA

NIR before and after out-of-SSA

8859127.txt (text/plain), 11.04 KB, created by Matt Turner on 2016-02-10 06:15:00 UTC

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Creator: Matt Turner

Created: 2016-02-10 06:15:00 UTC

Size: 11.04 KB

patch

obsolete

>NIR (SSA form) for vertex shader:
>shader: MESA_SHADER_VERTEX
>name: GLSL36
>inputs: 2
>outputs: 0
>uniforms: 4
>decl_var uniform INTERP_QUALIFIER_NONE mat4 webgl_1e460205a10911f1 (0, 0)
>decl_var shader_in INTERP_QUALIFIER_NONE vec4 webgl_a4ed766dab49e176 (VERT_ATTRIB_GENERIC0, 0)
>decl_var shader_in INTERP_QUALIFIER_NONE vec4 webgl_59e4af95fa73523 (VERT_ATTRIB_GENERIC1, 1)
>decl_var shader_out INTERP_QUALIFIER_NONE vec4 gl_Position (VARYING_SLOT_POS, 0)
>decl_var shader_out INTERP_QUALIFIER_NONE vec4 webgl_54d478077cd5722c (VARYING_SLOT_VAR0, 26)
>decl_overload main returning void
>
>impl main {
>	block block_0:
>	/* preds: */
>	vec1 ssa_0 = load_const (0x3f800000 /* 1.000000 */)
>	vec1 ssa_1 = load_const (0x00000000 /* 0.000000 */)
>	vec1 ssa_2 = load_const (0xbf000000 /* -0.500000 */)
>	vec1 ssa_3 = load_const (0x40000000 /* 2.000000 */)
>	vec4 ssa_4 = intrinsic load_input () () (1)	/* webgl_59e4af95fa73523 */
>	vec3 ssa_5 = fadd ssa_4, ssa_2.xxx
>	vec3 ssa_6 = fmul ssa_3.xxx, ssa_5
>	vec1 ssa_7 = flt ssa_6, ssa_1
>	/* succs: block_1 block_2 */
>	if ssa_7 {
>		block block_1:
>		/* preds: block_0 */
>		vec1 ssa_8 = fmov -ssa_6
>		vec3 ssa_9 = vec3 ssa_8, ssa_6.y, ssa_6.z
>		/* succs: block_3 */
>	} else {
>		block block_2:
>		/* preds: block_0 */
>		/* succs: block_3 */
>	}
>	block block_3:
>	/* preds: block_1 block_2 */
>	vec3 ssa_10 = phi block_1: ssa_9, block_2: ssa_6
>	vec1 ssa_11 = flt ssa_6.y, ssa_1
>	/* succs: block_4 block_5 */
>	if ssa_11 {
>		block block_4:
>		/* preds: block_3 */
>		vec1 ssa_12 = fmov -ssa_6.y
>		vec3 ssa_13 = vec3 ssa_10, ssa_12, ssa_10.z
>		/* succs: block_6 */
>	} else {
>		block block_5:
>		/* preds: block_3 */
>		/* succs: block_6 */
>	}
>	block block_6:
>	/* preds: block_4 block_5 */
>	vec3 ssa_14 = phi block_4: ssa_13, block_5: ssa_10
>	vec1 ssa_15 = flt ssa_6.z, ssa_1
>	/* succs: block_7 block_8 */
>	if ssa_15 {
>		block block_7:
>		/* preds: block_6 */
>		vec1 ssa_16 = fmov -ssa_6.z
>		vec3 ssa_17 = vec3 ssa_14, ssa_14.y, ssa_16
>		/* succs: block_9 */
>	} else {
>		block block_8:
>		/* preds: block_6 */
>		/* succs: block_9 */
>	}
>	block block_9:
>	/* preds: block_7 block_8 */
>	vec3 ssa_18 = phi block_7: ssa_17, block_8: ssa_14
>	vec4 ssa_19 = vec4 ssa_18, ssa_18.y, ssa_18.z, ssa_0
>	vec4 ssa_20 = intrinsic load_uniform () () (0, 0)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_21 = intrinsic load_input () () (0)	/* webgl_a4ed766dab49e176 */
>	vec4 ssa_22 = intrinsic load_uniform () () (0, 1)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_23 = fmul ssa_22, ssa_21.yyyy
>	vec4 ssa_24 = ffma ssa_20, ssa_21.xxxx, ssa_23
>	vec4 ssa_25 = intrinsic load_uniform () () (0, 2)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_26 = ffma ssa_25, ssa_21.zzzz, ssa_24
>	vec4 ssa_27 = intrinsic load_uniform () () (0, 3)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_28 = ffma ssa_27, ssa_21.wwww, ssa_26
>	intrinsic store_output (ssa_28) () (0)	/* gl_Position */
>	intrinsic store_output (ssa_19) () (26)	/* webgl_54d478077cd5722c */
>	/* succs: block_10 */
>	block block_10:
>}
>
>NIR (final form) for vertex shader:
>shader: MESA_SHADER_VERTEX
>name: GLSL36
>inputs: 2
>outputs: 0
>uniforms: 4
>decl_var uniform INTERP_QUALIFIER_NONE mat4 webgl_1e460205a10911f1 (0, 0)
>decl_var shader_in INTERP_QUALIFIER_NONE vec4 webgl_a4ed766dab49e176 (VERT_ATTRIB_GENERIC0, 0)
>decl_var shader_in INTERP_QUALIFIER_NONE vec4 webgl_59e4af95fa73523 (VERT_ATTRIB_GENERIC1, 1)
>decl_var shader_out INTERP_QUALIFIER_NONE vec4 gl_Position (VARYING_SLOT_POS, 0)
>decl_var shader_out INTERP_QUALIFIER_NONE vec4 webgl_54d478077cd5722c (VARYING_SLOT_VAR0, 26)
>decl_overload main returning void
>
>impl main {
>	decl_reg vec3 r0
>	decl_reg vec3 r1
>	decl_reg vec4 r2
>	block block_0:
>	/* preds: */
>	vec1 ssa_0 = load_const (0x3f800000 /* 1.000000 */)
>	vec1 ssa_1 = load_const (0x00000000 /* 0.000000 */)
>	vec1 ssa_2 = load_const (0xbf000000 /* -0.500000 */)
>	vec1 ssa_3 = load_const (0x40000000 /* 2.000000 */)
>	vec4 ssa_4 = intrinsic load_input () () (1)	/* webgl_59e4af95fa73523 */
>	vec3 ssa_5 = fadd ssa_4, ssa_2.xxx
>	r0 = fmul ssa_3.xxx, ssa_5
>	vec1 ssa_7 = flt r0, ssa_1
>	/* succs: block_1 block_2 */
>	if ssa_7 {
>		block block_1:
>		/* preds: block_0 */
>		r1.x = fmov -r0
>		r1.yz = imov r0
>		/* succs: block_3 */
>	} else {
>		block block_2:
>		/* preds: block_0 */
>		r1 = imov r0
>		/* succs: block_3 */
>	}
>	block block_3:
>	/* preds: block_1 block_2 */
>	vec1 ssa_11 = flt r0.y, ssa_1
>	/* succs: block_4 block_5 */
>	if ssa_11 {
>		block block_4:
>		/* preds: block_3 */
>		r1.y = fmov -r0
>		/* succs: block_6 */
>	} else {
>		block block_5:
>		/* preds: block_3 */
>		/* succs: block_6 */
>	}
>	block block_6:
>	/* preds: block_4 block_5 */
>	vec1 ssa_15 = flt r0.z, ssa_1
>	/* succs: block_7 block_8 */
>	if ssa_15 {
>		block block_7:
>		/* preds: block_6 */
>		vec1 ssa_16 = fmov -r0.z
>		/* succs: block_9 */
>	} else {
>		block block_8:
>		/* preds: block_6 */
>		/* succs: block_9 */
>	}
>	block block_9:
>	/* preds: block_7 block_8 */
>	r2.xyz = imov r1
>	r2.w = imov ssa_0.x
>	vec4 ssa_20 = intrinsic load_uniform () () (0, 0)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_21 = intrinsic load_input () () (0)	/* webgl_a4ed766dab49e176 */
>	vec4 ssa_22 = intrinsic load_uniform () () (0, 1)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_23 = fmul ssa_22, ssa_21.yyyy
>	vec4 ssa_24 = ffma ssa_20, ssa_21.xxxx, ssa_23
>	vec4 ssa_25 = intrinsic load_uniform () () (0, 2)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_26 = ffma ssa_25, ssa_21.zzzz, ssa_24
>	vec4 ssa_27 = intrinsic load_uniform () () (0, 3)	/* webgl_1e460205a10911f1 */
>	vec4 ssa_28 = ffma ssa_27, ssa_21.wwww, ssa_26
>	intrinsic store_output (ssa_28) () (0)	/* gl_Position */
>	intrinsic store_output (r2) () (26)	/* webgl_54d478077cd5722c */
>	/* succs: block_10 */
>	block block_10:
>}
>
>GLSL IR for native vertex shader 36:
>(
>(declare (location=0 shader_out ) vec4 gl_Position)
>(declare (location=26 shader_out ) vec4 webgl_54d478077cd5722c)
>(declare (location=17 shader_in ) vec4 webgl_a4ed766dab49e176)
>(declare (location=18 shader_in ) vec4 webgl_59e4af95fa73523)
>(declare (location=0 uniform ) mat4 webgl_1e460205a10911f1)
>( function main
>  (signature void
>    (parameters
>    )
>    (
>      (declare () vec3 webgl_b4a0c1ca0ea7ec32)
>      (assign  (xyzw) (var_ref gl_Position)  (constant vec4 (0.000000 0.000000 0.000000 0.000000)) ) 
>      (declare (temporary ) vec3 compiler_temp)
>      (assign  (xyz) (var_ref compiler_temp)  (expression vec3 * (constant float (2.000000)) (expression vec3 + (swiz xyz (var_ref webgl_59e4af95fa73523) )(constant float (-0.500000)) ) ) ) 
>      (assign  (xyz) (var_ref webgl_b4a0c1ca0ea7ec32)  (var_ref compiler_temp) ) 
>      (if (expression bool < (swiz x (var_ref compiler_temp) )(constant float (0.000000)) ) (
>        (assign  (x) (var_ref webgl_b4a0c1ca0ea7ec32)  (expression float neg (swiz x (var_ref compiler_temp) )) ) 
>      )
>      ())
>
>      (if (expression bool < (swiz y (var_ref compiler_temp) )(constant float (0.000000)) ) (
>        (assign  (y) (var_ref webgl_b4a0c1ca0ea7ec32)  (expression float neg (swiz y (var_ref compiler_temp) )) ) 
>      )
>      ())
>
>      (if (expression bool < (swiz z (var_ref compiler_temp) )(constant float (0.000000)) ) (
>        (assign  (z) (var_ref webgl_b4a0c1ca0ea7ec32)  (expression float neg (swiz z (var_ref compiler_temp) )) ) 
>      )
>      ())
>
>      (declare (temporary ) vec4 compiler_temp@4)
>      (assign  (w) (var_ref compiler_temp@4)  (constant float (1.000000)) ) 
>      (assign  (xyz) (var_ref compiler_temp@4)  (var_ref webgl_b4a0c1ca0ea7ec32) ) 
>      (assign  (xyzw) (var_ref webgl_54d478077cd5722c)  (var_ref compiler_temp@4) ) 
>      (assign  (xyzw) (var_ref gl_Position)  (expression vec4 + (expression vec4 + (expression vec4 + (expression vec4 * (array_ref (var_ref webgl_1e460205a10911f1) (constant int (0)) ) (swiz x (var_ref webgl_a4ed766dab49e176) )) (expression vec4 * (array_ref (var_ref webgl_1e460205a10911f1) (constant int (1)) ) (swiz y (var_ref webgl_a4ed766dab49e176) )) ) (expression vec4 * (array_ref (var_ref webgl_1e460205a10911f1) (constant int (2)) ) (swiz z (var_ref webgl_a4ed766dab49e176) )) ) (expression vec4 * (array_ref (var_ref webgl_1e460205a10911f1) (constant int (3)) ) (swiz w (var_ref webgl_a4ed766dab49e176) )) ) ) 
>    ))
>
>)
>
>)
>
>
>VS Output VUE map (3 slots, non-SSO)
>  [0] VARYING_SLOT_PSIZ
>  [1] VARYING_SLOT_POS
>  [2] VARYING_SLOT_VAR0
>
>VS estimated execution time: 76 cycles
>Native code for unnamed vertex shader GLSL36:
>VS vec4 shader: 28 instructions. 0 loops. 134 cycles.Compacted 448 to 416 bytes (7%)
>   START B0
>mov(8)          g8<1>.xD        1065353216D                     { align16 1Q };
>mov(8)          g9<1>.xUD       0x00000000UD                    { align16 1Q compacted };
>add(8)          g13<1>.xyzF     g4<4,4,1>.xyzzF -0.5F           { align16 1Q };
>mul(8)          g5<1>.xyzF      g13<4,4,1>.xyzzF 2F             { align16 1Q };
>cmp.l.f0(8)     null<1>.xF      g5<4,4,1>.xF    0F              { align16 1Q switch };
>(+f0.x) if(8)   JIP: 7          UIP: 9                          { align16 1Q };
>   END B0 ->B1 ->B2
>   START B1 <-B0
>mov(8)          g6<1>.xF        -g5<4,4,1>.xF                   { align16 NoDDClr 1Q compacted };
>mov(8)          g6<1>.yzD       g5<4,4,1>.yyzzD                 { align16 NoDDChk 1Q };
>else(8)         JIP: 4                                          { align16 1Q };
>   END B1 ->B3
>   START B2 <-B0
>mov(8)          g6<1>.xyzD      g5<4,4,1>.xyzzD                 { align16 1Q };
>   END B2 ->B3
>   START B3 <-B2 <-B1
>endif(8)        JIP: 8                                          { align16 1Q };
>cmp.l.f0(8)     null<1>.xF      g5<4,4,1>.yF    g9<4,4,1>.xF    { align16 1Q switch };
>(+f0.x) if(8)   JIP: 4          UIP: 4                          { align16 1Q };
>   END B3 ->B4 ->B5
>   START B4 <-B3
>mov(8)          g6<1>.yF        -g5<4,4,1>.yF                   { align16 1Q };
>   END B4 ->B5
>   START B5 <-B3 <-B4
>endif(8)        JIP: 2                                          { align16 1Q };
>mov(8)          g116<1>.xyzD    g6<4,4,1>.xyzzD                 { align16 NoDDClr 1Q };
>mov(8)          g18<1>UD        g1<0,4,1>UD                     { align16 1Q };
>mul(8)          g21<1>F         g1.4<0,4,1>F    g3<4,4,1>.yF    { align16 1Q };
>mov(8)          g23<1>UD        g2<0,4,1>UD                     { align16 1Q };
>mov(8)          g25<1>UD        g2.4<0,4,1>UD                   { align16 1Q };
>mov(8)          g114<1>UD       0x00000000UD                    { align16 1Q compacted };
>mov(8)          g116<1>.wD      g8<4,4,1>.xD                    { align16 NoDDChk 1Q compacted };
>mad(8)          g22<1>F         g21<4,4,1>F     g3<4,4,1>.xF    g18<4,4,1>F { align16 1Q };
>mad(8)          g24<1>F         g22<4,4,1>F     g3<4,4,1>.zF    g23<4,4,1>F { align16 1Q };
>mad(8)          g115<1>F        g24<4,4,1>F     g3<4,4,1>.wF    g25<4,4,1>F { align16 1Q };
>mov(8)          g113<1>UD       g0<4,4,1>UD                     { align16 WE_all 1Q };
>or(1)           g113.5<1>UD     g0.5<0,1,0>UD   0x0000ff00UD    { align1 WE_all };
>send(8)         null<1>F        g113<4,4,1>F
>                            urb 0 write HWord interleave complete mlen 5 rlen 0 { align16 1Q EOT };
>   END B5

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