Attachment 121746 Details for Bug 93840 – Alien: Isolation GDB log

Alien: Isolation GDB log

alien_gdb.log (text/plain), 226.78 KB, created by Darius Spitznagel on 2016-02-14 14:00:01 UTC

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Description:

Filename:

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Creator: Darius Spitznagel

Created: 2016-02-14 14:00:01 UTC

Size: 226.78 KB

patch

obsolete

>GNU gdb (Debian 7.7.1+dfsg-5) 7.7.1
>Copyright (C) 2014 Free Software Foundation, Inc.
>License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
>This is free software: you are free to change and redistribute it.
>There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
>and "show warranty" for details.
>This GDB was configured as "x86_64-linux-gnu".
>Type "show configuration" for configuration details.
>For bug reporting instructions, please see:
><http://www.gnu.org/software/gdb/bugs/>.
>Find the GDB manual and other documentation resources online at:
><http://www.gnu.org/software/gdb/documentation/>.
>For help, type "help".
>Type "apropos word" to search for commands related to "word"...
>Reading symbols from ./AlienIsolation...(no debugging symbols found)...done.
>(gdb) run
>Starting program: /mnt/sdb/games/steamapps/common/Alien Isolation/bin/AlienIsolation 
>[Thread debugging using libthread_db enabled]
>Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
>[New Thread 0x7fffe9c15700 (LWP 2552)]
>[New Thread 0x7fffe2a52700 (LWP 2553)]
>[Thread 0x7fffe2a52700 (LWP 2553) exited]
>Setting breakpad minidump AppID = 214490
>Steam_SetMinidumpSteamID:  Caching Steam ID:  76561197970672496 [API loaded no]
>[S_API WARN] The loaded overlay DLL doesn't support ValveHookScreenshots
>[New Thread 0x7ffff7fab700 (LWP 2554)]
>[New Thread 0x7fffe2a52700 (LWP 2555)]
>[New Thread 0x7fffe51c9700 (LWP 2556)]
>[New Thread 0x7fffe46cf700 (LWP 2557)]
>[New Thread 0x7fffa477c700 (LWP 2558)]
>[New Thread 0x7fffa3f7b700 (LWP 2559)]
>[New Thread 0x7fffe2acb700 (LWP 2560)]
>[New Thread 0x7fffe0250700 (LWP 2561)]
>[New Thread 0x7fffe01ff700 (LWP 2562)]
>[New Thread 0x7fffa3b3a700 (LWP 2563)]
>[New Thread 0x7fffe01ae700 (LWP 2564)]
>[New Thread 0x7fffe015d700 (LWP 2565)]
>[New Thread 0x7fffe010c700 (LWP 2566)]
>[New Thread 0x7fffe2a79f00 (LWP 2567)]
>[New Thread 0x7fffa3339700 (LWP 2568)]
>[Thread 0x7fffa3339700 (LWP 2568) exited]
>[New Thread 0x7fffa3339700 (LWP 2569)]
>[Thread 0x7fffa3339700 (LWP 2569) exited]
>[New Thread 0x7fffa3339700 (LWP 2570)]
>[Thread 0x7fffa3339700 (LWP 2570) exited]
>[New Thread 0x7fffa2b38700 (LWP 2571)]
>[Thread 0x7fffa2b38700 (LWP 2571) exited]
>[New Thread 0x7fffa3339700 (LWP 2572)]
>[Thread 0x7fffa3339700 (LWP 2572) exited]
>[New Thread 0x7fffa2b38700 (LWP 2573)]
>[Thread 0x7fffa2b38700 (LWP 2573) exited]
>[New Thread 0x7fffa3339700 (LWP 2574)]
>[Thread 0x7fffa3339700 (LWP 2574) exited]
>[New Thread 0x7fffa2b38700 (LWP 2575)]
>[Thread 0x7fffa2b38700 (LWP 2575) exited]
>[New Thread 0x7fffa2b38700 (LWP 2576)]
>[Thread 0x7fffa2b38700 (LWP 2576) exited]
>[New Thread 0x7fffa2b38700 (LWP 2577)]
>[Thread 0x7fffa2b38700 (LWP 2577) exited]
>[New Thread 0x7fffa3339700 (LWP 2578)]
>[Thread 0x7fffa3339700 (LWP 2578) exited]
>[New Thread 0x7fffa3339700 (LWP 2579)]
>[Thread 0x7fffa3339700 (LWP 2579) exited]
>[New Thread 0x7fffa3339700 (LWP 2580)]
>[Thread 0x7fffa3339700 (LWP 2580) exited]
>[New Thread 0x7fffa3339700 (LWP 2581)]
>[Thread 0x7fffa3339700 (LWP 2581) exited]
>[New Thread 0x7fffa2b38700 (LWP 2582)]
>[Thread 0x7fffa2b38700 (LWP 2582) exited]
>[New Thread 0x7fffa3339700 (LWP 2583)]
>[Thread 0x7fffa3339700 (LWP 2583) exited]
>[New Thread 0x7fffe00bb700 (LWP 2584)]
>[New Thread 0x7fffa21e7700 (LWP 2585)]
>[New Thread 0x7fffa219f700 (LWP 2586)]
>[New Thread 0x7fffa213e700 (LWP 2587)]
>[New Thread 0x7fffa20c9700 (LWP 2588)]
>[New Thread 0x7fffa3339700 (LWP 2589)]
>[New Thread 0x7fffa2078700 (LWP 2590)]
>[New Thread 0x7fffa2b38700 (LWP 2591)]
>[Thread 0x7fffa3339700 (LWP 2589) exited]
>[New Thread 0x7fffa3339700 (LWP 2592)]
>[Thread 0x7fffa3339700 (LWP 2592) exited]
>[New Thread 0x7fffa3339700 (LWP 2593)]
>[Thread 0x7fffa3339700 (LWP 2593) exited]
>[New Thread 0x7fffa3339700 (LWP 2594)]
>[Thread 0x7fffa3339700 (LWP 2594) exited]
>[New Thread 0x7fffa3339700 (LWP 2595)]
>[Thread 0x7fffa3339700 (LWP 2595) exited]
>[New Thread 0x7fffa3339700 (LWP 2596)]
>[Thread 0x7fffa3339700 (LWP 2596) exited]
>[New Thread 0x7fffa3339700 (LWP 2597)]
>[Thread 0x7fffa3339700 (LWP 2597) exited]
>[New Thread 0x7fffa3339700 (LWP 2598)]
>[Thread 0x7fffa3339700 (LWP 2598) exited]
>[New Thread 0x7fffa3339700 (LWP 2599)]
>[Thread 0x7fffa3339700 (LWP 2599) exited]
>[New Thread 0x7fffa19a9700 (LWP 2600)]
>[Thread 0x7fffa19a9700 (LWP 2600) exited]
>[New Thread 0x7fffa3339700 (LWP 2601)]
>[Thread 0x7fffa3339700 (LWP 2601) exited]
>[New Thread 0x7fffa19a9700 (LWP 2602)]
>[Thread 0x7fffa19a9700 (LWP 2602) exited]
>[New Thread 0x7fffa19a9700 (LWP 2603)]
>[Thread 0x7fffa19a9700 (LWP 2603) exited]
>[New Thread 0x7fffa19a9700 (LWP 2604)]
>[Thread 0x7fffa19a9700 (LWP 2604) exited]
>[New Thread 0x7fffa3339700 (LWP 2605)]
>[Thread 0x7fffa3339700 (LWP 2605) exited]
>[New Thread 0x7fffa19a9700 (LWP 2606)]
>[Thread 0x7fffa19a9700 (LWP 2606) exited]
>[New Thread 0x7fffa3339700 (LWP 2607)]
>[Thread 0x7fffa3339700 (LWP 2607) exited]
>[New Thread 0x7fffa19a9700 (LWP 2608)]
>[Thread 0x7fffa19a9700 (LWP 2608) exited]
>[New Thread 0x7fffa3339700 (LWP 2609)]
>[Thread 0x7fffa3339700 (LWP 2609) exited]
>[New Thread 0x7fffa19a9700 (LWP 2610)]
>[Thread 0x7fffa19a9700 (LWP 2610) exited]
>[New Thread 0x7fffa3339700 (LWP 2611)]
>[Thread 0x7fffa3339700 (LWP 2611) exited]
>[New Thread 0x7fffa3339700 (LWP 2612)]
>[Thread 0x7fffa3339700 (LWP 2612) exited]
>[New Thread 0x7fffa19a9700 (LWP 2613)]
>[Thread 0x7fffa19a9700 (LWP 2613) exited]
>[New Thread 0x7fffa3339700 (LWP 2615)]
>[Thread 0x7fffa3339700 (LWP 2615) exited]
>[New Thread 0x7fffa19a9700 (LWP 2616)]
>[Thread 0x7fffa19a9700 (LWP 2616) exited]
>[New Thread 0x7fffa19a9700 (LWP 2617)]
>[Thread 0x7fffa19a9700 (LWP 2617) exited]
>[New Thread 0x7fffa19a9700 (LWP 2618)]
>[Thread 0x7fffa19a9700 (LWP 2618) exited]
>[New Thread 0x7fffa3339700 (LWP 2619)]
>[Thread 0x7fffa3339700 (LWP 2619) exited]
>[New Thread 0x7fffa19a9700 (LWP 2620)]
>[Thread 0x7fffa19a9700 (LWP 2620) exited]
>[New Thread 0x7fffa3339700 (LWP 2622)]
>[Thread 0x7fffa3339700 (LWP 2622) exited]
>[New Thread 0x7fffa3339700 (LWP 2623)]
>[Thread 0x7fffa3339700 (LWP 2623) exited]
>[New Thread 0x7fffa3339700 (LWP 2624)]
>[Thread 0x7fffa3339700 (LWP 2624) exited]
>[New Thread 0x7fffa3339700 (LWP 2626)]
>[Thread 0x7fffa3339700 (LWP 2626) exited]
>[New Thread 0x7fffa3339700 (LWP 2627)]
>[Thread 0x7fffa3339700 (LWP 2627) exited]
>[New Thread 0x7fffa3339700 (LWP 2628)]
>[Thread 0x7fffa3339700 (LWP 2628) exited]
>[New Thread 0x7fffa3339700 (LWP 2629)]
>[Thread 0x7fffa3339700 (LWP 2629) exited]
>[New Thread 0x7fffa19a9700 (LWP 2630)]
>[Thread 0x7fffa19a9700 (LWP 2630) exited]
>[New Thread 0x7fffa3339700 (LWP 2631)]
>[Thread 0x7fffa3339700 (LWP 2631) exited]
>[New Thread 0x7fffa19a9700 (LWP 2632)]
>[Thread 0x7fffa19a9700 (LWP 2632) exited]
>[New Thread 0x7fffa19a9700 (LWP 2633)]
>[Thread 0x7fffa19a9700 (LWP 2633) exited]
>[New Thread 0x7fffa3339700 (LWP 2634)]
>[Thread 0x7fffa3339700 (LWP 2634) exited]
>[New Thread 0x7fffa19a9700 (LWP 2635)]
>[Thread 0x7fffa19a9700 (LWP 2635) exited]
>[New Thread 0x7fffa3339700 (LWP 2636)]
>[Thread 0x7fffa3339700 (LWP 2636) exited]
>[New Thread 0x7fffa19a9700 (LWP 2637)]
>[Thread 0x7fffa19a9700 (LWP 2637) exited]
>[New Thread 0x7fffa3339700 (LWP 2638)]
>[Thread 0x7fffa3339700 (LWP 2638) exited]
>[New Thread 0x7fffa3339700 (LWP 2639)]
>[Thread 0x7fffa3339700 (LWP 2639) exited]
>[New Thread 0x7fffa3339700 (LWP 2640)]
>[Thread 0x7fffa3339700 (LWP 2640) exited]
>[New Thread 0x7fffa3339700 (LWP 2641)]
>[Thread 0x7fffa3339700 (LWP 2641) exited]
>[New Thread 0x7fffa3339700 (LWP 2642)]
>[Thread 0x7fffa3339700 (LWP 2642) exited]
>[New Thread 0x7fffa3339700 (LWP 2643)]
>[Thread 0x7fffa3339700 (LWP 2643) exited]
>[New Thread 0x7fffa3339700 (LWP 2644)]
>[Thread 0x7fffa3339700 (LWP 2644) exited]
>[New Thread 0x7fffa3339700 (LWP 2645)]
>[Thread 0x7fffa3339700 (LWP 2645) exited]
>[New Thread 0x7fffa3339700 (LWP 2646)]
>[Thread 0x7fffa3339700 (LWP 2646) exited]
>[New Thread 0x7fffa3339700 (LWP 2647)]
>[Thread 0x7fffa3339700 (LWP 2647) exited]
>[New Thread 0x7fffa19a9700 (LWP 2648)]
>[Thread 0x7fffa19a9700 (LWP 2648) exited]
>[New Thread 0x7fffa3339700 (LWP 2649)]
>[Thread 0x7fffa3339700 (LWP 2649) exited]
>[New Thread 0x7fffa3339700 (LWP 2650)]
>[Thread 0x7fffa3339700 (LWP 2650) exited]
>[New Thread 0x7fffa3339700 (LWP 2651)]
>[Thread 0x7fffa3339700 (LWP 2651) exited]
>[New Thread 0x7fffa19a9700 (LWP 2652)]
>[New Thread 0x7fffa3339700 (LWP 2653)]
>[Thread 0x7fffa19a9700 (LWP 2652) exited]
>[Thread 0x7fffa3339700 (LWP 2653) exited]
>[New Thread 0x7fffa19a9700 (LWP 2654)]
>[Thread 0x7fffa19a9700 (LWP 2654) exited]
>[New Thread 0x7fffa19a9700 (LWP 2655)]
>[Thread 0x7fffa19a9700 (LWP 2655) exited]
>[New Thread 0x7fffa19a9700 (LWP 2656)]
>[Thread 0x7fffa19a9700 (LWP 2656) exited]
>[New Thread 0x7fffa19a9700 (LWP 2657)]
>[Thread 0x7fffa19a9700 (LWP 2657) exited]
>[New Thread 0x7fffa3339700 (LWP 2658)]
>[Thread 0x7fffa3339700 (LWP 2658) exited]
>[New Thread 0x7fffa19a9700 (LWP 2659)]
>[Thread 0x7fffa19a9700 (LWP 2659) exited]
>[New Thread 0x7fffa3339700 (LWP 2660)]
>[Thread 0x7fffa3339700 (LWP 2660) exited]
>[New Thread 0x7fffa19a9700 (LWP 2661)]
>[Thread 0x7fffa19a9700 (LWP 2661) exited]
>[New Thread 0x7fffa3339700 (LWP 2662)]
>[Thread 0x7fffa3339700 (LWP 2662) exited]
>[New Thread 0x7fffa19a9700 (LWP 2663)]
>[Thread 0x7fffa19a9700 (LWP 2663) exited]
>[New Thread 0x7fffa3339700 (LWP 2664)]
>[Thread 0x7fffa3339700 (LWP 2664) exited]
>[New Thread 0x7fffa3339700 (LWP 2665)]
>[Thread 0x7fffa3339700 (LWP 2665) exited]
>[New Thread 0x7fffa3339700 (LWP 2666)]
>[Thread 0x7fffa3339700 (LWP 2666) exited]
>[New Thread 0x7fffa19a9700 (LWP 2667)]
>[Thread 0x7fffa19a9700 (LWP 2667) exited]
>[New Thread 0x7fffa3339700 (LWP 2668)]
>[New Thread 0x7fffa19a9700 (LWP 2669)]
>[Thread 0x7fffa3339700 (LWP 2668) exited]
>[Thread 0x7fffa19a9700 (LWP 2669) exited]
>[New Thread 0x7fffa3339700 (LWP 2670)]
>[Thread 0x7fffa3339700 (LWP 2670) exited]
>[New Thread 0x7fffa19a9700 (LWP 2671)]
>[Thread 0x7fffa19a9700 (LWP 2671) exited]
>[New Thread 0x7fffa3339700 (LWP 2672)]
>[Thread 0x7fffa3339700 (LWP 2672) exited]
>[New Thread 0x7fffa3339700 (LWP 2673)]
>[Thread 0x7fffa3339700 (LWP 2673) exited]
>[New Thread 0x7fffa3339700 (LWP 2674)]
>[Thread 0x7fffa3339700 (LWP 2674) exited]
>[New Thread 0x7fffa19a9700 (LWP 2675)]
>[Thread 0x7fffa19a9700 (LWP 2675) exited]
>[New Thread 0x7fffa3339700 (LWP 2676)]
>[Thread 0x7fffa3339700 (LWP 2676) exited]
>[New Thread 0x7fffa3339700 (LWP 2677)]
>[Thread 0x7fffa3339700 (LWP 2677) exited]
>[New Thread 0x7fffa3339700 (LWP 2678)]
>[Thread 0x7fffa3339700 (LWP 2678) exited]
>[New Thread 0x7fffa19a9700 (LWP 2679)]
>[Thread 0x7fffa19a9700 (LWP 2679) exited]
>[New Thread 0x7fffa3339700 (LWP 2680)]
>[Thread 0x7fffa3339700 (LWP 2680) exited]
>[New Thread 0x7fffa19a9700 (LWP 2681)]
>[Thread 0x7fffa19a9700 (LWP 2681) exited]
>[New Thread 0x7fffa19a9700 (LWP 2682)]
>[Thread 0x7fffa19a9700 (LWP 2682) exited]
>[New Thread 0x7fffa19a9700 (LWP 2683)]
>[Thread 0x7fffa19a9700 (LWP 2683) exited]
>[New Thread 0x7fffa19a9700 (LWP 2684)]
>[Thread 0x7fffa19a9700 (LWP 2684) exited]
>[New Thread 0x7fffa19a9700 (LWP 2685)]
>[Thread 0x7fffa19a9700 (LWP 2685) exited]
>[New Thread 0x7fffa19a9700 (LWP 2686)]
>[Thread 0x7fffa19a9700 (LWP 2686) exited]
>[New Thread 0x7fffa19a9700 (LWP 2687)]
>[Thread 0x7fffa19a9700 (LWP 2687) exited]
>[New Thread 0x7fffa3339700 (LWP 2688)]
>[Thread 0x7fffa3339700 (LWP 2688) exited]
>[New Thread 0x7fffa19a9700 (LWP 2689)]
>[Thread 0x7fffa19a9700 (LWP 2689) exited]
>[New Thread 0x7fffa3339700 (LWP 2690)]
>[Thread 0x7fffa3339700 (LWP 2690) exited]
>[New Thread 0x7fffa3339700 (LWP 2691)]
>[Thread 0x7fffa3339700 (LWP 2691) exited]
>[New Thread 0x7fffa3339700 (LWP 2692)]
>[Thread 0x7fffa3339700 (LWP 2692) exited]
>[New Thread 0x7fffa3339700 (LWP 2693)]
>[Thread 0x7fffa3339700 (LWP 2693) exited]
>[New Thread 0x7fffa3339700 (LWP 2694)]
>[Thread 0x7fffa3339700 (LWP 2694) exited]
>[New Thread 0x7fffa19a9700 (LWP 2695)]
>[Thread 0x7fffa19a9700 (LWP 2695) exited]
>[New Thread 0x7fffa3339700 (LWP 2696)]
>[Thread 0x7fffa3339700 (LWP 2696) exited]
>[New Thread 0x7fffa19a9700 (LWP 2697)]
>[Thread 0x7fffa19a9700 (LWP 2697) exited]
>[New Thread 0x7fffa3339700 (LWP 2698)]
>[Thread 0x7fffa3339700 (LWP 2698) exited]
>[New Thread 0x7fffa3339700 (LWP 2699)]
>[Thread 0x7fffa3339700 (LWP 2699) exited]
>[New Thread 0x7fffa3339700 (LWP 2700)]
>[Thread 0x7fffa3339700 (LWP 2700) exited]
>[New Thread 0x7fffa19a9700 (LWP 2701)]
>[Thread 0x7fffa19a9700 (LWP 2701) exited]
>[New Thread 0x7fffa3339700 (LWP 2702)]
>[Thread 0x7fffa3339700 (LWP 2702) exited]
>[New Thread 0x7fffa3339700 (LWP 2703)]
>[Thread 0x7fffa3339700 (LWP 2703) exited]
>[New Thread 0x7fffa19a9700 (LWP 2704)]
>[Thread 0x7fffa19a9700 (LWP 2704) exited]
>[New Thread 0x7fffa3339700 (LWP 2705)]
>[Thread 0x7fffa3339700 (LWP 2705) exited]
>[New Thread 0x7fffa19a9700 (LWP 2706)]
>[Thread 0x7fffa19a9700 (LWP 2706) exited]
>[New Thread 0x7fffa19a9700 (LWP 2707)]
>[Thread 0x7fffa19a9700 (LWP 2707) exited]
>[New Thread 0x7fffa19a9700 (LWP 2708)]
>[Thread 0x7fffa19a9700 (LWP 2708) exited]
>[New Thread 0x7fffa19a9700 (LWP 2709)]
>[New Thread 0x7fffa3339700 (LWP 2710)]
>[Thread 0x7fffa19a9700 (LWP 2709) exited]
>[Thread 0x7fffa3339700 (LWP 2710) exited]
>[New Thread 0x7fffa3339700 (LWP 2711)]
>[Thread 0x7fffa3339700 (LWP 2711) exited]
>[New Thread 0x7fffa3339700 (LWP 2712)]
>[Thread 0x7fffa3339700 (LWP 2712) exited]
>[New Thread 0x7fffa3339700 (LWP 2713)]
>[Thread 0x7fffa3339700 (LWP 2713) exited]
>[New Thread 0x7fffa19a9700 (LWP 2714)]
>[Thread 0x7fffa19a9700 (LWP 2714) exited]
>[New Thread 0x7fffa3339700 (LWP 2715)]
>[Thread 0x7fffa3339700 (LWP 2715) exited]
>[New Thread 0x7fffa19a9700 (LWP 2716)]
>[Thread 0x7fffa19a9700 (LWP 2716) exited]
>[New Thread 0x7fffa3339700 (LWP 2717)]
>[Thread 0x7fffa3339700 (LWP 2717) exited]
>[New Thread 0x7fffa19a9700 (LWP 2718)]
>[Thread 0x7fffa19a9700 (LWP 2718) exited]
>[New Thread 0x7fffa3339700 (LWP 2719)]
>[Thread 0x7fffa3339700 (LWP 2719) exited]
>[New Thread 0x7fffa19a9700 (LWP 2720)]
>[Thread 0x7fffa19a9700 (LWP 2720) exited]
>[New Thread 0x7fffa19a9700 (LWP 2721)]
>[Thread 0x7fffa19a9700 (LWP 2721) exited]
>[New Thread 0x7fffa19a9700 (LWP 2722)]
>[Thread 0x7fffa19a9700 (LWP 2722) exited]
>[New Thread 0x7fffa19a9700 (LWP 2723)]
>[Thread 0x7fffa19a9700 (LWP 2723) exited]
>[New Thread 0x7fffa19a9700 (LWP 2724)]
>[Thread 0x7fffa19a9700 (LWP 2724) exited]
>[New Thread 0x7fffa19a9700 (LWP 2725)]
>[Thread 0x7fffa19a9700 (LWP 2725) exited]
>[New Thread 0x7fffa19a9700 (LWP 2726)]
>[Thread 0x7fffa19a9700 (LWP 2726) exited]
>[New Thread 0x7fffa19a9700 (LWP 2727)]
>[Thread 0x7fffa19a9700 (LWP 2727) exited]
>[New Thread 0x7fffa19a9700 (LWP 2728)]
>[Thread 0x7fffa19a9700 (LWP 2728) exited]
>[New Thread 0x7fffa19a9700 (LWP 2729)]
>[Thread 0x7fffa19a9700 (LWP 2729) exited]
>[New Thread 0x7fffa19a9700 (LWP 2730)]
>[Thread 0x7fffa19a9700 (LWP 2730) exited]
>[New Thread 0x7fffa3339700 (LWP 2731)]
>[Thread 0x7fffa3339700 (LWP 2731) exited]
>[New Thread 0x7fffa3339700 (LWP 2732)]
>[Thread 0x7fffa3339700 (LWP 2732) exited]
>[New Thread 0x7fffa3339700 (LWP 2733)]
>[Thread 0x7fffa3339700 (LWP 2733) exited]
>[New Thread 0x7fffa3339700 (LWP 2734)]
>[Thread 0x7fffa3339700 (LWP 2734) exited]
>[New Thread 0x7fffa3339700 (LWP 2735)]
>[Thread 0x7fffa3339700 (LWP 2735) exited]
>[New Thread 0x7fffa3339700 (LWP 2736)]
>[Thread 0x7fffa3339700 (LWP 2736) exited]
>[New Thread 0x7fffa19a9700 (LWP 2737)]
>[Thread 0x7fffa19a9700 (LWP 2737) exited]
>[New Thread 0x7fffa3339700 (LWP 2738)]
>[Thread 0x7fffa3339700 (LWP 2738) exited]
>[New Thread 0x7fffa3339700 (LWP 2739)]
>[Thread 0x7fffa3339700 (LWP 2739) exited]
>[New Thread 0x7fffa3339700 (LWP 2740)]
>[Thread 0x7fffa3339700 (LWP 2740) exited]
>[New Thread 0x7fffa3339700 (LWP 2741)]
>[Thread 0x7fffa3339700 (LWP 2741) exited]
>[New Thread 0x7fffa3339700 (LWP 2742)]
>[Thread 0x7fffa3339700 (LWP 2742) exited]
>[New Thread 0x7fffa3339700 (LWP 2743)]
>[Thread 0x7fffa3339700 (LWP 2743) exited]
>[New Thread 0x7fffa3339700 (LWP 2744)]
>[Thread 0x7fffa3339700 (LWP 2744) exited]
>[New Thread 0x7fffa19a9700 (LWP 2745)]
>[Thread 0x7fffa19a9700 (LWP 2745) exited]
>[New Thread 0x7fffa3339700 (LWP 2746)]
>[Thread 0x7fffa3339700 (LWP 2746) exited]
>[New Thread 0x7fffa19a9700 (LWP 2747)]
>[Thread 0x7fffa19a9700 (LWP 2747) exited]
>[New Thread 0x7fffa19a9700 (LWP 2748)]
>[Thread 0x7fffa19a9700 (LWP 2748) exited]
>[New Thread 0x7fffa19a9700 (LWP 2749)]
>[Thread 0x7fffa19a9700 (LWP 2749) exited]
>[New Thread 0x7fffa3339700 (LWP 2750)]
>[Thread 0x7fffa3339700 (LWP 2750) exited]
>[New Thread 0x7fffa19a9700 (LWP 2751)]
>[Thread 0x7fffa19a9700 (LWP 2751) exited]
>[New Thread 0x7fffa3339700 (LWP 2752)]
>[Thread 0x7fffa3339700 (LWP 2752) exited]
>[New Thread 0x7fffa19a9700 (LWP 2753)]
>[Thread 0x7fffa19a9700 (LWP 2753) exited]
>[New Thread 0x7fffa3339700 (LWP 2754)]
>[Thread 0x7fffa3339700 (LWP 2754) exited]
>[New Thread 0x7fffa19a9700 (LWP 2755)]
>[Thread 0x7fffa19a9700 (LWP 2755) exited]
>[New Thread 0x7fffa3339700 (LWP 2756)]
>[Thread 0x7fffa3339700 (LWP 2756) exited]
>[New Thread 0x7fffa19a9700 (LWP 2757)]
>[Thread 0x7fffa19a9700 (LWP 2757) exited]
>[New Thread 0x7fffa3339700 (LWP 2758)]
>[Thread 0x7fffa3339700 (LWP 2758) exited]
>[New Thread 0x7fffa19a9700 (LWP 2759)]
>[Thread 0x7fffa19a9700 (LWP 2759) exited]
>[New Thread 0x7fffa3339700 (LWP 2760)]
>[Thread 0x7fffa3339700 (LWP 2760) exited]
>[New Thread 0x7fffa19a9700 (LWP 2761)]
>[Thread 0x7fffa19a9700 (LWP 2761) exited]
>[New Thread 0x7fffa3339700 (LWP 2762)]
>[Thread 0x7fffa3339700 (LWP 2762) exited]
>[New Thread 0x7fffa19a9700 (LWP 2763)]
>[Thread 0x7fffa19a9700 (LWP 2763) exited]
>[New Thread 0x7fffa3339700 (LWP 2764)]
>[Thread 0x7fffa3339700 (LWP 2764) exited]
>[New Thread 0x7fffa19a9700 (LWP 2765)]
>[Thread 0x7fffa19a9700 (LWP 2765) exited]
>[New Thread 0x7fffa3339700 (LWP 2766)]
>[Thread 0x7fffa3339700 (LWP 2766) exited]
>[New Thread 0x7fffa19a9700 (LWP 2767)]
>[Thread 0x7fffa19a9700 (LWP 2767) exited]
>[New Thread 0x7fffa3339700 (LWP 2768)]
>[Thread 0x7fffa3339700 (LWP 2768) exited]
>[New Thread 0x7fffa19a9700 (LWP 2769)]
>[Thread 0x7fffa19a9700 (LWP 2769) exited]
>[New Thread 0x7fffa3339700 (LWP 2770)]
>[Thread 0x7fffa3339700 (LWP 2770) exited]
>[New Thread 0x7fffa19a9700 (LWP 2771)]
>[Thread 0x7fffa19a9700 (LWP 2771) exited]
>[New Thread 0x7fffa3339700 (LWP 2772)]
>[Thread 0x7fffa3339700 (LWP 2772) exited]
>[New Thread 0x7fffa19a9700 (LWP 2773)]
>[Thread 0x7fffa19a9700 (LWP 2773) exited]
>[New Thread 0x7fffa3339700 (LWP 2774)]
>[Thread 0x7fffa3339700 (LWP 2774) exited]
>[New Thread 0x7fffa19a9700 (LWP 2775)]
>[Thread 0x7fffa19a9700 (LWP 2775) exited]
>[New Thread 0x7fffa3339700 (LWP 2776)]
>[Thread 0x7fffa3339700 (LWP 2776) exited]
>[New Thread 0x7fffa19a9700 (LWP 2777)]
>[Thread 0x7fffa19a9700 (LWP 2777) exited]
>[New Thread 0x7fffa3339700 (LWP 2778)]
>[Thread 0x7fffa3339700 (LWP 2778) exited]
>[New Thread 0x7fffa19a9700 (LWP 2779)]
>[Thread 0x7fffa19a9700 (LWP 2779) exited]
>[New Thread 0x7fffa3339700 (LWP 2780)]
>[Thread 0x7fffa3339700 (LWP 2780) exited]
>[New Thread 0x7fffa19a9700 (LWP 2781)]
>[Thread 0x7fffa19a9700 (LWP 2781) exited]
>[New Thread 0x7fffa3339700 (LWP 2782)]
>[Thread 0x7fffa3339700 (LWP 2782) exited]
>[New Thread 0x7fffa19a9700 (LWP 2783)]
>[Thread 0x7fffa19a9700 (LWP 2783) exited]
>[New Thread 0x7fffa3339700 (LWP 2784)]
>[Thread 0x7fffa3339700 (LWP 2784) exited]
>[New Thread 0x7fffa19a9700 (LWP 2785)]
>[Thread 0x7fffa19a9700 (LWP 2785) exited]
>[New Thread 0x7fffa3339700 (LWP 2786)]
>[Thread 0x7fffa3339700 (LWP 2786) exited]
>[New Thread 0x7fffa19a9700 (LWP 2787)]
>[Thread 0x7fffa19a9700 (LWP 2787) exited]
>[New Thread 0x7fffa3339700 (LWP 2788)]
>[Thread 0x7fffa3339700 (LWP 2788) exited]
>[New Thread 0x7fffa19a9700 (LWP 2789)]
>[Thread 0x7fffa19a9700 (LWP 2789) exited]
>[New Thread 0x7fffa3339700 (LWP 2790)]
>[Thread 0x7fffa3339700 (LWP 2790) exited]
>[New Thread 0x7fffa19a9700 (LWP 2791)]
>[Thread 0x7fffa19a9700 (LWP 2791) exited]
>[New Thread 0x7fffa3339700 (LWP 2792)]
>[Thread 0x7fffa3339700 (LWP 2792) exited]
>[New Thread 0x7fffa19a9700 (LWP 2793)]
>[Thread 0x7fffa19a9700 (LWP 2793) exited]
>[New Thread 0x7fffa3339700 (LWP 2794)]
>[Thread 0x7fffa3339700 (LWP 2794) exited]
>[New Thread 0x7fffa19a9700 (LWP 2795)]
>[Thread 0x7fffa19a9700 (LWP 2795) exited]
>[New Thread 0x7fffa3339700 (LWP 2796)]
>[Thread 0x7fffa3339700 (LWP 2796) exited]
>[New Thread 0x7fffa19a9700 (LWP 2797)]
>[Thread 0x7fffa19a9700 (LWP 2797) exited]
>[New Thread 0x7fffa3339700 (LWP 2798)]
>[Thread 0x7fffa3339700 (LWP 2798) exited]
>[New Thread 0x7fffa19a9700 (LWP 2799)]
>[Thread 0x7fffa19a9700 (LWP 2799) exited]
>[New Thread 0x7fffa3339700 (LWP 2800)]
>[Thread 0x7fffa3339700 (LWP 2800) exited]
>[New Thread 0x7fffa19a9700 (LWP 2801)]
>[Thread 0x7fffa19a9700 (LWP 2801) exited]
>[New Thread 0x7fffa3339700 (LWP 2802)]
>[Thread 0x7fffa3339700 (LWP 2802) exited]
>[New Thread 0x7fffa19a9700 (LWP 2803)]
>[Thread 0x7fffa19a9700 (LWP 2803) exited]
>[New Thread 0x7fffa3339700 (LWP 2804)]
>[Thread 0x7fffa3339700 (LWP 2804) exited]
>[New Thread 0x7fffa19a9700 (LWP 2805)]
>[Thread 0x7fffa19a9700 (LWP 2805) exited]
>[New Thread 0x7fffa3339700 (LWP 2806)]
>[Thread 0x7fffa3339700 (LWP 2806) exited]
>[New Thread 0x7fffa19a9700 (LWP 2807)]
>[Thread 0x7fffa19a9700 (LWP 2807) exited]
>[New Thread 0x7fffa3339700 (LWP 2808)]
>[Thread 0x7fffa3339700 (LWP 2808) exited]
>[New Thread 0x7fffa19a9700 (LWP 2809)]
>[Thread 0x7fffa19a9700 (LWP 2809) exited]
>[New Thread 0x7fffa3339700 (LWP 2810)]
>[Thread 0x7fffa3339700 (LWP 2810) exited]
>[New Thread 0x7fffa19a9700 (LWP 2811)]
>[Thread 0x7fffa19a9700 (LWP 2811) exited]
>[New Thread 0x7fffa3339700 (LWP 2812)]
>[Thread 0x7fffa3339700 (LWP 2812) exited]
>[New Thread 0x7fffa19a9700 (LWP 2813)]
>[Thread 0x7fffa19a9700 (LWP 2813) exited]
>[New Thread 0x7fffa3339700 (LWP 2814)]
>[Thread 0x7fffa3339700 (LWP 2814) exited]
>[New Thread 0x7fffa19a9700 (LWP 2815)]
>[Thread 0x7fffa19a9700 (LWP 2815) exited]
>[New Thread 0x7fffa3339700 (LWP 2816)]
>[Thread 0x7fffa3339700 (LWP 2816) exited]
>[New Thread 0x7fffa19a9700 (LWP 2817)]
>[Thread 0x7fffa19a9700 (LWP 2817) exited]
>[New Thread 0x7fffa3339700 (LWP 2818)]
>[Thread 0x7fffa3339700 (LWP 2818) exited]
>[New Thread 0x7fffa19a9700 (LWP 2819)]
>[Thread 0x7fffa19a9700 (LWP 2819) exited]
>[New Thread 0x7fffa3339700 (LWP 2820)]
>[Thread 0x7fffa3339700 (LWP 2820) exited]
>[New Thread 0x7fffa19a9700 (LWP 2821)]
>[Thread 0x7fffa19a9700 (LWP 2821) exited]
>[New Thread 0x7fffa3339700 (LWP 2822)]
>[Thread 0x7fffa3339700 (LWP 2822) exited]
>[New Thread 0x7fffa19a9700 (LWP 2823)]
>[Thread 0x7fffa19a9700 (LWP 2823) exited]
>[New Thread 0x7fffa3339700 (LWP 2824)]
>[Thread 0x7fffa3339700 (LWP 2824) exited]
>[New Thread 0x7fffa19a9700 (LWP 2825)]
>[Thread 0x7fffa19a9700 (LWP 2825) exited]
>[New Thread 0x7fffa3339700 (LWP 2826)]
>[Thread 0x7fffa3339700 (LWP 2826) exited]
>[New Thread 0x7fffa19a9700 (LWP 2827)]
>[Thread 0x7fffa19a9700 (LWP 2827) exited]
>[New Thread 0x7fffa3339700 (LWP 2828)]
>[Thread 0x7fffa3339700 (LWP 2828) exited]
>[New Thread 0x7fffa19a9700 (LWP 2829)]
>[Thread 0x7fffa19a9700 (LWP 2829) exited]
>[New Thread 0x7fffa3339700 (LWP 2830)]
>[Thread 0x7fffa3339700 (LWP 2830) exited]
>[New Thread 0x7fffa19a9700 (LWP 2831)]
>[Thread 0x7fffa19a9700 (LWP 2831) exited]
>[New Thread 0x7fffa3339700 (LWP 2832)]
>[Thread 0x7fffa3339700 (LWP 2832) exited]
>[New Thread 0x7fffa19a9700 (LWP 2833)]
>[Thread 0x7fffa19a9700 (LWP 2833) exited]
>[New Thread 0x7fffa3339700 (LWP 2834)]
>[Thread 0x7fffa3339700 (LWP 2834) exited]
>[New Thread 0x7fffa19a9700 (LWP 2835)]
>[Thread 0x7fffa19a9700 (LWP 2835) exited]
>[New Thread 0x7fffa3339700 (LWP 2836)]
>[Thread 0x7fffa3339700 (LWP 2836) exited]
>[New Thread 0x7fffa19a9700 (LWP 2837)]
>[Thread 0x7fffa19a9700 (LWP 2837) exited]
>[New Thread 0x7fffa3339700 (LWP 2838)]
>[Thread 0x7fffa3339700 (LWP 2838) exited]
>[New Thread 0x7fffa19a9700 (LWP 2839)]
>[Thread 0x7fffa19a9700 (LWP 2839) exited]
>[New Thread 0x7fffa3339700 (LWP 2840)]
>[Thread 0x7fffa3339700 (LWP 2840) exited]
>[New Thread 0x7fffa19a9700 (LWP 2841)]
>[Thread 0x7fffa19a9700 (LWP 2841) exited]
>[New Thread 0x7fffa3339700 (LWP 2842)]
>[Thread 0x7fffa3339700 (LWP 2842) exited]
>[New Thread 0x7fffa19a9700 (LWP 2843)]
>[Thread 0x7fffa19a9700 (LWP 2843) exited]
>[New Thread 0x7fffa3339700 (LWP 2844)]
>[Thread 0x7fffa3339700 (LWP 2844) exited]
>[New Thread 0x7fffa19a9700 (LWP 2845)]
>[Thread 0x7fffa19a9700 (LWP 2845) exited]
>[New Thread 0x7fffa3339700 (LWP 2846)]
>[Thread 0x7fffa3339700 (LWP 2846) exited]
>[New Thread 0x7fffa19a9700 (LWP 2847)]
>[Thread 0x7fffa19a9700 (LWP 2847) exited]
>[New Thread 0x7fffa3339700 (LWP 2848)]
>[Thread 0x7fffa3339700 (LWP 2848) exited]
>[New Thread 0x7fffa19a9700 (LWP 2849)]
>[Thread 0x7fffa19a9700 (LWP 2849) exited]
>[New Thread 0x7fffa3339700 (LWP 2850)]
>[Thread 0x7fffa3339700 (LWP 2850) exited]
>[New Thread 0x7fffa19a9700 (LWP 2851)]
>[Thread 0x7fffa19a9700 (LWP 2851) exited]
>[New Thread 0x7fffa3339700 (LWP 2852)]
>[Thread 0x7fffa3339700 (LWP 2852) exited]
>[New Thread 0x7fffa19a9700 (LWP 2853)]
>[Thread 0x7fffa19a9700 (LWP 2853) exited]
>[New Thread 0x7fffa3339700 (LWP 2854)]
>[Thread 0x7fffa3339700 (LWP 2854) exited]
>[New Thread 0x7fffa19a9700 (LWP 2855)]
>[Thread 0x7fffa19a9700 (LWP 2855) exited]
>[New Thread 0x7fffa3339700 (LWP 2856)]
>[Thread 0x7fffa3339700 (LWP 2856) exited]
>[New Thread 0x7fffa19a9700 (LWP 2857)]
>[Thread 0x7fffa19a9700 (LWP 2857) exited]
>[New Thread 0x7fffa3339700 (LWP 2858)]
>[Thread 0x7fffa3339700 (LWP 2858) exited]
>[New Thread 0x7fffa19a9700 (LWP 2859)]
>[Thread 0x7fffa19a9700 (LWP 2859) exited]
>[New Thread 0x7fffa3339700 (LWP 2860)]
>[Thread 0x7fffa3339700 (LWP 2860) exited]
>[New Thread 0x7fffa19a9700 (LWP 2861)]
>[Thread 0x7fffa19a9700 (LWP 2861) exited]
>[New Thread 0x7fffa3339700 (LWP 2862)]
>[Thread 0x7fffa3339700 (LWP 2862) exited]
>[New Thread 0x7fffa19a9700 (LWP 2863)]
>[Thread 0x7fffa19a9700 (LWP 2863) exited]
>[New Thread 0x7fffa3339700 (LWP 2864)]
>[Thread 0x7fffa3339700 (LWP 2864) exited]
>[New Thread 0x7fffa19a9700 (LWP 2865)]
>[New Thread 0x7fffa3339700 (LWP 2866)]
>[Thread 0x7fffa19a9700 (LWP 2865) exited]
>[Thread 0x7fffa3339700 (LWP 2866) exited]
>[New Thread 0x7fffa19a9700 (LWP 2867)]
>[Thread 0x7fffa19a9700 (LWP 2867) exited]
>[New Thread 0x7fffa3339700 (LWP 2868)]
>[Thread 0x7fffa3339700 (LWP 2868) exited]
>[New Thread 0x7fffa19a9700 (LWP 2869)]
>[Thread 0x7fffa19a9700 (LWP 2869) exited]
>[New Thread 0x7fffa3339700 (LWP 2870)]
>[Thread 0x7fffa3339700 (LWP 2870) exited]
>[New Thread 0x7fffa19a9700 (LWP 2871)]
>[Thread 0x7fffa19a9700 (LWP 2871) exited]
>[New Thread 0x7fffa3339700 (LWP 2872)]
>[Thread 0x7fffa3339700 (LWP 2872) exited]
>[New Thread 0x7fffa19a9700 (LWP 2873)]
>[Thread 0x7fffa19a9700 (LWP 2873) exited]
>[New Thread 0x7fffa3339700 (LWP 2874)]
>[Thread 0x7fffa3339700 (LWP 2874) exited]
>[New Thread 0x7fffa19a9700 (LWP 2875)]
>[Thread 0x7fffa19a9700 (LWP 2875) exited]
>[New Thread 0x7fffa3339700 (LWP 2876)]
>[Thread 0x7fffa3339700 (LWP 2876) exited]
>[New Thread 0x7fffa19a9700 (LWP 2877)]
>[Thread 0x7fffa19a9700 (LWP 2877) exited]
>[New Thread 0x7fffa3339700 (LWP 2878)]
>[Thread 0x7fffa3339700 (LWP 2878) exited]
>[New Thread 0x7fffa19a9700 (LWP 2879)]
>[Thread 0x7fffa19a9700 (LWP 2879) exited]
>[New Thread 0x7fffa3339700 (LWP 2880)]
>[Thread 0x7fffa3339700 (LWP 2880) exited]
>[New Thread 0x7fffa19a9700 (LWP 2881)]
>[Thread 0x7fffa19a9700 (LWP 2881) exited]
>[New Thread 0x7fffa3339700 (LWP 2882)]
>[Thread 0x7fffa3339700 (LWP 2882) exited]
>[New Thread 0x7fffa19a9700 (LWP 2883)]
>[Thread 0x7fffa19a9700 (LWP 2883) exited]
>[New Thread 0x7fffa3339700 (LWP 2884)]
>[Thread 0x7fffa3339700 (LWP 2884) exited]
>[New Thread 0x7fffa19a9700 (LWP 2885)]
>[Thread 0x7fffa19a9700 (LWP 2885) exited]
>[New Thread 0x7fffa3339700 (LWP 2886)]
>[Thread 0x7fffa3339700 (LWP 2886) exited]
>[New Thread 0x7fffa19a9700 (LWP 2887)]
>[Thread 0x7fffa19a9700 (LWP 2887) exited]
>[New Thread 0x7fffa3339700 (LWP 2888)]
>[Thread 0x7fffa3339700 (LWP 2888) exited]
>[New Thread 0x7fffa19a9700 (LWP 2889)]
>[Thread 0x7fffa19a9700 (LWP 2889) exited]
>[New Thread 0x7fffa3339700 (LWP 2890)]
>[Thread 0x7fffa3339700 (LWP 2890) exited]
>[New Thread 0x7fffa19a9700 (LWP 2891)]
>[Thread 0x7fffa19a9700 (LWP 2891) exited]
>[New Thread 0x7fffa3339700 (LWP 2892)]
>[Thread 0x7fffa3339700 (LWP 2892) exited]
>[New Thread 0x7fffa19a9700 (LWP 2893)]
>[Thread 0x7fffa19a9700 (LWP 2893) exited]
>[New Thread 0x7fffa3339700 (LWP 2894)]
>[Thread 0x7fffa3339700 (LWP 2894) exited]
>[New Thread 0x7fffa19a9700 (LWP 2895)]
>[Thread 0x7fffa19a9700 (LWP 2895) exited]
>[New Thread 0x7fffa3339700 (LWP 2896)]
>[Thread 0x7fffa3339700 (LWP 2896) exited]
>[New Thread 0x7fffa19a9700 (LWP 2897)]
>[Thread 0x7fffa19a9700 (LWP 2897) exited]
>[New Thread 0x7fffa3339700 (LWP 2898)]
>[Thread 0x7fffa3339700 (LWP 2898) exited]
>[New Thread 0x7fffa19a9700 (LWP 2899)]
>[Thread 0x7fffa19a9700 (LWP 2899) exited]
>[New Thread 0x7fffa3339700 (LWP 2900)]
>[Thread 0x7fffa3339700 (LWP 2900) exited]
>[New Thread 0x7fffa3339700 (LWP 2901)]
>[Thread 0x7fffa3339700 (LWP 2901) exited]
>[New Thread 0x7fffa19a9700 (LWP 2902)]
>[Thread 0x7fffa19a9700 (LWP 2902) exited]
>[New Thread 0x7fffa3339700 (LWP 2903)]
>[Thread 0x7fffa3339700 (LWP 2903) exited]
>[New Thread 0x7fffa19a9700 (LWP 2904)]
>[Thread 0x7fffa19a9700 (LWP 2904) exited]
>[New Thread 0x7fffa3339700 (LWP 2905)]
>[Thread 0x7fffa3339700 (LWP 2905) exited]
>[New Thread 0x7fffa19a9700 (LWP 2906)]
>[Thread 0x7fffa19a9700 (LWP 2906) exited]
>[New Thread 0x7fffa3339700 (LWP 2907)]
>[Thread 0x7fffa3339700 (LWP 2907) exited]
>[New Thread 0x7fffa19a9700 (LWP 2908)]
>[Thread 0x7fffa19a9700 (LWP 2908) exited]
>[New Thread 0x7fffa3339700 (LWP 2909)]
>[Thread 0x7fffa3339700 (LWP 2909) exited]
>[New Thread 0x7fffa19a9700 (LWP 2910)]
>[Thread 0x7fffa19a9700 (LWP 2910) exited]
>[New Thread 0x7fffa3339700 (LWP 2911)]
>[Thread 0x7fffa3339700 (LWP 2911) exited]
>[New Thread 0x7fffa19a9700 (LWP 2912)]
>[Thread 0x7fffa19a9700 (LWP 2912) exited]
>[New Thread 0x7fffa3339700 (LWP 2913)]
>[Thread 0x7fffa3339700 (LWP 2913) exited]
>[New Thread 0x7fffa19a9700 (LWP 2914)]
>[Thread 0x7fffa19a9700 (LWP 2914) exited]
>[New Thread 0x7fffa3339700 (LWP 2915)]
>[Thread 0x7fffa3339700 (LWP 2915) exited]
>[New Thread 0x7fffa19a9700 (LWP 2916)]
>[Thread 0x7fffa19a9700 (LWP 2916) exited]
>[New Thread 0x7fffa3339700 (LWP 2917)]
>[Thread 0x7fffa3339700 (LWP 2917) exited]
>[New Thread 0x7fffa19a9700 (LWP 2918)]
>[Thread 0x7fffa19a9700 (LWP 2918) exited]
>[New Thread 0x7fffa3339700 (LWP 2919)]
>[Thread 0x7fffa3339700 (LWP 2919) exited]
>[New Thread 0x7fffa19a9700 (LWP 2920)]
>[Thread 0x7fffa19a9700 (LWP 2920) exited]
>[New Thread 0x7fffa3339700 (LWP 2921)]
>[Thread 0x7fffa3339700 (LWP 2921) exited]
>[New Thread 0x7fffa19a9700 (LWP 2922)]
>[Thread 0x7fffa19a9700 (LWP 2922) exited]
>[New Thread 0x7fffa3339700 (LWP 2923)]
>[Thread 0x7fffa3339700 (LWP 2923) exited]
>[New Thread 0x7fffa19a9700 (LWP 2924)]
>[Thread 0x7fffa19a9700 (LWP 2924) exited]
>[New Thread 0x7fffa3339700 (LWP 2925)]
>[Thread 0x7fffa3339700 (LWP 2925) exited]
>[New Thread 0x7fffa19a9700 (LWP 2926)]
>[Thread 0x7fffa19a9700 (LWP 2926) exited]
>[New Thread 0x7fffa3339700 (LWP 2927)]
>[Thread 0x7fffa3339700 (LWP 2927) exited]
>[New Thread 0x7fffa19a9700 (LWP 2928)]
>[Thread 0x7fffa19a9700 (LWP 2928) exited]
>[New Thread 0x7fffa19a9700 (LWP 2929)]
>[Thread 0x7fffa19a9700 (LWP 2929) exited]
>[New Thread 0x7fffa19a9700 (LWP 2930)]
>[Thread 0x7fffa19a9700 (LWP 2930) exited]
>[New Thread 0x7fffa3339700 (LWP 2931)]
>[Thread 0x7fffa3339700 (LWP 2931) exited]
>[New Thread 0x7fffa19a9700 (LWP 2932)]
>[New Thread 0x7fffa3339700 (LWP 2933)]
>[Thread 0x7fffa19a9700 (LWP 2932) exited]
>[Thread 0x7fffa3339700 (LWP 2933) exited]
>[New Thread 0x7fffa19a9700 (LWP 2934)]
>[Thread 0x7fffa19a9700 (LWP 2934) exited]
>[New Thread 0x7fffa3339700 (LWP 2935)]
>[Thread 0x7fffa3339700 (LWP 2935) exited]
>[New Thread 0x7fffa19a9700 (LWP 2936)]
>[Thread 0x7fffa19a9700 (LWP 2936) exited]
>[New Thread 0x7fffa3339700 (LWP 2937)]
>[Thread 0x7fffa3339700 (LWP 2937) exited]
>[New Thread 0x7fffa19a9700 (LWP 2938)]
>[Thread 0x7fffa19a9700 (LWP 2938) exited]
>[New Thread 0x7fffa3339700 (LWP 2939)]
>[Thread 0x7fffa3339700 (LWP 2939) exited]
>[New Thread 0x7fffa19a9700 (LWP 2940)]
>[Thread 0x7fffa19a9700 (LWP 2940) exited]
>[New Thread 0x7fffa3339700 (LWP 2941)]
>[Thread 0x7fffa3339700 (LWP 2941) exited]
>[New Thread 0x7fffa19a9700 (LWP 2942)]
>[Thread 0x7fffa19a9700 (LWP 2942) exited]
>[New Thread 0x7fffa3339700 (LWP 2943)]
>[Thread 0x7fffa3339700 (LWP 2943) exited]
>[New Thread 0x7fffa19a9700 (LWP 2944)]
>[Thread 0x7fffa19a9700 (LWP 2944) exited]
>[New Thread 0x7fffa3339700 (LWP 2945)]
>[Thread 0x7fffa3339700 (LWP 2945) exited]
>[New Thread 0x7fffa19a9700 (LWP 2946)]
>[Thread 0x7fffa19a9700 (LWP 2946) exited]
>[New Thread 0x7fffa3339700 (LWP 2947)]
>[Thread 0x7fffa3339700 (LWP 2947) exited]
>[New Thread 0x7fffa19a9700 (LWP 2948)]
>[Thread 0x7fffa19a9700 (LWP 2948) exited]
>[New Thread 0x7fffa3339700 (LWP 2949)]
>[Thread 0x7fffa3339700 (LWP 2949) exited]
>[New Thread 0x7fffa19a9700 (LWP 2950)]
>[Thread 0x7fffa19a9700 (LWP 2950) exited]
>[New Thread 0x7fffa3339700 (LWP 2951)]
>[Thread 0x7fffa3339700 (LWP 2951) exited]
>[New Thread 0x7fffa19a9700 (LWP 2952)]
>[Thread 0x7fffa19a9700 (LWP 2952) exited]
>[New Thread 0x7fffa3339700 (LWP 2953)]
>[Thread 0x7fffa3339700 (LWP 2953) exited]
>[New Thread 0x7fffa19a9700 (LWP 2954)]
>[Thread 0x7fffa19a9700 (LWP 2954) exited]
>[New Thread 0x7fffa3339700 (LWP 2955)]
>[Thread 0x7fffa3339700 (LWP 2955) exited]
>[New Thread 0x7fffa19a9700 (LWP 2956)]
>[Thread 0x7fffa19a9700 (LWP 2956) exited]
>[New Thread 0x7fffa3339700 (LWP 2957)]
>[Thread 0x7fffa3339700 (LWP 2957) exited]
>[New Thread 0x7fffa19a9700 (LWP 2958)]
>[Thread 0x7fffa19a9700 (LWP 2958) exited]
>[New Thread 0x7fffa3339700 (LWP 2959)]
>[Thread 0x7fffa3339700 (LWP 2959) exited]
>[New Thread 0x7fffa19a9700 (LWP 2960)]
>[Thread 0x7fffa19a9700 (LWP 2960) exited]
>[New Thread 0x7fffa3339700 (LWP 2961)]
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>
>Program received signal SIGSEGV, Segmentation fault.
>[Switching to Thread 0x7fffa21e7700 (LWP 2585)]
>memset () at ../sysdeps/x86_64/memset.S:93
>93	../sysdeps/x86_64/memset.S: No such file or directory.
>(gdb) bt
>#0  memset () at ../sysdeps/x86_64/memset.S:93
>#1  0x00007fffe79015fe in memset (__len=482688, __ch=0, __dest=0x7fffa216e550) at /usr/include/x86_64-linux-gnu/bits/string3.h:84
>#2  fs_instruction_scheduler::calculate_deps (this=0x7fffa21e43e0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:935
>#3  0x00007fffe79025aa in instruction_scheduler::run (this=this@entry=0x7fffa21e43e0, cfg=0x7ffed2799f38)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1653
>#4  0x00007fffe79027da in fs_visitor::schedule_instructions (this=this@entry=0x7fffa21e45a0, mode=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1685
>#5  0x00007fffe78bf180 in fs_visitor::allocate_registers (this=this@entry=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5177
>#6  0x00007fffe78c1a32 in fs_visitor::run_cs (this=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5453
>#7  0x00007fffe78c1b56 in brw_compile_cs (compiler=0x4d090e8, log_data=log_data@entry=0x84a1df8, mem_ctx=mem_ctx@entry=0x7ffeeba1c868, 
>    key=key@entry=0x7fffa21e61b0, prog_data=prog_data@entry=0x7fffa21e60e0, src_shader=<optimized out>, shader_time_index=-1, 
>    final_assembly_size=0x7fffa21e60d4, error_str=0x7fffa21e60d8) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5706
>#8  0x00007fffe784cc44 in brw_codegen_cs_prog (brw=brw@entry=0x84a1df8, prog=prog@entry=0x7fff44131a78, cp=cp@entry=0x7ffed173bd90, 
>    key=key@entry=0x7fffa21e61b0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:124
>#9  0x00007fffe784d0b3 in brw_cs_precompile (ctx=0x84a1df8, shader_prog=0x7fff44131a78, prog=0x7ffed173bd90)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:239
>#10 0x00007fffe7854678 in brw_shader_precompile (sh_prog=<optimized out>, ctx=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:66
>#11 brw_link_shader (ctx=0x84a1df8, shProg=0x0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:260
>#12 0x00007fffe76f34e6 in _mesa_glsl_link_shader (ctx=0x84a1df8, prog=0x7fff44131a78) at ../../../../src/mesa/program/ir_to_mesa.cpp:3040
>#13 0x00007fffe760846a in link_program (ctx=0x84a1df8, program=<optimized out>) at ../../../../src/mesa/main/shaderapi.c:1048
>#14 0x00000000009fe30b in ?? ()
>#15 0x00000000009fbcfc in ?? ()
>#16 0x0000000001108b29 in ?? ()
>#17 0x00000000010fd25a in ?? ()
>#18 0x000000000181254d in ?? ()
>#19 0x00000000012395ec in ?? ()
>#20 0x0000000000ce8ef3 in ?? ()
>#21 0x0000000000ce9135 in ?? ()
>#22 0x000000000137c58d in ?? ()
>#23 0x000000000137c5b7 in ?? ()
>#24 0x0000000000923d69 in ?? ()
>#25 0x0000000000b1dbd7 in ?? ()
>#26 0x00007ffff6ed80a4 in start_thread (arg=0x7fffa21e7700) at pthread_create.c:309
>#27 0x00007ffff53b39cd in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:111
>(gdb) bt full
>#0  memset () at ../sysdeps/x86_64/memset.S:93
>No locals.
>#1  0x00007fffe79015fe in memset (__len=482688, __ch=0, __dest=0x7fffa216e550) at /usr/include/x86_64-linux-gnu/bits/string3.h:84
>No locals.
>#2  fs_instruction_scheduler::calculate_deps (this=0x7fffa21e43e0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:935
>        last_grf_write = 0x7fffa216e550
>        last_mrf_write = 0x7fffa216e4c0
>        last_conditional_mod = {0x0, 0x0}
>        node = <optimized out>
>        last_accumulator_write = 0x0
>        last_fixed_grf_write = 0x0
>        prev = <optimized out>
>#3  0x00007fffe79025aa in instruction_scheduler::run (this=this@entry=0x7fffa21e43e0, cfg=0x7ffed2799f38)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1653
>        block = 0x7ffed26fe648
>#4  0x00007fffe79027da in fs_visitor::schedule_instructions (this=this@entry=0x7fffa21e45a0, mode=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1685
>        grf_count = 3771
>        sched = {<instruction_scheduler> = {_vptr.instruction_scheduler = 0x7fffe7d03310 <vtable for fs_instruction_scheduler+16>, mem_ctx = 0x7fff0340bc68, 
>            post_reg_alloc = false, instructions_to_schedule = 20, grf_count = 3771, hw_reg_count = 4, time = 0, reg_pressure = 0, block_idx = -1575074400, 
>            instructions = {head = 0x7ffed27c9018, tail = 0x0, tail_pred = 0x7ffed27abf48}, bs = 0x7fffa21e45a0, mode = SCHEDULE_PRE, 
>            reg_pressure_in = 0x7ffed27d9128, livein = 0x7ffed27bf4d8, liveout = 0x7ffed27a7b18, hw_liveout = 0x7ffed2772968, written = 0x7ffed1857a38, 
>            reads_remaining = 0x7ffed1e63128, hw_reads_remaining = 0x7ffee5c223b8}, v = 0x7fffa21e45a0}
>#5  0x00007fffe78bf180 in fs_visitor::allocate_registers (this=this@entry=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5177
>        i = <optimized out>
>        allocated_without_spills = false
>        pre_modes = {SCHEDULE_PRE, SCHEDULE_PRE_NON_LIFO, SCHEDULE_PRE_LIFO}
>#6  0x00007fffe78c1a32 in fs_visitor::run_cs (this=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5453
>        this = 0x7fffa21e45a0
>#7  0x00007fffe78c1b56 in brw_compile_cs (compiler=0x4d090e8, log_data=log_data@entry=0x84a1df8, mem_ctx=mem_ctx@entry=0x7ffeeba1c868, 
>    key=key@entry=0x7fffa21e61b0, prog_data=prog_data@entry=0x7fffa21e60e0, src_shader=<optimized out>, shader_time_index=-1, 
>    final_assembly_size=0x7fffa21e60d4, error_str=0x7fffa21e60d8) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5706
>        local_workgroup_size = 32
>        fail_msg = 0x0
>        v8 = {<backend_shader> = {_vptr.backend_shader = 0x7fffe7d17010 <vtable for fs_visitor+16>, compiler = 0x4d090e8, log_data = 0x84a1df8, 
>            devinfo = 0x7fffe7a26780 <brw_device_info_hsw_gt3>, nir = 0x7ffed23a3c58, stage_prog_data = 0x7fffa21e60e0, mem_ctx = 0x7ffeeba1c868, 
>            instructions = {head = 0x7fffa21e45e0, tail = 0x0, tail_pred = 0x7fffa21e45d8}, cfg = 0x7ffed2799f38, stage = MESA_SHADER_COMPUTE, 
>            debug_enabled = false, stage_name = 0x7fffe7a119c5 "compute", stage_abbrev = 0x7fffe7a1f91c "CS", alloc = {sizes = 0x7ffed23a5ac0, 
>              offsets = 0x7ffed26db9d0, count = 3771, total_size = 4521, capacity = 8192}}, key = 0x7fffa21e61b0, key_tex = 0x7fffa21e61b4, 
>          gs_compile = 0x0, prog_data = 0x7fffa21e60e0, prog = 0x0, input_vue_map = 0x0, param_size = 0x7ffed2686098, virtual_grf_start = 0x7ffed214c358, 
>          virtual_grf_end = 0x7ffed1d76718, live_intervals = 0x7ffed27a70f8, regs_live_at_ip = 0x0, uniforms = 0, last_scratch = 0, 
>          pull_constant_loc = 0x7ffed4ff1448, push_constant_loc = 0x7ffee88cc6a8, frag_depth = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, frag_stencil = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>          sample_mask = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, outputs = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'} <repeats 58 times>}, output_components = {0 <repeats 58 times>}, 
>          dual_src_output = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, do_dual_src = false, first_non_payload_grf = 4, 
>          max_grf = 112, nir_locals = 0x7ffed255a978, nir_ssa_values = 0x7ffed3315968, nir_inputs = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, nir_outputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_F, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 228, writemask = 15, 
>                    indirect_offset = 0, vstride = 4, width = 3, hstride = 1, pad1 = 0}, f = 7.27948604e-12, d = 754978788, ud = 754978788}}, 
>              reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, nir_system_values = 0x7ffed271c948, failed = false, 
>          fail_msg = 0x7fffa21e5060 "p", simd16_unsupported = false, no16_msg = 0x0, result = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_F, 
>                file = VGRF, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 3914, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, payload = {source_depth_reg = 0 '\000', source_w_reg = 0 '\000', aa_dest_stencil_reg = 0 '\000', dest_depth_reg = 0 '\000', 
>            sample_pos_reg = 0 '\000', sample_mask_in_reg = 0 '\000', barycentric_coord_reg = "\000\000\000\000\000", local_invocation_id_reg = 1 '\001', 
>            num_regs = 4 '\004'}, source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, pixel_y = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, 
>                negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                    width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>          wpos_w = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, 
>                nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>              reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, pixel_w = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, delta_xy = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, 
>                  address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                      pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>              stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}}, 
>          shader_start_time = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, userplane = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>              stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}}, final_gs_vertex_count = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, control_data_bits = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, grf_used = 0, spilled_any_registers = false, dispatch_width = 8, shader_time_index = -1, promoted_constants = 26, bld = {
>            shader = 0x7fffa21e45a0, block = 0x0, cursor = 0x0, _dispatch_width = 64, _group = 0, force_writemask_all = false, annotation = {str = 0x0, 
>              ir = 0x0}}}
>        v16 = {<backend_shader> = {_vptr.backend_shader = 0x7fffa21e5400, compiler = 0x7ffff5301d74 <msort_with_tmp+468>, log_data = 0x0, devinfo = 0x8, 
>            nir = 0x7fffa21e53f0, stage_prog_data = 0x7fffa21e53c0, mem_ctx = 0x7fffa21e5430, instructions = {head = 0x7ffff5301e91 <msort_with_tmp+753>, 
>              tail = 0x0, tail_pred = 0x8}, cfg = 0x7fffa21e5420, stage = 2719896560, debug_enabled = 255, stage_name = 0x7fffa21e5460 "@U\036\242\377\177", 
>            stage_abbrev = 0x7ffff5301e91 <msort_with_tmp+753> "\205\300\177\313I\213\004$H\203\355\001I\203\304\bI\211\a\353\310L\213d$ \351\360\375\377\377UH\211\345AWI\211\317AVI\211\376AUATSH\211\323H\203\354hH\203\372 H\211u\200\017\207\270\001", alloc = {sizes = 0x0, offsets = 0x8, count = 2719896656, 
>              total_size = 32767, capacity = 2719896608}}, key = 0x7fffa21e5490, key_tex = 0x7ffff5301e91 <msort_with_tmp+753>, gs_compile = 0x0, 
>          prog_data = 0x8, prog = 0x7fffa21e5480, input_vue_map = 0x7fffa21e5450, param_size = 0x7fffa21e54c0, 
>          virtual_grf_start = 0x7ffff5301e91 <msort_with_tmp+753>, virtual_grf_end = 0x0, live_intervals = 0x8, regs_live_at_ip = 0x7fffa21e54b0, 
>          uniforms = 2719896704, last_scratch = 32767, pull_constant_loc = 0x7fffa21e54f0, push_constant_loc = 0x7ffff5301e91 <msort_with_tmp+753>, 
>          frag_depth = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e54e0, stride = 176 '\260'}, 
>          frag_stencil = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 1, 
>                address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                    hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, 
>            stride = 8 '\b'}, sample_mask = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_GENERAL_REGISTER_FILE, negate = 0, 
>                abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                    hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21728}, subreg_offset = 32767, 
>            reladdr = 0x7fffa21e5550, stride = 116 't'}, outputs = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e5540, stride = 16 '\020'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 7825}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21824}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e55b0, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e55a0, stride = 112 'p'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 1, abs = 1, 
>                  address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, 
>              stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = ATTR, negate = 1, abs = 1, address_mode = 0, pad0 = 1, 
>                  subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21920}, subreg_offset = 32767, reladdr = 0x7fffa21e5610, stride = 145 '\221'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5600, stride = 208 '\320'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 7825}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 22016}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5670, stride = 116 't'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e5660, stride = 48 '0'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, 
>                  negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7825}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 22112}, subreg_offset = 32767, reladdr = 0x7fffa21e56d0, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e56c0, stride = 144 '\220'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 22208}, subreg_offset = 32767, reladdr = 0x7fffa21e5730, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5780, stride = 120 'x'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 26, nr = 59343, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23249}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 104 'h'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23720}, 
>              subreg_offset = 32767, reladdr = 0x7fffe7cfd6b8 <replace39_0+24>, stride = 209 '\321'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 11, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 12040}, subreg_offset = 32766, reladdr = 0x7fffa21e5890, stride = 27 '\033'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 45960}, subreg_offset = 32766, reladdr = 0x7fffa21e5c60, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 22400}, subreg_offset = 32767, reladdr = 0x7fffa21e57f0, stride = 116 't'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e57e0, stride = 2 '\002'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 11, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x1, stride = 80 'P'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_F, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 2}, subreg_offset = 32767, reladdr = 0x0, stride = 91 '['}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 336}, subreg_offset = 0, 
>              reladdr = 0x4, stride = 2 '\002'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, 
>                  negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                      width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 91}, subreg_offset = 32767, reladdr = 0x1, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = 14, file = UNIFORM, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 119, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 1.66754517e-43, d = 119, ud = 119}}, 
>                reg_offset = 21154}, subreg_offset = 32767, reladdr = 0x7ffed2b12e48, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = VGRF, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 5, nr = 53937, {{swizzle = 254, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, 
>                reg_offset = 26795}, subreg_offset = 32767, reladdr = 0x7ffed2b12e48, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 2}, subreg_offset = -5833866, reladdr = 0x7ffed2b12e48, stride = 136 '\210'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 26, 
>                  nr = 59343, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 26504}, subreg_offset = 32767, reladdr = 0x80, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 30, 
>                  nr = 59296, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 50118}, subreg_offset = 32767, reladdr = 0x80, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 30, nr = 59296, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 50118}, subreg_offset = 32767, reladdr = 0x7ffed19358b8, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 3, nr = 53636, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 26376}, subreg_offset = 32766, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 53288}, subreg_offset = 32766, reladdr = 0x7ffed26010b0, stride = 208 '\320'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 2, nr = 53856, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0xc0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 1, address_mode = 0, pad0 = 1, subnr = 30, nr = 59296, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 50118}, 
>              subreg_offset = 32767, reladdr = 0x7ffed1804e88, stride = 192 '\300'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 2, nr = 53633, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 50378}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 46336}, 
>              subreg_offset = -5833866, reladdr = 0x7ffed2b13d78, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 0, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 42784}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5b60, stride = 202 '\312'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 1}, subreg_offset = 3, 
>              reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, 
>                  abs = 0, address_mode = 1, pad0 = 1, subnr = 7, nr = 53937, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 1}, subreg_offset = 0, reladdr = 0x7fffa21e5a00, 
>              stride = 96 '`'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                  address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                      pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 46336}, subreg_offset = -5833866, reladdr = 0x7ffed2387db8, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 0, 
>                  subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 52064}, subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, 
>                  subnr = 12, nr = 53869, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 1}, subreg_offset = 0, reladdr = 0x7fffa21e5a60, stride = 96 '`'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 49267}, subreg_offset = 32767, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x1, stride = 96 '`'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = UNIFORM, negate = 1, abs = 0, address_mode = 1, pad0 = 0, subnr = 25, nr = 59343, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23488}, 
>              subreg_offset = 32767, reladdr = 0x7fffe7cef740 <nir_op_infos>, stride = 202 '\312'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 25, nr = 53604, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 23488}, subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 53869, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x7fffa21e5fd0, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 49354}, subreg_offset = 32767, reladdr = 0x7fffa21e5bc0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 24760}, subreg_offset = 32766, reladdr = 0x7ffed26d60b8, stride = 152 '\230'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 0, 
>                  subnr = 28, nr = 59343, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23488}, subreg_offset = 32767, reladdr = 0x7fffe7cf2b48, stride = 67 'C'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 52064}, subreg_offset = 32767, reladdr = 0x7fffe7cfcae0 <search11>, stride = 144 '\220'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 30, 
>                  nr = 59342, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 50378}, subreg_offset = 32767, reladdr = 0x7ffed164cbb8, stride = 144 '\220'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 46336}, subreg_offset = -5833866, reladdr = 0x7ffed26d60b8, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, 
>                  subnr = 12, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 58144}, subreg_offset = 32767, reladdr = 0x7fff00000001, stride = 184 '\270'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, 
>                  pad0 = 0, subnr = 21, nr = 53802, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 21032}, subreg_offset = 32766, reladdr = 0x7ffed2555210, stride = 0 '\000'}}, 
>          output_components = {1, 0, 3514293736, 32766, 3514341952, 32766, 3513037840, 32766, 3532932368, 32766, 0, 0, 0, 0, 3530383544, 32766, 3522275080, 
>            32766, 3522275080, 32766, 3522275056, 32766, 0, 0, 0, 0, 1, 0, 0, 0, 3530383544, 32766, 3522275080, 32766, 3522275080, 32766, 3522275056, 32766, 
>            0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 3514293736, 32766, 3514341952, 32766}, dual_src_output = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BRW_GENERAL_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 22, nr = 53604, {{
>                    swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                  ud = 32766}}, reg_offset = 17680}, subreg_offset = 32766, reladdr = 0x0, stride = 0 '\000'}, do_dual_src = 184, 
>          first_non_payload_grf = 32766, max_grf = 3522275080, nir_locals = 0x7ffed1f1a708, nir_ssa_values = 0x7ffed1f1a6f0, 
>          nir_inputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x1, stride = 0 '\000'}, 
>          nir_outputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, 
>                pad0 = 0, subnr = 12, nr = 53869, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                  f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 42760}, subreg_offset = 32766, reladdr = 0x7fffe77e8b95 <dead_cf_list+1221>, 
>            stride = 96 '`'}, nir_system_values = 0x0, failed = 16, fail_msg = 0x7ffed1fff3f0 "", simd16_unsupported = false, 
>          no16_msg = 0x7ffed1fff3e8 "h\366\377\321\376\177", result = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                    indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>            reladdr = 0x7fffa21e5e10, stride = 224 '\340'}, payload = {source_depth_reg = 80 'P', source_w_reg = 94 '^', aa_dest_stencil_reg = 30 '\036', 
>            dest_depth_reg = 162 '\242', sample_pos_reg = 255 '\377', sample_mask_in_reg = 127 '\177', 
>            barycentric_coord_reg = "\000\000\221\036", <incomplete sequence \365>, local_invocation_id_reg = 255 '\377', num_regs = 127 '\177'}, 
>          source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                    indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>            reladdr = 0x7fffa21e5e40, stride = 16 '\020'}, pixel_y = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                    writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>              reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x7fffa21e6068, stride = 8 '\b'}, wpos_w = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_W, file = BRW_GENERAL_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                    swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                  ud = 32767}}, reg_offset = 336}, subreg_offset = 0, reladdr = 0x4, stride = 116 't'}, pixel_w = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                    swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>              reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5e30, stride = 112 'p'}, delta_xy = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 2}, subreg_offset = 0, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = ATTR, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 46336}, 
>              subreg_offset = -5833866, reladdr = 0x7ffed1fff378, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 1}, subreg_offset = 0, 
>              reladdr = 0x7ffed21c3ee8, stride = 16 '\020'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BAD_FILE, negate = 0, 
>                  abs = 1, address_mode = 1, pad0 = 0, subnr = 30, nr = 53759, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 35733}, subreg_offset = 32767, 
>              reladdr = 0x7fffa21e5eb0, stride = 240 '\360'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 12928}, subreg_offset = 32766, reladdr = 0x0, 
>              stride = 120 'x'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = ATTR, negate = 0, abs = 1, address_mode = 1, pad0 = 1, 
>                  subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 24352}, subreg_offset = 32767, reladdr = 0x7fffa21e5f90, 
>              stride = 145 '\221'}}, shader_start_time = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, 
>                negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                    width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5f80, 
>            stride = 80 'P'}, userplane = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, 
>                  abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 2}, subreg_offset = 0, 
>              reladdr = 0x7fffe77cf4c0 <cmp_phi_src>, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 24512}, 
>              subreg_offset = 32767, reladdr = 0x20, stride = 192 '\300'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, 
>                  negate = 1, abs = 0, address_mode = 0, pad0 = 1, subnr = 30, nr = 59260, {{swizzle = 255, writemask = 15, indirect_offset = 7, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 8520}, 
>              subreg_offset = 32767, reladdr = 0x7ffed2db2498, stride = 143 '\217'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 240}, subreg_offset = 32766, reladdr = 0x0, stride = 56 '8'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 2, nr = 53803, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 64655}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5fa0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 1, pad0 = 0, subnr = 6, nr = 53707, {{swizzle = 254, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = VGRF, negate = 1, abs = 1, address_mode = 0, pad0 = 0, subnr = 14, nr = 53707, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 24672}, 
>              subreg_offset = 32767, reladdr = 0x7ffed1cb3208, stride = 149 '\225'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 51696}, subreg_offset = 32767, reladdr = 0x7fffa21e60e7, stride = 200 '\310'}}, 
>          final_gs_vertex_count = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_W, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 592}, subreg_offset = 0, reladdr = 0x8, stride = 56 '8'}, 
>          control_data_bits = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 92}, subreg_offset = -5833866, reladdr = 0x0, stride = 0 '\000'}, grf_used = 110, 
>          spilled_any_registers = 119, dispatch_width = 0, shader_time_index = 0, promoted_constants = 124, bld = {
>            shader = 0x7fffe77e74a0 <constant_fold_block>, block = 0x7fffa21e60d0, cursor = 0x7fff44000020, _dispatch_width = 1744, _group = 0, 
>            force_writemask_all = 103, annotation = {str = 0x7ffed3315930 "\001", ir = 0x7ffed1767bb8}}}
>        g = {compiler = 0x0, log_data = 0x0, devinfo = 0x0, p = 0x7ffed2ab91b8, key = 0x0, prog_data = 0x0, dispatch_width = 1, discard_halt_patches = {
>            head = 0x1, tail = 0x70, tail_pred = 0x0}, promoted_constants = 0, runtime_check_aads_emit = false, debug_flag = false, 
>          shader_name = 0x1 <error: Cannot access memory at address 0x1>, stage = 112, mem_ctx = 0x0}
>        shader = 0x7ffed23a3c58
>        max_cs_threads = 70
>        cfg = 0x0
>#8  0x00007fffe784cc44 in brw_codegen_cs_prog (brw=brw@entry=0x84a1df8, prog=prog@entry=0x7fff44131a78, cp=cp@entry=0x7ffed173bd90, 
>    key=key@entry=0x7fffa21e61b0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:124
>        ctx = 0x84a1df8
>        program = <optimized out>
>        mem_ctx = 0x7ffeeba1c868
>        program_size = 0
>        prog_data = {base = {binding_table = {size_bytes = 40, pull_constants_start = 10, texture_start = 1, gather_texture_start = 3503345872, 
>              ubo_start = 4, ssbo_start = 5, abo_start = 8, image_start = 3503345872, shader_time_start = 3503345872}, nr_params = 0, nr_pull_params = 0, 
>            nr_image_params = 0, curb_read_length = 0, total_scratch = 0, total_shared = 0, dispatch_grf_start_reg = 4, use_alt_mode = false, 
>            param = 0x7ffed1867828, pull_param = 0x7ffed1aed598, image_param = 0x7ffeef7b4158}, dispatch_grf_start_reg_16 = 0, local_size = {32, 1, 1}, 
>          simd_size = 0, uses_barrier = false, uses_num_work_groups = false, local_invocation_id_regs = 3, binding_table = {work_groups_start = 0}}
>        start_busy = false
>        start_time = 0
>        cs = 0x7ffed163fb78
>        param_count = <optimized out>
>        st_index = <optimized out>
>        error_str = 0x1 <error: Cannot access memory at address 0x1>
>#9  0x00007fffe784d0b3 in brw_cs_precompile (ctx=0x84a1df8, shader_prog=0x7fff44131a78, prog=0x7ffed173bd90)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:239
>        key = {program_string_id = 543, tex = {swizzles = {1672, 1672, 1672, 0 <repeats 29 times>}, gl_clamp_mask = {0, 0, 0}, 
>            gather_channel_quirk_mask = 0, compressed_multisample_layout_mask = 0, msaa_16 = 0, gen6_gather_wa = {(unknown: 0) <repeats 32 times>}}}
>        cp = 0x7ffed173bd90
>        old_prog_offset = 0
>        old_prog_data = 0x0
>        success = <optimized out>
>#10 0x00007fffe7854678 in brw_shader_precompile (sh_prog=<optimized out>, ctx=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:66
>        gs = 0x0
>        cs = 0x7ffed163fb78
>        vs = 0x0
>        tcs = 0x0
>        tes = 0x0
>        fs = 0x7fffa216e550
>#11 brw_link_shader (ctx=0x84a1df8, shProg=0x0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:260
>No locals.
>#12 0x00007fffe76f34e6 in _mesa_glsl_link_shader (ctx=0x84a1df8, prog=0x7fff44131a78) at ../../../../src/mesa/program/ir_to_mesa.cpp:3040
>        i = <optimized out>
>#13 0x00007fffe760846a in link_program (ctx=0x84a1df8, program=<optimized out>) at ../../../../src/mesa/main/shaderapi.c:1048
>        shProg = 0x7fff44131a78
>#14 0x00000000009fe30b in ?? ()
>No symbol table info available.
>#15 0x00000000009fbcfc in ?? ()
>No symbol table info available.
>#16 0x0000000001108b29 in ?? ()
>No symbol table info available.
>#17 0x00000000010fd25a in ?? ()
>No symbol table info available.
>#18 0x000000000181254d in ?? ()
>No symbol table info available.
>#19 0x00000000012395ec in ?? ()
>No symbol table info available.
>#20 0x0000000000ce8ef3 in ?? ()
>No symbol table info available.
>#21 0x0000000000ce9135 in ?? ()
>No symbol table info available.
>#22 0x000000000137c58d in ?? ()
>No symbol table info available.
>#23 0x000000000137c5b7 in ?? ()
>No symbol table info available.
>#24 0x0000000000923d69 in ?? ()
>No symbol table info available.
>#25 0x0000000000b1dbd7 in ?? ()
>No symbol table info available.
>#26 0x00007ffff6ed80a4 in start_thread (arg=0x7fffa21e7700) at pthread_create.c:309
>        __res = <optimized out>
>        pd = 0x7fffa21e7700
>        now = <optimized out>
>        unwind_buf = {cancel_jmp_buf = {{jmp_buf = {140735913293568, -2412431874409049098, 1, 140737354125408, 0, 140735913293568, 2412264469750404086, 
>                2412447425728795638}, mask_was_saved = 0}}, priv = {pad = {0x0, 0x0, 0x0, 0x0}, data = {prev = 0x0, cleanup = 0x0, canceltype = 0}}}
>        not_first_call = <optimized out>
>        pagesize_m1 = <optimized out>
>        sp = <optimized out>
>        freesize = <optimized out>
>        __PRETTY_FUNCTION__ = "start_thread"
>#27 0x00007ffff53b39cd in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:111
>No locals.
>(gdb) c
>Continuing.
>
>Program received signal SIGSEGV, Segmentation fault.
>memset () at ../sysdeps/x86_64/memset.S:93
>93	in ../sysdeps/x86_64/memset.S
>(gdb) bt
>#0  memset () at ../sysdeps/x86_64/memset.S:93
>#1  0x00007fffe79015fe in memset (__len=482688, __ch=0, __dest=0x7fffa216e550) at /usr/include/x86_64-linux-gnu/bits/string3.h:84
>#2  fs_instruction_scheduler::calculate_deps (this=0x7fffa21e43e0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:935
>#3  0x00007fffe79025aa in instruction_scheduler::run (this=this@entry=0x7fffa21e43e0, cfg=0x7ffed2799f38)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1653
>#4  0x00007fffe79027da in fs_visitor::schedule_instructions (this=this@entry=0x7fffa21e45a0, mode=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1685
>#5  0x00007fffe78bf180 in fs_visitor::allocate_registers (this=this@entry=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5177
>#6  0x00007fffe78c1a32 in fs_visitor::run_cs (this=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5453
>#7  0x00007fffe78c1b56 in brw_compile_cs (compiler=0x4d090e8, log_data=log_data@entry=0x84a1df8, mem_ctx=mem_ctx@entry=0x7ffeeba1c868, 
>    key=key@entry=0x7fffa21e61b0, prog_data=prog_data@entry=0x7fffa21e60e0, src_shader=<optimized out>, shader_time_index=-1, 
>    final_assembly_size=0x7fffa21e60d4, error_str=0x7fffa21e60d8) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5706
>#8  0x00007fffe784cc44 in brw_codegen_cs_prog (brw=brw@entry=0x84a1df8, prog=prog@entry=0x7fff44131a78, cp=cp@entry=0x7ffed173bd90, 
>    key=key@entry=0x7fffa21e61b0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:124
>#9  0x00007fffe784d0b3 in brw_cs_precompile (ctx=0x84a1df8, shader_prog=0x7fff44131a78, prog=0x7ffed173bd90)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:239
>#10 0x00007fffe7854678 in brw_shader_precompile (sh_prog=<optimized out>, ctx=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:66
>#11 brw_link_shader (ctx=0x84a1df8, shProg=0x0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:260
>#12 0x00007fffe76f34e6 in _mesa_glsl_link_shader (ctx=0x84a1df8, prog=0x7fff44131a78) at ../../../../src/mesa/program/ir_to_mesa.cpp:3040
>#13 0x00007fffe760846a in link_program (ctx=0x84a1df8, program=<optimized out>) at ../../../../src/mesa/main/shaderapi.c:1048
>#14 0x00000000009fe30b in ?? ()
>#15 0x00000000009fbcfc in ?? ()
>#16 0x0000000001108b29 in ?? ()
>#17 0x00000000010fd25a in ?? ()
>#18 0x000000000181254d in ?? ()
>#19 0x00000000012395ec in ?? ()
>#20 0x0000000000ce8ef3 in ?? ()
>#21 0x0000000000ce9135 in ?? ()
>#22 0x000000000137c58d in ?? ()
>#23 0x000000000137c5b7 in ?? ()
>#24 0x0000000000923d69 in ?? ()
>#25 0x0000000000b1dbd7 in ?? ()
>#26 0x00007ffff6ed80a4 in start_thread (arg=0x7fffa21e7700) at pthread_create.c:309
>#27 0x00007ffff53b39cd in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:111
>(gdb) bt full
>#0  memset () at ../sysdeps/x86_64/memset.S:93
>No locals.
>#1  0x00007fffe79015fe in memset (__len=482688, __ch=0, __dest=0x7fffa216e550) at /usr/include/x86_64-linux-gnu/bits/string3.h:84
>No locals.
>#2  fs_instruction_scheduler::calculate_deps (this=0x7fffa21e43e0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:935
>        last_grf_write = 0x7fffa216e550
>        last_mrf_write = 0x7fffa216e4c0
>        last_conditional_mod = {0x0, 0x0}
>        node = <optimized out>
>        last_accumulator_write = 0x0
>        last_fixed_grf_write = 0x0
>        prev = <optimized out>
>#3  0x00007fffe79025aa in instruction_scheduler::run (this=this@entry=0x7fffa21e43e0, cfg=0x7ffed2799f38)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1653
>        block = 0x7ffed26fe648
>#4  0x00007fffe79027da in fs_visitor::schedule_instructions (this=this@entry=0x7fffa21e45a0, mode=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1685
>        grf_count = 3771
>        sched = {<instruction_scheduler> = {_vptr.instruction_scheduler = 0x7fffe7d03310 <vtable for fs_instruction_scheduler+16>, mem_ctx = 0x7fff0340bc68, 
>            post_reg_alloc = false, instructions_to_schedule = 20, grf_count = 3771, hw_reg_count = 4, time = 0, reg_pressure = 0, block_idx = -1575074400, 
>            instructions = {head = 0x7ffed27c9018, tail = 0x0, tail_pred = 0x7ffed27abf48}, bs = 0x7fffa21e45a0, mode = SCHEDULE_PRE, 
>            reg_pressure_in = 0x7ffed27d9128, livein = 0x7ffed27bf4d8, liveout = 0x7ffed27a7b18, hw_liveout = 0x7ffed2772968, written = 0x7ffed1857a38, 
>            reads_remaining = 0x7ffed1e63128, hw_reads_remaining = 0x7ffee5c223b8}, v = 0x7fffa21e45a0}
>#5  0x00007fffe78bf180 in fs_visitor::allocate_registers (this=this@entry=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5177
>        i = <optimized out>
>        allocated_without_spills = false
>        pre_modes = {SCHEDULE_PRE, SCHEDULE_PRE_NON_LIFO, SCHEDULE_PRE_LIFO}
>#6  0x00007fffe78c1a32 in fs_visitor::run_cs (this=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5453
>        this = 0x7fffa21e45a0
>#7  0x00007fffe78c1b56 in brw_compile_cs (compiler=0x4d090e8, log_data=log_data@entry=0x84a1df8, mem_ctx=mem_ctx@entry=0x7ffeeba1c868, 
>    key=key@entry=0x7fffa21e61b0, prog_data=prog_data@entry=0x7fffa21e60e0, src_shader=<optimized out>, shader_time_index=-1, 
>    final_assembly_size=0x7fffa21e60d4, error_str=0x7fffa21e60d8) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5706
>        local_workgroup_size = 32
>        fail_msg = 0x0
>        v8 = {<backend_shader> = {_vptr.backend_shader = 0x7fffe7d17010 <vtable for fs_visitor+16>, compiler = 0x4d090e8, log_data = 0x84a1df8, 
>            devinfo = 0x7fffe7a26780 <brw_device_info_hsw_gt3>, nir = 0x7ffed23a3c58, stage_prog_data = 0x7fffa21e60e0, mem_ctx = 0x7ffeeba1c868, 
>            instructions = {head = 0x7fffa21e45e0, tail = 0x0, tail_pred = 0x7fffa21e45d8}, cfg = 0x7ffed2799f38, stage = MESA_SHADER_COMPUTE, 
>            debug_enabled = false, stage_name = 0x7fffe7a119c5 "compute", stage_abbrev = 0x7fffe7a1f91c "CS", alloc = {sizes = 0x7ffed23a5ac0, 
>              offsets = 0x7ffed26db9d0, count = 3771, total_size = 4521, capacity = 8192}}, key = 0x7fffa21e61b0, key_tex = 0x7fffa21e61b4, 
>          gs_compile = 0x0, prog_data = 0x7fffa21e60e0, prog = 0x0, input_vue_map = 0x0, param_size = 0x7ffed2686098, virtual_grf_start = 0x7ffed214c358, 
>          virtual_grf_end = 0x7ffed1d76718, live_intervals = 0x7ffed27a70f8, regs_live_at_ip = 0x0, uniforms = 0, last_scratch = 0, 
>          pull_constant_loc = 0x7ffed4ff1448, push_constant_loc = 0x7ffee88cc6a8, frag_depth = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, frag_stencil = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>          sample_mask = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, outputs = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'} <repeats 58 times>}, output_components = {0 <repeats 58 times>}, 
>          dual_src_output = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, do_dual_src = false, first_non_payload_grf = 4, 
>          max_grf = 112, nir_locals = 0x7ffed255a978, nir_ssa_values = 0x7ffed3315968, nir_inputs = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, nir_outputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_F, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 228, writemask = 15, 
>                    indirect_offset = 0, vstride = 4, width = 3, hstride = 1, pad1 = 0}, f = 7.27948604e-12, d = 754978788, ud = 754978788}}, 
>              reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, nir_system_values = 0x7ffed271c948, failed = false, 
>          fail_msg = 0x7fffa21e5060 "p", simd16_unsupported = false, no16_msg = 0x0, result = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_F, 
>                file = VGRF, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 3914, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, payload = {source_depth_reg = 0 '\000', source_w_reg = 0 '\000', aa_dest_stencil_reg = 0 '\000', dest_depth_reg = 0 '\000', 
>            sample_pos_reg = 0 '\000', sample_mask_in_reg = 0 '\000', barycentric_coord_reg = "\000\000\000\000\000", local_invocation_id_reg = 1 '\001', 
>            num_regs = 4 '\004'}, source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, pixel_y = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, 
>                negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                    width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>          wpos_w = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, 
>                nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>              reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, pixel_w = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, delta_xy = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, 
>                  address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                      pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>              stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}}, 
>          shader_start_time = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, userplane = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>              stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}}, final_gs_vertex_count = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, control_data_bits = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, grf_used = 0, spilled_any_registers = false, dispatch_width = 8, shader_time_index = -1, promoted_constants = 26, bld = {
>            shader = 0x7fffa21e45a0, block = 0x0, cursor = 0x0, _dispatch_width = 64, _group = 0, force_writemask_all = false, annotation = {str = 0x0, 
>              ir = 0x0}}}
>        v16 = {<backend_shader> = {_vptr.backend_shader = 0x7fffa21e5400, compiler = 0x7ffff5301d74 <msort_with_tmp+468>, log_data = 0x0, devinfo = 0x8, 
>            nir = 0x7fffa21e53f0, stage_prog_data = 0x7fffa21e53c0, mem_ctx = 0x7fffa21e5430, instructions = {head = 0x7ffff5301e91 <msort_with_tmp+753>, 
>              tail = 0x0, tail_pred = 0x8}, cfg = 0x7fffa21e5420, stage = 2719896560, debug_enabled = 255, stage_name = 0x7fffa21e5460 "@U\036\242\377\177", 
>            stage_abbrev = 0x7ffff5301e91 <msort_with_tmp+753> "\205\300\177\313I\213\004$H\203\355\001I\203\304\bI\211\a\353\310L\213d$ \351\360\375\377\377UH\211\345AWI\211\317AVI\211\376AUATSH\211\323H\203\354hH\203\372 H\211u\200\017\207\270\001", alloc = {sizes = 0x0, offsets = 0x8, count = 2719896656, 
>              total_size = 32767, capacity = 2719896608}}, key = 0x7fffa21e5490, key_tex = 0x7ffff5301e91 <msort_with_tmp+753>, gs_compile = 0x0, 
>          prog_data = 0x8, prog = 0x7fffa21e5480, input_vue_map = 0x7fffa21e5450, param_size = 0x7fffa21e54c0, 
>          virtual_grf_start = 0x7ffff5301e91 <msort_with_tmp+753>, virtual_grf_end = 0x0, live_intervals = 0x8, regs_live_at_ip = 0x7fffa21e54b0, 
>          uniforms = 2719896704, last_scratch = 32767, pull_constant_loc = 0x7fffa21e54f0, push_constant_loc = 0x7ffff5301e91 <msort_with_tmp+753>, 
>          frag_depth = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e54e0, stride = 176 '\260'}, 
>          frag_stencil = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 1, 
>                address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                    hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, 
>            stride = 8 '\b'}, sample_mask = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_GENERAL_REGISTER_FILE, negate = 0, 
>                abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                    hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21728}, subreg_offset = 32767, 
>            reladdr = 0x7fffa21e5550, stride = 116 't'}, outputs = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e5540, stride = 16 '\020'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 7825}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21824}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e55b0, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e55a0, stride = 112 'p'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 1, abs = 1, 
>                  address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, 
>              stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = ATTR, negate = 1, abs = 1, address_mode = 0, pad0 = 1, 
>                  subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21920}, subreg_offset = 32767, reladdr = 0x7fffa21e5610, stride = 145 '\221'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5600, stride = 208 '\320'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 7825}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 22016}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5670, stride = 116 't'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e5660, stride = 48 '0'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, 
>                  negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7825}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 22112}, subreg_offset = 32767, reladdr = 0x7fffa21e56d0, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e56c0, stride = 144 '\220'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 22208}, subreg_offset = 32767, reladdr = 0x7fffa21e5730, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5780, stride = 120 'x'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 26, nr = 59343, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23249}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 104 'h'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23720}, 
>              subreg_offset = 32767, reladdr = 0x7fffe7cfd6b8 <replace39_0+24>, stride = 209 '\321'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 11, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 12040}, subreg_offset = 32766, reladdr = 0x7fffa21e5890, stride = 27 '\033'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 45960}, subreg_offset = 32766, reladdr = 0x7fffa21e5c60, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 22400}, subreg_offset = 32767, reladdr = 0x7fffa21e57f0, stride = 116 't'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e57e0, stride = 2 '\002'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 11, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x1, stride = 80 'P'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_F, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 2}, subreg_offset = 32767, reladdr = 0x0, stride = 91 '['}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 336}, subreg_offset = 0, 
>              reladdr = 0x4, stride = 2 '\002'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, 
>                  negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                      width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 91}, subreg_offset = 32767, reladdr = 0x1, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = 14, file = UNIFORM, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 119, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 1.66754517e-43, d = 119, ud = 119}}, 
>                reg_offset = 21154}, subreg_offset = 32767, reladdr = 0x7ffed2b12e48, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = VGRF, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 5, nr = 53937, {{swizzle = 254, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, 
>                reg_offset = 26795}, subreg_offset = 32767, reladdr = 0x7ffed2b12e48, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 2}, subreg_offset = -5833866, reladdr = 0x7ffed2b12e48, stride = 136 '\210'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 26, 
>                  nr = 59343, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 26504}, subreg_offset = 32767, reladdr = 0x80, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 30, 
>                  nr = 59296, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 50118}, subreg_offset = 32767, reladdr = 0x80, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 30, nr = 59296, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 50118}, subreg_offset = 32767, reladdr = 0x7ffed19358b8, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 3, nr = 53636, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 26376}, subreg_offset = 32766, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 53288}, subreg_offset = 32766, reladdr = 0x7ffed26010b0, stride = 208 '\320'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 2, nr = 53856, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0xc0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 1, address_mode = 0, pad0 = 1, subnr = 30, nr = 59296, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 50118}, 
>              subreg_offset = 32767, reladdr = 0x7ffed1804e88, stride = 192 '\300'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 2, nr = 53633, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 50378}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 46336}, 
>              subreg_offset = -5833866, reladdr = 0x7ffed2b13d78, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 0, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 42784}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5b60, stride = 202 '\312'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 1}, subreg_offset = 3, 
>              reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, 
>                  abs = 0, address_mode = 1, pad0 = 1, subnr = 7, nr = 53937, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 1}, subreg_offset = 0, reladdr = 0x7fffa21e5a00, 
>              stride = 96 '`'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                  address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                      pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 46336}, subreg_offset = -5833866, reladdr = 0x7ffed2387db8, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 0, 
>                  subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 52064}, subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, 
>                  subnr = 12, nr = 53869, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 1}, subreg_offset = 0, reladdr = 0x7fffa21e5a60, stride = 96 '`'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 49267}, subreg_offset = 32767, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x1, stride = 96 '`'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = UNIFORM, negate = 1, abs = 0, address_mode = 1, pad0 = 0, subnr = 25, nr = 59343, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23488}, 
>              subreg_offset = 32767, reladdr = 0x7fffe7cef740 <nir_op_infos>, stride = 202 '\312'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 25, nr = 53604, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 23488}, subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 53869, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x7fffa21e5fd0, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 49354}, subreg_offset = 32767, reladdr = 0x7fffa21e5bc0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 24760}, subreg_offset = 32766, reladdr = 0x7ffed26d60b8, stride = 152 '\230'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 0, 
>                  subnr = 28, nr = 59343, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23488}, subreg_offset = 32767, reladdr = 0x7fffe7cf2b48, stride = 67 'C'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 52064}, subreg_offset = 32767, reladdr = 0x7fffe7cfcae0 <search11>, stride = 144 '\220'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 30, 
>                  nr = 59342, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 50378}, subreg_offset = 32767, reladdr = 0x7ffed164cbb8, stride = 144 '\220'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 46336}, subreg_offset = -5833866, reladdr = 0x7ffed26d60b8, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, 
>                  subnr = 12, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 58144}, subreg_offset = 32767, reladdr = 0x7fff00000001, stride = 184 '\270'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, 
>                  pad0 = 0, subnr = 21, nr = 53802, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 21032}, subreg_offset = 32766, reladdr = 0x7ffed2555210, stride = 0 '\000'}}, 
>          output_components = {1, 0, 3514293736, 32766, 3514341952, 32766, 3513037840, 32766, 3532932368, 32766, 0, 0, 0, 0, 3530383544, 32766, 3522275080, 
>            32766, 3522275080, 32766, 3522275056, 32766, 0, 0, 0, 0, 1, 0, 0, 0, 3530383544, 32766, 3522275080, 32766, 3522275080, 32766, 3522275056, 32766, 
>            0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 3514293736, 32766, 3514341952, 32766}, dual_src_output = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BRW_GENERAL_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 22, nr = 53604, {{
>                    swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                  ud = 32766}}, reg_offset = 17680}, subreg_offset = 32766, reladdr = 0x0, stride = 0 '\000'}, do_dual_src = 184, 
>          first_non_payload_grf = 32766, max_grf = 3522275080, nir_locals = 0x7ffed1f1a708, nir_ssa_values = 0x7ffed1f1a6f0, 
>          nir_inputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x1, stride = 0 '\000'}, 
>          nir_outputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, 
>                pad0 = 0, subnr = 12, nr = 53869, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                  f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 42760}, subreg_offset = 32766, reladdr = 0x7fffe77e8b95 <dead_cf_list+1221>, 
>            stride = 96 '`'}, nir_system_values = 0x0, failed = 16, fail_msg = 0x7ffed1fff3f0 "", simd16_unsupported = false, 
>          no16_msg = 0x7ffed1fff3e8 "h\366\377\321\376\177", result = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                    indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>            reladdr = 0x7fffa21e5e10, stride = 224 '\340'}, payload = {source_depth_reg = 80 'P', source_w_reg = 94 '^', aa_dest_stencil_reg = 30 '\036', 
>            dest_depth_reg = 162 '\242', sample_pos_reg = 255 '\377', sample_mask_in_reg = 127 '\177', 
>            barycentric_coord_reg = "\000\000\221\036", <incomplete sequence \365>, local_invocation_id_reg = 255 '\377', num_regs = 127 '\177'}, 
>          source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                    indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>            reladdr = 0x7fffa21e5e40, stride = 16 '\020'}, pixel_y = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                    writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>              reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x7fffa21e6068, stride = 8 '\b'}, wpos_w = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_W, file = BRW_GENERAL_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                    swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                  ud = 32767}}, reg_offset = 336}, subreg_offset = 0, reladdr = 0x4, stride = 116 't'}, pixel_w = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                    swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>              reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5e30, stride = 112 'p'}, delta_xy = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 2}, subreg_offset = 0, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = ATTR, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 46336}, 
>              subreg_offset = -5833866, reladdr = 0x7ffed1fff378, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 1}, subreg_offset = 0, 
>              reladdr = 0x7ffed21c3ee8, stride = 16 '\020'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BAD_FILE, negate = 0, 
>                  abs = 1, address_mode = 1, pad0 = 0, subnr = 30, nr = 53759, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 35733}, subreg_offset = 32767, 
>              reladdr = 0x7fffa21e5eb0, stride = 240 '\360'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 12928}, subreg_offset = 32766, reladdr = 0x0, 
>              stride = 120 'x'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = ATTR, negate = 0, abs = 1, address_mode = 1, pad0 = 1, 
>                  subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 24352}, subreg_offset = 32767, reladdr = 0x7fffa21e5f90, 
>              stride = 145 '\221'}}, shader_start_time = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, 
>                negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                    width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5f80, 
>            stride = 80 'P'}, userplane = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, 
>                  abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 2}, subreg_offset = 0, 
>              reladdr = 0x7fffe77cf4c0 <cmp_phi_src>, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 24512}, 
>              subreg_offset = 32767, reladdr = 0x20, stride = 192 '\300'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, 
>                  negate = 1, abs = 0, address_mode = 0, pad0 = 1, subnr = 30, nr = 59260, {{swizzle = 255, writemask = 15, indirect_offset = 7, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 8520}, 
>              subreg_offset = 32767, reladdr = 0x7ffed2db2498, stride = 143 '\217'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 240}, subreg_offset = 32766, reladdr = 0x0, stride = 56 '8'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 2, nr = 53803, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 64655}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5fa0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 1, pad0 = 0, subnr = 6, nr = 53707, {{swizzle = 254, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = VGRF, negate = 1, abs = 1, address_mode = 0, pad0 = 0, subnr = 14, nr = 53707, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 24672}, 
>              subreg_offset = 32767, reladdr = 0x7ffed1cb3208, stride = 149 '\225'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 51696}, subreg_offset = 32767, reladdr = 0x7fffa21e60e7, stride = 200 '\310'}}, 
>          final_gs_vertex_count = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_W, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 592}, subreg_offset = 0, reladdr = 0x8, stride = 56 '8'}, 
>          control_data_bits = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 92}, subreg_offset = -5833866, reladdr = 0x0, stride = 0 '\000'}, grf_used = 110, 
>          spilled_any_registers = 119, dispatch_width = 0, shader_time_index = 0, promoted_constants = 124, bld = {
>            shader = 0x7fffe77e74a0 <constant_fold_block>, block = 0x7fffa21e60d0, cursor = 0x7fff44000020, _dispatch_width = 1744, _group = 0, 
>            force_writemask_all = 103, annotation = {str = 0x7ffed3315930 "\001", ir = 0x7ffed1767bb8}}}
>        g = {compiler = 0x0, log_data = 0x0, devinfo = 0x0, p = 0x7ffed2ab91b8, key = 0x0, prog_data = 0x0, dispatch_width = 1, discard_halt_patches = {
>            head = 0x1, tail = 0x70, tail_pred = 0x0}, promoted_constants = 0, runtime_check_aads_emit = false, debug_flag = false, 
>          shader_name = 0x1 <error: Cannot access memory at address 0x1>, stage = 112, mem_ctx = 0x0}
>        shader = 0x7ffed23a3c58
>        max_cs_threads = 70
>        cfg = 0x0
>#8  0x00007fffe784cc44 in brw_codegen_cs_prog (brw=brw@entry=0x84a1df8, prog=prog@entry=0x7fff44131a78, cp=cp@entry=0x7ffed173bd90, 
>    key=key@entry=0x7fffa21e61b0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:124
>        ctx = 0x84a1df8
>        program = <optimized out>
>        mem_ctx = 0x7ffeeba1c868
>        program_size = 0
>        prog_data = {base = {binding_table = {size_bytes = 40, pull_constants_start = 10, texture_start = 1, gather_texture_start = 3503345872, 
>              ubo_start = 4, ssbo_start = 5, abo_start = 8, image_start = 3503345872, shader_time_start = 3503345872}, nr_params = 0, nr_pull_params = 0, 
>            nr_image_params = 0, curb_read_length = 0, total_scratch = 0, total_shared = 0, dispatch_grf_start_reg = 4, use_alt_mode = false, 
>            param = 0x7ffed1867828, pull_param = 0x7ffed1aed598, image_param = 0x7ffeef7b4158}, dispatch_grf_start_reg_16 = 0, local_size = {32, 1, 1}, 
>          simd_size = 0, uses_barrier = false, uses_num_work_groups = false, local_invocation_id_regs = 3, binding_table = {work_groups_start = 0}}
>        start_busy = false
>        start_time = 0
>        cs = 0x7ffed163fb78
>        param_count = <optimized out>
>        st_index = <optimized out>
>        error_str = 0x1 <error: Cannot access memory at address 0x1>
>#9  0x00007fffe784d0b3 in brw_cs_precompile (ctx=0x84a1df8, shader_prog=0x7fff44131a78, prog=0x7ffed173bd90)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:239
>        key = {program_string_id = 543, tex = {swizzles = {1672, 1672, 1672, 0 <repeats 29 times>}, gl_clamp_mask = {0, 0, 0}, 
>            gather_channel_quirk_mask = 0, compressed_multisample_layout_mask = 0, msaa_16 = 0, gen6_gather_wa = {(unknown: 0) <repeats 32 times>}}}
>        cp = 0x7ffed173bd90
>        old_prog_offset = 0
>        old_prog_data = 0x0
>        success = <optimized out>
>#10 0x00007fffe7854678 in brw_shader_precompile (sh_prog=<optimized out>, ctx=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:66
>        gs = 0x0
>        cs = 0x7ffed163fb78
>        vs = 0x0
>        tcs = 0x0
>        tes = 0x0
>        fs = 0x7fffa216e550
>#11 brw_link_shader (ctx=0x84a1df8, shProg=0x0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:260
>No locals.
>#12 0x00007fffe76f34e6 in _mesa_glsl_link_shader (ctx=0x84a1df8, prog=0x7fff44131a78) at ../../../../src/mesa/program/ir_to_mesa.cpp:3040
>        i = <optimized out>
>#13 0x00007fffe760846a in link_program (ctx=0x84a1df8, program=<optimized out>) at ../../../../src/mesa/main/shaderapi.c:1048
>        shProg = 0x7fff44131a78
>#14 0x00000000009fe30b in ?? ()
>No symbol table info available.
>#15 0x00000000009fbcfc in ?? ()
>No symbol table info available.
>#16 0x0000000001108b29 in ?? ()
>No symbol table info available.
>#17 0x00000000010fd25a in ?? ()
>No symbol table info available.
>#18 0x000000000181254d in ?? ()
>No symbol table info available.
>#19 0x00000000012395ec in ?? ()
>No symbol table info available.
>#20 0x0000000000ce8ef3 in ?? ()
>No symbol table info available.
>#21 0x0000000000ce9135 in ?? ()
>No symbol table info available.
>#22 0x000000000137c58d in ?? ()
>No symbol table info available.
>#23 0x000000000137c5b7 in ?? ()
>No symbol table info available.
>#24 0x0000000000923d69 in ?? ()
>No symbol table info available.
>#25 0x0000000000b1dbd7 in ?? ()
>No symbol table info available.
>#26 0x00007ffff6ed80a4 in start_thread (arg=0x7fffa21e7700) at pthread_create.c:309
>        __res = <optimized out>
>        pd = 0x7fffa21e7700
>        now = <optimized out>
>        unwind_buf = {cancel_jmp_buf = {{jmp_buf = {140735913293568, -2412431874409049098, 1, 140737354125408, 0, 140735913293568, 2412264469750404086, 
>                2412447425728795638}, mask_was_saved = 0}}, priv = {pad = {0x0, 0x0, 0x0, 0x0}, data = {prev = 0x0, cleanup = 0x0, canceltype = 0}}}
>        not_first_call = <optimized out>
>        pagesize_m1 = <optimized out>
>        sp = <optimized out>
>        freesize = <optimized out>
>        __PRETTY_FUNCTION__ = "start_thread"
>#27 0x00007ffff53b39cd in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:111
>No locals.
>(gdb) c
>Continuing.
>
>Program received signal SIGSEGV, Segmentation fault.
>memset () at ../sysdeps/x86_64/memset.S:93
>93	in ../sysdeps/x86_64/memset.S
>(gdb) bt
>#0  memset () at ../sysdeps/x86_64/memset.S:93
>#1  0x00007fffe79015fe in memset (__len=482688, __ch=0, __dest=0x7fffa216e550) at /usr/include/x86_64-linux-gnu/bits/string3.h:84
>#2  fs_instruction_scheduler::calculate_deps (this=0x7fffa21e43e0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:935
>#3  0x00007fffe79025aa in instruction_scheduler::run (this=this@entry=0x7fffa21e43e0, cfg=0x7ffed2799f38)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1653
>#4  0x00007fffe79027da in fs_visitor::schedule_instructions (this=this@entry=0x7fffa21e45a0, mode=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1685
>#5  0x00007fffe78bf180 in fs_visitor::allocate_registers (this=this@entry=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5177
>#6  0x00007fffe78c1a32 in fs_visitor::run_cs (this=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5453
>#7  0x00007fffe78c1b56 in brw_compile_cs (compiler=0x4d090e8, log_data=log_data@entry=0x84a1df8, mem_ctx=mem_ctx@entry=0x7ffeeba1c868, 
>    key=key@entry=0x7fffa21e61b0, prog_data=prog_data@entry=0x7fffa21e60e0, src_shader=<optimized out>, shader_time_index=-1, 
>    final_assembly_size=0x7fffa21e60d4, error_str=0x7fffa21e60d8) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5706
>#8  0x00007fffe784cc44 in brw_codegen_cs_prog (brw=brw@entry=0x84a1df8, prog=prog@entry=0x7fff44131a78, cp=cp@entry=0x7ffed173bd90, 
>    key=key@entry=0x7fffa21e61b0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:124
>#9  0x00007fffe784d0b3 in brw_cs_precompile (ctx=0x84a1df8, shader_prog=0x7fff44131a78, prog=0x7ffed173bd90)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:239
>#10 0x00007fffe7854678 in brw_shader_precompile (sh_prog=<optimized out>, ctx=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:66
>#11 brw_link_shader (ctx=0x84a1df8, shProg=0x0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:260
>#12 0x00007fffe76f34e6 in _mesa_glsl_link_shader (ctx=0x84a1df8, prog=0x7fff44131a78) at ../../../../src/mesa/program/ir_to_mesa.cpp:3040
>#13 0x00007fffe760846a in link_program (ctx=0x84a1df8, program=<optimized out>) at ../../../../src/mesa/main/shaderapi.c:1048
>#14 0x00000000009fe30b in ?? ()
>#15 0x00000000009fbcfc in ?? ()
>#16 0x0000000001108b29 in ?? ()
>#17 0x00000000010fd25a in ?? ()
>#18 0x000000000181254d in ?? ()
>#19 0x00000000012395ec in ?? ()
>#20 0x0000000000ce8ef3 in ?? ()
>#21 0x0000000000ce9135 in ?? ()
>#22 0x000000000137c58d in ?? ()
>#23 0x000000000137c5b7 in ?? ()
>#24 0x0000000000923d69 in ?? ()
>#25 0x0000000000b1dbd7 in ?? ()
>#26 0x00007ffff6ed80a4 in start_thread (arg=0x7fffa21e7700) at pthread_create.c:309
>#27 0x00007ffff53b39cd in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:111
>(gdb) bt full
>#0  memset () at ../sysdeps/x86_64/memset.S:93
>No locals.
>#1  0x00007fffe79015fe in memset (__len=482688, __ch=0, __dest=0x7fffa216e550) at /usr/include/x86_64-linux-gnu/bits/string3.h:84
>No locals.
>#2  fs_instruction_scheduler::calculate_deps (this=0x7fffa21e43e0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:935
>        last_grf_write = 0x7fffa216e550
>        last_mrf_write = 0x7fffa216e4c0
>        last_conditional_mod = {0x0, 0x0}
>        node = <optimized out>
>        last_accumulator_write = 0x0
>        last_fixed_grf_write = 0x0
>        prev = <optimized out>
>#3  0x00007fffe79025aa in instruction_scheduler::run (this=this@entry=0x7fffa21e43e0, cfg=0x7ffed2799f38)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1653
>        block = 0x7ffed26fe648
>#4  0x00007fffe79027da in fs_visitor::schedule_instructions (this=this@entry=0x7fffa21e45a0, mode=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp:1685
>        grf_count = 3771
>        sched = {<instruction_scheduler> = {_vptr.instruction_scheduler = 0x7fffe7d03310 <vtable for fs_instruction_scheduler+16>, mem_ctx = 0x7fff0340bc68, 
>            post_reg_alloc = false, instructions_to_schedule = 20, grf_count = 3771, hw_reg_count = 4, time = 0, reg_pressure = 0, block_idx = -1575074400, 
>            instructions = {head = 0x7ffed27c9018, tail = 0x0, tail_pred = 0x7ffed27abf48}, bs = 0x7fffa21e45a0, mode = SCHEDULE_PRE, 
>            reg_pressure_in = 0x7ffed27d9128, livein = 0x7ffed27bf4d8, liveout = 0x7ffed27a7b18, hw_liveout = 0x7ffed2772968, written = 0x7ffed1857a38, 
>            reads_remaining = 0x7ffed1e63128, hw_reads_remaining = 0x7ffee5c223b8}, v = 0x7fffa21e45a0}
>#5  0x00007fffe78bf180 in fs_visitor::allocate_registers (this=this@entry=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5177
>        i = <optimized out>
>        allocated_without_spills = false
>        pre_modes = {SCHEDULE_PRE, SCHEDULE_PRE_NON_LIFO, SCHEDULE_PRE_LIFO}
>#6  0x00007fffe78c1a32 in fs_visitor::run_cs (this=0x7fffa21e45a0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5453
>        this = 0x7fffa21e45a0
>#7  0x00007fffe78c1b56 in brw_compile_cs (compiler=0x4d090e8, log_data=log_data@entry=0x84a1df8, mem_ctx=mem_ctx@entry=0x7ffeeba1c868, 
>    key=key@entry=0x7fffa21e61b0, prog_data=prog_data@entry=0x7fffa21e60e0, src_shader=<optimized out>, shader_time_index=-1, 
>    final_assembly_size=0x7fffa21e60d4, error_str=0x7fffa21e60d8) at ../../../../../../../src/mesa/drivers/dri/i965/brw_fs.cpp:5706
>        local_workgroup_size = 32
>        fail_msg = 0x0
>        v8 = {<backend_shader> = {_vptr.backend_shader = 0x7fffe7d17010 <vtable for fs_visitor+16>, compiler = 0x4d090e8, log_data = 0x84a1df8, 
>            devinfo = 0x7fffe7a26780 <brw_device_info_hsw_gt3>, nir = 0x7ffed23a3c58, stage_prog_data = 0x7fffa21e60e0, mem_ctx = 0x7ffeeba1c868, 
>            instructions = {head = 0x7fffa21e45e0, tail = 0x0, tail_pred = 0x7fffa21e45d8}, cfg = 0x7ffed2799f38, stage = MESA_SHADER_COMPUTE, 
>            debug_enabled = false, stage_name = 0x7fffe7a119c5 "compute", stage_abbrev = 0x7fffe7a1f91c "CS", alloc = {sizes = 0x7ffed23a5ac0, 
>              offsets = 0x7ffed26db9d0, count = 3771, total_size = 4521, capacity = 8192}}, key = 0x7fffa21e61b0, key_tex = 0x7fffa21e61b4, 
>          gs_compile = 0x0, prog_data = 0x7fffa21e60e0, prog = 0x0, input_vue_map = 0x0, param_size = 0x7ffed2686098, virtual_grf_start = 0x7ffed214c358, 
>          virtual_grf_end = 0x7ffed1d76718, live_intervals = 0x7ffed27a70f8, regs_live_at_ip = 0x0, uniforms = 0, last_scratch = 0, 
>          pull_constant_loc = 0x7ffed4ff1448, push_constant_loc = 0x7ffee88cc6a8, frag_depth = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, frag_stencil = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>          sample_mask = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, outputs = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'} <repeats 58 times>}, output_components = {0 <repeats 58 times>}, 
>          dual_src_output = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, do_dual_src = false, first_non_payload_grf = 4, 
>          max_grf = 112, nir_locals = 0x7ffed255a978, nir_ssa_values = 0x7ffed3315968, nir_inputs = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, nir_outputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_F, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 228, writemask = 15, 
>                    indirect_offset = 0, vstride = 4, width = 3, hstride = 1, pad1 = 0}, f = 7.27948604e-12, d = 754978788, ud = 754978788}}, 
>              reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, nir_system_values = 0x7ffed271c948, failed = false, 
>          fail_msg = 0x7fffa21e5060 "p", simd16_unsupported = false, no16_msg = 0x0, result = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_F, 
>                file = VGRF, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 3914, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, payload = {source_depth_reg = 0 '\000', source_w_reg = 0 '\000', aa_dest_stencil_reg = 0 '\000', dest_depth_reg = 0 '\000', 
>            sample_pos_reg = 0 '\000', sample_mask_in_reg = 0 '\000', barycentric_coord_reg = "\000\000\000\000\000", local_invocation_id_reg = 1 '\001', 
>            num_regs = 4 '\004'}, source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, pixel_y = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, 
>                negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                    width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>          wpos_w = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, 
>                nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>              reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, pixel_w = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, delta_xy = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, 
>                  address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                      pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>              stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}}, 
>          shader_start_time = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, 
>                subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, 
>                  ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, userplane = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>              stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>              subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, 
>                  {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}}, final_gs_vertex_count = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, 
>                    writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, 
>            subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, control_data_bits = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BAD_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, 
>                    vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, 
>            stride = 1 '\001'}, grf_used = 0, spilled_any_registers = false, dispatch_width = 8, shader_time_index = -1, promoted_constants = 26, bld = {
>            shader = 0x7fffa21e45a0, block = 0x0, cursor = 0x0, _dispatch_width = 64, _group = 0, force_writemask_all = false, annotation = {str = 0x0, 
>              ir = 0x0}}}
>        v16 = {<backend_shader> = {_vptr.backend_shader = 0x7fffa21e5400, compiler = 0x7ffff5301d74 <msort_with_tmp+468>, log_data = 0x0, devinfo = 0x8, 
>            nir = 0x7fffa21e53f0, stage_prog_data = 0x7fffa21e53c0, mem_ctx = 0x7fffa21e5430, instructions = {head = 0x7ffff5301e91 <msort_with_tmp+753>, 
>              tail = 0x0, tail_pred = 0x8}, cfg = 0x7fffa21e5420, stage = 2719896560, debug_enabled = 255, stage_name = 0x7fffa21e5460 "@U\036\242\377\177", 
>            stage_abbrev = 0x7ffff5301e91 <msort_with_tmp+753> "\205\300\177\313I\213\004$H\203\355\001I\203\304\bI\211\a\353\310L\213d$ \351\360\375\377\377UH\211\345AWI\211\317AVI\211\376AUATSH\211\323H\203\354hH\203\372 H\211u\200\017\207\270\001", alloc = {sizes = 0x0, offsets = 0x8, count = 2719896656, 
>              total_size = 32767, capacity = 2719896608}}, key = 0x7fffa21e5490, key_tex = 0x7ffff5301e91 <msort_with_tmp+753>, gs_compile = 0x0, 
>          prog_data = 0x8, prog = 0x7fffa21e5480, input_vue_map = 0x7fffa21e5450, param_size = 0x7fffa21e54c0, 
>          virtual_grf_start = 0x7ffff5301e91 <msort_with_tmp+753>, virtual_grf_end = 0x0, live_intervals = 0x8, regs_live_at_ip = 0x7fffa21e54b0, 
>          uniforms = 2719896704, last_scratch = 32767, pull_constant_loc = 0x7fffa21e54f0, push_constant_loc = 0x7ffff5301e91 <msort_with_tmp+753>, 
>          frag_depth = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e54e0, stride = 176 '\260'}, 
>          frag_stencil = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 1, 
>                address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                    hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, 
>            stride = 8 '\b'}, sample_mask = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_GENERAL_REGISTER_FILE, negate = 0, 
>                abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                    hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21728}, subreg_offset = 32767, 
>            reladdr = 0x7fffa21e5550, stride = 116 't'}, outputs = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e5540, stride = 16 '\020'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 7825}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BAD_FILE, negate = 0, abs = 1, address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21824}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e55b0, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e55a0, stride = 112 'p'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 1, abs = 1, 
>                  address_mode = 0, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, 
>              stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = ATTR, negate = 1, abs = 1, address_mode = 0, pad0 = 1, 
>                  subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 21920}, subreg_offset = 32767, reladdr = 0x7fffa21e5610, stride = 145 '\221'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5600, stride = 208 '\320'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 7825}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 22016}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5670, stride = 116 't'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>              reladdr = 0x7fffa21e5660, stride = 48 '0'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, 
>                  negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 7825}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 22112}, subreg_offset = 32767, reladdr = 0x7fffa21e56d0, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e56c0, stride = 144 '\220'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BAD_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 22208}, subreg_offset = 32767, reladdr = 0x7fffa21e5730, stride = 145 '\221'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5780, stride = 120 'x'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 26, nr = 59343, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23249}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 104 'h'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23720}, 
>              subreg_offset = 32767, reladdr = 0x7fffe7cfd6b8 <replace39_0+24>, stride = 209 '\321'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 11, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 12040}, subreg_offset = 32766, reladdr = 0x7fffa21e5890, stride = 27 '\033'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 45960}, subreg_offset = 32766, reladdr = 0x7fffa21e5c60, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 10, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 22400}, subreg_offset = 32767, reladdr = 0x7fffa21e57f0, stride = 116 't'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e57e0, stride = 2 '\002'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 11, nr = 41502, {{
>                      swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                    ud = 32767}}, reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x1, stride = 80 'P'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_F, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 2}, subreg_offset = 32767, reladdr = 0x0, stride = 91 '['}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 336}, subreg_offset = 0, 
>              reladdr = 0x4, stride = 2 '\002'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, 
>                  negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                      width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 91}, subreg_offset = 32767, reladdr = 0x1, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = 14, file = UNIFORM, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 119, 
>                      writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 1.66754517e-43, d = 119, ud = 119}}, 
>                reg_offset = 21154}, subreg_offset = 32767, reladdr = 0x7ffed2b12e48, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = VGRF, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 5, nr = 53937, {{swizzle = 254, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, 
>                reg_offset = 26795}, subreg_offset = 32767, reladdr = 0x7ffed2b12e48, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 2}, subreg_offset = -5833866, reladdr = 0x7ffed2b12e48, stride = 136 '\210'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 26, 
>                  nr = 59343, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 26504}, subreg_offset = 32767, reladdr = 0x80, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 30, 
>                  nr = 59296, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 50118}, subreg_offset = 32767, reladdr = 0x80, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 30, nr = 59296, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 50118}, subreg_offset = 32767, reladdr = 0x7ffed19358b8, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 3, nr = 53636, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 26376}, subreg_offset = 32766, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 53288}, subreg_offset = 32766, reladdr = 0x7ffed26010b0, stride = 208 '\320'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 2, nr = 53856, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0xc0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 1, address_mode = 0, pad0 = 1, subnr = 30, nr = 59296, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 50118}, 
>              subreg_offset = 32767, reladdr = 0x7ffed1804e88, stride = 192 '\300'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_GENERAL_REGISTER_FILE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 2, nr = 53633, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 50378}, 
>              subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 46336}, 
>              subreg_offset = -5833866, reladdr = 0x7ffed2b13d78, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 0, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 42784}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5b60, stride = 202 '\312'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 1}, subreg_offset = 3, 
>              reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, 
>                  abs = 0, address_mode = 1, pad0 = 1, subnr = 7, nr = 53937, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 1}, subreg_offset = 0, reladdr = 0x7fffa21e5a00, 
>              stride = 96 '`'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                  address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                      pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 46336}, subreg_offset = -5833866, reladdr = 0x7ffed2387db8, stride = 1 '\001'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 0, 
>                  subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 52064}, subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, 
>                  subnr = 12, nr = 53869, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 1}, subreg_offset = 0, reladdr = 0x7fffa21e5a60, stride = 96 '`'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 49267}, subreg_offset = 32767, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                      swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x1, stride = 96 '`'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = UNIFORM, negate = 1, abs = 0, address_mode = 1, pad0 = 0, subnr = 25, nr = 59343, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23488}, 
>              subreg_offset = 32767, reladdr = 0x7fffe7cef740 <nir_op_infos>, stride = 202 '\312'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 25, nr = 53604, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 23488}, subreg_offset = 32767, reladdr = 0x0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 53869, {{
>                      swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                    ud = 32766}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x7fffa21e5fd0, stride = 32 ' '}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 1, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 49354}, subreg_offset = 32767, reladdr = 0x7fffa21e5bc0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 0, subnr = 11, 
>                  nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 24760}, subreg_offset = 32766, reladdr = 0x7ffed26d60b8, stride = 152 '\230'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 0, 
>                  subnr = 28, nr = 59343, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 23488}, subreg_offset = 32767, reladdr = 0x7fffe7cf2b48, stride = 67 'C'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 52064}, subreg_offset = 32767, reladdr = 0x7fffe7cfcae0 <search11>, stride = 144 '\220'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 30, 
>                  nr = 59342, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, 
>                    d = 32767, ud = 32767}}, reg_offset = 50378}, subreg_offset = 32767, reladdr = 0x7ffed164cbb8, stride = 144 '\220'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, 
>                  pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, 
>                    d = 0, ud = 0}}, reg_offset = 46336}, subreg_offset = -5833866, reladdr = 0x7ffed26d60b8, stride = 0 '\000'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_MESSAGE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 0, pad0 = 0, 
>                  subnr = 12, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 58144}, subreg_offset = 32767, reladdr = 0x7fff00000001, stride = 184 '\270'}, 
>            {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, 
>                  pad0 = 0, subnr = 21, nr = 53802, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 21032}, subreg_offset = 32766, reladdr = 0x7ffed2555210, stride = 0 '\000'}}, 
>          output_components = {1, 0, 3514293736, 32766, 3514341952, 32766, 3513037840, 32766, 3532932368, 32766, 0, 0, 0, 0, 3530383544, 32766, 3522275080, 
>            32766, 3522275080, 32766, 3522275056, 32766, 0, 0, 0, 0, 1, 0, 0, 0, 3530383544, 32766, 3522275080, 32766, 3522275080, 32766, 3522275056, 32766, 
>            0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 3514293736, 32766, 3514341952, 32766}, dual_src_output = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BRW_GENERAL_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 1, subnr = 22, nr = 53604, {{
>                    swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, 
>                  ud = 32766}}, reg_offset = 17680}, subreg_offset = 32766, reladdr = 0x0, stride = 0 '\000'}, do_dual_src = 184, 
>          first_non_payload_grf = 32766, max_grf = 3522275080, nir_locals = 0x7ffed1f1a708, nir_ssa_values = 0x7ffed1f1a6f0, 
>          nir_inputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 0}, subreg_offset = 0, reladdr = 0x1, stride = 0 '\000'}, 
>          nir_outputs = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 0, address_mode = 0, 
>                pad0 = 0, subnr = 12, nr = 53869, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                  f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 42760}, subreg_offset = 32766, reladdr = 0x7fffe77e8b95 <dead_cf_list+1221>, 
>            stride = 96 '`'}, nir_system_values = 0x0, failed = 16, fail_msg = 0x7ffed1fff3f0 "", simd16_unsupported = false, 
>          no16_msg = 0x7ffed1fff3e8 "h\366\377\321\376\177", result = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                    indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>            reladdr = 0x7fffa21e5e10, stride = 224 '\340'}, payload = {source_depth_reg = 80 'P', source_w_reg = 94 '^', aa_dest_stencil_reg = 30 '\036', 
>            dest_depth_reg = 162 '\242', sample_pos_reg = 255 '\377', sample_mask_in_reg = 127 '\177', 
>            barycentric_coord_reg = "\000\000\221\036", <incomplete sequence \365>, local_invocation_id_reg = 255 '\377', num_regs = 127 '\177'}, 
>          source_depth_to_render_target = false, runtime_check_aads_emit = false, pixel_x = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                    indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, 
>            reladdr = 0x7fffa21e5e40, stride = 16 '\020'}, pixel_y = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                    writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>              reg_offset = 7540}, subreg_offset = 32767, reladdr = 0x7fffa21e6068, stride = 8 '\b'}, wpos_w = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_W, file = BRW_GENERAL_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                    swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, 
>                  ud = 32767}}, reg_offset = 336}, subreg_offset = 0, reladdr = 0x4, stride = 116 't'}, pixel_w = {<backend_reg> = {<brw_reg> = {
>                type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{
>                    swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, 
>              reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5e30, stride = 112 'p'}, delta_xy = {{<backend_reg> = {<brw_reg> = {
>                  type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 2}, subreg_offset = 0, reladdr = 0x0, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = ATTR, negate = 1, abs = 0, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 46336}, 
>              subreg_offset = -5833866, reladdr = 0x7ffed1fff378, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, 
>                      indirect_offset = 0, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 1}, subreg_offset = 0, 
>              reladdr = 0x7ffed21c3ee8, stride = 16 '\020'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, file = BAD_FILE, negate = 0, 
>                  abs = 1, address_mode = 1, pad0 = 0, subnr = 30, nr = 53759, {{swizzle = 254, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 35733}, subreg_offset = 32767, 
>              reladdr = 0x7fffa21e5eb0, stride = 240 '\360'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = UNIFORM, negate = 0, 
>                  abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 12928}, subreg_offset = 32766, reladdr = 0x0, 
>              stride = 120 'x'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = ATTR, negate = 0, abs = 1, address_mode = 1, pad0 = 1, 
>                  subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, 
>                    f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 24352}, subreg_offset = 32767, reladdr = 0x7fffa21e5f90, 
>              stride = 145 '\221'}}, shader_start_time = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, 
>                negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, 
>                    width = 0, hstride = 0, pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 8}, subreg_offset = 0, reladdr = 0x7fffa21e5f80, 
>            stride = 80 'P'}, userplane = {{<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, 
>                  abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, 
>                      hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 2}, subreg_offset = 0, 
>              reladdr = 0x7fffe77cf4c0 <cmp_phi_src>, stride = 8 '\b'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 1, abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 24512}, 
>              subreg_offset = 32767, reladdr = 0x20, stride = 192 '\300'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, file = VGRF, 
>                  negate = 1, abs = 0, address_mode = 0, pad0 = 1, subnr = 30, nr = 59260, {{swizzle = 255, writemask = 15, indirect_offset = 7, 
>                      vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 8520}, 
>              subreg_offset = 32767, reladdr = 0x7ffed2db2498, stride = 143 '\217'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 1, address_mode = 1, pad0 = 1, subnr = 11, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 240}, subreg_offset = 32766, reladdr = 0x0, stride = 56 '8'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_IMMEDIATE_VALUE, negate = 0, abs = 0, address_mode = 1, pad0 = 1, subnr = 2, nr = 53803, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 64655}, 
>              subreg_offset = 32767, reladdr = 0x7fffa21e5fa0, stride = 0 '\000'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 1, pad0 = 0, subnr = 6, nr = 53707, {{swizzle = 254, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, 
>                reg_offset = 0}, subreg_offset = 0, reladdr = 0x0, stride = 1 '\001'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_V, 
>                  file = VGRF, negate = 1, abs = 1, address_mode = 0, pad0 = 0, subnr = 14, nr = 53707, {{swizzle = 254, writemask = 15, 
>                      indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59149455e-41, d = 32766, ud = 32766}}, reg_offset = 24672}, 
>              subreg_offset = 32767, reladdr = 0x7ffed1cb3208, stride = 149 '\225'}, {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_UD, 
>                  file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, address_mode = 0, pad0 = 0, subnr = 12, nr = 41502, {{swizzle = 255, 
>                      writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, 
>                reg_offset = 51696}, subreg_offset = 32767, reladdr = 0x7fffa21e60e7, stride = 200 '\310'}}, 
>          final_gs_vertex_count = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_W, file = BRW_MESSAGE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 255, writemask = 15, indirect_offset = 7, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 4.59163468e-41, d = 32767, ud = 32767}}, reg_offset = 592}, subreg_offset = 0, reladdr = 0x8, stride = 56 '8'}, 
>          control_data_bits = {<backend_reg> = {<brw_reg> = {type = BRW_REGISTER_TYPE_D, file = BRW_ARCHITECTURE_REGISTER_FILE, negate = 0, abs = 0, 
>                address_mode = 0, pad0 = 0, subnr = 0, nr = 0, {{swizzle = 0, writemask = 0, indirect_offset = 0, vstride = 0, width = 0, hstride = 0, 
>                    pad1 = 0}, f = 0, d = 0, ud = 0}}, reg_offset = 92}, subreg_offset = -5833866, reladdr = 0x0, stride = 0 '\000'}, grf_used = 110, 
>          spilled_any_registers = 119, dispatch_width = 0, shader_time_index = 0, promoted_constants = 124, bld = {
>            shader = 0x7fffe77e74a0 <constant_fold_block>, block = 0x7fffa21e60d0, cursor = 0x7fff44000020, _dispatch_width = 1744, _group = 0, 
>            force_writemask_all = 103, annotation = {str = 0x7ffed3315930 "\001", ir = 0x7ffed1767bb8}}}
>        g = {compiler = 0x0, log_data = 0x0, devinfo = 0x0, p = 0x7ffed2ab91b8, key = 0x0, prog_data = 0x0, dispatch_width = 1, discard_halt_patches = {
>            head = 0x1, tail = 0x70, tail_pred = 0x0}, promoted_constants = 0, runtime_check_aads_emit = false, debug_flag = false, 
>          shader_name = 0x1 <error: Cannot access memory at address 0x1>, stage = 112, mem_ctx = 0x0}
>        shader = 0x7ffed23a3c58
>        max_cs_threads = 70
>        cfg = 0x0
>#8  0x00007fffe784cc44 in brw_codegen_cs_prog (brw=brw@entry=0x84a1df8, prog=prog@entry=0x7fff44131a78, cp=cp@entry=0x7ffed173bd90, 
>    key=key@entry=0x7fffa21e61b0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:124
>        ctx = 0x84a1df8
>        program = <optimized out>
>        mem_ctx = 0x7ffeeba1c868
>        program_size = 0
>        prog_data = {base = {binding_table = {size_bytes = 40, pull_constants_start = 10, texture_start = 1, gather_texture_start = 3503345872, 
>              ubo_start = 4, ssbo_start = 5, abo_start = 8, image_start = 3503345872, shader_time_start = 3503345872}, nr_params = 0, nr_pull_params = 0, 
>            nr_image_params = 0, curb_read_length = 0, total_scratch = 0, total_shared = 0, dispatch_grf_start_reg = 4, use_alt_mode = false, 
>            param = 0x7ffed1867828, pull_param = 0x7ffed1aed598, image_param = 0x7ffeef7b4158}, dispatch_grf_start_reg_16 = 0, local_size = {32, 1, 1}, 
>          simd_size = 0, uses_barrier = false, uses_num_work_groups = false, local_invocation_id_regs = 3, binding_table = {work_groups_start = 0}}
>        start_busy = false
>        start_time = 0
>        cs = 0x7ffed163fb78
>        param_count = <optimized out>
>        st_index = <optimized out>
>        error_str = 0x1 <error: Cannot access memory at address 0x1>
>#9  0x00007fffe784d0b3 in brw_cs_precompile (ctx=0x84a1df8, shader_prog=0x7fff44131a78, prog=0x7ffed173bd90)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_cs.c:239
>        key = {program_string_id = 543, tex = {swizzles = {1672, 1672, 1672, 0 <repeats 29 times>}, gl_clamp_mask = {0, 0, 0}, 
>            gather_channel_quirk_mask = 0, compressed_multisample_layout_mask = 0, msaa_16 = 0, gen6_gather_wa = {(unknown: 0) <repeats 32 times>}}}
>        cp = 0x7ffed173bd90
>        old_prog_offset = 0
>        old_prog_data = 0x0
>        success = <optimized out>
>#10 0x00007fffe7854678 in brw_shader_precompile (sh_prog=<optimized out>, ctx=<optimized out>)
>    at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:66
>        gs = 0x0
>        cs = 0x7ffed163fb78
>        vs = 0x0
>        tcs = 0x0
>        tes = 0x0
>        fs = 0x7fffa216e550
>#11 brw_link_shader (ctx=0x84a1df8, shProg=0x0) at ../../../../../../../src/mesa/drivers/dri/i965/brw_link.cpp:260
>No locals.
>#12 0x00007fffe76f34e6 in _mesa_glsl_link_shader (ctx=0x84a1df8, prog=0x7fff44131a78) at ../../../../src/mesa/program/ir_to_mesa.cpp:3040
>        i = <optimized out>
>#13 0x00007fffe760846a in link_program (ctx=0x84a1df8, program=<optimized out>) at ../../../../src/mesa/main/shaderapi.c:1048
>        shProg = 0x7fff44131a78
>#14 0x00000000009fe30b in ?? ()
>No symbol table info available.
>#15 0x00000000009fbcfc in ?? ()
>No symbol table info available.
>#16 0x0000000001108b29 in ?? ()
>No symbol table info available.
>#17 0x00000000010fd25a in ?? ()
>No symbol table info available.
>#18 0x000000000181254d in ?? ()
>No symbol table info available.
>#19 0x00000000012395ec in ?? ()
>No symbol table info available.
>#20 0x0000000000ce8ef3 in ?? ()
>No symbol table info available.
>#21 0x0000000000ce9135 in ?? ()
>No symbol table info available.
>#22 0x000000000137c58d in ?? ()
>No symbol table info available.
>#23 0x000000000137c5b7 in ?? ()
>No symbol table info available.
>#24 0x0000000000923d69 in ?? ()
>No symbol table info available.
>#25 0x0000000000b1dbd7 in ?? ()
>No symbol table info available.
>#26 0x00007ffff6ed80a4 in start_thread (arg=0x7fffa21e7700) at pthread_create.c:309
>        __res = <optimized out>
>        pd = 0x7fffa21e7700
>        now = <optimized out>
>        unwind_buf = {cancel_jmp_buf = {{jmp_buf = {140735913293568, -2412431874409049098, 1, 140737354125408, 0, 140735913293568, 2412264469750404086, 
>                2412447425728795638}, mask_was_saved = 0}}, priv = {pad = {0x0, 0x0, 0x0, 0x0}, data = {prev = 0x0, cleanup = 0x0, canceltype = 0}}}
>        not_first_call = <optimized out>
>        pagesize_m1 = <optimized out>
>        sp = <optimized out>
>        freesize = <optimized out>
>        __PRETTY_FUNCTION__ = "start_thread"
>#27 0x00007ffff53b39cd in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:111
>No locals.
>(gdb) c
>Continuing.
>[Thread 0x7fffa2b38700 (LWP 2591) exited]
>[Thread 0x7fffa2078700 (LWP 2590) exited]
>[Thread 0x7fffa20c9700 (LWP 2588) exited]
>[Thread 0x7fffa213e700 (LWP 2587) exited]
>[Thread 0x7fffa219f700 (LWP 2586) exited]
>[Thread 0x7fffe00bb700 (LWP 2584) exited]
>[Thread 0x7fffe010c700 (LWP 2566) exited]
>[Thread 0x7fffe015d700 (LWP 2565) exited]
>[Thread 0x7fffe01ae700 (LWP 2564) exited]
>[Thread 0x7fffa3b3a700 (LWP 2563) exited]
>[Thread 0x7fffe01ff700 (LWP 2562) exited]
>[Thread 0x7fffe0250700 (LWP 2561) exited]
>[Thread 0x7fffe2acb700 (LWP 2560) exited]
>[Thread 0x7fffa3f7b700 (LWP 2559) exited]
>[Thread 0x7fffa477c700 (LWP 2558) exited]
>[Thread 0x7fffe46cf700 (LWP 2557) exited]
>[Thread 0x7fffe51c9700 (LWP 2556) exited]
>[Thread 0x7fffe2a52700 (LWP 2555) exited]
>[Thread 0x7ffff7fab700 (LWP 2554) exited]
>[Thread 0x7fffe9c15700 (LWP 2552) exited]
>[Thread 0x7ffff7faef00 (LWP 2548) exited]
>
>Program terminated with signal SIGSEGV, Segmentation fault.
>The program no longer exists.
>(gdb) q

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Attachments on bug 93840: 121746 | 121900 | 121953 | 126122 | 126150

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