Attachment 124147 Details for Bug 96258 – compute shader dump - NV50_PROG_OPTIMIZE=0 (success)

compute shader dump - NV50_PROG_OPTIMIZE=0 (success)

file_96258.txt (text/plain), 377.82 KB, created by Ilia Mirkin on 2016-05-28 13:54:56 UTC

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Creator: Ilia Mirkin

Created: 2016-05-28 13:54:56 UTC

Size: 377.82 KB

patch

obsolete

>COMP
>PROPERTY CS_FIXED_BLOCK_WIDTH 1024
>PROPERTY CS_FIXED_BLOCK_HEIGHT 1
>PROPERTY CS_FIXED_BLOCK_DEPTH 1
>DCL SV[0], THREAD_ID
>DCL SV[1], BLOCK_ID
>DCL BUFFER[16]
>DCL BUFFER[17]
>DCL BUFFER[18]
>DCL BUFFER[19]
>DCL CONST[0..5]
>DCL TEMP[0..260], LOCAL
>IMM[0] UINT32 {1024, 1, 16, 0}
>IMM[1] FLT32 {    0.0000,     0.0100,     1.0000,     0.2000}
>IMM[2] FLT32 {    1.5708,    -0.0236,     0.0813,    -0.2146}
>IMM[3] FLT32 {    0.0000,    -0.2000,    10.0000,     2.0000}
>IMM[4] INT32 {1, 0, 4, 2}
>IMM[5] FLT32 {    0.3500,     0.0000,     0.0000,     0.0000}
>IMM[6] INT32 {-1, 0, 0, 0}
>  0: UMAD TEMP[0].xyz, SV[1].xyzz, IMM[0].xyyy, SV[0].xyzz
>  1: MOV TEMP[1].x, TEMP[0].xxxx
>  2: MOV TEMP[1].x, TEMP[0].xxxx
>  3: MOD TEMP[2].x, TEMP[0].xxxx, CONST[0].xxxx
>  4: IDIV TEMP[3].x, TEMP[0].xxxx, CONST[0].xxxx
>  5: MOV TEMP[4], IMM[1].xxxx
>  6: UMUL TEMP[5].x, TEMP[0].xxxx, IMM[0].zzzz
>  7: LOAD TEMP[5], BUFFER[18], TEMP[5].xxxx
>  8: ADD TEMP[5], TEMP[5], -CONST[4]
>  9: DP4 TEMP[6].x, TEMP[5], TEMP[5]
> 10: SQRT TEMP[6].x, TEMP[6].xxxx
> 11: ADD TEMP[7].x, CONST[5].xxxx, IMM[1].yyyy
> 12: FSGE TEMP[6].x, TEMP[7].xxxx, TEMP[6].xxxx
> 13: UIF TEMP[6].xxxx :0
> 14:   MOV TEMP[6].xyz, IMM[1].xxxx
> 15:   DP4 TEMP[7].x, TEMP[5], TEMP[5]
> 16:   RSQ TEMP[7].x, TEMP[7].xxxx
> 17:   MUL TEMP[5], TEMP[5], TEMP[7].xxxx
> 18:   DP3 TEMP[7].x, TEMP[5].xyzz, IMM[1].xzxx
> 19:   MAX TEMP[7].x, TEMP[7].xxxx, IMM[1].xxxx
> 20:   FSNE TEMP[8].x, TEMP[7].xxxx, IMM[1].zzzz
> 21:   UIF TEMP[8].xxxx :0
> 22:     DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 23:     FSEQ TEMP[9].x, TEMP[8].xxxx, IMM[1].xxxx
> 24:     UIF TEMP[9].xxxx :0
> 25:       MOV TEMP[9].xyz, IMM[1].xxxx
> 26:     ELSE :0
> 27:       DP3 TEMP[10].x, IMM[1].xzxx, TEMP[5].xyzz
> 28:       RCP TEMP[8].x, TEMP[8].xxxx
> 29:       MUL TEMP[8].x, TEMP[10].xxxx, TEMP[8].xxxx
> 30:       MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[8].xxxx
> 31:       ADD TEMP[9].xyz, IMM[1].xzxx, -TEMP[5].xyzz
> 32:     ENDIF
> 33:     DP3 TEMP[5].x, TEMP[9].xyzz, TEMP[9].xyzz
> 34:     RSQ TEMP[5].x, TEMP[5].xxxx
> 35:     MUL TEMP[6].xyz, TEMP[9].xyzz, TEMP[5].xxxx
> 36:   ENDIF
> 37:   MOV TEMP[5].w, IMM[1].xxxx
> 38:   MOV TEMP[5].xyz, -TEMP[6].xyzx
> 39:   MOV TEMP[8].w, IMM[1].xxxx
> 40:   MOV TEMP[8].xyz, -TEMP[6].xyzx
> 41:   SSG TEMP[6].x, TEMP[7].xxxx
> 42:   ABS TEMP[9].x, TEMP[7].xxxx
> 43:   ADD TEMP[9].x, IMM[1].zzzz, -TEMP[9].xxxx
> 44:   SQRT TEMP[9].x, TEMP[9].xxxx
> 45:   ABS TEMP[10].x, TEMP[7].xxxx
> 46:   ABS TEMP[11].x, TEMP[7].xxxx
> 47:   ABS TEMP[12].x, TEMP[7].xxxx
> 48:   MAD TEMP[12].x, TEMP[12].xxxx, IMM[2].yyyy, IMM[2].zzzz
> 49:   MAD TEMP[11].x, TEMP[11].xxxx, TEMP[12].xxxx, IMM[2].wwww
> 50:   MAD TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx, IMM[2].xxxx
> 51:   MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 52:   ADD TEMP[9].x, IMM[2].xxxx, -TEMP[9].xxxx
> 53:   MUL TEMP[6].x, TEMP[6].xxxx, TEMP[9].xxxx
> 54:   ADD TEMP[6].x, IMM[2].xxxx, -TEMP[6].xxxx
> 55:   SIN TEMP[6].x, TEMP[6].xxxx
> 56:   MUL TEMP[6].x, IMM[1].wwww, TEMP[6].xxxx
> 57:   MUL TEMP[7].x, IMM[1].wwww, TEMP[7].xxxx
> 58:   MUL TEMP[7], TEMP[7].xxxx, TEMP[8]
> 59:   MAD TEMP[4], TEMP[6].xxxx, TEMP[5], -TEMP[7]
> 60: ELSE :0
> 61:   ADD TEMP[4], TEMP[4], IMM[3].xyxx
> 62: ENDIF
> 63: UMUL TEMP[5].x, TEMP[0].xxxx, IMM[0].zzzz
> 64: UMUL TEMP[6].x, TEMP[0].xxxx, IMM[0].zzzz
> 65: LOAD TEMP[6], BUFFER[18], TEMP[6].xxxx
> 66: MOV TEMP[7], TEMP[6]
> 67: UMUL TEMP[0].x, TEMP[0].xxxx, IMM[0].zzzz
> 68: LOAD TEMP[0], BUFFER[16], TEMP[0].xxxx
> 69: MUL TEMP[4], TEMP[4], IMM[3].zzzz
> 70: MUL TEMP[7].x, CONST[1].xxxx, CONST[1].xxxx
> 71: MAD TEMP[0], IMM[3].wwww, TEMP[6], -TEMP[0]
> 72: MAD TEMP[0], TEMP[4], TEMP[7].xxxx, TEMP[0]
> 73: STORE BUFFER[19], TEMP[5].xxxx, TEMP[0]
> 74: MEMBAR IMM[4].xxxx
> 75: BARRIER
> 76: MOV TEMP[0].x, IMM[4].yyyy
> 77: BGNLOOP :0
> 78:   ISGE TEMP[4].x, TEMP[0].xxxx, IMM[4].zzzz
> 79:   UIF TEMP[4].xxxx :0
> 80:     BRK
> 81:   ENDIF
> 82:   MOV TEMP[5].x, IMM[4].yyyy
> 83:   BGNLOOP :0
> 84:     ISGE TEMP[6].x, TEMP[5].xxxx, IMM[4].wwww
> 85:     UIF TEMP[6].xxxx :0
> 86:       BRK
> 87:     ENDIF
> 88:     MOD TEMP[7].x, TEMP[3].xxxx, IMM[4].wwww
> 89:     USEQ TEMP[8].x, TEMP[7].xxxx, TEMP[5].xxxx
> 90:     MOD TEMP[9].x, TEMP[2].xxxx, IMM[4].wwww
> 91:     USEQ TEMP[10].x, TEMP[9].xxxx, TEMP[5].xxxx
> 92:     AND TEMP[11].x, TEMP[8].xxxx, TEMP[10].xxxx
> 93:     UIF TEMP[11].xxxx :0
> 94:       UMUL TEMP[12].x, TEMP[1].xxxx, IMM[0].zzzz
> 95:       LOAD TEMP[13], BUFFER[19], TEMP[12].xxxx
> 96:       MOV TEMP[14], TEMP[13]
> 97:       MOV TEMP[15], TEMP[13]
> 98:       UADD TEMP[16].x, TEMP[1].xxxx, IMM[4].xxxx
> 99:       MOD TEMP[17].x, TEMP[16].xxxx, CONST[0].xxxx
>100:       ISLT TEMP[18].x, TEMP[2].xxxx, TEMP[17].xxxx
>101:       UIF TEMP[18].xxxx :0
>102:         UMUL TEMP[19].x, TEMP[16].xxxx, IMM[0].zzzz
>103:         LOAD TEMP[20], BUFFER[19], TEMP[19].xxxx
>104:         MOV TEMP[21], TEMP[20]
>105:         ADD TEMP[22], TEMP[13], -TEMP[20]
>106:         DP4 TEMP[23].x, TEMP[22], TEMP[22]
>107:         SQRT TEMP[24].x, TEMP[23].xxxx
>108:         ADD TEMP[25].x, CONST[2].xxxx, -TEMP[24].xxxx
>109:         MUL TEMP[26].x, IMM[5].xxxx, TEMP[25].xxxx
>110:         RCP TEMP[27].x, TEMP[24].xxxx
>111:         MUL TEMP[28].x, TEMP[26].xxxx, TEMP[27].xxxx
>112:         MUL TEMP[29], TEMP[28].xxxx, TEMP[22]
>113:         UMUL TEMP[30].x, TEMP[1].xxxx, IMM[0].zzzz
>114:         UMUL TEMP[31].x, TEMP[1].xxxx, IMM[0].zzzz
>115:         LOAD TEMP[32], BUFFER[19], TEMP[31].xxxx
>116:         ADD TEMP[33], TEMP[32], TEMP[29]
>117:         STORE BUFFER[19], TEMP[30].xxxx, TEMP[33]
>118:         UMUL TEMP[34].x, TEMP[16].xxxx, IMM[0].zzzz
>119:         UMUL TEMP[35].x, TEMP[16].xxxx, IMM[0].zzzz
>120:         LOAD TEMP[36], BUFFER[19], TEMP[35].xxxx
>121:         ADD TEMP[37], TEMP[36], -TEMP[29]
>122:         STORE BUFFER[19], TEMP[34].xxxx, TEMP[37]
>123:         MEMBAR IMM[4].xxxx
>124:       ENDIF
>125:       UADD TEMP[38].x, TEMP[1].xxxx, CONST[0].xxxx
>126:       UMUL TEMP[39].x, CONST[0].xxxx, CONST[0].xxxx
>127:       ISLT TEMP[40].x, TEMP[38].xxxx, TEMP[39].xxxx
>128:       UIF TEMP[40].xxxx :0
>129:         UMUL TEMP[41].x, TEMP[38].xxxx, IMM[0].zzzz
>130:         LOAD TEMP[42], BUFFER[19], TEMP[41].xxxx
>131:         MOV TEMP[43], TEMP[42]
>132:         ADD TEMP[44], TEMP[13], -TEMP[42]
>133:         DP4 TEMP[45].x, TEMP[44], TEMP[44]
>134:         SQRT TEMP[46].x, TEMP[45].xxxx
>135:         ADD TEMP[47].x, CONST[2].xxxx, -TEMP[46].xxxx
>136:         MUL TEMP[48].x, IMM[5].xxxx, TEMP[47].xxxx
>137:         RCP TEMP[49].x, TEMP[46].xxxx
>138:         MUL TEMP[50].x, TEMP[48].xxxx, TEMP[49].xxxx
>139:         MUL TEMP[51], TEMP[50].xxxx, TEMP[44]
>140:         UMUL TEMP[52].x, TEMP[1].xxxx, IMM[0].zzzz
>141:         UMUL TEMP[53].x, TEMP[1].xxxx, IMM[0].zzzz
>142:         LOAD TEMP[54], BUFFER[19], TEMP[53].xxxx
>143:         ADD TEMP[55], TEMP[54], TEMP[51]
>144:         STORE BUFFER[19], TEMP[52].xxxx, TEMP[55]
>145:         UMUL TEMP[56].x, TEMP[38].xxxx, IMM[0].zzzz
>146:         UMUL TEMP[57].x, TEMP[38].xxxx, IMM[0].zzzz
>147:         LOAD TEMP[58], BUFFER[19], TEMP[57].xxxx
>148:         ADD TEMP[59], TEMP[58], -TEMP[51]
>149:         STORE BUFFER[19], TEMP[56].xxxx, TEMP[59]
>150:         MEMBAR IMM[4].xxxx
>151:       ENDIF
>152:       UADD TEMP[60].x, TEMP[1].xxxx, IMM[4].xxxx
>153:       UADD TEMP[61].x, TEMP[60].xxxx, CONST[0].xxxx
>154:       UMUL TEMP[62].x, CONST[0].xxxx, CONST[0].xxxx
>155:       ISLT TEMP[63].x, TEMP[61].xxxx, TEMP[62].xxxx
>156:       MOD TEMP[64].x, TEMP[61].xxxx, CONST[0].xxxx
>157:       ISLT TEMP[65].x, TEMP[2].xxxx, TEMP[64].xxxx
>158:       AND TEMP[66].x, TEMP[63].xxxx, TEMP[65].xxxx
>159:       UIF TEMP[66].xxxx :0
>160:         UMUL TEMP[67].x, TEMP[61].xxxx, IMM[0].zzzz
>161:         LOAD TEMP[68], BUFFER[19], TEMP[67].xxxx
>162:         MOV TEMP[69], TEMP[68]
>163:         ADD TEMP[70], TEMP[21], -TEMP[68]
>164:         DP4 TEMP[71].x, TEMP[70], TEMP[70]
>165:         SQRT TEMP[72].x, TEMP[71].xxxx
>166:         ADD TEMP[73].x, CONST[2].xxxx, -TEMP[72].xxxx
>167:         MUL TEMP[74].x, IMM[5].xxxx, TEMP[73].xxxx
>168:         RCP TEMP[75].x, TEMP[72].xxxx
>169:         MUL TEMP[76].x, TEMP[74].xxxx, TEMP[75].xxxx
>170:         MUL TEMP[77], TEMP[76].xxxx, TEMP[70]
>171:         UMUL TEMP[78].x, TEMP[16].xxxx, IMM[0].zzzz
>172:         UMUL TEMP[79].x, TEMP[16].xxxx, IMM[0].zzzz
>173:         LOAD TEMP[80], BUFFER[19], TEMP[79].xxxx
>174:         ADD TEMP[81], TEMP[80], TEMP[77]
>175:         STORE BUFFER[19], TEMP[78].xxxx, TEMP[81]
>176:         UMUL TEMP[82].x, TEMP[61].xxxx, IMM[0].zzzz
>177:         UMUL TEMP[83].x, TEMP[61].xxxx, IMM[0].zzzz
>178:         LOAD TEMP[84], BUFFER[19], TEMP[83].xxxx
>179:         ADD TEMP[85], TEMP[84], -TEMP[77]
>180:         STORE BUFFER[19], TEMP[82].xxxx, TEMP[85]
>181:         MEMBAR IMM[4].xxxx
>182:         ADD TEMP[86], TEMP[43], -TEMP[68]
>183:         DP4 TEMP[87].x, TEMP[86], TEMP[86]
>184:         SQRT TEMP[88].x, TEMP[87].xxxx
>185:         ADD TEMP[89].x, CONST[2].xxxx, -TEMP[88].xxxx
>186:         MUL TEMP[90].x, IMM[5].xxxx, TEMP[89].xxxx
>187:         RCP TEMP[91].x, TEMP[88].xxxx
>188:         MUL TEMP[92].x, TEMP[90].xxxx, TEMP[91].xxxx
>189:         MUL TEMP[93], TEMP[92].xxxx, TEMP[86]
>190:         UMUL TEMP[94].x, TEMP[38].xxxx, IMM[0].zzzz
>191:         UMUL TEMP[95].x, TEMP[38].xxxx, IMM[0].zzzz
>192:         LOAD TEMP[96], BUFFER[19], TEMP[95].xxxx
>193:         ADD TEMP[97], TEMP[96], TEMP[93]
>194:         STORE BUFFER[19], TEMP[94].xxxx, TEMP[97]
>195:         UMUL TEMP[98].x, TEMP[61].xxxx, IMM[0].zzzz
>196:         UMUL TEMP[99].x, TEMP[61].xxxx, IMM[0].zzzz
>197:         LOAD TEMP[100], BUFFER[19], TEMP[99].xxxx
>198:         ADD TEMP[14], TEMP[100], -TEMP[93]
>199:         STORE BUFFER[19], TEMP[98].xxxx, TEMP[14]
>200:         MEMBAR IMM[4].xxxx
>201:         ADD TEMP[15], TEMP[13], -TEMP[68]
>202:         DP4 TEMP[101].x, TEMP[15], TEMP[15]
>203:         SQRT TEMP[102].x, TEMP[101].xxxx
>204:         ADD TEMP[103].x, CONST[3].xxxx, -TEMP[102].xxxx
>205:         MUL TEMP[104].x, IMM[5].xxxx, TEMP[103].xxxx
>206:         RCP TEMP[105].x, TEMP[102].xxxx
>207:         MUL TEMP[106].x, TEMP[104].xxxx, TEMP[105].xxxx
>208:         MUL TEMP[107], TEMP[106].xxxx, TEMP[15]
>209:         UMUL TEMP[108].x, TEMP[1].xxxx, IMM[0].zzzz
>210:         UMUL TEMP[109].x, TEMP[1].xxxx, IMM[0].zzzz
>211:         LOAD TEMP[110], BUFFER[19], TEMP[109].xxxx
>212:         ADD TEMP[111], TEMP[110], TEMP[107]
>213:         STORE BUFFER[19], TEMP[108].xxxx, TEMP[111]
>214:         UMUL TEMP[112].x, TEMP[61].xxxx, IMM[0].zzzz
>215:         UMUL TEMP[113].x, TEMP[61].xxxx, IMM[0].zzzz
>216:         LOAD TEMP[114], BUFFER[19], TEMP[113].xxxx
>217:         ADD TEMP[115], TEMP[114], -TEMP[107]
>218:         STORE BUFFER[19], TEMP[112].xxxx, TEMP[115]
>219:         ADD TEMP[116], TEMP[21], -TEMP[43]
>220:         DP4 TEMP[117].x, TEMP[116], TEMP[116]
>221:         SQRT TEMP[118].x, TEMP[117].xxxx
>222:         ADD TEMP[119].x, CONST[3].xxxx, -TEMP[118].xxxx
>223:         MUL TEMP[120].x, IMM[5].xxxx, TEMP[119].xxxx
>224:         RCP TEMP[121].x, TEMP[118].xxxx
>225:         MUL TEMP[122].x, TEMP[120].xxxx, TEMP[121].xxxx
>226:         MUL TEMP[123], TEMP[122].xxxx, TEMP[116]
>227:         UMUL TEMP[124].x, TEMP[16].xxxx, IMM[0].zzzz
>228:         UMUL TEMP[125].x, TEMP[16].xxxx, IMM[0].zzzz
>229:         LOAD TEMP[126], BUFFER[19], TEMP[125].xxxx
>230:         ADD TEMP[127], TEMP[126], TEMP[123]
>231:         STORE BUFFER[19], TEMP[124].xxxx, TEMP[127]
>232:         UMUL TEMP[128].x, TEMP[38].xxxx, IMM[0].zzzz
>233:         UMUL TEMP[129].x, TEMP[38].xxxx, IMM[0].zzzz
>234:         LOAD TEMP[130], BUFFER[19], TEMP[129].xxxx
>235:         ADD TEMP[131], TEMP[130], -TEMP[123]
>236:         STORE BUFFER[19], TEMP[128].xxxx, TEMP[131]
>237:         MEMBAR IMM[4].xxxx
>238:       ENDIF
>239:     ELSE :0
>240:       USEQ TEMP[132].x, TEMP[5].xxxx, IMM[4].xxxx
>241:       MOD TEMP[133].x, TEMP[2].xxxx, IMM[4].wwww
>242:       USEQ TEMP[134].x, TEMP[133].xxxx, IMM[4].xxxx
>243:       AND TEMP[135].x, TEMP[132].xxxx, TEMP[134].xxxx
>244:       USEQ TEMP[136].x, TEMP[3].xxxx, IMM[4].yyyy
>245:       AND TEMP[137].x, TEMP[135].xxxx, TEMP[136].xxxx
>246:       UIF TEMP[137].xxxx :0
>247:         UADD TEMP[16].x, TEMP[1].xxxx, IMM[4].xxxx
>248:         ISLT TEMP[138].x, TEMP[16].xxxx, CONST[0].xxxx
>249:         UIF TEMP[138].xxxx :0
>250:           UMUL TEMP[139].x, TEMP[1].xxxx, IMM[0].zzzz
>251:           LOAD TEMP[140], BUFFER[19], TEMP[139].xxxx
>252:           MOV TEMP[141], TEMP[140]
>253:           UMUL TEMP[142].x, TEMP[16].xxxx, IMM[0].zzzz
>254:           LOAD TEMP[143], BUFFER[19], TEMP[142].xxxx
>255:           ADD TEMP[144], TEMP[140], -TEMP[143]
>256:           DP4 TEMP[145].x, TEMP[144], TEMP[144]
>257:           SQRT TEMP[146].x, TEMP[145].xxxx
>258:           ADD TEMP[147].x, CONST[2].xxxx, -TEMP[146].xxxx
>259:           MUL TEMP[148].x, IMM[5].xxxx, TEMP[147].xxxx
>260:           RCP TEMP[149].x, TEMP[146].xxxx
>261:           MUL TEMP[150].x, TEMP[148].xxxx, TEMP[149].xxxx
>262:           MUL TEMP[151], TEMP[150].xxxx, TEMP[144]
>263:           UMUL TEMP[152].x, TEMP[1].xxxx, IMM[0].zzzz
>264:           UMUL TEMP[153].x, TEMP[1].xxxx, IMM[0].zzzz
>265:           LOAD TEMP[154], BUFFER[19], TEMP[153].xxxx
>266:           ADD TEMP[155], TEMP[154], TEMP[151]
>267:           STORE BUFFER[19], TEMP[152].xxxx, TEMP[155]
>268:           UMUL TEMP[156].x, TEMP[16].xxxx, IMM[0].zzzz
>269:           UMUL TEMP[157].x, TEMP[16].xxxx, IMM[0].zzzz
>270:           LOAD TEMP[158], BUFFER[19], TEMP[157].xxxx
>271:           ADD TEMP[159], TEMP[158], -TEMP[151]
>272:           STORE BUFFER[19], TEMP[156].xxxx, TEMP[159]
>273:           MEMBAR IMM[4].xxxx
>274:         ENDIF
>275:       ELSE :0
>276:         USEQ TEMP[160].x, TEMP[5].xxxx, IMM[4].xxxx
>277:         MOD TEMP[161].x, TEMP[3].xxxx, IMM[4].wwww
>278:         USEQ TEMP[162].x, TEMP[161].xxxx, IMM[4].xxxx
>279:         AND TEMP[163].x, TEMP[160].xxxx, TEMP[162].xxxx
>280:         USEQ TEMP[164].x, TEMP[2].xxxx, IMM[4].yyyy
>281:         AND TEMP[165].x, TEMP[163].xxxx, TEMP[164].xxxx
>282:         UIF TEMP[165].xxxx :0
>283:           UADD TEMP[38].x, TEMP[1].xxxx, CONST[0].xxxx
>284:           UMUL TEMP[166].x, CONST[0].xxxx, CONST[0].xxxx
>285:           ISLT TEMP[167].x, TEMP[38].xxxx, TEMP[166].xxxx
>286:           UIF TEMP[167].xxxx :0
>287:             UMUL TEMP[168].x, TEMP[1].xxxx, IMM[0].zzzz
>288:             LOAD TEMP[169], BUFFER[19], TEMP[168].xxxx
>289:             MOV TEMP[170], TEMP[169]
>290:             UMUL TEMP[171].x, TEMP[38].xxxx, IMM[0].zzzz
>291:             LOAD TEMP[172], BUFFER[19], TEMP[171].xxxx
>292:             ADD TEMP[173], TEMP[169], -TEMP[172]
>293:             DP4 TEMP[174].x, TEMP[173], TEMP[173]
>294:             SQRT TEMP[175].x, TEMP[174].xxxx
>295:             ADD TEMP[176].x, CONST[2].xxxx, -TEMP[175].xxxx
>296:             MUL TEMP[177].x, IMM[5].xxxx, TEMP[176].xxxx
>297:             RCP TEMP[178].x, TEMP[175].xxxx
>298:             MUL TEMP[179].x, TEMP[177].xxxx, TEMP[178].xxxx
>299:             MUL TEMP[180], TEMP[179].xxxx, TEMP[173]
>300:             UMUL TEMP[181].x, TEMP[1].xxxx, IMM[0].zzzz
>301:             UMUL TEMP[182].x, TEMP[1].xxxx, IMM[0].zzzz
>302:             LOAD TEMP[183], BUFFER[19], TEMP[182].xxxx
>303:             ADD TEMP[184], TEMP[183], TEMP[180]
>304:             STORE BUFFER[19], TEMP[181].xxxx, TEMP[184]
>305:             UMUL TEMP[185].x, TEMP[38].xxxx, IMM[0].zzzz
>306:             UMUL TEMP[69].x, TEMP[38].xxxx, IMM[0].zzzz
>307:             LOAD TEMP[186], BUFFER[19], TEMP[69].xxxx
>308:             ADD TEMP[187], TEMP[186], -TEMP[180]
>309:             STORE BUFFER[19], TEMP[185].xxxx, TEMP[187]
>310:             MEMBAR IMM[4].xxxx
>311:           ENDIF
>312:         ENDIF
>313:       ENDIF
>314:     ENDIF
>315:     BARRIER
>316:     UADD TEMP[5].x, TEMP[5].xxxx, IMM[4].xxxx
>317:   ENDLOOP :0
>318:   MOV TEMP[188].x, IMM[4].yyyy
>319:   BGNLOOP :0
>320:     ISGE TEMP[189].x, TEMP[188].xxxx, IMM[4].wwww
>321:     UIF TEMP[189].xxxx :0
>322:       BRK
>323:     ENDIF
>324:     MOD TEMP[190].x, TEMP[3].xxxx, IMM[4].wwww
>325:     USEQ TEMP[191].x, TEMP[190].xxxx, TEMP[188].xxxx
>326:     UADD TEMP[192].x, TEMP[2].xxxx, IMM[4].xxxx
>327:     MOD TEMP[193].x, TEMP[192].xxxx, IMM[4].wwww
>328:     USEQ TEMP[194].x, TEMP[193].xxxx, TEMP[188].xxxx
>329:     AND TEMP[195].x, TEMP[191].xxxx, TEMP[194].xxxx
>330:     UIF TEMP[195].xxxx :0
>331:       UMUL TEMP[196].x, TEMP[1].xxxx, IMM[0].zzzz
>332:       LOAD TEMP[197], BUFFER[19], TEMP[196].xxxx
>333:       MOV TEMP[198], TEMP[197]
>334:       UADD TEMP[199].x, TEMP[1].xxxx, IMM[4].xxxx
>335:       UADD TEMP[200].x, TEMP[1].xxxx, CONST[0].xxxx
>336:       UADD TEMP[201].x, TEMP[1].xxxx, IMM[4].xxxx
>337:       UADD TEMP[202].x, TEMP[201].xxxx, CONST[0].xxxx
>338:       UMUL TEMP[203].x, CONST[0].xxxx, CONST[0].xxxx
>339:       ISLT TEMP[204].x, TEMP[202].xxxx, TEMP[203].xxxx
>340:       MOD TEMP[205].x, TEMP[202].xxxx, CONST[0].xxxx
>341:       ISLT TEMP[206].x, TEMP[2].xxxx, TEMP[205].xxxx
>342:       AND TEMP[207].x, TEMP[204].xxxx, TEMP[206].xxxx
>343:       UIF TEMP[207].xxxx :0
>344:         UMUL TEMP[208].x, TEMP[199].xxxx, IMM[0].zzzz
>345:         LOAD TEMP[209], BUFFER[19], TEMP[208].xxxx
>346:         MOV TEMP[210], TEMP[209]
>347:         UMUL TEMP[211].x, TEMP[200].xxxx, IMM[0].zzzz
>348:         LOAD TEMP[212], BUFFER[19], TEMP[211].xxxx
>349:         MOV TEMP[213], TEMP[212]
>350:         UMUL TEMP[214].x, TEMP[202].xxxx, IMM[0].zzzz
>351:         LOAD TEMP[215], BUFFER[19], TEMP[214].xxxx
>352:         ADD TEMP[216], TEMP[197], -TEMP[215]
>353:         DP4 TEMP[217].x, TEMP[216], TEMP[216]
>354:         SQRT TEMP[218].x, TEMP[217].xxxx
>355:         ADD TEMP[219].x, CONST[3].xxxx, -TEMP[218].xxxx
>356:         MUL TEMP[220].x, IMM[5].xxxx, TEMP[219].xxxx
>357:         RCP TEMP[221].x, TEMP[218].xxxx
>358:         MUL TEMP[222].x, TEMP[220].xxxx, TEMP[221].xxxx
>359:         MUL TEMP[223], TEMP[222].xxxx, TEMP[216]
>360:         UMUL TEMP[224].x, TEMP[1].xxxx, IMM[0].zzzz
>361:         UMUL TEMP[225].x, TEMP[1].xxxx, IMM[0].zzzz
>362:         LOAD TEMP[226], BUFFER[19], TEMP[225].xxxx
>363:         ADD TEMP[227], TEMP[226], TEMP[223]
>364:         STORE BUFFER[19], TEMP[224].xxxx, TEMP[227]
>365:         UMUL TEMP[228].x, TEMP[202].xxxx, IMM[0].zzzz
>366:         UMUL TEMP[229].x, TEMP[202].xxxx, IMM[0].zzzz
>367:         LOAD TEMP[230], BUFFER[19], TEMP[229].xxxx
>368:         ADD TEMP[231], TEMP[230], -TEMP[223]
>369:         STORE BUFFER[19], TEMP[228].xxxx, TEMP[231]
>370:         ADD TEMP[232], TEMP[209], -TEMP[212]
>371:         DP4 TEMP[233].x, TEMP[232], TEMP[232]
>372:         SQRT TEMP[234].x, TEMP[233].xxxx
>373:         ADD TEMP[235].x, CONST[3].xxxx, -TEMP[234].xxxx
>374:         MUL TEMP[236].x, IMM[5].xxxx, TEMP[235].xxxx
>375:         RCP TEMP[237].x, TEMP[234].xxxx
>376:         MUL TEMP[238].x, TEMP[236].xxxx, TEMP[237].xxxx
>377:         MUL TEMP[239], TEMP[238].xxxx, TEMP[232]
>378:         UMUL TEMP[240].x, TEMP[199].xxxx, IMM[0].zzzz
>379:         UMUL TEMP[241].x, TEMP[199].xxxx, IMM[0].zzzz
>380:         LOAD TEMP[242], BUFFER[19], TEMP[241].xxxx
>381:         ADD TEMP[243], TEMP[242], TEMP[239]
>382:         STORE BUFFER[19], TEMP[240].xxxx, TEMP[243]
>383:         UMUL TEMP[244].x, TEMP[200].xxxx, IMM[0].zzzz
>384:         UMUL TEMP[245].x, TEMP[200].xxxx, IMM[0].zzzz
>385:         LOAD TEMP[246], BUFFER[19], TEMP[245].xxxx
>386:         ADD TEMP[247], TEMP[246], -TEMP[239]
>387:         STORE BUFFER[19], TEMP[244].xxxx, TEMP[247]
>388:         MEMBAR IMM[4].xxxx
>389:       ENDIF
>390:     ENDIF
>391:     BARRIER
>392:     UADD TEMP[188].x, TEMP[188].xxxx, IMM[4].xxxx
>393:   ENDLOOP :0
>394:   UMUL TEMP[248].x, TEMP[1].xxxx, IMM[0].zzzz
>395:   LOAD TEMP[249], BUFFER[19], TEMP[248].xxxx
>396:   ADD TEMP[250], TEMP[249], -CONST[4]
>397:   DP4 TEMP[251].x, TEMP[250], TEMP[250]
>398:   SQRT TEMP[252].x, TEMP[251].xxxx
>399:   ADD TEMP[253].x, CONST[5].xxxx, IMM[1].yyyy
>400:   FSLT TEMP[254].x, TEMP[252].xxxx, TEMP[253].xxxx
>401:   UIF TEMP[254].xxxx :0
>402:     UMUL TEMP[255].x, TEMP[1].xxxx, IMM[0].zzzz
>403:     DP4 TEMP[256].x, TEMP[250], TEMP[250]
>404:     RSQ TEMP[257].x, TEMP[256].xxxx
>405:     MUL TEMP[258], TEMP[250], TEMP[257].xxxx
>406:     ADD TEMP[259].x, CONST[5].xxxx, IMM[1].yyyy
>407:     MAD TEMP[260], TEMP[258], TEMP[259].xxxx, CONST[4]
>408:     STORE BUFFER[19], TEMP[255].xxxx, TEMP[260]
>409:     MEMBAR IMM[4].xxxx
>410:   ENDIF
>411:   BARRIER
>412:   UADD TEMP[0].x, TEMP[0].xxxx, IMM[4].xxxx
>413: ENDLOOP :0
>414: MOV TEMP[0].xyz, IMM[1].xxxx
>415: UADD TEMP[4].x, CONST[0].xxxx, IMM[6].xxxx
>416: ISLT TEMP[4].x, TEMP[2].xxxx, TEMP[4].xxxx
>417: UIF TEMP[4].xxxx :0
>418:   UADD TEMP[4].x, TEMP[1].xxxx, IMM[4].xxxx
>419:   UMUL TEMP[4].x, TEMP[4].xxxx, IMM[0].zzzz
>420:   LOAD TEMP[4], BUFFER[19], TEMP[4].xxxx
>421:   UMUL TEMP[5].x, TEMP[1].xxxx, IMM[0].zzzz
>422:   LOAD TEMP[5], BUFFER[19], TEMP[5].xxxx
>423:   ADD TEMP[4].xyz, TEMP[4], -TEMP[5]
>424:   DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz
>425:   RSQ TEMP[5].x, TEMP[5].xxxx
>426:   MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[5].xxxx
>427:   UADD TEMP[5].x, CONST[0].xxxx, IMM[6].xxxx
>428:   ISLT TEMP[5].x, TEMP[3].xxxx, TEMP[5].xxxx
>429:   UIF TEMP[5].xxxx :0
>430:     UADD TEMP[5].x, TEMP[1].xxxx, CONST[0].xxxx
>431:     UMUL TEMP[5].x, TEMP[5].xxxx, IMM[0].zzzz
>432:     LOAD TEMP[5], BUFFER[19], TEMP[5].xxxx
>433:     UMUL TEMP[6].x, TEMP[1].xxxx, IMM[0].zzzz
>434:     LOAD TEMP[6], BUFFER[19], TEMP[6].xxxx
>435:     ADD TEMP[5].xyz, TEMP[5], -TEMP[6]
>436:     DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[5].xyzz
>437:     RSQ TEMP[6].x, TEMP[6].xxxx
>438:     MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[6].xxxx
>439:     MUL TEMP[6].xyz, TEMP[5].zxyy, TEMP[4].yzxx
>440:     MAD TEMP[5].xyz, TEMP[5].yzxx, TEMP[4].zxyy, -TEMP[6].xyzz
>441:     DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[5].xyzz
>442:     RSQ TEMP[6].x, TEMP[6].xxxx
>443:     MUL TEMP[0].xyz, TEMP[5].xyzz, TEMP[6].xxxx
>444:   ENDIF
>445:   ISLT TEMP[5].x, IMM[4].yyyy, TEMP[3].xxxx
>446:   UIF TEMP[5].xxxx :0
>447:     UMUL TEMP[5].x, TEMP[1].xxxx, IMM[0].zzzz
>448:     LOAD TEMP[5], BUFFER[19], TEMP[5].xxxx
>449:     INEG TEMP[6].x, CONST[0].xxxx
>450:     UADD TEMP[6].x, TEMP[1].xxxx, TEMP[6].xxxx
>451:     UMUL TEMP[6].x, TEMP[6].xxxx, IMM[0].zzzz
>452:     LOAD TEMP[6], BUFFER[19], TEMP[6].xxxx
>453:     ADD TEMP[5].xyz, TEMP[5], -TEMP[6]
>454:     DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[5].xyzz
>455:     RSQ TEMP[6].x, TEMP[6].xxxx
>456:     MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[6].xxxx
>457:     MUL TEMP[6].xyz, TEMP[5].zxyy, TEMP[4].yzxx
>458:     MAD TEMP[4].xyz, TEMP[5].yzxx, TEMP[4].zxyy, -TEMP[6].xyzz
>459:     DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz
>460:     RSQ TEMP[5].x, TEMP[5].xxxx
>461:     MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
>462:   ENDIF
>463: ENDIF
>464: ISLT TEMP[2].x, IMM[4].yyyy, TEMP[2].xxxx
>465: UIF TEMP[2].xxxx :0
>466:   UMUL TEMP[2].x, TEMP[1].xxxx, IMM[0].zzzz
>467:   LOAD TEMP[2], BUFFER[19], TEMP[2].xxxx
>468:   UADD TEMP[4].x, TEMP[1].xxxx, IMM[6].xxxx
>469:   UMUL TEMP[4].x, TEMP[4].xxxx, IMM[0].zzzz
>470:   LOAD TEMP[4], BUFFER[19], TEMP[4].xxxx
>471:   ADD TEMP[2].xyz, TEMP[2], -TEMP[4]
>472:   DP3 TEMP[4].x, TEMP[2].xyzz, TEMP[2].xyzz
>473:   RSQ TEMP[4].x, TEMP[4].xxxx
>474:   MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[4].xxxx
>475:   UADD TEMP[4].x, CONST[0].xxxx, IMM[6].xxxx
>476:   ISLT TEMP[4].x, TEMP[3].xxxx, TEMP[4].xxxx
>477:   UIF TEMP[4].xxxx :0
>478:     UADD TEMP[4].x, TEMP[1].xxxx, CONST[0].xxxx
>479:     UMUL TEMP[4].x, TEMP[4].xxxx, IMM[0].zzzz
>480:     LOAD TEMP[4], BUFFER[19], TEMP[4].xxxx
>481:     UMUL TEMP[5].x, TEMP[1].xxxx, IMM[0].zzzz
>482:     LOAD TEMP[5], BUFFER[19], TEMP[5].xxxx
>483:     ADD TEMP[4].xyz, TEMP[4], -TEMP[5]
>484:     DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz
>485:     RSQ TEMP[5].x, TEMP[5].xxxx
>486:     MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[5].xxxx
>487:     MUL TEMP[5].xyz, TEMP[4].zxyy, TEMP[2].yzxx
>488:     MAD TEMP[4].xyz, TEMP[4].yzxx, TEMP[2].zxyy, -TEMP[5].xyzz
>489:     DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[4].xyzz
>490:     RSQ TEMP[5].x, TEMP[5].xxxx
>491:     MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
>492:   ENDIF
>493:   ISLT TEMP[3].x, IMM[4].yyyy, TEMP[3].xxxx
>494:   UIF TEMP[3].xxxx :0
>495:     UMUL TEMP[3].x, TEMP[1].xxxx, IMM[0].zzzz
>496:     LOAD TEMP[3], BUFFER[19], TEMP[3].xxxx
>497:     INEG TEMP[4].x, CONST[0].xxxx
>498:     UADD TEMP[4].x, TEMP[1].xxxx, TEMP[4].xxxx
>499:     UMUL TEMP[4].x, TEMP[4].xxxx, IMM[0].zzzz
>500:     LOAD TEMP[4], BUFFER[19], TEMP[4].xxxx
>501:     ADD TEMP[3].xyz, TEMP[3], -TEMP[4]
>502:     DP3 TEMP[4].x, TEMP[3].xyzz, TEMP[3].xyzz
>503:     RSQ TEMP[4].x, TEMP[4].xxxx
>504:     MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[4].xxxx
>505:     MUL TEMP[4].xyz, TEMP[3].zxyy, TEMP[2].yzxx
>506:     MAD TEMP[2].xyz, TEMP[3].yzxx, TEMP[2].zxyy, -TEMP[4].xyzz
>507:     DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>508:     RSQ TEMP[3].x, TEMP[3].xxxx
>509:     MAD TEMP[0].xyz, TEMP[2].xyzz, TEMP[3].xxxx, TEMP[0].xyzz
>510:   ENDIF
>511: ENDIF
>512: UMUL TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
>513: DP3 TEMP[2].x, TEMP[0].xyzz, TEMP[0].xyzz
>514: RSQ TEMP[2].x, TEMP[2].xxxx
>515: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xxxx
>516: STORE BUFFER[17].xyz, TEMP[1].xxxx, TEMP[0].xyzz
>517: MEMBAR IMM[4].xxxx
>518: END
>
>MAIN:-1 ()
>BB:0 (109 instructions) - df = { }
> -> BB:8 (tree)
> -> BB:2 (tree)
>  0: nop u32 %r3135 (0)
>  1: nop u32 %r3134 (0)
>  2: nop u32 %r3133 (0)
>  3: nop u32 %r3132 (0)
>  4: nop u32 %r3131 (0)
>  5: nop u32 %r3130 (0)
>  6: nop u32 %r3129 (0)
>  7: nop u32 %r3128 (0)
>  8: rdsv u32 %r2700 sv[CTAID:0] (0)
>  9: mov u32 %r2701 0x00000400 (0)
> 10: rdsv u32 %r2702 sv[TID:0] (0)
> 11: mad u32 %r2703 %r2700 %r2701 %r2702 (0)
> 12: mov f32 %r2713 %r2703 (0)
> 13: ld  u32 %r2714 c0[0x0] (0)
> 14: mov u32 $r0 %r2703 (0)
> 15: mov u32 $r1 %r2714 (0)
> 16: call abs BUILTIN:1 (0)
> 17: mov u32 %r2715 $r1 (0)
> 18: nop - { $r0 $r2d } (0)
> 19: nop - $p0q (0)
> 20: ld  u32 %r2716 c0[0x0] (0)
> 21: mov u32 $r0 %r2703 (0)
> 22: mov u32 $r1 %r2716 (0)
> 23: call abs BUILTIN:1 (0)
> 24: mov u32 %r2717 $r0 (0)
> 25: nop - { $r1 $r2d } (0)
> 26: nop - $p0q (0)
> 27: mov u32 %r2718 0x00000000 (0)
> 28: mov f32 %r2719 %r2718 (0)
> 29: mov u32 %r2720 0x00000000 (0)
> 30: mov f32 %r2721 %r2720 (0)
> 31: mov u32 %r2722 0x00000000 (0)
> 32: mov f32 %r2723 %r2722 (0)
> 33: mov u32 %r2724 0x00000000 (0)
> 34: mov f32 %r2725 %r2724 (0)
> 35: mov u32 %r2726 0x00000010 (0)
> 36: mul u32 %r2727 %r2703 %r2726 (0)
> 37: ld  u64 %r2728d c7[0x320] (0)
> 38: mov u32 %r2729 0x00000004 (0)
> 39: ld  u32 %r2730 c7[0x328] (0)
> 40: add u64 %r2731d %r2728d %r2727 (0)
> 41: add u32 %r2732 %r2729 %r2727 (0)
> 42: set u8 %p2733 gt u32 %r2732 %r2730 (0)
> 43: not %p2733 ld  u32 %r2734 g[%r2731d+0x0] (0)
> 44: %p2733 mov u32 %r2735 0x00000000 (0)
> 45: union u32 %r2736 %r2734 %r2735 (0)
> 46: ld  u64 %r2737d c7[0x320] (0)
> 47: mov u32 %r2738 0x00000008 (0)
> 48: ld  u32 %r2739 c7[0x328] (0)
> 49: add u64 %r2740d %r2737d %r2727 (0)
> 50: add u32 %r2741 %r2738 %r2727 (0)
> 51: set u8 %p2742 gt u32 %r2741 %r2739 (0)
> 52: not %p2742 ld  u32 %r2743 g[%r2740d+0x4] (0)
> 53: %p2742 mov u32 %r2744 0x00000000 (0)
> 54: union u32 %r2745 %r2743 %r2744 (0)
> 55: ld  u64 %r2746d c7[0x320] (0)
> 56: mov u32 %r2747 0x0000000c (0)
> 57: ld  u32 %r2748 c7[0x328] (0)
> 58: add u64 %r2749d %r2746d %r2727 (0)
> 59: add u32 %r2750 %r2747 %r2727 (0)
> 60: set u8 %p2751 gt u32 %r2750 %r2748 (0)
> 61: not %p2751 ld  u32 %r2752 g[%r2749d+0x8] (0)
> 62: %p2751 mov u32 %r2753 0x00000000 (0)
> 63: union u32 %r2754 %r2752 %r2753 (0)
> 64: ld  u64 %r2755d c7[0x320] (0)
> 65: mov u32 %r2756 0x00000010 (0)
> 66: ld  u32 %r2757 c7[0x328] (0)
> 67: add u64 %r2758d %r2755d %r2727 (0)
> 68: add u32 %r2759 %r2756 %r2727 (0)
> 69: set u8 %p2760 gt u32 %r2759 %r2757 (0)
> 70: not %p2760 ld  u32 %r2761 g[%r2758d+0xc] (0)
> 71: %p2760 mov u32 %r2762 0x00000000 (0)
> 72: union u32 %r2763 %r2761 %r2762 (0)
> 73: mov u32 %r2764 %r2736 (0)
> 74: mov u32 %r2765 %r2745 (0)
> 75: mov u32 %r2766 %r2754 (0)
> 76: mov u32 %r2767 %r2763 (0)
> 77: ld  u32 %r2768 c0[0x40] (0)
> 78: neg f32 %r2769 %r2768 (0)
> 79: add f32 %r2770 %r2764 %r2769 (0)
> 80: ld  u32 %r2771 c0[0x44] (0)
> 81: neg f32 %r2772 %r2771 (0)
> 82: add f32 %r2773 %r2765 %r2772 (0)
> 83: ld  u32 %r2774 c0[0x48] (0)
> 84: neg f32 %r2775 %r2774 (0)
> 85: add f32 %r2776 %r2766 %r2775 (0)
> 86: ld  u32 %r2777 c0[0x4c] (0)
> 87: neg f32 %r2778 %r2777 (0)
> 88: add f32 %r2779 %r2767 %r2778 (0)
> 89: mov u32 %r2780 %r2770 (0)
> 90: mov u32 %r2781 %r2773 (0)
> 91: mov u32 %r2782 %r2776 (0)
> 92: mov u32 %r2783 %r2779 (0)
> 93: mul f32 %r2784 %r2780 %r2780 (0)
> 94: mad f32 %r2785 %r2781 %r2781 %r2784 (0)
> 95: mad f32 %r2786 %r2782 %r2782 %r2785 (0)
> 96: mad f32 %r2787 %r2783 %r2783 %r2786 (0)
> 97: mov u32 %r2788 %r2787 (0)
> 98: rsq f32 %r2789 %r2788 (0)
> 99: rcp f32 %r2790 %r2789 (0)
>100: mov u32 %r2791 %r2790 (0)
>101: ld  u32 %r2792 c0[0x50] (0)
>102: mov u32 %r2793 0x3c23d70a (0)
>103: add f32 %r2794 %r2792 %r2793 (0)
>104: set u32 %r2795 ge f32 %r2794 %r2791 (0)
>105: mov u32 %r2796 %r2795 (0)
>106: joinat BB:9 (0)
>107: set u8 %p2797 neu u32 0x00000000 %r2796 (0)
>108: not %p2797 bra BB:8 (0)
>BB:2 (36 instructions) - idom = BB:0, df = { BB:9 }
> -> BB:7 (forward)
> -> BB:3 (tree)
>109: mov u32 %r2798 0x00000000 (0)
>110: mov f32 %r2799 %r2798 (0)
>111: mov u32 %r2800 0x00000000 (0)
>112: mov f32 %r2801 %r2800 (0)
>113: mov u32 %r2802 0x00000000 (0)
>114: mov f32 %r2803 %r2802 (0)
>115: mul f32 %r2804 %r2780 %r2780 (0)
>116: mad f32 %r2805 %r2781 %r2781 %r2804 (0)
>117: mad f32 %r2806 %r2782 %r2782 %r2805 (0)
>118: mad f32 %r2807 %r2783 %r2783 %r2806 (0)
>119: mov u32 %r2808 %r2807 (0)
>120: abs f32 %r2809 %r2808 (0)
>121: rsq f32 %r2810 %r2809 (0)
>122: mov u32 %r2811 %r2810 (0)
>123: mov u32 %r2812 %r2811 (0)
>124: mul f32 %r2813 %r2780 %r2812 (0)
>125: mul f32 %r2814 %r2781 %r2812 (0)
>126: mul f32 %r2815 %r2782 %r2812 (0)
>127: mov u32 %r2817 %r2813 (0)
>128: mov u32 %r2818 %r2814 (0)
>129: mov u32 %r2819 %r2815 (0)
>130: mov u32 %r2821 0x00000000 (0)
>131: mul f32 %r2822 %r2817 %r2821 (0)
>132: mov u32 %r2823 0x3f800000 (0)
>133: mad f32 %r2824 %r2818 %r2823 %r2822 (0)
>134: mov u32 %r2825 0x00000000 (0)
>135: mad f32 %r2826 %r2819 %r2825 %r2824 (0)
>136: mov u32 %r2827 %r2826 (0)
>137: mov u32 %r2828 0x00000000 (0)
>138: max f32 %r2829 %r2827 %r2828 (0)
>139: mov u32 %r2830 %r2829 (0)
>140: mov u32 %r2831 0x3f800000 (0)
>141: set u32 %r2832 neu f32 %r2830 %r2831 (0)
>142: joinat BB:7 (0)
>143: set u8 %p2833 neu u32 0x00000000 %r2832 (0)
>144: not %p2833 bra BB:7 (0)
>BB:3 (9 instructions) - idom = BB:2, df = { BB:7 }
> -> BB:5 (tree)
> -> BB:4 (tree)
>145: mul f32 %r2834 %r2817 %r2817 (0)
>146: mad f32 %r2835 %r2818 %r2818 %r2834 (0)
>147: mad f32 %r2836 %r2819 %r2819 %r2835 (0)
>148: mov u32 %r2837 %r2836 (0)
>149: mov u32 %r2838 0x00000000 (0)
>150: set u32 %r2839 eq f32 %r2837 %r2838 (0)
>151: joinat BB:6 (0)
>152: set u8 %p2840 neu u32 0x00000000 %r2839 (0)
>153: not %p2840 bra BB:5 (0)
>BB:4 (7 instructions) - idom = BB:3, df = { BB:6 }
> -> BB:6 (forward)
>154: mov u32 %r2841 0x00000000 (0)
>155: mov f32 %r2842 %r2841 (0)
>156: mov u32 %r2843 0x00000000 (0)
>157: mov f32 %r2844 %r2843 (0)
>158: mov u32 %r2845 0x00000000 (0)
>159: mov f32 %r2846 %r2845 (0)
>160: bra BB:6 (0)
>BB:5 (27 instructions) - idom = BB:3, df = { BB:6 }
> -> BB:6 (forward)
>161: mov u32 %r2861 0x00000000 (0)
>162: mul f32 %r2862 %r2861 %r2817 (0)
>163: mov u32 %r2863 0x3f800000 (0)
>164: mad f32 %r2864 %r2863 %r2818 %r2862 (0)
>165: mov u32 %r2865 0x00000000 (0)
>166: mad f32 %r2866 %r2865 %r2819 %r2864 (0)
>167: mov u32 %r2867 %r2866 (0)
>168: rcp f32 %r2868 %r2837 (0)
>169: mov u32 %r2869 %r2868 (0)
>170: mul f32 %r2870 %r2867 %r2869 (0)
>171: mov u32 %r2871 %r2870 (0)
>172: mul f32 %r2872 %r2817 %r2871 (0)
>173: mul f32 %r2873 %r2818 %r2871 (0)
>174: mul f32 %r2874 %r2819 %r2871 (0)
>175: mov u32 %r2875 %r2872 (0)
>176: mov u32 %r2876 %r2873 (0)
>177: mov u32 %r2877 %r2874 (0)
>178: mov u32 %r2878 0x00000000 (0)
>179: neg f32 %r2879 %r2875 (0)
>180: add f32 %r2880 %r2878 %r2879 (0)
>181: mov u32 %r2881 0x3f800000 (0)
>182: neg f32 %r2882 %r2876 (0)
>183: add f32 %r2883 %r2881 %r2882 (0)
>184: mov u32 %r2884 0x00000000 (0)
>185: neg f32 %r2885 %r2877 (0)
>186: add f32 %r2886 %r2884 %r2885 (0)
>187: bra BB:6 (0)
>BB:6 (16 instructions) - idom = BB:3, df = { BB:7 }
> -> BB:7 (forward)
>188: phi u32 %r2847 %r2842 %r2880 (0)
>189: phi u32 %r2848 %r2844 %r2883 (0)
>190: phi u32 %r2849 %r2846 %r2886 (0)
>191: join (0)
>192: mul f32 %r2850 %r2847 %r2847 (0)
>193: mad f32 %r2851 %r2848 %r2848 %r2850 (0)
>194: mad f32 %r2852 %r2849 %r2849 %r2851 (0)
>195: mov u32 %r2853 %r2852 (0)
>196: abs f32 %r2854 %r2853 (0)
>197: rsq f32 %r2855 %r2854 (0)
>198: mov u32 %r2856 %r2855 (0)
>199: mov u32 %r2857 %r2856 (0)
>200: mul f32 %r2858 %r2847 %r2857 (0)
>201: mul f32 %r2859 %r2848 %r2857 (0)
>202: mul f32 %r2860 %r2849 %r2857 (0)
>203: bra BB:7 (0)
>BB:7 (83 instructions) - idom = BB:2, df = { BB:9 }
> -> BB:9 (forward)
>204: phi u32 %r2887 %r2799 %r2858 (0)
>205: phi u32 %r2888 %r2801 %r2859 (0)
>206: phi u32 %r2889 %r2803 %r2860 (0)
>207: join (0)
>208: mov u32 %r2890 0x00000000 (0)
>209: mov f32 %r2891 %r2890 (0)
>210: neg f32 %r2892 %r2887 (0)
>211: mov f32 %r2893 %r2892 (0)
>212: neg f32 %r2894 %r2888 (0)
>213: mov f32 %r2895 %r2894 (0)
>214: neg f32 %r2896 %r2889 (0)
>215: mov f32 %r2897 %r2896 (0)
>216: mov u32 %r2898 0x00000000 (0)
>217: mov f32 %r2899 %r2898 (0)
>218: neg f32 %r2900 %r2887 (0)
>219: mov f32 %r2901 %r2900 (0)
>220: neg f32 %r2902 %r2888 (0)
>221: mov f32 %r2903 %r2902 (0)
>222: neg f32 %r2904 %r2889 (0)
>223: mov f32 %r2905 %r2904 (0)
>224: set f32 %r2906 gt %r2830 0.000000 (0)
>225: set f32 %r2907 lt %r2830 0.000000 (0)
>226: sub f32 %r2908 %r2906 %r2907 (0)
>227: abs f32 %r2909 %r2830 (0)
>228: mov u32 %r2910 0x3f800000 (0)
>229: neg f32 %r2911 %r2909 (0)
>230: add f32 %r2912 %r2910 %r2911 (0)
>231: mov u32 %r2913 %r2912 (0)
>232: rsq f32 %r2914 %r2913 (0)
>233: rcp f32 %r2915 %r2914 (0)
>234: mov u32 %r2916 %r2915 (0)
>235: abs f32 %r2917 %r2830 (0)
>236: abs f32 %r2918 %r2830 (0)
>237: abs f32 %r2919 %r2830 (0)
>238: mov u32 %r2920 0xbcc19a5f (0)
>239: mov u32 %r2921 0x3da68d87 (0)
>240: mad f32 %r2922 %r2919 %r2920 %r2921 (0)
>241: mov u32 %r2923 %r2922 (0)
>242: mov u32 %r2924 0xbe5bc094 (0)
>243: mad f32 %r2925 %r2918 %r2923 %r2924 (0)
>244: mov u32 %r2926 %r2925 (0)
>245: mov u32 %r2927 0x3fc90fdb (0)
>246: mad f32 %r2928 %r2917 %r2926 %r2927 (0)
>247: mov u32 %r2929 %r2928 (0)
>248: mul f32 %r2930 %r2916 %r2929 (0)
>249: mov u32 %r2931 %r2930 (0)
>250: mov u32 %r2932 0x3fc90fdb (0)
>251: neg f32 %r2933 %r2931 (0)
>252: add f32 %r2934 %r2932 %r2933 (0)
>253: mov u32 %r2935 %r2934 (0)
>254: mul f32 %r2936 %r2908 %r2935 (0)
>255: mov u32 %r2937 %r2936 (0)
>256: mov u32 %r2938 0x3fc90fdb (0)
>257: neg f32 %r2939 %r2937 (0)
>258: add f32 %r2940 %r2938 %r2939 (0)
>259: mov u32 %r2941 %r2940 (0)
>260: presin f32 %r2942 %r2941 (0)
>261: sin f32 %r2943 %r2942 (0)
>262: mov u32 %r2944 %r2943 (0)
>263: mov u32 %r2945 %r2944 (0)
>264: mov u32 %r2946 0x3e4ccccd (0)
>265: mul f32 %r2947 %r2946 %r2945 (0)
>266: mov u32 %r2948 %r2947 (0)
>267: mov u32 %r2949 0x3e4ccccd (0)
>268: mul f32 %r2950 %r2949 %r2830 (0)
>269: mov u32 %r2951 %r2950 (0)
>270: mul f32 %r2952 %r2951 %r2901 (0)
>271: mul f32 %r2953 %r2951 %r2903 (0)
>272: mul f32 %r2954 %r2951 %r2905 (0)
>273: mul f32 %r2955 %r2951 %r2899 (0)
>274: mov u32 %r2956 %r2952 (0)
>275: mov u32 %r2957 %r2953 (0)
>276: mov u32 %r2958 %r2954 (0)
>277: mov u32 %r2959 %r2955 (0)
>278: neg f32 %r2960 %r2956 (0)
>279: mad f32 %r2961 %r2948 %r2893 %r2960 (0)
>280: neg f32 %r2962 %r2957 (0)
>281: mad f32 %r2963 %r2948 %r2895 %r2962 (0)
>282: neg f32 %r2964 %r2958 (0)
>283: mad f32 %r2965 %r2948 %r2897 %r2964 (0)
>284: neg f32 %r2966 %r2959 (0)
>285: mad f32 %r2967 %r2948 %r2891 %r2966 (0)
>286: bra BB:9 (0)
>BB:8 (13 instructions) - idom = BB:0, df = { BB:9 }
> -> BB:9 (forward)
>287: mov u32 %r6408 0x00000000 (0)
>288: add f32 %r6409 %r2719 %r6408 (0)
>289: mov u32 %r6410 0xbe4ccccd (0)
>290: add f32 %r6411 %r2721 %r6410 (0)
>291: mov u32 %r6412 0x00000000 (0)
>292: add f32 %r6413 %r2723 %r6412 (0)
>293: mov u32 %r6414 0x00000000 (0)
>294: add f32 %r6415 %r2725 %r6414 (0)
>295: mov u32 %r6416 %r6409 (0)
>296: mov u32 %r6417 %r6411 (0)
>297: mov u32 %r6418 %r6413 (0)
>298: mov u32 %r6419 %r6415 (0)
>299: bra BB:9 (0)
>BB:9 (164 instructions) - idom = BB:0, df = { }
> -> BB:10 (tree)
>300: phi u32 %r2968 %r2961 %r6416 (0)
>301: phi u32 %r2969 %r2963 %r6417 (0)
>302: phi u32 %r2970 %r2965 %r6418 (0)
>303: phi u32 %r2971 %r2967 %r6419 (0)
>304: join (0)
>305: mov u32 %r2972 0x00000010 (0)
>306: mul u32 %r2973 %r2703 %r2972 (0)
>307: mov u32 %r2974 0x00000010 (0)
>308: mul u32 %r2975 %r2703 %r2974 (0)
>309: ld  u64 %r2976d c7[0x320] (0)
>310: mov u32 %r2977 0x00000004 (0)
>311: ld  u32 %r2978 c7[0x328] (0)
>312: add u64 %r2979d %r2976d %r2975 (0)
>313: add u32 %r2980 %r2977 %r2975 (0)
>314: set u8 %p2981 gt u32 %r2980 %r2978 (0)
>315: not %p2981 ld  u32 %r2982 g[%r2979d+0x0] (0)
>316: %p2981 mov u32 %r2983 0x00000000 (0)
>317: union u32 %r2984 %r2982 %r2983 (0)
>318: ld  u64 %r2985d c7[0x320] (0)
>319: mov u32 %r2986 0x00000008 (0)
>320: ld  u32 %r2987 c7[0x328] (0)
>321: add u64 %r2988d %r2985d %r2975 (0)
>322: add u32 %r2989 %r2986 %r2975 (0)
>323: set u8 %p2990 gt u32 %r2989 %r2987 (0)
>324: not %p2990 ld  u32 %r2991 g[%r2988d+0x4] (0)
>325: %p2990 mov u32 %r2992 0x00000000 (0)
>326: union u32 %r2993 %r2991 %r2992 (0)
>327: ld  u64 %r2994d c7[0x320] (0)
>328: mov u32 %r2995 0x0000000c (0)
>329: ld  u32 %r2996 c7[0x328] (0)
>330: add u64 %r2997d %r2994d %r2975 (0)
>331: add u32 %r2998 %r2995 %r2975 (0)
>332: set u8 %p2999 gt u32 %r2998 %r2996 (0)
>333: not %p2999 ld  u32 %r3000 g[%r2997d+0x8] (0)
>334: %p2999 mov u32 %r3001 0x00000000 (0)
>335: union u32 %r3002 %r3000 %r3001 (0)
>336: ld  u64 %r3003d c7[0x320] (0)
>337: mov u32 %r3004 0x00000010 (0)
>338: ld  u32 %r3005 c7[0x328] (0)
>339: add u64 %r3006d %r3003d %r2975 (0)
>340: add u32 %r3007 %r3004 %r2975 (0)
>341: set u8 %p3008 gt u32 %r3007 %r3005 (0)
>342: not %p3008 ld  u32 %r3009 g[%r3006d+0xc] (0)
>343: %p3008 mov u32 %r3010 0x00000000 (0)
>344: union u32 %r3011 %r3009 %r3010 (0)
>345: mov u32 %r3012 %r2984 (0)
>346: mov u32 %r3013 %r2993 (0)
>347: mov u32 %r3014 %r3002 (0)
>348: mov u32 %r3015 %r3011 (0)
>349: mov u32 %r3020 0x00000010 (0)
>350: mul u32 %r3021 %r2703 %r3020 (0)
>351: mov u32 %r3022 %r3021 (0)
>352: ld  u64 %r3023d c7[0x300] (0)
>353: mov u32 %r3024 0x00000004 (0)
>354: ld  u32 %r3025 c7[0x308] (0)
>355: add u64 %r3026d %r3023d %r3022 (0)
>356: add u32 %r3027 %r3024 %r3022 (0)
>357: set u8 %p3028 gt u32 %r3027 %r3025 (0)
>358: not %p3028 ld  u32 %r3029 g[%r3026d+0x0] (0)
>359: %p3028 mov u32 %r3030 0x00000000 (0)
>360: union u32 %r3031 %r3029 %r3030 (0)
>361: ld  u64 %r3032d c7[0x300] (0)
>362: mov u32 %r3033 0x00000008 (0)
>363: ld  u32 %r3034 c7[0x308] (0)
>364: add u64 %r3035d %r3032d %r3022 (0)
>365: add u32 %r3036 %r3033 %r3022 (0)
>366: set u8 %p3037 gt u32 %r3036 %r3034 (0)
>367: not %p3037 ld  u32 %r3038 g[%r3035d+0x4] (0)
>368: %p3037 mov u32 %r3039 0x00000000 (0)
>369: union u32 %r3040 %r3038 %r3039 (0)
>370: ld  u64 %r3041d c7[0x300] (0)
>371: mov u32 %r3042 0x0000000c (0)
>372: ld  u32 %r3043 c7[0x308] (0)
>373: add u64 %r3044d %r3041d %r3022 (0)
>374: add u32 %r3045 %r3042 %r3022 (0)
>375: set u8 %p3046 gt u32 %r3045 %r3043 (0)
>376: not %p3046 ld  u32 %r3047 g[%r3044d+0x8] (0)
>377: %p3046 mov u32 %r3048 0x00000000 (0)
>378: union u32 %r3049 %r3047 %r3048 (0)
>379: ld  u64 %r3050d c7[0x300] (0)
>380: mov u32 %r3051 0x00000010 (0)
>381: ld  u32 %r3052 c7[0x308] (0)
>382: add u64 %r3053d %r3050d %r3022 (0)
>383: add u32 %r3054 %r3051 %r3022 (0)
>384: set u8 %p3055 gt u32 %r3054 %r3052 (0)
>385: not %p3055 ld  u32 %r3056 g[%r3053d+0xc] (0)
>386: %p3055 mov u32 %r3057 0x00000000 (0)
>387: union u32 %r3058 %r3056 %r3057 (0)
>388: mov u32 %r3059 %r3031 (0)
>389: mov u32 %r3060 %r3040 (0)
>390: mov u32 %r3061 %r3049 (0)
>391: mov u32 %r3062 %r3058 (0)
>392: mov u32 %r3063 0x41200000 (0)
>393: mul f32 %r3064 %r2968 %r3063 (0)
>394: mov u32 %r3065 0x41200000 (0)
>395: mul f32 %r3066 %r2969 %r3065 (0)
>396: mov u32 %r3067 0x41200000 (0)
>397: mul f32 %r3068 %r2970 %r3067 (0)
>398: mov u32 %r3069 0x41200000 (0)
>399: mul f32 %r3070 %r2971 %r3069 (0)
>400: mov u32 %r3071 %r3064 (0)
>401: mov u32 %r3072 %r3066 (0)
>402: mov u32 %r3073 %r3068 (0)
>403: mov u32 %r3074 %r3070 (0)
>404: ld  u32 %r3075 c0[0x10] (0)
>405: ld  u32 %r3076 c0[0x10] (0)
>406: mul f32 %r3077 %r3075 %r3076 (0)
>407: mov u32 %r3078 0x40000000 (0)
>408: neg f32 %r3079 %r3059 (0)
>409: mad f32 %r3080 %r3078 %r3012 %r3079 (0)
>410: mov u32 %r3081 0x40000000 (0)
>411: neg f32 %r3082 %r3060 (0)
>412: mad f32 %r3083 %r3081 %r3013 %r3082 (0)
>413: mov u32 %r3084 0x40000000 (0)
>414: neg f32 %r3085 %r3061 (0)
>415: mad f32 %r3086 %r3084 %r3014 %r3085 (0)
>416: mov u32 %r3087 0x40000000 (0)
>417: neg f32 %r3088 %r3062 (0)
>418: mad f32 %r3089 %r3087 %r3015 %r3088 (0)
>419: mov u32 %r3090 %r3080 (0)
>420: mov u32 %r3091 %r3083 (0)
>421: mov u32 %r3092 %r3086 (0)
>422: mov u32 %r3093 %r3089 (0)
>423: mad f32 %r3094 %r3071 %r3077 %r3090 (0)
>424: mad f32 %r3095 %r3072 %r3077 %r3091 (0)
>425: mad f32 %r3096 %r3073 %r3077 %r3092 (0)
>426: mad f32 %r3097 %r3074 %r3077 %r3093 (0)
>427: mov u32 %r3098 %r3094 (0)
>428: mov u32 %r3099 %r3095 (0)
>429: mov u32 %r3100 %r3096 (0)
>430: mov u32 %r3101 %r3097 (0)
>431: ld  u64 %r3102d c7[0x330] (0)
>432: mov u32 %r3103 0x00000004 (0)
>433: ld  u32 %r3104 c7[0x338] (0)
>434: add u64 %r3105d %r3102d %r2973 (0)
>435: add u32 %r3106 %r3103 %r2973 (0)
>436: set u8 %p3107 gt u32 %r3106 %r3104 (0)
>437: not %p3107 st  u32 # g[%r3105d+0x0] %r3098 (0)
>438: ld  u64 %r3108d c7[0x330] (0)
>439: mov u32 %r3109 0x00000008 (0)
>440: ld  u32 %r3110 c7[0x338] (0)
>441: add u64 %r3111d %r3108d %r2973 (0)
>442: add u32 %r3112 %r3109 %r2973 (0)
>443: set u8 %p3113 gt u32 %r3112 %r3110 (0)
>444: not %p3113 st  u32 # g[%r3111d+0x4] %r3099 (0)
>445: ld  u64 %r3114d c7[0x330] (0)
>446: mov u32 %r3115 0x0000000c (0)
>447: ld  u32 %r3116 c7[0x338] (0)
>448: add u64 %r3117d %r3114d %r2973 (0)
>449: add u32 %r3118 %r3115 %r2973 (0)
>450: set u8 %p3119 gt u32 %r3118 %r3116 (0)
>451: not %p3119 st  u32 # g[%r3117d+0x8] %r3100 (0)
>452: ld  u64 %r3120d c7[0x330] (0)
>453: mov u32 %r3121 0x00000010 (0)
>454: ld  u32 %r3122 c7[0x338] (0)
>455: add u64 %r3123d %r3120d %r2973 (0)
>456: add u32 %r3124 %r3121 %r2973 (0)
>457: set u8 %p3125 gt u32 %r3124 %r3122 (0)
>458: not %p3125 st  u32 # g[%r3123d+0xc] %r3101 (0)
>459: membar (SUBOP:7) - # (0)
>460: bar u32 # 0x00000000 0x00000000 (0)
>461: mov u32 %r3126 0x00000000 (0)
>462: mov f32 %r3127 %r3126 (0)
>463: prebreak BB:11 (0)
>BB:10 (14 instructions) - idom = BB:9, df = { BB:10 }
> -> BB:13 (forward)
> -> BB:12 (tree)
>464: phi u32 %r3136 %r4134 %r3127 (0)
>465: phi u32 %r3137 %r4004 %r3128 (0)
>466: phi u32 %r3138 %r4005 %r3129 (0)
>467: phi u32 %r3139 %r4006 %r3130 (0)
>468: phi u32 %r3140 %r4007 %r3131 (0)
>469: phi u32 %r3141 %r4008 %r3132 (0)
>470: phi u32 %r3142 %r4009 %r3133 (0)
>471: phi u32 %r3143 %r4010 %r3134 (0)
>472: phi u32 %r3144 %r4011 %r3135 (0)
>473: precont BB:10 (0)
>474: mov u32 %r3145 0x00000004 (0)
>475: set s32 %r3146 ge %r3136 %r3145 (0)
>476: set u8 %p3147 neu u32 0x00000000 %r3146 (0)
>477: not %p3147 bra BB:13 (0)
>BB:12 (1 instructions) - idom = BB:10, df = { }
> -> BB:11 (cross)
>478: break BB:11 (0)
>BB:13 (3 instructions) - idom = BB:10, df = { BB:10 }
> -> BB:14 (tree)
>479: mov u32 %r4001 0x00000000 (0)
>480: mov f32 %r4002 %r4001 (0)
>481: prebreak BB:15 (0)
>BB:14 (14 instructions) - idom = BB:13, df = { BB:10 BB:14 }
> -> BB:17 (forward)
> -> BB:16 (tree)
>482: phi u32 %r4003 %r5881 %r4002 (0)
>483: phi u32 %r4004 %r5871 %r3137 (0)
>484: phi u32 %r4005 %r5872 %r3138 (0)
>485: phi u32 %r4006 %r5873 %r3139 (0)
>486: phi u32 %r4007 %r5874 %r3140 (0)
>487: phi u32 %r4008 %r5875 %r3141 (0)
>488: phi u32 %r4009 %r5876 %r3142 (0)
>489: phi u32 %r4010 %r5877 %r3143 (0)
>490: phi u32 %r4011 %r5878 %r3144 (0)
>491: precont BB:14 (0)
>492: mov u32 %r4012 0x00000002 (0)
>493: set s32 %r4013 ge %r4003 %r4012 (0)
>494: set u8 %p4014 neu u32 0x00000000 %r4013 (0)
>495: not %p4014 bra BB:17 (0)
>BB:16 (1 instructions) - idom = BB:14, df = { BB:10 }
> -> BB:15 (cross)
>496: break BB:15 (0)
>BB:17 (20 instructions) - idom = BB:14, df = { BB:14 }
> -> BB:25 (tree)
> -> BB:18 (tree)
>497: mov u32 %r4661 0x00000002 (0)
>498: mov u32 $r0 %r2717 (0)
>499: mov u32 $r1 %r4661 (0)
>500: call abs BUILTIN:1 (0)
>501: mov u32 %r4662 $r1 (0)
>502: nop - { $r0 $r2d } (0)
>503: nop - $p0q (0)
>504: set u32 %r4663 eq %r4662 %r4003 (0)
>505: mov u32 %r4664 0x00000002 (0)
>506: mov u32 $r0 %r2715 (0)
>507: mov u32 $r1 %r4664 (0)
>508: call abs BUILTIN:1 (0)
>509: mov u32 %r4665 $r1 (0)
>510: nop - { $r0 $r2d } (0)
>511: nop - $p0q (0)
>512: set u32 %r4666 eq %r4665 %r4003 (0)
>513: and u32 %r4667 %r4663 %r4666 (0)
>514: joinat BB:35 (0)
>515: set u8 %p4668 neu u32 0x00000000 %r4667 (0)
>516: not %p4668 bra BB:25 (0)
>BB:18 (51 instructions) - idom = BB:17, df = { BB:35 }
> -> BB:20 (forward)
> -> BB:19 (tree)
>517: mov u32 %r4669 0x00000010 (0)
>518: mul u32 %r4670 %r2713 %r4669 (0)
>519: ld  u64 %r4671d c7[0x330] (0)
>520: mov u32 %r4672 0x00000004 (0)
>521: ld  u32 %r4673 c7[0x338] (0)
>522: add u64 %r4674d %r4671d %r4670 (0)
>523: add u32 %r4675 %r4672 %r4670 (0)
>524: set u8 %p4676 gt u32 %r4675 %r4673 (0)
>525: not %p4676 ld  u32 %r4677 g[%r4674d+0x0] (0)
>526: %p4676 mov u32 %r4678 0x00000000 (0)
>527: union u32 %r4679 %r4677 %r4678 (0)
>528: ld  u64 %r4680d c7[0x330] (0)
>529: mov u32 %r4681 0x00000008 (0)
>530: ld  u32 %r4682 c7[0x338] (0)
>531: add u64 %r4683d %r4680d %r4670 (0)
>532: add u32 %r4684 %r4681 %r4670 (0)
>533: set u8 %p4685 gt u32 %r4684 %r4682 (0)
>534: not %p4685 ld  u32 %r4686 g[%r4683d+0x4] (0)
>535: %p4685 mov u32 %r4687 0x00000000 (0)
>536: union u32 %r4688 %r4686 %r4687 (0)
>537: ld  u64 %r4689d c7[0x330] (0)
>538: mov u32 %r4690 0x0000000c (0)
>539: ld  u32 %r4691 c7[0x338] (0)
>540: add u64 %r4692d %r4689d %r4670 (0)
>541: add u32 %r4693 %r4690 %r4670 (0)
>542: set u8 %p4694 gt u32 %r4693 %r4691 (0)
>543: not %p4694 ld  u32 %r4695 g[%r4692d+0x8] (0)
>544: %p4694 mov u32 %r4696 0x00000000 (0)
>545: union u32 %r4697 %r4695 %r4696 (0)
>546: ld  u64 %r4698d c7[0x330] (0)
>547: mov u32 %r4699 0x00000010 (0)
>548: ld  u32 %r4700 c7[0x338] (0)
>549: add u64 %r4701d %r4698d %r4670 (0)
>550: add u32 %r4702 %r4699 %r4670 (0)
>551: set u8 %p4703 gt u32 %r4702 %r4700 (0)
>552: not %p4703 ld  u32 %r4704 g[%r4701d+0xc] (0)
>553: %p4703 mov u32 %r4705 0x00000000 (0)
>554: union u32 %r4706 %r4704 %r4705 (0)
>555: mov u32 %r4715 0x00000001 (0)
>556: add u32 %r4716 %r2713 %r4715 (0)
>557: ld  u32 %r4717 c0[0x0] (0)
>558: mov u32 $r0 %r4716 (0)
>559: mov u32 $r1 %r4717 (0)
>560: call abs BUILTIN:1 (0)
>561: mov u32 %r4718 $r1 (0)
>562: nop - { $r0 $r2d } (0)
>563: nop - $p0q (0)
>564: set s32 %r4719 lt %r2715 %r4718 (0)
>565: joinat BB:20 (0)
>566: set u8 %p4720 neu u32 0x00000000 %r4719 (0)
>567: not %p4720 bra BB:20 (0)
>BB:19 (218 instructions) - idom = BB:18, df = { BB:20 }
> -> BB:20 (forward)
>568: mov u32 %r4721 0x00000010 (0)
>569: mul u32 %r4722 %r4716 %r4721 (0)
>570: ld  u64 %r4723d c7[0x330] (0)
>571: mov u32 %r4724 0x00000004 (0)
>572: ld  u32 %r4725 c7[0x338] (0)
>573: add u64 %r4726d %r4723d %r4722 (0)
>574: add u32 %r4727 %r4724 %r4722 (0)
>575: set u8 %p4728 gt u32 %r4727 %r4725 (0)
>576: not %p4728 ld  u32 %r4729 g[%r4726d+0x0] (0)
>577: %p4728 mov u32 %r4730 0x00000000 (0)
>578: union u32 %r4731 %r4729 %r4730 (0)
>579: ld  u64 %r4732d c7[0x330] (0)
>580: mov u32 %r4733 0x00000008 (0)
>581: ld  u32 %r4734 c7[0x338] (0)
>582: add u64 %r4735d %r4732d %r4722 (0)
>583: add u32 %r4736 %r4733 %r4722 (0)
>584: set u8 %p4737 gt u32 %r4736 %r4734 (0)
>585: not %p4737 ld  u32 %r4738 g[%r4735d+0x4] (0)
>586: %p4737 mov u32 %r4739 0x00000000 (0)
>587: union u32 %r4740 %r4738 %r4739 (0)
>588: ld  u64 %r4741d c7[0x330] (0)
>589: mov u32 %r4742 0x0000000c (0)
>590: ld  u32 %r4743 c7[0x338] (0)
>591: add u64 %r4744d %r4741d %r4722 (0)
>592: add u32 %r4745 %r4742 %r4722 (0)
>593: set u8 %p4746 gt u32 %r4745 %r4743 (0)
>594: not %p4746 ld  u32 %r4747 g[%r4744d+0x8] (0)
>595: %p4746 mov u32 %r4748 0x00000000 (0)
>596: union u32 %r4749 %r4747 %r4748 (0)
>597: ld  u64 %r4750d c7[0x330] (0)
>598: mov u32 %r4751 0x00000010 (0)
>599: ld  u32 %r4752 c7[0x338] (0)
>600: add u64 %r4753d %r4750d %r4722 (0)
>601: add u32 %r4754 %r4751 %r4722 (0)
>602: set u8 %p4755 gt u32 %r4754 %r4752 (0)
>603: not %p4755 ld  u32 %r4756 g[%r4753d+0xc] (0)
>604: %p4755 mov u32 %r4757 0x00000000 (0)
>605: union u32 %r4758 %r4756 %r4757 (0)
>606: mov f32 %r4759 %r4731 (0)
>607: mov f32 %r4760 %r4740 (0)
>608: mov f32 %r4761 %r4749 (0)
>609: mov f32 %r4762 %r4758 (0)
>610: neg f32 %r4763 %r4731 (0)
>611: add f32 %r4764 %r4679 %r4763 (0)
>612: neg f32 %r4765 %r4740 (0)
>613: add f32 %r4766 %r4688 %r4765 (0)
>614: neg f32 %r4767 %r4749 (0)
>615: add f32 %r4768 %r4697 %r4767 (0)
>616: neg f32 %r4769 %r4758 (0)
>617: add f32 %r4770 %r4706 %r4769 (0)
>618: mul f32 %r4771 %r4764 %r4764 (0)
>619: mad f32 %r4772 %r4766 %r4766 %r4771 (0)
>620: mad f32 %r4773 %r4768 %r4768 %r4772 (0)
>621: mad f32 %r4774 %r4770 %r4770 %r4773 (0)
>622: mov u32 %r4775 %r4774 (0)
>623: rsq f32 %r4776 %r4775 (0)
>624: rcp f32 %r4777 %r4776 (0)
>625: ld  u32 %r4778 c0[0x20] (0)
>626: neg f32 %r4779 %r4777 (0)
>627: add f32 %r4780 %r4778 %r4779 (0)
>628: mov u32 %r4781 0x3eb33333 (0)
>629: mul f32 %r4782 %r4781 %r4780 (0)
>630: rcp f32 %r4783 %r4777 (0)
>631: mul f32 %r4784 %r4782 %r4783 (0)
>632: mul f32 %r4785 %r4784 %r4764 (0)
>633: mul f32 %r4786 %r4784 %r4766 (0)
>634: mul f32 %r4787 %r4784 %r4768 (0)
>635: mul f32 %r4788 %r4784 %r4770 (0)
>636: mov u32 %r4789 0x00000010 (0)
>637: mul u32 %r4790 %r2713 %r4789 (0)
>638: mov u32 %r4791 0x00000010 (0)
>639: mul u32 %r4792 %r2713 %r4791 (0)
>640: ld  u64 %r4793d c7[0x330] (0)
>641: mov u32 %r4794 0x00000004 (0)
>642: ld  u32 %r4795 c7[0x338] (0)
>643: add u64 %r4796d %r4793d %r4792 (0)
>644: add u32 %r4797 %r4794 %r4792 (0)
>645: set u8 %p4798 gt u32 %r4797 %r4795 (0)
>646: not %p4798 ld  u32 %r4799 g[%r4796d+0x0] (0)
>647: %p4798 mov u32 %r4800 0x00000000 (0)
>648: union u32 %r4801 %r4799 %r4800 (0)
>649: ld  u64 %r4802d c7[0x330] (0)
>650: mov u32 %r4803 0x00000008 (0)
>651: ld  u32 %r4804 c7[0x338] (0)
>652: add u64 %r4805d %r4802d %r4792 (0)
>653: add u32 %r4806 %r4803 %r4792 (0)
>654: set u8 %p4807 gt u32 %r4806 %r4804 (0)
>655: not %p4807 ld  u32 %r4808 g[%r4805d+0x4] (0)
>656: %p4807 mov u32 %r4809 0x00000000 (0)
>657: union u32 %r4810 %r4808 %r4809 (0)
>658: ld  u64 %r4811d c7[0x330] (0)
>659: mov u32 %r4812 0x0000000c (0)
>660: ld  u32 %r4813 c7[0x338] (0)
>661: add u64 %r4814d %r4811d %r4792 (0)
>662: add u32 %r4815 %r4812 %r4792 (0)
>663: set u8 %p4816 gt u32 %r4815 %r4813 (0)
>664: not %p4816 ld  u32 %r4817 g[%r4814d+0x8] (0)
>665: %p4816 mov u32 %r4818 0x00000000 (0)
>666: union u32 %r4819 %r4817 %r4818 (0)
>667: ld  u64 %r4820d c7[0x330] (0)
>668: mov u32 %r4821 0x00000010 (0)
>669: ld  u32 %r4822 c7[0x338] (0)
>670: add u64 %r4823d %r4820d %r4792 (0)
>671: add u32 %r4824 %r4821 %r4792 (0)
>672: set u8 %p4825 gt u32 %r4824 %r4822 (0)
>673: not %p4825 ld  u32 %r4826 g[%r4823d+0xc] (0)
>674: %p4825 mov u32 %r4827 0x00000000 (0)
>675: union u32 %r4828 %r4826 %r4827 (0)
>676: add f32 %r4829 %r4801 %r4785 (0)
>677: add f32 %r4830 %r4810 %r4786 (0)
>678: add f32 %r4831 %r4819 %r4787 (0)
>679: add f32 %r4832 %r4828 %r4788 (0)
>680: ld  u64 %r4833d c7[0x330] (0)
>681: mov u32 %r4834 0x00000004 (0)
>682: ld  u32 %r4835 c7[0x338] (0)
>683: add u64 %r4836d %r4833d %r4790 (0)
>684: add u32 %r4837 %r4834 %r4790 (0)
>685: set u8 %p4838 gt u32 %r4837 %r4835 (0)
>686: not %p4838 st  u32 # g[%r4836d+0x0] %r4829 (0)
>687: ld  u64 %r4839d c7[0x330] (0)
>688: mov u32 %r4840 0x00000008 (0)
>689: ld  u32 %r4841 c7[0x338] (0)
>690: add u64 %r4842d %r4839d %r4790 (0)
>691: add u32 %r4843 %r4840 %r4790 (0)
>692: set u8 %p4844 gt u32 %r4843 %r4841 (0)
>693: not %p4844 st  u32 # g[%r4842d+0x4] %r4830 (0)
>694: ld  u64 %r4845d c7[0x330] (0)
>695: mov u32 %r4846 0x0000000c (0)
>696: ld  u32 %r4847 c7[0x338] (0)
>697: add u64 %r4848d %r4845d %r4790 (0)
>698: add u32 %r4849 %r4846 %r4790 (0)
>699: set u8 %p4850 gt u32 %r4849 %r4847 (0)
>700: not %p4850 st  u32 # g[%r4848d+0x8] %r4831 (0)
>701: ld  u64 %r4851d c7[0x330] (0)
>702: mov u32 %r4852 0x00000010 (0)
>703: ld  u32 %r4853 c7[0x338] (0)
>704: add u64 %r4854d %r4851d %r4790 (0)
>705: add u32 %r4855 %r4852 %r4790 (0)
>706: set u8 %p4856 gt u32 %r4855 %r4853 (0)
>707: not %p4856 st  u32 # g[%r4854d+0xc] %r4832 (0)
>708: mov u32 %r4857 0x00000010 (0)
>709: mul u32 %r4858 %r4716 %r4857 (0)
>710: mov u32 %r4859 0x00000010 (0)
>711: mul u32 %r4860 %r4716 %r4859 (0)
>712: ld  u64 %r4861d c7[0x330] (0)
>713: mov u32 %r4862 0x00000004 (0)
>714: ld  u32 %r4863 c7[0x338] (0)
>715: add u64 %r4864d %r4861d %r4860 (0)
>716: add u32 %r4865 %r4862 %r4860 (0)
>717: set u8 %p4866 gt u32 %r4865 %r4863 (0)
>718: not %p4866 ld  u32 %r4867 g[%r4864d+0x0] (0)
>719: %p4866 mov u32 %r4868 0x00000000 (0)
>720: union u32 %r4869 %r4867 %r4868 (0)
>721: ld  u64 %r4870d c7[0x330] (0)
>722: mov u32 %r4871 0x00000008 (0)
>723: ld  u32 %r4872 c7[0x338] (0)
>724: add u64 %r4873d %r4870d %r4860 (0)
>725: add u32 %r4874 %r4871 %r4860 (0)
>726: set u8 %p4875 gt u32 %r4874 %r4872 (0)
>727: not %p4875 ld  u32 %r4876 g[%r4873d+0x4] (0)
>728: %p4875 mov u32 %r4877 0x00000000 (0)
>729: union u32 %r4878 %r4876 %r4877 (0)
>730: ld  u64 %r4879d c7[0x330] (0)
>731: mov u32 %r4880 0x0000000c (0)
>732: ld  u32 %r4881 c7[0x338] (0)
>733: add u64 %r4882d %r4879d %r4860 (0)
>734: add u32 %r4883 %r4880 %r4860 (0)
>735: set u8 %p4884 gt u32 %r4883 %r4881 (0)
>736: not %p4884 ld  u32 %r4885 g[%r4882d+0x8] (0)
>737: %p4884 mov u32 %r4886 0x00000000 (0)
>738: union u32 %r4887 %r4885 %r4886 (0)
>739: ld  u64 %r4888d c7[0x330] (0)
>740: mov u32 %r4889 0x00000010 (0)
>741: ld  u32 %r4890 c7[0x338] (0)
>742: add u64 %r4891d %r4888d %r4860 (0)
>743: add u32 %r4892 %r4889 %r4860 (0)
>744: set u8 %p4893 gt u32 %r4892 %r4890 (0)
>745: not %p4893 ld  u32 %r4894 g[%r4891d+0xc] (0)
>746: %p4893 mov u32 %r4895 0x00000000 (0)
>747: union u32 %r4896 %r4894 %r4895 (0)
>748: neg f32 %r4897 %r4785 (0)
>749: add f32 %r4898 %r4869 %r4897 (0)
>750: neg f32 %r4899 %r4786 (0)
>751: add f32 %r4900 %r4878 %r4899 (0)
>752: neg f32 %r4901 %r4787 (0)
>753: add f32 %r4902 %r4887 %r4901 (0)
>754: neg f32 %r4903 %r4788 (0)
>755: add f32 %r4904 %r4896 %r4903 (0)
>756: ld  u64 %r4905d c7[0x330] (0)
>757: mov u32 %r4906 0x00000004 (0)
>758: ld  u32 %r4907 c7[0x338] (0)
>759: add u64 %r4908d %r4905d %r4858 (0)
>760: add u32 %r4909 %r4906 %r4858 (0)
>761: set u8 %p4910 gt u32 %r4909 %r4907 (0)
>762: not %p4910 st  u32 # g[%r4908d+0x0] %r4898 (0)
>763: ld  u64 %r4911d c7[0x330] (0)
>764: mov u32 %r4912 0x00000008 (0)
>765: ld  u32 %r4913 c7[0x338] (0)
>766: add u64 %r4914d %r4911d %r4858 (0)
>767: add u32 %r4915 %r4912 %r4858 (0)
>768: set u8 %p4916 gt u32 %r4915 %r4913 (0)
>769: not %p4916 st  u32 # g[%r4914d+0x4] %r4900 (0)
>770: ld  u64 %r4917d c7[0x330] (0)
>771: mov u32 %r4918 0x0000000c (0)
>772: ld  u32 %r4919 c7[0x338] (0)
>773: add u64 %r4920d %r4917d %r4858 (0)
>774: add u32 %r4921 %r4918 %r4858 (0)
>775: set u8 %p4922 gt u32 %r4921 %r4919 (0)
>776: not %p4922 st  u32 # g[%r4920d+0x8] %r4902 (0)
>777: ld  u64 %r4923d c7[0x330] (0)
>778: mov u32 %r4924 0x00000010 (0)
>779: ld  u32 %r4925 c7[0x338] (0)
>780: add u64 %r4926d %r4923d %r4858 (0)
>781: add u32 %r4927 %r4924 %r4858 (0)
>782: set u8 %p4928 gt u32 %r4927 %r4925 (0)
>783: not %p4928 st  u32 # g[%r4926d+0xc] %r4904 (0)
>784: membar (SUBOP:7) - # (0)
>785: bra BB:20 (0)
>BB:20 (14 instructions) - idom = BB:18, df = { BB:35 }
> -> BB:22 (forward)
> -> BB:21 (tree)
>786: phi u32 %r4929 %r4004 %r4759 (0)
>787: phi u32 %r4930 %r4005 %r4760 (0)
>788: phi u32 %r4931 %r4006 %r4761 (0)
>789: phi u32 %r4932 %r4007 %r4762 (0)
>790: join (0)
>791: ld  u32 %r4933 c0[0x0] (0)
>792: add u32 %r4934 %r2713 %r4933 (0)
>793: ld  u32 %r4935 c0[0x0] (0)
>794: ld  u32 %r4936 c0[0x0] (0)
>795: mul u32 %r4937 %r4935 %r4936 (0)
>796: set s32 %r4938 lt %r4934 %r4937 (0)
>797: joinat BB:22 (0)
>798: set u8 %p4939 neu u32 0x00000000 %r4938 (0)
>799: not %p4939 bra BB:22 (0)
>BB:21 (218 instructions) - idom = BB:20, df = { BB:22 }
> -> BB:22 (forward)
>800: mov u32 %r4940 0x00000010 (0)
>801: mul u32 %r4941 %r4934 %r4940 (0)
>802: ld  u64 %r4942d c7[0x330] (0)
>803: mov u32 %r4943 0x00000004 (0)
>804: ld  u32 %r4944 c7[0x338] (0)
>805: add u64 %r4945d %r4942d %r4941 (0)
>806: add u32 %r4946 %r4943 %r4941 (0)
>807: set u8 %p4947 gt u32 %r4946 %r4944 (0)
>808: not %p4947 ld  u32 %r4948 g[%r4945d+0x0] (0)
>809: %p4947 mov u32 %r4949 0x00000000 (0)
>810: union u32 %r4950 %r4948 %r4949 (0)
>811: ld  u64 %r4951d c7[0x330] (0)
>812: mov u32 %r4952 0x00000008 (0)
>813: ld  u32 %r4953 c7[0x338] (0)
>814: add u64 %r4954d %r4951d %r4941 (0)
>815: add u32 %r4955 %r4952 %r4941 (0)
>816: set u8 %p4956 gt u32 %r4955 %r4953 (0)
>817: not %p4956 ld  u32 %r4957 g[%r4954d+0x4] (0)
>818: %p4956 mov u32 %r4958 0x00000000 (0)
>819: union u32 %r4959 %r4957 %r4958 (0)
>820: ld  u64 %r4960d c7[0x330] (0)
>821: mov u32 %r4961 0x0000000c (0)
>822: ld  u32 %r4962 c7[0x338] (0)
>823: add u64 %r4963d %r4960d %r4941 (0)
>824: add u32 %r4964 %r4961 %r4941 (0)
>825: set u8 %p4965 gt u32 %r4964 %r4962 (0)
>826: not %p4965 ld  u32 %r4966 g[%r4963d+0x8] (0)
>827: %p4965 mov u32 %r4967 0x00000000 (0)
>828: union u32 %r4968 %r4966 %r4967 (0)
>829: ld  u64 %r4969d c7[0x330] (0)
>830: mov u32 %r4970 0x00000010 (0)
>831: ld  u32 %r4971 c7[0x338] (0)
>832: add u64 %r4972d %r4969d %r4941 (0)
>833: add u32 %r4973 %r4970 %r4941 (0)
>834: set u8 %p4974 gt u32 %r4973 %r4971 (0)
>835: not %p4974 ld  u32 %r4975 g[%r4972d+0xc] (0)
>836: %p4974 mov u32 %r4976 0x00000000 (0)
>837: union u32 %r4977 %r4975 %r4976 (0)
>838: mov f32 %r4978 %r4950 (0)
>839: mov f32 %r4979 %r4959 (0)
>840: mov f32 %r4980 %r4968 (0)
>841: mov f32 %r4981 %r4977 (0)
>842: neg f32 %r4982 %r4950 (0)
>843: add f32 %r4983 %r4679 %r4982 (0)
>844: neg f32 %r4984 %r4959 (0)
>845: add f32 %r4985 %r4688 %r4984 (0)
>846: neg f32 %r4986 %r4968 (0)
>847: add f32 %r4987 %r4697 %r4986 (0)
>848: neg f32 %r4988 %r4977 (0)
>849: add f32 %r4989 %r4706 %r4988 (0)
>850: mul f32 %r4990 %r4983 %r4983 (0)
>851: mad f32 %r4991 %r4985 %r4985 %r4990 (0)
>852: mad f32 %r4992 %r4987 %r4987 %r4991 (0)
>853: mad f32 %r4993 %r4989 %r4989 %r4992 (0)
>854: mov u32 %r4994 %r4993 (0)
>855: rsq f32 %r4995 %r4994 (0)
>856: rcp f32 %r4996 %r4995 (0)
>857: ld  u32 %r4997 c0[0x20] (0)
>858: neg f32 %r4998 %r4996 (0)
>859: add f32 %r4999 %r4997 %r4998 (0)
>860: mov u32 %r5000 0x3eb33333 (0)
>861: mul f32 %r5001 %r5000 %r4999 (0)
>862: rcp f32 %r5002 %r4996 (0)
>863: mul f32 %r5003 %r5001 %r5002 (0)
>864: mul f32 %r5004 %r5003 %r4983 (0)
>865: mul f32 %r5005 %r5003 %r4985 (0)
>866: mul f32 %r5006 %r5003 %r4987 (0)
>867: mul f32 %r5007 %r5003 %r4989 (0)
>868: mov u32 %r5008 0x00000010 (0)
>869: mul u32 %r5009 %r2713 %r5008 (0)
>870: mov u32 %r5010 0x00000010 (0)
>871: mul u32 %r5011 %r2713 %r5010 (0)
>872: ld  u64 %r5012d c7[0x330] (0)
>873: mov u32 %r5013 0x00000004 (0)
>874: ld  u32 %r5014 c7[0x338] (0)
>875: add u64 %r5015d %r5012d %r5011 (0)
>876: add u32 %r5016 %r5013 %r5011 (0)
>877: set u8 %p5017 gt u32 %r5016 %r5014 (0)
>878: not %p5017 ld  u32 %r5018 g[%r5015d+0x0] (0)
>879: %p5017 mov u32 %r5019 0x00000000 (0)
>880: union u32 %r5020 %r5018 %r5019 (0)
>881: ld  u64 %r5021d c7[0x330] (0)
>882: mov u32 %r5022 0x00000008 (0)
>883: ld  u32 %r5023 c7[0x338] (0)
>884: add u64 %r5024d %r5021d %r5011 (0)
>885: add u32 %r5025 %r5022 %r5011 (0)
>886: set u8 %p5026 gt u32 %r5025 %r5023 (0)
>887: not %p5026 ld  u32 %r5027 g[%r5024d+0x4] (0)
>888: %p5026 mov u32 %r5028 0x00000000 (0)
>889: union u32 %r5029 %r5027 %r5028 (0)
>890: ld  u64 %r5030d c7[0x330] (0)
>891: mov u32 %r5031 0x0000000c (0)
>892: ld  u32 %r5032 c7[0x338] (0)
>893: add u64 %r5033d %r5030d %r5011 (0)
>894: add u32 %r5034 %r5031 %r5011 (0)
>895: set u8 %p5035 gt u32 %r5034 %r5032 (0)
>896: not %p5035 ld  u32 %r5036 g[%r5033d+0x8] (0)
>897: %p5035 mov u32 %r5037 0x00000000 (0)
>898: union u32 %r5038 %r5036 %r5037 (0)
>899: ld  u64 %r5039d c7[0x330] (0)
>900: mov u32 %r5040 0x00000010 (0)
>901: ld  u32 %r5041 c7[0x338] (0)
>902: add u64 %r5042d %r5039d %r5011 (0)
>903: add u32 %r5043 %r5040 %r5011 (0)
>904: set u8 %p5044 gt u32 %r5043 %r5041 (0)
>905: not %p5044 ld  u32 %r5045 g[%r5042d+0xc] (0)
>906: %p5044 mov u32 %r5046 0x00000000 (0)
>907: union u32 %r5047 %r5045 %r5046 (0)
>908: add f32 %r5048 %r5020 %r5004 (0)
>909: add f32 %r5049 %r5029 %r5005 (0)
>910: add f32 %r5050 %r5038 %r5006 (0)
>911: add f32 %r5051 %r5047 %r5007 (0)
>912: ld  u64 %r5052d c7[0x330] (0)
>913: mov u32 %r5053 0x00000004 (0)
>914: ld  u32 %r5054 c7[0x338] (0)
>915: add u64 %r5055d %r5052d %r5009 (0)
>916: add u32 %r5056 %r5053 %r5009 (0)
>917: set u8 %p5057 gt u32 %r5056 %r5054 (0)
>918: not %p5057 st  u32 # g[%r5055d+0x0] %r5048 (0)
>919: ld  u64 %r5058d c7[0x330] (0)
>920: mov u32 %r5059 0x00000008 (0)
>921: ld  u32 %r5060 c7[0x338] (0)
>922: add u64 %r5061d %r5058d %r5009 (0)
>923: add u32 %r5062 %r5059 %r5009 (0)
>924: set u8 %p5063 gt u32 %r5062 %r5060 (0)
>925: not %p5063 st  u32 # g[%r5061d+0x4] %r5049 (0)
>926: ld  u64 %r5064d c7[0x330] (0)
>927: mov u32 %r5065 0x0000000c (0)
>928: ld  u32 %r5066 c7[0x338] (0)
>929: add u64 %r5067d %r5064d %r5009 (0)
>930: add u32 %r5068 %r5065 %r5009 (0)
>931: set u8 %p5069 gt u32 %r5068 %r5066 (0)
>932: not %p5069 st  u32 # g[%r5067d+0x8] %r5050 (0)
>933: ld  u64 %r5070d c7[0x330] (0)
>934: mov u32 %r5071 0x00000010 (0)
>935: ld  u32 %r5072 c7[0x338] (0)
>936: add u64 %r5073d %r5070d %r5009 (0)
>937: add u32 %r5074 %r5071 %r5009 (0)
>938: set u8 %p5075 gt u32 %r5074 %r5072 (0)
>939: not %p5075 st  u32 # g[%r5073d+0xc] %r5051 (0)
>940: mov u32 %r5076 0x00000010 (0)
>941: mul u32 %r5077 %r4934 %r5076 (0)
>942: mov u32 %r5078 0x00000010 (0)
>943: mul u32 %r5079 %r4934 %r5078 (0)
>944: ld  u64 %r5080d c7[0x330] (0)
>945: mov u32 %r5081 0x00000004 (0)
>946: ld  u32 %r5082 c7[0x338] (0)
>947: add u64 %r5083d %r5080d %r5079 (0)
>948: add u32 %r5084 %r5081 %r5079 (0)
>949: set u8 %p5085 gt u32 %r5084 %r5082 (0)
>950: not %p5085 ld  u32 %r5086 g[%r5083d+0x0] (0)
>951: %p5085 mov u32 %r5087 0x00000000 (0)
>952: union u32 %r5088 %r5086 %r5087 (0)
>953: ld  u64 %r5089d c7[0x330] (0)
>954: mov u32 %r5090 0x00000008 (0)
>955: ld  u32 %r5091 c7[0x338] (0)
>956: add u64 %r5092d %r5089d %r5079 (0)
>957: add u32 %r5093 %r5090 %r5079 (0)
>958: set u8 %p5094 gt u32 %r5093 %r5091 (0)
>959: not %p5094 ld  u32 %r5095 g[%r5092d+0x4] (0)
>960: %p5094 mov u32 %r5096 0x00000000 (0)
>961: union u32 %r5097 %r5095 %r5096 (0)
>962: ld  u64 %r5098d c7[0x330] (0)
>963: mov u32 %r5099 0x0000000c (0)
>964: ld  u32 %r5100 c7[0x338] (0)
>965: add u64 %r5101d %r5098d %r5079 (0)
>966: add u32 %r5102 %r5099 %r5079 (0)
>967: set u8 %p5103 gt u32 %r5102 %r5100 (0)
>968: not %p5103 ld  u32 %r5104 g[%r5101d+0x8] (0)
>969: %p5103 mov u32 %r5105 0x00000000 (0)
>970: union u32 %r5106 %r5104 %r5105 (0)
>971: ld  u64 %r5107d c7[0x330] (0)
>972: mov u32 %r5108 0x00000010 (0)
>973: ld  u32 %r5109 c7[0x338] (0)
>974: add u64 %r5110d %r5107d %r5079 (0)
>975: add u32 %r5111 %r5108 %r5079 (0)
>976: set u8 %p5112 gt u32 %r5111 %r5109 (0)
>977: not %p5112 ld  u32 %r5113 g[%r5110d+0xc] (0)
>978: %p5112 mov u32 %r5114 0x00000000 (0)
>979: union u32 %r5115 %r5113 %r5114 (0)
>980: neg f32 %r5116 %r5004 (0)
>981: add f32 %r5117 %r5088 %r5116 (0)
>982: neg f32 %r5118 %r5005 (0)
>983: add f32 %r5119 %r5097 %r5118 (0)
>984: neg f32 %r5120 %r5006 (0)
>985: add f32 %r5121 %r5106 %r5120 (0)
>986: neg f32 %r5122 %r5007 (0)
>987: add f32 %r5123 %r5115 %r5122 (0)
>988: ld  u64 %r5124d c7[0x330] (0)
>989: mov u32 %r5125 0x00000004 (0)
>990: ld  u32 %r5126 c7[0x338] (0)
>991: add u64 %r5127d %r5124d %r5077 (0)
>992: add u32 %r5128 %r5125 %r5077 (0)
>993: set u8 %p5129 gt u32 %r5128 %r5126 (0)
>994: not %p5129 st  u32 # g[%r5127d+0x0] %r5117 (0)
>995: ld  u64 %r5130d c7[0x330] (0)
>996: mov u32 %r5131 0x00000008 (0)
>997: ld  u32 %r5132 c7[0x338] (0)
>998: add u64 %r5133d %r5130d %r5077 (0)
>999: add u32 %r5134 %r5131 %r5077 (0)
>1000: set u8 %p5135 gt u32 %r5134 %r5132 (0)
>1001: not %p5135 st  u32 # g[%r5133d+0x4] %r5119 (0)
>1002: ld  u64 %r5136d c7[0x330] (0)
>1003: mov u32 %r5137 0x0000000c (0)
>1004: ld  u32 %r5138 c7[0x338] (0)
>1005: add u64 %r5139d %r5136d %r5077 (0)
>1006: add u32 %r5140 %r5137 %r5077 (0)
>1007: set u8 %p5141 gt u32 %r5140 %r5138 (0)
>1008: not %p5141 st  u32 # g[%r5139d+0x8] %r5121 (0)
>1009: ld  u64 %r5142d c7[0x330] (0)
>1010: mov u32 %r5143 0x00000010 (0)
>1011: ld  u32 %r5144 c7[0x338] (0)
>1012: add u64 %r5145d %r5142d %r5077 (0)
>1013: add u32 %r5146 %r5143 %r5077 (0)
>1014: set u8 %p5147 gt u32 %r5146 %r5144 (0)
>1015: not %p5147 st  u32 # g[%r5145d+0xc] %r5123 (0)
>1016: membar (SUBOP:7) - # (0)
>1017: bra BB:22 (0)
>BB:22 (25 instructions) - idom = BB:20, df = { BB:35 }
> -> BB:24 (forward)
> -> BB:23 (tree)
>1018: phi u32 %r5148 %r4008 %r4978 (0)
>1019: phi u32 %r5149 %r4009 %r4979 (0)
>1020: phi u32 %r5150 %r4010 %r4980 (0)
>1021: phi u32 %r5151 %r4011 %r4981 (0)
>1022: join (0)
>1023: mov u32 %r5152 0x00000001 (0)
>1024: add u32 %r5153 %r2713 %r5152 (0)
>1025: ld  u32 %r5154 c0[0x0] (0)
>1026: add u32 %r5155 %r5153 %r5154 (0)
>1027: ld  u32 %r5156 c0[0x0] (0)
>1028: ld  u32 %r5157 c0[0x0] (0)
>1029: mul u32 %r5158 %r5156 %r5157 (0)
>1030: set s32 %r5159 lt %r5155 %r5158 (0)
>1031: ld  u32 %r5160 c0[0x0] (0)
>1032: mov u32 $r0 %r5155 (0)
>1033: mov u32 $r1 %r5160 (0)
>1034: call abs BUILTIN:1 (0)
>1035: mov u32 %r5161 $r1 (0)
>1036: nop - { $r0 $r2d } (0)
>1037: nop - $p0q (0)
>1038: set s32 %r5162 lt %r2715 %r5161 (0)
>1039: and u32 %r5163 %r5159 %r5162 (0)
>1040: joinat BB:24 (0)
>1041: set u8 %p5164 neu u32 0x00000000 %r5163 (0)
>1042: not %p5164 bra BB:24 (0)
>BB:23 (738 instructions) - idom = BB:22, df = { BB:24 }
> -> BB:24 (forward)
>1043: mov u32 %r5165 0x00000010 (0)
>1044: mul u32 %r5166 %r5155 %r5165 (0)
>1045: ld  u64 %r5167d c7[0x330] (0)
>1046: mov u32 %r5168 0x00000004 (0)
>1047: ld  u32 %r5169 c7[0x338] (0)
>1048: add u64 %r5170d %r5167d %r5166 (0)
>1049: add u32 %r5171 %r5168 %r5166 (0)
>1050: set u8 %p5172 gt u32 %r5171 %r5169 (0)
>1051: not %p5172 ld  u32 %r5173 g[%r5170d+0x0] (0)
>1052: %p5172 mov u32 %r5174 0x00000000 (0)
>1053: union u32 %r5175 %r5173 %r5174 (0)
>1054: ld  u64 %r5176d c7[0x330] (0)
>1055: mov u32 %r5177 0x00000008 (0)
>1056: ld  u32 %r5178 c7[0x338] (0)
>1057: add u64 %r5179d %r5176d %r5166 (0)
>1058: add u32 %r5180 %r5177 %r5166 (0)
>1059: set u8 %p5181 gt u32 %r5180 %r5178 (0)
>1060: not %p5181 ld  u32 %r5182 g[%r5179d+0x4] (0)
>1061: %p5181 mov u32 %r5183 0x00000000 (0)
>1062: union u32 %r5184 %r5182 %r5183 (0)
>1063: ld  u64 %r5185d c7[0x330] (0)
>1064: mov u32 %r5186 0x0000000c (0)
>1065: ld  u32 %r5187 c7[0x338] (0)
>1066: add u64 %r5188d %r5185d %r5166 (0)
>1067: add u32 %r5189 %r5186 %r5166 (0)
>1068: set u8 %p5190 gt u32 %r5189 %r5187 (0)
>1069: not %p5190 ld  u32 %r5191 g[%r5188d+0x8] (0)
>1070: %p5190 mov u32 %r5192 0x00000000 (0)
>1071: union u32 %r5193 %r5191 %r5192 (0)
>1072: ld  u64 %r5194d c7[0x330] (0)
>1073: mov u32 %r5195 0x00000010 (0)
>1074: ld  u32 %r5196 c7[0x338] (0)
>1075: add u64 %r5197d %r5194d %r5166 (0)
>1076: add u32 %r5198 %r5195 %r5166 (0)
>1077: set u8 %p5199 gt u32 %r5198 %r5196 (0)
>1078: not %p5199 ld  u32 %r5200 g[%r5197d+0xc] (0)
>1079: %p5199 mov u32 %r5201 0x00000000 (0)
>1080: union u32 %r5202 %r5200 %r5201 (0)
>1081: neg f32 %r5207 %r5175 (0)
>1082: add f32 %r5208 %r4929 %r5207 (0)
>1083: neg f32 %r5209 %r5184 (0)
>1084: add f32 %r5210 %r4930 %r5209 (0)
>1085: neg f32 %r5211 %r5193 (0)
>1086: add f32 %r5212 %r4931 %r5211 (0)
>1087: neg f32 %r5213 %r5202 (0)
>1088: add f32 %r5214 %r4932 %r5213 (0)
>1089: mul f32 %r5215 %r5208 %r5208 (0)
>1090: mad f32 %r5216 %r5210 %r5210 %r5215 (0)
>1091: mad f32 %r5217 %r5212 %r5212 %r5216 (0)
>1092: mad f32 %r5218 %r5214 %r5214 %r5217 (0)
>1093: mov u32 %r5219 %r5218 (0)
>1094: rsq f32 %r5220 %r5219 (0)
>1095: rcp f32 %r5221 %r5220 (0)
>1096: ld  u32 %r5222 c0[0x20] (0)
>1097: neg f32 %r5223 %r5221 (0)
>1098: add f32 %r5224 %r5222 %r5223 (0)
>1099: mov u32 %r5225 0x3eb33333 (0)
>1100: mul f32 %r5226 %r5225 %r5224 (0)
>1101: rcp f32 %r5227 %r5221 (0)
>1102: mul f32 %r5228 %r5226 %r5227 (0)
>1103: mul f32 %r5229 %r5228 %r5208 (0)
>1104: mul f32 %r5230 %r5228 %r5210 (0)
>1105: mul f32 %r5231 %r5228 %r5212 (0)
>1106: mul f32 %r5232 %r5228 %r5214 (0)
>1107: mov u32 %r5233 0x00000010 (0)
>1108: mul u32 %r5234 %r4716 %r5233 (0)
>1109: mov u32 %r5235 0x00000010 (0)
>1110: mul u32 %r5236 %r4716 %r5235 (0)
>1111: ld  u64 %r5237d c7[0x330] (0)
>1112: mov u32 %r5238 0x00000004 (0)
>1113: ld  u32 %r5239 c7[0x338] (0)
>1114: add u64 %r5240d %r5237d %r5236 (0)
>1115: add u32 %r5241 %r5238 %r5236 (0)
>1116: set u8 %p5242 gt u32 %r5241 %r5239 (0)
>1117: not %p5242 ld  u32 %r5243 g[%r5240d+0x0] (0)
>1118: %p5242 mov u32 %r5244 0x00000000 (0)
>1119: union u32 %r5245 %r5243 %r5244 (0)
>1120: ld  u64 %r5246d c7[0x330] (0)
>1121: mov u32 %r5247 0x00000008 (0)
>1122: ld  u32 %r5248 c7[0x338] (0)
>1123: add u64 %r5249d %r5246d %r5236 (0)
>1124: add u32 %r5250 %r5247 %r5236 (0)
>1125: set u8 %p5251 gt u32 %r5250 %r5248 (0)
>1126: not %p5251 ld  u32 %r5252 g[%r5249d+0x4] (0)
>1127: %p5251 mov u32 %r5253 0x00000000 (0)
>1128: union u32 %r5254 %r5252 %r5253 (0)
>1129: ld  u64 %r5255d c7[0x330] (0)
>1130: mov u32 %r5256 0x0000000c (0)
>1131: ld  u32 %r5257 c7[0x338] (0)
>1132: add u64 %r5258d %r5255d %r5236 (0)
>1133: add u32 %r5259 %r5256 %r5236 (0)
>1134: set u8 %p5260 gt u32 %r5259 %r5257 (0)
>1135: not %p5260 ld  u32 %r5261 g[%r5258d+0x8] (0)
>1136: %p5260 mov u32 %r5262 0x00000000 (0)
>1137: union u32 %r5263 %r5261 %r5262 (0)
>1138: ld  u64 %r5264d c7[0x330] (0)
>1139: mov u32 %r5265 0x00000010 (0)
>1140: ld  u32 %r5266 c7[0x338] (0)
>1141: add u64 %r5267d %r5264d %r5236 (0)
>1142: add u32 %r5268 %r5265 %r5236 (0)
>1143: set u8 %p5269 gt u32 %r5268 %r5266 (0)
>1144: not %p5269 ld  u32 %r5270 g[%r5267d+0xc] (0)
>1145: %p5269 mov u32 %r5271 0x00000000 (0)
>1146: union u32 %r5272 %r5270 %r5271 (0)
>1147: add f32 %r5273 %r5245 %r5229 (0)
>1148: add f32 %r5274 %r5254 %r5230 (0)
>1149: add f32 %r5275 %r5263 %r5231 (0)
>1150: add f32 %r5276 %r5272 %r5232 (0)
>1151: ld  u64 %r5277d c7[0x330] (0)
>1152: mov u32 %r5278 0x00000004 (0)
>1153: ld  u32 %r5279 c7[0x338] (0)
>1154: add u64 %r5280d %r5277d %r5234 (0)
>1155: add u32 %r5281 %r5278 %r5234 (0)
>1156: set u8 %p5282 gt u32 %r5281 %r5279 (0)
>1157: not %p5282 st  u32 # g[%r5280d+0x0] %r5273 (0)
>1158: ld  u64 %r5283d c7[0x330] (0)
>1159: mov u32 %r5284 0x00000008 (0)
>1160: ld  u32 %r5285 c7[0x338] (0)
>1161: add u64 %r5286d %r5283d %r5234 (0)
>1162: add u32 %r5287 %r5284 %r5234 (0)
>1163: set u8 %p5288 gt u32 %r5287 %r5285 (0)
>1164: not %p5288 st  u32 # g[%r5286d+0x4] %r5274 (0)
>1165: ld  u64 %r5289d c7[0x330] (0)
>1166: mov u32 %r5290 0x0000000c (0)
>1167: ld  u32 %r5291 c7[0x338] (0)
>1168: add u64 %r5292d %r5289d %r5234 (0)
>1169: add u32 %r5293 %r5290 %r5234 (0)
>1170: set u8 %p5294 gt u32 %r5293 %r5291 (0)
>1171: not %p5294 st  u32 # g[%r5292d+0x8] %r5275 (0)
>1172: ld  u64 %r5295d c7[0x330] (0)
>1173: mov u32 %r5296 0x00000010 (0)
>1174: ld  u32 %r5297 c7[0x338] (0)
>1175: add u64 %r5298d %r5295d %r5234 (0)
>1176: add u32 %r5299 %r5296 %r5234 (0)
>1177: set u8 %p5300 gt u32 %r5299 %r5297 (0)
>1178: not %p5300 st  u32 # g[%r5298d+0xc] %r5276 (0)
>1179: mov u32 %r5301 0x00000010 (0)
>1180: mul u32 %r5302 %r5155 %r5301 (0)
>1181: mov u32 %r5303 0x00000010 (0)
>1182: mul u32 %r5304 %r5155 %r5303 (0)
>1183: ld  u64 %r5305d c7[0x330] (0)
>1184: mov u32 %r5306 0x00000004 (0)
>1185: ld  u32 %r5307 c7[0x338] (0)
>1186: add u64 %r5308d %r5305d %r5304 (0)
>1187: add u32 %r5309 %r5306 %r5304 (0)
>1188: set u8 %p5310 gt u32 %r5309 %r5307 (0)
>1189: not %p5310 ld  u32 %r5311 g[%r5308d+0x0] (0)
>1190: %p5310 mov u32 %r5312 0x00000000 (0)
>1191: union u32 %r5313 %r5311 %r5312 (0)
>1192: ld  u64 %r5314d c7[0x330] (0)
>1193: mov u32 %r5315 0x00000008 (0)
>1194: ld  u32 %r5316 c7[0x338] (0)
>1195: add u64 %r5317d %r5314d %r5304 (0)
>1196: add u32 %r5318 %r5315 %r5304 (0)
>1197: set u8 %p5319 gt u32 %r5318 %r5316 (0)
>1198: not %p5319 ld  u32 %r5320 g[%r5317d+0x4] (0)
>1199: %p5319 mov u32 %r5321 0x00000000 (0)
>1200: union u32 %r5322 %r5320 %r5321 (0)
>1201: ld  u64 %r5323d c7[0x330] (0)
>1202: mov u32 %r5324 0x0000000c (0)
>1203: ld  u32 %r5325 c7[0x338] (0)
>1204: add u64 %r5326d %r5323d %r5304 (0)
>1205: add u32 %r5327 %r5324 %r5304 (0)
>1206: set u8 %p5328 gt u32 %r5327 %r5325 (0)
>1207: not %p5328 ld  u32 %r5329 g[%r5326d+0x8] (0)
>1208: %p5328 mov u32 %r5330 0x00000000 (0)
>1209: union u32 %r5331 %r5329 %r5330 (0)
>1210: ld  u64 %r5332d c7[0x330] (0)
>1211: mov u32 %r5333 0x00000010 (0)
>1212: ld  u32 %r5334 c7[0x338] (0)
>1213: add u64 %r5335d %r5332d %r5304 (0)
>1214: add u32 %r5336 %r5333 %r5304 (0)
>1215: set u8 %p5337 gt u32 %r5336 %r5334 (0)
>1216: not %p5337 ld  u32 %r5338 g[%r5335d+0xc] (0)
>1217: %p5337 mov u32 %r5339 0x00000000 (0)
>1218: union u32 %r5340 %r5338 %r5339 (0)
>1219: neg f32 %r5341 %r5229 (0)
>1220: add f32 %r5342 %r5313 %r5341 (0)
>1221: neg f32 %r5343 %r5230 (0)
>1222: add f32 %r5344 %r5322 %r5343 (0)
>1223: neg f32 %r5345 %r5231 (0)
>1224: add f32 %r5346 %r5331 %r5345 (0)
>1225: neg f32 %r5347 %r5232 (0)
>1226: add f32 %r5348 %r5340 %r5347 (0)
>1227: ld  u64 %r5349d c7[0x330] (0)
>1228: mov u32 %r5350 0x00000004 (0)
>1229: ld  u32 %r5351 c7[0x338] (0)
>1230: add u64 %r5352d %r5349d %r5302 (0)
>1231: add u32 %r5353 %r5350 %r5302 (0)
>1232: set u8 %p5354 gt u32 %r5353 %r5351 (0)
>1233: not %p5354 st  u32 # g[%r5352d+0x0] %r5342 (0)
>1234: ld  u64 %r5355d c7[0x330] (0)
>1235: mov u32 %r5356 0x00000008 (0)
>1236: ld  u32 %r5357 c7[0x338] (0)
>1237: add u64 %r5358d %r5355d %r5302 (0)
>1238: add u32 %r5359 %r5356 %r5302 (0)
>1239: set u8 %p5360 gt u32 %r5359 %r5357 (0)
>1240: not %p5360 st  u32 # g[%r5358d+0x4] %r5344 (0)
>1241: ld  u64 %r5361d c7[0x330] (0)
>1242: mov u32 %r5362 0x0000000c (0)
>1243: ld  u32 %r5363 c7[0x338] (0)
>1244: add u64 %r5364d %r5361d %r5302 (0)
>1245: add u32 %r5365 %r5362 %r5302 (0)
>1246: set u8 %p5366 gt u32 %r5365 %r5363 (0)
>1247: not %p5366 st  u32 # g[%r5364d+0x8] %r5346 (0)
>1248: ld  u64 %r5367d c7[0x330] (0)
>1249: mov u32 %r5368 0x00000010 (0)
>1250: ld  u32 %r5369 c7[0x338] (0)
>1251: add u64 %r5370d %r5367d %r5302 (0)
>1252: add u32 %r5371 %r5368 %r5302 (0)
>1253: set u8 %p5372 gt u32 %r5371 %r5369 (0)
>1254: not %p5372 st  u32 # g[%r5370d+0xc] %r5348 (0)
>1255: membar (SUBOP:7) - # (0)
>1256: neg f32 %r5373 %r5175 (0)
>1257: add f32 %r5374 %r5148 %r5373 (0)
>1258: neg f32 %r5375 %r5184 (0)
>1259: add f32 %r5376 %r5149 %r5375 (0)
>1260: neg f32 %r5377 %r5193 (0)
>1261: add f32 %r5378 %r5150 %r5377 (0)
>1262: neg f32 %r5379 %r5202 (0)
>1263: add f32 %r5380 %r5151 %r5379 (0)
>1264: mul f32 %r5381 %r5374 %r5374 (0)
>1265: mad f32 %r5382 %r5376 %r5376 %r5381 (0)
>1266: mad f32 %r5383 %r5378 %r5378 %r5382 (0)
>1267: mad f32 %r5384 %r5380 %r5380 %r5383 (0)
>1268: mov u32 %r5385 %r5384 (0)
>1269: rsq f32 %r5386 %r5385 (0)
>1270: rcp f32 %r5387 %r5386 (0)
>1271: ld  u32 %r5388 c0[0x20] (0)
>1272: neg f32 %r5389 %r5387 (0)
>1273: add f32 %r5390 %r5388 %r5389 (0)
>1274: mov u32 %r5391 0x3eb33333 (0)
>1275: mul f32 %r5392 %r5391 %r5390 (0)
>1276: rcp f32 %r5393 %r5387 (0)
>1277: mul f32 %r5394 %r5392 %r5393 (0)
>1278: mul f32 %r5395 %r5394 %r5374 (0)
>1279: mul f32 %r5396 %r5394 %r5376 (0)
>1280: mul f32 %r5397 %r5394 %r5378 (0)
>1281: mul f32 %r5398 %r5394 %r5380 (0)
>1282: mov u32 %r5399 0x00000010 (0)
>1283: mul u32 %r5400 %r4934 %r5399 (0)
>1284: mov u32 %r5401 0x00000010 (0)
>1285: mul u32 %r5402 %r4934 %r5401 (0)
>1286: ld  u64 %r5403d c7[0x330] (0)
>1287: mov u32 %r5404 0x00000004 (0)
>1288: ld  u32 %r5405 c7[0x338] (0)
>1289: add u64 %r5406d %r5403d %r5402 (0)
>1290: add u32 %r5407 %r5404 %r5402 (0)
>1291: set u8 %p5408 gt u32 %r5407 %r5405 (0)
>1292: not %p5408 ld  u32 %r5409 g[%r5406d+0x0] (0)
>1293: %p5408 mov u32 %r5410 0x00000000 (0)
>1294: union u32 %r5411 %r5409 %r5410 (0)
>1295: ld  u64 %r5412d c7[0x330] (0)
>1296: mov u32 %r5413 0x00000008 (0)
>1297: ld  u32 %r5414 c7[0x338] (0)
>1298: add u64 %r5415d %r5412d %r5402 (0)
>1299: add u32 %r5416 %r5413 %r5402 (0)
>1300: set u8 %p5417 gt u32 %r5416 %r5414 (0)
>1301: not %p5417 ld  u32 %r5418 g[%r5415d+0x4] (0)
>1302: %p5417 mov u32 %r5419 0x00000000 (0)
>1303: union u32 %r5420 %r5418 %r5419 (0)
>1304: ld  u64 %r5421d c7[0x330] (0)
>1305: mov u32 %r5422 0x0000000c (0)
>1306: ld  u32 %r5423 c7[0x338] (0)
>1307: add u64 %r5424d %r5421d %r5402 (0)
>1308: add u32 %r5425 %r5422 %r5402 (0)
>1309: set u8 %p5426 gt u32 %r5425 %r5423 (0)
>1310: not %p5426 ld  u32 %r5427 g[%r5424d+0x8] (0)
>1311: %p5426 mov u32 %r5428 0x00000000 (0)
>1312: union u32 %r5429 %r5427 %r5428 (0)
>1313: ld  u64 %r5430d c7[0x330] (0)
>1314: mov u32 %r5431 0x00000010 (0)
>1315: ld  u32 %r5432 c7[0x338] (0)
>1316: add u64 %r5433d %r5430d %r5402 (0)
>1317: add u32 %r5434 %r5431 %r5402 (0)
>1318: set u8 %p5435 gt u32 %r5434 %r5432 (0)
>1319: not %p5435 ld  u32 %r5436 g[%r5433d+0xc] (0)
>1320: %p5435 mov u32 %r5437 0x00000000 (0)
>1321: union u32 %r5438 %r5436 %r5437 (0)
>1322: add f32 %r5439 %r5411 %r5395 (0)
>1323: add f32 %r5440 %r5420 %r5396 (0)
>1324: add f32 %r5441 %r5429 %r5397 (0)
>1325: add f32 %r5442 %r5438 %r5398 (0)
>1326: ld  u64 %r5443d c7[0x330] (0)
>1327: mov u32 %r5444 0x00000004 (0)
>1328: ld  u32 %r5445 c7[0x338] (0)
>1329: add u64 %r5446d %r5443d %r5400 (0)
>1330: add u32 %r5447 %r5444 %r5400 (0)
>1331: set u8 %p5448 gt u32 %r5447 %r5445 (0)
>1332: not %p5448 st  u32 # g[%r5446d+0x0] %r5439 (0)
>1333: ld  u64 %r5449d c7[0x330] (0)
>1334: mov u32 %r5450 0x00000008 (0)
>1335: ld  u32 %r5451 c7[0x338] (0)
>1336: add u64 %r5452d %r5449d %r5400 (0)
>1337: add u32 %r5453 %r5450 %r5400 (0)
>1338: set u8 %p5454 gt u32 %r5453 %r5451 (0)
>1339: not %p5454 st  u32 # g[%r5452d+0x4] %r5440 (0)
>1340: ld  u64 %r5455d c7[0x330] (0)
>1341: mov u32 %r5456 0x0000000c (0)
>1342: ld  u32 %r5457 c7[0x338] (0)
>1343: add u64 %r5458d %r5455d %r5400 (0)
>1344: add u32 %r5459 %r5456 %r5400 (0)
>1345: set u8 %p5460 gt u32 %r5459 %r5457 (0)
>1346: not %p5460 st  u32 # g[%r5458d+0x8] %r5441 (0)
>1347: ld  u64 %r5461d c7[0x330] (0)
>1348: mov u32 %r5462 0x00000010 (0)
>1349: ld  u32 %r5463 c7[0x338] (0)
>1350: add u64 %r5464d %r5461d %r5400 (0)
>1351: add u32 %r5465 %r5462 %r5400 (0)
>1352: set u8 %p5466 gt u32 %r5465 %r5463 (0)
>1353: not %p5466 st  u32 # g[%r5464d+0xc] %r5442 (0)
>1354: mov u32 %r5467 0x00000010 (0)
>1355: mul u32 %r5468 %r5155 %r5467 (0)
>1356: mov u32 %r5469 0x00000010 (0)
>1357: mul u32 %r5470 %r5155 %r5469 (0)
>1358: ld  u64 %r5471d c7[0x330] (0)
>1359: mov u32 %r5472 0x00000004 (0)
>1360: ld  u32 %r5473 c7[0x338] (0)
>1361: add u64 %r5474d %r5471d %r5470 (0)
>1362: add u32 %r5475 %r5472 %r5470 (0)
>1363: set u8 %p5476 gt u32 %r5475 %r5473 (0)
>1364: not %p5476 ld  u32 %r5477 g[%r5474d+0x0] (0)
>1365: %p5476 mov u32 %r5478 0x00000000 (0)
>1366: union u32 %r5479 %r5477 %r5478 (0)
>1367: ld  u64 %r5480d c7[0x330] (0)
>1368: mov u32 %r5481 0x00000008 (0)
>1369: ld  u32 %r5482 c7[0x338] (0)
>1370: add u64 %r5483d %r5480d %r5470 (0)
>1371: add u32 %r5484 %r5481 %r5470 (0)
>1372: set u8 %p5485 gt u32 %r5484 %r5482 (0)
>1373: not %p5485 ld  u32 %r5486 g[%r5483d+0x4] (0)
>1374: %p5485 mov u32 %r5487 0x00000000 (0)
>1375: union u32 %r5488 %r5486 %r5487 (0)
>1376: ld  u64 %r5489d c7[0x330] (0)
>1377: mov u32 %r5490 0x0000000c (0)
>1378: ld  u32 %r5491 c7[0x338] (0)
>1379: add u64 %r5492d %r5489d %r5470 (0)
>1380: add u32 %r5493 %r5490 %r5470 (0)
>1381: set u8 %p5494 gt u32 %r5493 %r5491 (0)
>1382: not %p5494 ld  u32 %r5495 g[%r5492d+0x8] (0)
>1383: %p5494 mov u32 %r5496 0x00000000 (0)
>1384: union u32 %r5497 %r5495 %r5496 (0)
>1385: ld  u64 %r5498d c7[0x330] (0)
>1386: mov u32 %r5499 0x00000010 (0)
>1387: ld  u32 %r5500 c7[0x338] (0)
>1388: add u64 %r5501d %r5498d %r5470 (0)
>1389: add u32 %r5502 %r5499 %r5470 (0)
>1390: set u8 %p5503 gt u32 %r5502 %r5500 (0)
>1391: not %p5503 ld  u32 %r5504 g[%r5501d+0xc] (0)
>1392: %p5503 mov u32 %r5505 0x00000000 (0)
>1393: union u32 %r5506 %r5504 %r5505 (0)
>1394: neg f32 %r5507 %r5395 (0)
>1395: add f32 %r5508 %r5479 %r5507 (0)
>1396: neg f32 %r5509 %r5396 (0)
>1397: add f32 %r5510 %r5488 %r5509 (0)
>1398: neg f32 %r5511 %r5397 (0)
>1399: add f32 %r5512 %r5497 %r5511 (0)
>1400: neg f32 %r5513 %r5398 (0)
>1401: add f32 %r5514 %r5506 %r5513 (0)
>1402: ld  u64 %r5515d c7[0x330] (0)
>1403: mov u32 %r5516 0x00000004 (0)
>1404: ld  u32 %r5517 c7[0x338] (0)
>1405: add u64 %r5518d %r5515d %r5468 (0)
>1406: add u32 %r5519 %r5516 %r5468 (0)
>1407: set u8 %p5520 gt u32 %r5519 %r5517 (0)
>1408: not %p5520 st  u32 # g[%r5518d+0x0] %r5508 (0)
>1409: ld  u64 %r5521d c7[0x330] (0)
>1410: mov u32 %r5522 0x00000008 (0)
>1411: ld  u32 %r5523 c7[0x338] (0)
>1412: add u64 %r5524d %r5521d %r5468 (0)
>1413: add u32 %r5525 %r5522 %r5468 (0)
>1414: set u8 %p5526 gt u32 %r5525 %r5523 (0)
>1415: not %p5526 st  u32 # g[%r5524d+0x4] %r5510 (0)
>1416: ld  u64 %r5527d c7[0x330] (0)
>1417: mov u32 %r5528 0x0000000c (0)
>1418: ld  u32 %r5529 c7[0x338] (0)
>1419: add u64 %r5530d %r5527d %r5468 (0)
>1420: add u32 %r5531 %r5528 %r5468 (0)
>1421: set u8 %p5532 gt u32 %r5531 %r5529 (0)
>1422: not %p5532 st  u32 # g[%r5530d+0x8] %r5512 (0)
>1423: ld  u64 %r5533d c7[0x330] (0)
>1424: mov u32 %r5534 0x00000010 (0)
>1425: ld  u32 %r5535 c7[0x338] (0)
>1426: add u64 %r5536d %r5533d %r5468 (0)
>1427: add u32 %r5537 %r5534 %r5468 (0)
>1428: set u8 %p5538 gt u32 %r5537 %r5535 (0)
>1429: not %p5538 st  u32 # g[%r5536d+0xc] %r5514 (0)
>1430: membar (SUBOP:7) - # (0)
>1431: neg f32 %r5539 %r5175 (0)
>1432: add f32 %r5540 %r4679 %r5539 (0)
>1433: neg f32 %r5541 %r5184 (0)
>1434: add f32 %r5542 %r4688 %r5541 (0)
>1435: neg f32 %r5543 %r5193 (0)
>1436: add f32 %r5544 %r4697 %r5543 (0)
>1437: neg f32 %r5545 %r5202 (0)
>1438: add f32 %r5546 %r4706 %r5545 (0)
>1439: mul f32 %r5547 %r5540 %r5540 (0)
>1440: mad f32 %r5548 %r5542 %r5542 %r5547 (0)
>1441: mad f32 %r5549 %r5544 %r5544 %r5548 (0)
>1442: mad f32 %r5550 %r5546 %r5546 %r5549 (0)
>1443: mov u32 %r5551 %r5550 (0)
>1444: rsq f32 %r5552 %r5551 (0)
>1445: rcp f32 %r5553 %r5552 (0)
>1446: ld  u32 %r5554 c0[0x30] (0)
>1447: neg f32 %r5555 %r5553 (0)
>1448: add f32 %r5556 %r5554 %r5555 (0)
>1449: mov u32 %r5557 0x3eb33333 (0)
>1450: mul f32 %r5558 %r5557 %r5556 (0)
>1451: rcp f32 %r5559 %r5553 (0)
>1452: mul f32 %r5560 %r5558 %r5559 (0)
>1453: mul f32 %r5561 %r5560 %r5540 (0)
>1454: mul f32 %r5562 %r5560 %r5542 (0)
>1455: mul f32 %r5563 %r5560 %r5544 (0)
>1456: mul f32 %r5564 %r5560 %r5546 (0)
>1457: mov u32 %r5565 0x00000010 (0)
>1458: mul u32 %r5566 %r2713 %r5565 (0)
>1459: mov u32 %r5567 0x00000010 (0)
>1460: mul u32 %r5568 %r2713 %r5567 (0)
>1461: ld  u64 %r5569d c7[0x330] (0)
>1462: mov u32 %r5570 0x00000004 (0)
>1463: ld  u32 %r5571 c7[0x338] (0)
>1464: add u64 %r5572d %r5569d %r5568 (0)
>1465: add u32 %r5573 %r5570 %r5568 (0)
>1466: set u8 %p5574 gt u32 %r5573 %r5571 (0)
>1467: not %p5574 ld  u32 %r5575 g[%r5572d+0x0] (0)
>1468: %p5574 mov u32 %r5576 0x00000000 (0)
>1469: union u32 %r5577 %r5575 %r5576 (0)
>1470: ld  u64 %r5578d c7[0x330] (0)
>1471: mov u32 %r5579 0x00000008 (0)
>1472: ld  u32 %r5580 c7[0x338] (0)
>1473: add u64 %r5581d %r5578d %r5568 (0)
>1474: add u32 %r5582 %r5579 %r5568 (0)
>1475: set u8 %p5583 gt u32 %r5582 %r5580 (0)
>1476: not %p5583 ld  u32 %r5584 g[%r5581d+0x4] (0)
>1477: %p5583 mov u32 %r5585 0x00000000 (0)
>1478: union u32 %r5586 %r5584 %r5585 (0)
>1479: ld  u64 %r5587d c7[0x330] (0)
>1480: mov u32 %r5588 0x0000000c (0)
>1481: ld  u32 %r5589 c7[0x338] (0)
>1482: add u64 %r5590d %r5587d %r5568 (0)
>1483: add u32 %r5591 %r5588 %r5568 (0)
>1484: set u8 %p5592 gt u32 %r5591 %r5589 (0)
>1485: not %p5592 ld  u32 %r5593 g[%r5590d+0x8] (0)
>1486: %p5592 mov u32 %r5594 0x00000000 (0)
>1487: union u32 %r5595 %r5593 %r5594 (0)
>1488: ld  u64 %r5596d c7[0x330] (0)
>1489: mov u32 %r5597 0x00000010 (0)
>1490: ld  u32 %r5598 c7[0x338] (0)
>1491: add u64 %r5599d %r5596d %r5568 (0)
>1492: add u32 %r5600 %r5597 %r5568 (0)
>1493: set u8 %p5601 gt u32 %r5600 %r5598 (0)
>1494: not %p5601 ld  u32 %r5602 g[%r5599d+0xc] (0)
>1495: %p5601 mov u32 %r5603 0x00000000 (0)
>1496: union u32 %r5604 %r5602 %r5603 (0)
>1497: add f32 %r5605 %r5577 %r5561 (0)
>1498: add f32 %r5606 %r5586 %r5562 (0)
>1499: add f32 %r5607 %r5595 %r5563 (0)
>1500: add f32 %r5608 %r5604 %r5564 (0)
>1501: ld  u64 %r5609d c7[0x330] (0)
>1502: mov u32 %r5610 0x00000004 (0)
>1503: ld  u32 %r5611 c7[0x338] (0)
>1504: add u64 %r5612d %r5609d %r5566 (0)
>1505: add u32 %r5613 %r5610 %r5566 (0)
>1506: set u8 %p5614 gt u32 %r5613 %r5611 (0)
>1507: not %p5614 st  u32 # g[%r5612d+0x0] %r5605 (0)
>1508: ld  u64 %r5615d c7[0x330] (0)
>1509: mov u32 %r5616 0x00000008 (0)
>1510: ld  u32 %r5617 c7[0x338] (0)
>1511: add u64 %r5618d %r5615d %r5566 (0)
>1512: add u32 %r5619 %r5616 %r5566 (0)
>1513: set u8 %p5620 gt u32 %r5619 %r5617 (0)
>1514: not %p5620 st  u32 # g[%r5618d+0x4] %r5606 (0)
>1515: ld  u64 %r5621d c7[0x330] (0)
>1516: mov u32 %r5622 0x0000000c (0)
>1517: ld  u32 %r5623 c7[0x338] (0)
>1518: add u64 %r5624d %r5621d %r5566 (0)
>1519: add u32 %r5625 %r5622 %r5566 (0)
>1520: set u8 %p5626 gt u32 %r5625 %r5623 (0)
>1521: not %p5626 st  u32 # g[%r5624d+0x8] %r5607 (0)
>1522: ld  u64 %r5627d c7[0x330] (0)
>1523: mov u32 %r5628 0x00000010 (0)
>1524: ld  u32 %r5629 c7[0x338] (0)
>1525: add u64 %r5630d %r5627d %r5566 (0)
>1526: add u32 %r5631 %r5628 %r5566 (0)
>1527: set u8 %p5632 gt u32 %r5631 %r5629 (0)
>1528: not %p5632 st  u32 # g[%r5630d+0xc] %r5608 (0)
>1529: mov u32 %r5633 0x00000010 (0)
>1530: mul u32 %r5634 %r5155 %r5633 (0)
>1531: mov u32 %r5635 0x00000010 (0)
>1532: mul u32 %r5636 %r5155 %r5635 (0)
>1533: ld  u64 %r5637d c7[0x330] (0)
>1534: mov u32 %r5638 0x00000004 (0)
>1535: ld  u32 %r5639 c7[0x338] (0)
>1536: add u64 %r5640d %r5637d %r5636 (0)
>1537: add u32 %r5641 %r5638 %r5636 (0)
>1538: set u8 %p5642 gt u32 %r5641 %r5639 (0)
>1539: not %p5642 ld  u32 %r5643 g[%r5640d+0x0] (0)
>1540: %p5642 mov u32 %r5644 0x00000000 (0)
>1541: union u32 %r5645 %r5643 %r5644 (0)
>1542: ld  u64 %r5646d c7[0x330] (0)
>1543: mov u32 %r5647 0x00000008 (0)
>1544: ld  u32 %r5648 c7[0x338] (0)
>1545: add u64 %r5649d %r5646d %r5636 (0)
>1546: add u32 %r5650 %r5647 %r5636 (0)
>1547: set u8 %p5651 gt u32 %r5650 %r5648 (0)
>1548: not %p5651 ld  u32 %r5652 g[%r5649d+0x4] (0)
>1549: %p5651 mov u32 %r5653 0x00000000 (0)
>1550: union u32 %r5654 %r5652 %r5653 (0)
>1551: ld  u64 %r5655d c7[0x330] (0)
>1552: mov u32 %r5656 0x0000000c (0)
>1553: ld  u32 %r5657 c7[0x338] (0)
>1554: add u64 %r5658d %r5655d %r5636 (0)
>1555: add u32 %r5659 %r5656 %r5636 (0)
>1556: set u8 %p5660 gt u32 %r5659 %r5657 (0)
>1557: not %p5660 ld  u32 %r5661 g[%r5658d+0x8] (0)
>1558: %p5660 mov u32 %r5662 0x00000000 (0)
>1559: union u32 %r5663 %r5661 %r5662 (0)
>1560: ld  u64 %r5664d c7[0x330] (0)
>1561: mov u32 %r5665 0x00000010 (0)
>1562: ld  u32 %r5666 c7[0x338] (0)
>1563: add u64 %r5667d %r5664d %r5636 (0)
>1564: add u32 %r5668 %r5665 %r5636 (0)
>1565: set u8 %p5669 gt u32 %r5668 %r5666 (0)
>1566: not %p5669 ld  u32 %r5670 g[%r5667d+0xc] (0)
>1567: %p5669 mov u32 %r5671 0x00000000 (0)
>1568: union u32 %r5672 %r5670 %r5671 (0)
>1569: neg f32 %r5673 %r5561 (0)
>1570: add f32 %r5674 %r5645 %r5673 (0)
>1571: neg f32 %r5675 %r5562 (0)
>1572: add f32 %r5676 %r5654 %r5675 (0)
>1573: neg f32 %r5677 %r5563 (0)
>1574: add f32 %r5678 %r5663 %r5677 (0)
>1575: neg f32 %r5679 %r5564 (0)
>1576: add f32 %r5680 %r5672 %r5679 (0)
>1577: ld  u64 %r5681d c7[0x330] (0)
>1578: mov u32 %r5682 0x00000004 (0)
>1579: ld  u32 %r5683 c7[0x338] (0)
>1580: add u64 %r5684d %r5681d %r5634 (0)
>1581: add u32 %r5685 %r5682 %r5634 (0)
>1582: set u8 %p5686 gt u32 %r5685 %r5683 (0)
>1583: not %p5686 st  u32 # g[%r5684d+0x0] %r5674 (0)
>1584: ld  u64 %r5687d c7[0x330] (0)
>1585: mov u32 %r5688 0x00000008 (0)
>1586: ld  u32 %r5689 c7[0x338] (0)
>1587: add u64 %r5690d %r5687d %r5634 (0)
>1588: add u32 %r5691 %r5688 %r5634 (0)
>1589: set u8 %p5692 gt u32 %r5691 %r5689 (0)
>1590: not %p5692 st  u32 # g[%r5690d+0x4] %r5676 (0)
>1591: ld  u64 %r5693d c7[0x330] (0)
>1592: mov u32 %r5694 0x0000000c (0)
>1593: ld  u32 %r5695 c7[0x338] (0)
>1594: add u64 %r5696d %r5693d %r5634 (0)
>1595: add u32 %r5697 %r5694 %r5634 (0)
>1596: set u8 %p5698 gt u32 %r5697 %r5695 (0)
>1597: not %p5698 st  u32 # g[%r5696d+0x8] %r5678 (0)
>1598: ld  u64 %r5699d c7[0x330] (0)
>1599: mov u32 %r5700 0x00000010 (0)
>1600: ld  u32 %r5701 c7[0x338] (0)
>1601: add u64 %r5702d %r5699d %r5634 (0)
>1602: add u32 %r5703 %r5700 %r5634 (0)
>1603: set u8 %p5704 gt u32 %r5703 %r5701 (0)
>1604: not %p5704 st  u32 # g[%r5702d+0xc] %r5680 (0)
>1605: neg f32 %r5705 %r5148 (0)
>1606: add f32 %r5706 %r4929 %r5705 (0)
>1607: neg f32 %r5707 %r5149 (0)
>1608: add f32 %r5708 %r4930 %r5707 (0)
>1609: neg f32 %r5709 %r5150 (0)
>1610: add f32 %r5710 %r4931 %r5709 (0)
>1611: neg f32 %r5711 %r5151 (0)
>1612: add f32 %r5712 %r4932 %r5711 (0)
>1613: mul f32 %r5713 %r5706 %r5706 (0)
>1614: mad f32 %r5714 %r5708 %r5708 %r5713 (0)
>1615: mad f32 %r5715 %r5710 %r5710 %r5714 (0)
>1616: mad f32 %r5716 %r5712 %r5712 %r5715 (0)
>1617: mov u32 %r5717 %r5716 (0)
>1618: rsq f32 %r5718 %r5717 (0)
>1619: rcp f32 %r5719 %r5718 (0)
>1620: ld  u32 %r5720 c0[0x30] (0)
>1621: neg f32 %r5721 %r5719 (0)
>1622: add f32 %r5722 %r5720 %r5721 (0)
>1623: mov u32 %r5723 0x3eb33333 (0)
>1624: mul f32 %r5724 %r5723 %r5722 (0)
>1625: rcp f32 %r5725 %r5719 (0)
>1626: mul f32 %r5726 %r5724 %r5725 (0)
>1627: mul f32 %r5727 %r5726 %r5706 (0)
>1628: mul f32 %r5728 %r5726 %r5708 (0)
>1629: mul f32 %r5729 %r5726 %r5710 (0)
>1630: mul f32 %r5730 %r5726 %r5712 (0)
>1631: mov u32 %r5731 0x00000010 (0)
>1632: mul u32 %r5732 %r4716 %r5731 (0)
>1633: mov u32 %r5733 0x00000010 (0)
>1634: mul u32 %r5734 %r4716 %r5733 (0)
>1635: ld  u64 %r5735d c7[0x330] (0)
>1636: mov u32 %r5736 0x00000004 (0)
>1637: ld  u32 %r5737 c7[0x338] (0)
>1638: add u64 %r5738d %r5735d %r5734 (0)
>1639: add u32 %r5739 %r5736 %r5734 (0)
>1640: set u8 %p5740 gt u32 %r5739 %r5737 (0)
>1641: not %p5740 ld  u32 %r5741 g[%r5738d+0x0] (0)
>1642: %p5740 mov u32 %r5742 0x00000000 (0)
>1643: union u32 %r5743 %r5741 %r5742 (0)
>1644: ld  u64 %r5744d c7[0x330] (0)
>1645: mov u32 %r5745 0x00000008 (0)
>1646: ld  u32 %r5746 c7[0x338] (0)
>1647: add u64 %r5747d %r5744d %r5734 (0)
>1648: add u32 %r5748 %r5745 %r5734 (0)
>1649: set u8 %p5749 gt u32 %r5748 %r5746 (0)
>1650: not %p5749 ld  u32 %r5750 g[%r5747d+0x4] (0)
>1651: %p5749 mov u32 %r5751 0x00000000 (0)
>1652: union u32 %r5752 %r5750 %r5751 (0)
>1653: ld  u64 %r5753d c7[0x330] (0)
>1654: mov u32 %r5754 0x0000000c (0)
>1655: ld  u32 %r5755 c7[0x338] (0)
>1656: add u64 %r5756d %r5753d %r5734 (0)
>1657: add u32 %r5757 %r5754 %r5734 (0)
>1658: set u8 %p5758 gt u32 %r5757 %r5755 (0)
>1659: not %p5758 ld  u32 %r5759 g[%r5756d+0x8] (0)
>1660: %p5758 mov u32 %r5760 0x00000000 (0)
>1661: union u32 %r5761 %r5759 %r5760 (0)
>1662: ld  u64 %r5762d c7[0x330] (0)
>1663: mov u32 %r5763 0x00000010 (0)
>1664: ld  u32 %r5764 c7[0x338] (0)
>1665: add u64 %r5765d %r5762d %r5734 (0)
>1666: add u32 %r5766 %r5763 %r5734 (0)
>1667: set u8 %p5767 gt u32 %r5766 %r5764 (0)
>1668: not %p5767 ld  u32 %r5768 g[%r5765d+0xc] (0)
>1669: %p5767 mov u32 %r5769 0x00000000 (0)
>1670: union u32 %r5770 %r5768 %r5769 (0)
>1671: add f32 %r5771 %r5743 %r5727 (0)
>1672: add f32 %r5772 %r5752 %r5728 (0)
>1673: add f32 %r5773 %r5761 %r5729 (0)
>1674: add f32 %r5774 %r5770 %r5730 (0)
>1675: ld  u64 %r5775d c7[0x330] (0)
>1676: mov u32 %r5776 0x00000004 (0)
>1677: ld  u32 %r5777 c7[0x338] (0)
>1678: add u64 %r5778d %r5775d %r5732 (0)
>1679: add u32 %r5779 %r5776 %r5732 (0)
>1680: set u8 %p5780 gt u32 %r5779 %r5777 (0)
>1681: not %p5780 st  u32 # g[%r5778d+0x0] %r5771 (0)
>1682: ld  u64 %r5781d c7[0x330] (0)
>1683: mov u32 %r5782 0x00000008 (0)
>1684: ld  u32 %r5783 c7[0x338] (0)
>1685: add u64 %r5784d %r5781d %r5732 (0)
>1686: add u32 %r5785 %r5782 %r5732 (0)
>1687: set u8 %p5786 gt u32 %r5785 %r5783 (0)
>1688: not %p5786 st  u32 # g[%r5784d+0x4] %r5772 (0)
>1689: ld  u64 %r5787d c7[0x330] (0)
>1690: mov u32 %r5788 0x0000000c (0)
>1691: ld  u32 %r5789 c7[0x338] (0)
>1692: add u64 %r5790d %r5787d %r5732 (0)
>1693: add u32 %r5791 %r5788 %r5732 (0)
>1694: set u8 %p5792 gt u32 %r5791 %r5789 (0)
>1695: not %p5792 st  u32 # g[%r5790d+0x8] %r5773 (0)
>1696: ld  u64 %r5793d c7[0x330] (0)
>1697: mov u32 %r5794 0x00000010 (0)
>1698: ld  u32 %r5795 c7[0x338] (0)
>1699: add u64 %r5796d %r5793d %r5732 (0)
>1700: add u32 %r5797 %r5794 %r5732 (0)
>1701: set u8 %p5798 gt u32 %r5797 %r5795 (0)
>1702: not %p5798 st  u32 # g[%r5796d+0xc] %r5774 (0)
>1703: mov u32 %r5799 0x00000010 (0)
>1704: mul u32 %r5800 %r4934 %r5799 (0)
>1705: mov u32 %r5801 0x00000010 (0)
>1706: mul u32 %r5802 %r4934 %r5801 (0)
>1707: ld  u64 %r5803d c7[0x330] (0)
>1708: mov u32 %r5804 0x00000004 (0)
>1709: ld  u32 %r5805 c7[0x338] (0)
>1710: add u64 %r5806d %r5803d %r5802 (0)
>1711: add u32 %r5807 %r5804 %r5802 (0)
>1712: set u8 %p5808 gt u32 %r5807 %r5805 (0)
>1713: not %p5808 ld  u32 %r5809 g[%r5806d+0x0] (0)
>1714: %p5808 mov u32 %r5810 0x00000000 (0)
>1715: union u32 %r5811 %r5809 %r5810 (0)
>1716: ld  u64 %r5812d c7[0x330] (0)
>1717: mov u32 %r5813 0x00000008 (0)
>1718: ld  u32 %r5814 c7[0x338] (0)
>1719: add u64 %r5815d %r5812d %r5802 (0)
>1720: add u32 %r5816 %r5813 %r5802 (0)
>1721: set u8 %p5817 gt u32 %r5816 %r5814 (0)
>1722: not %p5817 ld  u32 %r5818 g[%r5815d+0x4] (0)
>1723: %p5817 mov u32 %r5819 0x00000000 (0)
>1724: union u32 %r5820 %r5818 %r5819 (0)
>1725: ld  u64 %r5821d c7[0x330] (0)
>1726: mov u32 %r5822 0x0000000c (0)
>1727: ld  u32 %r5823 c7[0x338] (0)
>1728: add u64 %r5824d %r5821d %r5802 (0)
>1729: add u32 %r5825 %r5822 %r5802 (0)
>1730: set u8 %p5826 gt u32 %r5825 %r5823 (0)
>1731: not %p5826 ld  u32 %r5827 g[%r5824d+0x8] (0)
>1732: %p5826 mov u32 %r5828 0x00000000 (0)
>1733: union u32 %r5829 %r5827 %r5828 (0)
>1734: ld  u64 %r5830d c7[0x330] (0)
>1735: mov u32 %r5831 0x00000010 (0)
>1736: ld  u32 %r5832 c7[0x338] (0)
>1737: add u64 %r5833d %r5830d %r5802 (0)
>1738: add u32 %r5834 %r5831 %r5802 (0)
>1739: set u8 %p5835 gt u32 %r5834 %r5832 (0)
>1740: not %p5835 ld  u32 %r5836 g[%r5833d+0xc] (0)
>1741: %p5835 mov u32 %r5837 0x00000000 (0)
>1742: union u32 %r5838 %r5836 %r5837 (0)
>1743: neg f32 %r5839 %r5727 (0)
>1744: add f32 %r5840 %r5811 %r5839 (0)
>1745: neg f32 %r5841 %r5728 (0)
>1746: add f32 %r5842 %r5820 %r5841 (0)
>1747: neg f32 %r5843 %r5729 (0)
>1748: add f32 %r5844 %r5829 %r5843 (0)
>1749: neg f32 %r5845 %r5730 (0)
>1750: add f32 %r5846 %r5838 %r5845 (0)
>1751: ld  u64 %r5847d c7[0x330] (0)
>1752: mov u32 %r5848 0x00000004 (0)
>1753: ld  u32 %r5849 c7[0x338] (0)
>1754: add u64 %r5850d %r5847d %r5800 (0)
>1755: add u32 %r5851 %r5848 %r5800 (0)
>1756: set u8 %p5852 gt u32 %r5851 %r5849 (0)
>1757: not %p5852 st  u32 # g[%r5850d+0x0] %r5840 (0)
>1758: ld  u64 %r5853d c7[0x330] (0)
>1759: mov u32 %r5854 0x00000008 (0)
>1760: ld  u32 %r5855 c7[0x338] (0)
>1761: add u64 %r5856d %r5853d %r5800 (0)
>1762: add u32 %r5857 %r5854 %r5800 (0)
>1763: set u8 %p5858 gt u32 %r5857 %r5855 (0)
>1764: not %p5858 st  u32 # g[%r5856d+0x4] %r5842 (0)
>1765: ld  u64 %r5859d c7[0x330] (0)
>1766: mov u32 %r5860 0x0000000c (0)
>1767: ld  u32 %r5861 c7[0x338] (0)
>1768: add u64 %r5862d %r5859d %r5800 (0)
>1769: add u32 %r5863 %r5860 %r5800 (0)
>1770: set u8 %p5864 gt u32 %r5863 %r5861 (0)
>1771: not %p5864 st  u32 # g[%r5862d+0x8] %r5844 (0)
>1772: ld  u64 %r5865d c7[0x330] (0)
>1773: mov u32 %r5866 0x00000010 (0)
>1774: ld  u32 %r5867 c7[0x338] (0)
>1775: add u64 %r5868d %r5865d %r5800 (0)
>1776: add u32 %r5869 %r5866 %r5800 (0)
>1777: set u8 %p5870 gt u32 %r5869 %r5867 (0)
>1778: not %p5870 st  u32 # g[%r5868d+0xc] %r5846 (0)
>1779: membar (SUBOP:7) - # (0)
>1780: bra BB:24 (0)
>BB:24 (2 instructions) - idom = BB:22, df = { BB:35 }
> -> BB:35 (forward)
>1781: join (0)
>1782: bra BB:35 (0)
>BB:25 (18 instructions) - idom = BB:17, df = { BB:35 }
> -> BB:29 (tree)
> -> BB:26 (tree)
>1783: mov u32 %r5882 0x00000001 (0)
>1784: set u32 %r5883 eq %r4003 %r5882 (0)
>1785: mov u32 %r5884 0x00000002 (0)
>1786: mov u32 $r0 %r2715 (0)
>1787: mov u32 $r1 %r5884 (0)
>1788: call abs BUILTIN:1 (0)
>1789: mov u32 %r5885 $r1 (0)
>1790: nop - { $r0 $r2d } (0)
>1791: nop - $p0q (0)
>1792: mov u32 %r5886 0x00000001 (0)
>1793: set u32 %r5887 eq %r5885 %r5886 (0)
>1794: and u32 %r5888 %r5883 %r5887 (0)
>1795: mov u32 %r5889 0x00000000 (0)
>1796: set u32 %r5890 eq %r2717 %r5889 (0)
>1797: and u32 %r5891 %r5888 %r5890 (0)
>1798: joinat BB:34 (0)
>1799: set u8 %p5892 neu u32 0x00000000 %r5891 (0)
>1800: not %p5892 bra BB:29 (0)
>BB:26 (7 instructions) - idom = BB:25, df = { BB:34 }
> -> BB:28 (forward)
> -> BB:27 (tree)
>1801: mov u32 %r5893 0x00000001 (0)
>1802: add u32 %r5894 %r2713 %r5893 (0)
>1803: ld  u32 %r5895 c0[0x0] (0)
>1804: set s32 %r5896 lt %r5894 %r5895 (0)
>1805: joinat BB:28 (0)
>1806: set u8 %p5897 neu u32 0x00000000 %r5896 (0)
>1807: not %p5897 bra BB:28 (0)
>BB:27 (252 instructions) - idom = BB:26, df = { BB:28 }
> -> BB:28 (forward)
>1808: mov u32 %r5898 0x00000010 (0)
>1809: mul u32 %r5899 %r2713 %r5898 (0)
>1810: ld  u64 %r5900d c7[0x330] (0)
>1811: mov u32 %r5901 0x00000004 (0)
>1812: ld  u32 %r5902 c7[0x338] (0)
>1813: add u64 %r5903d %r5900d %r5899 (0)
>1814: add u32 %r5904 %r5901 %r5899 (0)
>1815: set u8 %p5905 gt u32 %r5904 %r5902 (0)
>1816: not %p5905 ld  u32 %r5906 g[%r5903d+0x0] (0)
>1817: %p5905 mov u32 %r5907 0x00000000 (0)
>1818: union u32 %r5908 %r5906 %r5907 (0)
>1819: ld  u64 %r5909d c7[0x330] (0)
>1820: mov u32 %r5910 0x00000008 (0)
>1821: ld  u32 %r5911 c7[0x338] (0)
>1822: add u64 %r5912d %r5909d %r5899 (0)
>1823: add u32 %r5913 %r5910 %r5899 (0)
>1824: set u8 %p5914 gt u32 %r5913 %r5911 (0)
>1825: not %p5914 ld  u32 %r5915 g[%r5912d+0x4] (0)
>1826: %p5914 mov u32 %r5916 0x00000000 (0)
>1827: union u32 %r5917 %r5915 %r5916 (0)
>1828: ld  u64 %r5918d c7[0x330] (0)
>1829: mov u32 %r5919 0x0000000c (0)
>1830: ld  u32 %r5920 c7[0x338] (0)
>1831: add u64 %r5921d %r5918d %r5899 (0)
>1832: add u32 %r5922 %r5919 %r5899 (0)
>1833: set u8 %p5923 gt u32 %r5922 %r5920 (0)
>1834: not %p5923 ld  u32 %r5924 g[%r5921d+0x8] (0)
>1835: %p5923 mov u32 %r5925 0x00000000 (0)
>1836: union u32 %r5926 %r5924 %r5925 (0)
>1837: ld  u64 %r5927d c7[0x330] (0)
>1838: mov u32 %r5928 0x00000010 (0)
>1839: ld  u32 %r5929 c7[0x338] (0)
>1840: add u64 %r5930d %r5927d %r5899 (0)
>1841: add u32 %r5931 %r5928 %r5899 (0)
>1842: set u8 %p5932 gt u32 %r5931 %r5929 (0)
>1843: not %p5932 ld  u32 %r5933 g[%r5930d+0xc] (0)
>1844: %p5932 mov u32 %r5934 0x00000000 (0)
>1845: union u32 %r5935 %r5933 %r5934 (0)
>1846: mov u32 %r5940 0x00000010 (0)
>1847: mul u32 %r5941 %r5894 %r5940 (0)
>1848: ld  u64 %r5942d c7[0x330] (0)
>1849: mov u32 %r5943 0x00000004 (0)
>1850: ld  u32 %r5944 c7[0x338] (0)
>1851: add u64 %r5945d %r5942d %r5941 (0)
>1852: add u32 %r5946 %r5943 %r5941 (0)
>1853: set u8 %p5947 gt u32 %r5946 %r5944 (0)
>1854: not %p5947 ld  u32 %r5948 g[%r5945d+0x0] (0)
>1855: %p5947 mov u32 %r5949 0x00000000 (0)
>1856: union u32 %r5950 %r5948 %r5949 (0)
>1857: ld  u64 %r5951d c7[0x330] (0)
>1858: mov u32 %r5952 0x00000008 (0)
>1859: ld  u32 %r5953 c7[0x338] (0)
>1860: add u64 %r5954d %r5951d %r5941 (0)
>1861: add u32 %r5955 %r5952 %r5941 (0)
>1862: set u8 %p5956 gt u32 %r5955 %r5953 (0)
>1863: not %p5956 ld  u32 %r5957 g[%r5954d+0x4] (0)
>1864: %p5956 mov u32 %r5958 0x00000000 (0)
>1865: union u32 %r5959 %r5957 %r5958 (0)
>1866: ld  u64 %r5960d c7[0x330] (0)
>1867: mov u32 %r5961 0x0000000c (0)
>1868: ld  u32 %r5962 c7[0x338] (0)
>1869: add u64 %r5963d %r5960d %r5941 (0)
>1870: add u32 %r5964 %r5961 %r5941 (0)
>1871: set u8 %p5965 gt u32 %r5964 %r5962 (0)
>1872: not %p5965 ld  u32 %r5966 g[%r5963d+0x8] (0)
>1873: %p5965 mov u32 %r5967 0x00000000 (0)
>1874: union u32 %r5968 %r5966 %r5967 (0)
>1875: ld  u64 %r5969d c7[0x330] (0)
>1876: mov u32 %r5970 0x00000010 (0)
>1877: ld  u32 %r5971 c7[0x338] (0)
>1878: add u64 %r5972d %r5969d %r5941 (0)
>1879: add u32 %r5973 %r5970 %r5941 (0)
>1880: set u8 %p5974 gt u32 %r5973 %r5971 (0)
>1881: not %p5974 ld  u32 %r5975 g[%r5972d+0xc] (0)
>1882: %p5974 mov u32 %r5976 0x00000000 (0)
>1883: union u32 %r5977 %r5975 %r5976 (0)
>1884: neg f32 %r5978 %r5950 (0)
>1885: add f32 %r5979 %r5908 %r5978 (0)
>1886: neg f32 %r5980 %r5959 (0)
>1887: add f32 %r5981 %r5917 %r5980 (0)
>1888: neg f32 %r5982 %r5968 (0)
>1889: add f32 %r5983 %r5926 %r5982 (0)
>1890: neg f32 %r5984 %r5977 (0)
>1891: add f32 %r5985 %r5935 %r5984 (0)
>1892: mul f32 %r5986 %r5979 %r5979 (0)
>1893: mad f32 %r5987 %r5981 %r5981 %r5986 (0)
>1894: mad f32 %r5988 %r5983 %r5983 %r5987 (0)
>1895: mad f32 %r5989 %r5985 %r5985 %r5988 (0)
>1896: mov u32 %r5990 %r5989 (0)
>1897: rsq f32 %r5991 %r5990 (0)
>1898: rcp f32 %r5992 %r5991 (0)
>1899: ld  u32 %r5993 c0[0x20] (0)
>1900: neg f32 %r5994 %r5992 (0)
>1901: add f32 %r5995 %r5993 %r5994 (0)
>1902: mov u32 %r5996 0x3eb33333 (0)
>1903: mul f32 %r5997 %r5996 %r5995 (0)
>1904: rcp f32 %r5998 %r5992 (0)
>1905: mul f32 %r5999 %r5997 %r5998 (0)
>1906: mul f32 %r6000 %r5999 %r5979 (0)
>1907: mul f32 %r6001 %r5999 %r5981 (0)
>1908: mul f32 %r6002 %r5999 %r5983 (0)
>1909: mul f32 %r6003 %r5999 %r5985 (0)
>1910: mov u32 %r6004 0x00000010 (0)
>1911: mul u32 %r6005 %r2713 %r6004 (0)
>1912: mov u32 %r6006 0x00000010 (0)
>1913: mul u32 %r6007 %r2713 %r6006 (0)
>1914: ld  u64 %r6008d c7[0x330] (0)
>1915: mov u32 %r6009 0x00000004 (0)
>1916: ld  u32 %r6010 c7[0x338] (0)
>1917: add u64 %r6011d %r6008d %r6007 (0)
>1918: add u32 %r6012 %r6009 %r6007 (0)
>1919: set u8 %p6013 gt u32 %r6012 %r6010 (0)
>1920: not %p6013 ld  u32 %r6014 g[%r6011d+0x0] (0)
>1921: %p6013 mov u32 %r6015 0x00000000 (0)
>1922: union u32 %r6016 %r6014 %r6015 (0)
>1923: ld  u64 %r6017d c7[0x330] (0)
>1924: mov u32 %r6018 0x00000008 (0)
>1925: ld  u32 %r6019 c7[0x338] (0)
>1926: add u64 %r6020d %r6017d %r6007 (0)
>1927: add u32 %r6021 %r6018 %r6007 (0)
>1928: set u8 %p6022 gt u32 %r6021 %r6019 (0)
>1929: not %p6022 ld  u32 %r6023 g[%r6020d+0x4] (0)
>1930: %p6022 mov u32 %r6024 0x00000000 (0)
>1931: union u32 %r6025 %r6023 %r6024 (0)
>1932: ld  u64 %r6026d c7[0x330] (0)
>1933: mov u32 %r6027 0x0000000c (0)
>1934: ld  u32 %r6028 c7[0x338] (0)
>1935: add u64 %r6029d %r6026d %r6007 (0)
>1936: add u32 %r6030 %r6027 %r6007 (0)
>1937: set u8 %p6031 gt u32 %r6030 %r6028 (0)
>1938: not %p6031 ld  u32 %r6032 g[%r6029d+0x8] (0)
>1939: %p6031 mov u32 %r6033 0x00000000 (0)
>1940: union u32 %r6034 %r6032 %r6033 (0)
>1941: ld  u64 %r6035d c7[0x330] (0)
>1942: mov u32 %r6036 0x00000010 (0)
>1943: ld  u32 %r6037 c7[0x338] (0)
>1944: add u64 %r6038d %r6035d %r6007 (0)
>1945: add u32 %r6039 %r6036 %r6007 (0)
>1946: set u8 %p6040 gt u32 %r6039 %r6037 (0)
>1947: not %p6040 ld  u32 %r6041 g[%r6038d+0xc] (0)
>1948: %p6040 mov u32 %r6042 0x00000000 (0)
>1949: union u32 %r6043 %r6041 %r6042 (0)
>1950: add f32 %r6044 %r6016 %r6000 (0)
>1951: add f32 %r6045 %r6025 %r6001 (0)
>1952: add f32 %r6046 %r6034 %r6002 (0)
>1953: add f32 %r6047 %r6043 %r6003 (0)
>1954: ld  u64 %r6048d c7[0x330] (0)
>1955: mov u32 %r6049 0x00000004 (0)
>1956: ld  u32 %r6050 c7[0x338] (0)
>1957: add u64 %r6051d %r6048d %r6005 (0)
>1958: add u32 %r6052 %r6049 %r6005 (0)
>1959: set u8 %p6053 gt u32 %r6052 %r6050 (0)
>1960: not %p6053 st  u32 # g[%r6051d+0x0] %r6044 (0)
>1961: ld  u64 %r6054d c7[0x330] (0)
>1962: mov u32 %r6055 0x00000008 (0)
>1963: ld  u32 %r6056 c7[0x338] (0)
>1964: add u64 %r6057d %r6054d %r6005 (0)
>1965: add u32 %r6058 %r6055 %r6005 (0)
>1966: set u8 %p6059 gt u32 %r6058 %r6056 (0)
>1967: not %p6059 st  u32 # g[%r6057d+0x4] %r6045 (0)
>1968: ld  u64 %r6060d c7[0x330] (0)
>1969: mov u32 %r6061 0x0000000c (0)
>1970: ld  u32 %r6062 c7[0x338] (0)
>1971: add u64 %r6063d %r6060d %r6005 (0)
>1972: add u32 %r6064 %r6061 %r6005 (0)
>1973: set u8 %p6065 gt u32 %r6064 %r6062 (0)
>1974: not %p6065 st  u32 # g[%r6063d+0x8] %r6046 (0)
>1975: ld  u64 %r6066d c7[0x330] (0)
>1976: mov u32 %r6067 0x00000010 (0)
>1977: ld  u32 %r6068 c7[0x338] (0)
>1978: add u64 %r6069d %r6066d %r6005 (0)
>1979: add u32 %r6070 %r6067 %r6005 (0)
>1980: set u8 %p6071 gt u32 %r6070 %r6068 (0)
>1981: not %p6071 st  u32 # g[%r6069d+0xc] %r6047 (0)
>1982: mov u32 %r6072 0x00000010 (0)
>1983: mul u32 %r6073 %r5894 %r6072 (0)
>1984: mov u32 %r6074 0x00000010 (0)
>1985: mul u32 %r6075 %r5894 %r6074 (0)
>1986: ld  u64 %r6076d c7[0x330] (0)
>1987: mov u32 %r6077 0x00000004 (0)
>1988: ld  u32 %r6078 c7[0x338] (0)
>1989: add u64 %r6079d %r6076d %r6075 (0)
>1990: add u32 %r6080 %r6077 %r6075 (0)
>1991: set u8 %p6081 gt u32 %r6080 %r6078 (0)
>1992: not %p6081 ld  u32 %r6082 g[%r6079d+0x0] (0)
>1993: %p6081 mov u32 %r6083 0x00000000 (0)
>1994: union u32 %r6084 %r6082 %r6083 (0)
>1995: ld  u64 %r6085d c7[0x330] (0)
>1996: mov u32 %r6086 0x00000008 (0)
>1997: ld  u32 %r6087 c7[0x338] (0)
>1998: add u64 %r6088d %r6085d %r6075 (0)
>1999: add u32 %r6089 %r6086 %r6075 (0)
>2000: set u8 %p6090 gt u32 %r6089 %r6087 (0)
>2001: not %p6090 ld  u32 %r6091 g[%r6088d+0x4] (0)
>2002: %p6090 mov u32 %r6092 0x00000000 (0)
>2003: union u32 %r6093 %r6091 %r6092 (0)
>2004: ld  u64 %r6094d c7[0x330] (0)
>2005: mov u32 %r6095 0x0000000c (0)
>2006: ld  u32 %r6096 c7[0x338] (0)
>2007: add u64 %r6097d %r6094d %r6075 (0)
>2008: add u32 %r6098 %r6095 %r6075 (0)
>2009: set u8 %p6099 gt u32 %r6098 %r6096 (0)
>2010: not %p6099 ld  u32 %r6100 g[%r6097d+0x8] (0)
>2011: %p6099 mov u32 %r6101 0x00000000 (0)
>2012: union u32 %r6102 %r6100 %r6101 (0)
>2013: ld  u64 %r6103d c7[0x330] (0)
>2014: mov u32 %r6104 0x00000010 (0)
>2015: ld  u32 %r6105 c7[0x338] (0)
>2016: add u64 %r6106d %r6103d %r6075 (0)
>2017: add u32 %r6107 %r6104 %r6075 (0)
>2018: set u8 %p6108 gt u32 %r6107 %r6105 (0)
>2019: not %p6108 ld  u32 %r6109 g[%r6106d+0xc] (0)
>2020: %p6108 mov u32 %r6110 0x00000000 (0)
>2021: union u32 %r6111 %r6109 %r6110 (0)
>2022: neg f32 %r6112 %r6000 (0)
>2023: add f32 %r6113 %r6084 %r6112 (0)
>2024: neg f32 %r6114 %r6001 (0)
>2025: add f32 %r6115 %r6093 %r6114 (0)
>2026: neg f32 %r6116 %r6002 (0)
>2027: add f32 %r6117 %r6102 %r6116 (0)
>2028: neg f32 %r6118 %r6003 (0)
>2029: add f32 %r6119 %r6111 %r6118 (0)
>2030: ld  u64 %r6120d c7[0x330] (0)
>2031: mov u32 %r6121 0x00000004 (0)
>2032: ld  u32 %r6122 c7[0x338] (0)
>2033: add u64 %r6123d %r6120d %r6073 (0)
>2034: add u32 %r6124 %r6121 %r6073 (0)
>2035: set u8 %p6125 gt u32 %r6124 %r6122 (0)
>2036: not %p6125 st  u32 # g[%r6123d+0x0] %r6113 (0)
>2037: ld  u64 %r6126d c7[0x330] (0)
>2038: mov u32 %r6127 0x00000008 (0)
>2039: ld  u32 %r6128 c7[0x338] (0)
>2040: add u64 %r6129d %r6126d %r6073 (0)
>2041: add u32 %r6130 %r6127 %r6073 (0)
>2042: set u8 %p6131 gt u32 %r6130 %r6128 (0)
>2043: not %p6131 st  u32 # g[%r6129d+0x4] %r6115 (0)
>2044: ld  u64 %r6132d c7[0x330] (0)
>2045: mov u32 %r6133 0x0000000c (0)
>2046: ld  u32 %r6134 c7[0x338] (0)
>2047: add u64 %r6135d %r6132d %r6073 (0)
>2048: add u32 %r6136 %r6133 %r6073 (0)
>2049: set u8 %p6137 gt u32 %r6136 %r6134 (0)
>2050: not %p6137 st  u32 # g[%r6135d+0x8] %r6117 (0)
>2051: ld  u64 %r6138d c7[0x330] (0)
>2052: mov u32 %r6139 0x00000010 (0)
>2053: ld  u32 %r6140 c7[0x338] (0)
>2054: add u64 %r6141d %r6138d %r6073 (0)
>2055: add u32 %r6142 %r6139 %r6073 (0)
>2056: set u8 %p6143 gt u32 %r6142 %r6140 (0)
>2057: not %p6143 st  u32 # g[%r6141d+0xc] %r6119 (0)
>2058: membar (SUBOP:7) - # (0)
>2059: bra BB:28 (0)
>BB:28 (2 instructions) - idom = BB:26, df = { BB:34 }
> -> BB:34 (forward)
>2060: join (0)
>2061: bra BB:34 (0)
>BB:29 (18 instructions) - idom = BB:25, df = { BB:34 }
> -> BB:33 (forward)
> -> BB:30 (tree)
>2062: mov u32 %r6144 0x00000001 (0)
>2063: set u32 %r6145 eq %r4003 %r6144 (0)
>2064: mov u32 %r6146 0x00000002 (0)
>2065: mov u32 $r0 %r2717 (0)
>2066: mov u32 $r1 %r6146 (0)
>2067: call abs BUILTIN:1 (0)
>2068: mov u32 %r6147 $r1 (0)
>2069: nop - { $r0 $r2d } (0)
>2070: nop - $p0q (0)
>2071: mov u32 %r6148 0x00000001 (0)
>2072: set u32 %r6149 eq %r6147 %r6148 (0)
>2073: and u32 %r6150 %r6145 %r6149 (0)
>2074: mov u32 %r6151 0x00000000 (0)
>2075: set u32 %r6152 eq %r2715 %r6151 (0)
>2076: and u32 %r6153 %r6150 %r6152 (0)
>2077: joinat BB:33 (0)
>2078: set u8 %p6154 neu u32 0x00000000 %r6153 (0)
>2079: not %p6154 bra BB:33 (0)
>BB:30 (9 instructions) - idom = BB:29, df = { BB:33 }
> -> BB:32 (forward)
> -> BB:31 (tree)
>2080: ld  u32 %r6155 c0[0x0] (0)
>2081: add u32 %r6156 %r2713 %r6155 (0)
>2082: ld  u32 %r6157 c0[0x0] (0)
>2083: ld  u32 %r6158 c0[0x0] (0)
>2084: mul u32 %r6159 %r6157 %r6158 (0)
>2085: set s32 %r6160 lt %r6156 %r6159 (0)
>2086: joinat BB:32 (0)
>2087: set u8 %p6161 neu u32 0x00000000 %r6160 (0)
>2088: not %p6161 bra BB:32 (0)
>BB:31 (252 instructions) - idom = BB:30, df = { BB:32 }
> -> BB:32 (forward)
>2089: mov u32 %r6162 0x00000010 (0)
>2090: mul u32 %r6163 %r2713 %r6162 (0)
>2091: ld  u64 %r6164d c7[0x330] (0)
>2092: mov u32 %r6165 0x00000004 (0)
>2093: ld  u32 %r6166 c7[0x338] (0)
>2094: add u64 %r6167d %r6164d %r6163 (0)
>2095: add u32 %r6168 %r6165 %r6163 (0)
>2096: set u8 %p6169 gt u32 %r6168 %r6166 (0)
>2097: not %p6169 ld  u32 %r6170 g[%r6167d+0x0] (0)
>2098: %p6169 mov u32 %r6171 0x00000000 (0)
>2099: union u32 %r6172 %r6170 %r6171 (0)
>2100: ld  u64 %r6173d c7[0x330] (0)
>2101: mov u32 %r6174 0x00000008 (0)
>2102: ld  u32 %r6175 c7[0x338] (0)
>2103: add u64 %r6176d %r6173d %r6163 (0)
>2104: add u32 %r6177 %r6174 %r6163 (0)
>2105: set u8 %p6178 gt u32 %r6177 %r6175 (0)
>2106: not %p6178 ld  u32 %r6179 g[%r6176d+0x4] (0)
>2107: %p6178 mov u32 %r6180 0x00000000 (0)
>2108: union u32 %r6181 %r6179 %r6180 (0)
>2109: ld  u64 %r6182d c7[0x330] (0)
>2110: mov u32 %r6183 0x0000000c (0)
>2111: ld  u32 %r6184 c7[0x338] (0)
>2112: add u64 %r6185d %r6182d %r6163 (0)
>2113: add u32 %r6186 %r6183 %r6163 (0)
>2114: set u8 %p6187 gt u32 %r6186 %r6184 (0)
>2115: not %p6187 ld  u32 %r6188 g[%r6185d+0x8] (0)
>2116: %p6187 mov u32 %r6189 0x00000000 (0)
>2117: union u32 %r6190 %r6188 %r6189 (0)
>2118: ld  u64 %r6191d c7[0x330] (0)
>2119: mov u32 %r6192 0x00000010 (0)
>2120: ld  u32 %r6193 c7[0x338] (0)
>2121: add u64 %r6194d %r6191d %r6163 (0)
>2122: add u32 %r6195 %r6192 %r6163 (0)
>2123: set u8 %p6196 gt u32 %r6195 %r6193 (0)
>2124: not %p6196 ld  u32 %r6197 g[%r6194d+0xc] (0)
>2125: %p6196 mov u32 %r6198 0x00000000 (0)
>2126: union u32 %r6199 %r6197 %r6198 (0)
>2127: mov u32 %r6204 0x00000010 (0)
>2128: mul u32 %r6205 %r6156 %r6204 (0)
>2129: ld  u64 %r6206d c7[0x330] (0)
>2130: mov u32 %r6207 0x00000004 (0)
>2131: ld  u32 %r6208 c7[0x338] (0)
>2132: add u64 %r6209d %r6206d %r6205 (0)
>2133: add u32 %r6210 %r6207 %r6205 (0)
>2134: set u8 %p6211 gt u32 %r6210 %r6208 (0)
>2135: not %p6211 ld  u32 %r6212 g[%r6209d+0x0] (0)
>2136: %p6211 mov u32 %r6213 0x00000000 (0)
>2137: union u32 %r6214 %r6212 %r6213 (0)
>2138: ld  u64 %r6215d c7[0x330] (0)
>2139: mov u32 %r6216 0x00000008 (0)
>2140: ld  u32 %r6217 c7[0x338] (0)
>2141: add u64 %r6218d %r6215d %r6205 (0)
>2142: add u32 %r6219 %r6216 %r6205 (0)
>2143: set u8 %p6220 gt u32 %r6219 %r6217 (0)
>2144: not %p6220 ld  u32 %r6221 g[%r6218d+0x4] (0)
>2145: %p6220 mov u32 %r6222 0x00000000 (0)
>2146: union u32 %r6223 %r6221 %r6222 (0)
>2147: ld  u64 %r6224d c7[0x330] (0)
>2148: mov u32 %r6225 0x0000000c (0)
>2149: ld  u32 %r6226 c7[0x338] (0)
>2150: add u64 %r6227d %r6224d %r6205 (0)
>2151: add u32 %r6228 %r6225 %r6205 (0)
>2152: set u8 %p6229 gt u32 %r6228 %r6226 (0)
>2153: not %p6229 ld  u32 %r6230 g[%r6227d+0x8] (0)
>2154: %p6229 mov u32 %r6231 0x00000000 (0)
>2155: union u32 %r6232 %r6230 %r6231 (0)
>2156: ld  u64 %r6233d c7[0x330] (0)
>2157: mov u32 %r6234 0x00000010 (0)
>2158: ld  u32 %r6235 c7[0x338] (0)
>2159: add u64 %r6236d %r6233d %r6205 (0)
>2160: add u32 %r6237 %r6234 %r6205 (0)
>2161: set u8 %p6238 gt u32 %r6237 %r6235 (0)
>2162: not %p6238 ld  u32 %r6239 g[%r6236d+0xc] (0)
>2163: %p6238 mov u32 %r6240 0x00000000 (0)
>2164: union u32 %r6241 %r6239 %r6240 (0)
>2165: neg f32 %r6242 %r6214 (0)
>2166: add f32 %r6243 %r6172 %r6242 (0)
>2167: neg f32 %r6244 %r6223 (0)
>2168: add f32 %r6245 %r6181 %r6244 (0)
>2169: neg f32 %r6246 %r6232 (0)
>2170: add f32 %r6247 %r6190 %r6246 (0)
>2171: neg f32 %r6248 %r6241 (0)
>2172: add f32 %r6249 %r6199 %r6248 (0)
>2173: mul f32 %r6250 %r6243 %r6243 (0)
>2174: mad f32 %r6251 %r6245 %r6245 %r6250 (0)
>2175: mad f32 %r6252 %r6247 %r6247 %r6251 (0)
>2176: mad f32 %r6253 %r6249 %r6249 %r6252 (0)
>2177: mov u32 %r6254 %r6253 (0)
>2178: rsq f32 %r6255 %r6254 (0)
>2179: rcp f32 %r6256 %r6255 (0)
>2180: ld  u32 %r6257 c0[0x20] (0)
>2181: neg f32 %r6258 %r6256 (0)
>2182: add f32 %r6259 %r6257 %r6258 (0)
>2183: mov u32 %r6260 0x3eb33333 (0)
>2184: mul f32 %r6261 %r6260 %r6259 (0)
>2185: rcp f32 %r6262 %r6256 (0)
>2186: mul f32 %r6263 %r6261 %r6262 (0)
>2187: mul f32 %r6264 %r6263 %r6243 (0)
>2188: mul f32 %r6265 %r6263 %r6245 (0)
>2189: mul f32 %r6266 %r6263 %r6247 (0)
>2190: mul f32 %r6267 %r6263 %r6249 (0)
>2191: mov u32 %r6268 0x00000010 (0)
>2192: mul u32 %r6269 %r2713 %r6268 (0)
>2193: mov u32 %r6270 0x00000010 (0)
>2194: mul u32 %r6271 %r2713 %r6270 (0)
>2195: ld  u64 %r6272d c7[0x330] (0)
>2196: mov u32 %r6273 0x00000004 (0)
>2197: ld  u32 %r6274 c7[0x338] (0)
>2198: add u64 %r6275d %r6272d %r6271 (0)
>2199: add u32 %r6276 %r6273 %r6271 (0)
>2200: set u8 %p6277 gt u32 %r6276 %r6274 (0)
>2201: not %p6277 ld  u32 %r6278 g[%r6275d+0x0] (0)
>2202: %p6277 mov u32 %r6279 0x00000000 (0)
>2203: union u32 %r6280 %r6278 %r6279 (0)
>2204: ld  u64 %r6281d c7[0x330] (0)
>2205: mov u32 %r6282 0x00000008 (0)
>2206: ld  u32 %r6283 c7[0x338] (0)
>2207: add u64 %r6284d %r6281d %r6271 (0)
>2208: add u32 %r6285 %r6282 %r6271 (0)
>2209: set u8 %p6286 gt u32 %r6285 %r6283 (0)
>2210: not %p6286 ld  u32 %r6287 g[%r6284d+0x4] (0)
>2211: %p6286 mov u32 %r6288 0x00000000 (0)
>2212: union u32 %r6289 %r6287 %r6288 (0)
>2213: ld  u64 %r6290d c7[0x330] (0)
>2214: mov u32 %r6291 0x0000000c (0)
>2215: ld  u32 %r6292 c7[0x338] (0)
>2216: add u64 %r6293d %r6290d %r6271 (0)
>2217: add u32 %r6294 %r6291 %r6271 (0)
>2218: set u8 %p6295 gt u32 %r6294 %r6292 (0)
>2219: not %p6295 ld  u32 %r6296 g[%r6293d+0x8] (0)
>2220: %p6295 mov u32 %r6297 0x00000000 (0)
>2221: union u32 %r6298 %r6296 %r6297 (0)
>2222: ld  u64 %r6299d c7[0x330] (0)
>2223: mov u32 %r6300 0x00000010 (0)
>2224: ld  u32 %r6301 c7[0x338] (0)
>2225: add u64 %r6302d %r6299d %r6271 (0)
>2226: add u32 %r6303 %r6300 %r6271 (0)
>2227: set u8 %p6304 gt u32 %r6303 %r6301 (0)
>2228: not %p6304 ld  u32 %r6305 g[%r6302d+0xc] (0)
>2229: %p6304 mov u32 %r6306 0x00000000 (0)
>2230: union u32 %r6307 %r6305 %r6306 (0)
>2231: add f32 %r6308 %r6280 %r6264 (0)
>2232: add f32 %r6309 %r6289 %r6265 (0)
>2233: add f32 %r6310 %r6298 %r6266 (0)
>2234: add f32 %r6311 %r6307 %r6267 (0)
>2235: ld  u64 %r6312d c7[0x330] (0)
>2236: mov u32 %r6313 0x00000004 (0)
>2237: ld  u32 %r6314 c7[0x338] (0)
>2238: add u64 %r6315d %r6312d %r6269 (0)
>2239: add u32 %r6316 %r6313 %r6269 (0)
>2240: set u8 %p6317 gt u32 %r6316 %r6314 (0)
>2241: not %p6317 st  u32 # g[%r6315d+0x0] %r6308 (0)
>2242: ld  u64 %r6318d c7[0x330] (0)
>2243: mov u32 %r6319 0x00000008 (0)
>2244: ld  u32 %r6320 c7[0x338] (0)
>2245: add u64 %r6321d %r6318d %r6269 (0)
>2246: add u32 %r6322 %r6319 %r6269 (0)
>2247: set u8 %p6323 gt u32 %r6322 %r6320 (0)
>2248: not %p6323 st  u32 # g[%r6321d+0x4] %r6309 (0)
>2249: ld  u64 %r6324d c7[0x330] (0)
>2250: mov u32 %r6325 0x0000000c (0)
>2251: ld  u32 %r6326 c7[0x338] (0)
>2252: add u64 %r6327d %r6324d %r6269 (0)
>2253: add u32 %r6328 %r6325 %r6269 (0)
>2254: set u8 %p6329 gt u32 %r6328 %r6326 (0)
>2255: not %p6329 st  u32 # g[%r6327d+0x8] %r6310 (0)
>2256: ld  u64 %r6330d c7[0x330] (0)
>2257: mov u32 %r6331 0x00000010 (0)
>2258: ld  u32 %r6332 c7[0x338] (0)
>2259: add u64 %r6333d %r6330d %r6269 (0)
>2260: add u32 %r6334 %r6331 %r6269 (0)
>2261: set u8 %p6335 gt u32 %r6334 %r6332 (0)
>2262: not %p6335 st  u32 # g[%r6333d+0xc] %r6311 (0)
>2263: mov u32 %r6336 0x00000010 (0)
>2264: mul u32 %r6337 %r6156 %r6336 (0)
>2265: mov u32 %r6338 0x00000010 (0)
>2266: mul u32 %r6339 %r6156 %r6338 (0)
>2267: ld  u64 %r6340d c7[0x330] (0)
>2268: mov u32 %r6341 0x00000004 (0)
>2269: ld  u32 %r6342 c7[0x338] (0)
>2270: add u64 %r6343d %r6340d %r6339 (0)
>2271: add u32 %r6344 %r6341 %r6339 (0)
>2272: set u8 %p6345 gt u32 %r6344 %r6342 (0)
>2273: not %p6345 ld  u32 %r6346 g[%r6343d+0x0] (0)
>2274: %p6345 mov u32 %r6347 0x00000000 (0)
>2275: union u32 %r6348 %r6346 %r6347 (0)
>2276: ld  u64 %r6349d c7[0x330] (0)
>2277: mov u32 %r6350 0x00000008 (0)
>2278: ld  u32 %r6351 c7[0x338] (0)
>2279: add u64 %r6352d %r6349d %r6339 (0)
>2280: add u32 %r6353 %r6350 %r6339 (0)
>2281: set u8 %p6354 gt u32 %r6353 %r6351 (0)
>2282: not %p6354 ld  u32 %r6355 g[%r6352d+0x4] (0)
>2283: %p6354 mov u32 %r6356 0x00000000 (0)
>2284: union u32 %r6357 %r6355 %r6356 (0)
>2285: ld  u64 %r6358d c7[0x330] (0)
>2286: mov u32 %r6359 0x0000000c (0)
>2287: ld  u32 %r6360 c7[0x338] (0)
>2288: add u64 %r6361d %r6358d %r6339 (0)
>2289: add u32 %r6362 %r6359 %r6339 (0)
>2290: set u8 %p6363 gt u32 %r6362 %r6360 (0)
>2291: not %p6363 ld  u32 %r6364 g[%r6361d+0x8] (0)
>2292: %p6363 mov u32 %r6365 0x00000000 (0)
>2293: union u32 %r6366 %r6364 %r6365 (0)
>2294: ld  u64 %r6367d c7[0x330] (0)
>2295: mov u32 %r6368 0x00000010 (0)
>2296: ld  u32 %r6369 c7[0x338] (0)
>2297: add u64 %r6370d %r6367d %r6339 (0)
>2298: add u32 %r6371 %r6368 %r6339 (0)
>2299: set u8 %p6372 gt u32 %r6371 %r6369 (0)
>2300: not %p6372 ld  u32 %r6373 g[%r6370d+0xc] (0)
>2301: %p6372 mov u32 %r6374 0x00000000 (0)
>2302: union u32 %r6375 %r6373 %r6374 (0)
>2303: neg f32 %r6376 %r6264 (0)
>2304: add f32 %r6377 %r6348 %r6376 (0)
>2305: neg f32 %r6378 %r6265 (0)
>2306: add f32 %r6379 %r6357 %r6378 (0)
>2307: neg f32 %r6380 %r6266 (0)
>2308: add f32 %r6381 %r6366 %r6380 (0)
>2309: neg f32 %r6382 %r6267 (0)
>2310: add f32 %r6383 %r6375 %r6382 (0)
>2311: ld  u64 %r6384d c7[0x330] (0)
>2312: mov u32 %r6385 0x00000004 (0)
>2313: ld  u32 %r6386 c7[0x338] (0)
>2314: add u64 %r6387d %r6384d %r6337 (0)
>2315: add u32 %r6388 %r6385 %r6337 (0)
>2316: set u8 %p6389 gt u32 %r6388 %r6386 (0)
>2317: not %p6389 st  u32 # g[%r6387d+0x0] %r6377 (0)
>2318: ld  u64 %r6390d c7[0x330] (0)
>2319: mov u32 %r6391 0x00000008 (0)
>2320: ld  u32 %r6392 c7[0x338] (0)
>2321: add u64 %r6393d %r6390d %r6337 (0)
>2322: add u32 %r6394 %r6391 %r6337 (0)
>2323: set u8 %p6395 gt u32 %r6394 %r6392 (0)
>2324: not %p6395 st  u32 # g[%r6393d+0x4] %r6379 (0)
>2325: ld  u64 %r6396d c7[0x330] (0)
>2326: mov u32 %r6397 0x0000000c (0)
>2327: ld  u32 %r6398 c7[0x338] (0)
>2328: add u64 %r6399d %r6396d %r6337 (0)
>2329: add u32 %r6400 %r6397 %r6337 (0)
>2330: set u8 %p6401 gt u32 %r6400 %r6398 (0)
>2331: not %p6401 st  u32 # g[%r6399d+0x8] %r6381 (0)
>2332: ld  u64 %r6402d c7[0x330] (0)
>2333: mov u32 %r6403 0x00000010 (0)
>2334: ld  u32 %r6404 c7[0x338] (0)
>2335: add u64 %r6405d %r6402d %r6337 (0)
>2336: add u32 %r6406 %r6403 %r6337 (0)
>2337: set u8 %p6407 gt u32 %r6406 %r6404 (0)
>2338: not %p6407 st  u32 # g[%r6405d+0xc] %r6383 (0)
>2339: membar (SUBOP:7) - # (0)
>2340: bra BB:32 (0)
>BB:32 (2 instructions) - idom = BB:30, df = { BB:33 }
> -> BB:33 (forward)
>2341: join (0)
>2342: bra BB:33 (0)
>BB:33 (2 instructions) - idom = BB:29, df = { BB:34 }
> -> BB:34 (forward)
>2343: join (0)
>2344: bra BB:34 (0)
>BB:34 (2 instructions) - idom = BB:25, df = { BB:35 }
> -> BB:35 (forward)
>2345: join (0)
>2346: bra BB:35 (0)
>BB:35 (14 instructions) - idom = BB:17, df = { BB:14 }
> -> BB:14 (back)
>2347: phi u32 %r5871 %r4929 %r4004 (0)
>2348: phi u32 %r5872 %r4930 %r4005 (0)
>2349: phi u32 %r5873 %r4931 %r4006 (0)
>2350: phi u32 %r5874 %r4932 %r4007 (0)
>2351: phi u32 %r5875 %r5148 %r4008 (0)
>2352: phi u32 %r5876 %r5149 %r4009 (0)
>2353: phi u32 %r5877 %r5150 %r4010 (0)
>2354: phi u32 %r5878 %r5151 %r4011 (0)
>2355: join (0)
>2356: bar u32 # 0x00000000 0x00000000 (0)
>2357: mov u32 %r5879 0x00000001 (0)
>2358: add u32 %r5880 %r4003 %r5879 (0)
>2359: mov u32 %r5881 %r5880 (0)
>2360: cont BB:14 (0)
>BB:15 (3 instructions) - idom = BB:16, df = { BB:10 }
> -> BB:36 (tree)
>2361: mov u32 %r4015 0x00000000 (0)
>2362: mov f32 %r4016 %r4015 (0)
>2363: prebreak BB:37 (0)
>BB:36 (6 instructions) - idom = BB:15, df = { BB:10 BB:36 }
> -> BB:39 (forward)
> -> BB:38 (tree)
>2364: phi u32 %r4017 %r4660 %r4016 (0)
>2365: precont BB:36 (0)
>2366: mov u32 %r4018 0x00000002 (0)
>2367: set s32 %r4019 ge %r4017 %r4018 (0)
>2368: set u8 %p4020 neu u32 0x00000000 %r4019 (0)
>2369: not %p4020 bra BB:39 (0)
>BB:38 (1 instructions) - idom = BB:36, df = { BB:10 }
> -> BB:37 (cross)
>2370: break BB:37 (0)
>BB:39 (22 instructions) - idom = BB:36, df = { BB:36 }
> -> BB:43 (forward)
> -> BB:40 (tree)
>2371: mov u32 %r4135 0x00000002 (0)
>2372: mov u32 $r0 %r2717 (0)
>2373: mov u32 $r1 %r4135 (0)
>2374: call abs BUILTIN:1 (0)
>2375: mov u32 %r4136 $r1 (0)
>2376: nop - { $r0 $r2d } (0)
>2377: nop - $p0q (0)
>2378: set u32 %r4137 eq %r4136 %r4017 (0)
>2379: mov u32 %r4138 0x00000001 (0)
>2380: add u32 %r4139 %r2715 %r4138 (0)
>2381: mov u32 %r4140 0x00000002 (0)
>2382: mov u32 $r0 %r4139 (0)
>2383: mov u32 $r1 %r4140 (0)
>2384: call abs BUILTIN:1 (0)
>2385: mov u32 %r4141 $r1 (0)
>2386: nop - { $r0 $r2d } (0)
>2387: nop - $p0q (0)
>2388: set u32 %r4142 eq %r4141 %r4017 (0)
>2389: and u32 %r4143 %r4137 %r4142 (0)
>2390: joinat BB:43 (0)
>2391: set u8 %p4144 neu u32 0x00000000 %r4143 (0)
>2392: not %p4144 bra BB:43 (0)
>BB:40 (62 instructions) - idom = BB:39, df = { BB:43 }
> -> BB:42 (forward)
> -> BB:41 (tree)
>2393: mov u32 %r4145 0x00000010 (0)
>2394: mul u32 %r4146 %r2713 %r4145 (0)
>2395: ld  u64 %r4147d c7[0x330] (0)
>2396: mov u32 %r4148 0x00000004 (0)
>2397: ld  u32 %r4149 c7[0x338] (0)
>2398: add u64 %r4150d %r4147d %r4146 (0)
>2399: add u32 %r4151 %r4148 %r4146 (0)
>2400: set u8 %p4152 gt u32 %r4151 %r4149 (0)
>2401: not %p4152 ld  u32 %r4153 g[%r4150d+0x0] (0)
>2402: %p4152 mov u32 %r4154 0x00000000 (0)
>2403: union u32 %r4155 %r4153 %r4154 (0)
>2404: ld  u64 %r4156d c7[0x330] (0)
>2405: mov u32 %r4157 0x00000008 (0)
>2406: ld  u32 %r4158 c7[0x338] (0)
>2407: add u64 %r4159d %r4156d %r4146 (0)
>2408: add u32 %r4160 %r4157 %r4146 (0)
>2409: set u8 %p4161 gt u32 %r4160 %r4158 (0)
>2410: not %p4161 ld  u32 %r4162 g[%r4159d+0x4] (0)
>2411: %p4161 mov u32 %r4163 0x00000000 (0)
>2412: union u32 %r4164 %r4162 %r4163 (0)
>2413: ld  u64 %r4165d c7[0x330] (0)
>2414: mov u32 %r4166 0x0000000c (0)
>2415: ld  u32 %r4167 c7[0x338] (0)
>2416: add u64 %r4168d %r4165d %r4146 (0)
>2417: add u32 %r4169 %r4166 %r4146 (0)
>2418: set u8 %p4170 gt u32 %r4169 %r4167 (0)
>2419: not %p4170 ld  u32 %r4171 g[%r4168d+0x8] (0)
>2420: %p4170 mov u32 %r4172 0x00000000 (0)
>2421: union u32 %r4173 %r4171 %r4172 (0)
>2422: ld  u64 %r4174d c7[0x330] (0)
>2423: mov u32 %r4175 0x00000010 (0)
>2424: ld  u32 %r4176 c7[0x338] (0)
>2425: add u64 %r4177d %r4174d %r4146 (0)
>2426: add u32 %r4178 %r4175 %r4146 (0)
>2427: set u8 %p4179 gt u32 %r4178 %r4176 (0)
>2428: not %p4179 ld  u32 %r4180 g[%r4177d+0xc] (0)
>2429: %p4179 mov u32 %r4181 0x00000000 (0)
>2430: union u32 %r4182 %r4180 %r4181 (0)
>2431: mov u32 %r4187 0x00000001 (0)
>2432: add u32 %r4188 %r2713 %r4187 (0)
>2433: ld  u32 %r4189 c0[0x0] (0)
>2434: add u32 %r4190 %r2713 %r4189 (0)
>2435: mov u32 %r4191 0x00000001 (0)
>2436: add u32 %r4192 %r2713 %r4191 (0)
>2437: ld  u32 %r4193 c0[0x0] (0)
>2438: add u32 %r4194 %r4192 %r4193 (0)
>2439: ld  u32 %r4195 c0[0x0] (0)
>2440: ld  u32 %r4196 c0[0x0] (0)
>2441: mul u32 %r4197 %r4195 %r4196 (0)
>2442: set s32 %r4198 lt %r4194 %r4197 (0)
>2443: ld  u32 %r4199 c0[0x0] (0)
>2444: mov u32 $r0 %r4194 (0)
>2445: mov u32 $r1 %r4199 (0)
>2446: call abs BUILTIN:1 (0)
>2447: mov u32 %r4200 $r1 (0)
>2448: nop - { $r0 $r2d } (0)
>2449: nop - $p0q (0)
>2450: set s32 %r4201 lt %r2715 %r4200 (0)
>2451: and u32 %r4202 %r4198 %r4201 (0)
>2452: joinat BB:42 (0)
>2453: set u8 %p4203 neu u32 0x00000000 %r4202 (0)
>2454: not %p4203 bra BB:42 (0)
>BB:41 (464 instructions) - idom = BB:40, df = { BB:42 }
> -> BB:42 (forward)
>2455: mov u32 %r4204 0x00000010 (0)
>2456: mul u32 %r4205 %r4188 %r4204 (0)
>2457: ld  u64 %r4206d c7[0x330] (0)
>2458: mov u32 %r4207 0x00000004 (0)
>2459: ld  u32 %r4208 c7[0x338] (0)
>2460: add u64 %r4209d %r4206d %r4205 (0)
>2461: add u32 %r4210 %r4207 %r4205 (0)
>2462: set u8 %p4211 gt u32 %r4210 %r4208 (0)
>2463: not %p4211 ld  u32 %r4212 g[%r4209d+0x0] (0)
>2464: %p4211 mov u32 %r4213 0x00000000 (0)
>2465: union u32 %r4214 %r4212 %r4213 (0)
>2466: ld  u64 %r4215d c7[0x330] (0)
>2467: mov u32 %r4216 0x00000008 (0)
>2468: ld  u32 %r4217 c7[0x338] (0)
>2469: add u64 %r4218d %r4215d %r4205 (0)
>2470: add u32 %r4219 %r4216 %r4205 (0)
>2471: set u8 %p4220 gt u32 %r4219 %r4217 (0)
>2472: not %p4220 ld  u32 %r4221 g[%r4218d+0x4] (0)
>2473: %p4220 mov u32 %r4222 0x00000000 (0)
>2474: union u32 %r4223 %r4221 %r4222 (0)
>2475: ld  u64 %r4224d c7[0x330] (0)
>2476: mov u32 %r4225 0x0000000c (0)
>2477: ld  u32 %r4226 c7[0x338] (0)
>2478: add u64 %r4227d %r4224d %r4205 (0)
>2479: add u32 %r4228 %r4225 %r4205 (0)
>2480: set u8 %p4229 gt u32 %r4228 %r4226 (0)
>2481: not %p4229 ld  u32 %r4230 g[%r4227d+0x8] (0)
>2482: %p4229 mov u32 %r4231 0x00000000 (0)
>2483: union u32 %r4232 %r4230 %r4231 (0)
>2484: ld  u64 %r4233d c7[0x330] (0)
>2485: mov u32 %r4234 0x00000010 (0)
>2486: ld  u32 %r4235 c7[0x338] (0)
>2487: add u64 %r4236d %r4233d %r4205 (0)
>2488: add u32 %r4237 %r4234 %r4205 (0)
>2489: set u8 %p4238 gt u32 %r4237 %r4235 (0)
>2490: not %p4238 ld  u32 %r4239 g[%r4236d+0xc] (0)
>2491: %p4238 mov u32 %r4240 0x00000000 (0)
>2492: union u32 %r4241 %r4239 %r4240 (0)
>2493: mov u32 %r4246 0x00000010 (0)
>2494: mul u32 %r4247 %r4190 %r4246 (0)
>2495: ld  u64 %r4248d c7[0x330] (0)
>2496: mov u32 %r4249 0x00000004 (0)
>2497: ld  u32 %r4250 c7[0x338] (0)
>2498: add u64 %r4251d %r4248d %r4247 (0)
>2499: add u32 %r4252 %r4249 %r4247 (0)
>2500: set u8 %p4253 gt u32 %r4252 %r4250 (0)
>2501: not %p4253 ld  u32 %r4254 g[%r4251d+0x0] (0)
>2502: %p4253 mov u32 %r4255 0x00000000 (0)
>2503: union u32 %r4256 %r4254 %r4255 (0)
>2504: ld  u64 %r4257d c7[0x330] (0)
>2505: mov u32 %r4258 0x00000008 (0)
>2506: ld  u32 %r4259 c7[0x338] (0)
>2507: add u64 %r4260d %r4257d %r4247 (0)
>2508: add u32 %r4261 %r4258 %r4247 (0)
>2509: set u8 %p4262 gt u32 %r4261 %r4259 (0)
>2510: not %p4262 ld  u32 %r4263 g[%r4260d+0x4] (0)
>2511: %p4262 mov u32 %r4264 0x00000000 (0)
>2512: union u32 %r4265 %r4263 %r4264 (0)
>2513: ld  u64 %r4266d c7[0x330] (0)
>2514: mov u32 %r4267 0x0000000c (0)
>2515: ld  u32 %r4268 c7[0x338] (0)
>2516: add u64 %r4269d %r4266d %r4247 (0)
>2517: add u32 %r4270 %r4267 %r4247 (0)
>2518: set u8 %p4271 gt u32 %r4270 %r4268 (0)
>2519: not %p4271 ld  u32 %r4272 g[%r4269d+0x8] (0)
>2520: %p4271 mov u32 %r4273 0x00000000 (0)
>2521: union u32 %r4274 %r4272 %r4273 (0)
>2522: ld  u64 %r4275d c7[0x330] (0)
>2523: mov u32 %r4276 0x00000010 (0)
>2524: ld  u32 %r4277 c7[0x338] (0)
>2525: add u64 %r4278d %r4275d %r4247 (0)
>2526: add u32 %r4279 %r4276 %r4247 (0)
>2527: set u8 %p4280 gt u32 %r4279 %r4277 (0)
>2528: not %p4280 ld  u32 %r4281 g[%r4278d+0xc] (0)
>2529: %p4280 mov u32 %r4282 0x00000000 (0)
>2530: union u32 %r4283 %r4281 %r4282 (0)
>2531: mov u32 %r4288 0x00000010 (0)
>2532: mul u32 %r4289 %r4194 %r4288 (0)
>2533: ld  u64 %r4290d c7[0x330] (0)
>2534: mov u32 %r4291 0x00000004 (0)
>2535: ld  u32 %r4292 c7[0x338] (0)
>2536: add u64 %r4293d %r4290d %r4289 (0)
>2537: add u32 %r4294 %r4291 %r4289 (0)
>2538: set u8 %p4295 gt u32 %r4294 %r4292 (0)
>2539: not %p4295 ld  u32 %r4296 g[%r4293d+0x0] (0)
>2540: %p4295 mov u32 %r4297 0x00000000 (0)
>2541: union u32 %r4298 %r4296 %r4297 (0)
>2542: ld  u64 %r4299d c7[0x330] (0)
>2543: mov u32 %r4300 0x00000008 (0)
>2544: ld  u32 %r4301 c7[0x338] (0)
>2545: add u64 %r4302d %r4299d %r4289 (0)
>2546: add u32 %r4303 %r4300 %r4289 (0)
>2547: set u8 %p4304 gt u32 %r4303 %r4301 (0)
>2548: not %p4304 ld  u32 %r4305 g[%r4302d+0x4] (0)
>2549: %p4304 mov u32 %r4306 0x00000000 (0)
>2550: union u32 %r4307 %r4305 %r4306 (0)
>2551: ld  u64 %r4308d c7[0x330] (0)
>2552: mov u32 %r4309 0x0000000c (0)
>2553: ld  u32 %r4310 c7[0x338] (0)
>2554: add u64 %r4311d %r4308d %r4289 (0)
>2555: add u32 %r4312 %r4309 %r4289 (0)
>2556: set u8 %p4313 gt u32 %r4312 %r4310 (0)
>2557: not %p4313 ld  u32 %r4314 g[%r4311d+0x8] (0)
>2558: %p4313 mov u32 %r4315 0x00000000 (0)
>2559: union u32 %r4316 %r4314 %r4315 (0)
>2560: ld  u64 %r4317d c7[0x330] (0)
>2561: mov u32 %r4318 0x00000010 (0)
>2562: ld  u32 %r4319 c7[0x338] (0)
>2563: add u64 %r4320d %r4317d %r4289 (0)
>2564: add u32 %r4321 %r4318 %r4289 (0)
>2565: set u8 %p4322 gt u32 %r4321 %r4319 (0)
>2566: not %p4322 ld  u32 %r4323 g[%r4320d+0xc] (0)
>2567: %p4322 mov u32 %r4324 0x00000000 (0)
>2568: union u32 %r4325 %r4323 %r4324 (0)
>2569: neg f32 %r4326 %r4298 (0)
>2570: add f32 %r4327 %r4155 %r4326 (0)
>2571: neg f32 %r4328 %r4307 (0)
>2572: add f32 %r4329 %r4164 %r4328 (0)
>2573: neg f32 %r4330 %r4316 (0)
>2574: add f32 %r4331 %r4173 %r4330 (0)
>2575: neg f32 %r4332 %r4325 (0)
>2576: add f32 %r4333 %r4182 %r4332 (0)
>2577: mul f32 %r4334 %r4327 %r4327 (0)
>2578: mad f32 %r4335 %r4329 %r4329 %r4334 (0)
>2579: mad f32 %r4336 %r4331 %r4331 %r4335 (0)
>2580: mad f32 %r4337 %r4333 %r4333 %r4336 (0)
>2581: mov u32 %r4338 %r4337 (0)
>2582: rsq f32 %r4339 %r4338 (0)
>2583: rcp f32 %r4340 %r4339 (0)
>2584: ld  u32 %r4341 c0[0x30] (0)
>2585: neg f32 %r4342 %r4340 (0)
>2586: add f32 %r4343 %r4341 %r4342 (0)
>2587: mov u32 %r4344 0x3eb33333 (0)
>2588: mul f32 %r4345 %r4344 %r4343 (0)
>2589: rcp f32 %r4346 %r4340 (0)
>2590: mul f32 %r4347 %r4345 %r4346 (0)
>2591: mul f32 %r4348 %r4347 %r4327 (0)
>2592: mul f32 %r4349 %r4347 %r4329 (0)
>2593: mul f32 %r4350 %r4347 %r4331 (0)
>2594: mul f32 %r4351 %r4347 %r4333 (0)
>2595: mov u32 %r4352 0x00000010 (0)
>2596: mul u32 %r4353 %r2713 %r4352 (0)
>2597: mov u32 %r4354 0x00000010 (0)
>2598: mul u32 %r4355 %r2713 %r4354 (0)
>2599: ld  u64 %r4356d c7[0x330] (0)
>2600: mov u32 %r4357 0x00000004 (0)
>2601: ld  u32 %r4358 c7[0x338] (0)
>2602: add u64 %r4359d %r4356d %r4355 (0)
>2603: add u32 %r4360 %r4357 %r4355 (0)
>2604: set u8 %p4361 gt u32 %r4360 %r4358 (0)
>2605: not %p4361 ld  u32 %r4362 g[%r4359d+0x0] (0)
>2606: %p4361 mov u32 %r4363 0x00000000 (0)
>2607: union u32 %r4364 %r4362 %r4363 (0)
>2608: ld  u64 %r4365d c7[0x330] (0)
>2609: mov u32 %r4366 0x00000008 (0)
>2610: ld  u32 %r4367 c7[0x338] (0)
>2611: add u64 %r4368d %r4365d %r4355 (0)
>2612: add u32 %r4369 %r4366 %r4355 (0)
>2613: set u8 %p4370 gt u32 %r4369 %r4367 (0)
>2614: not %p4370 ld  u32 %r4371 g[%r4368d+0x4] (0)
>2615: %p4370 mov u32 %r4372 0x00000000 (0)
>2616: union u32 %r4373 %r4371 %r4372 (0)
>2617: ld  u64 %r4374d c7[0x330] (0)
>2618: mov u32 %r4375 0x0000000c (0)
>2619: ld  u32 %r4376 c7[0x338] (0)
>2620: add u64 %r4377d %r4374d %r4355 (0)
>2621: add u32 %r4378 %r4375 %r4355 (0)
>2622: set u8 %p4379 gt u32 %r4378 %r4376 (0)
>2623: not %p4379 ld  u32 %r4380 g[%r4377d+0x8] (0)
>2624: %p4379 mov u32 %r4381 0x00000000 (0)
>2625: union u32 %r4382 %r4380 %r4381 (0)
>2626: ld  u64 %r4383d c7[0x330] (0)
>2627: mov u32 %r4384 0x00000010 (0)
>2628: ld  u32 %r4385 c7[0x338] (0)
>2629: add u64 %r4386d %r4383d %r4355 (0)
>2630: add u32 %r4387 %r4384 %r4355 (0)
>2631: set u8 %p4388 gt u32 %r4387 %r4385 (0)
>2632: not %p4388 ld  u32 %r4389 g[%r4386d+0xc] (0)
>2633: %p4388 mov u32 %r4390 0x00000000 (0)
>2634: union u32 %r4391 %r4389 %r4390 (0)
>2635: add f32 %r4392 %r4364 %r4348 (0)
>2636: add f32 %r4393 %r4373 %r4349 (0)
>2637: add f32 %r4394 %r4382 %r4350 (0)
>2638: add f32 %r4395 %r4391 %r4351 (0)
>2639: ld  u64 %r4396d c7[0x330] (0)
>2640: mov u32 %r4397 0x00000004 (0)
>2641: ld  u32 %r4398 c7[0x338] (0)
>2642: add u64 %r4399d %r4396d %r4353 (0)
>2643: add u32 %r4400 %r4397 %r4353 (0)
>2644: set u8 %p4401 gt u32 %r4400 %r4398 (0)
>2645: not %p4401 st  u32 # g[%r4399d+0x0] %r4392 (0)
>2646: ld  u64 %r4402d c7[0x330] (0)
>2647: mov u32 %r4403 0x00000008 (0)
>2648: ld  u32 %r4404 c7[0x338] (0)
>2649: add u64 %r4405d %r4402d %r4353 (0)
>2650: add u32 %r4406 %r4403 %r4353 (0)
>2651: set u8 %p4407 gt u32 %r4406 %r4404 (0)
>2652: not %p4407 st  u32 # g[%r4405d+0x4] %r4393 (0)
>2653: ld  u64 %r4408d c7[0x330] (0)
>2654: mov u32 %r4409 0x0000000c (0)
>2655: ld  u32 %r4410 c7[0x338] (0)
>2656: add u64 %r4411d %r4408d %r4353 (0)
>2657: add u32 %r4412 %r4409 %r4353 (0)
>2658: set u8 %p4413 gt u32 %r4412 %r4410 (0)
>2659: not %p4413 st  u32 # g[%r4411d+0x8] %r4394 (0)
>2660: ld  u64 %r4414d c7[0x330] (0)
>2661: mov u32 %r4415 0x00000010 (0)
>2662: ld  u32 %r4416 c7[0x338] (0)
>2663: add u64 %r4417d %r4414d %r4353 (0)
>2664: add u32 %r4418 %r4415 %r4353 (0)
>2665: set u8 %p4419 gt u32 %r4418 %r4416 (0)
>2666: not %p4419 st  u32 # g[%r4417d+0xc] %r4395 (0)
>2667: mov u32 %r4420 0x00000010 (0)
>2668: mul u32 %r4421 %r4194 %r4420 (0)
>2669: mov u32 %r4422 0x00000010 (0)
>2670: mul u32 %r4423 %r4194 %r4422 (0)
>2671: ld  u64 %r4424d c7[0x330] (0)
>2672: mov u32 %r4425 0x00000004 (0)
>2673: ld  u32 %r4426 c7[0x338] (0)
>2674: add u64 %r4427d %r4424d %r4423 (0)
>2675: add u32 %r4428 %r4425 %r4423 (0)
>2676: set u8 %p4429 gt u32 %r4428 %r4426 (0)
>2677: not %p4429 ld  u32 %r4430 g[%r4427d+0x0] (0)
>2678: %p4429 mov u32 %r4431 0x00000000 (0)
>2679: union u32 %r4432 %r4430 %r4431 (0)
>2680: ld  u64 %r4433d c7[0x330] (0)
>2681: mov u32 %r4434 0x00000008 (0)
>2682: ld  u32 %r4435 c7[0x338] (0)
>2683: add u64 %r4436d %r4433d %r4423 (0)
>2684: add u32 %r4437 %r4434 %r4423 (0)
>2685: set u8 %p4438 gt u32 %r4437 %r4435 (0)
>2686: not %p4438 ld  u32 %r4439 g[%r4436d+0x4] (0)
>2687: %p4438 mov u32 %r4440 0x00000000 (0)
>2688: union u32 %r4441 %r4439 %r4440 (0)
>2689: ld  u64 %r4442d c7[0x330] (0)
>2690: mov u32 %r4443 0x0000000c (0)
>2691: ld  u32 %r4444 c7[0x338] (0)
>2692: add u64 %r4445d %r4442d %r4423 (0)
>2693: add u32 %r4446 %r4443 %r4423 (0)
>2694: set u8 %p4447 gt u32 %r4446 %r4444 (0)
>2695: not %p4447 ld  u32 %r4448 g[%r4445d+0x8] (0)
>2696: %p4447 mov u32 %r4449 0x00000000 (0)
>2697: union u32 %r4450 %r4448 %r4449 (0)
>2698: ld  u64 %r4451d c7[0x330] (0)
>2699: mov u32 %r4452 0x00000010 (0)
>2700: ld  u32 %r4453 c7[0x338] (0)
>2701: add u64 %r4454d %r4451d %r4423 (0)
>2702: add u32 %r4455 %r4452 %r4423 (0)
>2703: set u8 %p4456 gt u32 %r4455 %r4453 (0)
>2704: not %p4456 ld  u32 %r4457 g[%r4454d+0xc] (0)
>2705: %p4456 mov u32 %r4458 0x00000000 (0)
>2706: union u32 %r4459 %r4457 %r4458 (0)
>2707: neg f32 %r4460 %r4348 (0)
>2708: add f32 %r4461 %r4432 %r4460 (0)
>2709: neg f32 %r4462 %r4349 (0)
>2710: add f32 %r4463 %r4441 %r4462 (0)
>2711: neg f32 %r4464 %r4350 (0)
>2712: add f32 %r4465 %r4450 %r4464 (0)
>2713: neg f32 %r4466 %r4351 (0)
>2714: add f32 %r4467 %r4459 %r4466 (0)
>2715: ld  u64 %r4468d c7[0x330] (0)
>2716: mov u32 %r4469 0x00000004 (0)
>2717: ld  u32 %r4470 c7[0x338] (0)
>2718: add u64 %r4471d %r4468d %r4421 (0)
>2719: add u32 %r4472 %r4469 %r4421 (0)
>2720: set u8 %p4473 gt u32 %r4472 %r4470 (0)
>2721: not %p4473 st  u32 # g[%r4471d+0x0] %r4461 (0)
>2722: ld  u64 %r4474d c7[0x330] (0)
>2723: mov u32 %r4475 0x00000008 (0)
>2724: ld  u32 %r4476 c7[0x338] (0)
>2725: add u64 %r4477d %r4474d %r4421 (0)
>2726: add u32 %r4478 %r4475 %r4421 (0)
>2727: set u8 %p4479 gt u32 %r4478 %r4476 (0)
>2728: not %p4479 st  u32 # g[%r4477d+0x4] %r4463 (0)
>2729: ld  u64 %r4480d c7[0x330] (0)
>2730: mov u32 %r4481 0x0000000c (0)
>2731: ld  u32 %r4482 c7[0x338] (0)
>2732: add u64 %r4483d %r4480d %r4421 (0)
>2733: add u32 %r4484 %r4481 %r4421 (0)
>2734: set u8 %p4485 gt u32 %r4484 %r4482 (0)
>2735: not %p4485 st  u32 # g[%r4483d+0x8] %r4465 (0)
>2736: ld  u64 %r4486d c7[0x330] (0)
>2737: mov u32 %r4487 0x00000010 (0)
>2738: ld  u32 %r4488 c7[0x338] (0)
>2739: add u64 %r4489d %r4486d %r4421 (0)
>2740: add u32 %r4490 %r4487 %r4421 (0)
>2741: set u8 %p4491 gt u32 %r4490 %r4488 (0)
>2742: not %p4491 st  u32 # g[%r4489d+0xc] %r4467 (0)
>2743: neg f32 %r4492 %r4256 (0)
>2744: add f32 %r4493 %r4214 %r4492 (0)
>2745: neg f32 %r4494 %r4265 (0)
>2746: add f32 %r4495 %r4223 %r4494 (0)
>2747: neg f32 %r4496 %r4274 (0)
>2748: add f32 %r4497 %r4232 %r4496 (0)
>2749: neg f32 %r4498 %r4283 (0)
>2750: add f32 %r4499 %r4241 %r4498 (0)
>2751: mul f32 %r4500 %r4493 %r4493 (0)
>2752: mad f32 %r4501 %r4495 %r4495 %r4500 (0)
>2753: mad f32 %r4502 %r4497 %r4497 %r4501 (0)
>2754: mad f32 %r4503 %r4499 %r4499 %r4502 (0)
>2755: mov u32 %r4504 %r4503 (0)
>2756: rsq f32 %r4505 %r4504 (0)
>2757: rcp f32 %r4506 %r4505 (0)
>2758: ld  u32 %r4507 c0[0x30] (0)
>2759: neg f32 %r4508 %r4506 (0)
>2760: add f32 %r4509 %r4507 %r4508 (0)
>2761: mov u32 %r4510 0x3eb33333 (0)
>2762: mul f32 %r4511 %r4510 %r4509 (0)
>2763: rcp f32 %r4512 %r4506 (0)
>2764: mul f32 %r4513 %r4511 %r4512 (0)
>2765: mul f32 %r4514 %r4513 %r4493 (0)
>2766: mul f32 %r4515 %r4513 %r4495 (0)
>2767: mul f32 %r4516 %r4513 %r4497 (0)
>2768: mul f32 %r4517 %r4513 %r4499 (0)
>2769: mov u32 %r4518 0x00000010 (0)
>2770: mul u32 %r4519 %r4188 %r4518 (0)
>2771: mov u32 %r4520 0x00000010 (0)
>2772: mul u32 %r4521 %r4188 %r4520 (0)
>2773: ld  u64 %r4522d c7[0x330] (0)
>2774: mov u32 %r4523 0x00000004 (0)
>2775: ld  u32 %r4524 c7[0x338] (0)
>2776: add u64 %r4525d %r4522d %r4521 (0)
>2777: add u32 %r4526 %r4523 %r4521 (0)
>2778: set u8 %p4527 gt u32 %r4526 %r4524 (0)
>2779: not %p4527 ld  u32 %r4528 g[%r4525d+0x0] (0)
>2780: %p4527 mov u32 %r4529 0x00000000 (0)
>2781: union u32 %r4530 %r4528 %r4529 (0)
>2782: ld  u64 %r4531d c7[0x330] (0)
>2783: mov u32 %r4532 0x00000008 (0)
>2784: ld  u32 %r4533 c7[0x338] (0)
>2785: add u64 %r4534d %r4531d %r4521 (0)
>2786: add u32 %r4535 %r4532 %r4521 (0)
>2787: set u8 %p4536 gt u32 %r4535 %r4533 (0)
>2788: not %p4536 ld  u32 %r4537 g[%r4534d+0x4] (0)
>2789: %p4536 mov u32 %r4538 0x00000000 (0)
>2790: union u32 %r4539 %r4537 %r4538 (0)
>2791: ld  u64 %r4540d c7[0x330] (0)
>2792: mov u32 %r4541 0x0000000c (0)
>2793: ld  u32 %r4542 c7[0x338] (0)
>2794: add u64 %r4543d %r4540d %r4521 (0)
>2795: add u32 %r4544 %r4541 %r4521 (0)
>2796: set u8 %p4545 gt u32 %r4544 %r4542 (0)
>2797: not %p4545 ld  u32 %r4546 g[%r4543d+0x8] (0)
>2798: %p4545 mov u32 %r4547 0x00000000 (0)
>2799: union u32 %r4548 %r4546 %r4547 (0)
>2800: ld  u64 %r4549d c7[0x330] (0)
>2801: mov u32 %r4550 0x00000010 (0)
>2802: ld  u32 %r4551 c7[0x338] (0)
>2803: add u64 %r4552d %r4549d %r4521 (0)
>2804: add u32 %r4553 %r4550 %r4521 (0)
>2805: set u8 %p4554 gt u32 %r4553 %r4551 (0)
>2806: not %p4554 ld  u32 %r4555 g[%r4552d+0xc] (0)
>2807: %p4554 mov u32 %r4556 0x00000000 (0)
>2808: union u32 %r4557 %r4555 %r4556 (0)
>2809: add f32 %r4558 %r4530 %r4514 (0)
>2810: add f32 %r4559 %r4539 %r4515 (0)
>2811: add f32 %r4560 %r4548 %r4516 (0)
>2812: add f32 %r4561 %r4557 %r4517 (0)
>2813: ld  u64 %r4562d c7[0x330] (0)
>2814: mov u32 %r4563 0x00000004 (0)
>2815: ld  u32 %r4564 c7[0x338] (0)
>2816: add u64 %r4565d %r4562d %r4519 (0)
>2817: add u32 %r4566 %r4563 %r4519 (0)
>2818: set u8 %p4567 gt u32 %r4566 %r4564 (0)
>2819: not %p4567 st  u32 # g[%r4565d+0x0] %r4558 (0)
>2820: ld  u64 %r4568d c7[0x330] (0)
>2821: mov u32 %r4569 0x00000008 (0)
>2822: ld  u32 %r4570 c7[0x338] (0)
>2823: add u64 %r4571d %r4568d %r4519 (0)
>2824: add u32 %r4572 %r4569 %r4519 (0)
>2825: set u8 %p4573 gt u32 %r4572 %r4570 (0)
>2826: not %p4573 st  u32 # g[%r4571d+0x4] %r4559 (0)
>2827: ld  u64 %r4574d c7[0x330] (0)
>2828: mov u32 %r4575 0x0000000c (0)
>2829: ld  u32 %r4576 c7[0x338] (0)
>2830: add u64 %r4577d %r4574d %r4519 (0)
>2831: add u32 %r4578 %r4575 %r4519 (0)
>2832: set u8 %p4579 gt u32 %r4578 %r4576 (0)
>2833: not %p4579 st  u32 # g[%r4577d+0x8] %r4560 (0)
>2834: ld  u64 %r4580d c7[0x330] (0)
>2835: mov u32 %r4581 0x00000010 (0)
>2836: ld  u32 %r4582 c7[0x338] (0)
>2837: add u64 %r4583d %r4580d %r4519 (0)
>2838: add u32 %r4584 %r4581 %r4519 (0)
>2839: set u8 %p4585 gt u32 %r4584 %r4582 (0)
>2840: not %p4585 st  u32 # g[%r4583d+0xc] %r4561 (0)
>2841: mov u32 %r4586 0x00000010 (0)
>2842: mul u32 %r4587 %r4190 %r4586 (0)
>2843: mov u32 %r4588 0x00000010 (0)
>2844: mul u32 %r4589 %r4190 %r4588 (0)
>2845: ld  u64 %r4590d c7[0x330] (0)
>2846: mov u32 %r4591 0x00000004 (0)
>2847: ld  u32 %r4592 c7[0x338] (0)
>2848: add u64 %r4593d %r4590d %r4589 (0)
>2849: add u32 %r4594 %r4591 %r4589 (0)
>2850: set u8 %p4595 gt u32 %r4594 %r4592 (0)
>2851: not %p4595 ld  u32 %r4596 g[%r4593d+0x0] (0)
>2852: %p4595 mov u32 %r4597 0x00000000 (0)
>2853: union u32 %r4598 %r4596 %r4597 (0)
>2854: ld  u64 %r4599d c7[0x330] (0)
>2855: mov u32 %r4600 0x00000008 (0)
>2856: ld  u32 %r4601 c7[0x338] (0)
>2857: add u64 %r4602d %r4599d %r4589 (0)
>2858: add u32 %r4603 %r4600 %r4589 (0)
>2859: set u8 %p4604 gt u32 %r4603 %r4601 (0)
>2860: not %p4604 ld  u32 %r4605 g[%r4602d+0x4] (0)
>2861: %p4604 mov u32 %r4606 0x00000000 (0)
>2862: union u32 %r4607 %r4605 %r4606 (0)
>2863: ld  u64 %r4608d c7[0x330] (0)
>2864: mov u32 %r4609 0x0000000c (0)
>2865: ld  u32 %r4610 c7[0x338] (0)
>2866: add u64 %r4611d %r4608d %r4589 (0)
>2867: add u32 %r4612 %r4609 %r4589 (0)
>2868: set u8 %p4613 gt u32 %r4612 %r4610 (0)
>2869: not %p4613 ld  u32 %r4614 g[%r4611d+0x8] (0)
>2870: %p4613 mov u32 %r4615 0x00000000 (0)
>2871: union u32 %r4616 %r4614 %r4615 (0)
>2872: ld  u64 %r4617d c7[0x330] (0)
>2873: mov u32 %r4618 0x00000010 (0)
>2874: ld  u32 %r4619 c7[0x338] (0)
>2875: add u64 %r4620d %r4617d %r4589 (0)
>2876: add u32 %r4621 %r4618 %r4589 (0)
>2877: set u8 %p4622 gt u32 %r4621 %r4619 (0)
>2878: not %p4622 ld  u32 %r4623 g[%r4620d+0xc] (0)
>2879: %p4622 mov u32 %r4624 0x00000000 (0)
>2880: union u32 %r4625 %r4623 %r4624 (0)
>2881: neg f32 %r4626 %r4514 (0)
>2882: add f32 %r4627 %r4598 %r4626 (0)
>2883: neg f32 %r4628 %r4515 (0)
>2884: add f32 %r4629 %r4607 %r4628 (0)
>2885: neg f32 %r4630 %r4516 (0)
>2886: add f32 %r4631 %r4616 %r4630 (0)
>2887: neg f32 %r4632 %r4517 (0)
>2888: add f32 %r4633 %r4625 %r4632 (0)
>2889: ld  u64 %r4634d c7[0x330] (0)
>2890: mov u32 %r4635 0x00000004 (0)
>2891: ld  u32 %r4636 c7[0x338] (0)
>2892: add u64 %r4637d %r4634d %r4587 (0)
>2893: add u32 %r4638 %r4635 %r4587 (0)
>2894: set u8 %p4639 gt u32 %r4638 %r4636 (0)
>2895: not %p4639 st  u32 # g[%r4637d+0x0] %r4627 (0)
>2896: ld  u64 %r4640d c7[0x330] (0)
>2897: mov u32 %r4641 0x00000008 (0)
>2898: ld  u32 %r4642 c7[0x338] (0)
>2899: add u64 %r4643d %r4640d %r4587 (0)
>2900: add u32 %r4644 %r4641 %r4587 (0)
>2901: set u8 %p4645 gt u32 %r4644 %r4642 (0)
>2902: not %p4645 st  u32 # g[%r4643d+0x4] %r4629 (0)
>2903: ld  u64 %r4646d c7[0x330] (0)
>2904: mov u32 %r4647 0x0000000c (0)
>2905: ld  u32 %r4648 c7[0x338] (0)
>2906: add u64 %r4649d %r4646d %r4587 (0)
>2907: add u32 %r4650 %r4647 %r4587 (0)
>2908: set u8 %p4651 gt u32 %r4650 %r4648 (0)
>2909: not %p4651 st  u32 # g[%r4649d+0x8] %r4631 (0)
>2910: ld  u64 %r4652d c7[0x330] (0)
>2911: mov u32 %r4653 0x00000010 (0)
>2912: ld  u32 %r4654 c7[0x338] (0)
>2913: add u64 %r4655d %r4652d %r4587 (0)
>2914: add u32 %r4656 %r4653 %r4587 (0)
>2915: set u8 %p4657 gt u32 %r4656 %r4654 (0)
>2916: not %p4657 st  u32 # g[%r4655d+0xc] %r4633 (0)
>2917: membar (SUBOP:7) - # (0)
>2918: bra BB:42 (0)
>BB:42 (2 instructions) - idom = BB:40, df = { BB:43 }
> -> BB:43 (forward)
>2919: join (0)
>2920: bra BB:43 (0)
>BB:43 (6 instructions) - idom = BB:39, df = { BB:36 }
> -> BB:36 (back)
>2921: join (0)
>2922: bar u32 # 0x00000000 0x00000000 (0)
>2923: mov u32 %r4658 0x00000001 (0)
>2924: add u32 %r4659 %r4017 %r4658 (0)
>2925: mov u32 %r4660 %r4659 (0)
>2926: cont BB:36 (0)
>BB:11 (14 instructions) - idom = BB:12, df = { }
> -> BB:51 (forward)
> -> BB:46 (tree)
>2927: mov u32 %r3148 0x00000000 (0)
>2928: mov f32 %r3149 %r3148 (0)
>2929: mov u32 %r3150 0x00000000 (0)
>2930: mov f32 %r3151 %r3150 (0)
>2931: mov u32 %r3152 0x00000000 (0)
>2932: mov f32 %r3153 %r3152 (0)
>2933: ld  u32 %r3154 c0[0x0] (0)
>2934: mov u32 %r3155 0xffffffff (0)
>2935: add u32 %r3156 %r3154 %r3155 (0)
>2936: set s32 %r3157 lt %r2715 %r3156 (0)
>2937: mov u32 %r3158 %r3157 (0)
>2938: joinat BB:51 (0)
>2939: set u8 %p3159 neu u32 0x00000000 %r3158 (0)
>2940: not %p3159 bra BB:51 (0)
>BB:46 (98 instructions) - idom = BB:11, df = { BB:51 }
> -> BB:48 (forward)
> -> BB:47 (tree)
>2941: mov u32 %r3160 0x00000001 (0)
>2942: add u32 %r3161 %r2713 %r3160 (0)
>2943: mov u32 %r3162 0x00000010 (0)
>2944: mul u32 %r3163 %r3161 %r3162 (0)
>2945: mov u32 %r3164 %r3163 (0)
>2946: ld  u64 %r3165d c7[0x330] (0)
>2947: mov u32 %r3166 0x00000004 (0)
>2948: ld  u32 %r3167 c7[0x338] (0)
>2949: add u64 %r3168d %r3165d %r3164 (0)
>2950: add u32 %r3169 %r3166 %r3164 (0)
>2951: set u8 %p3170 gt u32 %r3169 %r3167 (0)
>2952: not %p3170 ld  u32 %r3171 g[%r3168d+0x0] (0)
>2953: %p3170 mov u32 %r3172 0x00000000 (0)
>2954: union u32 %r3173 %r3171 %r3172 (0)
>2955: ld  u64 %r3174d c7[0x330] (0)
>2956: mov u32 %r3175 0x00000008 (0)
>2957: ld  u32 %r3176 c7[0x338] (0)
>2958: add u64 %r3177d %r3174d %r3164 (0)
>2959: add u32 %r3178 %r3175 %r3164 (0)
>2960: set u8 %p3179 gt u32 %r3178 %r3176 (0)
>2961: not %p3179 ld  u32 %r3180 g[%r3177d+0x4] (0)
>2962: %p3179 mov u32 %r3181 0x00000000 (0)
>2963: union u32 %r3182 %r3180 %r3181 (0)
>2964: ld  u64 %r3183d c7[0x330] (0)
>2965: mov u32 %r3184 0x0000000c (0)
>2966: ld  u32 %r3185 c7[0x338] (0)
>2967: add u64 %r3186d %r3183d %r3164 (0)
>2968: add u32 %r3187 %r3184 %r3164 (0)
>2969: set u8 %p3188 gt u32 %r3187 %r3185 (0)
>2970: not %p3188 ld  u32 %r3189 g[%r3186d+0x8] (0)
>2971: %p3188 mov u32 %r3190 0x00000000 (0)
>2972: union u32 %r3191 %r3189 %r3190 (0)
>2973: mov u32 %r3201 %r3173 (0)
>2974: mov u32 %r3202 %r3182 (0)
>2975: mov u32 %r3203 %r3191 (0)
>2976: mov u32 %r3205 0x00000010 (0)
>2977: mul u32 %r3206 %r2713 %r3205 (0)
>2978: ld  u64 %r3207d c7[0x330] (0)
>2979: mov u32 %r3208 0x00000004 (0)
>2980: ld  u32 %r3209 c7[0x338] (0)
>2981: add u64 %r3210d %r3207d %r3206 (0)
>2982: add u32 %r3211 %r3208 %r3206 (0)
>2983: set u8 %p3212 gt u32 %r3211 %r3209 (0)
>2984: not %p3212 ld  u32 %r3213 g[%r3210d+0x0] (0)
>2985: %p3212 mov u32 %r3214 0x00000000 (0)
>2986: union u32 %r3215 %r3213 %r3214 (0)
>2987: ld  u64 %r3216d c7[0x330] (0)
>2988: mov u32 %r3217 0x00000008 (0)
>2989: ld  u32 %r3218 c7[0x338] (0)
>2990: add u64 %r3219d %r3216d %r3206 (0)
>2991: add u32 %r3220 %r3217 %r3206 (0)
>2992: set u8 %p3221 gt u32 %r3220 %r3218 (0)
>2993: not %p3221 ld  u32 %r3222 g[%r3219d+0x4] (0)
>2994: %p3221 mov u32 %r3223 0x00000000 (0)
>2995: union u32 %r3224 %r3222 %r3223 (0)
>2996: ld  u64 %r3225d c7[0x330] (0)
>2997: mov u32 %r3226 0x0000000c (0)
>2998: ld  u32 %r3227 c7[0x338] (0)
>2999: add u64 %r3228d %r3225d %r3206 (0)
>3000: add u32 %r3229 %r3226 %r3206 (0)
>3001: set u8 %p3230 gt u32 %r3229 %r3227 (0)
>3002: not %p3230 ld  u32 %r3231 g[%r3228d+0x8] (0)
>3003: %p3230 mov u32 %r3232 0x00000000 (0)
>3004: union u32 %r3233 %r3231 %r3232 (0)
>3005: mov u32 %r3243 %r3215 (0)
>3006: mov u32 %r3244 %r3224 (0)
>3007: mov u32 %r3245 %r3233 (0)
>3008: neg f32 %r3247 %r3243 (0)
>3009: add f32 %r3248 %r3201 %r3247 (0)
>3010: neg f32 %r3249 %r3244 (0)
>3011: add f32 %r3250 %r3202 %r3249 (0)
>3012: neg f32 %r3251 %r3245 (0)
>3013: add f32 %r3252 %r3203 %r3251 (0)
>3014: mov u32 %r3253 %r3248 (0)
>3015: mov u32 %r3254 %r3250 (0)
>3016: mov u32 %r3255 %r3252 (0)
>3017: mul f32 %r3256 %r3253 %r3253 (0)
>3018: mad f32 %r3257 %r3254 %r3254 %r3256 (0)
>3019: mad f32 %r3258 %r3255 %r3255 %r3257 (0)
>3020: mov u32 %r3259 %r3258 (0)
>3021: abs f32 %r3260 %r3259 (0)
>3022: rsq f32 %r3261 %r3260 (0)
>3023: mov u32 %r3262 %r3261 (0)
>3024: mov u32 %r3263 %r3262 (0)
>3025: mul f32 %r3264 %r3253 %r3263 (0)
>3026: mul f32 %r3265 %r3254 %r3263 (0)
>3027: mul f32 %r3266 %r3255 %r3263 (0)
>3028: mov u32 %r3267 %r3264 (0)
>3029: mov u32 %r3268 %r3265 (0)
>3030: mov u32 %r3269 %r3266 (0)
>3031: ld  u32 %r3270 c0[0x0] (0)
>3032: mov u32 %r3271 0xffffffff (0)
>3033: add u32 %r3272 %r3270 %r3271 (0)
>3034: set s32 %r3273 lt %r2717 %r3272 (0)
>3035: mov u32 %r3274 %r3273 (0)
>3036: joinat BB:48 (0)
>3037: set u8 %p3275 neu u32 0x00000000 %r3274 (0)
>3038: not %p3275 bra BB:48 (0)
>BB:47 (114 instructions) - idom = BB:46, df = { BB:48 }
> -> BB:48 (forward)
>3039: ld  u32 %r3276 c0[0x0] (0)
>3040: add u32 %r3277 %r2713 %r3276 (0)
>3041: mov u32 %r3278 0x00000010 (0)
>3042: mul u32 %r3279 %r3277 %r3278 (0)
>3043: mov u32 %r3280 %r3279 (0)
>3044: ld  u64 %r3281d c7[0x330] (0)
>3045: mov u32 %r3282 0x00000004 (0)
>3046: ld  u32 %r3283 c7[0x338] (0)
>3047: add u64 %r3284d %r3281d %r3280 (0)
>3048: add u32 %r3285 %r3282 %r3280 (0)
>3049: set u8 %p3286 gt u32 %r3285 %r3283 (0)
>3050: not %p3286 ld  u32 %r3287 g[%r3284d+0x0] (0)
>3051: %p3286 mov u32 %r3288 0x00000000 (0)
>3052: union u32 %r3289 %r3287 %r3288 (0)
>3053: ld  u64 %r3290d c7[0x330] (0)
>3054: mov u32 %r3291 0x00000008 (0)
>3055: ld  u32 %r3292 c7[0x338] (0)
>3056: add u64 %r3293d %r3290d %r3280 (0)
>3057: add u32 %r3294 %r3291 %r3280 (0)
>3058: set u8 %p3295 gt u32 %r3294 %r3292 (0)
>3059: not %p3295 ld  u32 %r3296 g[%r3293d+0x4] (0)
>3060: %p3295 mov u32 %r3297 0x00000000 (0)
>3061: union u32 %r3298 %r3296 %r3297 (0)
>3062: ld  u64 %r3299d c7[0x330] (0)
>3063: mov u32 %r3300 0x0000000c (0)
>3064: ld  u32 %r3301 c7[0x338] (0)
>3065: add u64 %r3302d %r3299d %r3280 (0)
>3066: add u32 %r3303 %r3300 %r3280 (0)
>3067: set u8 %p3304 gt u32 %r3303 %r3301 (0)
>3068: not %p3304 ld  u32 %r3305 g[%r3302d+0x8] (0)
>3069: %p3304 mov u32 %r3306 0x00000000 (0)
>3070: union u32 %r3307 %r3305 %r3306 (0)
>3071: mov u32 %r3317 %r3289 (0)
>3072: mov u32 %r3318 %r3298 (0)
>3073: mov u32 %r3319 %r3307 (0)
>3074: mov u32 %r3321 0x00000010 (0)
>3075: mul u32 %r3322 %r2713 %r3321 (0)
>3076: ld  u64 %r3323d c7[0x330] (0)
>3077: mov u32 %r3324 0x00000004 (0)
>3078: ld  u32 %r3325 c7[0x338] (0)
>3079: add u64 %r3326d %r3323d %r3322 (0)
>3080: add u32 %r3327 %r3324 %r3322 (0)
>3081: set u8 %p3328 gt u32 %r3327 %r3325 (0)
>3082: not %p3328 ld  u32 %r3329 g[%r3326d+0x0] (0)
>3083: %p3328 mov u32 %r3330 0x00000000 (0)
>3084: union u32 %r3331 %r3329 %r3330 (0)
>3085: ld  u64 %r3332d c7[0x330] (0)
>3086: mov u32 %r3333 0x00000008 (0)
>3087: ld  u32 %r3334 c7[0x338] (0)
>3088: add u64 %r3335d %r3332d %r3322 (0)
>3089: add u32 %r3336 %r3333 %r3322 (0)
>3090: set u8 %p3337 gt u32 %r3336 %r3334 (0)
>3091: not %p3337 ld  u32 %r3338 g[%r3335d+0x4] (0)
>3092: %p3337 mov u32 %r3339 0x00000000 (0)
>3093: union u32 %r3340 %r3338 %r3339 (0)
>3094: ld  u64 %r3341d c7[0x330] (0)
>3095: mov u32 %r3342 0x0000000c (0)
>3096: ld  u32 %r3343 c7[0x338] (0)
>3097: add u64 %r3344d %r3341d %r3322 (0)
>3098: add u32 %r3345 %r3342 %r3322 (0)
>3099: set u8 %p3346 gt u32 %r3345 %r3343 (0)
>3100: not %p3346 ld  u32 %r3347 g[%r3344d+0x8] (0)
>3101: %p3346 mov u32 %r3348 0x00000000 (0)
>3102: union u32 %r3349 %r3347 %r3348 (0)
>3103: mov u32 %r3359 %r3331 (0)
>3104: mov u32 %r3360 %r3340 (0)
>3105: mov u32 %r3361 %r3349 (0)
>3106: neg f32 %r3363 %r3359 (0)
>3107: add f32 %r3364 %r3317 %r3363 (0)
>3108: neg f32 %r3365 %r3360 (0)
>3109: add f32 %r3366 %r3318 %r3365 (0)
>3110: neg f32 %r3367 %r3361 (0)
>3111: add f32 %r3368 %r3319 %r3367 (0)
>3112: mov u32 %r3369 %r3364 (0)
>3113: mov u32 %r3370 %r3366 (0)
>3114: mov u32 %r3371 %r3368 (0)
>3115: mul f32 %r3372 %r3369 %r3369 (0)
>3116: mad f32 %r3373 %r3370 %r3370 %r3372 (0)
>3117: mad f32 %r3374 %r3371 %r3371 %r3373 (0)
>3118: mov u32 %r3375 %r3374 (0)
>3119: abs f32 %r3376 %r3375 (0)
>3120: rsq f32 %r3377 %r3376 (0)
>3121: mov u32 %r3378 %r3377 (0)
>3122: mov u32 %r3379 %r3378 (0)
>3123: mul f32 %r3380 %r3369 %r3379 (0)
>3124: mul f32 %r3381 %r3370 %r3379 (0)
>3125: mul f32 %r3382 %r3371 %r3379 (0)
>3126: mov u32 %r3383 %r3380 (0)
>3127: mov u32 %r3384 %r3381 (0)
>3128: mov u32 %r3385 %r3382 (0)
>3129: mul f32 %r3386 %r3385 %r3268 (0)
>3130: mul f32 %r3387 %r3383 %r3269 (0)
>3131: mul f32 %r3388 %r3384 %r3267 (0)
>3132: neg f32 %r3389 %r3386 (0)
>3133: mad f32 %r3390 %r3384 %r3269 %r3389 (0)
>3134: neg f32 %r3391 %r3387 (0)
>3135: mad f32 %r3392 %r3385 %r3267 %r3391 (0)
>3136: neg f32 %r3393 %r3388 (0)
>3137: mad f32 %r3394 %r3383 %r3268 %r3393 (0)
>3138: mov u32 %r3395 %r3390 (0)
>3139: mov u32 %r3396 %r3392 (0)
>3140: mov u32 %r3397 %r3394 (0)
>3141: mul f32 %r3398 %r3395 %r3395 (0)
>3142: mad f32 %r3399 %r3396 %r3396 %r3398 (0)
>3143: mad f32 %r3400 %r3397 %r3397 %r3399 (0)
>3144: mov u32 %r3401 %r3400 (0)
>3145: abs f32 %r3402 %r3401 (0)
>3146: rsq f32 %r3403 %r3402 (0)
>3147: mov u32 %r3404 %r3403 (0)
>3148: mov u32 %r3405 %r3404 (0)
>3149: mul f32 %r3406 %r3395 %r3405 (0)
>3150: mul f32 %r3407 %r3396 %r3405 (0)
>3151: mul f32 %r3408 %r3397 %r3405 (0)
>3152: bra BB:48 (0)
>BB:48 (9 instructions) - idom = BB:46, df = { BB:51 }
> -> BB:50 (forward)
> -> BB:49 (tree)
>3153: phi u32 %r3409 %r3149 %r3406 (0)
>3154: phi u32 %r3410 %r3151 %r3407 (0)
>3155: phi u32 %r3411 %r3153 %r3408 (0)
>3156: join (0)
>3157: mov u32 %r3412 0x00000000 (0)
>3158: set s32 %r3413 lt %r3412 %r2717 (0)
>3159: joinat BB:50 (0)
>3160: set u8 %p3414 neu u32 0x00000000 %r3413 (0)
>3161: not %p3414 bra BB:50 (0)
>BB:49 (119 instructions) - idom = BB:48, df = { BB:50 }
> -> BB:50 (forward)
>3162: mov u32 %r3415 0x00000010 (0)
>3163: mul u32 %r3416 %r2713 %r3415 (0)
>3164: ld  u64 %r3417d c7[0x330] (0)
>3165: mov u32 %r3418 0x00000004 (0)
>3166: ld  u32 %r3419 c7[0x338] (0)
>3167: add u64 %r3420d %r3417d %r3416 (0)
>3168: add u32 %r3421 %r3418 %r3416 (0)
>3169: set u8 %p3422 gt u32 %r3421 %r3419 (0)
>3170: not %p3422 ld  u32 %r3423 g[%r3420d+0x0] (0)
>3171: %p3422 mov u32 %r3424 0x00000000 (0)
>3172: union u32 %r3425 %r3423 %r3424 (0)
>3173: ld  u64 %r3426d c7[0x330] (0)
>3174: mov u32 %r3427 0x00000008 (0)
>3175: ld  u32 %r3428 c7[0x338] (0)
>3176: add u64 %r3429d %r3426d %r3416 (0)
>3177: add u32 %r3430 %r3427 %r3416 (0)
>3178: set u8 %p3431 gt u32 %r3430 %r3428 (0)
>3179: not %p3431 ld  u32 %r3432 g[%r3429d+0x4] (0)
>3180: %p3431 mov u32 %r3433 0x00000000 (0)
>3181: union u32 %r3434 %r3432 %r3433 (0)
>3182: ld  u64 %r3435d c7[0x330] (0)
>3183: mov u32 %r3436 0x0000000c (0)
>3184: ld  u32 %r3437 c7[0x338] (0)
>3185: add u64 %r3438d %r3435d %r3416 (0)
>3186: add u32 %r3439 %r3436 %r3416 (0)
>3187: set u8 %p3440 gt u32 %r3439 %r3437 (0)
>3188: not %p3440 ld  u32 %r3441 g[%r3438d+0x8] (0)
>3189: %p3440 mov u32 %r3442 0x00000000 (0)
>3190: union u32 %r3443 %r3441 %r3442 (0)
>3191: mov u32 %r3453 %r3425 (0)
>3192: mov u32 %r3454 %r3434 (0)
>3193: mov u32 %r3455 %r3443 (0)
>3194: ld  u32 %r3457 c0[0x0] (0)
>3195: neg s32 %r3458 %r3457 (0)
>3196: add u32 %r3459 %r2713 %r3458 (0)
>3197: mov u32 %r3460 %r3459 (0)
>3198: mov u32 %r3461 0x00000010 (0)
>3199: mul u32 %r3462 %r3460 %r3461 (0)
>3200: mov u32 %r3463 %r3462 (0)
>3201: ld  u64 %r3464d c7[0x330] (0)
>3202: mov u32 %r3465 0x00000004 (0)
>3203: ld  u32 %r3466 c7[0x338] (0)
>3204: add u64 %r3467d %r3464d %r3463 (0)
>3205: add u32 %r3468 %r3465 %r3463 (0)
>3206: set u8 %p3469 gt u32 %r3468 %r3466 (0)
>3207: not %p3469 ld  u32 %r3470 g[%r3467d+0x0] (0)
>3208: %p3469 mov u32 %r3471 0x00000000 (0)
>3209: union u32 %r3472 %r3470 %r3471 (0)
>3210: ld  u64 %r3473d c7[0x330] (0)
>3211: mov u32 %r3474 0x00000008 (0)
>3212: ld  u32 %r3475 c7[0x338] (0)
>3213: add u64 %r3476d %r3473d %r3463 (0)
>3214: add u32 %r3477 %r3474 %r3463 (0)
>3215: set u8 %p3478 gt u32 %r3477 %r3475 (0)
>3216: not %p3478 ld  u32 %r3479 g[%r3476d+0x4] (0)
>3217: %p3478 mov u32 %r3480 0x00000000 (0)
>3218: union u32 %r3481 %r3479 %r3480 (0)
>3219: ld  u64 %r3482d c7[0x330] (0)
>3220: mov u32 %r3483 0x0000000c (0)
>3221: ld  u32 %r3484 c7[0x338] (0)
>3222: add u64 %r3485d %r3482d %r3463 (0)
>3223: add u32 %r3486 %r3483 %r3463 (0)
>3224: set u8 %p3487 gt u32 %r3486 %r3484 (0)
>3225: not %p3487 ld  u32 %r3488 g[%r3485d+0x8] (0)
>3226: %p3487 mov u32 %r3489 0x00000000 (0)
>3227: union u32 %r3490 %r3488 %r3489 (0)
>3228: mov u32 %r3500 %r3472 (0)
>3229: mov u32 %r3501 %r3481 (0)
>3230: mov u32 %r3502 %r3490 (0)
>3231: neg f32 %r3504 %r3500 (0)
>3232: add f32 %r3505 %r3453 %r3504 (0)
>3233: neg f32 %r3506 %r3501 (0)
>3234: add f32 %r3507 %r3454 %r3506 (0)
>3235: neg f32 %r3508 %r3502 (0)
>3236: add f32 %r3509 %r3455 %r3508 (0)
>3237: mov u32 %r3510 %r3505 (0)
>3238: mov u32 %r3511 %r3507 (0)
>3239: mov u32 %r3512 %r3509 (0)
>3240: mul f32 %r3513 %r3510 %r3510 (0)
>3241: mad f32 %r3514 %r3511 %r3511 %r3513 (0)
>3242: mad f32 %r3515 %r3512 %r3512 %r3514 (0)
>3243: mov u32 %r3516 %r3515 (0)
>3244: abs f32 %r3517 %r3516 (0)
>3245: rsq f32 %r3518 %r3517 (0)
>3246: mov u32 %r3519 %r3518 (0)
>3247: mov u32 %r3520 %r3519 (0)
>3248: mul f32 %r3521 %r3510 %r3520 (0)
>3249: mul f32 %r3522 %r3511 %r3520 (0)
>3250: mul f32 %r3523 %r3512 %r3520 (0)
>3251: mov u32 %r3524 %r3521 (0)
>3252: mov u32 %r3525 %r3522 (0)
>3253: mov u32 %r3526 %r3523 (0)
>3254: mul f32 %r3527 %r3526 %r3268 (0)
>3255: mul f32 %r3528 %r3524 %r3269 (0)
>3256: mul f32 %r3529 %r3525 %r3267 (0)
>3257: neg f32 %r3530 %r3527 (0)
>3258: mad f32 %r3531 %r3525 %r3269 %r3530 (0)
>3259: neg f32 %r3532 %r3528 (0)
>3260: mad f32 %r3533 %r3526 %r3267 %r3532 (0)
>3261: neg f32 %r3534 %r3529 (0)
>3262: mad f32 %r3535 %r3524 %r3268 %r3534 (0)
>3263: mov u32 %r3536 %r3531 (0)
>3264: mov u32 %r3537 %r3533 (0)
>3265: mov u32 %r3538 %r3535 (0)
>3266: mul f32 %r3539 %r3536 %r3536 (0)
>3267: mad f32 %r3540 %r3537 %r3537 %r3539 (0)
>3268: mad f32 %r3541 %r3538 %r3538 %r3540 (0)
>3269: mov u32 %r3542 %r3541 (0)
>3270: abs f32 %r3543 %r3542 (0)
>3271: rsq f32 %r3544 %r3543 (0)
>3272: mov u32 %r3545 %r3544 (0)
>3273: mov u32 %r3546 %r3545 (0)
>3274: mad f32 %r3547 %r3536 %r3546 %r3409 (0)
>3275: mad f32 %r3548 %r3537 %r3546 %r3410 (0)
>3276: mad f32 %r3549 %r3538 %r3546 %r3411 (0)
>3277: mov u32 %r3550 %r3547 (0)
>3278: mov u32 %r3551 %r3548 (0)
>3279: mov u32 %r3552 %r3549 (0)
>3280: bra BB:50 (0)
>BB:50 (5 instructions) - idom = BB:48, df = { BB:51 }
> -> BB:51 (forward)
>3281: phi u32 %r3553 %r3409 %r3550 (0)
>3282: phi u32 %r3554 %r3410 %r3551 (0)
>3283: phi u32 %r3555 %r3411 %r3552 (0)
>3284: join (0)
>3285: bra BB:51 (0)
>BB:51 (10 instructions) - idom = BB:11, df = { }
> -> BB:57 (forward)
> -> BB:52 (tree)
>3286: phi u32 %r3556 %r3149 %r3553 (0)
>3287: phi u32 %r3557 %r3151 %r3554 (0)
>3288: phi u32 %r3558 %r3153 %r3555 (0)
>3289: join (0)
>3290: mov u32 %r3559 0x00000000 (0)
>3291: set s32 %r3560 lt %r3559 %r2715 (0)
>3292: mov u32 %r3561 %r3560 (0)
>3293: joinat BB:57 (0)
>3294: set u8 %p3562 neu u32 0x00000000 %r3561 (0)
>3295: not %p3562 bra BB:57 (0)
>BB:52 (98 instructions) - idom = BB:51, df = { BB:57 }
> -> BB:54 (forward)
> -> BB:53 (tree)
>3296: mov u32 %r3563 0x00000010 (0)
>3297: mul u32 %r3564 %r2713 %r3563 (0)
>3298: ld  u64 %r3565d c7[0x330] (0)
>3299: mov u32 %r3566 0x00000004 (0)
>3300: ld  u32 %r3567 c7[0x338] (0)
>3301: add u64 %r3568d %r3565d %r3564 (0)
>3302: add u32 %r3569 %r3566 %r3564 (0)
>3303: set u8 %p3570 gt u32 %r3569 %r3567 (0)
>3304: not %p3570 ld  u32 %r3571 g[%r3568d+0x0] (0)
>3305: %p3570 mov u32 %r3572 0x00000000 (0)
>3306: union u32 %r3573 %r3571 %r3572 (0)
>3307: ld  u64 %r3574d c7[0x330] (0)
>3308: mov u32 %r3575 0x00000008 (0)
>3309: ld  u32 %r3576 c7[0x338] (0)
>3310: add u64 %r3577d %r3574d %r3564 (0)
>3311: add u32 %r3578 %r3575 %r3564 (0)
>3312: set u8 %p3579 gt u32 %r3578 %r3576 (0)
>3313: not %p3579 ld  u32 %r3580 g[%r3577d+0x4] (0)
>3314: %p3579 mov u32 %r3581 0x00000000 (0)
>3315: union u32 %r3582 %r3580 %r3581 (0)
>3316: ld  u64 %r3583d c7[0x330] (0)
>3317: mov u32 %r3584 0x0000000c (0)
>3318: ld  u32 %r3585 c7[0x338] (0)
>3319: add u64 %r3586d %r3583d %r3564 (0)
>3320: add u32 %r3587 %r3584 %r3564 (0)
>3321: set u8 %p3588 gt u32 %r3587 %r3585 (0)
>3322: not %p3588 ld  u32 %r3589 g[%r3586d+0x8] (0)
>3323: %p3588 mov u32 %r3590 0x00000000 (0)
>3324: union u32 %r3591 %r3589 %r3590 (0)
>3325: mov u32 %r3601 %r3573 (0)
>3326: mov u32 %r3602 %r3582 (0)
>3327: mov u32 %r3603 %r3591 (0)
>3328: mov u32 %r3605 0xffffffff (0)
>3329: add u32 %r3606 %r2713 %r3605 (0)
>3330: mov u32 %r3607 0x00000010 (0)
>3331: mul u32 %r3608 %r3606 %r3607 (0)
>3332: mov u32 %r3609 %r3608 (0)
>3333: ld  u64 %r3610d c7[0x330] (0)
>3334: mov u32 %r3611 0x00000004 (0)
>3335: ld  u32 %r3612 c7[0x338] (0)
>3336: add u64 %r3613d %r3610d %r3609 (0)
>3337: add u32 %r3614 %r3611 %r3609 (0)
>3338: set u8 %p3615 gt u32 %r3614 %r3612 (0)
>3339: not %p3615 ld  u32 %r3616 g[%r3613d+0x0] (0)
>3340: %p3615 mov u32 %r3617 0x00000000 (0)
>3341: union u32 %r3618 %r3616 %r3617 (0)
>3342: ld  u64 %r3619d c7[0x330] (0)
>3343: mov u32 %r3620 0x00000008 (0)
>3344: ld  u32 %r3621 c7[0x338] (0)
>3345: add u64 %r3622d %r3619d %r3609 (0)
>3346: add u32 %r3623 %r3620 %r3609 (0)
>3347: set u8 %p3624 gt u32 %r3623 %r3621 (0)
>3348: not %p3624 ld  u32 %r3625 g[%r3622d+0x4] (0)
>3349: %p3624 mov u32 %r3626 0x00000000 (0)
>3350: union u32 %r3627 %r3625 %r3626 (0)
>3351: ld  u64 %r3628d c7[0x330] (0)
>3352: mov u32 %r3629 0x0000000c (0)
>3353: ld  u32 %r3630 c7[0x338] (0)
>3354: add u64 %r3631d %r3628d %r3609 (0)
>3355: add u32 %r3632 %r3629 %r3609 (0)
>3356: set u8 %p3633 gt u32 %r3632 %r3630 (0)
>3357: not %p3633 ld  u32 %r3634 g[%r3631d+0x8] (0)
>3358: %p3633 mov u32 %r3635 0x00000000 (0)
>3359: union u32 %r3636 %r3634 %r3635 (0)
>3360: mov u32 %r3646 %r3618 (0)
>3361: mov u32 %r3647 %r3627 (0)
>3362: mov u32 %r3648 %r3636 (0)
>3363: neg f32 %r3650 %r3646 (0)
>3364: add f32 %r3651 %r3601 %r3650 (0)
>3365: neg f32 %r3652 %r3647 (0)
>3366: add f32 %r3653 %r3602 %r3652 (0)
>3367: neg f32 %r3654 %r3648 (0)
>3368: add f32 %r3655 %r3603 %r3654 (0)
>3369: mov u32 %r3656 %r3651 (0)
>3370: mov u32 %r3657 %r3653 (0)
>3371: mov u32 %r3658 %r3655 (0)
>3372: mul f32 %r3659 %r3656 %r3656 (0)
>3373: mad f32 %r3660 %r3657 %r3657 %r3659 (0)
>3374: mad f32 %r3661 %r3658 %r3658 %r3660 (0)
>3375: mov u32 %r3662 %r3661 (0)
>3376: abs f32 %r3663 %r3662 (0)
>3377: rsq f32 %r3664 %r3663 (0)
>3378: mov u32 %r3665 %r3664 (0)
>3379: mov u32 %r3666 %r3665 (0)
>3380: mul f32 %r3667 %r3656 %r3666 (0)
>3381: mul f32 %r3668 %r3657 %r3666 (0)
>3382: mul f32 %r3669 %r3658 %r3666 (0)
>3383: mov u32 %r3670 %r3667 (0)
>3384: mov u32 %r3671 %r3668 (0)
>3385: mov u32 %r3672 %r3669 (0)
>3386: ld  u32 %r3673 c0[0x0] (0)
>3387: mov u32 %r3674 0xffffffff (0)
>3388: add u32 %r3675 %r3673 %r3674 (0)
>3389: set s32 %r3676 lt %r2717 %r3675 (0)
>3390: mov u32 %r3677 %r3676 (0)
>3391: joinat BB:54 (0)
>3392: set u8 %p3678 neu u32 0x00000000 %r3677 (0)
>3393: not %p3678 bra BB:54 (0)
>BB:53 (117 instructions) - idom = BB:52, df = { BB:54 }
> -> BB:54 (forward)
>3394: ld  u32 %r3679 c0[0x0] (0)
>3395: add u32 %r3680 %r2713 %r3679 (0)
>3396: mov u32 %r3681 0x00000010 (0)
>3397: mul u32 %r3682 %r3680 %r3681 (0)
>3398: mov u32 %r3683 %r3682 (0)
>3399: ld  u64 %r3684d c7[0x330] (0)
>3400: mov u32 %r3685 0x00000004 (0)
>3401: ld  u32 %r3686 c7[0x338] (0)
>3402: add u64 %r3687d %r3684d %r3683 (0)
>3403: add u32 %r3688 %r3685 %r3683 (0)
>3404: set u8 %p3689 gt u32 %r3688 %r3686 (0)
>3405: not %p3689 ld  u32 %r3690 g[%r3687d+0x0] (0)
>3406: %p3689 mov u32 %r3691 0x00000000 (0)
>3407: union u32 %r3692 %r3690 %r3691 (0)
>3408: ld  u64 %r3693d c7[0x330] (0)
>3409: mov u32 %r3694 0x00000008 (0)
>3410: ld  u32 %r3695 c7[0x338] (0)
>3411: add u64 %r3696d %r3693d %r3683 (0)
>3412: add u32 %r3697 %r3694 %r3683 (0)
>3413: set u8 %p3698 gt u32 %r3697 %r3695 (0)
>3414: not %p3698 ld  u32 %r3699 g[%r3696d+0x4] (0)
>3415: %p3698 mov u32 %r3700 0x00000000 (0)
>3416: union u32 %r3701 %r3699 %r3700 (0)
>3417: ld  u64 %r3702d c7[0x330] (0)
>3418: mov u32 %r3703 0x0000000c (0)
>3419: ld  u32 %r3704 c7[0x338] (0)
>3420: add u64 %r3705d %r3702d %r3683 (0)
>3421: add u32 %r3706 %r3703 %r3683 (0)
>3422: set u8 %p3707 gt u32 %r3706 %r3704 (0)
>3423: not %p3707 ld  u32 %r3708 g[%r3705d+0x8] (0)
>3424: %p3707 mov u32 %r3709 0x00000000 (0)
>3425: union u32 %r3710 %r3708 %r3709 (0)
>3426: mov u32 %r3720 %r3692 (0)
>3427: mov u32 %r3721 %r3701 (0)
>3428: mov u32 %r3722 %r3710 (0)
>3429: mov u32 %r3724 0x00000010 (0)
>3430: mul u32 %r3725 %r2713 %r3724 (0)
>3431: ld  u64 %r3726d c7[0x330] (0)
>3432: mov u32 %r3727 0x00000004 (0)
>3433: ld  u32 %r3728 c7[0x338] (0)
>3434: add u64 %r3729d %r3726d %r3725 (0)
>3435: add u32 %r3730 %r3727 %r3725 (0)
>3436: set u8 %p3731 gt u32 %r3730 %r3728 (0)
>3437: not %p3731 ld  u32 %r3732 g[%r3729d+0x0] (0)
>3438: %p3731 mov u32 %r3733 0x00000000 (0)
>3439: union u32 %r3734 %r3732 %r3733 (0)
>3440: ld  u64 %r3735d c7[0x330] (0)
>3441: mov u32 %r3736 0x00000008 (0)
>3442: ld  u32 %r3737 c7[0x338] (0)
>3443: add u64 %r3738d %r3735d %r3725 (0)
>3444: add u32 %r3739 %r3736 %r3725 (0)
>3445: set u8 %p3740 gt u32 %r3739 %r3737 (0)
>3446: not %p3740 ld  u32 %r3741 g[%r3738d+0x4] (0)
>3447: %p3740 mov u32 %r3742 0x00000000 (0)
>3448: union u32 %r3743 %r3741 %r3742 (0)
>3449: ld  u64 %r3744d c7[0x330] (0)
>3450: mov u32 %r3745 0x0000000c (0)
>3451: ld  u32 %r3746 c7[0x338] (0)
>3452: add u64 %r3747d %r3744d %r3725 (0)
>3453: add u32 %r3748 %r3745 %r3725 (0)
>3454: set u8 %p3749 gt u32 %r3748 %r3746 (0)
>3455: not %p3749 ld  u32 %r3750 g[%r3747d+0x8] (0)
>3456: %p3749 mov u32 %r3751 0x00000000 (0)
>3457: union u32 %r3752 %r3750 %r3751 (0)
>3458: mov u32 %r3762 %r3734 (0)
>3459: mov u32 %r3763 %r3743 (0)
>3460: mov u32 %r3764 %r3752 (0)
>3461: neg f32 %r3766 %r3762 (0)
>3462: add f32 %r3767 %r3720 %r3766 (0)
>3463: neg f32 %r3768 %r3763 (0)
>3464: add f32 %r3769 %r3721 %r3768 (0)
>3465: neg f32 %r3770 %r3764 (0)
>3466: add f32 %r3771 %r3722 %r3770 (0)
>3467: mov u32 %r3772 %r3767 (0)
>3468: mov u32 %r3773 %r3769 (0)
>3469: mov u32 %r3774 %r3771 (0)
>3470: mul f32 %r3775 %r3772 %r3772 (0)
>3471: mad f32 %r3776 %r3773 %r3773 %r3775 (0)
>3472: mad f32 %r3777 %r3774 %r3774 %r3776 (0)
>3473: mov u32 %r3778 %r3777 (0)
>3474: abs f32 %r3779 %r3778 (0)
>3475: rsq f32 %r3780 %r3779 (0)
>3476: mov u32 %r3781 %r3780 (0)
>3477: mov u32 %r3782 %r3781 (0)
>3478: mul f32 %r3783 %r3772 %r3782 (0)
>3479: mul f32 %r3784 %r3773 %r3782 (0)
>3480: mul f32 %r3785 %r3774 %r3782 (0)
>3481: mov u32 %r3786 %r3783 (0)
>3482: mov u32 %r3787 %r3784 (0)
>3483: mov u32 %r3788 %r3785 (0)
>3484: mul f32 %r3789 %r3788 %r3671 (0)
>3485: mul f32 %r3790 %r3786 %r3672 (0)
>3486: mul f32 %r3791 %r3787 %r3670 (0)
>3487: neg f32 %r3792 %r3789 (0)
>3488: mad f32 %r3793 %r3787 %r3672 %r3792 (0)
>3489: neg f32 %r3794 %r3790 (0)
>3490: mad f32 %r3795 %r3788 %r3670 %r3794 (0)
>3491: neg f32 %r3796 %r3791 (0)
>3492: mad f32 %r3797 %r3786 %r3671 %r3796 (0)
>3493: mov u32 %r3798 %r3793 (0)
>3494: mov u32 %r3799 %r3795 (0)
>3495: mov u32 %r3800 %r3797 (0)
>3496: mul f32 %r3801 %r3798 %r3798 (0)
>3497: mad f32 %r3802 %r3799 %r3799 %r3801 (0)
>3498: mad f32 %r3803 %r3800 %r3800 %r3802 (0)
>3499: mov u32 %r3804 %r3803 (0)
>3500: abs f32 %r3805 %r3804 (0)
>3501: rsq f32 %r3806 %r3805 (0)
>3502: mov u32 %r3807 %r3806 (0)
>3503: mov u32 %r3808 %r3807 (0)
>3504: mad f32 %r3809 %r3798 %r3808 %r3556 (0)
>3505: mad f32 %r3810 %r3799 %r3808 %r3557 (0)
>3506: mad f32 %r3811 %r3800 %r3808 %r3558 (0)
>3507: mov u32 %r3812 %r3809 (0)
>3508: mov u32 %r3813 %r3810 (0)
>3509: mov u32 %r3814 %r3811 (0)
>3510: bra BB:54 (0)
>BB:54 (10 instructions) - idom = BB:52, df = { BB:57 }
> -> BB:56 (forward)
> -> BB:55 (tree)
>3511: phi u32 %r3815 %r3556 %r3812 (0)
>3512: phi u32 %r3816 %r3557 %r3813 (0)
>3513: phi u32 %r3817 %r3558 %r3814 (0)
>3514: join (0)
>3515: mov u32 %r3818 0x00000000 (0)
>3516: set s32 %r3819 lt %r3818 %r2717 (0)
>3517: mov u32 %r3820 %r3819 (0)
>3518: joinat BB:56 (0)
>3519: set u8 %p3821 neu u32 0x00000000 %r3820 (0)
>3520: not %p3821 bra BB:56 (0)
>BB:55 (119 instructions) - idom = BB:54, df = { BB:56 }
> -> BB:56 (forward)
>3521: mov u32 %r3822 0x00000010 (0)
>3522: mul u32 %r3823 %r2713 %r3822 (0)
>3523: ld  u64 %r3824d c7[0x330] (0)
>3524: mov u32 %r3825 0x00000004 (0)
>3525: ld  u32 %r3826 c7[0x338] (0)
>3526: add u64 %r3827d %r3824d %r3823 (0)
>3527: add u32 %r3828 %r3825 %r3823 (0)
>3528: set u8 %p3829 gt u32 %r3828 %r3826 (0)
>3529: not %p3829 ld  u32 %r3830 g[%r3827d+0x0] (0)
>3530: %p3829 mov u32 %r3831 0x00000000 (0)
>3531: union u32 %r3832 %r3830 %r3831 (0)
>3532: ld  u64 %r3833d c7[0x330] (0)
>3533: mov u32 %r3834 0x00000008 (0)
>3534: ld  u32 %r3835 c7[0x338] (0)
>3535: add u64 %r3836d %r3833d %r3823 (0)
>3536: add u32 %r3837 %r3834 %r3823 (0)
>3537: set u8 %p3838 gt u32 %r3837 %r3835 (0)
>3538: not %p3838 ld  u32 %r3839 g[%r3836d+0x4] (0)
>3539: %p3838 mov u32 %r3840 0x00000000 (0)
>3540: union u32 %r3841 %r3839 %r3840 (0)
>3541: ld  u64 %r3842d c7[0x330] (0)
>3542: mov u32 %r3843 0x0000000c (0)
>3543: ld  u32 %r3844 c7[0x338] (0)
>3544: add u64 %r3845d %r3842d %r3823 (0)
>3545: add u32 %r3846 %r3843 %r3823 (0)
>3546: set u8 %p3847 gt u32 %r3846 %r3844 (0)
>3547: not %p3847 ld  u32 %r3848 g[%r3845d+0x8] (0)
>3548: %p3847 mov u32 %r3849 0x00000000 (0)
>3549: union u32 %r3850 %r3848 %r3849 (0)
>3550: mov u32 %r3860 %r3832 (0)
>3551: mov u32 %r3861 %r3841 (0)
>3552: mov u32 %r3862 %r3850 (0)
>3553: ld  u32 %r3864 c0[0x0] (0)
>3554: neg s32 %r3865 %r3864 (0)
>3555: add u32 %r3866 %r2713 %r3865 (0)
>3556: mov u32 %r3867 %r3866 (0)
>3557: mov u32 %r3868 0x00000010 (0)
>3558: mul u32 %r3869 %r3867 %r3868 (0)
>3559: mov u32 %r3870 %r3869 (0)
>3560: ld  u64 %r3871d c7[0x330] (0)
>3561: mov u32 %r3872 0x00000004 (0)
>3562: ld  u32 %r3873 c7[0x338] (0)
>3563: add u64 %r3874d %r3871d %r3870 (0)
>3564: add u32 %r3875 %r3872 %r3870 (0)
>3565: set u8 %p3876 gt u32 %r3875 %r3873 (0)
>3566: not %p3876 ld  u32 %r3877 g[%r3874d+0x0] (0)
>3567: %p3876 mov u32 %r3878 0x00000000 (0)
>3568: union u32 %r3879 %r3877 %r3878 (0)
>3569: ld  u64 %r3880d c7[0x330] (0)
>3570: mov u32 %r3881 0x00000008 (0)
>3571: ld  u32 %r3882 c7[0x338] (0)
>3572: add u64 %r3883d %r3880d %r3870 (0)
>3573: add u32 %r3884 %r3881 %r3870 (0)
>3574: set u8 %p3885 gt u32 %r3884 %r3882 (0)
>3575: not %p3885 ld  u32 %r3886 g[%r3883d+0x4] (0)
>3576: %p3885 mov u32 %r3887 0x00000000 (0)
>3577: union u32 %r3888 %r3886 %r3887 (0)
>3578: ld  u64 %r3889d c7[0x330] (0)
>3579: mov u32 %r3890 0x0000000c (0)
>3580: ld  u32 %r3891 c7[0x338] (0)
>3581: add u64 %r3892d %r3889d %r3870 (0)
>3582: add u32 %r3893 %r3890 %r3870 (0)
>3583: set u8 %p3894 gt u32 %r3893 %r3891 (0)
>3584: not %p3894 ld  u32 %r3895 g[%r3892d+0x8] (0)
>3585: %p3894 mov u32 %r3896 0x00000000 (0)
>3586: union u32 %r3897 %r3895 %r3896 (0)
>3587: mov u32 %r3907 %r3879 (0)
>3588: mov u32 %r3908 %r3888 (0)
>3589: mov u32 %r3909 %r3897 (0)
>3590: neg f32 %r3911 %r3907 (0)
>3591: add f32 %r3912 %r3860 %r3911 (0)
>3592: neg f32 %r3913 %r3908 (0)
>3593: add f32 %r3914 %r3861 %r3913 (0)
>3594: neg f32 %r3915 %r3909 (0)
>3595: add f32 %r3916 %r3862 %r3915 (0)
>3596: mov u32 %r3917 %r3912 (0)
>3597: mov u32 %r3918 %r3914 (0)
>3598: mov u32 %r3919 %r3916 (0)
>3599: mul f32 %r3920 %r3917 %r3917 (0)
>3600: mad f32 %r3921 %r3918 %r3918 %r3920 (0)
>3601: mad f32 %r3922 %r3919 %r3919 %r3921 (0)
>3602: mov u32 %r3923 %r3922 (0)
>3603: abs f32 %r3924 %r3923 (0)
>3604: rsq f32 %r3925 %r3924 (0)
>3605: mov u32 %r3926 %r3925 (0)
>3606: mov u32 %r3927 %r3926 (0)
>3607: mul f32 %r3928 %r3917 %r3927 (0)
>3608: mul f32 %r3929 %r3918 %r3927 (0)
>3609: mul f32 %r3930 %r3919 %r3927 (0)
>3610: mov u32 %r3931 %r3928 (0)
>3611: mov u32 %r3932 %r3929 (0)
>3612: mov u32 %r3933 %r3930 (0)
>3613: mul f32 %r3934 %r3933 %r3671 (0)
>3614: mul f32 %r3935 %r3931 %r3672 (0)
>3615: mul f32 %r3936 %r3932 %r3670 (0)
>3616: neg f32 %r3937 %r3934 (0)
>3617: mad f32 %r3938 %r3932 %r3672 %r3937 (0)
>3618: neg f32 %r3939 %r3935 (0)
>3619: mad f32 %r3940 %r3933 %r3670 %r3939 (0)
>3620: neg f32 %r3941 %r3936 (0)
>3621: mad f32 %r3942 %r3931 %r3671 %r3941 (0)
>3622: mov u32 %r3943 %r3938 (0)
>3623: mov u32 %r3944 %r3940 (0)
>3624: mov u32 %r3945 %r3942 (0)
>3625: mul f32 %r3946 %r3943 %r3943 (0)
>3626: mad f32 %r3947 %r3944 %r3944 %r3946 (0)
>3627: mad f32 %r3948 %r3945 %r3945 %r3947 (0)
>3628: mov u32 %r3949 %r3948 (0)
>3629: abs f32 %r3950 %r3949 (0)
>3630: rsq f32 %r3951 %r3950 (0)
>3631: mov u32 %r3952 %r3951 (0)
>3632: mov u32 %r3953 %r3952 (0)
>3633: mad f32 %r3954 %r3943 %r3953 %r3815 (0)
>3634: mad f32 %r3955 %r3944 %r3953 %r3816 (0)
>3635: mad f32 %r3956 %r3945 %r3953 %r3817 (0)
>3636: mov u32 %r3957 %r3954 (0)
>3637: mov u32 %r3958 %r3955 (0)
>3638: mov u32 %r3959 %r3956 (0)
>3639: bra BB:56 (0)
>BB:56 (5 instructions) - idom = BB:54, df = { BB:57 }
> -> BB:57 (forward)
>3640: phi u32 %r3960 %r3815 %r3957 (0)
>3641: phi u32 %r3961 %r3816 %r3958 (0)
>3642: phi u32 %r3962 %r3817 %r3959 (0)
>3643: join (0)
>3644: bra BB:57 (0)
>BB:57 (43 instructions) - idom = BB:51, df = { }
> -> BB:1 (tree)
>3645: phi u32 %r3963 %r3556 %r3960 (0)
>3646: phi u32 %r3964 %r3557 %r3961 (0)
>3647: phi u32 %r3965 %r3558 %r3962 (0)
>3648: join (0)
>3649: mov u32 %r3966 0x00000010 (0)
>3650: mul u32 %r3967 %r2713 %r3966 (0)
>3651: mov u32 %r3968 %r3967 (0)
>3652: mul f32 %r3969 %r3963 %r3963 (0)
>3653: mad f32 %r3970 %r3964 %r3964 %r3969 (0)
>3654: mad f32 %r3971 %r3965 %r3965 %r3970 (0)
>3655: mov u32 %r3972 %r3971 (0)
>3656: abs f32 %r3973 %r3972 (0)
>3657: rsq f32 %r3974 %r3973 (0)
>3658: mov u32 %r3975 %r3974 (0)
>3659: mov u32 %r3976 %r3975 (0)
>3660: mul f32 %r3977 %r3963 %r3976 (0)
>3661: mul f32 %r3978 %r3964 %r3976 (0)
>3662: mul f32 %r3979 %r3965 %r3976 (0)
>3663: mov u32 %r3980 %r3977 (0)
>3664: mov u32 %r3981 %r3978 (0)
>3665: mov u32 %r3982 %r3979 (0)
>3666: ld  u64 %r3983d c7[0x310] (0)
>3667: mov u32 %r3984 0x00000004 (0)
>3668: ld  u32 %r3985 c7[0x318] (0)
>3669: add u64 %r3986d %r3983d %r3968 (0)
>3670: add u32 %r3987 %r3984 %r3968 (0)
>3671: set u8 %p3988 gt u32 %r3987 %r3985 (0)
>3672: not %p3988 st  u32 # g[%r3986d+0x0] %r3980 (0)
>3673: ld  u64 %r3989d c7[0x310] (0)
>3674: mov u32 %r3990 0x00000008 (0)
>3675: ld  u32 %r3991 c7[0x318] (0)
>3676: add u64 %r3992d %r3989d %r3968 (0)
>3677: add u32 %r3993 %r3990 %r3968 (0)
>3678: set u8 %p3994 gt u32 %r3993 %r3991 (0)
>3679: not %p3994 st  u32 # g[%r3992d+0x4] %r3981 (0)
>3680: ld  u64 %r3995d c7[0x310] (0)
>3681: mov u32 %r3996 0x0000000c (0)
>3682: ld  u32 %r3997 c7[0x318] (0)
>3683: add u64 %r3998d %r3995d %r3968 (0)
>3684: add u32 %r3999 %r3996 %r3968 (0)
>3685: set u8 %p4000 gt u32 %r3999 %r3997 (0)
>3686: not %p4000 st  u32 # g[%r3998d+0x8] %r3982 (0)
>3687: membar (SUBOP:7) - # (0)
>BB:1 (1 instructions) - idom = BB:57, df = { }
>3688: exit - # (0)
>BB:37 (64 instructions) - idom = BB:38, df = { BB:10 }
> -> BB:45 (forward)
> -> BB:44 (tree)
>3689: mov u32 %r4021 0x00000010 (0)
>3690: mul u32 %r4022 %r2713 %r4021 (0)
>3691: ld  u64 %r4023d c7[0x330] (0)
>3692: mov u32 %r4024 0x00000004 (0)
>3693: ld  u32 %r4025 c7[0x338] (0)
>3694: add u64 %r4026d %r4023d %r4022 (0)
>3695: add u32 %r4027 %r4024 %r4022 (0)
>3696: set u8 %p4028 gt u32 %r4027 %r4025 (0)
>3697: not %p4028 ld  u32 %r4029 g[%r4026d+0x0] (0)
>3698: %p4028 mov u32 %r4030 0x00000000 (0)
>3699: union u32 %r4031 %r4029 %r4030 (0)
>3700: ld  u64 %r4032d c7[0x330] (0)
>3701: mov u32 %r4033 0x00000008 (0)
>3702: ld  u32 %r4034 c7[0x338] (0)
>3703: add u64 %r4035d %r4032d %r4022 (0)
>3704: add u32 %r4036 %r4033 %r4022 (0)
>3705: set u8 %p4037 gt u32 %r4036 %r4034 (0)
>3706: not %p4037 ld  u32 %r4038 g[%r4035d+0x4] (0)
>3707: %p4037 mov u32 %r4039 0x00000000 (0)
>3708: union u32 %r4040 %r4038 %r4039 (0)
>3709: ld  u64 %r4041d c7[0x330] (0)
>3710: mov u32 %r4042 0x0000000c (0)
>3711: ld  u32 %r4043 c7[0x338] (0)
>3712: add u64 %r4044d %r4041d %r4022 (0)
>3713: add u32 %r4045 %r4042 %r4022 (0)
>3714: set u8 %p4046 gt u32 %r4045 %r4043 (0)
>3715: not %p4046 ld  u32 %r4047 g[%r4044d+0x8] (0)
>3716: %p4046 mov u32 %r4048 0x00000000 (0)
>3717: union u32 %r4049 %r4047 %r4048 (0)
>3718: ld  u64 %r4050d c7[0x330] (0)
>3719: mov u32 %r4051 0x00000010 (0)
>3720: ld  u32 %r4052 c7[0x338] (0)
>3721: add u64 %r4053d %r4050d %r4022 (0)
>3722: add u32 %r4054 %r4051 %r4022 (0)
>3723: set u8 %p4055 gt u32 %r4054 %r4052 (0)
>3724: not %p4055 ld  u32 %r4056 g[%r4053d+0xc] (0)
>3725: %p4055 mov u32 %r4057 0x00000000 (0)
>3726: union u32 %r4058 %r4056 %r4057 (0)
>3727: ld  u32 %r4059 c0[0x40] (0)
>3728: neg f32 %r4060 %r4059 (0)
>3729: add f32 %r4061 %r4031 %r4060 (0)
>3730: ld  u32 %r4062 c0[0x44] (0)
>3731: neg f32 %r4063 %r4062 (0)
>3732: add f32 %r4064 %r4040 %r4063 (0)
>3733: ld  u32 %r4065 c0[0x48] (0)
>3734: neg f32 %r4066 %r4065 (0)
>3735: add f32 %r4067 %r4049 %r4066 (0)
>3736: ld  u32 %r4068 c0[0x4c] (0)
>3737: neg f32 %r4069 %r4068 (0)
>3738: add f32 %r4070 %r4058 %r4069 (0)
>3739: mul f32 %r4071 %r4061 %r4061 (0)
>3740: mad f32 %r4072 %r4064 %r4064 %r4071 (0)
>3741: mad f32 %r4073 %r4067 %r4067 %r4072 (0)
>3742: mad f32 %r4074 %r4070 %r4070 %r4073 (0)
>3743: mov u32 %r4075 %r4074 (0)
>3744: rsq f32 %r4076 %r4075 (0)
>3745: rcp f32 %r4077 %r4076 (0)
>3746: ld  u32 %r4078 c0[0x50] (0)
>3747: mov u32 %r4079 0x3c23d70a (0)
>3748: add f32 %r4080 %r4078 %r4079 (0)
>3749: set u32 %r4081 lt f32 %r4077 %r4080 (0)
>3750: joinat BB:45 (0)
>3751: set u8 %p4082 neu u32 0x00000000 %r4081 (0)
>3752: not %p4082 bra BB:45 (0)
>BB:44 (55 instructions) - idom = BB:37, df = { BB:45 }
> -> BB:45 (forward)
>3753: mov u32 %r4083 0x00000010 (0)
>3754: mul u32 %r4084 %r2713 %r4083 (0)
>3755: mul f32 %r4085 %r4061 %r4061 (0)
>3756: mad f32 %r4086 %r4064 %r4064 %r4085 (0)
>3757: mad f32 %r4087 %r4067 %r4067 %r4086 (0)
>3758: mad f32 %r4088 %r4070 %r4070 %r4087 (0)
>3759: mov u32 %r4089 %r4088 (0)
>3760: abs f32 %r4090 %r4089 (0)
>3761: rsq f32 %r4091 %r4090 (0)
>3762: mov u32 %r4092 %r4091 (0)
>3763: mul f32 %r4093 %r4061 %r4092 (0)
>3764: mul f32 %r4094 %r4064 %r4092 (0)
>3765: mul f32 %r4095 %r4067 %r4092 (0)
>3766: mul f32 %r4096 %r4070 %r4092 (0)
>3767: ld  u32 %r4097 c0[0x50] (0)
>3768: mov u32 %r4098 0x3c23d70a (0)
>3769: add f32 %r4099 %r4097 %r4098 (0)
>3770: ld  u32 %r4100 c0[0x40] (0)
>3771: mad f32 %r4101 %r4093 %r4099 %r4100 (0)
>3772: ld  u32 %r4102 c0[0x44] (0)
>3773: mad f32 %r4103 %r4094 %r4099 %r4102 (0)
>3774: ld  u32 %r4104 c0[0x48] (0)
>3775: mad f32 %r4105 %r4095 %r4099 %r4104 (0)
>3776: ld  u32 %r4106 c0[0x4c] (0)
>3777: mad f32 %r4107 %r4096 %r4099 %r4106 (0)
>3778: ld  u64 %r4108d c7[0x330] (0)
>3779: mov u32 %r4109 0x00000004 (0)
>3780: ld  u32 %r4110 c7[0x338] (0)
>3781: add u64 %r4111d %r4108d %r4084 (0)
>3782: add u32 %r4112 %r4109 %r4084 (0)
>3783: set u8 %p4113 gt u32 %r4112 %r4110 (0)
>3784: not %p4113 st  u32 # g[%r4111d+0x0] %r4101 (0)
>3785: ld  u64 %r4114d c7[0x330] (0)
>3786: mov u32 %r4115 0x00000008 (0)
>3787: ld  u32 %r4116 c7[0x338] (0)
>3788: add u64 %r4117d %r4114d %r4084 (0)
>3789: add u32 %r4118 %r4115 %r4084 (0)
>3790: set u8 %p4119 gt u32 %r4118 %r4116 (0)
>3791: not %p4119 st  u32 # g[%r4117d+0x4] %r4103 (0)
>3792: ld  u64 %r4120d c7[0x330] (0)
>3793: mov u32 %r4121 0x0000000c (0)
>3794: ld  u32 %r4122 c7[0x338] (0)
>3795: add u64 %r4123d %r4120d %r4084 (0)
>3796: add u32 %r4124 %r4121 %r4084 (0)
>3797: set u8 %p4125 gt u32 %r4124 %r4122 (0)
>3798: not %p4125 st  u32 # g[%r4123d+0x8] %r4105 (0)
>3799: ld  u64 %r4126d c7[0x330] (0)
>3800: mov u32 %r4127 0x00000010 (0)
>3801: ld  u32 %r4128 c7[0x338] (0)
>3802: add u64 %r4129d %r4126d %r4084 (0)
>3803: add u32 %r4130 %r4127 %r4084 (0)
>3804: set u8 %p4131 gt u32 %r4130 %r4128 (0)
>3805: not %p4131 st  u32 # g[%r4129d+0xc] %r4107 (0)
>3806: membar (SUBOP:7) - # (0)
>3807: bra BB:45 (0)
>BB:45 (6 instructions) - idom = BB:37, df = { BB:10 }
> -> BB:10 (back)
>3808: join (0)
>3809: bar u32 # 0x00000000 0x00000000 (0)
>3810: mov u32 %r4132 0x00000001 (0)
>3811: add u32 %r4133 %r3136 %r4132 (0)
>3812: mov u32 %r4134 %r4133 (0)
>3813: cont BB:10 (0)
>
>MAIN:-1 ()
>BB:0 (83 instructions) - df = { }
> -> BB:8 (tree)
> -> BB:2 (tree)
>  0: rdsv u32 $r0 sv[CTAID:0] (8)
>  1: mov u32 $r1 0x00000400 (8)
>  2: rdsv u32 $r2 sv[TID:0] (8)
>  3: mad u32 $r15 $r0 $r1 $r2 (8)
>  4: mov f32 $r4 $r15 (8)
>  5: ld  u32 $r1 c0[0x0] (8)
>  6: mov u32 $r0 $r15 (8)
>  7: call abs BUILTIN:1 (8)
>  8: mov u32 $r6 $r1 (8)
>  9: ld  u32 $r1 c0[0x0] (8)
> 10: mov u32 $r0 $r15 (8)
> 11: call abs BUILTIN:1 (8)
> 12: mov u32 $r5 $r0 (8)
> 13: mov u32 $r2 0x00000000 (8)
> 14: mov u32 $r3 0x00000000 (8)
> 15: mov u32 $r16 0x00000000 (8)
> 16: mov u32 $r17 0x00000000 (8)
> 17: mov u32 $r0 0x00000010 (8)
> 18: mul u32 $r18 $r15 $r0 (8)
> 19: ld  u64 $r0d c7[0x320] (8)
> 20: mov u32 $r19 0x00000004 (8)
> 21: ld  u32 $r20 c7[0x328] (8)
> 22: add u32 { $r0 $c0 } $r0 $r18 (8)
> 23: add u32 $r1 $r1 $r255 $c0 (8)
> 24: add u32 $r19 $r19 $r18 (8)
> 25: set u8 $p0 gt u32 $r19 $r20 (8)
> 26: not $p0 ld  u32 $r19 g[$r0d+0x0] (8)
> 27: $p0 mov u32 $r19 0x00000000 (8)
> 28: ld  u64 $r0d c7[0x320] (8)
> 29: mov u32 $r20 0x00000008 (8)
> 30: ld  u32 $r21 c7[0x328] (8)
> 31: add u32 { $r0 $c0 } $r0 $r18 (8)
> 32: add u32 $r1 $r1 $r255 $c0 (8)
> 33: add u32 $r20 $r20 $r18 (8)
> 34: set u8 $p0 gt u32 $r20 $r21 (8)
> 35: not $p0 ld  u32 $r20 g[$r0d+0x4] (8)
> 36: $p0 mov u32 $r20 0x00000000 (8)
> 37: ld  u64 $r0d c7[0x320] (8)
> 38: mov u32 $r21 0x0000000c (8)
> 39: ld  u32 $r22 c7[0x328] (8)
> 40: add u32 { $r0 $c0 } $r0 $r18 (8)
> 41: add u32 $r1 $r1 $r255 $c0 (8)
> 42: add u32 $r21 $r21 $r18 (8)
> 43: set u8 $p0 gt u32 $r21 $r22 (8)
> 44: not $p0 ld  u32 $r21 g[$r0d+0x8] (8)
> 45: $p0 mov u32 $r21 0x00000000 (8)
> 46: ld  u64 $r0d c7[0x320] (8)
> 47: mov u32 $r22 0x00000010 (8)
> 48: ld  u32 $r23 c7[0x328] (8)
> 49: add u32 { $r0 $c0 } $r0 $r18 (8)
> 50: add u32 $r1 $r1 $r255 $c0 (8)
> 51: add u32 $r18 $r22 $r18 (8)
> 52: set u8 $p0 gt u32 $r18 $r23 (8)
> 53: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
> 54: $p0 mov u32 $r0 0x00000000 (8)
> 55: mov u32 $r1 $r19 (8)
> 56: mov u32 $r18 $r20 (8)
> 57: mov u32 $r19 $r21 (8)
> 58: ld  u32 $r20 c0[0x40] (8)
> 59: neg f32 $r20 $r20 (8)
> 60: add f32 $r20 $r1 $r20 (8)
> 61: ld  u32 $r1 c0[0x44] (8)
> 62: neg f32 $r1 $r1 (8)
> 63: add f32 $r18 $r18 $r1 (8)
> 64: ld  u32 $r1 c0[0x48] (8)
> 65: neg f32 $r1 $r1 (8)
> 66: add f32 $r19 $r19 $r1 (8)
> 67: ld  u32 $r1 c0[0x4c] (8)
> 68: neg f32 $r1 $r1 (8)
> 69: add f32 $r0 $r0 $r1 (8)
> 70: mul f32 $r1 $r20 $r20 (8)
> 71: mad f32 $r1 $r18 $r18 $r1 (8)
> 72: mad f32 $r1 $r19 $r19 $r1 (8)
> 73: mad f32 $r1 $r0 $r0 $r1 (8)
> 74: rsq f32 $r1 $r1 (8)
> 75: rcp f32 $r1 $r1 (8)
> 76: ld  u32 $r21 c0[0x50] (8)
> 77: mov u32 $r22 0x3c23d70a (8)
> 78: add f32 $r21 $r21 $r22 (8)
> 79: set u32 $r1 ge f32 $r21 $r1 (8)
> 80: joinat BB:9 (8)
> 81: set u8 $p0 neu u32 $r255 $r1 (8)
> 82: not $p0 bra BB:8 (8)
>BB:2 (25 instructions) - idom = BB:0, df = { BB:9 }
> -> BB:73 (tree)
> -> BB:3 (tree)
> 83: mov u32 $r17 0x00000000 (8)
> 84: mov u32 $r21 0x00000000 (8)
> 85: mov u32 $r22 0x00000000 (8)
> 86: mul f32 $r1 $r20 $r20 (8)
> 87: mad f32 $r1 $r18 $r18 $r1 (8)
> 88: mad f32 $r1 $r19 $r19 $r1 (8)
> 89: mad f32 $r0 $r0 $r0 $r1 (8)
> 90: abs f32 $r0 $r0 (8)
> 91: rsq f32 $r0 $r0 (8)
> 92: mul f32 $r1 $r20 $r0 (8)
> 93: mul f32 $r2 $r18 $r0 (8)
> 94: mul f32 $r0 $r19 $r0 (8)
> 95: mov u32 $r3 0x00000000 (8)
> 96: mul f32 $r3 $r1 $r3 (8)
> 97: mov u32 $r16 0x3f800000 (8)
> 98: mad f32 $r3 $r2 $r16 $r3 (8)
> 99: mov u32 $r16 0x00000000 (8)
>100: mad f32 $r3 $r0 $r16 $r3 (8)
>101: mov u32 $r16 0x00000000 (8)
>102: max f32 $r3 $r3 $r16 (8)
>103: mov u32 $r16 0x3f800000 (8)
>104: set u32 $r16 neu f32 $r3 $r16 (8)
>105: joinat BB:7 (8)
>106: set u8 $p0 neu u32 $r255 $r16 (8)
>107: not $p0 bra BB:73 (8)
>BB:3 (8 instructions) - idom = BB:2, df = { BB:7 }
> -> BB:5 (tree)
> -> BB:4 (tree)
>108: mul f32 $r16 $r1 $r1 (8)
>109: mad f32 $r16 $r2 $r2 $r16 (8)
>110: mad f32 $r16 $r0 $r0 $r16 (8)
>111: mov u32 $r17 0x00000000 (8)
>112: set u32 $r17 eq f32 $r16 $r17 (8)
>113: joinat BB:6 (8)
>114: set u8 $p0 neu u32 $r255 $r17 (8)
>115: not $p0 bra BB:5 (8)
>BB:4 (4 instructions) - idom = BB:3, df = { BB:6 }
> -> BB:6 (forward)
>116: mov u32 $r0 0x00000000 (8)
>117: mov u32 $r1 0x00000000 (8)
>118: mov u32 $r2 0x00000000 (8)
>119: join BB:6 (8)
>BB:5 (21 instructions) - idom = BB:3, df = { BB:6 }
> -> BB:6 (forward)
>120: mov u32 $r17 0x00000000 (8)
>121: mul f32 $r17 $r17 $r1 (8)
>122: mov u32 $r18 0x3f800000 (8)
>123: mad f32 $r17 $r18 $r2 $r17 (8)
>124: mov u32 $r18 0x00000000 (8)
>125: mad f32 $r17 $r18 $r0 $r17 (8)
>126: rcp f32 $r16 $r16 (8)
>127: mul f32 $r16 $r17 $r16 (8)
>128: mul f32 $r1 $r1 $r16 (8)
>129: mul f32 $r2 $r2 $r16 (8)
>130: mul f32 $r16 $r0 $r16 (8)
>131: mov u32 $r0 0x00000000 (8)
>132: neg f32 $r1 $r1 (8)
>133: add f32 $r0 $r0 $r1 (8)
>134: mov u32 $r1 0x3f800000 (8)
>135: neg f32 $r2 $r2 (8)
>136: add f32 $r1 $r1 $r2 (8)
>137: mov u32 $r2 0x00000000 (8)
>138: neg f32 $r16 $r16 (8)
>139: add f32 $r2 $r2 $r16 (8)
>140: join BB:6 (8)
>BB:6 (9 instructions) - idom = BB:3, df = { BB:7 }
> -> BB:7 (forward)
>141: mul f32 $r16 $r0 $r0 (8)
>142: mad f32 $r16 $r1 $r1 $r16 (8)
>143: mad f32 $r16 $r2 $r2 $r16 (8)
>144: abs f32 $r16 $r16 (8)
>145: rsq f32 $r16 $r16 (8)
>146: mul f32 $r17 $r0 $r16 (8)
>147: mul f32 $r21 $r1 $r16 (8)
>148: mul f32 $r22 $r2 $r16 (8)
>149: join BB:7 (8)
>BB:73 (1 instructions) - df = { }
> -> BB:7 (forward)
>150: join BB:7 (8)
>BB:7 (54 instructions) - idom = BB:2, df = { BB:9 }
> -> BB:9 (forward)
>151: mov u32 $r0 0x00000000 (8)
>152: neg f32 $r1 $r17 (8)
>153: neg f32 $r2 $r21 (8)
>154: neg f32 $r16 $r22 (8)
>155: mov u32 $r18 0x00000000 (8)
>156: neg f32 $r17 $r17 (8)
>157: neg f32 $r19 $r21 (8)
>158: neg f32 $r20 $r22 (8)
>159: set f32 $r21 gt $r3 $r255 (8)
>160: set f32 $r22 lt $r3 $r255 (8)
>161: sub f32 $r21 $r21 $r22 (8)
>162: abs f32 $r22 $r3 (8)
>163: mov u32 $r23 0x3f800000 (8)
>164: neg f32 $r22 $r22 (8)
>165: add f32 $r22 $r23 $r22 (8)
>166: rsq f32 $r22 $r22 (8)
>167: rcp f32 $r22 $r22 (8)
>168: abs f32 $r23 $r3 (8)
>169: abs f32 $r24 $r3 (8)
>170: abs f32 $r25 $r3 (8)
>171: mov u32 $r26 0xbcc19a5f (8)
>172: mov u32 $r27 0x3da68d87 (8)
>173: mad f32 $r25 $r25 $r26 $r27 (8)
>174: mov u32 $r26 0xbe5bc094 (8)
>175: mad f32 $r24 $r24 $r25 $r26 (8)
>176: mov u32 $r25 0x3fc90fdb (8)
>177: mad f32 $r23 $r23 $r24 $r25 (8)
>178: mul f32 $r22 $r22 $r23 (8)
>179: mov u32 $r23 0x3fc90fdb (8)
>180: neg f32 $r22 $r22 (8)
>181: add f32 $r22 $r23 $r22 (8)
>182: mul f32 $r21 $r21 $r22 (8)
>183: mov u32 $r22 0x3fc90fdb (8)
>184: neg f32 $r21 $r21 (8)
>185: add f32 $r21 $r22 $r21 (8)
>186: presin f32 $r21 $r21 (8)
>187: sin f32 $r21 $r21 (8)
>188: mov u32 $r22 0x3e4ccccd (8)
>189: mul f32 $r21 $r22 $r21 (8)
>190: mov u32 $r22 0x3e4ccccd (8)
>191: mul f32 $r3 $r22 $r3 (8)
>192: mul f32 $r17 $r3 $r17 (8)
>193: mul f32 $r19 $r3 $r19 (8)
>194: mul f32 $r20 $r3 $r20 (8)
>195: mul f32 $r3 $r3 $r18 (8)
>196: neg f32 $r17 $r17 (8)
>197: mad f32 $r18 $r21 $r1 $r17 (8)
>198: neg f32 $r1 $r19 (8)
>199: mad f32 $r2 $r21 $r2 $r1 (8)
>200: neg f32 $r1 $r20 (8)
>201: mad f32 $r16 $r21 $r16 $r1 (8)
>202: neg f32 $r1 $r3 (8)
>203: mad f32 $r3 $r21 $r0 $r1 (8)
>204: join BB:9 (8)
>BB:8 (9 instructions) - idom = BB:0, df = { BB:9 }
> -> BB:9 (forward)
>205: mov u32 $r0 0x00000000 (8)
>206: add f32 $r18 $r2 $r0 (8)
>207: mov u32 $r0 0xbe4ccccd (8)
>208: add f32 $r2 $r3 $r0 (8)
>209: mov u32 $r0 0x00000000 (8)
>210: add f32 $r16 $r16 $r0 (8)
>211: mov u32 $r0 0x00000000 (8)
>212: add f32 $r3 $r17 $r0 (8)
>213: join BB:9 (8)
>BB:9 (148 instructions) - idom = BB:0, df = { }
> -> BB:10 (tree)
>214: mov u32 $r0 0x00000010 (8)
>215: mul u32 $r17 $r15 $r0 (8)
>216: mov u32 $r0 0x00000010 (8)
>217: mul u32 $r19 $r15 $r0 (8)
>218: ld  u64 $r0d c7[0x320] (8)
>219: mov u32 $r20 0x00000004 (8)
>220: ld  u32 $r21 c7[0x328] (8)
>221: add u32 { $r0 $c0 } $r0 $r19 (8)
>222: add u32 $r1 $r1 $r255 $c0 (8)
>223: add u32 $r20 $r20 $r19 (8)
>224: set u8 $p0 gt u32 $r20 $r21 (8)
>225: not $p0 ld  u32 $r20 g[$r0d+0x0] (8)
>226: $p0 mov u32 $r20 0x00000000 (8)
>227: ld  u64 $r0d c7[0x320] (8)
>228: mov u32 $r21 0x00000008 (8)
>229: ld  u32 $r22 c7[0x328] (8)
>230: add u32 { $r0 $c0 } $r0 $r19 (8)
>231: add u32 $r1 $r1 $r255 $c0 (8)
>232: add u32 $r21 $r21 $r19 (8)
>233: set u8 $p0 gt u32 $r21 $r22 (8)
>234: not $p0 ld  u32 $r21 g[$r0d+0x4] (8)
>235: $p0 mov u32 $r21 0x00000000 (8)
>236: ld  u64 $r0d c7[0x320] (8)
>237: mov u32 $r22 0x0000000c (8)
>238: ld  u32 $r23 c7[0x328] (8)
>239: add u32 { $r0 $c0 } $r0 $r19 (8)
>240: add u32 $r1 $r1 $r255 $c0 (8)
>241: add u32 $r22 $r22 $r19 (8)
>242: set u8 $p0 gt u32 $r22 $r23 (8)
>243: not $p0 ld  u32 $r22 g[$r0d+0x8] (8)
>244: $p0 mov u32 $r22 0x00000000 (8)
>245: ld  u64 $r0d c7[0x320] (8)
>246: mov u32 $r23 0x00000010 (8)
>247: ld  u32 $r24 c7[0x328] (8)
>248: add u32 { $r0 $c0 } $r0 $r19 (8)
>249: add u32 $r1 $r1 $r255 $c0 (8)
>250: add u32 $r19 $r23 $r19 (8)
>251: set u8 $p0 gt u32 $r19 $r24 (8)
>252: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>253: $p0 mov u32 $r0 0x00000000 (8)
>254: mov u32 $r19 $r20 (8)
>255: mov u32 $r20 $r21 (8)
>256: mov u32 $r21 $r22 (8)
>257: mov u32 $r22 $r0 (8)
>258: mov u32 $r0 0x00000010 (8)
>259: mul u32 $r15 $r15 $r0 (8)
>260: ld  u64 $r0d c7[0x300] (8)
>261: mov u32 $r23 0x00000004 (8)
>262: ld  u32 $r24 c7[0x308] (8)
>263: add u32 { $r0 $c0 } $r0 $r15 (8)
>264: add u32 $r1 $r1 $r255 $c0 (8)
>265: add u32 $r23 $r23 $r15 (8)
>266: set u8 $p0 gt u32 $r23 $r24 (8)
>267: not $p0 ld  u32 $r23 g[$r0d+0x0] (8)
>268: $p0 mov u32 $r23 0x00000000 (8)
>269: ld  u64 $r0d c7[0x300] (8)
>270: mov u32 $r24 0x00000008 (8)
>271: ld  u32 $r25 c7[0x308] (8)
>272: add u32 { $r0 $c0 } $r0 $r15 (8)
>273: add u32 $r1 $r1 $r255 $c0 (8)
>274: add u32 $r24 $r24 $r15 (8)
>275: set u8 $p0 gt u32 $r24 $r25 (8)
>276: not $p0 ld  u32 $r24 g[$r0d+0x4] (8)
>277: $p0 mov u32 $r24 0x00000000 (8)
>278: ld  u64 $r0d c7[0x300] (8)
>279: mov u32 $r25 0x0000000c (8)
>280: ld  u32 $r26 c7[0x308] (8)
>281: add u32 { $r0 $c0 } $r0 $r15 (8)
>282: add u32 $r1 $r1 $r255 $c0 (8)
>283: add u32 $r25 $r25 $r15 (8)
>284: set u8 $p0 gt u32 $r25 $r26 (8)
>285: not $p0 ld  u32 $r25 g[$r0d+0x8] (8)
>286: $p0 mov u32 $r25 0x00000000 (8)
>287: ld  u64 $r0d c7[0x300] (8)
>288: mov u32 $r26 0x00000010 (8)
>289: ld  u32 $r27 c7[0x308] (8)
>290: add u32 { $r0 $c0 } $r0 $r15 (8)
>291: add u32 $r1 $r1 $r255 $c0 (8)
>292: add u32 $r15 $r26 $r15 (8)
>293: set u8 $p0 gt u32 $r15 $r27 (8)
>294: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>295: $p0 mov u32 $r0 0x00000000 (8)
>296: mov u32 $r1 $r23 (8)
>297: mov u32 $r15 $r24 (8)
>298: mov u32 $r23 $r25 (8)
>299: mov u32 $r24 0x41200000 (8)
>300: mul f32 $r24 $r18 $r24 (8)
>301: mov u32 $r18 0x41200000 (8)
>302: mul f32 $r18 $r2 $r18 (8)
>303: mov u32 $r2 0x41200000 (8)
>304: mul f32 $r16 $r16 $r2 (8)
>305: mov u32 $r2 0x41200000 (8)
>306: mul f32 $r2 $r3 $r2 (8)
>307: ld  u32 $r3 c0[0x10] (8)
>308: ld  u32 $r25 c0[0x10] (8)
>309: mul f32 $r3 $r3 $r25 (8)
>310: mov u32 $r25 0x40000000 (8)
>311: neg f32 $r1 $r1 (8)
>312: mad f32 $r19 $r25 $r19 $r1 (8)
>313: mov u32 $r1 0x40000000 (8)
>314: neg f32 $r15 $r15 (8)
>315: mad f32 $r20 $r1 $r20 $r15 (8)
>316: mov u32 $r1 0x40000000 (8)
>317: neg f32 $r15 $r23 (8)
>318: mad f32 $r15 $r1 $r21 $r15 (8)
>319: mov u32 $r1 0x40000000 (8)
>320: neg f32 $r0 $r0 (8)
>321: mad f32 $r0 $r1 $r22 $r0 (8)
>322: mad f32 $r19 $r24 $r3 $r19 (8)
>323: mad f32 $r18 $r18 $r3 $r20 (8)
>324: mad f32 $r15 $r16 $r3 $r15 (8)
>325: mad f32 $r2 $r2 $r3 $r0 (8)
>326: ld  u64 $r0d c7[0x330] (8)
>327: mov u32 $r3 0x00000004 (8)
>328: ld  u32 $r16 c7[0x338] (8)
>329: add u32 { $r0 $c0 } $r0 $r17 (8)
>330: add u32 $r1 $r1 $r255 $c0 (8)
>331: add u32 $r3 $r3 $r17 (8)
>332: set u8 $p0 gt u32 $r3 $r16 (8)
>333: not $p0 st  u32 # g[$r0d+0x0] $r19 (8)
>334: ld  u64 $r0d c7[0x330] (8)
>335: mov u32 $r3 0x00000008 (8)
>336: ld  u32 $r16 c7[0x338] (8)
>337: add u32 { $r0 $c0 } $r0 $r17 (8)
>338: add u32 $r1 $r1 $r255 $c0 (8)
>339: add u32 $r3 $r3 $r17 (8)
>340: set u8 $p0 gt u32 $r3 $r16 (8)
>341: not $p0 st  u32 # g[$r0d+0x4] $r18 (8)
>342: ld  u64 $r0d c7[0x330] (8)
>343: mov u32 $r3 0x0000000c (8)
>344: ld  u32 $r16 c7[0x338] (8)
>345: add u32 { $r0 $c0 } $r0 $r17 (8)
>346: add u32 $r1 $r1 $r255 $c0 (8)
>347: add u32 $r3 $r3 $r17 (8)
>348: set u8 $p0 gt u32 $r3 $r16 (8)
>349: not $p0 st  u32 # g[$r0d+0x8] $r15 (8)
>350: ld  u64 $r0d c7[0x330] (8)
>351: mov u32 $r3 0x00000010 (8)
>352: ld  u32 $r15 c7[0x338] (8)
>353: add u32 { $r0 $c0 } $r0 $r17 (8)
>354: add u32 $r1 $r1 $r255 $c0 (8)
>355: add u32 $r3 $r3 $r17 (8)
>356: set u8 $p0 gt u32 $r3 $r15 (8)
>357: not $p0 st  u32 # g[$r0d+0xc] $r2 (8)
>358: membar (SUBOP:7) - # (8)
>359: bar u32 # $r255 $r255 (8)
>360: mov u32 $r15 0x00000000 (8)
>361: prebreak BB:11 (8)
>BB:10 (4 instructions) - idom = BB:9, df = { BB:10 }
> -> BB:13 (forward)
> -> BB:12 (tree)
>362: mov u32 $r0 0x00000004 (8)
>363: set s32 $r0 ge $r15 $r0 (8)
>364: set u8 $p0 neu u32 $r255 $r0 (8)
>365: not $p0 bra BB:13 (8)
>BB:12 (1 instructions) - idom = BB:10, df = { }
> -> BB:11 (cross)
>366: break BB:11 (8)
>BB:13 (2 instructions) - idom = BB:10, df = { BB:10 }
> -> BB:14 (tree)
>367: mov u32 $r16 0x00000000 (8)
>368: prebreak BB:15 (8)
>BB:14 (4 instructions) - idom = BB:13, df = { BB:10 BB:14 }
> -> BB:17 (forward)
> -> BB:16 (tree)
>369: mov u32 $r0 0x00000002 (8)
>370: set s32 $r0 ge $r16 $r0 (8)
>371: set u8 $p0 neu u32 $r255 $r0 (8)
>372: not $p0 bra BB:17 (8)
>BB:16 (1 instructions) - idom = BB:14, df = { BB:10 }
> -> BB:15 (cross)
>373: break BB:15 (8)
>BB:17 (12 instructions) - idom = BB:14, df = { BB:14 }
> -> BB:25 (tree)
> -> BB:18 (tree)
>374: mov u32 $r1 0x00000002 (8)
>375: mov u32 $r0 $r5 (8)
>376: call abs BUILTIN:1 (8)
>377: set u32 $r17 eq $r1 $r16 (8)
>378: mov u32 $r1 0x00000002 (8)
>379: mov u32 $r0 $r6 (8)
>380: call abs BUILTIN:1 (8)
>381: set u32 $r0 eq $r1 $r16 (8)
>382: and u32 $r0 $r17 $r0 (8)
>383: joinat BB:35 (8)
>384: set u8 $p0 neu u32 $r255 $r0 (8)
>385: not $p0 bra BB:25 (8)
>BB:18 (47 instructions) - idom = BB:17, df = { BB:35 }
> -> BB:61 (tree)
> -> BB:19 (tree)
>386: mov u32 $r0 0x00000010 (8)
>387: mul u32 $r2 $r4 $r0 (8)
>388: ld  u64 $r0d c7[0x330] (8)
>389: mov u32 $r3 0x00000004 (8)
>390: ld  u32 $r17 c7[0x338] (8)
>391: add u32 { $r0 $c0 } $r0 $r2 (8)
>392: add u32 $r1 $r1 $r255 $c0 (8)
>393: add u32 $r3 $r3 $r2 (8)
>394: set u8 $p0 gt u32 $r3 $r17 (8)
>395: not $p0 ld  u32 $r17 g[$r0d+0x0] (8)
>396: $p0 mov u32 $r17 0x00000000 (8)
>397: ld  u64 $r0d c7[0x330] (8)
>398: mov u32 $r3 0x00000008 (8)
>399: ld  u32 $r18 c7[0x338] (8)
>400: add u32 { $r0 $c0 } $r0 $r2 (8)
>401: add u32 $r1 $r1 $r255 $c0 (8)
>402: add u32 $r3 $r3 $r2 (8)
>403: set u8 $p0 gt u32 $r3 $r18 (8)
>404: not $p0 ld  u32 $r18 g[$r0d+0x4] (8)
>405: $p0 mov u32 $r18 0x00000000 (8)
>406: ld  u64 $r0d c7[0x330] (8)
>407: mov u32 $r3 0x0000000c (8)
>408: ld  u32 $r19 c7[0x338] (8)
>409: add u32 { $r0 $c0 } $r0 $r2 (8)
>410: add u32 $r1 $r1 $r255 $c0 (8)
>411: add u32 $r3 $r3 $r2 (8)
>412: set u8 $p0 gt u32 $r3 $r19 (8)
>413: not $p0 ld  u32 $r19 g[$r0d+0x8] (8)
>414: $p0 mov u32 $r19 0x00000000 (8)
>415: ld  u64 $r0d c7[0x330] (8)
>416: mov u32 $r3 0x00000010 (8)
>417: ld  u32 $r20 c7[0x338] (8)
>418: add u32 { $r0 $c0 } $r0 $r2 (8)
>419: add u32 $r1 $r1 $r255 $c0 (8)
>420: add u32 $r2 $r3 $r2 (8)
>421: set u8 $p0 gt u32 $r2 $r20 (8)
>422: not $p0 ld  u32 $r20 g[$r0d+0xc] (8)
>423: $p0 mov u32 $r20 0x00000000 (8)
>424: mov u32 $r0 0x00000001 (8)
>425: add u32 $r21 $r4 $r0 (8)
>426: ld  u32 $r1 c0[0x0] (8)
>427: mov u32 $r0 $r21 (8)
>428: call abs BUILTIN:1 (8)
>429: set s32 $r0 lt $r6 $r1 (8)
>430: joinat BB:20 (8)
>431: set u8 $p0 neu u32 $r255 $r0 (8)
>432: not $p0 bra BB:61 (8)
>BB:19 (225 instructions) - idom = BB:18, df = { BB:20 }
> -> BB:20 (forward)
>433: mov u32 $r0 0x00000010 (8)
>434: mul u32 $r2 $r21 $r0 (8)
>435: ld  u64 $r0d c7[0x330] (8)
>436: mov u32 $r3 0x00000004 (8)
>437: ld  u32 $r11 c7[0x338] (8)
>438: add u32 { $r0 $c0 } $r0 $r2 (8)
>439: add u32 $r1 $r1 $r255 $c0 (8)
>440: add u32 $r3 $r3 $r2 (8)
>441: set u8 $p0 gt u32 $r3 $r11 (8)
>442: not $p0 ld  u32 $r3 g[$r0d+0x0] (8)
>443: $p0 mov u32 $r3 0x00000000 (8)
>444: ld  u64 $r0d c7[0x330] (8)
>445: mov u32 $r11 0x00000008 (8)
>446: ld  u32 $r12 c7[0x338] (8)
>447: add u32 { $r0 $c0 } $r0 $r2 (8)
>448: add u32 $r1 $r1 $r255 $c0 (8)
>449: add u32 $r11 $r11 $r2 (8)
>450: set u8 $p0 gt u32 $r11 $r12 (8)
>451: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>452: $p0 mov u32 $r22 0x00000000 (8)
>453: ld  u64 $r0d c7[0x330] (8)
>454: mov u32 $r11 0x0000000c (8)
>455: ld  u32 $r12 c7[0x338] (8)
>456: add u32 { $r0 $c0 } $r0 $r2 (8)
>457: add u32 $r1 $r1 $r255 $c0 (8)
>458: add u32 $r11 $r11 $r2 (8)
>459: set u8 $p0 gt u32 $r11 $r12 (8)
>460: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>461: $p0 mov u32 $r23 0x00000000 (8)
>462: ld  u64 $r0d c7[0x330] (8)
>463: mov u32 $r11 0x00000010 (8)
>464: ld  u32 $r12 c7[0x338] (8)
>465: add u32 { $r0 $c0 } $r0 $r2 (8)
>466: add u32 $r1 $r1 $r255 $c0 (8)
>467: add u32 $r2 $r11 $r2 (8)
>468: set u8 $p0 gt u32 $r2 $r12 (8)
>469: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>470: $p0 mov u32 $r0 0x00000000 (8)
>471: mov f32 $r14 $r3 (8)
>472: mov f32 $r13 $r22 (8)
>473: mov f32 $r12 $r23 (8)
>474: mov f32 $r11 $r0 (8)
>475: neg f32 $r1 $r3 (8)
>476: add f32 $r1 $r17 $r1 (8)
>477: neg f32 $r2 $r22 (8)
>478: add f32 $r2 $r18 $r2 (8)
>479: neg f32 $r3 $r23 (8)
>480: add f32 $r3 $r19 $r3 (8)
>481: neg f32 $r0 $r0 (8)
>482: add f32 $r0 $r20 $r0 (8)
>483: mul f32 $r22 $r1 $r1 (8)
>484: mad f32 $r22 $r2 $r2 $r22 (8)
>485: mad f32 $r22 $r3 $r3 $r22 (8)
>486: mad f32 $r22 $r0 $r0 $r22 (8)
>487: rsq f32 $r22 $r22 (8)
>488: rcp f32 $r22 $r22 (8)
>489: ld  u32 $r23 c0[0x20] (8)
>490: neg f32 $r24 $r22 (8)
>491: add f32 $r23 $r23 $r24 (8)
>492: mov u32 $r24 0x3eb33333 (8)
>493: mul f32 $r23 $r24 $r23 (8)
>494: rcp f32 $r22 $r22 (8)
>495: mul f32 $r22 $r23 $r22 (8)
>496: mul f32 $r23 $r22 $r1 (8)
>497: mul f32 $r2 $r22 $r2 (8)
>498: mul f32 $r3 $r22 $r3 (8)
>499: mul f32 $r22 $r22 $r0 (8)
>500: mov u32 $r0 0x00000010 (8)
>501: mul u32 $r24 $r4 $r0 (8)
>502: mov u32 $r0 0x00000010 (8)
>503: mul u32 $r25 $r4 $r0 (8)
>504: ld  u64 $r0d c7[0x330] (8)
>505: mov u32 $r26 0x00000004 (8)
>506: ld  u32 $r27 c7[0x338] (8)
>507: add u32 { $r0 $c0 } $r0 $r25 (8)
>508: add u32 $r1 $r1 $r255 $c0 (8)
>509: add u32 $r26 $r26 $r25 (8)
>510: set u8 $p0 gt u32 $r26 $r27 (8)
>511: not $p0 ld  u32 $r26 g[$r0d+0x0] (8)
>512: $p0 mov u32 $r26 0x00000000 (8)
>513: ld  u64 $r0d c7[0x330] (8)
>514: mov u32 $r27 0x00000008 (8)
>515: ld  u32 $r28 c7[0x338] (8)
>516: add u32 { $r0 $c0 } $r0 $r25 (8)
>517: add u32 $r1 $r1 $r255 $c0 (8)
>518: add u32 $r27 $r27 $r25 (8)
>519: set u8 $p0 gt u32 $r27 $r28 (8)
>520: not $p0 ld  u32 $r27 g[$r0d+0x4] (8)
>521: $p0 mov u32 $r27 0x00000000 (8)
>522: ld  u64 $r0d c7[0x330] (8)
>523: mov u32 $r28 0x0000000c (8)
>524: ld  u32 $r29 c7[0x338] (8)
>525: add u32 { $r0 $c0 } $r0 $r25 (8)
>526: add u32 $r1 $r1 $r255 $c0 (8)
>527: add u32 $r28 $r28 $r25 (8)
>528: set u8 $p0 gt u32 $r28 $r29 (8)
>529: not $p0 ld  u32 $r28 g[$r0d+0x8] (8)
>530: $p0 mov u32 $r28 0x00000000 (8)
>531: ld  u64 $r0d c7[0x330] (8)
>532: mov u32 $r29 0x00000010 (8)
>533: ld  u32 $r30 c7[0x338] (8)
>534: add u32 { $r0 $c0 } $r0 $r25 (8)
>535: add u32 $r1 $r1 $r255 $c0 (8)
>536: add u32 $r25 $r29 $r25 (8)
>537: set u8 $p0 gt u32 $r25 $r30 (8)
>538: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>539: $p0 mov u32 $r0 0x00000000 (8)
>540: add f32 $r25 $r26 $r23 (8)
>541: add f32 $r26 $r27 $r2 (8)
>542: add f32 $r27 $r28 $r3 (8)
>543: add f32 $r28 $r0 $r22 (8)
>544: ld  u64 $r0d c7[0x330] (8)
>545: mov u32 $r29 0x00000004 (8)
>546: ld  u32 $r30 c7[0x338] (8)
>547: add u32 { $r0 $c0 } $r0 $r24 (8)
>548: add u32 $r1 $r1 $r255 $c0 (8)
>549: add u32 $r29 $r29 $r24 (8)
>550: set u8 $p0 gt u32 $r29 $r30 (8)
>551: not $p0 st  u32 # g[$r0d+0x0] $r25 (8)
>552: ld  u64 $r0d c7[0x330] (8)
>553: mov u32 $r25 0x00000008 (8)
>554: ld  u32 $r29 c7[0x338] (8)
>555: add u32 { $r0 $c0 } $r0 $r24 (8)
>556: add u32 $r1 $r1 $r255 $c0 (8)
>557: add u32 $r25 $r25 $r24 (8)
>558: set u8 $p0 gt u32 $r25 $r29 (8)
>559: not $p0 st  u32 # g[$r0d+0x4] $r26 (8)
>560: ld  u64 $r0d c7[0x330] (8)
>561: mov u32 $r25 0x0000000c (8)
>562: ld  u32 $r26 c7[0x338] (8)
>563: add u32 { $r0 $c0 } $r0 $r24 (8)
>564: add u32 $r1 $r1 $r255 $c0 (8)
>565: add u32 $r25 $r25 $r24 (8)
>566: set u8 $p0 gt u32 $r25 $r26 (8)
>567: not $p0 st  u32 # g[$r0d+0x8] $r27 (8)
>568: ld  u64 $r0d c7[0x330] (8)
>569: mov u32 $r25 0x00000010 (8)
>570: ld  u32 $r26 c7[0x338] (8)
>571: add u32 { $r0 $c0 } $r0 $r24 (8)
>572: add u32 $r1 $r1 $r255 $c0 (8)
>573: add u32 $r24 $r25 $r24 (8)
>574: set u8 $p0 gt u32 $r24 $r26 (8)
>575: not $p0 st  u32 # g[$r0d+0xc] $r28 (8)
>576: mov u32 $r0 0x00000010 (8)
>577: mul u32 $r24 $r21 $r0 (8)
>578: mov u32 $r0 0x00000010 (8)
>579: mul u32 $r25 $r21 $r0 (8)
>580: ld  u64 $r0d c7[0x330] (8)
>581: mov u32 $r26 0x00000004 (8)
>582: ld  u32 $r27 c7[0x338] (8)
>583: add u32 { $r0 $c0 } $r0 $r25 (8)
>584: add u32 $r1 $r1 $r255 $c0 (8)
>585: add u32 $r26 $r26 $r25 (8)
>586: set u8 $p0 gt u32 $r26 $r27 (8)
>587: not $p0 ld  u32 $r26 g[$r0d+0x0] (8)
>588: $p0 mov u32 $r26 0x00000000 (8)
>589: ld  u64 $r0d c7[0x330] (8)
>590: mov u32 $r27 0x00000008 (8)
>591: ld  u32 $r28 c7[0x338] (8)
>592: add u32 { $r0 $c0 } $r0 $r25 (8)
>593: add u32 $r1 $r1 $r255 $c0 (8)
>594: add u32 $r27 $r27 $r25 (8)
>595: set u8 $p0 gt u32 $r27 $r28 (8)
>596: not $p0 ld  u32 $r27 g[$r0d+0x4] (8)
>597: $p0 mov u32 $r27 0x00000000 (8)
>598: ld  u64 $r0d c7[0x330] (8)
>599: mov u32 $r28 0x0000000c (8)
>600: ld  u32 $r29 c7[0x338] (8)
>601: add u32 { $r0 $c0 } $r0 $r25 (8)
>602: add u32 $r1 $r1 $r255 $c0 (8)
>603: add u32 $r28 $r28 $r25 (8)
>604: set u8 $p0 gt u32 $r28 $r29 (8)
>605: not $p0 ld  u32 $r28 g[$r0d+0x8] (8)
>606: $p0 mov u32 $r28 0x00000000 (8)
>607: ld  u64 $r0d c7[0x330] (8)
>608: mov u32 $r29 0x00000010 (8)
>609: ld  u32 $r30 c7[0x338] (8)
>610: add u32 { $r0 $c0 } $r0 $r25 (8)
>611: add u32 $r1 $r1 $r255 $c0 (8)
>612: add u32 $r25 $r29 $r25 (8)
>613: set u8 $p0 gt u32 $r25 $r30 (8)
>614: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>615: $p0 mov u32 $r0 0x00000000 (8)
>616: neg f32 $r1 $r23 (8)
>617: add f32 $r23 $r26 $r1 (8)
>618: neg f32 $r1 $r2 (8)
>619: add f32 $r2 $r27 $r1 (8)
>620: neg f32 $r1 $r3 (8)
>621: add f32 $r3 $r28 $r1 (8)
>622: neg f32 $r1 $r22 (8)
>623: add f32 $r22 $r0 $r1 (8)
>624: ld  u64 $r0d c7[0x330] (8)
>625: mov u32 $r25 0x00000004 (8)
>626: ld  u32 $r26 c7[0x338] (8)
>627: add u32 { $r0 $c0 } $r0 $r24 (8)
>628: add u32 $r1 $r1 $r255 $c0 (8)
>629: add u32 $r25 $r25 $r24 (8)
>630: set u8 $p0 gt u32 $r25 $r26 (8)
>631: not $p0 st  u32 # g[$r0d+0x0] $r23 (8)
>632: ld  u64 $r0d c7[0x330] (8)
>633: mov u32 $r23 0x00000008 (8)
>634: ld  u32 $r25 c7[0x338] (8)
>635: add u32 { $r0 $c0 } $r0 $r24 (8)
>636: add u32 $r1 $r1 $r255 $c0 (8)
>637: add u32 $r23 $r23 $r24 (8)
>638: set u8 $p0 gt u32 $r23 $r25 (8)
>639: not $p0 st  u32 # g[$r0d+0x4] $r2 (8)
>640: ld  u64 $r0d c7[0x330] (8)
>641: mov u32 $r2 0x0000000c (8)
>642: ld  u32 $r23 c7[0x338] (8)
>643: add u32 { $r0 $c0 } $r0 $r24 (8)
>644: add u32 $r1 $r1 $r255 $c0 (8)
>645: add u32 $r2 $r2 $r24 (8)
>646: set u8 $p0 gt u32 $r2 $r23 (8)
>647: not $p0 st  u32 # g[$r0d+0x8] $r3 (8)
>648: ld  u64 $r0d c7[0x330] (8)
>649: mov u32 $r2 0x00000010 (8)
>650: ld  u32 $r3 c7[0x338] (8)
>651: add u32 { $r0 $c0 } $r0 $r24 (8)
>652: add u32 $r1 $r1 $r255 $c0 (8)
>653: add u32 $r2 $r2 $r24 (8)
>654: set u8 $p0 gt u32 $r2 $r3 (8)
>655: not $p0 st  u32 # g[$r0d+0xc] $r22 (8)
>656: membar (SUBOP:7) - # (8)
>657: join BB:20 (8)
>BB:61 (1 instructions) - df = { }
> -> BB:20 (forward)
>658: join BB:20 (8)
>BB:20 (9 instructions) - idom = BB:18, df = { BB:35 }
> -> BB:62 (tree)
> -> BB:21 (tree)
>659: ld  u32 $r0 c0[0x0] (8)
>660: add u32 $r22 $r4 $r0 (8)
>661: ld  u32 $r0 c0[0x0] (8)
>662: ld  u32 $r1 c0[0x0] (8)
>663: mul u32 $r0 $r0 $r1 (8)
>664: set s32 $r0 lt $r22 $r0 (8)
>665: joinat BB:22 (8)
>666: set u8 $p0 neu u32 $r255 $r0 (8)
>667: not $p0 bra BB:62 (8)
>BB:21 (225 instructions) - idom = BB:20, df = { BB:22 }
> -> BB:22 (forward)
>668: mov u32 $r0 0x00000010 (8)
>669: mul u32 $r2 $r22 $r0 (8)
>670: ld  u64 $r0d c7[0x330] (8)
>671: mov u32 $r3 0x00000004 (8)
>672: ld  u32 $r7 c7[0x338] (8)
>673: add u32 { $r0 $c0 } $r0 $r2 (8)
>674: add u32 $r1 $r1 $r255 $c0 (8)
>675: add u32 $r3 $r3 $r2 (8)
>676: set u8 $p0 gt u32 $r3 $r7 (8)
>677: not $p0 ld  u32 $r3 g[$r0d+0x0] (8)
>678: $p0 mov u32 $r3 0x00000000 (8)
>679: ld  u64 $r0d c7[0x330] (8)
>680: mov u32 $r7 0x00000008 (8)
>681: ld  u32 $r8 c7[0x338] (8)
>682: add u32 { $r0 $c0 } $r0 $r2 (8)
>683: add u32 $r1 $r1 $r255 $c0 (8)
>684: add u32 $r7 $r7 $r2 (8)
>685: set u8 $p0 gt u32 $r7 $r8 (8)
>686: not $p0 ld  u32 $r23 g[$r0d+0x4] (8)
>687: $p0 mov u32 $r23 0x00000000 (8)
>688: ld  u64 $r0d c7[0x330] (8)
>689: mov u32 $r7 0x0000000c (8)
>690: ld  u32 $r8 c7[0x338] (8)
>691: add u32 { $r0 $c0 } $r0 $r2 (8)
>692: add u32 $r1 $r1 $r255 $c0 (8)
>693: add u32 $r7 $r7 $r2 (8)
>694: set u8 $p0 gt u32 $r7 $r8 (8)
>695: not $p0 ld  u32 $r24 g[$r0d+0x8] (8)
>696: $p0 mov u32 $r24 0x00000000 (8)
>697: ld  u64 $r0d c7[0x330] (8)
>698: mov u32 $r7 0x00000010 (8)
>699: ld  u32 $r8 c7[0x338] (8)
>700: add u32 { $r0 $c0 } $r0 $r2 (8)
>701: add u32 $r1 $r1 $r255 $c0 (8)
>702: add u32 $r2 $r7 $r2 (8)
>703: set u8 $p0 gt u32 $r2 $r8 (8)
>704: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>705: $p0 mov u32 $r0 0x00000000 (8)
>706: mov f32 $r10 $r3 (8)
>707: mov f32 $r9 $r23 (8)
>708: mov f32 $r8 $r24 (8)
>709: mov f32 $r7 $r0 (8)
>710: neg f32 $r1 $r3 (8)
>711: add f32 $r1 $r17 $r1 (8)
>712: neg f32 $r2 $r23 (8)
>713: add f32 $r2 $r18 $r2 (8)
>714: neg f32 $r3 $r24 (8)
>715: add f32 $r3 $r19 $r3 (8)
>716: neg f32 $r0 $r0 (8)
>717: add f32 $r0 $r20 $r0 (8)
>718: mul f32 $r23 $r1 $r1 (8)
>719: mad f32 $r23 $r2 $r2 $r23 (8)
>720: mad f32 $r23 $r3 $r3 $r23 (8)
>721: mad f32 $r23 $r0 $r0 $r23 (8)
>722: rsq f32 $r23 $r23 (8)
>723: rcp f32 $r23 $r23 (8)
>724: ld  u32 $r24 c0[0x20] (8)
>725: neg f32 $r25 $r23 (8)
>726: add f32 $r24 $r24 $r25 (8)
>727: mov u32 $r25 0x3eb33333 (8)
>728: mul f32 $r24 $r25 $r24 (8)
>729: rcp f32 $r23 $r23 (8)
>730: mul f32 $r23 $r24 $r23 (8)
>731: mul f32 $r24 $r23 $r1 (8)
>732: mul f32 $r2 $r23 $r2 (8)
>733: mul f32 $r3 $r23 $r3 (8)
>734: mul f32 $r23 $r23 $r0 (8)
>735: mov u32 $r0 0x00000010 (8)
>736: mul u32 $r25 $r4 $r0 (8)
>737: mov u32 $r0 0x00000010 (8)
>738: mul u32 $r26 $r4 $r0 (8)
>739: ld  u64 $r0d c7[0x330] (8)
>740: mov u32 $r27 0x00000004 (8)
>741: ld  u32 $r28 c7[0x338] (8)
>742: add u32 { $r0 $c0 } $r0 $r26 (8)
>743: add u32 $r1 $r1 $r255 $c0 (8)
>744: add u32 $r27 $r27 $r26 (8)
>745: set u8 $p0 gt u32 $r27 $r28 (8)
>746: not $p0 ld  u32 $r27 g[$r0d+0x0] (8)
>747: $p0 mov u32 $r27 0x00000000 (8)
>748: ld  u64 $r0d c7[0x330] (8)
>749: mov u32 $r28 0x00000008 (8)
>750: ld  u32 $r29 c7[0x338] (8)
>751: add u32 { $r0 $c0 } $r0 $r26 (8)
>752: add u32 $r1 $r1 $r255 $c0 (8)
>753: add u32 $r28 $r28 $r26 (8)
>754: set u8 $p0 gt u32 $r28 $r29 (8)
>755: not $p0 ld  u32 $r28 g[$r0d+0x4] (8)
>756: $p0 mov u32 $r28 0x00000000 (8)
>757: ld  u64 $r0d c7[0x330] (8)
>758: mov u32 $r29 0x0000000c (8)
>759: ld  u32 $r30 c7[0x338] (8)
>760: add u32 { $r0 $c0 } $r0 $r26 (8)
>761: add u32 $r1 $r1 $r255 $c0 (8)
>762: add u32 $r29 $r29 $r26 (8)
>763: set u8 $p0 gt u32 $r29 $r30 (8)
>764: not $p0 ld  u32 $r29 g[$r0d+0x8] (8)
>765: $p0 mov u32 $r29 0x00000000 (8)
>766: ld  u64 $r0d c7[0x330] (8)
>767: mov u32 $r30 0x00000010 (8)
>768: ld  u32 $r31 c7[0x338] (8)
>769: add u32 { $r0 $c0 } $r0 $r26 (8)
>770: add u32 $r1 $r1 $r255 $c0 (8)
>771: add u32 $r26 $r30 $r26 (8)
>772: set u8 $p0 gt u32 $r26 $r31 (8)
>773: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>774: $p0 mov u32 $r0 0x00000000 (8)
>775: add f32 $r26 $r27 $r24 (8)
>776: add f32 $r27 $r28 $r2 (8)
>777: add f32 $r28 $r29 $r3 (8)
>778: add f32 $r29 $r0 $r23 (8)
>779: ld  u64 $r0d c7[0x330] (8)
>780: mov u32 $r30 0x00000004 (8)
>781: ld  u32 $r31 c7[0x338] (8)
>782: add u32 { $r0 $c0 } $r0 $r25 (8)
>783: add u32 $r1 $r1 $r255 $c0 (8)
>784: add u32 $r30 $r30 $r25 (8)
>785: set u8 $p0 gt u32 $r30 $r31 (8)
>786: not $p0 st  u32 # g[$r0d+0x0] $r26 (8)
>787: ld  u64 $r0d c7[0x330] (8)
>788: mov u32 $r26 0x00000008 (8)
>789: ld  u32 $r30 c7[0x338] (8)
>790: add u32 { $r0 $c0 } $r0 $r25 (8)
>791: add u32 $r1 $r1 $r255 $c0 (8)
>792: add u32 $r26 $r26 $r25 (8)
>793: set u8 $p0 gt u32 $r26 $r30 (8)
>794: not $p0 st  u32 # g[$r0d+0x4] $r27 (8)
>795: ld  u64 $r0d c7[0x330] (8)
>796: mov u32 $r26 0x0000000c (8)
>797: ld  u32 $r27 c7[0x338] (8)
>798: add u32 { $r0 $c0 } $r0 $r25 (8)
>799: add u32 $r1 $r1 $r255 $c0 (8)
>800: add u32 $r26 $r26 $r25 (8)
>801: set u8 $p0 gt u32 $r26 $r27 (8)
>802: not $p0 st  u32 # g[$r0d+0x8] $r28 (8)
>803: ld  u64 $r0d c7[0x330] (8)
>804: mov u32 $r26 0x00000010 (8)
>805: ld  u32 $r27 c7[0x338] (8)
>806: add u32 { $r0 $c0 } $r0 $r25 (8)
>807: add u32 $r1 $r1 $r255 $c0 (8)
>808: add u32 $r25 $r26 $r25 (8)
>809: set u8 $p0 gt u32 $r25 $r27 (8)
>810: not $p0 st  u32 # g[$r0d+0xc] $r29 (8)
>811: mov u32 $r0 0x00000010 (8)
>812: mul u32 $r25 $r22 $r0 (8)
>813: mov u32 $r0 0x00000010 (8)
>814: mul u32 $r26 $r22 $r0 (8)
>815: ld  u64 $r0d c7[0x330] (8)
>816: mov u32 $r27 0x00000004 (8)
>817: ld  u32 $r28 c7[0x338] (8)
>818: add u32 { $r0 $c0 } $r0 $r26 (8)
>819: add u32 $r1 $r1 $r255 $c0 (8)
>820: add u32 $r27 $r27 $r26 (8)
>821: set u8 $p0 gt u32 $r27 $r28 (8)
>822: not $p0 ld  u32 $r27 g[$r0d+0x0] (8)
>823: $p0 mov u32 $r27 0x00000000 (8)
>824: ld  u64 $r0d c7[0x330] (8)
>825: mov u32 $r28 0x00000008 (8)
>826: ld  u32 $r29 c7[0x338] (8)
>827: add u32 { $r0 $c0 } $r0 $r26 (8)
>828: add u32 $r1 $r1 $r255 $c0 (8)
>829: add u32 $r28 $r28 $r26 (8)
>830: set u8 $p0 gt u32 $r28 $r29 (8)
>831: not $p0 ld  u32 $r28 g[$r0d+0x4] (8)
>832: $p0 mov u32 $r28 0x00000000 (8)
>833: ld  u64 $r0d c7[0x330] (8)
>834: mov u32 $r29 0x0000000c (8)
>835: ld  u32 $r30 c7[0x338] (8)
>836: add u32 { $r0 $c0 } $r0 $r26 (8)
>837: add u32 $r1 $r1 $r255 $c0 (8)
>838: add u32 $r29 $r29 $r26 (8)
>839: set u8 $p0 gt u32 $r29 $r30 (8)
>840: not $p0 ld  u32 $r29 g[$r0d+0x8] (8)
>841: $p0 mov u32 $r29 0x00000000 (8)
>842: ld  u64 $r0d c7[0x330] (8)
>843: mov u32 $r30 0x00000010 (8)
>844: ld  u32 $r31 c7[0x338] (8)
>845: add u32 { $r0 $c0 } $r0 $r26 (8)
>846: add u32 $r1 $r1 $r255 $c0 (8)
>847: add u32 $r26 $r30 $r26 (8)
>848: set u8 $p0 gt u32 $r26 $r31 (8)
>849: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>850: $p0 mov u32 $r0 0x00000000 (8)
>851: neg f32 $r1 $r24 (8)
>852: add f32 $r24 $r27 $r1 (8)
>853: neg f32 $r1 $r2 (8)
>854: add f32 $r2 $r28 $r1 (8)
>855: neg f32 $r1 $r3 (8)
>856: add f32 $r3 $r29 $r1 (8)
>857: neg f32 $r1 $r23 (8)
>858: add f32 $r23 $r0 $r1 (8)
>859: ld  u64 $r0d c7[0x330] (8)
>860: mov u32 $r26 0x00000004 (8)
>861: ld  u32 $r27 c7[0x338] (8)
>862: add u32 { $r0 $c0 } $r0 $r25 (8)
>863: add u32 $r1 $r1 $r255 $c0 (8)
>864: add u32 $r26 $r26 $r25 (8)
>865: set u8 $p0 gt u32 $r26 $r27 (8)
>866: not $p0 st  u32 # g[$r0d+0x0] $r24 (8)
>867: ld  u64 $r0d c7[0x330] (8)
>868: mov u32 $r24 0x00000008 (8)
>869: ld  u32 $r26 c7[0x338] (8)
>870: add u32 { $r0 $c0 } $r0 $r25 (8)
>871: add u32 $r1 $r1 $r255 $c0 (8)
>872: add u32 $r24 $r24 $r25 (8)
>873: set u8 $p0 gt u32 $r24 $r26 (8)
>874: not $p0 st  u32 # g[$r0d+0x4] $r2 (8)
>875: ld  u64 $r0d c7[0x330] (8)
>876: mov u32 $r2 0x0000000c (8)
>877: ld  u32 $r24 c7[0x338] (8)
>878: add u32 { $r0 $c0 } $r0 $r25 (8)
>879: add u32 $r1 $r1 $r255 $c0 (8)
>880: add u32 $r2 $r2 $r25 (8)
>881: set u8 $p0 gt u32 $r2 $r24 (8)
>882: not $p0 st  u32 # g[$r0d+0x8] $r3 (8)
>883: ld  u64 $r0d c7[0x330] (8)
>884: mov u32 $r2 0x00000010 (8)
>885: ld  u32 $r3 c7[0x338] (8)
>886: add u32 { $r0 $c0 } $r0 $r25 (8)
>887: add u32 $r1 $r1 $r255 $c0 (8)
>888: add u32 $r2 $r2 $r25 (8)
>889: set u8 $p0 gt u32 $r2 $r3 (8)
>890: not $p0 st  u32 # g[$r0d+0xc] $r23 (8)
>891: membar (SUBOP:7) - # (8)
>892: join BB:22 (8)
>BB:62 (1 instructions) - df = { }
> -> BB:22 (forward)
>893: join BB:22 (8)
>BB:22 (16 instructions) - idom = BB:20, df = { BB:35 }
> -> BB:63 (tree)
> -> BB:23 (tree)
>894: mov u32 $r0 0x00000001 (8)
>895: add u32 $r0 $r4 $r0 (8)
>896: ld  u32 $r1 c0[0x0] (8)
>897: add u32 $r23 $r0 $r1 (8)
>898: ld  u32 $r0 c0[0x0] (8)
>899: ld  u32 $r1 c0[0x0] (8)
>900: mul u32 $r0 $r0 $r1 (8)
>901: set s32 $r24 lt $r23 $r0 (8)
>902: ld  u32 $r1 c0[0x0] (8)
>903: mov u32 $r0 $r23 (8)
>904: call abs BUILTIN:1 (8)
>905: set s32 $r0 lt $r6 $r1 (8)
>906: and u32 $r0 $r24 $r0 (8)
>907: joinat BB:24 (8)
>908: set u8 $p0 neu u32 $r255 $r0 (8)
>909: not $p0 bra BB:63 (8)
>BB:23 (766 instructions) - idom = BB:22, df = { BB:24 }
> -> BB:24 (forward)
>910: mov u32 $r0 0x00000010 (8)
>911: mul u32 $r25 $r23 $r0 (8)
>912: ld  u64 $r0d c7[0x330] (8)
>913: mov u32 $r2 0x00000004 (8)
>914: ld  u32 $r3 c7[0x338] (8)
>915: add u32 { $r0 $c0 } $r0 $r25 (8)
>916: add u32 $r1 $r1 $r255 $c0 (8)
>917: add u32 $r2 $r2 $r25 (8)
>918: set u8 $p0 gt u32 $r2 $r3 (8)
>919: not $p0 ld  u32 $r2 g[$r0d+0x0] (8)
>920: $p0 mov u32 $r2 0x00000000 (8)
>921: ld  u64 $r0d c7[0x330] (8)
>922: mov u32 $r3 0x00000008 (8)
>923: ld  u32 $r24 c7[0x338] (8)
>924: add u32 { $r0 $c0 } $r0 $r25 (8)
>925: add u32 $r1 $r1 $r255 $c0 (8)
>926: add u32 $r3 $r3 $r25 (8)
>927: set u8 $p0 gt u32 $r3 $r24 (8)
>928: not $p0 ld  u32 $r3 g[$r0d+0x4] (8)
>929: $p0 mov u32 $r3 0x00000000 (8)
>930: ld  u64 $r0d c7[0x330] (8)
>931: mov u32 $r24 0x0000000c (8)
>932: ld  u32 $r26 c7[0x338] (8)
>933: add u32 { $r0 $c0 } $r0 $r25 (8)
>934: add u32 $r1 $r1 $r255 $c0 (8)
>935: add u32 $r24 $r24 $r25 (8)
>936: set u8 $p0 gt u32 $r24 $r26 (8)
>937: not $p0 ld  u32 $r24 g[$r0d+0x8] (8)
>938: $p0 mov u32 $r24 0x00000000 (8)
>939: ld  u64 $r0d c7[0x330] (8)
>940: mov u32 $r26 0x00000010 (8)
>941: ld  u32 $r27 c7[0x338] (8)
>942: add u32 { $r0 $c0 } $r0 $r25 (8)
>943: add u32 $r1 $r1 $r255 $c0 (8)
>944: add u32 $r25 $r26 $r25 (8)
>945: set u8 $p0 gt u32 $r25 $r27 (8)
>946: not $p0 ld  u32 $r25 g[$r0d+0xc] (8)
>947: $p0 mov u32 $r25 0x00000000 (8)
>948: neg f32 $r0 $r2 (8)
>949: add f32 $r0 $r14 $r0 (8)
>950: neg f32 $r1 $r3 (8)
>951: add f32 $r1 $r13 $r1 (8)
>952: neg f32 $r26 $r24 (8)
>953: add f32 $r26 $r12 $r26 (8)
>954: neg f32 $r27 $r25 (8)
>955: add f32 $r27 $r11 $r27 (8)
>956: mul f32 $r28 $r0 $r0 (8)
>957: mad f32 $r28 $r1 $r1 $r28 (8)
>958: mad f32 $r28 $r26 $r26 $r28 (8)
>959: mad f32 $r28 $r27 $r27 $r28 (8)
>960: rsq f32 $r28 $r28 (8)
>961: rcp f32 $r28 $r28 (8)
>962: ld  u32 $r29 c0[0x20] (8)
>963: neg f32 $r30 $r28 (8)
>964: add f32 $r29 $r29 $r30 (8)
>965: mov u32 $r30 0x3eb33333 (8)
>966: mul f32 $r29 $r30 $r29 (8)
>967: rcp f32 $r28 $r28 (8)
>968: mul f32 $r28 $r29 $r28 (8)
>969: mul f32 $r29 $r28 $r0 (8)
>970: mul f32 $r30 $r28 $r1 (8)
>971: mul f32 $r26 $r28 $r26 (8)
>972: mul f32 $r27 $r28 $r27 (8)
>973: mov u32 $r0 0x00000010 (8)
>974: mul u32 $r28 $r21 $r0 (8)
>975: mov u32 $r0 0x00000010 (8)
>976: mul u32 $r31 $r21 $r0 (8)
>977: ld  u64 $r0d c7[0x330] (8)
>978: mov u32 $r32 0x00000004 (8)
>979: ld  u32 $r33 c7[0x338] (8)
>980: add u32 { $r0 $c0 } $r0 $r31 (8)
>981: add u32 $r1 $r1 $r255 $c0 (8)
>982: add u32 $r32 $r32 $r31 (8)
>983: set u8 $p0 gt u32 $r32 $r33 (8)
>984: not $p0 ld  u32 $r32 g[$r0d+0x0] (8)
>985: $p0 mov u32 $r32 0x00000000 (8)
>986: ld  u64 $r0d c7[0x330] (8)
>987: mov u32 $r33 0x00000008 (8)
>988: ld  u32 $r34 c7[0x338] (8)
>989: add u32 { $r0 $c0 } $r0 $r31 (8)
>990: add u32 $r1 $r1 $r255 $c0 (8)
>991: add u32 $r33 $r33 $r31 (8)
>992: set u8 $p0 gt u32 $r33 $r34 (8)
>993: not $p0 ld  u32 $r33 g[$r0d+0x4] (8)
>994: $p0 mov u32 $r33 0x00000000 (8)
>995: ld  u64 $r0d c7[0x330] (8)
>996: mov u32 $r34 0x0000000c (8)
>997: ld  u32 $r35 c7[0x338] (8)
>998: add u32 { $r0 $c0 } $r0 $r31 (8)
>999: add u32 $r1 $r1 $r255 $c0 (8)
>1000: add u32 $r34 $r34 $r31 (8)
>1001: set u8 $p0 gt u32 $r34 $r35 (8)
>1002: not $p0 ld  u32 $r34 g[$r0d+0x8] (8)
>1003: $p0 mov u32 $r34 0x00000000 (8)
>1004: ld  u64 $r0d c7[0x330] (8)
>1005: mov u32 $r35 0x00000010 (8)
>1006: ld  u32 $r36 c7[0x338] (8)
>1007: add u32 { $r0 $c0 } $r0 $r31 (8)
>1008: add u32 $r1 $r1 $r255 $c0 (8)
>1009: add u32 $r31 $r35 $r31 (8)
>1010: set u8 $p0 gt u32 $r31 $r36 (8)
>1011: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1012: $p0 mov u32 $r0 0x00000000 (8)
>1013: add f32 $r31 $r32 $r29 (8)
>1014: add f32 $r32 $r33 $r30 (8)
>1015: add f32 $r33 $r34 $r26 (8)
>1016: add f32 $r34 $r0 $r27 (8)
>1017: ld  u64 $r0d c7[0x330] (8)
>1018: mov u32 $r35 0x00000004 (8)
>1019: ld  u32 $r36 c7[0x338] (8)
>1020: add u32 { $r0 $c0 } $r0 $r28 (8)
>1021: add u32 $r1 $r1 $r255 $c0 (8)
>1022: add u32 $r35 $r35 $r28 (8)
>1023: set u8 $p0 gt u32 $r35 $r36 (8)
>1024: not $p0 st  u32 # g[$r0d+0x0] $r31 (8)
>1025: ld  u64 $r0d c7[0x330] (8)
>1026: mov u32 $r31 0x00000008 (8)
>1027: ld  u32 $r35 c7[0x338] (8)
>1028: add u32 { $r0 $c0 } $r0 $r28 (8)
>1029: add u32 $r1 $r1 $r255 $c0 (8)
>1030: add u32 $r31 $r31 $r28 (8)
>1031: set u8 $p0 gt u32 $r31 $r35 (8)
>1032: not $p0 st  u32 # g[$r0d+0x4] $r32 (8)
>1033: ld  u64 $r0d c7[0x330] (8)
>1034: mov u32 $r31 0x0000000c (8)
>1035: ld  u32 $r32 c7[0x338] (8)
>1036: add u32 { $r0 $c0 } $r0 $r28 (8)
>1037: add u32 $r1 $r1 $r255 $c0 (8)
>1038: add u32 $r31 $r31 $r28 (8)
>1039: set u8 $p0 gt u32 $r31 $r32 (8)
>1040: not $p0 st  u32 # g[$r0d+0x8] $r33 (8)
>1041: ld  u64 $r0d c7[0x330] (8)
>1042: mov u32 $r31 0x00000010 (8)
>1043: ld  u32 $r32 c7[0x338] (8)
>1044: add u32 { $r0 $c0 } $r0 $r28 (8)
>1045: add u32 $r1 $r1 $r255 $c0 (8)
>1046: add u32 $r28 $r31 $r28 (8)
>1047: set u8 $p0 gt u32 $r28 $r32 (8)
>1048: not $p0 st  u32 # g[$r0d+0xc] $r34 (8)
>1049: mov u32 $r0 0x00000010 (8)
>1050: mul u32 $r28 $r23 $r0 (8)
>1051: mov u32 $r0 0x00000010 (8)
>1052: mul u32 $r31 $r23 $r0 (8)
>1053: ld  u64 $r0d c7[0x330] (8)
>1054: mov u32 $r32 0x00000004 (8)
>1055: ld  u32 $r33 c7[0x338] (8)
>1056: add u32 { $r0 $c0 } $r0 $r31 (8)
>1057: add u32 $r1 $r1 $r255 $c0 (8)
>1058: add u32 $r32 $r32 $r31 (8)
>1059: set u8 $p0 gt u32 $r32 $r33 (8)
>1060: not $p0 ld  u32 $r32 g[$r0d+0x0] (8)
>1061: $p0 mov u32 $r32 0x00000000 (8)
>1062: ld  u64 $r0d c7[0x330] (8)
>1063: mov u32 $r33 0x00000008 (8)
>1064: ld  u32 $r34 c7[0x338] (8)
>1065: add u32 { $r0 $c0 } $r0 $r31 (8)
>1066: add u32 $r1 $r1 $r255 $c0 (8)
>1067: add u32 $r33 $r33 $r31 (8)
>1068: set u8 $p0 gt u32 $r33 $r34 (8)
>1069: not $p0 ld  u32 $r33 g[$r0d+0x4] (8)
>1070: $p0 mov u32 $r33 0x00000000 (8)
>1071: ld  u64 $r0d c7[0x330] (8)
>1072: mov u32 $r34 0x0000000c (8)
>1073: ld  u32 $r35 c7[0x338] (8)
>1074: add u32 { $r0 $c0 } $r0 $r31 (8)
>1075: add u32 $r1 $r1 $r255 $c0 (8)
>1076: add u32 $r34 $r34 $r31 (8)
>1077: set u8 $p0 gt u32 $r34 $r35 (8)
>1078: not $p0 ld  u32 $r34 g[$r0d+0x8] (8)
>1079: $p0 mov u32 $r34 0x00000000 (8)
>1080: ld  u64 $r0d c7[0x330] (8)
>1081: mov u32 $r35 0x00000010 (8)
>1082: ld  u32 $r36 c7[0x338] (8)
>1083: add u32 { $r0 $c0 } $r0 $r31 (8)
>1084: add u32 $r1 $r1 $r255 $c0 (8)
>1085: add u32 $r31 $r35 $r31 (8)
>1086: set u8 $p0 gt u32 $r31 $r36 (8)
>1087: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1088: $p0 mov u32 $r0 0x00000000 (8)
>1089: neg f32 $r1 $r29 (8)
>1090: add f32 $r29 $r32 $r1 (8)
>1091: neg f32 $r1 $r30 (8)
>1092: add f32 $r30 $r33 $r1 (8)
>1093: neg f32 $r1 $r26 (8)
>1094: add f32 $r26 $r34 $r1 (8)
>1095: neg f32 $r1 $r27 (8)
>1096: add f32 $r27 $r0 $r1 (8)
>1097: ld  u64 $r0d c7[0x330] (8)
>1098: mov u32 $r31 0x00000004 (8)
>1099: ld  u32 $r32 c7[0x338] (8)
>1100: add u32 { $r0 $c0 } $r0 $r28 (8)
>1101: add u32 $r1 $r1 $r255 $c0 (8)
>1102: add u32 $r31 $r31 $r28 (8)
>1103: set u8 $p0 gt u32 $r31 $r32 (8)
>1104: not $p0 st  u32 # g[$r0d+0x0] $r29 (8)
>1105: ld  u64 $r0d c7[0x330] (8)
>1106: mov u32 $r29 0x00000008 (8)
>1107: ld  u32 $r31 c7[0x338] (8)
>1108: add u32 { $r0 $c0 } $r0 $r28 (8)
>1109: add u32 $r1 $r1 $r255 $c0 (8)
>1110: add u32 $r29 $r29 $r28 (8)
>1111: set u8 $p0 gt u32 $r29 $r31 (8)
>1112: not $p0 st  u32 # g[$r0d+0x4] $r30 (8)
>1113: ld  u64 $r0d c7[0x330] (8)
>1114: mov u32 $r29 0x0000000c (8)
>1115: ld  u32 $r30 c7[0x338] (8)
>1116: add u32 { $r0 $c0 } $r0 $r28 (8)
>1117: add u32 $r1 $r1 $r255 $c0 (8)
>1118: add u32 $r29 $r29 $r28 (8)
>1119: set u8 $p0 gt u32 $r29 $r30 (8)
>1120: not $p0 st  u32 # g[$r0d+0x8] $r26 (8)
>1121: ld  u64 $r0d c7[0x330] (8)
>1122: mov u32 $r26 0x00000010 (8)
>1123: ld  u32 $r29 c7[0x338] (8)
>1124: add u32 { $r0 $c0 } $r0 $r28 (8)
>1125: add u32 $r1 $r1 $r255 $c0 (8)
>1126: add u32 $r26 $r26 $r28 (8)
>1127: set u8 $p0 gt u32 $r26 $r29 (8)
>1128: not $p0 st  u32 # g[$r0d+0xc] $r27 (8)
>1129: membar (SUBOP:7) - # (8)
>1130: neg f32 $r0 $r2 (8)
>1131: add f32 $r0 $r10 $r0 (8)
>1132: neg f32 $r1 $r3 (8)
>1133: add f32 $r1 $r9 $r1 (8)
>1134: neg f32 $r26 $r24 (8)
>1135: add f32 $r26 $r8 $r26 (8)
>1136: neg f32 $r27 $r25 (8)
>1137: add f32 $r27 $r7 $r27 (8)
>1138: mul f32 $r28 $r0 $r0 (8)
>1139: mad f32 $r28 $r1 $r1 $r28 (8)
>1140: mad f32 $r28 $r26 $r26 $r28 (8)
>1141: mad f32 $r28 $r27 $r27 $r28 (8)
>1142: rsq f32 $r28 $r28 (8)
>1143: rcp f32 $r28 $r28 (8)
>1144: ld  u32 $r29 c0[0x20] (8)
>1145: neg f32 $r30 $r28 (8)
>1146: add f32 $r29 $r29 $r30 (8)
>1147: mov u32 $r30 0x3eb33333 (8)
>1148: mul f32 $r29 $r30 $r29 (8)
>1149: rcp f32 $r28 $r28 (8)
>1150: mul f32 $r28 $r29 $r28 (8)
>1151: mul f32 $r29 $r28 $r0 (8)
>1152: mul f32 $r30 $r28 $r1 (8)
>1153: mul f32 $r26 $r28 $r26 (8)
>1154: mul f32 $r27 $r28 $r27 (8)
>1155: mov u32 $r0 0x00000010 (8)
>1156: mul u32 $r28 $r22 $r0 (8)
>1157: mov u32 $r0 0x00000010 (8)
>1158: mul u32 $r31 $r22 $r0 (8)
>1159: ld  u64 $r0d c7[0x330] (8)
>1160: mov u32 $r32 0x00000004 (8)
>1161: ld  u32 $r33 c7[0x338] (8)
>1162: add u32 { $r0 $c0 } $r0 $r31 (8)
>1163: add u32 $r1 $r1 $r255 $c0 (8)
>1164: add u32 $r32 $r32 $r31 (8)
>1165: set u8 $p0 gt u32 $r32 $r33 (8)
>1166: not $p0 ld  u32 $r32 g[$r0d+0x0] (8)
>1167: $p0 mov u32 $r32 0x00000000 (8)
>1168: ld  u64 $r0d c7[0x330] (8)
>1169: mov u32 $r33 0x00000008 (8)
>1170: ld  u32 $r34 c7[0x338] (8)
>1171: add u32 { $r0 $c0 } $r0 $r31 (8)
>1172: add u32 $r1 $r1 $r255 $c0 (8)
>1173: add u32 $r33 $r33 $r31 (8)
>1174: set u8 $p0 gt u32 $r33 $r34 (8)
>1175: not $p0 ld  u32 $r33 g[$r0d+0x4] (8)
>1176: $p0 mov u32 $r33 0x00000000 (8)
>1177: ld  u64 $r0d c7[0x330] (8)
>1178: mov u32 $r34 0x0000000c (8)
>1179: ld  u32 $r35 c7[0x338] (8)
>1180: add u32 { $r0 $c0 } $r0 $r31 (8)
>1181: add u32 $r1 $r1 $r255 $c0 (8)
>1182: add u32 $r34 $r34 $r31 (8)
>1183: set u8 $p0 gt u32 $r34 $r35 (8)
>1184: not $p0 ld  u32 $r34 g[$r0d+0x8] (8)
>1185: $p0 mov u32 $r34 0x00000000 (8)
>1186: ld  u64 $r0d c7[0x330] (8)
>1187: mov u32 $r35 0x00000010 (8)
>1188: ld  u32 $r36 c7[0x338] (8)
>1189: add u32 { $r0 $c0 } $r0 $r31 (8)
>1190: add u32 $r1 $r1 $r255 $c0 (8)
>1191: add u32 $r31 $r35 $r31 (8)
>1192: set u8 $p0 gt u32 $r31 $r36 (8)
>1193: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1194: $p0 mov u32 $r0 0x00000000 (8)
>1195: add f32 $r31 $r32 $r29 (8)
>1196: add f32 $r32 $r33 $r30 (8)
>1197: add f32 $r33 $r34 $r26 (8)
>1198: add f32 $r34 $r0 $r27 (8)
>1199: ld  u64 $r0d c7[0x330] (8)
>1200: mov u32 $r35 0x00000004 (8)
>1201: ld  u32 $r36 c7[0x338] (8)
>1202: add u32 { $r0 $c0 } $r0 $r28 (8)
>1203: add u32 $r1 $r1 $r255 $c0 (8)
>1204: add u32 $r35 $r35 $r28 (8)
>1205: set u8 $p0 gt u32 $r35 $r36 (8)
>1206: not $p0 st  u32 # g[$r0d+0x0] $r31 (8)
>1207: ld  u64 $r0d c7[0x330] (8)
>1208: mov u32 $r31 0x00000008 (8)
>1209: ld  u32 $r35 c7[0x338] (8)
>1210: add u32 { $r0 $c0 } $r0 $r28 (8)
>1211: add u32 $r1 $r1 $r255 $c0 (8)
>1212: add u32 $r31 $r31 $r28 (8)
>1213: set u8 $p0 gt u32 $r31 $r35 (8)
>1214: not $p0 st  u32 # g[$r0d+0x4] $r32 (8)
>1215: ld  u64 $r0d c7[0x330] (8)
>1216: mov u32 $r31 0x0000000c (8)
>1217: ld  u32 $r32 c7[0x338] (8)
>1218: add u32 { $r0 $c0 } $r0 $r28 (8)
>1219: add u32 $r1 $r1 $r255 $c0 (8)
>1220: add u32 $r31 $r31 $r28 (8)
>1221: set u8 $p0 gt u32 $r31 $r32 (8)
>1222: not $p0 st  u32 # g[$r0d+0x8] $r33 (8)
>1223: ld  u64 $r0d c7[0x330] (8)
>1224: mov u32 $r31 0x00000010 (8)
>1225: ld  u32 $r32 c7[0x338] (8)
>1226: add u32 { $r0 $c0 } $r0 $r28 (8)
>1227: add u32 $r1 $r1 $r255 $c0 (8)
>1228: add u32 $r28 $r31 $r28 (8)
>1229: set u8 $p0 gt u32 $r28 $r32 (8)
>1230: not $p0 st  u32 # g[$r0d+0xc] $r34 (8)
>1231: mov u32 $r0 0x00000010 (8)
>1232: mul u32 $r28 $r23 $r0 (8)
>1233: mov u32 $r0 0x00000010 (8)
>1234: mul u32 $r31 $r23 $r0 (8)
>1235: ld  u64 $r0d c7[0x330] (8)
>1236: mov u32 $r32 0x00000004 (8)
>1237: ld  u32 $r33 c7[0x338] (8)
>1238: add u32 { $r0 $c0 } $r0 $r31 (8)
>1239: add u32 $r1 $r1 $r255 $c0 (8)
>1240: add u32 $r32 $r32 $r31 (8)
>1241: set u8 $p0 gt u32 $r32 $r33 (8)
>1242: not $p0 ld  u32 $r32 g[$r0d+0x0] (8)
>1243: $p0 mov u32 $r32 0x00000000 (8)
>1244: ld  u64 $r0d c7[0x330] (8)
>1245: mov u32 $r33 0x00000008 (8)
>1246: ld  u32 $r34 c7[0x338] (8)
>1247: add u32 { $r0 $c0 } $r0 $r31 (8)
>1248: add u32 $r1 $r1 $r255 $c0 (8)
>1249: add u32 $r33 $r33 $r31 (8)
>1250: set u8 $p0 gt u32 $r33 $r34 (8)
>1251: not $p0 ld  u32 $r33 g[$r0d+0x4] (8)
>1252: $p0 mov u32 $r33 0x00000000 (8)
>1253: ld  u64 $r0d c7[0x330] (8)
>1254: mov u32 $r34 0x0000000c (8)
>1255: ld  u32 $r35 c7[0x338] (8)
>1256: add u32 { $r0 $c0 } $r0 $r31 (8)
>1257: add u32 $r1 $r1 $r255 $c0 (8)
>1258: add u32 $r34 $r34 $r31 (8)
>1259: set u8 $p0 gt u32 $r34 $r35 (8)
>1260: not $p0 ld  u32 $r34 g[$r0d+0x8] (8)
>1261: $p0 mov u32 $r34 0x00000000 (8)
>1262: ld  u64 $r0d c7[0x330] (8)
>1263: mov u32 $r35 0x00000010 (8)
>1264: ld  u32 $r36 c7[0x338] (8)
>1265: add u32 { $r0 $c0 } $r0 $r31 (8)
>1266: add u32 $r1 $r1 $r255 $c0 (8)
>1267: add u32 $r31 $r35 $r31 (8)
>1268: set u8 $p0 gt u32 $r31 $r36 (8)
>1269: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1270: $p0 mov u32 $r0 0x00000000 (8)
>1271: neg f32 $r1 $r29 (8)
>1272: add f32 $r29 $r32 $r1 (8)
>1273: neg f32 $r1 $r30 (8)
>1274: add f32 $r30 $r33 $r1 (8)
>1275: neg f32 $r1 $r26 (8)
>1276: add f32 $r26 $r34 $r1 (8)
>1277: neg f32 $r1 $r27 (8)
>1278: add f32 $r27 $r0 $r1 (8)
>1279: ld  u64 $r0d c7[0x330] (8)
>1280: mov u32 $r31 0x00000004 (8)
>1281: ld  u32 $r32 c7[0x338] (8)
>1282: add u32 { $r0 $c0 } $r0 $r28 (8)
>1283: add u32 $r1 $r1 $r255 $c0 (8)
>1284: add u32 $r31 $r31 $r28 (8)
>1285: set u8 $p0 gt u32 $r31 $r32 (8)
>1286: not $p0 st  u32 # g[$r0d+0x0] $r29 (8)
>1287: ld  u64 $r0d c7[0x330] (8)
>1288: mov u32 $r29 0x00000008 (8)
>1289: ld  u32 $r31 c7[0x338] (8)
>1290: add u32 { $r0 $c0 } $r0 $r28 (8)
>1291: add u32 $r1 $r1 $r255 $c0 (8)
>1292: add u32 $r29 $r29 $r28 (8)
>1293: set u8 $p0 gt u32 $r29 $r31 (8)
>1294: not $p0 st  u32 # g[$r0d+0x4] $r30 (8)
>1295: ld  u64 $r0d c7[0x330] (8)
>1296: mov u32 $r29 0x0000000c (8)
>1297: ld  u32 $r30 c7[0x338] (8)
>1298: add u32 { $r0 $c0 } $r0 $r28 (8)
>1299: add u32 $r1 $r1 $r255 $c0 (8)
>1300: add u32 $r29 $r29 $r28 (8)
>1301: set u8 $p0 gt u32 $r29 $r30 (8)
>1302: not $p0 st  u32 # g[$r0d+0x8] $r26 (8)
>1303: ld  u64 $r0d c7[0x330] (8)
>1304: mov u32 $r26 0x00000010 (8)
>1305: ld  u32 $r29 c7[0x338] (8)
>1306: add u32 { $r0 $c0 } $r0 $r28 (8)
>1307: add u32 $r1 $r1 $r255 $c0 (8)
>1308: add u32 $r26 $r26 $r28 (8)
>1309: set u8 $p0 gt u32 $r26 $r29 (8)
>1310: not $p0 st  u32 # g[$r0d+0xc] $r27 (8)
>1311: membar (SUBOP:7) - # (8)
>1312: neg f32 $r0 $r2 (8)
>1313: add f32 $r0 $r17 $r0 (8)
>1314: neg f32 $r1 $r3 (8)
>1315: add f32 $r1 $r18 $r1 (8)
>1316: neg f32 $r2 $r24 (8)
>1317: add f32 $r2 $r19 $r2 (8)
>1318: neg f32 $r3 $r25 (8)
>1319: add f32 $r3 $r20 $r3 (8)
>1320: mul f32 $r17 $r0 $r0 (8)
>1321: mad f32 $r17 $r1 $r1 $r17 (8)
>1322: mad f32 $r17 $r2 $r2 $r17 (8)
>1323: mad f32 $r17 $r3 $r3 $r17 (8)
>1324: rsq f32 $r17 $r17 (8)
>1325: rcp f32 $r17 $r17 (8)
>1326: ld  u32 $r18 c0[0x30] (8)
>1327: neg f32 $r19 $r17 (8)
>1328: add f32 $r18 $r18 $r19 (8)
>1329: mov u32 $r19 0x3eb33333 (8)
>1330: mul f32 $r18 $r19 $r18 (8)
>1331: rcp f32 $r17 $r17 (8)
>1332: mul f32 $r17 $r18 $r17 (8)
>1333: mul f32 $r18 $r17 $r0 (8)
>1334: mul f32 $r19 $r17 $r1 (8)
>1335: mul f32 $r2 $r17 $r2 (8)
>1336: mul f32 $r3 $r17 $r3 (8)
>1337: mov u32 $r0 0x00000010 (8)
>1338: mul u32 $r17 $r4 $r0 (8)
>1339: mov u32 $r0 0x00000010 (8)
>1340: mul u32 $r20 $r4 $r0 (8)
>1341: ld  u64 $r0d c7[0x330] (8)
>1342: mov u32 $r24 0x00000004 (8)
>1343: ld  u32 $r25 c7[0x338] (8)
>1344: add u32 { $r0 $c0 } $r0 $r20 (8)
>1345: add u32 $r1 $r1 $r255 $c0 (8)
>1346: add u32 $r24 $r24 $r20 (8)
>1347: set u8 $p0 gt u32 $r24 $r25 (8)
>1348: not $p0 ld  u32 $r24 g[$r0d+0x0] (8)
>1349: $p0 mov u32 $r24 0x00000000 (8)
>1350: ld  u64 $r0d c7[0x330] (8)
>1351: mov u32 $r25 0x00000008 (8)
>1352: ld  u32 $r26 c7[0x338] (8)
>1353: add u32 { $r0 $c0 } $r0 $r20 (8)
>1354: add u32 $r1 $r1 $r255 $c0 (8)
>1355: add u32 $r25 $r25 $r20 (8)
>1356: set u8 $p0 gt u32 $r25 $r26 (8)
>1357: not $p0 ld  u32 $r25 g[$r0d+0x4] (8)
>1358: $p0 mov u32 $r25 0x00000000 (8)
>1359: ld  u64 $r0d c7[0x330] (8)
>1360: mov u32 $r26 0x0000000c (8)
>1361: ld  u32 $r27 c7[0x338] (8)
>1362: add u32 { $r0 $c0 } $r0 $r20 (8)
>1363: add u32 $r1 $r1 $r255 $c0 (8)
>1364: add u32 $r26 $r26 $r20 (8)
>1365: set u8 $p0 gt u32 $r26 $r27 (8)
>1366: not $p0 ld  u32 $r26 g[$r0d+0x8] (8)
>1367: $p0 mov u32 $r26 0x00000000 (8)
>1368: ld  u64 $r0d c7[0x330] (8)
>1369: mov u32 $r27 0x00000010 (8)
>1370: ld  u32 $r28 c7[0x338] (8)
>1371: add u32 { $r0 $c0 } $r0 $r20 (8)
>1372: add u32 $r1 $r1 $r255 $c0 (8)
>1373: add u32 $r20 $r27 $r20 (8)
>1374: set u8 $p0 gt u32 $r20 $r28 (8)
>1375: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1376: $p0 mov u32 $r0 0x00000000 (8)
>1377: add f32 $r20 $r24 $r18 (8)
>1378: add f32 $r24 $r25 $r19 (8)
>1379: add f32 $r25 $r26 $r2 (8)
>1380: add f32 $r26 $r0 $r3 (8)
>1381: ld  u64 $r0d c7[0x330] (8)
>1382: mov u32 $r27 0x00000004 (8)
>1383: ld  u32 $r28 c7[0x338] (8)
>1384: add u32 { $r0 $c0 } $r0 $r17 (8)
>1385: add u32 $r1 $r1 $r255 $c0 (8)
>1386: add u32 $r27 $r27 $r17 (8)
>1387: set u8 $p0 gt u32 $r27 $r28 (8)
>1388: not $p0 st  u32 # g[$r0d+0x0] $r20 (8)
>1389: ld  u64 $r0d c7[0x330] (8)
>1390: mov u32 $r20 0x00000008 (8)
>1391: ld  u32 $r27 c7[0x338] (8)
>1392: add u32 { $r0 $c0 } $r0 $r17 (8)
>1393: add u32 $r1 $r1 $r255 $c0 (8)
>1394: add u32 $r20 $r20 $r17 (8)
>1395: set u8 $p0 gt u32 $r20 $r27 (8)
>1396: not $p0 st  u32 # g[$r0d+0x4] $r24 (8)
>1397: ld  u64 $r0d c7[0x330] (8)
>1398: mov u32 $r20 0x0000000c (8)
>1399: ld  u32 $r24 c7[0x338] (8)
>1400: add u32 { $r0 $c0 } $r0 $r17 (8)
>1401: add u32 $r1 $r1 $r255 $c0 (8)
>1402: add u32 $r20 $r20 $r17 (8)
>1403: set u8 $p0 gt u32 $r20 $r24 (8)
>1404: not $p0 st  u32 # g[$r0d+0x8] $r25 (8)
>1405: ld  u64 $r0d c7[0x330] (8)
>1406: mov u32 $r20 0x00000010 (8)
>1407: ld  u32 $r24 c7[0x338] (8)
>1408: add u32 { $r0 $c0 } $r0 $r17 (8)
>1409: add u32 $r1 $r1 $r255 $c0 (8)
>1410: add u32 $r17 $r20 $r17 (8)
>1411: set u8 $p0 gt u32 $r17 $r24 (8)
>1412: not $p0 st  u32 # g[$r0d+0xc] $r26 (8)
>1413: mov u32 $r0 0x00000010 (8)
>1414: mul u32 $r17 $r23 $r0 (8)
>1415: mov u32 $r0 0x00000010 (8)
>1416: mul u32 $r20 $r23 $r0 (8)
>1417: ld  u64 $r0d c7[0x330] (8)
>1418: mov u32 $r23 0x00000004 (8)
>1419: ld  u32 $r24 c7[0x338] (8)
>1420: add u32 { $r0 $c0 } $r0 $r20 (8)
>1421: add u32 $r1 $r1 $r255 $c0 (8)
>1422: add u32 $r23 $r23 $r20 (8)
>1423: set u8 $p0 gt u32 $r23 $r24 (8)
>1424: not $p0 ld  u32 $r23 g[$r0d+0x0] (8)
>1425: $p0 mov u32 $r23 0x00000000 (8)
>1426: ld  u64 $r0d c7[0x330] (8)
>1427: mov u32 $r24 0x00000008 (8)
>1428: ld  u32 $r25 c7[0x338] (8)
>1429: add u32 { $r0 $c0 } $r0 $r20 (8)
>1430: add u32 $r1 $r1 $r255 $c0 (8)
>1431: add u32 $r24 $r24 $r20 (8)
>1432: set u8 $p0 gt u32 $r24 $r25 (8)
>1433: not $p0 ld  u32 $r24 g[$r0d+0x4] (8)
>1434: $p0 mov u32 $r24 0x00000000 (8)
>1435: ld  u64 $r0d c7[0x330] (8)
>1436: mov u32 $r25 0x0000000c (8)
>1437: ld  u32 $r26 c7[0x338] (8)
>1438: add u32 { $r0 $c0 } $r0 $r20 (8)
>1439: add u32 $r1 $r1 $r255 $c0 (8)
>1440: add u32 $r25 $r25 $r20 (8)
>1441: set u8 $p0 gt u32 $r25 $r26 (8)
>1442: not $p0 ld  u32 $r25 g[$r0d+0x8] (8)
>1443: $p0 mov u32 $r25 0x00000000 (8)
>1444: ld  u64 $r0d c7[0x330] (8)
>1445: mov u32 $r26 0x00000010 (8)
>1446: ld  u32 $r27 c7[0x338] (8)
>1447: add u32 { $r0 $c0 } $r0 $r20 (8)
>1448: add u32 $r1 $r1 $r255 $c0 (8)
>1449: add u32 $r20 $r26 $r20 (8)
>1450: set u8 $p0 gt u32 $r20 $r27 (8)
>1451: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1452: $p0 mov u32 $r0 0x00000000 (8)
>1453: neg f32 $r1 $r18 (8)
>1454: add f32 $r18 $r23 $r1 (8)
>1455: neg f32 $r1 $r19 (8)
>1456: add f32 $r19 $r24 $r1 (8)
>1457: neg f32 $r1 $r2 (8)
>1458: add f32 $r2 $r25 $r1 (8)
>1459: neg f32 $r1 $r3 (8)
>1460: add f32 $r3 $r0 $r1 (8)
>1461: ld  u64 $r0d c7[0x330] (8)
>1462: mov u32 $r20 0x00000004 (8)
>1463: ld  u32 $r23 c7[0x338] (8)
>1464: add u32 { $r0 $c0 } $r0 $r17 (8)
>1465: add u32 $r1 $r1 $r255 $c0 (8)
>1466: add u32 $r20 $r20 $r17 (8)
>1467: set u8 $p0 gt u32 $r20 $r23 (8)
>1468: not $p0 st  u32 # g[$r0d+0x0] $r18 (8)
>1469: ld  u64 $r0d c7[0x330] (8)
>1470: mov u32 $r18 0x00000008 (8)
>1471: ld  u32 $r20 c7[0x338] (8)
>1472: add u32 { $r0 $c0 } $r0 $r17 (8)
>1473: add u32 $r1 $r1 $r255 $c0 (8)
>1474: add u32 $r18 $r18 $r17 (8)
>1475: set u8 $p0 gt u32 $r18 $r20 (8)
>1476: not $p0 st  u32 # g[$r0d+0x4] $r19 (8)
>1477: ld  u64 $r0d c7[0x330] (8)
>1478: mov u32 $r18 0x0000000c (8)
>1479: ld  u32 $r19 c7[0x338] (8)
>1480: add u32 { $r0 $c0 } $r0 $r17 (8)
>1481: add u32 $r1 $r1 $r255 $c0 (8)
>1482: add u32 $r18 $r18 $r17 (8)
>1483: set u8 $p0 gt u32 $r18 $r19 (8)
>1484: not $p0 st  u32 # g[$r0d+0x8] $r2 (8)
>1485: ld  u64 $r0d c7[0x330] (8)
>1486: mov u32 $r2 0x00000010 (8)
>1487: ld  u32 $r18 c7[0x338] (8)
>1488: add u32 { $r0 $c0 } $r0 $r17 (8)
>1489: add u32 $r1 $r1 $r255 $c0 (8)
>1490: add u32 $r2 $r2 $r17 (8)
>1491: set u8 $p0 gt u32 $r2 $r18 (8)
>1492: not $p0 st  u32 # g[$r0d+0xc] $r3 (8)
>1493: neg f32 $r0 $r10 (8)
>1494: add f32 $r0 $r14 $r0 (8)
>1495: neg f32 $r1 $r9 (8)
>1496: add f32 $r1 $r13 $r1 (8)
>1497: neg f32 $r2 $r8 (8)
>1498: add f32 $r2 $r12 $r2 (8)
>1499: neg f32 $r3 $r7 (8)
>1500: add f32 $r3 $r11 $r3 (8)
>1501: mul f32 $r17 $r0 $r0 (8)
>1502: mad f32 $r17 $r1 $r1 $r17 (8)
>1503: mad f32 $r17 $r2 $r2 $r17 (8)
>1504: mad f32 $r17 $r3 $r3 $r17 (8)
>1505: rsq f32 $r17 $r17 (8)
>1506: rcp f32 $r17 $r17 (8)
>1507: ld  u32 $r18 c0[0x30] (8)
>1508: neg f32 $r19 $r17 (8)
>1509: add f32 $r18 $r18 $r19 (8)
>1510: mov u32 $r19 0x3eb33333 (8)
>1511: mul f32 $r18 $r19 $r18 (8)
>1512: rcp f32 $r17 $r17 (8)
>1513: mul f32 $r17 $r18 $r17 (8)
>1514: mul f32 $r18 $r17 $r0 (8)
>1515: mul f32 $r19 $r17 $r1 (8)
>1516: mul f32 $r2 $r17 $r2 (8)
>1517: mul f32 $r3 $r17 $r3 (8)
>1518: mov u32 $r0 0x00000010 (8)
>1519: mul u32 $r17 $r21 $r0 (8)
>1520: mov u32 $r0 0x00000010 (8)
>1521: mul u32 $r20 $r21 $r0 (8)
>1522: ld  u64 $r0d c7[0x330] (8)
>1523: mov u32 $r21 0x00000004 (8)
>1524: ld  u32 $r23 c7[0x338] (8)
>1525: add u32 { $r0 $c0 } $r0 $r20 (8)
>1526: add u32 $r1 $r1 $r255 $c0 (8)
>1527: add u32 $r21 $r21 $r20 (8)
>1528: set u8 $p0 gt u32 $r21 $r23 (8)
>1529: not $p0 ld  u32 $r21 g[$r0d+0x0] (8)
>1530: $p0 mov u32 $r21 0x00000000 (8)
>1531: ld  u64 $r0d c7[0x330] (8)
>1532: mov u32 $r23 0x00000008 (8)
>1533: ld  u32 $r24 c7[0x338] (8)
>1534: add u32 { $r0 $c0 } $r0 $r20 (8)
>1535: add u32 $r1 $r1 $r255 $c0 (8)
>1536: add u32 $r23 $r23 $r20 (8)
>1537: set u8 $p0 gt u32 $r23 $r24 (8)
>1538: not $p0 ld  u32 $r23 g[$r0d+0x4] (8)
>1539: $p0 mov u32 $r23 0x00000000 (8)
>1540: ld  u64 $r0d c7[0x330] (8)
>1541: mov u32 $r24 0x0000000c (8)
>1542: ld  u32 $r25 c7[0x338] (8)
>1543: add u32 { $r0 $c0 } $r0 $r20 (8)
>1544: add u32 $r1 $r1 $r255 $c0 (8)
>1545: add u32 $r24 $r24 $r20 (8)
>1546: set u8 $p0 gt u32 $r24 $r25 (8)
>1547: not $p0 ld  u32 $r24 g[$r0d+0x8] (8)
>1548: $p0 mov u32 $r24 0x00000000 (8)
>1549: ld  u64 $r0d c7[0x330] (8)
>1550: mov u32 $r25 0x00000010 (8)
>1551: ld  u32 $r26 c7[0x338] (8)
>1552: add u32 { $r0 $c0 } $r0 $r20 (8)
>1553: add u32 $r1 $r1 $r255 $c0 (8)
>1554: add u32 $r20 $r25 $r20 (8)
>1555: set u8 $p0 gt u32 $r20 $r26 (8)
>1556: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1557: $p0 mov u32 $r0 0x00000000 (8)
>1558: add f32 $r20 $r21 $r18 (8)
>1559: add f32 $r21 $r23 $r19 (8)
>1560: add f32 $r23 $r24 $r2 (8)
>1561: add f32 $r24 $r0 $r3 (8)
>1562: ld  u64 $r0d c7[0x330] (8)
>1563: mov u32 $r25 0x00000004 (8)
>1564: ld  u32 $r26 c7[0x338] (8)
>1565: add u32 { $r0 $c0 } $r0 $r17 (8)
>1566: add u32 $r1 $r1 $r255 $c0 (8)
>1567: add u32 $r25 $r25 $r17 (8)
>1568: set u8 $p0 gt u32 $r25 $r26 (8)
>1569: not $p0 st  u32 # g[$r0d+0x0] $r20 (8)
>1570: ld  u64 $r0d c7[0x330] (8)
>1571: mov u32 $r20 0x00000008 (8)
>1572: ld  u32 $r25 c7[0x338] (8)
>1573: add u32 { $r0 $c0 } $r0 $r17 (8)
>1574: add u32 $r1 $r1 $r255 $c0 (8)
>1575: add u32 $r20 $r20 $r17 (8)
>1576: set u8 $p0 gt u32 $r20 $r25 (8)
>1577: not $p0 st  u32 # g[$r0d+0x4] $r21 (8)
>1578: ld  u64 $r0d c7[0x330] (8)
>1579: mov u32 $r20 0x0000000c (8)
>1580: ld  u32 $r21 c7[0x338] (8)
>1581: add u32 { $r0 $c0 } $r0 $r17 (8)
>1582: add u32 $r1 $r1 $r255 $c0 (8)
>1583: add u32 $r20 $r20 $r17 (8)
>1584: set u8 $p0 gt u32 $r20 $r21 (8)
>1585: not $p0 st  u32 # g[$r0d+0x8] $r23 (8)
>1586: ld  u64 $r0d c7[0x330] (8)
>1587: mov u32 $r20 0x00000010 (8)
>1588: ld  u32 $r21 c7[0x338] (8)
>1589: add u32 { $r0 $c0 } $r0 $r17 (8)
>1590: add u32 $r1 $r1 $r255 $c0 (8)
>1591: add u32 $r17 $r20 $r17 (8)
>1592: set u8 $p0 gt u32 $r17 $r21 (8)
>1593: not $p0 st  u32 # g[$r0d+0xc] $r24 (8)
>1594: mov u32 $r0 0x00000010 (8)
>1595: mul u32 $r17 $r22 $r0 (8)
>1596: mov u32 $r0 0x00000010 (8)
>1597: mul u32 $r20 $r22 $r0 (8)
>1598: ld  u64 $r0d c7[0x330] (8)
>1599: mov u32 $r21 0x00000004 (8)
>1600: ld  u32 $r22 c7[0x338] (8)
>1601: add u32 { $r0 $c0 } $r0 $r20 (8)
>1602: add u32 $r1 $r1 $r255 $c0 (8)
>1603: add u32 $r21 $r21 $r20 (8)
>1604: set u8 $p0 gt u32 $r21 $r22 (8)
>1605: not $p0 ld  u32 $r21 g[$r0d+0x0] (8)
>1606: $p0 mov u32 $r21 0x00000000 (8)
>1607: ld  u64 $r0d c7[0x330] (8)
>1608: mov u32 $r22 0x00000008 (8)
>1609: ld  u32 $r23 c7[0x338] (8)
>1610: add u32 { $r0 $c0 } $r0 $r20 (8)
>1611: add u32 $r1 $r1 $r255 $c0 (8)
>1612: add u32 $r22 $r22 $r20 (8)
>1613: set u8 $p0 gt u32 $r22 $r23 (8)
>1614: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>1615: $p0 mov u32 $r22 0x00000000 (8)
>1616: ld  u64 $r0d c7[0x330] (8)
>1617: mov u32 $r23 0x0000000c (8)
>1618: ld  u32 $r24 c7[0x338] (8)
>1619: add u32 { $r0 $c0 } $r0 $r20 (8)
>1620: add u32 $r1 $r1 $r255 $c0 (8)
>1621: add u32 $r23 $r23 $r20 (8)
>1622: set u8 $p0 gt u32 $r23 $r24 (8)
>1623: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>1624: $p0 mov u32 $r23 0x00000000 (8)
>1625: ld  u64 $r0d c7[0x330] (8)
>1626: mov u32 $r24 0x00000010 (8)
>1627: ld  u32 $r25 c7[0x338] (8)
>1628: add u32 { $r0 $c0 } $r0 $r20 (8)
>1629: add u32 $r1 $r1 $r255 $c0 (8)
>1630: add u32 $r20 $r24 $r20 (8)
>1631: set u8 $p0 gt u32 $r20 $r25 (8)
>1632: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1633: $p0 mov u32 $r0 0x00000000 (8)
>1634: neg f32 $r1 $r18 (8)
>1635: add f32 $r18 $r21 $r1 (8)
>1636: neg f32 $r1 $r19 (8)
>1637: add f32 $r19 $r22 $r1 (8)
>1638: neg f32 $r1 $r2 (8)
>1639: add f32 $r2 $r23 $r1 (8)
>1640: neg f32 $r1 $r3 (8)
>1641: add f32 $r3 $r0 $r1 (8)
>1642: ld  u64 $r0d c7[0x330] (8)
>1643: mov u32 $r20 0x00000004 (8)
>1644: ld  u32 $r21 c7[0x338] (8)
>1645: add u32 { $r0 $c0 } $r0 $r17 (8)
>1646: add u32 $r1 $r1 $r255 $c0 (8)
>1647: add u32 $r20 $r20 $r17 (8)
>1648: set u8 $p0 gt u32 $r20 $r21 (8)
>1649: not $p0 st  u32 # g[$r0d+0x0] $r18 (8)
>1650: ld  u64 $r0d c7[0x330] (8)
>1651: mov u32 $r18 0x00000008 (8)
>1652: ld  u32 $r20 c7[0x338] (8)
>1653: add u32 { $r0 $c0 } $r0 $r17 (8)
>1654: add u32 $r1 $r1 $r255 $c0 (8)
>1655: add u32 $r18 $r18 $r17 (8)
>1656: set u8 $p0 gt u32 $r18 $r20 (8)
>1657: not $p0 st  u32 # g[$r0d+0x4] $r19 (8)
>1658: ld  u64 $r0d c7[0x330] (8)
>1659: mov u32 $r18 0x0000000c (8)
>1660: ld  u32 $r19 c7[0x338] (8)
>1661: add u32 { $r0 $c0 } $r0 $r17 (8)
>1662: add u32 $r1 $r1 $r255 $c0 (8)
>1663: add u32 $r18 $r18 $r17 (8)
>1664: set u8 $p0 gt u32 $r18 $r19 (8)
>1665: not $p0 st  u32 # g[$r0d+0x8] $r2 (8)
>1666: ld  u64 $r0d c7[0x330] (8)
>1667: mov u32 $r2 0x00000010 (8)
>1668: ld  u32 $r18 c7[0x338] (8)
>1669: add u32 { $r0 $c0 } $r0 $r17 (8)
>1670: add u32 $r1 $r1 $r255 $c0 (8)
>1671: add u32 $r2 $r2 $r17 (8)
>1672: set u8 $p0 gt u32 $r2 $r18 (8)
>1673: not $p0 st  u32 # g[$r0d+0xc] $r3 (8)
>1674: membar (SUBOP:7) - # (8)
>1675: join BB:24 (8)
>BB:63 (1 instructions) - df = { }
> -> BB:24 (forward)
>1676: join BB:24 (8)
>BB:24 (1 instructions) - idom = BB:22, df = { BB:35 }
> -> BB:35 (forward)
>1677: join BB:35 (8)
>BB:25 (14 instructions) - idom = BB:17, df = { BB:35 }
> -> BB:29 (tree)
> -> BB:26 (tree)
>1678: mov u32 $r0 0x00000001 (8)
>1679: set u32 $r17 eq $r16 $r0 (8)
>1680: mov u32 $r1 0x00000002 (8)
>1681: mov u32 $r0 $r6 (8)
>1682: call abs BUILTIN:1 (8)
>1683: mov u32 $r0 0x00000001 (8)
>1684: set u32 $r0 eq $r1 $r0 (8)
>1685: and u32 $r0 $r17 $r0 (8)
>1686: mov u32 $r1 0x00000000 (8)
>1687: set u32 $r1 eq $r5 $r1 (8)
>1688: and u32 $r0 $r0 $r1 (8)
>1689: joinat BB:34 (8)
>1690: set u8 $p0 neu u32 $r255 $r0 (8)
>1691: not $p0 bra BB:29 (8)
>BB:26 (7 instructions) - idom = BB:25, df = { BB:34 }
> -> BB:60 (tree)
> -> BB:27 (tree)
>1692: mov u32 $r0 0x00000001 (8)
>1693: add u32 $r2 $r4 $r0 (8)
>1694: ld  u32 $r0 c0[0x0] (8)
>1695: set s32 $r0 lt $r2 $r0 (8)
>1696: joinat BB:28 (8)
>1697: set u8 $p0 neu u32 $r255 $r0 (8)
>1698: not $p0 bra BB:60 (8)
>BB:27 (259 instructions) - idom = BB:26, df = { BB:28 }
> -> BB:28 (forward)
>1699: mov u32 $r0 0x00000010 (8)
>1700: mul u32 $r3 $r4 $r0 (8)
>1701: ld  u64 $r0d c7[0x330] (8)
>1702: mov u32 $r17 0x00000004 (8)
>1703: ld  u32 $r18 c7[0x338] (8)
>1704: add u32 { $r0 $c0 } $r0 $r3 (8)
>1705: add u32 $r1 $r1 $r255 $c0 (8)
>1706: add u32 $r17 $r17 $r3 (8)
>1707: set u8 $p0 gt u32 $r17 $r18 (8)
>1708: not $p0 ld  u32 $r17 g[$r0d+0x0] (8)
>1709: $p0 mov u32 $r17 0x00000000 (8)
>1710: ld  u64 $r0d c7[0x330] (8)
>1711: mov u32 $r18 0x00000008 (8)
>1712: ld  u32 $r19 c7[0x338] (8)
>1713: add u32 { $r0 $c0 } $r0 $r3 (8)
>1714: add u32 $r1 $r1 $r255 $c0 (8)
>1715: add u32 $r18 $r18 $r3 (8)
>1716: set u8 $p0 gt u32 $r18 $r19 (8)
>1717: not $p0 ld  u32 $r18 g[$r0d+0x4] (8)
>1718: $p0 mov u32 $r18 0x00000000 (8)
>1719: ld  u64 $r0d c7[0x330] (8)
>1720: mov u32 $r19 0x0000000c (8)
>1721: ld  u32 $r20 c7[0x338] (8)
>1722: add u32 { $r0 $c0 } $r0 $r3 (8)
>1723: add u32 $r1 $r1 $r255 $c0 (8)
>1724: add u32 $r19 $r19 $r3 (8)
>1725: set u8 $p0 gt u32 $r19 $r20 (8)
>1726: not $p0 ld  u32 $r19 g[$r0d+0x8] (8)
>1727: $p0 mov u32 $r19 0x00000000 (8)
>1728: ld  u64 $r0d c7[0x330] (8)
>1729: mov u32 $r20 0x00000010 (8)
>1730: ld  u32 $r21 c7[0x338] (8)
>1731: add u32 { $r0 $c0 } $r0 $r3 (8)
>1732: add u32 $r1 $r1 $r255 $c0 (8)
>1733: add u32 $r3 $r20 $r3 (8)
>1734: set u8 $p0 gt u32 $r3 $r21 (8)
>1735: not $p0 ld  u32 $r3 g[$r0d+0xc] (8)
>1736: $p0 mov u32 $r3 0x00000000 (8)
>1737: mov u32 $r0 0x00000010 (8)
>1738: mul u32 $r20 $r2 $r0 (8)
>1739: ld  u64 $r0d c7[0x330] (8)
>1740: mov u32 $r21 0x00000004 (8)
>1741: ld  u32 $r22 c7[0x338] (8)
>1742: add u32 { $r0 $c0 } $r0 $r20 (8)
>1743: add u32 $r1 $r1 $r255 $c0 (8)
>1744: add u32 $r21 $r21 $r20 (8)
>1745: set u8 $p0 gt u32 $r21 $r22 (8)
>1746: not $p0 ld  u32 $r21 g[$r0d+0x0] (8)
>1747: $p0 mov u32 $r21 0x00000000 (8)
>1748: ld  u64 $r0d c7[0x330] (8)
>1749: mov u32 $r22 0x00000008 (8)
>1750: ld  u32 $r23 c7[0x338] (8)
>1751: add u32 { $r0 $c0 } $r0 $r20 (8)
>1752: add u32 $r1 $r1 $r255 $c0 (8)
>1753: add u32 $r22 $r22 $r20 (8)
>1754: set u8 $p0 gt u32 $r22 $r23 (8)
>1755: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>1756: $p0 mov u32 $r22 0x00000000 (8)
>1757: ld  u64 $r0d c7[0x330] (8)
>1758: mov u32 $r23 0x0000000c (8)
>1759: ld  u32 $r24 c7[0x338] (8)
>1760: add u32 { $r0 $c0 } $r0 $r20 (8)
>1761: add u32 $r1 $r1 $r255 $c0 (8)
>1762: add u32 $r23 $r23 $r20 (8)
>1763: set u8 $p0 gt u32 $r23 $r24 (8)
>1764: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>1765: $p0 mov u32 $r23 0x00000000 (8)
>1766: ld  u64 $r0d c7[0x330] (8)
>1767: mov u32 $r24 0x00000010 (8)
>1768: ld  u32 $r25 c7[0x338] (8)
>1769: add u32 { $r0 $c0 } $r0 $r20 (8)
>1770: add u32 $r1 $r1 $r255 $c0 (8)
>1771: add u32 $r20 $r24 $r20 (8)
>1772: set u8 $p0 gt u32 $r20 $r25 (8)
>1773: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1774: $p0 mov u32 $r0 0x00000000 (8)
>1775: neg f32 $r1 $r21 (8)
>1776: add f32 $r1 $r17 $r1 (8)
>1777: neg f32 $r17 $r22 (8)
>1778: add f32 $r17 $r18 $r17 (8)
>1779: neg f32 $r18 $r23 (8)
>1780: add f32 $r18 $r19 $r18 (8)
>1781: neg f32 $r0 $r0 (8)
>1782: add f32 $r0 $r3 $r0 (8)
>1783: mul f32 $r3 $r1 $r1 (8)
>1784: mad f32 $r3 $r17 $r17 $r3 (8)
>1785: mad f32 $r3 $r18 $r18 $r3 (8)
>1786: mad f32 $r3 $r0 $r0 $r3 (8)
>1787: rsq f32 $r3 $r3 (8)
>1788: rcp f32 $r3 $r3 (8)
>1789: ld  u32 $r19 c0[0x20] (8)
>1790: neg f32 $r20 $r3 (8)
>1791: add f32 $r19 $r19 $r20 (8)
>1792: mov u32 $r20 0x3eb33333 (8)
>1793: mul f32 $r19 $r20 $r19 (8)
>1794: rcp f32 $r3 $r3 (8)
>1795: mul f32 $r3 $r19 $r3 (8)
>1796: mul f32 $r19 $r3 $r1 (8)
>1797: mul f32 $r17 $r3 $r17 (8)
>1798: mul f32 $r18 $r3 $r18 (8)
>1799: mul f32 $r3 $r3 $r0 (8)
>1800: mov u32 $r0 0x00000010 (8)
>1801: mul u32 $r20 $r4 $r0 (8)
>1802: mov u32 $r0 0x00000010 (8)
>1803: mul u32 $r21 $r4 $r0 (8)
>1804: ld  u64 $r0d c7[0x330] (8)
>1805: mov u32 $r22 0x00000004 (8)
>1806: ld  u32 $r23 c7[0x338] (8)
>1807: add u32 { $r0 $c0 } $r0 $r21 (8)
>1808: add u32 $r1 $r1 $r255 $c0 (8)
>1809: add u32 $r22 $r22 $r21 (8)
>1810: set u8 $p0 gt u32 $r22 $r23 (8)
>1811: not $p0 ld  u32 $r22 g[$r0d+0x0] (8)
>1812: $p0 mov u32 $r22 0x00000000 (8)
>1813: ld  u64 $r0d c7[0x330] (8)
>1814: mov u32 $r23 0x00000008 (8)
>1815: ld  u32 $r24 c7[0x338] (8)
>1816: add u32 { $r0 $c0 } $r0 $r21 (8)
>1817: add u32 $r1 $r1 $r255 $c0 (8)
>1818: add u32 $r23 $r23 $r21 (8)
>1819: set u8 $p0 gt u32 $r23 $r24 (8)
>1820: not $p0 ld  u32 $r23 g[$r0d+0x4] (8)
>1821: $p0 mov u32 $r23 0x00000000 (8)
>1822: ld  u64 $r0d c7[0x330] (8)
>1823: mov u32 $r24 0x0000000c (8)
>1824: ld  u32 $r25 c7[0x338] (8)
>1825: add u32 { $r0 $c0 } $r0 $r21 (8)
>1826: add u32 $r1 $r1 $r255 $c0 (8)
>1827: add u32 $r24 $r24 $r21 (8)
>1828: set u8 $p0 gt u32 $r24 $r25 (8)
>1829: not $p0 ld  u32 $r24 g[$r0d+0x8] (8)
>1830: $p0 mov u32 $r24 0x00000000 (8)
>1831: ld  u64 $r0d c7[0x330] (8)
>1832: mov u32 $r25 0x00000010 (8)
>1833: ld  u32 $r26 c7[0x338] (8)
>1834: add u32 { $r0 $c0 } $r0 $r21 (8)
>1835: add u32 $r1 $r1 $r255 $c0 (8)
>1836: add u32 $r21 $r25 $r21 (8)
>1837: set u8 $p0 gt u32 $r21 $r26 (8)
>1838: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1839: $p0 mov u32 $r0 0x00000000 (8)
>1840: add f32 $r21 $r22 $r19 (8)
>1841: add f32 $r22 $r23 $r17 (8)
>1842: add f32 $r23 $r24 $r18 (8)
>1843: add f32 $r24 $r0 $r3 (8)
>1844: ld  u64 $r0d c7[0x330] (8)
>1845: mov u32 $r25 0x00000004 (8)
>1846: ld  u32 $r26 c7[0x338] (8)
>1847: add u32 { $r0 $c0 } $r0 $r20 (8)
>1848: add u32 $r1 $r1 $r255 $c0 (8)
>1849: add u32 $r25 $r25 $r20 (8)
>1850: set u8 $p0 gt u32 $r25 $r26 (8)
>1851: not $p0 st  u32 # g[$r0d+0x0] $r21 (8)
>1852: ld  u64 $r0d c7[0x330] (8)
>1853: mov u32 $r21 0x00000008 (8)
>1854: ld  u32 $r25 c7[0x338] (8)
>1855: add u32 { $r0 $c0 } $r0 $r20 (8)
>1856: add u32 $r1 $r1 $r255 $c0 (8)
>1857: add u32 $r21 $r21 $r20 (8)
>1858: set u8 $p0 gt u32 $r21 $r25 (8)
>1859: not $p0 st  u32 # g[$r0d+0x4] $r22 (8)
>1860: ld  u64 $r0d c7[0x330] (8)
>1861: mov u32 $r21 0x0000000c (8)
>1862: ld  u32 $r22 c7[0x338] (8)
>1863: add u32 { $r0 $c0 } $r0 $r20 (8)
>1864: add u32 $r1 $r1 $r255 $c0 (8)
>1865: add u32 $r21 $r21 $r20 (8)
>1866: set u8 $p0 gt u32 $r21 $r22 (8)
>1867: not $p0 st  u32 # g[$r0d+0x8] $r23 (8)
>1868: ld  u64 $r0d c7[0x330] (8)
>1869: mov u32 $r21 0x00000010 (8)
>1870: ld  u32 $r22 c7[0x338] (8)
>1871: add u32 { $r0 $c0 } $r0 $r20 (8)
>1872: add u32 $r1 $r1 $r255 $c0 (8)
>1873: add u32 $r20 $r21 $r20 (8)
>1874: set u8 $p0 gt u32 $r20 $r22 (8)
>1875: not $p0 st  u32 # g[$r0d+0xc] $r24 (8)
>1876: mov u32 $r0 0x00000010 (8)
>1877: mul u32 $r20 $r2 $r0 (8)
>1878: mov u32 $r0 0x00000010 (8)
>1879: mul u32 $r2 $r2 $r0 (8)
>1880: ld  u64 $r0d c7[0x330] (8)
>1881: mov u32 $r21 0x00000004 (8)
>1882: ld  u32 $r22 c7[0x338] (8)
>1883: add u32 { $r0 $c0 } $r0 $r2 (8)
>1884: add u32 $r1 $r1 $r255 $c0 (8)
>1885: add u32 $r21 $r21 $r2 (8)
>1886: set u8 $p0 gt u32 $r21 $r22 (8)
>1887: not $p0 ld  u32 $r21 g[$r0d+0x0] (8)
>1888: $p0 mov u32 $r21 0x00000000 (8)
>1889: ld  u64 $r0d c7[0x330] (8)
>1890: mov u32 $r22 0x00000008 (8)
>1891: ld  u32 $r23 c7[0x338] (8)
>1892: add u32 { $r0 $c0 } $r0 $r2 (8)
>1893: add u32 $r1 $r1 $r255 $c0 (8)
>1894: add u32 $r22 $r22 $r2 (8)
>1895: set u8 $p0 gt u32 $r22 $r23 (8)
>1896: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>1897: $p0 mov u32 $r22 0x00000000 (8)
>1898: ld  u64 $r0d c7[0x330] (8)
>1899: mov u32 $r23 0x0000000c (8)
>1900: ld  u32 $r24 c7[0x338] (8)
>1901: add u32 { $r0 $c0 } $r0 $r2 (8)
>1902: add u32 $r1 $r1 $r255 $c0 (8)
>1903: add u32 $r23 $r23 $r2 (8)
>1904: set u8 $p0 gt u32 $r23 $r24 (8)
>1905: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>1906: $p0 mov u32 $r23 0x00000000 (8)
>1907: ld  u64 $r0d c7[0x330] (8)
>1908: mov u32 $r24 0x00000010 (8)
>1909: ld  u32 $r25 c7[0x338] (8)
>1910: add u32 { $r0 $c0 } $r0 $r2 (8)
>1911: add u32 $r1 $r1 $r255 $c0 (8)
>1912: add u32 $r2 $r24 $r2 (8)
>1913: set u8 $p0 gt u32 $r2 $r25 (8)
>1914: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>1915: $p0 mov u32 $r0 0x00000000 (8)
>1916: neg f32 $r1 $r19 (8)
>1917: add f32 $r2 $r21 $r1 (8)
>1918: neg f32 $r1 $r17 (8)
>1919: add f32 $r17 $r22 $r1 (8)
>1920: neg f32 $r1 $r18 (8)
>1921: add f32 $r18 $r23 $r1 (8)
>1922: neg f32 $r1 $r3 (8)
>1923: add f32 $r3 $r0 $r1 (8)
>1924: ld  u64 $r0d c7[0x330] (8)
>1925: mov u32 $r19 0x00000004 (8)
>1926: ld  u32 $r21 c7[0x338] (8)
>1927: add u32 { $r0 $c0 } $r0 $r20 (8)
>1928: add u32 $r1 $r1 $r255 $c0 (8)
>1929: add u32 $r19 $r19 $r20 (8)
>1930: set u8 $p0 gt u32 $r19 $r21 (8)
>1931: not $p0 st  u32 # g[$r0d+0x0] $r2 (8)
>1932: ld  u64 $r0d c7[0x330] (8)
>1933: mov u32 $r2 0x00000008 (8)
>1934: ld  u32 $r19 c7[0x338] (8)
>1935: add u32 { $r0 $c0 } $r0 $r20 (8)
>1936: add u32 $r1 $r1 $r255 $c0 (8)
>1937: add u32 $r2 $r2 $r20 (8)
>1938: set u8 $p0 gt u32 $r2 $r19 (8)
>1939: not $p0 st  u32 # g[$r0d+0x4] $r17 (8)
>1940: ld  u64 $r0d c7[0x330] (8)
>1941: mov u32 $r2 0x0000000c (8)
>1942: ld  u32 $r17 c7[0x338] (8)
>1943: add u32 { $r0 $c0 } $r0 $r20 (8)
>1944: add u32 $r1 $r1 $r255 $c0 (8)
>1945: add u32 $r2 $r2 $r20 (8)
>1946: set u8 $p0 gt u32 $r2 $r17 (8)
>1947: not $p0 st  u32 # g[$r0d+0x8] $r18 (8)
>1948: ld  u64 $r0d c7[0x330] (8)
>1949: mov u32 $r2 0x00000010 (8)
>1950: ld  u32 $r17 c7[0x338] (8)
>1951: add u32 { $r0 $c0 } $r0 $r20 (8)
>1952: add u32 $r1 $r1 $r255 $c0 (8)
>1953: add u32 $r2 $r2 $r20 (8)
>1954: set u8 $p0 gt u32 $r2 $r17 (8)
>1955: not $p0 st  u32 # g[$r0d+0xc] $r3 (8)
>1956: membar (SUBOP:7) - # (8)
>1957: join BB:28 (8)
>BB:60 (1 instructions) - df = { }
> -> BB:28 (forward)
>1958: join BB:28 (8)
>BB:28 (1 instructions) - idom = BB:26, df = { BB:34 }
> -> BB:34 (forward)
>1959: join BB:34 (8)
>BB:29 (14 instructions) - idom = BB:25, df = { BB:34 }
> -> BB:58 (tree)
> -> BB:30 (tree)
>1960: mov u32 $r0 0x00000001 (8)
>1961: set u32 $r17 eq $r16 $r0 (8)
>1962: mov u32 $r1 0x00000002 (8)
>1963: mov u32 $r0 $r5 (8)
>1964: call abs BUILTIN:1 (8)
>1965: mov u32 $r0 0x00000001 (8)
>1966: set u32 $r0 eq $r1 $r0 (8)
>1967: and u32 $r0 $r17 $r0 (8)
>1968: mov u32 $r1 0x00000000 (8)
>1969: set u32 $r1 eq $r6 $r1 (8)
>1970: and u32 $r0 $r0 $r1 (8)
>1971: joinat BB:33 (8)
>1972: set u8 $p0 neu u32 $r255 $r0 (8)
>1973: not $p0 bra BB:58 (8)
>BB:30 (9 instructions) - idom = BB:29, df = { BB:33 }
> -> BB:59 (tree)
> -> BB:31 (tree)
>1974: ld  u32 $r0 c0[0x0] (8)
>1975: add u32 $r2 $r4 $r0 (8)
>1976: ld  u32 $r0 c0[0x0] (8)
>1977: ld  u32 $r1 c0[0x0] (8)
>1978: mul u32 $r0 $r0 $r1 (8)
>1979: set s32 $r0 lt $r2 $r0 (8)
>1980: joinat BB:32 (8)
>1981: set u8 $p0 neu u32 $r255 $r0 (8)
>1982: not $p0 bra BB:59 (8)
>BB:31 (259 instructions) - idom = BB:30, df = { BB:32 }
> -> BB:32 (forward)
>1983: mov u32 $r0 0x00000010 (8)
>1984: mul u32 $r3 $r4 $r0 (8)
>1985: ld  u64 $r0d c7[0x330] (8)
>1986: mov u32 $r17 0x00000004 (8)
>1987: ld  u32 $r18 c7[0x338] (8)
>1988: add u32 { $r0 $c0 } $r0 $r3 (8)
>1989: add u32 $r1 $r1 $r255 $c0 (8)
>1990: add u32 $r17 $r17 $r3 (8)
>1991: set u8 $p0 gt u32 $r17 $r18 (8)
>1992: not $p0 ld  u32 $r17 g[$r0d+0x0] (8)
>1993: $p0 mov u32 $r17 0x00000000 (8)
>1994: ld  u64 $r0d c7[0x330] (8)
>1995: mov u32 $r18 0x00000008 (8)
>1996: ld  u32 $r19 c7[0x338] (8)
>1997: add u32 { $r0 $c0 } $r0 $r3 (8)
>1998: add u32 $r1 $r1 $r255 $c0 (8)
>1999: add u32 $r18 $r18 $r3 (8)
>2000: set u8 $p0 gt u32 $r18 $r19 (8)
>2001: not $p0 ld  u32 $r18 g[$r0d+0x4] (8)
>2002: $p0 mov u32 $r18 0x00000000 (8)
>2003: ld  u64 $r0d c7[0x330] (8)
>2004: mov u32 $r19 0x0000000c (8)
>2005: ld  u32 $r20 c7[0x338] (8)
>2006: add u32 { $r0 $c0 } $r0 $r3 (8)
>2007: add u32 $r1 $r1 $r255 $c0 (8)
>2008: add u32 $r19 $r19 $r3 (8)
>2009: set u8 $p0 gt u32 $r19 $r20 (8)
>2010: not $p0 ld  u32 $r19 g[$r0d+0x8] (8)
>2011: $p0 mov u32 $r19 0x00000000 (8)
>2012: ld  u64 $r0d c7[0x330] (8)
>2013: mov u32 $r20 0x00000010 (8)
>2014: ld  u32 $r21 c7[0x338] (8)
>2015: add u32 { $r0 $c0 } $r0 $r3 (8)
>2016: add u32 $r1 $r1 $r255 $c0 (8)
>2017: add u32 $r3 $r20 $r3 (8)
>2018: set u8 $p0 gt u32 $r3 $r21 (8)
>2019: not $p0 ld  u32 $r3 g[$r0d+0xc] (8)
>2020: $p0 mov u32 $r3 0x00000000 (8)
>2021: mov u32 $r0 0x00000010 (8)
>2022: mul u32 $r20 $r2 $r0 (8)
>2023: ld  u64 $r0d c7[0x330] (8)
>2024: mov u32 $r21 0x00000004 (8)
>2025: ld  u32 $r22 c7[0x338] (8)
>2026: add u32 { $r0 $c0 } $r0 $r20 (8)
>2027: add u32 $r1 $r1 $r255 $c0 (8)
>2028: add u32 $r21 $r21 $r20 (8)
>2029: set u8 $p0 gt u32 $r21 $r22 (8)
>2030: not $p0 ld  u32 $r21 g[$r0d+0x0] (8)
>2031: $p0 mov u32 $r21 0x00000000 (8)
>2032: ld  u64 $r0d c7[0x330] (8)
>2033: mov u32 $r22 0x00000008 (8)
>2034: ld  u32 $r23 c7[0x338] (8)
>2035: add u32 { $r0 $c0 } $r0 $r20 (8)
>2036: add u32 $r1 $r1 $r255 $c0 (8)
>2037: add u32 $r22 $r22 $r20 (8)
>2038: set u8 $p0 gt u32 $r22 $r23 (8)
>2039: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>2040: $p0 mov u32 $r22 0x00000000 (8)
>2041: ld  u64 $r0d c7[0x330] (8)
>2042: mov u32 $r23 0x0000000c (8)
>2043: ld  u32 $r24 c7[0x338] (8)
>2044: add u32 { $r0 $c0 } $r0 $r20 (8)
>2045: add u32 $r1 $r1 $r255 $c0 (8)
>2046: add u32 $r23 $r23 $r20 (8)
>2047: set u8 $p0 gt u32 $r23 $r24 (8)
>2048: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>2049: $p0 mov u32 $r23 0x00000000 (8)
>2050: ld  u64 $r0d c7[0x330] (8)
>2051: mov u32 $r24 0x00000010 (8)
>2052: ld  u32 $r25 c7[0x338] (8)
>2053: add u32 { $r0 $c0 } $r0 $r20 (8)
>2054: add u32 $r1 $r1 $r255 $c0 (8)
>2055: add u32 $r20 $r24 $r20 (8)
>2056: set u8 $p0 gt u32 $r20 $r25 (8)
>2057: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2058: $p0 mov u32 $r0 0x00000000 (8)
>2059: neg f32 $r1 $r21 (8)
>2060: add f32 $r1 $r17 $r1 (8)
>2061: neg f32 $r17 $r22 (8)
>2062: add f32 $r17 $r18 $r17 (8)
>2063: neg f32 $r18 $r23 (8)
>2064: add f32 $r18 $r19 $r18 (8)
>2065: neg f32 $r0 $r0 (8)
>2066: add f32 $r0 $r3 $r0 (8)
>2067: mul f32 $r3 $r1 $r1 (8)
>2068: mad f32 $r3 $r17 $r17 $r3 (8)
>2069: mad f32 $r3 $r18 $r18 $r3 (8)
>2070: mad f32 $r3 $r0 $r0 $r3 (8)
>2071: rsq f32 $r3 $r3 (8)
>2072: rcp f32 $r3 $r3 (8)
>2073: ld  u32 $r19 c0[0x20] (8)
>2074: neg f32 $r20 $r3 (8)
>2075: add f32 $r19 $r19 $r20 (8)
>2076: mov u32 $r20 0x3eb33333 (8)
>2077: mul f32 $r19 $r20 $r19 (8)
>2078: rcp f32 $r3 $r3 (8)
>2079: mul f32 $r3 $r19 $r3 (8)
>2080: mul f32 $r19 $r3 $r1 (8)
>2081: mul f32 $r17 $r3 $r17 (8)
>2082: mul f32 $r18 $r3 $r18 (8)
>2083: mul f32 $r3 $r3 $r0 (8)
>2084: mov u32 $r0 0x00000010 (8)
>2085: mul u32 $r20 $r4 $r0 (8)
>2086: mov u32 $r0 0x00000010 (8)
>2087: mul u32 $r21 $r4 $r0 (8)
>2088: ld  u64 $r0d c7[0x330] (8)
>2089: mov u32 $r22 0x00000004 (8)
>2090: ld  u32 $r23 c7[0x338] (8)
>2091: add u32 { $r0 $c0 } $r0 $r21 (8)
>2092: add u32 $r1 $r1 $r255 $c0 (8)
>2093: add u32 $r22 $r22 $r21 (8)
>2094: set u8 $p0 gt u32 $r22 $r23 (8)
>2095: not $p0 ld  u32 $r22 g[$r0d+0x0] (8)
>2096: $p0 mov u32 $r22 0x00000000 (8)
>2097: ld  u64 $r0d c7[0x330] (8)
>2098: mov u32 $r23 0x00000008 (8)
>2099: ld  u32 $r24 c7[0x338] (8)
>2100: add u32 { $r0 $c0 } $r0 $r21 (8)
>2101: add u32 $r1 $r1 $r255 $c0 (8)
>2102: add u32 $r23 $r23 $r21 (8)
>2103: set u8 $p0 gt u32 $r23 $r24 (8)
>2104: not $p0 ld  u32 $r23 g[$r0d+0x4] (8)
>2105: $p0 mov u32 $r23 0x00000000 (8)
>2106: ld  u64 $r0d c7[0x330] (8)
>2107: mov u32 $r24 0x0000000c (8)
>2108: ld  u32 $r25 c7[0x338] (8)
>2109: add u32 { $r0 $c0 } $r0 $r21 (8)
>2110: add u32 $r1 $r1 $r255 $c0 (8)
>2111: add u32 $r24 $r24 $r21 (8)
>2112: set u8 $p0 gt u32 $r24 $r25 (8)
>2113: not $p0 ld  u32 $r24 g[$r0d+0x8] (8)
>2114: $p0 mov u32 $r24 0x00000000 (8)
>2115: ld  u64 $r0d c7[0x330] (8)
>2116: mov u32 $r25 0x00000010 (8)
>2117: ld  u32 $r26 c7[0x338] (8)
>2118: add u32 { $r0 $c0 } $r0 $r21 (8)
>2119: add u32 $r1 $r1 $r255 $c0 (8)
>2120: add u32 $r21 $r25 $r21 (8)
>2121: set u8 $p0 gt u32 $r21 $r26 (8)
>2122: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2123: $p0 mov u32 $r0 0x00000000 (8)
>2124: add f32 $r21 $r22 $r19 (8)
>2125: add f32 $r22 $r23 $r17 (8)
>2126: add f32 $r23 $r24 $r18 (8)
>2127: add f32 $r24 $r0 $r3 (8)
>2128: ld  u64 $r0d c7[0x330] (8)
>2129: mov u32 $r25 0x00000004 (8)
>2130: ld  u32 $r26 c7[0x338] (8)
>2131: add u32 { $r0 $c0 } $r0 $r20 (8)
>2132: add u32 $r1 $r1 $r255 $c0 (8)
>2133: add u32 $r25 $r25 $r20 (8)
>2134: set u8 $p0 gt u32 $r25 $r26 (8)
>2135: not $p0 st  u32 # g[$r0d+0x0] $r21 (8)
>2136: ld  u64 $r0d c7[0x330] (8)
>2137: mov u32 $r21 0x00000008 (8)
>2138: ld  u32 $r25 c7[0x338] (8)
>2139: add u32 { $r0 $c0 } $r0 $r20 (8)
>2140: add u32 $r1 $r1 $r255 $c0 (8)
>2141: add u32 $r21 $r21 $r20 (8)
>2142: set u8 $p0 gt u32 $r21 $r25 (8)
>2143: not $p0 st  u32 # g[$r0d+0x4] $r22 (8)
>2144: ld  u64 $r0d c7[0x330] (8)
>2145: mov u32 $r21 0x0000000c (8)
>2146: ld  u32 $r22 c7[0x338] (8)
>2147: add u32 { $r0 $c0 } $r0 $r20 (8)
>2148: add u32 $r1 $r1 $r255 $c0 (8)
>2149: add u32 $r21 $r21 $r20 (8)
>2150: set u8 $p0 gt u32 $r21 $r22 (8)
>2151: not $p0 st  u32 # g[$r0d+0x8] $r23 (8)
>2152: ld  u64 $r0d c7[0x330] (8)
>2153: mov u32 $r21 0x00000010 (8)
>2154: ld  u32 $r22 c7[0x338] (8)
>2155: add u32 { $r0 $c0 } $r0 $r20 (8)
>2156: add u32 $r1 $r1 $r255 $c0 (8)
>2157: add u32 $r20 $r21 $r20 (8)
>2158: set u8 $p0 gt u32 $r20 $r22 (8)
>2159: not $p0 st  u32 # g[$r0d+0xc] $r24 (8)
>2160: mov u32 $r0 0x00000010 (8)
>2161: mul u32 $r20 $r2 $r0 (8)
>2162: mov u32 $r0 0x00000010 (8)
>2163: mul u32 $r2 $r2 $r0 (8)
>2164: ld  u64 $r0d c7[0x330] (8)
>2165: mov u32 $r21 0x00000004 (8)
>2166: ld  u32 $r22 c7[0x338] (8)
>2167: add u32 { $r0 $c0 } $r0 $r2 (8)
>2168: add u32 $r1 $r1 $r255 $c0 (8)
>2169: add u32 $r21 $r21 $r2 (8)
>2170: set u8 $p0 gt u32 $r21 $r22 (8)
>2171: not $p0 ld  u32 $r21 g[$r0d+0x0] (8)
>2172: $p0 mov u32 $r21 0x00000000 (8)
>2173: ld  u64 $r0d c7[0x330] (8)
>2174: mov u32 $r22 0x00000008 (8)
>2175: ld  u32 $r23 c7[0x338] (8)
>2176: add u32 { $r0 $c0 } $r0 $r2 (8)
>2177: add u32 $r1 $r1 $r255 $c0 (8)
>2178: add u32 $r22 $r22 $r2 (8)
>2179: set u8 $p0 gt u32 $r22 $r23 (8)
>2180: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>2181: $p0 mov u32 $r22 0x00000000 (8)
>2182: ld  u64 $r0d c7[0x330] (8)
>2183: mov u32 $r23 0x0000000c (8)
>2184: ld  u32 $r24 c7[0x338] (8)
>2185: add u32 { $r0 $c0 } $r0 $r2 (8)
>2186: add u32 $r1 $r1 $r255 $c0 (8)
>2187: add u32 $r23 $r23 $r2 (8)
>2188: set u8 $p0 gt u32 $r23 $r24 (8)
>2189: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>2190: $p0 mov u32 $r23 0x00000000 (8)
>2191: ld  u64 $r0d c7[0x330] (8)
>2192: mov u32 $r24 0x00000010 (8)
>2193: ld  u32 $r25 c7[0x338] (8)
>2194: add u32 { $r0 $c0 } $r0 $r2 (8)
>2195: add u32 $r1 $r1 $r255 $c0 (8)
>2196: add u32 $r2 $r24 $r2 (8)
>2197: set u8 $p0 gt u32 $r2 $r25 (8)
>2198: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2199: $p0 mov u32 $r0 0x00000000 (8)
>2200: neg f32 $r1 $r19 (8)
>2201: add f32 $r2 $r21 $r1 (8)
>2202: neg f32 $r1 $r17 (8)
>2203: add f32 $r17 $r22 $r1 (8)
>2204: neg f32 $r1 $r18 (8)
>2205: add f32 $r18 $r23 $r1 (8)
>2206: neg f32 $r1 $r3 (8)
>2207: add f32 $r3 $r0 $r1 (8)
>2208: ld  u64 $r0d c7[0x330] (8)
>2209: mov u32 $r19 0x00000004 (8)
>2210: ld  u32 $r21 c7[0x338] (8)
>2211: add u32 { $r0 $c0 } $r0 $r20 (8)
>2212: add u32 $r1 $r1 $r255 $c0 (8)
>2213: add u32 $r19 $r19 $r20 (8)
>2214: set u8 $p0 gt u32 $r19 $r21 (8)
>2215: not $p0 st  u32 # g[$r0d+0x0] $r2 (8)
>2216: ld  u64 $r0d c7[0x330] (8)
>2217: mov u32 $r2 0x00000008 (8)
>2218: ld  u32 $r19 c7[0x338] (8)
>2219: add u32 { $r0 $c0 } $r0 $r20 (8)
>2220: add u32 $r1 $r1 $r255 $c0 (8)
>2221: add u32 $r2 $r2 $r20 (8)
>2222: set u8 $p0 gt u32 $r2 $r19 (8)
>2223: not $p0 st  u32 # g[$r0d+0x4] $r17 (8)
>2224: ld  u64 $r0d c7[0x330] (8)
>2225: mov u32 $r2 0x0000000c (8)
>2226: ld  u32 $r17 c7[0x338] (8)
>2227: add u32 { $r0 $c0 } $r0 $r20 (8)
>2228: add u32 $r1 $r1 $r255 $c0 (8)
>2229: add u32 $r2 $r2 $r20 (8)
>2230: set u8 $p0 gt u32 $r2 $r17 (8)
>2231: not $p0 st  u32 # g[$r0d+0x8] $r18 (8)
>2232: ld  u64 $r0d c7[0x330] (8)
>2233: mov u32 $r2 0x00000010 (8)
>2234: ld  u32 $r17 c7[0x338] (8)
>2235: add u32 { $r0 $c0 } $r0 $r20 (8)
>2236: add u32 $r1 $r1 $r255 $c0 (8)
>2237: add u32 $r2 $r2 $r20 (8)
>2238: set u8 $p0 gt u32 $r2 $r17 (8)
>2239: not $p0 st  u32 # g[$r0d+0xc] $r3 (8)
>2240: membar (SUBOP:7) - # (8)
>2241: join BB:32 (8)
>BB:59 (1 instructions) - df = { }
> -> BB:32 (forward)
>2242: join BB:32 (8)
>BB:32 (1 instructions) - idom = BB:30, df = { BB:33 }
> -> BB:33 (forward)
>2243: join BB:33 (8)
>BB:58 (1 instructions) - df = { }
> -> BB:33 (forward)
>2244: join BB:33 (8)
>BB:33 (1 instructions) - idom = BB:29, df = { BB:34 }
> -> BB:34 (forward)
>2245: join BB:34 (8)
>BB:34 (1 instructions) - idom = BB:25, df = { BB:35 }
> -> BB:35 (forward)
>2246: join BB:35 (8)
>BB:35 (4 instructions) - idom = BB:17, df = { BB:14 }
> -> BB:14 (back)
>2247: bar u32 # $r255 $r255 (8)
>2248: mov u32 $r0 0x00000001 (8)
>2249: add u32 $r16 $r16 $r0 (8)
>2250: bra BB:14 (8)
>BB:15 (2 instructions) - idom = BB:16, df = { BB:10 }
> -> BB:36 (tree)
>2251: mov u32 $r16 0x00000000 (8)
>2252: prebreak BB:37 (8)
>BB:36 (4 instructions) - idom = BB:15, df = { BB:10 BB:36 }
> -> BB:39 (forward)
> -> BB:38 (tree)
>2253: mov u32 $r0 0x00000002 (8)
>2254: set s32 $r0 ge $r16 $r0 (8)
>2255: set u8 $p0 neu u32 $r255 $r0 (8)
>2256: not $p0 bra BB:39 (8)
>BB:38 (1 instructions) - idom = BB:36, df = { BB:10 }
> -> BB:37 (cross)
>2257: break BB:37 (8)
>BB:39 (13 instructions) - idom = BB:36, df = { BB:36 }
> -> BB:64 (tree)
> -> BB:40 (tree)
>2258: mov u32 $r1 0x00000002 (8)
>2259: mov u32 $r0 $r5 (8)
>2260: call abs BUILTIN:1 (8)
>2261: set u32 $r17 eq $r1 $r16 (8)
>2262: mov u32 $r0 0x00000001 (8)
>2263: add u32 $r0 $r6 $r0 (8)
>2264: mov u32 $r1 0x00000002 (8)
>2265: call abs BUILTIN:1 (8)
>2266: set u32 $r0 eq $r1 $r16 (8)
>2267: and u32 $r0 $r17 $r0 (8)
>2268: joinat BB:43 (8)
>2269: set u8 $p0 neu u32 $r255 $r0 (8)
>2270: not $p0 bra BB:64 (8)
>BB:40 (58 instructions) - idom = BB:39, df = { BB:43 }
> -> BB:65 (tree)
> -> BB:41 (tree)
>2271: mov u32 $r0 0x00000010 (8)
>2272: mul u32 $r2 $r4 $r0 (8)
>2273: ld  u64 $r0d c7[0x330] (8)
>2274: mov u32 $r3 0x00000004 (8)
>2275: ld  u32 $r17 c7[0x338] (8)
>2276: add u32 { $r0 $c0 } $r0 $r2 (8)
>2277: add u32 $r1 $r1 $r255 $c0 (8)
>2278: add u32 $r3 $r3 $r2 (8)
>2279: set u8 $p0 gt u32 $r3 $r17 (8)
>2280: not $p0 ld  u32 $r21 g[$r0d+0x0] (8)
>2281: $p0 mov u32 $r21 0x00000000 (8)
>2282: ld  u64 $r0d c7[0x330] (8)
>2283: mov u32 $r3 0x00000008 (8)
>2284: ld  u32 $r17 c7[0x338] (8)
>2285: add u32 { $r0 $c0 } $r0 $r2 (8)
>2286: add u32 $r1 $r1 $r255 $c0 (8)
>2287: add u32 $r3 $r3 $r2 (8)
>2288: set u8 $p0 gt u32 $r3 $r17 (8)
>2289: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>2290: $p0 mov u32 $r22 0x00000000 (8)
>2291: ld  u64 $r0d c7[0x330] (8)
>2292: mov u32 $r3 0x0000000c (8)
>2293: ld  u32 $r17 c7[0x338] (8)
>2294: add u32 { $r0 $c0 } $r0 $r2 (8)
>2295: add u32 $r1 $r1 $r255 $c0 (8)
>2296: add u32 $r3 $r3 $r2 (8)
>2297: set u8 $p0 gt u32 $r3 $r17 (8)
>2298: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>2299: $p0 mov u32 $r23 0x00000000 (8)
>2300: ld  u64 $r0d c7[0x330] (8)
>2301: mov u32 $r3 0x00000010 (8)
>2302: ld  u32 $r17 c7[0x338] (8)
>2303: add u32 { $r0 $c0 } $r0 $r2 (8)
>2304: add u32 $r1 $r1 $r255 $c0 (8)
>2305: add u32 $r2 $r3 $r2 (8)
>2306: set u8 $p0 gt u32 $r2 $r17 (8)
>2307: not $p0 ld  u32 $r24 g[$r0d+0xc] (8)
>2308: $p0 mov u32 $r24 0x00000000 (8)
>2309: mov u32 $r0 0x00000001 (8)
>2310: add u32 $r18 $r4 $r0 (8)
>2311: ld  u32 $r0 c0[0x0] (8)
>2312: add u32 $r17 $r4 $r0 (8)
>2313: mov u32 $r0 0x00000001 (8)
>2314: add u32 $r0 $r4 $r0 (8)
>2315: ld  u32 $r1 c0[0x0] (8)
>2316: add u32 $r25 $r0 $r1 (8)
>2317: ld  u32 $r0 c0[0x0] (8)
>2318: ld  u32 $r1 c0[0x0] (8)
>2319: mul u32 $r0 $r0 $r1 (8)
>2320: set s32 $r19 lt $r25 $r0 (8)
>2321: ld  u32 $r1 c0[0x0] (8)
>2322: mov u32 $r0 $r25 (8)
>2323: call abs BUILTIN:1 (8)
>2324: set s32 $r0 lt $r6 $r1 (8)
>2325: and u32 $r0 $r19 $r0 (8)
>2326: joinat BB:42 (8)
>2327: set u8 $p0 neu u32 $r255 $r0 (8)
>2328: not $p0 bra BB:65 (8)
>BB:41 (478 instructions) - idom = BB:40, df = { BB:42 }
> -> BB:42 (forward)
>2329: mov u32 $r0 0x00000010 (8)
>2330: mul u32 $r20 $r18 $r0 (8)
>2331: ld  u64 $r0d c7[0x330] (8)
>2332: mov u32 $r2 0x00000004 (8)
>2333: ld  u32 $r3 c7[0x338] (8)
>2334: add u32 { $r0 $c0 } $r0 $r20 (8)
>2335: add u32 $r1 $r1 $r255 $c0 (8)
>2336: add u32 $r2 $r2 $r20 (8)
>2337: set u8 $p0 gt u32 $r2 $r3 (8)
>2338: not $p0 ld  u32 $r2 g[$r0d+0x0] (8)
>2339: $p0 mov u32 $r2 0x00000000 (8)
>2340: ld  u64 $r0d c7[0x330] (8)
>2341: mov u32 $r3 0x00000008 (8)
>2342: ld  u32 $r19 c7[0x338] (8)
>2343: add u32 { $r0 $c0 } $r0 $r20 (8)
>2344: add u32 $r1 $r1 $r255 $c0 (8)
>2345: add u32 $r3 $r3 $r20 (8)
>2346: set u8 $p0 gt u32 $r3 $r19 (8)
>2347: not $p0 ld  u32 $r3 g[$r0d+0x4] (8)
>2348: $p0 mov u32 $r3 0x00000000 (8)
>2349: ld  u64 $r0d c7[0x330] (8)
>2350: mov u32 $r19 0x0000000c (8)
>2351: ld  u32 $r26 c7[0x338] (8)
>2352: add u32 { $r0 $c0 } $r0 $r20 (8)
>2353: add u32 $r1 $r1 $r255 $c0 (8)
>2354: add u32 $r19 $r19 $r20 (8)
>2355: set u8 $p0 gt u32 $r19 $r26 (8)
>2356: not $p0 ld  u32 $r19 g[$r0d+0x8] (8)
>2357: $p0 mov u32 $r19 0x00000000 (8)
>2358: ld  u64 $r0d c7[0x330] (8)
>2359: mov u32 $r26 0x00000010 (8)
>2360: ld  u32 $r27 c7[0x338] (8)
>2361: add u32 { $r0 $c0 } $r0 $r20 (8)
>2362: add u32 $r1 $r1 $r255 $c0 (8)
>2363: add u32 $r20 $r26 $r20 (8)
>2364: set u8 $p0 gt u32 $r20 $r27 (8)
>2365: not $p0 ld  u32 $r20 g[$r0d+0xc] (8)
>2366: $p0 mov u32 $r20 0x00000000 (8)
>2367: mov u32 $r0 0x00000010 (8)
>2368: mul u32 $r26 $r17 $r0 (8)
>2369: ld  u64 $r0d c7[0x330] (8)
>2370: mov u32 $r27 0x00000004 (8)
>2371: ld  u32 $r28 c7[0x338] (8)
>2372: add u32 { $r0 $c0 } $r0 $r26 (8)
>2373: add u32 $r1 $r1 $r255 $c0 (8)
>2374: add u32 $r27 $r27 $r26 (8)
>2375: set u8 $p0 gt u32 $r27 $r28 (8)
>2376: not $p0 ld  u32 $r27 g[$r0d+0x0] (8)
>2377: $p0 mov u32 $r27 0x00000000 (8)
>2378: ld  u64 $r0d c7[0x330] (8)
>2379: mov u32 $r28 0x00000008 (8)
>2380: ld  u32 $r29 c7[0x338] (8)
>2381: add u32 { $r0 $c0 } $r0 $r26 (8)
>2382: add u32 $r1 $r1 $r255 $c0 (8)
>2383: add u32 $r28 $r28 $r26 (8)
>2384: set u8 $p0 gt u32 $r28 $r29 (8)
>2385: not $p0 ld  u32 $r28 g[$r0d+0x4] (8)
>2386: $p0 mov u32 $r28 0x00000000 (8)
>2387: ld  u64 $r0d c7[0x330] (8)
>2388: mov u32 $r29 0x0000000c (8)
>2389: ld  u32 $r30 c7[0x338] (8)
>2390: add u32 { $r0 $c0 } $r0 $r26 (8)
>2391: add u32 $r1 $r1 $r255 $c0 (8)
>2392: add u32 $r29 $r29 $r26 (8)
>2393: set u8 $p0 gt u32 $r29 $r30 (8)
>2394: not $p0 ld  u32 $r29 g[$r0d+0x8] (8)
>2395: $p0 mov u32 $r29 0x00000000 (8)
>2396: ld  u64 $r0d c7[0x330] (8)
>2397: mov u32 $r30 0x00000010 (8)
>2398: ld  u32 $r31 c7[0x338] (8)
>2399: add u32 { $r0 $c0 } $r0 $r26 (8)
>2400: add u32 $r1 $r1 $r255 $c0 (8)
>2401: add u32 $r26 $r30 $r26 (8)
>2402: set u8 $p0 gt u32 $r26 $r31 (8)
>2403: not $p0 ld  u32 $r26 g[$r0d+0xc] (8)
>2404: $p0 mov u32 $r26 0x00000000 (8)
>2405: mov u32 $r0 0x00000010 (8)
>2406: mul u32 $r30 $r25 $r0 (8)
>2407: ld  u64 $r0d c7[0x330] (8)
>2408: mov u32 $r31 0x00000004 (8)
>2409: ld  u32 $r32 c7[0x338] (8)
>2410: add u32 { $r0 $c0 } $r0 $r30 (8)
>2411: add u32 $r1 $r1 $r255 $c0 (8)
>2412: add u32 $r31 $r31 $r30 (8)
>2413: set u8 $p0 gt u32 $r31 $r32 (8)
>2414: not $p0 ld  u32 $r31 g[$r0d+0x0] (8)
>2415: $p0 mov u32 $r31 0x00000000 (8)
>2416: ld  u64 $r0d c7[0x330] (8)
>2417: mov u32 $r32 0x00000008 (8)
>2418: ld  u32 $r33 c7[0x338] (8)
>2419: add u32 { $r0 $c0 } $r0 $r30 (8)
>2420: add u32 $r1 $r1 $r255 $c0 (8)
>2421: add u32 $r32 $r32 $r30 (8)
>2422: set u8 $p0 gt u32 $r32 $r33 (8)
>2423: not $p0 ld  u32 $r32 g[$r0d+0x4] (8)
>2424: $p0 mov u32 $r32 0x00000000 (8)
>2425: ld  u64 $r0d c7[0x330] (8)
>2426: mov u32 $r33 0x0000000c (8)
>2427: ld  u32 $r34 c7[0x338] (8)
>2428: add u32 { $r0 $c0 } $r0 $r30 (8)
>2429: add u32 $r1 $r1 $r255 $c0 (8)
>2430: add u32 $r33 $r33 $r30 (8)
>2431: set u8 $p0 gt u32 $r33 $r34 (8)
>2432: not $p0 ld  u32 $r33 g[$r0d+0x8] (8)
>2433: $p0 mov u32 $r33 0x00000000 (8)
>2434: ld  u64 $r0d c7[0x330] (8)
>2435: mov u32 $r34 0x00000010 (8)
>2436: ld  u32 $r35 c7[0x338] (8)
>2437: add u32 { $r0 $c0 } $r0 $r30 (8)
>2438: add u32 $r1 $r1 $r255 $c0 (8)
>2439: add u32 $r30 $r34 $r30 (8)
>2440: set u8 $p0 gt u32 $r30 $r35 (8)
>2441: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2442: $p0 mov u32 $r0 0x00000000 (8)
>2443: neg f32 $r1 $r31 (8)
>2444: add f32 $r1 $r21 $r1 (8)
>2445: neg f32 $r21 $r32 (8)
>2446: add f32 $r21 $r22 $r21 (8)
>2447: neg f32 $r22 $r33 (8)
>2448: add f32 $r22 $r23 $r22 (8)
>2449: neg f32 $r0 $r0 (8)
>2450: add f32 $r0 $r24 $r0 (8)
>2451: mul f32 $r23 $r1 $r1 (8)
>2452: mad f32 $r23 $r21 $r21 $r23 (8)
>2453: mad f32 $r23 $r22 $r22 $r23 (8)
>2454: mad f32 $r23 $r0 $r0 $r23 (8)
>2455: rsq f32 $r23 $r23 (8)
>2456: rcp f32 $r23 $r23 (8)
>2457: ld  u32 $r24 c0[0x30] (8)
>2458: neg f32 $r30 $r23 (8)
>2459: add f32 $r24 $r24 $r30 (8)
>2460: mov u32 $r30 0x3eb33333 (8)
>2461: mul f32 $r24 $r30 $r24 (8)
>2462: rcp f32 $r23 $r23 (8)
>2463: mul f32 $r23 $r24 $r23 (8)
>2464: mul f32 $r24 $r23 $r1 (8)
>2465: mul f32 $r21 $r23 $r21 (8)
>2466: mul f32 $r22 $r23 $r22 (8)
>2467: mul f32 $r23 $r23 $r0 (8)
>2468: mov u32 $r0 0x00000010 (8)
>2469: mul u32 $r30 $r4 $r0 (8)
>2470: mov u32 $r0 0x00000010 (8)
>2471: mul u32 $r31 $r4 $r0 (8)
>2472: ld  u64 $r0d c7[0x330] (8)
>2473: mov u32 $r32 0x00000004 (8)
>2474: ld  u32 $r33 c7[0x338] (8)
>2475: add u32 { $r0 $c0 } $r0 $r31 (8)
>2476: add u32 $r1 $r1 $r255 $c0 (8)
>2477: add u32 $r32 $r32 $r31 (8)
>2478: set u8 $p0 gt u32 $r32 $r33 (8)
>2479: not $p0 ld  u32 $r32 g[$r0d+0x0] (8)
>2480: $p0 mov u32 $r32 0x00000000 (8)
>2481: ld  u64 $r0d c7[0x330] (8)
>2482: mov u32 $r33 0x00000008 (8)
>2483: ld  u32 $r34 c7[0x338] (8)
>2484: add u32 { $r0 $c0 } $r0 $r31 (8)
>2485: add u32 $r1 $r1 $r255 $c0 (8)
>2486: add u32 $r33 $r33 $r31 (8)
>2487: set u8 $p0 gt u32 $r33 $r34 (8)
>2488: not $p0 ld  u32 $r33 g[$r0d+0x4] (8)
>2489: $p0 mov u32 $r33 0x00000000 (8)
>2490: ld  u64 $r0d c7[0x330] (8)
>2491: mov u32 $r34 0x0000000c (8)
>2492: ld  u32 $r35 c7[0x338] (8)
>2493: add u32 { $r0 $c0 } $r0 $r31 (8)
>2494: add u32 $r1 $r1 $r255 $c0 (8)
>2495: add u32 $r34 $r34 $r31 (8)
>2496: set u8 $p0 gt u32 $r34 $r35 (8)
>2497: not $p0 ld  u32 $r34 g[$r0d+0x8] (8)
>2498: $p0 mov u32 $r34 0x00000000 (8)
>2499: ld  u64 $r0d c7[0x330] (8)
>2500: mov u32 $r35 0x00000010 (8)
>2501: ld  u32 $r36 c7[0x338] (8)
>2502: add u32 { $r0 $c0 } $r0 $r31 (8)
>2503: add u32 $r1 $r1 $r255 $c0 (8)
>2504: add u32 $r31 $r35 $r31 (8)
>2505: set u8 $p0 gt u32 $r31 $r36 (8)
>2506: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2507: $p0 mov u32 $r0 0x00000000 (8)
>2508: add f32 $r31 $r32 $r24 (8)
>2509: add f32 $r32 $r33 $r21 (8)
>2510: add f32 $r33 $r34 $r22 (8)
>2511: add f32 $r34 $r0 $r23 (8)
>2512: ld  u64 $r0d c7[0x330] (8)
>2513: mov u32 $r35 0x00000004 (8)
>2514: ld  u32 $r36 c7[0x338] (8)
>2515: add u32 { $r0 $c0 } $r0 $r30 (8)
>2516: add u32 $r1 $r1 $r255 $c0 (8)
>2517: add u32 $r35 $r35 $r30 (8)
>2518: set u8 $p0 gt u32 $r35 $r36 (8)
>2519: not $p0 st  u32 # g[$r0d+0x0] $r31 (8)
>2520: ld  u64 $r0d c7[0x330] (8)
>2521: mov u32 $r31 0x00000008 (8)
>2522: ld  u32 $r35 c7[0x338] (8)
>2523: add u32 { $r0 $c0 } $r0 $r30 (8)
>2524: add u32 $r1 $r1 $r255 $c0 (8)
>2525: add u32 $r31 $r31 $r30 (8)
>2526: set u8 $p0 gt u32 $r31 $r35 (8)
>2527: not $p0 st  u32 # g[$r0d+0x4] $r32 (8)
>2528: ld  u64 $r0d c7[0x330] (8)
>2529: mov u32 $r31 0x0000000c (8)
>2530: ld  u32 $r32 c7[0x338] (8)
>2531: add u32 { $r0 $c0 } $r0 $r30 (8)
>2532: add u32 $r1 $r1 $r255 $c0 (8)
>2533: add u32 $r31 $r31 $r30 (8)
>2534: set u8 $p0 gt u32 $r31 $r32 (8)
>2535: not $p0 st  u32 # g[$r0d+0x8] $r33 (8)
>2536: ld  u64 $r0d c7[0x330] (8)
>2537: mov u32 $r31 0x00000010 (8)
>2538: ld  u32 $r32 c7[0x338] (8)
>2539: add u32 { $r0 $c0 } $r0 $r30 (8)
>2540: add u32 $r1 $r1 $r255 $c0 (8)
>2541: add u32 $r30 $r31 $r30 (8)
>2542: set u8 $p0 gt u32 $r30 $r32 (8)
>2543: not $p0 st  u32 # g[$r0d+0xc] $r34 (8)
>2544: mov u32 $r0 0x00000010 (8)
>2545: mul u32 $r30 $r25 $r0 (8)
>2546: mov u32 $r0 0x00000010 (8)
>2547: mul u32 $r25 $r25 $r0 (8)
>2548: ld  u64 $r0d c7[0x330] (8)
>2549: mov u32 $r31 0x00000004 (8)
>2550: ld  u32 $r32 c7[0x338] (8)
>2551: add u32 { $r0 $c0 } $r0 $r25 (8)
>2552: add u32 $r1 $r1 $r255 $c0 (8)
>2553: add u32 $r31 $r31 $r25 (8)
>2554: set u8 $p0 gt u32 $r31 $r32 (8)
>2555: not $p0 ld  u32 $r31 g[$r0d+0x0] (8)
>2556: $p0 mov u32 $r31 0x00000000 (8)
>2557: ld  u64 $r0d c7[0x330] (8)
>2558: mov u32 $r32 0x00000008 (8)
>2559: ld  u32 $r33 c7[0x338] (8)
>2560: add u32 { $r0 $c0 } $r0 $r25 (8)
>2561: add u32 $r1 $r1 $r255 $c0 (8)
>2562: add u32 $r32 $r32 $r25 (8)
>2563: set u8 $p0 gt u32 $r32 $r33 (8)
>2564: not $p0 ld  u32 $r32 g[$r0d+0x4] (8)
>2565: $p0 mov u32 $r32 0x00000000 (8)
>2566: ld  u64 $r0d c7[0x330] (8)
>2567: mov u32 $r33 0x0000000c (8)
>2568: ld  u32 $r34 c7[0x338] (8)
>2569: add u32 { $r0 $c0 } $r0 $r25 (8)
>2570: add u32 $r1 $r1 $r255 $c0 (8)
>2571: add u32 $r33 $r33 $r25 (8)
>2572: set u8 $p0 gt u32 $r33 $r34 (8)
>2573: not $p0 ld  u32 $r33 g[$r0d+0x8] (8)
>2574: $p0 mov u32 $r33 0x00000000 (8)
>2575: ld  u64 $r0d c7[0x330] (8)
>2576: mov u32 $r34 0x00000010 (8)
>2577: ld  u32 $r35 c7[0x338] (8)
>2578: add u32 { $r0 $c0 } $r0 $r25 (8)
>2579: add u32 $r1 $r1 $r255 $c0 (8)
>2580: add u32 $r25 $r34 $r25 (8)
>2581: set u8 $p0 gt u32 $r25 $r35 (8)
>2582: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2583: $p0 mov u32 $r0 0x00000000 (8)
>2584: neg f32 $r1 $r24 (8)
>2585: add f32 $r24 $r31 $r1 (8)
>2586: neg f32 $r1 $r21 (8)
>2587: add f32 $r21 $r32 $r1 (8)
>2588: neg f32 $r1 $r22 (8)
>2589: add f32 $r22 $r33 $r1 (8)
>2590: neg f32 $r1 $r23 (8)
>2591: add f32 $r23 $r0 $r1 (8)
>2592: ld  u64 $r0d c7[0x330] (8)
>2593: mov u32 $r25 0x00000004 (8)
>2594: ld  u32 $r31 c7[0x338] (8)
>2595: add u32 { $r0 $c0 } $r0 $r30 (8)
>2596: add u32 $r1 $r1 $r255 $c0 (8)
>2597: add u32 $r25 $r25 $r30 (8)
>2598: set u8 $p0 gt u32 $r25 $r31 (8)
>2599: not $p0 st  u32 # g[$r0d+0x0] $r24 (8)
>2600: ld  u64 $r0d c7[0x330] (8)
>2601: mov u32 $r24 0x00000008 (8)
>2602: ld  u32 $r25 c7[0x338] (8)
>2603: add u32 { $r0 $c0 } $r0 $r30 (8)
>2604: add u32 $r1 $r1 $r255 $c0 (8)
>2605: add u32 $r24 $r24 $r30 (8)
>2606: set u8 $p0 gt u32 $r24 $r25 (8)
>2607: not $p0 st  u32 # g[$r0d+0x4] $r21 (8)
>2608: ld  u64 $r0d c7[0x330] (8)
>2609: mov u32 $r21 0x0000000c (8)
>2610: ld  u32 $r24 c7[0x338] (8)
>2611: add u32 { $r0 $c0 } $r0 $r30 (8)
>2612: add u32 $r1 $r1 $r255 $c0 (8)
>2613: add u32 $r21 $r21 $r30 (8)
>2614: set u8 $p0 gt u32 $r21 $r24 (8)
>2615: not $p0 st  u32 # g[$r0d+0x8] $r22 (8)
>2616: ld  u64 $r0d c7[0x330] (8)
>2617: mov u32 $r21 0x00000010 (8)
>2618: ld  u32 $r22 c7[0x338] (8)
>2619: add u32 { $r0 $c0 } $r0 $r30 (8)
>2620: add u32 $r1 $r1 $r255 $c0 (8)
>2621: add u32 $r21 $r21 $r30 (8)
>2622: set u8 $p0 gt u32 $r21 $r22 (8)
>2623: not $p0 st  u32 # g[$r0d+0xc] $r23 (8)
>2624: neg f32 $r0 $r27 (8)
>2625: add f32 $r0 $r2 $r0 (8)
>2626: neg f32 $r1 $r28 (8)
>2627: add f32 $r1 $r3 $r1 (8)
>2628: neg f32 $r2 $r29 (8)
>2629: add f32 $r2 $r19 $r2 (8)
>2630: neg f32 $r3 $r26 (8)
>2631: add f32 $r3 $r20 $r3 (8)
>2632: mul f32 $r19 $r0 $r0 (8)
>2633: mad f32 $r19 $r1 $r1 $r19 (8)
>2634: mad f32 $r19 $r2 $r2 $r19 (8)
>2635: mad f32 $r19 $r3 $r3 $r19 (8)
>2636: rsq f32 $r19 $r19 (8)
>2637: rcp f32 $r19 $r19 (8)
>2638: ld  u32 $r20 c0[0x30] (8)
>2639: neg f32 $r21 $r19 (8)
>2640: add f32 $r20 $r20 $r21 (8)
>2641: mov u32 $r21 0x3eb33333 (8)
>2642: mul f32 $r20 $r21 $r20 (8)
>2643: rcp f32 $r19 $r19 (8)
>2644: mul f32 $r19 $r20 $r19 (8)
>2645: mul f32 $r20 $r19 $r0 (8)
>2646: mul f32 $r21 $r19 $r1 (8)
>2647: mul f32 $r2 $r19 $r2 (8)
>2648: mul f32 $r3 $r19 $r3 (8)
>2649: mov u32 $r0 0x00000010 (8)
>2650: mul u32 $r19 $r18 $r0 (8)
>2651: mov u32 $r0 0x00000010 (8)
>2652: mul u32 $r18 $r18 $r0 (8)
>2653: ld  u64 $r0d c7[0x330] (8)
>2654: mov u32 $r22 0x00000004 (8)
>2655: ld  u32 $r23 c7[0x338] (8)
>2656: add u32 { $r0 $c0 } $r0 $r18 (8)
>2657: add u32 $r1 $r1 $r255 $c0 (8)
>2658: add u32 $r22 $r22 $r18 (8)
>2659: set u8 $p0 gt u32 $r22 $r23 (8)
>2660: not $p0 ld  u32 $r22 g[$r0d+0x0] (8)
>2661: $p0 mov u32 $r22 0x00000000 (8)
>2662: ld  u64 $r0d c7[0x330] (8)
>2663: mov u32 $r23 0x00000008 (8)
>2664: ld  u32 $r24 c7[0x338] (8)
>2665: add u32 { $r0 $c0 } $r0 $r18 (8)
>2666: add u32 $r1 $r1 $r255 $c0 (8)
>2667: add u32 $r23 $r23 $r18 (8)
>2668: set u8 $p0 gt u32 $r23 $r24 (8)
>2669: not $p0 ld  u32 $r23 g[$r0d+0x4] (8)
>2670: $p0 mov u32 $r23 0x00000000 (8)
>2671: ld  u64 $r0d c7[0x330] (8)
>2672: mov u32 $r24 0x0000000c (8)
>2673: ld  u32 $r25 c7[0x338] (8)
>2674: add u32 { $r0 $c0 } $r0 $r18 (8)
>2675: add u32 $r1 $r1 $r255 $c0 (8)
>2676: add u32 $r24 $r24 $r18 (8)
>2677: set u8 $p0 gt u32 $r24 $r25 (8)
>2678: not $p0 ld  u32 $r24 g[$r0d+0x8] (8)
>2679: $p0 mov u32 $r24 0x00000000 (8)
>2680: ld  u64 $r0d c7[0x330] (8)
>2681: mov u32 $r25 0x00000010 (8)
>2682: ld  u32 $r26 c7[0x338] (8)
>2683: add u32 { $r0 $c0 } $r0 $r18 (8)
>2684: add u32 $r1 $r1 $r255 $c0 (8)
>2685: add u32 $r18 $r25 $r18 (8)
>2686: set u8 $p0 gt u32 $r18 $r26 (8)
>2687: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2688: $p0 mov u32 $r0 0x00000000 (8)
>2689: add f32 $r18 $r22 $r20 (8)
>2690: add f32 $r22 $r23 $r21 (8)
>2691: add f32 $r23 $r24 $r2 (8)
>2692: add f32 $r24 $r0 $r3 (8)
>2693: ld  u64 $r0d c7[0x330] (8)
>2694: mov u32 $r25 0x00000004 (8)
>2695: ld  u32 $r26 c7[0x338] (8)
>2696: add u32 { $r0 $c0 } $r0 $r19 (8)
>2697: add u32 $r1 $r1 $r255 $c0 (8)
>2698: add u32 $r25 $r25 $r19 (8)
>2699: set u8 $p0 gt u32 $r25 $r26 (8)
>2700: not $p0 st  u32 # g[$r0d+0x0] $r18 (8)
>2701: ld  u64 $r0d c7[0x330] (8)
>2702: mov u32 $r18 0x00000008 (8)
>2703: ld  u32 $r25 c7[0x338] (8)
>2704: add u32 { $r0 $c0 } $r0 $r19 (8)
>2705: add u32 $r1 $r1 $r255 $c0 (8)
>2706: add u32 $r18 $r18 $r19 (8)
>2707: set u8 $p0 gt u32 $r18 $r25 (8)
>2708: not $p0 st  u32 # g[$r0d+0x4] $r22 (8)
>2709: ld  u64 $r0d c7[0x330] (8)
>2710: mov u32 $r18 0x0000000c (8)
>2711: ld  u32 $r22 c7[0x338] (8)
>2712: add u32 { $r0 $c0 } $r0 $r19 (8)
>2713: add u32 $r1 $r1 $r255 $c0 (8)
>2714: add u32 $r18 $r18 $r19 (8)
>2715: set u8 $p0 gt u32 $r18 $r22 (8)
>2716: not $p0 st  u32 # g[$r0d+0x8] $r23 (8)
>2717: ld  u64 $r0d c7[0x330] (8)
>2718: mov u32 $r18 0x00000010 (8)
>2719: ld  u32 $r22 c7[0x338] (8)
>2720: add u32 { $r0 $c0 } $r0 $r19 (8)
>2721: add u32 $r1 $r1 $r255 $c0 (8)
>2722: add u32 $r18 $r18 $r19 (8)
>2723: set u8 $p0 gt u32 $r18 $r22 (8)
>2724: not $p0 st  u32 # g[$r0d+0xc] $r24 (8)
>2725: mov u32 $r0 0x00000010 (8)
>2726: mul u32 $r18 $r17 $r0 (8)
>2727: mov u32 $r0 0x00000010 (8)
>2728: mul u32 $r17 $r17 $r0 (8)
>2729: ld  u64 $r0d c7[0x330] (8)
>2730: mov u32 $r19 0x00000004 (8)
>2731: ld  u32 $r22 c7[0x338] (8)
>2732: add u32 { $r0 $c0 } $r0 $r17 (8)
>2733: add u32 $r1 $r1 $r255 $c0 (8)
>2734: add u32 $r19 $r19 $r17 (8)
>2735: set u8 $p0 gt u32 $r19 $r22 (8)
>2736: not $p0 ld  u32 $r19 g[$r0d+0x0] (8)
>2737: $p0 mov u32 $r19 0x00000000 (8)
>2738: ld  u64 $r0d c7[0x330] (8)
>2739: mov u32 $r22 0x00000008 (8)
>2740: ld  u32 $r23 c7[0x338] (8)
>2741: add u32 { $r0 $c0 } $r0 $r17 (8)
>2742: add u32 $r1 $r1 $r255 $c0 (8)
>2743: add u32 $r22 $r22 $r17 (8)
>2744: set u8 $p0 gt u32 $r22 $r23 (8)
>2745: not $p0 ld  u32 $r22 g[$r0d+0x4] (8)
>2746: $p0 mov u32 $r22 0x00000000 (8)
>2747: ld  u64 $r0d c7[0x330] (8)
>2748: mov u32 $r23 0x0000000c (8)
>2749: ld  u32 $r24 c7[0x338] (8)
>2750: add u32 { $r0 $c0 } $r0 $r17 (8)
>2751: add u32 $r1 $r1 $r255 $c0 (8)
>2752: add u32 $r23 $r23 $r17 (8)
>2753: set u8 $p0 gt u32 $r23 $r24 (8)
>2754: not $p0 ld  u32 $r23 g[$r0d+0x8] (8)
>2755: $p0 mov u32 $r23 0x00000000 (8)
>2756: ld  u64 $r0d c7[0x330] (8)
>2757: mov u32 $r24 0x00000010 (8)
>2758: ld  u32 $r25 c7[0x338] (8)
>2759: add u32 { $r0 $c0 } $r0 $r17 (8)
>2760: add u32 $r1 $r1 $r255 $c0 (8)
>2761: add u32 $r17 $r24 $r17 (8)
>2762: set u8 $p0 gt u32 $r17 $r25 (8)
>2763: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>2764: $p0 mov u32 $r0 0x00000000 (8)
>2765: neg f32 $r1 $r20 (8)
>2766: add f32 $r17 $r19 $r1 (8)
>2767: neg f32 $r1 $r21 (8)
>2768: add f32 $r19 $r22 $r1 (8)
>2769: neg f32 $r1 $r2 (8)
>2770: add f32 $r2 $r23 $r1 (8)
>2771: neg f32 $r1 $r3 (8)
>2772: add f32 $r3 $r0 $r1 (8)
>2773: ld  u64 $r0d c7[0x330] (8)
>2774: mov u32 $r20 0x00000004 (8)
>2775: ld  u32 $r21 c7[0x338] (8)
>2776: add u32 { $r0 $c0 } $r0 $r18 (8)
>2777: add u32 $r1 $r1 $r255 $c0 (8)
>2778: add u32 $r20 $r20 $r18 (8)
>2779: set u8 $p0 gt u32 $r20 $r21 (8)
>2780: not $p0 st  u32 # g[$r0d+0x0] $r17 (8)
>2781: ld  u64 $r0d c7[0x330] (8)
>2782: mov u32 $r17 0x00000008 (8)
>2783: ld  u32 $r20 c7[0x338] (8)
>2784: add u32 { $r0 $c0 } $r0 $r18 (8)
>2785: add u32 $r1 $r1 $r255 $c0 (8)
>2786: add u32 $r17 $r17 $r18 (8)
>2787: set u8 $p0 gt u32 $r17 $r20 (8)
>2788: not $p0 st  u32 # g[$r0d+0x4] $r19 (8)
>2789: ld  u64 $r0d c7[0x330] (8)
>2790: mov u32 $r17 0x0000000c (8)
>2791: ld  u32 $r19 c7[0x338] (8)
>2792: add u32 { $r0 $c0 } $r0 $r18 (8)
>2793: add u32 $r1 $r1 $r255 $c0 (8)
>2794: add u32 $r17 $r17 $r18 (8)
>2795: set u8 $p0 gt u32 $r17 $r19 (8)
>2796: not $p0 st  u32 # g[$r0d+0x8] $r2 (8)
>2797: ld  u64 $r0d c7[0x330] (8)
>2798: mov u32 $r2 0x00000010 (8)
>2799: ld  u32 $r17 c7[0x338] (8)
>2800: add u32 { $r0 $c0 } $r0 $r18 (8)
>2801: add u32 $r1 $r1 $r255 $c0 (8)
>2802: add u32 $r2 $r2 $r18 (8)
>2803: set u8 $p0 gt u32 $r2 $r17 (8)
>2804: not $p0 st  u32 # g[$r0d+0xc] $r3 (8)
>2805: membar (SUBOP:7) - # (8)
>2806: join BB:42 (8)
>BB:65 (1 instructions) - df = { }
> -> BB:42 (forward)
>2807: join BB:42 (8)
>BB:42 (1 instructions) - idom = BB:40, df = { BB:43 }
> -> BB:43 (forward)
>2808: join BB:43 (8)
>BB:64 (1 instructions) - df = { }
> -> BB:43 (forward)
>2809: join BB:43 (8)
>BB:43 (4 instructions) - idom = BB:39, df = { BB:36 }
> -> BB:36 (back)
>2810: bar u32 # $r255 $r255 (8)
>2811: mov u32 $r0 0x00000001 (8)
>2812: add u32 $r16 $r16 $r0 (8)
>2813: bra BB:36 (8)
>BB:11 (10 instructions) - idom = BB:12, df = { }
> -> BB:67 (tree)
> -> BB:46 (tree)
>2814: mov u32 $r2 0x00000000 (8)
>2815: mov u32 $r3 0x00000000 (8)
>2816: mov u32 $r7 0x00000000 (8)
>2817: ld  u32 $r0 c0[0x0] (8)
>2818: mov u32 $r1 0xffffffff (8)
>2819: add u32 $r0 $r0 $r1 (8)
>2820: set s32 $r0 lt $r6 $r0 (8)
>2821: joinat BB:51 (8)
>2822: set u8 $p0 neu u32 $r255 $r0 (8)
>2823: not $p0 bra BB:67 (8)
>BB:46 (86 instructions) - idom = BB:11, df = { BB:51 }
> -> BB:71 (tree)
> -> BB:47 (tree)
>2824: mov u32 $r0 0x00000001 (8)
>2825: add u32 $r0 $r4 $r0 (8)
>2826: mov u32 $r1 0x00000010 (8)
>2827: mul u32 $r8 $r0 $r1 (8)
>2828: ld  u64 $r0d c7[0x330] (8)
>2829: mov u32 $r9 0x00000004 (8)
>2830: ld  u32 $r10 c7[0x338] (8)
>2831: add u32 { $r0 $c0 } $r0 $r8 (8)
>2832: add u32 $r1 $r1 $r255 $c0 (8)
>2833: add u32 $r9 $r9 $r8 (8)
>2834: set u8 $p0 gt u32 $r9 $r10 (8)
>2835: not $p0 ld  u32 $r9 g[$r0d+0x0] (8)
>2836: $p0 mov u32 $r9 0x00000000 (8)
>2837: ld  u64 $r0d c7[0x330] (8)
>2838: mov u32 $r10 0x00000008 (8)
>2839: ld  u32 $r11 c7[0x338] (8)
>2840: add u32 { $r0 $c0 } $r0 $r8 (8)
>2841: add u32 $r1 $r1 $r255 $c0 (8)
>2842: add u32 $r10 $r10 $r8 (8)
>2843: set u8 $p0 gt u32 $r10 $r11 (8)
>2844: not $p0 ld  u32 $r10 g[$r0d+0x4] (8)
>2845: $p0 mov u32 $r10 0x00000000 (8)
>2846: ld  u64 $r0d c7[0x330] (8)
>2847: mov u32 $r11 0x0000000c (8)
>2848: ld  u32 $r12 c7[0x338] (8)
>2849: add u32 { $r0 $c0 } $r0 $r8 (8)
>2850: add u32 $r1 $r1 $r255 $c0 (8)
>2851: add u32 $r8 $r11 $r8 (8)
>2852: set u8 $p0 gt u32 $r8 $r12 (8)
>2853: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>2854: $p0 mov u32 $r0 0x00000000 (8)
>2855: mov u32 $r8 $r9 (8)
>2856: mov u32 $r9 $r10 (8)
>2857: mov u32 $r10 $r0 (8)
>2858: mov u32 $r0 0x00000010 (8)
>2859: mul u32 $r11 $r4 $r0 (8)
>2860: ld  u64 $r0d c7[0x330] (8)
>2861: mov u32 $r12 0x00000004 (8)
>2862: ld  u32 $r13 c7[0x338] (8)
>2863: add u32 { $r0 $c0 } $r0 $r11 (8)
>2864: add u32 $r1 $r1 $r255 $c0 (8)
>2865: add u32 $r12 $r12 $r11 (8)
>2866: set u8 $p0 gt u32 $r12 $r13 (8)
>2867: not $p0 ld  u32 $r12 g[$r0d+0x0] (8)
>2868: $p0 mov u32 $r12 0x00000000 (8)
>2869: ld  u64 $r0d c7[0x330] (8)
>2870: mov u32 $r13 0x00000008 (8)
>2871: ld  u32 $r14 c7[0x338] (8)
>2872: add u32 { $r0 $c0 } $r0 $r11 (8)
>2873: add u32 $r1 $r1 $r255 $c0 (8)
>2874: add u32 $r13 $r13 $r11 (8)
>2875: set u8 $p0 gt u32 $r13 $r14 (8)
>2876: not $p0 ld  u32 $r13 g[$r0d+0x4] (8)
>2877: $p0 mov u32 $r13 0x00000000 (8)
>2878: ld  u64 $r0d c7[0x330] (8)
>2879: mov u32 $r14 0x0000000c (8)
>2880: ld  u32 $r15 c7[0x338] (8)
>2881: add u32 { $r0 $c0 } $r0 $r11 (8)
>2882: add u32 $r1 $r1 $r255 $c0 (8)
>2883: add u32 $r11 $r14 $r11 (8)
>2884: set u8 $p0 gt u32 $r11 $r15 (8)
>2885: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>2886: $p0 mov u32 $r0 0x00000000 (8)
>2887: mov u32 $r1 $r12 (8)
>2888: mov u32 $r11 $r13 (8)
>2889: neg f32 $r1 $r1 (8)
>2890: add f32 $r8 $r8 $r1 (8)
>2891: neg f32 $r1 $r11 (8)
>2892: add f32 $r1 $r9 $r1 (8)
>2893: neg f32 $r0 $r0 (8)
>2894: add f32 $r0 $r10 $r0 (8)
>2895: mul f32 $r9 $r8 $r8 (8)
>2896: mad f32 $r9 $r1 $r1 $r9 (8)
>2897: mad f32 $r9 $r0 $r0 $r9 (8)
>2898: abs f32 $r9 $r9 (8)
>2899: rsq f32 $r9 $r9 (8)
>2900: mul f32 $r8 $r8 $r9 (8)
>2901: mul f32 $r10 $r1 $r9 (8)
>2902: mul f32 $r9 $r0 $r9 (8)
>2903: ld  u32 $r0 c0[0x0] (8)
>2904: mov u32 $r1 0xffffffff (8)
>2905: add u32 $r0 $r0 $r1 (8)
>2906: set s32 $r0 lt $r5 $r0 (8)
>2907: joinat BB:48 (8)
>2908: set u8 $p0 neu u32 $r255 $r0 (8)
>2909: not $p0 bra BB:71 (8)
>BB:47 (97 instructions) - idom = BB:46, df = { BB:48 }
> -> BB:48 (forward)
>2910: ld  u32 $r0 c0[0x0] (8)
>2911: add u32 $r0 $r4 $r0 (8)
>2912: mov u32 $r1 0x00000010 (8)
>2913: mul u32 $r2 $r0 $r1 (8)
>2914: ld  u64 $r0d c7[0x330] (8)
>2915: mov u32 $r3 0x00000004 (8)
>2916: ld  u32 $r7 c7[0x338] (8)
>2917: add u32 { $r0 $c0 } $r0 $r2 (8)
>2918: add u32 $r1 $r1 $r255 $c0 (8)
>2919: add u32 $r3 $r3 $r2 (8)
>2920: set u8 $p0 gt u32 $r3 $r7 (8)
>2921: not $p0 ld  u32 $r3 g[$r0d+0x0] (8)
>2922: $p0 mov u32 $r3 0x00000000 (8)
>2923: ld  u64 $r0d c7[0x330] (8)
>2924: mov u32 $r7 0x00000008 (8)
>2925: ld  u32 $r11 c7[0x338] (8)
>2926: add u32 { $r0 $c0 } $r0 $r2 (8)
>2927: add u32 $r1 $r1 $r255 $c0 (8)
>2928: add u32 $r7 $r7 $r2 (8)
>2929: set u8 $p0 gt u32 $r7 $r11 (8)
>2930: not $p0 ld  u32 $r7 g[$r0d+0x4] (8)
>2931: $p0 mov u32 $r7 0x00000000 (8)
>2932: ld  u64 $r0d c7[0x330] (8)
>2933: mov u32 $r11 0x0000000c (8)
>2934: ld  u32 $r12 c7[0x338] (8)
>2935: add u32 { $r0 $c0 } $r0 $r2 (8)
>2936: add u32 $r1 $r1 $r255 $c0 (8)
>2937: add u32 $r2 $r11 $r2 (8)
>2938: set u8 $p0 gt u32 $r2 $r12 (8)
>2939: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>2940: $p0 mov u32 $r0 0x00000000 (8)
>2941: mov u32 $r2 $r3 (8)
>2942: mov u32 $r3 $r7 (8)
>2943: mov u32 $r7 $r0 (8)
>2944: mov u32 $r0 0x00000010 (8)
>2945: mul u32 $r11 $r4 $r0 (8)
>2946: ld  u64 $r0d c7[0x330] (8)
>2947: mov u32 $r12 0x00000004 (8)
>2948: ld  u32 $r13 c7[0x338] (8)
>2949: add u32 { $r0 $c0 } $r0 $r11 (8)
>2950: add u32 $r1 $r1 $r255 $c0 (8)
>2951: add u32 $r12 $r12 $r11 (8)
>2952: set u8 $p0 gt u32 $r12 $r13 (8)
>2953: not $p0 ld  u32 $r12 g[$r0d+0x0] (8)
>2954: $p0 mov u32 $r12 0x00000000 (8)
>2955: ld  u64 $r0d c7[0x330] (8)
>2956: mov u32 $r13 0x00000008 (8)
>2957: ld  u32 $r14 c7[0x338] (8)
>2958: add u32 { $r0 $c0 } $r0 $r11 (8)
>2959: add u32 $r1 $r1 $r255 $c0 (8)
>2960: add u32 $r13 $r13 $r11 (8)
>2961: set u8 $p0 gt u32 $r13 $r14 (8)
>2962: not $p0 ld  u32 $r13 g[$r0d+0x4] (8)
>2963: $p0 mov u32 $r13 0x00000000 (8)
>2964: ld  u64 $r0d c7[0x330] (8)
>2965: mov u32 $r14 0x0000000c (8)
>2966: ld  u32 $r15 c7[0x338] (8)
>2967: add u32 { $r0 $c0 } $r0 $r11 (8)
>2968: add u32 $r1 $r1 $r255 $c0 (8)
>2969: add u32 $r11 $r14 $r11 (8)
>2970: set u8 $p0 gt u32 $r11 $r15 (8)
>2971: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>2972: $p0 mov u32 $r0 0x00000000 (8)
>2973: mov u32 $r1 $r12 (8)
>2974: mov u32 $r11 $r13 (8)
>2975: neg f32 $r1 $r1 (8)
>2976: add f32 $r2 $r2 $r1 (8)
>2977: neg f32 $r1 $r11 (8)
>2978: add f32 $r1 $r3 $r1 (8)
>2979: neg f32 $r0 $r0 (8)
>2980: add f32 $r0 $r7 $r0 (8)
>2981: mul f32 $r3 $r2 $r2 (8)
>2982: mad f32 $r3 $r1 $r1 $r3 (8)
>2983: mad f32 $r3 $r0 $r0 $r3 (8)
>2984: abs f32 $r3 $r3 (8)
>2985: rsq f32 $r3 $r3 (8)
>2986: mul f32 $r2 $r2 $r3 (8)
>2987: mul f32 $r1 $r1 $r3 (8)
>2988: mul f32 $r0 $r0 $r3 (8)
>2989: mul f32 $r3 $r0 $r10 (8)
>2990: mul f32 $r7 $r2 $r9 (8)
>2991: mul f32 $r11 $r1 $r8 (8)
>2992: neg f32 $r3 $r3 (8)
>2993: mad f32 $r3 $r1 $r9 $r3 (8)
>2994: neg f32 $r1 $r7 (8)
>2995: mad f32 $r1 $r0 $r8 $r1 (8)
>2996: neg f32 $r0 $r11 (8)
>2997: mad f32 $r0 $r2 $r10 $r0 (8)
>2998: mul f32 $r2 $r3 $r3 (8)
>2999: mad f32 $r2 $r1 $r1 $r2 (8)
>3000: mad f32 $r2 $r0 $r0 $r2 (8)
>3001: abs f32 $r2 $r2 (8)
>3002: rsq f32 $r7 $r2 (8)
>3003: mul f32 $r2 $r3 $r7 (8)
>3004: mul f32 $r3 $r1 $r7 (8)
>3005: mul f32 $r7 $r0 $r7 (8)
>3006: join BB:48 (8)
>BB:71 (1 instructions) - df = { }
> -> BB:48 (forward)
>3007: join BB:48 (8)
>BB:48 (5 instructions) - idom = BB:46, df = { BB:51 }
> -> BB:72 (tree)
> -> BB:49 (tree)
>3008: mov u32 $r0 0x00000000 (8)
>3009: set s32 $r0 lt $r0 $r5 (8)
>3010: joinat BB:50 (8)
>3011: set u8 $p0 neu u32 $r255 $r0 (8)
>3012: not $p0 bra BB:72 (8)
>BB:49 (98 instructions) - idom = BB:48, df = { BB:50 }
> -> BB:50 (forward)
>3013: mov u32 $r0 0x00000010 (8)
>3014: mul u32 $r11 $r4 $r0 (8)
>3015: ld  u64 $r0d c7[0x330] (8)
>3016: mov u32 $r12 0x00000004 (8)
>3017: ld  u32 $r13 c7[0x338] (8)
>3018: add u32 { $r0 $c0 } $r0 $r11 (8)
>3019: add u32 $r1 $r1 $r255 $c0 (8)
>3020: add u32 $r12 $r12 $r11 (8)
>3021: set u8 $p0 gt u32 $r12 $r13 (8)
>3022: not $p0 ld  u32 $r12 g[$r0d+0x0] (8)
>3023: $p0 mov u32 $r12 0x00000000 (8)
>3024: ld  u64 $r0d c7[0x330] (8)
>3025: mov u32 $r13 0x00000008 (8)
>3026: ld  u32 $r14 c7[0x338] (8)
>3027: add u32 { $r0 $c0 } $r0 $r11 (8)
>3028: add u32 $r1 $r1 $r255 $c0 (8)
>3029: add u32 $r13 $r13 $r11 (8)
>3030: set u8 $p0 gt u32 $r13 $r14 (8)
>3031: not $p0 ld  u32 $r13 g[$r0d+0x4] (8)
>3032: $p0 mov u32 $r13 0x00000000 (8)
>3033: ld  u64 $r0d c7[0x330] (8)
>3034: mov u32 $r14 0x0000000c (8)
>3035: ld  u32 $r15 c7[0x338] (8)
>3036: add u32 { $r0 $c0 } $r0 $r11 (8)
>3037: add u32 $r1 $r1 $r255 $c0 (8)
>3038: add u32 $r11 $r14 $r11 (8)
>3039: set u8 $p0 gt u32 $r11 $r15 (8)
>3040: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3041: $p0 mov u32 $r0 0x00000000 (8)
>3042: mov u32 $r11 $r12 (8)
>3043: mov u32 $r12 $r13 (8)
>3044: mov u32 $r13 $r0 (8)
>3045: ld  u32 $r0 c0[0x0] (8)
>3046: neg s32 $r0 $r0 (8)
>3047: add u32 $r0 $r4 $r0 (8)
>3048: mov u32 $r1 0x00000010 (8)
>3049: mul u32 $r14 $r0 $r1 (8)
>3050: ld  u64 $r0d c7[0x330] (8)
>3051: mov u32 $r15 0x00000004 (8)
>3052: ld  u32 $r16 c7[0x338] (8)
>3053: add u32 { $r0 $c0 } $r0 $r14 (8)
>3054: add u32 $r1 $r1 $r255 $c0 (8)
>3055: add u32 $r15 $r15 $r14 (8)
>3056: set u8 $p0 gt u32 $r15 $r16 (8)
>3057: not $p0 ld  u32 $r15 g[$r0d+0x0] (8)
>3058: $p0 mov u32 $r15 0x00000000 (8)
>3059: ld  u64 $r0d c7[0x330] (8)
>3060: mov u32 $r16 0x00000008 (8)
>3061: ld  u32 $r17 c7[0x338] (8)
>3062: add u32 { $r0 $c0 } $r0 $r14 (8)
>3063: add u32 $r1 $r1 $r255 $c0 (8)
>3064: add u32 $r16 $r16 $r14 (8)
>3065: set u8 $p0 gt u32 $r16 $r17 (8)
>3066: not $p0 ld  u32 $r16 g[$r0d+0x4] (8)
>3067: $p0 mov u32 $r16 0x00000000 (8)
>3068: ld  u64 $r0d c7[0x330] (8)
>3069: mov u32 $r17 0x0000000c (8)
>3070: ld  u32 $r18 c7[0x338] (8)
>3071: add u32 { $r0 $c0 } $r0 $r14 (8)
>3072: add u32 $r1 $r1 $r255 $c0 (8)
>3073: add u32 $r14 $r17 $r14 (8)
>3074: set u8 $p0 gt u32 $r14 $r18 (8)
>3075: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3076: $p0 mov u32 $r0 0x00000000 (8)
>3077: mov u32 $r1 $r15 (8)
>3078: mov u32 $r14 $r16 (8)
>3079: neg f32 $r1 $r1 (8)
>3080: add f32 $r11 $r11 $r1 (8)
>3081: neg f32 $r1 $r14 (8)
>3082: add f32 $r1 $r12 $r1 (8)
>3083: neg f32 $r0 $r0 (8)
>3084: add f32 $r0 $r13 $r0 (8)
>3085: mul f32 $r12 $r11 $r11 (8)
>3086: mad f32 $r12 $r1 $r1 $r12 (8)
>3087: mad f32 $r12 $r0 $r0 $r12 (8)
>3088: abs f32 $r12 $r12 (8)
>3089: rsq f32 $r12 $r12 (8)
>3090: mul f32 $r11 $r11 $r12 (8)
>3091: mul f32 $r1 $r1 $r12 (8)
>3092: mul f32 $r0 $r0 $r12 (8)
>3093: mul f32 $r12 $r0 $r10 (8)
>3094: mul f32 $r13 $r11 $r9 (8)
>3095: mul f32 $r14 $r1 $r8 (8)
>3096: neg f32 $r12 $r12 (8)
>3097: mad f32 $r9 $r1 $r9 $r12 (8)
>3098: neg f32 $r1 $r13 (8)
>3099: mad f32 $r1 $r0 $r8 $r1 (8)
>3100: neg f32 $r0 $r14 (8)
>3101: mad f32 $r0 $r11 $r10 $r0 (8)
>3102: mul f32 $r8 $r9 $r9 (8)
>3103: mad f32 $r8 $r1 $r1 $r8 (8)
>3104: mad f32 $r8 $r0 $r0 $r8 (8)
>3105: abs f32 $r8 $r8 (8)
>3106: rsq f32 $r8 $r8 (8)
>3107: mad f32 $r2 $r9 $r8 $r2 (8)
>3108: mad f32 $r3 $r1 $r8 $r3 (8)
>3109: mad f32 $r7 $r0 $r8 $r7 (8)
>3110: join BB:50 (8)
>BB:72 (1 instructions) - df = { }
> -> BB:50 (forward)
>3111: join BB:50 (8)
>BB:50 (1 instructions) - idom = BB:48, df = { BB:51 }
> -> BB:51 (forward)
>3112: join BB:51 (8)
>BB:67 (1 instructions) - df = { }
> -> BB:51 (forward)
>3113: join BB:51 (8)
>BB:51 (5 instructions) - idom = BB:11, df = { }
> -> BB:68 (tree)
> -> BB:52 (tree)
>3114: mov u32 $r0 0x00000000 (8)
>3115: set s32 $r0 lt $r0 $r6 (8)
>3116: joinat BB:57 (8)
>3117: set u8 $p0 neu u32 $r255 $r0 (8)
>3118: not $p0 bra BB:68 (8)
>BB:52 (86 instructions) - idom = BB:51, df = { BB:57 }
> -> BB:69 (tree)
> -> BB:53 (tree)
>3119: mov u32 $r0 0x00000010 (8)
>3120: mul u32 $r6 $r4 $r0 (8)
>3121: ld  u64 $r0d c7[0x330] (8)
>3122: mov u32 $r8 0x00000004 (8)
>3123: ld  u32 $r9 c7[0x338] (8)
>3124: add u32 { $r0 $c0 } $r0 $r6 (8)
>3125: add u32 $r1 $r1 $r255 $c0 (8)
>3126: add u32 $r8 $r8 $r6 (8)
>3127: set u8 $p0 gt u32 $r8 $r9 (8)
>3128: not $p0 ld  u32 $r8 g[$r0d+0x0] (8)
>3129: $p0 mov u32 $r8 0x00000000 (8)
>3130: ld  u64 $r0d c7[0x330] (8)
>3131: mov u32 $r9 0x00000008 (8)
>3132: ld  u32 $r10 c7[0x338] (8)
>3133: add u32 { $r0 $c0 } $r0 $r6 (8)
>3134: add u32 $r1 $r1 $r255 $c0 (8)
>3135: add u32 $r9 $r9 $r6 (8)
>3136: set u8 $p0 gt u32 $r9 $r10 (8)
>3137: not $p0 ld  u32 $r9 g[$r0d+0x4] (8)
>3138: $p0 mov u32 $r9 0x00000000 (8)
>3139: ld  u64 $r0d c7[0x330] (8)
>3140: mov u32 $r10 0x0000000c (8)
>3141: ld  u32 $r11 c7[0x338] (8)
>3142: add u32 { $r0 $c0 } $r0 $r6 (8)
>3143: add u32 $r1 $r1 $r255 $c0 (8)
>3144: add u32 $r6 $r10 $r6 (8)
>3145: set u8 $p0 gt u32 $r6 $r11 (8)
>3146: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3147: $p0 mov u32 $r0 0x00000000 (8)
>3148: mov u32 $r6 $r8 (8)
>3149: mov u32 $r8 $r9 (8)
>3150: mov u32 $r9 $r0 (8)
>3151: mov u32 $r0 0xffffffff (8)
>3152: add u32 $r0 $r4 $r0 (8)
>3153: mov u32 $r1 0x00000010 (8)
>3154: mul u32 $r10 $r0 $r1 (8)
>3155: ld  u64 $r0d c7[0x330] (8)
>3156: mov u32 $r11 0x00000004 (8)
>3157: ld  u32 $r12 c7[0x338] (8)
>3158: add u32 { $r0 $c0 } $r0 $r10 (8)
>3159: add u32 $r1 $r1 $r255 $c0 (8)
>3160: add u32 $r11 $r11 $r10 (8)
>3161: set u8 $p0 gt u32 $r11 $r12 (8)
>3162: not $p0 ld  u32 $r11 g[$r0d+0x0] (8)
>3163: $p0 mov u32 $r11 0x00000000 (8)
>3164: ld  u64 $r0d c7[0x330] (8)
>3165: mov u32 $r12 0x00000008 (8)
>3166: ld  u32 $r13 c7[0x338] (8)
>3167: add u32 { $r0 $c0 } $r0 $r10 (8)
>3168: add u32 $r1 $r1 $r255 $c0 (8)
>3169: add u32 $r12 $r12 $r10 (8)
>3170: set u8 $p0 gt u32 $r12 $r13 (8)
>3171: not $p0 ld  u32 $r12 g[$r0d+0x4] (8)
>3172: $p0 mov u32 $r12 0x00000000 (8)
>3173: ld  u64 $r0d c7[0x330] (8)
>3174: mov u32 $r13 0x0000000c (8)
>3175: ld  u32 $r14 c7[0x338] (8)
>3176: add u32 { $r0 $c0 } $r0 $r10 (8)
>3177: add u32 $r1 $r1 $r255 $c0 (8)
>3178: add u32 $r10 $r13 $r10 (8)
>3179: set u8 $p0 gt u32 $r10 $r14 (8)
>3180: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3181: $p0 mov u32 $r0 0x00000000 (8)
>3182: mov u32 $r1 $r11 (8)
>3183: mov u32 $r10 $r12 (8)
>3184: neg f32 $r1 $r1 (8)
>3185: add f32 $r6 $r6 $r1 (8)
>3186: neg f32 $r1 $r10 (8)
>3187: add f32 $r1 $r8 $r1 (8)
>3188: neg f32 $r0 $r0 (8)
>3189: add f32 $r0 $r9 $r0 (8)
>3190: mul f32 $r8 $r6 $r6 (8)
>3191: mad f32 $r8 $r1 $r1 $r8 (8)
>3192: mad f32 $r8 $r0 $r0 $r8 (8)
>3193: abs f32 $r8 $r8 (8)
>3194: rsq f32 $r8 $r8 (8)
>3195: mul f32 $r6 $r6 $r8 (8)
>3196: mul f32 $r9 $r1 $r8 (8)
>3197: mul f32 $r8 $r0 $r8 (8)
>3198: ld  u32 $r0 c0[0x0] (8)
>3199: mov u32 $r1 0xffffffff (8)
>3200: add u32 $r0 $r0 $r1 (8)
>3201: set s32 $r0 lt $r5 $r0 (8)
>3202: joinat BB:54 (8)
>3203: set u8 $p0 neu u32 $r255 $r0 (8)
>3204: not $p0 bra BB:69 (8)
>BB:53 (97 instructions) - idom = BB:52, df = { BB:54 }
> -> BB:54 (forward)
>3205: ld  u32 $r0 c0[0x0] (8)
>3206: add u32 $r0 $r4 $r0 (8)
>3207: mov u32 $r1 0x00000010 (8)
>3208: mul u32 $r10 $r0 $r1 (8)
>3209: ld  u64 $r0d c7[0x330] (8)
>3210: mov u32 $r11 0x00000004 (8)
>3211: ld  u32 $r12 c7[0x338] (8)
>3212: add u32 { $r0 $c0 } $r0 $r10 (8)
>3213: add u32 $r1 $r1 $r255 $c0 (8)
>3214: add u32 $r11 $r11 $r10 (8)
>3215: set u8 $p0 gt u32 $r11 $r12 (8)
>3216: not $p0 ld  u32 $r11 g[$r0d+0x0] (8)
>3217: $p0 mov u32 $r11 0x00000000 (8)
>3218: ld  u64 $r0d c7[0x330] (8)
>3219: mov u32 $r12 0x00000008 (8)
>3220: ld  u32 $r13 c7[0x338] (8)
>3221: add u32 { $r0 $c0 } $r0 $r10 (8)
>3222: add u32 $r1 $r1 $r255 $c0 (8)
>3223: add u32 $r12 $r12 $r10 (8)
>3224: set u8 $p0 gt u32 $r12 $r13 (8)
>3225: not $p0 ld  u32 $r12 g[$r0d+0x4] (8)
>3226: $p0 mov u32 $r12 0x00000000 (8)
>3227: ld  u64 $r0d c7[0x330] (8)
>3228: mov u32 $r13 0x0000000c (8)
>3229: ld  u32 $r14 c7[0x338] (8)
>3230: add u32 { $r0 $c0 } $r0 $r10 (8)
>3231: add u32 $r1 $r1 $r255 $c0 (8)
>3232: add u32 $r10 $r13 $r10 (8)
>3233: set u8 $p0 gt u32 $r10 $r14 (8)
>3234: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3235: $p0 mov u32 $r0 0x00000000 (8)
>3236: mov u32 $r10 $r11 (8)
>3237: mov u32 $r11 $r12 (8)
>3238: mov u32 $r12 $r0 (8)
>3239: mov u32 $r0 0x00000010 (8)
>3240: mul u32 $r13 $r4 $r0 (8)
>3241: ld  u64 $r0d c7[0x330] (8)
>3242: mov u32 $r14 0x00000004 (8)
>3243: ld  u32 $r15 c7[0x338] (8)
>3244: add u32 { $r0 $c0 } $r0 $r13 (8)
>3245: add u32 $r1 $r1 $r255 $c0 (8)
>3246: add u32 $r14 $r14 $r13 (8)
>3247: set u8 $p0 gt u32 $r14 $r15 (8)
>3248: not $p0 ld  u32 $r14 g[$r0d+0x0] (8)
>3249: $p0 mov u32 $r14 0x00000000 (8)
>3250: ld  u64 $r0d c7[0x330] (8)
>3251: mov u32 $r15 0x00000008 (8)
>3252: ld  u32 $r16 c7[0x338] (8)
>3253: add u32 { $r0 $c0 } $r0 $r13 (8)
>3254: add u32 $r1 $r1 $r255 $c0 (8)
>3255: add u32 $r15 $r15 $r13 (8)
>3256: set u8 $p0 gt u32 $r15 $r16 (8)
>3257: not $p0 ld  u32 $r15 g[$r0d+0x4] (8)
>3258: $p0 mov u32 $r15 0x00000000 (8)
>3259: ld  u64 $r0d c7[0x330] (8)
>3260: mov u32 $r16 0x0000000c (8)
>3261: ld  u32 $r17 c7[0x338] (8)
>3262: add u32 { $r0 $c0 } $r0 $r13 (8)
>3263: add u32 $r1 $r1 $r255 $c0 (8)
>3264: add u32 $r13 $r16 $r13 (8)
>3265: set u8 $p0 gt u32 $r13 $r17 (8)
>3266: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3267: $p0 mov u32 $r0 0x00000000 (8)
>3268: mov u32 $r1 $r14 (8)
>3269: mov u32 $r13 $r15 (8)
>3270: neg f32 $r1 $r1 (8)
>3271: add f32 $r10 $r10 $r1 (8)
>3272: neg f32 $r1 $r13 (8)
>3273: add f32 $r1 $r11 $r1 (8)
>3274: neg f32 $r0 $r0 (8)
>3275: add f32 $r0 $r12 $r0 (8)
>3276: mul f32 $r11 $r10 $r10 (8)
>3277: mad f32 $r11 $r1 $r1 $r11 (8)
>3278: mad f32 $r11 $r0 $r0 $r11 (8)
>3279: abs f32 $r11 $r11 (8)
>3280: rsq f32 $r11 $r11 (8)
>3281: mul f32 $r10 $r10 $r11 (8)
>3282: mul f32 $r1 $r1 $r11 (8)
>3283: mul f32 $r0 $r0 $r11 (8)
>3284: mul f32 $r11 $r0 $r9 (8)
>3285: mul f32 $r12 $r10 $r8 (8)
>3286: mul f32 $r13 $r1 $r6 (8)
>3287: neg f32 $r11 $r11 (8)
>3288: mad f32 $r11 $r1 $r8 $r11 (8)
>3289: neg f32 $r1 $r12 (8)
>3290: mad f32 $r1 $r0 $r6 $r1 (8)
>3291: neg f32 $r0 $r13 (8)
>3292: mad f32 $r0 $r10 $r9 $r0 (8)
>3293: mul f32 $r10 $r11 $r11 (8)
>3294: mad f32 $r10 $r1 $r1 $r10 (8)
>3295: mad f32 $r10 $r0 $r0 $r10 (8)
>3296: abs f32 $r10 $r10 (8)
>3297: rsq f32 $r10 $r10 (8)
>3298: mad f32 $r2 $r11 $r10 $r2 (8)
>3299: mad f32 $r3 $r1 $r10 $r3 (8)
>3300: mad f32 $r7 $r0 $r10 $r7 (8)
>3301: join BB:54 (8)
>BB:69 (1 instructions) - df = { }
> -> BB:54 (forward)
>3302: join BB:54 (8)
>BB:54 (5 instructions) - idom = BB:52, df = { BB:57 }
> -> BB:70 (tree)
> -> BB:55 (tree)
>3303: mov u32 $r0 0x00000000 (8)
>3304: set s32 $r0 lt $r0 $r5 (8)
>3305: joinat BB:56 (8)
>3306: set u8 $p0 neu u32 $r255 $r0 (8)
>3307: not $p0 bra BB:70 (8)
>BB:55 (98 instructions) - idom = BB:54, df = { BB:56 }
> -> BB:56 (forward)
>3308: mov u32 $r0 0x00000010 (8)
>3309: mul u32 $r5 $r4 $r0 (8)
>3310: ld  u64 $r0d c7[0x330] (8)
>3311: mov u32 $r10 0x00000004 (8)
>3312: ld  u32 $r11 c7[0x338] (8)
>3313: add u32 { $r0 $c0 } $r0 $r5 (8)
>3314: add u32 $r1 $r1 $r255 $c0 (8)
>3315: add u32 $r10 $r10 $r5 (8)
>3316: set u8 $p0 gt u32 $r10 $r11 (8)
>3317: not $p0 ld  u32 $r10 g[$r0d+0x0] (8)
>3318: $p0 mov u32 $r10 0x00000000 (8)
>3319: ld  u64 $r0d c7[0x330] (8)
>3320: mov u32 $r11 0x00000008 (8)
>3321: ld  u32 $r12 c7[0x338] (8)
>3322: add u32 { $r0 $c0 } $r0 $r5 (8)
>3323: add u32 $r1 $r1 $r255 $c0 (8)
>3324: add u32 $r11 $r11 $r5 (8)
>3325: set u8 $p0 gt u32 $r11 $r12 (8)
>3326: not $p0 ld  u32 $r11 g[$r0d+0x4] (8)
>3327: $p0 mov u32 $r11 0x00000000 (8)
>3328: ld  u64 $r0d c7[0x330] (8)
>3329: mov u32 $r12 0x0000000c (8)
>3330: ld  u32 $r13 c7[0x338] (8)
>3331: add u32 { $r0 $c0 } $r0 $r5 (8)
>3332: add u32 $r1 $r1 $r255 $c0 (8)
>3333: add u32 $r5 $r12 $r5 (8)
>3334: set u8 $p0 gt u32 $r5 $r13 (8)
>3335: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3336: $p0 mov u32 $r0 0x00000000 (8)
>3337: mov u32 $r5 $r10 (8)
>3338: mov u32 $r10 $r11 (8)
>3339: mov u32 $r11 $r0 (8)
>3340: ld  u32 $r0 c0[0x0] (8)
>3341: neg s32 $r0 $r0 (8)
>3342: add u32 $r0 $r4 $r0 (8)
>3343: mov u32 $r1 0x00000010 (8)
>3344: mul u32 $r12 $r0 $r1 (8)
>3345: ld  u64 $r0d c7[0x330] (8)
>3346: mov u32 $r13 0x00000004 (8)
>3347: ld  u32 $r14 c7[0x338] (8)
>3348: add u32 { $r0 $c0 } $r0 $r12 (8)
>3349: add u32 $r1 $r1 $r255 $c0 (8)
>3350: add u32 $r13 $r13 $r12 (8)
>3351: set u8 $p0 gt u32 $r13 $r14 (8)
>3352: not $p0 ld  u32 $r13 g[$r0d+0x0] (8)
>3353: $p0 mov u32 $r13 0x00000000 (8)
>3354: ld  u64 $r0d c7[0x330] (8)
>3355: mov u32 $r14 0x00000008 (8)
>3356: ld  u32 $r15 c7[0x338] (8)
>3357: add u32 { $r0 $c0 } $r0 $r12 (8)
>3358: add u32 $r1 $r1 $r255 $c0 (8)
>3359: add u32 $r14 $r14 $r12 (8)
>3360: set u8 $p0 gt u32 $r14 $r15 (8)
>3361: not $p0 ld  u32 $r14 g[$r0d+0x4] (8)
>3362: $p0 mov u32 $r14 0x00000000 (8)
>3363: ld  u64 $r0d c7[0x330] (8)
>3364: mov u32 $r15 0x0000000c (8)
>3365: ld  u32 $r16 c7[0x338] (8)
>3366: add u32 { $r0 $c0 } $r0 $r12 (8)
>3367: add u32 $r1 $r1 $r255 $c0 (8)
>3368: add u32 $r12 $r15 $r12 (8)
>3369: set u8 $p0 gt u32 $r12 $r16 (8)
>3370: not $p0 ld  u32 $r0 g[$r0d+0x8] (8)
>3371: $p0 mov u32 $r0 0x00000000 (8)
>3372: mov u32 $r1 $r13 (8)
>3373: mov u32 $r12 $r14 (8)
>3374: neg f32 $r1 $r1 (8)
>3375: add f32 $r5 $r5 $r1 (8)
>3376: neg f32 $r1 $r12 (8)
>3377: add f32 $r1 $r10 $r1 (8)
>3378: neg f32 $r0 $r0 (8)
>3379: add f32 $r0 $r11 $r0 (8)
>3380: mul f32 $r10 $r5 $r5 (8)
>3381: mad f32 $r10 $r1 $r1 $r10 (8)
>3382: mad f32 $r10 $r0 $r0 $r10 (8)
>3383: abs f32 $r10 $r10 (8)
>3384: rsq f32 $r10 $r10 (8)
>3385: mul f32 $r5 $r5 $r10 (8)
>3386: mul f32 $r1 $r1 $r10 (8)
>3387: mul f32 $r0 $r0 $r10 (8)
>3388: mul f32 $r10 $r0 $r9 (8)
>3389: mul f32 $r11 $r5 $r8 (8)
>3390: mul f32 $r12 $r1 $r6 (8)
>3391: neg f32 $r10 $r10 (8)
>3392: mad f32 $r8 $r1 $r8 $r10 (8)
>3393: neg f32 $r1 $r11 (8)
>3394: mad f32 $r1 $r0 $r6 $r1 (8)
>3395: neg f32 $r0 $r12 (8)
>3396: mad f32 $r0 $r5 $r9 $r0 (8)
>3397: mul f32 $r5 $r8 $r8 (8)
>3398: mad f32 $r5 $r1 $r1 $r5 (8)
>3399: mad f32 $r5 $r0 $r0 $r5 (8)
>3400: abs f32 $r5 $r5 (8)
>3401: rsq f32 $r5 $r5 (8)
>3402: mad f32 $r2 $r8 $r5 $r2 (8)
>3403: mad f32 $r3 $r1 $r5 $r3 (8)
>3404: mad f32 $r7 $r0 $r5 $r7 (8)
>3405: join BB:56 (8)
>BB:70 (1 instructions) - df = { }
> -> BB:56 (forward)
>3406: join BB:56 (8)
>BB:56 (1 instructions) - idom = BB:54, df = { BB:57 }
> -> BB:57 (forward)
>3407: join BB:57 (8)
>BB:68 (1 instructions) - df = { }
> -> BB:57 (forward)
>3408: join BB:57 (8)
>BB:57 (35 instructions) - idom = BB:51, df = { }
> -> BB:1 (tree)
>3409: mov u32 $r0 0x00000010 (8)
>3410: mul u32 $r4 $r4 $r0 (8)
>3411: mul f32 $r0 $r2 $r2 (8)
>3412: mad f32 $r0 $r3 $r3 $r0 (8)
>3413: mad f32 $r0 $r7 $r7 $r0 (8)
>3414: abs f32 $r0 $r0 (8)
>3415: rsq f32 $r0 $r0 (8)
>3416: mul f32 $r2 $r2 $r0 (8)
>3417: mul f32 $r3 $r3 $r0 (8)
>3418: mul f32 $r5 $r7 $r0 (8)
>3419: ld  u64 $r0d c7[0x310] (8)
>3420: mov u32 $r6 0x00000004 (8)
>3421: ld  u32 $r7 c7[0x318] (8)
>3422: add u32 { $r0 $c0 } $r0 $r4 (8)
>3423: add u32 $r1 $r1 $r255 $c0 (8)
>3424: add u32 $r6 $r6 $r4 (8)
>3425: set u8 $p0 gt u32 $r6 $r7 (8)
>3426: not $p0 st  u32 # g[$r0d+0x0] $r2 (8)
>3427: ld  u64 $r0d c7[0x310] (8)
>3428: mov u32 $r2 0x00000008 (8)
>3429: ld  u32 $r6 c7[0x318] (8)
>3430: add u32 { $r0 $c0 } $r0 $r4 (8)
>3431: add u32 $r1 $r1 $r255 $c0 (8)
>3432: add u32 $r2 $r2 $r4 (8)
>3433: set u8 $p0 gt u32 $r2 $r6 (8)
>3434: not $p0 st  u32 # g[$r0d+0x4] $r3 (8)
>3435: ld  u64 $r0d c7[0x310] (8)
>3436: mov u32 $r2 0x0000000c (8)
>3437: ld  u32 $r3 c7[0x318] (8)
>3438: add u32 { $r0 $c0 } $r0 $r4 (8)
>3439: add u32 $r1 $r1 $r255 $c0 (8)
>3440: add u32 $r2 $r2 $r4 (8)
>3441: set u8 $p0 gt u32 $r2 $r3 (8)
>3442: not $p0 st  u32 # g[$r0d+0x8] $r5 (8)
>3443: membar (SUBOP:7) - # (8)
>BB:1 (1 instructions) - idom = BB:57, df = { }
>3444: exit - # (8)
>BB:37 (63 instructions) - idom = BB:38, df = { BB:10 }
> -> BB:66 (tree)
> -> BB:44 (tree)
>3445: mov u32 $r0 0x00000010 (8)
>3446: mul u32 $r2 $r4 $r0 (8)
>3447: ld  u64 $r0d c7[0x330] (8)
>3448: mov u32 $r3 0x00000004 (8)
>3449: ld  u32 $r16 c7[0x338] (8)
>3450: add u32 { $r0 $c0 } $r0 $r2 (8)
>3451: add u32 $r1 $r1 $r255 $c0 (8)
>3452: add u32 $r3 $r3 $r2 (8)
>3453: set u8 $p0 gt u32 $r3 $r16 (8)
>3454: not $p0 ld  u32 $r3 g[$r0d+0x0] (8)
>3455: $p0 mov u32 $r3 0x00000000 (8)
>3456: ld  u64 $r0d c7[0x330] (8)
>3457: mov u32 $r16 0x00000008 (8)
>3458: ld  u32 $r17 c7[0x338] (8)
>3459: add u32 { $r0 $c0 } $r0 $r2 (8)
>3460: add u32 $r1 $r1 $r255 $c0 (8)
>3461: add u32 $r16 $r16 $r2 (8)
>3462: set u8 $p0 gt u32 $r16 $r17 (8)
>3463: not $p0 ld  u32 $r16 g[$r0d+0x4] (8)
>3464: $p0 mov u32 $r16 0x00000000 (8)
>3465: ld  u64 $r0d c7[0x330] (8)
>3466: mov u32 $r17 0x0000000c (8)
>3467: ld  u32 $r18 c7[0x338] (8)
>3468: add u32 { $r0 $c0 } $r0 $r2 (8)
>3469: add u32 $r1 $r1 $r255 $c0 (8)
>3470: add u32 $r17 $r17 $r2 (8)
>3471: set u8 $p0 gt u32 $r17 $r18 (8)
>3472: not $p0 ld  u32 $r17 g[$r0d+0x8] (8)
>3473: $p0 mov u32 $r17 0x00000000 (8)
>3474: ld  u64 $r0d c7[0x330] (8)
>3475: mov u32 $r18 0x00000010 (8)
>3476: ld  u32 $r19 c7[0x338] (8)
>3477: add u32 { $r0 $c0 } $r0 $r2 (8)
>3478: add u32 $r1 $r1 $r255 $c0 (8)
>3479: add u32 $r2 $r18 $r2 (8)
>3480: set u8 $p0 gt u32 $r2 $r19 (8)
>3481: not $p0 ld  u32 $r0 g[$r0d+0xc] (8)
>3482: $p0 mov u32 $r0 0x00000000 (8)
>3483: ld  u32 $r1 c0[0x40] (8)
>3484: neg f32 $r1 $r1 (8)
>3485: add f32 $r1 $r3 $r1 (8)
>3486: ld  u32 $r2 c0[0x44] (8)
>3487: neg f32 $r2 $r2 (8)
>3488: add f32 $r2 $r16 $r2 (8)
>3489: ld  u32 $r3 c0[0x48] (8)
>3490: neg f32 $r3 $r3 (8)
>3491: add f32 $r3 $r17 $r3 (8)
>3492: ld  u32 $r16 c0[0x4c] (8)
>3493: neg f32 $r16 $r16 (8)
>3494: add f32 $r0 $r0 $r16 (8)
>3495: mul f32 $r16 $r1 $r1 (8)
>3496: mad f32 $r16 $r2 $r2 $r16 (8)
>3497: mad f32 $r16 $r3 $r3 $r16 (8)
>3498: mad f32 $r16 $r0 $r0 $r16 (8)
>3499: rsq f32 $r16 $r16 (8)
>3500: rcp f32 $r16 $r16 (8)
>3501: ld  u32 $r17 c0[0x50] (8)
>3502: mov u32 $r18 0x3c23d70a (8)
>3503: add f32 $r17 $r17 $r18 (8)
>3504: set u32 $r16 lt f32 $r16 $r17 (8)
>3505: joinat BB:45 (8)
>3506: set u8 $p0 neu u32 $r255 $r16 (8)
>3507: not $p0 bra BB:66 (8)
>BB:44 (57 instructions) - idom = BB:37, df = { BB:45 }
> -> BB:45 (forward)
>3508: mov u32 $r16 0x00000010 (8)
>3509: mul u32 $r16 $r4 $r16 (8)
>3510: mul f32 $r17 $r1 $r1 (8)
>3511: mad f32 $r17 $r2 $r2 $r17 (8)
>3512: mad f32 $r17 $r3 $r3 $r17 (8)
>3513: mad f32 $r17 $r0 $r0 $r17 (8)
>3514: abs f32 $r17 $r17 (8)
>3515: rsq f32 $r17 $r17 (8)
>3516: mul f32 $r1 $r1 $r17 (8)
>3517: mul f32 $r2 $r2 $r17 (8)
>3518: mul f32 $r3 $r3 $r17 (8)
>3519: mul f32 $r0 $r0 $r17 (8)
>3520: ld  u32 $r17 c0[0x50] (8)
>3521: mov u32 $r18 0x3c23d70a (8)
>3522: add f32 $r17 $r17 $r18 (8)
>3523: ld  u32 $r18 c0[0x40] (8)
>3524: mad f32 $r18 $r1 $r17 $r18 (8)
>3525: ld  u32 $r1 c0[0x44] (8)
>3526: mad f32 $r2 $r2 $r17 $r1 (8)
>3527: ld  u32 $r1 c0[0x48] (8)
>3528: mad f32 $r3 $r3 $r17 $r1 (8)
>3529: ld  u32 $r1 c0[0x4c] (8)
>3530: mad f32 $r17 $r0 $r17 $r1 (8)
>3531: ld  u64 $r0d c7[0x330] (8)
>3532: mov u32 $r19 0x00000004 (8)
>3533: ld  u32 $r20 c7[0x338] (8)
>3534: add u32 { $r0 $c0 } $r0 $r16 (8)
>3535: add u32 $r1 $r1 $r255 $c0 (8)
>3536: add u32 $r19 $r19 $r16 (8)
>3537: set u8 $p0 gt u32 $r19 $r20 (8)
>3538: not $p0 st  u32 # g[$r0d+0x0] $r18 (8)
>3539: ld  u64 $r0d c7[0x330] (8)
>3540: mov u32 $r18 0x00000008 (8)
>3541: ld  u32 $r19 c7[0x338] (8)
>3542: add u32 { $r0 $c0 } $r0 $r16 (8)
>3543: add u32 $r1 $r1 $r255 $c0 (8)
>3544: add u32 $r18 $r18 $r16 (8)
>3545: set u8 $p0 gt u32 $r18 $r19 (8)
>3546: not $p0 st  u32 # g[$r0d+0x4] $r2 (8)
>3547: ld  u64 $r0d c7[0x330] (8)
>3548: mov u32 $r2 0x0000000c (8)
>3549: ld  u32 $r18 c7[0x338] (8)
>3550: add u32 { $r0 $c0 } $r0 $r16 (8)
>3551: add u32 $r1 $r1 $r255 $c0 (8)
>3552: add u32 $r2 $r2 $r16 (8)
>3553: set u8 $p0 gt u32 $r2 $r18 (8)
>3554: not $p0 st  u32 # g[$r0d+0x8] $r3 (8)
>3555: ld  u64 $r0d c7[0x330] (8)
>3556: mov u32 $r2 0x00000010 (8)
>3557: ld  u32 $r3 c7[0x338] (8)
>3558: add u32 { $r0 $c0 } $r0 $r16 (8)
>3559: add u32 $r1 $r1 $r255 $c0 (8)
>3560: add u32 $r2 $r2 $r16 (8)
>3561: set u8 $p0 gt u32 $r2 $r3 (8)
>3562: not $p0 st  u32 # g[$r0d+0xc] $r17 (8)
>3563: membar (SUBOP:7) - # (8)
>3564: join BB:45 (8)
>BB:66 (1 instructions) - df = { }
> -> BB:45 (forward)
>3565: join BB:45 (8)
>BB:45 (4 instructions) - idom = BB:37, df = { BB:10 }
> -> BB:10 (back)
>3566: bar u32 # $r255 $r255 (8)
>3567: mov u32 $r0 0x00000001 (8)
>3568: add u32 $r15 $r15 $r0 (8)
>3569: bra BB:10 (8)
>3708: message: shader compiler issue 1: type: 5, local: 0, gpr: 37, inst: 3570, bytes: 32640
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>COMPUTE LAUNCH DESCRIPTOR:
>...
>[1c]: 0xbc000000
>[20]: 0x000f7580
>...
>[2c]: 0x44014000
>[30]: 0x00000001
>[34]: 0x00010001
>...
>[48]: 0x04000000
>[4c]: 0x00010001
>[50]: 0x20000081
>...
>[74]: 0x003d0000
>[78]: 0x80000000
>...
>[ac]: 0x003e2800
>[b0]: 0x04000000
>[b4]: 0x08000000
>[b8]: 0x25000000
>[bc]: 0x30000800
>...
>entry = 0xf7580
>grid dimensions = 1x1x1
>block dimensions = 1024x1x1
>s[] size: 0x0
>l[] size: -0x0 / +0x0
>stack size: 0x800
>barrier count: 1
>$r count: 37
>cache split: 16K_SHARED_48K_L1
>CB[0]: address = 0x3d0000, size 0x10000
>CB[7]: address = 0x3e2800, size 0x800

Actions: View

Attachments on bug 96258: 124145 | 124146 | 124147

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