Attachment 125641 Details for Bug 97258 – Removing some unused structures from DAL related files

[patch] Removing some unused structures from DAL related files

0001-Fixes-to-allow-DAL-enabled-amdgpu-module-to-be-built.patch (text/plain), 4.04 KB, created by Marius Orcsik on 2016-08-09 14:53:57 UTC

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Creator: Marius Orcsik

Created: 2016-08-09 14:53:57 UTC

Size: 4.04 KB

patch

obsolete

>From aa97c49faa2b7e0cd6e383e20cfc1c03263b4cf5 Mon Sep 17 00:00:00 2001
>From: Marius Orcsik <marius@habarnam.ro>
>Date: Tue, 9 Aug 2016 16:52:17 +0200
>Subject: [PATCH] Fixes to allow DAL enabled amdgpu module to be built
>
>---
> drivers/gpu/drm/amd/dal/dc/core/dc_link_ddc.c             |  7 +++++++
> .../gpu/drm/amd/dal/dc/i2caux/dce80/i2c_sw_engine_dce80.c | 13 +++++++++++++
> drivers/gpu/drm/amd/dal/modules/freesync/freesync.c       |  3 +--
> drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c         | 15 +++++++++++++++
> 4 files changed, 36 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link_ddc.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link_ddc.c
>index f96e74b..6727d8f 100644
>--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link_ddc.c
>+++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link_ddc.c
>@@ -41,6 +41,13 @@
> #define CV_SMART_DONGLE_ADDRESS 0x20
> /* DVI-HDMI dongle slave address for retrieving dongle signature*/
> #define DVI_HDMI_DONGLE_ADDRESS 0x68
>+static const int8_t dvi_hdmi_dongle_signature_str[] = "6140063500G";
>+struct dvi_hdmi_dongle_signature_data {
>+	int8_t vendor[3];/* "AMD" */
>+	uint8_t version[2];
>+	uint8_t size;
>+	int8_t id[11];/* "6140063500G"*/
>+};
> /* DP-HDMI dongle slave address for retrieving dongle signature*/
> #define DP_HDMI_DONGLE_ADDRESS 0x40
> static const uint8_t dp_hdmi_dongle_signature_str[] = "DP-HDMI ADAPTOR";
>diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2c_sw_engine_dce80.c b/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2c_sw_engine_dce80.c
>index e76186e..5f2f298 100644
>--- a/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2c_sw_engine_dce80.c
>+++ b/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2c_sw_engine_dce80.c
>@@ -46,6 +46,19 @@
> #include "dce/dce_8_0_d.h"
> #include "dce/dce_8_0_sh_mask.h"
> 
>+/*
>+ * This unit
>+ */
>+
>+static const uint32_t ddc_hw_status_addr[] = {
>+	mmDC_I2C_DDC1_HW_STATUS,
>+	mmDC_I2C_DDC2_HW_STATUS,
>+	mmDC_I2C_DDC3_HW_STATUS,
>+	mmDC_I2C_DDC4_HW_STATUS,
>+	mmDC_I2C_DDC5_HW_STATUS,
>+	mmDC_I2C_DDC6_HW_STATUS,
>+	mmDC_I2C_DDCVGA_HW_STATUS
>+};
> 
> /*
>  * @brief
>diff --git a/drivers/gpu/drm/amd/dal/modules/freesync/freesync.c b/drivers/gpu/drm/amd/dal/modules/freesync/freesync.c
>index fbfe7c3..b787045 100644
>--- a/drivers/gpu/drm/amd/dal/modules/freesync/freesync.c
>+++ b/drivers/gpu/drm/amd/dal/modules/freesync/freesync.c
>@@ -501,7 +501,7 @@ static bool set_freesync_on_streams(struct core_freesync *core_freesync,
> 
> 				/* Program only if v_total_nominal is in range*/
> 				if (v_total_nominal >=
>-					streams[stream_idx]->timing.v_total) {
>+					streams[stream_idx]->timing.v_total)
> 
> 					/* Update the freesync context for
> 					 * the stream
>@@ -515,7 +515,6 @@ static bool set_freesync_on_streams(struct core_freesync *core_freesync,
> 						core_freesync->dc, streams,
> 						num_streams, v_total_nominal,
> 						v_total_nominal);
>-                }
> 
> 				return true;
> 
>diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
>index f7ea21f..c7dc111 100644
>--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
>+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
>@@ -88,6 +88,21 @@
> 
> typedef uint32_t PECI_RegistryValue;
> 
>+/* [2.5%,~2.5%] Clock stretched is multiple of 2.5% vs not and [Fmin, Fmax, LDO_REFSEL, USE_FOR_LOW_FREQ] */
>+static const uint16_t PP_ClockStretcherLookupTable[2][4] = {
>+	{600, 1050, 3, 0},
>+	{600, 1050, 6, 1} };
>+
>+/* [FF, SS] type, [] 4 voltage ranges, and [Floor Freq, Boundary Freq, VID min , VID max] */
>+static const uint32_t PP_ClockStretcherDDTTable[2][4][4] = {
>+	{ {265, 529, 120, 128}, {325, 650, 96, 119}, {430, 860, 32, 95}, {0, 0, 0, 31} },
>+	{ {275, 550, 104, 112}, {319, 638, 96, 103}, {360, 720, 64, 95}, {384, 768, 32, 63} } };
>+
>+/* [Use_For_Low_freq] value, [0%, 5%, 10%, 7.14%, 14.28%, 20%] (coming from PWR_CKS_CNTL.stretch_amount reg spec) */
>+static const uint8_t PP_ClockStretchAmountConversion[2][6] = {
>+	{0, 1, 3, 2, 4, 5},
>+	{0, 2, 4, 5, 6, 5} };
>+
> /* Values for the CG_THERMAL_CTRL::DPM_EVENT_SRC field. */
> enum DPM_EVENT_SRC {
> 	DPM_EVENT_SRC_ANALOG = 0,               /* Internal analog trip point */
>-- 
>2.9.2
>

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