Attachment 126123 Details for Bug 97166 – ddebug info

ddebug info

BatmanOrigins.exe_2449_00000000 (text/plain), 51.12 KB, created by farmboy0+freedesktop on 2016-08-30 19:51:27 UTC

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Creator: farmboy0+freedesktop

Created: 2016-08-30 19:51:27 UTC

Size: 51.12 KB

patch

obsolete

>Command: Z:\mnt\daten\SteamLibrary\Windows\steamapps\common\Batman Arkham Origins\SinglePlayer\Binaries\Win32\BatmanOrigins.exe -d3d9 -nostartupmovies                                                                                       
>Driver vendor: X.Org
>Device vendor: AMD
>Device name: AMD TONGA (DRM 3.2.0 / 4.7.2, LLVM 4.0.0)
>
>Draw call sequence # = 824333
>HW reached sequence # = 824332
>Elapsed time = 1007 ms
>
>blit:
>  dst.resource: {target = 2d, format = PIPE_FORMAT_R16G16B16A16_FLOAT, width0 = 1920, height0 = 1080, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, usage = 0, bind = 10, flags = 0, }
>  dst.level: 0
>  dst.box: {x = 0, y = 0, z = 0, width = 1920, height = 1080, depth = 1, }
>  dst.format: PIPE_FORMAT_R16G16B16A16_FLOAT
>  src.resource: {target = 2d, format = PIPE_FORMAT_R16G16B16A16_FLOAT, width0 = 1920, height0 = 1080, depth0 = 1, array_size = 1, last_level = 0, nr_samples = 0, usage = 0, bind = 10, flags = 0, }
>  src.level: 0
>  src.box: {x = 0, y = 0, z = 0, width = 1920, height = 1080, depth = 1, }
>  src.format: PIPE_FORMAT_R16G16B16A16_FLOAT
>  mask: 0xf
>  filter: 0
>  scissor_enable: 0
>  scissor: {minx = 0, miny = 0, maxx = 0, maxy = 0, }
>  render_condition_enable: 1
>
>
>*****************************************************************************
>Driver-specific state:
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS - main shader part - LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) {
>main_body:
>  %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0
>  %17 = call float @llvm.SI.load.const(<16 x i8> %16, i32 96)
>  %18 = call float @llvm.SI.load.const(<16 x i8> %16, i32 100)
>  %19 = call float @llvm.SI.load.const(<16 x i8> %16, i32 104)
>  %20 = call float @llvm.SI.load.const(<16 x i8> %16, i32 112)
>  %21 = call float @llvm.SI.load.const(<16 x i8> %16, i32 116)
>  %22 = call float @llvm.SI.load.const(<16 x i8> %16, i32 120)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %16, i32 128)
>  %24 = call float @llvm.SI.load.const(<16 x i8> %16, i32 132)
>  %25 = call float @llvm.SI.load.const(<16 x i8> %16, i32 136)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %16, i32 144)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %16, i32 148)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %16, i32 152)
>  %29 = call float @llvm.SI.load.const(<16 x i8> %16, i32 156)
>  %30 = call float @llvm.SI.load.const(<16 x i8> %16, i32 164)
>  %31 = call float @llvm.SI.load.const(<16 x i8> %16, i32 168)
>  %32 = call float @llvm.SI.load.const(<16 x i8> %16, i32 172)
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %34, i32 0, i32 %14)
>  %36 = extractelement <4 x float> %35, i32 0
>  %37 = extractelement <4 x float> %35, i32 1
>  %38 = fmul float %36, %26
>  %39 = fadd float %38, %29
>  %40 = fmul float %37, %27
>  %41 = fadd float %40, %28
>  %42 = fmul float %20, %37
>  %43 = fmul float %21, %37
>  %44 = fmul float %22, %37
>  %45 = fmul float %17, %36
>  %46 = fadd float %45, %42
>  %47 = fmul float %18, %36
>  %48 = fadd float %47, %43
>  %49 = fmul float %19, %36
>  %50 = fadd float %49, %44
>  %51 = fadd float %46, %23
>  %52 = fadd float %48, %24
>  %53 = fadd float %50, %25
>  %54 = fadd float %36, 0.000000e+00
>  %55 = fadd float %37, 0.000000e+00
>  %56 = fmul float %36, 0.000000e+00
>  %57 = fadd float %56, 0.000000e+00
>  %58 = fmul float %36, 0.000000e+00
>  %59 = fadd float %58, 1.000000e+00
>  %60 = fmul float %55, %30
>  %61 = fmul float %31, %59
>  %62 = fadd float %61, %54
>  %63 = fmul float %32, %59
>  %64 = fadd float %63, %60
>  %65 = fmul float %57, 2.000000e+00
>  %66 = fsub float %65, %59
>  %67 = bitcast i32 %12 to float
>  %68 = insertvalue <{ float, float, float }> undef, float %67, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float 0.000000e+00, float 0.000000e+00, float %39, float %41)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %51, float %52, float %53, float 0.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 39, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 40, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 41, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 42, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 43, i32 0, float undef, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %62, float %64, float %66, float %59)
>  ret <{ float, float, float }> %68
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 3208000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C00A0105 00000000
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C00A0001 00000000
>	v_mov_b32_e32 v0, 0                                 ; 7E000280
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s10, s[0:3], 0x80               ; C0220280 00000080
>	s_buffer_load_dword s11, s[0:3], 0x84               ; C02202C0 00000084
>	s_buffer_load_dword s12, s[0:3], 0x88               ; C0220300 00000088
>	s_buffer_load_dword s15, s[0:3], 0x98               ; C02203C0 00000098
>	s_buffer_load_dword s16, s[0:3], 0x9c               ; C0220400 0000009C
>	s_buffer_load_dword s7, s[0:3], 0x70                ; C02201C0 00000070
>	s_buffer_load_dword s8, s[0:3], 0x74                ; C0220200 00000074
>	s_buffer_load_dword s9, s[0:3], 0x78                ; C0220240 00000078
>	s_buffer_load_dword s13, s[0:3], 0x90               ; C0220340 00000090
>	s_buffer_load_dword s14, s[0:3], 0x94               ; C0220380 00000094
>	s_buffer_load_dword s4, s[0:3], 0x60                ; C0220100 00000060
>	s_buffer_load_dword s5, s[0:3], 0x64                ; C0220140 00000064
>	s_buffer_load_dword s6, s[0:3], 0x68                ; C0220180 00000068
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_mov_b32_e32 v1, s16                               ; 7E020210
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_mov_b32_e32 v5, s15                               ; 7E0A020F
>	v_mov_b32_e32 v6, s10                               ; 7E0C020A
>	v_mov_b32_e32 v7, s11                               ; 7E0E020B
>	v_mov_b32_e32 v8, s12                               ; 7E10020C
>	s_buffer_load_dword s17, s[0:3], 0xa4               ; C0220440 000000A4
>	s_buffer_load_dword s18, s[0:3], 0xa8               ; C0220480 000000A8
>	s_buffer_load_dword s0, s[0:3], 0xac                ; C0220000 000000AC
>	v_mac_f32_e32 v6, s7, v4                            ; 2C0C0807
>	v_mac_f32_e32 v7, s8, v4                            ; 2C0E0808
>	v_mac_f32_e32 v8, s9, v4                            ; 2C100809
>	v_mac_f32_e32 v5, s14, v4                           ; 2C0A080E
>	v_mac_f32_e32 v1, s13, v3                           ; 2C02060D
>	v_mac_f32_e32 v6, s4, v3                            ; 2C0C0604
>	v_mac_f32_e32 v7, s5, v3                            ; 2C0E0605
>	v_mac_f32_e32 v8, s6, v3                            ; 2C100606
>	exp 15, 32, 0, 0, 0, v0, v0, v1, v5                 ; C400020F 05010000
>	exp 15, 33, 0, 0, 0, v6, v7, v8, v0                 ; C400021F 00080706
>	exp 15, 34, 0, 0, 0, v0, v0, v0, v0                 ; C400022F 00000000
>	exp 15, 35, 0, 0, 0, v0, v0, v0, v0                 ; C400023F 00000000
>	exp 15, 36, 0, 0, 0, v0, v0, v0, v0                 ; C400024F 00000000
>	exp 15, 37, 0, 0, 0, v0, v0, v0, v0                 ; C400025F 00000000
>	exp 15, 38, 0, 0, 0, v0, v0, v0, v0                 ; C400026F 00000000
>	exp 15, 39, 0, 0, 0, v0, v0, v0, v0                 ; C400027F 00000000
>	exp 15, 40, 0, 0, 0, v0, v0, v0, v0                 ; C400028F 00000000
>	v_add_f32_e32 v4, 0, v4                             ; 02080880
>	exp 15, 41, 0, 0, 0, v0, v0, v0, v0                 ; C400029F 00000000
>	exp 15, 42, 0, 0, 0, v0, v0, v0, v0                 ; C40002AF 00000000
>	v_add_f32_e32 v9, 0, v3                             ; 02120680
>	v_mad_f32 v10, v3, 0, 0                             ; D1C1000A 02010103
>	v_mad_f32 v3, v3, 0, 1.0                            ; D1C10003 03C90103
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_mul_f32_e32 v4, s17, v4                           ; 0A080811
>	v_mac_f32_e32 v9, s18, v3                           ; 2C120612
>	v_mad_f32 v10, 2.0, v10, -v3                        ; D1C1000A 840E14F4
>	v_mac_f32_e32 v4, s0, v3                            ; 2C080600
>	exp 15, 43, 0, 0, 0, v0, v0, v0, v0                 ; C40002BF 00000000
>	exp 15, 12, 0, 1, 0, v9, v4, v10, v3                ; C40008CF 030A0409
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 96
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 384 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader - main shader part - LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %27 = call float @llvm.SI.load.const(<16 x i8> %24, i32 40)
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 44)
>  %29 = call float @llvm.SI.load.const(<16 x i8> %24, i32 128)
>  %30 = call float @llvm.SI.load.const(<16 x i8> %24, i32 132)
>  %31 = call float @llvm.SI.load.const(<16 x i8> %24, i32 136)
>  %32 = call float @llvm.SI.load.const(<16 x i8> %24, i32 140)
>  %33 = call float @llvm.SI.load.const(<16 x i8> %24, i32 144)
>  %34 = call float @llvm.SI.load.const(<16 x i8> %24, i32 148)
>  %35 = call float @llvm.SI.load.const(<16 x i8> %24, i32 152)
>  %36 = call float @llvm.SI.load.const(<16 x i8> %24, i32 156)
>  %37 = call float @llvm.SI.load.const(<16 x i8> %24, i32 160)
>  %38 = call float @llvm.SI.load.const(<16 x i8> %24, i32 164)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %24, i32 168)
>  %40 = call float @llvm.SI.load.const(<16 x i8> %24, i32 172)
>  %41 = call float @llvm.SI.load.const(<16 x i8> %24, i32 176)
>  %42 = call float @llvm.SI.load.const(<16 x i8> %24, i32 180)
>  %43 = call float @llvm.SI.load.const(<16 x i8> %24, i32 184)
>  %44 = call float @llvm.SI.load.const(<16 x i8> %24, i32 188)
>  %45 = call float @llvm.SI.load.const(<16 x i8> %24, i32 192)
>  %46 = call float @llvm.SI.load.const(<16 x i8> %24, i32 196)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %24, i32 200)
>  %48 = call float @llvm.SI.load.const(<16 x i8> %24, i32 208)
>  %49 = call float @llvm.SI.load.const(<16 x i8> %24, i32 212)
>  %50 = call float @llvm.SI.load.const(<16 x i8> %24, i32 216)
>  %51 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %52 = load <8 x i32>, <8 x i32> addrspace(2)* %51, align 32, !invariant.load !0
>  %53 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %54 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %53, i64 0, i64 3, !amdgpu.uniform !0
>  %55 = load <4 x i32>, <4 x i32> addrspace(2)* %54, align 16, !invariant.load !0
>  %56 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %57 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %58 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %59 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %60 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %61 = fmul float %56, 0.000000e+00
>  %62 = bitcast float %56 to i32
>  %63 = bitcast float %57 to i32
>  %64 = bitcast float %61 to i32
>  %65 = insertelement <4 x i32> undef, i32 %62, i32 0
>  %66 = insertelement <4 x i32> %65, i32 %63, i32 1
>  %67 = insertelement <4 x i32> %66, i32 %64, i32 2
>  %68 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %67, <8 x i32> %52, <4 x i32> %55, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %69 = extractelement <4 x float> %68, i32 3
>  %70 = fmul float %69, %27
>  %71 = fsub float %70, %28
>  %72 = fdiv float 1.000000e+00, %71, !fpmath !1
>  %73 = fmul float %72, %58
>  %74 = fmul float %72, %59
>  %75 = fmul float %72, %60
>  %76 = fmul float %58, %72
>  %77 = fadd float %76, %48
>  %78 = fmul float %59, %72
>  %79 = fadd float %78, %49
>  %80 = fmul float %60, %72
>  %81 = fadd float %80, %50
>  %82 = fmul float %77, %77
>  %83 = fmul float %79, %79
>  %84 = fadd float %83, %82
>  %85 = fmul float %81, %81
>  %86 = fadd float %84, %85
>  %87 = fcmp oeq float %86, 0.000000e+00
>  br i1 %87, label %ENDIF, label %ELSE
>
>ELSE:                                             ; preds = %main_body
>  %88 = call float @llvm.sqrt.f32(float %86)
>  %89 = fdiv float 1.000000e+00, %88, !fpmath !1
>  %90 = fmul float %77, %89
>  %91 = fmul float %79, %89
>  %92 = fmul float %81, %89
>  br label %ENDIF
>
>ENDIF:                                            ; preds = %main_body, %ELSE
>  %temp16.0 = phi float [ %90, %ELSE ], [ 0.000000e+00, %main_body ]
>  %temp17.0 = phi float [ %91, %ELSE ], [ 0.000000e+00, %main_body ]
>  %temp18.0 = phi float [ %92, %ELSE ], [ 0.000000e+00, %main_body ]
>  %93 = fmul float %temp16.0, %45
>  %94 = fmul float %temp17.0, %46
>  %95 = fadd float %94, %93
>  %96 = fmul float %temp18.0, %47
>  %97 = fadd float %95, %96
>  %98 = call float @llvm.AMDGPU.clamp.(float %97, float 0.000000e+00, float 1.000000e+00)
>  %99 = fmul float %73, %73
>  %100 = fmul float %74, %74
>  %101 = fadd float %100, %99
>  %102 = fmul float %75, %75
>  %103 = fadd float %101, %102
>  %104 = call float @llvm.fabs.f32(float %103)
>  %105 = call float @llvm.sqrt.f32(float %104)
>  %106 = fsub float %105, %29
>  %107 = fsub float %105, %31
>  %108 = fmul float %106, %30
>  %109 = fmul float %107, %32
>  %110 = call float @llvm.AMDGPU.clamp.(float %108, float 0.000000e+00, float 1.000000e+00)
>  %111 = call float @llvm.AMDGPU.clamp.(float %109, float 0.000000e+00, float 1.000000e+00)
>  %112 = fmul float %110, %25
>  %113 = fmul float %111, %26
>  %114 = fmul float %113, %37
>  %115 = fmul float %113, %38
>  %116 = fmul float %113, %39
>  %117 = fmul float %113, %40
>  %118 = fmul float %33, %112
>  %119 = fadd float %118, %114
>  %120 = fmul float %34, %112
>  %121 = fadd float %120, %115
>  %122 = fmul float %35, %112
>  %123 = fadd float %122, %116
>  %124 = fmul float %36, %112
>  %125 = fadd float %124, %117
>  %126 = fadd float %41, -1.000000e+00
>  %127 = fadd float %42, -1.000000e+00
>  %128 = fadd float %43, -1.000000e+00
>  %129 = fadd float %44, -1.000000e+00
>  %130 = fmul float %98, %126
>  %131 = fadd float %130, 1.000000e+00
>  %132 = fmul float %98, %127
>  %133 = fadd float %132, 1.000000e+00
>  %134 = fmul float %98, %128
>  %135 = fadd float %134, 1.000000e+00
>  %136 = fmul float %98, %129
>  %137 = fadd float %136, 1.000000e+00
>  %138 = fmul float %131, %119
>  %139 = fmul float %133, %121
>  %140 = fmul float %135, %123
>  %141 = fmul float %137, %125
>  %142 = call float @llvm.AMDGPU.clamp.(float %141, float 0.000000e+00, float 1.000000e+00)
>  %143 = bitcast float %5 to i32
>  %144 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %143, 10
>  %145 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %144, float %138, 11
>  %146 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %145, float %139, 12
>  %147 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %146, float %140, 13
>  %148 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %147, float %142, 14
>  %149 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %148, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %149
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>
>Pixel Shader:
>Shader main disassembly:
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C00A0001 00000000
>	s_mov_b32 m0, s11                                     ; BEFC000B
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                    ; D4100202
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                  ; C00E0302 00000000
>	s_load_dwordx4 s[4:7], s[4:5], 0x30                   ; C00A0102 00000030
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_buffer_load_dword s24, s[0:3], 0x2c                 ; C0220600 0000002C
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]              ; D4110203
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                    ; D4140302
>	s_buffer_load_dword s23, s[0:3], 0x28                 ; C02205C0 00000028
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]              ; D4150303
>	v_interp_p1_f32 v7, v2, 0, 1, [m0]                    ; D41C0402
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]              ; D41D0403
>	v_interp_p1_f32 v8, v2, 1, 1, [m0]                    ; D4200502
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]              ; D4210503
>	v_interp_p1_f32 v9, v2, 2, 1, [m0]                    ; D4240602
>	v_mul_f32_e32 v6, 0, v4                               ; 0A0C0880
>	v_interp_p2_f32 v9, [v9], v3, 2, 1, [m0]              ; D4250603
>	image_sample_l v0, v[4:7], s[12:19], s[4:7] dmask:0x8 ; F0900800 00230004
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v1, s24                                 ; 7E020218
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mad_f32 v0, s23, v0, -v1                            ; D1C10000 84060017
>	s_buffer_load_dword s26, s[0:3], 0xd0                 ; C0220680 000000D0
>	v_rcp_f32_e32 v4, v0                                  ; 7E084500
>	s_buffer_load_dword s14, s[0:3], 0x0                  ; C0220380 00000000
>	s_buffer_load_dword s13, s[0:3], 0x4                  ; C0220340 00000004
>	s_buffer_load_dword s21, s[0:3], 0x80                 ; C0220540 00000080
>	s_buffer_load_dword s19, s[0:3], 0x84                 ; C02204C0 00000084
>	s_buffer_load_dword s22, s[0:3], 0x88                 ; C0220580 00000088
>	s_buffer_load_dword s20, s[0:3], 0x8c                 ; C0220500 0000008C
>	s_buffer_load_dword s12, s[0:3], 0x90                 ; C0220300 00000090
>	s_buffer_load_dword s11, s[0:3], 0x94                 ; C02202C0 00000094
>	s_buffer_load_dword s8, s[0:3], 0x98                  ; C0220200 00000098
>	s_buffer_load_dword s4, s[0:3], 0x9c                  ; C0220100 0000009C
>	s_buffer_load_dword s18, s[0:3], 0xa0                 ; C0220480 000000A0
>	s_buffer_load_dword s17, s[0:3], 0xa4                 ; C0220440 000000A4
>	s_buffer_load_dword s16, s[0:3], 0xa8                 ; C0220400 000000A8
>	s_buffer_load_dword s15, s[0:3], 0xac                 ; C02203C0 000000AC
>	s_buffer_load_dword s9, s[0:3], 0xb0                  ; C0220240 000000B0
>	s_buffer_load_dword s7, s[0:3], 0xb4                  ; C02201C0 000000B4
>	s_buffer_load_dword s6, s[0:3], 0xb8                  ; C0220180 000000B8
>	s_buffer_load_dword s5, s[0:3], 0xbc                  ; C0220140 000000BC
>	s_buffer_load_dword s25, s[0:3], 0xc0                 ; C0220640 000000C0
>	s_buffer_load_dword s24, s[0:3], 0xc4                 ; C0220600 000000C4
>	s_buffer_load_dword s23, s[0:3], 0xc8                 ; C02205C0 000000C8
>	s_buffer_load_dword s27, s[0:3], 0xd4                 ; C02206C0 000000D4
>	s_buffer_load_dword s0, s[0:3], 0xd8                  ; C0220000 000000D8
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mad_f32 v6, v4, v7, s26                             ; D1C10006 006A0F04
>	v_mul_f32_e32 v2, v7, v4                              ; 0A040907
>	v_mul_f32_e32 v1, v8, v4                              ; 0A020908
>	v_mad_f32 v7, v4, v8, s27                             ; D1C10007 006E1104
>	v_mul_f32_e32 v0, v9, v4                              ; 0A000909
>	v_mad_f32 v8, v4, v9, s0                              ; D1C10008 00021304
>	v_mul_f32_e32 v9, v6, v6                              ; 0A120D06
>	v_mac_f32_e32 v9, v7, v7                              ; 2C120F07
>	v_mac_f32_e32 v9, v8, v8                              ; 2C121108
>	v_mov_b32_e32 v3, 0                                   ; 7E060280
>	v_mov_b32_e32 v5, 0                                   ; 7E0A0280
>	v_mov_b32_e32 v4, 0                                   ; 7E080280
>	v_cmp_neq_f32_e32 vcc, 0, v9                          ; 7C9A1280
>	s_and_saveexec_b64 s[0:1], vcc                        ; BE80206A
>	s_xor_b64 s[0:1], exec, s[0:1]                        ; 8880007E
>	v_rsq_f32_e32 v4, v9                                  ; 7E084909
>	v_mul_f32_e32 v3, v4, v6                              ; 0A060D04
>	v_mul_f32_e32 v5, v4, v7                              ; 0A0A0F04
>	v_mul_f32_e32 v4, v4, v8                              ; 0A081104
>	s_or_b64 exec, exec, s[0:1]                           ; 87FE007E
>	v_mul_f32_e32 v2, v2, v2                              ; 0A040502
>	v_mac_f32_e32 v2, v1, v1                              ; 2C040301
>	v_mac_f32_e32 v2, v0, v0                              ; 2C040100
>	v_sqrt_f32_e64 v0, |v2|                               ; D1670100 00000102
>	v_subrev_f32_e32 v1, s21, v0                          ; 06020015
>	v_subrev_f32_e32 v0, s22, v0                          ; 06000016
>	v_mul_f32_e32 v3, s25, v3                             ; 0A060619
>	v_mul_f32_e32 v0, s20, v0                             ; 0A000014
>	v_mac_f32_e32 v3, s24, v5                             ; 2C060A18
>	v_mul_f32_e32 v1, s19, v1                             ; 0A020213
>	v_add_f32_e64 v0, 0, v0 clamp                         ; D1018000 00020080
>	v_mul_f32_e32 v5, s13, v0                             ; 0A0A000D
>	v_mac_f32_e32 v3, s23, v4                             ; 2C060817
>	v_add_f32_e64 v1, 0, v1 clamp                         ; D1018001 00020280
>	v_add_f32_e64 v3, 0, v3 clamp                         ; D1018003 00020680
>	v_mul_f32_e32 v4, s14, v1                             ; 0A08020E
>	v_mul_f32_e32 v0, s18, v5                             ; 0A000A12
>	v_mul_f32_e32 v1, s17, v5                             ; 0A020A11
>	v_mul_f32_e32 v2, s16, v5                             ; 0A040A10
>	v_mul_f32_e32 v5, s15, v5                             ; 0A0A0A0F
>	v_mac_f32_e32 v0, s12, v4                             ; 2C00080C
>	v_mac_f32_e32 v1, s11, v4                             ; 2C02080B
>	v_mad_f32 v6, s7, v3, -v3                             ; D1C10006 840E0607
>	v_mac_f32_e32 v2, s8, v4                              ; 2C040808
>	v_mac_f32_e32 v5, s4, v4                              ; 2C0A0804
>	v_mad_f32 v4, s9, v3, -v3                             ; D1C10004 840E0609
>	v_mad_f32 v7, s6, v3, -v3                             ; D1C10007 840E0606
>	v_mad_f32 v3, s5, v3, -v3                             ; D1C10003 840E0605
>	v_mac_f32_e32 v5, v5, v3                              ; 2C0A0705
>	v_mac_f32_e32 v0, v0, v4                              ; 2C000900
>	v_mac_f32_e32 v1, v1, v6                              ; 2C020D01
>	v_mac_f32_e32 v2, v2, v7                              ; 2C040F02
>	v_add_f32_e64 v3, 0, v5 clamp                         ; D1018003 00020A80
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e64 v0, v0, v1 ; D2960000 00020300
>	v_cvt_pkrtz_f16_f32_e64 v1, v2, v3 ; D2960001 00020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; C4001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 96
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 608 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>
>Memory-mapped registers:
>        [1;33mGRBM_STATUS[0m <- ME0PIPE0_CMDFIFO_AVAIL = 8
>                       SRBM_RQ_PENDING = 1
>                       ME0PIPE0_CF_RQ_PENDING = 0
>                       ME0PIPE0_PF_RQ_PENDING = 0
>                       GDS_DMA_RQ_PENDING = 0
>                       DB_CLEAN = 0
>                       CB_CLEAN = 0
>                       TA_BUSY = 0
>                       GDS_BUSY = 0
>                       WD_BUSY_NO_DMA = 0
>                       VGT_BUSY = 0
>                       IA_BUSY_NO_DMA = 0
>                       IA_BUSY = 0
>                       SX_BUSY = 1
>                       WD_BUSY = 0
>                       SPI_BUSY = 1
>                       BCI_BUSY = 0
>                       SC_BUSY = 0
>                       PA_BUSY = 0
>                       DB_BUSY = 1
>                       CP_COHERENCY_BUSY = 0
>                       CP_BUSY = 1
>                       CB_BUSY = 1
>                       GUI_ACTIVE = 1
>        [1;33mGRBM_STATUS2[0m <- ME0PIPE1_CMDFIFO_AVAIL = 8
>                        ME0PIPE1_CF_RQ_PENDING = 0
>                        ME0PIPE1_PF_RQ_PENDING = 0
>                        ME1PIPE0_RQ_PENDING = 0
>                        ME1PIPE1_RQ_PENDING = 0
>                        ME1PIPE2_RQ_PENDING = 0
>                        ME1PIPE3_RQ_PENDING = 0
>                        ME2PIPE0_RQ_PENDING = 0
>                        ME2PIPE1_RQ_PENDING = 0
>                        ME2PIPE2_RQ_PENDING = 0
>                        ME2PIPE3_RQ_PENDING = 0
>                        RLC_RQ_PENDING = 0
>                        RLC_BUSY = 0
>                        TC_BUSY = 0
>                        TCC_CC_RESIDENT = 0
>                        CPF_BUSY = 1
>                        CPC_BUSY = 0
>                        CPG_BUSY = 1
>        [1;33mGRBM_STATUS_SE0[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 0
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 1
>                           SPI_BUSY = 1
>                           SC_BUSY = 0
>                           DB_BUSY = 1
>                           CB_BUSY = 1
>        [1;33mGRBM_STATUS_SE1[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 0
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 0
>                           SPI_BUSY = 0
>                           SC_BUSY = 0
>                           DB_BUSY = 0
>                           CB_BUSY = 0
>        [1;33mGRBM_STATUS_SE2[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 0
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 0
>                           SPI_BUSY = 0
>                           SC_BUSY = 0
>                           DB_BUSY = 0
>                           CB_BUSY = 0
>        [1;33mGRBM_STATUS_SE3[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 0
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 0
>                           SPI_BUSY = 0
>                           SC_BUSY = 0
>                           DB_BUSY = 0
>                           CB_BUSY = 0
>        [1;33mSDMA0_STATUS_REG[0m <- IDLE = 1
>                            REG_IDLE = 1
>                            RB_EMPTY = 1
>                            RB_FULL = 0
>                            RB_CMD_IDLE = 1
>                            RB_CMD_FULL = 0
>                            IB_CMD_IDLE = 1
>                            IB_CMD_FULL = 0
>                            BLOCK_IDLE = 1
>                            INSIDE_IB = 0
>                            EX_IDLE = 1
>                            EX_IDLE_POLL_TIMER_EXPIRE = 1
>                            PACKET_READY = 0
>                            MC_WR_IDLE = 1
>                            SRBM_IDLE = 1
>                            CONTEXT_EMPTY = 1
>                            DELTA_RPTR_FULL = 0
>                            RB_MC_RREQ_IDLE = 1
>                            IB_MC_RREQ_IDLE = 1
>                            MC_RD_IDLE = 1
>                            DELTA_RPTR_EMPTY = 1
>                            MC_RD_RET_STALL = 0
>                            MC_RD_NO_POLL_IDLE = 1
>                            PREV_CMD_IDLE = 1
>                            SEM_IDLE = 1
>                            SEM_REQ_STALL = 0
>                            SEM_RESP_STATE = 0
>                            INT_IDLE = 1
>                            INT_REQ_STALL = 0
>        [1;33mSDMA1_STATUS_REG[0m <- IDLE = 1
>                            REG_IDLE = 1
>                            RB_EMPTY = 1
>                            RB_FULL = 0
>                            RB_CMD_IDLE = 1
>                            RB_CMD_FULL = 0
>                            IB_CMD_IDLE = 1
>                            IB_CMD_FULL = 0
>                            BLOCK_IDLE = 1
>                            INSIDE_IB = 0
>                            EX_IDLE = 1
>                            EX_IDLE_POLL_TIMER_EXPIRE = 1
>                            PACKET_READY = 0
>                            MC_WR_IDLE = 1
>                            SRBM_IDLE = 1
>                            CONTEXT_EMPTY = 1
>                            DELTA_RPTR_FULL = 0
>                            RB_MC_RREQ_IDLE = 1
>                            IB_MC_RREQ_IDLE = 1
>                            MC_RD_IDLE = 1
>                            DELTA_RPTR_EMPTY = 1
>                            MC_RD_RET_STALL = 0
>                            MC_RD_NO_POLL_IDLE = 1
>                            PREV_CMD_IDLE = 1
>                            SEM_IDLE = 1
>                            SEM_REQ_STALL = 0
>                            SEM_RESP_STATE = 0
>                            INT_IDLE = 1
>                            INT_REQ_STALL = 0
>        [1;33mSRBM_STATUS[0m <- UVD_RQ_PENDING = 0
>                       SAMMSP_RQ_PENDING = 0
>                       ACP_RQ_PENDING = 0
>                       SMU_RQ_PENDING = 0
>                       GRBM_RQ_PENDING = 0
>                       HI_RQ_PENDING = 1
>                       VMC_BUSY = 0
>                       MCB_BUSY = 0
>                       MCB_NON_DISPLAY_BUSY = 0
>                       MCC_BUSY = 0
>                       MCD_BUSY = 0
>                       VMC1_BUSY = 0
>                       SEM_BUSY = 0
>                       ACP_BUSY = 0
>                       IH_BUSY = 0
>                       UVD_BUSY = 0
>                       SAMMSP_BUSY = 0
>                       GCATCL2_BUSY = 0
>                       OSATCL2_BUSY = 0
>                       BIF_BUSY = 1
>        [1;33mSRBM_STATUS2[0m <- SDMA_RQ_PENDING = 0
>                        TST_RQ_PENDING = 0
>                        SDMA1_RQ_PENDING = 0
>                        VCE0_RQ_PENDING = 0
>                        VP8_BUSY = 0
>                        SDMA_BUSY = 0
>                        SDMA1_BUSY = 0
>                        VCE0_BUSY = 1
>                        XDMA_BUSY = 0
>                        CHUB_BUSY = 0
>                        SDMA2_BUSY = 0
>                        SDMA3_BUSY = 0
>                        SAMSCP_BUSY = 0
>                        ISP_BUSY = 0
>                        VCE1_BUSY = 0
>                        ODE_BUSY = 0
>                        SDMA2_RQ_PENDING = 0
>                        SDMA3_RQ_PENDING = 0
>                        SAMSCP_RQ_PENDING = 0
>                        ISP_RQ_PENDING = 0
>                        VCE1_RQ_PENDING = 0
>        [1;33mSRBM_STATUS3[0m <- MCC0_BUSY = 0
>                        MCC1_BUSY = 0
>                        MCC2_BUSY = 0
>                        MCC3_BUSY = 0
>                        MCC4_BUSY = 0
>                        MCC5_BUSY = 0
>                        MCC6_BUSY = 0
>                        MCC7_BUSY = 0
>                        MCD0_BUSY = 0
>                        MCD1_BUSY = 0
>                        MCD2_BUSY = 0
>                        MCD3_BUSY = 0
>                        MCD4_BUSY = 0
>                        MCD5_BUSY = 0
>                        MCD6_BUSY = 0
>                        MCD7_BUSY = 0
>        [1;33mCP_STAT[0m <- ROQ_RING_BUSY = 1
>                   ROQ_INDIRECT1_BUSY = 1
>                   ROQ_INDIRECT2_BUSY = 0
>                   ROQ_STATE_BUSY = 0
>                   DC_BUSY = 0
>                   ATCL2IU_BUSY = 0
>                   PFP_BUSY = 1
>                   MEQ_BUSY = 1
>                   ME_BUSY = 1
>                   QUERY_BUSY = 0
>                   SEMAPHORE_BUSY = 0
>                   INTERRUPT_BUSY = 0
>                   SURFACE_SYNC_BUSY = 0
>                   DMA_BUSY = 0
>                   RCIU_BUSY = 0
>                   SCRATCH_RAM_BUSY = 0
>                   CPC_CPG_BUSY = 0
>                   CE_BUSY = 0
>                   TCIU_BUSY = 0
>                   ROQ_CE_RING_BUSY = 0
>                   ROQ_CE_INDIRECT1_BUSY = 0
>                   ROQ_CE_INDIRECT2_BUSY = 0
>                   CP_BUSY = 1
>        [1;33mCP_STALLED_STAT1[0m <- RBIU_TO_DMA_NOT_RDY_TO_RCV = 0
>                            RBIU_TO_SEM_NOT_RDY_TO_RCV = 0
>                            RBIU_TO_MEMWR_NOT_RDY_TO_RCV = 0
>                            ME_HAS_ACTIVE_CE_BUFFER_FLAG = 1
>                            ME_HAS_ACTIVE_DE_BUFFER_FLAG = 1
>                            ME_STALLED_ON_TC_WR_CONFIRM = 0
>                            ME_STALLED_ON_ATOMIC_RTN_DATA = 0
>                            ME_WAITING_ON_TC_READ_DATA = 0
>                            ME_WAITING_ON_REG_READ_DATA = 0
>                            RCIU_WAITING_ON_GDS_FREE = 0
>                            RCIU_WAITING_ON_GRBM_FREE = 0
>                            RCIU_WAITING_ON_VGT_FREE = 0
>                            RCIU_STALLED_ON_ME_READ = 0
>                            RCIU_STALLED_ON_DMA_READ = 0
>                            RCIU_STALLED_ON_APPEND_READ = 0
>                            RCIU_HALTED_BY_REG_VIOLATION = 0
>        [1;33mCP_STALLED_STAT2[0m <- PFP_TO_CSF_NOT_RDY_TO_RCV = 0
>                            PFP_TO_MEQ_NOT_RDY_TO_RCV = 0
>                            PFP_TO_RCIU_NOT_RDY_TO_RCV = 0
>                            PFP_TO_VGT_WRITES_PENDING = 0
>                            PFP_RCIU_READ_PENDING = 0
>                            PFP_WAITING_ON_BUFFER_DATA = 0
>                            ME_WAIT_ON_CE_COUNTER = 0
>                            ME_WAIT_ON_AVAIL_BUFFER = 0
>                            GFX_CNTX_NOT_AVAIL_TO_ME = 0
>                            ME_RCIU_NOT_RDY_TO_RCV = 0
>                            ME_TO_CONST_NOT_RDY_TO_RCV = 0
>                            ME_WAITING_DATA_FROM_PFP = 0
>                            ME_WAITING_ON_PARTIAL_FLUSH = 1
>                            MEQ_TO_ME_NOT_RDY_TO_RCV = 1
>                            STQ_TO_ME_NOT_RDY_TO_RCV = 0
>                            ME_WAITING_DATA_FROM_STQ = 0
>                            PFP_STALLED_ON_TC_WR_CONFIRM = 0
>                            PFP_STALLED_ON_ATOMIC_RTN_DATA = 0
>                            EOPD_FIFO_NEEDS_SC_EOP_DONE = 0
>                            EOPD_FIFO_NEEDS_WR_CONFIRM = 0
>                            STRMO_WR_OF_PRIM_DATA_PENDING = 0
>                            PIPE_STATS_WR_DATA_PENDING = 0
>                            APPEND_RDY_WAIT_ON_CS_DONE = 0
>                            APPEND_RDY_WAIT_ON_PS_DONE = 0
>                            APPEND_WAIT_ON_WR_CONFIRM = 0
>                            APPEND_ACTIVE_PARTITION = 0
>                            APPEND_WAITING_TO_SEND_MEMWRITE = 0
>                            SURF_SYNC_NEEDS_IDLE_CNTXS = 0
>                            SURF_SYNC_NEEDS_ALL_CLEAN = 0
>        [1;33mCP_STALLED_STAT3[0m <- CE_TO_CSF_NOT_RDY_TO_RCV = 0
>                            CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV = 0
>                            CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER = 0
>                            CE_TO_RAM_INIT_NOT_RDY = 0
>                            CE_TO_RAM_DUMP_NOT_RDY = 0
>                            CE_TO_RAM_WRITE_NOT_RDY = 0
>                            CE_TO_INC_FIFO_NOT_RDY_TO_RCV = 0
>                            CE_TO_WR_FIFO_NOT_RDY_TO_RCV = 0
>                            CE_WAITING_ON_BUFFER_DATA = 0
>                            CE_WAITING_ON_CE_BUFFER_FLAG = 0
>                            CE_WAITING_ON_DE_COUNTER = 0
>                            CE_WAITING_ON_DE_COUNTER_UNDERFLOW = 0
>                            TCIU_WAITING_ON_FREE = 0
>                            TCIU_WAITING_ON_TAGS = 0
>                            CE_STALLED_ON_TC_WR_CONFIRM = 0
>                            CE_STALLED_ON_ATOMIC_RTN_DATA = 0
>                            ATCL2IU_WAITING_ON_FREE = 0
>                            ATCL2IU_WAITING_ON_TAGS = 0
>                            ATCL1_WAITING_ON_TRANS = 0
>        [1;33mCP_CPC_STATUS[0m <- MEC1_BUSY = 0
>                         MEC2_BUSY = 0
>                         DC0_BUSY = 0
>                         DC1_BUSY = 0
>                         RCIU1_BUSY = 0
>                         RCIU2_BUSY = 0
>                         ROQ1_BUSY = 0
>                         ROQ2_BUSY = 0
>                         TCIU_BUSY = 0
>                         SCRATCH_RAM_BUSY = 0
>                         QU_BUSY = 0
>                         ATCL2IU_BUSY = 0
>                         CPG_CPC_BUSY = 0
>                         CPF_CPC_BUSY = 0
>                         CPC_BUSY = 0
>        [1;33mCP_CPC_BUSY_STAT[0m <- MEC1_LOAD_BUSY = 0
>                            MEC1_SEMAPOHRE_BUSY = 0
>                            MEC1_MUTEX_BUSY = 0
>                            MEC1_MESSAGE_BUSY = 0
>                            MEC1_EOP_QUEUE_BUSY = 0
>                            MEC1_IQ_QUEUE_BUSY = 0
>                            MEC1_IB_QUEUE_BUSY = 0
>                            MEC1_TC_BUSY = 0
>                            MEC1_DMA_BUSY = 0
>                            MEC1_PARTIAL_FLUSH_BUSY = 0
>                            MEC1_PIPE0_BUSY = 0
>                            MEC1_PIPE1_BUSY = 0
>                            MEC1_PIPE2_BUSY = 0
>                            MEC1_PIPE3_BUSY = 0
>                            MEC2_LOAD_BUSY = 0
>                            MEC2_SEMAPOHRE_BUSY = 0
>                            MEC2_MUTEX_BUSY = 0
>                            MEC2_MESSAGE_BUSY = 0
>                            MEC2_EOP_QUEUE_BUSY = 0
>                            MEC2_IQ_QUEUE_BUSY = 0
>                            MEC2_IB_QUEUE_BUSY = 0
>                            MEC2_TC_BUSY = 0
>                            MEC2_DMA_BUSY = 0
>                            MEC2_PARTIAL_FLUSH_BUSY = 0
>                            MEC2_PIPE0_BUSY = 0
>                            MEC2_PIPE1_BUSY = 0
>                            MEC2_PIPE2_BUSY = 0
>                            MEC2_PIPE3_BUSY = 0
>        [1;33mCP_CPC_STALLED_STAT1[0m <- RCIU_TX_FREE_STALL = 0
>                                RCIU_PRIV_VIOLATION = 0
>                                TCIU_TX_FREE_STALL = 0
>                                MEC1_DECODING_PACKET = 0
>                                MEC1_WAIT_ON_RCIU = 0
>                                MEC1_WAIT_ON_RCIU_READ = 0
>                                MEC1_WAIT_ON_ROQ_DATA = 0
>                                MEC2_DECODING_PACKET = 0
>                                MEC2_WAIT_ON_RCIU = 0
>                                MEC2_WAIT_ON_RCIU_READ = 0
>                                MEC2_WAIT_ON_ROQ_DATA = 0
>                                ATCL2IU_WAITING_ON_FREE = 0
>                                ATCL2IU_WAITING_ON_TAGS = 0
>                                ATCL1_WAITING_ON_TRANS = 0
>        [1;33mCP_CPF_STATUS[0m <- POST_WPTR_GFX_BUSY = 1
>                         CSF_BUSY = 1
>                         ROQ_ALIGN_BUSY = 0
>                         ROQ_RING_BUSY = 1
>                         ROQ_INDIRECT1_BUSY = 1
>                         ROQ_INDIRECT2_BUSY = 0
>                         ROQ_STATE_BUSY = 0
>                         ROQ_CE_RING_BUSY = 0
>                         ROQ_CE_INDIRECT1_BUSY = 0
>                         ROQ_CE_INDIRECT2_BUSY = 0
>                         SEMAPHORE_BUSY = 0
>                         INTERRUPT_BUSY = 0
>                         TCIU_BUSY = 0
>                         HQD_BUSY = 0
>                         PRT_BUSY = 0
>                         ATCL2IU_BUSY = 0
>                         CPF_GFX_BUSY = 1
>                         CPF_CMP_BUSY = 0
>                         GRBM_CPF_STAT_BUSY = 3
>                         CPC_CPF_BUSY = 0
>                         CPF_BUSY = 1
>        [1;33mCP_CPF_BUSY_STAT[0m <- REG_BUS_FIFO_BUSY = 0
>                            CSF_RING_BUSY = 1
>                            CSF_INDIRECT1_BUSY = 1
>                            CSF_INDIRECT2_BUSY = 0
>                            CSF_STATE_BUSY = 0
>                            CSF_CE_INDR1_BUSY = 0
>                            CSF_CE_INDR2_BUSY = 0
>                            CSF_ARBITER_BUSY = 0
>                            CSF_INPUT_BUSY = 0
>                            OUTSTANDING_READ_TAGS = 0
>                            HPD_PROCESSING_EOP_BUSY = 0
>                            HQD_DISPATCH_BUSY = 0
>                            HQD_IQ_TIMER_BUSY = 0
>                            HQD_DMA_OFFLOAD_BUSY = 0
>                            HQD_WAIT_SEMAPHORE_BUSY = 0
>                            HQD_SIGNAL_SEMAPHORE_BUSY = 0
>                            HQD_MESSAGE_BUSY = 0
>                            HQD_PQ_FETCHER_BUSY = 0
>                            HQD_IB_FETCHER_BUSY = 0
>                            HQD_IQ_FETCHER_BUSY = 0
>                            HQD_EOP_FETCHER_BUSY = 0
>                            HQD_CONSUMED_RPTR_BUSY = 0
>                            HQD_FETCHER_ARB_BUSY = 0
>                            HQD_ROQ_ALIGN_BUSY = 0
>                            HQD_ROQ_EOP_BUSY = 0
>                            HQD_ROQ_IQ_BUSY = 0
>                            HQD_ROQ_PQ_BUSY = 0
>                            HQD_ROQ_IB_BUSY = 0
>                            HQD_WPTR_POLL_BUSY = 0
>                            HQD_PQ_BUSY = 0
>                            HQD_IB_BUSY = 0
>        [1;33mCP_CPF_STALLED_STAT1[0m <- RING_FETCHING_DATA = 0
>                                INDR1_FETCHING_DATA = 1
>                                INDR2_FETCHING_DATA = 0
>                                STATE_FETCHING_DATA = 0
>                                TCIU_WAITING_ON_FREE = 0
>                                TCIU_WAITING_ON_TAGS = 0
>                                ATCL2IU_WAITING_ON_FREE = 0
>                                ATCL2IU_WAITING_ON_TAGS = 0
>                                ATCL1_WAITING_ON_TRANS = 0
>
>
>Last 60 lines of dmesg:
>
>[    2.829291] usb 7-2: Manufacturer: Microsoft
>[    2.838279] input: Microsoft Wired Keyboard 600 as /devices/pci0000:00/0000:00:16.0/usb7/7-2/7-2:1.0/0003:045E:0750.0002/input/input17
>[    2.890133] microsoft 0003:045E:0750.0002: input,hidraw1: USB HID v1.11 Keyboard [Microsoft Wired Keyboard 600] on usb-0000:00:16.0-2/input0
>[    2.900237] input: Microsoft Wired Keyboard 600 as /devices/pci0000:00/0000:00:16.0/usb7/7-2/7-2:1.1/0003:045E:0750.0003/input/input18
>[    2.951122] microsoft 0003:045E:0750.0003: input,hidraw2: USB HID v1.11 Device [Microsoft Wired Keyboard 600] on usb-0000:00:16.0-2/input1
>[    3.054131] random: systemd-udevd: uninitialized urandom read (16 bytes read, 108 bits of entropy available)
>[    3.055055] random: systemd-udevd: uninitialized urandom read (16 bytes read, 108 bits of entropy available)
>[    3.055063] random: systemd-udevd: uninitialized urandom read (16 bytes read, 108 bits of entropy available)
>[    3.055072] random: systemd-udevd: uninitialized urandom read (16 bytes read, 108 bits of entropy available)
>[    3.055086] random: systemd-udevd: uninitialized urandom read (16 bytes read, 108 bits of entropy available)
>[    3.055111] random: systemd-udevd: uninitialized urandom read (16 bytes read, 108 bits of entropy available)
>[    3.066431] random: udevadm: uninitialized urandom read (16 bytes read, 109 bits of entropy available)
>[    3.066871] random: udevadm: uninitialized urandom read (16 bytes read, 109 bits of entropy available)
>[    3.070896] random: systemd-udevd: uninitialized urandom read (16 bytes read, 109 bits of entropy available)
>[    3.070914] random: systemd-udevd: uninitialized urandom read (16 bytes read, 109 bits of entropy available)
>[    3.146209] random: nonblocking pool is initialized
>[    3.180269] r8169 0000:06:00.0 enp6s0: renamed from eth0
>[    3.620538] sr 12:0:0:0: [sr0] tag#0 FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE
>[    3.620542] sr 12:0:0:0: [sr0] tag#0 Sense Key : Illegal Request [current] 
>[    3.620545] sr 12:0:0:0: [sr0] tag#0 Add. Sense: Read of scrambled sector without authentication
>[    3.620547] sr 12:0:0:0: [sr0] tag#0 CDB: Read(10) 28 00 00 00 04 00 00 00 02 00
>[    3.620549] blk_update_request: I/O error, dev sr0, sector 4096
>[    3.666523] sr 12:0:0:0: [sr0] tag#0 FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE
>[    3.666527] sr 12:0:0:0: [sr0] tag#0 Sense Key : Illegal Request [current] 
>[    3.666529] sr 12:0:0:0: [sr0] tag#0 Add. Sense: Read of scrambled sector without authentication
>[    3.666531] sr 12:0:0:0: [sr0] tag#0 CDB: Read(10) 28 00 00 00 04 00 00 00 01 00
>[    3.666532] blk_update_request: I/O error, dev sr0, sector 4096
>[    3.666535] Buffer I/O error on dev sr0, logical block 1024, async page read
>[    3.712536] sr 12:0:0:0: [sr0] tag#0 FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE
>[    3.712540] sr 12:0:0:0: [sr0] tag#0 Sense Key : Illegal Request [current] 
>[    3.712542] sr 12:0:0:0: [sr0] tag#0 Add. Sense: Read of scrambled sector without authentication
>[    3.712544] sr 12:0:0:0: [sr0] tag#0 CDB: Read(10) 28 00 00 00 04 01 00 00 01 00
>[    3.712545] blk_update_request: I/O error, dev sr0, sector 4100
>[    3.712547] Buffer I/O error on dev sr0, logical block 1025, async page read
>[    4.818299] EXT4-fs (sda3): re-mounted. Opts: (null)
>[    4.894872] Adding 8388604k swap on /dev/sda2.  Priority:-1 extents:1 across:8388604k SSFS
>[    5.259748] EXT4-fs (sdb): recovery complete
>[    5.277018] EXT4-fs (sdb): mounted filesystem with ordered data mode. Opts: acl
>[    5.387327] EXT4-fs (sdc): recovery complete
>[    5.387331] EXT4-fs (sdc): mounted filesystem with ordered data mode. Opts: acl
>[    6.168899] IPv6: ADDRCONF(NETDEV_UP): enp6s0: link is not ready
>[    6.220334] r8169 0000:06:00.0 enp6s0: link down
>[    6.220343] r8169 0000:06:00.0 enp6s0: link down
>[    6.220370] IPv6: ADDRCONF(NETDEV_UP): enp6s0: link is not ready
>[    7.800645] r8169 0000:06:00.0 enp6s0: link up
>[    7.800654] IPv6: ADDRCONF(NETDEV_CHANGE): enp6s0: link becomes ready
>[    9.123748] CE: hpet increased min_delta_ns to 20115 nsec
>[    9.173748] CE: hpet increased min_delta_ns to 30172 nsec
>[    9.223755] CE: hpet increased min_delta_ns to 45258 nsec
>[   16.774094] CE: hpet increased min_delta_ns to 67887 nsec
>[   17.091304] CE: hpet increased min_delta_ns to 101830 nsec
>[   19.041568] CE: hpet increased min_delta_ns to 152745 nsec
>[   21.006961] elogind[2143]: New seat seat0.
>[   21.006975] elogind[2143]: Failed to save seat data /run/systemd/seats/seat0: No such file or directory
>[   21.007302] elogind[2143]: Watching system buttons on /dev/input/event1 (Power Button)
>[   21.007363] elogind[2143]: Watching system buttons on /dev/input/event0 (Power Button)
>[  177.030674] Steam.exe: sending ioctl 5305 to a partition!
>[  177.112179] CE: hpet increased min_delta_ns to 229117 nsec
>[  227.849529] CE: hpet increased min_delta_ns to 343675 nsec
>[  256.714261] CE: hpet increased min_delta_ns to 515512 nsec

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