Attachment 126821 Details for Bug 97907 – Test only

[patch] Test only

0001-drm-i915-Force-wake-HDA-codec-only-when-it-asleep.patch (text/plain), 1.87 KB, created by Dhinakaran Pandiyan on 2016-09-28 08:25:03 UTC

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Creator: Dhinakaran Pandiyan

Created: 2016-09-28 08:25:03 UTC

Size: 1.87 KB

patch

obsolete

>From 28a7c9aeda6770d627628633fe53c2021343d9ce Mon Sep 17 00:00:00 2001
>From: Carlos Santa <carlos.santa@intel.com>
>Date: Wed, 28 Sep 2016 01:13:19 -0700
>Subject: [PATCH] drm/i915: Force wake HDA codec only when it asleep
>
>The force wake bit in the chicken bits registers needs to be set only when
>the codec is in sleep state. BSpec does not say anything about resetting
>the bit when the codec is not in sleep state, so let's not do that.
>
>This fixes the regression caused by
>
>	3708d5e: drm/i915: start adding dp mst audio
>
>Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
>---
> drivers/gpu/drm/i915/i915_reg.h    | 1 +
> drivers/gpu/drm/i915/intel_audio.c | 7 +------
> 2 files changed, 2 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index 8d44cee..d3d7eaf 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -7376,6 +7376,7 @@ enum {
> #define   AUDIO_ELD_VALID(trans)	((1 << 0) << ((trans) * 4))
> 
> #define HSW_AUD_CHICKENBIT			_MMIO(0x65f10)
>+#define   SKL_AUD_CODEC_SLEEP_STATE		(1 << 14)
> #define   SKL_AUD_CODEC_WAKE_SIGNAL		(1 << 15)
> 
> /* HSW Power Wells */
>diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
>index fb22a2b..2c7d79b 100644
>--- a/drivers/gpu/drm/i915/intel_audio.c
>+++ b/drivers/gpu/drm/i915/intel_audio.c
>@@ -596,12 +596,7 @@ static void i915_audio_component_codec_wake_override(struct device *kdev,
> 	 * internal logic to generate the codec wake to controller.
> 	 */
> 	tmp = I915_READ(HSW_AUD_CHICKENBIT);
>-	tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL;
>-	I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
>-	usleep_range(1000, 1500);
>-
>-	if (enable) {
>-		tmp = I915_READ(HSW_AUD_CHICKENBIT);
>+	if (enable && (tmp & SKL_AUD_CODEC_SLEEP_STATE)) {
> 		tmp |= SKL_AUD_CODEC_WAKE_SIGNAL;
> 		I915_WRITE(HSW_AUD_CHICKENBIT, tmp);
> 		usleep_range(1000, 1500);
>-- 
>2.7.4
>

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