Attachment 128004 Details for Bug 98541 – R600_DEBUG=vs,tcs,tes,gs,ps,cs with hang

R600_DEBUG=vs,tcs,tes,gs,ps,cs with hang

sc.log (text/x-log), 5.37 MB, created by Alexandr Zelinsky on 2016-11-16 13:32:16 UTC

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Creator: Alexandr Zelinsky

Created: 2016-11-16 13:32:16 UTC

Size: 5.37 MB

patch

obsolete

>/media/sdb/steam/SteamApps/common/star conflict/StarConflict: /usr/lib32/libcurl.so.4: no version information available (required by /media/sdb/steam/SteamApps/common/star conflict/StarConflict)
>/media/sdb/steam/SteamApps/common/star conflict/StarConflict: /usr/lib32/libcrypto.so.1.0.0: no version information available (required by /media/sdb/steam/SteamApps/common/star conflict/StarConflict)
>Setting breakpad minidump AppID = 212070
>Steam_SetMinidumpSteamID:  Caching Steam ID:  76561198018029303 [API loaded no]
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], COLOR, COLOR
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>radeonsi: Compiling shader 1
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32, float, float, float, float) #0 {
>main_body:
>  %27 = bitcast float %5 to i32
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %27, 10
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %28, float %23, 11
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %29, float %24, 12
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %30, float %25, 13
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %31, float %26, 14
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %32, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %33
>}
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], COLOR
>DCL CONST[0..3]
>DCL TEMP[0]
>  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
>  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
>  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
>  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
>  4: MOV OUT[1], IN[1]
>  5: END
>radeonsi: Compiling shader 2
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = extractelement <4 x float> %25, i32 1
>  %28 = extractelement <4 x float> %25, i32 2
>  %29 = extractelement <4 x float> %25, i32 3
>  %30 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !invariant.load !0
>  %32 = call float @llvm.SI.load.const(<16 x i8> %31, i32 0)
>  %33 = fmul float %19, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %31, i32 4)
>  %35 = fmul float %19, %34
>  %36 = call float @llvm.SI.load.const(<16 x i8> %31, i32 8)
>  %37 = fmul float %19, %36
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call float @llvm.SI.load.const(<16 x i8> %39, i32 12)
>  %41 = fmul float %19, %40
>  %42 = call float @llvm.SI.load.const(<16 x i8> %39, i32 16)
>  %43 = fmul float %20, %42
>  %44 = fadd float %43, %33
>  %45 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <16 x i8>, <16 x i8> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = call float @llvm.SI.load.const(<16 x i8> %46, i32 20)
>  %48 = fmul float %20, %47
>  %49 = fadd float %48, %35
>  %50 = call float @llvm.SI.load.const(<16 x i8> %46, i32 24)
>  %51 = fmul float %20, %50
>  %52 = fadd float %51, %37
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 28)
>  %56 = fmul float %20, %55
>  %57 = fadd float %56, %41
>  %58 = call float @llvm.SI.load.const(<16 x i8> %54, i32 32)
>  %59 = fmul float %21, %58
>  %60 = fadd float %59, %44
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call float @llvm.SI.load.const(<16 x i8> %62, i32 36)
>  %64 = fmul float %21, %63
>  %65 = fadd float %64, %49
>  %66 = call float @llvm.SI.load.const(<16 x i8> %62, i32 40)
>  %67 = fmul float %21, %66
>  %68 = fadd float %67, %52
>  %69 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %70 = load <16 x i8>, <16 x i8> addrspace(2)* %69, align 16, !invariant.load !0
>  %71 = call float @llvm.SI.load.const(<16 x i8> %70, i32 44)
>  %72 = fmul float %21, %71
>  %73 = fadd float %72, %57
>  %74 = call float @llvm.SI.load.const(<16 x i8> %70, i32 48)
>  %75 = fmul float %22, %74
>  %76 = fadd float %75, %60
>  %77 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %78 = load <16 x i8>, <16 x i8> addrspace(2)* %77, align 16, !invariant.load !0
>  %79 = call float @llvm.SI.load.const(<16 x i8> %78, i32 52)
>  %80 = fmul float %22, %79
>  %81 = fadd float %80, %65
>  %82 = call float @llvm.SI.load.const(<16 x i8> %78, i32 56)
>  %83 = fmul float %22, %82
>  %84 = fadd float %83, %68
>  %85 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %86 = load <16 x i8>, <16 x i8> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = call float @llvm.SI.load.const(<16 x i8> %86, i32 60)
>  %88 = fmul float %22, %87
>  %89 = fadd float %88, %73
>  %90 = and i32 %9, 1
>  %91 = icmp eq i32 %90, 0
>  br i1 %91, label %endif-block, label %if-true-block
>
>if-true-block:                                    ; preds = %main_body
>  %92 = call float @llvm.AMDGPU.clamp.(float %26, float 0.000000e+00, float 1.000000e+00)
>  %93 = call float @llvm.AMDGPU.clamp.(float %27, float 0.000000e+00, float 1.000000e+00)
>  %94 = call float @llvm.AMDGPU.clamp.(float %28, float 0.000000e+00, float 1.000000e+00)
>  %95 = call float @llvm.AMDGPU.clamp.(float %29, float 0.000000e+00, float 1.000000e+00)
>  br label %endif-block
>
>endif-block:                                      ; preds = %main_body, %if-true-block
>  %.03 = phi float [ %95, %if-true-block ], [ %29, %main_body ]
>  %.02 = phi float [ %94, %if-true-block ], [ %28, %main_body ]
>  %.01 = phi float [ %93, %if-true-block ], [ %27, %main_body ]
>  %.0 = phi float [ %92, %if-true-block ], [ %26, %main_body ]
>  %96 = bitcast i32 %12 to float
>  %97 = insertvalue <{ float, float, float }> undef, float %96, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %.0, float %.01, float %.02, float %.03)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %76, float %81, float %84, float %89)
>  ret <{ float, float, float }> %97
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0]
>  0: TEX TEMP[0], IN[0], SAMP[0], 2D
>  1: MOV OUT[0], TEMP[0]
>  2: END
>radeonsi: Compiling shader 3
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <8 x i32>, <8 x i32> addrspace(2)* %23, align 32, !invariant.load !0
>  %25 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %26 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %25, i64 0, i64 3, !amdgpu.uniform !0
>  %27 = load <4 x i32>, <4 x i32> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = extractelement <8 x i32> %24, i32 7
>  %29 = extractelement <4 x i32> %27, i32 0
>  %30 = and i32 %29, %28
>  %31 = insertelement <4 x i32> %27, i32 %30, i32 0
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %12)
>  %33 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %12)
>  %34 = bitcast float %32 to i32
>  %35 = bitcast float %33 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %24, <4 x i32> %31, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = bitcast float %5 to i32
>  %44 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %43, 10
>  %45 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %44, float %39, 11
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %45, float %40, 12
>  %47 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %46, float %41, 13
>  %48 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %47, float %42, 14
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %48, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %49
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], IN[1]
>  2: END
>radeonsi: Compiling shader 4
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = extractelement <4 x float> %25, i32 1
>  %28 = extractelement <4 x float> %25, i32 2
>  %29 = extractelement <4 x float> %25, i32 3
>  %30 = bitcast i32 %12 to float
>  %31 = insertvalue <{ float, float, float }> undef, float %30, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %26, float %27, float %28, float %29)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %19, float %20, float %21, float %22)
>  ret <{ float, float, float }> %31
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>radeonsi: Compiling shader 5
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %43, float %45, 20
>  %47 = add i32 %16, %12
>  %48 = bitcast i32 %47 to float
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %46, float %48, 21
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float }> %49
>}
>
>radeonsi: Compiling shader 6
>Vertex Shader Epilog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs void @vs_epilog() {
>main_body:
>  ret void
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[0:3], s[10:11], 0x0                  ; C0800B00
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                  ; C0820B04
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[0:3], 0 idxen   ; E00C2000 80000604
>	buffer_load_format_xyzw v[10:13], v5, s[4:7], 0 idxen ; E00C2000 80010A05
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	exp 15, 32, 0, 0, 0, v10, v11, v12, v13               ; F800020F 0D0C0B0A
>	exp 15, 12, 0, 1, 0, v6, v7, v8, v9                   ; F80008CF 09080706
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 64 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>radeonsi: Compiling shader 7
>Fragment Shader Epilog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps void @ps_epilog(i64 inreg, i64 inreg, i64 inreg, i64 inreg, i64 inreg, float inreg, float, float, float, float, float, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = call i32 @llvm.SI.packf16(float %6, float %7)
>  %21 = bitcast i32 %20 to float
>  %22 = call i32 @llvm.SI.packf16(float %8, float %9)
>  %23 = bitcast i32 %22 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %21, float %23, float undef, float undef)
>  ret void
>}
>
>; Function Attrs: nounwind readnone
>declare i32 @llvm.SI.packf16(float, float) #1
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #2
>
>attributes #0 = { "InitialPSInputAddr"="16777215" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind }
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v8, 0, 0, [m0]                      ; C8000008
>	v_interp_p2_f32 v0, [v0], v9, 0, 0, [m0]                ; C8010009
>	v_interp_p1_f32 v1, v8, 1, 0, [m0]                      ; C8040108
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	v_interp_p2_f32 v1, [v1], v9, 1, 0, [m0]                ; C8050109
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[0:3], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030000
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 80 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>radeonsi: Compiling shader 8
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %6)
>  %24 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %6)
>  %25 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %6)
>  %26 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %6)
>  %27 = bitcast float %5 to i32
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %27, 10
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %28, float %23, 11
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %29, float %24, 12
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %30, float %25, 13
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %31, float %26, 14
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %32, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %33
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b32 m0, s11                   ; BEFC030B
>	v_interp_mov_f32 v0, P0, 0, 0, [m0] ; C8020002
>	v_interp_mov_f32 v1, P0, 1, 0, [m0] ; C8060102
>	v_interp_mov_f32 v2, P0, 2, 0, [m0] ; C80A0202
>	v_interp_mov_f32 v3, P0, 3, 0, [m0] ; C80E0302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 40 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], LAYER, CONSTANT
>DCL SV[0], POSITION
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL CONST[0..1]
>DCL TEMP[0]
>IMM[0] UINT32 {0, 0, 0, 0}
>  0: F2I TEMP[0].xy, SV[0].xyyy
>  1: UADD TEMP[0].xy, TEMP[0].xyyy, CONST[0].xyyy
>  2: UMAD TEMP[0].x, CONST[0].zzzz, TEMP[0].yyyy, TEMP[0].xxxx
>  3: UMAD TEMP[0].x, CONST[0].wwww, IN[0].xxxx, TEMP[0].xxxx
>  4: MOV TEMP[0].w, IMM[0].xxxx
>  5: TXF TEMP[0], TEMP[0], SAMP[0], BUFFER
>  6: MOV OUT[0], TEMP[0]
>  7: END
>radeonsi: Compiling shader 9
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = fptosi float %15 to i32
>  %24 = fptosi float %16 to i32
>  %25 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, align 16, !invariant.load !0
>  %27 = call float @llvm.SI.load.const(<16 x i8> %26, i32 0)
>  %28 = bitcast float %27 to i32
>  %29 = add i32 %23, %28
>  %30 = call float @llvm.SI.load.const(<16 x i8> %26, i32 4)
>  %31 = bitcast float %30 to i32
>  %32 = add i32 %24, %31
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call float @llvm.SI.load.const(<16 x i8> %34, i32 8)
>  %36 = bitcast float %35 to i32
>  %37 = mul i32 %36, %32
>  %38 = add i32 %37, %29
>  %39 = call float @llvm.SI.load.const(<16 x i8> %34, i32 12)
>  %40 = bitcast float %39 to i32
>  %41 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %6)
>  %42 = bitcast float %41 to i32
>  %43 = mul i32 %40, %42
>  %44 = add i32 %43, %38
>  %45 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to <2 x i128> addrspace(2)*
>  %46 = load <2 x i128>, <2 x i128> addrspace(2)* %45, align 32, !invariant.load !0
>  %47 = extractelement <2 x i128> %46, i32 1
>  %48 = bitcast i128 %47 to <16 x i8>
>  %49 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %48, i32 0, i32 %44)
>  %50 = extractelement <4 x float> %49, i32 0
>  %51 = extractelement <4 x float> %49, i32 1
>  %52 = extractelement <4 x float> %49, i32 2
>  %53 = extractelement <4 x float> %49, i32 3
>  %54 = bitcast float %5 to i32
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %54, 10
>  %56 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %55, float %50, 11
>  %57 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %56, float %51, 12
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %57, float %52, 13
>  %59 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %58, float %53, 14
>  %60 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %59, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %60
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL SV[0], INSTANCEID
>DCL OUT[0], POSITION
>DCL OUT[1], LAYER
>  0: MOV OUT[0], IN[0]
>  1: MOV OUT[1], SV[0]
>  2: END
>radeonsi: Compiling shader 10
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) {
>main_body:
>  %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0
>  %17 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %16, i32 0, i32 %14)
>  %18 = extractelement <4 x float> %17, i32 0
>  %19 = extractelement <4 x float> %17, i32 1
>  %20 = extractelement <4 x float> %17, i32 2
>  %21 = extractelement <4 x float> %17, i32 3
>  %22 = bitcast i32 %13 to float
>  %23 = bitcast i32 %13 to float
>  %24 = bitcast i32 %13 to float
>  %25 = bitcast i32 %13 to float
>  %26 = bitcast i32 %12 to float
>  %27 = insertvalue <{ float, float, float }> undef, float %26, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %22, float %23, float %24, float %25)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 12, i32 0, float %18, float %19, float %20, float %21)
>  call void @llvm.SI.export(i32 4, i32 0, i32 1, i32 13, i32 0, float 0.000000e+00, float 0.000000e+00, float %22, float 0.000000e+00)
>  ret <{ float, float, float }> %27
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>radeonsi: Compiling shader 11
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %43, float %45, 20
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float }> %46
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[0:3], s[10:11], 0x0                ; C0800B00
>	v_mov_b32_e32 v0, 0                                 ; 7E000280
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[4:7], v4, s[0:3], 0 idxen ; E00C2000 80000404
>	exp 15, 32, 0, 0, 0, v3, v3, v3, v3                 ; F800020F 03030303
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	exp 15, 12, 0, 0, 0, v4, v5, v6, v7                 ; F80000CF 07060504
>	exp 4, 13, 0, 1, 0, v0, v0, v3, v0                  ; F80008D4 00030000
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 8
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 60 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>radeonsi: Compiling shader 12
>Fragment Shader Epilog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps void @ps_epilog(i64 inreg, i64 inreg, i64 inreg, i64 inreg, i64 inreg, float inreg, float, float, float, float, float, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %20 = bitcast float %6 to i32
>  %21 = icmp ult i32 %20, 65535
>  %22 = select i1 %21, i32 %20, i32 65535
>  %23 = bitcast float %7 to i32
>  %24 = icmp ult i32 %23, 65535
>  %25 = select i1 %24, i32 %23, i32 65535
>  %26 = bitcast float %8 to i32
>  %27 = icmp ult i32 %26, 65535
>  %28 = select i1 %27, i32 %26, i32 65535
>  %29 = bitcast float %9 to i32
>  %30 = icmp ult i32 %29, 65535
>  %31 = select i1 %30, i32 %29, i32 65535
>  %32 = shl nuw i32 %25, 16
>  %33 = or i32 %22, %32
>  %34 = bitcast i32 %33 to float
>  %35 = shl nuw i32 %31, 16
>  %36 = or i32 %28, %35
>  %37 = bitcast i32 %36 to float
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %34, float %37, float undef, float undef)
>  ret void
>}
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="16777215" }
>attributes #1 = { nounwind }
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x7
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	v_cvt_i32_f32_e32 v0, v13                           ; 7E00110D
>	v_cvt_i32_f32_e32 v1, v12                           ; 7E02110C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_mov_f32 v2, P0, 0, 0, [m0]                 ; C80A0002
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_buffer_load_dword s7, s[0:3], 0x1                 ; C2038101
>	s_buffer_load_dword s8, s[0:3], 0x2                 ; C2040102
>	s_buffer_load_dword s6, s[0:3], 0x0                 ; C2030100
>	s_buffer_load_dword s0, s[0:3], 0x3                 ; C2000103
>	v_mov_b32_e32 v13, v15                              ; 7E1A030F
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_add_i32_e32 v0, vcc, s7, v0                       ; 4A000007
>	v_mul_lo_i32 v0, s8, v0                             ; D2D60000 00020008
>	v_add_i32_e32 v1, vcc, s6, v1                       ; 4A020206
>	v_mul_lo_i32 v2, s0, v2                             ; D2D60002 00020400
>	s_load_dwordx8 s[0:7], s[4:5], 0x0                  ; C0C00500
>	v_add_i32_e32 v0, vcc, v0, v1                       ; 4A000300
>	v_add_i32_e32 v0, vcc, v2, v0                       ; 4A000102
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[0:3], v0, s[4:7], 0 idxen ; E00C2000 80010000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>Shader epilog disassembly:
>	s_mov_b32 s0, 0xffff               ; BE8003FF 0000FFFF
>	v_min_u32_e32 v1, s0, v1           ; 26020200
>	v_min_u32_e32 v0, s0, v0           ; 26000000
>	v_lshlrev_b32_e32 v1, 16, v1       ; 34020290
>	v_min_u32_e32 v3, s0, v3           ; 26060600
>	v_or_b32_e32 v0, v1, v0            ; 38000101
>	v_min_u32_e32 v2, s0, v2           ; 26040400
>	v_lshlrev_b32_e32 v1, 16, v3       ; 34020690
>	v_or_b32_e32 v1, v1, v2            ; 38020501
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd377
>SPI_PS_INPUT_ENA  = 0x0320
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 17
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 152 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xy, GENERIC[1]
>DCL CONST[0..2]
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>  0: MAD TEMP[0].xy, IN[0].xyyy, CONST[2].xyyy, CONST[2].zwww
>  1: MUL TEMP[0].xy, TEMP[0].xyyy, IMM[0].xxxx
>  2: MAD TEMP[0].xy, TEMP[0].xyyy, CONST[0].xyyy, IMM[0].yyyy
>  3: MOV TEMP[1].zw, IMM[0].wwzw
>  4: MOV TEMP[1].x, TEMP[0].xyxx
>  5: MOV TEMP[1].xzw, TEMP[1].xxzw
>  6: MUL TEMP[0].x, TEMP[0].yyyy, CONST[1].zzzz
>  7: MOV TEMP[1].y, TEMP[0].xxxx
>  8: MOV OUT[2].xy, IN[2].xyxx
>  9: MOV OUT[0], TEMP[1]
> 10: MOV OUT[1], IN[1].zyxw
> 11: END
>radeonsi: Compiling shader 13
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %23 = load <16 x i8>, <16 x i8> addrspace(2)* %22, align 16, !invariant.load !0
>  %24 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %23, i32 0, i32 %15)
>  %25 = extractelement <4 x float> %24, i32 0
>  %26 = extractelement <4 x float> %24, i32 1
>  %27 = extractelement <4 x float> %24, i32 2
>  %28 = extractelement <4 x float> %24, i32 3
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %16)
>  %32 = extractelement <4 x float> %31, i32 0
>  %33 = extractelement <4 x float> %31, i32 1
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 32)
>  %37 = call float @llvm.SI.load.const(<16 x i8> %35, i32 40)
>  %38 = fmul float %20, %36
>  %39 = fadd float %38, %37
>  %40 = call float @llvm.SI.load.const(<16 x i8> %35, i32 36)
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 44)
>  %44 = fmul float %21, %40
>  %45 = fadd float %44, %43
>  %46 = fmul float %39, 2.000000e+00
>  %47 = fmul float %45, 2.000000e+00
>  %48 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %49 = load <16 x i8>, <16 x i8> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = call float @llvm.SI.load.const(<16 x i8> %49, i32 0)
>  %51 = fmul float %46, %50
>  %52 = fadd float %51, -1.000000e+00
>  %53 = call float @llvm.SI.load.const(<16 x i8> %49, i32 4)
>  %54 = fmul float %47, %53
>  %55 = fadd float %54, -1.000000e+00
>  %56 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %57 = load <16 x i8>, <16 x i8> addrspace(2)* %56, align 16, !invariant.load !0
>  %58 = call float @llvm.SI.load.const(<16 x i8> %57, i32 24)
>  %59 = fmul float %55, %58
>  %60 = bitcast i32 %12 to float
>  %61 = insertvalue <{ float, float, float }> undef, float %60, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %27, float %26, float %25, float %28)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %32, float %33, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %52, float %59, float 0.000000e+00, float 1.000000e+00)
>  ret <{ float, float, float }> %61
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xy, GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0], TEMP[0], IN[0]
>  3: MOV OUT[0], TEMP[0]
>  4: END
>radeonsi: Compiling shader 14
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = fmul float %39, %43
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %46 = fmul float %40, %45
>  %47 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %48 = fmul float %41, %47
>  %49 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %50 = fmul float %42, %49
>  %51 = bitcast float %5 to i32
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %51, 10
>  %53 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %52, float %44, 11
>  %54 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %53, float %46, 12
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %54, float %48, 13
>  %56 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %55, float %50, 14
>  %57 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %56, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %57
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>radeonsi: Compiling shader 15
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %43, float %45, 20
>  %47 = add i32 %16, %12
>  %48 = bitcast i32 %47 to float
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %46, float %48, 21
>  %50 = add i32 %16, %12
>  %51 = bitcast i32 %50 to float
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %49, float %51, 22
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float }> %52
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 1.0                                  ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xb                    ; C200010B
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v1, s9                                   ; 7E020209
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	v_mov_b32_e32 v5, s0                                   ; 7E0A0200
>	v_mac_f32_e32 v5, s8, v8                               ; 3E0A1008
>	v_mac_f32_e32 v1, s7, v7                               ; 3E020E07
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v1, v1, v1                               ; 06020301
>	exp 15, 33, 0, 0, 0, v3, v4, v0, v0                    ; F800021F 00000403
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mul_f32_e32 v3, s5, v5                               ; 10060A05
>	v_mad_f32 v1, v1, s4, -1.0                             ; D2820001 03CC0901
>	v_mad_f32 v3, v3, s6, -s6                              ; D2820003 80180D03
>	v_mov_b32_e32 v4, 0                                    ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                    ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[5:8], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030500
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                      ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                ; C8110203
>	v_interp_p1_f32 v2, v2, 3, 0, [m0]                      ; C8080302
>	v_interp_p2_f32 v2, [v2], v3, 3, 0, [m0]                ; C8090303
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v4, v4, v7                                ; 10080F04
>	v_mul_f32_e32 v3, v2, v8                                ; 10061102
>	v_mul_f32_e32 v0, v0, v5                                ; 10000B00
>	v_mul_f32_e32 v1, v1, v6                                ; 10020D01
>	v_mov_b32_e32 v2, v4                                    ; 7E040304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 132 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], LINEAR
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, UINT
>DCL TEMP[0]
>  0: TEX TEMP[0], IN[0], SAMP[0], 2D
>  1: MOV OUT[0], TEMP[0]
>  2: END
>radeonsi: Compiling shader 16
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <8 x i32>, <8 x i32> addrspace(2)* %23, align 32, !invariant.load !0
>  %25 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %26 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %25, i64 0, i64 3, !amdgpu.uniform !0
>  %27 = load <4 x i32>, <4 x i32> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = extractelement <8 x i32> %24, i32 7
>  %29 = extractelement <4 x i32> %27, i32 0
>  %30 = and i32 %29, %28
>  %31 = insertelement <4 x i32> %27, i32 %30, i32 0
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %12)
>  %33 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %12)
>  %34 = bitcast float %32 to i32
>  %35 = bitcast float %33 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %24, <4 x i32> %31, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = bitcast float %5 to i32
>  %44 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %43, 10
>  %45 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %44, float %39, 11
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %45, float %40, 12
>  %47 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %46, float %41, 13
>  %48 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %47, float %42, 14
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %48, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %49
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x7
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v8, 0, 0, [m0]                      ; C8000008
>	v_interp_p2_f32 v0, [v0], v9, 0, 0, [m0]                ; C8010009
>	v_interp_p1_f32 v1, v8, 1, 0, [m0]                      ; C8040108
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	v_interp_p2_f32 v1, [v1], v9, 1, 0, [m0]                ; C8050109
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[0:3], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030000
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>Shader epilog disassembly:
>	s_mov_b32 s0, 0xffff               ; BE8003FF 0000FFFF
>	v_min_u32_e32 v1, s0, v1           ; 26020200
>	v_min_u32_e32 v0, s0, v0           ; 26000000
>	v_lshlrev_b32_e32 v1, 16, v1       ; 34020290
>	v_min_u32_e32 v3, s0, v3           ; 26060600
>	v_or_b32_e32 v0, v1, v0            ; 38000101
>	v_min_u32_e32 v2, s0, v2           ; 26040400
>	v_lshlrev_b32_e32 v1, 16, v3       ; 34020690
>	v_or_b32_e32 v1, v1, v2            ; 38020501
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 112 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>radeonsi: Compiling shader 17
>Fragment Shader Epilog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps void @ps_epilog(i64 inreg, i64 inreg, i64 inreg, i64 inreg, i64 inreg, float inreg, float, float, float, float, float, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %6, float %7, float %8, float %9)
>  ret void
>}
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="16777215" }
>attributes #1 = { nounwind }
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x9
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v8, 0, 0, [m0]                      ; C8000008
>	v_interp_p2_f32 v0, [v0], v9, 0, 0, [m0]                ; C8010009
>	v_interp_p1_f32 v1, v8, 1, 0, [m0]                      ; C8040108
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	v_interp_p2_f32 v1, [v1], v9, 1, 0, [m0]                ; C8050109
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[0:3], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030000
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>Shader epilog disassembly:
>	exp 15, 0, 0, 1, 1, v0, v1, v2, v3 ; F800180F 03020100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 72 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
>DCL IN[0], GENERIC[0], CONSTANT
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>radeonsi: Compiling shader 18
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %6)
>  %24 = call float @llvm.SI.fs.constant(i32 1, i32 0, i32 %6)
>  %25 = call float @llvm.SI.fs.constant(i32 2, i32 0, i32 %6)
>  %26 = call float @llvm.SI.fs.constant(i32 3, i32 0, i32 %6)
>  %27 = bitcast float %5 to i32
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %27, 10
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %28, float %23, 11
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %29, float %24, 12
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %30, float %25, 13
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %31, float %26, 14
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %32, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %33
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.constant(i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>radeonsi: Compiling shader 19
>Fragment Shader Epilog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps void @ps_epilog(i64 inreg, i64 inreg, i64 inreg, i64 inreg, i64 inreg, float inreg, float, float, float, float, float, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 1, i32 1, i32 1, i32 0, i32 0, float %6, float undef, float undef, float undef)
>  ret void
>}
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="16777215" }
>attributes #1 = { nounwind }
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x1
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b32 m0, s11                   ; BEFC030B
>	v_interp_mov_f32 v0, P0, 0, 0, [m0] ; C8020002
>	v_interp_mov_f32 v1, P0, 1, 0, [m0] ; C8060102
>	v_interp_mov_f32 v2, P0, 2, 0, [m0] ; C80A0202
>	v_interp_mov_f32 v3, P0, 3, 0, [m0] ; C80E0302
>Shader epilog disassembly:
>	exp 1, 0, 0, 1, 1, v0, v0, v0, v0 ; F8001801 00000000
>	s_endpgm                          ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 32 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 1.0                                  ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xb                    ; C200010B
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v1, s9                                   ; 7E020209
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	v_mov_b32_e32 v5, s0                                   ; 7E0A0200
>	v_mac_f32_e32 v5, s8, v8                               ; 3E0A1008
>	v_mac_f32_e32 v1, s7, v7                               ; 3E020E07
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v1, v1, v1                               ; 06020301
>	exp 15, 33, 0, 0, 0, v3, v4, v0, v0                    ; F800021F 00000403
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mul_f32_e32 v3, s5, v5                               ; 10060A05
>	v_mad_f32 v1, v1, s4, -1.0                             ; D2820001 03CC0901
>	v_mad_f32 v3, v3, s6, -s6                              ; D2820003 80180D03
>	v_mov_b32_e32 v4, 0                                    ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                    ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[5:8], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030500
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                      ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                ; C8110203
>	v_interp_p1_f32 v2, v2, 3, 0, [m0]                      ; C8080302
>	v_interp_p2_f32 v2, [v2], v3, 3, 0, [m0]                ; C8090303
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v4, v4, v7                                ; 10080F04
>	v_mul_f32_e32 v3, v2, v8                                ; 10061102
>	v_mul_f32_e32 v0, v0, v5                                ; 10000B00
>	v_mul_f32_e32 v1, v1, v6                                ; 10020D01
>	v_mov_b32_e32 v2, v4                                    ; 7E040304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 132 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xy, GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL CONST[1]
>DCL TEMP[0..1], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].xw, TEMP[0], SAMP[0], 2D
>  2: LRP TEMP[1].xyz, TEMP[0].xxxx, CONST[1].xyzz, IN[0].xyzz
>  3: MUL TEMP[0].x, TEMP[0].wwww, IN[0].wwww
>  4: MOV TEMP[1].w, TEMP[0].xxxx
>  5: MOV OUT[0], TEMP[1]
>  6: END
>radeonsi: Compiling shader 20
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 3
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 16)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %45 = fsub float 1.000000e+00, %39
>  %46 = fmul float %43, %39
>  %47 = fmul float %44, %45
>  %48 = fadd float %46, %47
>  %49 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %50 = load <16 x i8>, <16 x i8> addrspace(2)* %49, align 16, !invariant.load !0
>  %51 = call float @llvm.SI.load.const(<16 x i8> %50, i32 20)
>  %52 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %53 = fsub float 1.000000e+00, %39
>  %54 = fmul float %51, %39
>  %55 = fmul float %52, %53
>  %56 = fadd float %54, %55
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 24)
>  %60 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %61 = fsub float 1.000000e+00, %39
>  %62 = fmul float %59, %39
>  %63 = fmul float %60, %61
>  %64 = fadd float %62, %63
>  %65 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %66 = fmul float %40, %65
>  %67 = bitcast float %5 to i32
>  %68 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %67, 10
>  %69 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %68, float %48, 11
>  %70 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %69, float %56, 12
>  %71 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %70, float %64, 13
>  %72 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %71, float %66, 14
>  %73 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %72, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %73
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 1.0                                  ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xb                    ; C200010B
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v1, s9                                   ; 7E020209
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	v_mov_b32_e32 v5, s0                                   ; 7E0A0200
>	v_mac_f32_e32 v5, s8, v8                               ; 3E0A1008
>	v_mac_f32_e32 v1, s7, v7                               ; 3E020E07
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v1, v1, v1                               ; 06020301
>	exp 15, 33, 0, 0, 0, v3, v4, v0, v0                    ; F800021F 00000403
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mul_f32_e32 v3, s5, v5                               ; 10060A05
>	v_mad_f32 v1, v1, s4, -1.0                             ; D2820001 03CC0901
>	v_mad_f32 v3, v3, s6, -s6                              ; D2820003 80180D03
>	v_mov_b32_e32 v4, 0                                    ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                    ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                  ; BE80047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                      ; C082050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s4, s4, s19                                   ; 87041304
>	s_and_b64 exec, exec, s[0:1]                            ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	image_sample v[5:6], v[0:1], s[12:19], s[4:7] dmask:0x9 ; F0800900 00230500
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x4                     ; C2020104
>	s_buffer_load_dword s5, s[0:3], 0x5                     ; C2028105
>	s_buffer_load_dword s0, s[0:3], 0x6                     ; C2000106
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                      ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                ; C8110203
>	v_interp_p1_f32 v2, v2, 3, 0, [m0]                      ; C8080302
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mad_f32 v4, -v5, v4, v4                               ; D2820004 24120905
>	v_mad_f32 v0, -v5, v0, v0                               ; D2820000 24020105
>	v_mad_f32 v1, -v5, v1, v1                               ; D2820001 24060305
>	v_interp_p2_f32 v2, [v2], v3, 3, 0, [m0]                ; C8090303
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s0, v5                                ; 3E080A00
>	v_mul_f32_e32 v3, v2, v6                                ; 10060D02
>	v_mac_f32_e32 v0, s4, v5                                ; 3E000A04
>	v_mac_f32_e32 v1, s5, v5                                ; 3E020A05
>	v_mov_b32_e32 v2, v4                                    ; 7E040304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 180 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	v_cvt_i32_f32_e32 v0, v13                           ; 7E00110D
>	v_cvt_i32_f32_e32 v1, v12                           ; 7E02110C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_mov_f32 v2, P0, 0, 0, [m0]                 ; C80A0002
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_buffer_load_dword s7, s[0:3], 0x1                 ; C2038101
>	s_buffer_load_dword s8, s[0:3], 0x2                 ; C2040102
>	s_buffer_load_dword s6, s[0:3], 0x0                 ; C2030100
>	s_buffer_load_dword s0, s[0:3], 0x3                 ; C2000103
>	v_mov_b32_e32 v13, v15                              ; 7E1A030F
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_add_i32_e32 v0, vcc, s7, v0                       ; 4A000007
>	v_mul_lo_i32 v0, s8, v0                             ; D2D60000 00020008
>	v_add_i32_e32 v1, vcc, s6, v1                       ; 4A020206
>	v_mul_lo_i32 v2, s0, v2                             ; D2D60002 00020400
>	s_load_dwordx8 s[0:7], s[4:5], 0x0                  ; C0C00500
>	v_add_i32_e32 v0, vcc, v0, v1                       ; 4A000300
>	v_add_i32_e32 v0, vcc, v2, v0                       ; 4A000102
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[0:3], v0, s[4:7], 0 idxen ; E00C2000 80010000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd377
>SPI_PS_INPUT_ENA  = 0x0320
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 17
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 120 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x9
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	v_cvt_i32_f32_e32 v0, v13                           ; 7E00110D
>	v_cvt_i32_f32_e32 v1, v12                           ; 7E02110C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_mov_f32 v2, P0, 0, 0, [m0]                 ; C80A0002
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_buffer_load_dword s7, s[0:3], 0x1                 ; C2038101
>	s_buffer_load_dword s8, s[0:3], 0x2                 ; C2040102
>	s_buffer_load_dword s6, s[0:3], 0x0                 ; C2030100
>	s_buffer_load_dword s0, s[0:3], 0x3                 ; C2000103
>	v_mov_b32_e32 v13, v15                              ; 7E1A030F
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_add_i32_e32 v0, vcc, s7, v0                       ; 4A000007
>	v_mul_lo_i32 v0, s8, v0                             ; D2D60000 00020008
>	v_add_i32_e32 v1, vcc, s6, v1                       ; 4A020206
>	v_mul_lo_i32 v2, s0, v2                             ; D2D60002 00020400
>	s_load_dwordx8 s[0:7], s[4:5], 0x0                  ; C0C00500
>	v_add_i32_e32 v0, vcc, v0, v1                       ; 4A000300
>	v_add_i32_e32 v0, vcc, v2, v0                       ; 4A000102
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[0:3], v0, s[4:7], 0 idxen ; E00C2000 80010000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>Shader epilog disassembly:
>	exp 15, 0, 0, 1, 1, v0, v1, v2, v3 ; F800180F 03020100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd377
>SPI_PS_INPUT_ENA  = 0x0320
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 17
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 112 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b32 m0, s11                   ; BEFC030B
>	v_interp_mov_f32 v0, P0, 0, 0, [m0] ; C8020002
>	v_interp_mov_f32 v1, P0, 1, 0, [m0] ; C8060102
>	v_interp_mov_f32 v2, P0, 2, 0, [m0] ; C80A0202
>	v_interp_mov_f32 v3, P0, 3, 0, [m0] ; C80E0302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 40 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV TEMP[1].xyw, TEMP[0].xyxw
>  5: MAX TEMP[0].x, IMM[0].xxxx, TEMP[0].zzzz
>  6: MOV TEMP[1].z, TEMP[0].xxxx
>  7: MOV OUT[0], TEMP[1]
>  8: END
>radeonsi: Compiling shader 21
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) {
>main_body:
>  %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0
>  %17 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %16, i32 0, i32 %14)
>  %18 = extractelement <4 x float> %17, i32 0
>  %19 = extractelement <4 x float> %17, i32 1
>  %20 = extractelement <4 x float> %17, i32 2
>  %21 = extractelement <4 x float> %17, i32 3
>  %22 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %23 = load <16 x i8>, <16 x i8> addrspace(2)* %22, align 16, !invariant.load !0
>  %24 = call float @llvm.SI.load.const(<16 x i8> %23, i32 0)
>  %25 = fmul float %24, %18
>  %26 = call float @llvm.SI.load.const(<16 x i8> %23, i32 4)
>  %27 = fmul float %26, %18
>  %28 = call float @llvm.SI.load.const(<16 x i8> %23, i32 8)
>  %29 = fmul float %28, %18
>  %30 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !invariant.load !0
>  %32 = call float @llvm.SI.load.const(<16 x i8> %31, i32 12)
>  %33 = fmul float %32, %18
>  %34 = call float @llvm.SI.load.const(<16 x i8> %31, i32 16)
>  %35 = fmul float %34, %19
>  %36 = fadd float %35, %25
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 20)
>  %40 = fmul float %39, %19
>  %41 = fadd float %40, %27
>  %42 = call float @llvm.SI.load.const(<16 x i8> %38, i32 24)
>  %43 = fmul float %42, %19
>  %44 = fadd float %43, %29
>  %45 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <16 x i8>, <16 x i8> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = call float @llvm.SI.load.const(<16 x i8> %46, i32 28)
>  %48 = fmul float %47, %19
>  %49 = fadd float %48, %33
>  %50 = call float @llvm.SI.load.const(<16 x i8> %46, i32 32)
>  %51 = fmul float %50, %20
>  %52 = fadd float %51, %36
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 36)
>  %56 = fmul float %55, %20
>  %57 = fadd float %56, %41
>  %58 = call float @llvm.SI.load.const(<16 x i8> %54, i32 40)
>  %59 = fmul float %58, %20
>  %60 = fadd float %59, %44
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call float @llvm.SI.load.const(<16 x i8> %62, i32 44)
>  %64 = fmul float %63, %20
>  %65 = fadd float %64, %49
>  %66 = call float @llvm.SI.load.const(<16 x i8> %62, i32 48)
>  %67 = fmul float %66, %21
>  %68 = fadd float %67, %52
>  %69 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %70 = load <16 x i8>, <16 x i8> addrspace(2)* %69, align 16, !invariant.load !0
>  %71 = call float @llvm.SI.load.const(<16 x i8> %70, i32 52)
>  %72 = fmul float %71, %21
>  %73 = fadd float %72, %57
>  %74 = call float @llvm.SI.load.const(<16 x i8> %70, i32 56)
>  %75 = fmul float %74, %21
>  %76 = fadd float %75, %60
>  %77 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %78 = load <16 x i8>, <16 x i8> addrspace(2)* %77, align 16, !invariant.load !0
>  %79 = call float @llvm.SI.load.const(<16 x i8> %78, i32 60)
>  %80 = fmul float %79, %21
>  %81 = fadd float %80, %65
>  %82 = call float @llvm.maxnum.f32(float %76, float 0.000000e+00)
>  %83 = bitcast i32 %12 to float
>  %84 = insertvalue <{ float, float, float }> undef, float %83, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %68, float %73, float %82, float %81)
>  ret <{ float, float, float }> %84
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL OUT[0], COLOR
>IMM[0] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV OUT[0], IMM[0].xxxx
>  1: END
>radeonsi: Compiling shader 22
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = bitcast float %5 to i32
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %23, 10
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %24, float 0.000000e+00, 11
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %25, float 0.000000e+00, 12
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %26, float 0.000000e+00, 13
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %27, float 0.000000e+00, 14
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %28, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %29
>}
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s6, s[0:3], 0x2                 ; C2030102
>	s_buffer_load_dword s4, s[0:3], 0x0                 ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                 ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x3                 ; C2038103
>	s_buffer_load_dword s10, s[0:3], 0x6                ; C2050106
>	s_buffer_load_dword s8, s[0:3], 0x4                 ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                 ; C2048105
>	s_buffer_load_dword s11, s[0:3], 0x7                ; C2058107
>	s_buffer_load_dword s14, s[0:3], 0xa                ; C207010A
>	s_buffer_load_dword s12, s[0:3], 0x8                ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                ; C2068109
>	s_buffer_load_dword s15, s[0:3], 0xb                ; C207810B
>	s_buffer_load_dword s18, s[0:3], 0xe                ; C209010E
>	s_buffer_load_dword s16, s[0:3], 0xc                ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                ; C208810D
>	s_buffer_load_dword s0, s[0:3], 0xf                 ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                       ; BF8C0070
>	v_mul_f32_e32 v7, s6, v3                            ; 100E0606
>	v_mul_f32_e32 v0, s4, v3                            ; 10000604
>	v_mul_f32_e32 v1, s5, v3                            ; 10020605
>	v_mul_f32_e32 v3, s7, v3                            ; 10060607
>	v_mac_f32_e32 v7, s10, v4                           ; 3E0E080A
>	v_mac_f32_e32 v0, s8, v4                            ; 3E000808
>	v_mac_f32_e32 v1, s9, v4                            ; 3E020809
>	v_mac_f32_e32 v3, s11, v4                           ; 3E06080B
>	v_mac_f32_e32 v7, s14, v5                           ; 3E0E0A0E
>	v_mac_f32_e32 v0, s12, v5                           ; 3E000A0C
>	v_mac_f32_e32 v1, s13, v5                           ; 3E020A0D
>	v_mac_f32_e32 v3, s15, v5                           ; 3E060A0F
>	v_mac_f32_e32 v7, s18, v6                           ; 3E0E0C12
>	v_mac_f32_e32 v0, s16, v6                           ; 3E000C10
>	v_mac_f32_e32 v1, s17, v6                           ; 3E020C11
>	v_mac_f32_e32 v3, s0, v6                            ; 3E060C00
>	v_max_f32_e32 v4, 0, v7                             ; 20080E80
>	exp 15, 12, 0, 1, 0, v0, v1, v4, v3                 ; F80008CF 03040100
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 8
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 176 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s6, s[0:3], 0x2                 ; C2030102
>	s_buffer_load_dword s4, s[0:3], 0x0                 ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                 ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x3                 ; C2038103
>	s_buffer_load_dword s10, s[0:3], 0x6                ; C2050106
>	s_buffer_load_dword s8, s[0:3], 0x4                 ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                 ; C2048105
>	s_buffer_load_dword s11, s[0:3], 0x7                ; C2058107
>	s_buffer_load_dword s14, s[0:3], 0xa                ; C207010A
>	s_buffer_load_dword s12, s[0:3], 0x8                ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                ; C2068109
>	s_buffer_load_dword s15, s[0:3], 0xb                ; C207810B
>	s_buffer_load_dword s18, s[0:3], 0xe                ; C209010E
>	s_buffer_load_dword s16, s[0:3], 0xc                ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                ; C208810D
>	s_buffer_load_dword s0, s[0:3], 0xf                 ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                       ; BF8C0070
>	v_mul_f32_e32 v7, s6, v3                            ; 100E0606
>	v_mul_f32_e32 v0, s4, v3                            ; 10000604
>	v_mul_f32_e32 v1, s5, v3                            ; 10020605
>	v_mul_f32_e32 v3, s7, v3                            ; 10060607
>	v_mac_f32_e32 v7, s10, v4                           ; 3E0E080A
>	v_mac_f32_e32 v0, s8, v4                            ; 3E000808
>	v_mac_f32_e32 v1, s9, v4                            ; 3E020809
>	v_mac_f32_e32 v3, s11, v4                           ; 3E06080B
>	v_mac_f32_e32 v7, s14, v5                           ; 3E0E0A0E
>	v_mac_f32_e32 v0, s12, v5                           ; 3E000A0C
>	v_mac_f32_e32 v1, s13, v5                           ; 3E020A0D
>	v_mac_f32_e32 v3, s15, v5                           ; 3E060A0F
>	v_mac_f32_e32 v7, s18, v6                           ; 3E0E0C12
>	v_mac_f32_e32 v0, s16, v6                           ; 3E000C10
>	v_mac_f32_e32 v1, s17, v6                           ; 3E020C11
>	v_mac_f32_e32 v3, s0, v6                            ; 3E060C00
>	v_max_f32_e32 v4, 0, v7                             ; 20080E80
>	exp 15, 12, 0, 1, 0, v0, v1, v4, v3                 ; F80008CF 03040100
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 8
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 176 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL CONST[0..224]
>DCL TEMP[0..7], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>  0: F2I TEMP[0], IN[2]
>  1: MOV TEMP[1].xyz, IMM[0].xxxx
>  2: MOV TEMP[1].w, CONST[4].xxxx
>  3: MOV TEMP[2].xyz, IMM[0].xxxx
>  4: MOV TEMP[2].w, CONST[4].yyyy
>  5: MOV TEMP[3].xyz, IMM[0].xxxx
>  6: MOV TEMP[3].w, CONST[4].zzzz
>  7: NOT TEMP[4].x, CONST[221].xxxx
>  8: UIF TEMP[4].xxxx :0
>  9:   ADD TEMP[4], CONST[5], -TEMP[1]
> 10:   ADD TEMP[5], CONST[6], -TEMP[2]
> 11:   ADD TEMP[6], CONST[7], -TEMP[3]
> 12: ELSE :0
> 13:   NOT TEMP[7].x, CONST[222].xxxx
> 14:   UIF TEMP[7].xxxx :0
> 15:     UMUL TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx
> 16:     UARL ADDR[0].x, TEMP[7].xxxx
> 17:     UARL ADDR[0].x, TEMP[7].xxxx
> 18:     ADD TEMP[4], CONST[ADDR[0].x+5], -TEMP[1]
> 19:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 20:     UARL ADDR[0].x, TEMP[7].xxxx
> 21:     UARL ADDR[0].x, TEMP[7].xxxx
> 22:     ADD TEMP[5], CONST[ADDR[0].x+5], -TEMP[2]
> 23:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 24:     UARL ADDR[0].x, TEMP[7].xxxx
> 25:     UARL ADDR[0].x, TEMP[7].xxxx
> 26:     ADD TEMP[6], CONST[ADDR[0].x+5], -TEMP[3]
> 27:   ELSE :0
> 28:     UMUL TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx
> 29:     UARL ADDR[0].x, TEMP[7].xxxx
> 30:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[1]
> 31:     MUL TEMP[4], TEMP[7], IN[1].xxxx
> 32:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 33:     UARL ADDR[0].x, TEMP[7].xxxx
> 34:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[2]
> 35:     MUL TEMP[5], TEMP[7], IN[1].xxxx
> 36:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 37:     UARL ADDR[0].x, TEMP[7].xxxx
> 38:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[3]
> 39:     MUL TEMP[6], TEMP[7], IN[1].xxxx
> 40:     UMUL TEMP[7].x, TEMP[0].yyyy, IMM[1].xxxx
> 41:     UARL ADDR[0].x, TEMP[7].xxxx
> 42:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[1]
> 43:     MAD TEMP[4], TEMP[7], IN[1].yyyy, TEMP[4]
> 44:     UMAD TEMP[7].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 45:     UARL ADDR[0].x, TEMP[7].xxxx
> 46:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[2]
> 47:     MAD TEMP[5], TEMP[7], IN[1].yyyy, TEMP[5]
> 48:     UMAD TEMP[7].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 49:     UARL ADDR[0].x, TEMP[7].xxxx
> 50:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[3]
> 51:     MAD TEMP[6], TEMP[7], IN[1].yyyy, TEMP[6]
> 52:     UIF CONST[223].xxxx :0
> 53:       UMUL TEMP[7].x, TEMP[0].zzzz, IMM[1].xxxx
> 54:       UARL ADDR[0].x, TEMP[7].xxxx
> 55:       ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[1]
> 56:       MAD TEMP[4], TEMP[7], IN[1].zzzz, TEMP[4]
> 57:       UMAD TEMP[7].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 58:       UARL ADDR[0].x, TEMP[7].xxxx
> 59:       ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[2]
> 60:       MAD TEMP[5], TEMP[7], IN[1].zzzz, TEMP[5]
> 61:       UMAD TEMP[7].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 62:       UARL ADDR[0].x, TEMP[7].xxxx
> 63:       ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[3]
> 64:       MAD TEMP[6], TEMP[7], IN[1].zzzz, TEMP[6]
> 65:     ENDIF
> 66:     UIF CONST[224].xxxx :0
> 67:       UMUL TEMP[7].x, TEMP[0].wwww, IMM[1].xxxx
> 68:       UARL ADDR[0].x, TEMP[7].xxxx
> 69:       ADD TEMP[1], CONST[ADDR[0].x+5], -TEMP[1]
> 70:       MAD TEMP[4], TEMP[1], IN[1].wwww, TEMP[4]
> 71:       UMAD TEMP[1].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 72:       UARL ADDR[0].x, TEMP[1].xxxx
> 73:       ADD TEMP[1], CONST[ADDR[0].x+5], -TEMP[2]
> 74:       MAD TEMP[5], TEMP[1], IN[1].wwww, TEMP[5]
> 75:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 76:       UARL ADDR[0].x, TEMP[0].xxxx
> 77:       ADD TEMP[0], CONST[ADDR[0].x+5], -TEMP[3]
> 78:       MAD TEMP[6], TEMP[0], IN[1].wwww, TEMP[6]
> 79:     ENDIF
> 80:   ENDIF
> 81: ENDIF
> 82: DP4 TEMP[0].x, IN[0], TEMP[4]
> 83: DP4 TEMP[1].x, IN[0], TEMP[5]
> 84: MOV TEMP[0].y, TEMP[1].xxxx
> 85: DP4 TEMP[1].x, IN[0], TEMP[6]
> 86: MOV TEMP[0].z, TEMP[1].xxxx
> 87: DP4 TEMP[1].x, IN[0], IMM[0].xxxy
> 88: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 89: MUL TEMP[2], CONST[0], TEMP[0].xxxx
> 90: MAD TEMP[2], CONST[1], TEMP[0].yyyy, TEMP[2]
> 91: MAD TEMP[0], CONST[2], TEMP[0].zzzz, TEMP[2]
> 92: MAD TEMP[0], CONST[3], TEMP[1].xxxx, TEMP[0]
> 93: MOV TEMP[1].xyw, TEMP[0].xyxw
> 94: MAX TEMP[0].x, IMM[0].xxxx, TEMP[0].zzzz
> 95: MOV TEMP[1].z, TEMP[0].xxxx
> 96: MOV OUT[0], TEMP[1]
> 97: END
>radeonsi: Compiling shader 23
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 0
>  %28 = extractelement <4 x float> %26, i32 1
>  %29 = extractelement <4 x float> %26, i32 2
>  %30 = extractelement <4 x float> %26, i32 3
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = fptosi float %34 to i32
>  %39 = fptosi float %35 to i32
>  %40 = fptosi float %36 to i32
>  %41 = fptosi float %37 to i32
>  %42 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <16 x i8>, <16 x i8> addrspace(2)* %42, align 16, !invariant.load !0
>  %44 = call float @llvm.SI.load.const(<16 x i8> %43, i32 64)
>  %45 = call float @llvm.SI.load.const(<16 x i8> %43, i32 68)
>  %46 = call float @llvm.SI.load.const(<16 x i8> %43, i32 72)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %43, i32 3536)
>  %48 = bitcast float %47 to i32
>  %49 = icmp eq i32 %48, -1
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  br i1 %49, label %else12, label %if8
>
>if8:                                              ; preds = %main_body
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 80)
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 84)
>  %56 = call float @llvm.SI.load.const(<16 x i8> %54, i32 88)
>  %57 = call float @llvm.SI.load.const(<16 x i8> %54, i32 92)
>  %58 = fsub float %57, %44
>  %59 = call float @llvm.SI.load.const(<16 x i8> %54, i32 96)
>  %60 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %61 = load <16 x i8>, <16 x i8> addrspace(2)* %60, align 16, !invariant.load !0
>  %62 = call float @llvm.SI.load.const(<16 x i8> %61, i32 100)
>  %63 = call float @llvm.SI.load.const(<16 x i8> %61, i32 104)
>  %64 = call float @llvm.SI.load.const(<16 x i8> %61, i32 108)
>  %65 = fsub float %64, %45
>  %66 = call float @llvm.SI.load.const(<16 x i8> %61, i32 112)
>  %67 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %68 = load <16 x i8>, <16 x i8> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = call float @llvm.SI.load.const(<16 x i8> %68, i32 116)
>  %70 = call float @llvm.SI.load.const(<16 x i8> %68, i32 120)
>  %71 = call float @llvm.SI.load.const(<16 x i8> %68, i32 124)
>  %72 = fsub float %71, %46
>  br label %endif81
>
>else12:                                           ; preds = %main_body
>  %73 = call float @llvm.SI.load.const(<16 x i8> %51, i32 3552)
>  %74 = bitcast float %73 to i32
>  %75 = icmp eq i32 %74, -1
>  %76 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %77 = load <16 x i8>, <16 x i8> addrspace(2)* %76, align 16, !invariant.load !0
>  %78 = mul i32 %38, 48
>  %79 = add i32 %78, 80
>  %80 = call float @llvm.SI.load.const(<16 x i8> %77, i32 %79)
>  %81 = mul i32 %38, 48
>  %82 = add i32 %81, 84
>  %83 = call float @llvm.SI.load.const(<16 x i8> %77, i32 %82)
>  %84 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %85 = load <16 x i8>, <16 x i8> addrspace(2)* %84, align 16, !invariant.load !0
>  %86 = mul i32 %38, 48
>  %87 = add i32 %86, 88
>  %88 = call float @llvm.SI.load.const(<16 x i8> %85, i32 %87)
>  %89 = mul i32 %38, 48
>  %90 = add i32 %89, 92
>  %91 = call float @llvm.SI.load.const(<16 x i8> %85, i32 %90)
>  %92 = fsub float %91, %44
>  br i1 %75, label %else27, label %if14
>
>if14:                                             ; preds = %else12
>  %93 = mul i32 %38, 3
>  %94 = add i32 %93, 1
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = shl i32 %94, 4
>  %98 = add i32 %97, 80
>  %99 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %98)
>  %100 = shl i32 %94, 4
>  %101 = add i32 %100, 84
>  %102 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %101)
>  %103 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %104 = load <16 x i8>, <16 x i8> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = shl i32 %94, 4
>  %106 = add i32 %105, 88
>  %107 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %106)
>  %108 = shl i32 %94, 4
>  %109 = add i32 %108, 92
>  %110 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %109)
>  %111 = fsub float %110, %45
>  %112 = mul i32 %38, 3
>  %113 = add i32 %112, 2
>  %114 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %115 = load <16 x i8>, <16 x i8> addrspace(2)* %114, align 16, !invariant.load !0
>  %116 = shl i32 %113, 4
>  %117 = add i32 %116, 80
>  %118 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %117)
>  %119 = shl i32 %113, 4
>  %120 = add i32 %119, 84
>  %121 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %120)
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = shl i32 %113, 4
>  %125 = add i32 %124, 88
>  %126 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %125)
>  %127 = shl i32 %113, 4
>  %128 = add i32 %127, 92
>  %129 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %128)
>  %130 = fsub float %129, %46
>  br label %endif81
>
>else27:                                           ; preds = %else12
>  %131 = fmul float %80, %27
>  %132 = fmul float %83, %27
>  %133 = fmul float %88, %27
>  %134 = fmul float %92, %27
>  %135 = mul i32 %38, 3
>  %136 = add i32 %135, 1
>  %137 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %138 = load <16 x i8>, <16 x i8> addrspace(2)* %137, align 16, !invariant.load !0
>  %139 = shl i32 %136, 4
>  %140 = add i32 %139, 80
>  %141 = call float @llvm.SI.load.const(<16 x i8> %138, i32 %140)
>  %142 = shl i32 %136, 4
>  %143 = add i32 %142, 84
>  %144 = call float @llvm.SI.load.const(<16 x i8> %138, i32 %143)
>  %145 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %146 = load <16 x i8>, <16 x i8> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = shl i32 %136, 4
>  %148 = add i32 %147, 88
>  %149 = call float @llvm.SI.load.const(<16 x i8> %146, i32 %148)
>  %150 = shl i32 %136, 4
>  %151 = add i32 %150, 92
>  %152 = call float @llvm.SI.load.const(<16 x i8> %146, i32 %151)
>  %153 = fsub float %152, %45
>  %154 = fmul float %141, %27
>  %155 = fmul float %144, %27
>  %156 = fmul float %149, %27
>  %157 = fmul float %153, %27
>  %158 = mul i32 %38, 3
>  %159 = add i32 %158, 2
>  %160 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %161 = load <16 x i8>, <16 x i8> addrspace(2)* %160, align 16, !invariant.load !0
>  %162 = shl i32 %159, 4
>  %163 = add i32 %162, 80
>  %164 = call float @llvm.SI.load.const(<16 x i8> %161, i32 %163)
>  %165 = shl i32 %159, 4
>  %166 = add i32 %165, 84
>  %167 = call float @llvm.SI.load.const(<16 x i8> %161, i32 %166)
>  %168 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %169 = load <16 x i8>, <16 x i8> addrspace(2)* %168, align 16, !invariant.load !0
>  %170 = shl i32 %159, 4
>  %171 = add i32 %170, 88
>  %172 = call float @llvm.SI.load.const(<16 x i8> %169, i32 %171)
>  %173 = shl i32 %159, 4
>  %174 = add i32 %173, 92
>  %175 = call float @llvm.SI.load.const(<16 x i8> %169, i32 %174)
>  %176 = fsub float %175, %46
>  %177 = fmul float %164, %27
>  %178 = fmul float %167, %27
>  %179 = fmul float %172, %27
>  %180 = fmul float %176, %27
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = mul i32 %39, 48
>  %184 = add i32 %183, 80
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %184)
>  %186 = mul i32 %39, 48
>  %187 = add i32 %186, 84
>  %188 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %187)
>  %189 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %190 = load <16 x i8>, <16 x i8> addrspace(2)* %189, align 16, !invariant.load !0
>  %191 = mul i32 %39, 48
>  %192 = add i32 %191, 88
>  %193 = call float @llvm.SI.load.const(<16 x i8> %190, i32 %192)
>  %194 = mul i32 %39, 48
>  %195 = add i32 %194, 92
>  %196 = call float @llvm.SI.load.const(<16 x i8> %190, i32 %195)
>  %197 = fsub float %196, %44
>  %198 = fmul float %185, %28
>  %199 = fadd float %198, %131
>  %200 = fmul float %188, %28
>  %201 = fadd float %200, %132
>  %202 = fmul float %193, %28
>  %203 = fadd float %202, %133
>  %204 = fmul float %197, %28
>  %205 = fadd float %204, %134
>  %206 = mul i32 %39, 3
>  %207 = add i32 %206, 1
>  %208 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %209 = load <16 x i8>, <16 x i8> addrspace(2)* %208, align 16, !invariant.load !0
>  %210 = shl i32 %207, 4
>  %211 = add i32 %210, 80
>  %212 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %211)
>  %213 = shl i32 %207, 4
>  %214 = add i32 %213, 84
>  %215 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %214)
>  %216 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %217 = load <16 x i8>, <16 x i8> addrspace(2)* %216, align 16, !invariant.load !0
>  %218 = shl i32 %207, 4
>  %219 = add i32 %218, 88
>  %220 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %219)
>  %221 = shl i32 %207, 4
>  %222 = add i32 %221, 92
>  %223 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %222)
>  %224 = fsub float %223, %45
>  %225 = fmul float %212, %28
>  %226 = fadd float %225, %154
>  %227 = fmul float %215, %28
>  %228 = fadd float %227, %155
>  %229 = fmul float %220, %28
>  %230 = fadd float %229, %156
>  %231 = fmul float %224, %28
>  %232 = fadd float %231, %157
>  %233 = mul i32 %39, 3
>  %234 = add i32 %233, 2
>  %235 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %236 = load <16 x i8>, <16 x i8> addrspace(2)* %235, align 16, !invariant.load !0
>  %237 = shl i32 %234, 4
>  %238 = add i32 %237, 80
>  %239 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %238)
>  %240 = shl i32 %234, 4
>  %241 = add i32 %240, 84
>  %242 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %241)
>  %243 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %244 = load <16 x i8>, <16 x i8> addrspace(2)* %243, align 16, !invariant.load !0
>  %245 = shl i32 %234, 4
>  %246 = add i32 %245, 88
>  %247 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %246)
>  %248 = shl i32 %234, 4
>  %249 = add i32 %248, 92
>  %250 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %249)
>  %251 = fsub float %250, %46
>  %252 = fmul float %239, %28
>  %253 = fadd float %252, %177
>  %254 = fmul float %242, %28
>  %255 = fadd float %254, %178
>  %256 = fmul float %247, %28
>  %257 = fadd float %256, %179
>  %258 = fmul float %251, %28
>  %259 = fadd float %258, %180
>  %260 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %261 = load <16 x i8>, <16 x i8> addrspace(2)* %260, align 16, !invariant.load !0
>  %262 = call float @llvm.SI.load.const(<16 x i8> %261, i32 3568)
>  %263 = bitcast float %262 to i32
>  %264 = icmp eq i32 %263, 0
>  br i1 %264, label %endif65, label %if52
>
>if52:                                             ; preds = %else27
>  %265 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %266 = load <16 x i8>, <16 x i8> addrspace(2)* %265, align 16, !invariant.load !0
>  %267 = mul i32 %40, 48
>  %268 = add i32 %267, 80
>  %269 = call float @llvm.SI.load.const(<16 x i8> %266, i32 %268)
>  %270 = mul i32 %40, 48
>  %271 = add i32 %270, 84
>  %272 = call float @llvm.SI.load.const(<16 x i8> %266, i32 %271)
>  %273 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %274 = load <16 x i8>, <16 x i8> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = mul i32 %40, 48
>  %276 = add i32 %275, 88
>  %277 = call float @llvm.SI.load.const(<16 x i8> %274, i32 %276)
>  %278 = mul i32 %40, 48
>  %279 = add i32 %278, 92
>  %280 = call float @llvm.SI.load.const(<16 x i8> %274, i32 %279)
>  %281 = fsub float %280, %44
>  %282 = fmul float %269, %29
>  %283 = fadd float %282, %199
>  %284 = fmul float %272, %29
>  %285 = fadd float %284, %201
>  %286 = fmul float %277, %29
>  %287 = fadd float %286, %203
>  %288 = fmul float %281, %29
>  %289 = fadd float %288, %205
>  %290 = mul i32 %40, 3
>  %291 = add i32 %290, 1
>  %292 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %293 = load <16 x i8>, <16 x i8> addrspace(2)* %292, align 16, !invariant.load !0
>  %294 = shl i32 %291, 4
>  %295 = add i32 %294, 80
>  %296 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %295)
>  %297 = shl i32 %291, 4
>  %298 = add i32 %297, 84
>  %299 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %298)
>  %300 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %301 = load <16 x i8>, <16 x i8> addrspace(2)* %300, align 16, !invariant.load !0
>  %302 = shl i32 %291, 4
>  %303 = add i32 %302, 88
>  %304 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %303)
>  %305 = shl i32 %291, 4
>  %306 = add i32 %305, 92
>  %307 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %306)
>  %308 = fsub float %307, %45
>  %309 = fmul float %296, %29
>  %310 = fadd float %309, %226
>  %311 = fmul float %299, %29
>  %312 = fadd float %311, %228
>  %313 = fmul float %304, %29
>  %314 = fadd float %313, %230
>  %315 = fmul float %308, %29
>  %316 = fadd float %315, %232
>  %317 = mul i32 %40, 3
>  %318 = add i32 %317, 2
>  %319 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %320 = load <16 x i8>, <16 x i8> addrspace(2)* %319, align 16, !invariant.load !0
>  %321 = shl i32 %318, 4
>  %322 = add i32 %321, 80
>  %323 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %322)
>  %324 = shl i32 %318, 4
>  %325 = add i32 %324, 84
>  %326 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %325)
>  %327 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %328 = load <16 x i8>, <16 x i8> addrspace(2)* %327, align 16, !invariant.load !0
>  %329 = shl i32 %318, 4
>  %330 = add i32 %329, 88
>  %331 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %330)
>  %332 = shl i32 %318, 4
>  %333 = add i32 %332, 92
>  %334 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %333)
>  %335 = fsub float %334, %46
>  %336 = fmul float %323, %29
>  %337 = fadd float %336, %253
>  %338 = fmul float %326, %29
>  %339 = fadd float %338, %255
>  %340 = fmul float %331, %29
>  %341 = fadd float %340, %257
>  %342 = fmul float %335, %29
>  %343 = fadd float %342, %259
>  br label %endif65
>
>endif65:                                          ; preds = %else27, %if52
>  %.0101 = phi float [ %283, %if52 ], [ %199, %else27 ]
>  %.097 = phi float [ %285, %if52 ], [ %201, %else27 ]
>  %.093 = phi float [ %287, %if52 ], [ %203, %else27 ]
>  %.089 = phi float [ %289, %if52 ], [ %205, %else27 ]
>  %.085 = phi float [ %310, %if52 ], [ %226, %else27 ]
>  %.081 = phi float [ %312, %if52 ], [ %228, %else27 ]
>  %.077 = phi float [ %314, %if52 ], [ %230, %else27 ]
>  %.073 = phi float [ %316, %if52 ], [ %232, %else27 ]
>  %.069 = phi float [ %337, %if52 ], [ %253, %else27 ]
>  %.065 = phi float [ %339, %if52 ], [ %255, %else27 ]
>  %.061 = phi float [ %341, %if52 ], [ %257, %else27 ]
>  %.0 = phi float [ %343, %if52 ], [ %259, %else27 ]
>  %344 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %345 = load <16 x i8>, <16 x i8> addrspace(2)* %344, align 16, !invariant.load !0
>  %346 = call float @llvm.SI.load.const(<16 x i8> %345, i32 3584)
>  %347 = bitcast float %346 to i32
>  %348 = icmp eq i32 %347, 0
>  br i1 %348, label %endif81, label %if66
>
>if66:                                             ; preds = %endif65
>  %349 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %350 = load <16 x i8>, <16 x i8> addrspace(2)* %349, align 16, !invariant.load !0
>  %351 = mul i32 %41, 48
>  %352 = add i32 %351, 80
>  %353 = call float @llvm.SI.load.const(<16 x i8> %350, i32 %352)
>  %354 = mul i32 %41, 48
>  %355 = add i32 %354, 84
>  %356 = call float @llvm.SI.load.const(<16 x i8> %350, i32 %355)
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = mul i32 %41, 48
>  %360 = add i32 %359, 88
>  %361 = call float @llvm.SI.load.const(<16 x i8> %358, i32 %360)
>  %362 = mul i32 %41, 48
>  %363 = add i32 %362, 92
>  %364 = call float @llvm.SI.load.const(<16 x i8> %358, i32 %363)
>  %365 = fsub float %364, %44
>  %366 = fmul float %353, %30
>  %367 = fadd float %366, %.0101
>  %368 = fmul float %356, %30
>  %369 = fadd float %368, %.097
>  %370 = fmul float %361, %30
>  %371 = fadd float %370, %.093
>  %372 = fmul float %365, %30
>  %373 = fadd float %372, %.089
>  %374 = mul i32 %41, 3
>  %375 = add i32 %374, 1
>  %376 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %377 = load <16 x i8>, <16 x i8> addrspace(2)* %376, align 16, !invariant.load !0
>  %378 = shl i32 %375, 4
>  %379 = add i32 %378, 80
>  %380 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %379)
>  %381 = shl i32 %375, 4
>  %382 = add i32 %381, 84
>  %383 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %382)
>  %384 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %385 = load <16 x i8>, <16 x i8> addrspace(2)* %384, align 16, !invariant.load !0
>  %386 = shl i32 %375, 4
>  %387 = add i32 %386, 88
>  %388 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %387)
>  %389 = shl i32 %375, 4
>  %390 = add i32 %389, 92
>  %391 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %390)
>  %392 = fsub float %391, %45
>  %393 = fmul float %380, %30
>  %394 = fadd float %393, %.085
>  %395 = fmul float %383, %30
>  %396 = fadd float %395, %.081
>  %397 = fmul float %388, %30
>  %398 = fadd float %397, %.077
>  %399 = fmul float %392, %30
>  %400 = fadd float %399, %.073
>  %401 = mul i32 %41, 3
>  %402 = add i32 %401, 2
>  %403 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %404 = load <16 x i8>, <16 x i8> addrspace(2)* %403, align 16, !invariant.load !0
>  %405 = shl i32 %402, 4
>  %406 = add i32 %405, 80
>  %407 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %406)
>  %408 = shl i32 %402, 4
>  %409 = add i32 %408, 84
>  %410 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %409)
>  %411 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %412 = load <16 x i8>, <16 x i8> addrspace(2)* %411, align 16, !invariant.load !0
>  %413 = shl i32 %402, 4
>  %414 = add i32 %413, 88
>  %415 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %414)
>  %416 = shl i32 %402, 4
>  %417 = add i32 %416, 92
>  %418 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %417)
>  %419 = fsub float %418, %46
>  %420 = fmul float %407, %30
>  %421 = fadd float %420, %.069
>  %422 = fmul float %410, %30
>  %423 = fadd float %422, %.065
>  %424 = fmul float %415, %30
>  %425 = fadd float %424, %.061
>  %426 = fmul float %419, %30
>  %427 = fadd float %426, %.0
>  br label %endif81
>
>endif81:                                          ; preds = %endif65, %if14, %if66, %if8
>  %.3104 = phi float [ %52, %if8 ], [ %80, %if14 ], [ %367, %if66 ], [ %.0101, %endif65 ]
>  %.3100 = phi float [ %55, %if8 ], [ %83, %if14 ], [ %369, %if66 ], [ %.097, %endif65 ]
>  %.396 = phi float [ %56, %if8 ], [ %88, %if14 ], [ %371, %if66 ], [ %.093, %endif65 ]
>  %.392 = phi float [ %58, %if8 ], [ %92, %if14 ], [ %373, %if66 ], [ %.089, %endif65 ]
>  %.388 = phi float [ %59, %if8 ], [ %99, %if14 ], [ %394, %if66 ], [ %.085, %endif65 ]
>  %.384 = phi float [ %62, %if8 ], [ %102, %if14 ], [ %396, %if66 ], [ %.081, %endif65 ]
>  %.380 = phi float [ %63, %if8 ], [ %107, %if14 ], [ %398, %if66 ], [ %.077, %endif65 ]
>  %.376 = phi float [ %65, %if8 ], [ %111, %if14 ], [ %400, %if66 ], [ %.073, %endif65 ]
>  %.372 = phi float [ %66, %if8 ], [ %118, %if14 ], [ %421, %if66 ], [ %.069, %endif65 ]
>  %.368 = phi float [ %69, %if8 ], [ %121, %if14 ], [ %423, %if66 ], [ %.065, %endif65 ]
>  %.364 = phi float [ %70, %if8 ], [ %126, %if14 ], [ %425, %if66 ], [ %.061, %endif65 ]
>  %.3 = phi float [ %72, %if8 ], [ %130, %if14 ], [ %427, %if66 ], [ %.0, %endif65 ]
>  %428 = fmul float %20, %.3104
>  %429 = fmul float %21, %.3100
>  %430 = fadd float %428, %429
>  %431 = fmul float %22, %.396
>  %432 = fadd float %430, %431
>  %433 = fmul float %23, %.392
>  %434 = fadd float %432, %433
>  %435 = fmul float %20, %.388
>  %436 = fmul float %21, %.384
>  %437 = fadd float %435, %436
>  %438 = fmul float %22, %.380
>  %439 = fadd float %437, %438
>  %440 = fmul float %23, %.376
>  %441 = fadd float %439, %440
>  %442 = fmul float %20, %.372
>  %443 = fmul float %21, %.368
>  %444 = fadd float %442, %443
>  %445 = fmul float %22, %.364
>  %446 = fadd float %444, %445
>  %447 = fmul float %23, %.3
>  %448 = fadd float %446, %447
>  %449 = fmul float %20, 0.000000e+00
>  %450 = fmul float %21, 0.000000e+00
>  %451 = fadd float %449, %450
>  %452 = fmul float %22, 0.000000e+00
>  %453 = fadd float %451, %452
>  %454 = fadd float %453, %23
>  %455 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %456 = load <16 x i8>, <16 x i8> addrspace(2)* %455, align 16, !invariant.load !0
>  %457 = call float @llvm.SI.load.const(<16 x i8> %456, i32 64)
>  %458 = fadd float %434, %457
>  %459 = call float @llvm.SI.load.const(<16 x i8> %456, i32 68)
>  %460 = fadd float %441, %459
>  %461 = call float @llvm.SI.load.const(<16 x i8> %456, i32 72)
>  %462 = fadd float %448, %461
>  %463 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %464 = load <16 x i8>, <16 x i8> addrspace(2)* %463, align 16, !invariant.load !0
>  %465 = call float @llvm.SI.load.const(<16 x i8> %464, i32 0)
>  %466 = fmul float %465, %458
>  %467 = call float @llvm.SI.load.const(<16 x i8> %464, i32 4)
>  %468 = fmul float %467, %458
>  %469 = call float @llvm.SI.load.const(<16 x i8> %464, i32 8)
>  %470 = fmul float %469, %458
>  %471 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %472 = load <16 x i8>, <16 x i8> addrspace(2)* %471, align 16, !invariant.load !0
>  %473 = call float @llvm.SI.load.const(<16 x i8> %472, i32 12)
>  %474 = fmul float %473, %458
>  %475 = call float @llvm.SI.load.const(<16 x i8> %472, i32 16)
>  %476 = fmul float %475, %460
>  %477 = fadd float %476, %466
>  %478 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %479 = load <16 x i8>, <16 x i8> addrspace(2)* %478, align 16, !invariant.load !0
>  %480 = call float @llvm.SI.load.const(<16 x i8> %479, i32 20)
>  %481 = fmul float %480, %460
>  %482 = fadd float %481, %468
>  %483 = call float @llvm.SI.load.const(<16 x i8> %479, i32 24)
>  %484 = fmul float %483, %460
>  %485 = fadd float %484, %470
>  %486 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %487 = load <16 x i8>, <16 x i8> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = call float @llvm.SI.load.const(<16 x i8> %487, i32 28)
>  %489 = fmul float %488, %460
>  %490 = fadd float %489, %474
>  %491 = call float @llvm.SI.load.const(<16 x i8> %487, i32 32)
>  %492 = fmul float %491, %462
>  %493 = fadd float %492, %477
>  %494 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %495 = load <16 x i8>, <16 x i8> addrspace(2)* %494, align 16, !invariant.load !0
>  %496 = call float @llvm.SI.load.const(<16 x i8> %495, i32 36)
>  %497 = fmul float %496, %462
>  %498 = fadd float %497, %482
>  %499 = call float @llvm.SI.load.const(<16 x i8> %495, i32 40)
>  %500 = fmul float %499, %462
>  %501 = fadd float %500, %485
>  %502 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %503 = load <16 x i8>, <16 x i8> addrspace(2)* %502, align 16, !invariant.load !0
>  %504 = call float @llvm.SI.load.const(<16 x i8> %503, i32 44)
>  %505 = fmul float %504, %462
>  %506 = fadd float %505, %490
>  %507 = call float @llvm.SI.load.const(<16 x i8> %503, i32 48)
>  %508 = fmul float %507, %454
>  %509 = fadd float %508, %493
>  %510 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %511 = load <16 x i8>, <16 x i8> addrspace(2)* %510, align 16, !invariant.load !0
>  %512 = call float @llvm.SI.load.const(<16 x i8> %511, i32 52)
>  %513 = fmul float %512, %454
>  %514 = fadd float %513, %498
>  %515 = call float @llvm.SI.load.const(<16 x i8> %511, i32 56)
>  %516 = fmul float %515, %454
>  %517 = fadd float %516, %501
>  %518 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %519 = load <16 x i8>, <16 x i8> addrspace(2)* %518, align 16, !invariant.load !0
>  %520 = call float @llvm.SI.load.const(<16 x i8> %519, i32 60)
>  %521 = fmul float %520, %454
>  %522 = fadd float %521, %506
>  %523 = call float @llvm.maxnum.f32(float %517, float 0.000000e+00)
>  %524 = bitcast i32 %12 to float
>  %525 = insertvalue <{ float, float, float }> undef, float %524, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %509, float %514, float %523, float %522)
>  ret <{ float, float, float }> %525
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen  ; E00C2000 80010704
>	s_buffer_load_dword s4, s[0:3], 0x10                  ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                  ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                  ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x374                 ; C20380FF 00000374
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v0, s4                                  ; 7E000204
>	v_mov_b32_e32 v1, s5                                  ; 7E020205
>	v_mov_b32_e32 v3, s6                                  ; 7E060206
>	s_cmp_eq_u32 s7, -1                                   ; BF06C107
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                  ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x14                  ; C2020114
>	s_buffer_load_dword s5, s[0:3], 0x15                  ; C2028115
>	s_buffer_load_dword s6, s[0:3], 0x16                  ; C2030116
>	s_buffer_load_dword s7, s[0:3], 0x17                  ; C2038117
>	s_buffer_load_dword s8, s[0:3], 0x18                  ; C2040118
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v6, s4                                  ; 7E0C0204
>	v_mov_b32_e32 v12, s5                                 ; 7E180205
>	s_buffer_load_dword s4, s[0:3], 0x19                  ; C2020119
>	s_buffer_load_dword s5, s[0:3], 0x1a                  ; C202811A
>	v_mov_b32_e32 v4, s6                                  ; 7E080206
>	v_sub_f32_e32 v11, s7, v0                             ; 08160007
>	v_mov_b32_e32 v5, s8                                  ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x1b                  ; C203011B
>	s_buffer_load_dword s7, s[0:3], 0x1c                  ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                  ; C204011D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v14, s4                                 ; 7E1C0204
>	v_mov_b32_e32 v13, s5                                 ; 7E1A0205
>	s_buffer_load_dword s4, s[0:3], 0x1e                  ; C202011E
>	s_buffer_load_dword s5, s[0:3], 0x1f                  ; C202811F
>	v_sub_f32_e32 v15, s6, v1                             ; 081E0206
>	v_mov_b32_e32 v16, s7                                 ; 7E200207
>	v_mov_b32_e32 v17, s8                                 ; 7E220208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v18, s4                                 ; 7E240204
>	v_sub_f32_e32 v19, s5, v3                             ; 08260605
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                  ; C0820B08
>	s_movk_i32 s12, 0x54                                  ; B00C0054
>	s_movk_i32 s15, 0x5c                                  ; B00F005C
>	s_movk_i32 s14, 0x50                                  ; B00E0050
>	s_movk_i32 s13, 0x58                                  ; B00D0058
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[4:7], 0 idxen ; E00C2000 80011806
>	s_buffer_load_dword s4, s[0:3], 0x378                 ; C20200FF 00000378
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                   ; BF06C104
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                             ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                              ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s12, v15                      ; 4A161E0C
>	v_add_i32_e32 v14, vcc, s15, v15                      ; 4A1C1E0F
>	v_add_i32_e32 v4, vcc, s14, v15                       ; 4A081E0E
>	buffer_load_dword v12, v11, s[0:3], 0 offen           ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen           ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s13, v15                      ; 4A1A1E0D
>	buffer_load_dword v6, v4, s[0:3], 0 offen             ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen            ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                         ; 0A161700
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                  ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                     ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                     ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                     ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                      ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                     ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                     ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen           ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen           ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                     ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                     ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen           ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen           ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                         ; 0A1E2701
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                         ; 0A262903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                  ; C0820B04
>	s_movk_i32 s11, 0x6c                                  ; B00B006C
>	s_movk_i32 s10, 0x60                                  ; B00A0060
>	s_movk_i32 s9, 0x64                                   ; B0090064
>	s_movk_i32 s8, 0x68                                   ; B0080068
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[4:7], 0 idxen ; E00C2000 80011405
>	v_cvt_i32_f32_e32 v5, v25                             ; 7E0A1119
>	s_movk_i32 s4, 0x7c                                   ; B004007C
>	v_add_i32_e32 v17, vcc, s4, v15                       ; 4A221E04
>	s_movk_i32 s6, 0x74                                   ; B0060074
>	v_mul_lo_i32 v24, v5, 48                              ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s11, v15                       ; 4A0A1E0B
>	s_movk_i32 s7, 0x70                                   ; B0070070
>	s_movk_i32 s5, 0x78                                   ; B0050078
>	v_add_i32_e32 v13, vcc, s10, v15                      ; 4A1A1E0A
>	v_add_i32_e32 v14, vcc, s9, v15                       ; 4A1C1E09
>	v_add_i32_e32 v16, vcc, s8, v15                       ; 4A201E08
>	v_add_i32_e32 v19, vcc, s6, v15                       ; 4A261E06
>	buffer_load_dword v18, v5, s[0:3], 0 offen            ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s7, v15                        ; 4A0A1E07
>	v_add_i32_e32 v15, vcc, s5, v15                       ; 4A1E1E05
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen           ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen           ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen            ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen           ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                    ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                             ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                           ; 10181914
>	v_mul_f32_e32 v4, v20, v4                             ; 10080914
>	v_mul_f32_e32 v11, v20, v11                           ; 10161714
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                         ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                           ; 101E1F14
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                         ; 0A3A2303
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                           ; 101C1D14
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                           ; 10243914
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                            ; 100A1B14
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                           ; 101A2114
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                           ; 10222714
>	v_mul_f32_e32 v16, v20, v25                           ; 10203314
>	v_mul_f32_e32 v19, v20, v29                           ; 10263B14
>	v_add_i32_e32 v20, vcc, s15, v24                      ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                         ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                           ; 3E162915
>	v_add_i32_e32 v20, vcc, s11, v24                      ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                         ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                           ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s14, v24                      ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                            ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s12, v24                      ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_buffer_load_dword s12, s[0:3], 0x37c                ; C20600FF 0000037C
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                   ; BF06800C
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                           ; 3E182915
>	v_add_i32_e32 v20, vcc, s13, v24                      ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                            ; 3E082915
>	v_add_i32_e32 v20, vcc, s10, v24                      ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                            ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s9, v24                       ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                           ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s8, v24                       ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                           ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s7, v24                       ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                           ; 3E202915
>	v_add_i32_e32 v20, vcc, s6, v24                       ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                           ; 3E222915
>	v_add_i32_e32 v20, vcc, s5, v24                       ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                           ; 3E242915
>	v_add_i32_e32 v20, vcc, s4, v24                       ; 4A283004
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                           ; 3E262915
>	s_cbranch_scc1 BB0_6                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                            ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                            ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                           ; 3E162B16
>	v_add_i32_e32 v21, vcc, s11, v20                      ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                           ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                           ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                            ; 3E082B16
>	v_add_i32_e32 v21, vcc, s10, v20                      ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                            ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s9, v20                       ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                           ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s8, v20                       ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                           ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s7, v20                       ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                           ; 3E202B16
>	v_add_i32_e32 v21, vcc, s6, v20                       ; 4A2A2806
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                           ; 3E222B16
>	v_add_i32_e32 v21, vcc, s5, v20                       ; 4A2A2805
>	v_add_i32_e32 v20, vcc, s4, v20                       ; 4A282804
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                           ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                           ; 3E262916
>	s_buffer_load_dword s4, s[0:3], 0x380                 ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                    ; BF068004
>	s_cbranch_scc1 BB0_8                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                            ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                            ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                           ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                     ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                           ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                           ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                            ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                     ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                            ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                     ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                           ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                     ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                           ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                     ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                           ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                     ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                           ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                     ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                     ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                           ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                           ; 3E262917
>	v_mul_f32_e32 v12, v12, v8                            ; 1018110C
>	v_mac_f32_e32 v12, v6, v7                             ; 3E180F06
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	v_mac_f32_e32 v12, v4, v9                             ; 3E181304
>	v_mul_f32_e32 v4, v14, v8                             ; 1008110E
>	s_buffer_load_dword s5, s[0:3], 0x1                   ; C2028101
>	s_buffer_load_dword s8, s[0:3], 0x4                   ; C2040104
>	v_mac_f32_e32 v4, v5, v7                              ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                             ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                   ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                   ; C2038103
>	v_mac_f32_e32 v4, v13, v9                             ; 3E08130D
>	v_mac_f32_e32 v5, v16, v7                             ; 3E0A0F10
>	v_mac_f32_e32 v12, v11, v10                           ; 3E18150B
>	v_mac_f32_e32 v5, v18, v9                             ; 3E0A1312
>	v_mac_f32_e32 v4, v15, v10                            ; 3E08150F
>	v_add_f32_e32 v0, v0, v12                             ; 06001900
>	v_mac_f32_e32 v5, v19, v10                            ; 3E0A1513
>	v_add_f32_e32 v1, v1, v4                              ; 06020901
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                              ; 10080004
>	s_buffer_load_dword s4, s[0:3], 0x5                   ; C2020105
>	v_mul_f32_e32 v6, 0, v8                               ; 100C1080
>	v_add_f32_e32 v3, v3, v5                              ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                              ; 100A0005
>	v_mac_f32_e32 v4, s8, v1                              ; 3E080208
>	s_buffer_load_dword s5, s[0:3], 0x6                   ; C2028106
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	v_mac_f32_e32 v6, 0, v7                               ; 3E0C0E80
>	v_mul_f32_e32 v7, s6, v0                              ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                              ; 10000007
>	s_buffer_load_dword s6, s[0:3], 0x7                   ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                              ; 3E0A0204
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	v_mac_f32_e32 v7, s5, v1                              ; 3E0E0205
>	v_mac_f32_e32 v5, s8, v3                              ; 3E0A0608
>	s_buffer_load_dword s5, s[0:3], 0xb                   ; C202810B
>	s_buffer_load_dword s8, s[0:3], 0xe                   ; C204010E
>	v_mac_f32_e32 v0, s6, v1                              ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                              ; 3E080607
>	s_buffer_load_dword s6, s[0:3], 0xc                   ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                   ; C203810D
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	v_mac_f32_e32 v6, 0, v9                               ; 3E0C1280
>	v_add_f32_e32 v6, v10, v6                             ; 060C0D0A
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                              ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                              ; 3E000605
>	v_mac_f32_e32 v7, s8, v6                              ; 3E0E0C08
>	v_mac_f32_e32 v4, s6, v6                              ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                              ; 3E0A0C07
>	v_mac_f32_e32 v0, s0, v6                              ; 3E000C00
>	v_max_f32_e32 v1, 0, v7                               ; 20020E80
>	exp 15, 12, 0, 1, 0, v4, v5, v1, v0                   ; F80008CF 00010504
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1836 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..3]
>DCL TEMP[0], LOCAL
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV OUT[0], TEMP[0]
>  5: END
>radeonsi: Compiling shader 24
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) {
>main_body:
>  %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0
>  %17 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %16, i32 0, i32 %14)
>  %18 = extractelement <4 x float> %17, i32 0
>  %19 = extractelement <4 x float> %17, i32 1
>  %20 = extractelement <4 x float> %17, i32 2
>  %21 = extractelement <4 x float> %17, i32 3
>  %22 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %23 = load <16 x i8>, <16 x i8> addrspace(2)* %22, align 16, !invariant.load !0
>  %24 = call float @llvm.SI.load.const(<16 x i8> %23, i32 0)
>  %25 = fmul float %24, %18
>  %26 = call float @llvm.SI.load.const(<16 x i8> %23, i32 4)
>  %27 = fmul float %26, %18
>  %28 = call float @llvm.SI.load.const(<16 x i8> %23, i32 8)
>  %29 = fmul float %28, %18
>  %30 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !invariant.load !0
>  %32 = call float @llvm.SI.load.const(<16 x i8> %31, i32 12)
>  %33 = fmul float %32, %18
>  %34 = call float @llvm.SI.load.const(<16 x i8> %31, i32 16)
>  %35 = fmul float %34, %19
>  %36 = fadd float %35, %25
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 20)
>  %40 = fmul float %39, %19
>  %41 = fadd float %40, %27
>  %42 = call float @llvm.SI.load.const(<16 x i8> %38, i32 24)
>  %43 = fmul float %42, %19
>  %44 = fadd float %43, %29
>  %45 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <16 x i8>, <16 x i8> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = call float @llvm.SI.load.const(<16 x i8> %46, i32 28)
>  %48 = fmul float %47, %19
>  %49 = fadd float %48, %33
>  %50 = call float @llvm.SI.load.const(<16 x i8> %46, i32 32)
>  %51 = fmul float %50, %20
>  %52 = fadd float %51, %36
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 36)
>  %56 = fmul float %55, %20
>  %57 = fadd float %56, %41
>  %58 = call float @llvm.SI.load.const(<16 x i8> %54, i32 40)
>  %59 = fmul float %58, %20
>  %60 = fadd float %59, %44
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call float @llvm.SI.load.const(<16 x i8> %62, i32 44)
>  %64 = fmul float %63, %20
>  %65 = fadd float %64, %49
>  %66 = call float @llvm.SI.load.const(<16 x i8> %62, i32 48)
>  %67 = fmul float %66, %21
>  %68 = fadd float %67, %52
>  %69 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %70 = load <16 x i8>, <16 x i8> addrspace(2)* %69, align 16, !invariant.load !0
>  %71 = call float @llvm.SI.load.const(<16 x i8> %70, i32 52)
>  %72 = fmul float %71, %21
>  %73 = fadd float %72, %57
>  %74 = call float @llvm.SI.load.const(<16 x i8> %70, i32 56)
>  %75 = fmul float %74, %21
>  %76 = fadd float %75, %60
>  %77 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %78 = load <16 x i8>, <16 x i8> addrspace(2)* %77, align 16, !invariant.load !0
>  %79 = call float @llvm.SI.load.const(<16 x i8> %78, i32 60)
>  %80 = fmul float %79, %21
>  %81 = fadd float %80, %65
>  %82 = bitcast i32 %12 to float
>  %83 = insertvalue <{ float, float, float }> undef, float %82, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %68, float %73, float %76, float %81)
>  ret <{ float, float, float }> %83
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s4, s[0:3], 0x0                 ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                 ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                 ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                 ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                 ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                 ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                ; C2050106
>	s_buffer_load_dword s11, s[0:3], 0x7                ; C2058107
>	s_buffer_load_dword s12, s[0:3], 0x8                ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                ; C207010A
>	s_buffer_load_dword s15, s[0:3], 0xb                ; C207810B
>	s_buffer_load_dword s16, s[0:3], 0xc                ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                ; C209010E
>	s_buffer_load_dword s0, s[0:3], 0xf                 ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                       ; BF8C0070
>	v_mul_f32_e32 v0, s4, v3                            ; 10000604
>	v_mul_f32_e32 v1, s5, v3                            ; 10020605
>	v_mul_f32_e32 v7, s6, v3                            ; 100E0606
>	v_mul_f32_e32 v3, s7, v3                            ; 10060607
>	v_mac_f32_e32 v0, s8, v4                            ; 3E000808
>	v_mac_f32_e32 v1, s9, v4                            ; 3E020809
>	v_mac_f32_e32 v7, s10, v4                           ; 3E0E080A
>	v_mac_f32_e32 v3, s11, v4                           ; 3E06080B
>	v_mac_f32_e32 v0, s12, v5                           ; 3E000A0C
>	v_mac_f32_e32 v1, s13, v5                           ; 3E020A0D
>	v_mac_f32_e32 v7, s14, v5                           ; 3E0E0A0E
>	v_mac_f32_e32 v3, s15, v5                           ; 3E060A0F
>	v_mac_f32_e32 v0, s16, v6                           ; 3E000C10
>	v_mac_f32_e32 v1, s17, v6                           ; 3E020C11
>	v_mac_f32_e32 v7, s18, v6                           ; 3E0E0C12
>	v_mac_f32_e32 v3, s0, v6                            ; 3E060C00
>	exp 15, 12, 0, 1, 0, v0, v1, v7, v3                 ; F80008CF 03070100
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 8
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 172 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s4, s[0:3], 0x0                 ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                 ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                 ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                 ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                 ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                 ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                ; C2050106
>	s_buffer_load_dword s11, s[0:3], 0x7                ; C2058107
>	s_buffer_load_dword s12, s[0:3], 0x8                ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                ; C207010A
>	s_buffer_load_dword s15, s[0:3], 0xb                ; C207810B
>	s_buffer_load_dword s16, s[0:3], 0xc                ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                ; C209010E
>	s_buffer_load_dword s0, s[0:3], 0xf                 ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                       ; BF8C0070
>	v_mul_f32_e32 v0, s4, v3                            ; 10000604
>	v_mul_f32_e32 v1, s5, v3                            ; 10020605
>	v_mul_f32_e32 v7, s6, v3                            ; 100E0606
>	v_mul_f32_e32 v3, s7, v3                            ; 10060607
>	v_mac_f32_e32 v0, s8, v4                            ; 3E000808
>	v_mac_f32_e32 v1, s9, v4                            ; 3E020809
>	v_mac_f32_e32 v7, s10, v4                           ; 3E0E080A
>	v_mac_f32_e32 v3, s11, v4                           ; 3E06080B
>	v_mac_f32_e32 v0, s12, v5                           ; 3E000A0C
>	v_mac_f32_e32 v1, s13, v5                           ; 3E020A0D
>	v_mac_f32_e32 v7, s14, v5                           ; 3E0E0A0E
>	v_mac_f32_e32 v3, s15, v5                           ; 3E060A0F
>	v_mac_f32_e32 v0, s16, v6                           ; 3E000C10
>	v_mac_f32_e32 v1, s17, v6                           ; 3E020C11
>	v_mac_f32_e32 v7, s18, v6                           ; 3E0E0C12
>	v_mac_f32_e32 v3, s0, v6                            ; 3E060C00
>	exp 15, 12, 0, 1, 0, v0, v1, v7, v3                 ; F80008CF 03070100
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 8
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 172 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL CONST[0..224]
>DCL TEMP[0..7], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>  0: F2I TEMP[0], IN[2]
>  1: MOV TEMP[1].xyz, IMM[0].xxxx
>  2: MOV TEMP[1].w, CONST[4].xxxx
>  3: MOV TEMP[2].xyz, IMM[0].xxxx
>  4: MOV TEMP[2].w, CONST[4].yyyy
>  5: MOV TEMP[3].xyz, IMM[0].xxxx
>  6: MOV TEMP[3].w, CONST[4].zzzz
>  7: NOT TEMP[4].x, CONST[221].xxxx
>  8: UIF TEMP[4].xxxx :0
>  9:   ADD TEMP[4], CONST[5], -TEMP[1]
> 10:   ADD TEMP[5], CONST[6], -TEMP[2]
> 11:   ADD TEMP[6], CONST[7], -TEMP[3]
> 12: ELSE :0
> 13:   NOT TEMP[7].x, CONST[222].xxxx
> 14:   UIF TEMP[7].xxxx :0
> 15:     UMUL TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx
> 16:     UARL ADDR[0].x, TEMP[7].xxxx
> 17:     UARL ADDR[0].x, TEMP[7].xxxx
> 18:     ADD TEMP[4], CONST[ADDR[0].x+5], -TEMP[1]
> 19:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 20:     UARL ADDR[0].x, TEMP[7].xxxx
> 21:     UARL ADDR[0].x, TEMP[7].xxxx
> 22:     ADD TEMP[5], CONST[ADDR[0].x+5], -TEMP[2]
> 23:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 24:     UARL ADDR[0].x, TEMP[7].xxxx
> 25:     UARL ADDR[0].x, TEMP[7].xxxx
> 26:     ADD TEMP[6], CONST[ADDR[0].x+5], -TEMP[3]
> 27:   ELSE :0
> 28:     UMUL TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx
> 29:     UARL ADDR[0].x, TEMP[7].xxxx
> 30:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[1]
> 31:     MUL TEMP[4], TEMP[7], IN[1].xxxx
> 32:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 33:     UARL ADDR[0].x, TEMP[7].xxxx
> 34:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[2]
> 35:     MUL TEMP[5], TEMP[7], IN[1].xxxx
> 36:     UMAD TEMP[7].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 37:     UARL ADDR[0].x, TEMP[7].xxxx
> 38:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[3]
> 39:     MUL TEMP[6], TEMP[7], IN[1].xxxx
> 40:     UMUL TEMP[7].x, TEMP[0].yyyy, IMM[1].xxxx
> 41:     UARL ADDR[0].x, TEMP[7].xxxx
> 42:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[1]
> 43:     MAD TEMP[4], TEMP[7], IN[1].yyyy, TEMP[4]
> 44:     UMAD TEMP[7].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 45:     UARL ADDR[0].x, TEMP[7].xxxx
> 46:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[2]
> 47:     MAD TEMP[5], TEMP[7], IN[1].yyyy, TEMP[5]
> 48:     UMAD TEMP[7].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 49:     UARL ADDR[0].x, TEMP[7].xxxx
> 50:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[3]
> 51:     MAD TEMP[6], TEMP[7], IN[1].yyyy, TEMP[6]
> 52:     UIF CONST[223].xxxx :0
> 53:       UMUL TEMP[7].x, TEMP[0].zzzz, IMM[1].xxxx
> 54:       UARL ADDR[0].x, TEMP[7].xxxx
> 55:       ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[1]
> 56:       MAD TEMP[4], TEMP[7], IN[1].zzzz, TEMP[4]
> 57:       UMAD TEMP[7].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 58:       UARL ADDR[0].x, TEMP[7].xxxx
> 59:       ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[2]
> 60:       MAD TEMP[5], TEMP[7], IN[1].zzzz, TEMP[5]
> 61:       UMAD TEMP[7].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 62:       UARL ADDR[0].x, TEMP[7].xxxx
> 63:       ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[3]
> 64:       MAD TEMP[6], TEMP[7], IN[1].zzzz, TEMP[6]
> 65:     ENDIF
> 66:     UIF CONST[224].xxxx :0
> 67:       UMUL TEMP[7].x, TEMP[0].wwww, IMM[1].xxxx
> 68:       UARL ADDR[0].x, TEMP[7].xxxx
> 69:       ADD TEMP[1], CONST[ADDR[0].x+5], -TEMP[1]
> 70:       MAD TEMP[4], TEMP[1], IN[1].wwww, TEMP[4]
> 71:       UMAD TEMP[1].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 72:       UARL ADDR[0].x, TEMP[1].xxxx
> 73:       ADD TEMP[1], CONST[ADDR[0].x+5], -TEMP[2]
> 74:       MAD TEMP[5], TEMP[1], IN[1].wwww, TEMP[5]
> 75:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 76:       UARL ADDR[0].x, TEMP[0].xxxx
> 77:       ADD TEMP[0], CONST[ADDR[0].x+5], -TEMP[3]
> 78:       MAD TEMP[6], TEMP[0], IN[1].wwww, TEMP[6]
> 79:     ENDIF
> 80:   ENDIF
> 81: ENDIF
> 82: DP4 TEMP[0].x, IN[0], TEMP[4]
> 83: DP4 TEMP[1].x, IN[0], TEMP[5]
> 84: MOV TEMP[0].y, TEMP[1].xxxx
> 85: DP4 TEMP[1].x, IN[0], TEMP[6]
> 86: MOV TEMP[0].z, TEMP[1].xxxx
> 87: DP4 TEMP[1].x, IN[0], IMM[0].xxxy
> 88: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 89: MUL TEMP[2], CONST[0], TEMP[0].xxxx
> 90: MAD TEMP[2], CONST[1], TEMP[0].yyyy, TEMP[2]
> 91: MAD TEMP[0], CONST[2], TEMP[0].zzzz, TEMP[2]
> 92: MAD TEMP[0], CONST[3], TEMP[1].xxxx, TEMP[0]
> 93: MOV OUT[0], TEMP[0]
> 94: END
>radeonsi: Compiling shader 25
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 0
>  %28 = extractelement <4 x float> %26, i32 1
>  %29 = extractelement <4 x float> %26, i32 2
>  %30 = extractelement <4 x float> %26, i32 3
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = fptosi float %34 to i32
>  %39 = fptosi float %35 to i32
>  %40 = fptosi float %36 to i32
>  %41 = fptosi float %37 to i32
>  %42 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <16 x i8>, <16 x i8> addrspace(2)* %42, align 16, !invariant.load !0
>  %44 = call float @llvm.SI.load.const(<16 x i8> %43, i32 64)
>  %45 = call float @llvm.SI.load.const(<16 x i8> %43, i32 68)
>  %46 = call float @llvm.SI.load.const(<16 x i8> %43, i32 72)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %43, i32 3536)
>  %48 = bitcast float %47 to i32
>  %49 = icmp eq i32 %48, -1
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  br i1 %49, label %else12, label %if8
>
>if8:                                              ; preds = %main_body
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 80)
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 84)
>  %56 = call float @llvm.SI.load.const(<16 x i8> %54, i32 88)
>  %57 = call float @llvm.SI.load.const(<16 x i8> %54, i32 92)
>  %58 = fsub float %57, %44
>  %59 = call float @llvm.SI.load.const(<16 x i8> %54, i32 96)
>  %60 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %61 = load <16 x i8>, <16 x i8> addrspace(2)* %60, align 16, !invariant.load !0
>  %62 = call float @llvm.SI.load.const(<16 x i8> %61, i32 100)
>  %63 = call float @llvm.SI.load.const(<16 x i8> %61, i32 104)
>  %64 = call float @llvm.SI.load.const(<16 x i8> %61, i32 108)
>  %65 = fsub float %64, %45
>  %66 = call float @llvm.SI.load.const(<16 x i8> %61, i32 112)
>  %67 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %68 = load <16 x i8>, <16 x i8> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = call float @llvm.SI.load.const(<16 x i8> %68, i32 116)
>  %70 = call float @llvm.SI.load.const(<16 x i8> %68, i32 120)
>  %71 = call float @llvm.SI.load.const(<16 x i8> %68, i32 124)
>  %72 = fsub float %71, %46
>  br label %endif81
>
>else12:                                           ; preds = %main_body
>  %73 = call float @llvm.SI.load.const(<16 x i8> %51, i32 3552)
>  %74 = bitcast float %73 to i32
>  %75 = icmp eq i32 %74, -1
>  %76 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %77 = load <16 x i8>, <16 x i8> addrspace(2)* %76, align 16, !invariant.load !0
>  %78 = mul i32 %38, 48
>  %79 = add i32 %78, 80
>  %80 = call float @llvm.SI.load.const(<16 x i8> %77, i32 %79)
>  %81 = mul i32 %38, 48
>  %82 = add i32 %81, 84
>  %83 = call float @llvm.SI.load.const(<16 x i8> %77, i32 %82)
>  %84 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %85 = load <16 x i8>, <16 x i8> addrspace(2)* %84, align 16, !invariant.load !0
>  %86 = mul i32 %38, 48
>  %87 = add i32 %86, 88
>  %88 = call float @llvm.SI.load.const(<16 x i8> %85, i32 %87)
>  %89 = mul i32 %38, 48
>  %90 = add i32 %89, 92
>  %91 = call float @llvm.SI.load.const(<16 x i8> %85, i32 %90)
>  %92 = fsub float %91, %44
>  br i1 %75, label %else27, label %if14
>
>if14:                                             ; preds = %else12
>  %93 = mul i32 %38, 3
>  %94 = add i32 %93, 1
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = shl i32 %94, 4
>  %98 = add i32 %97, 80
>  %99 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %98)
>  %100 = shl i32 %94, 4
>  %101 = add i32 %100, 84
>  %102 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %101)
>  %103 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %104 = load <16 x i8>, <16 x i8> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = shl i32 %94, 4
>  %106 = add i32 %105, 88
>  %107 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %106)
>  %108 = shl i32 %94, 4
>  %109 = add i32 %108, 92
>  %110 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %109)
>  %111 = fsub float %110, %45
>  %112 = mul i32 %38, 3
>  %113 = add i32 %112, 2
>  %114 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %115 = load <16 x i8>, <16 x i8> addrspace(2)* %114, align 16, !invariant.load !0
>  %116 = shl i32 %113, 4
>  %117 = add i32 %116, 80
>  %118 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %117)
>  %119 = shl i32 %113, 4
>  %120 = add i32 %119, 84
>  %121 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %120)
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = shl i32 %113, 4
>  %125 = add i32 %124, 88
>  %126 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %125)
>  %127 = shl i32 %113, 4
>  %128 = add i32 %127, 92
>  %129 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %128)
>  %130 = fsub float %129, %46
>  br label %endif81
>
>else27:                                           ; preds = %else12
>  %131 = fmul float %80, %27
>  %132 = fmul float %83, %27
>  %133 = fmul float %88, %27
>  %134 = fmul float %92, %27
>  %135 = mul i32 %38, 3
>  %136 = add i32 %135, 1
>  %137 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %138 = load <16 x i8>, <16 x i8> addrspace(2)* %137, align 16, !invariant.load !0
>  %139 = shl i32 %136, 4
>  %140 = add i32 %139, 80
>  %141 = call float @llvm.SI.load.const(<16 x i8> %138, i32 %140)
>  %142 = shl i32 %136, 4
>  %143 = add i32 %142, 84
>  %144 = call float @llvm.SI.load.const(<16 x i8> %138, i32 %143)
>  %145 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %146 = load <16 x i8>, <16 x i8> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = shl i32 %136, 4
>  %148 = add i32 %147, 88
>  %149 = call float @llvm.SI.load.const(<16 x i8> %146, i32 %148)
>  %150 = shl i32 %136, 4
>  %151 = add i32 %150, 92
>  %152 = call float @llvm.SI.load.const(<16 x i8> %146, i32 %151)
>  %153 = fsub float %152, %45
>  %154 = fmul float %141, %27
>  %155 = fmul float %144, %27
>  %156 = fmul float %149, %27
>  %157 = fmul float %153, %27
>  %158 = mul i32 %38, 3
>  %159 = add i32 %158, 2
>  %160 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %161 = load <16 x i8>, <16 x i8> addrspace(2)* %160, align 16, !invariant.load !0
>  %162 = shl i32 %159, 4
>  %163 = add i32 %162, 80
>  %164 = call float @llvm.SI.load.const(<16 x i8> %161, i32 %163)
>  %165 = shl i32 %159, 4
>  %166 = add i32 %165, 84
>  %167 = call float @llvm.SI.load.const(<16 x i8> %161, i32 %166)
>  %168 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %169 = load <16 x i8>, <16 x i8> addrspace(2)* %168, align 16, !invariant.load !0
>  %170 = shl i32 %159, 4
>  %171 = add i32 %170, 88
>  %172 = call float @llvm.SI.load.const(<16 x i8> %169, i32 %171)
>  %173 = shl i32 %159, 4
>  %174 = add i32 %173, 92
>  %175 = call float @llvm.SI.load.const(<16 x i8> %169, i32 %174)
>  %176 = fsub float %175, %46
>  %177 = fmul float %164, %27
>  %178 = fmul float %167, %27
>  %179 = fmul float %172, %27
>  %180 = fmul float %176, %27
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = mul i32 %39, 48
>  %184 = add i32 %183, 80
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %184)
>  %186 = mul i32 %39, 48
>  %187 = add i32 %186, 84
>  %188 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %187)
>  %189 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %190 = load <16 x i8>, <16 x i8> addrspace(2)* %189, align 16, !invariant.load !0
>  %191 = mul i32 %39, 48
>  %192 = add i32 %191, 88
>  %193 = call float @llvm.SI.load.const(<16 x i8> %190, i32 %192)
>  %194 = mul i32 %39, 48
>  %195 = add i32 %194, 92
>  %196 = call float @llvm.SI.load.const(<16 x i8> %190, i32 %195)
>  %197 = fsub float %196, %44
>  %198 = fmul float %185, %28
>  %199 = fadd float %198, %131
>  %200 = fmul float %188, %28
>  %201 = fadd float %200, %132
>  %202 = fmul float %193, %28
>  %203 = fadd float %202, %133
>  %204 = fmul float %197, %28
>  %205 = fadd float %204, %134
>  %206 = mul i32 %39, 3
>  %207 = add i32 %206, 1
>  %208 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %209 = load <16 x i8>, <16 x i8> addrspace(2)* %208, align 16, !invariant.load !0
>  %210 = shl i32 %207, 4
>  %211 = add i32 %210, 80
>  %212 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %211)
>  %213 = shl i32 %207, 4
>  %214 = add i32 %213, 84
>  %215 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %214)
>  %216 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %217 = load <16 x i8>, <16 x i8> addrspace(2)* %216, align 16, !invariant.load !0
>  %218 = shl i32 %207, 4
>  %219 = add i32 %218, 88
>  %220 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %219)
>  %221 = shl i32 %207, 4
>  %222 = add i32 %221, 92
>  %223 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %222)
>  %224 = fsub float %223, %45
>  %225 = fmul float %212, %28
>  %226 = fadd float %225, %154
>  %227 = fmul float %215, %28
>  %228 = fadd float %227, %155
>  %229 = fmul float %220, %28
>  %230 = fadd float %229, %156
>  %231 = fmul float %224, %28
>  %232 = fadd float %231, %157
>  %233 = mul i32 %39, 3
>  %234 = add i32 %233, 2
>  %235 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %236 = load <16 x i8>, <16 x i8> addrspace(2)* %235, align 16, !invariant.load !0
>  %237 = shl i32 %234, 4
>  %238 = add i32 %237, 80
>  %239 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %238)
>  %240 = shl i32 %234, 4
>  %241 = add i32 %240, 84
>  %242 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %241)
>  %243 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %244 = load <16 x i8>, <16 x i8> addrspace(2)* %243, align 16, !invariant.load !0
>  %245 = shl i32 %234, 4
>  %246 = add i32 %245, 88
>  %247 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %246)
>  %248 = shl i32 %234, 4
>  %249 = add i32 %248, 92
>  %250 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %249)
>  %251 = fsub float %250, %46
>  %252 = fmul float %239, %28
>  %253 = fadd float %252, %177
>  %254 = fmul float %242, %28
>  %255 = fadd float %254, %178
>  %256 = fmul float %247, %28
>  %257 = fadd float %256, %179
>  %258 = fmul float %251, %28
>  %259 = fadd float %258, %180
>  %260 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %261 = load <16 x i8>, <16 x i8> addrspace(2)* %260, align 16, !invariant.load !0
>  %262 = call float @llvm.SI.load.const(<16 x i8> %261, i32 3568)
>  %263 = bitcast float %262 to i32
>  %264 = icmp eq i32 %263, 0
>  br i1 %264, label %endif65, label %if52
>
>if52:                                             ; preds = %else27
>  %265 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %266 = load <16 x i8>, <16 x i8> addrspace(2)* %265, align 16, !invariant.load !0
>  %267 = mul i32 %40, 48
>  %268 = add i32 %267, 80
>  %269 = call float @llvm.SI.load.const(<16 x i8> %266, i32 %268)
>  %270 = mul i32 %40, 48
>  %271 = add i32 %270, 84
>  %272 = call float @llvm.SI.load.const(<16 x i8> %266, i32 %271)
>  %273 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %274 = load <16 x i8>, <16 x i8> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = mul i32 %40, 48
>  %276 = add i32 %275, 88
>  %277 = call float @llvm.SI.load.const(<16 x i8> %274, i32 %276)
>  %278 = mul i32 %40, 48
>  %279 = add i32 %278, 92
>  %280 = call float @llvm.SI.load.const(<16 x i8> %274, i32 %279)
>  %281 = fsub float %280, %44
>  %282 = fmul float %269, %29
>  %283 = fadd float %282, %199
>  %284 = fmul float %272, %29
>  %285 = fadd float %284, %201
>  %286 = fmul float %277, %29
>  %287 = fadd float %286, %203
>  %288 = fmul float %281, %29
>  %289 = fadd float %288, %205
>  %290 = mul i32 %40, 3
>  %291 = add i32 %290, 1
>  %292 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %293 = load <16 x i8>, <16 x i8> addrspace(2)* %292, align 16, !invariant.load !0
>  %294 = shl i32 %291, 4
>  %295 = add i32 %294, 80
>  %296 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %295)
>  %297 = shl i32 %291, 4
>  %298 = add i32 %297, 84
>  %299 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %298)
>  %300 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %301 = load <16 x i8>, <16 x i8> addrspace(2)* %300, align 16, !invariant.load !0
>  %302 = shl i32 %291, 4
>  %303 = add i32 %302, 88
>  %304 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %303)
>  %305 = shl i32 %291, 4
>  %306 = add i32 %305, 92
>  %307 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %306)
>  %308 = fsub float %307, %45
>  %309 = fmul float %296, %29
>  %310 = fadd float %309, %226
>  %311 = fmul float %299, %29
>  %312 = fadd float %311, %228
>  %313 = fmul float %304, %29
>  %314 = fadd float %313, %230
>  %315 = fmul float %308, %29
>  %316 = fadd float %315, %232
>  %317 = mul i32 %40, 3
>  %318 = add i32 %317, 2
>  %319 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %320 = load <16 x i8>, <16 x i8> addrspace(2)* %319, align 16, !invariant.load !0
>  %321 = shl i32 %318, 4
>  %322 = add i32 %321, 80
>  %323 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %322)
>  %324 = shl i32 %318, 4
>  %325 = add i32 %324, 84
>  %326 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %325)
>  %327 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %328 = load <16 x i8>, <16 x i8> addrspace(2)* %327, align 16, !invariant.load !0
>  %329 = shl i32 %318, 4
>  %330 = add i32 %329, 88
>  %331 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %330)
>  %332 = shl i32 %318, 4
>  %333 = add i32 %332, 92
>  %334 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %333)
>  %335 = fsub float %334, %46
>  %336 = fmul float %323, %29
>  %337 = fadd float %336, %253
>  %338 = fmul float %326, %29
>  %339 = fadd float %338, %255
>  %340 = fmul float %331, %29
>  %341 = fadd float %340, %257
>  %342 = fmul float %335, %29
>  %343 = fadd float %342, %259
>  br label %endif65
>
>endif65:                                          ; preds = %else27, %if52
>  %.0101 = phi float [ %283, %if52 ], [ %199, %else27 ]
>  %.097 = phi float [ %285, %if52 ], [ %201, %else27 ]
>  %.093 = phi float [ %287, %if52 ], [ %203, %else27 ]
>  %.089 = phi float [ %289, %if52 ], [ %205, %else27 ]
>  %.085 = phi float [ %310, %if52 ], [ %226, %else27 ]
>  %.081 = phi float [ %312, %if52 ], [ %228, %else27 ]
>  %.077 = phi float [ %314, %if52 ], [ %230, %else27 ]
>  %.073 = phi float [ %316, %if52 ], [ %232, %else27 ]
>  %.069 = phi float [ %337, %if52 ], [ %253, %else27 ]
>  %.065 = phi float [ %339, %if52 ], [ %255, %else27 ]
>  %.061 = phi float [ %341, %if52 ], [ %257, %else27 ]
>  %.0 = phi float [ %343, %if52 ], [ %259, %else27 ]
>  %344 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %345 = load <16 x i8>, <16 x i8> addrspace(2)* %344, align 16, !invariant.load !0
>  %346 = call float @llvm.SI.load.const(<16 x i8> %345, i32 3584)
>  %347 = bitcast float %346 to i32
>  %348 = icmp eq i32 %347, 0
>  br i1 %348, label %endif81, label %if66
>
>if66:                                             ; preds = %endif65
>  %349 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %350 = load <16 x i8>, <16 x i8> addrspace(2)* %349, align 16, !invariant.load !0
>  %351 = mul i32 %41, 48
>  %352 = add i32 %351, 80
>  %353 = call float @llvm.SI.load.const(<16 x i8> %350, i32 %352)
>  %354 = mul i32 %41, 48
>  %355 = add i32 %354, 84
>  %356 = call float @llvm.SI.load.const(<16 x i8> %350, i32 %355)
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = mul i32 %41, 48
>  %360 = add i32 %359, 88
>  %361 = call float @llvm.SI.load.const(<16 x i8> %358, i32 %360)
>  %362 = mul i32 %41, 48
>  %363 = add i32 %362, 92
>  %364 = call float @llvm.SI.load.const(<16 x i8> %358, i32 %363)
>  %365 = fsub float %364, %44
>  %366 = fmul float %353, %30
>  %367 = fadd float %366, %.0101
>  %368 = fmul float %356, %30
>  %369 = fadd float %368, %.097
>  %370 = fmul float %361, %30
>  %371 = fadd float %370, %.093
>  %372 = fmul float %365, %30
>  %373 = fadd float %372, %.089
>  %374 = mul i32 %41, 3
>  %375 = add i32 %374, 1
>  %376 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %377 = load <16 x i8>, <16 x i8> addrspace(2)* %376, align 16, !invariant.load !0
>  %378 = shl i32 %375, 4
>  %379 = add i32 %378, 80
>  %380 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %379)
>  %381 = shl i32 %375, 4
>  %382 = add i32 %381, 84
>  %383 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %382)
>  %384 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %385 = load <16 x i8>, <16 x i8> addrspace(2)* %384, align 16, !invariant.load !0
>  %386 = shl i32 %375, 4
>  %387 = add i32 %386, 88
>  %388 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %387)
>  %389 = shl i32 %375, 4
>  %390 = add i32 %389, 92
>  %391 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %390)
>  %392 = fsub float %391, %45
>  %393 = fmul float %380, %30
>  %394 = fadd float %393, %.085
>  %395 = fmul float %383, %30
>  %396 = fadd float %395, %.081
>  %397 = fmul float %388, %30
>  %398 = fadd float %397, %.077
>  %399 = fmul float %392, %30
>  %400 = fadd float %399, %.073
>  %401 = mul i32 %41, 3
>  %402 = add i32 %401, 2
>  %403 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %404 = load <16 x i8>, <16 x i8> addrspace(2)* %403, align 16, !invariant.load !0
>  %405 = shl i32 %402, 4
>  %406 = add i32 %405, 80
>  %407 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %406)
>  %408 = shl i32 %402, 4
>  %409 = add i32 %408, 84
>  %410 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %409)
>  %411 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %412 = load <16 x i8>, <16 x i8> addrspace(2)* %411, align 16, !invariant.load !0
>  %413 = shl i32 %402, 4
>  %414 = add i32 %413, 88
>  %415 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %414)
>  %416 = shl i32 %402, 4
>  %417 = add i32 %416, 92
>  %418 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %417)
>  %419 = fsub float %418, %46
>  %420 = fmul float %407, %30
>  %421 = fadd float %420, %.069
>  %422 = fmul float %410, %30
>  %423 = fadd float %422, %.065
>  %424 = fmul float %415, %30
>  %425 = fadd float %424, %.061
>  %426 = fmul float %419, %30
>  %427 = fadd float %426, %.0
>  br label %endif81
>
>endif81:                                          ; preds = %endif65, %if14, %if66, %if8
>  %.3104 = phi float [ %52, %if8 ], [ %80, %if14 ], [ %367, %if66 ], [ %.0101, %endif65 ]
>  %.3100 = phi float [ %55, %if8 ], [ %83, %if14 ], [ %369, %if66 ], [ %.097, %endif65 ]
>  %.396 = phi float [ %56, %if8 ], [ %88, %if14 ], [ %371, %if66 ], [ %.093, %endif65 ]
>  %.392 = phi float [ %58, %if8 ], [ %92, %if14 ], [ %373, %if66 ], [ %.089, %endif65 ]
>  %.388 = phi float [ %59, %if8 ], [ %99, %if14 ], [ %394, %if66 ], [ %.085, %endif65 ]
>  %.384 = phi float [ %62, %if8 ], [ %102, %if14 ], [ %396, %if66 ], [ %.081, %endif65 ]
>  %.380 = phi float [ %63, %if8 ], [ %107, %if14 ], [ %398, %if66 ], [ %.077, %endif65 ]
>  %.376 = phi float [ %65, %if8 ], [ %111, %if14 ], [ %400, %if66 ], [ %.073, %endif65 ]
>  %.372 = phi float [ %66, %if8 ], [ %118, %if14 ], [ %421, %if66 ], [ %.069, %endif65 ]
>  %.368 = phi float [ %69, %if8 ], [ %121, %if14 ], [ %423, %if66 ], [ %.065, %endif65 ]
>  %.364 = phi float [ %70, %if8 ], [ %126, %if14 ], [ %425, %if66 ], [ %.061, %endif65 ]
>  %.3 = phi float [ %72, %if8 ], [ %130, %if14 ], [ %427, %if66 ], [ %.0, %endif65 ]
>  %428 = fmul float %20, %.3104
>  %429 = fmul float %21, %.3100
>  %430 = fadd float %428, %429
>  %431 = fmul float %22, %.396
>  %432 = fadd float %430, %431
>  %433 = fmul float %23, %.392
>  %434 = fadd float %432, %433
>  %435 = fmul float %20, %.388
>  %436 = fmul float %21, %.384
>  %437 = fadd float %435, %436
>  %438 = fmul float %22, %.380
>  %439 = fadd float %437, %438
>  %440 = fmul float %23, %.376
>  %441 = fadd float %439, %440
>  %442 = fmul float %20, %.372
>  %443 = fmul float %21, %.368
>  %444 = fadd float %442, %443
>  %445 = fmul float %22, %.364
>  %446 = fadd float %444, %445
>  %447 = fmul float %23, %.3
>  %448 = fadd float %446, %447
>  %449 = fmul float %20, 0.000000e+00
>  %450 = fmul float %21, 0.000000e+00
>  %451 = fadd float %449, %450
>  %452 = fmul float %22, 0.000000e+00
>  %453 = fadd float %451, %452
>  %454 = fadd float %453, %23
>  %455 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %456 = load <16 x i8>, <16 x i8> addrspace(2)* %455, align 16, !invariant.load !0
>  %457 = call float @llvm.SI.load.const(<16 x i8> %456, i32 64)
>  %458 = fadd float %434, %457
>  %459 = call float @llvm.SI.load.const(<16 x i8> %456, i32 68)
>  %460 = fadd float %441, %459
>  %461 = call float @llvm.SI.load.const(<16 x i8> %456, i32 72)
>  %462 = fadd float %448, %461
>  %463 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %464 = load <16 x i8>, <16 x i8> addrspace(2)* %463, align 16, !invariant.load !0
>  %465 = call float @llvm.SI.load.const(<16 x i8> %464, i32 0)
>  %466 = fmul float %465, %458
>  %467 = call float @llvm.SI.load.const(<16 x i8> %464, i32 4)
>  %468 = fmul float %467, %458
>  %469 = call float @llvm.SI.load.const(<16 x i8> %464, i32 8)
>  %470 = fmul float %469, %458
>  %471 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %472 = load <16 x i8>, <16 x i8> addrspace(2)* %471, align 16, !invariant.load !0
>  %473 = call float @llvm.SI.load.const(<16 x i8> %472, i32 12)
>  %474 = fmul float %473, %458
>  %475 = call float @llvm.SI.load.const(<16 x i8> %472, i32 16)
>  %476 = fmul float %475, %460
>  %477 = fadd float %476, %466
>  %478 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %479 = load <16 x i8>, <16 x i8> addrspace(2)* %478, align 16, !invariant.load !0
>  %480 = call float @llvm.SI.load.const(<16 x i8> %479, i32 20)
>  %481 = fmul float %480, %460
>  %482 = fadd float %481, %468
>  %483 = call float @llvm.SI.load.const(<16 x i8> %479, i32 24)
>  %484 = fmul float %483, %460
>  %485 = fadd float %484, %470
>  %486 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %487 = load <16 x i8>, <16 x i8> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = call float @llvm.SI.load.const(<16 x i8> %487, i32 28)
>  %489 = fmul float %488, %460
>  %490 = fadd float %489, %474
>  %491 = call float @llvm.SI.load.const(<16 x i8> %487, i32 32)
>  %492 = fmul float %491, %462
>  %493 = fadd float %492, %477
>  %494 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %495 = load <16 x i8>, <16 x i8> addrspace(2)* %494, align 16, !invariant.load !0
>  %496 = call float @llvm.SI.load.const(<16 x i8> %495, i32 36)
>  %497 = fmul float %496, %462
>  %498 = fadd float %497, %482
>  %499 = call float @llvm.SI.load.const(<16 x i8> %495, i32 40)
>  %500 = fmul float %499, %462
>  %501 = fadd float %500, %485
>  %502 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %503 = load <16 x i8>, <16 x i8> addrspace(2)* %502, align 16, !invariant.load !0
>  %504 = call float @llvm.SI.load.const(<16 x i8> %503, i32 44)
>  %505 = fmul float %504, %462
>  %506 = fadd float %505, %490
>  %507 = call float @llvm.SI.load.const(<16 x i8> %503, i32 48)
>  %508 = fmul float %507, %454
>  %509 = fadd float %508, %493
>  %510 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %511 = load <16 x i8>, <16 x i8> addrspace(2)* %510, align 16, !invariant.load !0
>  %512 = call float @llvm.SI.load.const(<16 x i8> %511, i32 52)
>  %513 = fmul float %512, %454
>  %514 = fadd float %513, %498
>  %515 = call float @llvm.SI.load.const(<16 x i8> %511, i32 56)
>  %516 = fmul float %515, %454
>  %517 = fadd float %516, %501
>  %518 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %519 = load <16 x i8>, <16 x i8> addrspace(2)* %518, align 16, !invariant.load !0
>  %520 = call float @llvm.SI.load.const(<16 x i8> %519, i32 60)
>  %521 = fmul float %520, %454
>  %522 = fadd float %521, %506
>  %523 = bitcast i32 %12 to float
>  %524 = insertvalue <{ float, float, float }> undef, float %523, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %509, float %514, float %517, float %522)
>  ret <{ float, float, float }> %524
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen  ; E00C2000 80010704
>	s_buffer_load_dword s4, s[0:3], 0x10                  ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                  ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                  ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x374                 ; C20380FF 00000374
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v0, s4                                  ; 7E000204
>	v_mov_b32_e32 v1, s5                                  ; 7E020205
>	v_mov_b32_e32 v3, s6                                  ; 7E060206
>	s_cmp_eq_u32 s7, -1                                   ; BF06C107
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                  ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x14                  ; C2020114
>	s_buffer_load_dword s5, s[0:3], 0x15                  ; C2028115
>	s_buffer_load_dword s6, s[0:3], 0x16                  ; C2030116
>	s_buffer_load_dword s7, s[0:3], 0x17                  ; C2038117
>	s_buffer_load_dword s8, s[0:3], 0x18                  ; C2040118
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v6, s4                                  ; 7E0C0204
>	v_mov_b32_e32 v12, s5                                 ; 7E180205
>	s_buffer_load_dword s4, s[0:3], 0x19                  ; C2020119
>	s_buffer_load_dword s5, s[0:3], 0x1a                  ; C202811A
>	v_mov_b32_e32 v4, s6                                  ; 7E080206
>	v_sub_f32_e32 v11, s7, v0                             ; 08160007
>	v_mov_b32_e32 v5, s8                                  ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x1b                  ; C203011B
>	s_buffer_load_dword s7, s[0:3], 0x1c                  ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                  ; C204011D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v14, s4                                 ; 7E1C0204
>	v_mov_b32_e32 v13, s5                                 ; 7E1A0205
>	s_buffer_load_dword s4, s[0:3], 0x1e                  ; C202011E
>	s_buffer_load_dword s5, s[0:3], 0x1f                  ; C202811F
>	v_sub_f32_e32 v15, s6, v1                             ; 081E0206
>	v_mov_b32_e32 v16, s7                                 ; 7E200207
>	v_mov_b32_e32 v17, s8                                 ; 7E220208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v18, s4                                 ; 7E240204
>	v_sub_f32_e32 v19, s5, v3                             ; 08260605
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                  ; C0820B08
>	s_movk_i32 s12, 0x54                                  ; B00C0054
>	s_movk_i32 s15, 0x5c                                  ; B00F005C
>	s_movk_i32 s14, 0x50                                  ; B00E0050
>	s_movk_i32 s13, 0x58                                  ; B00D0058
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[4:7], 0 idxen ; E00C2000 80011806
>	s_buffer_load_dword s4, s[0:3], 0x378                 ; C20200FF 00000378
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                   ; BF06C104
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                             ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                              ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s12, v15                      ; 4A161E0C
>	v_add_i32_e32 v14, vcc, s15, v15                      ; 4A1C1E0F
>	v_add_i32_e32 v4, vcc, s14, v15                       ; 4A081E0E
>	buffer_load_dword v12, v11, s[0:3], 0 offen           ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen           ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s13, v15                      ; 4A1A1E0D
>	buffer_load_dword v6, v4, s[0:3], 0 offen             ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen            ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                         ; 0A161700
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                  ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                     ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                     ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                     ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                      ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                     ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                     ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen           ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen           ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                     ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                     ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen           ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen           ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                         ; 0A1E2701
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                         ; 0A262903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                  ; C0820B04
>	s_movk_i32 s11, 0x6c                                  ; B00B006C
>	s_movk_i32 s10, 0x60                                  ; B00A0060
>	s_movk_i32 s9, 0x64                                   ; B0090064
>	s_movk_i32 s8, 0x68                                   ; B0080068
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[4:7], 0 idxen ; E00C2000 80011405
>	v_cvt_i32_f32_e32 v5, v25                             ; 7E0A1119
>	s_movk_i32 s4, 0x7c                                   ; B004007C
>	v_add_i32_e32 v17, vcc, s4, v15                       ; 4A221E04
>	s_movk_i32 s6, 0x74                                   ; B0060074
>	v_mul_lo_i32 v24, v5, 48                              ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s11, v15                       ; 4A0A1E0B
>	s_movk_i32 s7, 0x70                                   ; B0070070
>	s_movk_i32 s5, 0x78                                   ; B0050078
>	v_add_i32_e32 v13, vcc, s10, v15                      ; 4A1A1E0A
>	v_add_i32_e32 v14, vcc, s9, v15                       ; 4A1C1E09
>	v_add_i32_e32 v16, vcc, s8, v15                       ; 4A201E08
>	v_add_i32_e32 v19, vcc, s6, v15                       ; 4A261E06
>	buffer_load_dword v18, v5, s[0:3], 0 offen            ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s7, v15                        ; 4A0A1E07
>	v_add_i32_e32 v15, vcc, s5, v15                       ; 4A1E1E05
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen           ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen           ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen            ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen           ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                    ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                             ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                           ; 10181914
>	v_mul_f32_e32 v4, v20, v4                             ; 10080914
>	v_mul_f32_e32 v11, v20, v11                           ; 10161714
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                         ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                           ; 101E1F14
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                         ; 0A3A2303
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                           ; 101C1D14
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                           ; 10243914
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                            ; 100A1B14
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                           ; 101A2114
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                           ; 10222714
>	v_mul_f32_e32 v16, v20, v25                           ; 10203314
>	v_mul_f32_e32 v19, v20, v29                           ; 10263B14
>	v_add_i32_e32 v20, vcc, s15, v24                      ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                         ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                           ; 3E162915
>	v_add_i32_e32 v20, vcc, s11, v24                      ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                         ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                           ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s14, v24                      ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                            ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s12, v24                      ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_buffer_load_dword s12, s[0:3], 0x37c                ; C20600FF 0000037C
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                   ; BF06800C
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                           ; 3E182915
>	v_add_i32_e32 v20, vcc, s13, v24                      ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                            ; 3E082915
>	v_add_i32_e32 v20, vcc, s10, v24                      ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                            ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s9, v24                       ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                           ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s8, v24                       ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                           ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s7, v24                       ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                           ; 3E202915
>	v_add_i32_e32 v20, vcc, s6, v24                       ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                           ; 3E222915
>	v_add_i32_e32 v20, vcc, s5, v24                       ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                           ; 3E242915
>	v_add_i32_e32 v20, vcc, s4, v24                       ; 4A283004
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                           ; 3E262915
>	s_cbranch_scc1 BB0_6                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                            ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                            ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                           ; 3E162B16
>	v_add_i32_e32 v21, vcc, s11, v20                      ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                           ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                           ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                            ; 3E082B16
>	v_add_i32_e32 v21, vcc, s10, v20                      ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                            ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s9, v20                       ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                           ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s8, v20                       ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                           ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s7, v20                       ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                           ; 3E202B16
>	v_add_i32_e32 v21, vcc, s6, v20                       ; 4A2A2806
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                           ; 3E222B16
>	v_add_i32_e32 v21, vcc, s5, v20                       ; 4A2A2805
>	v_add_i32_e32 v20, vcc, s4, v20                       ; 4A282804
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                           ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                           ; 3E262916
>	s_buffer_load_dword s4, s[0:3], 0x380                 ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                    ; BF068004
>	s_cbranch_scc1 BB0_8                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                            ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                            ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                           ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                     ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                           ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                           ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                            ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                     ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                            ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                     ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                           ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                     ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                           ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                     ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                           ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                     ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                           ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                     ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                     ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                           ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                           ; 3E262917
>	v_mul_f32_e32 v12, v12, v8                            ; 1018110C
>	v_mac_f32_e32 v12, v6, v7                             ; 3E180F06
>	v_mac_f32_e32 v12, v4, v9                             ; 3E181304
>	v_mul_f32_e32 v4, v14, v8                             ; 1008110E
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                   ; C2028101
>	v_mac_f32_e32 v4, v5, v7                              ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                             ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                   ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                   ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                   ; C2040104
>	v_mac_f32_e32 v5, v16, v7                             ; 3E0A0F10
>	v_mac_f32_e32 v4, v13, v9                             ; 3E08130D
>	v_mac_f32_e32 v5, v18, v9                             ; 3E0A1312
>	v_mac_f32_e32 v12, v11, v10                           ; 3E18150B
>	v_mac_f32_e32 v4, v15, v10                            ; 3E08150F
>	v_mac_f32_e32 v5, v19, v10                            ; 3E0A1513
>	v_add_f32_e32 v0, v0, v12                             ; 06001900
>	v_mul_f32_e32 v6, 0, v8                               ; 100C1080
>	v_add_f32_e32 v1, v1, v4                              ; 06020901
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                              ; 10080004
>	v_add_f32_e32 v3, v3, v5                              ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                              ; 100A0005
>	s_buffer_load_dword s4, s[0:3], 0x5                   ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                   ; C2028106
>	v_mac_f32_e32 v6, 0, v7                               ; 3E0C0E80
>	v_mul_f32_e32 v7, s6, v0                              ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                              ; 10000007
>	v_mac_f32_e32 v4, s8, v1                              ; 3E080208
>	s_buffer_load_dword s6, s[0:3], 0x7                   ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                              ; 3E0A0204
>	v_mac_f32_e32 v7, s5, v1                              ; 3E0E0205
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                   ; C202810B
>	v_mac_f32_e32 v0, s6, v1                              ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                              ; 3E080607
>	v_mac_f32_e32 v5, s8, v3                              ; 3E0A0608
>	s_buffer_load_dword s6, s[0:3], 0xc                   ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                   ; C203810D
>	s_buffer_load_dword s8, s[0:3], 0xe                   ; C204010E
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	v_mac_f32_e32 v6, 0, v9                               ; 3E0C1280
>	v_add_f32_e32 v6, v10, v6                             ; 060C0D0A
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                              ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                              ; 3E000605
>	v_mac_f32_e32 v4, s6, v6                              ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                              ; 3E0A0C07
>	v_mac_f32_e32 v7, s8, v6                              ; 3E0E0C08
>	v_mac_f32_e32 v0, s0, v6                              ; 3E000C00
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v0                   ; F80008CF 00070504
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1832 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen  ; E00C2000 80010704
>	s_buffer_load_dword s4, s[0:3], 0x10                  ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                  ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                  ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x374                 ; C20380FF 00000374
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v0, s4                                  ; 7E000204
>	v_mov_b32_e32 v1, s5                                  ; 7E020205
>	v_mov_b32_e32 v3, s6                                  ; 7E060206
>	s_cmp_eq_u32 s7, -1                                   ; BF06C107
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                  ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x14                  ; C2020114
>	s_buffer_load_dword s5, s[0:3], 0x15                  ; C2028115
>	s_buffer_load_dword s6, s[0:3], 0x16                  ; C2030116
>	s_buffer_load_dword s7, s[0:3], 0x17                  ; C2038117
>	s_buffer_load_dword s8, s[0:3], 0x18                  ; C2040118
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v6, s4                                  ; 7E0C0204
>	v_mov_b32_e32 v12, s5                                 ; 7E180205
>	s_buffer_load_dword s4, s[0:3], 0x19                  ; C2020119
>	s_buffer_load_dword s5, s[0:3], 0x1a                  ; C202811A
>	v_mov_b32_e32 v4, s6                                  ; 7E080206
>	v_sub_f32_e32 v11, s7, v0                             ; 08160007
>	v_mov_b32_e32 v5, s8                                  ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x1b                  ; C203011B
>	s_buffer_load_dword s7, s[0:3], 0x1c                  ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                  ; C204011D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v14, s4                                 ; 7E1C0204
>	v_mov_b32_e32 v13, s5                                 ; 7E1A0205
>	s_buffer_load_dword s4, s[0:3], 0x1e                  ; C202011E
>	s_buffer_load_dword s5, s[0:3], 0x1f                  ; C202811F
>	v_sub_f32_e32 v15, s6, v1                             ; 081E0206
>	v_mov_b32_e32 v16, s7                                 ; 7E200207
>	v_mov_b32_e32 v17, s8                                 ; 7E220208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v18, s4                                 ; 7E240204
>	v_sub_f32_e32 v19, s5, v3                             ; 08260605
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                  ; C0820B08
>	s_movk_i32 s12, 0x54                                  ; B00C0054
>	s_movk_i32 s15, 0x5c                                  ; B00F005C
>	s_movk_i32 s14, 0x50                                  ; B00E0050
>	s_movk_i32 s13, 0x58                                  ; B00D0058
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[4:7], 0 idxen ; E00C2000 80011806
>	s_buffer_load_dword s4, s[0:3], 0x378                 ; C20200FF 00000378
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                   ; BF06C104
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                             ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                              ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s12, v15                      ; 4A161E0C
>	v_add_i32_e32 v14, vcc, s15, v15                      ; 4A1C1E0F
>	v_add_i32_e32 v4, vcc, s14, v15                       ; 4A081E0E
>	buffer_load_dword v12, v11, s[0:3], 0 offen           ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen           ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s13, v15                      ; 4A1A1E0D
>	buffer_load_dword v6, v4, s[0:3], 0 offen             ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen            ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                         ; 0A161700
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                  ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                     ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                     ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                     ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                      ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                     ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                     ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen           ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen           ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                     ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                     ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen           ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen           ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                         ; 0A1E2701
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                         ; 0A262903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                  ; C0820B04
>	s_movk_i32 s11, 0x6c                                  ; B00B006C
>	s_movk_i32 s10, 0x60                                  ; B00A0060
>	s_movk_i32 s9, 0x64                                   ; B0090064
>	s_movk_i32 s8, 0x68                                   ; B0080068
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[4:7], 0 idxen ; E00C2000 80011405
>	v_cvt_i32_f32_e32 v5, v25                             ; 7E0A1119
>	s_movk_i32 s4, 0x7c                                   ; B004007C
>	v_add_i32_e32 v17, vcc, s4, v15                       ; 4A221E04
>	s_movk_i32 s6, 0x74                                   ; B0060074
>	v_mul_lo_i32 v24, v5, 48                              ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s11, v15                       ; 4A0A1E0B
>	s_movk_i32 s7, 0x70                                   ; B0070070
>	s_movk_i32 s5, 0x78                                   ; B0050078
>	v_add_i32_e32 v13, vcc, s10, v15                      ; 4A1A1E0A
>	v_add_i32_e32 v14, vcc, s9, v15                       ; 4A1C1E09
>	v_add_i32_e32 v16, vcc, s8, v15                       ; 4A201E08
>	v_add_i32_e32 v19, vcc, s6, v15                       ; 4A261E06
>	buffer_load_dword v18, v5, s[0:3], 0 offen            ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s7, v15                        ; 4A0A1E07
>	v_add_i32_e32 v15, vcc, s5, v15                       ; 4A1E1E05
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen           ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen           ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen            ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen           ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                    ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                             ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                           ; 10181914
>	v_mul_f32_e32 v4, v20, v4                             ; 10080914
>	v_mul_f32_e32 v11, v20, v11                           ; 10161714
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                         ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                           ; 101E1F14
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                         ; 0A3A2303
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                           ; 101C1D14
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                           ; 10243914
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                            ; 100A1B14
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                           ; 101A2114
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                           ; 10222714
>	v_mul_f32_e32 v16, v20, v25                           ; 10203314
>	v_mul_f32_e32 v19, v20, v29                           ; 10263B14
>	v_add_i32_e32 v20, vcc, s15, v24                      ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                         ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                           ; 3E162915
>	v_add_i32_e32 v20, vcc, s11, v24                      ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                         ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                           ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s14, v24                      ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                            ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s12, v24                      ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_buffer_load_dword s12, s[0:3], 0x37c                ; C20600FF 0000037C
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                   ; BF06800C
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                           ; 3E182915
>	v_add_i32_e32 v20, vcc, s13, v24                      ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                            ; 3E082915
>	v_add_i32_e32 v20, vcc, s10, v24                      ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                            ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s9, v24                       ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                           ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s8, v24                       ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                           ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s7, v24                       ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                           ; 3E202915
>	v_add_i32_e32 v20, vcc, s6, v24                       ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                           ; 3E222915
>	v_add_i32_e32 v20, vcc, s5, v24                       ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                           ; 3E242915
>	v_add_i32_e32 v20, vcc, s4, v24                       ; 4A283004
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                           ; 3E262915
>	s_cbranch_scc1 BB0_6                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                            ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                            ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                           ; 3E162B16
>	v_add_i32_e32 v21, vcc, s11, v20                      ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                           ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                           ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                            ; 3E082B16
>	v_add_i32_e32 v21, vcc, s10, v20                      ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                            ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s9, v20                       ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                           ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s8, v20                       ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                           ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s7, v20                       ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                           ; 3E202B16
>	v_add_i32_e32 v21, vcc, s6, v20                       ; 4A2A2806
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                           ; 3E222B16
>	v_add_i32_e32 v21, vcc, s5, v20                       ; 4A2A2805
>	v_add_i32_e32 v20, vcc, s4, v20                       ; 4A282804
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                           ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                           ; 3E262916
>	s_buffer_load_dword s4, s[0:3], 0x380                 ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                    ; BF068004
>	s_cbranch_scc1 BB0_8                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                            ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                            ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                           ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                     ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                           ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                           ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                            ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                     ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                            ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                     ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                           ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                     ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                           ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                     ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                           ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                     ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                           ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                     ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                     ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                           ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                           ; 3E262917
>	v_mul_f32_e32 v12, v12, v8                            ; 1018110C
>	v_mac_f32_e32 v12, v6, v7                             ; 3E180F06
>	v_mac_f32_e32 v12, v4, v9                             ; 3E181304
>	v_mul_f32_e32 v4, v14, v8                             ; 1008110E
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                   ; C2028101
>	v_mac_f32_e32 v4, v5, v7                              ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                             ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                   ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                   ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                   ; C2040104
>	v_mac_f32_e32 v5, v16, v7                             ; 3E0A0F10
>	v_mac_f32_e32 v4, v13, v9                             ; 3E08130D
>	v_mac_f32_e32 v5, v18, v9                             ; 3E0A1312
>	v_mac_f32_e32 v12, v11, v10                           ; 3E18150B
>	v_mac_f32_e32 v4, v15, v10                            ; 3E08150F
>	v_mac_f32_e32 v5, v19, v10                            ; 3E0A1513
>	v_add_f32_e32 v0, v0, v12                             ; 06001900
>	v_mul_f32_e32 v6, 0, v8                               ; 100C1080
>	v_add_f32_e32 v1, v1, v4                              ; 06020901
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                              ; 10080004
>	v_add_f32_e32 v3, v3, v5                              ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                              ; 100A0005
>	s_buffer_load_dword s4, s[0:3], 0x5                   ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                   ; C2028106
>	v_mac_f32_e32 v6, 0, v7                               ; 3E0C0E80
>	v_mul_f32_e32 v7, s6, v0                              ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                              ; 10000007
>	v_mac_f32_e32 v4, s8, v1                              ; 3E080208
>	s_buffer_load_dword s6, s[0:3], 0x7                   ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                              ; 3E0A0204
>	v_mac_f32_e32 v7, s5, v1                              ; 3E0E0205
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                   ; C202810B
>	v_mac_f32_e32 v0, s6, v1                              ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                              ; 3E080607
>	v_mac_f32_e32 v5, s8, v3                              ; 3E0A0608
>	s_buffer_load_dword s6, s[0:3], 0xc                   ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                   ; C203810D
>	s_buffer_load_dword s8, s[0:3], 0xe                   ; C204010E
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	v_mac_f32_e32 v6, 0, v9                               ; 3E0C1280
>	v_add_f32_e32 v6, v10, v6                             ; 060C0D0A
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                              ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                              ; 3E000605
>	v_mac_f32_e32 v4, s6, v6                              ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                              ; 3E0A0C07
>	v_mac_f32_e32 v7, s8, v6                              ; 3E0E0C08
>	v_mac_f32_e32 v0, s0, v6                              ; 3E000C00
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v0                   ; F80008CF 00070504
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1832 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4].x, GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6], GENERIC[5]
>DCL OUT[7].x, GENERIC[6]
>DCL CONST[0..9]
>DCL TEMP[0..8], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>IMM[1] FLT32 {    0.5000,     0.0000,     0.0000,     0.0000}
>  0: MAD TEMP[0], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[0].zwww
>  3: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[0].wzww
>  4: MOV TEMP[2].y, TEMP[3].xxxx
>  5: DP3 TEMP[1].x, TEMP[1].xyzz, IMM[0].wwzz
>  6: MOV TEMP[2].z, TEMP[1].xxxx
>  7: DP3 TEMP[3].x, TEMP[0].xyzz, IMM[0].zwww
>  8: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wzww
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wwzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: MUL TEMP[4], CONST[0], IN[0].xxxx
> 13: MAD TEMP[4], CONST[1], IN[0].yyyy, TEMP[4]
> 14: MAD TEMP[4], CONST[2], IN[0].zzzz, TEMP[4]
> 15: MAD TEMP[4], CONST[3], IN[0].wwww, TEMP[4]
> 16: MOV TEMP[5].xyz, IN[0].xyzx
> 17: MUL TEMP[6].x, TEMP[4].wwww, CONST[5].wwww
> 18: MOV TEMP[5].w, TEMP[6].xxxx
> 19: MOV TEMP[6].x, CONST[6].wwww
> 20: MOV TEMP[6].y, CONST[7].wwww
> 21: MOV TEMP[6].z, CONST[8].wwww
> 22: ADD TEMP[6].xyz, IN[0].xyzz, -TEMP[6].xyzz
> 23: MUL TEMP[7].xyz, CONST[6].xyzz, TEMP[6].xxxx
> 24: MAD TEMP[7].xyz, CONST[7].xyzz, TEMP[6].yyyy, TEMP[7].xyzz
> 25: MAD TEMP[6].xyz, CONST[8].xyzz, TEMP[6].zzzz, TEMP[7].xyzz
> 26: MOV TEMP[7].w, TEMP[6].zzzz
> 27: MUL TEMP[8].xy, TEMP[6].xyyy, CONST[9].xyyy
> 28: MAD TEMP[7].xy, IMM[1].xxxx, TEMP[6].zzzz, TEMP[8].xyyy
> 29: MAD TEMP[6].x, TEMP[6].zzzz, CONST[9].zzzz, CONST[9].wwww
> 30: MOV TEMP[7].z, TEMP[6].xxxx
> 31: MAD TEMP[6].x, TEMP[4].zzzz, CONST[4].yyyy, CONST[4].xxxx
> 32: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 33: POW TEMP[6].x, TEMP[6].xxxx, CONST[4].zzzz
> 34: ADD TEMP[8].x, IMM[0].zzzz, -CONST[4].wwww
> 35: MAD TEMP[6].x, CONST[4].wwww, TEMP[6].xxxx, TEMP[8].xxxx
> 36: MUL TEMP[8].xyz, TEMP[2].zxyy, TEMP[3].yzxx
> 37: MAD TEMP[8].xyz, TEMP[2].yzxx, TEMP[3].zxyy, -TEMP[8].xyzz
> 38: MUL TEMP[0].xyz, TEMP[8].xyzz, TEMP[0].wwww
> 39: MOV TEMP[3].xyz, TEMP[3].xyzx
> 40: MOV TEMP[3].w, TEMP[0].xxxx
> 41: MOV TEMP[0].xy, TEMP[0].yzyy
> 42: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[6].xxxx
> 43: MOV TEMP[8].xy, IN[3].xyxx
> 44: MOV TEMP[8].zw, IN[4].yyxy
> 45: MOV TEMP[0].zw, TEMP[2].yyxy
> 46: MOV OUT[1], TEMP[5]
> 47: MOV OUT[4].x, TEMP[6].xxxx
> 48: MOV OUT[6], TEMP[0]
> 49: MOV OUT[0], TEMP[4]
> 50: MOV OUT[5], TEMP[3]
> 51: MOV OUT[3], TEMP[8]
> 52: MOV OUT[7].x, TEMP[1].xxxx
> 53: MOV OUT[2], TEMP[7]
> 54: END
>radeonsi: Compiling shader 26
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %19 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %20 = load <16 x i8>, <16 x i8> addrspace(2)* %19, align 16, !invariant.load !0
>  %21 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %14)
>  %22 = extractelement <4 x float> %21, i32 0
>  %23 = extractelement <4 x float> %21, i32 1
>  %24 = extractelement <4 x float> %21, i32 2
>  %25 = extractelement <4 x float> %21, i32 3
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %27, i32 0, i32 %15)
>  %29 = extractelement <4 x float> %28, i32 0
>  %30 = extractelement <4 x float> %28, i32 1
>  %31 = extractelement <4 x float> %28, i32 2
>  %32 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %33 = load <16 x i8>, <16 x i8> addrspace(2)* %32, align 16, !invariant.load !0
>  %34 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %33, i32 0, i32 %16)
>  %35 = extractelement <4 x float> %34, i32 0
>  %36 = extractelement <4 x float> %34, i32 1
>  %37 = extractelement <4 x float> %34, i32 2
>  %38 = extractelement <4 x float> %34, i32 3
>  %39 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %40 = load <16 x i8>, <16 x i8> addrspace(2)* %39, align 16, !invariant.load !0
>  %41 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %40, i32 0, i32 %17)
>  %42 = extractelement <4 x float> %41, i32 0
>  %43 = extractelement <4 x float> %41, i32 1
>  %44 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %45 = load <16 x i8>, <16 x i8> addrspace(2)* %44, align 16, !invariant.load !0
>  %46 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %45, i32 0, i32 %18)
>  %47 = extractelement <4 x float> %46, i32 0
>  %48 = extractelement <4 x float> %46, i32 1
>  %49 = fmul float %35, 2.000000e+00
>  %50 = fadd float %49, -1.000000e+00
>  %51 = fmul float %36, 2.000000e+00
>  %52 = fadd float %51, -1.000000e+00
>  %53 = fmul float %37, 2.000000e+00
>  %54 = fadd float %53, -1.000000e+00
>  %55 = fmul float %38, 2.000000e+00
>  %56 = fadd float %55, -1.000000e+00
>  %57 = fmul float %29, 2.000000e+00
>  %58 = fadd float %57, -1.000000e+00
>  %59 = fmul float %30, 2.000000e+00
>  %60 = fadd float %59, -1.000000e+00
>  %61 = fmul float %31, 2.000000e+00
>  %62 = fadd float %61, -1.000000e+00
>  %63 = fmul float %60, 0.000000e+00
>  %64 = fadd float %63, %58
>  %65 = fmul float %62, 0.000000e+00
>  %66 = fadd float %64, %65
>  %67 = fmul float %58, 0.000000e+00
>  %68 = fadd float %60, %67
>  %69 = fmul float %62, 0.000000e+00
>  %70 = fadd float %68, %69
>  %71 = fmul float %58, 0.000000e+00
>  %72 = fmul float %60, 0.000000e+00
>  %73 = fadd float %72, %71
>  %74 = fadd float %73, %62
>  %75 = fmul float %52, 0.000000e+00
>  %76 = fadd float %75, %50
>  %77 = fmul float %54, 0.000000e+00
>  %78 = fadd float %76, %77
>  %79 = fmul float %50, 0.000000e+00
>  %80 = fadd float %52, %79
>  %81 = fmul float %54, 0.000000e+00
>  %82 = fadd float %80, %81
>  %83 = fmul float %50, 0.000000e+00
>  %84 = fmul float %52, 0.000000e+00
>  %85 = fadd float %84, %83
>  %86 = fadd float %85, %54
>  %87 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %88 = load <16 x i8>, <16 x i8> addrspace(2)* %87, align 16, !invariant.load !0
>  %89 = call float @llvm.SI.load.const(<16 x i8> %88, i32 0)
>  %90 = fmul float %89, %22
>  %91 = call float @llvm.SI.load.const(<16 x i8> %88, i32 4)
>  %92 = fmul float %91, %22
>  %93 = call float @llvm.SI.load.const(<16 x i8> %88, i32 8)
>  %94 = fmul float %93, %22
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = call float @llvm.SI.load.const(<16 x i8> %96, i32 12)
>  %98 = fmul float %97, %22
>  %99 = call float @llvm.SI.load.const(<16 x i8> %96, i32 16)
>  %100 = fmul float %99, %23
>  %101 = fadd float %100, %90
>  %102 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %103 = load <16 x i8>, <16 x i8> addrspace(2)* %102, align 16, !invariant.load !0
>  %104 = call float @llvm.SI.load.const(<16 x i8> %103, i32 20)
>  %105 = fmul float %104, %23
>  %106 = fadd float %105, %92
>  %107 = call float @llvm.SI.load.const(<16 x i8> %103, i32 24)
>  %108 = fmul float %107, %23
>  %109 = fadd float %108, %94
>  %110 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %111 = load <16 x i8>, <16 x i8> addrspace(2)* %110, align 16, !invariant.load !0
>  %112 = call float @llvm.SI.load.const(<16 x i8> %111, i32 28)
>  %113 = fmul float %112, %23
>  %114 = fadd float %113, %98
>  %115 = call float @llvm.SI.load.const(<16 x i8> %111, i32 32)
>  %116 = fmul float %115, %24
>  %117 = fadd float %116, %101
>  %118 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %119 = load <16 x i8>, <16 x i8> addrspace(2)* %118, align 16, !invariant.load !0
>  %120 = call float @llvm.SI.load.const(<16 x i8> %119, i32 36)
>  %121 = fmul float %120, %24
>  %122 = fadd float %121, %106
>  %123 = call float @llvm.SI.load.const(<16 x i8> %119, i32 40)
>  %124 = fmul float %123, %24
>  %125 = fadd float %124, %109
>  %126 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %127 = load <16 x i8>, <16 x i8> addrspace(2)* %126, align 16, !invariant.load !0
>  %128 = call float @llvm.SI.load.const(<16 x i8> %127, i32 44)
>  %129 = fmul float %128, %24
>  %130 = fadd float %129, %114
>  %131 = call float @llvm.SI.load.const(<16 x i8> %127, i32 48)
>  %132 = fmul float %131, %25
>  %133 = fadd float %132, %117
>  %134 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %135 = load <16 x i8>, <16 x i8> addrspace(2)* %134, align 16, !invariant.load !0
>  %136 = call float @llvm.SI.load.const(<16 x i8> %135, i32 52)
>  %137 = fmul float %136, %25
>  %138 = fadd float %137, %122
>  %139 = call float @llvm.SI.load.const(<16 x i8> %135, i32 56)
>  %140 = fmul float %139, %25
>  %141 = fadd float %140, %125
>  %142 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %143 = load <16 x i8>, <16 x i8> addrspace(2)* %142, align 16, !invariant.load !0
>  %144 = call float @llvm.SI.load.const(<16 x i8> %143, i32 60)
>  %145 = fmul float %144, %25
>  %146 = fadd float %145, %130
>  %147 = call float @llvm.SI.load.const(<16 x i8> %143, i32 92)
>  %148 = fmul float %146, %147
>  %149 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %150 = load <16 x i8>, <16 x i8> addrspace(2)* %149, align 16, !invariant.load !0
>  %151 = call float @llvm.SI.load.const(<16 x i8> %150, i32 108)
>  %152 = call float @llvm.SI.load.const(<16 x i8> %150, i32 124)
>  %153 = call float @llvm.SI.load.const(<16 x i8> %150, i32 140)
>  %154 = fsub float %22, %151
>  %155 = fsub float %23, %152
>  %156 = fsub float %24, %153
>  %157 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %158 = load <16 x i8>, <16 x i8> addrspace(2)* %157, align 16, !invariant.load !0
>  %159 = call float @llvm.SI.load.const(<16 x i8> %158, i32 96)
>  %160 = fmul float %159, %154
>  %161 = call float @llvm.SI.load.const(<16 x i8> %158, i32 100)
>  %162 = fmul float %161, %154
>  %163 = call float @llvm.SI.load.const(<16 x i8> %158, i32 104)
>  %164 = fmul float %163, %154
>  %165 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %166 = load <16 x i8>, <16 x i8> addrspace(2)* %165, align 16, !invariant.load !0
>  %167 = call float @llvm.SI.load.const(<16 x i8> %166, i32 112)
>  %168 = fmul float %167, %155
>  %169 = fadd float %168, %160
>  %170 = call float @llvm.SI.load.const(<16 x i8> %166, i32 116)
>  %171 = fmul float %170, %155
>  %172 = fadd float %171, %162
>  %173 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %174 = load <16 x i8>, <16 x i8> addrspace(2)* %173, align 16, !invariant.load !0
>  %175 = call float @llvm.SI.load.const(<16 x i8> %174, i32 120)
>  %176 = fmul float %175, %155
>  %177 = fadd float %176, %164
>  %178 = call float @llvm.SI.load.const(<16 x i8> %174, i32 128)
>  %179 = fmul float %178, %156
>  %180 = fadd float %179, %169
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = call float @llvm.SI.load.const(<16 x i8> %182, i32 132)
>  %184 = fmul float %183, %156
>  %185 = fadd float %184, %172
>  %186 = call float @llvm.SI.load.const(<16 x i8> %182, i32 136)
>  %187 = fmul float %186, %156
>  %188 = fadd float %187, %177
>  %189 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %190 = load <16 x i8>, <16 x i8> addrspace(2)* %189, align 16, !invariant.load !0
>  %191 = call float @llvm.SI.load.const(<16 x i8> %190, i32 144)
>  %192 = fmul float %180, %191
>  %193 = call float @llvm.SI.load.const(<16 x i8> %190, i32 148)
>  %194 = fmul float %185, %193
>  %195 = fmul float %188, 5.000000e-01
>  %196 = fadd float %195, %192
>  %197 = fmul float %188, 5.000000e-01
>  %198 = fadd float %197, %194
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 152)
>  %202 = call float @llvm.SI.load.const(<16 x i8> %200, i32 156)
>  %203 = fmul float %188, %201
>  %204 = fadd float %203, %202
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 68)
>  %206 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %207 = load <16 x i8>, <16 x i8> addrspace(2)* %206, align 16, !invariant.load !0
>  %208 = call float @llvm.SI.load.const(<16 x i8> %207, i32 64)
>  %209 = fmul float %141, %205
>  %210 = fadd float %209, %208
>  %211 = call float @llvm.AMDGPU.clamp.(float %210, float 0.000000e+00, float 1.000000e+00)
>  %212 = call float @llvm.SI.load.const(<16 x i8> %207, i32 72)
>  %213 = call float @llvm.pow.f32(float %211, float %212)
>  %214 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %215 = load <16 x i8>, <16 x i8> addrspace(2)* %214, align 16, !invariant.load !0
>  %216 = call float @llvm.SI.load.const(<16 x i8> %215, i32 76)
>  %217 = fsub float 1.000000e+00, %216
>  %218 = call float @llvm.SI.load.const(<16 x i8> %215, i32 76)
>  %219 = fmul float %218, %213
>  %220 = fadd float %219, %217
>  %221 = fmul float %74, %82
>  %222 = fmul float %66, %86
>  %223 = fmul float %70, %78
>  %224 = fmul float %70, %86
>  %225 = fsub float %224, %221
>  %226 = fmul float %74, %78
>  %227 = fsub float %226, %222
>  %228 = fmul float %66, %82
>  %229 = fsub float %228, %223
>  %230 = fmul float %225, %56
>  %231 = fmul float %227, %56
>  %232 = fmul float %229, %56
>  %233 = fmul float %220, %220
>  %234 = bitcast i32 %12 to float
>  %235 = insertvalue <{ float, float, float }> undef, float %234, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %22, float %23, float %24, float %148)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %196, float %198, float %204, float %188)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %42, float %43, float %47, float %48)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %233, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %78, float %82, float %86, float %230)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %231, float %232, float %66, float %70)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %74, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %133, float %138, float %141, float %146)
>  ret <{ float, float, float }> %235
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3].x, GENERIC[3], PERSPECTIVE
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[5], PERSPECTIVE, CENTROID
>DCL IN[6].x, GENERIC[6], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..15]
>DCL TEMP[0..14], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     6.0000,     0.0000,    -0.5000}
>IMM[2] FLT32 {    4.0000,     5.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[4].wwww
>  1: MOV TEMP[0].yz, IN[5].yxyy
>  2: MOV TEMP[1].xy, IN[5].zwzz
>  3: MOV TEMP[1].z, IN[6].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[6], 2D
> 13: MOV TEMP[4].xy, IN[2].zwww
> 14: TEX TEMP[4].y, TEMP[4], SAMP[7], 2D
> 15: MUL TEMP[4].x, TEMP[3].yyyy, TEMP[4].yyyy
> 16: MOV TEMP[5].xy, IN[2].xyyy
> 17: TEX TEMP[5].yw, TEMP[5], SAMP[5], 2D
> 18: MAD TEMP[5].xy, TEMP[5].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 19: DP2 TEMP[6].x, TEMP[5].xyyy, TEMP[5].xyyy
> 20: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 21: ADD TEMP[6].x, IMM[0].zzzz, -TEMP[6].xxxx
> 22: SQRT TEMP[6].x, TEMP[6].xxxx
> 23: MUL TEMP[7].xyz, IN[4].xyzz, TEMP[5].xxxx
> 24: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[5].yyyy, TEMP[7].xyzz
> 25: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[6].xxxx, TEMP[0].xyzz
> 26: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[2].xyzz
> 27: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[0].xyzz
> 28: MUL TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz
> 29: ADD TEMP[5].xyz, TEMP[2].xyzz, -TEMP[5].xyzz
> 30: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 31: ADD TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 32: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[1].xyzz
> 33: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
> 34: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 35: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[6].xxxx
> 36: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 37: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 38: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 39: MUL TEMP[5].x, TEMP[4].xxxx, TEMP[5].xxxx
> 40: MAD TEMP[1].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 41: MUL TEMP[6], CONST[4], TEMP[1].xxxx
> 42: MAD TEMP[6], CONST[5], TEMP[1].yyyy, TEMP[6]
> 43: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[6]
> 44: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 45: MOV TEMP[6].xyz, TEMP[0].xyzz
> 46: TEX TEMP[6], TEMP[6], SAMP[1], CUBE
> 47: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[2].xyzz
> 48: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[0].xyzz
> 49: MAD TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz, -TEMP[2].xyzz
> 50: ADD TEMP[8].x, IMM[0].wwww, -TEMP[3].zzzz
> 51: MUL TEMP[8].x, TEMP[8].xxxx, IMM[1].yyyy
> 52: MOV TEMP[9].x, CONST[11].wwww
> 53: MOV TEMP[9].y, CONST[12].wwww
> 54: MOV TEMP[9].z, CONST[13].wwww
> 55: ADD TEMP[9].xyz, TEMP[9].xyzz, -IN[0].xyzz
> 56: DP3 TEMP[10].x, TEMP[9].xyzz, TEMP[9].xyzz
> 57: SQRT TEMP[10].x, TEMP[10].xxxx
> 58: MOV TEMP[11].yz, IMM[1].zzzz
> 59: MAD TEMP[11].x, TEMP[10].xxxx, CONST[14].zzzz, CONST[14].wwww
> 60: MOV TEMP[12].yz, IMM[1].zzzz
> 61: MOV TEMP[12].x, IN[1].zzzz
> 62: MOV TEMP[13].yz, IMM[1].zzzz
> 63: MOV TEMP[14].xy, IN[1].xyyy
> 64: MOV TEMP[14].w, IN[1].wwww
> 65: TXP TEMP[14].w, TEMP[14], SAMP[3], 2D
> 66: MUL TEMP[13].x, TEMP[14].wwww, TEMP[14].wwww
> 67: MOV TEMP[14].xy, TEMP[1].xyyy
> 68: MOV TEMP[14].w, IMM[0].wwww
> 69: MOV TEMP[14].z, TEMP[1].zzzz
> 70: TXP TEMP[1].x, TEMP[14], SAMP[0], SHADOW2D
> 71: RCP TEMP[10].x, TEMP[10].xxxx
> 72: MUL TEMP[9].xyz, TEMP[9].xyzz, TEMP[10].xxxx
> 73: DP3 TEMP[9].x, TEMP[9].xyzz, TEMP[0].xyzz
> 74: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 75: ADD TEMP[10].xyz, TEMP[11].xyzz, IMM[1].wwww
> 76: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[0].xxxx
> 77: ADD TEMP[10].xyz, IMM[0].wwww, -TEMP[10].xyzz
> 78: MOV_SAT TEMP[10].xyz, TEMP[10].xyzz
> 79: MUL TEMP[10].xyz, TEMP[13].xyzz, TEMP[10].xyzz
> 80: MOV_SAT TEMP[11].xyz, TEMP[12].xyzz
> 81: MUL TEMP[10].x, TEMP[10].xyzz, TEMP[11].xyzz
> 82: MUL TEMP[10].xyz, CONST[15].xyzz, TEMP[10].xxxx
> 83: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[4].xxxx
> 84: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[6].wwww
> 85: MUL TEMP[11].x, IMM[2].xxxx, TEMP[4].xxxx
> 86: DP3 TEMP[12].x, -CONST[1].xyzz, TEMP[0].xyzz
> 87: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 88: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 89: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 90: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].xxxx
> 91: MUL TEMP[1].xyz, TEMP[12].xxxx, TEMP[1].xyzz
> 92: MAD TEMP[1].xyz, TEMP[6].xyzz, TEMP[11].xxxx, TEMP[1].xyzz
> 93: MAD TEMP[1].xyz, TEMP[9].xxxx, TEMP[10].xyzz, TEMP[1].xyzz
> 94: MOV TEMP[4].xy, IN[2].xyyy
> 95: TEX TEMP[4].xyz, TEMP[4], SAMP[4], 2D
> 96: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
> 97: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 98: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
> 99: POW TEMP[0].x, TEMP[0].xxxx, IMM[2].yyyy
>100: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[1].zzzz
>101: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
>102: MOV TEMP[2].xyz, TEMP[7].xyzz
>103: MOV TEMP[2].w, TEMP[8].xxxx
>104: TXL TEMP[2].xyz, TEMP[2], SAMP[2], CUBE
>105: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>106: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[5].xxxx
>107: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[4].xyzz, TEMP[0].xyzz
>108: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>109: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].zzzz
>110: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>111: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].zzzz
>112: RCP TEMP[2].x, TEMP[2].xxxx
>113: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>114: FRC TEMP[2].x, CONST[1].wwww
>115: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].wwww
>116: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>117: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>118: MUL TEMP[1].x, IN[3].xxxx, TEMP[1].xxxx
>119: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>120: MOV TEMP[0].w, IN[0].wwww
>121: MOV OUT[0], TEMP[0]
>122: END
>radeonsi: Compiling shader 27
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 27, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 31, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = fmul float %78, %96
>  %98 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %99 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %100 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %101 = load <8 x i32>, <8 x i32> addrspace(2)* %100, align 32, !invariant.load !0
>  %102 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %103 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %102, i64 0, i64 23, !amdgpu.uniform !0
>  %104 = load <4 x i32>, <4 x i32> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = extractelement <8 x i32> %101, i32 7
>  %106 = extractelement <4 x i32> %104, i32 0
>  %107 = and i32 %106, %105
>  %108 = insertelement <4 x i32> %104, i32 %107, i32 0
>  %109 = bitcast float %98 to i32
>  %110 = bitcast float %99 to i32
>  %111 = insertelement <2 x i32> undef, i32 %109, i32 0
>  %112 = insertelement <2 x i32> %111, i32 %110, i32 1
>  %113 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %112, <8 x i32> %101, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %114 = extractelement <4 x float> %113, i32 1
>  %115 = extractelement <4 x float> %113, i32 3
>  %116 = fmul float %115, 2.000000e+00
>  %117 = fadd float %116, -1.000000e+00
>  %118 = fmul float %114, 2.000000e+00
>  %119 = fadd float %118, -1.000000e+00
>  %120 = fmul float %117, %117
>  %121 = fmul float %119, %119
>  %122 = fadd float %120, %121
>  %123 = call float @llvm.AMDGPU.clamp.(float %122, float 0.000000e+00, float 1.000000e+00)
>  %124 = fsub float 0x3FF00418A0000000, %123
>  %125 = call float @llvm.sqrt.f32(float %124)
>  %126 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %127 = fmul float %126, %117
>  %128 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %129 = fmul float %128, %117
>  %130 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %131 = fmul float %130, %117
>  %132 = fmul float %23, %119
>  %133 = fadd float %132, %127
>  %134 = fmul float %24, %119
>  %135 = fadd float %134, %129
>  %136 = fmul float %25, %119
>  %137 = fadd float %136, %131
>  %138 = fmul float %59, %125
>  %139 = fadd float %138, %133
>  %140 = fmul float %60, %125
>  %141 = fadd float %140, %135
>  %142 = fmul float %61, %125
>  %143 = fadd float %142, %137
>  %144 = fmul float %139, %49
>  %145 = fmul float %141, %50
>  %146 = fadd float %145, %144
>  %147 = fmul float %143, %51
>  %148 = fadd float %146, %147
>  %149 = fmul float %148, %139
>  %150 = fmul float %148, %141
>  %151 = fmul float %148, %143
>  %152 = fmul float %149, 2.000000e+00
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fmul float %151, 2.000000e+00
>  %155 = fsub float %49, %152
>  %156 = fsub float %50, %153
>  %157 = fsub float %51, %154
>  %158 = fmul float %155, %59
>  %159 = fmul float %156, %60
>  %160 = fadd float %159, %158
>  %161 = fmul float %157, %61
>  %162 = fadd float %160, %161
>  %163 = fadd float %162, 1.000000e+00
>  %164 = fmul float %49, %59
>  %165 = fmul float %50, %60
>  %166 = fadd float %165, %164
>  %167 = fmul float %51, %61
>  %168 = fadd float %166, %167
>  %169 = fsub float 1.000000e+00, %168
>  %170 = call float @llvm.AMDGPU.clamp.(float %169, float 0.000000e+00, float 1.000000e+00)
>  %171 = fsub float %163, %170
>  %172 = call float @llvm.AMDGPU.clamp.(float %171, float 0.000000e+00, float 1.000000e+00)
>  %173 = fsub float 1.000000e+00, %172
>  %174 = fmul float %173, %173
>  %175 = fmul float %97, %174
>  %176 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %177 = fmul float %59, 0x4007700140000000
>  %178 = fadd float %177, %176
>  %179 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %180 = fmul float %60, 0x4007700140000000
>  %181 = fadd float %180, %179
>  %182 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %183 = fmul float %61, 0x4007700140000000
>  %184 = fadd float %183, %182
>  %185 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %186 = load <16 x i8>, <16 x i8> addrspace(2)* %185, align 16, !invariant.load !0
>  %187 = call float @llvm.SI.load.const(<16 x i8> %186, i32 64)
>  %188 = fmul float %187, %178
>  %189 = call float @llvm.SI.load.const(<16 x i8> %186, i32 68)
>  %190 = fmul float %189, %178
>  %191 = call float @llvm.SI.load.const(<16 x i8> %186, i32 72)
>  %192 = fmul float %191, %178
>  %193 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %194 = load <16 x i8>, <16 x i8> addrspace(2)* %193, align 16, !invariant.load !0
>  %195 = call float @llvm.SI.load.const(<16 x i8> %194, i32 80)
>  %196 = fmul float %195, %181
>  %197 = fadd float %196, %188
>  %198 = call float @llvm.SI.load.const(<16 x i8> %194, i32 84)
>  %199 = fmul float %198, %181
>  %200 = fadd float %199, %190
>  %201 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %202 = load <16 x i8>, <16 x i8> addrspace(2)* %201, align 16, !invariant.load !0
>  %203 = call float @llvm.SI.load.const(<16 x i8> %202, i32 88)
>  %204 = fmul float %203, %181
>  %205 = fadd float %204, %192
>  %206 = call float @llvm.SI.load.const(<16 x i8> %202, i32 96)
>  %207 = fmul float %206, %184
>  %208 = fadd float %207, %197
>  %209 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %210 = load <16 x i8>, <16 x i8> addrspace(2)* %209, align 16, !invariant.load !0
>  %211 = call float @llvm.SI.load.const(<16 x i8> %210, i32 100)
>  %212 = fmul float %211, %184
>  %213 = fadd float %212, %200
>  %214 = call float @llvm.SI.load.const(<16 x i8> %210, i32 104)
>  %215 = fmul float %214, %184
>  %216 = fadd float %215, %205
>  %217 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %218 = load <16 x i8>, <16 x i8> addrspace(2)* %217, align 16, !invariant.load !0
>  %219 = call float @llvm.SI.load.const(<16 x i8> %218, i32 112)
>  %220 = fadd float %208, %219
>  %221 = call float @llvm.SI.load.const(<16 x i8> %218, i32 116)
>  %222 = fadd float %213, %221
>  %223 = call float @llvm.SI.load.const(<16 x i8> %218, i32 120)
>  %224 = fadd float %216, %223
>  %225 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %226 = load <8 x i32>, <8 x i32> addrspace(2)* %225, align 32, !invariant.load !0
>  %227 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %228 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %227, i64 0, i64 7, !amdgpu.uniform !0
>  %229 = load <4 x i32>, <4 x i32> addrspace(2)* %228, align 16, !invariant.load !0
>  %230 = extractelement <8 x i32> %226, i32 7
>  %231 = extractelement <4 x i32> %229, i32 0
>  %232 = and i32 %231, %230
>  %233 = insertelement <4 x i32> %229, i32 %232, i32 0
>  %234 = call float @llvm.amdgcn.cubetc(float %139, float %141, float %143)
>  %235 = call float @llvm.amdgcn.cubesc(float %139, float %141, float %143)
>  %236 = call float @llvm.amdgcn.cubema(float %139, float %141, float %143)
>  %237 = call float @llvm.amdgcn.cubeid(float %139, float %141, float %143)
>  %238 = call float @llvm.fabs.f32(float %236)
>  %239 = fdiv float 1.000000e+00, %238, !fpmath !1
>  %240 = fmul float %234, %239
>  %241 = fadd float %240, 1.500000e+00
>  %242 = fmul float %235, %239
>  %243 = fadd float %242, 1.500000e+00
>  %244 = bitcast float %243 to i32
>  %245 = bitcast float %241 to i32
>  %246 = bitcast float %237 to i32
>  %247 = insertelement <4 x i32> undef, i32 %244, i32 0
>  %248 = insertelement <4 x i32> %247, i32 %245, i32 1
>  %249 = insertelement <4 x i32> %248, i32 %246, i32 2
>  %250 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %249, <8 x i32> %226, <4 x i32> %233, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %251 = extractelement <4 x float> %250, i32 0
>  %252 = extractelement <4 x float> %250, i32 1
>  %253 = extractelement <4 x float> %250, i32 2
>  %254 = extractelement <4 x float> %250, i32 3
>  %255 = fmul float %139, %49
>  %256 = fmul float %141, %50
>  %257 = fadd float %256, %255
>  %258 = fmul float %143, %51
>  %259 = fadd float %257, %258
>  %260 = fmul float %259, %139
>  %261 = fmul float %259, %141
>  %262 = fmul float %259, %143
>  %263 = fmul float %260, 2.000000e+00
>  %264 = fsub float %263, %49
>  %265 = fmul float %261, 2.000000e+00
>  %266 = fsub float %265, %50
>  %267 = fmul float %262, 2.000000e+00
>  %268 = fsub float %267, %51
>  %269 = fsub float 1.000000e+00, %79
>  %270 = fmul float %269, 6.000000e+00
>  %271 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %272 = load <16 x i8>, <16 x i8> addrspace(2)* %271, align 16, !invariant.load !0
>  %273 = call float @llvm.SI.load.const(<16 x i8> %272, i32 188)
>  %274 = call float @llvm.SI.load.const(<16 x i8> %272, i32 204)
>  %275 = call float @llvm.SI.load.const(<16 x i8> %272, i32 220)
>  %276 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %277 = fsub float %273, %276
>  %278 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %279 = fsub float %274, %278
>  %280 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %281 = fsub float %275, %280
>  %282 = fmul float %277, %277
>  %283 = fmul float %279, %279
>  %284 = fadd float %283, %282
>  %285 = fmul float %281, %281
>  %286 = fadd float %284, %285
>  %287 = call float @llvm.sqrt.f32(float %286)
>  %288 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %289 = load <16 x i8>, <16 x i8> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = call float @llvm.SI.load.const(<16 x i8> %289, i32 232)
>  %291 = call float @llvm.SI.load.const(<16 x i8> %289, i32 236)
>  %292 = fmul float %287, %290
>  %293 = fadd float %292, %291
>  %294 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %295 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %296 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %297 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %298 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %299 = load <8 x i32>, <8 x i32> addrspace(2)* %298, align 32, !invariant.load !0
>  %300 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %301 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %300, i64 0, i64 15, !amdgpu.uniform !0
>  %302 = load <4 x i32>, <4 x i32> addrspace(2)* %301, align 16, !invariant.load !0
>  %303 = extractelement <8 x i32> %299, i32 7
>  %304 = extractelement <4 x i32> %302, i32 0
>  %305 = and i32 %304, %303
>  %306 = insertelement <4 x i32> %302, i32 %305, i32 0
>  %307 = fdiv float %295, %297, !fpmath !1
>  %308 = fdiv float %296, %297, !fpmath !1
>  %309 = bitcast float %307 to i32
>  %310 = bitcast float %308 to i32
>  %311 = insertelement <2 x i32> undef, i32 %309, i32 0
>  %312 = insertelement <2 x i32> %311, i32 %310, i32 1
>  %313 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %312, <8 x i32> %299, <4 x i32> %306, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %314 = extractelement <4 x float> %313, i32 3
>  %315 = fmul float %314, %314
>  %316 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %317 = load <8 x i32>, <8 x i32> addrspace(2)* %316, align 32, !invariant.load !0
>  %318 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %319 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %318, i64 0, i64 3, !amdgpu.uniform !0
>  %320 = load <4 x i32>, <4 x i32> addrspace(2)* %319, align 16, !invariant.load !0
>  %321 = extractelement <8 x i32> %317, i32 7
>  %322 = extractelement <4 x i32> %320, i32 0
>  %323 = and i32 %322, %321
>  %324 = insertelement <4 x i32> %320, i32 %323, i32 0
>  %325 = bitcast float %224 to i32
>  %326 = bitcast float %220 to i32
>  %327 = bitcast float %222 to i32
>  %328 = insertelement <4 x i32> undef, i32 %325, i32 0
>  %329 = insertelement <4 x i32> %328, i32 %326, i32 1
>  %330 = insertelement <4 x i32> %329, i32 %327, i32 2
>  %331 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %330, <8 x i32> %317, <4 x i32> %324, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %332 = extractelement <4 x float> %331, i32 0
>  %333 = fdiv float 1.000000e+00, %287, !fpmath !1
>  %334 = fmul float %277, %333
>  %335 = fmul float %279, %333
>  %336 = fmul float %281, %333
>  %337 = fmul float %334, %139
>  %338 = fmul float %335, %141
>  %339 = fadd float %338, %337
>  %340 = fmul float %336, %143
>  %341 = fadd float %339, %340
>  %342 = call float @llvm.AMDGPU.clamp.(float %341, float 0.000000e+00, float 1.000000e+00)
>  %343 = fadd float %293, -5.000000e-01
>  %344 = fmul float %343, 2.000000e+00
>  %345 = fsub float 1.000000e+00, %344
>  %346 = call float @llvm.AMDGPU.clamp.(float %345, float 0.000000e+00, float 1.000000e+00)
>  %347 = fmul float %315, %346
>  %348 = call float @llvm.AMDGPU.clamp.(float %294, float 0.000000e+00, float 1.000000e+00)
>  %349 = fmul float %347, %348
>  %350 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %351 = load <16 x i8>, <16 x i8> addrspace(2)* %350, align 16, !invariant.load !0
>  %352 = call float @llvm.SI.load.const(<16 x i8> %351, i32 240)
>  %353 = fmul float %352, %349
>  %354 = call float @llvm.SI.load.const(<16 x i8> %351, i32 244)
>  %355 = fmul float %354, %349
>  %356 = call float @llvm.SI.load.const(<16 x i8> %351, i32 248)
>  %357 = fmul float %356, %349
>  %358 = fmul float %353, %97
>  %359 = fmul float %355, %97
>  %360 = fmul float %357, %97
>  %361 = fmul float %251, %254
>  %362 = fmul float %252, %254
>  %363 = fmul float %253, %254
>  %364 = fmul float %97, 4.000000e+00
>  %365 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %366 = load <16 x i8>, <16 x i8> addrspace(2)* %365, align 16, !invariant.load !0
>  %367 = call float @llvm.SI.load.const(<16 x i8> %366, i32 16)
>  %368 = call float @llvm.SI.load.const(<16 x i8> %366, i32 20)
>  %369 = call float @llvm.SI.load.const(<16 x i8> %366, i32 24)
>  %370 = fmul float %367, %139
>  %371 = fsub float -0.000000e+00, %370
>  %372 = fmul float %368, %141
>  %373 = fsub float %371, %372
>  %374 = fmul float %369, %143
>  %375 = fsub float %373, %374
>  %376 = call float @llvm.AMDGPU.clamp.(float %375, float 0.000000e+00, float 1.000000e+00)
>  %377 = fmul float %332, %332
>  %378 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %379 = load <16 x i8>, <16 x i8> addrspace(2)* %378, align 16, !invariant.load !0
>  %380 = call float @llvm.SI.load.const(<16 x i8> %379, i32 48)
>  %381 = fmul float %380, %377
>  %382 = call float @llvm.SI.load.const(<16 x i8> %379, i32 52)
>  %383 = fmul float %382, %377
>  %384 = call float @llvm.SI.load.const(<16 x i8> %379, i32 56)
>  %385 = fmul float %384, %377
>  %386 = fmul float %381, %97
>  %387 = fmul float %383, %97
>  %388 = fmul float %385, %97
>  %389 = fmul float %376, %386
>  %390 = fmul float %376, %387
>  %391 = fmul float %376, %388
>  %392 = fmul float %361, %364
>  %393 = fadd float %392, %389
>  %394 = fmul float %362, %364
>  %395 = fadd float %394, %390
>  %396 = fmul float %363, %364
>  %397 = fadd float %396, %391
>  %398 = fmul float %342, %358
>  %399 = fadd float %398, %393
>  %400 = fmul float %342, %359
>  %401 = fadd float %400, %395
>  %402 = fmul float %342, %360
>  %403 = fadd float %402, %397
>  %404 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %405 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %406 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %407 = load <8 x i32>, <8 x i32> addrspace(2)* %406, align 32, !invariant.load !0
>  %408 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %409 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %408, i64 0, i64 19, !amdgpu.uniform !0
>  %410 = load <4 x i32>, <4 x i32> addrspace(2)* %409, align 16, !invariant.load !0
>  %411 = extractelement <8 x i32> %407, i32 7
>  %412 = extractelement <4 x i32> %410, i32 0
>  %413 = and i32 %412, %411
>  %414 = insertelement <4 x i32> %410, i32 %413, i32 0
>  %415 = bitcast float %404 to i32
>  %416 = bitcast float %405 to i32
>  %417 = insertelement <2 x i32> undef, i32 %415, i32 0
>  %418 = insertelement <2 x i32> %417, i32 %416, i32 1
>  %419 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %418, <8 x i32> %407, <4 x i32> %414, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %420 = extractelement <4 x float> %419, i32 0
>  %421 = extractelement <4 x float> %419, i32 1
>  %422 = extractelement <4 x float> %419, i32 2
>  %423 = fmul float %49, %139
>  %424 = fmul float %50, %141
>  %425 = fadd float %424, %423
>  %426 = fmul float %51, %143
>  %427 = fadd float %425, %426
>  %428 = call float @llvm.AMDGPU.clamp.(float %427, float 0.000000e+00, float 1.000000e+00)
>  %429 = fsub float 1.000000e+00, %428
>  %430 = call float @llvm.pow.f32(float %429, float 5.000000e+00)
>  %431 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %432 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %433 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %434 = fmul float %430, %431
>  %435 = fmul float %430, %432
>  %436 = fmul float %430, %433
>  %437 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %438 = load <8 x i32>, <8 x i32> addrspace(2)* %437, align 32, !invariant.load !0
>  %439 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %440 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %439, i64 0, i64 11, !amdgpu.uniform !0
>  %441 = load <4 x i32>, <4 x i32> addrspace(2)* %440, align 16, !invariant.load !0
>  %442 = extractelement <8 x i32> %438, i32 7
>  %443 = extractelement <4 x i32> %441, i32 0
>  %444 = and i32 %443, %442
>  %445 = insertelement <4 x i32> %441, i32 %444, i32 0
>  %446 = call float @llvm.amdgcn.cubetc(float %264, float %266, float %268)
>  %447 = call float @llvm.amdgcn.cubesc(float %264, float %266, float %268)
>  %448 = call float @llvm.amdgcn.cubema(float %264, float %266, float %268)
>  %449 = call float @llvm.amdgcn.cubeid(float %264, float %266, float %268)
>  %450 = call float @llvm.fabs.f32(float %448)
>  %451 = fdiv float 1.000000e+00, %450, !fpmath !1
>  %452 = fmul float %446, %451
>  %453 = fadd float %452, 1.500000e+00
>  %454 = fmul float %447, %451
>  %455 = fadd float %454, 1.500000e+00
>  %456 = bitcast float %455 to i32
>  %457 = bitcast float %453 to i32
>  %458 = bitcast float %449 to i32
>  %459 = bitcast float %270 to i32
>  %460 = insertelement <4 x i32> undef, i32 %456, i32 0
>  %461 = insertelement <4 x i32> %460, i32 %457, i32 1
>  %462 = insertelement <4 x i32> %461, i32 %458, i32 2
>  %463 = insertelement <4 x i32> %462, i32 %459, i32 3
>  %464 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %463, <8 x i32> %438, <4 x i32> %445, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %465 = extractelement <4 x float> %464, i32 0
>  %466 = extractelement <4 x float> %464, i32 1
>  %467 = extractelement <4 x float> %464, i32 2
>  %468 = fmul float %434, %465
>  %469 = fmul float %435, %466
>  %470 = fmul float %436, %467
>  %471 = fmul float %468, %175
>  %472 = fmul float %469, %175
>  %473 = fmul float %470, %175
>  %474 = fmul float %399, %420
>  %475 = fadd float %474, %471
>  %476 = fmul float %401, %421
>  %477 = fadd float %476, %472
>  %478 = fmul float %403, %422
>  %479 = fadd float %478, %473
>  %480 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %481 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %482 = load <16 x i8>, <16 x i8> addrspace(2)* %481, align 16, !invariant.load !0
>  %483 = call float @llvm.SI.load.const(<16 x i8> %482, i32 12)
>  %484 = fsub float %480, %483
>  %485 = call float @llvm.maxnum.f32(float %484, float 0.000000e+00)
>  %486 = call float @llvm.SI.load.const(<16 x i8> %482, i32 28)
>  %487 = call float @llvm.SI.load.const(<16 x i8> %482, i32 12)
>  %488 = fsub float %486, %487
>  %489 = fadd float %488, 0x3F50624DE0000000
>  %490 = fdiv float 1.000000e+00, %489, !fpmath !1
>  %491 = fmul float %485, %490
>  %492 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %493 = load <16 x i8>, <16 x i8> addrspace(2)* %492, align 16, !invariant.load !0
>  %494 = call float @llvm.SI.load.const(<16 x i8> %493, i32 28)
>  %495 = call float @llvm.floor.f32(float %494)
>  %496 = fsub float %494, %495
>  %497 = fmul float %496, 8.000000e+00
>  %498 = call float @llvm.pow.f32(float %491, float %497)
>  %499 = call float @llvm.AMDGPU.clamp.(float %498, float 0.000000e+00, float 1.000000e+00)
>  %500 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %501 = fmul float %500, %499
>  %502 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %503 = load <16 x i8>, <16 x i8> addrspace(2)* %502, align 16, !invariant.load !0
>  %504 = call float @llvm.SI.load.const(<16 x i8> %503, i32 32)
>  %505 = fsub float 1.000000e+00, %501
>  %506 = fmul float %475, %501
>  %507 = fmul float %504, %505
>  %508 = fadd float %506, %507
>  %509 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %510 = load <16 x i8>, <16 x i8> addrspace(2)* %509, align 16, !invariant.load !0
>  %511 = call float @llvm.SI.load.const(<16 x i8> %510, i32 36)
>  %512 = fsub float 1.000000e+00, %501
>  %513 = fmul float %477, %501
>  %514 = fmul float %511, %512
>  %515 = fadd float %513, %514
>  %516 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %517 = load <16 x i8>, <16 x i8> addrspace(2)* %516, align 16, !invariant.load !0
>  %518 = call float @llvm.SI.load.const(<16 x i8> %517, i32 40)
>  %519 = fsub float 1.000000e+00, %501
>  %520 = fmul float %479, %501
>  %521 = fmul float %518, %519
>  %522 = fadd float %520, %521
>  %523 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %524 = bitcast float %5 to i32
>  %525 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %524, 10
>  %526 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %525, float %508, 11
>  %527 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %526, float %515, 12
>  %528 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %527, float %522, 13
>  %529 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %528, float %523, 14
>  %530 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %529, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %530
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>  0: END
>radeonsi: Compiling shader 28
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = bitcast float %5 to i32
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %23, 10
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %24, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %25
>}
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>
>radeonsi: Compiling shader 29
>Fragment Shader Epilog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps void @ps_epilog(i64 inreg, i64 inreg, i64 inreg, i64 inreg, i64 inreg, float inreg, float, float, float, float, float, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  call void @llvm.SI.export(i32 0, i32 1, i32 1, i32 9, i32 0, float undef, float undef, float undef, float undef)
>  ret void
>}
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="16777215" }
>attributes #1 = { nounwind }
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x0
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>Shader epilog disassembly:
>	exp 0, 9, 0, 1, 1, v0, v0, v0, v0 ; F8001890 00000000
>	s_endpgm                          ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 12 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>radeonsi: Compiling shader 30
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %43, float %45, 20
>  %47 = add i32 %16, %12
>  %48 = bitcast i32 %47 to float
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %46, float %48, 21
>  %50 = add i32 %16, %12
>  %51 = bitcast i32 %50 to float
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %49, float %51, 22
>  %53 = add i32 %16, %12
>  %54 = bitcast i32 %53 to float
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %52, float %54, 23
>  %56 = add i32 %16, %12
>  %57 = bitcast i32 %56 to float
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %55, float %57, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float }> %58
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_buffer_load_dword s17, s[0:3], 0x1b                   ; C208811B
>	s_buffer_load_dword s14, s[0:3], 0x18                   ; C2070118
>	s_buffer_load_dword s15, s[0:3], 0x19                   ; C2078119
>	s_buffer_load_dword s16, s[0:3], 0x1a                   ; C208011A
>	s_buffer_load_dword s21, s[0:3], 0x1f                   ; C20A811F
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_buffer_load_dword s25, s[0:3], 0x23                   ; C20C8123
>	s_buffer_load_dword s20, s[0:3], 0x1e                   ; C20A011E
>	s_buffer_load_dword s18, s[0:3], 0x1c                   ; C209011C
>	s_buffer_load_dword s19, s[0:3], 0x1d                   ; C209811D
>	s_buffer_load_dword s24, s[0:3], 0x22                   ; C20C0122
>	s_buffer_load_dword s22, s[0:3], 0x20                   ; C20B0120
>	s_buffer_load_dword s23, s[0:3], 0x21                   ; C20B8121
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_buffer_load_dword s26, s[0:3], 0x24                   ; C20D0124
>	s_buffer_load_dword s27, s[0:3], 0x25                   ; C20D8125
>	s_buffer_load_dword s28, s[0:3], 0x3                    ; C20E0103
>	s_buffer_load_dword s30, s[0:3], 0x7                    ; C20F0107
>	s_buffer_load_dword s33, s[0:3], 0xb                    ; C210810B
>	s_buffer_load_dword s8, s[0:3], 0xf                     ; C204010F
>	s_buffer_load_dword s13, s[0:3], 0x17                   ; C2068117
>	s_buffer_load_dword s9, s[0:3], 0x10                    ; C2048110
>	s_buffer_load_dword s10, s[0:3], 0x11                   ; C2050111
>	s_buffer_load_dword s11, s[0:3], 0x12                   ; C2058112
>	s_buffer_load_dword s12, s[0:3], 0x13                   ; C2060113
>	s_buffer_load_dword s29, s[0:3], 0x4                    ; C20E8104
>	s_buffer_load_dword s31, s[0:3], 0x8                    ; C20F8108
>	s_buffer_load_dword s32, s[0:3], 0x9                    ; C2100109
>	s_buffer_load_dword s34, s[0:3], 0xc                    ; C211010C
>	s_buffer_load_dword s35, s[0:3], 0xd                    ; C211810D
>	s_buffer_load_dword s36, s[0:3], 0xe                    ; C212010E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_subrev_f32_e32 v7, s17, v9                            ; 0A0E1211
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v18, s21, v10                          ; 0A241415
>	v_mul_f32_e32 v20, s14, v7                              ; 10280E0E
>	v_mul_f32_e32 v21, s15, v7                              ; 102A0E0F
>	v_mul_f32_e32 v7, s16, v7                               ; 100E0E10
>	v_subrev_f32_e32 v19, s25, v11                          ; 0A261619
>	v_mac_f32_e32 v7, s20, v18                              ; 3E0E2414
>	v_mac_f32_e32 v20, s18, v18                             ; 3E282412
>	v_mac_f32_e32 v21, s19, v18                             ; 3E2A2413
>	v_mac_f32_e32 v7, s24, v19                              ; 3E0E2618
>	v_mac_f32_e32 v20, s22, v19                             ; 3E282616
>	v_mul_f32_e32 v22, 0.5, v7                              ; 102C0EF0
>	v_mac_f32_e32 v21, s23, v19                             ; 3E2A2617
>	v_mad_f32 v23, s26, v20, v22                            ; D2820017 045A281A
>	v_mac_f32_e32 v22, s27, v21                             ; 3E2C2A1B
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	v_mul_f32_e32 v0, s28, v9                               ; 1000121C
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_mac_f32_e32 v0, s30, v10                              ; 3E00141E
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	v_mac_f32_e32 v0, s33, v11                              ; 3E001621
>	v_mac_f32_e32 v0, s8, v12                               ; 3E001808
>	v_mul_f32_e32 v1, s13, v0                               ; 1002000D
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	s_waitcnt expcnt(0) lgkmcnt(0)                          ; BF8C000F
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mac_f32_e32 v1, s4, v7                                ; 3E020E04
>	exp 15, 33, 0, 0, 0, v23, v22, v1, v7                   ; F800021F 07011617
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v1, 2.0, v3, -1.0                             ; D2820001 03CE06F4
>	v_mad_f32 v3, 2.0, v4, -1.0                             ; D2820003 03CE08F4
>	v_mad_f32 v4, 2.0, v5, -1.0                             ; D2820004 03CE0AF4
>	v_add_f32_e32 v5, v6, v6                                ; 060A0D06
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mad_f32 v6, 2.0, v13, -1.0                            ; D2820006 03CE1AF4
>	v_mad_f32 v7, 2.0, v14, -1.0                            ; D2820007 03CE1CF4
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	v_mad_f32 v8, 2.0, v15, -1.0                            ; D2820008 03CE1EF4
>	v_mad_f32 v13, 0, v7, v6                                ; D282000D 041A0E80
>	v_mad_f32 v14, 0, v6, v7                                ; D282000E 041E0C80
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	v_mac_f32_e32 v13, 0, v8                                ; 3E1A1080
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v8, 0, v7                                 ; 3E100E80
>	v_mad_f32 v7, 0, v1, v3                                 ; D2820007 040E0280
>	v_mac_f32_e32 v8, 0, v6                                 ; 3E100C80
>	v_mad_f32 v6, 0, v3, v1                                 ; D2820006 04060680
>	v_mac_f32_e32 v6, 0, v4                                 ; 3E0C0880
>	v_mac_f32_e32 v7, 0, v4                                 ; 3E0E0880
>	v_mac_f32_e32 v4, 0, v3                                 ; 3E080680
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v3, s5, v9                                ; 10061205
>	v_mac_f32_e32 v4, 0, v1                                 ; 3E080280
>	v_mul_f32_e32 v1, s4, v9                                ; 10021204
>	v_mul_f32_e32 v9, s6, v9                                ; 10121206
>	v_mac_f32_e32 v9, s8, v10                               ; 3E121408
>	v_mac_f32_e32 v9, s0, v11                               ; 3E121600
>	v_mac_f32_e32 v1, s29, v10                              ; 3E02141D
>	v_mac_f32_e32 v3, s7, v10                               ; 3E061407
>	v_mac_f32_e32 v9, s36, v12                              ; 3E121824
>	v_mov_b32_e32 v10, s9                                   ; 7E140209
>	v_mac_f32_e32 v10, s10, v9                              ; 3E14120A
>	v_add_f32_e64 v10, v10, 0 clamp                         ; D206080A 0001010A
>	v_log_f32_e32 v10, v10                                  ; 7E144F0A
>	v_mac_f32_e32 v1, s31, v11                              ; 3E02161F
>	v_mac_f32_e32 v3, s32, v11                              ; 3E061620
>	v_sub_f32_e64 v11, 1.0, s12                             ; D208000B 000018F2
>	v_mul_legacy_f32_e32 v10, s11, v10                      ; 0E14140B
>	v_exp_f32_e32 v10, v10                                  ; 7E144B0A
>	v_mac_f32_e32 v11, s12, v10                             ; 3E16140C
>	v_mul_f32_e32 v10, v7, v8                               ; 10141107
>	v_mul_f32_e32 v15, v6, v14                              ; 101E1D06
>	v_mad_f32 v10, v14, v4, -v10                            ; D282000A 842A090E
>	v_mac_f32_e32 v1, s34, v12                              ; 3E021822
>	v_mac_f32_e32 v3, s35, v12                              ; 3E061823
>	v_mul_f32_e32 v12, v4, v13                              ; 10181B04
>	v_mul_f32_e32 v11, v11, v11                             ; 1016170B
>	v_mad_f32 v12, v8, v6, -v12                             ; D282000C 84320D08
>	v_mad_f32 v15, v13, v7, -v15                            ; D282000F 843E0F0D
>	v_mad_f32 v10, v5, v10, -v10                            ; D282000A 842A1505
>	v_mad_f32 v12, v5, v12, -v12                            ; D282000C 84321905
>	v_mad_f32 v5, v5, v15, -v15                             ; D2820005 843E1F05
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 34, 0, 0, 0, v16, v17, v18, v19                 ; F800022F 13121110
>	exp 15, 35, 0, 0, 0, v11, v0, v0, v0                    ; F800023F 0000000B
>	exp 15, 36, 0, 0, 0, v6, v7, v4, v10                    ; F800024F 0A040706
>	exp 15, 37, 0, 0, 0, v12, v5, v13, v14                  ; F800025F 0E0D050C
>	exp 15, 38, 0, 0, 0, v8, v0, v0, v0                     ; F800026F 00000008
>	exp 15, 12, 0, 1, 0, v1, v3, v9, v0                     ; F80008CF 00090301
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 696 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>radeonsi: Compiling shader 31
>Fragment Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @ps_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float) #0 {
>main_body:
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %0, 0
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %27, i32 %1, 1
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %28, i32 %2, 2
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %29, i32 %3, 3
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %30, i32 %4, 4
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %31, i32 %5, 5
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %32, i32 %6, 6
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %33, i32 %7, 7
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %34, i32 %8, 8
>  %36 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %35, i32 %9, 9
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %36, i32 %10, 10
>  %38 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %37, i32 %11, 11
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %38, float %12, 12
>  %40 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %39, float %13, 13
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %40, float %14, 14
>  %42 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %41, float %15, 15
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %42, float %16, 16
>  %44 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %43, float %17, 17
>  %45 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %44, float %18, 18
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %45, float %19, 19
>  %47 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %46, float %20, 20
>  %48 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %47, float %21, 21
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %48, float %22, 22
>  %50 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %49, float %23, 23
>  %51 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %50, float %24, 24
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %51, float %25, 25
>  %53 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %52, float %26, 26
>  %54 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %53, float %14, 12
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %54, float %15, 13
>  %56 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %55, float %14, 16
>  %57 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %56, float %15, 17
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %57
>}
>
>attributes #0 = { "amdgpu-ps-wqm-outputs" }
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 4, [m0]                          ; C8201304
>	v_interp_p2_f32 v8, [v8], v5, 3, 4, [m0]                    ; C8211305
>	v_interp_p1_f32 v9, v4, 0, 5, [m0]                          ; C8241404
>	v_interp_p2_f32 v9, [v9], v5, 0, 5, [m0]                    ; C8251405
>	v_interp_p1_f32 v10, v4, 1, 5, [m0]                         ; C8281504
>	v_interp_p2_f32 v10, [v10], v5, 1, 5, [m0]                  ; C8291505
>	v_interp_p1_f32 v0, v4, 2, 5, [m0]                          ; C8001604
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 5, [m0]                    ; C8011605
>	v_interp_p1_f32 v1, v4, 3, 5, [m0]                          ; C8041704
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	v_interp_p2_f32 v1, [v1], v5, 3, 5, [m0]                    ; C8051705
>	v_interp_p1_f32 v6, v4, 0, 6, [m0]                          ; C8181804
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 6, [m0]                    ; C8191805
>	v_interp_p1_f32 v12, v2, 0, 0, [m0]                         ; C8300002
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                  ; C8310003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v11, s8, v12                                  ; 08161808
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v20, v2, 2, 0, [m0]                         ; C8500202
>	v_sub_f32_e32 v14, s9, v19                                  ; 081C2609
>	v_mul_f32_e32 v7, v11, v11                                  ; 100E170B
>	v_interp_p2_f32 v20, [v20], v3, 2, 0, [m0]                  ; C8510203
>	v_sub_f32_e32 v15, s11, v20                                 ; 081E280B
>	v_mac_f32_e32 v7, v14, v14                                  ; 3E0E1D0E
>	v_mac_f32_e32 v7, v15, v15                                  ; 3E0E1F0F
>	v_rsq_f32_e32 v16, v7                                       ; 7E205D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v21, v16, v11                                 ; 102A1710
>	v_mul_f32_e32 v22, v16, v14                                 ; 102C1D10
>	s_load_dwordx4 s[28:31], s[4:5], 0x6c                       ; C08E056C
>	v_mul_f32_e32 v23, v7, v0                                   ; 102E0107
>	v_mul_f32_e32 v24, v7, v1                                   ; 10300307
>	v_mul_f32_e32 v0, v23, v21                                  ; 10002B17
>	s_load_dwordx8 s[20:27], s[4:5], 0x60                       ; C0CA0560
>	v_mul_f32_e32 v25, v7, v6                                   ; 10320D07
>	v_mul_f32_e32 v26, v16, v15                                 ; 10341F10
>	v_mac_f32_e32 v0, v24, v22                                  ; 3E002D18
>	v_mac_f32_e32 v0, v25, v26                                  ; 3E003519
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v27, v0, 0 clamp                              ; D206081B 00010100
>	v_interp_p1_f32 v0, v2, 0, 2, [m0]                          ; C8000802
>	s_load_dwordx8 s[12:19], s[4:5], 0x70                       ; C0C60570
>	s_load_dwordx4 s[32:35], s[4:5], 0x7c                       ; C090057C
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                    ; C8010803
>	v_interp_p1_f32 v1, v2, 1, 2, [m0]                          ; C8040902
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s28, s28, s27                                     ; 871C1B1C
>	v_interp_p2_f32 v1, [v1], v3, 1, 2, [m0]                    ; C8050903
>	image_sample v[17:18], v[0:1], s[20:27], s[28:31] dmask:0x6 ; F0800600 00E51100
>	v_interp_p1_f32 v6, v2, 2, 2, [m0]                          ; C8180A02
>	v_interp_p2_f32 v6, [v6], v3, 2, 2, [m0]                    ; C8190A03
>	v_interp_p1_f32 v7, v2, 3, 2, [m0]                          ; C81C0B02
>	s_and_b32 s32, s32, s19                                     ; 87201320
>	v_interp_p2_f32 v7, [v7], v3, 3, 2, [m0]                    ; C81D0B03
>	image_sample v28, v[6:7], s[12:19], s[32:35] dmask:0x2      ; F0800200 01031C06
>	s_load_dwordx4 s[36:39], s[4:5], 0x5c                       ; C092055C
>	s_load_dwordx8 s[12:19], s[4:5], 0x50                       ; C0C60550
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                       ; C0CA0510
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                       ; C08E051C
>	s_buffer_load_dword s40, s[0:3], 0x10                       ; C2140110
>	s_buffer_load_dword s41, s[0:3], 0x11                       ; C2148111
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s19                                     ; 87241324
>	image_sample v[6:7], v[0:1], s[12:19], s[36:39] dmask:0xa   ; F0800A00 01230600
>	v_interp_p1_f32 v31, v4, 0, 4, [m0]                         ; C87C1004
>	v_interp_p2_f32 v31, [v31], v5, 0, 4, [m0]                  ; C87D1005
>	v_interp_p1_f32 v32, v4, 1, 4, [m0]                         ; C8801104
>	v_interp_p2_f32 v32, [v32], v5, 1, 4, [m0]                  ; C8811105
>	v_interp_p1_f32 v4, v4, 2, 4, [m0]                          ; C8101204
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v29, v7, v7                                   ; 063A0F07
>	v_add_f32_e32 v30, v6, v6                                   ; 063C0D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_interp_p2_f32 v4, [v4], v5, 2, 4, [m0]                    ; C8111205
>	v_mad_f32 v31, v29, v31, -v31                               ; D282001F 847E3F1D
>	v_mad_f32 v32, v29, v32, -v32                               ; D2820020 8482411D
>	v_mad_f32 v29, v29, v4, -v4                                 ; D282001D 8412091D
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v4, v30, v6, -v6                                  ; D2820004 841A0D1E
>	v_mac_f32_e32 v4, v7, v7                                    ; 3E080F07
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v31, v6, v8                                   ; 3E3E1106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v32, v6, v9                                   ; 3E401306
>	v_mac_f32_e32 v29, v6, v10                                  ; 3E3A1506
>	v_mac_f32_e32 v31, v4, v23                                  ; 3E3E2F04
>	v_mac_f32_e32 v32, v4, v24                                  ; 3E403104
>	v_mac_f32_e32 v29, v4, v25                                  ; 3E3A3304
>	v_cubema_f32 v4, v31, v32, v29                              ; D28E0004 0476411F
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_mul_f32_e32 v21, v21, v31                                 ; 102A3F15
>	v_mac_f32_e32 v21, v22, v32                                 ; 3E2A4116
>	v_cubetc_f32 v6, v31, v32, v29                              ; D28C0006 0476411F
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v7, v31, v32, v29                              ; D28A0007 0476411F
>	v_mac_f32_e32 v21, v26, v29                                 ; 3E2A3B1A
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v7, v4                                    ; D2820005 04120F05
>	v_mul_f32_e32 v7, v31, v21                                  ; 100E2B1F
>	v_mac_f32_e32 v7, v31, v21                                  ; 3E0E2B1F
>	v_mad_f32 v22, v11, v16, -v7                                ; D2820016 841E210B
>	v_mad_f32 v26, -v11, v16, v7                                ; D282001A 241E210B
>	v_mul_f32_e32 v7, v32, v21                                  ; 100E2B20
>	v_mac_f32_e32 v7, v32, v21                                  ; 3E0E2B20
>	v_mad_f32 v30, v14, v16, -v7                                ; D282001E 841E210E
>	v_mad_f32 v33, -v14, v16, v7                                ; D2820021 241E210E
>	v_mul_f32_e32 v7, v29, v21                                  ; 100E2B1D
>	v_mac_f32_e32 v7, v29, v21                                  ; 3E0E2B1D
>	v_mad_f32 v14, v15, v16, -v7                                ; D282000E 841E210F
>	v_mad_f32 v34, -v15, v16, v7                                ; D2820022 241E210F
>	s_and_b32 s28, s28, s27                                     ; 871C1B1C
>	v_cubeid_f32 v7, v31, v32, v29                              ; D2880007 0476411F
>	image_sample v[8:11], v[5:8], s[20:27], s[28:31] dmask:0xf  ; F0800F00 00E50805
>	v_interp_p1_f32 v35, v2, 2, 1, [m0]                         ; C88C0602
>	v_interp_p2_f32 v35, [v35], v3, 2, 1, [m0]                  ; C88D0603
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                          ; C8140402
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                    ; C8150403
>	v_interp_p1_f32 v6, v2, 1, 1, [m0]                          ; C8180502
>	v_interp_p2_f32 v6, [v6], v3, 1, 1, [m0]                    ; C8190503
>	v_interp_p1_f32 v7, v2, 3, 1, [m0]                          ; C81C0702
>	v_interp_p2_f32 v7, [v7], v3, 3, 1, [m0]                    ; C81D0703
>	v_mov_b32_e32 v15, 0x6f800000                               ; 7E1E02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v15, |v7|                             ; D002026A 00020F0F
>	v_mov_b32_e32 v15, 0x2f800000                               ; 7E1E02FF 2F800000
>	v_cndmask_b32_e32 v15, 1.0, v15, vcc                        ; 001E1EF2
>	v_mul_f32_e32 v7, v15, v7                                   ; 100E0F0F
>	v_rcp_f32_e32 v7, v7                                        ; 7E0E5507
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v6, v7, v6                                    ; 100C0D07
>	v_mul_f32_e32 v7, v23, v22                                  ; 100E2D17
>	v_mac_f32_e32 v7, v24, v30                                  ; 3E0E3D18
>	v_mac_f32_e32 v7, v25, v14                                  ; 3E0E1D19
>	v_add_f32_e32 v7, 1.0, v7                                   ; 060E0EF2
>	v_subrev_f32_e32 v7, v27, v7                                ; 0A0E0F1B
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_sub_f32_e32 v14, 1.0, v7                                  ; 081C0EF2
>	v_mad_f32 v22, -v7, v14, v14                                ; D2820016 243A1D07
>	v_mov_b32_e32 v7, 0x403b800a                                ; 7E0E02FF 403B800A
>	v_mad_f32 v14, v7, v23, v12                                 ; D282000E 04322F07
>	s_buffer_load_dword s42, s[0:3], 0x16                       ; C2150116
>	v_mul_f32_e32 v5, v5, v15                                   ; 100A1F05
>	v_mul_f32_e32 v6, v6, v15                                   ; 100C1F06
>	v_mad_f32 v15, v7, v24, v19                                 ; D282000F 044E3107
>	v_mul_f32_e32 v16, s40, v14                                 ; 10201C28
>	v_mul_f32_e32 v23, s41, v14                                 ; 102E1C29
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v14, s8, v14                                  ; 101C1C08
>	s_buffer_load_dword s8, s[0:3], 0x19                        ; C2040119
>	v_mac_f32_e32 v16, s9, v15                                  ; 3E201E09
>	s_buffer_load_dword s43, s[0:3], 0x18                       ; C2158118
>	s_buffer_load_dword s9, s[0:3], 0x1a                        ; C204811A
>	v_mac_f32_e32 v23, s11, v15                                 ; 3E2E1E0B
>	s_buffer_load_dword s11, s[0:3], 0x1c                       ; C205811C
>	v_mad_f32 v7, v7, v25, v20                                  ; D2820007 04523307
>	s_buffer_load_dword s21, s[0:3], 0x1e                       ; C20A811E
>	v_mac_f32_e32 v14, s42, v15                                 ; 3E1C1E2A
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v23, s8, v7                                   ; 3E2E0E08
>	s_buffer_load_dword s8, s[0:3], 0x2f                        ; C204012F
>	s_buffer_load_dword s20, s[0:3], 0x1d                       ; C20A011D
>	v_mac_f32_e32 v14, s9, v7                                   ; 3E1C0E09
>	v_mac_f32_e32 v16, s43, v7                                  ; 3E200E2B
>	s_buffer_load_dword s9, s[0:3], 0x33                        ; C2048133
>	v_add_f32_e32 v15, s11, v16                                 ; 061E200B
>	s_buffer_load_dword s11, s[0:3], 0x37                       ; C2058137
>	v_add_f32_e32 v14, s21, v14                                 ; 061C1C15
>	s_buffer_load_dword s21, s[0:3], 0x3b                       ; C20A813B
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_add_f32_e32 v16, s20, v23                                 ; 06202E14
>	v_sub_f32_e32 v12, s8, v12                                  ; 08181808
>	s_buffer_load_dword s20, s[0:3], 0x3a                       ; C20A013A
>	v_sub_f32_e32 v23, s9, v19                                  ; 082E2609
>	v_mul_f32_e32 v24, v12, v12                                 ; 1030190C
>	v_sub_f32_e32 v20, s11, v20                                 ; 0828280B
>	v_mac_f32_e32 v24, v23, v23                                 ; 3E302F17
>	v_mac_f32_e32 v24, v20, v20                                 ; 3E302914
>	v_sqrt_f32_e32 v25, v24                                     ; 7E326718
>	v_mov_b32_e32 v27, s21                                      ; 7E360215
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v27, s20, v25                                 ; 3E363214
>	s_load_dwordx4 s[28:31], s[4:5], 0x3c                       ; C08E053C
>	s_load_dwordx8 s[20:27], s[4:5], 0x30                       ; C0CA0530
>	s_load_dwordx4 s[32:35], s[4:5], 0xc                        ; C090050C
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_mad_f32 v7, -v18, v7, v7                                  ; D2820007 241E0F12
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s28, s28, s27                                     ; 871C1B1C
>	image_sample v5, v[5:6], s[20:27], s[28:31] dmask:0x8       ; F0800800 00E50505
>	s_load_dwordx8 s[24:31], s[4:5], 0x0                        ; C0CC0500
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	v_mul_f32_e32 v6, v28, v17                                  ; 100C231C
>	v_mul_f32_e32 v17, v22, v6                                  ; 10220D16
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	image_sample_c v14, v[14:17], s[24:31], s[32:35] dmask:0x1  ; F0A00100 01060E0E
>	v_rsq_f32_e32 v15, v24                                      ; 7E1E5D18
>	s_buffer_load_dword s6, s[0:3], 0x4                         ; C2030104
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_mul_f32_e32 v11, v15, v12                                 ; 1016190F
>	v_mul_f32_e32 v12, v15, v23                                 ; 10182F0F
>	v_mul_f32_e32 v11, v31, v11                                 ; 1016171F
>	s_buffer_load_dword s7, s[0:3], 0x5                         ; C2038105
>	v_mac_f32_e32 v11, v32, v12                                 ; 3E161920
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v12, s6, v31                                  ; 10183E06
>	s_buffer_load_dword s8, s[0:3], 0x6                         ; C2040106
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	s_buffer_load_dword s24, s[0:3], 0xc                        ; C20C010C
>	s_buffer_load_dword s25, s[0:3], 0xd                        ; C20C810D
>	v_add_f32_e32 v16, -0.5, v27                                ; 062036F1
>	v_mad_f32 v16, -2.0, v16, 1.0                               ; D2820010 03CA20F5
>	v_mad_f32 v12, -s7, v32, -v12                               ; D282000C A4324007
>	v_add_f32_e64 v16, v16, 0 clamp                             ; D2060810 00010110
>	v_mul_f32_e32 v15, v15, v20                                 ; 101E290F
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v14, v14, v14                                 ; 101C1D0E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v12, -s8, v29, v12                                ; D282000C 24323A08
>	v_mul_f32_e32 v5, v16, v5                                   ; 100A0B10
>	v_mul_f32_e32 v16, s25, v14                                 ; 10201C19
>	v_mac_f32_e32 v11, v29, v15                                 ; 3E161F1D
>	v_mul_f32_e32 v15, s24, v14                                 ; 101E1C18
>	v_mul_f32_e32 v14, s6, v14                                  ; 101C1C06
>	s_buffer_load_dword s7, s[0:3], 0x3c                        ; C203813C
>	s_buffer_load_dword s8, s[0:3], 0x3d                        ; C204013D
>	s_buffer_load_dword s11, s[0:3], 0x3e                       ; C205813E
>	v_add_f32_e64 v12, v12, 0 clamp                             ; D206080C 0001010C
>	v_mul_f32_e32 v15, v6, v15                                  ; 101E1F06
>	v_mul_f32_e32 v16, v6, v16                                  ; 10202106
>	v_mul_f32_e32 v14, v6, v14                                  ; 101C1D06
>	v_mul_f32_e32 v15, v15, v12                                 ; 101E190F
>	v_mul_f32_e32 v16, v16, v12                                 ; 10201910
>	v_mul_f32_e32 v12, v14, v12                                 ; 1018190E
>	v_mul_f32_e32 v14, 4.0, v6                                  ; 101C0CF6
>	v_mac_f32_e32 v15, v14, v8                                  ; 3E1E110E
>	v_add_f32_e64 v8, v35, 0 clamp                              ; D2060808 00010123
>	v_mul_f32_e32 v5, v8, v5                                    ; 100A0B08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s7, v5                                    ; 10100A07
>	v_mac_f32_e32 v16, v14, v9                                  ; 3E20130E
>	v_mul_f32_e32 v9, s8, v5                                    ; 10120A08
>	v_mul_f32_e32 v5, s11, v5                                   ; 100A0A0B
>	s_buffer_load_dword s9, s[0:3], 0x7                         ; C2048107
>	s_buffer_load_dword s6, s[0:3], 0x3                         ; C2030103
>	s_buffer_load_dword s7, s[0:3], 0x8                         ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                         ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xa                        ; C205810A
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	s_load_dwordx4 s[0:3], s[4:5], 0x4c                         ; C080054C
>	v_mul_f32_e32 v8, v6, v8                                    ; 10101106
>	v_mul_f32_e32 v9, v6, v9                                    ; 10121306
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	v_add_f32_e64 v6, v11, 0 clamp                              ; D2060806 0001010B
>	v_mac_f32_e32 v15, v8, v6                                   ; 3E1E0D08
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mac_f32_e32 v12, v14, v10                                 ; 3E18150E
>	v_cubema_f32 v14, v26, v33, v34                             ; D28E000E 048A431A
>	v_log_f32_e32 v20, v8                                       ; 7E284F08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s0, s0, s31                                       ; 87001F00
>	v_mac_f32_e32 v16, v9, v6                                   ; 3E200D09
>	image_sample v[8:10], v[0:1], s[24:31], s[0:3] dmask:0x7    ; F0800700 00060800
>	v_rcp_f32_e64 v1, |v14|                                     ; D3540101 0000010E
>	v_mac_f32_e32 v12, v5, v6                                   ; 3E180D05
>	v_cubetc_f32 v5, v26, v33, v34                              ; D28C0005 048A431A
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v20                    ; 0E0028FF 40A00000
>	v_cubesc_f32 v11, v26, v33, v34                             ; D28A000B 048A431A
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_cubeid_f32 v6, v26, v33, v34                              ; D2880006 048A431A
>	v_max_f32_e32 v18, 0, v18                                   ; 20242480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_mac_f32_e32 v4, v1, v11                                   ; 3E081701
>	v_mul_f32_e32 v0, v18, v0                                   ; 10000112
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v17, v0                                   ; 100A0111
>	v_mov_b32_e32 v0, s6                                        ; 7E000206
>	v_sub_f32_e32 v0, s9, v0                                    ; 08000009
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s6, v19                                ; 0A0C2606
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	v_mul_f32_e32 v1, v17, v1                                   ; 10020311
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s9                                      ; 7E0C4809
>	v_sub_f32_e32 v6, s9, v6                                    ; 080C0C09
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	v_interp_p1_f32 v6, v2, 0, 3, [m0]                          ; C8180C02
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 0, 3, [m0]                    ; C8190C03
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v17, v4                                   ; 10080911
>	v_mac_f32_e32 v1, v8, v15                                   ; 3E021F08
>	v_mad_f32 v0, -v6, s7, s7                                   ; D2820000 201C0F06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v16                                   ; 3E082109
>	v_mad_f32 v1, -v6, s8, s8                                   ; D2820001 20201106
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v12                                  ; 3E0A190A
>	v_mad_f32 v4, -v6, s11, s11                                 ; D2820004 202C1706
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1636 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3].x, GENERIC[3], PERSPECTIVE
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[5], PERSPECTIVE, CENTROID
>DCL IN[6].x, GENERIC[6], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SAMP[8]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL SVIEW[8], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..15]
>DCL CONST[22]
>DCL TEMP[0..17], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     6.0000,     0.0000,    32.0000}
>IMM[2] FLT32 {    0.3000,     0.5900,     0.1100,    -0.5000}
>IMM[3] FLT32 {    4.0000,     5.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[4].wwww
>  1: MOV TEMP[0].yz, IN[5].yxyy
>  2: MOV TEMP[1].xy, IN[5].zwzz
>  3: MOV TEMP[1].z, IN[6].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[6], 2D
> 13: MOV TEMP[4].xy, IN[2].zwww
> 14: TEX TEMP[4].y, TEMP[4], SAMP[7], 2D
> 15: MUL TEMP[4].x, TEMP[3].yyyy, TEMP[4].yyyy
> 16: MOV TEMP[5].xy, IN[2].xyyy
> 17: TEX TEMP[5].yw, TEMP[5], SAMP[5], 2D
> 18: MAD TEMP[5].xy, TEMP[5].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 19: DP2 TEMP[6].x, TEMP[5].xyyy, TEMP[5].xyyy
> 20: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 21: ADD TEMP[6].x, IMM[0].zzzz, -TEMP[6].xxxx
> 22: SQRT TEMP[6].x, TEMP[6].xxxx
> 23: MUL TEMP[7].xyz, IN[4].xyzz, TEMP[5].xxxx
> 24: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[5].yyyy, TEMP[7].xyzz
> 25: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[6].xxxx, TEMP[0].xyzz
> 26: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[2].xyzz
> 27: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[0].xyzz
> 28: MUL TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz
> 29: ADD TEMP[5].xyz, TEMP[2].xyzz, -TEMP[5].xyzz
> 30: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 31: ADD TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 32: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[1].xyzz
> 33: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
> 34: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 35: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[6].xxxx
> 36: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 37: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 38: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 39: MUL TEMP[5].x, TEMP[4].xxxx, TEMP[5].xxxx
> 40: MAD TEMP[1].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 41: MUL TEMP[6], CONST[4], TEMP[1].xxxx
> 42: MAD TEMP[6], CONST[5], TEMP[1].yyyy, TEMP[6]
> 43: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[6]
> 44: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 45: MOV TEMP[6].xyz, TEMP[0].xyzz
> 46: TEX TEMP[6], TEMP[6], SAMP[1], CUBE
> 47: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[2].xyzz
> 48: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[0].xyzz
> 49: MAD TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz, -TEMP[2].xyzz
> 50: ADD TEMP[8].x, IMM[0].wwww, -TEMP[3].zzzz
> 51: MUL TEMP[8].x, TEMP[8].xxxx, IMM[1].yyyy
> 52: MOV TEMP[9].x, CONST[11].wwww
> 53: MOV TEMP[9].y, CONST[12].wwww
> 54: MOV TEMP[9].z, CONST[13].wwww
> 55: ADD TEMP[9].xyz, TEMP[9].xyzz, -IN[0].xyzz
> 56: DP3 TEMP[10].x, TEMP[9].xyzz, TEMP[9].xyzz
> 57: SQRT TEMP[10].x, TEMP[10].xxxx
> 58: MOV TEMP[11].yz, IMM[1].zzzz
> 59: MAD TEMP[11].x, TEMP[10].xxxx, CONST[14].zzzz, CONST[14].wwww
> 60: MOV TEMP[12].yz, IMM[1].zzzz
> 61: MOV TEMP[12].x, IN[1].zzzz
> 62: MOV TEMP[13].yz, IMM[1].zzzz
> 63: MOV TEMP[14].xy, IN[1].xyyy
> 64: MOV TEMP[14].w, IN[1].wwww
> 65: TXP TEMP[14].w, TEMP[14], SAMP[3], 2D
> 66: MUL TEMP[13].x, TEMP[14].wwww, TEMP[14].wwww
> 67: MOV TEMP[14].xy, IN[2].xyyy
> 68: TEX TEMP[14], TEMP[14], SAMP[8], 2D
> 69: MOV TEMP[15].w, TEMP[14].wwww
> 70: DP3 TEMP[16].x, TEMP[14].xyzz, IMM[2].xyzz
> 71: ADD TEMP[17].x, CONST[22].wwww, IMM[0].wwww
> 72: MUL TEMP[16].x, TEMP[16].xxxx, TEMP[17].xxxx
> 73: MUL TEMP[15].xyz, TEMP[14].xyzz, TEMP[16].xxxx
> 74: MUL TEMP[14].xyz, TEMP[15], IMM[1].wwww
> 75: MOV TEMP[15].xy, TEMP[1].xyyy
> 76: MOV TEMP[15].w, IMM[0].wwww
> 77: MOV TEMP[15].z, TEMP[1].zzzz
> 78: TXP TEMP[1].x, TEMP[15], SAMP[0], SHADOW2D
> 79: RCP TEMP[10].x, TEMP[10].xxxx
> 80: MUL TEMP[9].xyz, TEMP[9].xyzz, TEMP[10].xxxx
> 81: DP3 TEMP[9].x, TEMP[9].xyzz, TEMP[0].xyzz
> 82: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 83: ADD TEMP[10].xyz, TEMP[11].xyzz, IMM[2].wwww
> 84: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[0].xxxx
> 85: ADD TEMP[10].xyz, IMM[0].wwww, -TEMP[10].xyzz
> 86: MOV_SAT TEMP[10].xyz, TEMP[10].xyzz
> 87: MUL TEMP[10].xyz, TEMP[13].xyzz, TEMP[10].xyzz
> 88: MOV_SAT TEMP[11].xyz, TEMP[12].xyzz
> 89: MUL TEMP[10].x, TEMP[10].xyzz, TEMP[11].xyzz
> 90: MUL TEMP[10].xyz, CONST[15].xyzz, TEMP[10].xxxx
> 91: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[4].xxxx
> 92: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[6].wwww
> 93: MUL TEMP[11].x, IMM[3].xxxx, TEMP[4].xxxx
> 94: DP3 TEMP[12].x, -CONST[1].xyzz, TEMP[0].xyzz
> 95: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 96: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 97: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].xxxx
> 99: MUL TEMP[1].xyz, TEMP[12].xxxx, TEMP[1].xyzz
>100: MAD TEMP[1].xyz, TEMP[6].xyzz, TEMP[11].xxxx, TEMP[1].xyzz
>101: MAD TEMP[1].xyz, TEMP[9].xxxx, TEMP[10].xyzz, TEMP[1].xyzz
>102: MOV TEMP[4].xy, IN[2].xyyy
>103: TEX TEMP[4].xyz, TEMP[4], SAMP[4], 2D
>104: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
>105: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>106: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
>107: POW TEMP[0].x, TEMP[0].xxxx, IMM[3].yyyy
>108: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[1].zzzz
>109: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
>110: MOV TEMP[2].xyz, TEMP[7].xyzz
>111: MOV TEMP[2].w, TEMP[8].xxxx
>112: TXL TEMP[2].xyz, TEMP[2], SAMP[2], CUBE
>113: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>114: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[5].xxxx
>115: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[4].xyzz, TEMP[0].xyzz
>116: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[14].xyzz
>117: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>118: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].zzzz
>119: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>120: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>121: RCP TEMP[2].x, TEMP[2].xxxx
>122: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>123: FRC TEMP[2].x, CONST[1].wwww
>124: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].wwww
>125: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>126: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>127: MUL TEMP[1].x, IN[3].xxxx, TEMP[1].xxxx
>128: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>129: MOV TEMP[0].w, IN[0].wwww
>130: MOV OUT[0], TEMP[0]
>131: END
>radeonsi: Compiling shader 32
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 27, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 31, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = fmul float %78, %96
>  %98 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %99 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %100 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %101 = load <8 x i32>, <8 x i32> addrspace(2)* %100, align 32, !invariant.load !0
>  %102 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %103 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %102, i64 0, i64 23, !amdgpu.uniform !0
>  %104 = load <4 x i32>, <4 x i32> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = extractelement <8 x i32> %101, i32 7
>  %106 = extractelement <4 x i32> %104, i32 0
>  %107 = and i32 %106, %105
>  %108 = insertelement <4 x i32> %104, i32 %107, i32 0
>  %109 = bitcast float %98 to i32
>  %110 = bitcast float %99 to i32
>  %111 = insertelement <2 x i32> undef, i32 %109, i32 0
>  %112 = insertelement <2 x i32> %111, i32 %110, i32 1
>  %113 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %112, <8 x i32> %101, <4 x i32> %108, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %114 = extractelement <4 x float> %113, i32 1
>  %115 = extractelement <4 x float> %113, i32 3
>  %116 = fmul float %115, 2.000000e+00
>  %117 = fadd float %116, -1.000000e+00
>  %118 = fmul float %114, 2.000000e+00
>  %119 = fadd float %118, -1.000000e+00
>  %120 = fmul float %117, %117
>  %121 = fmul float %119, %119
>  %122 = fadd float %120, %121
>  %123 = call float @llvm.AMDGPU.clamp.(float %122, float 0.000000e+00, float 1.000000e+00)
>  %124 = fsub float 0x3FF00418A0000000, %123
>  %125 = call float @llvm.sqrt.f32(float %124)
>  %126 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %127 = fmul float %126, %117
>  %128 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %129 = fmul float %128, %117
>  %130 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %131 = fmul float %130, %117
>  %132 = fmul float %23, %119
>  %133 = fadd float %132, %127
>  %134 = fmul float %24, %119
>  %135 = fadd float %134, %129
>  %136 = fmul float %25, %119
>  %137 = fadd float %136, %131
>  %138 = fmul float %59, %125
>  %139 = fadd float %138, %133
>  %140 = fmul float %60, %125
>  %141 = fadd float %140, %135
>  %142 = fmul float %61, %125
>  %143 = fadd float %142, %137
>  %144 = fmul float %139, %49
>  %145 = fmul float %141, %50
>  %146 = fadd float %145, %144
>  %147 = fmul float %143, %51
>  %148 = fadd float %146, %147
>  %149 = fmul float %148, %139
>  %150 = fmul float %148, %141
>  %151 = fmul float %148, %143
>  %152 = fmul float %149, 2.000000e+00
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fmul float %151, 2.000000e+00
>  %155 = fsub float %49, %152
>  %156 = fsub float %50, %153
>  %157 = fsub float %51, %154
>  %158 = fmul float %155, %59
>  %159 = fmul float %156, %60
>  %160 = fadd float %159, %158
>  %161 = fmul float %157, %61
>  %162 = fadd float %160, %161
>  %163 = fadd float %162, 1.000000e+00
>  %164 = fmul float %49, %59
>  %165 = fmul float %50, %60
>  %166 = fadd float %165, %164
>  %167 = fmul float %51, %61
>  %168 = fadd float %166, %167
>  %169 = fsub float 1.000000e+00, %168
>  %170 = call float @llvm.AMDGPU.clamp.(float %169, float 0.000000e+00, float 1.000000e+00)
>  %171 = fsub float %163, %170
>  %172 = call float @llvm.AMDGPU.clamp.(float %171, float 0.000000e+00, float 1.000000e+00)
>  %173 = fsub float 1.000000e+00, %172
>  %174 = fmul float %173, %173
>  %175 = fmul float %97, %174
>  %176 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %177 = fmul float %59, 0x4007700140000000
>  %178 = fadd float %177, %176
>  %179 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %180 = fmul float %60, 0x4007700140000000
>  %181 = fadd float %180, %179
>  %182 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %183 = fmul float %61, 0x4007700140000000
>  %184 = fadd float %183, %182
>  %185 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %186 = load <16 x i8>, <16 x i8> addrspace(2)* %185, align 16, !invariant.load !0
>  %187 = call float @llvm.SI.load.const(<16 x i8> %186, i32 64)
>  %188 = fmul float %187, %178
>  %189 = call float @llvm.SI.load.const(<16 x i8> %186, i32 68)
>  %190 = fmul float %189, %178
>  %191 = call float @llvm.SI.load.const(<16 x i8> %186, i32 72)
>  %192 = fmul float %191, %178
>  %193 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %194 = load <16 x i8>, <16 x i8> addrspace(2)* %193, align 16, !invariant.load !0
>  %195 = call float @llvm.SI.load.const(<16 x i8> %194, i32 80)
>  %196 = fmul float %195, %181
>  %197 = fadd float %196, %188
>  %198 = call float @llvm.SI.load.const(<16 x i8> %194, i32 84)
>  %199 = fmul float %198, %181
>  %200 = fadd float %199, %190
>  %201 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %202 = load <16 x i8>, <16 x i8> addrspace(2)* %201, align 16, !invariant.load !0
>  %203 = call float @llvm.SI.load.const(<16 x i8> %202, i32 88)
>  %204 = fmul float %203, %181
>  %205 = fadd float %204, %192
>  %206 = call float @llvm.SI.load.const(<16 x i8> %202, i32 96)
>  %207 = fmul float %206, %184
>  %208 = fadd float %207, %197
>  %209 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %210 = load <16 x i8>, <16 x i8> addrspace(2)* %209, align 16, !invariant.load !0
>  %211 = call float @llvm.SI.load.const(<16 x i8> %210, i32 100)
>  %212 = fmul float %211, %184
>  %213 = fadd float %212, %200
>  %214 = call float @llvm.SI.load.const(<16 x i8> %210, i32 104)
>  %215 = fmul float %214, %184
>  %216 = fadd float %215, %205
>  %217 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %218 = load <16 x i8>, <16 x i8> addrspace(2)* %217, align 16, !invariant.load !0
>  %219 = call float @llvm.SI.load.const(<16 x i8> %218, i32 112)
>  %220 = fadd float %208, %219
>  %221 = call float @llvm.SI.load.const(<16 x i8> %218, i32 116)
>  %222 = fadd float %213, %221
>  %223 = call float @llvm.SI.load.const(<16 x i8> %218, i32 120)
>  %224 = fadd float %216, %223
>  %225 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %226 = load <8 x i32>, <8 x i32> addrspace(2)* %225, align 32, !invariant.load !0
>  %227 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %228 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %227, i64 0, i64 7, !amdgpu.uniform !0
>  %229 = load <4 x i32>, <4 x i32> addrspace(2)* %228, align 16, !invariant.load !0
>  %230 = extractelement <8 x i32> %226, i32 7
>  %231 = extractelement <4 x i32> %229, i32 0
>  %232 = and i32 %231, %230
>  %233 = insertelement <4 x i32> %229, i32 %232, i32 0
>  %234 = call float @llvm.amdgcn.cubetc(float %139, float %141, float %143)
>  %235 = call float @llvm.amdgcn.cubesc(float %139, float %141, float %143)
>  %236 = call float @llvm.amdgcn.cubema(float %139, float %141, float %143)
>  %237 = call float @llvm.amdgcn.cubeid(float %139, float %141, float %143)
>  %238 = call float @llvm.fabs.f32(float %236)
>  %239 = fdiv float 1.000000e+00, %238, !fpmath !1
>  %240 = fmul float %234, %239
>  %241 = fadd float %240, 1.500000e+00
>  %242 = fmul float %235, %239
>  %243 = fadd float %242, 1.500000e+00
>  %244 = bitcast float %243 to i32
>  %245 = bitcast float %241 to i32
>  %246 = bitcast float %237 to i32
>  %247 = insertelement <4 x i32> undef, i32 %244, i32 0
>  %248 = insertelement <4 x i32> %247, i32 %245, i32 1
>  %249 = insertelement <4 x i32> %248, i32 %246, i32 2
>  %250 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %249, <8 x i32> %226, <4 x i32> %233, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %251 = extractelement <4 x float> %250, i32 0
>  %252 = extractelement <4 x float> %250, i32 1
>  %253 = extractelement <4 x float> %250, i32 2
>  %254 = extractelement <4 x float> %250, i32 3
>  %255 = fmul float %139, %49
>  %256 = fmul float %141, %50
>  %257 = fadd float %256, %255
>  %258 = fmul float %143, %51
>  %259 = fadd float %257, %258
>  %260 = fmul float %259, %139
>  %261 = fmul float %259, %141
>  %262 = fmul float %259, %143
>  %263 = fmul float %260, 2.000000e+00
>  %264 = fsub float %263, %49
>  %265 = fmul float %261, 2.000000e+00
>  %266 = fsub float %265, %50
>  %267 = fmul float %262, 2.000000e+00
>  %268 = fsub float %267, %51
>  %269 = fsub float 1.000000e+00, %79
>  %270 = fmul float %269, 6.000000e+00
>  %271 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %272 = load <16 x i8>, <16 x i8> addrspace(2)* %271, align 16, !invariant.load !0
>  %273 = call float @llvm.SI.load.const(<16 x i8> %272, i32 188)
>  %274 = call float @llvm.SI.load.const(<16 x i8> %272, i32 204)
>  %275 = call float @llvm.SI.load.const(<16 x i8> %272, i32 220)
>  %276 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %277 = fsub float %273, %276
>  %278 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %279 = fsub float %274, %278
>  %280 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %281 = fsub float %275, %280
>  %282 = fmul float %277, %277
>  %283 = fmul float %279, %279
>  %284 = fadd float %283, %282
>  %285 = fmul float %281, %281
>  %286 = fadd float %284, %285
>  %287 = call float @llvm.sqrt.f32(float %286)
>  %288 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %289 = load <16 x i8>, <16 x i8> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = call float @llvm.SI.load.const(<16 x i8> %289, i32 232)
>  %291 = call float @llvm.SI.load.const(<16 x i8> %289, i32 236)
>  %292 = fmul float %287, %290
>  %293 = fadd float %292, %291
>  %294 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %295 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %296 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %297 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %298 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %299 = load <8 x i32>, <8 x i32> addrspace(2)* %298, align 32, !invariant.load !0
>  %300 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %301 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %300, i64 0, i64 15, !amdgpu.uniform !0
>  %302 = load <4 x i32>, <4 x i32> addrspace(2)* %301, align 16, !invariant.load !0
>  %303 = extractelement <8 x i32> %299, i32 7
>  %304 = extractelement <4 x i32> %302, i32 0
>  %305 = and i32 %304, %303
>  %306 = insertelement <4 x i32> %302, i32 %305, i32 0
>  %307 = fdiv float %295, %297, !fpmath !1
>  %308 = fdiv float %296, %297, !fpmath !1
>  %309 = bitcast float %307 to i32
>  %310 = bitcast float %308 to i32
>  %311 = insertelement <2 x i32> undef, i32 %309, i32 0
>  %312 = insertelement <2 x i32> %311, i32 %310, i32 1
>  %313 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %312, <8 x i32> %299, <4 x i32> %306, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %314 = extractelement <4 x float> %313, i32 3
>  %315 = fmul float %314, %314
>  %316 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %317 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %318 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 16, !amdgpu.uniform !0
>  %319 = load <8 x i32>, <8 x i32> addrspace(2)* %318, align 32, !invariant.load !0
>  %320 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %321 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %320, i64 0, i64 35, !amdgpu.uniform !0
>  %322 = load <4 x i32>, <4 x i32> addrspace(2)* %321, align 16, !invariant.load !0
>  %323 = extractelement <8 x i32> %319, i32 7
>  %324 = extractelement <4 x i32> %322, i32 0
>  %325 = and i32 %324, %323
>  %326 = insertelement <4 x i32> %322, i32 %325, i32 0
>  %327 = bitcast float %316 to i32
>  %328 = bitcast float %317 to i32
>  %329 = insertelement <2 x i32> undef, i32 %327, i32 0
>  %330 = insertelement <2 x i32> %329, i32 %328, i32 1
>  %331 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %330, <8 x i32> %319, <4 x i32> %326, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %332 = extractelement <4 x float> %331, i32 0
>  %333 = extractelement <4 x float> %331, i32 1
>  %334 = extractelement <4 x float> %331, i32 2
>  %335 = fmul float %332, 0x3FD3333340000000
>  %336 = fmul float %333, 0x3FE2E147A0000000
>  %337 = fadd float %336, %335
>  %338 = fmul float %334, 0x3FBC28F5C0000000
>  %339 = fadd float %337, %338
>  %340 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %341 = load <16 x i8>, <16 x i8> addrspace(2)* %340, align 16, !invariant.load !0
>  %342 = call float @llvm.SI.load.const(<16 x i8> %341, i32 364)
>  %343 = fadd float %342, 1.000000e+00
>  %344 = fmul float %339, %343
>  %345 = fmul float %332, %344
>  %346 = fmul float %333, %344
>  %347 = fmul float %334, %344
>  %348 = fmul float %345, 3.200000e+01
>  %349 = fmul float %346, 3.200000e+01
>  %350 = fmul float %347, 3.200000e+01
>  %351 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %352 = load <8 x i32>, <8 x i32> addrspace(2)* %351, align 32, !invariant.load !0
>  %353 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %354 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %353, i64 0, i64 3, !amdgpu.uniform !0
>  %355 = load <4 x i32>, <4 x i32> addrspace(2)* %354, align 16, !invariant.load !0
>  %356 = extractelement <8 x i32> %352, i32 7
>  %357 = extractelement <4 x i32> %355, i32 0
>  %358 = and i32 %357, %356
>  %359 = insertelement <4 x i32> %355, i32 %358, i32 0
>  %360 = bitcast float %224 to i32
>  %361 = bitcast float %220 to i32
>  %362 = bitcast float %222 to i32
>  %363 = insertelement <4 x i32> undef, i32 %360, i32 0
>  %364 = insertelement <4 x i32> %363, i32 %361, i32 1
>  %365 = insertelement <4 x i32> %364, i32 %362, i32 2
>  %366 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %365, <8 x i32> %352, <4 x i32> %359, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %367 = extractelement <4 x float> %366, i32 0
>  %368 = fdiv float 1.000000e+00, %287, !fpmath !1
>  %369 = fmul float %277, %368
>  %370 = fmul float %279, %368
>  %371 = fmul float %281, %368
>  %372 = fmul float %369, %139
>  %373 = fmul float %370, %141
>  %374 = fadd float %373, %372
>  %375 = fmul float %371, %143
>  %376 = fadd float %374, %375
>  %377 = call float @llvm.AMDGPU.clamp.(float %376, float 0.000000e+00, float 1.000000e+00)
>  %378 = fadd float %293, -5.000000e-01
>  %379 = fmul float %378, 2.000000e+00
>  %380 = fsub float 1.000000e+00, %379
>  %381 = call float @llvm.AMDGPU.clamp.(float %380, float 0.000000e+00, float 1.000000e+00)
>  %382 = fmul float %315, %381
>  %383 = call float @llvm.AMDGPU.clamp.(float %294, float 0.000000e+00, float 1.000000e+00)
>  %384 = fmul float %382, %383
>  %385 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %386 = load <16 x i8>, <16 x i8> addrspace(2)* %385, align 16, !invariant.load !0
>  %387 = call float @llvm.SI.load.const(<16 x i8> %386, i32 240)
>  %388 = fmul float %387, %384
>  %389 = call float @llvm.SI.load.const(<16 x i8> %386, i32 244)
>  %390 = fmul float %389, %384
>  %391 = call float @llvm.SI.load.const(<16 x i8> %386, i32 248)
>  %392 = fmul float %391, %384
>  %393 = fmul float %388, %97
>  %394 = fmul float %390, %97
>  %395 = fmul float %392, %97
>  %396 = fmul float %251, %254
>  %397 = fmul float %252, %254
>  %398 = fmul float %253, %254
>  %399 = fmul float %97, 4.000000e+00
>  %400 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %401 = load <16 x i8>, <16 x i8> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = call float @llvm.SI.load.const(<16 x i8> %401, i32 16)
>  %403 = call float @llvm.SI.load.const(<16 x i8> %401, i32 20)
>  %404 = call float @llvm.SI.load.const(<16 x i8> %401, i32 24)
>  %405 = fmul float %402, %139
>  %406 = fsub float -0.000000e+00, %405
>  %407 = fmul float %403, %141
>  %408 = fsub float %406, %407
>  %409 = fmul float %404, %143
>  %410 = fsub float %408, %409
>  %411 = call float @llvm.AMDGPU.clamp.(float %410, float 0.000000e+00, float 1.000000e+00)
>  %412 = fmul float %367, %367
>  %413 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %414 = load <16 x i8>, <16 x i8> addrspace(2)* %413, align 16, !invariant.load !0
>  %415 = call float @llvm.SI.load.const(<16 x i8> %414, i32 48)
>  %416 = fmul float %415, %412
>  %417 = call float @llvm.SI.load.const(<16 x i8> %414, i32 52)
>  %418 = fmul float %417, %412
>  %419 = call float @llvm.SI.load.const(<16 x i8> %414, i32 56)
>  %420 = fmul float %419, %412
>  %421 = fmul float %416, %97
>  %422 = fmul float %418, %97
>  %423 = fmul float %420, %97
>  %424 = fmul float %411, %421
>  %425 = fmul float %411, %422
>  %426 = fmul float %411, %423
>  %427 = fmul float %396, %399
>  %428 = fadd float %427, %424
>  %429 = fmul float %397, %399
>  %430 = fadd float %429, %425
>  %431 = fmul float %398, %399
>  %432 = fadd float %431, %426
>  %433 = fmul float %377, %393
>  %434 = fadd float %433, %428
>  %435 = fmul float %377, %394
>  %436 = fadd float %435, %430
>  %437 = fmul float %377, %395
>  %438 = fadd float %437, %432
>  %439 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %440 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %441 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %442 = load <8 x i32>, <8 x i32> addrspace(2)* %441, align 32, !invariant.load !0
>  %443 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %444 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %443, i64 0, i64 19, !amdgpu.uniform !0
>  %445 = load <4 x i32>, <4 x i32> addrspace(2)* %444, align 16, !invariant.load !0
>  %446 = extractelement <8 x i32> %442, i32 7
>  %447 = extractelement <4 x i32> %445, i32 0
>  %448 = and i32 %447, %446
>  %449 = insertelement <4 x i32> %445, i32 %448, i32 0
>  %450 = bitcast float %439 to i32
>  %451 = bitcast float %440 to i32
>  %452 = insertelement <2 x i32> undef, i32 %450, i32 0
>  %453 = insertelement <2 x i32> %452, i32 %451, i32 1
>  %454 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %453, <8 x i32> %442, <4 x i32> %449, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %455 = extractelement <4 x float> %454, i32 0
>  %456 = extractelement <4 x float> %454, i32 1
>  %457 = extractelement <4 x float> %454, i32 2
>  %458 = fmul float %49, %139
>  %459 = fmul float %50, %141
>  %460 = fadd float %459, %458
>  %461 = fmul float %51, %143
>  %462 = fadd float %460, %461
>  %463 = call float @llvm.AMDGPU.clamp.(float %462, float 0.000000e+00, float 1.000000e+00)
>  %464 = fsub float 1.000000e+00, %463
>  %465 = call float @llvm.pow.f32(float %464, float 5.000000e+00)
>  %466 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %467 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %468 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %469 = fmul float %465, %466
>  %470 = fmul float %465, %467
>  %471 = fmul float %465, %468
>  %472 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %473 = load <8 x i32>, <8 x i32> addrspace(2)* %472, align 32, !invariant.load !0
>  %474 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %475 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %474, i64 0, i64 11, !amdgpu.uniform !0
>  %476 = load <4 x i32>, <4 x i32> addrspace(2)* %475, align 16, !invariant.load !0
>  %477 = extractelement <8 x i32> %473, i32 7
>  %478 = extractelement <4 x i32> %476, i32 0
>  %479 = and i32 %478, %477
>  %480 = insertelement <4 x i32> %476, i32 %479, i32 0
>  %481 = call float @llvm.amdgcn.cubetc(float %264, float %266, float %268)
>  %482 = call float @llvm.amdgcn.cubesc(float %264, float %266, float %268)
>  %483 = call float @llvm.amdgcn.cubema(float %264, float %266, float %268)
>  %484 = call float @llvm.amdgcn.cubeid(float %264, float %266, float %268)
>  %485 = call float @llvm.fabs.f32(float %483)
>  %486 = fdiv float 1.000000e+00, %485, !fpmath !1
>  %487 = fmul float %481, %486
>  %488 = fadd float %487, 1.500000e+00
>  %489 = fmul float %482, %486
>  %490 = fadd float %489, 1.500000e+00
>  %491 = bitcast float %490 to i32
>  %492 = bitcast float %488 to i32
>  %493 = bitcast float %484 to i32
>  %494 = bitcast float %270 to i32
>  %495 = insertelement <4 x i32> undef, i32 %491, i32 0
>  %496 = insertelement <4 x i32> %495, i32 %492, i32 1
>  %497 = insertelement <4 x i32> %496, i32 %493, i32 2
>  %498 = insertelement <4 x i32> %497, i32 %494, i32 3
>  %499 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %498, <8 x i32> %473, <4 x i32> %480, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %500 = extractelement <4 x float> %499, i32 0
>  %501 = extractelement <4 x float> %499, i32 1
>  %502 = extractelement <4 x float> %499, i32 2
>  %503 = fmul float %469, %500
>  %504 = fmul float %470, %501
>  %505 = fmul float %471, %502
>  %506 = fmul float %503, %175
>  %507 = fmul float %504, %175
>  %508 = fmul float %505, %175
>  %509 = fmul float %434, %455
>  %510 = fadd float %509, %506
>  %511 = fmul float %436, %456
>  %512 = fadd float %511, %507
>  %513 = fmul float %438, %457
>  %514 = fadd float %513, %508
>  %515 = fadd float %510, %348
>  %516 = fadd float %512, %349
>  %517 = fadd float %514, %350
>  %518 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %519 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %520 = load <16 x i8>, <16 x i8> addrspace(2)* %519, align 16, !invariant.load !0
>  %521 = call float @llvm.SI.load.const(<16 x i8> %520, i32 12)
>  %522 = fsub float %518, %521
>  %523 = call float @llvm.maxnum.f32(float %522, float 0.000000e+00)
>  %524 = call float @llvm.SI.load.const(<16 x i8> %520, i32 28)
>  %525 = call float @llvm.SI.load.const(<16 x i8> %520, i32 12)
>  %526 = fsub float %524, %525
>  %527 = fadd float %526, 0x3F50624DE0000000
>  %528 = fdiv float 1.000000e+00, %527, !fpmath !1
>  %529 = fmul float %523, %528
>  %530 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %531 = load <16 x i8>, <16 x i8> addrspace(2)* %530, align 16, !invariant.load !0
>  %532 = call float @llvm.SI.load.const(<16 x i8> %531, i32 28)
>  %533 = call float @llvm.floor.f32(float %532)
>  %534 = fsub float %532, %533
>  %535 = fmul float %534, 8.000000e+00
>  %536 = call float @llvm.pow.f32(float %529, float %535)
>  %537 = call float @llvm.AMDGPU.clamp.(float %536, float 0.000000e+00, float 1.000000e+00)
>  %538 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %539 = fmul float %538, %537
>  %540 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %541 = load <16 x i8>, <16 x i8> addrspace(2)* %540, align 16, !invariant.load !0
>  %542 = call float @llvm.SI.load.const(<16 x i8> %541, i32 32)
>  %543 = fsub float 1.000000e+00, %539
>  %544 = fmul float %515, %539
>  %545 = fmul float %542, %543
>  %546 = fadd float %544, %545
>  %547 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %548 = load <16 x i8>, <16 x i8> addrspace(2)* %547, align 16, !invariant.load !0
>  %549 = call float @llvm.SI.load.const(<16 x i8> %548, i32 36)
>  %550 = fsub float 1.000000e+00, %539
>  %551 = fmul float %516, %539
>  %552 = fmul float %549, %550
>  %553 = fadd float %551, %552
>  %554 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %555 = load <16 x i8>, <16 x i8> addrspace(2)* %554, align 16, !invariant.load !0
>  %556 = call float @llvm.SI.load.const(<16 x i8> %555, i32 40)
>  %557 = fsub float 1.000000e+00, %539
>  %558 = fmul float %517, %539
>  %559 = fmul float %556, %557
>  %560 = fadd float %558, %559
>  %561 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %562 = bitcast float %5 to i32
>  %563 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %562, 10
>  %564 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %563, float %546, 11
>  %565 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %564, float %553, 12
>  %566 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %565, float %560, 13
>  %567 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %566, float %561, 14
>  %568 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %567, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %568
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_buffer_load_dword s17, s[0:3], 0x1b                   ; C208811B
>	s_buffer_load_dword s14, s[0:3], 0x18                   ; C2070118
>	s_buffer_load_dword s15, s[0:3], 0x19                   ; C2078119
>	s_buffer_load_dword s16, s[0:3], 0x1a                   ; C208011A
>	s_buffer_load_dword s21, s[0:3], 0x1f                   ; C20A811F
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_buffer_load_dword s25, s[0:3], 0x23                   ; C20C8123
>	s_buffer_load_dword s20, s[0:3], 0x1e                   ; C20A011E
>	s_buffer_load_dword s18, s[0:3], 0x1c                   ; C209011C
>	s_buffer_load_dword s19, s[0:3], 0x1d                   ; C209811D
>	s_buffer_load_dword s24, s[0:3], 0x22                   ; C20C0122
>	s_buffer_load_dword s22, s[0:3], 0x20                   ; C20B0120
>	s_buffer_load_dword s23, s[0:3], 0x21                   ; C20B8121
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_buffer_load_dword s26, s[0:3], 0x24                   ; C20D0124
>	s_buffer_load_dword s27, s[0:3], 0x25                   ; C20D8125
>	s_buffer_load_dword s28, s[0:3], 0x3                    ; C20E0103
>	s_buffer_load_dword s30, s[0:3], 0x7                    ; C20F0107
>	s_buffer_load_dword s33, s[0:3], 0xb                    ; C210810B
>	s_buffer_load_dword s8, s[0:3], 0xf                     ; C204010F
>	s_buffer_load_dword s13, s[0:3], 0x17                   ; C2068117
>	s_buffer_load_dword s9, s[0:3], 0x10                    ; C2048110
>	s_buffer_load_dword s10, s[0:3], 0x11                   ; C2050111
>	s_buffer_load_dword s11, s[0:3], 0x12                   ; C2058112
>	s_buffer_load_dword s12, s[0:3], 0x13                   ; C2060113
>	s_buffer_load_dword s29, s[0:3], 0x4                    ; C20E8104
>	s_buffer_load_dword s31, s[0:3], 0x8                    ; C20F8108
>	s_buffer_load_dword s32, s[0:3], 0x9                    ; C2100109
>	s_buffer_load_dword s34, s[0:3], 0xc                    ; C211010C
>	s_buffer_load_dword s35, s[0:3], 0xd                    ; C211810D
>	s_buffer_load_dword s36, s[0:3], 0xe                    ; C212010E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_subrev_f32_e32 v7, s17, v9                            ; 0A0E1211
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v18, s21, v10                          ; 0A241415
>	v_mul_f32_e32 v20, s14, v7                              ; 10280E0E
>	v_mul_f32_e32 v21, s15, v7                              ; 102A0E0F
>	v_mul_f32_e32 v7, s16, v7                               ; 100E0E10
>	v_subrev_f32_e32 v19, s25, v11                          ; 0A261619
>	v_mac_f32_e32 v7, s20, v18                              ; 3E0E2414
>	v_mac_f32_e32 v20, s18, v18                             ; 3E282412
>	v_mac_f32_e32 v21, s19, v18                             ; 3E2A2413
>	v_mac_f32_e32 v7, s24, v19                              ; 3E0E2618
>	v_mac_f32_e32 v20, s22, v19                             ; 3E282616
>	v_mul_f32_e32 v22, 0.5, v7                              ; 102C0EF0
>	v_mac_f32_e32 v21, s23, v19                             ; 3E2A2617
>	v_mad_f32 v23, s26, v20, v22                            ; D2820017 045A281A
>	v_mac_f32_e32 v22, s27, v21                             ; 3E2C2A1B
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	v_mul_f32_e32 v0, s28, v9                               ; 1000121C
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_mac_f32_e32 v0, s30, v10                              ; 3E00141E
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	v_mac_f32_e32 v0, s33, v11                              ; 3E001621
>	v_mac_f32_e32 v0, s8, v12                               ; 3E001808
>	v_mul_f32_e32 v1, s13, v0                               ; 1002000D
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	s_waitcnt expcnt(0) lgkmcnt(0)                          ; BF8C000F
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mac_f32_e32 v1, s4, v7                                ; 3E020E04
>	exp 15, 33, 0, 0, 0, v23, v22, v1, v7                   ; F800021F 07011617
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v1, 2.0, v3, -1.0                             ; D2820001 03CE06F4
>	v_mad_f32 v3, 2.0, v4, -1.0                             ; D2820003 03CE08F4
>	v_mad_f32 v4, 2.0, v5, -1.0                             ; D2820004 03CE0AF4
>	v_add_f32_e32 v5, v6, v6                                ; 060A0D06
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mad_f32 v6, 2.0, v13, -1.0                            ; D2820006 03CE1AF4
>	v_mad_f32 v7, 2.0, v14, -1.0                            ; D2820007 03CE1CF4
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	v_mad_f32 v8, 2.0, v15, -1.0                            ; D2820008 03CE1EF4
>	v_mad_f32 v13, 0, v7, v6                                ; D282000D 041A0E80
>	v_mad_f32 v14, 0, v6, v7                                ; D282000E 041E0C80
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	v_mac_f32_e32 v13, 0, v8                                ; 3E1A1080
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v8, 0, v7                                 ; 3E100E80
>	v_mad_f32 v7, 0, v1, v3                                 ; D2820007 040E0280
>	v_mac_f32_e32 v8, 0, v6                                 ; 3E100C80
>	v_mad_f32 v6, 0, v3, v1                                 ; D2820006 04060680
>	v_mac_f32_e32 v6, 0, v4                                 ; 3E0C0880
>	v_mac_f32_e32 v7, 0, v4                                 ; 3E0E0880
>	v_mac_f32_e32 v4, 0, v3                                 ; 3E080680
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v3, s5, v9                                ; 10061205
>	v_mac_f32_e32 v4, 0, v1                                 ; 3E080280
>	v_mul_f32_e32 v1, s4, v9                                ; 10021204
>	v_mul_f32_e32 v9, s6, v9                                ; 10121206
>	v_mac_f32_e32 v9, s8, v10                               ; 3E121408
>	v_mac_f32_e32 v9, s0, v11                               ; 3E121600
>	v_mac_f32_e32 v1, s29, v10                              ; 3E02141D
>	v_mac_f32_e32 v3, s7, v10                               ; 3E061407
>	v_mac_f32_e32 v9, s36, v12                              ; 3E121824
>	v_mov_b32_e32 v10, s9                                   ; 7E140209
>	v_mac_f32_e32 v10, s10, v9                              ; 3E14120A
>	v_add_f32_e64 v10, v10, 0 clamp                         ; D206080A 0001010A
>	v_log_f32_e32 v10, v10                                  ; 7E144F0A
>	v_mac_f32_e32 v1, s31, v11                              ; 3E02161F
>	v_mac_f32_e32 v3, s32, v11                              ; 3E061620
>	v_sub_f32_e64 v11, 1.0, s12                             ; D208000B 000018F2
>	v_mul_legacy_f32_e32 v10, s11, v10                      ; 0E14140B
>	v_exp_f32_e32 v10, v10                                  ; 7E144B0A
>	v_mac_f32_e32 v11, s12, v10                             ; 3E16140C
>	v_mul_f32_e32 v10, v7, v8                               ; 10141107
>	v_mul_f32_e32 v15, v6, v14                              ; 101E1D06
>	v_mad_f32 v10, v14, v4, -v10                            ; D282000A 842A090E
>	v_mac_f32_e32 v1, s34, v12                              ; 3E021822
>	v_mac_f32_e32 v3, s35, v12                              ; 3E061823
>	v_mul_f32_e32 v12, v4, v13                              ; 10181B04
>	v_mul_f32_e32 v11, v11, v11                             ; 1016170B
>	v_mad_f32 v12, v8, v6, -v12                             ; D282000C 84320D08
>	v_mad_f32 v15, v13, v7, -v15                            ; D282000F 843E0F0D
>	v_mad_f32 v10, v5, v10, -v10                            ; D282000A 842A1505
>	v_mad_f32 v12, v5, v12, -v12                            ; D282000C 84321905
>	v_mad_f32 v5, v5, v15, -v15                             ; D2820005 843E1F05
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 34, 0, 0, 0, v16, v17, v18, v19                 ; F800022F 13121110
>	exp 15, 35, 0, 0, 0, v11, v0, v0, v0                    ; F800023F 0000000B
>	exp 15, 36, 0, 0, 0, v6, v7, v4, v10                    ; F800024F 0A040706
>	exp 15, 37, 0, 0, 0, v12, v5, v13, v14                  ; F800025F 0E0D050C
>	exp 15, 38, 0, 0, 0, v8, v0, v0, v0                     ; F800026F 00000008
>	exp 15, 12, 0, 1, 0, v1, v3, v9, v0                     ; F80008CF 00090301
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 696 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 4, [m0]                          ; C8201304
>	v_interp_p2_f32 v8, [v8], v5, 3, 4, [m0]                    ; C8211305
>	v_interp_p1_f32 v9, v4, 0, 5, [m0]                          ; C8241404
>	v_interp_p2_f32 v9, [v9], v5, 0, 5, [m0]                    ; C8251405
>	v_interp_p1_f32 v10, v4, 1, 5, [m0]                         ; C8281504
>	v_interp_p2_f32 v10, [v10], v5, 1, 5, [m0]                  ; C8291505
>	v_interp_p1_f32 v0, v4, 2, 5, [m0]                          ; C8001604
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s11, s[0:3], 0x0                        ; C2058100
>	v_interp_p2_f32 v0, [v0], v5, 2, 5, [m0]                    ; C8011605
>	v_interp_p1_f32 v1, v4, 3, 5, [m0]                          ; C8041704
>	s_buffer_load_dword s12, s[0:3], 0x1                        ; C2060101
>	v_interp_p2_f32 v1, [v1], v5, 3, 5, [m0]                    ; C8051705
>	v_interp_p1_f32 v6, v4, 0, 6, [m0]                          ; C8181804
>	s_buffer_load_dword s13, s[0:3], 0x2                        ; C2068102
>	v_interp_p2_f32 v6, [v6], v5, 0, 6, [m0]                    ; C8191805
>	v_interp_p1_f32 v12, v2, 0, 0, [m0]                         ; C8300002
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                  ; C8310003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v14, s11, v12                                 ; 081C180B
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v20, v2, 2, 0, [m0]                         ; C8500202
>	v_interp_p2_f32 v20, [v20], v3, 2, 0, [m0]                  ; C8510203
>	v_sub_f32_e32 v15, s12, v19                                 ; 081E260C
>	v_mul_f32_e32 v7, v14, v14                                  ; 100E1D0E
>	v_sub_f32_e32 v16, s13, v20                                 ; 0820280D
>	v_mac_f32_e32 v7, v15, v15                                  ; 3E0E1F0F
>	v_mac_f32_e32 v7, v16, v16                                  ; 3E0E2110
>	v_rsq_f32_e32 v21, v7                                       ; 7E2A5D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v22, v21, v14                                 ; 102C1D15
>	v_mul_f32_e32 v23, v21, v15                                 ; 102E1F15
>	s_load_dwordx4 s[36:39], s[4:5], 0x6c                       ; C092056C
>	v_mul_f32_e32 v24, v7, v0                                   ; 10300107
>	v_mul_f32_e32 v25, v7, v1                                   ; 10320307
>	v_mul_f32_e32 v0, v24, v22                                  ; 10002D18
>	s_load_dwordx8 s[28:35], s[4:5], 0x60                       ; C0CE0560
>	v_mul_f32_e32 v26, v7, v6                                   ; 10340D07
>	v_mul_f32_e32 v27, v21, v16                                 ; 10362115
>	v_mac_f32_e32 v0, v25, v23                                  ; 3E002F19
>	v_mac_f32_e32 v0, v26, v27                                  ; 3E00371A
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v28, v0, 0 clamp                              ; D206081C 00010100
>	v_interp_p1_f32 v0, v2, 0, 2, [m0]                          ; C8000802
>	s_load_dwordx8 s[12:19], s[4:5], 0x70                       ; C0C60570
>	s_load_dwordx4 s[40:43], s[4:5], 0x7c                       ; C094057C
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                    ; C8010803
>	v_interp_p1_f32 v1, v2, 1, 2, [m0]                          ; C8040902
>	v_interp_p2_f32 v1, [v1], v3, 1, 2, [m0]                    ; C8050903
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s35                                     ; 87242324
>	image_sample v[17:18], v[0:1], s[28:35], s[36:39] dmask:0x6 ; F0800600 01271100
>	v_interp_p1_f32 v6, v2, 2, 2, [m0]                          ; C8180A02
>	v_interp_p2_f32 v6, [v6], v3, 2, 2, [m0]                    ; C8190A03
>	v_interp_p1_f32 v7, v2, 3, 2, [m0]                          ; C81C0B02
>	s_and_b32 s40, s40, s19                                     ; 87281328
>	v_interp_p2_f32 v7, [v7], v3, 3, 2, [m0]                    ; C81D0B03
>	image_sample v29, v[6:7], s[12:19], s[40:43] dmask:0x2      ; F0800200 01431D06
>	s_load_dwordx4 s[44:47], s[4:5], 0x5c                       ; C096055C
>	s_load_dwordx8 s[12:19], s[4:5], 0x50                       ; C0C60550
>	s_load_dwordx8 s[28:35], s[4:5], 0x10                       ; C0CE0510
>	s_load_dwordx4 s[36:39], s[4:5], 0x1c                       ; C092051C
>	v_mov_b32_e32 v34, 0x6f800000                               ; 7E4402FF 6F800000
>	s_load_dwordx8 s[20:27], s[4:5], 0x80                       ; C0CA0580
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s44, s44, s19                                     ; 872C132C
>	image_sample v[6:7], v[0:1], s[12:19], s[44:47] dmask:0xa   ; F0800A00 01630600
>	v_interp_p1_f32 v31, v4, 0, 4, [m0]                         ; C87C1004
>	v_interp_p2_f32 v31, [v31], v5, 0, 4, [m0]                  ; C87D1005
>	v_interp_p1_f32 v32, v4, 1, 4, [m0]                         ; C8801104
>	v_interp_p2_f32 v32, [v32], v5, 1, 4, [m0]                  ; C8811105
>	v_interp_p1_f32 v4, v4, 2, 4, [m0]                          ; C8101204
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v11, v7, v7                                   ; 06160F07
>	v_add_f32_e32 v30, v6, v6                                   ; 063C0D06
>	v_interp_p2_f32 v4, [v4], v5, 2, 4, [m0]                    ; C8111205
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_mad_f32 v33, v11, v4, -v4                                 ; D2820021 8412090B
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v4, v30, v6, -v6                                  ; D2820004 841A0D1E
>	v_mac_f32_e32 v4, v7, v7                                    ; 3E080F07
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_mad_f32 v31, v11, v31, -v31                               ; D282001F 847E3F0B
>	v_mad_f32 v32, v11, v32, -v32                               ; D2820020 8482410B
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v31, v6, v8                                   ; 3E3E1106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v32, v6, v9                                   ; 3E401306
>	v_mac_f32_e32 v33, v6, v10                                  ; 3E421506
>	v_mac_f32_e32 v31, v4, v24                                  ; 3E3E3104
>	v_mac_f32_e32 v32, v4, v25                                  ; 3E403304
>	v_mac_f32_e32 v33, v4, v26                                  ; 3E423504
>	v_cubema_f32 v4, v31, v32, v33                              ; D28E0004 0486411F
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_cubetc_f32 v6, v31, v32, v33                              ; D28C0006 0486411F
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v7, v31, v32, v33                              ; D28A0007 0486411F
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v7, v4                                    ; D2820005 04120F05
>	s_and_b32 s36, s36, s35                                     ; 87242324
>	v_cubeid_f32 v7, v31, v32, v33                              ; D2880007 0486411F
>	image_sample v[8:11], v[5:8], s[28:35], s[36:39] dmask:0xf  ; F0800F00 01270805
>	v_interp_p1_f32 v30, v2, 2, 1, [m0]                         ; C8780602
>	v_interp_p2_f32 v30, [v30], v3, 2, 1, [m0]                  ; C8790603
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                          ; C8140402
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                    ; C8150403
>	v_interp_p1_f32 v6, v2, 1, 1, [m0]                          ; C8180502
>	v_interp_p2_f32 v6, [v6], v3, 1, 1, [m0]                    ; C8190503
>	v_interp_p1_f32 v7, v2, 3, 1, [m0]                          ; C81C0702
>	v_interp_p2_f32 v7, [v7], v3, 3, 1, [m0]                    ; C81D0703
>	v_cmp_lt_f32_e64 vcc, v34, |v7|                             ; D002026A 00020F22
>	v_mov_b32_e32 v34, 0x2f800000                               ; 7E4402FF 2F800000
>	v_cndmask_b32_e32 v34, 1.0, v34, vcc                        ; 004444F2
>	v_mul_f32_e32 v7, v34, v7                                   ; 100E0F22
>	v_rcp_f32_e32 v7, v7                                        ; 7E0E5507
>	s_load_dwordx4 s[36:39], s[4:5], 0x3c                       ; C092053C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	v_mul_f32_e32 v22, v22, v31                                 ; 102C3F16
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v6, v7, v6                                    ; 100C0D07
>	v_mul_f32_e32 v5, v5, v34                                   ; 100A4505
>	v_mul_f32_e32 v6, v6, v34                                   ; 100C4506
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s35                                     ; 87242324
>	image_sample v34, v[5:6], s[28:35], s[36:39] dmask:0x8      ; F0800800 01272205
>	s_load_dwordx4 s[28:31], s[4:5], 0x8c                       ; C08E058C
>	v_mac_f32_e32 v22, v23, v32                                 ; 3E2C4117
>	v_mac_f32_e32 v22, v27, v33                                 ; 3E2C431B
>	s_buffer_load_dword s8, s[0:3], 0x11                        ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x10                        ; C2048110
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s28, s28, s27                                     ; 871C1B1C
>	image_sample v[5:7], v[0:1], s[20:27], s[28:31] dmask:0x7   ; F0800700 00E50500
>	s_buffer_load_dword s20, s[0:3], 0x5b                       ; C20A015B
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v35, 0x3e99999a, v5                           ; 10460AFF 3E99999A
>	v_mac_f32_e32 v35, 0x3f170a3d, v6                           ; 3E460CFF 3F170A3D
>	v_mac_f32_e32 v35, 0x3de147ae, v7                           ; 3E460EFF 3DE147AE
>	s_buffer_load_dword s11, s[0:3], 0x12                       ; C2058112
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v35, s20, v35                                 ; 3E464614
>	v_mul_f32_e32 v36, v35, v5                                  ; 10480B23
>	v_mul_f32_e32 v5, v31, v22                                  ; 100A2D1F
>	v_mul_f32_e32 v37, v35, v6                                  ; 104A0D23
>	v_mul_f32_e32 v35, v35, v7                                  ; 10460F23
>	v_mul_f32_e32 v7, v32, v22                                  ; 100E2D20
>	v_mac_f32_e32 v5, v31, v22                                  ; 3E0A2D1F
>	v_mac_f32_e32 v7, v32, v22                                  ; 3E0E2D20
>	v_mad_f32 v6, v14, v21, -v5                                 ; D2820006 84162B0E
>	v_mad_f32 v5, -v14, v21, v5                                 ; D2820005 24162B0E
>	v_mad_f32 v14, v15, v21, -v7                                ; D282000E 841E2B0F
>	v_mad_f32 v23, -v15, v21, v7                                ; D2820017 241E2B0F
>	v_mul_f32_e32 v7, v33, v22                                  ; 100E2D21
>	v_mul_f32_e32 v6, v24, v6                                   ; 100C0D18
>	v_mac_f32_e32 v7, v33, v22                                  ; 3E0E2D21
>	v_mad_f32 v15, v16, v21, -v7                                ; D282000F 841E2B10
>	v_mac_f32_e32 v6, v25, v14                                  ; 3E0C1D19
>	v_mac_f32_e32 v6, v26, v15                                  ; 3E0C1F1A
>	v_add_f32_e32 v6, 1.0, v6                                   ; 060C0CF2
>	v_subrev_f32_e32 v6, v28, v6                                ; 0A0C0D1C
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mad_f32 v21, -v16, v21, v7                                ; D2820015 241E2B10
>	v_sub_f32_e32 v7, 1.0, v6                                   ; 080E0CF2
>	v_mad_f32 v6, -v6, v7, v7                                   ; D2820006 241E0F06
>	v_mov_b32_e32 v7, 0x403b800a                                ; 7E0E02FF 403B800A
>	v_mad_f32 v14, v7, v24, v12                                 ; D282000E 04323107
>	s_buffer_load_dword s49, s[0:3], 0x15                       ; C2188115
>	v_mul_f32_e32 v24, s8, v14                                  ; 10301C08
>	s_buffer_load_dword s48, s[0:3], 0x14                       ; C2180114
>	s_buffer_load_dword s50, s[0:3], 0x16                       ; C2190116
>	s_buffer_load_dword s8, s[0:3], 0x19                        ; C2040119
>	v_mul_f32_e32 v16, s9, v14                                  ; 10201C09
>	s_buffer_load_dword s51, s[0:3], 0x18                       ; C2198118
>	s_buffer_load_dword s9, s[0:3], 0x1a                        ; C204811A
>	v_mul_f32_e32 v14, s11, v14                                 ; 101C1C0B
>	s_buffer_load_dword s11, s[0:3], 0x1c                       ; C205811C
>	v_mad_f32 v15, v7, v25, v19                                 ; D282000F 044E3307
>	v_mad_f32 v7, v7, v26, v20                                  ; D2820007 04523507
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v24, s49, v15                                 ; 3E301E31
>	s_buffer_load_dword s21, s[0:3], 0x1e                       ; C20A811E
>	v_mac_f32_e32 v16, s48, v15                                 ; 3E201E30
>	v_mac_f32_e32 v14, s50, v15                                 ; 3E1C1E32
>	v_mac_f32_e32 v24, s8, v7                                   ; 3E300E08
>	s_buffer_load_dword s8, s[0:3], 0x2f                        ; C204012F
>	s_buffer_load_dword s20, s[0:3], 0x1d                       ; C20A011D
>	v_mac_f32_e32 v14, s9, v7                                   ; 3E1C0E09
>	v_mac_f32_e32 v16, s51, v7                                  ; 3E200E33
>	s_buffer_load_dword s9, s[0:3], 0x33                        ; C2048133
>	v_add_f32_e32 v15, s11, v16                                 ; 061E200B
>	s_buffer_load_dword s11, s[0:3], 0x37                       ; C2058137
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_add_f32_e32 v14, s21, v14                                 ; 061C1C15
>	s_buffer_load_dword s21, s[0:3], 0x3b                       ; C20A813B
>	v_add_f32_e32 v16, s20, v24                                 ; 06203014
>	v_sub_f32_e32 v12, s8, v12                                  ; 08181808
>	s_buffer_load_dword s20, s[0:3], 0x3a                       ; C20A013A
>	v_sub_f32_e32 v24, s9, v19                                  ; 08302609
>	v_mul_f32_e32 v25, v12, v12                                 ; 1032190C
>	v_sub_f32_e32 v20, s11, v20                                 ; 0828280B
>	v_mac_f32_e32 v25, v24, v24                                 ; 3E323118
>	v_mac_f32_e32 v25, v20, v20                                 ; 3E322914
>	v_sqrt_f32_e32 v26, v25                                     ; 7E346719
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v27, s21                                      ; 7E360215
>	s_load_dwordx4 s[32:35], s[4:5], 0xc                        ; C090050C
>	s_load_dwordx8 s[24:31], s[4:5], 0x0                        ; C0CC0500
>	v_mac_f32_e32 v27, s20, v26                                 ; 3E363414
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_mul_f32_e32 v17, v29, v17                                 ; 1022231D
>	v_mul_f32_e32 v26, v6, v17                                  ; 10342306
>	v_mad_f32 v7, -v18, v7, v7                                  ; D2820007 241E0F12
>	v_mul_f32_e32 v6, v34, v34                                  ; 100C4522
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_rsq_f32_e32 v11, v25                                      ; 7E165D19
>	s_buffer_load_dword s6, s[0:3], 0x4                         ; C2030104
>	image_sample_c v14, v[14:17], s[24:31], s[32:35] dmask:0x1  ; F0A00100 01060E0E
>	s_buffer_load_dword s7, s[0:3], 0x5                         ; C2038105
>	v_mul_f32_e32 v12, v11, v12                                 ; 1018190B
>	v_mul_f32_e32 v15, v11, v24                                 ; 101E310B
>	v_mul_f32_e32 v12, v31, v12                                 ; 1018191F
>	v_mul_f32_e32 v11, v11, v20                                 ; 1016290B
>	v_mac_f32_e32 v12, v32, v15                                 ; 3E181F20
>	v_mac_f32_e32 v12, v33, v11                                 ; 3E181721
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v11, s6, v31                                  ; 10163E06
>	s_buffer_load_dword s8, s[0:3], 0x6                         ; C2040106
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	s_buffer_load_dword s24, s[0:3], 0xc                        ; C20C010C
>	s_buffer_load_dword s25, s[0:3], 0xd                        ; C20C810D
>	v_mad_f32 v11, -s7, v32, -v11                               ; D282000B A42E4007
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v14, v14, v14                                 ; 101C1D0E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v11, -s8, v33, v11                                ; D282000B 242E4208
>	v_mul_f32_e32 v15, s24, v14                                 ; 101E1C18
>	v_mul_f32_e32 v16, s25, v14                                 ; 10201C19
>	v_mul_f32_e32 v14, s6, v14                                  ; 101C1C06
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_mul_f32_e32 v15, v17, v15                                 ; 101E1F11
>	v_mul_f32_e32 v16, v17, v16                                 ; 10202111
>	v_mul_f32_e32 v14, v17, v14                                 ; 101C1D11
>	v_mul_f32_e32 v15, v15, v11                                 ; 101E170F
>	v_mul_f32_e32 v16, v16, v11                                 ; 10201710
>	v_mul_f32_e32 v11, v14, v11                                 ; 1016170E
>	v_mul_f32_e32 v14, 4.0, v17                                 ; 101C22F6
>	v_mac_f32_e32 v15, v14, v8                                  ; 3E1E110E
>	v_add_f32_e32 v8, -0.5, v27                                 ; 061036F1
>	s_buffer_load_dword s7, s[0:3], 0x3c                        ; C203813C
>	s_buffer_load_dword s8, s[0:3], 0x3d                        ; C204013D
>	s_buffer_load_dword s11, s[0:3], 0x3e                       ; C205813E
>	v_mad_f32 v8, -2.0, v8, 1.0                                 ; D2820008 03CA10F5
>	v_add_f32_e64 v8, v8, 0 clamp                               ; D2060808 00010108
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	v_add_f32_e64 v8, v30, 0 clamp                              ; D2060808 0001011E
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s7, v6                                    ; 10100C07
>	v_mac_f32_e32 v16, v14, v9                                  ; 3E20130E
>	v_mul_f32_e32 v9, s8, v6                                    ; 10120C08
>	v_mul_f32_e32 v6, s11, v6                                   ; 100C0C0B
>	v_mac_f32_e32 v11, v14, v10                                 ; 3E16150E
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_add_f32_e64 v10, v12, 0 clamp                             ; D206080A 0001010C
>	v_mul_f32_e32 v9, v17, v9                                   ; 10121311
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_mac_f32_e32 v15, v8, v10                                  ; 3E1E1508
>	v_mac_f32_e32 v16, v9, v10                                  ; 3E201509
>	v_mac_f32_e32 v11, v6, v10                                  ; 3E161506
>	v_cubeid_f32 v6, v5, v23, v21                               ; D2880006 04562F05
>	v_cubetc_f32 v8, v5, v23, v21                               ; D28C0008 04562F05
>	v_cubesc_f32 v9, v5, v23, v21                               ; D28A0009 04562F05
>	v_cubema_f32 v5, v5, v23, v21                               ; D28E0005 04562F05
>	v_rcp_f32_e64 v10, |v5|                                     ; D354010A 00000105
>	s_buffer_load_dword s9, s[0:3], 0x7                         ; C2048107
>	s_buffer_load_dword s6, s[0:3], 0x3                         ; C2030103
>	s_buffer_load_dword s7, s[0:3], 0x8                         ; C2038108
>	v_mad_f32 v5, v10, v8, v4                                   ; D2820005 0412110A
>	v_add_f32_e64 v8, v22, 0 clamp                              ; D2060808 00010116
>	s_buffer_load_dword s8, s[0:3], 0x9                         ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xa                        ; C205810A
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	s_load_dwordx4 s[0:3], s[4:5], 0x4c                         ; C080054C
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_log_f32_e32 v12, v8                                       ; 7E184F08
>	v_mac_f32_e32 v4, v10, v9                                   ; 3E08130A
>	v_max_f32_e32 v14, 0, v18                                   ; 201C2480
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s0, s0, s31                                       ; 87001F00
>	image_sample v[8:10], v[0:1], s[24:31], s[0:3] dmask:0x7    ; F0800700 00060800
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v12                    ; 0E0018FF 40A00000
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_mul_f32_e32 v0, v14, v0                                   ; 1000010E
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mov_b32_e32 v6, s6                                        ; 7E0C0206
>	v_sub_f32_e32 v6, s9, v6                                    ; 080C0C09
>	v_add_f32_e32 v6, 0x3a83126f, v6                            ; 060C0CFF 3A83126F
>	v_mul_f32_e32 v5, v26, v0                                   ; 100A011A
>	v_mul_f32_e32 v1, v26, v1                                   ; 1002031A
>	v_mul_f32_e32 v4, v26, v4                                   ; 1008091A
>	v_rcp_f32_e32 v6, v6                                        ; 7E0C5506
>	v_mac_f32_e32 v1, v8, v15                                   ; 3E021F08
>	v_mov_b32_e32 v0, 0x42000000                                ; 7E0002FF 42000000
>	v_mac_f32_e32 v4, v9, v16                                   ; 3E082109
>	v_mac_f32_e32 v5, v10, v11                                  ; 3E0A170A
>	v_mac_f32_e32 v1, v0, v36                                   ; 3E024900
>	v_mac_f32_e32 v4, v0, v37                                   ; 3E084B00
>	v_mac_f32_e32 v5, v0, v35                                   ; 3E0A4700
>	v_subrev_f32_e32 v0, s6, v19                                ; 0A002606
>	v_max_f32_e32 v0, 0, v0                                     ; 20000080
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s9                                      ; 7E0C4809
>	v_sub_f32_e32 v6, s9, v6                                    ; 080C0C09
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	v_interp_p1_f32 v6, v2, 0, 3, [m0]                          ; C8180C02
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 0, 3, [m0]                    ; C8190C03
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mad_f32 v0, -v6, s7, s7                                   ; D2820000 201C0F06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mad_f32 v1, -v6, s8, s8                                   ; D2820001 20201106
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mad_f32 v4, -v6, s11, s11                                 ; D2820004 202C1706
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1724 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6].x, GENERIC[5]
>DCL CONST[0..9]
>DCL TEMP[0..8], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>IMM[1] FLT32 {    0.5000,     0.0000,     0.0000,     0.0000}
>  0: MAD TEMP[0], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[0].zwww
>  3: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[0].wzww
>  4: MOV TEMP[2].y, TEMP[3].xxxx
>  5: DP3 TEMP[1].x, TEMP[1].xyzz, IMM[0].wwzz
>  6: MOV TEMP[2].z, TEMP[1].xxxx
>  7: DP3 TEMP[3].x, TEMP[0].xyzz, IMM[0].zwww
>  8: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wzww
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wwzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: MUL TEMP[4], CONST[0], IN[0].xxxx
> 13: MAD TEMP[4], CONST[1], IN[0].yyyy, TEMP[4]
> 14: MAD TEMP[4], CONST[2], IN[0].zzzz, TEMP[4]
> 15: MAD TEMP[4], CONST[3], IN[0].wwww, TEMP[4]
> 16: MOV TEMP[5].xyz, IN[0].xyzx
> 17: MUL TEMP[6].x, TEMP[4].wwww, CONST[5].wwww
> 18: MOV TEMP[5].w, TEMP[6].xxxx
> 19: MOV TEMP[6].x, CONST[6].wwww
> 20: MOV TEMP[6].y, CONST[7].wwww
> 21: MOV TEMP[6].z, CONST[8].wwww
> 22: ADD TEMP[6].xyz, IN[0].xyzz, -TEMP[6].xyzz
> 23: MUL TEMP[7].xyz, CONST[6].xyzz, TEMP[6].xxxx
> 24: MAD TEMP[7].xyz, CONST[7].xyzz, TEMP[6].yyyy, TEMP[7].xyzz
> 25: MAD TEMP[6].xyz, CONST[8].xyzz, TEMP[6].zzzz, TEMP[7].xyzz
> 26: MOV TEMP[7].w, TEMP[6].zzzz
> 27: MUL TEMP[8].xy, TEMP[6].xyyy, CONST[9].xyyy
> 28: MAD TEMP[7].xy, IMM[1].xxxx, TEMP[6].zzzz, TEMP[8].xyyy
> 29: MAD TEMP[6].x, TEMP[6].zzzz, CONST[9].zzzz, CONST[9].wwww
> 30: MOV TEMP[7].z, TEMP[6].xxxx
> 31: MAD TEMP[6].x, TEMP[4].zzzz, CONST[4].yyyy, CONST[4].xxxx
> 32: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 33: POW TEMP[6].x, TEMP[6].xxxx, CONST[4].zzzz
> 34: ADD TEMP[8].x, IMM[0].zzzz, -CONST[4].wwww
> 35: MAD TEMP[6].x, CONST[4].wwww, TEMP[6].xxxx, TEMP[8].xxxx
> 36: MUL TEMP[8].xyz, TEMP[2].zxyy, TEMP[3].yzxx
> 37: MAD TEMP[8].xyz, TEMP[2].yzxx, TEMP[3].zxyy, -TEMP[8].xyzz
> 38: MUL TEMP[0].xyz, TEMP[8].xyzz, TEMP[0].wwww
> 39: MOV TEMP[3].xyz, TEMP[3].xyzx
> 40: MOV TEMP[3].w, TEMP[0].xxxx
> 41: MOV TEMP[0].xy, TEMP[0].yzyy
> 42: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[6].xxxx
> 43: MOV TEMP[6].z, TEMP[6].xxxx
> 44: MOV TEMP[6].xy, IN[3].xyxx
> 45: MOV TEMP[0].zw, TEMP[2].yyxy
> 46: MOV OUT[1], TEMP[5]
> 47: MOV OUT[5], TEMP[0]
> 48: MOV OUT[0], TEMP[4]
> 49: MOV OUT[4], TEMP[3]
> 50: MOV OUT[3].xyz, TEMP[6].xyzx
> 51: MOV OUT[6].x, TEMP[1].xxxx
> 52: MOV OUT[2], TEMP[7]
> 53: END
>radeonsi: Compiling shader 33
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %18 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %19 = load <16 x i8>, <16 x i8> addrspace(2)* %18, align 16, !invariant.load !0
>  %20 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %19, i32 0, i32 %14)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = extractelement <4 x float> %20, i32 1
>  %23 = extractelement <4 x float> %20, i32 2
>  %24 = extractelement <4 x float> %20, i32 3
>  %25 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, align 16, !invariant.load !0
>  %27 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %26, i32 0, i32 %15)
>  %28 = extractelement <4 x float> %27, i32 0
>  %29 = extractelement <4 x float> %27, i32 1
>  %30 = extractelement <4 x float> %27, i32 2
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %39, i32 0, i32 %17)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = fmul float %34, 2.000000e+00
>  %44 = fadd float %43, -1.000000e+00
>  %45 = fmul float %35, 2.000000e+00
>  %46 = fadd float %45, -1.000000e+00
>  %47 = fmul float %36, 2.000000e+00
>  %48 = fadd float %47, -1.000000e+00
>  %49 = fmul float %37, 2.000000e+00
>  %50 = fadd float %49, -1.000000e+00
>  %51 = fmul float %28, 2.000000e+00
>  %52 = fadd float %51, -1.000000e+00
>  %53 = fmul float %29, 2.000000e+00
>  %54 = fadd float %53, -1.000000e+00
>  %55 = fmul float %30, 2.000000e+00
>  %56 = fadd float %55, -1.000000e+00
>  %57 = fmul float %54, 0.000000e+00
>  %58 = fadd float %57, %52
>  %59 = fmul float %56, 0.000000e+00
>  %60 = fadd float %58, %59
>  %61 = fmul float %52, 0.000000e+00
>  %62 = fadd float %54, %61
>  %63 = fmul float %56, 0.000000e+00
>  %64 = fadd float %62, %63
>  %65 = fmul float %52, 0.000000e+00
>  %66 = fmul float %54, 0.000000e+00
>  %67 = fadd float %66, %65
>  %68 = fadd float %67, %56
>  %69 = fmul float %46, 0.000000e+00
>  %70 = fadd float %69, %44
>  %71 = fmul float %48, 0.000000e+00
>  %72 = fadd float %70, %71
>  %73 = fmul float %44, 0.000000e+00
>  %74 = fadd float %46, %73
>  %75 = fmul float %48, 0.000000e+00
>  %76 = fadd float %74, %75
>  %77 = fmul float %44, 0.000000e+00
>  %78 = fmul float %46, 0.000000e+00
>  %79 = fadd float %78, %77
>  %80 = fadd float %79, %48
>  %81 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %82 = load <16 x i8>, <16 x i8> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = call float @llvm.SI.load.const(<16 x i8> %82, i32 0)
>  %84 = fmul float %83, %21
>  %85 = call float @llvm.SI.load.const(<16 x i8> %82, i32 4)
>  %86 = fmul float %85, %21
>  %87 = call float @llvm.SI.load.const(<16 x i8> %82, i32 8)
>  %88 = fmul float %87, %21
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = call float @llvm.SI.load.const(<16 x i8> %90, i32 12)
>  %92 = fmul float %91, %21
>  %93 = call float @llvm.SI.load.const(<16 x i8> %90, i32 16)
>  %94 = fmul float %93, %22
>  %95 = fadd float %94, %84
>  %96 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %97 = load <16 x i8>, <16 x i8> addrspace(2)* %96, align 16, !invariant.load !0
>  %98 = call float @llvm.SI.load.const(<16 x i8> %97, i32 20)
>  %99 = fmul float %98, %22
>  %100 = fadd float %99, %86
>  %101 = call float @llvm.SI.load.const(<16 x i8> %97, i32 24)
>  %102 = fmul float %101, %22
>  %103 = fadd float %102, %88
>  %104 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %105 = load <16 x i8>, <16 x i8> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = call float @llvm.SI.load.const(<16 x i8> %105, i32 28)
>  %107 = fmul float %106, %22
>  %108 = fadd float %107, %92
>  %109 = call float @llvm.SI.load.const(<16 x i8> %105, i32 32)
>  %110 = fmul float %109, %23
>  %111 = fadd float %110, %95
>  %112 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %113 = load <16 x i8>, <16 x i8> addrspace(2)* %112, align 16, !invariant.load !0
>  %114 = call float @llvm.SI.load.const(<16 x i8> %113, i32 36)
>  %115 = fmul float %114, %23
>  %116 = fadd float %115, %100
>  %117 = call float @llvm.SI.load.const(<16 x i8> %113, i32 40)
>  %118 = fmul float %117, %23
>  %119 = fadd float %118, %103
>  %120 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %121 = load <16 x i8>, <16 x i8> addrspace(2)* %120, align 16, !invariant.load !0
>  %122 = call float @llvm.SI.load.const(<16 x i8> %121, i32 44)
>  %123 = fmul float %122, %23
>  %124 = fadd float %123, %108
>  %125 = call float @llvm.SI.load.const(<16 x i8> %121, i32 48)
>  %126 = fmul float %125, %24
>  %127 = fadd float %126, %111
>  %128 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %129 = load <16 x i8>, <16 x i8> addrspace(2)* %128, align 16, !invariant.load !0
>  %130 = call float @llvm.SI.load.const(<16 x i8> %129, i32 52)
>  %131 = fmul float %130, %24
>  %132 = fadd float %131, %116
>  %133 = call float @llvm.SI.load.const(<16 x i8> %129, i32 56)
>  %134 = fmul float %133, %24
>  %135 = fadd float %134, %119
>  %136 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %137 = load <16 x i8>, <16 x i8> addrspace(2)* %136, align 16, !invariant.load !0
>  %138 = call float @llvm.SI.load.const(<16 x i8> %137, i32 60)
>  %139 = fmul float %138, %24
>  %140 = fadd float %139, %124
>  %141 = call float @llvm.SI.load.const(<16 x i8> %137, i32 92)
>  %142 = fmul float %140, %141
>  %143 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %144 = load <16 x i8>, <16 x i8> addrspace(2)* %143, align 16, !invariant.load !0
>  %145 = call float @llvm.SI.load.const(<16 x i8> %144, i32 108)
>  %146 = call float @llvm.SI.load.const(<16 x i8> %144, i32 124)
>  %147 = call float @llvm.SI.load.const(<16 x i8> %144, i32 140)
>  %148 = fsub float %21, %145
>  %149 = fsub float %22, %146
>  %150 = fsub float %23, %147
>  %151 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %152 = load <16 x i8>, <16 x i8> addrspace(2)* %151, align 16, !invariant.load !0
>  %153 = call float @llvm.SI.load.const(<16 x i8> %152, i32 96)
>  %154 = fmul float %153, %148
>  %155 = call float @llvm.SI.load.const(<16 x i8> %152, i32 100)
>  %156 = fmul float %155, %148
>  %157 = call float @llvm.SI.load.const(<16 x i8> %152, i32 104)
>  %158 = fmul float %157, %148
>  %159 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %160 = load <16 x i8>, <16 x i8> addrspace(2)* %159, align 16, !invariant.load !0
>  %161 = call float @llvm.SI.load.const(<16 x i8> %160, i32 112)
>  %162 = fmul float %161, %149
>  %163 = fadd float %162, %154
>  %164 = call float @llvm.SI.load.const(<16 x i8> %160, i32 116)
>  %165 = fmul float %164, %149
>  %166 = fadd float %165, %156
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 120)
>  %170 = fmul float %169, %149
>  %171 = fadd float %170, %158
>  %172 = call float @llvm.SI.load.const(<16 x i8> %168, i32 128)
>  %173 = fmul float %172, %150
>  %174 = fadd float %173, %163
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 132)
>  %178 = fmul float %177, %150
>  %179 = fadd float %178, %166
>  %180 = call float @llvm.SI.load.const(<16 x i8> %176, i32 136)
>  %181 = fmul float %180, %150
>  %182 = fadd float %181, %171
>  %183 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %184 = load <16 x i8>, <16 x i8> addrspace(2)* %183, align 16, !invariant.load !0
>  %185 = call float @llvm.SI.load.const(<16 x i8> %184, i32 144)
>  %186 = fmul float %174, %185
>  %187 = call float @llvm.SI.load.const(<16 x i8> %184, i32 148)
>  %188 = fmul float %179, %187
>  %189 = fmul float %182, 5.000000e-01
>  %190 = fadd float %189, %186
>  %191 = fmul float %182, 5.000000e-01
>  %192 = fadd float %191, %188
>  %193 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %194 = load <16 x i8>, <16 x i8> addrspace(2)* %193, align 16, !invariant.load !0
>  %195 = call float @llvm.SI.load.const(<16 x i8> %194, i32 152)
>  %196 = call float @llvm.SI.load.const(<16 x i8> %194, i32 156)
>  %197 = fmul float %182, %195
>  %198 = fadd float %197, %196
>  %199 = call float @llvm.SI.load.const(<16 x i8> %194, i32 68)
>  %200 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %201 = load <16 x i8>, <16 x i8> addrspace(2)* %200, align 16, !invariant.load !0
>  %202 = call float @llvm.SI.load.const(<16 x i8> %201, i32 64)
>  %203 = fmul float %135, %199
>  %204 = fadd float %203, %202
>  %205 = call float @llvm.AMDGPU.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %206 = call float @llvm.SI.load.const(<16 x i8> %201, i32 72)
>  %207 = call float @llvm.pow.f32(float %205, float %206)
>  %208 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %209 = load <16 x i8>, <16 x i8> addrspace(2)* %208, align 16, !invariant.load !0
>  %210 = call float @llvm.SI.load.const(<16 x i8> %209, i32 76)
>  %211 = fsub float 1.000000e+00, %210
>  %212 = call float @llvm.SI.load.const(<16 x i8> %209, i32 76)
>  %213 = fmul float %212, %207
>  %214 = fadd float %213, %211
>  %215 = fmul float %68, %76
>  %216 = fmul float %60, %80
>  %217 = fmul float %64, %72
>  %218 = fmul float %64, %80
>  %219 = fsub float %218, %215
>  %220 = fmul float %68, %72
>  %221 = fsub float %220, %216
>  %222 = fmul float %60, %76
>  %223 = fsub float %222, %217
>  %224 = fmul float %219, %50
>  %225 = fmul float %221, %50
>  %226 = fmul float %223, %50
>  %227 = fmul float %214, %214
>  %228 = bitcast i32 %12 to float
>  %229 = insertvalue <{ float, float, float }> undef, float %228, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %21, float %22, float %23, float %142)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %190, float %192, float %198, float %182)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %41, float %42, float %227, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %72, float %76, float %80, float %224)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %225, float %226, float %60, float %64)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %68, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %127, float %132, float %135, float %140)
>  ret <{ float, float, float }> %229
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..15]
>DCL TEMP[0..13], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     6.0000,     0.0000,    -0.5000}
>IMM[2] FLT32 {    4.0000,     5.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[6], 2D
> 13: MOV TEMP[4].xy, IN[2].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[5], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
> 23: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, IMM[0].xxxx, TEMP[4].xyzz
> 26: ADD TEMP[4].xyz, TEMP[2].xyzz, -TEMP[4].xyzz
> 27: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 28: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].wwww
> 29: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[1].xyzz
> 30: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 31: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 32: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 33: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 34: ADD TEMP[4].x, IMM[0].wwww, -TEMP[4].xxxx
> 35: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 36: MUL TEMP[4].x, TEMP[3].yyyy, TEMP[4].xxxx
> 37: MAD TEMP[1].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 38: MUL TEMP[5], CONST[4], TEMP[1].xxxx
> 39: MAD TEMP[5], CONST[5], TEMP[1].yyyy, TEMP[5]
> 40: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[5]
> 41: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 42: MOV TEMP[5].xyz, TEMP[0].xyzz
> 43: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 44: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[2].xyzz
> 45: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[0].xyzz
> 46: MAD TEMP[6].xyz, IMM[0].xxxx, TEMP[6].xyzz, -TEMP[2].xyzz
> 47: ADD TEMP[7].x, IMM[0].wwww, -TEMP[3].zzzz
> 48: MUL TEMP[7].x, TEMP[7].xxxx, IMM[1].yyyy
> 49: MOV TEMP[8].x, CONST[11].wwww
> 50: MOV TEMP[8].y, CONST[12].wwww
> 51: MOV TEMP[8].z, CONST[13].wwww
> 52: ADD TEMP[8].xyz, TEMP[8].xyzz, -IN[0].xyzz
> 53: DP3 TEMP[9].x, TEMP[8].xyzz, TEMP[8].xyzz
> 54: SQRT TEMP[9].x, TEMP[9].xxxx
> 55: MOV TEMP[10].yz, IMM[1].zzzz
> 56: MAD TEMP[10].x, TEMP[9].xxxx, CONST[14].zzzz, CONST[14].wwww
> 57: MOV TEMP[11].yz, IMM[1].zzzz
> 58: MOV TEMP[11].x, IN[1].zzzz
> 59: MOV TEMP[12].yz, IMM[1].zzzz
> 60: MOV TEMP[13].xy, IN[1].xyyy
> 61: MOV TEMP[13].w, IN[1].wwww
> 62: TXP TEMP[13].w, TEMP[13], SAMP[3], 2D
> 63: MUL TEMP[12].x, TEMP[13].wwww, TEMP[13].wwww
> 64: MOV TEMP[13].xy, TEMP[1].xyyy
> 65: MOV TEMP[13].w, IMM[0].wwww
> 66: MOV TEMP[13].z, TEMP[1].zzzz
> 67: TXP TEMP[1].x, TEMP[13], SAMP[0], SHADOW2D
> 68: RCP TEMP[9].x, TEMP[9].xxxx
> 69: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[9].xxxx
> 70: DP3 TEMP[8].x, TEMP[8].xyzz, TEMP[0].xyzz
> 71: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 72: ADD TEMP[9].xyz, TEMP[10].xyzz, IMM[1].wwww
> 73: MUL TEMP[9].xyz, TEMP[9].xyzz, IMM[0].xxxx
> 74: ADD TEMP[9].xyz, IMM[0].wwww, -TEMP[9].xyzz
> 75: MOV_SAT TEMP[9].xyz, TEMP[9].xyzz
> 76: MUL TEMP[9].xyz, TEMP[12].xyzz, TEMP[9].xyzz
> 77: MOV_SAT TEMP[10].xyz, TEMP[11].xyzz
> 78: MUL TEMP[9].x, TEMP[9].xyzz, TEMP[10].xyzz
> 79: MUL TEMP[9].xyz, CONST[15].xyzz, TEMP[9].xxxx
> 80: MUL TEMP[9].xyz, TEMP[9].xyzz, TEMP[3].yyyy
> 81: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 82: MUL TEMP[10].x, IMM[2].xxxx, TEMP[3].yyyy
> 83: DP3 TEMP[11].x, -CONST[1].xyzz, TEMP[0].xyzz
> 84: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 85: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 86: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 87: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 88: MUL TEMP[1].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 89: MAD TEMP[1].xyz, TEMP[5].xyzz, TEMP[10].xxxx, TEMP[1].xyzz
> 90: MAD TEMP[1].xyz, TEMP[8].xxxx, TEMP[9].xyzz, TEMP[1].xyzz
> 91: MOV TEMP[5].xy, IN[2].xyyy
> 92: TEX TEMP[5].xyz, TEMP[5], SAMP[4], 2D
> 93: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
> 94: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 95: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
> 96: POW TEMP[0].x, TEMP[0].xxxx, IMM[2].yyyy
> 97: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[1].zzzz
> 98: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
> 99: MOV TEMP[2].xyz, TEMP[6].xyzz
>100: MOV TEMP[2].w, TEMP[7].xxxx
>101: TXL TEMP[2].xyz, TEMP[2], SAMP[2], CUBE
>102: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>103: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].xxxx
>104: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xyzz, TEMP[0].xyzz
>105: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>106: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].zzzz
>107: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>108: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].zzzz
>109: RCP TEMP[2].x, TEMP[2].xxxx
>110: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>111: FRC TEMP[2].x, CONST[1].wwww
>112: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].wwww
>113: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>114: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>115: MUL TEMP[1].x, IN[2].zzzz, TEMP[1].xxxx
>116: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>117: MOV TEMP[0].w, IN[0].wwww
>118: MOV OUT[0], TEMP[0]
>119: END
>radeonsi: Compiling shader 34
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 27, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 23, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fmul float %132, 2.000000e+00
>  %136 = fmul float %133, 2.000000e+00
>  %137 = fsub float %49, %134
>  %138 = fsub float %50, %135
>  %139 = fsub float %51, %136
>  %140 = fmul float %137, %59
>  %141 = fmul float %138, %60
>  %142 = fadd float %141, %140
>  %143 = fmul float %139, %61
>  %144 = fadd float %142, %143
>  %145 = fadd float %144, 1.000000e+00
>  %146 = fmul float %49, %59
>  %147 = fmul float %50, %60
>  %148 = fadd float %147, %146
>  %149 = fmul float %51, %61
>  %150 = fadd float %148, %149
>  %151 = fsub float 1.000000e+00, %150
>  %152 = call float @llvm.AMDGPU.clamp.(float %151, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float %145, %152
>  %154 = call float @llvm.AMDGPU.clamp.(float %153, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = fmul float %155, %155
>  %157 = fmul float %78, %156
>  %158 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %159 = fmul float %59, 0x4007700140000000
>  %160 = fadd float %159, %158
>  %161 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %162 = fmul float %60, 0x4007700140000000
>  %163 = fadd float %162, %161
>  %164 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %165 = fmul float %61, 0x4007700140000000
>  %166 = fadd float %165, %164
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 64)
>  %170 = fmul float %169, %160
>  %171 = call float @llvm.SI.load.const(<16 x i8> %168, i32 68)
>  %172 = fmul float %171, %160
>  %173 = call float @llvm.SI.load.const(<16 x i8> %168, i32 72)
>  %174 = fmul float %173, %160
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 80)
>  %178 = fmul float %177, %163
>  %179 = fadd float %178, %170
>  %180 = call float @llvm.SI.load.const(<16 x i8> %176, i32 84)
>  %181 = fmul float %180, %163
>  %182 = fadd float %181, %172
>  %183 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %184 = load <16 x i8>, <16 x i8> addrspace(2)* %183, align 16, !invariant.load !0
>  %185 = call float @llvm.SI.load.const(<16 x i8> %184, i32 88)
>  %186 = fmul float %185, %163
>  %187 = fadd float %186, %174
>  %188 = call float @llvm.SI.load.const(<16 x i8> %184, i32 96)
>  %189 = fmul float %188, %166
>  %190 = fadd float %189, %179
>  %191 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %192 = load <16 x i8>, <16 x i8> addrspace(2)* %191, align 16, !invariant.load !0
>  %193 = call float @llvm.SI.load.const(<16 x i8> %192, i32 100)
>  %194 = fmul float %193, %166
>  %195 = fadd float %194, %182
>  %196 = call float @llvm.SI.load.const(<16 x i8> %192, i32 104)
>  %197 = fmul float %196, %166
>  %198 = fadd float %197, %187
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 112)
>  %202 = fadd float %190, %201
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 116)
>  %204 = fadd float %195, %203
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 120)
>  %206 = fadd float %198, %205
>  %207 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %208 = load <8 x i32>, <8 x i32> addrspace(2)* %207, align 32, !invariant.load !0
>  %209 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %210 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %209, i64 0, i64 7, !amdgpu.uniform !0
>  %211 = load <4 x i32>, <4 x i32> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = extractelement <8 x i32> %208, i32 7
>  %213 = extractelement <4 x i32> %211, i32 0
>  %214 = and i32 %213, %212
>  %215 = insertelement <4 x i32> %211, i32 %214, i32 0
>  %216 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %217 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %218 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %219 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %220 = call float @llvm.fabs.f32(float %218)
>  %221 = fdiv float 1.000000e+00, %220, !fpmath !1
>  %222 = fmul float %216, %221
>  %223 = fadd float %222, 1.500000e+00
>  %224 = fmul float %217, %221
>  %225 = fadd float %224, 1.500000e+00
>  %226 = bitcast float %225 to i32
>  %227 = bitcast float %223 to i32
>  %228 = bitcast float %219 to i32
>  %229 = insertelement <4 x i32> undef, i32 %226, i32 0
>  %230 = insertelement <4 x i32> %229, i32 %227, i32 1
>  %231 = insertelement <4 x i32> %230, i32 %228, i32 2
>  %232 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %231, <8 x i32> %208, <4 x i32> %215, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %233 = extractelement <4 x float> %232, i32 0
>  %234 = extractelement <4 x float> %232, i32 1
>  %235 = extractelement <4 x float> %232, i32 2
>  %236 = extractelement <4 x float> %232, i32 3
>  %237 = fmul float %121, %49
>  %238 = fmul float %123, %50
>  %239 = fadd float %238, %237
>  %240 = fmul float %125, %51
>  %241 = fadd float %239, %240
>  %242 = fmul float %241, %121
>  %243 = fmul float %241, %123
>  %244 = fmul float %241, %125
>  %245 = fmul float %242, 2.000000e+00
>  %246 = fsub float %245, %49
>  %247 = fmul float %243, 2.000000e+00
>  %248 = fsub float %247, %50
>  %249 = fmul float %244, 2.000000e+00
>  %250 = fsub float %249, %51
>  %251 = fsub float 1.000000e+00, %79
>  %252 = fmul float %251, 6.000000e+00
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 188)
>  %256 = call float @llvm.SI.load.const(<16 x i8> %254, i32 204)
>  %257 = call float @llvm.SI.load.const(<16 x i8> %254, i32 220)
>  %258 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %259 = fsub float %255, %258
>  %260 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %261 = fsub float %256, %260
>  %262 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %263 = fsub float %257, %262
>  %264 = fmul float %259, %259
>  %265 = fmul float %261, %261
>  %266 = fadd float %265, %264
>  %267 = fmul float %263, %263
>  %268 = fadd float %266, %267
>  %269 = call float @llvm.sqrt.f32(float %268)
>  %270 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %271 = load <16 x i8>, <16 x i8> addrspace(2)* %270, align 16, !invariant.load !0
>  %272 = call float @llvm.SI.load.const(<16 x i8> %271, i32 232)
>  %273 = call float @llvm.SI.load.const(<16 x i8> %271, i32 236)
>  %274 = fmul float %269, %272
>  %275 = fadd float %274, %273
>  %276 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %277 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %278 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %279 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %280 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %281 = load <8 x i32>, <8 x i32> addrspace(2)* %280, align 32, !invariant.load !0
>  %282 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %283 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %282, i64 0, i64 15, !amdgpu.uniform !0
>  %284 = load <4 x i32>, <4 x i32> addrspace(2)* %283, align 16, !invariant.load !0
>  %285 = extractelement <8 x i32> %281, i32 7
>  %286 = extractelement <4 x i32> %284, i32 0
>  %287 = and i32 %286, %285
>  %288 = insertelement <4 x i32> %284, i32 %287, i32 0
>  %289 = fdiv float %277, %279, !fpmath !1
>  %290 = fdiv float %278, %279, !fpmath !1
>  %291 = bitcast float %289 to i32
>  %292 = bitcast float %290 to i32
>  %293 = insertelement <2 x i32> undef, i32 %291, i32 0
>  %294 = insertelement <2 x i32> %293, i32 %292, i32 1
>  %295 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %294, <8 x i32> %281, <4 x i32> %288, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %296 = extractelement <4 x float> %295, i32 3
>  %297 = fmul float %296, %296
>  %298 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %299 = load <8 x i32>, <8 x i32> addrspace(2)* %298, align 32, !invariant.load !0
>  %300 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %301 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %300, i64 0, i64 3, !amdgpu.uniform !0
>  %302 = load <4 x i32>, <4 x i32> addrspace(2)* %301, align 16, !invariant.load !0
>  %303 = extractelement <8 x i32> %299, i32 7
>  %304 = extractelement <4 x i32> %302, i32 0
>  %305 = and i32 %304, %303
>  %306 = insertelement <4 x i32> %302, i32 %305, i32 0
>  %307 = bitcast float %206 to i32
>  %308 = bitcast float %202 to i32
>  %309 = bitcast float %204 to i32
>  %310 = insertelement <4 x i32> undef, i32 %307, i32 0
>  %311 = insertelement <4 x i32> %310, i32 %308, i32 1
>  %312 = insertelement <4 x i32> %311, i32 %309, i32 2
>  %313 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %312, <8 x i32> %299, <4 x i32> %306, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %314 = extractelement <4 x float> %313, i32 0
>  %315 = fdiv float 1.000000e+00, %269, !fpmath !1
>  %316 = fmul float %259, %315
>  %317 = fmul float %261, %315
>  %318 = fmul float %263, %315
>  %319 = fmul float %316, %121
>  %320 = fmul float %317, %123
>  %321 = fadd float %320, %319
>  %322 = fmul float %318, %125
>  %323 = fadd float %321, %322
>  %324 = call float @llvm.AMDGPU.clamp.(float %323, float 0.000000e+00, float 1.000000e+00)
>  %325 = fadd float %275, -5.000000e-01
>  %326 = fmul float %325, 2.000000e+00
>  %327 = fsub float 1.000000e+00, %326
>  %328 = call float @llvm.AMDGPU.clamp.(float %327, float 0.000000e+00, float 1.000000e+00)
>  %329 = fmul float %297, %328
>  %330 = call float @llvm.AMDGPU.clamp.(float %276, float 0.000000e+00, float 1.000000e+00)
>  %331 = fmul float %329, %330
>  %332 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %333 = load <16 x i8>, <16 x i8> addrspace(2)* %332, align 16, !invariant.load !0
>  %334 = call float @llvm.SI.load.const(<16 x i8> %333, i32 240)
>  %335 = fmul float %334, %331
>  %336 = call float @llvm.SI.load.const(<16 x i8> %333, i32 244)
>  %337 = fmul float %336, %331
>  %338 = call float @llvm.SI.load.const(<16 x i8> %333, i32 248)
>  %339 = fmul float %338, %331
>  %340 = fmul float %335, %78
>  %341 = fmul float %337, %78
>  %342 = fmul float %339, %78
>  %343 = fmul float %233, %236
>  %344 = fmul float %234, %236
>  %345 = fmul float %235, %236
>  %346 = fmul float %78, 4.000000e+00
>  %347 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %348 = load <16 x i8>, <16 x i8> addrspace(2)* %347, align 16, !invariant.load !0
>  %349 = call float @llvm.SI.load.const(<16 x i8> %348, i32 16)
>  %350 = call float @llvm.SI.load.const(<16 x i8> %348, i32 20)
>  %351 = call float @llvm.SI.load.const(<16 x i8> %348, i32 24)
>  %352 = fmul float %349, %121
>  %353 = fsub float -0.000000e+00, %352
>  %354 = fmul float %350, %123
>  %355 = fsub float %353, %354
>  %356 = fmul float %351, %125
>  %357 = fsub float %355, %356
>  %358 = call float @llvm.AMDGPU.clamp.(float %357, float 0.000000e+00, float 1.000000e+00)
>  %359 = fmul float %314, %314
>  %360 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %361 = load <16 x i8>, <16 x i8> addrspace(2)* %360, align 16, !invariant.load !0
>  %362 = call float @llvm.SI.load.const(<16 x i8> %361, i32 48)
>  %363 = fmul float %362, %359
>  %364 = call float @llvm.SI.load.const(<16 x i8> %361, i32 52)
>  %365 = fmul float %364, %359
>  %366 = call float @llvm.SI.load.const(<16 x i8> %361, i32 56)
>  %367 = fmul float %366, %359
>  %368 = fmul float %363, %78
>  %369 = fmul float %365, %78
>  %370 = fmul float %367, %78
>  %371 = fmul float %358, %368
>  %372 = fmul float %358, %369
>  %373 = fmul float %358, %370
>  %374 = fmul float %343, %346
>  %375 = fadd float %374, %371
>  %376 = fmul float %344, %346
>  %377 = fadd float %376, %372
>  %378 = fmul float %345, %346
>  %379 = fadd float %378, %373
>  %380 = fmul float %324, %340
>  %381 = fadd float %380, %375
>  %382 = fmul float %324, %341
>  %383 = fadd float %382, %377
>  %384 = fmul float %324, %342
>  %385 = fadd float %384, %379
>  %386 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %387 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %388 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %389 = load <8 x i32>, <8 x i32> addrspace(2)* %388, align 32, !invariant.load !0
>  %390 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %391 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %390, i64 0, i64 19, !amdgpu.uniform !0
>  %392 = load <4 x i32>, <4 x i32> addrspace(2)* %391, align 16, !invariant.load !0
>  %393 = extractelement <8 x i32> %389, i32 7
>  %394 = extractelement <4 x i32> %392, i32 0
>  %395 = and i32 %394, %393
>  %396 = insertelement <4 x i32> %392, i32 %395, i32 0
>  %397 = bitcast float %386 to i32
>  %398 = bitcast float %387 to i32
>  %399 = insertelement <2 x i32> undef, i32 %397, i32 0
>  %400 = insertelement <2 x i32> %399, i32 %398, i32 1
>  %401 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %400, <8 x i32> %389, <4 x i32> %396, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %402 = extractelement <4 x float> %401, i32 0
>  %403 = extractelement <4 x float> %401, i32 1
>  %404 = extractelement <4 x float> %401, i32 2
>  %405 = fmul float %49, %121
>  %406 = fmul float %50, %123
>  %407 = fadd float %406, %405
>  %408 = fmul float %51, %125
>  %409 = fadd float %407, %408
>  %410 = call float @llvm.AMDGPU.clamp.(float %409, float 0.000000e+00, float 1.000000e+00)
>  %411 = fsub float 1.000000e+00, %410
>  %412 = call float @llvm.pow.f32(float %411, float 5.000000e+00)
>  %413 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %414 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %415 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %416 = fmul float %412, %413
>  %417 = fmul float %412, %414
>  %418 = fmul float %412, %415
>  %419 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %420 = load <8 x i32>, <8 x i32> addrspace(2)* %419, align 32, !invariant.load !0
>  %421 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %422 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %421, i64 0, i64 11, !amdgpu.uniform !0
>  %423 = load <4 x i32>, <4 x i32> addrspace(2)* %422, align 16, !invariant.load !0
>  %424 = extractelement <8 x i32> %420, i32 7
>  %425 = extractelement <4 x i32> %423, i32 0
>  %426 = and i32 %425, %424
>  %427 = insertelement <4 x i32> %423, i32 %426, i32 0
>  %428 = call float @llvm.amdgcn.cubetc(float %246, float %248, float %250)
>  %429 = call float @llvm.amdgcn.cubesc(float %246, float %248, float %250)
>  %430 = call float @llvm.amdgcn.cubema(float %246, float %248, float %250)
>  %431 = call float @llvm.amdgcn.cubeid(float %246, float %248, float %250)
>  %432 = call float @llvm.fabs.f32(float %430)
>  %433 = fdiv float 1.000000e+00, %432, !fpmath !1
>  %434 = fmul float %428, %433
>  %435 = fadd float %434, 1.500000e+00
>  %436 = fmul float %429, %433
>  %437 = fadd float %436, 1.500000e+00
>  %438 = bitcast float %437 to i32
>  %439 = bitcast float %435 to i32
>  %440 = bitcast float %431 to i32
>  %441 = bitcast float %252 to i32
>  %442 = insertelement <4 x i32> undef, i32 %438, i32 0
>  %443 = insertelement <4 x i32> %442, i32 %439, i32 1
>  %444 = insertelement <4 x i32> %443, i32 %440, i32 2
>  %445 = insertelement <4 x i32> %444, i32 %441, i32 3
>  %446 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %445, <8 x i32> %420, <4 x i32> %427, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %447 = extractelement <4 x float> %446, i32 0
>  %448 = extractelement <4 x float> %446, i32 1
>  %449 = extractelement <4 x float> %446, i32 2
>  %450 = fmul float %416, %447
>  %451 = fmul float %417, %448
>  %452 = fmul float %418, %449
>  %453 = fmul float %450, %157
>  %454 = fmul float %451, %157
>  %455 = fmul float %452, %157
>  %456 = fmul float %381, %402
>  %457 = fadd float %456, %453
>  %458 = fmul float %383, %403
>  %459 = fadd float %458, %454
>  %460 = fmul float %385, %404
>  %461 = fadd float %460, %455
>  %462 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %463 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %464 = load <16 x i8>, <16 x i8> addrspace(2)* %463, align 16, !invariant.load !0
>  %465 = call float @llvm.SI.load.const(<16 x i8> %464, i32 12)
>  %466 = fsub float %462, %465
>  %467 = call float @llvm.maxnum.f32(float %466, float 0.000000e+00)
>  %468 = call float @llvm.SI.load.const(<16 x i8> %464, i32 28)
>  %469 = call float @llvm.SI.load.const(<16 x i8> %464, i32 12)
>  %470 = fsub float %468, %469
>  %471 = fadd float %470, 0x3F50624DE0000000
>  %472 = fdiv float 1.000000e+00, %471, !fpmath !1
>  %473 = fmul float %467, %472
>  %474 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %475 = load <16 x i8>, <16 x i8> addrspace(2)* %474, align 16, !invariant.load !0
>  %476 = call float @llvm.SI.load.const(<16 x i8> %475, i32 28)
>  %477 = call float @llvm.floor.f32(float %476)
>  %478 = fsub float %476, %477
>  %479 = fmul float %478, 8.000000e+00
>  %480 = call float @llvm.pow.f32(float %473, float %479)
>  %481 = call float @llvm.AMDGPU.clamp.(float %480, float 0.000000e+00, float 1.000000e+00)
>  %482 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %483 = fmul float %482, %481
>  %484 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %485 = load <16 x i8>, <16 x i8> addrspace(2)* %484, align 16, !invariant.load !0
>  %486 = call float @llvm.SI.load.const(<16 x i8> %485, i32 32)
>  %487 = fsub float 1.000000e+00, %483
>  %488 = fmul float %457, %483
>  %489 = fmul float %486, %487
>  %490 = fadd float %488, %489
>  %491 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %492 = load <16 x i8>, <16 x i8> addrspace(2)* %491, align 16, !invariant.load !0
>  %493 = call float @llvm.SI.load.const(<16 x i8> %492, i32 36)
>  %494 = fsub float 1.000000e+00, %483
>  %495 = fmul float %459, %483
>  %496 = fmul float %493, %494
>  %497 = fadd float %495, %496
>  %498 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %499 = load <16 x i8>, <16 x i8> addrspace(2)* %498, align 16, !invariant.load !0
>  %500 = call float @llvm.SI.load.const(<16 x i8> %499, i32 40)
>  %501 = fsub float 1.000000e+00, %483
>  %502 = fmul float %461, %483
>  %503 = fmul float %500, %501
>  %504 = fadd float %502, %503
>  %505 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %506 = bitcast float %5 to i32
>  %507 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %506, 10
>  %508 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %507, float %490, 11
>  %509 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %508, float %497, 12
>  %510 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %509, float %504, 13
>  %511 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %510, float %505, 14
>  %512 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %511, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %512
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>radeonsi: Compiling shader 35
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %43, float %45, 20
>  %47 = add i32 %16, %12
>  %48 = bitcast i32 %47 to float
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %46, float %48, 21
>  %50 = add i32 %16, %12
>  %51 = bitcast i32 %50 to float
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %49, float %51, 22
>  %53 = add i32 %16, %12
>  %54 = bitcast i32 %53 to float
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %52, float %54, 23
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float }> %55
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[12:15], v5, s[12:15], 0 idxen ; E00C2000 80030C05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen   ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[15:18], v7, s[8:11], 0 idxen  ; E00C2000 80020F07
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	s_buffer_load_dword s24, s[0:3], 0x17                   ; C20C0117
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s28, s[0:3], 0x1b                   ; C20E011B
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s26, s[0:3], 0x19                   ; C20D0119
>	s_buffer_load_dword s32, s[0:3], 0x1f                   ; C210011F
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s30, s[0:3], 0x1d                   ; C20F011D
>	s_buffer_load_dword s34, s[0:3], 0x23                   ; C2110123
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s25, s[0:3], 0x18                   ; C20C8118
>	s_buffer_load_dword s27, s[0:3], 0x1a                   ; C20D811A
>	s_buffer_load_dword s31, s[0:3], 0x1e                   ; C20F811E
>	s_buffer_load_dword s29, s[0:3], 0x1c                   ; C20E811C
>	s_buffer_load_dword s20, s[0:3], 0x10                   ; C20A0110
>	s_buffer_load_dword s21, s[0:3], 0x11                   ; C20A8111
>	s_buffer_load_dword s22, s[0:3], 0x12                   ; C20B0112
>	s_buffer_load_dword s23, s[0:3], 0x13                   ; C20B8113
>	s_buffer_load_dword s33, s[0:3], 0x20                   ; C2108120
>	s_buffer_load_dword s35, s[0:3], 0x24                   ; C2118124
>	s_buffer_load_dword s36, s[0:3], 0x25                   ; C2120125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v0, s4, v8                                ; 10001004
>	v_mad_f32 v1, 2.0, v12, -1.0                            ; D2820001 03CE18F4
>	v_mad_f32 v12, 2.0, v14, -1.0                           ; D282000C 03CE1CF4
>	v_mul_f32_e32 v14, s7, v8                               ; 101C1007
>	v_mac_f32_e32 v14, s11, v9                              ; 3E1C120B
>	v_mac_f32_e32 v14, s15, v10                             ; 3E1C140F
>	v_mac_f32_e32 v14, s19, v11                             ; 3E1C1613
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v17, s24, v14                             ; 10221C18
>	v_mad_f32 v7, 2.0, v13, -1.0                            ; D2820007 03CE1AF4
>	v_mul_f32_e32 v13, s5, v8                               ; 101A1005
>	exp 15, 32, 0, 0, 0, v8, v9, v10, v17                   ; F800020F 110A0908
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v17, s6, v8                               ; 10221006
>	v_subrev_f32_e32 v8, s28, v8                            ; 0A10101C
>	v_mac_f32_e32 v0, s8, v9                                ; 3E001208
>	v_mac_f32_e32 v13, s9, v9                               ; 3E1A1209
>	v_mac_f32_e32 v17, s10, v9                              ; 3E22120A
>	v_subrev_f32_e32 v9, s32, v9                            ; 0A121220
>	v_mul_f32_e32 v19, s26, v8                              ; 1026101A
>	v_mac_f32_e32 v0, s12, v10                              ; 3E00140C
>	v_mac_f32_e32 v13, s13, v10                             ; 3E1A140D
>	v_mac_f32_e32 v17, s14, v10                             ; 3E22140E
>	v_subrev_f32_e32 v10, s34, v10                          ; 0A141422
>	v_mac_f32_e32 v19, s30, v9                              ; 3E26121E
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v19, s4, v10                              ; 3E261404
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s0, s[0:3], 0x27                    ; C2000127
>	v_mad_f32 v18, 0, v1, v7                                ; D2820012 041E0280
>	v_mac_f32_e32 v0, s16, v11                              ; 3E001610
>	v_mac_f32_e32 v13, s17, v11                             ; 3E1A1611
>	v_mac_f32_e32 v17, s18, v11                             ; 3E221612
>	v_mad_f32 v11, 0, v7, v1                                ; D282000B 04060E80
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_mac_f32_e32 v18, 0, v12                               ; 3E241880
>	v_mac_f32_e32 v12, 0, v7                                ; 3E180E80
>	v_mul_f32_e32 v7, s25, v8                               ; 100E1019
>	v_mul_f32_e32 v8, s27, v8                               ; 1010101B
>	v_mac_f32_e32 v8, s31, v9                               ; 3E10121F
>	v_mac_f32_e32 v7, s29, v9                               ; 3E0E121D
>	v_mac_f32_e32 v8, s5, v10                               ; 3E101405
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s0                                    ; 7E120200
>	v_mac_f32_e32 v12, 0, v1                                ; 3E180280
>	v_mac_f32_e32 v7, s33, v10                              ; 3E0E1421
>	v_mul_f32_e32 v1, 0.5, v8                               ; 100210F0
>	v_mad_f32 v7, s35, v7, v1                               ; D2820007 04060E23
>	v_mac_f32_e32 v1, s36, v19                              ; 3E022624
>	v_mac_f32_e32 v9, s4, v8                                ; 3E121004
>	exp 15, 33, 0, 0, 0, v7, v1, v9, v8                     ; F800021F 08090107
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mov_b32_e32 v8, s20                                   ; 7E100214
>	v_mac_f32_e32 v8, s21, v17                              ; 3E102215
>	v_add_f32_e64 v8, v8, 0 clamp                           ; D2060808 00010108
>	v_log_f32_e32 v8, v8                                    ; 7E104F08
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v1, 0, v4, v3                                 ; D2820001 040E0880
>	v_mad_f32 v7, 0, v3, v4                                 ; D2820007 04120680
>	v_mac_f32_e32 v1, 0, v5                                 ; 3E020A80
>	v_mac_f32_e32 v7, 0, v5                                 ; 3E0E0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_legacy_f32_e32 v3, s22, v8                        ; 0E061016
>	v_exp_f32_e32 v3, v3                                    ; 7E064B03
>	v_sub_f32_e64 v4, 1.0, s23                              ; D2080004 00002EF2
>	v_mac_f32_e32 v4, s23, v3                               ; 3E080617
>	v_mul_f32_e32 v3, v7, v12                               ; 10061907
>	v_mul_f32_e32 v8, v5, v11                               ; 10101705
>	v_mul_f32_e32 v9, v1, v18                               ; 10122501
>	v_mul_f32_e32 v4, v4, v4                                ; 10080904
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v18, v5, -v3                              ; D2820003 840E0B12
>	v_mad_f32 v8, v12, v1, -v8                              ; D2820008 8422030C
>	v_mad_f32 v9, v11, v7, -v9                              ; D2820009 84260F0B
>	v_mad_f32 v3, v6, v3, -v3                               ; D2820003 840E0706
>	exp 15, 34, 0, 0, 0, v15, v16, v4, v0                   ; F800022F 0004100F
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	v_mad_f32 v6, v6, v9, -v9                               ; D2820006 84261306
>	exp 15, 35, 0, 0, 0, v1, v7, v5, v3                     ; F800023F 03050701
>	exp 15, 36, 0, 0, 0, v8, v6, v11, v18                   ; F800024F 120B0608
>	exp 15, 37, 0, 0, 0, v12, v0, v0, v0                    ; F800025F 0000000C
>	exp 15, 12, 0, 1, 0, v0, v13, v17, v14                  ; F80008CF 0E110D00
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 672 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 3, [m0]                          ; C8200F04
>	v_interp_p2_f32 v8, [v8], v5, 3, 3, [m0]                    ; C8210F05
>	v_interp_p1_f32 v9, v4, 0, 4, [m0]                          ; C8241004
>	v_interp_p2_f32 v9, [v9], v5, 0, 4, [m0]                    ; C8251005
>	v_interp_p1_f32 v10, v4, 1, 4, [m0]                         ; C8281104
>	v_interp_p2_f32 v10, [v10], v5, 1, 4, [m0]                  ; C8291105
>	v_interp_p1_f32 v0, v4, 2, 4, [m0]                          ; C8001204
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 4, [m0]                    ; C8011205
>	v_interp_p1_f32 v1, v4, 3, 4, [m0]                          ; C8041304
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	v_interp_p2_f32 v1, [v1], v5, 3, 4, [m0]                    ; C8051305
>	v_interp_p1_f32 v6, v4, 0, 5, [m0]                          ; C8181404
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 5, [m0]                    ; C8191405
>	v_interp_p1_f32 v12, v2, 0, 0, [m0]                         ; C8300002
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                  ; C8310003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v11, s8, v12                                  ; 08161808
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v20, v2, 2, 0, [m0]                         ; C8500202
>	v_sub_f32_e32 v14, s9, v19                                  ; 081C2609
>	v_mul_f32_e32 v7, v11, v11                                  ; 100E170B
>	v_interp_p2_f32 v20, [v20], v3, 2, 0, [m0]                  ; C8510203
>	v_sub_f32_e32 v15, s11, v20                                 ; 081E280B
>	v_mac_f32_e32 v7, v14, v14                                  ; 3E0E1D0E
>	v_mac_f32_e32 v7, v15, v15                                  ; 3E0E1F0F
>	v_rsq_f32_e32 v16, v7                                       ; 7E205D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v21, v16, v11                                 ; 102A1710
>	v_mul_f32_e32 v22, v16, v14                                 ; 102C1D10
>	s_load_dwordx4 s[24:27], s[4:5], 0x6c                       ; C08C056C
>	v_mul_f32_e32 v23, v7, v0                                   ; 102E0107
>	v_mul_f32_e32 v24, v7, v1                                   ; 10300307
>	v_mul_f32_e32 v0, v23, v21                                  ; 10002B17
>	s_load_dwordx8 s[16:23], s[4:5], 0x60                       ; C0C80560
>	v_mul_f32_e32 v25, v7, v6                                   ; 10320D07
>	v_mul_f32_e32 v26, v16, v15                                 ; 10341F10
>	v_mac_f32_e32 v0, v24, v22                                  ; 3E002D18
>	v_mac_f32_e32 v0, v25, v26                                  ; 3E003519
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v27, v0, 0 clamp                              ; D206081B 00010100
>	v_interp_p1_f32 v0, v2, 0, 2, [m0]                          ; C8000802
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                    ; C8010803
>	v_interp_p1_f32 v1, v2, 1, 2, [m0]                          ; C8040902
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s24, s24, s23                                     ; 87181718
>	v_interp_p2_f32 v1, [v1], v3, 1, 2, [m0]                    ; C8050903
>	image_sample v[17:18], v[0:1], s[16:23], s[24:27] dmask:0x6 ; F0800600 00C41100
>	s_load_dwordx4 s[28:31], s[4:5], 0x5c                       ; C08E055C
>	s_load_dwordx8 s[16:23], s[4:5], 0x50                       ; C0C80550
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                       ; C090051C
>	s_buffer_load_dword s36, s[0:3], 0x10                       ; C2120110
>	s_buffer_load_dword s37, s[0:3], 0x11                       ; C2128111
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s28, s28, s23                                     ; 871C171C
>	image_sample v[6:7], v[0:1], s[16:23], s[28:31] dmask:0xa   ; F0800A00 00E40600
>	v_interp_p1_f32 v30, v4, 0, 3, [m0]                         ; C8780C04
>	v_interp_p2_f32 v30, [v30], v5, 0, 3, [m0]                  ; C8790C05
>	v_interp_p1_f32 v31, v4, 1, 3, [m0]                         ; C87C0D04
>	v_interp_p2_f32 v31, [v31], v5, 1, 3, [m0]                  ; C87D0D05
>	v_interp_p1_f32 v4, v4, 2, 3, [m0]                          ; C8100E04
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v28, v7, v7                                   ; 06380F07
>	v_add_f32_e32 v29, v6, v6                                   ; 063A0D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_interp_p2_f32 v4, [v4], v5, 2, 3, [m0]                    ; C8110E05
>	v_mad_f32 v30, v28, v30, -v30                               ; D282001E 847A3D1C
>	v_mad_f32 v31, v28, v31, -v31                               ; D282001F 847E3F1C
>	v_mad_f32 v28, v28, v4, -v4                                 ; D282001C 8412091C
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v4, v29, v6, -v6                                  ; D2820004 841A0D1D
>	v_mac_f32_e32 v4, v7, v7                                    ; 3E080F07
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v30, v6, v8                                   ; 3E3C1106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v31, v6, v9                                   ; 3E3E1306
>	v_mac_f32_e32 v28, v6, v10                                  ; 3E381506
>	v_mac_f32_e32 v30, v4, v23                                  ; 3E3C2F04
>	v_mac_f32_e32 v31, v4, v24                                  ; 3E3E3104
>	v_mac_f32_e32 v28, v4, v25                                  ; 3E383304
>	v_cubema_f32 v4, v30, v31, v28                              ; D28E0004 04723F1E
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_mul_f32_e32 v21, v21, v30                                 ; 102A3D15
>	v_mac_f32_e32 v21, v22, v31                                 ; 3E2A3F16
>	v_cubetc_f32 v6, v30, v31, v28                              ; D28C0006 04723F1E
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v7, v30, v31, v28                              ; D28A0007 04723F1E
>	v_mac_f32_e32 v21, v26, v28                                 ; 3E2A391A
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v7, v4                                    ; D2820005 04120F05
>	v_mul_f32_e32 v7, v30, v21                                  ; 100E2B1E
>	v_mac_f32_e32 v7, v30, v21                                  ; 3E0E2B1E
>	s_load_dwordx8 s[24:31], s[4:5], 0x10                       ; C0CC0510
>	v_mad_f32 v22, v11, v16, -v7                                ; D2820016 841E210B
>	v_mad_f32 v26, -v11, v16, v7                                ; D282001A 241E210B
>	v_mul_f32_e32 v7, v31, v21                                  ; 100E2B1F
>	v_mac_f32_e32 v7, v31, v21                                  ; 3E0E2B1F
>	v_mad_f32 v29, v14, v16, -v7                                ; D282001D 841E210E
>	v_mad_f32 v32, -v14, v16, v7                                ; D2820020 241E210E
>	v_mul_f32_e32 v7, v28, v21                                  ; 100E2B1C
>	v_mac_f32_e32 v7, v28, v21                                  ; 3E0E2B1C
>	v_mad_f32 v14, v15, v16, -v7                                ; D282000E 841E210F
>	v_mad_f32 v33, -v15, v16, v7                                ; D2820021 241E210F
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	v_cubeid_f32 v7, v30, v31, v28                              ; D2880007 04723F1E
>	image_sample v[8:11], v[5:8], s[24:31], s[32:35] dmask:0xf  ; F0800F00 01060805
>	v_interp_p1_f32 v34, v2, 2, 1, [m0]                         ; C8880602
>	v_interp_p2_f32 v34, [v34], v3, 2, 1, [m0]                  ; C8890603
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                          ; C8140402
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                    ; C8150403
>	v_interp_p1_f32 v6, v2, 1, 1, [m0]                          ; C8180502
>	v_interp_p2_f32 v6, [v6], v3, 1, 1, [m0]                    ; C8190503
>	v_interp_p1_f32 v7, v2, 3, 1, [m0]                          ; C81C0702
>	v_interp_p2_f32 v7, [v7], v3, 3, 1, [m0]                    ; C81D0703
>	v_mov_b32_e32 v15, 0x6f800000                               ; 7E1E02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v15, |v7|                             ; D002026A 00020F0F
>	v_mov_b32_e32 v15, 0x2f800000                               ; 7E1E02FF 2F800000
>	v_cndmask_b32_e32 v15, 1.0, v15, vcc                        ; 001E1EF2
>	v_mul_f32_e32 v7, v15, v7                                   ; 100E0F0F
>	v_rcp_f32_e32 v7, v7                                        ; 7E0E5507
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_load_dwordx4 s[32:35], s[4:5], 0x3c                       ; C090053C
>	s_load_dwordx8 s[24:31], s[4:5], 0x30                       ; C0CC0530
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v6, v7, v6                                    ; 100C0D07
>	v_mul_f32_e32 v7, v23, v22                                  ; 100E2D17
>	v_mac_f32_e32 v7, v24, v29                                  ; 3E0E3B18
>	v_mac_f32_e32 v7, v25, v14                                  ; 3E0E1D19
>	v_add_f32_e32 v7, 1.0, v7                                   ; 060E0EF2
>	v_subrev_f32_e32 v7, v27, v7                                ; 0A0E0F1B
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_sub_f32_e32 v14, 1.0, v7                                  ; 081C0EF2
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	s_buffer_load_dword s39, s[0:3], 0x18                       ; C2138118
>	s_buffer_load_dword s40, s[0:3], 0x19                       ; C2140119
>	s_buffer_load_dword s45, s[0:3], 0x2f                       ; C216812F
>	v_mad_f32 v22, -v7, v14, v14                                ; D2820016 243A1D07
>	v_mov_b32_e32 v7, 0x403b800a                                ; 7E0E02FF 403B800A
>	s_buffer_load_dword s38, s[0:3], 0x16                       ; C2130116
>	s_buffer_load_dword s42, s[0:3], 0x1c                       ; C215011C
>	s_buffer_load_dword s43, s[0:3], 0x1d                       ; C215811D
>	s_buffer_load_dword s46, s[0:3], 0x33                       ; C2170133
>	v_mad_f32 v14, v7, v23, v12                                 ; D282000E 04322F07
>	s_buffer_load_dword s47, s[0:3], 0x37                       ; C2178137
>	v_mul_f32_e32 v5, v5, v15                                   ; 100A1F05
>	v_mul_f32_e32 v6, v6, v15                                   ; 100C1F06
>	v_mad_f32 v15, v7, v24, v19                                 ; D282000F 044E3107
>	v_mul_f32_e32 v16, s36, v14                                 ; 10201C24
>	v_mul_f32_e32 v23, s37, v14                                 ; 102E1C25
>	v_mad_f32 v7, v7, v25, v20                                  ; D2820007 04523307
>	v_mac_f32_e32 v16, s9, v15                                  ; 3E201E09
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v23, s11, v15                                 ; 3E2E1E0B
>	s_buffer_load_dword s9, s[0:3], 0x3b                        ; C204813B
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	s_buffer_load_dword s41, s[0:3], 0x1a                       ; C214811A
>	image_sample v5, v[5:6], s[24:31], s[32:35] dmask:0x8       ; F0800800 01060505
>	v_mul_f32_e32 v14, s8, v14                                  ; 101C1C08
>	v_sub_f32_e32 v12, s45, v12                                 ; 0818182D
>	s_buffer_load_dword s44, s[0:3], 0x1e                       ; C216011E
>	s_load_dwordx4 s[12:15], s[4:5], 0xc                        ; C086050C
>	s_load_dwordx8 s[28:35], s[4:5], 0x0                        ; C0CE0500
>	v_mac_f32_e32 v16, s39, v7                                  ; 3E200E27
>	v_mac_f32_e32 v23, s40, v7                                  ; 3E2E0E28
>	s_buffer_load_dword s8, s[0:3], 0x3a                        ; C204013A
>	v_mac_f32_e32 v14, s38, v15                                 ; 3E1C1E26
>	v_add_f32_e32 v15, s42, v16                                 ; 061E202A
>	v_add_f32_e32 v16, s43, v23                                 ; 06202E2B
>	s_load_dwordx8 s[16:23], s[4:5], 0x20                       ; C0C80520
>	s_load_dwordx4 s[24:27], s[4:5], 0x2c                       ; C08C052C
>	v_sub_f32_e32 v23, s46, v19                                 ; 082E262E
>	v_mul_f32_e32 v24, v12, v12                                 ; 1030190C
>	v_sub_f32_e32 v20, s47, v20                                 ; 0828282F
>	v_mac_f32_e32 v24, v23, v23                                 ; 3E302F17
>	v_mac_f32_e32 v24, v20, v20                                 ; 3E302914
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v14, s41, v7                                  ; 3E1C0E29
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_sqrt_f32_e32 v25, v24                                     ; 7E326718
>	v_mov_b32_e32 v27, s9                                       ; 7E360209
>	v_add_f32_e32 v14, s44, v14                                 ; 061C1C2C
>	v_mad_f32 v7, -v18, v7, v7                                  ; D2820007 241E0F12
>	v_mac_f32_e32 v27, s8, v25                                  ; 3E363208
>	v_mul_f32_e32 v22, v22, v17                                 ; 102C2316
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	s_and_b32 s12, s12, s35                                     ; 870C230C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_rsq_f32_e32 v11, v24                                      ; 7E165D18
>	s_buffer_load_dword s6, s[0:3], 0x4                         ; C2030104
>	image_sample_c v6, v[14:17], s[28:35], s[12:15] dmask:0x1   ; F0A00100 0067060E
>	s_buffer_load_dword s7, s[0:3], 0x5                         ; C2038105
>	v_mul_f32_e32 v12, v11, v12                                 ; 1018190B
>	v_mul_f32_e32 v14, v11, v23                                 ; 101C2F0B
>	v_mul_f32_e32 v12, v30, v12                                 ; 1018191E
>	v_mul_f32_e32 v11, v11, v20                                 ; 1016290B
>	v_mac_f32_e32 v12, v31, v14                                 ; 3E181D1F
>	v_mac_f32_e32 v12, v28, v11                                 ; 3E18171C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v11, s6, v30                                  ; 10163C06
>	s_buffer_load_dword s8, s[0:3], 0x6                         ; C2040106
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	s_buffer_load_dword s12, s[0:3], 0xc                        ; C206010C
>	s_buffer_load_dword s13, s[0:3], 0xd                        ; C206810D
>	v_mad_f32 v11, -s7, v31, -v11                               ; D282000B A42E3E07
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v11, -s8, v28, v11                                ; D282000B 242E3808
>	v_mul_f32_e32 v14, s12, v6                                  ; 101C0C0C
>	v_mul_f32_e32 v15, s13, v6                                  ; 101E0C0D
>	v_mul_f32_e32 v6, s6, v6                                    ; 100C0C06
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_mul_f32_e32 v14, v17, v14                                 ; 101C1D11
>	v_mul_f32_e32 v15, v17, v15                                 ; 101E1F11
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_mul_f32_e32 v14, v14, v11                                 ; 101C170E
>	v_mul_f32_e32 v15, v15, v11                                 ; 101E170F
>	v_mul_f32_e32 v11, v6, v11                                  ; 10161706
>	v_mul_f32_e32 v6, 4.0, v17                                  ; 100C22F6
>	s_buffer_load_dword s7, s[0:3], 0x3c                        ; C203813C
>	v_mac_f32_e32 v14, v6, v8                                   ; 3E1C1106
>	v_mac_f32_e32 v15, v6, v9                                   ; 3E1E1306
>	v_mac_f32_e32 v11, v6, v10                                  ; 3E161506
>	v_add_f32_e32 v6, -0.5, v27                                 ; 060C36F1
>	v_mad_f32 v6, -2.0, v6, 1.0                                 ; D2820006 03CA0CF5
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s8, s[0:3], 0x3d                        ; C204013D
>	s_buffer_load_dword s11, s[0:3], 0x3e                       ; C205813E
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	v_add_f32_e64 v6, v34, 0 clamp                              ; D2060806 00010122
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s7, v5                                    ; 10100A07
>	v_add_f32_e64 v6, v12, 0 clamp                              ; D2060806 0001010C
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_mac_f32_e32 v14, v8, v6                                   ; 3E1C0D08
>	v_mul_f32_e32 v8, s8, v5                                    ; 10100A08
>	v_mul_f32_e32 v5, s11, v5                                   ; 100A0A0B
>	s_buffer_load_dword s9, s[0:3], 0x7                         ; C2048107
>	s_buffer_load_dword s6, s[0:3], 0x3                         ; C2030103
>	s_buffer_load_dword s7, s[0:3], 0x8                         ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                         ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xa                        ; C205810A
>	s_load_dwordx8 s[28:35], s[4:5], 0x40                       ; C0CE0540
>	s_load_dwordx4 s[0:3], s[4:5], 0x4c                         ; C080054C
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_mac_f32_e32 v15, v8, v6                                   ; 3E1E0D08
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mul_f32_e32 v5, v17, v5                                   ; 100A0B11
>	v_cubema_f32 v16, v26, v32, v33                             ; D28E0010 0486411A
>	v_log_f32_e32 v17, v8                                       ; 7E224F08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s0, s0, s35                                       ; 87002300
>	image_sample v[8:10], v[0:1], s[28:35], s[0:3] dmask:0x7    ; F0800700 00070800
>	v_rcp_f32_e64 v1, |v16|                                     ; D3540101 00000110
>	v_mac_f32_e32 v11, v5, v6                                   ; 3E160D05
>	v_cubetc_f32 v5, v26, v32, v33                              ; D28C0005 0486411A
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v17                    ; 0E0022FF 40A00000
>	v_cubesc_f32 v12, v26, v32, v33                             ; D28A000C 0486411A
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_cubeid_f32 v6, v26, v32, v33                              ; D2880006 0486411A
>	v_max_f32_e32 v18, 0, v18                                   ; 20242480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s24, s24, s23                                     ; 87181718
>	v_mac_f32_e32 v4, v1, v12                                   ; 3E081901
>	v_mul_f32_e32 v0, v18, v0                                   ; 10000112
>	image_sample_l v[4:6], v[4:7], s[16:23], s[24:27] dmask:0x7 ; F0900700 00C40404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v22, v0                                   ; 100A0116
>	v_mov_b32_e32 v0, s6                                        ; 7E000206
>	v_sub_f32_e32 v0, s9, v0                                    ; 08000009
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s6, v19                                ; 0A0C2606
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	v_mul_f32_e32 v1, v22, v1                                   ; 10020316
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s9                                      ; 7E0C4809
>	v_sub_f32_e32 v6, s9, v6                                    ; 080C0C09
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	v_interp_p1_f32 v6, v2, 2, 2, [m0]                          ; C8180A02
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 2, [m0]                    ; C8190A03
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v22, v4                                   ; 10080916
>	v_mac_f32_e32 v1, v8, v14                                   ; 3E021D08
>	v_mad_f32 v0, -v6, s7, s7                                   ; D2820000 201C0F06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v15                                   ; 3E081F09
>	v_mad_f32 v1, -v6, s8, s8                                   ; D2820001 20201106
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v11                                  ; 3E0A170A
>	v_mad_f32 v4, -v6, s11, s11                                 ; D2820004 202C1706
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1584 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL OUT[4].xyz, GENERIC[3]
>DCL CONST[0..9]
>DCL TEMP[0..6], LOCAL
>IMM[0] FLT32 {    0.5000,     1.0000,     2.0000,    -1.0000}
>IMM[1] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV TEMP[1].xyz, IN[0].xyzx
>  5: MUL TEMP[2].x, TEMP[0].wwww, CONST[5].wwww
>  6: MOV TEMP[1].w, TEMP[2].xxxx
>  7: MOV TEMP[2].x, CONST[6].wwww
>  8: MOV TEMP[2].y, CONST[7].wwww
>  9: MOV TEMP[2].z, CONST[8].wwww
> 10: ADD TEMP[2].xyz, IN[0].xyzz, -TEMP[2].xyzz
> 11: MUL TEMP[3].xyz, CONST[6].xyzz, TEMP[2].xxxx
> 12: MAD TEMP[3].xyz, CONST[7].xyzz, TEMP[2].yyyy, TEMP[3].xyzz
> 13: MAD TEMP[2].xyz, CONST[8].xyzz, TEMP[2].zzzz, TEMP[3].xyzz
> 14: MOV TEMP[3].w, TEMP[2].zzzz
> 15: MUL TEMP[4].xy, TEMP[2].xyyy, CONST[9].xyyy
> 16: MAD TEMP[3].xy, IMM[0].xxxx, TEMP[2].zzzz, TEMP[4].xyyy
> 17: MAD TEMP[2].x, TEMP[2].zzzz, CONST[9].zzzz, CONST[9].wwww
> 18: MOV TEMP[3].z, TEMP[2].xxxx
> 19: MAD TEMP[2].x, TEMP[0].zzzz, CONST[4].yyyy, CONST[4].xxxx
> 20: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 21: POW TEMP[2].x, TEMP[2].xxxx, CONST[4].zzzz
> 22: ADD TEMP[4].x, IMM[0].yyyy, -CONST[4].wwww
> 23: MAD TEMP[2].x, CONST[4].wwww, TEMP[2].xxxx, TEMP[4].xxxx
> 24: MAD TEMP[4].xyz, IN[1].xyzz, IMM[0].zzzz, IMM[0].wwww
> 25: DP3 TEMP[5].x, TEMP[4].xyzz, IMM[1].xyyy
> 26: DP3 TEMP[6].x, TEMP[4].xyzz, IMM[1].yxyy
> 27: MOV TEMP[5].y, TEMP[6].xxxx
> 28: DP3 TEMP[4].x, TEMP[4].xyzz, IMM[1].yyxx
> 29: MOV TEMP[5].z, TEMP[4].xxxx
> 30: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 31: MOV TEMP[2].z, TEMP[2].xxxx
> 32: MOV TEMP[2].xy, IN[2].xyxx
> 33: MOV OUT[1], TEMP[1]
> 34: MOV OUT[0], TEMP[0]
> 35: MOV OUT[3].xyz, TEMP[2].xyzx
> 36: MOV OUT[4].xyz, TEMP[5].xyzx
> 37: MOV OUT[2], TEMP[3]
> 38: END
>radeonsi: Compiling shader 36
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 0
>  %28 = extractelement <4 x float> %26, i32 1
>  %29 = extractelement <4 x float> %26, i32 2
>  %30 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !invariant.load !0
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %31, i32 0, i32 %16)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %36 = load <16 x i8>, <16 x i8> addrspace(2)* %35, align 16, !invariant.load !0
>  %37 = call float @llvm.SI.load.const(<16 x i8> %36, i32 0)
>  %38 = fmul float %37, %20
>  %39 = call float @llvm.SI.load.const(<16 x i8> %36, i32 4)
>  %40 = fmul float %39, %20
>  %41 = call float @llvm.SI.load.const(<16 x i8> %36, i32 8)
>  %42 = fmul float %41, %20
>  %43 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %44 = load <16 x i8>, <16 x i8> addrspace(2)* %43, align 16, !invariant.load !0
>  %45 = call float @llvm.SI.load.const(<16 x i8> %44, i32 12)
>  %46 = fmul float %45, %20
>  %47 = call float @llvm.SI.load.const(<16 x i8> %44, i32 16)
>  %48 = fmul float %47, %21
>  %49 = fadd float %48, %38
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 20)
>  %53 = fmul float %52, %21
>  %54 = fadd float %53, %40
>  %55 = call float @llvm.SI.load.const(<16 x i8> %51, i32 24)
>  %56 = fmul float %55, %21
>  %57 = fadd float %56, %42
>  %58 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %59 = load <16 x i8>, <16 x i8> addrspace(2)* %58, align 16, !invariant.load !0
>  %60 = call float @llvm.SI.load.const(<16 x i8> %59, i32 28)
>  %61 = fmul float %60, %21
>  %62 = fadd float %61, %46
>  %63 = call float @llvm.SI.load.const(<16 x i8> %59, i32 32)
>  %64 = fmul float %63, %22
>  %65 = fadd float %64, %49
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 36)
>  %69 = fmul float %68, %22
>  %70 = fadd float %69, %54
>  %71 = call float @llvm.SI.load.const(<16 x i8> %67, i32 40)
>  %72 = fmul float %71, %22
>  %73 = fadd float %72, %57
>  %74 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %75 = load <16 x i8>, <16 x i8> addrspace(2)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const(<16 x i8> %75, i32 44)
>  %77 = fmul float %76, %22
>  %78 = fadd float %77, %62
>  %79 = call float @llvm.SI.load.const(<16 x i8> %75, i32 48)
>  %80 = fmul float %79, %23
>  %81 = fadd float %80, %65
>  %82 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %83 = load <16 x i8>, <16 x i8> addrspace(2)* %82, align 16, !invariant.load !0
>  %84 = call float @llvm.SI.load.const(<16 x i8> %83, i32 52)
>  %85 = fmul float %84, %23
>  %86 = fadd float %85, %70
>  %87 = call float @llvm.SI.load.const(<16 x i8> %83, i32 56)
>  %88 = fmul float %87, %23
>  %89 = fadd float %88, %73
>  %90 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %91 = load <16 x i8>, <16 x i8> addrspace(2)* %90, align 16, !invariant.load !0
>  %92 = call float @llvm.SI.load.const(<16 x i8> %91, i32 60)
>  %93 = fmul float %92, %23
>  %94 = fadd float %93, %78
>  %95 = call float @llvm.SI.load.const(<16 x i8> %91, i32 92)
>  %96 = fmul float %94, %95
>  %97 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %98 = load <16 x i8>, <16 x i8> addrspace(2)* %97, align 16, !invariant.load !0
>  %99 = call float @llvm.SI.load.const(<16 x i8> %98, i32 108)
>  %100 = call float @llvm.SI.load.const(<16 x i8> %98, i32 124)
>  %101 = call float @llvm.SI.load.const(<16 x i8> %98, i32 140)
>  %102 = fsub float %20, %99
>  %103 = fsub float %21, %100
>  %104 = fsub float %22, %101
>  %105 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %106 = load <16 x i8>, <16 x i8> addrspace(2)* %105, align 16, !invariant.load !0
>  %107 = call float @llvm.SI.load.const(<16 x i8> %106, i32 96)
>  %108 = fmul float %107, %102
>  %109 = call float @llvm.SI.load.const(<16 x i8> %106, i32 100)
>  %110 = fmul float %109, %102
>  %111 = call float @llvm.SI.load.const(<16 x i8> %106, i32 104)
>  %112 = fmul float %111, %102
>  %113 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %114 = load <16 x i8>, <16 x i8> addrspace(2)* %113, align 16, !invariant.load !0
>  %115 = call float @llvm.SI.load.const(<16 x i8> %114, i32 112)
>  %116 = fmul float %115, %103
>  %117 = fadd float %116, %108
>  %118 = call float @llvm.SI.load.const(<16 x i8> %114, i32 116)
>  %119 = fmul float %118, %103
>  %120 = fadd float %119, %110
>  %121 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %122 = load <16 x i8>, <16 x i8> addrspace(2)* %121, align 16, !invariant.load !0
>  %123 = call float @llvm.SI.load.const(<16 x i8> %122, i32 120)
>  %124 = fmul float %123, %103
>  %125 = fadd float %124, %112
>  %126 = call float @llvm.SI.load.const(<16 x i8> %122, i32 128)
>  %127 = fmul float %126, %104
>  %128 = fadd float %127, %117
>  %129 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %130 = load <16 x i8>, <16 x i8> addrspace(2)* %129, align 16, !invariant.load !0
>  %131 = call float @llvm.SI.load.const(<16 x i8> %130, i32 132)
>  %132 = fmul float %131, %104
>  %133 = fadd float %132, %120
>  %134 = call float @llvm.SI.load.const(<16 x i8> %130, i32 136)
>  %135 = fmul float %134, %104
>  %136 = fadd float %135, %125
>  %137 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %138 = load <16 x i8>, <16 x i8> addrspace(2)* %137, align 16, !invariant.load !0
>  %139 = call float @llvm.SI.load.const(<16 x i8> %138, i32 144)
>  %140 = fmul float %128, %139
>  %141 = call float @llvm.SI.load.const(<16 x i8> %138, i32 148)
>  %142 = fmul float %133, %141
>  %143 = fmul float %136, 5.000000e-01
>  %144 = fadd float %143, %140
>  %145 = fmul float %136, 5.000000e-01
>  %146 = fadd float %145, %142
>  %147 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %148 = load <16 x i8>, <16 x i8> addrspace(2)* %147, align 16, !invariant.load !0
>  %149 = call float @llvm.SI.load.const(<16 x i8> %148, i32 152)
>  %150 = call float @llvm.SI.load.const(<16 x i8> %148, i32 156)
>  %151 = fmul float %136, %149
>  %152 = fadd float %151, %150
>  %153 = call float @llvm.SI.load.const(<16 x i8> %148, i32 68)
>  %154 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %155 = load <16 x i8>, <16 x i8> addrspace(2)* %154, align 16, !invariant.load !0
>  %156 = call float @llvm.SI.load.const(<16 x i8> %155, i32 64)
>  %157 = fmul float %89, %153
>  %158 = fadd float %157, %156
>  %159 = call float @llvm.AMDGPU.clamp.(float %158, float 0.000000e+00, float 1.000000e+00)
>  %160 = call float @llvm.SI.load.const(<16 x i8> %155, i32 72)
>  %161 = call float @llvm.pow.f32(float %159, float %160)
>  %162 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %163 = load <16 x i8>, <16 x i8> addrspace(2)* %162, align 16, !invariant.load !0
>  %164 = call float @llvm.SI.load.const(<16 x i8> %163, i32 76)
>  %165 = fsub float 1.000000e+00, %164
>  %166 = call float @llvm.SI.load.const(<16 x i8> %163, i32 76)
>  %167 = fmul float %166, %161
>  %168 = fadd float %167, %165
>  %169 = fmul float %27, 2.000000e+00
>  %170 = fadd float %169, -1.000000e+00
>  %171 = fmul float %28, 2.000000e+00
>  %172 = fadd float %171, -1.000000e+00
>  %173 = fmul float %29, 2.000000e+00
>  %174 = fadd float %173, -1.000000e+00
>  %175 = fmul float %172, 0.000000e+00
>  %176 = fadd float %175, %170
>  %177 = fmul float %174, 0.000000e+00
>  %178 = fadd float %176, %177
>  %179 = fmul float %170, 0.000000e+00
>  %180 = fadd float %172, %179
>  %181 = fmul float %174, 0.000000e+00
>  %182 = fadd float %180, %181
>  %183 = fmul float %170, 0.000000e+00
>  %184 = fmul float %172, 0.000000e+00
>  %185 = fadd float %184, %183
>  %186 = fadd float %185, %174
>  %187 = fmul float %168, %168
>  %188 = bitcast i32 %12 to float
>  %189 = insertvalue <{ float, float, float }> undef, float %188, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %20, float %21, float %22, float %96)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %144, float %146, float %152, float %136)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %33, float %34, float %187, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %178, float %182, float %186, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %81, float %86, float %89, float %94)
>  ret <{ float, float, float }> %189
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE
>DCL IN[3].xyz, GENERIC[3], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..15]
>DCL CONST[20]
>DCL TEMP[0..16], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,     2.9297,     6.0000}
>IMM[1] FLT32 {    0.0000,     0.3000,     0.5900,     0.1100}
>IMM[2] FLT32 {   32.0000,    -0.5000,     4.0000,     5.0000}
>IMM[3] FLT32 {    0.0010,     8.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[3].xyzz, IN[3].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[3].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xy, IN[2].xyyy
>  8: TEX TEMP[2].yz, TEMP[2], SAMP[5], 2D
>  9: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[0].xyzz
> 10: MUL TEMP[3].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 11: MUL TEMP[3].xyz, IMM[0].yyyy, TEMP[3].xyzz
> 12: ADD TEMP[3].xyz, TEMP[0].xyzz, -TEMP[3].xyzz
> 13: DP3 TEMP[3].x, TEMP[3].xyzz, TEMP[1].xyzz
> 14: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].xxxx
> 15: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[1].xyzz
> 16: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 17: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 18: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[4].xxxx
> 19: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 20: ADD TEMP[3].x, IMM[0].xxxx, -TEMP[3].xxxx
> 21: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[3].x, TEMP[2].yyyy, TEMP[3].xxxx
> 23: MAD TEMP[4].xyz, IMM[0].zzzz, TEMP[1].xyzz, IN[0].xyzz
> 24: MUL TEMP[5], CONST[4], TEMP[4].xxxx
> 25: MAD TEMP[5], CONST[5], TEMP[4].yyyy, TEMP[5]
> 26: MAD TEMP[4], CONST[6], TEMP[4].zzzz, TEMP[5]
> 27: ADD TEMP[4].xyz, TEMP[4], CONST[7]
> 28: MOV TEMP[5].xyz, TEMP[1].xyzz
> 29: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 30: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[0].xyzz
> 31: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 32: MAD TEMP[6].xyz, IMM[0].yyyy, TEMP[6].xyzz, -TEMP[0].xyzz
> 33: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[2].zzzz
> 34: MUL TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 35: MOV TEMP[8].x, CONST[11].wwww
> 36: MOV TEMP[8].y, CONST[12].wwww
> 37: MOV TEMP[8].z, CONST[13].wwww
> 38: ADD TEMP[8].xyz, TEMP[8].xyzz, -IN[0].xyzz
> 39: DP3 TEMP[9].x, TEMP[8].xyzz, TEMP[8].xyzz
> 40: SQRT TEMP[9].x, TEMP[9].xxxx
> 41: MOV TEMP[10].yz, IMM[1].xxxx
> 42: MAD TEMP[10].x, TEMP[9].xxxx, CONST[14].zzzz, CONST[14].wwww
> 43: MOV TEMP[11].yz, IMM[1].xxxx
> 44: MOV TEMP[11].x, IN[1].zzzz
> 45: MOV TEMP[12].yz, IMM[1].xxxx
> 46: MOV TEMP[13].xy, IN[1].xyyy
> 47: MOV TEMP[13].w, IN[1].wwww
> 48: TXP TEMP[13].w, TEMP[13], SAMP[3], 2D
> 49: MUL TEMP[12].x, TEMP[13].wwww, TEMP[13].wwww
> 50: MOV TEMP[13].xy, IN[2].xyyy
> 51: TEX TEMP[13], TEMP[13], SAMP[6], 2D
> 52: MOV TEMP[14].w, TEMP[13].wwww
> 53: DP3 TEMP[15].x, TEMP[13].xyzz, IMM[1].yzww
> 54: ADD TEMP[16].x, CONST[20].wwww, IMM[0].xxxx
> 55: MUL TEMP[15].x, TEMP[15].xxxx, TEMP[16].xxxx
> 56: MUL TEMP[14].xyz, TEMP[13].xyzz, TEMP[15].xxxx
> 57: MUL TEMP[13].xyz, TEMP[14], IMM[2].xxxx
> 58: MOV TEMP[14].xy, TEMP[4].xyyy
> 59: MOV TEMP[14].w, IMM[0].xxxx
> 60: MOV TEMP[14].z, TEMP[4].zzzz
> 61: TXP TEMP[4].x, TEMP[14], SAMP[0], SHADOW2D
> 62: RCP TEMP[9].x, TEMP[9].xxxx
> 63: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[9].xxxx
> 64: DP3 TEMP[8].x, TEMP[8].xyzz, TEMP[1].xyzz
> 65: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 66: ADD TEMP[9].xyz, TEMP[10].xyzz, IMM[2].yyyy
> 67: MUL TEMP[9].xyz, TEMP[9].xyzz, IMM[0].yyyy
> 68: ADD TEMP[9].xyz, IMM[0].xxxx, -TEMP[9].xyzz
> 69: MOV_SAT TEMP[9].xyz, TEMP[9].xyzz
> 70: MUL TEMP[9].xyz, TEMP[12].xyzz, TEMP[9].xyzz
> 71: MOV_SAT TEMP[10].xyz, TEMP[11].xyzz
> 72: MUL TEMP[9].x, TEMP[9].xyzz, TEMP[10].xyzz
> 73: MUL TEMP[9].xyz, CONST[15].xyzz, TEMP[9].xxxx
> 74: MUL TEMP[9].xyz, TEMP[9].xyzz, TEMP[2].yyyy
> 75: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 76: MUL TEMP[10].x, IMM[2].zzzz, TEMP[2].yyyy
> 77: DP3 TEMP[11].x, -CONST[1].xyzz, TEMP[1].xyzz
> 78: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 79: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 80: MUL TEMP[4].xyz, CONST[3].xyzz, TEMP[4].xxxx
> 81: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[2].yyyy
> 82: MUL TEMP[4].xyz, TEMP[11].xxxx, TEMP[4].xyzz
> 83: MAD TEMP[4].xyz, TEMP[5].xyzz, TEMP[10].xxxx, TEMP[4].xyzz
> 84: MAD TEMP[4].xyz, TEMP[8].xxxx, TEMP[9].xyzz, TEMP[4].xyzz
> 85: MOV TEMP[5].xy, IN[2].xyyy
> 86: TEX TEMP[5].xyz, TEMP[5], SAMP[4], 2D
> 87: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[1].xyzz
> 88: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 89: ADD TEMP[0].x, IMM[0].xxxx, -TEMP[0].xxxx
> 90: POW TEMP[0].x, TEMP[0].xxxx, IMM[2].wwww
> 91: MAX TEMP[1].xyz, TEMP[2].zzzz, IMM[1].xxxx
> 92: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[1].xyzz
> 93: MOV TEMP[1].xyz, TEMP[6].xyzz
> 94: MOV TEMP[1].w, TEMP[7].xxxx
> 95: TXL TEMP[1].xyz, TEMP[1], SAMP[2], CUBE
> 96: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 97: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx
> 98: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[5].xyzz, TEMP[0].xyzz
> 99: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[13].xyzz
>100: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>101: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].xxxx
>102: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>103: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].xxxx
>104: RCP TEMP[2].x, TEMP[2].xxxx
>105: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>106: FRC TEMP[2].x, CONST[1].wwww
>107: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].yyyy
>108: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>109: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>110: MUL TEMP[1].x, IN[2].zzzz, TEMP[1].xxxx
>111: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>112: MOV TEMP[0].w, IN[0].wwww
>113: MOV OUT[0], TEMP[0]
>114: END
>radeonsi: Compiling shader 37
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %67 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %68 = load <8 x i32>, <8 x i32> addrspace(2)* %67, align 32, !invariant.load !0
>  %69 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %70 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %69, i64 0, i64 23, !amdgpu.uniform !0
>  %71 = load <4 x i32>, <4 x i32> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = extractelement <8 x i32> %68, i32 7
>  %73 = extractelement <4 x i32> %71, i32 0
>  %74 = and i32 %73, %72
>  %75 = insertelement <4 x i32> %71, i32 %74, i32 0
>  %76 = bitcast float %65 to i32
>  %77 = bitcast float %66 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %79, <8 x i32> %68, <4 x i32> %75, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %81 = extractelement <4 x float> %80, i32 1
>  %82 = extractelement <4 x float> %80, i32 2
>  %83 = fmul float %60, %43
>  %84 = fmul float %62, %44
>  %85 = fadd float %84, %83
>  %86 = fmul float %64, %45
>  %87 = fadd float %85, %86
>  %88 = fmul float %87, %60
>  %89 = fmul float %87, %62
>  %90 = fmul float %87, %64
>  %91 = fmul float %88, 2.000000e+00
>  %92 = fmul float %89, 2.000000e+00
>  %93 = fmul float %90, 2.000000e+00
>  %94 = fsub float %43, %91
>  %95 = fsub float %44, %92
>  %96 = fsub float %45, %93
>  %97 = fmul float %94, %60
>  %98 = fmul float %95, %62
>  %99 = fadd float %98, %97
>  %100 = fmul float %96, %64
>  %101 = fadd float %99, %100
>  %102 = fadd float %101, 1.000000e+00
>  %103 = fmul float %43, %60
>  %104 = fmul float %44, %62
>  %105 = fadd float %104, %103
>  %106 = fmul float %45, %64
>  %107 = fadd float %105, %106
>  %108 = fsub float 1.000000e+00, %107
>  %109 = call float @llvm.AMDGPU.clamp.(float %108, float 0.000000e+00, float 1.000000e+00)
>  %110 = fsub float %102, %109
>  %111 = call float @llvm.AMDGPU.clamp.(float %110, float 0.000000e+00, float 1.000000e+00)
>  %112 = fsub float 1.000000e+00, %111
>  %113 = fmul float %112, %112
>  %114 = fmul float %81, %113
>  %115 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %116 = fmul float %60, 0x4007700140000000
>  %117 = fadd float %116, %115
>  %118 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %119 = fmul float %62, 0x4007700140000000
>  %120 = fadd float %119, %118
>  %121 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %122 = fmul float %64, 0x4007700140000000
>  %123 = fadd float %122, %121
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 64)
>  %127 = fmul float %126, %117
>  %128 = call float @llvm.SI.load.const(<16 x i8> %125, i32 68)
>  %129 = fmul float %128, %117
>  %130 = call float @llvm.SI.load.const(<16 x i8> %125, i32 72)
>  %131 = fmul float %130, %117
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 80)
>  %135 = fmul float %134, %120
>  %136 = fadd float %135, %127
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 84)
>  %138 = fmul float %137, %120
>  %139 = fadd float %138, %129
>  %140 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %141 = load <16 x i8>, <16 x i8> addrspace(2)* %140, align 16, !invariant.load !0
>  %142 = call float @llvm.SI.load.const(<16 x i8> %141, i32 88)
>  %143 = fmul float %142, %120
>  %144 = fadd float %143, %131
>  %145 = call float @llvm.SI.load.const(<16 x i8> %141, i32 96)
>  %146 = fmul float %145, %123
>  %147 = fadd float %146, %136
>  %148 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %149 = load <16 x i8>, <16 x i8> addrspace(2)* %148, align 16, !invariant.load !0
>  %150 = call float @llvm.SI.load.const(<16 x i8> %149, i32 100)
>  %151 = fmul float %150, %123
>  %152 = fadd float %151, %139
>  %153 = call float @llvm.SI.load.const(<16 x i8> %149, i32 104)
>  %154 = fmul float %153, %123
>  %155 = fadd float %154, %144
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = call float @llvm.SI.load.const(<16 x i8> %157, i32 112)
>  %159 = fadd float %147, %158
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 116)
>  %161 = fadd float %152, %160
>  %162 = call float @llvm.SI.load.const(<16 x i8> %157, i32 120)
>  %163 = fadd float %155, %162
>  %164 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %165 = load <8 x i32>, <8 x i32> addrspace(2)* %164, align 32, !invariant.load !0
>  %166 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %167 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %166, i64 0, i64 7, !amdgpu.uniform !0
>  %168 = load <4 x i32>, <4 x i32> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = extractelement <8 x i32> %165, i32 7
>  %170 = extractelement <4 x i32> %168, i32 0
>  %171 = and i32 %170, %169
>  %172 = insertelement <4 x i32> %168, i32 %171, i32 0
>  %173 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %174 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %175 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %176 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %177 = call float @llvm.fabs.f32(float %175)
>  %178 = fdiv float 1.000000e+00, %177, !fpmath !1
>  %179 = fmul float %173, %178
>  %180 = fadd float %179, 1.500000e+00
>  %181 = fmul float %174, %178
>  %182 = fadd float %181, 1.500000e+00
>  %183 = bitcast float %182 to i32
>  %184 = bitcast float %180 to i32
>  %185 = bitcast float %176 to i32
>  %186 = insertelement <4 x i32> undef, i32 %183, i32 0
>  %187 = insertelement <4 x i32> %186, i32 %184, i32 1
>  %188 = insertelement <4 x i32> %187, i32 %185, i32 2
>  %189 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %188, <8 x i32> %165, <4 x i32> %172, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %190 = extractelement <4 x float> %189, i32 0
>  %191 = extractelement <4 x float> %189, i32 1
>  %192 = extractelement <4 x float> %189, i32 2
>  %193 = extractelement <4 x float> %189, i32 3
>  %194 = fmul float %60, %43
>  %195 = fmul float %62, %44
>  %196 = fadd float %195, %194
>  %197 = fmul float %64, %45
>  %198 = fadd float %196, %197
>  %199 = fmul float %198, %60
>  %200 = fmul float %198, %62
>  %201 = fmul float %198, %64
>  %202 = fmul float %199, 2.000000e+00
>  %203 = fsub float %202, %43
>  %204 = fmul float %200, 2.000000e+00
>  %205 = fsub float %204, %44
>  %206 = fmul float %201, 2.000000e+00
>  %207 = fsub float %206, %45
>  %208 = fsub float 1.000000e+00, %82
>  %209 = fmul float %208, 6.000000e+00
>  %210 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <16 x i8>, <16 x i8> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = call float @llvm.SI.load.const(<16 x i8> %211, i32 188)
>  %213 = call float @llvm.SI.load.const(<16 x i8> %211, i32 204)
>  %214 = call float @llvm.SI.load.const(<16 x i8> %211, i32 220)
>  %215 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %216 = fsub float %212, %215
>  %217 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %218 = fsub float %213, %217
>  %219 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %220 = fsub float %214, %219
>  %221 = fmul float %216, %216
>  %222 = fmul float %218, %218
>  %223 = fadd float %222, %221
>  %224 = fmul float %220, %220
>  %225 = fadd float %223, %224
>  %226 = call float @llvm.sqrt.f32(float %225)
>  %227 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %228 = load <16 x i8>, <16 x i8> addrspace(2)* %227, align 16, !invariant.load !0
>  %229 = call float @llvm.SI.load.const(<16 x i8> %228, i32 232)
>  %230 = call float @llvm.SI.load.const(<16 x i8> %228, i32 236)
>  %231 = fmul float %226, %229
>  %232 = fadd float %231, %230
>  %233 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %234 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %235 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %236 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %237 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %238 = load <8 x i32>, <8 x i32> addrspace(2)* %237, align 32, !invariant.load !0
>  %239 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %240 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %239, i64 0, i64 15, !amdgpu.uniform !0
>  %241 = load <4 x i32>, <4 x i32> addrspace(2)* %240, align 16, !invariant.load !0
>  %242 = extractelement <8 x i32> %238, i32 7
>  %243 = extractelement <4 x i32> %241, i32 0
>  %244 = and i32 %243, %242
>  %245 = insertelement <4 x i32> %241, i32 %244, i32 0
>  %246 = fdiv float %234, %236, !fpmath !1
>  %247 = fdiv float %235, %236, !fpmath !1
>  %248 = bitcast float %246 to i32
>  %249 = bitcast float %247 to i32
>  %250 = insertelement <2 x i32> undef, i32 %248, i32 0
>  %251 = insertelement <2 x i32> %250, i32 %249, i32 1
>  %252 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %251, <8 x i32> %238, <4 x i32> %245, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %253 = extractelement <4 x float> %252, i32 3
>  %254 = fmul float %253, %253
>  %255 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %256 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %257 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %258 = load <8 x i32>, <8 x i32> addrspace(2)* %257, align 32, !invariant.load !0
>  %259 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %260 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %259, i64 0, i64 27, !amdgpu.uniform !0
>  %261 = load <4 x i32>, <4 x i32> addrspace(2)* %260, align 16, !invariant.load !0
>  %262 = extractelement <8 x i32> %258, i32 7
>  %263 = extractelement <4 x i32> %261, i32 0
>  %264 = and i32 %263, %262
>  %265 = insertelement <4 x i32> %261, i32 %264, i32 0
>  %266 = bitcast float %255 to i32
>  %267 = bitcast float %256 to i32
>  %268 = insertelement <2 x i32> undef, i32 %266, i32 0
>  %269 = insertelement <2 x i32> %268, i32 %267, i32 1
>  %270 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %269, <8 x i32> %258, <4 x i32> %265, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %271 = extractelement <4 x float> %270, i32 0
>  %272 = extractelement <4 x float> %270, i32 1
>  %273 = extractelement <4 x float> %270, i32 2
>  %274 = fmul float %271, 0x3FD3333340000000
>  %275 = fmul float %272, 0x3FE2E147A0000000
>  %276 = fadd float %275, %274
>  %277 = fmul float %273, 0x3FBC28F5C0000000
>  %278 = fadd float %276, %277
>  %279 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %280 = load <16 x i8>, <16 x i8> addrspace(2)* %279, align 16, !invariant.load !0
>  %281 = call float @llvm.SI.load.const(<16 x i8> %280, i32 332)
>  %282 = fadd float %281, 1.000000e+00
>  %283 = fmul float %278, %282
>  %284 = fmul float %271, %283
>  %285 = fmul float %272, %283
>  %286 = fmul float %273, %283
>  %287 = fmul float %284, 3.200000e+01
>  %288 = fmul float %285, 3.200000e+01
>  %289 = fmul float %286, 3.200000e+01
>  %290 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %291 = load <8 x i32>, <8 x i32> addrspace(2)* %290, align 32, !invariant.load !0
>  %292 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %293 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %292, i64 0, i64 3, !amdgpu.uniform !0
>  %294 = load <4 x i32>, <4 x i32> addrspace(2)* %293, align 16, !invariant.load !0
>  %295 = extractelement <8 x i32> %291, i32 7
>  %296 = extractelement <4 x i32> %294, i32 0
>  %297 = and i32 %296, %295
>  %298 = insertelement <4 x i32> %294, i32 %297, i32 0
>  %299 = bitcast float %163 to i32
>  %300 = bitcast float %159 to i32
>  %301 = bitcast float %161 to i32
>  %302 = insertelement <4 x i32> undef, i32 %299, i32 0
>  %303 = insertelement <4 x i32> %302, i32 %300, i32 1
>  %304 = insertelement <4 x i32> %303, i32 %301, i32 2
>  %305 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %304, <8 x i32> %291, <4 x i32> %298, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %306 = extractelement <4 x float> %305, i32 0
>  %307 = fdiv float 1.000000e+00, %226, !fpmath !1
>  %308 = fmul float %216, %307
>  %309 = fmul float %218, %307
>  %310 = fmul float %220, %307
>  %311 = fmul float %308, %60
>  %312 = fmul float %309, %62
>  %313 = fadd float %312, %311
>  %314 = fmul float %310, %64
>  %315 = fadd float %313, %314
>  %316 = call float @llvm.AMDGPU.clamp.(float %315, float 0.000000e+00, float 1.000000e+00)
>  %317 = fadd float %232, -5.000000e-01
>  %318 = fmul float %317, 2.000000e+00
>  %319 = fsub float 1.000000e+00, %318
>  %320 = call float @llvm.AMDGPU.clamp.(float %319, float 0.000000e+00, float 1.000000e+00)
>  %321 = fmul float %254, %320
>  %322 = call float @llvm.AMDGPU.clamp.(float %233, float 0.000000e+00, float 1.000000e+00)
>  %323 = fmul float %321, %322
>  %324 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %325 = load <16 x i8>, <16 x i8> addrspace(2)* %324, align 16, !invariant.load !0
>  %326 = call float @llvm.SI.load.const(<16 x i8> %325, i32 240)
>  %327 = fmul float %326, %323
>  %328 = call float @llvm.SI.load.const(<16 x i8> %325, i32 244)
>  %329 = fmul float %328, %323
>  %330 = call float @llvm.SI.load.const(<16 x i8> %325, i32 248)
>  %331 = fmul float %330, %323
>  %332 = fmul float %327, %81
>  %333 = fmul float %329, %81
>  %334 = fmul float %331, %81
>  %335 = fmul float %190, %193
>  %336 = fmul float %191, %193
>  %337 = fmul float %192, %193
>  %338 = fmul float %81, 4.000000e+00
>  %339 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %340 = load <16 x i8>, <16 x i8> addrspace(2)* %339, align 16, !invariant.load !0
>  %341 = call float @llvm.SI.load.const(<16 x i8> %340, i32 16)
>  %342 = call float @llvm.SI.load.const(<16 x i8> %340, i32 20)
>  %343 = call float @llvm.SI.load.const(<16 x i8> %340, i32 24)
>  %344 = fmul float %341, %60
>  %345 = fsub float -0.000000e+00, %344
>  %346 = fmul float %342, %62
>  %347 = fsub float %345, %346
>  %348 = fmul float %343, %64
>  %349 = fsub float %347, %348
>  %350 = call float @llvm.AMDGPU.clamp.(float %349, float 0.000000e+00, float 1.000000e+00)
>  %351 = fmul float %306, %306
>  %352 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %353 = load <16 x i8>, <16 x i8> addrspace(2)* %352, align 16, !invariant.load !0
>  %354 = call float @llvm.SI.load.const(<16 x i8> %353, i32 48)
>  %355 = fmul float %354, %351
>  %356 = call float @llvm.SI.load.const(<16 x i8> %353, i32 52)
>  %357 = fmul float %356, %351
>  %358 = call float @llvm.SI.load.const(<16 x i8> %353, i32 56)
>  %359 = fmul float %358, %351
>  %360 = fmul float %355, %81
>  %361 = fmul float %357, %81
>  %362 = fmul float %359, %81
>  %363 = fmul float %350, %360
>  %364 = fmul float %350, %361
>  %365 = fmul float %350, %362
>  %366 = fmul float %335, %338
>  %367 = fadd float %366, %363
>  %368 = fmul float %336, %338
>  %369 = fadd float %368, %364
>  %370 = fmul float %337, %338
>  %371 = fadd float %370, %365
>  %372 = fmul float %316, %332
>  %373 = fadd float %372, %367
>  %374 = fmul float %316, %333
>  %375 = fadd float %374, %369
>  %376 = fmul float %316, %334
>  %377 = fadd float %376, %371
>  %378 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %379 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %380 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %381 = load <8 x i32>, <8 x i32> addrspace(2)* %380, align 32, !invariant.load !0
>  %382 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %383 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %382, i64 0, i64 19, !amdgpu.uniform !0
>  %384 = load <4 x i32>, <4 x i32> addrspace(2)* %383, align 16, !invariant.load !0
>  %385 = extractelement <8 x i32> %381, i32 7
>  %386 = extractelement <4 x i32> %384, i32 0
>  %387 = and i32 %386, %385
>  %388 = insertelement <4 x i32> %384, i32 %387, i32 0
>  %389 = bitcast float %378 to i32
>  %390 = bitcast float %379 to i32
>  %391 = insertelement <2 x i32> undef, i32 %389, i32 0
>  %392 = insertelement <2 x i32> %391, i32 %390, i32 1
>  %393 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %392, <8 x i32> %381, <4 x i32> %388, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %394 = extractelement <4 x float> %393, i32 0
>  %395 = extractelement <4 x float> %393, i32 1
>  %396 = extractelement <4 x float> %393, i32 2
>  %397 = fmul float %43, %60
>  %398 = fmul float %44, %62
>  %399 = fadd float %398, %397
>  %400 = fmul float %45, %64
>  %401 = fadd float %399, %400
>  %402 = call float @llvm.AMDGPU.clamp.(float %401, float 0.000000e+00, float 1.000000e+00)
>  %403 = fsub float 1.000000e+00, %402
>  %404 = call float @llvm.pow.f32(float %403, float 5.000000e+00)
>  %405 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %406 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %407 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %408 = fmul float %404, %405
>  %409 = fmul float %404, %406
>  %410 = fmul float %404, %407
>  %411 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %412 = load <8 x i32>, <8 x i32> addrspace(2)* %411, align 32, !invariant.load !0
>  %413 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %414 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %413, i64 0, i64 11, !amdgpu.uniform !0
>  %415 = load <4 x i32>, <4 x i32> addrspace(2)* %414, align 16, !invariant.load !0
>  %416 = extractelement <8 x i32> %412, i32 7
>  %417 = extractelement <4 x i32> %415, i32 0
>  %418 = and i32 %417, %416
>  %419 = insertelement <4 x i32> %415, i32 %418, i32 0
>  %420 = call float @llvm.amdgcn.cubetc(float %203, float %205, float %207)
>  %421 = call float @llvm.amdgcn.cubesc(float %203, float %205, float %207)
>  %422 = call float @llvm.amdgcn.cubema(float %203, float %205, float %207)
>  %423 = call float @llvm.amdgcn.cubeid(float %203, float %205, float %207)
>  %424 = call float @llvm.fabs.f32(float %422)
>  %425 = fdiv float 1.000000e+00, %424, !fpmath !1
>  %426 = fmul float %420, %425
>  %427 = fadd float %426, 1.500000e+00
>  %428 = fmul float %421, %425
>  %429 = fadd float %428, 1.500000e+00
>  %430 = bitcast float %429 to i32
>  %431 = bitcast float %427 to i32
>  %432 = bitcast float %423 to i32
>  %433 = bitcast float %209 to i32
>  %434 = insertelement <4 x i32> undef, i32 %430, i32 0
>  %435 = insertelement <4 x i32> %434, i32 %431, i32 1
>  %436 = insertelement <4 x i32> %435, i32 %432, i32 2
>  %437 = insertelement <4 x i32> %436, i32 %433, i32 3
>  %438 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %437, <8 x i32> %412, <4 x i32> %419, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %439 = extractelement <4 x float> %438, i32 0
>  %440 = extractelement <4 x float> %438, i32 1
>  %441 = extractelement <4 x float> %438, i32 2
>  %442 = fmul float %408, %439
>  %443 = fmul float %409, %440
>  %444 = fmul float %410, %441
>  %445 = fmul float %442, %114
>  %446 = fmul float %443, %114
>  %447 = fmul float %444, %114
>  %448 = fmul float %373, %394
>  %449 = fadd float %448, %445
>  %450 = fmul float %375, %395
>  %451 = fadd float %450, %446
>  %452 = fmul float %377, %396
>  %453 = fadd float %452, %447
>  %454 = fadd float %449, %287
>  %455 = fadd float %451, %288
>  %456 = fadd float %453, %289
>  %457 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %458 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %459 = load <16 x i8>, <16 x i8> addrspace(2)* %458, align 16, !invariant.load !0
>  %460 = call float @llvm.SI.load.const(<16 x i8> %459, i32 12)
>  %461 = fsub float %457, %460
>  %462 = call float @llvm.maxnum.f32(float %461, float 0.000000e+00)
>  %463 = call float @llvm.SI.load.const(<16 x i8> %459, i32 28)
>  %464 = call float @llvm.SI.load.const(<16 x i8> %459, i32 12)
>  %465 = fsub float %463, %464
>  %466 = fadd float %465, 0x3F50624DE0000000
>  %467 = fdiv float 1.000000e+00, %466, !fpmath !1
>  %468 = fmul float %462, %467
>  %469 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %470 = load <16 x i8>, <16 x i8> addrspace(2)* %469, align 16, !invariant.load !0
>  %471 = call float @llvm.SI.load.const(<16 x i8> %470, i32 28)
>  %472 = call float @llvm.floor.f32(float %471)
>  %473 = fsub float %471, %472
>  %474 = fmul float %473, 8.000000e+00
>  %475 = call float @llvm.pow.f32(float %468, float %474)
>  %476 = call float @llvm.AMDGPU.clamp.(float %475, float 0.000000e+00, float 1.000000e+00)
>  %477 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %478 = fmul float %477, %476
>  %479 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %480 = load <16 x i8>, <16 x i8> addrspace(2)* %479, align 16, !invariant.load !0
>  %481 = call float @llvm.SI.load.const(<16 x i8> %480, i32 32)
>  %482 = fsub float 1.000000e+00, %478
>  %483 = fmul float %454, %478
>  %484 = fmul float %481, %482
>  %485 = fadd float %483, %484
>  %486 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %487 = load <16 x i8>, <16 x i8> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = call float @llvm.SI.load.const(<16 x i8> %487, i32 36)
>  %489 = fsub float 1.000000e+00, %478
>  %490 = fmul float %455, %478
>  %491 = fmul float %488, %489
>  %492 = fadd float %490, %491
>  %493 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %494 = load <16 x i8>, <16 x i8> addrspace(2)* %493, align 16, !invariant.load !0
>  %495 = call float @llvm.SI.load.const(<16 x i8> %494, i32 40)
>  %496 = fsub float 1.000000e+00, %478
>  %497 = fmul float %456, %478
>  %498 = fmul float %495, %496
>  %499 = fadd float %497, %498
>  %500 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %501 = bitcast float %5 to i32
>  %502 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %501, 10
>  %503 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %502, float %485, 11
>  %504 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %503, float %492, 12
>  %505 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %504, float %499, 13
>  %506 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %505, float %500, 14
>  %507 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %506, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %507
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen ; E00C2000 80030B05
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v6, s[4:7], 0 idxen     ; E00C2000 80010306
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s36, s[0:3], 0xf                    ; C212010F
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s19, s[0:3], 0x17                   ; C2098117
>	s_buffer_load_dword s23, s[0:3], 0x1b                   ; C20B811B
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s27, s[0:3], 0x1f                   ; C20D811F
>	s_buffer_load_dword s31, s[0:3], 0x23                   ; C20F8123
>	s_buffer_load_dword s37, s[0:3], 0x10                   ; C2128110
>	s_buffer_load_dword s38, s[0:3], 0x11                   ; C2130111
>	s_buffer_load_dword s20, s[0:3], 0x18                   ; C20A0118
>	s_buffer_load_dword s21, s[0:3], 0x19                   ; C20A8119
>	s_buffer_load_dword s22, s[0:3], 0x1a                   ; C20B011A
>	s_buffer_load_dword s26, s[0:3], 0x1e                   ; C20D011E
>	s_buffer_load_dword s24, s[0:3], 0x1c                   ; C20C011C
>	s_buffer_load_dword s25, s[0:3], 0x1d                   ; C20C811D
>	s_buffer_load_dword s30, s[0:3], 0x22                   ; C20F0122
>	s_buffer_load_dword s39, s[0:3], 0x12                   ; C2138112
>	s_buffer_load_dword s35, s[0:3], 0x27                   ; C2118127
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s28, s[0:3], 0x20                   ; C20E0120
>	s_buffer_load_dword s29, s[0:3], 0x21                   ; C20E8121
>	s_buffer_load_dword s32, s[0:3], 0x24                   ; C2100124
>	s_buffer_load_dword s33, s[0:3], 0x25                   ; C2108125
>	s_buffer_load_dword s34, s[0:3], 0x26                   ; C2110126
>	s_buffer_load_dword s0, s[0:3], 0x13                    ; C2000113
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s35                                   ; 7E000223
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mul_f32_e32 v14, s7, v7                               ; 101C0E07
>	v_mac_f32_e32 v14, s11, v8                              ; 3E1C100B
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v6, s6, v7                                ; 100C0E06
>	v_mac_f32_e32 v14, s15, v9                              ; 3E1C120F
>	v_mul_f32_e32 v1, s4, v7                                ; 10020E04
>	v_mul_f32_e32 v5, s5, v7                                ; 100A0E05
>	v_mac_f32_e32 v6, s10, v8                               ; 3E0C100A
>	v_mac_f32_e32 v14, s36, v10                             ; 3E1C1424
>	v_mac_f32_e32 v1, s8, v8                                ; 3E021008
>	v_mac_f32_e32 v5, s9, v8                                ; 3E0A1009
>	v_mac_f32_e32 v6, s14, v9                               ; 3E0C120E
>	v_mul_f32_e32 v16, s19, v14                             ; 10201C13
>	v_mac_f32_e32 v1, s12, v9                               ; 3E02120C
>	v_mac_f32_e32 v5, s13, v9                               ; 3E0A120D
>	v_subrev_f32_e32 v15, s23, v7                           ; 0A1E0E17
>	exp 15, 32, 0, 0, 0, v7, v8, v9, v16                    ; F800020F 10090807
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_subrev_f32_e32 v7, s27, v8                            ; 0A0E101B
>	v_subrev_f32_e32 v8, s31, v9                            ; 0A10121F
>	v_mac_f32_e32 v6, s18, v10                              ; 3E0C1412
>	v_mov_b32_e32 v9, s37                                   ; 7E120225
>	v_mac_f32_e32 v9, s38, v6                               ; 3E120C26
>	v_add_f32_e64 v9, v9, 0 clamp                           ; D2060809 00010109
>	v_log_f32_e32 v9, v9                                    ; 7E124F09
>	v_mul_f32_e32 v16, s20, v15                             ; 10201E14
>	v_mul_f32_e32 v17, s21, v15                             ; 10221E15
>	v_mul_f32_e32 v15, s22, v15                             ; 101E1E16
>	v_mac_f32_e32 v15, s26, v7                              ; 3E1E0E1A
>	v_mac_f32_e32 v16, s24, v7                              ; 3E200E18
>	v_mac_f32_e32 v17, s25, v7                              ; 3E220E19
>	v_mul_legacy_f32_e32 v9, s39, v9                        ; 0E121227
>	v_mac_f32_e32 v15, s30, v8                              ; 3E1E101E
>	v_mac_f32_e32 v1, s16, v10                              ; 3E021410
>	v_mac_f32_e32 v5, s17, v10                              ; 3E0A1411
>	v_mad_f32 v10, 2.0, v11, -1.0                           ; D282000A 03CE16F4
>	v_mad_f32 v11, 2.0, v12, -1.0                           ; D282000B 03CE18F4
>	v_mad_f32 v12, 2.0, v13, -1.0                           ; D282000C 03CE1AF4
>	v_sub_f32_e64 v13, 1.0, s0                              ; D208000D 000000F2
>	v_exp_f32_e32 v9, v9                                    ; 7E124B09
>	v_mac_f32_e32 v16, s28, v8                              ; 3E20101C
>	v_mac_f32_e32 v17, s29, v8                              ; 3E22101D
>	v_mul_f32_e32 v8, 0.5, v15                              ; 10101EF0
>	v_mad_f32 v7, 0, v11, v10                               ; D2820007 042A1680
>	v_mac_f32_e32 v13, s0, v9                               ; 3E1A1200
>	v_mad_f32 v16, s32, v16, v8                             ; D2820010 04222020
>	v_mac_f32_e32 v8, s33, v17                              ; 3E102221
>	v_mad_f32 v17, 0, v10, v11                              ; D2820011 042E1480
>	v_mac_f32_e32 v0, s34, v15                              ; 3E001E22
>	v_mac_f32_e32 v7, 0, v12                                ; 3E0E1880
>	v_mac_f32_e32 v17, 0, v12                               ; 3E221880
>	v_mac_f32_e32 v12, 0, v11                               ; 3E181680
>	v_mul_f32_e32 v9, v13, v13                              ; 10121B0D
>	exp 15, 33, 0, 0, 0, v16, v8, v0, v15                   ; F800021F 0F000810
>	v_mac_f32_e32 v12, 0, v10                               ; 3E181480
>	exp 15, 34, 0, 0, 0, v3, v4, v9, v0                     ; F800022F 00090403
>	exp 15, 35, 0, 0, 0, v7, v17, v12, v0                   ; F800023F 000C1107
>	exp 15, 12, 0, 1, 0, v1, v5, v6, v14                    ; F80008CF 0E060501
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 512 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v12, v2, 0, 0, [m0]                         ; C8300002
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                  ; C8310003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	s_buffer_load_dword s12, s[0:3], 0x2                        ; C2060102
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v20, v2, 2, 0, [m0]                         ; C8500202
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v6, s8, v12                                   ; 080C1808
>	v_interp_p2_f32 v20, [v20], v3, 2, 0, [m0]                  ; C8510203
>	v_sub_f32_e32 v7, s9, v19                                   ; 080E2609
>	v_mul_f32_e32 v0, v6, v6                                    ; 10000D06
>	v_interp_p1_f32 v10, v4, 0, 3, [m0]                         ; C8280C04
>	v_sub_f32_e32 v8, s12, v20                                  ; 0810280C
>	v_mac_f32_e32 v0, v7, v7                                    ; 3E000F07
>	v_mac_f32_e32 v0, v8, v8                                    ; 3E001108
>	v_interp_p2_f32 v10, [v10], v5, 0, 3, [m0]                  ; C8290C05
>	v_interp_p1_f32 v11, v4, 1, 3, [m0]                         ; C82C0D04
>	v_rsq_f32_e32 v9, v0                                        ; 7E125D00
>	v_interp_p2_f32 v11, [v11], v5, 1, 3, [m0]                  ; C82D0D05
>	v_interp_p1_f32 v4, v4, 2, 3, [m0]                          ; C8100E04
>	v_mul_f32_e32 v0, v10, v10                                  ; 1000150A
>	v_interp_p2_f32 v4, [v4], v5, 2, 3, [m0]                    ; C8110E05
>	v_mac_f32_e32 v0, v11, v11                                  ; 3E00170B
>	v_mac_f32_e32 v0, v4, v4                                    ; 3E000904
>	v_rsq_f32_e32 v5, v0                                        ; 7E0A5D00
>	v_mul_f32_e32 v14, v9, v6                                   ; 101C0D09
>	v_mul_f32_e32 v15, v9, v7                                   ; 101E0F09
>	v_mul_f32_e32 v16, v9, v8                                   ; 10201109
>	v_mul_f32_e32 v21, v5, v10                                  ; 102A1505
>	v_mul_f32_e32 v22, v5, v11                                  ; 102C1705
>	v_mul_f32_e32 v24, v14, v21                                 ; 10302B0E
>	v_mac_f32_e32 v24, v15, v22                                 ; 3E302D0F
>	v_mul_f32_e32 v23, v5, v4                                   ; 102E0905
>	v_mac_f32_e32 v24, v16, v23                                 ; 3E302F10
>	v_mul_f32_e32 v4, v21, v24                                  ; 10083115
>	v_mul_f32_e32 v5, v22, v24                                  ; 100A3116
>	v_mac_f32_e32 v4, v21, v24                                  ; 3E083115
>	v_mul_f32_e32 v10, v23, v24                                 ; 10143117
>	v_mac_f32_e32 v5, v22, v24                                  ; 3E0A3116
>	v_mad_f32 v11, v6, v9, -v4                                  ; D282000B 84121306
>	v_mac_f32_e32 v10, v23, v24                                 ; 3E143117
>	v_mad_f32 v14, v7, v9, -v5                                  ; D282000E 84161307
>	v_mul_f32_e32 v11, v21, v11                                 ; 10161715
>	v_mac_f32_e32 v11, v22, v14                                 ; 3E161D16
>	v_mad_f32 v14, v8, v9, -v10                                 ; D282000E 842A1308
>	v_mac_f32_e32 v11, v23, v14                                 ; 3E161D17
>	v_sub_f32_e32 v14, 1.0, v24                                 ; 081C30F2
>	s_load_dwordx4 s[12:15], s[4:5], 0x5c                       ; C086055C
>	s_load_dwordx8 s[44:51], s[4:5], 0x50                       ; C0D60550
>	v_add_f32_e32 v11, 1.0, v11                                 ; 061616F2
>	v_add_f32_e64 v14, v14, 0 clamp                             ; D206080E 0001010E
>	v_subrev_f32_e32 v11, v14, v11                              ; 0A16170E
>	s_buffer_load_dword s16, s[0:3], 0x10                       ; C2080110
>	s_buffer_load_dword s17, s[0:3], 0x11                       ; C2088111
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_interp_p1_f32 v0, v2, 0, 2, [m0]                          ; C8000802
>	v_sub_f32_e32 v14, 1.0, v11                                 ; 081C16F2
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                    ; C8010803
>	v_interp_p1_f32 v1, v2, 1, 2, [m0]                          ; C8040902
>	v_mad_f32 v25, -v11, v14, v14                               ; D2820019 243A1D0B
>	v_mov_b32_e32 v11, 0x403b800a                               ; 7E1602FF 403B800A
>	v_mad_f32 v26, -v6, v9, v4                                  ; D282001A 24121306
>	v_mad_f32 v4, v11, v21, v12                                 ; D2820004 04322B0B
>	v_interp_p2_f32 v1, [v1], v3, 1, 2, [m0]                    ; C8050903
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s12, s12, s51                                     ; 870C330C
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s18, s[0:3], 0x16                       ; C2090116
>	image_sample v[17:18], v[0:1], s[44:51], s[12:15] dmask:0x6 ; F0800600 006B1100
>	v_mul_f32_e32 v29, s8, v4                                   ; 103A0808
>	s_buffer_load_dword s19, s[0:3], 0x18                       ; C2098118
>	s_buffer_load_dword s28, s[0:3], 0x19                       ; C20E0119
>	s_buffer_load_dword s29, s[0:3], 0x1a                       ; C20E811A
>	v_mul_f32_e32 v14, s16, v4                                  ; 101C0810
>	v_mul_f32_e32 v16, s17, v4                                  ; 10200811
>	s_load_dwordx4 s[40:43], s[4:5], 0x1c                       ; C094051C
>	s_load_dwordx8 s[44:51], s[4:5], 0x10                       ; C0D60510
>	v_cubema_f32 v4, v21, v22, v23                              ; D28E0004 045E2D15
>	v_mad_f32 v28, -v8, v9, v10                                 ; D282001C 242A1308
>	v_rcp_f32_e64 v8, |v4|                                      ; D3540108 00000104
>	v_mad_f32 v27, -v7, v9, v5                                  ; D282001B 24161307
>	v_mad_f32 v5, v11, v22, v19                                 ; D2820005 044E2D0B
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v14, s9, v5                                   ; 3E1C0A09
>	v_mad_f32 v6, v11, v23, v20                                 ; D2820006 04522F0B
>	v_mac_f32_e32 v16, s11, v5                                  ; 3E200A0B
>	v_mac_f32_e32 v29, s18, v5                                  ; 3E3A0A12
>	v_cubetc_f32 v5, v21, v22, v23                              ; D28C0005 045E2D15
>	v_cubesc_f32 v7, v21, v22, v23                              ; D28A0007 045E2D15
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_mac_f32_e32 v14, s19, v6                                  ; 3E1C0C13
>	v_mac_f32_e32 v16, s28, v6                                  ; 3E200C1C
>	v_mac_f32_e32 v29, s29, v6                                  ; 3E3A0C1D
>	v_mad_f32 v6, v8, v5, v4                                    ; D2820006 04120B08
>	v_mad_f32 v5, v8, v7, v4                                    ; D2820005 04120F08
>	s_and_b32 s40, s40, s51                                     ; 87283328
>	v_cubeid_f32 v7, v21, v22, v23                              ; D2880007 045E2D15
>	image_sample v[8:11], v[5:8], s[44:51], s[40:43] dmask:0xf  ; F0800F00 014B0805
>	v_interp_p1_f32 v30, v2, 2, 1, [m0]                         ; C8780602
>	v_interp_p2_f32 v30, [v30], v3, 2, 1, [m0]                  ; C8790603
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                          ; C8140402
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                    ; C8150403
>	v_interp_p1_f32 v6, v2, 1, 1, [m0]                          ; C8180502
>	v_interp_p2_f32 v6, [v6], v3, 1, 1, [m0]                    ; C8190503
>	v_interp_p1_f32 v7, v2, 3, 1, [m0]                          ; C81C0702
>	v_interp_p2_f32 v7, [v7], v3, 3, 1, [m0]                    ; C81D0703
>	v_mov_b32_e32 v15, 0x6f800000                               ; 7E1E02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v15, |v7|                             ; D002026A 00020F0F
>	v_mov_b32_e32 v15, 0x2f800000                               ; 7E1E02FF 2F800000
>	v_cndmask_b32_e32 v15, 1.0, v15, vcc                        ; 001E1EF2
>	v_mul_f32_e32 v7, v15, v7                                   ; 100E0F0F
>	v_rcp_f32_e32 v7, v7                                        ; 7E0E5507
>	s_load_dwordx4 s[48:51], s[4:5], 0x3c                       ; C098053C
>	s_load_dwordx8 s[40:47], s[4:5], 0x30                       ; C0D40530
>	s_load_dwordx8 s[32:39], s[4:5], 0x60                       ; C0D00560
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v6, v7, v6                                    ; 100C0D07
>	v_mul_f32_e32 v5, v5, v15                                   ; 100A1F05
>	v_mul_f32_e32 v6, v6, v15                                   ; 100C1F06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s48, s48, s47                                     ; 87302F30
>	image_sample v31, v[5:6], s[40:47], s[48:51] dmask:0x8      ; F0800800 018A1F05
>	s_load_dwordx4 s[40:43], s[4:5], 0x6c                       ; C094056C
>	s_buffer_load_dword s8, s[0:3], 0x2f                        ; C204012F
>	s_buffer_load_dword s9, s[0:3], 0x33                        ; C2048133
>	s_buffer_load_dword s11, s[0:3], 0x37                       ; C2058137
>	s_buffer_load_dword s52, s[0:3], 0x1c                       ; C21A011C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s40, s40, s39                                     ; 87282728
>	image_sample v[5:7], v[0:1], s[32:39], s[40:43] dmask:0x7   ; F0800700 01480500
>	s_buffer_load_dword s32, s[0:3], 0x53                       ; C2100153
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v15, 0x3e99999a, v5                           ; 101E0AFF 3E99999A
>	v_mac_f32_e32 v15, 0x3f170a3d, v6                           ; 3E1E0CFF 3F170A3D
>	v_mac_f32_e32 v15, 0x3de147ae, v7                           ; 3E1E0EFF 3DE147AE
>	s_buffer_load_dword s54, s[0:3], 0x1e                       ; C21B011E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v15, s32, v15                                 ; 3E1E1E20
>	s_buffer_load_dword s32, s[0:3], 0x3b                       ; C210013B
>	v_mul_f32_e32 v32, v15, v5                                  ; 10400B0F
>	v_mov_b32_e32 v5, 0x40c00000                                ; 7E0A02FF 40C00000
>	s_buffer_load_dword s53, s[0:3], 0x1d                       ; C21A811D
>	v_mul_f32_e32 v34, v15, v7                                  ; 10440F0F
>	v_mad_f32 v7, -v18, v5, v5                                  ; D2820007 24160B12
>	v_sub_f32_e32 v5, s8, v12                                   ; 080A1808
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                        ; C0CA0500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                        ; C08E050C
>	s_buffer_load_dword s55, s[0:3], 0x3a                       ; C21B813A
>	v_mul_f32_e32 v33, v15, v6                                  ; 10420D0F
>	v_sub_f32_e32 v6, s11, v20                                  ; 080C280B
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v35, s32                                      ; 7E460220
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                       ; C090052C
>	v_sub_f32_e32 v12, s9, v19                                  ; 08182609
>	v_mul_f32_e32 v20, v5, v5                                   ; 10280B05
>	v_mac_f32_e32 v20, v12, v12                                 ; 3E28190C
>	v_mac_f32_e32 v20, v6, v6                                   ; 3E280D06
>	v_add_f32_e32 v15, s52, v14                                 ; 061E1C34
>	v_add_f32_e32 v14, s54, v29                                 ; 061C3A36
>	v_sqrt_f32_e32 v29, v20                                     ; 7E3A6714
>	v_mac_f32_e32 v35, s55, v29                                 ; 3E463A37
>	v_add_f32_e32 v16, s53, v16                                 ; 06202035
>	v_mul_f32_e32 v25, v25, v17                                 ; 10322319
>	v_mul_f32_e32 v29, v31, v31                                 ; 103A3F1F
>	s_and_b32 s28, s28, s27                                     ; 871C1B1C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_rsq_f32_e32 v11, v20                                      ; 7E165D14
>	s_buffer_load_dword s6, s[0:3], 0x4                         ; C2030104
>	s_buffer_load_dword s7, s[0:3], 0x5                         ; C2038105
>	image_sample_c v14, v[14:17], s[20:27], s[28:31] dmask:0x1  ; F0A00100 00E50E0E
>	v_mul_f32_e32 v5, v11, v5                                   ; 100A0B0B
>	v_mul_f32_e32 v12, v11, v12                                 ; 1018190B
>	v_mul_f32_e32 v5, v21, v5                                   ; 100A0B15
>	v_mul_f32_e32 v6, v11, v6                                   ; 100C0D0B
>	v_mac_f32_e32 v5, v22, v12                                  ; 3E0A1916
>	v_mac_f32_e32 v5, v23, v6                                   ; 3E0A0D17
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s6, v21                                   ; 100C2A06
>	s_buffer_load_dword s8, s[0:3], 0x6                         ; C2040106
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	s_buffer_load_dword s20, s[0:3], 0xc                        ; C20A010C
>	s_buffer_load_dword s21, s[0:3], 0xd                        ; C20A810D
>	v_mad_f32 v6, -s7, v22, -v6                                 ; D2820006 A41A2C07
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v11, v14, v14                                 ; 10161D0E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v6, -s8, v23, v6                                  ; D2820006 241A2E08
>	v_mul_f32_e32 v12, s20, v11                                 ; 10181614
>	v_mul_f32_e32 v14, s21, v11                                 ; 101C1615
>	v_mul_f32_e32 v11, s6, v11                                  ; 10161606
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mul_f32_e32 v12, v17, v12                                 ; 10181911
>	v_mul_f32_e32 v14, v17, v14                                 ; 101C1D11
>	v_mul_f32_e32 v11, v17, v11                                 ; 10161711
>	v_mul_f32_e32 v12, v12, v6                                  ; 10180D0C
>	v_mul_f32_e32 v14, v14, v6                                  ; 101C0D0E
>	v_mul_f32_e32 v11, v11, v6                                  ; 10160D0B
>	v_mul_f32_e32 v6, 4.0, v17                                  ; 100C22F6
>	v_mac_f32_e32 v12, v6, v8                                   ; 3E181106
>	v_mac_f32_e32 v14, v6, v9                                   ; 3E1C1306
>	v_mac_f32_e32 v11, v6, v10                                  ; 3E161506
>	v_add_f32_e32 v6, -0.5, v35                                 ; 060C46F1
>	s_buffer_load_dword s7, s[0:3], 0x3c                        ; C203813C
>	v_mad_f32 v6, -2.0, v6, 1.0                                 ; D2820006 03CA0CF5
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s8, s[0:3], 0x3d                        ; C204013D
>	s_buffer_load_dword s11, s[0:3], 0x3e                       ; C205813E
>	v_mul_f32_e32 v6, v6, v29                                   ; 100C3B06
>	v_add_f32_e64 v8, v30, 0 clamp                              ; D2060808 0001011E
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s7, v6                                    ; 10100C07
>	v_cubema_f32 v9, v26, v27, v28                              ; D28E0009 0472371A
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_rcp_f32_e64 v9, |v9|                                      ; D3540109 00000109
>	v_mac_f32_e32 v12, v8, v5                                   ; 3E180B08
>	v_mul_f32_e32 v8, s8, v6                                    ; 10100C08
>	v_mul_f32_e32 v6, s11, v6                                   ; 100C0C0B
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_mac_f32_e32 v14, v8, v5                                   ; 3E1C0B08
>	v_mac_f32_e32 v11, v6, v5                                   ; 3E160B06
>	v_cubetc_f32 v5, v26, v27, v28                              ; D28C0005 0472371A
>	v_cubesc_f32 v8, v26, v27, v28                              ; D28A0008 0472371A
>	v_mad_f32 v5, v9, v5, v4                                    ; D2820005 04120B09
>	v_mac_f32_e32 v4, v9, v8                                    ; 3E081109
>	v_add_f32_e64 v8, v24, 0 clamp                              ; D2060808 00010118
>	s_buffer_load_dword s9, s[0:3], 0x7                         ; C2048107
>	s_buffer_load_dword s6, s[0:3], 0x3                         ; C2030103
>	s_buffer_load_dword s7, s[0:3], 0x8                         ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                         ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xa                        ; C205810A
>	s_load_dwordx8 s[20:27], s[4:5], 0x40                       ; C0CA0540
>	s_load_dwordx4 s[0:3], s[4:5], 0x4c                         ; C080054C
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_log_f32_e32 v15, v8                                       ; 7E1E4F08
>	v_cubeid_f32 v6, v26, v27, v28                              ; D2880006 0472371A
>	v_max_f32_e32 v16, 0, v18                                   ; 20202480
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s0, s0, s27                                       ; 87001B00
>	image_sample v[8:10], v[0:1], s[20:27], s[0:3] dmask:0x7    ; F0800700 00050800
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v15                    ; 0E001EFF 40A00000
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s32, s32, s19                                     ; 87201320
>	v_mul_f32_e32 v0, v16, v0                                   ; 10000110
>	image_sample_l v[4:6], v[4:7], s[12:19], s[32:35] dmask:0x7 ; F0900700 01030404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mov_b32_e32 v6, s6                                        ; 7E0C0206
>	v_sub_f32_e32 v6, s9, v6                                    ; 080C0C09
>	v_add_f32_e32 v6, 0x3a83126f, v6                            ; 060C0CFF 3A83126F
>	v_mul_f32_e32 v5, v25, v0                                   ; 100A0119
>	v_mul_f32_e32 v1, v25, v1                                   ; 10020319
>	v_mul_f32_e32 v4, v25, v4                                   ; 10080919
>	v_rcp_f32_e32 v6, v6                                        ; 7E0C5506
>	v_mac_f32_e32 v1, v8, v12                                   ; 3E021908
>	v_mov_b32_e32 v0, 0x42000000                                ; 7E0002FF 42000000
>	v_mac_f32_e32 v4, v9, v14                                   ; 3E081D09
>	v_mac_f32_e32 v5, v10, v11                                  ; 3E0A170A
>	v_mac_f32_e32 v1, v0, v32                                   ; 3E024100
>	v_mac_f32_e32 v4, v0, v33                                   ; 3E084300
>	v_mac_f32_e32 v5, v0, v34                                   ; 3E0A4500
>	v_subrev_f32_e32 v0, s6, v19                                ; 0A002606
>	v_max_f32_e32 v0, 0, v0                                     ; 20000080
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s9                                      ; 7E0C4809
>	v_sub_f32_e32 v6, s9, v6                                    ; 080C0C09
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	v_interp_p1_f32 v6, v2, 2, 2, [m0]                          ; C8180A02
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 2, [m0]                    ; C8190A03
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mad_f32 v0, -v6, s7, s7                                   ; D2820000 201C0F06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mad_f32 v1, -v6, s8, s8                                   ; D2820001 20201106
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mad_f32 v4, -v6, s11, s11                                 ; D2820004 202C1706
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 64
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1484 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL CONST[0..226]
>DCL TEMP[0..8], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>  0: F2I TEMP[0], IN[3]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MOV TEMP[2].xyz, IMM[0].zzzz
>  3: MOV TEMP[2].w, CONST[4].xxxx
>  4: MOV TEMP[3].xyz, IMM[0].zzzz
>  5: MOV TEMP[3].w, CONST[4].yyyy
>  6: MOV TEMP[4].xyz, IMM[0].zzzz
>  7: MOV TEMP[4].w, CONST[4].zzzz
>  8: NOT TEMP[5].x, CONST[223].xxxx
>  9: UIF TEMP[5].xxxx :0
> 10:   ADD TEMP[5], CONST[7], -TEMP[2]
> 11:   ADD TEMP[6], CONST[8], -TEMP[3]
> 12:   ADD TEMP[7], CONST[9], -TEMP[4]
> 13: ELSE :0
> 14:   NOT TEMP[8].x, CONST[224].xxxx
> 15:   UIF TEMP[8].xxxx :0
> 16:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 17:     UARL ADDR[0].x, TEMP[8].xxxx
> 18:     UARL ADDR[0].x, TEMP[8].xxxx
> 19:     ADD TEMP[5], CONST[ADDR[0].x+7], -TEMP[2]
> 20:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 21:     UARL ADDR[0].x, TEMP[8].xxxx
> 22:     UARL ADDR[0].x, TEMP[8].xxxx
> 23:     ADD TEMP[6], CONST[ADDR[0].x+7], -TEMP[3]
> 24:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 25:     UARL ADDR[0].x, TEMP[8].xxxx
> 26:     UARL ADDR[0].x, TEMP[8].xxxx
> 27:     ADD TEMP[7], CONST[ADDR[0].x+7], -TEMP[4]
> 28:   ELSE :0
> 29:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 30:     UARL ADDR[0].x, TEMP[8].xxxx
> 31:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 32:     MUL TEMP[5], TEMP[8], IN[2].xxxx
> 33:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 34:     UARL ADDR[0].x, TEMP[8].xxxx
> 35:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 36:     MUL TEMP[6], TEMP[8], IN[2].xxxx
> 37:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 38:     UARL ADDR[0].x, TEMP[8].xxxx
> 39:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 40:     MUL TEMP[7], TEMP[8], IN[2].xxxx
> 41:     UMUL TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx
> 42:     UARL ADDR[0].x, TEMP[8].xxxx
> 43:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 44:     MAD TEMP[5], TEMP[8], IN[2].yyyy, TEMP[5]
> 45:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 46:     UARL ADDR[0].x, TEMP[8].xxxx
> 47:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 48:     MAD TEMP[6], TEMP[8], IN[2].yyyy, TEMP[6]
> 49:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 50:     UARL ADDR[0].x, TEMP[8].xxxx
> 51:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 52:     MAD TEMP[7], TEMP[8], IN[2].yyyy, TEMP[7]
> 53:     UIF CONST[225].xxxx :0
> 54:       UMUL TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx
> 55:       UARL ADDR[0].x, TEMP[8].xxxx
> 56:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 57:       MAD TEMP[5], TEMP[8], IN[2].zzzz, TEMP[5]
> 58:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 59:       UARL ADDR[0].x, TEMP[8].xxxx
> 60:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 61:       MAD TEMP[6], TEMP[8], IN[2].zzzz, TEMP[6]
> 62:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 63:       UARL ADDR[0].x, TEMP[8].xxxx
> 64:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 65:       MAD TEMP[7], TEMP[8], IN[2].zzzz, TEMP[7]
> 66:     ENDIF
> 67:     UIF CONST[226].xxxx :0
> 68:       UMUL TEMP[8].x, TEMP[0].wwww, IMM[1].xxxx
> 69:       UARL ADDR[0].x, TEMP[8].xxxx
> 70:       ADD TEMP[2], CONST[ADDR[0].x+7], -TEMP[2]
> 71:       MAD TEMP[5], TEMP[2], IN[2].wwww, TEMP[5]
> 72:       UMAD TEMP[2].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 73:       UARL ADDR[0].x, TEMP[2].xxxx
> 74:       ADD TEMP[2], CONST[ADDR[0].x+7], -TEMP[3]
> 75:       MAD TEMP[6], TEMP[2], IN[2].wwww, TEMP[6]
> 76:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 77:       UARL ADDR[0].x, TEMP[0].xxxx
> 78:       ADD TEMP[0], CONST[ADDR[0].x+7], -TEMP[4]
> 79:       MAD TEMP[7], TEMP[0], IN[2].wwww, TEMP[7]
> 80:     ENDIF
> 81:   ENDIF
> 82: ENDIF
> 83: DP4 TEMP[0].x, IN[0], TEMP[5]
> 84: DP4 TEMP[2].x, IN[0], TEMP[6]
> 85: MOV TEMP[0].y, TEMP[2].xxxx
> 86: DP4 TEMP[2].x, IN[0], TEMP[7]
> 87: MOV TEMP[0].z, TEMP[2].xxxx
> 88: DP4 TEMP[2].x, IN[0], IMM[0].zzzw
> 89: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 90: MUL TEMP[3], CONST[0], TEMP[0].xxxx
> 91: MAD TEMP[3], CONST[1], TEMP[0].yyyy, TEMP[3]
> 92: MAD TEMP[3], CONST[2], TEMP[0].zzzz, TEMP[3]
> 93: MAD TEMP[2], CONST[3], TEMP[2].xxxx, TEMP[3]
> 94: MOV TEMP[0].xyz, TEMP[0].xyzx
> 95: MUL TEMP[3].x, TEMP[2].wwww, CONST[6].wwww
> 96: MOV TEMP[0].w, TEMP[3].xxxx
> 97: MAD TEMP[3].x, TEMP[2].zzzz, CONST[5].yyyy, CONST[5].xxxx
> 98: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 99: POW TEMP[3].x, TEMP[3].xxxx, CONST[5].zzzz
>100: ADD TEMP[4].x, IMM[0].wwww, -CONST[5].wwww
>101: MAD TEMP[3].x, CONST[5].wwww, TEMP[3].xxxx, TEMP[4].xxxx
>102: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[5].xyzz
>103: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[6].xyzz
>104: MOV TEMP[4].y, TEMP[5].xxxx
>105: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[7].xyzz
>106: MOV TEMP[4].z, TEMP[1].xxxx
>107: MUL TEMP[1].x, TEMP[3].xxxx, TEMP[3].xxxx
>108: MOV TEMP[1].z, TEMP[1].xxxx
>109: MOV TEMP[1].xy, IN[4].xyxx
>110: MOV OUT[2].xyz, TEMP[1].xyzx
>111: MOV OUT[0], TEMP[2]
>112: MOV OUT[1], TEMP[0]
>113: MOV OUT[3].xyz, TEMP[4].xyzx
>114: END
>radeonsi: Compiling shader 38
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %19 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %20 = load <16 x i8>, <16 x i8> addrspace(2)* %19, align 16, !invariant.load !0
>  %21 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %14)
>  %22 = extractelement <4 x float> %21, i32 0
>  %23 = extractelement <4 x float> %21, i32 1
>  %24 = extractelement <4 x float> %21, i32 2
>  %25 = extractelement <4 x float> %21, i32 3
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %27, i32 0, i32 %15)
>  %29 = extractelement <4 x float> %28, i32 0
>  %30 = extractelement <4 x float> %28, i32 1
>  %31 = extractelement <4 x float> %28, i32 2
>  %32 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %33 = load <16 x i8>, <16 x i8> addrspace(2)* %32, align 16, !invariant.load !0
>  %34 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %33, i32 0, i32 %16)
>  %35 = extractelement <4 x float> %34, i32 0
>  %36 = extractelement <4 x float> %34, i32 1
>  %37 = extractelement <4 x float> %34, i32 2
>  %38 = extractelement <4 x float> %34, i32 3
>  %39 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %40 = load <16 x i8>, <16 x i8> addrspace(2)* %39, align 16, !invariant.load !0
>  %41 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %40, i32 0, i32 %17)
>  %42 = extractelement <4 x float> %41, i32 0
>  %43 = extractelement <4 x float> %41, i32 1
>  %44 = extractelement <4 x float> %41, i32 2
>  %45 = extractelement <4 x float> %41, i32 3
>  %46 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %47 = load <16 x i8>, <16 x i8> addrspace(2)* %46, align 16, !invariant.load !0
>  %48 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %47, i32 0, i32 %18)
>  %49 = extractelement <4 x float> %48, i32 0
>  %50 = extractelement <4 x float> %48, i32 1
>  %51 = fptosi float %42 to i32
>  %52 = fptosi float %43 to i32
>  %53 = fptosi float %44 to i32
>  %54 = fptosi float %45 to i32
>  %55 = fmul float %29, 2.000000e+00
>  %56 = fadd float %55, -1.000000e+00
>  %57 = fmul float %30, 2.000000e+00
>  %58 = fadd float %57, -1.000000e+00
>  %59 = fmul float %31, 2.000000e+00
>  %60 = fadd float %59, -1.000000e+00
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call float @llvm.SI.load.const(<16 x i8> %62, i32 64)
>  %64 = call float @llvm.SI.load.const(<16 x i8> %62, i32 68)
>  %65 = call float @llvm.SI.load.const(<16 x i8> %62, i32 72)
>  %66 = call float @llvm.SI.load.const(<16 x i8> %62, i32 3568)
>  %67 = bitcast float %66 to i32
>  %68 = icmp eq i32 %67, -1
>  %69 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %70 = load <16 x i8>, <16 x i8> addrspace(2)* %69, align 16, !invariant.load !0
>  br i1 %68, label %else13, label %if9
>
>if9:                                              ; preds = %main_body
>  %71 = call float @llvm.SI.load.const(<16 x i8> %70, i32 112)
>  %72 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %73 = load <16 x i8>, <16 x i8> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = call float @llvm.SI.load.const(<16 x i8> %73, i32 116)
>  %75 = call float @llvm.SI.load.const(<16 x i8> %73, i32 120)
>  %76 = call float @llvm.SI.load.const(<16 x i8> %73, i32 124)
>  %77 = fsub float %76, %63
>  %78 = call float @llvm.SI.load.const(<16 x i8> %73, i32 128)
>  %79 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %80 = load <16 x i8>, <16 x i8> addrspace(2)* %79, align 16, !invariant.load !0
>  %81 = call float @llvm.SI.load.const(<16 x i8> %80, i32 132)
>  %82 = call float @llvm.SI.load.const(<16 x i8> %80, i32 136)
>  %83 = call float @llvm.SI.load.const(<16 x i8> %80, i32 140)
>  %84 = fsub float %83, %64
>  %85 = call float @llvm.SI.load.const(<16 x i8> %80, i32 144)
>  %86 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %87 = load <16 x i8>, <16 x i8> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = call float @llvm.SI.load.const(<16 x i8> %87, i32 148)
>  %89 = call float @llvm.SI.load.const(<16 x i8> %87, i32 152)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %87, i32 156)
>  %91 = fsub float %90, %65
>  br label %endif82
>
>else13:                                           ; preds = %main_body
>  %92 = call float @llvm.SI.load.const(<16 x i8> %70, i32 3584)
>  %93 = bitcast float %92 to i32
>  %94 = icmp eq i32 %93, -1
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = mul i32 %51, 48
>  %98 = add i32 %97, 112
>  %99 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %98)
>  %100 = mul i32 %51, 48
>  %101 = add i32 %100, 116
>  %102 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %101)
>  %103 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %104 = load <16 x i8>, <16 x i8> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = mul i32 %51, 48
>  %106 = add i32 %105, 120
>  %107 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %106)
>  %108 = mul i32 %51, 48
>  %109 = add i32 %108, 124
>  %110 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %109)
>  %111 = fsub float %110, %63
>  br i1 %94, label %else28, label %if15
>
>if15:                                             ; preds = %else13
>  %112 = mul i32 %51, 3
>  %113 = add i32 %112, 1
>  %114 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %115 = load <16 x i8>, <16 x i8> addrspace(2)* %114, align 16, !invariant.load !0
>  %116 = shl i32 %113, 4
>  %117 = add i32 %116, 112
>  %118 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %117)
>  %119 = shl i32 %113, 4
>  %120 = add i32 %119, 116
>  %121 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %120)
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = shl i32 %113, 4
>  %125 = add i32 %124, 120
>  %126 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %125)
>  %127 = shl i32 %113, 4
>  %128 = add i32 %127, 124
>  %129 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %128)
>  %130 = fsub float %129, %64
>  %131 = mul i32 %51, 3
>  %132 = add i32 %131, 2
>  %133 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %134 = load <16 x i8>, <16 x i8> addrspace(2)* %133, align 16, !invariant.load !0
>  %135 = shl i32 %132, 4
>  %136 = add i32 %135, 112
>  %137 = call float @llvm.SI.load.const(<16 x i8> %134, i32 %136)
>  %138 = shl i32 %132, 4
>  %139 = add i32 %138, 116
>  %140 = call float @llvm.SI.load.const(<16 x i8> %134, i32 %139)
>  %141 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %142 = load <16 x i8>, <16 x i8> addrspace(2)* %141, align 16, !invariant.load !0
>  %143 = shl i32 %132, 4
>  %144 = add i32 %143, 120
>  %145 = call float @llvm.SI.load.const(<16 x i8> %142, i32 %144)
>  %146 = shl i32 %132, 4
>  %147 = add i32 %146, 124
>  %148 = call float @llvm.SI.load.const(<16 x i8> %142, i32 %147)
>  %149 = fsub float %148, %65
>  br label %endif82
>
>else28:                                           ; preds = %else13
>  %150 = fmul float %99, %35
>  %151 = fmul float %102, %35
>  %152 = fmul float %107, %35
>  %153 = fmul float %111, %35
>  %154 = mul i32 %51, 3
>  %155 = add i32 %154, 1
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = shl i32 %155, 4
>  %159 = add i32 %158, 112
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 %159)
>  %161 = shl i32 %155, 4
>  %162 = add i32 %161, 116
>  %163 = call float @llvm.SI.load.const(<16 x i8> %157, i32 %162)
>  %164 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %165 = load <16 x i8>, <16 x i8> addrspace(2)* %164, align 16, !invariant.load !0
>  %166 = shl i32 %155, 4
>  %167 = add i32 %166, 120
>  %168 = call float @llvm.SI.load.const(<16 x i8> %165, i32 %167)
>  %169 = shl i32 %155, 4
>  %170 = add i32 %169, 124
>  %171 = call float @llvm.SI.load.const(<16 x i8> %165, i32 %170)
>  %172 = fsub float %171, %64
>  %173 = fmul float %160, %35
>  %174 = fmul float %163, %35
>  %175 = fmul float %168, %35
>  %176 = fmul float %172, %35
>  %177 = mul i32 %51, 3
>  %178 = add i32 %177, 2
>  %179 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %180 = load <16 x i8>, <16 x i8> addrspace(2)* %179, align 16, !invariant.load !0
>  %181 = shl i32 %178, 4
>  %182 = add i32 %181, 112
>  %183 = call float @llvm.SI.load.const(<16 x i8> %180, i32 %182)
>  %184 = shl i32 %178, 4
>  %185 = add i32 %184, 116
>  %186 = call float @llvm.SI.load.const(<16 x i8> %180, i32 %185)
>  %187 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %188 = load <16 x i8>, <16 x i8> addrspace(2)* %187, align 16, !invariant.load !0
>  %189 = shl i32 %178, 4
>  %190 = add i32 %189, 120
>  %191 = call float @llvm.SI.load.const(<16 x i8> %188, i32 %190)
>  %192 = shl i32 %178, 4
>  %193 = add i32 %192, 124
>  %194 = call float @llvm.SI.load.const(<16 x i8> %188, i32 %193)
>  %195 = fsub float %194, %65
>  %196 = fmul float %183, %35
>  %197 = fmul float %186, %35
>  %198 = fmul float %191, %35
>  %199 = fmul float %195, %35
>  %200 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %201 = load <16 x i8>, <16 x i8> addrspace(2)* %200, align 16, !invariant.load !0
>  %202 = mul i32 %52, 48
>  %203 = add i32 %202, 112
>  %204 = call float @llvm.SI.load.const(<16 x i8> %201, i32 %203)
>  %205 = mul i32 %52, 48
>  %206 = add i32 %205, 116
>  %207 = call float @llvm.SI.load.const(<16 x i8> %201, i32 %206)
>  %208 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %209 = load <16 x i8>, <16 x i8> addrspace(2)* %208, align 16, !invariant.load !0
>  %210 = mul i32 %52, 48
>  %211 = add i32 %210, 120
>  %212 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %211)
>  %213 = mul i32 %52, 48
>  %214 = add i32 %213, 124
>  %215 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %214)
>  %216 = fsub float %215, %63
>  %217 = fmul float %204, %36
>  %218 = fadd float %217, %150
>  %219 = fmul float %207, %36
>  %220 = fadd float %219, %151
>  %221 = fmul float %212, %36
>  %222 = fadd float %221, %152
>  %223 = fmul float %216, %36
>  %224 = fadd float %223, %153
>  %225 = mul i32 %52, 3
>  %226 = add i32 %225, 1
>  %227 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %228 = load <16 x i8>, <16 x i8> addrspace(2)* %227, align 16, !invariant.load !0
>  %229 = shl i32 %226, 4
>  %230 = add i32 %229, 112
>  %231 = call float @llvm.SI.load.const(<16 x i8> %228, i32 %230)
>  %232 = shl i32 %226, 4
>  %233 = add i32 %232, 116
>  %234 = call float @llvm.SI.load.const(<16 x i8> %228, i32 %233)
>  %235 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %236 = load <16 x i8>, <16 x i8> addrspace(2)* %235, align 16, !invariant.load !0
>  %237 = shl i32 %226, 4
>  %238 = add i32 %237, 120
>  %239 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %238)
>  %240 = shl i32 %226, 4
>  %241 = add i32 %240, 124
>  %242 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %241)
>  %243 = fsub float %242, %64
>  %244 = fmul float %231, %36
>  %245 = fadd float %244, %173
>  %246 = fmul float %234, %36
>  %247 = fadd float %246, %174
>  %248 = fmul float %239, %36
>  %249 = fadd float %248, %175
>  %250 = fmul float %243, %36
>  %251 = fadd float %250, %176
>  %252 = mul i32 %52, 3
>  %253 = add i32 %252, 2
>  %254 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %255 = load <16 x i8>, <16 x i8> addrspace(2)* %254, align 16, !invariant.load !0
>  %256 = shl i32 %253, 4
>  %257 = add i32 %256, 112
>  %258 = call float @llvm.SI.load.const(<16 x i8> %255, i32 %257)
>  %259 = shl i32 %253, 4
>  %260 = add i32 %259, 116
>  %261 = call float @llvm.SI.load.const(<16 x i8> %255, i32 %260)
>  %262 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %263 = load <16 x i8>, <16 x i8> addrspace(2)* %262, align 16, !invariant.load !0
>  %264 = shl i32 %253, 4
>  %265 = add i32 %264, 120
>  %266 = call float @llvm.SI.load.const(<16 x i8> %263, i32 %265)
>  %267 = shl i32 %253, 4
>  %268 = add i32 %267, 124
>  %269 = call float @llvm.SI.load.const(<16 x i8> %263, i32 %268)
>  %270 = fsub float %269, %65
>  %271 = fmul float %258, %36
>  %272 = fadd float %271, %196
>  %273 = fmul float %261, %36
>  %274 = fadd float %273, %197
>  %275 = fmul float %266, %36
>  %276 = fadd float %275, %198
>  %277 = fmul float %270, %36
>  %278 = fadd float %277, %199
>  %279 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %280 = load <16 x i8>, <16 x i8> addrspace(2)* %279, align 16, !invariant.load !0
>  %281 = call float @llvm.SI.load.const(<16 x i8> %280, i32 3600)
>  %282 = bitcast float %281 to i32
>  %283 = icmp eq i32 %282, 0
>  br i1 %283, label %endif66, label %if53
>
>if53:                                             ; preds = %else28
>  %284 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %285 = load <16 x i8>, <16 x i8> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = mul i32 %53, 48
>  %287 = add i32 %286, 112
>  %288 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %287)
>  %289 = mul i32 %53, 48
>  %290 = add i32 %289, 116
>  %291 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %290)
>  %292 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %293 = load <16 x i8>, <16 x i8> addrspace(2)* %292, align 16, !invariant.load !0
>  %294 = mul i32 %53, 48
>  %295 = add i32 %294, 120
>  %296 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %295)
>  %297 = mul i32 %53, 48
>  %298 = add i32 %297, 124
>  %299 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %298)
>  %300 = fsub float %299, %63
>  %301 = fmul float %288, %37
>  %302 = fadd float %301, %218
>  %303 = fmul float %291, %37
>  %304 = fadd float %303, %220
>  %305 = fmul float %296, %37
>  %306 = fadd float %305, %222
>  %307 = fmul float %300, %37
>  %308 = fadd float %307, %224
>  %309 = mul i32 %53, 3
>  %310 = add i32 %309, 1
>  %311 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %312 = load <16 x i8>, <16 x i8> addrspace(2)* %311, align 16, !invariant.load !0
>  %313 = shl i32 %310, 4
>  %314 = add i32 %313, 112
>  %315 = call float @llvm.SI.load.const(<16 x i8> %312, i32 %314)
>  %316 = shl i32 %310, 4
>  %317 = add i32 %316, 116
>  %318 = call float @llvm.SI.load.const(<16 x i8> %312, i32 %317)
>  %319 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %320 = load <16 x i8>, <16 x i8> addrspace(2)* %319, align 16, !invariant.load !0
>  %321 = shl i32 %310, 4
>  %322 = add i32 %321, 120
>  %323 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %322)
>  %324 = shl i32 %310, 4
>  %325 = add i32 %324, 124
>  %326 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %325)
>  %327 = fsub float %326, %64
>  %328 = fmul float %315, %37
>  %329 = fadd float %328, %245
>  %330 = fmul float %318, %37
>  %331 = fadd float %330, %247
>  %332 = fmul float %323, %37
>  %333 = fadd float %332, %249
>  %334 = fmul float %327, %37
>  %335 = fadd float %334, %251
>  %336 = mul i32 %53, 3
>  %337 = add i32 %336, 2
>  %338 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %339 = load <16 x i8>, <16 x i8> addrspace(2)* %338, align 16, !invariant.load !0
>  %340 = shl i32 %337, 4
>  %341 = add i32 %340, 112
>  %342 = call float @llvm.SI.load.const(<16 x i8> %339, i32 %341)
>  %343 = shl i32 %337, 4
>  %344 = add i32 %343, 116
>  %345 = call float @llvm.SI.load.const(<16 x i8> %339, i32 %344)
>  %346 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %347 = load <16 x i8>, <16 x i8> addrspace(2)* %346, align 16, !invariant.load !0
>  %348 = shl i32 %337, 4
>  %349 = add i32 %348, 120
>  %350 = call float @llvm.SI.load.const(<16 x i8> %347, i32 %349)
>  %351 = shl i32 %337, 4
>  %352 = add i32 %351, 124
>  %353 = call float @llvm.SI.load.const(<16 x i8> %347, i32 %352)
>  %354 = fsub float %353, %65
>  %355 = fmul float %342, %37
>  %356 = fadd float %355, %272
>  %357 = fmul float %345, %37
>  %358 = fadd float %357, %274
>  %359 = fmul float %350, %37
>  %360 = fadd float %359, %276
>  %361 = fmul float %354, %37
>  %362 = fadd float %361, %278
>  br label %endif66
>
>endif66:                                          ; preds = %else28, %if53
>  %.0101 = phi float [ %302, %if53 ], [ %218, %else28 ]
>  %.097 = phi float [ %304, %if53 ], [ %220, %else28 ]
>  %.093 = phi float [ %306, %if53 ], [ %222, %else28 ]
>  %.089 = phi float [ %308, %if53 ], [ %224, %else28 ]
>  %.085 = phi float [ %329, %if53 ], [ %245, %else28 ]
>  %.081 = phi float [ %331, %if53 ], [ %247, %else28 ]
>  %.077 = phi float [ %333, %if53 ], [ %249, %else28 ]
>  %.073 = phi float [ %335, %if53 ], [ %251, %else28 ]
>  %.069 = phi float [ %356, %if53 ], [ %272, %else28 ]
>  %.065 = phi float [ %358, %if53 ], [ %274, %else28 ]
>  %.061 = phi float [ %360, %if53 ], [ %276, %else28 ]
>  %.0 = phi float [ %362, %if53 ], [ %278, %else28 ]
>  %363 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %364 = load <16 x i8>, <16 x i8> addrspace(2)* %363, align 16, !invariant.load !0
>  %365 = call float @llvm.SI.load.const(<16 x i8> %364, i32 3616)
>  %366 = bitcast float %365 to i32
>  %367 = icmp eq i32 %366, 0
>  br i1 %367, label %endif82, label %if67
>
>if67:                                             ; preds = %endif66
>  %368 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %369 = load <16 x i8>, <16 x i8> addrspace(2)* %368, align 16, !invariant.load !0
>  %370 = mul i32 %54, 48
>  %371 = add i32 %370, 112
>  %372 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %371)
>  %373 = mul i32 %54, 48
>  %374 = add i32 %373, 116
>  %375 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %374)
>  %376 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %377 = load <16 x i8>, <16 x i8> addrspace(2)* %376, align 16, !invariant.load !0
>  %378 = mul i32 %54, 48
>  %379 = add i32 %378, 120
>  %380 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %379)
>  %381 = mul i32 %54, 48
>  %382 = add i32 %381, 124
>  %383 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %382)
>  %384 = fsub float %383, %63
>  %385 = fmul float %372, %38
>  %386 = fadd float %385, %.0101
>  %387 = fmul float %375, %38
>  %388 = fadd float %387, %.097
>  %389 = fmul float %380, %38
>  %390 = fadd float %389, %.093
>  %391 = fmul float %384, %38
>  %392 = fadd float %391, %.089
>  %393 = mul i32 %54, 3
>  %394 = add i32 %393, 1
>  %395 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %396 = load <16 x i8>, <16 x i8> addrspace(2)* %395, align 16, !invariant.load !0
>  %397 = shl i32 %394, 4
>  %398 = add i32 %397, 112
>  %399 = call float @llvm.SI.load.const(<16 x i8> %396, i32 %398)
>  %400 = shl i32 %394, 4
>  %401 = add i32 %400, 116
>  %402 = call float @llvm.SI.load.const(<16 x i8> %396, i32 %401)
>  %403 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %404 = load <16 x i8>, <16 x i8> addrspace(2)* %403, align 16, !invariant.load !0
>  %405 = shl i32 %394, 4
>  %406 = add i32 %405, 120
>  %407 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %406)
>  %408 = shl i32 %394, 4
>  %409 = add i32 %408, 124
>  %410 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %409)
>  %411 = fsub float %410, %64
>  %412 = fmul float %399, %38
>  %413 = fadd float %412, %.085
>  %414 = fmul float %402, %38
>  %415 = fadd float %414, %.081
>  %416 = fmul float %407, %38
>  %417 = fadd float %416, %.077
>  %418 = fmul float %411, %38
>  %419 = fadd float %418, %.073
>  %420 = mul i32 %54, 3
>  %421 = add i32 %420, 2
>  %422 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %423 = load <16 x i8>, <16 x i8> addrspace(2)* %422, align 16, !invariant.load !0
>  %424 = shl i32 %421, 4
>  %425 = add i32 %424, 112
>  %426 = call float @llvm.SI.load.const(<16 x i8> %423, i32 %425)
>  %427 = shl i32 %421, 4
>  %428 = add i32 %427, 116
>  %429 = call float @llvm.SI.load.const(<16 x i8> %423, i32 %428)
>  %430 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %431 = load <16 x i8>, <16 x i8> addrspace(2)* %430, align 16, !invariant.load !0
>  %432 = shl i32 %421, 4
>  %433 = add i32 %432, 120
>  %434 = call float @llvm.SI.load.const(<16 x i8> %431, i32 %433)
>  %435 = shl i32 %421, 4
>  %436 = add i32 %435, 124
>  %437 = call float @llvm.SI.load.const(<16 x i8> %431, i32 %436)
>  %438 = fsub float %437, %65
>  %439 = fmul float %426, %38
>  %440 = fadd float %439, %.069
>  %441 = fmul float %429, %38
>  %442 = fadd float %441, %.065
>  %443 = fmul float %434, %38
>  %444 = fadd float %443, %.061
>  %445 = fmul float %438, %38
>  %446 = fadd float %445, %.0
>  br label %endif82
>
>endif82:                                          ; preds = %endif66, %if15, %if67, %if9
>  %.3104 = phi float [ %71, %if9 ], [ %99, %if15 ], [ %386, %if67 ], [ %.0101, %endif66 ]
>  %.3100 = phi float [ %74, %if9 ], [ %102, %if15 ], [ %388, %if67 ], [ %.097, %endif66 ]
>  %.396 = phi float [ %75, %if9 ], [ %107, %if15 ], [ %390, %if67 ], [ %.093, %endif66 ]
>  %.392 = phi float [ %77, %if9 ], [ %111, %if15 ], [ %392, %if67 ], [ %.089, %endif66 ]
>  %.388 = phi float [ %78, %if9 ], [ %118, %if15 ], [ %413, %if67 ], [ %.085, %endif66 ]
>  %.384 = phi float [ %81, %if9 ], [ %121, %if15 ], [ %415, %if67 ], [ %.081, %endif66 ]
>  %.380 = phi float [ %82, %if9 ], [ %126, %if15 ], [ %417, %if67 ], [ %.077, %endif66 ]
>  %.376 = phi float [ %84, %if9 ], [ %130, %if15 ], [ %419, %if67 ], [ %.073, %endif66 ]
>  %.372 = phi float [ %85, %if9 ], [ %137, %if15 ], [ %440, %if67 ], [ %.069, %endif66 ]
>  %.368 = phi float [ %88, %if9 ], [ %140, %if15 ], [ %442, %if67 ], [ %.065, %endif66 ]
>  %.364 = phi float [ %89, %if9 ], [ %145, %if15 ], [ %444, %if67 ], [ %.061, %endif66 ]
>  %.3 = phi float [ %91, %if9 ], [ %149, %if15 ], [ %446, %if67 ], [ %.0, %endif66 ]
>  %447 = fmul float %22, %.3104
>  %448 = fmul float %23, %.3100
>  %449 = fadd float %447, %448
>  %450 = fmul float %24, %.396
>  %451 = fadd float %449, %450
>  %452 = fmul float %25, %.392
>  %453 = fadd float %451, %452
>  %454 = fmul float %22, %.388
>  %455 = fmul float %23, %.384
>  %456 = fadd float %454, %455
>  %457 = fmul float %24, %.380
>  %458 = fadd float %456, %457
>  %459 = fmul float %25, %.376
>  %460 = fadd float %458, %459
>  %461 = fmul float %22, %.372
>  %462 = fmul float %23, %.368
>  %463 = fadd float %461, %462
>  %464 = fmul float %24, %.364
>  %465 = fadd float %463, %464
>  %466 = fmul float %25, %.3
>  %467 = fadd float %465, %466
>  %468 = fmul float %22, 0.000000e+00
>  %469 = fmul float %23, 0.000000e+00
>  %470 = fadd float %468, %469
>  %471 = fmul float %24, 0.000000e+00
>  %472 = fadd float %470, %471
>  %473 = fadd float %472, %25
>  %474 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %475 = load <16 x i8>, <16 x i8> addrspace(2)* %474, align 16, !invariant.load !0
>  %476 = call float @llvm.SI.load.const(<16 x i8> %475, i32 64)
>  %477 = fadd float %453, %476
>  %478 = call float @llvm.SI.load.const(<16 x i8> %475, i32 68)
>  %479 = fadd float %460, %478
>  %480 = call float @llvm.SI.load.const(<16 x i8> %475, i32 72)
>  %481 = fadd float %467, %480
>  %482 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %483 = load <16 x i8>, <16 x i8> addrspace(2)* %482, align 16, !invariant.load !0
>  %484 = call float @llvm.SI.load.const(<16 x i8> %483, i32 0)
>  %485 = fmul float %484, %477
>  %486 = call float @llvm.SI.load.const(<16 x i8> %483, i32 4)
>  %487 = fmul float %486, %477
>  %488 = call float @llvm.SI.load.const(<16 x i8> %483, i32 8)
>  %489 = fmul float %488, %477
>  %490 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %491 = load <16 x i8>, <16 x i8> addrspace(2)* %490, align 16, !invariant.load !0
>  %492 = call float @llvm.SI.load.const(<16 x i8> %491, i32 12)
>  %493 = fmul float %492, %477
>  %494 = call float @llvm.SI.load.const(<16 x i8> %491, i32 16)
>  %495 = fmul float %494, %479
>  %496 = fadd float %495, %485
>  %497 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %498 = load <16 x i8>, <16 x i8> addrspace(2)* %497, align 16, !invariant.load !0
>  %499 = call float @llvm.SI.load.const(<16 x i8> %498, i32 20)
>  %500 = fmul float %499, %479
>  %501 = fadd float %500, %487
>  %502 = call float @llvm.SI.load.const(<16 x i8> %498, i32 24)
>  %503 = fmul float %502, %479
>  %504 = fadd float %503, %489
>  %505 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %506 = load <16 x i8>, <16 x i8> addrspace(2)* %505, align 16, !invariant.load !0
>  %507 = call float @llvm.SI.load.const(<16 x i8> %506, i32 28)
>  %508 = fmul float %507, %479
>  %509 = fadd float %508, %493
>  %510 = call float @llvm.SI.load.const(<16 x i8> %506, i32 32)
>  %511 = fmul float %510, %481
>  %512 = fadd float %511, %496
>  %513 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %514 = load <16 x i8>, <16 x i8> addrspace(2)* %513, align 16, !invariant.load !0
>  %515 = call float @llvm.SI.load.const(<16 x i8> %514, i32 36)
>  %516 = fmul float %515, %481
>  %517 = fadd float %516, %501
>  %518 = call float @llvm.SI.load.const(<16 x i8> %514, i32 40)
>  %519 = fmul float %518, %481
>  %520 = fadd float %519, %504
>  %521 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %522 = load <16 x i8>, <16 x i8> addrspace(2)* %521, align 16, !invariant.load !0
>  %523 = call float @llvm.SI.load.const(<16 x i8> %522, i32 44)
>  %524 = fmul float %523, %481
>  %525 = fadd float %524, %509
>  %526 = call float @llvm.SI.load.const(<16 x i8> %522, i32 48)
>  %527 = fmul float %526, %473
>  %528 = fadd float %527, %512
>  %529 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %530 = load <16 x i8>, <16 x i8> addrspace(2)* %529, align 16, !invariant.load !0
>  %531 = call float @llvm.SI.load.const(<16 x i8> %530, i32 52)
>  %532 = fmul float %531, %473
>  %533 = fadd float %532, %517
>  %534 = call float @llvm.SI.load.const(<16 x i8> %530, i32 56)
>  %535 = fmul float %534, %473
>  %536 = fadd float %535, %520
>  %537 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %538 = load <16 x i8>, <16 x i8> addrspace(2)* %537, align 16, !invariant.load !0
>  %539 = call float @llvm.SI.load.const(<16 x i8> %538, i32 60)
>  %540 = fmul float %539, %473
>  %541 = fadd float %540, %525
>  %542 = call float @llvm.SI.load.const(<16 x i8> %538, i32 108)
>  %543 = fmul float %541, %542
>  %544 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %545 = load <16 x i8>, <16 x i8> addrspace(2)* %544, align 16, !invariant.load !0
>  %546 = call float @llvm.SI.load.const(<16 x i8> %545, i32 84)
>  %547 = call float @llvm.SI.load.const(<16 x i8> %545, i32 80)
>  %548 = fmul float %536, %546
>  %549 = fadd float %548, %547
>  %550 = call float @llvm.AMDGPU.clamp.(float %549, float 0.000000e+00, float 1.000000e+00)
>  %551 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %552 = load <16 x i8>, <16 x i8> addrspace(2)* %551, align 16, !invariant.load !0
>  %553 = call float @llvm.SI.load.const(<16 x i8> %552, i32 88)
>  %554 = call float @llvm.pow.f32(float %550, float %553)
>  %555 = call float @llvm.SI.load.const(<16 x i8> %552, i32 92)
>  %556 = fsub float 1.000000e+00, %555
>  %557 = call float @llvm.SI.load.const(<16 x i8> %552, i32 92)
>  %558 = fmul float %557, %554
>  %559 = fadd float %558, %556
>  %560 = fmul float %56, %.3104
>  %561 = fmul float %58, %.3100
>  %562 = fadd float %561, %560
>  %563 = fmul float %60, %.396
>  %564 = fadd float %562, %563
>  %565 = fmul float %56, %.388
>  %566 = fmul float %58, %.384
>  %567 = fadd float %566, %565
>  %568 = fmul float %60, %.380
>  %569 = fadd float %567, %568
>  %570 = fmul float %56, %.372
>  %571 = fmul float %58, %.368
>  %572 = fadd float %571, %570
>  %573 = fmul float %60, %.364
>  %574 = fadd float %572, %573
>  %575 = fmul float %559, %559
>  %576 = bitcast i32 %12 to float
>  %577 = insertvalue <{ float, float, float }> undef, float %576, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %477, float %479, float %481, float %543)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %49, float %50, float %575, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %564, float %569, float %574, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %528, float %533, float %536, float %541)
>  ret <{ float, float, float }> %577
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL CONST[0..7]
>DCL TEMP[0..9], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,     2.9297,     6.0000}
>IMM[1] FLT32 {    4.0000,     5.0000,     0.0000,     0.0010}
>IMM[2] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[2].xyzz, IN[2].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[2].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xy, IN[1].xyyy
>  8: TEX TEMP[2].yz, TEMP[2], SAMP[4], 2D
>  9: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[0].xyzz
> 10: MUL TEMP[3].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 11: MUL TEMP[3].xyz, IMM[0].yyyy, TEMP[3].xyzz
> 12: ADD TEMP[3].xyz, TEMP[0].xyzz, -TEMP[3].xyzz
> 13: DP3 TEMP[3].x, TEMP[3].xyzz, TEMP[1].xyzz
> 14: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].xxxx
> 15: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[1].xyzz
> 16: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 17: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 18: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[4].xxxx
> 19: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 20: ADD TEMP[3].x, IMM[0].xxxx, -TEMP[3].xxxx
> 21: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[3].x, TEMP[2].yyyy, TEMP[3].xxxx
> 23: MAD TEMP[4].xyz, IMM[0].zzzz, TEMP[1].xyzz, IN[0].xyzz
> 24: MUL TEMP[5], CONST[4], TEMP[4].xxxx
> 25: MAD TEMP[5], CONST[5], TEMP[4].yyyy, TEMP[5]
> 26: MAD TEMP[4], CONST[6], TEMP[4].zzzz, TEMP[5]
> 27: ADD TEMP[4].xyz, TEMP[4], CONST[7]
> 28: MOV TEMP[5].xyz, TEMP[1].xyzz
> 29: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 30: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[0].xyzz
> 31: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 32: MAD TEMP[6].xyz, IMM[0].yyyy, TEMP[6].xyzz, -TEMP[0].xyzz
> 33: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[2].zzzz
> 34: MUL TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 35: MOV TEMP[8].xy, TEMP[4].xyyy
> 36: MOV TEMP[8].w, IMM[0].xxxx
> 37: MOV TEMP[8].z, TEMP[4].zzzz
> 38: TXP TEMP[4].x, TEMP[8], SAMP[0], SHADOW2D
> 39: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 40: MUL TEMP[8].x, IMM[1].xxxx, TEMP[2].yyyy
> 41: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[1].xyzz
> 42: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 43: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 44: MUL TEMP[4].xyz, CONST[3].xyzz, TEMP[4].xxxx
> 45: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[2].yyyy
> 46: MUL TEMP[4].xyz, TEMP[9].xxxx, TEMP[4].xyzz
> 47: MAD TEMP[4].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[4].xyzz
> 48: MOV TEMP[5].xy, IN[1].xyyy
> 49: TEX TEMP[5].xyz, TEMP[5], SAMP[3], 2D
> 50: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[1].xyzz
> 51: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 52: ADD TEMP[0].x, IMM[0].xxxx, -TEMP[0].xxxx
> 53: POW TEMP[0].x, TEMP[0].xxxx, IMM[1].yyyy
> 54: MAX TEMP[1].xyz, TEMP[2].zzzz, IMM[1].zzzz
> 55: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[1].xyzz
> 56: MOV TEMP[1].xyz, TEMP[6].xyzz
> 57: MOV TEMP[1].w, TEMP[7].xxxx
> 58: TXL TEMP[1].xyz, TEMP[1], SAMP[2], CUBE
> 59: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 60: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx
> 61: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[5].xyzz, TEMP[0].xyzz
> 62: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
> 63: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].zzzz
> 64: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
> 65: ADD TEMP[2].x, TEMP[2].xxxx, IMM[1].wwww
> 66: RCP TEMP[2].x, TEMP[2].xxxx
> 67: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 68: FRC TEMP[2].x, CONST[1].wwww
> 69: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].xxxx
> 70: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 71: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 72: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
> 73: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
> 74: MOV TEMP[0].w, IN[0].wwww
> 75: MOV OUT[0], TEMP[0]
> 76: END
>radeonsi: Compiling shader 39
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %67 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %68 = load <8 x i32>, <8 x i32> addrspace(2)* %67, align 32, !invariant.load !0
>  %69 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %70 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %69, i64 0, i64 19, !amdgpu.uniform !0
>  %71 = load <4 x i32>, <4 x i32> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = extractelement <8 x i32> %68, i32 7
>  %73 = extractelement <4 x i32> %71, i32 0
>  %74 = and i32 %73, %72
>  %75 = insertelement <4 x i32> %71, i32 %74, i32 0
>  %76 = bitcast float %65 to i32
>  %77 = bitcast float %66 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %79, <8 x i32> %68, <4 x i32> %75, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %81 = extractelement <4 x float> %80, i32 1
>  %82 = extractelement <4 x float> %80, i32 2
>  %83 = fmul float %60, %43
>  %84 = fmul float %62, %44
>  %85 = fadd float %84, %83
>  %86 = fmul float %64, %45
>  %87 = fadd float %85, %86
>  %88 = fmul float %87, %60
>  %89 = fmul float %87, %62
>  %90 = fmul float %87, %64
>  %91 = fmul float %88, 2.000000e+00
>  %92 = fmul float %89, 2.000000e+00
>  %93 = fmul float %90, 2.000000e+00
>  %94 = fsub float %43, %91
>  %95 = fsub float %44, %92
>  %96 = fsub float %45, %93
>  %97 = fmul float %94, %60
>  %98 = fmul float %95, %62
>  %99 = fadd float %98, %97
>  %100 = fmul float %96, %64
>  %101 = fadd float %99, %100
>  %102 = fadd float %101, 1.000000e+00
>  %103 = fmul float %43, %60
>  %104 = fmul float %44, %62
>  %105 = fadd float %104, %103
>  %106 = fmul float %45, %64
>  %107 = fadd float %105, %106
>  %108 = fsub float 1.000000e+00, %107
>  %109 = call float @llvm.AMDGPU.clamp.(float %108, float 0.000000e+00, float 1.000000e+00)
>  %110 = fsub float %102, %109
>  %111 = call float @llvm.AMDGPU.clamp.(float %110, float 0.000000e+00, float 1.000000e+00)
>  %112 = fsub float 1.000000e+00, %111
>  %113 = fmul float %112, %112
>  %114 = fmul float %81, %113
>  %115 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %116 = fmul float %60, 0x4007700140000000
>  %117 = fadd float %116, %115
>  %118 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %119 = fmul float %62, 0x4007700140000000
>  %120 = fadd float %119, %118
>  %121 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %122 = fmul float %64, 0x4007700140000000
>  %123 = fadd float %122, %121
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 64)
>  %127 = fmul float %126, %117
>  %128 = call float @llvm.SI.load.const(<16 x i8> %125, i32 68)
>  %129 = fmul float %128, %117
>  %130 = call float @llvm.SI.load.const(<16 x i8> %125, i32 72)
>  %131 = fmul float %130, %117
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 80)
>  %135 = fmul float %134, %120
>  %136 = fadd float %135, %127
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 84)
>  %138 = fmul float %137, %120
>  %139 = fadd float %138, %129
>  %140 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %141 = load <16 x i8>, <16 x i8> addrspace(2)* %140, align 16, !invariant.load !0
>  %142 = call float @llvm.SI.load.const(<16 x i8> %141, i32 88)
>  %143 = fmul float %142, %120
>  %144 = fadd float %143, %131
>  %145 = call float @llvm.SI.load.const(<16 x i8> %141, i32 96)
>  %146 = fmul float %145, %123
>  %147 = fadd float %146, %136
>  %148 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %149 = load <16 x i8>, <16 x i8> addrspace(2)* %148, align 16, !invariant.load !0
>  %150 = call float @llvm.SI.load.const(<16 x i8> %149, i32 100)
>  %151 = fmul float %150, %123
>  %152 = fadd float %151, %139
>  %153 = call float @llvm.SI.load.const(<16 x i8> %149, i32 104)
>  %154 = fmul float %153, %123
>  %155 = fadd float %154, %144
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = call float @llvm.SI.load.const(<16 x i8> %157, i32 112)
>  %159 = fadd float %147, %158
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 116)
>  %161 = fadd float %152, %160
>  %162 = call float @llvm.SI.load.const(<16 x i8> %157, i32 120)
>  %163 = fadd float %155, %162
>  %164 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %165 = load <8 x i32>, <8 x i32> addrspace(2)* %164, align 32, !invariant.load !0
>  %166 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %167 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %166, i64 0, i64 7, !amdgpu.uniform !0
>  %168 = load <4 x i32>, <4 x i32> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = extractelement <8 x i32> %165, i32 7
>  %170 = extractelement <4 x i32> %168, i32 0
>  %171 = and i32 %170, %169
>  %172 = insertelement <4 x i32> %168, i32 %171, i32 0
>  %173 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %174 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %175 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %176 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %177 = call float @llvm.fabs.f32(float %175)
>  %178 = fdiv float 1.000000e+00, %177, !fpmath !1
>  %179 = fmul float %173, %178
>  %180 = fadd float %179, 1.500000e+00
>  %181 = fmul float %174, %178
>  %182 = fadd float %181, 1.500000e+00
>  %183 = bitcast float %182 to i32
>  %184 = bitcast float %180 to i32
>  %185 = bitcast float %176 to i32
>  %186 = insertelement <4 x i32> undef, i32 %183, i32 0
>  %187 = insertelement <4 x i32> %186, i32 %184, i32 1
>  %188 = insertelement <4 x i32> %187, i32 %185, i32 2
>  %189 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %188, <8 x i32> %165, <4 x i32> %172, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %190 = extractelement <4 x float> %189, i32 0
>  %191 = extractelement <4 x float> %189, i32 1
>  %192 = extractelement <4 x float> %189, i32 2
>  %193 = extractelement <4 x float> %189, i32 3
>  %194 = fmul float %60, %43
>  %195 = fmul float %62, %44
>  %196 = fadd float %195, %194
>  %197 = fmul float %64, %45
>  %198 = fadd float %196, %197
>  %199 = fmul float %198, %60
>  %200 = fmul float %198, %62
>  %201 = fmul float %198, %64
>  %202 = fmul float %199, 2.000000e+00
>  %203 = fsub float %202, %43
>  %204 = fmul float %200, 2.000000e+00
>  %205 = fsub float %204, %44
>  %206 = fmul float %201, 2.000000e+00
>  %207 = fsub float %206, %45
>  %208 = fsub float 1.000000e+00, %82
>  %209 = fmul float %208, 6.000000e+00
>  %210 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <8 x i32>, <8 x i32> addrspace(2)* %210, align 32, !invariant.load !0
>  %212 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %213 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %212, i64 0, i64 3, !amdgpu.uniform !0
>  %214 = load <4 x i32>, <4 x i32> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = extractelement <8 x i32> %211, i32 7
>  %216 = extractelement <4 x i32> %214, i32 0
>  %217 = and i32 %216, %215
>  %218 = insertelement <4 x i32> %214, i32 %217, i32 0
>  %219 = bitcast float %163 to i32
>  %220 = bitcast float %159 to i32
>  %221 = bitcast float %161 to i32
>  %222 = insertelement <4 x i32> undef, i32 %219, i32 0
>  %223 = insertelement <4 x i32> %222, i32 %220, i32 1
>  %224 = insertelement <4 x i32> %223, i32 %221, i32 2
>  %225 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %224, <8 x i32> %211, <4 x i32> %218, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %226 = extractelement <4 x float> %225, i32 0
>  %227 = fmul float %190, %193
>  %228 = fmul float %191, %193
>  %229 = fmul float %192, %193
>  %230 = fmul float %81, 4.000000e+00
>  %231 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %232 = load <16 x i8>, <16 x i8> addrspace(2)* %231, align 16, !invariant.load !0
>  %233 = call float @llvm.SI.load.const(<16 x i8> %232, i32 16)
>  %234 = call float @llvm.SI.load.const(<16 x i8> %232, i32 20)
>  %235 = call float @llvm.SI.load.const(<16 x i8> %232, i32 24)
>  %236 = fmul float %233, %60
>  %237 = fsub float -0.000000e+00, %236
>  %238 = fmul float %234, %62
>  %239 = fsub float %237, %238
>  %240 = fmul float %235, %64
>  %241 = fsub float %239, %240
>  %242 = call float @llvm.AMDGPU.clamp.(float %241, float 0.000000e+00, float 1.000000e+00)
>  %243 = fmul float %226, %226
>  %244 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %245 = load <16 x i8>, <16 x i8> addrspace(2)* %244, align 16, !invariant.load !0
>  %246 = call float @llvm.SI.load.const(<16 x i8> %245, i32 48)
>  %247 = fmul float %246, %243
>  %248 = call float @llvm.SI.load.const(<16 x i8> %245, i32 52)
>  %249 = fmul float %248, %243
>  %250 = call float @llvm.SI.load.const(<16 x i8> %245, i32 56)
>  %251 = fmul float %250, %243
>  %252 = fmul float %247, %81
>  %253 = fmul float %249, %81
>  %254 = fmul float %251, %81
>  %255 = fmul float %242, %252
>  %256 = fmul float %242, %253
>  %257 = fmul float %242, %254
>  %258 = fmul float %227, %230
>  %259 = fadd float %258, %255
>  %260 = fmul float %228, %230
>  %261 = fadd float %260, %256
>  %262 = fmul float %229, %230
>  %263 = fadd float %262, %257
>  %264 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %265 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %266 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %267 = load <8 x i32>, <8 x i32> addrspace(2)* %266, align 32, !invariant.load !0
>  %268 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %269 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %268, i64 0, i64 15, !amdgpu.uniform !0
>  %270 = load <4 x i32>, <4 x i32> addrspace(2)* %269, align 16, !invariant.load !0
>  %271 = extractelement <8 x i32> %267, i32 7
>  %272 = extractelement <4 x i32> %270, i32 0
>  %273 = and i32 %272, %271
>  %274 = insertelement <4 x i32> %270, i32 %273, i32 0
>  %275 = bitcast float %264 to i32
>  %276 = bitcast float %265 to i32
>  %277 = insertelement <2 x i32> undef, i32 %275, i32 0
>  %278 = insertelement <2 x i32> %277, i32 %276, i32 1
>  %279 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %278, <8 x i32> %267, <4 x i32> %274, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %280 = extractelement <4 x float> %279, i32 0
>  %281 = extractelement <4 x float> %279, i32 1
>  %282 = extractelement <4 x float> %279, i32 2
>  %283 = fmul float %43, %60
>  %284 = fmul float %44, %62
>  %285 = fadd float %284, %283
>  %286 = fmul float %45, %64
>  %287 = fadd float %285, %286
>  %288 = call float @llvm.AMDGPU.clamp.(float %287, float 0.000000e+00, float 1.000000e+00)
>  %289 = fsub float 1.000000e+00, %288
>  %290 = call float @llvm.pow.f32(float %289, float 5.000000e+00)
>  %291 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %292 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %293 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %294 = fmul float %290, %291
>  %295 = fmul float %290, %292
>  %296 = fmul float %290, %293
>  %297 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %298 = load <8 x i32>, <8 x i32> addrspace(2)* %297, align 32, !invariant.load !0
>  %299 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %300 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %299, i64 0, i64 11, !amdgpu.uniform !0
>  %301 = load <4 x i32>, <4 x i32> addrspace(2)* %300, align 16, !invariant.load !0
>  %302 = extractelement <8 x i32> %298, i32 7
>  %303 = extractelement <4 x i32> %301, i32 0
>  %304 = and i32 %303, %302
>  %305 = insertelement <4 x i32> %301, i32 %304, i32 0
>  %306 = call float @llvm.amdgcn.cubetc(float %203, float %205, float %207)
>  %307 = call float @llvm.amdgcn.cubesc(float %203, float %205, float %207)
>  %308 = call float @llvm.amdgcn.cubema(float %203, float %205, float %207)
>  %309 = call float @llvm.amdgcn.cubeid(float %203, float %205, float %207)
>  %310 = call float @llvm.fabs.f32(float %308)
>  %311 = fdiv float 1.000000e+00, %310, !fpmath !1
>  %312 = fmul float %306, %311
>  %313 = fadd float %312, 1.500000e+00
>  %314 = fmul float %307, %311
>  %315 = fadd float %314, 1.500000e+00
>  %316 = bitcast float %315 to i32
>  %317 = bitcast float %313 to i32
>  %318 = bitcast float %309 to i32
>  %319 = bitcast float %209 to i32
>  %320 = insertelement <4 x i32> undef, i32 %316, i32 0
>  %321 = insertelement <4 x i32> %320, i32 %317, i32 1
>  %322 = insertelement <4 x i32> %321, i32 %318, i32 2
>  %323 = insertelement <4 x i32> %322, i32 %319, i32 3
>  %324 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %323, <8 x i32> %298, <4 x i32> %305, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %325 = extractelement <4 x float> %324, i32 0
>  %326 = extractelement <4 x float> %324, i32 1
>  %327 = extractelement <4 x float> %324, i32 2
>  %328 = fmul float %294, %325
>  %329 = fmul float %295, %326
>  %330 = fmul float %296, %327
>  %331 = fmul float %328, %114
>  %332 = fmul float %329, %114
>  %333 = fmul float %330, %114
>  %334 = fmul float %259, %280
>  %335 = fadd float %334, %331
>  %336 = fmul float %261, %281
>  %337 = fadd float %336, %332
>  %338 = fmul float %263, %282
>  %339 = fadd float %338, %333
>  %340 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %341 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %342 = load <16 x i8>, <16 x i8> addrspace(2)* %341, align 16, !invariant.load !0
>  %343 = call float @llvm.SI.load.const(<16 x i8> %342, i32 12)
>  %344 = fsub float %340, %343
>  %345 = call float @llvm.maxnum.f32(float %344, float 0.000000e+00)
>  %346 = call float @llvm.SI.load.const(<16 x i8> %342, i32 28)
>  %347 = call float @llvm.SI.load.const(<16 x i8> %342, i32 12)
>  %348 = fsub float %346, %347
>  %349 = fadd float %348, 0x3F50624DE0000000
>  %350 = fdiv float 1.000000e+00, %349, !fpmath !1
>  %351 = fmul float %345, %350
>  %352 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %353 = load <16 x i8>, <16 x i8> addrspace(2)* %352, align 16, !invariant.load !0
>  %354 = call float @llvm.SI.load.const(<16 x i8> %353, i32 28)
>  %355 = call float @llvm.floor.f32(float %354)
>  %356 = fsub float %354, %355
>  %357 = fmul float %356, 8.000000e+00
>  %358 = call float @llvm.pow.f32(float %351, float %357)
>  %359 = call float @llvm.AMDGPU.clamp.(float %358, float 0.000000e+00, float 1.000000e+00)
>  %360 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %361 = fmul float %360, %359
>  %362 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %363 = load <16 x i8>, <16 x i8> addrspace(2)* %362, align 16, !invariant.load !0
>  %364 = call float @llvm.SI.load.const(<16 x i8> %363, i32 32)
>  %365 = fsub float 1.000000e+00, %361
>  %366 = fmul float %335, %361
>  %367 = fmul float %364, %365
>  %368 = fadd float %366, %367
>  %369 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %370 = load <16 x i8>, <16 x i8> addrspace(2)* %369, align 16, !invariant.load !0
>  %371 = call float @llvm.SI.load.const(<16 x i8> %370, i32 36)
>  %372 = fsub float 1.000000e+00, %361
>  %373 = fmul float %337, %361
>  %374 = fmul float %371, %372
>  %375 = fadd float %373, %374
>  %376 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %377 = load <16 x i8>, <16 x i8> addrspace(2)* %376, align 16, !invariant.load !0
>  %378 = call float @llvm.SI.load.const(<16 x i8> %377, i32 40)
>  %379 = fsub float 1.000000e+00, %361
>  %380 = fmul float %339, %361
>  %381 = fmul float %378, %379
>  %382 = fadd float %380, %381
>  %383 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %384 = bitcast float %5 to i32
>  %385 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %384, 10
>  %386 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %385, float %368, 11
>  %387 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %386, float %375, 12
>  %388 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %387, float %382, 13
>  %389 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %388, float %383, 14
>  %390 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %389, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %390
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x10                 ; C0880B10
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[12:15], v4, s[4:7], 0 idxen   ; E00C2000 80010C04
>	buffer_load_format_xyzw v[16:19], v5, s[12:15], 0 idxen ; E00C2000 80031005
>	buffer_load_format_xyzw v[8:11], v8, s[16:19], 0 idxen  ; E00C2000 80040808
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v10, s4                                   ; 7E140204
>	v_mov_b32_e32 v11, s5                                   ; 7E160205
>	v_mov_b32_e32 v19, s6                                   ; 7E260206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v3, s4                                    ; 7E060204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v22, s7, v10                              ; 082C1407
>	v_mov_b32_e32 v5, s8                                    ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v6, s4                                    ; 7E0C0204
>	v_mov_b32_e32 v4, s5                                    ; 7E080205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v23, s6, v11                              ; 082E1606
>	v_mov_b32_e32 v20, s7                                   ; 7E280207
>	v_mov_b32_e32 v21, s8                                   ; 7E2A0208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v7, s4                                    ; 7E0E0204
>	v_sub_f32_e32 v24, s5, v19                              ; 08302605
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v29                               ; 7E00111D
>	v_mul_lo_i32 v7, v0, 48                                 ; D2D60007 00016100
>	v_add_i32_e32 v0, vcc, s14, v7                          ; 4A000E0E
>	v_add_i32_e32 v4, vcc, s13, v7                          ; 4A080E0D
>	v_add_i32_e32 v5, vcc, s15, v7                          ; 4A0A0E0F
>	v_add_i32_e32 v1, vcc, s12, v7                          ; 4A020E0C
>	buffer_load_dword v3, v0, s[0:3], 0 offen               ; E0301000 80000300
>	buffer_load_dword v0, v4, s[0:3], 0 offen               ; E0301000 80000004
>	buffer_load_dword v4, v5, s[0:3], 0 offen               ; E0301000 80000405
>	buffer_load_dword v1, v1, s[0:3], 0 offen               ; E0301000 80000101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v22, v10, v4                           ; 0A2C090A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0x8c, v7                         ; 4A0A0EFF 0000008C
>	v_add_i32_e32 v23, vcc, 0x9c, v7                        ; 4A2E0EFF 0000009C
>	v_add_i32_e32 v4, vcc, 0x80, v7                         ; 4A080EFF 00000080
>	v_add_i32_e32 v20, vcc, 0x88, v7                        ; 4A280EFF 00000088
>	v_add_i32_e32 v6, vcc, 0x84, v7                         ; 4A0C0EFF 00000084
>	v_add_i32_e32 v21, vcc, 0x94, v7                        ; 4A2A0EFF 00000094
>	buffer_load_dword v24, v5, s[0:3], 0 offen              ; E0301000 80001805
>	buffer_load_dword v5, v4, s[0:3], 0 offen               ; E0301000 80000504
>	buffer_load_dword v4, v20, s[0:3], 0 offen              ; E0301000 80000414
>	v_add_i32_e32 v20, vcc, 0x90, v7                        ; 4A280EFF 00000090
>	v_add_i32_e32 v7, vcc, 0x98, v7                         ; 4A0E0EFF 00000098
>	buffer_load_dword v25, v23, s[0:3], 0 offen             ; E0301000 80001917
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v23, v11, v24                          ; 0A2E310B
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v24, v19, v25                          ; 0A303313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v4, v30                               ; 7E08111E
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	v_add_i32_e32 v20, vcc, s8, v7                          ; 4A280E08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[25:28], v6, s[4:7], 0 idxen   ; E00C2000 80011906
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v21, vcc, s4, v7                          ; 4A2A0E04
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	v_mul_lo_i32 v29, v4, 48                                ; D2D6001D 00016104
>	v_add_i32_e32 v4, vcc, s11, v7                          ; 4A080E0B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v5, vcc, s10, v7                          ; 4A0A0E0A
>	v_add_i32_e32 v6, vcc, s9, v7                           ; 4A0C0E09
>	v_add_i32_e32 v24, vcc, s6, v7                          ; 4A300E06
>	buffer_load_dword v23, v4, s[0:3], 0 offen              ; E0301000 80001704
>	v_add_i32_e32 v4, vcc, s7, v7                           ; 4A080E07
>	v_add_i32_e32 v7, vcc, s5, v7                           ; 4A0E0E05
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v30, v4, s[0:3], 0 offen              ; E0301000 80001E04
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v3, v25, v3                               ; 10060719
>	v_mul_f32_e32 v1, v25, v1                               ; 10020319
>	v_mul_f32_e32 v0, v25, v0                               ; 10000119
>	v_mul_f32_e32 v22, v25, v22                             ; 102C2D19
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v33, v19, v21                          ; 0A422B13
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v4, v25, v20                              ; 10082919
>	v_subrev_f32_e32 v20, v11, v23                          ; 0A282F0B
>	v_mul_f32_e32 v23, v25, v20                             ; 102E2919
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v5, v25, v5                               ; 100A0B19
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v6, v25, v6                               ; 100C0D19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v21, v25, v24                             ; 102A3119
>	v_mul_f32_e32 v20, v25, v30                             ; 10283D19
>	v_mul_f32_e32 v7, v25, v7                               ; 100E0F19
>	v_mul_f32_e32 v24, v25, v33                             ; 10304319
>	v_add_i32_e32 v25, vcc, s15, v29                        ; 4A323A0F
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v10, v25                          ; 0A32330A
>	v_mac_f32_e32 v22, v26, v25                             ; 3E2C331A
>	v_add_i32_e32 v25, vcc, s11, v29                        ; 4A323A0B
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v11, v25                          ; 0A32330B
>	v_mac_f32_e32 v23, v26, v25                             ; 3E2E331A
>	v_add_i32_e32 v25, vcc, s14, v29                        ; 4A323A0E
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v25                              ; 3E06331A
>	v_add_i32_e32 v25, vcc, s12, v29                        ; 4A323A0C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v25                              ; 3E02331A
>	v_add_i32_e32 v25, vcc, s13, v29                        ; 4A323A0D
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v25                              ; 3E00331A
>	v_add_i32_e32 v25, vcc, s10, v29                        ; 4A323A0A
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v25                              ; 3E0A331A
>	v_add_i32_e32 v25, vcc, s9, v29                         ; 4A323A09
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v25                              ; 3E0C331A
>	v_add_i32_e32 v25, vcc, s8, v29                         ; 4A323A08
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v25                              ; 3E08331A
>	v_add_i32_e32 v25, vcc, s7, v29                         ; 4A323A07
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v26, v25                             ; 3E28331A
>	v_add_i32_e32 v25, vcc, s6, v29                         ; 4A323A06
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v26, v25                             ; 3E2A331A
>	v_add_i32_e32 v25, vcc, s5, v29                         ; 4A323A05
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v25                              ; 3E0E331A
>	v_add_i32_e32 v25, vcc, s4, v29                         ; 4A323A04
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	v_mac_f32_e32 v24, v26, v25                             ; 3E30331A
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v31                              ; 7E32111F
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0x70, v25                       ; 4A3432FF 00000070
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v27, v26                              ; 3E06351B
>	v_add_i32_e32 v26, vcc, 0x7c, v25                       ; 4A3432FF 0000007C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v10, v26                          ; 0A34350A
>	v_mac_f32_e32 v22, v27, v26                             ; 3E2C351B
>	v_add_i32_e32 v26, vcc, s11, v25                        ; 4A34320B
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v11, v26                          ; 0A34350B
>	v_mac_f32_e32 v23, v27, v26                             ; 3E2E351B
>	v_add_i32_e32 v26, vcc, 0x74, v25                       ; 4A3432FF 00000074
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v27, v26                              ; 3E02351B
>	v_add_i32_e32 v26, vcc, 0x78, v25                       ; 4A3432FF 00000078
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v27, v26                              ; 3E00351B
>	v_add_i32_e32 v26, vcc, s10, v25                        ; 4A34320A
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v27, v26                              ; 3E0A351B
>	v_add_i32_e32 v26, vcc, s9, v25                         ; 4A343209
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v27, v26                              ; 3E0C351B
>	v_add_i32_e32 v26, vcc, s8, v25                         ; 4A343208
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v27, v26                              ; 3E08351B
>	v_add_i32_e32 v26, vcc, s7, v25                         ; 4A343207
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v27, v26                             ; 3E28351B
>	v_add_i32_e32 v26, vcc, s6, v25                         ; 4A343206
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v27, v26                             ; 3E2A351B
>	v_add_i32_e32 v26, vcc, s5, v25                         ; 4A343205
>	v_add_i32_e32 v25, vcc, s4, v25                         ; 4A323204
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v27, v26                              ; 3E0E351B
>	v_mac_f32_e32 v24, v27, v25                             ; 3E30331B
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v32                              ; 7E321120
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0x70, v25                       ; 4A3432FF 00000070
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v28, v26                              ; 3E06351C
>	v_add_i32_e32 v26, vcc, 0x7c, v25                       ; 4A3432FF 0000007C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v10, v26                          ; 0A34350A
>	v_mac_f32_e32 v22, v28, v26                             ; 3E2C351C
>	v_add_i32_e32 v26, vcc, 0x8c, v25                       ; 4A3432FF 0000008C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v11, v26                          ; 0A34350B
>	v_mac_f32_e32 v23, v28, v26                             ; 3E2E351C
>	v_add_i32_e32 v26, vcc, 0x74, v25                       ; 4A3432FF 00000074
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v28, v26                              ; 3E02351C
>	v_add_i32_e32 v26, vcc, 0x78, v25                       ; 4A3432FF 00000078
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v28, v26                              ; 3E00351C
>	v_add_i32_e32 v26, vcc, 0x80, v25                       ; 4A3432FF 00000080
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v28, v26                              ; 3E0A351C
>	v_add_i32_e32 v26, vcc, 0x84, v25                       ; 4A3432FF 00000084
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v28, v26                              ; 3E0C351C
>	v_add_i32_e32 v26, vcc, 0x88, v25                       ; 4A3432FF 00000088
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v28, v26                              ; 3E08351C
>	v_add_i32_e32 v26, vcc, 0x90, v25                       ; 4A3432FF 00000090
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v28, v26                             ; 3E28351C
>	v_add_i32_e32 v26, vcc, 0x94, v25                       ; 4A3432FF 00000094
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v28, v26                             ; 3E2A351C
>	v_add_i32_e32 v26, vcc, 0x98, v25                       ; 4A3432FF 00000098
>	v_add_i32_e32 v25, vcc, 0x9c, v25                       ; 4A3232FF 0000009C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v28, v26                              ; 3E0E351C
>	v_mac_f32_e32 v24, v28, v25                             ; 3E30331C
>	v_mul_f32_e32 v25, v1, v13                              ; 10321B01
>	v_mac_f32_e32 v25, v3, v12                              ; 3E321903
>	v_mac_f32_e32 v25, v0, v14                              ; 3E321D00
>	v_mac_f32_e32 v25, v22, v15                             ; 3E321F16
>	v_mul_f32_e32 v22, v6, v13                              ; 102C1B06
>	v_mac_f32_e32 v22, v5, v12                              ; 3E2C1905
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_mac_f32_e32 v22, v4, v14                              ; 3E2C1D04
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mac_f32_e32 v22, v23, v15                             ; 3E2C1F17
>	v_mul_f32_e32 v23, v21, v13                             ; 102E1B15
>	v_mul_f32_e32 v13, 0, v13                               ; 101A1A80
>	v_mac_f32_e32 v23, v20, v12                             ; 3E2E1914
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_add_f32_e32 v16, v16, v16                             ; 06202110
>	v_mac_f32_e32 v23, v7, v14                              ; 3E2E1D07
>	v_mac_f32_e32 v13, 0, v14                               ; 3E1A1C80
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_mad_f32 v3, v16, v3, -v3                              ; D2820003 840E0710
>	v_add_f32_e32 v10, v10, v25                             ; 0614330A
>	v_mac_f32_e32 v23, v24, v15                             ; 3E2E1F18
>	v_add_f32_e32 v12, v15, v13                             ; 06181B0F
>	v_mac_f32_e32 v3, v1, v17                               ; 3E062301
>	v_mad_f32 v1, v16, v5, -v5                              ; D2820001 84160B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v5, s4, v10                               ; 100A1404
>	v_mul_f32_e32 v15, s5, v10                              ; 101E1405
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	v_mac_f32_e32 v1, v6, v17                               ; 3E022306
>	v_mad_f32 v6, v16, v20, -v20                            ; D2820006 84522910
>	v_mul_f32_e32 v16, s6, v10                              ; 10201406
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	v_add_f32_e32 v11, v11, v22                             ; 06162D0B
>	v_mac_f32_e32 v6, v21, v17                              ; 3E0C2315
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v17, s7, v10                              ; 10221407
>	v_mac_f32_e32 v5, s8, v11                               ; 3E0A1608
>	v_mac_f32_e32 v15, s4, v11                              ; 3E1E1604
>	v_mac_f32_e32 v16, s5, v11                              ; 3E201605
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mac_f32_e32 v17, s6, v11                              ; 3E221606
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	v_add_f32_e32 v14, v19, v23                             ; 061C2F13
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v5, s7, v14                               ; 3E0A1C07
>	v_mac_f32_e32 v15, s8, v14                              ; 3E1E1C08
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	v_mac_f32_e32 v16, s4, v14                              ; 3E201C04
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	v_mac_f32_e32 v17, s5, v14                              ; 3E221C05
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	s_buffer_load_dword s5, s[0:3], 0x14                    ; C2028114
>	v_mac_f32_e32 v5, s6, v12                               ; 3E0A1806
>	s_buffer_load_dword s6, s[0:3], 0x15                    ; C2030115
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v12                              ; 3E1E1807
>	v_mac_f32_e32 v16, s8, v12                              ; 3E201808
>	v_mac_f32_e32 v17, s4, v12                              ; 3E221804
>	v_mov_b32_e32 v12, s5                                   ; 7E180205
>	v_mac_f32_e32 v12, s6, v16                              ; 3E182006
>	v_add_f32_e64 v12, v12, 0 clamp                         ; D206080C 0001010C
>	s_buffer_load_dword s7, s[0:3], 0x16                    ; C2038116
>	v_log_f32_e32 v12, v12                                  ; 7E184F0C
>	s_buffer_load_dword s8, s[0:3], 0x17                    ; C2040117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	v_mad_f32 v13, 2.0, v18, -1.0                           ; D282000D 03CE24F4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v12, s7, v12                       ; 0E181807
>	v_exp_f32_e32 v12, v12                                  ; 7E184B0C
>	v_sub_f32_e64 v18, 1.0, s8                              ; D2080012 000010F2
>	v_mac_f32_e32 v3, v0, v13                               ; 3E061B00
>	v_mul_f32_e32 v0, s0, v17                               ; 10002200
>	v_mac_f32_e32 v18, s8, v12                              ; 3E241808
>	v_mac_f32_e32 v1, v4, v13                               ; 3E021B04
>	v_mul_f32_e32 v4, v18, v18                              ; 10082512
>	exp 15, 32, 0, 0, 0, v10, v11, v14, v0                  ; F800020F 000E0B0A
>	v_mac_f32_e32 v6, v7, v13                               ; 3E0C1B07
>	exp 15, 33, 0, 0, 0, v8, v9, v4, v0                     ; F800021F 00040908
>	exp 15, 34, 0, 0, 0, v3, v1, v6, v0                     ; F800022F 00060103
>	exp 15, 12, 0, 1, 0, v5, v15, v16, v17                  ; F80008CF 11100F05
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2020 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v6, v2, 0, 0, [m0]                          ; C8180002
>	v_interp_p2_f32 v6, [v6], v3, 0, 0, [m0]                    ; C8190003
>	v_interp_p1_f32 v12, v2, 1, 0, [m0]                         ; C8300102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	s_buffer_load_dword s12, s[0:3], 0x2                        ; C2060102
>	v_interp_p2_f32 v12, [v12], v3, 1, 0, [m0]                  ; C8310103
>	v_interp_p1_f32 v9, v2, 2, 0, [m0]                          ; C8240202
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v7, s8, v6                                    ; 080E0C08
>	v_interp_p2_f32 v9, [v9], v3, 2, 0, [m0]                    ; C8250203
>	v_sub_f32_e32 v8, s9, v12                                   ; 08101809
>	v_mul_f32_e32 v0, v7, v7                                    ; 10000F07
>	v_interp_p1_f32 v14, v4, 0, 2, [m0]                         ; C8380804
>	v_sub_f32_e32 v10, s12, v9                                  ; 0814120C
>	v_mac_f32_e32 v0, v8, v8                                    ; 3E001108
>	v_mac_f32_e32 v0, v10, v10                                  ; 3E00150A
>	v_interp_p2_f32 v14, [v14], v5, 0, 2, [m0]                  ; C8390805
>	v_interp_p1_f32 v15, v4, 1, 2, [m0]                         ; C83C0904
>	v_rsq_f32_e32 v11, v0                                       ; 7E165D00
>	v_interp_p2_f32 v15, [v15], v5, 1, 2, [m0]                  ; C83D0905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                          ; C8100A04
>	v_mul_f32_e32 v0, v14, v14                                  ; 10001D0E
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                    ; C8110A05
>	v_mac_f32_e32 v0, v15, v15                                  ; 3E001F0F
>	v_mac_f32_e32 v0, v4, v4                                    ; 3E000904
>	v_rsq_f32_e32 v5, v0                                        ; 7E0A5D00
>	v_mul_f32_e32 v16, v11, v7                                  ; 10200F0B
>	v_mul_f32_e32 v17, v11, v8                                  ; 1022110B
>	v_mul_f32_e32 v18, v11, v10                                 ; 1024150B
>	v_mul_f32_e32 v19, v5, v14                                  ; 10261D05
>	v_mul_f32_e32 v20, v5, v15                                  ; 10281F05
>	v_mul_f32_e32 v21, v16, v19                                 ; 102A2710
>	v_mul_f32_e32 v5, v5, v4                                    ; 100A0905
>	v_mac_f32_e32 v21, v17, v20                                 ; 3E2A2911
>	v_mac_f32_e32 v21, v18, v5                                  ; 3E2A0B12
>	v_mul_f32_e32 v4, v19, v21                                  ; 10082B13
>	v_mul_f32_e32 v14, v20, v21                                 ; 101C2B14
>	v_mac_f32_e32 v4, v19, v21                                  ; 3E082B13
>	v_mul_f32_e32 v15, v5, v21                                  ; 101E2B05
>	v_mac_f32_e32 v14, v20, v21                                 ; 3E1C2B14
>	v_mad_f32 v16, v7, v11, -v4                                 ; D2820010 84121707
>	v_mac_f32_e32 v15, v5, v21                                  ; 3E1E2B05
>	v_mad_f32 v17, v8, v11, -v14                                ; D2820011 843A1708
>	v_mul_f32_e32 v16, v19, v16                                 ; 10202113
>	v_mac_f32_e32 v16, v20, v17                                 ; 3E202314
>	v_mad_f32 v17, v10, v11, -v15                               ; D2820011 843E170A
>	s_load_dwordx4 s[20:23], s[4:5], 0x4c                       ; C08A054C
>	s_load_dwordx8 s[48:55], s[4:5], 0x40                       ; C0D80540
>	v_mac_f32_e32 v16, v5, v17                                  ; 3E202305
>	v_sub_f32_e32 v17, 1.0, v21                                 ; 08222AF2
>	v_add_f32_e32 v16, 1.0, v16                                 ; 062020F2
>	v_add_f32_e64 v17, v17, 0 clamp                             ; D2060811 00010111
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_subrev_f32_e32 v16, v17, v16                              ; 0A202111
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	v_add_f32_e64 v16, v16, 0 clamp                             ; D2060810 00010110
>	s_buffer_load_dword s13, s[0:3], 0x10                       ; C2068110
>	s_buffer_load_dword s16, s[0:3], 0x11                       ; C2080111
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	v_sub_f32_e32 v17, 1.0, v16                                 ; 082220F2
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s17, s[0:3], 0x16                       ; C2088116
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s20, s20, s55                                     ; 87143714
>	v_mad_f32 v22, -v16, v17, v17                               ; D2820016 24462310
>	image_sample v[17:18], v[0:1], s[48:55], s[20:23] dmask:0x6 ; F0800600 00AC1100
>	v_mad_f32 v23, -v7, v11, v4                                 ; D2820017 24121707
>	s_buffer_load_dword s12, s[0:3], 0x18                       ; C2060118
>	s_buffer_load_dword s18, s[0:3], 0x19                       ; C2090119
>	s_buffer_load_dword s19, s[0:3], 0x1a                       ; C209811A
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                       ; C08E051C
>	s_load_dwordx8 s[48:55], s[4:5], 0x10                       ; C0D80510
>	v_cubema_f32 v4, v19, v20, v5                               ; D28E0004 04162913
>	v_mov_b32_e32 v16, 0x403b800a                               ; 7E2002FF 403B800A
>	v_mad_f32 v25, -v10, v11, v15                               ; D2820019 243E170A
>	v_rcp_f32_e64 v10, |v4|                                     ; D354010A 00000104
>	s_buffer_load_dword s24, s[0:3], 0x1c                       ; C20C011C
>	s_buffer_load_dword s25, s[0:3], 0x1d                       ; C20C811D
>	s_buffer_load_dword s26, s[0:3], 0x1e                       ; C20D011E
>	v_mac_f32_e32 v6, v16, v19                                  ; 3E0C2710
>	v_mad_f32 v24, -v8, v11, v14                                ; D2820018 243A1708
>	v_mac_f32_e32 v9, v16, v5                                   ; 3E120B10
>	v_mad_f32 v16, v16, v20, v12                                ; D2820010 04322910
>	v_mul_f32_e32 v7, s13, v6                                   ; 100E0C0D
>	v_mul_f32_e32 v14, s16, v6                                  ; 101C0C10
>	v_mul_f32_e32 v6, s8, v6                                    ; 100C0C08
>	v_mac_f32_e32 v7, s9, v16                                   ; 3E0E2009
>	v_mac_f32_e32 v14, s11, v16                                 ; 3E1C200B
>	v_mac_f32_e32 v6, s17, v16                                  ; 3E0C2011
>	v_cubetc_f32 v8, v19, v20, v5                               ; D28C0008 04162913
>	v_cubesc_f32 v16, v19, v20, v5                              ; D28A0010 04162913
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v7, s12, v9                                   ; 3E0E120C
>	s_load_dwordx8 s[36:43], s[4:5], 0x0                        ; C0D20500
>	s_load_dwordx4 s[44:47], s[4:5], 0xc                        ; C096050C
>	v_mac_f32_e32 v14, s18, v9                                  ; 3E1C1212
>	v_mac_f32_e32 v6, s19, v9                                   ; 3E0C1213
>	v_mad_f32 v9, v10, v8, v4                                   ; D2820009 0412110A
>	v_mad_f32 v8, v10, v16, v4                                  ; D2820008 0412210A
>	v_mov_b32_e32 v11, 0x40c00000                               ; 7E1602FF 40C00000
>	s_and_b32 s28, s28, s55                                     ; 871C371C
>	v_cubeid_f32 v10, v19, v20, v5                              ; D288000A 04162913
>	v_add_f32_e32 v15, s24, v7                                  ; 061E0E18
>	v_add_f32_e32 v16, s25, v14                                 ; 06201C19
>	v_add_f32_e32 v14, s26, v6                                  ; 061C0C1A
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mad_f32 v7, -v18, v11, v11                                ; D2820007 242E1712
>	image_sample v[8:11], v[8:11], s[48:55], s[28:31] dmask:0xf ; F0800F00 00EC0808
>	s_load_dwordx4 s[12:15], s[4:5], 0x2c                       ; C086052C
>	s_load_dwordx4 s[16:19], s[4:5], 0x3c                       ; C088053C
>	s_load_dwordx8 s[20:27], s[4:5], 0x20                       ; C0CA0520
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	v_mul_f32_e32 v22, v22, v17                                 ; 102C2316
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s44, s44, s43                                     ; 872C2B2C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	s_buffer_load_dword s5, s[0:3], 0x4                         ; C2028104
>	s_buffer_load_dword s6, s[0:3], 0x5                         ; C2030105
>	s_buffer_load_dword s4, s[0:3], 0xe                         ; C202010E
>	s_buffer_load_dword s7, s[0:3], 0x6                         ; C2038106
>	s_buffer_load_dword s9, s[0:3], 0xc                         ; C204810C
>	s_buffer_load_dword s11, s[0:3], 0xd                        ; C205810D
>	image_sample_c v6, v[14:17], s[36:43], s[44:47] dmask:0x1   ; F0A00100 0169060E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v14, s5, v19                                  ; 101C2605
>	v_mad_f32 v14, -s6, v20, -v14                               ; D282000E A43A2806
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	v_mad_f32 v5, -s7, v5, v14                                  ; D2820005 243A0A07
>	v_mul_f32_e32 v14, s11, v6                                  ; 101C0C0B
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_mul_f32_e32 v11, s9, v6                                   ; 10160C09
>	v_mul_f32_e32 v6, s4, v6                                    ; 100C0C04
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v11, v17, v11                                 ; 10161711
>	v_mul_f32_e32 v14, v17, v14                                 ; 101C1D11
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_mul_f32_e32 v15, v6, v5                                   ; 101E0B06
>	v_mul_f32_e32 v11, v11, v5                                  ; 10160B0B
>	v_mul_f32_e32 v14, v14, v5                                  ; 101C0B0E
>	v_mul_f32_e32 v5, 4.0, v17                                  ; 100A22F6
>	v_mac_f32_e32 v11, v5, v8                                   ; 3E161105
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_cubema_f32 v17, v23, v24, v25                             ; D28E0011 04663117
>	v_log_f32_e32 v19, v8                                       ; 7E264F08
>	s_and_b32 s16, s16, s35                                     ; 87102310
>	v_mac_f32_e32 v14, v5, v9                                   ; 3E1C1305
>	v_mac_f32_e32 v15, v5, v10                                  ; 3E1E1505
>	image_sample v[8:10], v[0:1], s[28:35], s[16:19] dmask:0x7  ; F0800700 00870800
>	v_rcp_f32_e64 v1, |v17|                                     ; D3540101 00000111
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_cubetc_f32 v5, v23, v24, v25                              ; D28C0005 04663117
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v19                    ; 0E0026FF 40A00000
>	s_buffer_load_dword s8, s[0:3], 0x7                         ; C2040107
>	v_cubesc_f32 v16, v23, v24, v25                             ; D28A0010 04663117
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_cubeid_f32 v6, v23, v24, v25                              ; D2880006 04663117
>	v_max_f32_e32 v18, 0, v18                                   ; 20242480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s12, s12, s27                                     ; 870C1B0C
>	v_mac_f32_e32 v4, v1, v16                                   ; 3E082101
>	v_mul_f32_e32 v0, v18, v0                                   ; 10000112
>	image_sample_l v[4:6], v[4:7], s[20:27], s[12:15] dmask:0x7 ; F0900700 00650404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v22, v0                                   ; 100A0116
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s8, v0                                    ; 08000008
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v12                                ; 0A0C1804
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s8                                      ; 7E0C4808
>	v_sub_f32_e32 v6, s8, v6                                    ; 080C0C08
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v1, v22, v1                                   ; 10020316
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v22, v4                                   ; 10080916
>	v_mac_f32_e32 v1, v8, v11                                   ; 3E021708
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v14                                   ; 3E081D09
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v15                                  ; 3E0A1F0A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 28
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1092 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 9
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5].x, GENERIC[4]
>DCL CONST[0..226]
>DCL TEMP[0..9], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>  0: F2I TEMP[0], IN[4]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MAD TEMP[2], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  3: MOV TEMP[3].xyz, IMM[0].zzzz
>  4: MOV TEMP[3].w, CONST[4].xxxx
>  5: MOV TEMP[4].xyz, IMM[0].zzzz
>  6: MOV TEMP[4].w, CONST[4].yyyy
>  7: MOV TEMP[5].xyz, IMM[0].zzzz
>  8: MOV TEMP[5].w, CONST[4].zzzz
>  9: NOT TEMP[6].x, CONST[223].xxxx
> 10: UIF TEMP[6].xxxx :0
> 11:   ADD TEMP[6], CONST[7], -TEMP[3]
> 12:   ADD TEMP[7], CONST[8], -TEMP[4]
> 13:   ADD TEMP[8], CONST[9], -TEMP[5]
> 14: ELSE :0
> 15:   NOT TEMP[9].x, CONST[224].xxxx
> 16:   UIF TEMP[9].xxxx :0
> 17:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 18:     UARL ADDR[0].x, TEMP[9].xxxx
> 19:     UARL ADDR[0].x, TEMP[9].xxxx
> 20:     ADD TEMP[6], CONST[ADDR[0].x+7], -TEMP[3]
> 21:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 22:     UARL ADDR[0].x, TEMP[9].xxxx
> 23:     UARL ADDR[0].x, TEMP[9].xxxx
> 24:     ADD TEMP[7], CONST[ADDR[0].x+7], -TEMP[4]
> 25:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 26:     UARL ADDR[0].x, TEMP[9].xxxx
> 27:     UARL ADDR[0].x, TEMP[9].xxxx
> 28:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[5]
> 29:   ELSE :0
> 30:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 31:     UARL ADDR[0].x, TEMP[9].xxxx
> 32:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[3]
> 33:     MUL TEMP[6], TEMP[9], IN[3].xxxx
> 34:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 35:     UARL ADDR[0].x, TEMP[9].xxxx
> 36:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[4]
> 37:     MUL TEMP[7], TEMP[9], IN[3].xxxx
> 38:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 39:     UARL ADDR[0].x, TEMP[9].xxxx
> 40:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[5]
> 41:     MUL TEMP[8], TEMP[9], IN[3].xxxx
> 42:     UMUL TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx
> 43:     UARL ADDR[0].x, TEMP[9].xxxx
> 44:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[3]
> 45:     MAD TEMP[6], TEMP[9], IN[3].yyyy, TEMP[6]
> 46:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 47:     UARL ADDR[0].x, TEMP[9].xxxx
> 48:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[4]
> 49:     MAD TEMP[7], TEMP[9], IN[3].yyyy, TEMP[7]
> 50:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 51:     UARL ADDR[0].x, TEMP[9].xxxx
> 52:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[5]
> 53:     MAD TEMP[8], TEMP[9], IN[3].yyyy, TEMP[8]
> 54:     UIF CONST[225].xxxx :0
> 55:       UMUL TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx
> 56:       UARL ADDR[0].x, TEMP[9].xxxx
> 57:       ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[3]
> 58:       MAD TEMP[6], TEMP[9], IN[3].zzzz, TEMP[6]
> 59:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 60:       UARL ADDR[0].x, TEMP[9].xxxx
> 61:       ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[4]
> 62:       MAD TEMP[7], TEMP[9], IN[3].zzzz, TEMP[7]
> 63:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 64:       UARL ADDR[0].x, TEMP[9].xxxx
> 65:       ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[5]
> 66:       MAD TEMP[8], TEMP[9], IN[3].zzzz, TEMP[8]
> 67:     ENDIF
> 68:     UIF CONST[226].xxxx :0
> 69:       UMUL TEMP[9].x, TEMP[0].wwww, IMM[1].xxxx
> 70:       UARL ADDR[0].x, TEMP[9].xxxx
> 71:       ADD TEMP[3], CONST[ADDR[0].x+7], -TEMP[3]
> 72:       MAD TEMP[6], TEMP[3], IN[3].wwww, TEMP[6]
> 73:       UMAD TEMP[3].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 74:       UARL ADDR[0].x, TEMP[3].xxxx
> 75:       ADD TEMP[3], CONST[ADDR[0].x+7], -TEMP[4]
> 76:       MAD TEMP[7], TEMP[3], IN[3].wwww, TEMP[7]
> 77:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 78:       UARL ADDR[0].x, TEMP[0].xxxx
> 79:       ADD TEMP[0], CONST[ADDR[0].x+7], -TEMP[5]
> 80:       MAD TEMP[8], TEMP[0], IN[3].wwww, TEMP[8]
> 81:     ENDIF
> 82:   ENDIF
> 83: ENDIF
> 84: DP4 TEMP[0].x, IN[0], TEMP[6]
> 85: DP4 TEMP[3].x, IN[0], TEMP[7]
> 86: MOV TEMP[0].y, TEMP[3].xxxx
> 87: DP4 TEMP[3].x, IN[0], TEMP[8]
> 88: MOV TEMP[0].z, TEMP[3].xxxx
> 89: DP4 TEMP[3].x, IN[0], IMM[0].zzzw
> 90: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 91: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[6].xyzz
> 92: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[7].xyzz
> 93: MOV TEMP[4].y, TEMP[5].xxxx
> 94: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[8].xyzz
> 95: MOV TEMP[4].z, TEMP[1].xxxx
> 96: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[6].xyzz
> 97: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[7].xyzz
> 98: MOV TEMP[5].y, TEMP[6].xxxx
> 99: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[8].xyzz
>100: MOV TEMP[5].z, TEMP[6].xxxx
>101: MUL TEMP[6], CONST[0], TEMP[0].xxxx
>102: MAD TEMP[6], CONST[1], TEMP[0].yyyy, TEMP[6]
>103: MAD TEMP[6], CONST[2], TEMP[0].zzzz, TEMP[6]
>104: MAD TEMP[3], CONST[3], TEMP[3].xxxx, TEMP[6]
>105: MOV TEMP[0].xyz, TEMP[0].xyzx
>106: MUL TEMP[6].x, TEMP[3].wwww, CONST[6].wwww
>107: MOV TEMP[0].w, TEMP[6].xxxx
>108: MAD TEMP[6].x, TEMP[3].zzzz, CONST[5].yyyy, CONST[5].xxxx
>109: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>110: POW TEMP[6].x, TEMP[6].xxxx, CONST[5].zzzz
>111: ADD TEMP[7].x, IMM[0].wwww, -CONST[5].wwww
>112: MAD TEMP[6].x, CONST[5].wwww, TEMP[6].xxxx, TEMP[7].xxxx
>113: MUL TEMP[7].xyz, TEMP[4].zxyy, TEMP[5].yzxx
>114: MAD TEMP[7].xyz, TEMP[4].yzxx, TEMP[5].zxyy, -TEMP[7].xyzz
>115: MUL TEMP[2].xyz, TEMP[7].xyzz, TEMP[2].wwww
>116: MOV TEMP[5].xyz, TEMP[5].xyzx
>117: MOV TEMP[5].w, TEMP[2].xxxx
>118: MOV TEMP[2].xy, TEMP[2].yzyy
>119: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[6].xxxx
>120: MOV TEMP[6].z, TEMP[6].xxxx
>121: MOV TEMP[6].xy, IN[5].xyxx
>122: MOV TEMP[2].zw, TEMP[4].yyxy
>123: MOV OUT[1], TEMP[0]
>124: MOV OUT[4], TEMP[2]
>125: MOV OUT[0], TEMP[3]
>126: MOV OUT[3], TEMP[5]
>127: MOV OUT[2].xyz, TEMP[6].xyzx
>128: MOV OUT[5].x, TEMP[1].xxxx
>129: END
>radeonsi: Compiling shader 40
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %20 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, align 16, !invariant.load !0
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %21, i32 0, i32 %14)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %15)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = extractelement <4 x float> %29, i32 2
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %34, i32 0, i32 %16)
>  %36 = extractelement <4 x float> %35, i32 0
>  %37 = extractelement <4 x float> %35, i32 1
>  %38 = extractelement <4 x float> %35, i32 2
>  %39 = extractelement <4 x float> %35, i32 3
>  %40 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %41 = load <16 x i8>, <16 x i8> addrspace(2)* %40, align 16, !invariant.load !0
>  %42 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %41, i32 0, i32 %17)
>  %43 = extractelement <4 x float> %42, i32 0
>  %44 = extractelement <4 x float> %42, i32 1
>  %45 = extractelement <4 x float> %42, i32 2
>  %46 = extractelement <4 x float> %42, i32 3
>  %47 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %48 = load <16 x i8>, <16 x i8> addrspace(2)* %47, align 16, !invariant.load !0
>  %49 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %48, i32 0, i32 %18)
>  %50 = extractelement <4 x float> %49, i32 0
>  %51 = extractelement <4 x float> %49, i32 1
>  %52 = extractelement <4 x float> %49, i32 2
>  %53 = extractelement <4 x float> %49, i32 3
>  %54 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 5, !amdgpu.uniform !0
>  %55 = load <16 x i8>, <16 x i8> addrspace(2)* %54, align 16, !invariant.load !0
>  %56 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %55, i32 0, i32 %19)
>  %57 = extractelement <4 x float> %56, i32 0
>  %58 = extractelement <4 x float> %56, i32 1
>  %59 = fptosi float %50 to i32
>  %60 = fptosi float %51 to i32
>  %61 = fptosi float %52 to i32
>  %62 = fptosi float %53 to i32
>  %63 = fmul float %30, 2.000000e+00
>  %64 = fadd float %63, -1.000000e+00
>  %65 = fmul float %31, 2.000000e+00
>  %66 = fadd float %65, -1.000000e+00
>  %67 = fmul float %32, 2.000000e+00
>  %68 = fadd float %67, -1.000000e+00
>  %69 = fmul float %36, 2.000000e+00
>  %70 = fadd float %69, -1.000000e+00
>  %71 = fmul float %37, 2.000000e+00
>  %72 = fadd float %71, -1.000000e+00
>  %73 = fmul float %38, 2.000000e+00
>  %74 = fadd float %73, -1.000000e+00
>  %75 = fmul float %39, 2.000000e+00
>  %76 = fadd float %75, -1.000000e+00
>  %77 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %78 = load <16 x i8>, <16 x i8> addrspace(2)* %77, align 16, !invariant.load !0
>  %79 = call float @llvm.SI.load.const(<16 x i8> %78, i32 64)
>  %80 = call float @llvm.SI.load.const(<16 x i8> %78, i32 68)
>  %81 = call float @llvm.SI.load.const(<16 x i8> %78, i32 72)
>  %82 = call float @llvm.SI.load.const(<16 x i8> %78, i32 3568)
>  %83 = bitcast float %82 to i32
>  %84 = icmp eq i32 %83, -1
>  %85 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %86 = load <16 x i8>, <16 x i8> addrspace(2)* %85, align 16, !invariant.load !0
>  br i1 %84, label %else14, label %if10
>
>if10:                                             ; preds = %main_body
>  %87 = call float @llvm.SI.load.const(<16 x i8> %86, i32 112)
>  %88 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %89 = load <16 x i8>, <16 x i8> addrspace(2)* %88, align 16, !invariant.load !0
>  %90 = call float @llvm.SI.load.const(<16 x i8> %89, i32 116)
>  %91 = call float @llvm.SI.load.const(<16 x i8> %89, i32 120)
>  %92 = call float @llvm.SI.load.const(<16 x i8> %89, i32 124)
>  %93 = fsub float %92, %79
>  %94 = call float @llvm.SI.load.const(<16 x i8> %89, i32 128)
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = call float @llvm.SI.load.const(<16 x i8> %96, i32 132)
>  %98 = call float @llvm.SI.load.const(<16 x i8> %96, i32 136)
>  %99 = call float @llvm.SI.load.const(<16 x i8> %96, i32 140)
>  %100 = fsub float %99, %80
>  %101 = call float @llvm.SI.load.const(<16 x i8> %96, i32 144)
>  %102 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %103 = load <16 x i8>, <16 x i8> addrspace(2)* %102, align 16, !invariant.load !0
>  %104 = call float @llvm.SI.load.const(<16 x i8> %103, i32 148)
>  %105 = call float @llvm.SI.load.const(<16 x i8> %103, i32 152)
>  %106 = call float @llvm.SI.load.const(<16 x i8> %103, i32 156)
>  %107 = fsub float %106, %81
>  br label %endif83
>
>else14:                                           ; preds = %main_body
>  %108 = call float @llvm.SI.load.const(<16 x i8> %86, i32 3584)
>  %109 = bitcast float %108 to i32
>  %110 = icmp eq i32 %109, -1
>  %111 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %112 = load <16 x i8>, <16 x i8> addrspace(2)* %111, align 16, !invariant.load !0
>  %113 = mul i32 %59, 48
>  %114 = add i32 %113, 112
>  %115 = call float @llvm.SI.load.const(<16 x i8> %112, i32 %114)
>  %116 = mul i32 %59, 48
>  %117 = add i32 %116, 116
>  %118 = call float @llvm.SI.load.const(<16 x i8> %112, i32 %117)
>  %119 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %120 = load <16 x i8>, <16 x i8> addrspace(2)* %119, align 16, !invariant.load !0
>  %121 = mul i32 %59, 48
>  %122 = add i32 %121, 120
>  %123 = call float @llvm.SI.load.const(<16 x i8> %120, i32 %122)
>  %124 = mul i32 %59, 48
>  %125 = add i32 %124, 124
>  %126 = call float @llvm.SI.load.const(<16 x i8> %120, i32 %125)
>  %127 = fsub float %126, %79
>  br i1 %110, label %else29, label %if16
>
>if16:                                             ; preds = %else14
>  %128 = mul i32 %59, 3
>  %129 = add i32 %128, 1
>  %130 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %131 = load <16 x i8>, <16 x i8> addrspace(2)* %130, align 16, !invariant.load !0
>  %132 = shl i32 %129, 4
>  %133 = add i32 %132, 112
>  %134 = call float @llvm.SI.load.const(<16 x i8> %131, i32 %133)
>  %135 = shl i32 %129, 4
>  %136 = add i32 %135, 116
>  %137 = call float @llvm.SI.load.const(<16 x i8> %131, i32 %136)
>  %138 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %139 = load <16 x i8>, <16 x i8> addrspace(2)* %138, align 16, !invariant.load !0
>  %140 = shl i32 %129, 4
>  %141 = add i32 %140, 120
>  %142 = call float @llvm.SI.load.const(<16 x i8> %139, i32 %141)
>  %143 = shl i32 %129, 4
>  %144 = add i32 %143, 124
>  %145 = call float @llvm.SI.load.const(<16 x i8> %139, i32 %144)
>  %146 = fsub float %145, %80
>  %147 = mul i32 %59, 3
>  %148 = add i32 %147, 2
>  %149 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %150 = load <16 x i8>, <16 x i8> addrspace(2)* %149, align 16, !invariant.load !0
>  %151 = shl i32 %148, 4
>  %152 = add i32 %151, 112
>  %153 = call float @llvm.SI.load.const(<16 x i8> %150, i32 %152)
>  %154 = shl i32 %148, 4
>  %155 = add i32 %154, 116
>  %156 = call float @llvm.SI.load.const(<16 x i8> %150, i32 %155)
>  %157 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %158 = load <16 x i8>, <16 x i8> addrspace(2)* %157, align 16, !invariant.load !0
>  %159 = shl i32 %148, 4
>  %160 = add i32 %159, 120
>  %161 = call float @llvm.SI.load.const(<16 x i8> %158, i32 %160)
>  %162 = shl i32 %148, 4
>  %163 = add i32 %162, 124
>  %164 = call float @llvm.SI.load.const(<16 x i8> %158, i32 %163)
>  %165 = fsub float %164, %81
>  br label %endif83
>
>else29:                                           ; preds = %else14
>  %166 = fmul float %115, %43
>  %167 = fmul float %118, %43
>  %168 = fmul float %123, %43
>  %169 = fmul float %127, %43
>  %170 = mul i32 %59, 3
>  %171 = add i32 %170, 1
>  %172 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %173 = load <16 x i8>, <16 x i8> addrspace(2)* %172, align 16, !invariant.load !0
>  %174 = shl i32 %171, 4
>  %175 = add i32 %174, 112
>  %176 = call float @llvm.SI.load.const(<16 x i8> %173, i32 %175)
>  %177 = shl i32 %171, 4
>  %178 = add i32 %177, 116
>  %179 = call float @llvm.SI.load.const(<16 x i8> %173, i32 %178)
>  %180 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %181 = load <16 x i8>, <16 x i8> addrspace(2)* %180, align 16, !invariant.load !0
>  %182 = shl i32 %171, 4
>  %183 = add i32 %182, 120
>  %184 = call float @llvm.SI.load.const(<16 x i8> %181, i32 %183)
>  %185 = shl i32 %171, 4
>  %186 = add i32 %185, 124
>  %187 = call float @llvm.SI.load.const(<16 x i8> %181, i32 %186)
>  %188 = fsub float %187, %80
>  %189 = fmul float %176, %43
>  %190 = fmul float %179, %43
>  %191 = fmul float %184, %43
>  %192 = fmul float %188, %43
>  %193 = mul i32 %59, 3
>  %194 = add i32 %193, 2
>  %195 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %196 = load <16 x i8>, <16 x i8> addrspace(2)* %195, align 16, !invariant.load !0
>  %197 = shl i32 %194, 4
>  %198 = add i32 %197, 112
>  %199 = call float @llvm.SI.load.const(<16 x i8> %196, i32 %198)
>  %200 = shl i32 %194, 4
>  %201 = add i32 %200, 116
>  %202 = call float @llvm.SI.load.const(<16 x i8> %196, i32 %201)
>  %203 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %204 = load <16 x i8>, <16 x i8> addrspace(2)* %203, align 16, !invariant.load !0
>  %205 = shl i32 %194, 4
>  %206 = add i32 %205, 120
>  %207 = call float @llvm.SI.load.const(<16 x i8> %204, i32 %206)
>  %208 = shl i32 %194, 4
>  %209 = add i32 %208, 124
>  %210 = call float @llvm.SI.load.const(<16 x i8> %204, i32 %209)
>  %211 = fsub float %210, %81
>  %212 = fmul float %199, %43
>  %213 = fmul float %202, %43
>  %214 = fmul float %207, %43
>  %215 = fmul float %211, %43
>  %216 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %217 = load <16 x i8>, <16 x i8> addrspace(2)* %216, align 16, !invariant.load !0
>  %218 = mul i32 %60, 48
>  %219 = add i32 %218, 112
>  %220 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %219)
>  %221 = mul i32 %60, 48
>  %222 = add i32 %221, 116
>  %223 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %222)
>  %224 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %225 = load <16 x i8>, <16 x i8> addrspace(2)* %224, align 16, !invariant.load !0
>  %226 = mul i32 %60, 48
>  %227 = add i32 %226, 120
>  %228 = call float @llvm.SI.load.const(<16 x i8> %225, i32 %227)
>  %229 = mul i32 %60, 48
>  %230 = add i32 %229, 124
>  %231 = call float @llvm.SI.load.const(<16 x i8> %225, i32 %230)
>  %232 = fsub float %231, %79
>  %233 = fmul float %220, %44
>  %234 = fadd float %233, %166
>  %235 = fmul float %223, %44
>  %236 = fadd float %235, %167
>  %237 = fmul float %228, %44
>  %238 = fadd float %237, %168
>  %239 = fmul float %232, %44
>  %240 = fadd float %239, %169
>  %241 = mul i32 %60, 3
>  %242 = add i32 %241, 1
>  %243 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %244 = load <16 x i8>, <16 x i8> addrspace(2)* %243, align 16, !invariant.load !0
>  %245 = shl i32 %242, 4
>  %246 = add i32 %245, 112
>  %247 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %246)
>  %248 = shl i32 %242, 4
>  %249 = add i32 %248, 116
>  %250 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %249)
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = shl i32 %242, 4
>  %254 = add i32 %253, 120
>  %255 = call float @llvm.SI.load.const(<16 x i8> %252, i32 %254)
>  %256 = shl i32 %242, 4
>  %257 = add i32 %256, 124
>  %258 = call float @llvm.SI.load.const(<16 x i8> %252, i32 %257)
>  %259 = fsub float %258, %80
>  %260 = fmul float %247, %44
>  %261 = fadd float %260, %189
>  %262 = fmul float %250, %44
>  %263 = fadd float %262, %190
>  %264 = fmul float %255, %44
>  %265 = fadd float %264, %191
>  %266 = fmul float %259, %44
>  %267 = fadd float %266, %192
>  %268 = mul i32 %60, 3
>  %269 = add i32 %268, 2
>  %270 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %271 = load <16 x i8>, <16 x i8> addrspace(2)* %270, align 16, !invariant.load !0
>  %272 = shl i32 %269, 4
>  %273 = add i32 %272, 112
>  %274 = call float @llvm.SI.load.const(<16 x i8> %271, i32 %273)
>  %275 = shl i32 %269, 4
>  %276 = add i32 %275, 116
>  %277 = call float @llvm.SI.load.const(<16 x i8> %271, i32 %276)
>  %278 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %279 = load <16 x i8>, <16 x i8> addrspace(2)* %278, align 16, !invariant.load !0
>  %280 = shl i32 %269, 4
>  %281 = add i32 %280, 120
>  %282 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %281)
>  %283 = shl i32 %269, 4
>  %284 = add i32 %283, 124
>  %285 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %284)
>  %286 = fsub float %285, %81
>  %287 = fmul float %274, %44
>  %288 = fadd float %287, %212
>  %289 = fmul float %277, %44
>  %290 = fadd float %289, %213
>  %291 = fmul float %282, %44
>  %292 = fadd float %291, %214
>  %293 = fmul float %286, %44
>  %294 = fadd float %293, %215
>  %295 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %296 = load <16 x i8>, <16 x i8> addrspace(2)* %295, align 16, !invariant.load !0
>  %297 = call float @llvm.SI.load.const(<16 x i8> %296, i32 3600)
>  %298 = bitcast float %297 to i32
>  %299 = icmp eq i32 %298, 0
>  br i1 %299, label %endif67, label %if54
>
>if54:                                             ; preds = %else29
>  %300 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %301 = load <16 x i8>, <16 x i8> addrspace(2)* %300, align 16, !invariant.load !0
>  %302 = mul i32 %61, 48
>  %303 = add i32 %302, 112
>  %304 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %303)
>  %305 = mul i32 %61, 48
>  %306 = add i32 %305, 116
>  %307 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %306)
>  %308 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %309 = load <16 x i8>, <16 x i8> addrspace(2)* %308, align 16, !invariant.load !0
>  %310 = mul i32 %61, 48
>  %311 = add i32 %310, 120
>  %312 = call float @llvm.SI.load.const(<16 x i8> %309, i32 %311)
>  %313 = mul i32 %61, 48
>  %314 = add i32 %313, 124
>  %315 = call float @llvm.SI.load.const(<16 x i8> %309, i32 %314)
>  %316 = fsub float %315, %79
>  %317 = fmul float %304, %45
>  %318 = fadd float %317, %234
>  %319 = fmul float %307, %45
>  %320 = fadd float %319, %236
>  %321 = fmul float %312, %45
>  %322 = fadd float %321, %238
>  %323 = fmul float %316, %45
>  %324 = fadd float %323, %240
>  %325 = mul i32 %61, 3
>  %326 = add i32 %325, 1
>  %327 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %328 = load <16 x i8>, <16 x i8> addrspace(2)* %327, align 16, !invariant.load !0
>  %329 = shl i32 %326, 4
>  %330 = add i32 %329, 112
>  %331 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %330)
>  %332 = shl i32 %326, 4
>  %333 = add i32 %332, 116
>  %334 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %333)
>  %335 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %336 = load <16 x i8>, <16 x i8> addrspace(2)* %335, align 16, !invariant.load !0
>  %337 = shl i32 %326, 4
>  %338 = add i32 %337, 120
>  %339 = call float @llvm.SI.load.const(<16 x i8> %336, i32 %338)
>  %340 = shl i32 %326, 4
>  %341 = add i32 %340, 124
>  %342 = call float @llvm.SI.load.const(<16 x i8> %336, i32 %341)
>  %343 = fsub float %342, %80
>  %344 = fmul float %331, %45
>  %345 = fadd float %344, %261
>  %346 = fmul float %334, %45
>  %347 = fadd float %346, %263
>  %348 = fmul float %339, %45
>  %349 = fadd float %348, %265
>  %350 = fmul float %343, %45
>  %351 = fadd float %350, %267
>  %352 = mul i32 %61, 3
>  %353 = add i32 %352, 2
>  %354 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %355 = load <16 x i8>, <16 x i8> addrspace(2)* %354, align 16, !invariant.load !0
>  %356 = shl i32 %353, 4
>  %357 = add i32 %356, 112
>  %358 = call float @llvm.SI.load.const(<16 x i8> %355, i32 %357)
>  %359 = shl i32 %353, 4
>  %360 = add i32 %359, 116
>  %361 = call float @llvm.SI.load.const(<16 x i8> %355, i32 %360)
>  %362 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %363 = load <16 x i8>, <16 x i8> addrspace(2)* %362, align 16, !invariant.load !0
>  %364 = shl i32 %353, 4
>  %365 = add i32 %364, 120
>  %366 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %365)
>  %367 = shl i32 %353, 4
>  %368 = add i32 %367, 124
>  %369 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %368)
>  %370 = fsub float %369, %81
>  %371 = fmul float %358, %45
>  %372 = fadd float %371, %288
>  %373 = fmul float %361, %45
>  %374 = fadd float %373, %290
>  %375 = fmul float %366, %45
>  %376 = fadd float %375, %292
>  %377 = fmul float %370, %45
>  %378 = fadd float %377, %294
>  br label %endif67
>
>endif67:                                          ; preds = %else29, %if54
>  %.0101 = phi float [ %318, %if54 ], [ %234, %else29 ]
>  %.097 = phi float [ %320, %if54 ], [ %236, %else29 ]
>  %.093 = phi float [ %322, %if54 ], [ %238, %else29 ]
>  %.089 = phi float [ %324, %if54 ], [ %240, %else29 ]
>  %.085 = phi float [ %345, %if54 ], [ %261, %else29 ]
>  %.081 = phi float [ %347, %if54 ], [ %263, %else29 ]
>  %.077 = phi float [ %349, %if54 ], [ %265, %else29 ]
>  %.073 = phi float [ %351, %if54 ], [ %267, %else29 ]
>  %.069 = phi float [ %372, %if54 ], [ %288, %else29 ]
>  %.065 = phi float [ %374, %if54 ], [ %290, %else29 ]
>  %.061 = phi float [ %376, %if54 ], [ %292, %else29 ]
>  %.0 = phi float [ %378, %if54 ], [ %294, %else29 ]
>  %379 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %380 = load <16 x i8>, <16 x i8> addrspace(2)* %379, align 16, !invariant.load !0
>  %381 = call float @llvm.SI.load.const(<16 x i8> %380, i32 3616)
>  %382 = bitcast float %381 to i32
>  %383 = icmp eq i32 %382, 0
>  br i1 %383, label %endif83, label %if68
>
>if68:                                             ; preds = %endif67
>  %384 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %385 = load <16 x i8>, <16 x i8> addrspace(2)* %384, align 16, !invariant.load !0
>  %386 = mul i32 %62, 48
>  %387 = add i32 %386, 112
>  %388 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %387)
>  %389 = mul i32 %62, 48
>  %390 = add i32 %389, 116
>  %391 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %390)
>  %392 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %393 = load <16 x i8>, <16 x i8> addrspace(2)* %392, align 16, !invariant.load !0
>  %394 = mul i32 %62, 48
>  %395 = add i32 %394, 120
>  %396 = call float @llvm.SI.load.const(<16 x i8> %393, i32 %395)
>  %397 = mul i32 %62, 48
>  %398 = add i32 %397, 124
>  %399 = call float @llvm.SI.load.const(<16 x i8> %393, i32 %398)
>  %400 = fsub float %399, %79
>  %401 = fmul float %388, %46
>  %402 = fadd float %401, %.0101
>  %403 = fmul float %391, %46
>  %404 = fadd float %403, %.097
>  %405 = fmul float %396, %46
>  %406 = fadd float %405, %.093
>  %407 = fmul float %400, %46
>  %408 = fadd float %407, %.089
>  %409 = mul i32 %62, 3
>  %410 = add i32 %409, 1
>  %411 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %412 = load <16 x i8>, <16 x i8> addrspace(2)* %411, align 16, !invariant.load !0
>  %413 = shl i32 %410, 4
>  %414 = add i32 %413, 112
>  %415 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %414)
>  %416 = shl i32 %410, 4
>  %417 = add i32 %416, 116
>  %418 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %417)
>  %419 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %420 = load <16 x i8>, <16 x i8> addrspace(2)* %419, align 16, !invariant.load !0
>  %421 = shl i32 %410, 4
>  %422 = add i32 %421, 120
>  %423 = call float @llvm.SI.load.const(<16 x i8> %420, i32 %422)
>  %424 = shl i32 %410, 4
>  %425 = add i32 %424, 124
>  %426 = call float @llvm.SI.load.const(<16 x i8> %420, i32 %425)
>  %427 = fsub float %426, %80
>  %428 = fmul float %415, %46
>  %429 = fadd float %428, %.085
>  %430 = fmul float %418, %46
>  %431 = fadd float %430, %.081
>  %432 = fmul float %423, %46
>  %433 = fadd float %432, %.077
>  %434 = fmul float %427, %46
>  %435 = fadd float %434, %.073
>  %436 = mul i32 %62, 3
>  %437 = add i32 %436, 2
>  %438 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %439 = load <16 x i8>, <16 x i8> addrspace(2)* %438, align 16, !invariant.load !0
>  %440 = shl i32 %437, 4
>  %441 = add i32 %440, 112
>  %442 = call float @llvm.SI.load.const(<16 x i8> %439, i32 %441)
>  %443 = shl i32 %437, 4
>  %444 = add i32 %443, 116
>  %445 = call float @llvm.SI.load.const(<16 x i8> %439, i32 %444)
>  %446 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %447 = load <16 x i8>, <16 x i8> addrspace(2)* %446, align 16, !invariant.load !0
>  %448 = shl i32 %437, 4
>  %449 = add i32 %448, 120
>  %450 = call float @llvm.SI.load.const(<16 x i8> %447, i32 %449)
>  %451 = shl i32 %437, 4
>  %452 = add i32 %451, 124
>  %453 = call float @llvm.SI.load.const(<16 x i8> %447, i32 %452)
>  %454 = fsub float %453, %81
>  %455 = fmul float %442, %46
>  %456 = fadd float %455, %.069
>  %457 = fmul float %445, %46
>  %458 = fadd float %457, %.065
>  %459 = fmul float %450, %46
>  %460 = fadd float %459, %.061
>  %461 = fmul float %454, %46
>  %462 = fadd float %461, %.0
>  br label %endif83
>
>endif83:                                          ; preds = %endif67, %if16, %if68, %if10
>  %.3104 = phi float [ %87, %if10 ], [ %115, %if16 ], [ %402, %if68 ], [ %.0101, %endif67 ]
>  %.3100 = phi float [ %90, %if10 ], [ %118, %if16 ], [ %404, %if68 ], [ %.097, %endif67 ]
>  %.396 = phi float [ %91, %if10 ], [ %123, %if16 ], [ %406, %if68 ], [ %.093, %endif67 ]
>  %.392 = phi float [ %93, %if10 ], [ %127, %if16 ], [ %408, %if68 ], [ %.089, %endif67 ]
>  %.388 = phi float [ %94, %if10 ], [ %134, %if16 ], [ %429, %if68 ], [ %.085, %endif67 ]
>  %.384 = phi float [ %97, %if10 ], [ %137, %if16 ], [ %431, %if68 ], [ %.081, %endif67 ]
>  %.380 = phi float [ %98, %if10 ], [ %142, %if16 ], [ %433, %if68 ], [ %.077, %endif67 ]
>  %.376 = phi float [ %100, %if10 ], [ %146, %if16 ], [ %435, %if68 ], [ %.073, %endif67 ]
>  %.372 = phi float [ %101, %if10 ], [ %153, %if16 ], [ %456, %if68 ], [ %.069, %endif67 ]
>  %.368 = phi float [ %104, %if10 ], [ %156, %if16 ], [ %458, %if68 ], [ %.065, %endif67 ]
>  %.364 = phi float [ %105, %if10 ], [ %161, %if16 ], [ %460, %if68 ], [ %.061, %endif67 ]
>  %.3 = phi float [ %107, %if10 ], [ %165, %if16 ], [ %462, %if68 ], [ %.0, %endif67 ]
>  %463 = fmul float %23, %.3104
>  %464 = fmul float %24, %.3100
>  %465 = fadd float %463, %464
>  %466 = fmul float %25, %.396
>  %467 = fadd float %465, %466
>  %468 = fmul float %26, %.392
>  %469 = fadd float %467, %468
>  %470 = fmul float %23, %.388
>  %471 = fmul float %24, %.384
>  %472 = fadd float %470, %471
>  %473 = fmul float %25, %.380
>  %474 = fadd float %472, %473
>  %475 = fmul float %26, %.376
>  %476 = fadd float %474, %475
>  %477 = fmul float %23, %.372
>  %478 = fmul float %24, %.368
>  %479 = fadd float %477, %478
>  %480 = fmul float %25, %.364
>  %481 = fadd float %479, %480
>  %482 = fmul float %26, %.3
>  %483 = fadd float %481, %482
>  %484 = fmul float %23, 0.000000e+00
>  %485 = fmul float %24, 0.000000e+00
>  %486 = fadd float %484, %485
>  %487 = fmul float %25, 0.000000e+00
>  %488 = fadd float %486, %487
>  %489 = fadd float %488, %26
>  %490 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %491 = load <16 x i8>, <16 x i8> addrspace(2)* %490, align 16, !invariant.load !0
>  %492 = call float @llvm.SI.load.const(<16 x i8> %491, i32 64)
>  %493 = fadd float %469, %492
>  %494 = call float @llvm.SI.load.const(<16 x i8> %491, i32 68)
>  %495 = fadd float %476, %494
>  %496 = call float @llvm.SI.load.const(<16 x i8> %491, i32 72)
>  %497 = fadd float %483, %496
>  %498 = fmul float %64, %.3104
>  %499 = fmul float %66, %.3100
>  %500 = fadd float %499, %498
>  %501 = fmul float %68, %.396
>  %502 = fadd float %500, %501
>  %503 = fmul float %64, %.388
>  %504 = fmul float %66, %.384
>  %505 = fadd float %504, %503
>  %506 = fmul float %68, %.380
>  %507 = fadd float %505, %506
>  %508 = fmul float %64, %.372
>  %509 = fmul float %66, %.368
>  %510 = fadd float %509, %508
>  %511 = fmul float %68, %.364
>  %512 = fadd float %510, %511
>  %513 = fmul float %70, %.3104
>  %514 = fmul float %72, %.3100
>  %515 = fadd float %514, %513
>  %516 = fmul float %74, %.396
>  %517 = fadd float %515, %516
>  %518 = fmul float %70, %.388
>  %519 = fmul float %72, %.384
>  %520 = fadd float %519, %518
>  %521 = fmul float %74, %.380
>  %522 = fadd float %520, %521
>  %523 = fmul float %70, %.372
>  %524 = fmul float %72, %.368
>  %525 = fadd float %524, %523
>  %526 = fmul float %74, %.364
>  %527 = fadd float %525, %526
>  %528 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %529 = load <16 x i8>, <16 x i8> addrspace(2)* %528, align 16, !invariant.load !0
>  %530 = call float @llvm.SI.load.const(<16 x i8> %529, i32 0)
>  %531 = fmul float %530, %493
>  %532 = call float @llvm.SI.load.const(<16 x i8> %529, i32 4)
>  %533 = fmul float %532, %493
>  %534 = call float @llvm.SI.load.const(<16 x i8> %529, i32 8)
>  %535 = fmul float %534, %493
>  %536 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %537 = load <16 x i8>, <16 x i8> addrspace(2)* %536, align 16, !invariant.load !0
>  %538 = call float @llvm.SI.load.const(<16 x i8> %537, i32 12)
>  %539 = fmul float %538, %493
>  %540 = call float @llvm.SI.load.const(<16 x i8> %537, i32 16)
>  %541 = fmul float %540, %495
>  %542 = fadd float %541, %531
>  %543 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %544 = load <16 x i8>, <16 x i8> addrspace(2)* %543, align 16, !invariant.load !0
>  %545 = call float @llvm.SI.load.const(<16 x i8> %544, i32 20)
>  %546 = fmul float %545, %495
>  %547 = fadd float %546, %533
>  %548 = call float @llvm.SI.load.const(<16 x i8> %544, i32 24)
>  %549 = fmul float %548, %495
>  %550 = fadd float %549, %535
>  %551 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %552 = load <16 x i8>, <16 x i8> addrspace(2)* %551, align 16, !invariant.load !0
>  %553 = call float @llvm.SI.load.const(<16 x i8> %552, i32 28)
>  %554 = fmul float %553, %495
>  %555 = fadd float %554, %539
>  %556 = call float @llvm.SI.load.const(<16 x i8> %552, i32 32)
>  %557 = fmul float %556, %497
>  %558 = fadd float %557, %542
>  %559 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %560 = load <16 x i8>, <16 x i8> addrspace(2)* %559, align 16, !invariant.load !0
>  %561 = call float @llvm.SI.load.const(<16 x i8> %560, i32 36)
>  %562 = fmul float %561, %497
>  %563 = fadd float %562, %547
>  %564 = call float @llvm.SI.load.const(<16 x i8> %560, i32 40)
>  %565 = fmul float %564, %497
>  %566 = fadd float %565, %550
>  %567 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %568 = load <16 x i8>, <16 x i8> addrspace(2)* %567, align 16, !invariant.load !0
>  %569 = call float @llvm.SI.load.const(<16 x i8> %568, i32 44)
>  %570 = fmul float %569, %497
>  %571 = fadd float %570, %555
>  %572 = call float @llvm.SI.load.const(<16 x i8> %568, i32 48)
>  %573 = fmul float %572, %489
>  %574 = fadd float %573, %558
>  %575 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %576 = load <16 x i8>, <16 x i8> addrspace(2)* %575, align 16, !invariant.load !0
>  %577 = call float @llvm.SI.load.const(<16 x i8> %576, i32 52)
>  %578 = fmul float %577, %489
>  %579 = fadd float %578, %563
>  %580 = call float @llvm.SI.load.const(<16 x i8> %576, i32 56)
>  %581 = fmul float %580, %489
>  %582 = fadd float %581, %566
>  %583 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %584 = load <16 x i8>, <16 x i8> addrspace(2)* %583, align 16, !invariant.load !0
>  %585 = call float @llvm.SI.load.const(<16 x i8> %584, i32 60)
>  %586 = fmul float %585, %489
>  %587 = fadd float %586, %571
>  %588 = call float @llvm.SI.load.const(<16 x i8> %584, i32 108)
>  %589 = fmul float %587, %588
>  %590 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %591 = load <16 x i8>, <16 x i8> addrspace(2)* %590, align 16, !invariant.load !0
>  %592 = call float @llvm.SI.load.const(<16 x i8> %591, i32 84)
>  %593 = call float @llvm.SI.load.const(<16 x i8> %591, i32 80)
>  %594 = fmul float %582, %592
>  %595 = fadd float %594, %593
>  %596 = call float @llvm.AMDGPU.clamp.(float %595, float 0.000000e+00, float 1.000000e+00)
>  %597 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %598 = load <16 x i8>, <16 x i8> addrspace(2)* %597, align 16, !invariant.load !0
>  %599 = call float @llvm.SI.load.const(<16 x i8> %598, i32 88)
>  %600 = call float @llvm.pow.f32(float %596, float %599)
>  %601 = call float @llvm.SI.load.const(<16 x i8> %598, i32 92)
>  %602 = fsub float 1.000000e+00, %601
>  %603 = call float @llvm.SI.load.const(<16 x i8> %598, i32 92)
>  %604 = fmul float %603, %600
>  %605 = fadd float %604, %602
>  %606 = fmul float %512, %522
>  %607 = fmul float %502, %527
>  %608 = fmul float %507, %517
>  %609 = fmul float %507, %527
>  %610 = fsub float %609, %606
>  %611 = fmul float %512, %517
>  %612 = fsub float %611, %607
>  %613 = fmul float %502, %522
>  %614 = fsub float %613, %608
>  %615 = fmul float %610, %76
>  %616 = fmul float %612, %76
>  %617 = fmul float %614, %76
>  %618 = fmul float %605, %605
>  %619 = bitcast i32 %12 to float
>  %620 = insertvalue <{ float, float, float }> undef, float %619, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %493, float %495, float %497, float %589)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %57, float %58, float %618, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %517, float %522, float %527, float %615)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %616, float %617, float %502, float %507)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %512, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %574, float %579, float %582, float %587)
>  ret <{ float, float, float }> %620
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4].x, GENERIC[4], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL CONST[0..7]
>DCL TEMP[0..9], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     6.0000,     4.0000,     5.0000}
>IMM[2] FLT32 {    0.0000,     0.0010,     8.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwzz
>  3: MOV TEMP[1].z, IN[4].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[5], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[4], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[2].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
> 23: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, IMM[0].xxxx, TEMP[4].xyzz
> 26: ADD TEMP[4].xyz, TEMP[2].xyzz, -TEMP[4].xyzz
> 27: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 28: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].wwww
> 29: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[1].xyzz
> 30: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 31: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 32: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 33: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 34: ADD TEMP[4].x, IMM[0].wwww, -TEMP[4].xxxx
> 35: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 36: MUL TEMP[4].x, TEMP[3].yyyy, TEMP[4].xxxx
> 37: MAD TEMP[1].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 38: MUL TEMP[5], CONST[4], TEMP[1].xxxx
> 39: MAD TEMP[5], CONST[5], TEMP[1].yyyy, TEMP[5]
> 40: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[5]
> 41: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 42: MOV TEMP[5].xyz, TEMP[0].xyzz
> 43: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 44: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[2].xyzz
> 45: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[0].xyzz
> 46: MAD TEMP[6].xyz, IMM[0].xxxx, TEMP[6].xyzz, -TEMP[2].xyzz
> 47: ADD TEMP[7].x, IMM[0].wwww, -TEMP[3].zzzz
> 48: MUL TEMP[7].x, TEMP[7].xxxx, IMM[1].yyyy
> 49: MOV TEMP[8].xy, TEMP[1].xyyy
> 50: MOV TEMP[8].w, IMM[0].wwww
> 51: MOV TEMP[8].z, TEMP[1].zzzz
> 52: TXP TEMP[1].x, TEMP[8], SAMP[0], SHADOW2D
> 53: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 54: MUL TEMP[8].x, IMM[1].zzzz, TEMP[3].yyyy
> 55: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[0].xyzz
> 56: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 57: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 58: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 59: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 60: MUL TEMP[1].xyz, TEMP[9].xxxx, TEMP[1].xyzz
> 61: MAD TEMP[1].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[1].xyzz
> 62: MOV TEMP[5].xy, IN[1].xyyy
> 63: TEX TEMP[5].xyz, TEMP[5], SAMP[3], 2D
> 64: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
> 65: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 66: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
> 67: POW TEMP[0].x, TEMP[0].xxxx, IMM[1].wwww
> 68: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[2].xxxx
> 69: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
> 70: MOV TEMP[2].xyz, TEMP[6].xyzz
> 71: MOV TEMP[2].w, TEMP[7].xxxx
> 72: TXL TEMP[2].xyz, TEMP[2], SAMP[2], CUBE
> 73: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 74: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].xxxx
> 75: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xyzz, TEMP[0].xyzz
> 76: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
> 77: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].xxxx
> 78: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
> 79: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].yyyy
> 80: RCP TEMP[2].x, TEMP[2].xxxx
> 81: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 82: FRC TEMP[2].x, CONST[1].wwww
> 83: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].zzzz
> 84: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 85: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 86: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
> 87: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
> 88: MOV TEMP[0].w, IN[0].wwww
> 89: MOV OUT[0], TEMP[0]
> 90: END
>radeonsi: Compiling shader 41
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 23, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 19, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fmul float %132, 2.000000e+00
>  %136 = fmul float %133, 2.000000e+00
>  %137 = fsub float %49, %134
>  %138 = fsub float %50, %135
>  %139 = fsub float %51, %136
>  %140 = fmul float %137, %59
>  %141 = fmul float %138, %60
>  %142 = fadd float %141, %140
>  %143 = fmul float %139, %61
>  %144 = fadd float %142, %143
>  %145 = fadd float %144, 1.000000e+00
>  %146 = fmul float %49, %59
>  %147 = fmul float %50, %60
>  %148 = fadd float %147, %146
>  %149 = fmul float %51, %61
>  %150 = fadd float %148, %149
>  %151 = fsub float 1.000000e+00, %150
>  %152 = call float @llvm.AMDGPU.clamp.(float %151, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float %145, %152
>  %154 = call float @llvm.AMDGPU.clamp.(float %153, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = fmul float %155, %155
>  %157 = fmul float %78, %156
>  %158 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %159 = fmul float %59, 0x4007700140000000
>  %160 = fadd float %159, %158
>  %161 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %162 = fmul float %60, 0x4007700140000000
>  %163 = fadd float %162, %161
>  %164 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %165 = fmul float %61, 0x4007700140000000
>  %166 = fadd float %165, %164
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 64)
>  %170 = fmul float %169, %160
>  %171 = call float @llvm.SI.load.const(<16 x i8> %168, i32 68)
>  %172 = fmul float %171, %160
>  %173 = call float @llvm.SI.load.const(<16 x i8> %168, i32 72)
>  %174 = fmul float %173, %160
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 80)
>  %178 = fmul float %177, %163
>  %179 = fadd float %178, %170
>  %180 = call float @llvm.SI.load.const(<16 x i8> %176, i32 84)
>  %181 = fmul float %180, %163
>  %182 = fadd float %181, %172
>  %183 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %184 = load <16 x i8>, <16 x i8> addrspace(2)* %183, align 16, !invariant.load !0
>  %185 = call float @llvm.SI.load.const(<16 x i8> %184, i32 88)
>  %186 = fmul float %185, %163
>  %187 = fadd float %186, %174
>  %188 = call float @llvm.SI.load.const(<16 x i8> %184, i32 96)
>  %189 = fmul float %188, %166
>  %190 = fadd float %189, %179
>  %191 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %192 = load <16 x i8>, <16 x i8> addrspace(2)* %191, align 16, !invariant.load !0
>  %193 = call float @llvm.SI.load.const(<16 x i8> %192, i32 100)
>  %194 = fmul float %193, %166
>  %195 = fadd float %194, %182
>  %196 = call float @llvm.SI.load.const(<16 x i8> %192, i32 104)
>  %197 = fmul float %196, %166
>  %198 = fadd float %197, %187
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 112)
>  %202 = fadd float %190, %201
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 116)
>  %204 = fadd float %195, %203
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 120)
>  %206 = fadd float %198, %205
>  %207 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %208 = load <8 x i32>, <8 x i32> addrspace(2)* %207, align 32, !invariant.load !0
>  %209 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %210 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %209, i64 0, i64 7, !amdgpu.uniform !0
>  %211 = load <4 x i32>, <4 x i32> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = extractelement <8 x i32> %208, i32 7
>  %213 = extractelement <4 x i32> %211, i32 0
>  %214 = and i32 %213, %212
>  %215 = insertelement <4 x i32> %211, i32 %214, i32 0
>  %216 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %217 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %218 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %219 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %220 = call float @llvm.fabs.f32(float %218)
>  %221 = fdiv float 1.000000e+00, %220, !fpmath !1
>  %222 = fmul float %216, %221
>  %223 = fadd float %222, 1.500000e+00
>  %224 = fmul float %217, %221
>  %225 = fadd float %224, 1.500000e+00
>  %226 = bitcast float %225 to i32
>  %227 = bitcast float %223 to i32
>  %228 = bitcast float %219 to i32
>  %229 = insertelement <4 x i32> undef, i32 %226, i32 0
>  %230 = insertelement <4 x i32> %229, i32 %227, i32 1
>  %231 = insertelement <4 x i32> %230, i32 %228, i32 2
>  %232 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %231, <8 x i32> %208, <4 x i32> %215, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %233 = extractelement <4 x float> %232, i32 0
>  %234 = extractelement <4 x float> %232, i32 1
>  %235 = extractelement <4 x float> %232, i32 2
>  %236 = extractelement <4 x float> %232, i32 3
>  %237 = fmul float %121, %49
>  %238 = fmul float %123, %50
>  %239 = fadd float %238, %237
>  %240 = fmul float %125, %51
>  %241 = fadd float %239, %240
>  %242 = fmul float %241, %121
>  %243 = fmul float %241, %123
>  %244 = fmul float %241, %125
>  %245 = fmul float %242, 2.000000e+00
>  %246 = fsub float %245, %49
>  %247 = fmul float %243, 2.000000e+00
>  %248 = fsub float %247, %50
>  %249 = fmul float %244, 2.000000e+00
>  %250 = fsub float %249, %51
>  %251 = fsub float 1.000000e+00, %79
>  %252 = fmul float %251, 6.000000e+00
>  %253 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <8 x i32>, <8 x i32> addrspace(2)* %253, align 32, !invariant.load !0
>  %255 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %256 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %255, i64 0, i64 3, !amdgpu.uniform !0
>  %257 = load <4 x i32>, <4 x i32> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = extractelement <8 x i32> %254, i32 7
>  %259 = extractelement <4 x i32> %257, i32 0
>  %260 = and i32 %259, %258
>  %261 = insertelement <4 x i32> %257, i32 %260, i32 0
>  %262 = bitcast float %206 to i32
>  %263 = bitcast float %202 to i32
>  %264 = bitcast float %204 to i32
>  %265 = insertelement <4 x i32> undef, i32 %262, i32 0
>  %266 = insertelement <4 x i32> %265, i32 %263, i32 1
>  %267 = insertelement <4 x i32> %266, i32 %264, i32 2
>  %268 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %267, <8 x i32> %254, <4 x i32> %261, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %269 = extractelement <4 x float> %268, i32 0
>  %270 = fmul float %233, %236
>  %271 = fmul float %234, %236
>  %272 = fmul float %235, %236
>  %273 = fmul float %78, 4.000000e+00
>  %274 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %275 = load <16 x i8>, <16 x i8> addrspace(2)* %274, align 16, !invariant.load !0
>  %276 = call float @llvm.SI.load.const(<16 x i8> %275, i32 16)
>  %277 = call float @llvm.SI.load.const(<16 x i8> %275, i32 20)
>  %278 = call float @llvm.SI.load.const(<16 x i8> %275, i32 24)
>  %279 = fmul float %276, %121
>  %280 = fsub float -0.000000e+00, %279
>  %281 = fmul float %277, %123
>  %282 = fsub float %280, %281
>  %283 = fmul float %278, %125
>  %284 = fsub float %282, %283
>  %285 = call float @llvm.AMDGPU.clamp.(float %284, float 0.000000e+00, float 1.000000e+00)
>  %286 = fmul float %269, %269
>  %287 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %288 = load <16 x i8>, <16 x i8> addrspace(2)* %287, align 16, !invariant.load !0
>  %289 = call float @llvm.SI.load.const(<16 x i8> %288, i32 48)
>  %290 = fmul float %289, %286
>  %291 = call float @llvm.SI.load.const(<16 x i8> %288, i32 52)
>  %292 = fmul float %291, %286
>  %293 = call float @llvm.SI.load.const(<16 x i8> %288, i32 56)
>  %294 = fmul float %293, %286
>  %295 = fmul float %290, %78
>  %296 = fmul float %292, %78
>  %297 = fmul float %294, %78
>  %298 = fmul float %285, %295
>  %299 = fmul float %285, %296
>  %300 = fmul float %285, %297
>  %301 = fmul float %270, %273
>  %302 = fadd float %301, %298
>  %303 = fmul float %271, %273
>  %304 = fadd float %303, %299
>  %305 = fmul float %272, %273
>  %306 = fadd float %305, %300
>  %307 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %308 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %309 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %310 = load <8 x i32>, <8 x i32> addrspace(2)* %309, align 32, !invariant.load !0
>  %311 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %312 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %311, i64 0, i64 15, !amdgpu.uniform !0
>  %313 = load <4 x i32>, <4 x i32> addrspace(2)* %312, align 16, !invariant.load !0
>  %314 = extractelement <8 x i32> %310, i32 7
>  %315 = extractelement <4 x i32> %313, i32 0
>  %316 = and i32 %315, %314
>  %317 = insertelement <4 x i32> %313, i32 %316, i32 0
>  %318 = bitcast float %307 to i32
>  %319 = bitcast float %308 to i32
>  %320 = insertelement <2 x i32> undef, i32 %318, i32 0
>  %321 = insertelement <2 x i32> %320, i32 %319, i32 1
>  %322 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %321, <8 x i32> %310, <4 x i32> %317, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %323 = extractelement <4 x float> %322, i32 0
>  %324 = extractelement <4 x float> %322, i32 1
>  %325 = extractelement <4 x float> %322, i32 2
>  %326 = fmul float %49, %121
>  %327 = fmul float %50, %123
>  %328 = fadd float %327, %326
>  %329 = fmul float %51, %125
>  %330 = fadd float %328, %329
>  %331 = call float @llvm.AMDGPU.clamp.(float %330, float 0.000000e+00, float 1.000000e+00)
>  %332 = fsub float 1.000000e+00, %331
>  %333 = call float @llvm.pow.f32(float %332, float 5.000000e+00)
>  %334 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %335 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %336 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %337 = fmul float %333, %334
>  %338 = fmul float %333, %335
>  %339 = fmul float %333, %336
>  %340 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %341 = load <8 x i32>, <8 x i32> addrspace(2)* %340, align 32, !invariant.load !0
>  %342 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %343 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %342, i64 0, i64 11, !amdgpu.uniform !0
>  %344 = load <4 x i32>, <4 x i32> addrspace(2)* %343, align 16, !invariant.load !0
>  %345 = extractelement <8 x i32> %341, i32 7
>  %346 = extractelement <4 x i32> %344, i32 0
>  %347 = and i32 %346, %345
>  %348 = insertelement <4 x i32> %344, i32 %347, i32 0
>  %349 = call float @llvm.amdgcn.cubetc(float %246, float %248, float %250)
>  %350 = call float @llvm.amdgcn.cubesc(float %246, float %248, float %250)
>  %351 = call float @llvm.amdgcn.cubema(float %246, float %248, float %250)
>  %352 = call float @llvm.amdgcn.cubeid(float %246, float %248, float %250)
>  %353 = call float @llvm.fabs.f32(float %351)
>  %354 = fdiv float 1.000000e+00, %353, !fpmath !1
>  %355 = fmul float %349, %354
>  %356 = fadd float %355, 1.500000e+00
>  %357 = fmul float %350, %354
>  %358 = fadd float %357, 1.500000e+00
>  %359 = bitcast float %358 to i32
>  %360 = bitcast float %356 to i32
>  %361 = bitcast float %352 to i32
>  %362 = bitcast float %252 to i32
>  %363 = insertelement <4 x i32> undef, i32 %359, i32 0
>  %364 = insertelement <4 x i32> %363, i32 %360, i32 1
>  %365 = insertelement <4 x i32> %364, i32 %361, i32 2
>  %366 = insertelement <4 x i32> %365, i32 %362, i32 3
>  %367 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %366, <8 x i32> %341, <4 x i32> %348, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %368 = extractelement <4 x float> %367, i32 0
>  %369 = extractelement <4 x float> %367, i32 1
>  %370 = extractelement <4 x float> %367, i32 2
>  %371 = fmul float %337, %368
>  %372 = fmul float %338, %369
>  %373 = fmul float %339, %370
>  %374 = fmul float %371, %157
>  %375 = fmul float %372, %157
>  %376 = fmul float %373, %157
>  %377 = fmul float %302, %323
>  %378 = fadd float %377, %374
>  %379 = fmul float %304, %324
>  %380 = fadd float %379, %375
>  %381 = fmul float %306, %325
>  %382 = fadd float %381, %376
>  %383 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %384 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %385 = load <16 x i8>, <16 x i8> addrspace(2)* %384, align 16, !invariant.load !0
>  %386 = call float @llvm.SI.load.const(<16 x i8> %385, i32 12)
>  %387 = fsub float %383, %386
>  %388 = call float @llvm.maxnum.f32(float %387, float 0.000000e+00)
>  %389 = call float @llvm.SI.load.const(<16 x i8> %385, i32 28)
>  %390 = call float @llvm.SI.load.const(<16 x i8> %385, i32 12)
>  %391 = fsub float %389, %390
>  %392 = fadd float %391, 0x3F50624DE0000000
>  %393 = fdiv float 1.000000e+00, %392, !fpmath !1
>  %394 = fmul float %388, %393
>  %395 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %396 = load <16 x i8>, <16 x i8> addrspace(2)* %395, align 16, !invariant.load !0
>  %397 = call float @llvm.SI.load.const(<16 x i8> %396, i32 28)
>  %398 = call float @llvm.floor.f32(float %397)
>  %399 = fsub float %397, %398
>  %400 = fmul float %399, 8.000000e+00
>  %401 = call float @llvm.pow.f32(float %394, float %400)
>  %402 = call float @llvm.AMDGPU.clamp.(float %401, float 0.000000e+00, float 1.000000e+00)
>  %403 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %404 = fmul float %403, %402
>  %405 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %406 = load <16 x i8>, <16 x i8> addrspace(2)* %405, align 16, !invariant.load !0
>  %407 = call float @llvm.SI.load.const(<16 x i8> %406, i32 32)
>  %408 = fsub float 1.000000e+00, %404
>  %409 = fmul float %378, %404
>  %410 = fmul float %407, %408
>  %411 = fadd float %409, %410
>  %412 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %413 = load <16 x i8>, <16 x i8> addrspace(2)* %412, align 16, !invariant.load !0
>  %414 = call float @llvm.SI.load.const(<16 x i8> %413, i32 36)
>  %415 = fsub float 1.000000e+00, %404
>  %416 = fmul float %380, %404
>  %417 = fmul float %414, %415
>  %418 = fadd float %416, %417
>  %419 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %420 = load <16 x i8>, <16 x i8> addrspace(2)* %419, align 16, !invariant.load !0
>  %421 = call float @llvm.SI.load.const(<16 x i8> %420, i32 40)
>  %422 = fsub float 1.000000e+00, %404
>  %423 = fmul float %382, %404
>  %424 = fmul float %421, %422
>  %425 = fadd float %423, %424
>  %426 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %427 = bitcast float %5 to i32
>  %428 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %427, 10
>  %429 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %428, float %411, 11
>  %430 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %429, float %418, 12
>  %431 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %430, float %425, 13
>  %432 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %431, float %426, 14
>  %433 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %432, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %433
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>radeonsi: Compiling shader 42
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %43, float %45, 20
>  %47 = add i32 %16, %12
>  %48 = bitcast i32 %47 to float
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %46, float %48, 21
>  %50 = add i32 %16, %12
>  %51 = bitcast i32 %50 to float
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %49, float %51, 22
>  %53 = add i32 %16, %12
>  %54 = bitcast i32 %53 to float
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %52, float %54, 23
>  %56 = add i32 %16, %12
>  %57 = bitcast i32 %56 to float
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %55, float %57, 24
>  %59 = add i32 %16, %12
>  %60 = bitcast i32 %59 to float
>  %61 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %58, float %60, 25
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float }> %61
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[10:13], v4, s[4:7], 0 idxen   ; E00C2000 80010A04
>	buffer_load_format_xyzw v[19:22], v5, s[12:15], 0 idxen ; E00C2000 80031305
>	buffer_load_format_xyzw v[15:18], v6, s[16:19], 0 idxen ; E00C2000 80040F06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s4                                    ; 7E000204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s4                                    ; 7E100204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	v_sub_f32_e32 v23, s7, v0                               ; 082E0007
>	v_mov_b32_e32 v7, s8                                    ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s4                                    ; 7E120204
>	v_mov_b32_e32 v22, s5                                   ; 7E2C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v27, s6, v1                               ; 08360206
>	v_mov_b32_e32 v24, s7                                   ; 7E300207
>	v_mov_b32_e32 v25, s8                                   ; 7E320208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v26, s4                                   ; 7E340204
>	v_sub_f32_e32 v28, s5, v14                              ; 08381C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[4:7], 0 idxen   ; E00C2000 80012108
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v5, v33                               ; 7E0A1121
>	v_mul_lo_i32 v26, v5, 48                                ; D2D6001A 00016105
>	v_add_i32_e32 v5, vcc, s14, v26                         ; 4A0A340E
>	v_add_i32_e32 v9, vcc, s13, v26                         ; 4A12340D
>	v_add_i32_e32 v22, vcc, s15, v26                        ; 4A2C340F
>	v_add_i32_e32 v6, vcc, s12, v26                         ; 4A0C340C
>	buffer_load_dword v8, v5, s[0:3], 0 offen               ; E0301000 80000805
>	buffer_load_dword v5, v9, s[0:3], 0 offen               ; E0301000 80000509
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v0, v9                            ; 0A2E1300
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v9, vcc, 0x8c, v26                        ; 4A1234FF 0000008C
>	v_add_i32_e32 v27, vcc, 0x9c, v26                       ; 4A3634FF 0000009C
>	v_add_i32_e32 v22, vcc, 0x84, v26                       ; 4A2C34FF 00000084
>	v_add_i32_e32 v24, vcc, 0x88, v26                       ; 4A3034FF 00000088
>	v_add_i32_e32 v7, vcc, 0x80, v26                        ; 4A0E34FF 00000080
>	v_add_i32_e32 v25, vcc, 0x94, v26                       ; 4A3234FF 00000094
>	buffer_load_dword v28, v9, s[0:3], 0 offen              ; E0301000 80001C09
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v22, v24, s[0:3], 0 offen             ; E0301000 80001618
>	v_add_i32_e32 v24, vcc, 0x90, v26                       ; 4A3034FF 00000090
>	v_add_i32_e32 v26, vcc, 0x98, v26                       ; 4A3434FF 00000098
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v1, v28                           ; 0A363901
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v28, v14, v29                          ; 0A383B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	v_cvt_i32_f32_e32 v7, v34                               ; 7E0E1122
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v9, vcc, s10, v26                         ; 4A12340A
>	v_add_i32_e32 v22, vcc, s9, v26                         ; 4A2C3409
>	v_add_i32_e32 v24, vcc, s8, v26                         ; 4A303408
>	v_add_i32_e32 v25, vcc, s4, v26                         ; 4A323404
>	v_mul_lo_i32 v33, v7, 48                                ; D2D60021 00016107
>	v_add_i32_e32 v7, vcc, s11, v26                         ; 4A0E340B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v28, vcc, s6, v26                         ; 4A383406
>	buffer_load_dword v27, v7, s[0:3], 0 offen              ; E0301000 80001B07
>	v_add_i32_e32 v7, vcc, s7, v26                          ; 4A0E3407
>	v_add_i32_e32 v26, vcc, s5, v26                         ; 4A343405
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	buffer_load_dword v34, v7, s[0:3], 0 offen              ; E0301000 80002207
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	v_mul_f32_e32 v6, v29, v6                               ; 100C0D1D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v23, v29, v23                             ; 102E2F1D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v14, v25                          ; 0A4A330E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v9, v29, v22                              ; 10122D1D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v22, v29, v24                             ; 102C311D
>	v_subrev_f32_e32 v24, v1, v27                           ; 0A303701
>	v_mul_f32_e32 v27, v29, v24                             ; 1036311D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v25, v29, v28                             ; 1032391D
>	v_mul_f32_e32 v24, v29, v34                             ; 1030451D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v0, v29                           ; 0A3A3B00
>	v_mac_f32_e32 v23, v30, v29                             ; 3E2E3B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v1, v29                           ; 0A3A3B01
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v30, v29                             ; 3E2C3B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v30, v29                             ; 3E303B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v30, v29                             ; 3E323B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s4, v33                         ; 4A3A4204
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v31, v30                             ; 3E2E3D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v31, v30                             ; 3E2C3D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v31, v30                             ; 3E303D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v31, v30                             ; 3E323D1F
>	v_add_i32_e32 v30, vcc, s5, v29                         ; 4A3C3A05
>	v_add_i32_e32 v29, vcc, s4, v29                         ; 4A3A3A04
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v32, v30                             ; 3E2E3D20
>	v_add_i32_e32 v30, vcc, 0x8c, v29                       ; 4A3C3AFF 0000008C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0x80, v29                       ; 4A3C3AFF 00000080
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0x84, v29                       ; 4A3C3AFF 00000084
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0x88, v29                       ; 4A3C3AFF 00000088
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v32, v30                             ; 3E2C3D20
>	v_add_i32_e32 v30, vcc, 0x90, v29                       ; 4A3C3AFF 00000090
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v32, v30                             ; 3E303D20
>	v_add_i32_e32 v30, vcc, 0x94, v29                       ; 4A3C3AFF 00000094
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v32, v30                             ; 3E323D20
>	v_add_i32_e32 v30, vcc, 0x98, v29                       ; 4A3C3AFF 00000098
>	v_add_i32_e32 v29, vcc, 0x9c, v29                       ; 4A3A3AFF 0000009C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v29, v6, v11                              ; 103A1706
>	v_mac_f32_e32 v29, v8, v10                              ; 3E3A1508
>	v_mac_f32_e32 v29, v5, v12                              ; 3E3A1905
>	v_mac_f32_e32 v29, v23, v13                             ; 3E3A1B17
>	v_mul_f32_e32 v23, v9, v11                              ; 102E1709
>	v_mac_f32_e32 v23, v7, v10                              ; 3E2E1507
>	v_mac_f32_e32 v23, v22, v12                             ; 3E2E1916
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v23, v27, v13                             ; 3E2E1B1B
>	v_mul_f32_e32 v27, v25, v11                             ; 10361719
>	v_mul_f32_e32 v11, 0, v11                               ; 10161680
>	v_mac_f32_e32 v27, v24, v10                             ; 3E361518
>	v_mac_f32_e32 v11, 0, v10                               ; 3E161480
>	v_add_f32_e32 v19, v19, v19                             ; 06262713
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mac_f32_e32 v27, v26, v12                             ; 3E36191A
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_mad_f32 v12, v19, v8, -v8                             ; D282000C 84221113
>	v_mad_f32 v20, 2.0, v20, -1.0                           ; D2820014 03CE28F4
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v8, v15, v8, -v8                              ; D2820008 8422110F
>	v_mad_f32 v21, 2.0, v21, -1.0                           ; D2820015 03CE2AF4
>	v_mac_f32_e32 v12, v6, v20                              ; 3E182906
>	v_mac_f32_e32 v8, v6, v16                               ; 3E102106
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_add_f32_e32 v0, v0, v29                               ; 06003B00
>	v_mad_f32 v6, v15, v24, -v24                            ; D2820006 8462310F
>	v_mac_f32_e32 v12, v5, v21                              ; 3E182B05
>	v_mac_f32_e32 v8, v5, v17                               ; 3E102305
>	v_mad_f32 v5, v15, v7, -v7                              ; D2820005 841E0F0F
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v15, s7, v0                               ; 101E0007
>	s_buffer_load_dword s7, s[0:3], 0x7                     ; C2038107
>	s_buffer_load_dword s11, s[0:3], 0xb                    ; C205810B
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_add_f32_e32 v1, v1, v23                               ; 06022F01
>	v_mac_f32_e32 v27, v28, v13                             ; 3E361B1C
>	v_add_f32_e32 v10, v13, v11                             ; 0614170D
>	v_add_f32_e32 v11, v14, v27                             ; 0616370E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v1                               ; 3E1E0207
>	v_mad_f32 v13, v19, v7, -v7                             ; D282000D 841E0F13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	s_buffer_load_dword s11, s[0:3], 0xf                    ; C205810F
>	v_mac_f32_e32 v13, v9, v20                              ; 3E1A2909
>	v_mac_f32_e32 v5, v9, v16                               ; 3E0A2109
>	v_mul_f32_e32 v7, s4, v0                                ; 100E0004
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	v_mul_f32_e32 v9, s5, v0                                ; 10120005
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s9, s[0:3], 0x8                     ; C2048108
>	s_buffer_load_dword s10, s[0:3], 0x9                    ; C2050109
>	s_buffer_load_dword s7, s[0:3], 0xa                     ; C203810A
>	s_buffer_load_dword s12, s[0:3], 0xc                    ; C206010C
>	s_buffer_load_dword s13, s[0:3], 0xd                    ; C206810D
>	s_buffer_load_dword s14, s[0:3], 0xe                    ; C207010E
>	s_buffer_load_dword s15, s[0:3], 0x14                   ; C2078114
>	s_buffer_load_dword s16, s[0:3], 0x15                   ; C2080115
>	s_buffer_load_dword s17, s[0:3], 0x16                   ; C2088116
>	s_buffer_load_dword s18, s[0:3], 0x17                   ; C2090117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s11, v10                             ; 3E1E140B
>	v_mac_f32_e32 v6, v25, v16                              ; 3E0C2119
>	v_mac_f32_e32 v7, s8, v1                                ; 3E0E0208
>	v_mac_f32_e32 v9, s4, v1                                ; 3E120204
>	v_mul_f32_e32 v16, s0, v15                              ; 10201E00
>	exp 15, 32, 0, 0, 0, v0, v1, v11, v16                   ; F800020F 100B0100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v0, s6, v0                                ; 10000006
>	v_mac_f32_e32 v0, s5, v1                                ; 3E000205
>	v_mac_f32_e32 v0, s7, v11                               ; 3E001607
>	v_mac_f32_e32 v0, s14, v10                              ; 3E00140E
>	v_mov_b32_e32 v1, s15                                   ; 7E02020F
>	v_mac_f32_e32 v1, s16, v0                               ; 3E020010
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mad_f32 v14, v19, v24, -v24                           ; D282000E 84623113
>	v_mac_f32_e32 v14, v25, v20                             ; 3E1C2919
>	v_mac_f32_e32 v7, s9, v11                               ; 3E0E1609
>	v_mac_f32_e32 v9, s10, v11                              ; 3E12160A
>	v_mul_legacy_f32_e32 v1, s17, v1                        ; 0E020211
>	v_mac_f32_e32 v14, v26, v21                             ; 3E1C2B1A
>	v_mac_f32_e32 v5, v22, v17                              ; 3E0A2316
>	v_mac_f32_e32 v7, s12, v10                              ; 3E0E140C
>	v_mac_f32_e32 v9, s13, v10                              ; 3E12140D
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_sub_f32_e64 v10, 1.0, s18                             ; D208000A 000024F2
>	v_mac_f32_e32 v10, s18, v1                              ; 3E140212
>	v_mac_f32_e32 v13, v22, v21                             ; 3E1A2B16
>	v_mac_f32_e32 v6, v26, v17                              ; 3E0C231A
>	v_mul_f32_e32 v1, v5, v14                               ; 10021D05
>	v_mul_f32_e32 v11, v6, v12                              ; 10161906
>	v_mul_f32_e32 v16, v8, v13                              ; 10201B08
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_add_f32_e32 v18, v18, v18                             ; 06242512
>	v_mad_f32 v1, v13, v6, -v1                              ; D2820001 84060D0D
>	v_mad_f32 v11, v14, v8, -v11                            ; D282000B 842E110E
>	v_mad_f32 v16, v12, v5, -v16                            ; D2820010 84420B0C
>	v_mad_f32 v1, v18, v1, -v1                              ; D2820001 84060312
>	exp 15, 33, 0, 0, 0, v3, v4, v10, v0                    ; F800021F 000A0403
>	v_mad_f32 v11, v18, v11, -v11                           ; D282000B 842E1712
>	v_mad_f32 v16, v18, v16, -v16                           ; D2820010 84422112
>	exp 15, 34, 0, 0, 0, v8, v5, v6, v1                     ; F800022F 01060508
>	exp 15, 35, 0, 0, 0, v11, v16, v12, v13                 ; F800023F 0D0C100B
>	exp 15, 36, 0, 0, 0, v14, v0, v0, v0                    ; F800024F 0000000E
>	exp 15, 12, 0, 1, 0, v7, v9, v0, v15                    ; F80008CF 0F000907
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 2, [m0]                          ; C8200B04
>	v_interp_p2_f32 v8, [v8], v5, 3, 2, [m0]                    ; C8210B05
>	v_interp_p1_f32 v9, v4, 0, 3, [m0]                          ; C8240C04
>	v_interp_p2_f32 v9, [v9], v5, 0, 3, [m0]                    ; C8250C05
>	v_interp_p1_f32 v10, v4, 1, 3, [m0]                         ; C8280D04
>	v_interp_p2_f32 v10, [v10], v5, 1, 3, [m0]                  ; C8290D05
>	v_interp_p1_f32 v0, v4, 2, 3, [m0]                          ; C8000E04
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 3, [m0]                    ; C8010E05
>	v_interp_p1_f32 v1, v4, 3, 3, [m0]                          ; C8040F04
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	v_interp_p2_f32 v1, [v1], v5, 3, 3, [m0]                    ; C8050F05
>	v_interp_p1_f32 v6, v4, 0, 4, [m0]                          ; C8181004
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 4, [m0]                    ; C8191005
>	v_interp_p1_f32 v11, v2, 0, 0, [m0]                         ; C82C0002
>	v_interp_p2_f32 v11, [v11], v3, 0, 0, [m0]                  ; C82D0003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v12, s8, v11                                  ; 08181608
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v15, v2, 2, 0, [m0]                         ; C83C0202
>	v_sub_f32_e32 v14, s9, v19                                  ; 081C2609
>	v_mul_f32_e32 v7, v12, v12                                  ; 100E190C
>	v_interp_p2_f32 v15, [v15], v3, 2, 0, [m0]                  ; C83D0203
>	v_sub_f32_e32 v16, s11, v15                                 ; 08201E0B
>	v_mac_f32_e32 v7, v14, v14                                  ; 3E0E1D0E
>	v_mac_f32_e32 v7, v16, v16                                  ; 3E0E2110
>	v_rsq_f32_e32 v20, v7                                       ; 7E285D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v21, v20, v12                                 ; 102A1914
>	v_mul_f32_e32 v22, v20, v14                                 ; 102C1D14
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                       ; C090055C
>	v_mul_f32_e32 v23, v7, v0                                   ; 102E0107
>	v_mul_f32_e32 v24, v7, v1                                   ; 10300307
>	v_mul_f32_e32 v0, v23, v21                                  ; 10002B17
>	s_load_dwordx8 s[16:23], s[4:5], 0x50                       ; C0C80550
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                       ; C092054C
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	v_mul_f32_e32 v25, v7, v6                                   ; 10320D07
>	v_mul_f32_e32 v26, v20, v16                                 ; 10342114
>	v_mac_f32_e32 v0, v24, v22                                  ; 3E002D18
>	v_mac_f32_e32 v0, v25, v26                                  ; 3E003519
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v27, v0, 0 clamp                              ; D206081B 00010100
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s23                                     ; 87201720
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_and_b32 s36, s36, s31                                     ; 87241F24
>	image_sample v[17:18], v[0:1], s[16:23], s[32:35] dmask:0x6 ; F0800600 01041100
>	image_sample v[6:7], v[0:1], s[24:31], s[36:39] dmask:0xa   ; F0800A00 01260600
>	v_interp_p1_f32 v30, v4, 0, 2, [m0]                         ; C8780804
>	v_interp_p2_f32 v30, [v30], v5, 0, 2, [m0]                  ; C8790805
>	v_interp_p1_f32 v31, v4, 1, 2, [m0]                         ; C87C0904
>	v_interp_p2_f32 v31, [v31], v5, 1, 2, [m0]                  ; C87D0905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                          ; C8100A04
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v28, v7, v7                                   ; 06380F07
>	v_add_f32_e32 v29, v6, v6                                   ; 063A0D06
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                    ; C8110A05
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_mad_f32 v5, v28, v30, -v30                                ; D2820005 847A3D1C
>	v_mad_f32 v30, v28, v31, -v31                               ; D282001E 847E3F1C
>	v_mad_f32 v28, v28, v4, -v4                                 ; D282001C 8412091C
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v4, v29, v6, -v6                                  ; D2820004 841A0D1D
>	v_mac_f32_e32 v4, v7, v7                                    ; 3E080F07
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v5, v6, v8                                    ; 3E0A1106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v30, v6, v9                                   ; 3E3C1306
>	v_mac_f32_e32 v28, v6, v10                                  ; 3E381506
>	v_mac_f32_e32 v5, v4, v23                                   ; 3E0A2F04
>	v_mac_f32_e32 v30, v4, v24                                  ; 3E3C3104
>	v_mac_f32_e32 v28, v4, v25                                  ; 3E383304
>	v_cubema_f32 v4, v5, v30, v28                               ; D28E0004 04723D05
>	v_rcp_f32_e64 v6, |v4|                                      ; D3540106 00000104
>	v_mul_f32_e32 v21, v21, v5                                  ; 102A0B15
>	v_mac_f32_e32 v21, v22, v30                                 ; 3E2A3D16
>	v_cubetc_f32 v7, v5, v30, v28                               ; D28C0007 04723D05
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v8, v5, v30, v28                               ; D28A0008 04723D05
>	v_mac_f32_e32 v21, v26, v28                                 ; 3E2A391A
>	v_mad_f32 v9, v6, v7, v4                                    ; D2820009 04120F06
>	v_mad_f32 v8, v6, v8, v4                                    ; D2820008 04121106
>	v_mul_f32_e32 v6, v5, v21                                   ; 100C2B05
>	v_mac_f32_e32 v6, v5, v21                                   ; 3E0C2B05
>	v_mad_f32 v7, v12, v20, -v6                                 ; D2820007 841A290C
>	v_mad_f32 v12, -v12, v20, v6                                ; D282000C 241A290C
>	v_mul_f32_e32 v6, v30, v21                                  ; 100C2B1E
>	v_mac_f32_e32 v6, v30, v21                                  ; 3E0C2B1E
>	v_mad_f32 v10, v14, v20, -v6                                ; D282000A 841A290E
>	v_mad_f32 v22, -v14, v20, v6                                ; D2820016 241A290E
>	v_mul_f32_e32 v6, v28, v21                                  ; 100C2B1C
>	v_mac_f32_e32 v6, v28, v21                                  ; 3E0C2B1C
>	v_mad_f32 v14, v16, v20, -v6                                ; D282000E 841A2910
>	v_mad_f32 v20, -v16, v20, v6                                ; D2820014 241A2910
>	v_mul_f32_e32 v6, v23, v7                                   ; 100C0F17
>	v_mac_f32_e32 v6, v24, v10                                  ; 3E0C1518
>	v_mac_f32_e32 v6, v25, v14                                  ; 3E0C1D19
>	v_add_f32_e32 v6, 1.0, v6                                   ; 060C0CF2
>	v_subrev_f32_e32 v6, v27, v6                                ; 0A0C0D1B
>	s_buffer_load_dword s40, s[0:3], 0x10                       ; C2140110
>	s_buffer_load_dword s41, s[0:3], 0x11                       ; C2148111
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	v_sub_f32_e32 v7, 1.0, v6                                   ; 080E0CF2
>	s_buffer_load_dword s42, s[0:3], 0x16                       ; C2150116
>	s_buffer_load_dword s43, s[0:3], 0x18                       ; C2158118
>	s_buffer_load_dword s44, s[0:3], 0x19                       ; C2160119
>	v_mad_f32 v6, -v6, v7, v7                                   ; D2820006 241E0F06
>	v_mov_b32_e32 v7, 0x403b800a                                ; 7E0E02FF 403B800A
>	s_buffer_load_dword s45, s[0:3], 0x1a                       ; C216811A
>	s_buffer_load_dword s46, s[0:3], 0x1c                       ; C217011C
>	s_buffer_load_dword s47, s[0:3], 0x1d                       ; C217811D
>	s_load_dwordx8 s[28:35], s[4:5], 0x10                       ; C0CE0510
>	s_load_dwordx4 s[36:39], s[4:5], 0x1c                       ; C092051C
>	v_mac_f32_e32 v11, v7, v23                                  ; 3E162F07
>	s_buffer_load_dword s48, s[0:3], 0x1e                       ; C218011E
>	v_mac_f32_e32 v15, v7, v25                                  ; 3E1E3307
>	v_mad_f32 v7, v7, v24, v19                                  ; D2820007 044E3107
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v10, s40, v11                                 ; 10141628
>	v_mul_f32_e32 v14, s41, v11                                 ; 101C1629
>	v_mul_f32_e32 v11, s8, v11                                  ; 10161608
>	v_mac_f32_e32 v10, s9, v7                                   ; 3E140E09
>	v_mac_f32_e32 v14, s11, v7                                  ; 3E1C0E0B
>	v_mac_f32_e32 v11, s42, v7                                  ; 3E160E2A
>	v_mac_f32_e32 v14, s44, v15                                 ; 3E1C1E2C
>	v_mac_f32_e32 v10, s43, v15                                 ; 3E141E2B
>	v_mac_f32_e32 v11, s45, v15                                 ; 3E161E2D
>	v_add_f32_e32 v15, s46, v10                                 ; 061E142E
>	v_add_f32_e32 v16, s47, v14                                 ; 06201C2F
>	s_load_dwordx4 s[12:15], s[4:5], 0xc                        ; C086050C
>	s_load_dwordx8 s[40:47], s[4:5], 0x0                        ; C0D40500
>	s_and_b32 s36, s36, s35                                     ; 87242324
>	v_cubeid_f32 v10, v5, v30, v28                              ; D288000A 04723D05
>	v_add_f32_e32 v14, s48, v11                                 ; 061C1630
>	image_sample v[8:11], v[8:11], s[28:35], s[36:39] dmask:0xf ; F0800F00 01270808
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                       ; C08C053C
>	s_load_dwordx8 s[16:23], s[4:5], 0x20                       ; C0C80520
>	s_load_dwordx4 s[28:31], s[4:5], 0x2c                       ; C08E052C
>	s_load_dwordx8 s[32:39], s[4:5], 0x30                       ; C0D00530
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_mad_f32 v7, -v18, v7, v7                                  ; D2820007 241E0F12
>	v_mul_f32_e32 v23, v6, v17                                  ; 102E2306
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s12, s12, s47                                     ; 870C2F0C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	s_buffer_load_dword s5, s[0:3], 0x4                         ; C2028104
>	s_buffer_load_dword s6, s[0:3], 0x5                         ; C2030105
>	s_buffer_load_dword s4, s[0:3], 0xe                         ; C202010E
>	s_buffer_load_dword s7, s[0:3], 0x6                         ; C2038106
>	s_buffer_load_dword s9, s[0:3], 0xc                         ; C204810C
>	s_buffer_load_dword s11, s[0:3], 0xd                        ; C205810D
>	image_sample_c v6, v[14:17], s[40:47], s[12:15] dmask:0x1   ; F0A00100 006A060E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v5, s5, v5                                    ; 100A0A05
>	v_mad_f32 v5, -s6, v30, -v5                                 ; D2820005 A4163C06
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	v_mad_f32 v5, -s7, v28, v5                                  ; D2820005 24163807
>	v_mul_f32_e32 v14, s11, v6                                  ; 101C0C0B
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_mul_f32_e32 v11, s9, v6                                   ; 10160C09
>	v_mul_f32_e32 v6, s4, v6                                    ; 100C0C04
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v11, v17, v11                                 ; 10161711
>	v_mul_f32_e32 v14, v17, v14                                 ; 101C1D11
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_mul_f32_e32 v15, v6, v5                                   ; 101E0B06
>	v_mul_f32_e32 v11, v11, v5                                  ; 10160B0B
>	v_mul_f32_e32 v14, v14, v5                                  ; 101C0B0E
>	v_mul_f32_e32 v5, 4.0, v17                                  ; 100A22F6
>	v_mac_f32_e32 v11, v5, v8                                   ; 3E161105
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mac_f32_e32 v14, v5, v9                                   ; 3E1C1305
>	v_mac_f32_e32 v15, v5, v10                                  ; 3E1E1505
>	v_cubeid_f32 v6, v12, v22, v20                              ; D2880006 04522D0C
>	v_cubetc_f32 v5, v12, v22, v20                              ; D28C0005 04522D0C
>	v_cubesc_f32 v16, v12, v22, v20                             ; D28A0010 04522D0C
>	v_cubema_f32 v12, v12, v22, v20                             ; D28E000C 04522D0C
>	v_log_f32_e32 v17, v8                                       ; 7E224F08
>	s_and_b32 s24, s24, s39                                     ; 87182718
>	image_sample v[8:10], v[0:1], s[32:39], s[24:27] dmask:0x7  ; F0800700 00C80800
>	v_rcp_f32_e64 v1, |v12|                                     ; D3540101 0000010C
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v17                    ; 0E0022FF 40A00000
>	s_buffer_load_dword s8, s[0:3], 0x7                         ; C2040107
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_max_f32_e32 v18, 0, v18                                   ; 20242480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s28, s28, s23                                     ; 871C171C
>	v_mac_f32_e32 v4, v1, v16                                   ; 3E082101
>	v_mul_f32_e32 v0, v18, v0                                   ; 10000112
>	image_sample_l v[4:6], v[4:7], s[16:23], s[28:31] dmask:0x7 ; F0900700 00E40404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v23, v0                                   ; 100A0117
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s8, v0                                    ; 08000008
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v19                                ; 0A0C2604
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s8                                      ; 7E0C4808
>	v_sub_f32_e32 v6, s8, v6                                    ; 080C0C08
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v1, v23, v1                                   ; 10020317
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v23, v4                                   ; 10080917
>	v_mac_f32_e32 v1, v8, v11                                   ; 3E021708
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v14                                   ; 3E081D09
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v15                                  ; 3E0A1F0A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1276 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..8]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    1.0000,     0.0071,     2.4000,  1024.0000}
>  0: MUL TEMP[0], CONST[0], CONST[8].xxxx
>  1: MAD TEMP[1], CONST[1], CONST[8].yyyy, TEMP[0]
>  2: MAD TEMP[1], CONST[2], CONST[8].zzzz, TEMP[1]
>  3: ADD TEMP[1].w, TEMP[1], CONST[3]
>  4: MUL TEMP[1].x, TEMP[1].wwww, IMM[0].yyyy
>  5: RCP TEMP[2].x, CONST[5].yyyy
>  6: MUL TEMP[2].x, IMM[0].zzzz, TEMP[2].xxxx
>  7: MUL TEMP[3].x, IMM[0].wwww, CONST[4].yyyy
>  8: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
>  9: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 10: MAX TEMP[1].x, CONST[8].wwww, TEMP[1].xxxx
> 11: MUL TEMP[2].xyz, IN[0].xxxx, CONST[6].xyzz
> 12: MAD TEMP[2].xyz, IN[0].yyyy, CONST[7].xyzz, TEMP[2].xyzz
> 13: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[2].xyzz, CONST[8].xyzz
> 14: MUL TEMP[1], CONST[0], TEMP[0].xxxx
> 15: MAD TEMP[1], CONST[1], TEMP[0].yyyy, TEMP[1]
> 16: MAD TEMP[0], CONST[2], TEMP[0].zzzz, TEMP[1]
> 17: ADD TEMP[0], TEMP[0], CONST[3]
> 18: MOV OUT[0], TEMP[0]
> 19: END
>radeonsi: Compiling shader 43
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) {
>main_body:
>  %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0
>  %17 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %16, i32 0, i32 %14)
>  %18 = extractelement <4 x float> %17, i32 0
>  %19 = extractelement <4 x float> %17, i32 1
>  %20 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, align 16, !invariant.load !0
>  %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 12)
>  %23 = call float @llvm.SI.load.const(<16 x i8> %21, i32 128)
>  %24 = fmul float %22, %23
>  %25 = call float @llvm.SI.load.const(<16 x i8> %21, i32 28)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %21, i32 132)
>  %27 = fmul float %25, %26
>  %28 = fadd float %27, %24
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 44)
>  %32 = call float @llvm.SI.load.const(<16 x i8> %30, i32 136)
>  %33 = fmul float %31, %32
>  %34 = fadd float %33, %28
>  %35 = call float @llvm.SI.load.const(<16 x i8> %30, i32 60)
>  %36 = fadd float %34, %35
>  %37 = fmul float %36, 0x3F7D41D420000000
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call float @llvm.SI.load.const(<16 x i8> %39, i32 84)
>  %41 = fdiv float 1.000000e+00, %40, !fpmath !1
>  %42 = fmul float %41, 0x4003333340000000
>  %43 = call float @llvm.SI.load.const(<16 x i8> %39, i32 68)
>  %44 = fmul float %43, 1.024000e+03
>  %45 = fmul float %42, %44
>  %46 = fmul float %37, %45
>  %47 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %48 = load <16 x i8>, <16 x i8> addrspace(2)* %47, align 16, !invariant.load !0
>  %49 = call float @llvm.SI.load.const(<16 x i8> %48, i32 140)
>  %50 = call float @llvm.maxnum.f32(float %49, float %46)
>  %51 = call float @llvm.SI.load.const(<16 x i8> %48, i32 96)
>  %52 = fmul float %18, %51
>  %53 = call float @llvm.SI.load.const(<16 x i8> %48, i32 100)
>  %54 = fmul float %18, %53
>  %55 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %56 = load <16 x i8>, <16 x i8> addrspace(2)* %55, align 16, !invariant.load !0
>  %57 = call float @llvm.SI.load.const(<16 x i8> %56, i32 104)
>  %58 = fmul float %18, %57
>  %59 = call float @llvm.SI.load.const(<16 x i8> %56, i32 112)
>  %60 = fmul float %19, %59
>  %61 = fadd float %60, %52
>  %62 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %63 = load <16 x i8>, <16 x i8> addrspace(2)* %62, align 16, !invariant.load !0
>  %64 = call float @llvm.SI.load.const(<16 x i8> %63, i32 116)
>  %65 = fmul float %19, %64
>  %66 = fadd float %65, %54
>  %67 = call float @llvm.SI.load.const(<16 x i8> %63, i32 120)
>  %68 = fmul float %19, %67
>  %69 = fadd float %68, %58
>  %70 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %71 = load <16 x i8>, <16 x i8> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = call float @llvm.SI.load.const(<16 x i8> %71, i32 128)
>  %73 = fmul float %50, %61
>  %74 = fadd float %73, %72
>  %75 = call float @llvm.SI.load.const(<16 x i8> %71, i32 132)
>  %76 = fmul float %50, %66
>  %77 = fadd float %76, %75
>  %78 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %79 = load <16 x i8>, <16 x i8> addrspace(2)* %78, align 16, !invariant.load !0
>  %80 = call float @llvm.SI.load.const(<16 x i8> %79, i32 136)
>  %81 = fmul float %50, %69
>  %82 = fadd float %81, %80
>  %83 = call float @llvm.SI.load.const(<16 x i8> %79, i32 0)
>  %84 = fmul float %83, %74
>  %85 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %86 = load <16 x i8>, <16 x i8> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = call float @llvm.SI.load.const(<16 x i8> %86, i32 4)
>  %88 = fmul float %87, %74
>  %89 = call float @llvm.SI.load.const(<16 x i8> %86, i32 8)
>  %90 = fmul float %89, %74
>  %91 = call float @llvm.SI.load.const(<16 x i8> %86, i32 12)
>  %92 = fmul float %91, %74
>  %93 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %94 = load <16 x i8>, <16 x i8> addrspace(2)* %93, align 16, !invariant.load !0
>  %95 = call float @llvm.SI.load.const(<16 x i8> %94, i32 16)
>  %96 = fmul float %95, %77
>  %97 = fadd float %96, %84
>  %98 = call float @llvm.SI.load.const(<16 x i8> %94, i32 20)
>  %99 = fmul float %98, %77
>  %100 = fadd float %99, %88
>  %101 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %102 = load <16 x i8>, <16 x i8> addrspace(2)* %101, align 16, !invariant.load !0
>  %103 = call float @llvm.SI.load.const(<16 x i8> %102, i32 24)
>  %104 = fmul float %103, %77
>  %105 = fadd float %104, %90
>  %106 = call float @llvm.SI.load.const(<16 x i8> %102, i32 28)
>  %107 = fmul float %106, %77
>  %108 = fadd float %107, %92
>  %109 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %110 = load <16 x i8>, <16 x i8> addrspace(2)* %109, align 16, !invariant.load !0
>  %111 = call float @llvm.SI.load.const(<16 x i8> %110, i32 32)
>  %112 = fmul float %111, %82
>  %113 = fadd float %112, %97
>  %114 = call float @llvm.SI.load.const(<16 x i8> %110, i32 36)
>  %115 = fmul float %114, %82
>  %116 = fadd float %115, %100
>  %117 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %118 = load <16 x i8>, <16 x i8> addrspace(2)* %117, align 16, !invariant.load !0
>  %119 = call float @llvm.SI.load.const(<16 x i8> %118, i32 40)
>  %120 = fmul float %119, %82
>  %121 = fadd float %120, %105
>  %122 = call float @llvm.SI.load.const(<16 x i8> %118, i32 44)
>  %123 = fmul float %122, %82
>  %124 = fadd float %123, %108
>  %125 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %126 = load <16 x i8>, <16 x i8> addrspace(2)* %125, align 16, !invariant.load !0
>  %127 = call float @llvm.SI.load.const(<16 x i8> %126, i32 48)
>  %128 = fadd float %113, %127
>  %129 = call float @llvm.SI.load.const(<16 x i8> %126, i32 52)
>  %130 = fadd float %116, %129
>  %131 = call float @llvm.SI.load.const(<16 x i8> %126, i32 56)
>  %132 = fadd float %121, %131
>  %133 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %134 = load <16 x i8>, <16 x i8> addrspace(2)* %133, align 16, !invariant.load !0
>  %135 = call float @llvm.SI.load.const(<16 x i8> %134, i32 60)
>  %136 = fadd float %124, %135
>  %137 = bitcast i32 %12 to float
>  %138 = insertvalue <{ float, float, float }> undef, float %137, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %128, float %130, float %132, float %136)
>  ret <{ float, float, float }> %138
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL OUT[0], COLOR
>IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV OUT[0], IMM[0].xxxx
>  1: END
>radeonsi: Compiling shader 44
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = bitcast float %5 to i32
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %23, 10
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %24, float 1.000000e+00, 11
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %25, float 1.000000e+00, 12
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %26, float 1.000000e+00, 13
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %27, float 1.000000e+00, 14
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %28, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %29
>}
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	v_mov_b32_e32 v0, 0x44800000                        ; 7E0002FF 44800000
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s6, s[0:3], 0x15                ; C2030115
>	s_buffer_load_dword s13, s[0:3], 0x20               ; C2068120
>	s_buffer_load_dword s14, s[0:3], 0x21               ; C2070121
>	s_buffer_load_dword s20, s[0:3], 0x3                ; C20A0103
>	s_buffer_load_dword s15, s[0:3], 0x22               ; C2078122
>	s_buffer_load_dword s24, s[0:3], 0x7                ; C20C0107
>	s_buffer_load_dword s28, s[0:3], 0xb                ; C20E010B
>	s_buffer_load_dword s5, s[0:3], 0x11                ; C2028111
>	s_buffer_load_dword s4, s[0:3], 0xf                 ; C202010F
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_rcp_f32_e32 v7, s6                                ; 7E0E5406
>	v_mov_b32_e32 v1, s13                               ; 7E02020D
>	s_buffer_load_dword s7, s[0:3], 0x18                ; C2038118
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_mov_b32_e32 v5, s14                               ; 7E0A020E
>	v_mul_f32_e32 v8, s20, v1                           ; 10100214
>	s_buffer_load_dword s8, s[0:3], 0x19                ; C2040119
>	s_buffer_load_dword s9, s[0:3], 0x1a                ; C204811A
>	s_buffer_load_dword s10, s[0:3], 0x1c               ; C205011C
>	s_buffer_load_dword s16, s[0:3], 0x23               ; C2080123
>	v_mov_b32_e32 v6, s15                               ; 7E0C020F
>	v_mac_f32_e32 v8, s24, v5                           ; 3E100A18
>	v_mac_f32_e32 v8, s28, v6                           ; 3E100C1C
>	s_buffer_load_dword s11, s[0:3], 0x1d               ; C205811D
>	s_buffer_load_dword s12, s[0:3], 0x1e               ; C206011E
>	v_add_f32_e32 v8, s4, v8                            ; 06101004
>	s_buffer_load_dword s17, s[0:3], 0x0                ; C2088100
>	s_buffer_load_dword s18, s[0:3], 0x1                ; C2090101
>	s_buffer_load_dword s19, s[0:3], 0x2                ; C2098102
>	v_mul_f32_e32 v0, s5, v0                            ; 10000005
>	v_mul_f32_e32 v7, 0x4019999a, v7                    ; 100E0EFF 4019999A
>	v_mul_f32_e32 v0, v0, v7                            ; 10000F00
>	v_mul_f32_e32 v8, 0x3bea0ea1, v8                    ; 101010FF 3BEA0EA1
>	s_buffer_load_dword s21, s[0:3], 0x4                ; C20A8104
>	s_buffer_load_dword s22, s[0:3], 0x5                ; C20B0105
>	s_buffer_load_dword s23, s[0:3], 0x6                ; C20B8106
>	v_mul_f32_e32 v0, v0, v8                            ; 10001100
>	s_buffer_load_dword s25, s[0:3], 0x8                ; C20C8108
>	s_buffer_load_dword s26, s[0:3], 0x9                ; C20D0109
>	s_buffer_load_dword s27, s[0:3], 0xa                ; C20D810A
>	s_buffer_load_dword s29, s[0:3], 0xc                ; C20E810C
>	s_buffer_load_dword s30, s[0:3], 0xd                ; C20F010D
>	s_buffer_load_dword s0, s[0:3], 0xe                 ; C200010E
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_max_f32_e32 v0, s16, v0                           ; 20000010
>	v_mul_f32_e32 v7, s7, v3                            ; 100E0607
>	v_mul_f32_e32 v8, s8, v3                            ; 10100608
>	v_mul_f32_e32 v3, s9, v3                            ; 10060609
>	v_mac_f32_e32 v7, s10, v4                           ; 3E0E080A
>	v_mac_f32_e32 v8, s11, v4                           ; 3E10080B
>	v_mac_f32_e32 v3, s12, v4                           ; 3E06080C
>	v_mac_f32_e32 v1, v7, v0                            ; 3E020107
>	v_mac_f32_e32 v6, v3, v0                            ; 3E0C0103
>	v_mac_f32_e32 v5, v8, v0                            ; 3E0A0108
>	v_mul_f32_e32 v0, s17, v1                           ; 10000211
>	v_mul_f32_e32 v3, s18, v1                           ; 10060212
>	v_mul_f32_e32 v4, s19, v1                           ; 10080213
>	v_mul_f32_e32 v1, s20, v1                           ; 10020214
>	v_mac_f32_e32 v0, s21, v5                           ; 3E000A15
>	v_mac_f32_e32 v3, s22, v5                           ; 3E060A16
>	v_mac_f32_e32 v4, s23, v5                           ; 3E080A17
>	v_mac_f32_e32 v1, s24, v5                           ; 3E020A18
>	v_mac_f32_e32 v0, s25, v6                           ; 3E000C19
>	v_mac_f32_e32 v3, s26, v6                           ; 3E060C1A
>	v_mac_f32_e32 v4, s27, v6                           ; 3E080C1B
>	v_mac_f32_e32 v1, s28, v6                           ; 3E020C1C
>	v_add_f32_e32 v0, s29, v0                           ; 0600001D
>	v_add_f32_e32 v3, s30, v3                           ; 0606061E
>	v_add_f32_e32 v4, s0, v4                            ; 06080800
>	v_add_f32_e32 v1, s4, v1                            ; 06020204
>	exp 15, 12, 0, 1, 0, v0, v3, v4, v1                 ; F80008CF 01040300
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 336 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 1.0 ; 7E0002F2
>	v_mov_b32_e32 v1, 1.0 ; 7E0202F2
>	v_mov_b32_e32 v2, 1.0 ; 7E0402F2
>	v_mov_b32_e32 v3, 1.0 ; 7E0602F2
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1].xy, GENERIC[0]
>DCL CONST[0..7]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {   -0.5000,     6.2830,     0.5000,     0.0000}
>  0: ADD TEMP[0].xy, IN[1].xyyy, IMM[0].xxxx
>  1: MUL TEMP[1].x, CONST[5].yyyy, CONST[6].xxxx
>  2: MUL TEMP[1].x, IMM[0].yyyy, TEMP[1].xxxx
>  3: SIN TEMP[2].x, TEMP[1].xxxx
>  4: COS TEMP[1].x, TEMP[1].xxxx
>  5: MUL TEMP[3].x, TEMP[0].yyyy, TEMP[2].xxxx
>  6: MAD TEMP[3].x, TEMP[0].xxxx, TEMP[1].xxxx, -TEMP[3].xxxx
>  7: MUL TEMP[2].x, TEMP[0].xxxx, TEMP[2].xxxx
>  8: MAD TEMP[0].x, TEMP[0].yyyy, TEMP[1].xxxx, TEMP[2].xxxx
>  9: MOV TEMP[3].y, TEMP[0].xxxx
> 10: ADD TEMP[0].xy, TEMP[3].xyyy, IMM[0].zzzz
> 11: MAD TEMP[3].x, CONST[5].yyyy, CONST[6].yyyy, TEMP[0].xxxx
> 12: MAD TEMP[0].x, CONST[5].yyyy, CONST[7].xxxx, TEMP[0].yyyy
> 13: MOV TEMP[3].y, TEMP[0].xxxx
> 14: ADD TEMP[0].xyz, IN[0].xyzz, CONST[4].xyzz
> 15: MUL TEMP[1], CONST[0], TEMP[0].xxxx
> 16: MAD TEMP[1], CONST[1], TEMP[0].yyyy, TEMP[1]
> 17: MAD TEMP[0], CONST[2], TEMP[0].zzzz, TEMP[1]
> 18: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
> 19: MOV OUT[0], TEMP[0]
> 20: MOV OUT[1].xy, TEMP[3].xyxx
> 21: END
>radeonsi: Compiling shader 45
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = extractelement <4 x float> %18, i32 2
>  %22 = extractelement <4 x float> %18, i32 3
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = extractelement <4 x float> %25, i32 1
>  %28 = fadd float %26, -5.000000e-01
>  %29 = fadd float %27, -5.000000e-01
>  %30 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !invariant.load !0
>  %32 = call float @llvm.SI.load.const(<16 x i8> %31, i32 84)
>  %33 = call float @llvm.SI.load.const(<16 x i8> %31, i32 96)
>  %34 = fmul float %32, %33
>  %35 = fmul float %34, 0x401921CAC0000000
>  %36 = call float @llvm.sin.f32(float %35)
>  %37 = call float @llvm.cos.f32(float %35)
>  %38 = fmul float %29, %36
>  %39 = fmul float %28, %37
>  %40 = fsub float %39, %38
>  %41 = fmul float %28, %36
>  %42 = fmul float %29, %37
>  %43 = fadd float %42, %41
>  %44 = fadd float %40, 5.000000e-01
>  %45 = fadd float %43, 5.000000e-01
>  %46 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %47 = load <16 x i8>, <16 x i8> addrspace(2)* %46, align 16, !invariant.load !0
>  %48 = call float @llvm.SI.load.const(<16 x i8> %47, i32 84)
>  %49 = call float @llvm.SI.load.const(<16 x i8> %47, i32 100)
>  %50 = fmul float %48, %49
>  %51 = fadd float %50, %44
>  %52 = call float @llvm.SI.load.const(<16 x i8> %47, i32 84)
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 112)
>  %56 = fmul float %52, %55
>  %57 = fadd float %56, %45
>  %58 = call float @llvm.SI.load.const(<16 x i8> %54, i32 64)
>  %59 = fadd float %19, %58
>  %60 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %61 = load <16 x i8>, <16 x i8> addrspace(2)* %60, align 16, !invariant.load !0
>  %62 = call float @llvm.SI.load.const(<16 x i8> %61, i32 68)
>  %63 = fadd float %20, %62
>  %64 = call float @llvm.SI.load.const(<16 x i8> %61, i32 72)
>  %65 = fadd float %21, %64
>  %66 = call float @llvm.SI.load.const(<16 x i8> %61, i32 0)
>  %67 = fmul float %66, %59
>  %68 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %69 = load <16 x i8>, <16 x i8> addrspace(2)* %68, align 16, !invariant.load !0
>  %70 = call float @llvm.SI.load.const(<16 x i8> %69, i32 4)
>  %71 = fmul float %70, %59
>  %72 = call float @llvm.SI.load.const(<16 x i8> %69, i32 8)
>  %73 = fmul float %72, %59
>  %74 = call float @llvm.SI.load.const(<16 x i8> %69, i32 12)
>  %75 = fmul float %74, %59
>  %76 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %77 = load <16 x i8>, <16 x i8> addrspace(2)* %76, align 16, !invariant.load !0
>  %78 = call float @llvm.SI.load.const(<16 x i8> %77, i32 16)
>  %79 = fmul float %78, %63
>  %80 = fadd float %79, %67
>  %81 = call float @llvm.SI.load.const(<16 x i8> %77, i32 20)
>  %82 = fmul float %81, %63
>  %83 = fadd float %82, %71
>  %84 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %85 = load <16 x i8>, <16 x i8> addrspace(2)* %84, align 16, !invariant.load !0
>  %86 = call float @llvm.SI.load.const(<16 x i8> %85, i32 24)
>  %87 = fmul float %86, %63
>  %88 = fadd float %87, %73
>  %89 = call float @llvm.SI.load.const(<16 x i8> %85, i32 28)
>  %90 = fmul float %89, %63
>  %91 = fadd float %90, %75
>  %92 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %93 = load <16 x i8>, <16 x i8> addrspace(2)* %92, align 16, !invariant.load !0
>  %94 = call float @llvm.SI.load.const(<16 x i8> %93, i32 32)
>  %95 = fmul float %94, %65
>  %96 = fadd float %95, %80
>  %97 = call float @llvm.SI.load.const(<16 x i8> %93, i32 36)
>  %98 = fmul float %97, %65
>  %99 = fadd float %98, %83
>  %100 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %101 = load <16 x i8>, <16 x i8> addrspace(2)* %100, align 16, !invariant.load !0
>  %102 = call float @llvm.SI.load.const(<16 x i8> %101, i32 40)
>  %103 = fmul float %102, %65
>  %104 = fadd float %103, %88
>  %105 = call float @llvm.SI.load.const(<16 x i8> %101, i32 44)
>  %106 = fmul float %105, %65
>  %107 = fadd float %106, %91
>  %108 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %109 = load <16 x i8>, <16 x i8> addrspace(2)* %108, align 16, !invariant.load !0
>  %110 = call float @llvm.SI.load.const(<16 x i8> %109, i32 48)
>  %111 = fmul float %110, %22
>  %112 = fadd float %111, %96
>  %113 = call float @llvm.SI.load.const(<16 x i8> %109, i32 52)
>  %114 = fmul float %113, %22
>  %115 = fadd float %114, %99
>  %116 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %117 = load <16 x i8>, <16 x i8> addrspace(2)* %116, align 16, !invariant.load !0
>  %118 = call float @llvm.SI.load.const(<16 x i8> %117, i32 56)
>  %119 = fmul float %118, %22
>  %120 = fadd float %119, %104
>  %121 = call float @llvm.SI.load.const(<16 x i8> %117, i32 60)
>  %122 = fmul float %121, %22
>  %123 = fadd float %122, %107
>  %124 = bitcast i32 %12 to float
>  %125 = insertvalue <{ float, float, float }> undef, float %124, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %51, float %57, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %112, float %115, float %120, float %123)
>  ret <{ float, float, float }> %125
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0].xy, GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL CONST[0]
>DCL CONST[2]
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    4.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[1].x, TEMP[0].wwww, IMM[0].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[2].xxxx
>  5: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[0].wwww
>  6: MOV OUT[0], TEMP[0].xyzz
>  7: END
>radeonsi: Compiling shader 46
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = fmul float %42, 4.000000e+00
>  %44 = fmul float %39, %43
>  %45 = fmul float %40, %43
>  %46 = fmul float %41, %43
>  %47 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %48 = load <16 x i8>, <16 x i8> addrspace(2)* %47, align 16, !invariant.load !0
>  %49 = call float @llvm.SI.load.const(<16 x i8> %48, i32 32)
>  %50 = fmul float %44, %49
>  %51 = call float @llvm.SI.load.const(<16 x i8> %48, i32 32)
>  %52 = fmul float %45, %51
>  %53 = call float @llvm.SI.load.const(<16 x i8> %48, i32 32)
>  %54 = fmul float %46, %53
>  %55 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %56 = load <16 x i8>, <16 x i8> addrspace(2)* %55, align 16, !invariant.load !0
>  %57 = call float @llvm.SI.load.const(<16 x i8> %56, i32 12)
>  %58 = fmul float %50, %57
>  %59 = call float @llvm.SI.load.const(<16 x i8> %56, i32 12)
>  %60 = fmul float %52, %59
>  %61 = call float @llvm.SI.load.const(<16 x i8> %56, i32 12)
>  %62 = fmul float %54, %61
>  %63 = bitcast float %5 to i32
>  %64 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %63, 10
>  %65 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %64, float %58, 11
>  %66 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %65, float %60, 12
>  %67 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %66, float %62, 13
>  %68 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %67, float %62, 14
>  %69 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %68, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %69
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                  ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen    ; E00C2000 80010604
>	buffer_load_format_xyzw v[10:13], v5, s[8:11], 0 idxen ; E00C2000 80020A05
>	s_buffer_load_dword s4, s[0:3], 0x18                   ; C2020118
>	s_buffer_load_dword s9, s[0:3], 0x15                   ; C2048115
>	s_buffer_load_dword s6, s[0:3], 0x10                   ; C2030110
>	s_buffer_load_dword s7, s[0:3], 0x11                   ; C2038111
>	s_buffer_load_dword s12, s[0:3], 0x0                   ; C2060100
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v0, s4                                   ; 7E000204
>	v_mul_f32_e32 v0, s9, v0                               ; 10000009
>	v_mul_f32_e32 v0, 0x40c90e56, v0                       ; 100000FF 40C90E56
>	v_mul_f32_e32 v0, 0x3e22f983, v0                       ; 100000FF 3E22F983
>	v_fract_f32_e32 v0, v0                                 ; 7E004100
>	v_sin_f32_e32 v4, v0                                   ; 7E086B00
>	s_buffer_load_dword s13, s[0:3], 0x1                   ; C2068101
>	s_buffer_load_dword s14, s[0:3], 0x2                   ; C2070102
>	s_buffer_load_dword s15, s[0:3], 0x3                   ; C2078103
>	s_buffer_load_dword s8, s[0:3], 0x12                   ; C2040112
>	s_buffer_load_dword s10, s[0:3], 0x19                  ; C2050119
>	s_buffer_load_dword s11, s[0:3], 0x1c                  ; C205811C
>	s_buffer_load_dword s16, s[0:3], 0x4                   ; C2080104
>	s_buffer_load_dword s17, s[0:3], 0x5                   ; C2088105
>	s_buffer_load_dword s18, s[0:3], 0x6                   ; C2090106
>	s_buffer_load_dword s19, s[0:3], 0x7                   ; C2098107
>	v_cos_f32_e32 v0, v0                                   ; 7E006D00
>	s_buffer_load_dword s20, s[0:3], 0x8                   ; C20A0108
>	s_buffer_load_dword s21, s[0:3], 0x9                   ; C20A8109
>	s_buffer_load_dword s22, s[0:3], 0xa                   ; C20B010A
>	s_buffer_load_dword s23, s[0:3], 0xb                   ; C20B810B
>	s_buffer_load_dword s5, s[0:3], 0xf                    ; C202810F
>	s_buffer_load_dword s24, s[0:3], 0xc                   ; C20C010C
>	s_buffer_load_dword s25, s[0:3], 0xd                   ; C20C810D
>	s_buffer_load_dword s0, s[0:3], 0xe                    ; C200010E
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v1, s10                                  ; 7E02020A
>	v_mov_b32_e32 v3, s11                                  ; 7E06020B
>	s_waitcnt vmcnt(1)                                     ; BF8C0F71
>	v_add_f32_e32 v6, s6, v6                               ; 060C0C06
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	v_add_f32_e32 v5, -0.5, v10                            ; 060A14F1
>	v_add_f32_e32 v10, -0.5, v11                           ; 061416F1
>	v_mul_f32_e32 v11, v4, v10                             ; 10161504
>	v_mad_f32 v4, v5, v4, 0.5                              ; D2820004 03C20905
>	v_add_f32_e32 v7, s7, v7                               ; 060E0E07
>	v_mul_f32_e32 v12, s12, v6                             ; 10180C0C
>	v_mul_f32_e32 v13, s13, v6                             ; 101A0C0D
>	v_mul_f32_e32 v14, s14, v6                             ; 101C0C0E
>	v_mul_f32_e32 v6, s15, v6                              ; 100C0C0F
>	v_mad_f32 v5, v5, v0, -v11                             ; D2820005 842E0105
>	v_mac_f32_e32 v4, v0, v10                              ; 3E081500
>	v_add_f32_e32 v0, 0.5, v5                              ; 06000AF0
>	v_add_f32_e32 v8, s8, v8                               ; 06101008
>	v_mac_f32_e32 v12, s16, v7                             ; 3E180E10
>	v_mac_f32_e32 v13, s17, v7                             ; 3E1A0E11
>	v_mac_f32_e32 v14, s18, v7                             ; 3E1C0E12
>	v_mac_f32_e32 v6, s19, v7                              ; 3E0C0E13
>	v_mac_f32_e32 v12, s20, v8                             ; 3E181014
>	v_mac_f32_e32 v13, s21, v8                             ; 3E1A1015
>	v_mac_f32_e32 v14, s22, v8                             ; 3E1C1016
>	v_mac_f32_e32 v6, s23, v8                              ; 3E0C1017
>	v_mac_f32_e32 v4, s9, v3                               ; 3E080609
>	v_mac_f32_e32 v0, s9, v1                               ; 3E000209
>	v_mac_f32_e32 v12, s24, v9                             ; 3E181218
>	v_mac_f32_e32 v13, s25, v9                             ; 3E1A1219
>	v_mac_f32_e32 v14, s0, v9                              ; 3E1C1200
>	v_mac_f32_e32 v6, s5, v9                               ; 3E0C1205
>	exp 15, 32, 0, 0, 0, v0, v4, v0, v0                    ; F800020F 00000400
>	exp 15, 12, 0, 1, 0, v12, v13, v14, v6                 ; F80008CF 060E0D0C
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 336 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                  ; BE80047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                      ; C082050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s4, s4, s19                                   ; 87041304
>	s_and_b64 exec, exec, s[0:1]                            ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	image_sample v[0:3], v[0:1], s[12:19], s[4:7] dmask:0xf ; F0800F00 00230000
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v3, 4.0, v3                               ; 100606F6
>	v_mul_f32_e32 v2, v3, v2                                ; 10040503
>	v_mul_f32_e32 v0, v3, v0                                ; 10000103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x3                     ; C2020103
>	s_buffer_load_dword s0, s[0:3], 0x8                     ; C2000108
>	v_mul_f32_e32 v1, v3, v1                                ; 10020303
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v2, s0, v2                                ; 10040400
>	v_mul_f32_e32 v0, s0, v0                                ; 10000000
>	v_mul_f32_e32 v1, s0, v1                                ; 10020200
>	v_mul_f32_e32 v2, s4, v2                                ; 10040404
>	v_mul_f32_e32 v0, s4, v0                                ; 10000004
>	v_mul_f32_e32 v1, s4, v1                                ; 10020204
>	v_mov_b32_e32 v3, v2                                    ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 144 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0].xy, GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL CONST[0]
>DCL CONST[2]
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {    0.3000,     0.5900,     0.1100,     0.5000}
>IMM[1] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: DP3 TEMP[1].x, TEMP[0].xyzz, IMM[0].xyzz
>  3: POW TEMP[2].x, TEMP[1].xxxx, IMM[0].wwww
>  4: MUL TEMP[2].x, TEMP[2].xxxx, IMM[1].xxxx
>  5: MUL TEMP[1].xyz, TEMP[0].xyzz, TEMP[2].xxxx
>  6: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[2].xxxx
>  7: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[0].wwww
>  8: MOV TEMP[1].xyz, TEMP[1].xyzx
>  9: MOV TEMP[1].w, TEMP[0].wwww
> 10: MOV OUT[0], TEMP[1]
> 11: END
>radeonsi: Compiling shader 47
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = fmul float %39, 0x3FD3333340000000
>  %44 = fmul float %40, 0x3FE2E147A0000000
>  %45 = fadd float %44, %43
>  %46 = fmul float %41, 0x3FBC28F5C0000000
>  %47 = fadd float %45, %46
>  %sqrtf = call float @sqrtf(float %47) #1
>  %fabsf = call float @fabsf(float %sqrtf) #1
>  %48 = fcmp oeq float %47, 0xFFF0000000000000
>  %fabsf.op = fmul float %fabsf, 8.000000e+00
>  %49 = select i1 %48, float 0x7FF0000000000000, float %fabsf.op
>  %50 = fmul float %39, %49
>  %51 = fmul float %40, %49
>  %52 = fmul float %41, %49
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 32)
>  %56 = fmul float %50, %55
>  %57 = call float @llvm.SI.load.const(<16 x i8> %54, i32 32)
>  %58 = fmul float %51, %57
>  %59 = call float @llvm.SI.load.const(<16 x i8> %54, i32 32)
>  %60 = fmul float %52, %59
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call float @llvm.SI.load.const(<16 x i8> %62, i32 12)
>  %64 = fmul float %56, %63
>  %65 = call float @llvm.SI.load.const(<16 x i8> %62, i32 12)
>  %66 = fmul float %58, %65
>  %67 = call float @llvm.SI.load.const(<16 x i8> %62, i32 12)
>  %68 = fmul float %60, %67
>  %69 = bitcast float %5 to i32
>  %70 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %69, 10
>  %71 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %70, float %64, 11
>  %72 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %71, float %66, 12
>  %73 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %72, float %68, 13
>  %74 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %73, float %42, 14
>  %75 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %74, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %75
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>declare float @sqrtf(float)
>
>declare float @fabsf(float)
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                  ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen    ; E00C2000 80010604
>	buffer_load_format_xyzw v[10:13], v5, s[8:11], 0 idxen ; E00C2000 80020A05
>	s_buffer_load_dword s4, s[0:3], 0x18                   ; C2020118
>	s_buffer_load_dword s9, s[0:3], 0x15                   ; C2048115
>	s_buffer_load_dword s6, s[0:3], 0x10                   ; C2030110
>	s_buffer_load_dword s7, s[0:3], 0x11                   ; C2038111
>	s_buffer_load_dword s12, s[0:3], 0x0                   ; C2060100
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v0, s4                                   ; 7E000204
>	v_mul_f32_e32 v0, s9, v0                               ; 10000009
>	v_mul_f32_e32 v0, 0x40c90e56, v0                       ; 100000FF 40C90E56
>	v_mul_f32_e32 v0, 0x3e22f983, v0                       ; 100000FF 3E22F983
>	v_fract_f32_e32 v0, v0                                 ; 7E004100
>	v_sin_f32_e32 v4, v0                                   ; 7E086B00
>	s_buffer_load_dword s13, s[0:3], 0x1                   ; C2068101
>	s_buffer_load_dword s14, s[0:3], 0x2                   ; C2070102
>	s_buffer_load_dword s15, s[0:3], 0x3                   ; C2078103
>	s_buffer_load_dword s8, s[0:3], 0x12                   ; C2040112
>	s_buffer_load_dword s10, s[0:3], 0x19                  ; C2050119
>	s_buffer_load_dword s11, s[0:3], 0x1c                  ; C205811C
>	s_buffer_load_dword s16, s[0:3], 0x4                   ; C2080104
>	s_buffer_load_dword s17, s[0:3], 0x5                   ; C2088105
>	s_buffer_load_dword s18, s[0:3], 0x6                   ; C2090106
>	s_buffer_load_dword s19, s[0:3], 0x7                   ; C2098107
>	v_cos_f32_e32 v0, v0                                   ; 7E006D00
>	s_buffer_load_dword s20, s[0:3], 0x8                   ; C20A0108
>	s_buffer_load_dword s21, s[0:3], 0x9                   ; C20A8109
>	s_buffer_load_dword s22, s[0:3], 0xa                   ; C20B010A
>	s_buffer_load_dword s23, s[0:3], 0xb                   ; C20B810B
>	s_buffer_load_dword s5, s[0:3], 0xf                    ; C202810F
>	s_buffer_load_dword s24, s[0:3], 0xc                   ; C20C010C
>	s_buffer_load_dword s25, s[0:3], 0xd                   ; C20C810D
>	s_buffer_load_dword s0, s[0:3], 0xe                    ; C200010E
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v1, s10                                  ; 7E02020A
>	v_mov_b32_e32 v3, s11                                  ; 7E06020B
>	s_waitcnt vmcnt(1)                                     ; BF8C0F71
>	v_add_f32_e32 v6, s6, v6                               ; 060C0C06
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	v_add_f32_e32 v5, -0.5, v10                            ; 060A14F1
>	v_add_f32_e32 v10, -0.5, v11                           ; 061416F1
>	v_mul_f32_e32 v11, v4, v10                             ; 10161504
>	v_mad_f32 v4, v5, v4, 0.5                              ; D2820004 03C20905
>	v_add_f32_e32 v7, s7, v7                               ; 060E0E07
>	v_mul_f32_e32 v12, s12, v6                             ; 10180C0C
>	v_mul_f32_e32 v13, s13, v6                             ; 101A0C0D
>	v_mul_f32_e32 v14, s14, v6                             ; 101C0C0E
>	v_mul_f32_e32 v6, s15, v6                              ; 100C0C0F
>	v_mad_f32 v5, v5, v0, -v11                             ; D2820005 842E0105
>	v_mac_f32_e32 v4, v0, v10                              ; 3E081500
>	v_add_f32_e32 v0, 0.5, v5                              ; 06000AF0
>	v_add_f32_e32 v8, s8, v8                               ; 06101008
>	v_mac_f32_e32 v12, s16, v7                             ; 3E180E10
>	v_mac_f32_e32 v13, s17, v7                             ; 3E1A0E11
>	v_mac_f32_e32 v14, s18, v7                             ; 3E1C0E12
>	v_mac_f32_e32 v6, s19, v7                              ; 3E0C0E13
>	v_mac_f32_e32 v12, s20, v8                             ; 3E181014
>	v_mac_f32_e32 v13, s21, v8                             ; 3E1A1015
>	v_mac_f32_e32 v14, s22, v8                             ; 3E1C1016
>	v_mac_f32_e32 v6, s23, v8                              ; 3E0C1017
>	v_mac_f32_e32 v4, s9, v3                               ; 3E080609
>	v_mac_f32_e32 v0, s9, v1                               ; 3E000209
>	v_mac_f32_e32 v12, s24, v9                             ; 3E181218
>	v_mac_f32_e32 v13, s25, v9                             ; 3E1A1219
>	v_mac_f32_e32 v14, s0, v9                              ; 3E1C1200
>	v_mac_f32_e32 v6, s5, v9                               ; 3E0C1205
>	exp 15, 32, 0, 0, 0, v0, v4, v0, v0                    ; F800020F 00000400
>	exp 15, 12, 0, 1, 0, v12, v13, v14, v6                 ; F80008CF 060E0D0C
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 336 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                  ; BE80047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                      ; C082050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s4, s4, s19                                   ; 87041304
>	s_and_b64 exec, exec, s[0:1]                            ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	image_sample v[0:3], v[0:1], s[12:19], s[4:7] dmask:0xf ; F0800F00 00230000
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v4, 0x3e99999a, v0                        ; 100800FF 3E99999A
>	v_mac_f32_e32 v4, 0x3f170a3d, v1                        ; 3E0802FF 3F170A3D
>	v_mac_f32_e32 v4, 0x3de147ae, v2                        ; 3E0804FF 3DE147AE
>	v_mov_b32_e32 v6, 0xff800000                            ; 7E0C02FF FF800000
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x3                     ; C2020103
>	s_buffer_load_dword s0, s[0:3], 0x8                     ; C2000108
>	v_sqrt_f32_e32 v5, v4                                   ; 7E0A6704
>	v_cmp_eq_f32_e32 vcc, v6, v4                            ; 7C040906
>	v_mov_b32_e32 v4, 0x41000000                            ; 7E0802FF 41000000
>	v_mul_f32_e64 v4, v4, |v5|                              ; D2100204 00020B04
>	v_mov_b32_e32 v5, 0x7f800000                            ; 7E0A02FF 7F800000
>	v_cndmask_b32_e32 v4, v4, v5, vcc                       ; 00080B04
>	v_mul_f32_e32 v0, v4, v0                                ; 10000104
>	v_mul_f32_e32 v1, v4, v1                                ; 10020304
>	v_mul_f32_e32 v2, v4, v2                                ; 10040504
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v0, s0, v0                                ; 10000000
>	v_mul_f32_e32 v1, s0, v1                                ; 10020200
>	v_mul_f32_e32 v2, s0, v2                                ; 10040400
>	v_mul_f32_e32 v0, s4, v0                                ; 10000004
>	v_mul_f32_e32 v1, s4, v1                                ; 10020204
>	v_mul_f32_e32 v2, s4, v2                                ; 10040404
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 204 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..7]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {   -0.5000,     6.2830,     0.5000,    64.0000}
>  0: ADD TEMP[0].xy, IN[2].xyyy, IMM[0].xxxx
>  1: MUL TEMP[1].x, CONST[5].yyyy, CONST[6].xxxx
>  2: MUL TEMP[1].x, IMM[0].yyyy, TEMP[1].xxxx
>  3: SIN TEMP[2].x, TEMP[1].xxxx
>  4: COS TEMP[1].x, TEMP[1].xxxx
>  5: MUL TEMP[3].x, TEMP[0].yyyy, TEMP[2].xxxx
>  6: MAD TEMP[3].x, TEMP[0].xxxx, TEMP[1].xxxx, -TEMP[3].xxxx
>  7: MUL TEMP[2].x, TEMP[0].xxxx, TEMP[2].xxxx
>  8: MAD TEMP[0].x, TEMP[0].yyyy, TEMP[1].xxxx, TEMP[2].xxxx
>  9: MOV TEMP[3].y, TEMP[0].xxxx
> 10: ADD TEMP[0].xy, TEMP[3].xyyy, IMM[0].zzzz
> 11: MAD TEMP[3].x, CONST[5].yyyy, CONST[6].yyyy, TEMP[0].xxxx
> 12: MAD TEMP[0].x, CONST[5].yyyy, CONST[7].xxxx, TEMP[0].yyyy
> 13: MOV TEMP[3].y, TEMP[0].xxxx
> 14: ADD TEMP[0].xyz, IN[0].xyzz, CONST[4].xyzz
> 15: MUL TEMP[1], CONST[0], TEMP[0].xxxx
> 16: MAD TEMP[1], CONST[1], TEMP[0].yyyy, TEMP[1]
> 17: MAD TEMP[0], CONST[2], TEMP[0].zzzz, TEMP[1]
> 18: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
> 19: MOV TEMP[1].xy, TEMP[3].xyxx
> 20: MUL TEMP[2].xy, IN[1].zwww, IMM[0].wwww
> 21: MOV TEMP[1].zw, TEMP[2].yyxy
> 22: MOV OUT[0], TEMP[0]
> 23: MOV OUT[1], TEMP[1]
> 24: END
>radeonsi: Compiling shader 48
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 2
>  %28 = extractelement <4 x float> %26, i32 3
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %16)
>  %32 = extractelement <4 x float> %31, i32 0
>  %33 = extractelement <4 x float> %31, i32 1
>  %34 = fadd float %32, -5.000000e-01
>  %35 = fadd float %33, -5.000000e-01
>  %36 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %37 = load <16 x i8>, <16 x i8> addrspace(2)* %36, align 16, !invariant.load !0
>  %38 = call float @llvm.SI.load.const(<16 x i8> %37, i32 84)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %37, i32 96)
>  %40 = fmul float %38, %39
>  %41 = fmul float %40, 0x401921CAC0000000
>  %42 = call float @llvm.sin.f32(float %41)
>  %43 = call float @llvm.cos.f32(float %41)
>  %44 = fmul float %35, %42
>  %45 = fmul float %34, %43
>  %46 = fsub float %45, %44
>  %47 = fmul float %34, %42
>  %48 = fmul float %35, %43
>  %49 = fadd float %48, %47
>  %50 = fadd float %46, 5.000000e-01
>  %51 = fadd float %49, 5.000000e-01
>  %52 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %53 = load <16 x i8>, <16 x i8> addrspace(2)* %52, align 16, !invariant.load !0
>  %54 = call float @llvm.SI.load.const(<16 x i8> %53, i32 84)
>  %55 = call float @llvm.SI.load.const(<16 x i8> %53, i32 100)
>  %56 = fmul float %54, %55
>  %57 = fadd float %56, %50
>  %58 = call float @llvm.SI.load.const(<16 x i8> %53, i32 84)
>  %59 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %60 = load <16 x i8>, <16 x i8> addrspace(2)* %59, align 16, !invariant.load !0
>  %61 = call float @llvm.SI.load.const(<16 x i8> %60, i32 112)
>  %62 = fmul float %58, %61
>  %63 = fadd float %62, %51
>  %64 = call float @llvm.SI.load.const(<16 x i8> %60, i32 64)
>  %65 = fadd float %20, %64
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 68)
>  %69 = fadd float %21, %68
>  %70 = call float @llvm.SI.load.const(<16 x i8> %67, i32 72)
>  %71 = fadd float %22, %70
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 0)
>  %73 = fmul float %72, %65
>  %74 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %75 = load <16 x i8>, <16 x i8> addrspace(2)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const(<16 x i8> %75, i32 4)
>  %77 = fmul float %76, %65
>  %78 = call float @llvm.SI.load.const(<16 x i8> %75, i32 8)
>  %79 = fmul float %78, %65
>  %80 = call float @llvm.SI.load.const(<16 x i8> %75, i32 12)
>  %81 = fmul float %80, %65
>  %82 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %83 = load <16 x i8>, <16 x i8> addrspace(2)* %82, align 16, !invariant.load !0
>  %84 = call float @llvm.SI.load.const(<16 x i8> %83, i32 16)
>  %85 = fmul float %84, %69
>  %86 = fadd float %85, %73
>  %87 = call float @llvm.SI.load.const(<16 x i8> %83, i32 20)
>  %88 = fmul float %87, %69
>  %89 = fadd float %88, %77
>  %90 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %91 = load <16 x i8>, <16 x i8> addrspace(2)* %90, align 16, !invariant.load !0
>  %92 = call float @llvm.SI.load.const(<16 x i8> %91, i32 24)
>  %93 = fmul float %92, %69
>  %94 = fadd float %93, %79
>  %95 = call float @llvm.SI.load.const(<16 x i8> %91, i32 28)
>  %96 = fmul float %95, %69
>  %97 = fadd float %96, %81
>  %98 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %99 = load <16 x i8>, <16 x i8> addrspace(2)* %98, align 16, !invariant.load !0
>  %100 = call float @llvm.SI.load.const(<16 x i8> %99, i32 32)
>  %101 = fmul float %100, %71
>  %102 = fadd float %101, %86
>  %103 = call float @llvm.SI.load.const(<16 x i8> %99, i32 36)
>  %104 = fmul float %103, %71
>  %105 = fadd float %104, %89
>  %106 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %107 = load <16 x i8>, <16 x i8> addrspace(2)* %106, align 16, !invariant.load !0
>  %108 = call float @llvm.SI.load.const(<16 x i8> %107, i32 40)
>  %109 = fmul float %108, %71
>  %110 = fadd float %109, %94
>  %111 = call float @llvm.SI.load.const(<16 x i8> %107, i32 44)
>  %112 = fmul float %111, %71
>  %113 = fadd float %112, %97
>  %114 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %115 = load <16 x i8>, <16 x i8> addrspace(2)* %114, align 16, !invariant.load !0
>  %116 = call float @llvm.SI.load.const(<16 x i8> %115, i32 48)
>  %117 = fmul float %116, %23
>  %118 = fadd float %117, %102
>  %119 = call float @llvm.SI.load.const(<16 x i8> %115, i32 52)
>  %120 = fmul float %119, %23
>  %121 = fadd float %120, %105
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = call float @llvm.SI.load.const(<16 x i8> %123, i32 56)
>  %125 = fmul float %124, %23
>  %126 = fadd float %125, %110
>  %127 = call float @llvm.SI.load.const(<16 x i8> %123, i32 60)
>  %128 = fmul float %127, %23
>  %129 = fadd float %128, %113
>  %130 = fmul float %27, 6.400000e+01
>  %131 = fmul float %28, 6.400000e+01
>  %132 = bitcast i32 %12 to float
>  %133 = insertvalue <{ float, float, float }> undef, float %132, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %57, float %63, float %130, float %131)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %118, float %121, float %126, float %129)
>  ret <{ float, float, float }> %133
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[0]
>DCL CONST[3]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    0.3000,     0.5900,     0.1100,     0.5000}
>IMM[1] FLT32 {    8.0000,     2.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: DP3 TEMP[1].x, TEMP[0].xyzz, IMM[0].xyzz
>  3: POW TEMP[2].x, TEMP[1].xxxx, IMM[0].wwww
>  4: MUL TEMP[2].x, TEMP[2].xxxx, IMM[1].xxxx
>  5: MUL TEMP[1].xyz, TEMP[0].xyzz, TEMP[2].xxxx
>  6: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[3].xxxx
>  7: MOV TEMP[2].xy, IN[0].zwww
>  8: TEX TEMP[2], TEMP[2], SAMP[1], 2D
>  9: MUL TEMP[3].xyz, TEMP[2].xyzz, IMM[1].yyyy
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xyzz
> 11: MUL TEMP[0].x, TEMP[0].wwww, TEMP[2].wwww
> 12: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[0].wwww
> 13: MOV TEMP[1].xyz, TEMP[1].xyzx
> 14: MOV TEMP[1].w, TEMP[0].xxxx
> 15: MOV OUT[0], TEMP[1]
> 16: END
>radeonsi: Compiling shader 49
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = fmul float %39, 0x3FD3333340000000
>  %44 = fmul float %40, 0x3FE2E147A0000000
>  %45 = fadd float %44, %43
>  %46 = fmul float %41, 0x3FBC28F5C0000000
>  %47 = fadd float %45, %46
>  %sqrtf = call float @sqrtf(float %47) #1
>  %fabsf = call float @fabsf(float %sqrtf) #1
>  %48 = fcmp oeq float %47, 0xFFF0000000000000
>  %fabsf.op = fmul float %fabsf, 8.000000e+00
>  %49 = select i1 %48, float 0x7FF0000000000000, float %fabsf.op
>  %50 = fmul float %39, %49
>  %51 = fmul float %40, %49
>  %52 = fmul float %41, %49
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 48)
>  %56 = fmul float %50, %55
>  %57 = call float @llvm.SI.load.const(<16 x i8> %54, i32 48)
>  %58 = fmul float %51, %57
>  %59 = call float @llvm.SI.load.const(<16 x i8> %54, i32 48)
>  %60 = fmul float %52, %59
>  %61 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %62 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %63 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %64 = load <8 x i32>, <8 x i32> addrspace(2)* %63, align 32, !invariant.load !0
>  %65 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %66 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %65, i64 0, i64 7, !amdgpu.uniform !0
>  %67 = load <4 x i32>, <4 x i32> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = extractelement <8 x i32> %64, i32 7
>  %69 = extractelement <4 x i32> %67, i32 0
>  %70 = and i32 %69, %68
>  %71 = insertelement <4 x i32> %67, i32 %70, i32 0
>  %72 = bitcast float %61 to i32
>  %73 = bitcast float %62 to i32
>  %74 = insertelement <2 x i32> undef, i32 %72, i32 0
>  %75 = insertelement <2 x i32> %74, i32 %73, i32 1
>  %76 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %75, <8 x i32> %64, <4 x i32> %71, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %77 = extractelement <4 x float> %76, i32 0
>  %78 = extractelement <4 x float> %76, i32 1
>  %79 = extractelement <4 x float> %76, i32 2
>  %80 = extractelement <4 x float> %76, i32 3
>  %81 = fmul float %77, 2.000000e+00
>  %82 = fmul float %78, 2.000000e+00
>  %83 = fmul float %79, 2.000000e+00
>  %84 = fmul float %56, %81
>  %85 = fmul float %58, %82
>  %86 = fmul float %60, %83
>  %87 = fmul float %42, %80
>  %88 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %89 = load <16 x i8>, <16 x i8> addrspace(2)* %88, align 16, !invariant.load !0
>  %90 = call float @llvm.SI.load.const(<16 x i8> %89, i32 12)
>  %91 = fmul float %84, %90
>  %92 = call float @llvm.SI.load.const(<16 x i8> %89, i32 12)
>  %93 = fmul float %85, %92
>  %94 = call float @llvm.SI.load.const(<16 x i8> %89, i32 12)
>  %95 = fmul float %86, %94
>  %96 = bitcast float %5 to i32
>  %97 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %96, 10
>  %98 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %97, float %91, 11
>  %99 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %98, float %93, 12
>  %100 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %99, float %95, 13
>  %101 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %100, float %87, 14
>  %102 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %101, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %102
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>declare float @sqrtf(float)
>
>declare float @fabsf(float)
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                   ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	v_mov_b32_e32 v0, 0x42800000                            ; 7E0002FF 42800000
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen ; E00C2000 80030B05
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen    ; E00C2000 80020306
>	s_buffer_load_dword s4, s[0:3], 0x18                    ; C2020118
>	s_buffer_load_dword s9, s[0:3], 0x15                    ; C2048115
>	s_buffer_load_dword s6, s[0:3], 0x10                    ; C2030110
>	s_buffer_load_dword s7, s[0:3], 0x11                    ; C2038111
>	s_buffer_load_dword s12, s[0:3], 0x0                    ; C2060100
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v1, s4                                    ; 7E020204
>	v_mul_f32_e32 v1, s9, v1                                ; 10020209
>	v_mul_f32_e32 v1, 0x40c90e56, v1                        ; 100202FF 40C90E56
>	v_mul_f32_e32 v1, 0x3e22f983, v1                        ; 100202FF 3E22F983
>	v_fract_f32_e32 v1, v1                                  ; 7E024101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_sin_f32_e32 v11, v1                                   ; 7E166B01
>	s_buffer_load_dword s13, s[0:3], 0x1                    ; C2068101
>	s_buffer_load_dword s14, s[0:3], 0x2                    ; C2070102
>	s_buffer_load_dword s15, s[0:3], 0x3                    ; C2078103
>	s_buffer_load_dword s8, s[0:3], 0x12                    ; C2040112
>	s_buffer_load_dword s10, s[0:3], 0x19                   ; C2050119
>	s_buffer_load_dword s11, s[0:3], 0x1c                   ; C205811C
>	s_buffer_load_dword s16, s[0:3], 0x4                    ; C2080104
>	s_buffer_load_dword s17, s[0:3], 0x5                    ; C2088105
>	s_buffer_load_dword s18, s[0:3], 0x6                    ; C2090106
>	s_buffer_load_dword s19, s[0:3], 0x7                    ; C2098107
>	v_cos_f32_e32 v1, v1                                    ; 7E026D01
>	s_buffer_load_dword s20, s[0:3], 0x8                    ; C20A0108
>	s_buffer_load_dword s21, s[0:3], 0x9                    ; C20A8109
>	s_buffer_load_dword s22, s[0:3], 0xa                    ; C20B010A
>	s_buffer_load_dword s23, s[0:3], 0xb                    ; C20B810B
>	s_buffer_load_dword s5, s[0:3], 0xf                     ; C202810F
>	s_buffer_load_dword s24, s[0:3], 0xc                    ; C20C010C
>	s_buffer_load_dword s25, s[0:3], 0xd                    ; C20C810D
>	s_buffer_load_dword s0, s[0:3], 0xe                     ; C200010E
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v5, s10                                   ; 7E0A020A
>	v_mov_b32_e32 v6, s11                                   ; 7E0C020B
>	v_add_f32_e32 v7, s6, v7                                ; 060E0E06
>	v_add_f32_e32 v8, s7, v8                                ; 06101007
>	v_add_f32_e32 v4, -0.5, v4                              ; 060808F1
>	v_add_f32_e32 v3, -0.5, v3                              ; 060606F1
>	v_mul_f32_e32 v12, v11, v4                              ; 1018090B
>	v_mad_f32 v11, v3, v11, 0.5                             ; D282000B 03C21703
>	v_mad_f32 v3, v3, v1, -v12                              ; D2820003 84320303
>	v_mac_f32_e32 v11, v1, v4                               ; 3E160901
>	v_mul_f32_e32 v12, s12, v7                              ; 10180E0C
>	v_mul_f32_e32 v1, s13, v7                               ; 10020E0D
>	v_mul_f32_e32 v4, s14, v7                               ; 10080E0E
>	v_mul_f32_e32 v7, s15, v7                               ; 100E0E0F
>	v_add_f32_e32 v3, 0.5, v3                               ; 060606F0
>	v_add_f32_e32 v9, s8, v9                                ; 06121208
>	v_mac_f32_e32 v12, s16, v8                              ; 3E181010
>	v_mac_f32_e32 v1, s17, v8                               ; 3E021011
>	v_mac_f32_e32 v4, s18, v8                               ; 3E081012
>	v_mac_f32_e32 v7, s19, v8                               ; 3E0E1013
>	v_mac_f32_e32 v12, s20, v9                              ; 3E181214
>	v_mac_f32_e32 v1, s21, v9                               ; 3E021215
>	v_mac_f32_e32 v4, s22, v9                               ; 3E081216
>	v_mac_f32_e32 v7, s23, v9                               ; 3E0E1217
>	v_mul_f32_e32 v8, v0, v13                               ; 10101B00
>	v_mac_f32_e32 v11, s9, v6                               ; 3E160C09
>	v_mac_f32_e32 v3, s9, v5                                ; 3E060A09
>	v_mul_f32_e32 v0, v0, v14                               ; 10001D00
>	v_mac_f32_e32 v12, s24, v10                             ; 3E181418
>	v_mac_f32_e32 v1, s25, v10                              ; 3E021419
>	v_mac_f32_e32 v4, s0, v10                               ; 3E081400
>	v_mac_f32_e32 v7, s5, v10                               ; 3E0E1405
>	exp 15, 32, 0, 0, 0, v3, v11, v8, v0                    ; F800020F 00080B03
>	exp 15, 12, 0, 1, 0, v12, v1, v4, v7                    ; F80008CF 0704010C
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 364 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                    ; BE88047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                      ; C08E050C
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                        ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                  ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                        ; C8040102
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                  ; C8050103
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s28, s28, s19                                   ; 871C131C
>	image_sample v[4:7], v[0:1], s[12:19], s[28:31] dmask:0xf ; F0800F00 00E30400
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v0, 0x3e99999a, v4                          ; 100008FF 3E99999A
>	v_mac_f32_e32 v0, 0x3f170a3d, v5                          ; 3E000AFF 3F170A3D
>	v_mac_f32_e32 v0, 0x3de147ae, v6                          ; 3E000CFF 3DE147AE
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                     ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	v_mov_b32_e32 v8, 0xff800000                              ; 7E1002FF FF800000
>	v_mov_b32_e32 v9, 0x41000000                              ; 7E1202FF 41000000
>	v_sqrt_f32_e32 v1, v0                                     ; 7E026700
>	s_buffer_load_dword s11, s[0:3], 0xc                      ; C205810C
>	v_cmp_eq_f32_e32 vcc, v8, v0                              ; 7C040108
>	v_mul_f32_e64 v0, v9, |v1|                                ; D2100200 00020309
>	v_mov_b32_e32 v1, 0x7f800000                              ; 7E0202FF 7F800000
>	v_cndmask_b32_e32 v0, v0, v1, vcc                         ; 00000300
>	v_mul_f32_e32 v4, v0, v4                                  ; 10080900
>	v_mul_f32_e32 v5, v0, v5                                  ; 100A0B00
>	v_mul_f32_e32 v6, v0, v6                                  ; 100C0D00
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                        ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]                  ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                        ; C8040302
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v4, s11, v4                                 ; 1008080B
>	v_mul_f32_e32 v5, s11, v5                                 ; 100A0A0B
>	v_mul_f32_e32 v6, s11, v6                                 ; 100C0C0B
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]                  ; C8050303
>	s_and_b32 s4, s4, s27                                     ; 87041B04
>	s_and_b64 exec, exec, s[8:9]                              ; 87FE087E
>	s_buffer_load_dword s0, s[0:3], 0x3                       ; C2000103
>	image_sample v[0:3], v[0:1], s[20:27], s[4:7] dmask:0xf   ; F0800F00 00250000
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_add_f32_e32 v0, v0, v0                                  ; 06000100
>	v_add_f32_e32 v1, v1, v1                                  ; 06020301
>	v_add_f32_e32 v2, v2, v2                                  ; 06040502
>	v_mul_f32_e32 v0, v0, v4                                  ; 10000900
>	v_mul_f32_e32 v1, v1, v5                                  ; 10020B01
>	v_mul_f32_e32 v2, v2, v6                                  ; 10040D02
>	v_mul_f32_e32 v3, v3, v7                                  ; 10060F03
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v0, s0, v0                                  ; 10000000
>	v_mul_f32_e32 v1, s0, v1                                  ; 10020200
>	v_mul_f32_e32 v2, s0, v2                                  ; 10040400
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 272 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL CONST[0..6]
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    1.0000,     0.9999,     0.0000,     0.0000}
>  0: MUL TEMP[0].xyz, IN[0].xxxx, CONST[4].xyzz
>  1: MAD TEMP[1].xyz, IN[0].yyyy, CONST[5].xyzz, TEMP[0].xyzz
>  2: MAD TEMP[0].xyz, CONST[6].wwww, TEMP[1].xyzz, CONST[6].xyzz
>  3: MUL TEMP[1], CONST[0], TEMP[0].xxxx
>  4: MAD TEMP[1], CONST[1], TEMP[0].yyyy, TEMP[1]
>  5: MAD TEMP[0], CONST[2], TEMP[0].zzzz, TEMP[1]
>  6: ADD TEMP[0].xyw, TEMP[0], CONST[3]
>  7: MOV TEMP[1].xyw, TEMP[0].xyxw
>  8: MUL TEMP[0].x, TEMP[0].wwww, IMM[0].yyyy
>  9: MOV TEMP[1].z, TEMP[0].xxxx
> 10: MOV OUT[0], TEMP[1]
> 11: END
>radeonsi: Compiling shader 50
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) {
>main_body:
>  %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0
>  %17 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %16, i32 0, i32 %14)
>  %18 = extractelement <4 x float> %17, i32 0
>  %19 = extractelement <4 x float> %17, i32 1
>  %20 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, align 16, !invariant.load !0
>  %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 64)
>  %23 = fmul float %18, %22
>  %24 = call float @llvm.SI.load.const(<16 x i8> %21, i32 68)
>  %25 = fmul float %18, %24
>  %26 = call float @llvm.SI.load.const(<16 x i8> %21, i32 72)
>  %27 = fmul float %18, %26
>  %28 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %29 = load <16 x i8>, <16 x i8> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = call float @llvm.SI.load.const(<16 x i8> %29, i32 80)
>  %31 = fmul float %19, %30
>  %32 = fadd float %31, %23
>  %33 = call float @llvm.SI.load.const(<16 x i8> %29, i32 84)
>  %34 = fmul float %19, %33
>  %35 = fadd float %34, %25
>  %36 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %37 = load <16 x i8>, <16 x i8> addrspace(2)* %36, align 16, !invariant.load !0
>  %38 = call float @llvm.SI.load.const(<16 x i8> %37, i32 88)
>  %39 = fmul float %19, %38
>  %40 = fadd float %39, %27
>  %41 = call float @llvm.SI.load.const(<16 x i8> %37, i32 108)
>  %42 = call float @llvm.SI.load.const(<16 x i8> %37, i32 96)
>  %43 = fmul float %41, %32
>  %44 = fadd float %43, %42
>  %45 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <16 x i8>, <16 x i8> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = call float @llvm.SI.load.const(<16 x i8> %46, i32 108)
>  %48 = call float @llvm.SI.load.const(<16 x i8> %46, i32 100)
>  %49 = fmul float %47, %35
>  %50 = fadd float %49, %48
>  %51 = call float @llvm.SI.load.const(<16 x i8> %46, i32 108)
>  %52 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %53 = load <16 x i8>, <16 x i8> addrspace(2)* %52, align 16, !invariant.load !0
>  %54 = call float @llvm.SI.load.const(<16 x i8> %53, i32 104)
>  %55 = fmul float %51, %40
>  %56 = fadd float %55, %54
>  %57 = call float @llvm.SI.load.const(<16 x i8> %53, i32 0)
>  %58 = fmul float %57, %44
>  %59 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %60 = load <16 x i8>, <16 x i8> addrspace(2)* %59, align 16, !invariant.load !0
>  %61 = call float @llvm.SI.load.const(<16 x i8> %60, i32 4)
>  %62 = fmul float %61, %44
>  %63 = call float @llvm.SI.load.const(<16 x i8> %60, i32 12)
>  %64 = fmul float %63, %44
>  %65 = call float @llvm.SI.load.const(<16 x i8> %60, i32 16)
>  %66 = fmul float %65, %50
>  %67 = fadd float %66, %58
>  %68 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %69 = load <16 x i8>, <16 x i8> addrspace(2)* %68, align 16, !invariant.load !0
>  %70 = call float @llvm.SI.load.const(<16 x i8> %69, i32 20)
>  %71 = fmul float %70, %50
>  %72 = fadd float %71, %62
>  %73 = call float @llvm.SI.load.const(<16 x i8> %69, i32 28)
>  %74 = fmul float %73, %50
>  %75 = fadd float %74, %64
>  %76 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %77 = load <16 x i8>, <16 x i8> addrspace(2)* %76, align 16, !invariant.load !0
>  %78 = call float @llvm.SI.load.const(<16 x i8> %77, i32 32)
>  %79 = fmul float %78, %56
>  %80 = fadd float %79, %67
>  %81 = call float @llvm.SI.load.const(<16 x i8> %77, i32 36)
>  %82 = fmul float %81, %56
>  %83 = fadd float %82, %72
>  %84 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %85 = load <16 x i8>, <16 x i8> addrspace(2)* %84, align 16, !invariant.load !0
>  %86 = call float @llvm.SI.load.const(<16 x i8> %85, i32 44)
>  %87 = fmul float %86, %56
>  %88 = fadd float %87, %75
>  %89 = call float @llvm.SI.load.const(<16 x i8> %85, i32 48)
>  %90 = fadd float %80, %89
>  %91 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %92 = load <16 x i8>, <16 x i8> addrspace(2)* %91, align 16, !invariant.load !0
>  %93 = call float @llvm.SI.load.const(<16 x i8> %92, i32 52)
>  %94 = fadd float %83, %93
>  %95 = call float @llvm.SI.load.const(<16 x i8> %92, i32 60)
>  %96 = fadd float %88, %95
>  %97 = fmul float %96, 0x3FEFFF2E40000000
>  %98 = bitcast i32 %12 to float
>  %99 = insertvalue <{ float, float, float }> undef, float %98, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %90, float %94, float %97, float %96)
>  ret <{ float, float, float }> %99
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s6, s[0:3], 0x10                ; C2030110
>	s_buffer_load_dword s7, s[0:3], 0x11                ; C2038111
>	s_buffer_load_dword s14, s[0:3], 0x18               ; C2070118
>	s_buffer_load_dword s8, s[0:3], 0x12                ; C2040112
>	s_buffer_load_dword s11, s[0:3], 0x14               ; C2058114
>	s_buffer_load_dword s9, s[0:3], 0x1a                ; C204811A
>	s_buffer_load_dword s15, s[0:3], 0x19               ; C2078119
>	s_buffer_load_dword s10, s[0:3], 0x1b               ; C205011B
>	s_buffer_load_dword s12, s[0:3], 0x15               ; C2060115
>	s_buffer_load_dword s13, s[0:3], 0x16               ; C2068116
>	s_buffer_load_dword s16, s[0:3], 0x0                ; C2080100
>	s_buffer_load_dword s17, s[0:3], 0x1                ; C2088101
>	s_buffer_load_dword s18, s[0:3], 0x3                ; C2090103
>	s_buffer_load_dword s21, s[0:3], 0x7                ; C20A8107
>	s_buffer_load_dword s19, s[0:3], 0x4                ; C2098104
>	s_buffer_load_dword s20, s[0:3], 0x5                ; C20A0105
>	s_buffer_load_dword s24, s[0:3], 0xb                ; C20C010B
>	s_buffer_load_dword s5, s[0:3], 0xf                 ; C202810F
>	s_buffer_load_dword s22, s[0:3], 0x8                ; C20B0108
>	s_buffer_load_dword s23, s[0:3], 0x9                ; C20B8109
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_mov_b32_e32 v0, s14                               ; 7E00020E
>	s_buffer_load_dword s4, s[0:3], 0xd                 ; C202010D
>	s_buffer_load_dword s0, s[0:3], 0xc                 ; C200010C
>	v_mov_b32_e32 v1, s15                               ; 7E02020F
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_mov_b32_e32 v5, s9                                ; 7E0A0209
>	v_mul_f32_e32 v6, s6, v3                            ; 100C0606
>	v_mul_f32_e32 v7, s7, v3                            ; 100E0607
>	v_mul_f32_e32 v3, s8, v3                            ; 10060608
>	v_mac_f32_e32 v6, s11, v4                           ; 3E0C080B
>	v_mac_f32_e32 v7, s12, v4                           ; 3E0E080C
>	v_mac_f32_e32 v3, s13, v4                           ; 3E06080D
>	v_mac_f32_e32 v0, s10, v6                           ; 3E000C0A
>	v_mac_f32_e32 v5, s10, v3                           ; 3E0A060A
>	v_mac_f32_e32 v1, s10, v7                           ; 3E020E0A
>	v_mul_f32_e32 v3, s16, v0                           ; 10060010
>	v_mul_f32_e32 v4, s17, v0                           ; 10080011
>	v_mul_f32_e32 v0, s18, v0                           ; 10000012
>	v_mac_f32_e32 v0, s21, v1                           ; 3E000215
>	v_mac_f32_e32 v3, s19, v1                           ; 3E060213
>	v_mac_f32_e32 v4, s20, v1                           ; 3E080214
>	v_mac_f32_e32 v0, s24, v5                           ; 3E000A18
>	v_mac_f32_e32 v3, s22, v5                           ; 3E060A16
>	v_mac_f32_e32 v4, s23, v5                           ; 3E080A17
>	v_add_f32_e32 v0, s5, v0                            ; 06000005
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_add_f32_e32 v1, s0, v3                            ; 06020600
>	v_add_f32_e32 v3, s4, v4                            ; 06060804
>	v_mul_f32_e32 v4, 0x3f7ff972, v0                    ; 100800FF 3F7FF972
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                 ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 8
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 244 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 1.0 ; 7E0002F2
>	v_mov_b32_e32 v1, 1.0 ; 7E0202F2
>	v_mov_b32_e32 v2, 1.0 ; 7E0402F2
>	v_mov_b32_e32 v3, 1.0 ; 7E0602F2
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL CONST[0..9]
>DCL TEMP[0..11], LOCAL
>IMM[0] FLT32 {    2.0000,     0.3333,     0.0800,     0.3000}
>IMM[1] FLT32 {    1.0000,     0.0000,     1.8000,     0.4000}
>IMM[2] INT32 {1, 3, 4, 0}
>IMM[3] FLT32 {    0.9500,     3.0000,     0.9000,     0.0200}
>IMM[4] FLT32 {    0.7500,     0.6000,     0.2000,    -0.0400}
>IMM[5] FLT32 {    0.0300,     4.0000,     9.0000,     0.5000}
>IMM[6] FLT32 {    0.0100,     1.3000,     8.0000,     0.9999}
>IMM[7] FLT32 {   -1.0000,     1.0000,     0.0000,     0.0000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: MUL TEMP[1], CONST[0], CONST[7].xxxx
>  2: MAD TEMP[1], CONST[1], CONST[7].yyyy, TEMP[1]
>  3: MAD TEMP[1], CONST[2], CONST[7].zzzz, TEMP[1]
>  4: ADD TEMP[1].xyw, TEMP[1], CONST[3]
>  5: MOV TEMP[2].x, CONST[9].xxxx
>  6: MOV TEMP[3].x, CONST[9].yyyy
>  7: MAD TEMP[4].x, CONST[8].wwww, IMM[0].xxxx, CONST[9].zzzz
>  8: MAD TEMP[5].x, TEMP[4].xxxx, IMM[0].yyyy, IMM[0].zzzz
>  9: POW TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 10: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 11: MOV TEMP[6].x, IMM[1].xxxx
> 12: MOV TEMP[7].x, IMM[1].yyyy
> 13: POW TEMP[8].x, CONST[4].yyyy, IMM[1].wwww
> 14: RCP TEMP[8].x, TEMP[8].xxxx
> 15: MUL TEMP[8].x, IMM[1].zzzz, TEMP[8].xxxx
> 16: USEQ TEMP[9].x, TEMP[0].xxxx, IMM[2].xxxx
> 17: UIF TEMP[9].xxxx :0
> 18:   MOV_SAT TEMP[9].x, TEMP[4].xxxx
> 19:   ADD TEMP[9].x, IMM[1].xxxx, -TEMP[9].xxxx
> 20:   MUL TEMP[7].x, TEMP[9].xxxx, IMM[3].xxxx
> 21:   MAD TEMP[9].x, TEMP[4].xxxx, IMM[3].yyyy, IMM[1].xxxx
> 22:   MUL TEMP[2].x, CONST[9].xxxx, TEMP[9].xxxx
> 23:   MUL TEMP[9].x, TEMP[5].xxxx, IMM[3].zzzz
> 24:   ADD TEMP[9].x, IMM[1].xxxx, -TEMP[9].xxxx
> 25:   MUL TEMP[3].x, CONST[9].yyyy, TEMP[9].xxxx
> 26: ELSE :0
> 27:   USEQ TEMP[9].x, TEMP[0].xxxx, IMM[2].yyyy
> 28:   UIF TEMP[9].xxxx :0
> 29:     ADD TEMP[9].x, TEMP[2].xxxx, IMM[3].wwww
> 30:     MUL TEMP[9].x, TEMP[9].xxxx, IMM[4].xxxx
> 31:     MAD TEMP[10].x, TEMP[8].xxxx, IMM[1].wwww, IMM[4].yyyy
> 32:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 33:     MAD TEMP[10].x, TEMP[4].xxxx, IMM[4].zzzz, IMM[1].xxxx
> 34:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 35:     ADD TEMP[10].x, TEMP[3].xxxx, IMM[4].wwww
> 36:     MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 37:     ADD TEMP[11].x, IMM[1].xxxx, -TEMP[5].xxxx
> 38:     MUL TEMP[3].x, TEMP[10].xxxx, TEMP[11].xxxx
> 39:     RCP TEMP[10].x, TEMP[1].wwww
> 40:     MUL TEMP[10].xy, TEMP[1].xyyy, TEMP[10].xxxx
> 41:     DP2 TEMP[10].x, IN[0].xyyy, TEMP[10].xyyy
> 42:     MUL TEMP[10].x, -TEMP[10].xxxx, IMM[5].xxxx
> 43:     MAD TEMP[10].x, TEMP[10].xxxx, TEMP[8].xxxx, IMM[1].xxxx
> 44:     MUL TEMP[2].x, TEMP[9].xxxx, TEMP[10].xxxx
> 45:     ADD TEMP[11].x, IMM[5].yyyy, TEMP[4].xxxx
> 46:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[11].xxxx
> 47:     MUL TEMP[6].x, TEMP[9].xxxx, TEMP[10].xxxx
> 48:   ELSE :0
> 49:     USEQ TEMP[0].x, TEMP[0].xxxx, IMM[2].zzzz
> 50:     UIF TEMP[0].xxxx :0
> 51:       ADD TEMP[0].x, TEMP[3].xxxx, IMM[4].wwww
> 52:       MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 53:       MUL TEMP[0].x, IMM[0].xxxx, TEMP[0].xxxx
> 54:       ADD TEMP[5].x, IMM[1].xxxx, -TEMP[5].xxxx
> 55:       MUL TEMP[3].x, TEMP[0].xxxx, TEMP[5].xxxx
> 56:       MUL TEMP[0].x, TEMP[2].xxxx, IMM[5].zzzz
> 57:       MAD TEMP[5].x, TEMP[4].xxxx, IMM[5].wwww, IMM[1].xxxx
> 58:       MUL TEMP[6].x, TEMP[0].xxxx, TEMP[5].xxxx
> 59:       MUL TEMP[0].x, TEMP[1].wwww, IMM[6].xxxx
> 60:       MUL TEMP[1].x, TEMP[2].xxxx, IMM[6].yyyy
> 61:       MAD TEMP[0].x, TEMP[0].xxxx, TEMP[8].xxxx, TEMP[1].xxxx
> 62:       MAD TEMP[1].x, TEMP[4].xxxx, IMM[4].zzzz, IMM[1].xxxx
> 63:       MUL TEMP[2].x, TEMP[0].xxxx, TEMP[1].xxxx
> 64:     ENDIF
> 65:   ENDIF
> 66: ENDIF
> 67: MUL TEMP[0].x, TEMP[3].xxxx, IMM[6].zzzz
> 68: MUL TEMP[0].xyz, CONST[8].xyzz, TEMP[0].xxxx
> 69: MOV TEMP[0].w, IMM[1].xxxx
> 70: FSGE TEMP[1].x, IMM[1].yyyy, TEMP[3].xxxx
> 71: UCMP TEMP[6].x, TEMP[1].xxxx, IMM[1].yyyy, TEMP[6].xxxx
> 72: UCMP TEMP[2].x, TEMP[1].xxxx, IMM[1].yyyy, TEMP[2].xxxx
> 73: MUL TEMP[1].xy, IMM[7].xyyy, IN[0].yxxx
> 74: MUL TEMP[1].xy, TEMP[1].xyyy, IN[0].zzzz
> 75: MUL TEMP[1].xy, TEMP[1].xyyy, TEMP[6].xxxx
> 76: MUL TEMP[3].x, TEMP[2].xxxx, IN[0].yyyy
> 77: MUL TEMP[2].x, TEMP[2].xxxx, IN[0].xxxx
> 78: MUL TEMP[2].xyz, TEMP[2].xxxx, CONST[5].xyzz
> 79: MAD TEMP[2].xyz, TEMP[3].xxxx, CONST[6].xyzz, TEMP[2].xyzz
> 80: ADD TEMP[2].xyz, CONST[7].xyzz, TEMP[2].xyzz
> 81: MUL TEMP[3].xyz, TEMP[1].xxxx, CONST[5].xyzz
> 82: MAD TEMP[3].xyz, TEMP[1].yyyy, CONST[6].xyzz, TEMP[3].xyzz
> 83: ADD TEMP[1].xyz, TEMP[2].xyzz, TEMP[3].xyzz
> 84: MUL TEMP[2], CONST[0], TEMP[1].xxxx
> 85: MAD TEMP[2], CONST[1], TEMP[1].yyyy, TEMP[2]
> 86: MAD TEMP[1], CONST[2], TEMP[1].zzzz, TEMP[2]
> 87: ADD TEMP[1].xyw, TEMP[1], CONST[3]
> 88: MOV TEMP[2].xyw, TEMP[1].xyxw
> 89: MUL TEMP[1].x, TEMP[1].wwww, IMM[6].wwww
> 90: MOV TEMP[2].z, TEMP[1].xxxx
> 91: MOV TEMP[1].xy, IN[2].xyxx
> 92: ADD TEMP[3].x, IMM[1].xxxx, -TEMP[7].xxxx
> 93: RCP TEMP[3].x, TEMP[3].xxxx
> 94: MOV TEMP[1].z, TEMP[3].xxxx
> 95: MOV OUT[2].xyz, TEMP[1].xyzx
> 96: MOV OUT[0], TEMP[2]
> 97: MOV OUT[1], TEMP[0]
> 98: END
>radeonsi: Compiling shader 51
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %16)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fptosi float %26 to i32
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call float @llvm.SI.load.const(<16 x i8> %34, i32 0)
>  %36 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %37 = fmul float %35, %36
>  %38 = call float @llvm.SI.load.const(<16 x i8> %34, i32 4)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %40 = fmul float %38, %39
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 12)
>  %44 = call float @llvm.SI.load.const(<16 x i8> %42, i32 112)
>  %45 = fmul float %43, %44
>  %46 = call float @llvm.SI.load.const(<16 x i8> %42, i32 16)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %42, i32 116)
>  %48 = fmul float %46, %47
>  %49 = fadd float %48, %37
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 20)
>  %53 = call float @llvm.SI.load.const(<16 x i8> %51, i32 116)
>  %54 = fmul float %52, %53
>  %55 = fadd float %54, %40
>  %56 = call float @llvm.SI.load.const(<16 x i8> %51, i32 28)
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 116)
>  %60 = fmul float %56, %59
>  %61 = fadd float %60, %45
>  %62 = call float @llvm.SI.load.const(<16 x i8> %58, i32 32)
>  %63 = call float @llvm.SI.load.const(<16 x i8> %58, i32 120)
>  %64 = fmul float %62, %63
>  %65 = fadd float %64, %49
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 36)
>  %69 = call float @llvm.SI.load.const(<16 x i8> %67, i32 120)
>  %70 = fmul float %68, %69
>  %71 = fadd float %70, %55
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 44)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 120)
>  %76 = fmul float %72, %75
>  %77 = fadd float %76, %61
>  %78 = call float @llvm.SI.load.const(<16 x i8> %74, i32 48)
>  %79 = fadd float %65, %78
>  %80 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !invariant.load !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 52)
>  %83 = fadd float %71, %82
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 60)
>  %85 = fadd float %77, %84
>  %86 = call float @llvm.SI.load.const(<16 x i8> %81, i32 144)
>  %87 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %88 = load <16 x i8>, <16 x i8> addrspace(2)* %87, align 16, !invariant.load !0
>  %89 = call float @llvm.SI.load.const(<16 x i8> %88, i32 148)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %88, i32 140)
>  %91 = call float @llvm.SI.load.const(<16 x i8> %88, i32 152)
>  %92 = fmul float %90, 2.000000e+00
>  %93 = fadd float %92, %91
>  %94 = fmul float %93, 0x3FD5555560000000
>  %95 = fadd float %94, 0x3FB47AE140000000
>  %96 = call float @llvm.pow.f32(float %95, float 0x3FD3333340000000)
>  %97 = call float @llvm.AMDGPU.clamp.(float %96, float 0.000000e+00, float 1.000000e+00)
>  %98 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %99 = load <16 x i8>, <16 x i8> addrspace(2)* %98, align 16, !invariant.load !0
>  %100 = call float @llvm.SI.load.const(<16 x i8> %99, i32 68)
>  %101 = call float @llvm.pow.f32(float %100, float 0x3FD99999A0000000)
>  %102 = fdiv float 1.000000e+00, %101, !fpmath !1
>  %103 = fmul float %102, 0x3FFCCCCCC0000000
>  %104 = icmp eq i32 %32, 1
>  br i1 %104, label %if17, label %else26
>
>if17:                                             ; preds = %main_body
>  %105 = call float @llvm.AMDGPU.clamp.(float %93, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 1.000000e+00, %105
>  %107 = fmul float %106, 0x3FEE666660000000
>  %108 = fmul float %93, 3.000000e+00
>  %109 = fadd float %108, 1.000000e+00
>  %110 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %111 = load <16 x i8>, <16 x i8> addrspace(2)* %110, align 16, !invariant.load !0
>  %112 = call float @llvm.SI.load.const(<16 x i8> %111, i32 144)
>  %113 = fmul float %112, %109
>  %114 = fmul float %97, 0x3FECCCCCC0000000
>  %115 = fsub float 1.000000e+00, %114
>  %116 = call float @llvm.SI.load.const(<16 x i8> %111, i32 148)
>  %117 = fmul float %116, %115
>  br label %endif66
>
>else26:                                           ; preds = %main_body
>  %118 = icmp eq i32 %32, 3
>  br i1 %118, label %if28, label %else48
>
>if28:                                             ; preds = %else26
>  %119 = fadd float %86, 0x3F947AE140000000
>  %120 = fmul float %119, 7.500000e-01
>  %121 = fmul float %103, 0x3FD99999A0000000
>  %122 = fadd float %121, 0x3FE3333340000000
>  %123 = fmul float %120, %122
>  %124 = fmul float %93, 0x3FC99999A0000000
>  %125 = fadd float %124, 1.000000e+00
>  %126 = fmul float %123, %125
>  %127 = fadd float %89, 0xBFA47AE140000000
>  %128 = call float @llvm.AMDGPU.clamp.(float %127, float 0.000000e+00, float 1.000000e+00)
>  %129 = fsub float 1.000000e+00, %97
>  %130 = fmul float %128, %129
>  %131 = fdiv float 1.000000e+00, %85, !fpmath !1
>  %132 = fmul float %79, %131
>  %133 = fmul float %83, %131
>  %134 = fmul float %20, %132
>  %135 = fmul float %21, %133
>  %136 = fadd float %134, %135
>  %137 = fmul float %136, 0xBF9EB851E0000000
>  %138 = fmul float %137, %103
>  %139 = fadd float %138, 1.000000e+00
>  %140 = fmul float %126, %139
>  %141 = fadd float %93, 4.000000e+00
>  %142 = fmul float %126, %141
>  %143 = fmul float %142, %139
>  br label %endif66
>
>else48:                                           ; preds = %else26
>  %144 = icmp eq i32 %32, 4
>  br i1 %144, label %if50, label %endif66
>
>if50:                                             ; preds = %else48
>  %145 = fadd float %89, 0xBFA47AE140000000
>  %146 = call float @llvm.AMDGPU.clamp.(float %145, float 0.000000e+00, float 1.000000e+00)
>  %147 = fmul float %146, 2.000000e+00
>  %148 = fsub float 1.000000e+00, %97
>  %149 = fmul float %147, %148
>  %150 = fmul float %86, 9.000000e+00
>  %151 = fmul float %93, 5.000000e-01
>  %152 = fadd float %151, 1.000000e+00
>  %153 = fmul float %150, %152
>  %154 = fmul float %85, 0x3F847AE140000000
>  %155 = fmul float %86, 0x3FF4CCCCC0000000
>  %156 = fmul float %154, %103
>  %157 = fadd float %156, %155
>  %158 = fmul float %93, 0x3FC99999A0000000
>  %159 = fadd float %158, 1.000000e+00
>  %160 = fmul float %157, %159
>  br label %endif66
>
>endif66:                                          ; preds = %if28, %if50, %else48, %if17
>  %.08 = phi float [ %107, %if17 ], [ 0.000000e+00, %else48 ], [ 0.000000e+00, %if50 ], [ 0.000000e+00, %if28 ]
>  %.27 = phi float [ 1.000000e+00, %if17 ], [ 1.000000e+00, %else48 ], [ %153, %if50 ], [ %143, %if28 ]
>  %.24 = phi float [ %117, %if17 ], [ %89, %else48 ], [ %149, %if50 ], [ %130, %if28 ]
>  %.2 = phi float [ %113, %if17 ], [ %86, %else48 ], [ %160, %if50 ], [ %140, %if28 ]
>  %161 = fmul float %.24, 8.000000e+00
>  %162 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %163 = load <16 x i8>, <16 x i8> addrspace(2)* %162, align 16, !invariant.load !0
>  %164 = call float @llvm.SI.load.const(<16 x i8> %163, i32 128)
>  %165 = fmul float %164, %161
>  %166 = call float @llvm.SI.load.const(<16 x i8> %163, i32 132)
>  %167 = fmul float %166, %161
>  %168 = call float @llvm.SI.load.const(<16 x i8> %163, i32 136)
>  %169 = fmul float %168, %161
>  %170 = fcmp ole float %.24, 0.000000e+00
>  %171 = select i1 %170, float 0.000000e+00, float %.27
>  %172 = select i1 %170, float 0.000000e+00, float %.2
>  %173 = fmul float %21, %22
>  %174 = fmul float %20, %22
>  %175 = fmul float %173, %171
>  %176 = fsub float -0.000000e+00, %175
>  %177 = fmul float %174, %171
>  %178 = fmul float %172, %21
>  %179 = fmul float %172, %20
>  %180 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %181 = load <16 x i8>, <16 x i8> addrspace(2)* %180, align 16, !invariant.load !0
>  %182 = call float @llvm.SI.load.const(<16 x i8> %181, i32 80)
>  %183 = fmul float %179, %182
>  %184 = call float @llvm.SI.load.const(<16 x i8> %181, i32 84)
>  %185 = fmul float %179, %184
>  %186 = call float @llvm.SI.load.const(<16 x i8> %181, i32 88)
>  %187 = fmul float %179, %186
>  %188 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %189 = load <16 x i8>, <16 x i8> addrspace(2)* %188, align 16, !invariant.load !0
>  %190 = call float @llvm.SI.load.const(<16 x i8> %189, i32 96)
>  %191 = fmul float %178, %190
>  %192 = fadd float %191, %183
>  %193 = call float @llvm.SI.load.const(<16 x i8> %189, i32 100)
>  %194 = fmul float %178, %193
>  %195 = fadd float %194, %185
>  %196 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %197 = load <16 x i8>, <16 x i8> addrspace(2)* %196, align 16, !invariant.load !0
>  %198 = call float @llvm.SI.load.const(<16 x i8> %197, i32 104)
>  %199 = fmul float %178, %198
>  %200 = fadd float %199, %187
>  %201 = call float @llvm.SI.load.const(<16 x i8> %197, i32 112)
>  %202 = fadd float %201, %192
>  %203 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %204 = load <16 x i8>, <16 x i8> addrspace(2)* %203, align 16, !invariant.load !0
>  %205 = call float @llvm.SI.load.const(<16 x i8> %204, i32 116)
>  %206 = fadd float %205, %195
>  %207 = call float @llvm.SI.load.const(<16 x i8> %204, i32 120)
>  %208 = fadd float %207, %200
>  %209 = call float @llvm.SI.load.const(<16 x i8> %204, i32 80)
>  %210 = fmul float %209, %176
>  %211 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %212 = load <16 x i8>, <16 x i8> addrspace(2)* %211, align 16, !invariant.load !0
>  %213 = call float @llvm.SI.load.const(<16 x i8> %212, i32 84)
>  %214 = fmul float %213, %176
>  %215 = call float @llvm.SI.load.const(<16 x i8> %212, i32 88)
>  %216 = fmul float %215, %176
>  %217 = call float @llvm.SI.load.const(<16 x i8> %212, i32 96)
>  %218 = fmul float %177, %217
>  %219 = fadd float %218, %210
>  %220 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %221 = load <16 x i8>, <16 x i8> addrspace(2)* %220, align 16, !invariant.load !0
>  %222 = call float @llvm.SI.load.const(<16 x i8> %221, i32 100)
>  %223 = fmul float %177, %222
>  %224 = fadd float %223, %214
>  %225 = call float @llvm.SI.load.const(<16 x i8> %221, i32 104)
>  %226 = fmul float %177, %225
>  %227 = fadd float %226, %216
>  %228 = fadd float %202, %219
>  %229 = fadd float %206, %224
>  %230 = fadd float %208, %227
>  %231 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %232 = load <16 x i8>, <16 x i8> addrspace(2)* %231, align 16, !invariant.load !0
>  %233 = call float @llvm.SI.load.const(<16 x i8> %232, i32 0)
>  %234 = fmul float %233, %228
>  %235 = call float @llvm.SI.load.const(<16 x i8> %232, i32 4)
>  %236 = fmul float %235, %228
>  %237 = call float @llvm.SI.load.const(<16 x i8> %232, i32 12)
>  %238 = fmul float %237, %228
>  %239 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %240 = load <16 x i8>, <16 x i8> addrspace(2)* %239, align 16, !invariant.load !0
>  %241 = call float @llvm.SI.load.const(<16 x i8> %240, i32 16)
>  %242 = fmul float %241, %229
>  %243 = fadd float %242, %234
>  %244 = call float @llvm.SI.load.const(<16 x i8> %240, i32 20)
>  %245 = fmul float %244, %229
>  %246 = fadd float %245, %236
>  %247 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %248 = load <16 x i8>, <16 x i8> addrspace(2)* %247, align 16, !invariant.load !0
>  %249 = call float @llvm.SI.load.const(<16 x i8> %248, i32 28)
>  %250 = fmul float %249, %229
>  %251 = fadd float %250, %238
>  %252 = call float @llvm.SI.load.const(<16 x i8> %248, i32 32)
>  %253 = fmul float %252, %230
>  %254 = fadd float %253, %243
>  %255 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %256 = load <16 x i8>, <16 x i8> addrspace(2)* %255, align 16, !invariant.load !0
>  %257 = call float @llvm.SI.load.const(<16 x i8> %256, i32 36)
>  %258 = fmul float %257, %230
>  %259 = fadd float %258, %246
>  %260 = call float @llvm.SI.load.const(<16 x i8> %256, i32 44)
>  %261 = fmul float %260, %230
>  %262 = fadd float %261, %251
>  %263 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %264 = load <16 x i8>, <16 x i8> addrspace(2)* %263, align 16, !invariant.load !0
>  %265 = call float @llvm.SI.load.const(<16 x i8> %264, i32 48)
>  %266 = fadd float %254, %265
>  %267 = call float @llvm.SI.load.const(<16 x i8> %264, i32 52)
>  %268 = fadd float %259, %267
>  %269 = call float @llvm.SI.load.const(<16 x i8> %264, i32 60)
>  %270 = fadd float %262, %269
>  %271 = fmul float %270, 0x3FEFFF2E40000000
>  %272 = fsub float 1.000000e+00, %.08
>  %273 = fdiv float 1.000000e+00, %272, !fpmath !1
>  %274 = bitcast i32 %12 to float
>  %275 = insertvalue <{ float, float, float }> undef, float %274, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %165, float %167, float %169, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %30, float %31, float %273, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %266, float %268, float %271, float %270)
>  ret <{ float, float, float }> %275
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0], LOCAL
>IMM[0] FLT32 {    1.5000,     1.0000,     3.0000,    -0.0625}
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].w, TEMP[0], SAMP[0], 2D
>  2: POW TEMP[0].x, TEMP[0].wwww, IMM[0].zzzz
>  3: MUL TEMP[0].x, TEMP[0].xxxx, IN[0].wwww
>  4: ADD TEMP[0].x, IMM[0].yyyy, -TEMP[0].xxxx
>  5: POW TEMP[0].x, TEMP[0].xxxx, IN[1].zzzz
>  6: ADD TEMP[0].x, IMM[0].xxxx, -TEMP[0].xxxx
>  7: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
>  8: MAD TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx, IMM[0].wwww
>  9: MUL TEMP[0].xyz, IN[0].xyzz, TEMP[0].xxxx
> 10: MOV OUT[0], TEMP[0].xyzz
> 11: END
>radeonsi: Compiling shader 52
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 3
>  %40 = call float @llvm.pow.f32(float %39, float 3.000000e+00)
>  %41 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %42 = fmul float %40, %41
>  %43 = fsub float 1.000000e+00, %42
>  %44 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %45 = call float @llvm.pow.f32(float %43, float %44)
>  %46 = fsub float 1.500000e+00, %45
>  %47 = fmul float %46, %46
>  %48 = fmul float %47, %47
>  %49 = fadd float %48, -6.250000e-02
>  %50 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %51 = fmul float %50, %49
>  %52 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %53 = fmul float %52, %49
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %55 = fmul float %54, %49
>  %56 = bitcast float %5 to i32
>  %57 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %56, 10
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %57, float %51, 11
>  %59 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %58, float %53, 12
>  %60 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %59, float %55, 13
>  %61 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %60, float %55, 14
>  %62 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %61, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %62
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	v_mov_b32_e32 v3, 0x3eaaaaab                            ; 7E0602FF 3EAAAAAB
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                      ; C0820300
>	buffer_load_format_xyzw v[21:24], v5, s[12:15], 0 idxen ; E00C2000 80031505
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s19, s[4:7], 0x26                   ; C2098526
>	s_buffer_load_dword s18, s[4:7], 0x23                   ; C2090523
>	s_buffer_load_dword s14, s[4:7], 0x3                    ; C2070503
>	s_buffer_load_dword s26, s[4:7], 0x1c                   ; C20D051C
>	s_buffer_load_dword s24, s[4:7], 0x1d                   ; C20C051D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v12, s19                                  ; 7E180213
>	v_mac_f32_e64 v12, 2.0, s18                             ; D23E000C 000024F4
>	v_madak_f32_e32 v3, v3, v12, 0x3da3d70a                 ; 42061903 3DA3D70A
>	v_log_f32_e32 v3, v3                                    ; 7E064F03
>	s_buffer_load_dword s25, s[4:7], 0x1e                   ; C20C851E
>	s_buffer_load_dword s12, s[4:7], 0x7                    ; C2060507
>	s_buffer_load_dword s8, s[4:7], 0xb                     ; C204050B
>	v_mul_legacy_f32_e32 v3, 0x3e99999a, v3                 ; 0E0606FF 3E99999A
>	v_exp_f32_e32 v3, v3                                    ; 7E064B03
>	v_add_f32_e64 v15, v3, 0 clamp                          ; D206080F 00010103
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_buffer_load_dword s17, s[4:7], 0x24                   ; C2088524
>	s_buffer_load_dword s16, s[4:7], 0x25                   ; C2080525
>	s_buffer_load_dword s0, s[4:7], 0x0                     ; C2000500
>	s_buffer_load_dword s15, s[4:7], 0x1                    ; C2078501
>	s_buffer_load_dword s13, s[4:7], 0x4                    ; C2068504
>	s_buffer_load_dword s11, s[4:7], 0x5                    ; C2058505
>	s_buffer_load_dword s2, s[4:7], 0xd                     ; C201050D
>	s_buffer_load_dword s1, s[4:7], 0xf                     ; C200850F
>	s_buffer_load_dword s10, s[4:7], 0x8                    ; C2050508
>	s_buffer_load_dword s9, s[4:7], 0x9                     ; C2048509
>	s_buffer_load_dword s3, s[4:7], 0xc                     ; C201850C
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_mov_b32_e32 v10, s26                                  ; 7E14021A
>	v_mov_b32_e32 v20, s14                                  ; 7E28020E
>	v_mov_b32_e32 v1, s24                                   ; 7E020218
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v18, s12                                  ; 7E24020C
>	v_mov_b32_e32 v0, s25                                   ; 7E000219
>	v_mov_b32_e32 v19, s8                                   ; 7E260208
>	v_mov_b32_e32 v13, s17                                  ; 7E1A0211
>	v_mov_b32_e32 v14, s16                                  ; 7E1C0210
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_cvt_i32_f32_e32 v17, v21                              ; 7E221115
>	v_cmp_ne_u32_e32 vcc, 1, v17                            ; 7D8A2281
>	s_and_saveexec_b64 s[18:19], vcc                        ; BE92246A
>	s_xor_b64 s[18:19], exec, s[18:19]                      ; 8992127E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_execz BB0_8                                   ; BF880000
>	s_buffer_load_dword s20, s[4:7], 0x11                   ; C20A0511
>	v_mul_f32_e32 v5, s26, v20                              ; 100A281A
>	v_mac_f32_e32 v5, s24, v18                              ; 3E0A2418
>	v_mac_f32_e32 v5, s25, v19                              ; 3E0A2619
>	v_cmp_ne_u32_e32 vcc, 3, v17                            ; 7D8A2283
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_log_f32_e32 v6, s20                                   ; 7E0C4E14
>	v_mul_legacy_f32_e32 v6, 0x3ecccccd, v6                 ; 0E0C0CFF 3ECCCCCD
>	v_exp_f32_e32 v6, v6                                    ; 7E0C4B06
>	v_rcp_f32_e32 v11, v6                                   ; 7E165506
>	v_add_f32_e32 v6, s1, v5                                ; 060C0A01
>	v_mul_f32_e32 v5, 0x3fe66666, v11                       ; 100A16FF 3FE66666
>	s_and_saveexec_b64 s[20:21], vcc                        ; BE94246A
>	s_xor_b64 s[20:21], exec, s[20:21]                      ; 8994147E
>	s_cbranch_execz BB0_5                                   ; BF880000
>	v_cmp_eq_u32_e32 vcc, 4, v17                            ; 7D842284
>	v_mov_b32_e32 v11, 0                                    ; 7E160280
>	v_mov_b32_e32 v16, 1.0                                  ; 7E2002F2
>	s_and_saveexec_b64 s[22:23], vcc                        ; BE96246A
>	s_xor_b64 s[22:23], exec, s[22:23]                      ; 8996167E
>	s_cbranch_execz BB0_4                                   ; BF880000
>	v_mov_b32_e32 v11, 0xbd23d70a                           ; 7E1602FF BD23D70A
>	v_add_f32_e32 v11, s16, v11                             ; 06161610
>	v_add_f32_e64 v11, v11, 0 clamp                         ; D206080B 0001010B
>	v_add_f32_e32 v11, v11, v11                             ; 0616170B
>	v_mad_f32 v14, -v15, v11, v11                           ; D282000E 242E170F
>	v_mov_b32_e32 v11, 0x41100000                           ; 7E1602FF 41100000
>	v_mov_b32_e32 v13, 0x3fa66666                           ; 7E1A02FF 3FA66666
>	v_mul_f32_e32 v16, s17, v11                             ; 10201611
>	v_mul_f32_e32 v11, 0.5, v12                             ; 101618F0
>	v_mac_f32_e32 v16, v16, v11                             ; 3E201710
>	v_mul_f32_e32 v11, 0x3c23d70a, v6                       ; 10160CFF 3C23D70A
>	v_mul_f32_e32 v13, s17, v13                             ; 101A1A11
>	v_mac_f32_e32 v13, v5, v11                              ; 3E1A1705
>	v_mul_f32_e32 v11, 0x3e4ccccd, v12                      ; 101618FF 3E4CCCCD
>	v_mac_f32_e32 v13, v13, v11                             ; 3E1A170D
>	v_mov_b32_e32 v11, 0                                    ; 7E160280
>	s_or_b64 exec, exec, s[22:23]                           ; 88FE167E
>	s_or_saveexec_b64 s[20:21], s[20:21]                    ; BE942514
>	s_xor_b64 exec, exec, s[20:21]                          ; 89FE147E
>	s_cbranch_execz BB0_7                                   ; BF880000
>	v_mul_f32_e32 v11, s0, v10                              ; 10161400
>	v_mul_f32_e32 v13, s15, v10                             ; 101A140F
>	v_rcp_f32_e32 v6, v6                                    ; 7E0C5506
>	v_mac_f32_e32 v11, s13, v1                              ; 3E16020D
>	v_mac_f32_e32 v13, s11, v1                              ; 3E1A020B
>	v_mac_f32_e32 v11, s10, v0                              ; 3E16000A
>	v_mac_f32_e32 v13, s9, v0                               ; 3E1A0009
>	v_add_f32_e32 v11, s3, v11                              ; 06161603
>	v_add_f32_e32 v16, s2, v13                              ; 06201A02
>	v_mov_b32_e32 v13, 0x3ca3d70a                           ; 7E1A02FF 3CA3D70A
>	v_add_f32_e32 v13, s17, v13                             ; 061A1A11
>	v_mov_b32_e32 v14, 0x3ecccccd                           ; 7E1C02FF 3ECCCCCD
>	v_mul_f32_e32 v11, v6, v11                              ; 10161706
>	v_mul_f32_e32 v6, v6, v16                               ; 100C2106
>	v_mul_f32_e32 v6, v6, v8                                ; 100C1106
>	v_mul_f32_e32 v13, 0x3f400000, v13                      ; 101A1AFF 3F400000
>	v_madak_f32_e32 v14, v14, v5, 0x3f19999a                ; 421C0B0E 3F19999A
>	v_mac_f32_e32 v6, v11, v7                               ; 3E0C0F0B
>	v_mul_f32_e32 v13, v14, v13                             ; 101A1B0E
>	v_mul_f32_e32 v14, 0x3e4ccccd, v12                      ; 101C18FF 3E4CCCCD
>	v_mac_f32_e32 v13, v13, v14                             ; 3E1A1D0D
>	v_mov_b32_e32 v14, 0xbd23d70a                           ; 7E1C02FF BD23D70A
>	v_mul_f32_e32 v6, 0xbcf5c28f, v6                        ; 100C0CFF BCF5C28F
>	v_add_f32_e32 v14, s16, v14                             ; 061C1C10
>	v_mul_f32_e32 v5, v5, v6                                ; 100A0D05
>	v_add_f32_e32 v6, 4.0, v12                              ; 060C18F6
>	v_mul_f32_e32 v16, v6, v13                              ; 10201B06
>	v_add_f32_e64 v14, v14, 0 clamp                         ; D206080E 0001010E
>	v_mad_f32 v14, -v15, v14, v14                           ; D282000E 243A1D0F
>	v_mac_f32_e32 v13, v13, v5                              ; 3E1A0B0D
>	v_mac_f32_e32 v16, v16, v5                              ; 3E200B10
>	v_mov_b32_e32 v11, 0                                    ; 7E160280
>	s_or_b64 exec, exec, s[20:21]                           ; 88FE147E
>	s_or_saveexec_b64 s[18:19], s[18:19]                    ; BE922512
>	s_xor_b64 exec, exec, s[18:19]                          ; 89FE127E
>	v_add_f32_e64 v5, v12, 0 clamp                          ; D2060805 0001010C
>	v_mov_b32_e32 v6, 0x3f733333                            ; 7E0C02FF 3F733333
>	v_mad_f32 v11, -v5, v6, v6                              ; D282000B 241A0D05
>	v_mul_f32_e32 v5, 0x40400000, v12                       ; 100A18FF 40400000
>	v_mad_f32 v13, v5, s17, s17                             ; D282000D 00442305
>	v_mul_f32_e32 v5, 0xbf666666, v15                       ; 100A1EFF BF666666
>	v_mad_f32 v14, v5, s16, s16                             ; D282000E 00402105
>	v_mov_b32_e32 v16, 1.0                                  ; 7E2002F2
>	s_or_b64 exec, exec, s[18:19]                           ; 88FE127E
>	s_buffer_load_dword s17, s[4:7], 0x20                   ; C2088520
>	s_buffer_load_dword s18, s[4:7], 0x21                   ; C2090521
>	s_buffer_load_dword s19, s[4:7], 0x22                   ; C2098522
>	v_mul_f32_e32 v5, 0x41000000, v14                       ; 100A1CFF 41000000
>	s_buffer_load_dword s16, s[4:7], 0x1a                   ; C208051A
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v6, s17, v5                               ; 100C0A11
>	v_mul_f32_e32 v12, s18, v5                              ; 10180A12
>	v_mul_f32_e32 v5, s19, v5                               ; 100A0A13
>	s_buffer_load_dword s17, s[4:7], 0x14                   ; C2088514
>	s_buffer_load_dword s18, s[4:7], 0x15                   ; C2090515
>	s_buffer_load_dword s19, s[4:7], 0x16                   ; C2098516
>	s_buffer_load_dword s20, s[4:7], 0x18                   ; C20A0518
>	s_buffer_load_dword s4, s[4:7], 0x19                    ; C2020519
>	v_cmp_ge_f32_e32 vcc, 0, v14                            ; 7C0C1C80
>	v_mul_f32_e32 v15, v9, v8                               ; 101E1109
>	v_cndmask_b32_e64 v14, v16, 0, vcc                      ; D200000E 01A90110
>	v_cndmask_b32_e64 v13, v13, 0, vcc                      ; D200000D 01A9010D
>	v_mul_f32_e32 v9, v9, v7                                ; 10120F09
>	v_mul_f32_e32 v7, v7, v13                               ; 100E1B07
>	v_mul_f32_e32 v15, v14, v15                             ; 101E1F0E
>	v_mul_f32_e32 v8, v8, v13                               ; 10101B08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mad_f32 v10, s17, v7, v10                             ; D282000A 042A0E11
>	v_mad_f32 v1, s18, v7, v1                               ; D2820001 04060E12
>	v_mad_f32 v0, s19, v7, v0                               ; D2820000 04020E13
>	v_mul_f32_e32 v9, v14, v9                               ; 1012130E
>	v_mul_f32_e32 v7, s17, v15                              ; 100E1E11
>	v_mac_f32_e32 v10, s20, v8                              ; 3E141014
>	v_mad_f32 v7, v9, s20, -v7                              ; D2820007 841C2909
>	v_mac_f32_e32 v1, s4, v8                                ; 3E021004
>	v_mac_f32_e32 v0, s16, v8                               ; 3E001010
>	v_mul_f32_e32 v8, s18, v15                              ; 10101E12
>	v_mad_f32 v8, v9, s4, -v8                               ; D2820008 84200909
>	v_mul_f32_e32 v13, s19, v15                             ; 101A1E13
>	v_add_f32_e32 v7, v7, v10                               ; 060E1507
>	v_mad_f32 v9, v9, s16, -v13                             ; D2820009 84342109
>	v_add_f32_e32 v1, v8, v1                                ; 06020308
>	v_mul_f32_e32 v8, s0, v7                                ; 10100E00
>	v_add_f32_e32 v0, v9, v0                                ; 06000109
>	v_mul_f32_e32 v9, s15, v7                               ; 10120E0F
>	v_mul_f32_e32 v7, s14, v7                               ; 100E0E0E
>	v_mac_f32_e32 v8, s13, v1                               ; 3E10020D
>	v_mac_f32_e32 v9, s11, v1                               ; 3E12020B
>	v_mac_f32_e32 v7, s12, v1                               ; 3E0E020C
>	v_mac_f32_e32 v8, s10, v0                               ; 3E10000A
>	v_mac_f32_e32 v7, s8, v0                                ; 3E0E0008
>	v_mac_f32_e32 v9, s9, v0                                ; 3E120009
>	v_add_f32_e32 v0, s3, v8                                ; 06001003
>	v_sub_f32_e32 v8, 1.0, v11                              ; 081016F2
>	v_rcp_f32_e32 v8, v8                                    ; 7E105508
>	v_mov_b32_e32 v10, 1.0                                  ; 7E1402F2
>	exp 15, 32, 0, 0, 0, v6, v12, v5, v10                   ; F800020F 0A050C06
>	v_add_f32_e32 v7, s1, v7                                ; 060E0E01
>	v_add_f32_e32 v1, s2, v9                                ; 06021202
>	v_mul_f32_e32 v9, 0x3f7ff972, v7                        ; 10120EFF 3F7FF972
>	exp 15, 33, 0, 0, 0, v3, v4, v8, v0                     ; F800021F 00080403
>	exp 15, 12, 0, 1, 0, v0, v1, v9, v7                     ; F80008CF 07090100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 28
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 992 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 9
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                              ; BE86047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                  ; C080050C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                  ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]            ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                  ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]            ; C8050503
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_and_b32 s0, s0, s19                               ; 87001300
>	s_and_b64 exec, exec, s[6:7]                        ; 87FE067E
>	image_sample v0, v[0:1], s[12:19], s[0:3] dmask:0x8 ; F0800800 00030000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_log_f32_e32 v0, v0                                ; 7E004F00
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                  ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]            ; C8050303
>	v_interp_p1_f32 v4, v2, 2, 1, [m0]                  ; C8100602
>	v_mul_legacy_f32_e32 v0, 0x40400000, v0             ; 0E0000FF 40400000
>	v_exp_f32_e32 v0, v0                                ; 7E004B00
>	v_mad_f32 v0, -v0, v1, 1.0                          ; D2820000 23CA0300
>	v_log_f32_e32 v0, v0                                ; 7E004F00
>	v_interp_p2_f32 v4, [v4], v3, 2, 1, [m0]            ; C8110603
>	v_interp_p1_f32 v1, v2, 0, 0, [m0]                  ; C8040002
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]            ; C8050003
>	v_mul_legacy_f32_e32 v0, v4, v0                     ; 0E000104
>	v_exp_f32_e32 v0, v0                                ; 7E004B00
>	v_sub_f32_e32 v0, 0x3fc00000, v0                    ; 080000FF 3FC00000
>	v_mul_f32_e32 v0, v0, v0                            ; 10000100
>	v_madak_f32_e32 v4, v0, v0, 0xbd800000              ; 42080100 BD800000
>	v_mul_f32_e32 v0, v4, v1                            ; 10000304
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                  ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]            ; C8050103
>	v_interp_p1_f32 v2, v2, 2, 0, [m0]                  ; C8080202
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]            ; C8090203
>	v_mul_f32_e32 v2, v4, v2                            ; 10040504
>	v_mul_f32_e32 v1, v4, v1                            ; 10020304
>	v_mov_b32_e32 v3, v2                                ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 192 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL CONST[0..231]
>DCL TEMP[0..8], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    0.0000,     1.0000,    -0.0004,     6.2830}
>IMM[1] INT32 {3, 1, 2, 0}
>IMM[2] FLT32 {   -0.5000,     0.5000,     1.0000,    -1.0000}
>  0: F2I TEMP[0], IN[2]
>  1: MOV TEMP[1].w, IN[0].wwww
>  2: MUL TEMP[1].xyz, IN[0].xyzz, CONST[231].xyzz
>  3: MOV TEMP[2].xyz, IMM[0].xxxx
>  4: MOV TEMP[2].w, CONST[4].xxxx
>  5: MOV TEMP[3].xyz, IMM[0].xxxx
>  6: MOV TEMP[3].w, CONST[4].yyyy
>  7: MOV TEMP[4].xyz, IMM[0].xxxx
>  8: MOV TEMP[4].w, CONST[4].zzzz
>  9: NOT TEMP[5].x, CONST[223].xxxx
> 10: UIF TEMP[5].xxxx :0
> 11:   ADD TEMP[5], CONST[7], -TEMP[2]
> 12:   ADD TEMP[6], CONST[8], -TEMP[3]
> 13:   ADD TEMP[7], CONST[9], -TEMP[4]
> 14: ELSE :0
> 15:   NOT TEMP[8].x, CONST[224].xxxx
> 16:   UIF TEMP[8].xxxx :0
> 17:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 18:     UARL ADDR[0].x, TEMP[8].xxxx
> 19:     UARL ADDR[0].x, TEMP[8].xxxx
> 20:     ADD TEMP[5], CONST[ADDR[0].x+7], -TEMP[2]
> 21:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 22:     UARL ADDR[0].x, TEMP[8].xxxx
> 23:     UARL ADDR[0].x, TEMP[8].xxxx
> 24:     ADD TEMP[6], CONST[ADDR[0].x+7], -TEMP[3]
> 25:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 26:     UARL ADDR[0].x, TEMP[8].xxxx
> 27:     UARL ADDR[0].x, TEMP[8].xxxx
> 28:     ADD TEMP[7], CONST[ADDR[0].x+7], -TEMP[4]
> 29:   ELSE :0
> 30:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 31:     UARL ADDR[0].x, TEMP[8].xxxx
> 32:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 33:     MUL TEMP[5], TEMP[8], IN[1].xxxx
> 34:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 35:     UARL ADDR[0].x, TEMP[8].xxxx
> 36:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 37:     MUL TEMP[6], TEMP[8], IN[1].xxxx
> 38:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 39:     UARL ADDR[0].x, TEMP[8].xxxx
> 40:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 41:     MUL TEMP[7], TEMP[8], IN[1].xxxx
> 42:     UMUL TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx
> 43:     UARL ADDR[0].x, TEMP[8].xxxx
> 44:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 45:     MAD TEMP[5], TEMP[8], IN[1].yyyy, TEMP[5]
> 46:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 47:     UARL ADDR[0].x, TEMP[8].xxxx
> 48:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 49:     MAD TEMP[6], TEMP[8], IN[1].yyyy, TEMP[6]
> 50:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 51:     UARL ADDR[0].x, TEMP[8].xxxx
> 52:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 53:     MAD TEMP[7], TEMP[8], IN[1].yyyy, TEMP[7]
> 54:     UIF CONST[225].xxxx :0
> 55:       UMUL TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx
> 56:       UARL ADDR[0].x, TEMP[8].xxxx
> 57:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 58:       MAD TEMP[5], TEMP[8], IN[1].zzzz, TEMP[5]
> 59:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 60:       UARL ADDR[0].x, TEMP[8].xxxx
> 61:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 62:       MAD TEMP[6], TEMP[8], IN[1].zzzz, TEMP[6]
> 63:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 64:       UARL ADDR[0].x, TEMP[8].xxxx
> 65:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 66:       MAD TEMP[7], TEMP[8], IN[1].zzzz, TEMP[7]
> 67:     ENDIF
> 68:     UIF CONST[226].xxxx :0
> 69:       UMUL TEMP[8].x, TEMP[0].wwww, IMM[1].xxxx
> 70:       UARL ADDR[0].x, TEMP[8].xxxx
> 71:       ADD TEMP[2], CONST[ADDR[0].x+7], -TEMP[2]
> 72:       MAD TEMP[5], TEMP[2], IN[1].wwww, TEMP[5]
> 73:       UMAD TEMP[2].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 74:       UARL ADDR[0].x, TEMP[2].xxxx
> 75:       ADD TEMP[2], CONST[ADDR[0].x+7], -TEMP[3]
> 76:       MAD TEMP[6], TEMP[2], IN[1].wwww, TEMP[6]
> 77:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 78:       UARL ADDR[0].x, TEMP[0].xxxx
> 79:       ADD TEMP[0], CONST[ADDR[0].x+7], -TEMP[4]
> 80:       MAD TEMP[7], TEMP[0], IN[1].wwww, TEMP[7]
> 81:     ENDIF
> 82:   ENDIF
> 83: ENDIF
> 84: DP4 TEMP[0].x, TEMP[1], TEMP[5]
> 85: DP4 TEMP[2].x, TEMP[1], TEMP[6]
> 86: MOV TEMP[0].y, TEMP[2].xxxx
> 87: DP4 TEMP[2].x, TEMP[1], TEMP[7]
> 88: MOV TEMP[0].z, TEMP[2].xxxx
> 89: DP4 TEMP[1].x, TEMP[1], IMM[0].xxxy
> 90: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 91: MUL TEMP[2], CONST[0], TEMP[0].xxxx
> 92: MAD TEMP[2], CONST[1], TEMP[0].yyyy, TEMP[2]
> 93: MAD TEMP[2], CONST[2], TEMP[0].zzzz, TEMP[2]
> 94: MAD TEMP[1], CONST[3], TEMP[1].xxxx, TEMP[2]
> 95: MOV TEMP[2].xyw, TEMP[1].xyxw
> 96: ADD TEMP[1].x, TEMP[1].zzzz, IMM[0].zzzz
> 97: MOV TEMP[2].z, TEMP[1].xxxx
> 98: MOV TEMP[3].zw, IN[4].yyxy
> 99: ADD TEMP[3].xy, IN[3].xyyy, CONST[228].xyyy
>100: MAD TEMP[4].x, CONST[5].yyyy, CONST[228].zzzz, TEMP[3].yyyy
>101: MOV TEMP[3].y, TEMP[4].xxxx
>102: MAD TEMP[4], CONST[5].yyyy, CONST[229], TEMP[3]
>103: MOV TEMP[3].zw, TEMP[4].wwzw
>104: MUL TEMP[5].x, CONST[5].yyyy, CONST[228].wwww
>105: MUL TEMP[5].x, IMM[0].wwww, TEMP[5].xxxx
>106: SIN TEMP[6].x, TEMP[5].xxxx
>107: COS TEMP[5].x, TEMP[5].xxxx
>108: ADD TEMP[4].xy, TEMP[4].xyyy, IMM[2].xxxx
>109: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[6].xxxx
>110: MAD TEMP[3].x, TEMP[4].xxxx, TEMP[5].xxxx, -TEMP[7].xxxx
>111: MUL TEMP[6].x, TEMP[4].xxxx, TEMP[6].xxxx
>112: MAD TEMP[4].x, TEMP[4].yyyy, TEMP[5].xxxx, TEMP[6].xxxx
>113: MOV TEMP[3].y, TEMP[4].xxxx
>114: ADD TEMP[3].xy, TEMP[3].xyyy, IMM[2].yyyy
>115: MUL TEMP[4].xy, IMM[2].zwww, CONST[227].xzzz
>116: SSG TEMP[4].xy, TEMP[4].xyyy
>117: ABS TEMP[5].xy, CONST[227].xzzz
>118: RCP TEMP[6].x, TEMP[5].xxxx
>119: RCP TEMP[6].y, TEMP[5].yyyy
>120: MUL TEMP[5].xy, CONST[5].yyyy, TEMP[6].xyyy
>121: RCP TEMP[6].x, CONST[227].yyyy
>122: RCP TEMP[6].y, CONST[227].wwww
>123: MUL TEMP[5].xy, TEMP[5].xyyy, TEMP[6].xyyy
>124: FRC TEMP[5].xy, TEMP[5].xyyy
>125: MUL TEMP[5].xy, TEMP[5].xyyy, CONST[227].ywww
>126: FLR TEMP[5].xy, TEMP[5].xyyy
>127: MUL TEMP[4].xy, TEMP[4].xyyy, TEMP[5].xyyy
>128: RCP TEMP[5].x, CONST[227].yyyy
>129: RCP TEMP[5].y, CONST[227].wwww
>130: MAD TEMP[3].xy, TEMP[4].xyyy, TEMP[5].xyyy, TEMP[3].xyyy
>131: MAD TEMP[1].x, TEMP[1].xxxx, CONST[6].yyyy, CONST[6].xxxx
>132: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>133: POW TEMP[1].x, TEMP[1].xxxx, CONST[6].zzzz
>134: ADD TEMP[4].x, IMM[0].yyyy, -CONST[6].wwww
>135: MAD TEMP[1].x, CONST[6].wwww, TEMP[1].xxxx, TEMP[4].xxxx
>136: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
>137: MOV TEMP[1].yzw, TEMP[0].yxyz
>138: MOV OUT[1], TEMP[3]
>139: MOV OUT[0], TEMP[2]
>140: MOV OUT[2], TEMP[1]
>141: END
>radeonsi: Compiling shader 53
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %19 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %20 = load <16 x i8>, <16 x i8> addrspace(2)* %19, align 16, !invariant.load !0
>  %21 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %14)
>  %22 = extractelement <4 x float> %21, i32 0
>  %23 = extractelement <4 x float> %21, i32 1
>  %24 = extractelement <4 x float> %21, i32 2
>  %25 = extractelement <4 x float> %21, i32 3
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %27, i32 0, i32 %15)
>  %29 = extractelement <4 x float> %28, i32 0
>  %30 = extractelement <4 x float> %28, i32 1
>  %31 = extractelement <4 x float> %28, i32 2
>  %32 = extractelement <4 x float> %28, i32 3
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %34, i32 0, i32 %16)
>  %36 = extractelement <4 x float> %35, i32 0
>  %37 = extractelement <4 x float> %35, i32 1
>  %38 = extractelement <4 x float> %35, i32 2
>  %39 = extractelement <4 x float> %35, i32 3
>  %40 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %41 = load <16 x i8>, <16 x i8> addrspace(2)* %40, align 16, !invariant.load !0
>  %42 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %41, i32 0, i32 %17)
>  %43 = extractelement <4 x float> %42, i32 0
>  %44 = extractelement <4 x float> %42, i32 1
>  %45 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %46 = load <16 x i8>, <16 x i8> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %46, i32 0, i32 %18)
>  %48 = extractelement <4 x float> %47, i32 0
>  %49 = extractelement <4 x float> %47, i32 1
>  %50 = fptosi float %36 to i32
>  %51 = fptosi float %37 to i32
>  %52 = fptosi float %38 to i32
>  %53 = fptosi float %39 to i32
>  %54 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %55 = load <16 x i8>, <16 x i8> addrspace(2)* %54, align 16, !invariant.load !0
>  %56 = call float @llvm.SI.load.const(<16 x i8> %55, i32 3696)
>  %57 = fmul float %22, %56
>  %58 = call float @llvm.SI.load.const(<16 x i8> %55, i32 3700)
>  %59 = fmul float %23, %58
>  %60 = call float @llvm.SI.load.const(<16 x i8> %55, i32 3704)
>  %61 = fmul float %24, %60
>  %62 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %63 = load <16 x i8>, <16 x i8> addrspace(2)* %62, align 16, !invariant.load !0
>  %64 = call float @llvm.SI.load.const(<16 x i8> %63, i32 64)
>  %65 = call float @llvm.SI.load.const(<16 x i8> %63, i32 68)
>  %66 = call float @llvm.SI.load.const(<16 x i8> %63, i32 72)
>  %67 = call float @llvm.SI.load.const(<16 x i8> %63, i32 3568)
>  %68 = bitcast float %67 to i32
>  %69 = icmp eq i32 %68, -1
>  %70 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %71 = load <16 x i8>, <16 x i8> addrspace(2)* %70, align 16, !invariant.load !0
>  br i1 %69, label %else14, label %if10
>
>if10:                                             ; preds = %main_body
>  %72 = call float @llvm.SI.load.const(<16 x i8> %71, i32 112)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 116)
>  %76 = call float @llvm.SI.load.const(<16 x i8> %74, i32 120)
>  %77 = call float @llvm.SI.load.const(<16 x i8> %74, i32 124)
>  %78 = fsub float %77, %64
>  %79 = call float @llvm.SI.load.const(<16 x i8> %74, i32 128)
>  %80 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !invariant.load !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 132)
>  %83 = call float @llvm.SI.load.const(<16 x i8> %81, i32 136)
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 140)
>  %85 = fsub float %84, %65
>  %86 = call float @llvm.SI.load.const(<16 x i8> %81, i32 144)
>  %87 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %88 = load <16 x i8>, <16 x i8> addrspace(2)* %87, align 16, !invariant.load !0
>  %89 = call float @llvm.SI.load.const(<16 x i8> %88, i32 148)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %88, i32 152)
>  %91 = call float @llvm.SI.load.const(<16 x i8> %88, i32 156)
>  %92 = fsub float %91, %66
>  br label %endif83
>
>else14:                                           ; preds = %main_body
>  %93 = call float @llvm.SI.load.const(<16 x i8> %71, i32 3584)
>  %94 = bitcast float %93 to i32
>  %95 = icmp eq i32 %94, -1
>  %96 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %97 = load <16 x i8>, <16 x i8> addrspace(2)* %96, align 16, !invariant.load !0
>  %98 = mul i32 %50, 48
>  %99 = add i32 %98, 112
>  %100 = call float @llvm.SI.load.const(<16 x i8> %97, i32 %99)
>  %101 = mul i32 %50, 48
>  %102 = add i32 %101, 116
>  %103 = call float @llvm.SI.load.const(<16 x i8> %97, i32 %102)
>  %104 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %105 = load <16 x i8>, <16 x i8> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = mul i32 %50, 48
>  %107 = add i32 %106, 120
>  %108 = call float @llvm.SI.load.const(<16 x i8> %105, i32 %107)
>  %109 = mul i32 %50, 48
>  %110 = add i32 %109, 124
>  %111 = call float @llvm.SI.load.const(<16 x i8> %105, i32 %110)
>  %112 = fsub float %111, %64
>  br i1 %95, label %else29, label %if16
>
>if16:                                             ; preds = %else14
>  %113 = mul i32 %50, 3
>  %114 = add i32 %113, 1
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = shl i32 %114, 4
>  %118 = add i32 %117, 112
>  %119 = call float @llvm.SI.load.const(<16 x i8> %116, i32 %118)
>  %120 = shl i32 %114, 4
>  %121 = add i32 %120, 116
>  %122 = call float @llvm.SI.load.const(<16 x i8> %116, i32 %121)
>  %123 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %124 = load <16 x i8>, <16 x i8> addrspace(2)* %123, align 16, !invariant.load !0
>  %125 = shl i32 %114, 4
>  %126 = add i32 %125, 120
>  %127 = call float @llvm.SI.load.const(<16 x i8> %124, i32 %126)
>  %128 = shl i32 %114, 4
>  %129 = add i32 %128, 124
>  %130 = call float @llvm.SI.load.const(<16 x i8> %124, i32 %129)
>  %131 = fsub float %130, %65
>  %132 = mul i32 %50, 3
>  %133 = add i32 %132, 2
>  %134 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %135 = load <16 x i8>, <16 x i8> addrspace(2)* %134, align 16, !invariant.load !0
>  %136 = shl i32 %133, 4
>  %137 = add i32 %136, 112
>  %138 = call float @llvm.SI.load.const(<16 x i8> %135, i32 %137)
>  %139 = shl i32 %133, 4
>  %140 = add i32 %139, 116
>  %141 = call float @llvm.SI.load.const(<16 x i8> %135, i32 %140)
>  %142 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %143 = load <16 x i8>, <16 x i8> addrspace(2)* %142, align 16, !invariant.load !0
>  %144 = shl i32 %133, 4
>  %145 = add i32 %144, 120
>  %146 = call float @llvm.SI.load.const(<16 x i8> %143, i32 %145)
>  %147 = shl i32 %133, 4
>  %148 = add i32 %147, 124
>  %149 = call float @llvm.SI.load.const(<16 x i8> %143, i32 %148)
>  %150 = fsub float %149, %66
>  br label %endif83
>
>else29:                                           ; preds = %else14
>  %151 = fmul float %100, %29
>  %152 = fmul float %103, %29
>  %153 = fmul float %108, %29
>  %154 = fmul float %112, %29
>  %155 = mul i32 %50, 3
>  %156 = add i32 %155, 1
>  %157 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %158 = load <16 x i8>, <16 x i8> addrspace(2)* %157, align 16, !invariant.load !0
>  %159 = shl i32 %156, 4
>  %160 = add i32 %159, 112
>  %161 = call float @llvm.SI.load.const(<16 x i8> %158, i32 %160)
>  %162 = shl i32 %156, 4
>  %163 = add i32 %162, 116
>  %164 = call float @llvm.SI.load.const(<16 x i8> %158, i32 %163)
>  %165 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %166 = load <16 x i8>, <16 x i8> addrspace(2)* %165, align 16, !invariant.load !0
>  %167 = shl i32 %156, 4
>  %168 = add i32 %167, 120
>  %169 = call float @llvm.SI.load.const(<16 x i8> %166, i32 %168)
>  %170 = shl i32 %156, 4
>  %171 = add i32 %170, 124
>  %172 = call float @llvm.SI.load.const(<16 x i8> %166, i32 %171)
>  %173 = fsub float %172, %65
>  %174 = fmul float %161, %29
>  %175 = fmul float %164, %29
>  %176 = fmul float %169, %29
>  %177 = fmul float %173, %29
>  %178 = mul i32 %50, 3
>  %179 = add i32 %178, 2
>  %180 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %181 = load <16 x i8>, <16 x i8> addrspace(2)* %180, align 16, !invariant.load !0
>  %182 = shl i32 %179, 4
>  %183 = add i32 %182, 112
>  %184 = call float @llvm.SI.load.const(<16 x i8> %181, i32 %183)
>  %185 = shl i32 %179, 4
>  %186 = add i32 %185, 116
>  %187 = call float @llvm.SI.load.const(<16 x i8> %181, i32 %186)
>  %188 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %189 = load <16 x i8>, <16 x i8> addrspace(2)* %188, align 16, !invariant.load !0
>  %190 = shl i32 %179, 4
>  %191 = add i32 %190, 120
>  %192 = call float @llvm.SI.load.const(<16 x i8> %189, i32 %191)
>  %193 = shl i32 %179, 4
>  %194 = add i32 %193, 124
>  %195 = call float @llvm.SI.load.const(<16 x i8> %189, i32 %194)
>  %196 = fsub float %195, %66
>  %197 = fmul float %184, %29
>  %198 = fmul float %187, %29
>  %199 = fmul float %192, %29
>  %200 = fmul float %196, %29
>  %201 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %202 = load <16 x i8>, <16 x i8> addrspace(2)* %201, align 16, !invariant.load !0
>  %203 = mul i32 %51, 48
>  %204 = add i32 %203, 112
>  %205 = call float @llvm.SI.load.const(<16 x i8> %202, i32 %204)
>  %206 = mul i32 %51, 48
>  %207 = add i32 %206, 116
>  %208 = call float @llvm.SI.load.const(<16 x i8> %202, i32 %207)
>  %209 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %210 = load <16 x i8>, <16 x i8> addrspace(2)* %209, align 16, !invariant.load !0
>  %211 = mul i32 %51, 48
>  %212 = add i32 %211, 120
>  %213 = call float @llvm.SI.load.const(<16 x i8> %210, i32 %212)
>  %214 = mul i32 %51, 48
>  %215 = add i32 %214, 124
>  %216 = call float @llvm.SI.load.const(<16 x i8> %210, i32 %215)
>  %217 = fsub float %216, %64
>  %218 = fmul float %205, %30
>  %219 = fadd float %218, %151
>  %220 = fmul float %208, %30
>  %221 = fadd float %220, %152
>  %222 = fmul float %213, %30
>  %223 = fadd float %222, %153
>  %224 = fmul float %217, %30
>  %225 = fadd float %224, %154
>  %226 = mul i32 %51, 3
>  %227 = add i32 %226, 1
>  %228 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %229 = load <16 x i8>, <16 x i8> addrspace(2)* %228, align 16, !invariant.load !0
>  %230 = shl i32 %227, 4
>  %231 = add i32 %230, 112
>  %232 = call float @llvm.SI.load.const(<16 x i8> %229, i32 %231)
>  %233 = shl i32 %227, 4
>  %234 = add i32 %233, 116
>  %235 = call float @llvm.SI.load.const(<16 x i8> %229, i32 %234)
>  %236 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %237 = load <16 x i8>, <16 x i8> addrspace(2)* %236, align 16, !invariant.load !0
>  %238 = shl i32 %227, 4
>  %239 = add i32 %238, 120
>  %240 = call float @llvm.SI.load.const(<16 x i8> %237, i32 %239)
>  %241 = shl i32 %227, 4
>  %242 = add i32 %241, 124
>  %243 = call float @llvm.SI.load.const(<16 x i8> %237, i32 %242)
>  %244 = fsub float %243, %65
>  %245 = fmul float %232, %30
>  %246 = fadd float %245, %174
>  %247 = fmul float %235, %30
>  %248 = fadd float %247, %175
>  %249 = fmul float %240, %30
>  %250 = fadd float %249, %176
>  %251 = fmul float %244, %30
>  %252 = fadd float %251, %177
>  %253 = mul i32 %51, 3
>  %254 = add i32 %253, 2
>  %255 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %256 = load <16 x i8>, <16 x i8> addrspace(2)* %255, align 16, !invariant.load !0
>  %257 = shl i32 %254, 4
>  %258 = add i32 %257, 112
>  %259 = call float @llvm.SI.load.const(<16 x i8> %256, i32 %258)
>  %260 = shl i32 %254, 4
>  %261 = add i32 %260, 116
>  %262 = call float @llvm.SI.load.const(<16 x i8> %256, i32 %261)
>  %263 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %264 = load <16 x i8>, <16 x i8> addrspace(2)* %263, align 16, !invariant.load !0
>  %265 = shl i32 %254, 4
>  %266 = add i32 %265, 120
>  %267 = call float @llvm.SI.load.const(<16 x i8> %264, i32 %266)
>  %268 = shl i32 %254, 4
>  %269 = add i32 %268, 124
>  %270 = call float @llvm.SI.load.const(<16 x i8> %264, i32 %269)
>  %271 = fsub float %270, %66
>  %272 = fmul float %259, %30
>  %273 = fadd float %272, %197
>  %274 = fmul float %262, %30
>  %275 = fadd float %274, %198
>  %276 = fmul float %267, %30
>  %277 = fadd float %276, %199
>  %278 = fmul float %271, %30
>  %279 = fadd float %278, %200
>  %280 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %281 = load <16 x i8>, <16 x i8> addrspace(2)* %280, align 16, !invariant.load !0
>  %282 = call float @llvm.SI.load.const(<16 x i8> %281, i32 3600)
>  %283 = bitcast float %282 to i32
>  %284 = icmp eq i32 %283, 0
>  br i1 %284, label %endif67, label %if54
>
>if54:                                             ; preds = %else29
>  %285 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %286 = load <16 x i8>, <16 x i8> addrspace(2)* %285, align 16, !invariant.load !0
>  %287 = mul i32 %52, 48
>  %288 = add i32 %287, 112
>  %289 = call float @llvm.SI.load.const(<16 x i8> %286, i32 %288)
>  %290 = mul i32 %52, 48
>  %291 = add i32 %290, 116
>  %292 = call float @llvm.SI.load.const(<16 x i8> %286, i32 %291)
>  %293 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %294 = load <16 x i8>, <16 x i8> addrspace(2)* %293, align 16, !invariant.load !0
>  %295 = mul i32 %52, 48
>  %296 = add i32 %295, 120
>  %297 = call float @llvm.SI.load.const(<16 x i8> %294, i32 %296)
>  %298 = mul i32 %52, 48
>  %299 = add i32 %298, 124
>  %300 = call float @llvm.SI.load.const(<16 x i8> %294, i32 %299)
>  %301 = fsub float %300, %64
>  %302 = fmul float %289, %31
>  %303 = fadd float %302, %219
>  %304 = fmul float %292, %31
>  %305 = fadd float %304, %221
>  %306 = fmul float %297, %31
>  %307 = fadd float %306, %223
>  %308 = fmul float %301, %31
>  %309 = fadd float %308, %225
>  %310 = mul i32 %52, 3
>  %311 = add i32 %310, 1
>  %312 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %313 = load <16 x i8>, <16 x i8> addrspace(2)* %312, align 16, !invariant.load !0
>  %314 = shl i32 %311, 4
>  %315 = add i32 %314, 112
>  %316 = call float @llvm.SI.load.const(<16 x i8> %313, i32 %315)
>  %317 = shl i32 %311, 4
>  %318 = add i32 %317, 116
>  %319 = call float @llvm.SI.load.const(<16 x i8> %313, i32 %318)
>  %320 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %321 = load <16 x i8>, <16 x i8> addrspace(2)* %320, align 16, !invariant.load !0
>  %322 = shl i32 %311, 4
>  %323 = add i32 %322, 120
>  %324 = call float @llvm.SI.load.const(<16 x i8> %321, i32 %323)
>  %325 = shl i32 %311, 4
>  %326 = add i32 %325, 124
>  %327 = call float @llvm.SI.load.const(<16 x i8> %321, i32 %326)
>  %328 = fsub float %327, %65
>  %329 = fmul float %316, %31
>  %330 = fadd float %329, %246
>  %331 = fmul float %319, %31
>  %332 = fadd float %331, %248
>  %333 = fmul float %324, %31
>  %334 = fadd float %333, %250
>  %335 = fmul float %328, %31
>  %336 = fadd float %335, %252
>  %337 = mul i32 %52, 3
>  %338 = add i32 %337, 2
>  %339 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %340 = load <16 x i8>, <16 x i8> addrspace(2)* %339, align 16, !invariant.load !0
>  %341 = shl i32 %338, 4
>  %342 = add i32 %341, 112
>  %343 = call float @llvm.SI.load.const(<16 x i8> %340, i32 %342)
>  %344 = shl i32 %338, 4
>  %345 = add i32 %344, 116
>  %346 = call float @llvm.SI.load.const(<16 x i8> %340, i32 %345)
>  %347 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %348 = load <16 x i8>, <16 x i8> addrspace(2)* %347, align 16, !invariant.load !0
>  %349 = shl i32 %338, 4
>  %350 = add i32 %349, 120
>  %351 = call float @llvm.SI.load.const(<16 x i8> %348, i32 %350)
>  %352 = shl i32 %338, 4
>  %353 = add i32 %352, 124
>  %354 = call float @llvm.SI.load.const(<16 x i8> %348, i32 %353)
>  %355 = fsub float %354, %66
>  %356 = fmul float %343, %31
>  %357 = fadd float %356, %273
>  %358 = fmul float %346, %31
>  %359 = fadd float %358, %275
>  %360 = fmul float %351, %31
>  %361 = fadd float %360, %277
>  %362 = fmul float %355, %31
>  %363 = fadd float %362, %279
>  br label %endif67
>
>endif67:                                          ; preds = %else29, %if54
>  %.0101 = phi float [ %303, %if54 ], [ %219, %else29 ]
>  %.097 = phi float [ %305, %if54 ], [ %221, %else29 ]
>  %.093 = phi float [ %307, %if54 ], [ %223, %else29 ]
>  %.089 = phi float [ %309, %if54 ], [ %225, %else29 ]
>  %.085 = phi float [ %330, %if54 ], [ %246, %else29 ]
>  %.081 = phi float [ %332, %if54 ], [ %248, %else29 ]
>  %.077 = phi float [ %334, %if54 ], [ %250, %else29 ]
>  %.073 = phi float [ %336, %if54 ], [ %252, %else29 ]
>  %.069 = phi float [ %357, %if54 ], [ %273, %else29 ]
>  %.065 = phi float [ %359, %if54 ], [ %275, %else29 ]
>  %.061 = phi float [ %361, %if54 ], [ %277, %else29 ]
>  %.0 = phi float [ %363, %if54 ], [ %279, %else29 ]
>  %364 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %365 = load <16 x i8>, <16 x i8> addrspace(2)* %364, align 16, !invariant.load !0
>  %366 = call float @llvm.SI.load.const(<16 x i8> %365, i32 3616)
>  %367 = bitcast float %366 to i32
>  %368 = icmp eq i32 %367, 0
>  br i1 %368, label %endif83, label %if68
>
>if68:                                             ; preds = %endif67
>  %369 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %370 = load <16 x i8>, <16 x i8> addrspace(2)* %369, align 16, !invariant.load !0
>  %371 = mul i32 %53, 48
>  %372 = add i32 %371, 112
>  %373 = call float @llvm.SI.load.const(<16 x i8> %370, i32 %372)
>  %374 = mul i32 %53, 48
>  %375 = add i32 %374, 116
>  %376 = call float @llvm.SI.load.const(<16 x i8> %370, i32 %375)
>  %377 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %378 = load <16 x i8>, <16 x i8> addrspace(2)* %377, align 16, !invariant.load !0
>  %379 = mul i32 %53, 48
>  %380 = add i32 %379, 120
>  %381 = call float @llvm.SI.load.const(<16 x i8> %378, i32 %380)
>  %382 = mul i32 %53, 48
>  %383 = add i32 %382, 124
>  %384 = call float @llvm.SI.load.const(<16 x i8> %378, i32 %383)
>  %385 = fsub float %384, %64
>  %386 = fmul float %373, %32
>  %387 = fadd float %386, %.0101
>  %388 = fmul float %376, %32
>  %389 = fadd float %388, %.097
>  %390 = fmul float %381, %32
>  %391 = fadd float %390, %.093
>  %392 = fmul float %385, %32
>  %393 = fadd float %392, %.089
>  %394 = mul i32 %53, 3
>  %395 = add i32 %394, 1
>  %396 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %397 = load <16 x i8>, <16 x i8> addrspace(2)* %396, align 16, !invariant.load !0
>  %398 = shl i32 %395, 4
>  %399 = add i32 %398, 112
>  %400 = call float @llvm.SI.load.const(<16 x i8> %397, i32 %399)
>  %401 = shl i32 %395, 4
>  %402 = add i32 %401, 116
>  %403 = call float @llvm.SI.load.const(<16 x i8> %397, i32 %402)
>  %404 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %405 = load <16 x i8>, <16 x i8> addrspace(2)* %404, align 16, !invariant.load !0
>  %406 = shl i32 %395, 4
>  %407 = add i32 %406, 120
>  %408 = call float @llvm.SI.load.const(<16 x i8> %405, i32 %407)
>  %409 = shl i32 %395, 4
>  %410 = add i32 %409, 124
>  %411 = call float @llvm.SI.load.const(<16 x i8> %405, i32 %410)
>  %412 = fsub float %411, %65
>  %413 = fmul float %400, %32
>  %414 = fadd float %413, %.085
>  %415 = fmul float %403, %32
>  %416 = fadd float %415, %.081
>  %417 = fmul float %408, %32
>  %418 = fadd float %417, %.077
>  %419 = fmul float %412, %32
>  %420 = fadd float %419, %.073
>  %421 = mul i32 %53, 3
>  %422 = add i32 %421, 2
>  %423 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %424 = load <16 x i8>, <16 x i8> addrspace(2)* %423, align 16, !invariant.load !0
>  %425 = shl i32 %422, 4
>  %426 = add i32 %425, 112
>  %427 = call float @llvm.SI.load.const(<16 x i8> %424, i32 %426)
>  %428 = shl i32 %422, 4
>  %429 = add i32 %428, 116
>  %430 = call float @llvm.SI.load.const(<16 x i8> %424, i32 %429)
>  %431 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %432 = load <16 x i8>, <16 x i8> addrspace(2)* %431, align 16, !invariant.load !0
>  %433 = shl i32 %422, 4
>  %434 = add i32 %433, 120
>  %435 = call float @llvm.SI.load.const(<16 x i8> %432, i32 %434)
>  %436 = shl i32 %422, 4
>  %437 = add i32 %436, 124
>  %438 = call float @llvm.SI.load.const(<16 x i8> %432, i32 %437)
>  %439 = fsub float %438, %66
>  %440 = fmul float %427, %32
>  %441 = fadd float %440, %.069
>  %442 = fmul float %430, %32
>  %443 = fadd float %442, %.065
>  %444 = fmul float %435, %32
>  %445 = fadd float %444, %.061
>  %446 = fmul float %439, %32
>  %447 = fadd float %446, %.0
>  br label %endif83
>
>endif83:                                          ; preds = %endif67, %if16, %if68, %if10
>  %.3104 = phi float [ %72, %if10 ], [ %100, %if16 ], [ %387, %if68 ], [ %.0101, %endif67 ]
>  %.3100 = phi float [ %75, %if10 ], [ %103, %if16 ], [ %389, %if68 ], [ %.097, %endif67 ]
>  %.396 = phi float [ %76, %if10 ], [ %108, %if16 ], [ %391, %if68 ], [ %.093, %endif67 ]
>  %.392 = phi float [ %78, %if10 ], [ %112, %if16 ], [ %393, %if68 ], [ %.089, %endif67 ]
>  %.388 = phi float [ %79, %if10 ], [ %119, %if16 ], [ %414, %if68 ], [ %.085, %endif67 ]
>  %.384 = phi float [ %82, %if10 ], [ %122, %if16 ], [ %416, %if68 ], [ %.081, %endif67 ]
>  %.380 = phi float [ %83, %if10 ], [ %127, %if16 ], [ %418, %if68 ], [ %.077, %endif67 ]
>  %.376 = phi float [ %85, %if10 ], [ %131, %if16 ], [ %420, %if68 ], [ %.073, %endif67 ]
>  %.372 = phi float [ %86, %if10 ], [ %138, %if16 ], [ %441, %if68 ], [ %.069, %endif67 ]
>  %.368 = phi float [ %89, %if10 ], [ %141, %if16 ], [ %443, %if68 ], [ %.065, %endif67 ]
>  %.364 = phi float [ %90, %if10 ], [ %146, %if16 ], [ %445, %if68 ], [ %.061, %endif67 ]
>  %.3 = phi float [ %92, %if10 ], [ %150, %if16 ], [ %447, %if68 ], [ %.0, %endif67 ]
>  %448 = fmul float %57, %.3104
>  %449 = fmul float %59, %.3100
>  %450 = fadd float %448, %449
>  %451 = fmul float %61, %.396
>  %452 = fadd float %450, %451
>  %453 = fmul float %25, %.392
>  %454 = fadd float %452, %453
>  %455 = fmul float %57, %.388
>  %456 = fmul float %59, %.384
>  %457 = fadd float %455, %456
>  %458 = fmul float %61, %.380
>  %459 = fadd float %457, %458
>  %460 = fmul float %25, %.376
>  %461 = fadd float %459, %460
>  %462 = fmul float %57, %.372
>  %463 = fmul float %59, %.368
>  %464 = fadd float %462, %463
>  %465 = fmul float %61, %.364
>  %466 = fadd float %464, %465
>  %467 = fmul float %25, %.3
>  %468 = fadd float %466, %467
>  %469 = fmul float %57, 0.000000e+00
>  %470 = fmul float %59, 0.000000e+00
>  %471 = fadd float %469, %470
>  %472 = fmul float %61, 0.000000e+00
>  %473 = fadd float %471, %472
>  %474 = fadd float %473, %25
>  %475 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %476 = load <16 x i8>, <16 x i8> addrspace(2)* %475, align 16, !invariant.load !0
>  %477 = call float @llvm.SI.load.const(<16 x i8> %476, i32 64)
>  %478 = fadd float %454, %477
>  %479 = call float @llvm.SI.load.const(<16 x i8> %476, i32 68)
>  %480 = fadd float %461, %479
>  %481 = call float @llvm.SI.load.const(<16 x i8> %476, i32 72)
>  %482 = fadd float %468, %481
>  %483 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %484 = load <16 x i8>, <16 x i8> addrspace(2)* %483, align 16, !invariant.load !0
>  %485 = call float @llvm.SI.load.const(<16 x i8> %484, i32 0)
>  %486 = fmul float %485, %478
>  %487 = call float @llvm.SI.load.const(<16 x i8> %484, i32 4)
>  %488 = fmul float %487, %478
>  %489 = call float @llvm.SI.load.const(<16 x i8> %484, i32 8)
>  %490 = fmul float %489, %478
>  %491 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %492 = load <16 x i8>, <16 x i8> addrspace(2)* %491, align 16, !invariant.load !0
>  %493 = call float @llvm.SI.load.const(<16 x i8> %492, i32 12)
>  %494 = fmul float %493, %478
>  %495 = call float @llvm.SI.load.const(<16 x i8> %492, i32 16)
>  %496 = fmul float %495, %480
>  %497 = fadd float %496, %486
>  %498 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %499 = load <16 x i8>, <16 x i8> addrspace(2)* %498, align 16, !invariant.load !0
>  %500 = call float @llvm.SI.load.const(<16 x i8> %499, i32 20)
>  %501 = fmul float %500, %480
>  %502 = fadd float %501, %488
>  %503 = call float @llvm.SI.load.const(<16 x i8> %499, i32 24)
>  %504 = fmul float %503, %480
>  %505 = fadd float %504, %490
>  %506 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %507 = load <16 x i8>, <16 x i8> addrspace(2)* %506, align 16, !invariant.load !0
>  %508 = call float @llvm.SI.load.const(<16 x i8> %507, i32 28)
>  %509 = fmul float %508, %480
>  %510 = fadd float %509, %494
>  %511 = call float @llvm.SI.load.const(<16 x i8> %507, i32 32)
>  %512 = fmul float %511, %482
>  %513 = fadd float %512, %497
>  %514 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %515 = load <16 x i8>, <16 x i8> addrspace(2)* %514, align 16, !invariant.load !0
>  %516 = call float @llvm.SI.load.const(<16 x i8> %515, i32 36)
>  %517 = fmul float %516, %482
>  %518 = fadd float %517, %502
>  %519 = call float @llvm.SI.load.const(<16 x i8> %515, i32 40)
>  %520 = fmul float %519, %482
>  %521 = fadd float %520, %505
>  %522 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %523 = load <16 x i8>, <16 x i8> addrspace(2)* %522, align 16, !invariant.load !0
>  %524 = call float @llvm.SI.load.const(<16 x i8> %523, i32 44)
>  %525 = fmul float %524, %482
>  %526 = fadd float %525, %510
>  %527 = call float @llvm.SI.load.const(<16 x i8> %523, i32 48)
>  %528 = fmul float %527, %474
>  %529 = fadd float %528, %513
>  %530 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %531 = load <16 x i8>, <16 x i8> addrspace(2)* %530, align 16, !invariant.load !0
>  %532 = call float @llvm.SI.load.const(<16 x i8> %531, i32 52)
>  %533 = fmul float %532, %474
>  %534 = fadd float %533, %518
>  %535 = call float @llvm.SI.load.const(<16 x i8> %531, i32 56)
>  %536 = fmul float %535, %474
>  %537 = fadd float %536, %521
>  %538 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %539 = load <16 x i8>, <16 x i8> addrspace(2)* %538, align 16, !invariant.load !0
>  %540 = call float @llvm.SI.load.const(<16 x i8> %539, i32 60)
>  %541 = fmul float %540, %474
>  %542 = fadd float %541, %526
>  %543 = fadd float %537, 0xBF3A36E2E0000000
>  %544 = call float @llvm.SI.load.const(<16 x i8> %539, i32 3648)
>  %545 = fadd float %43, %544
>  %546 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %547 = load <16 x i8>, <16 x i8> addrspace(2)* %546, align 16, !invariant.load !0
>  %548 = call float @llvm.SI.load.const(<16 x i8> %547, i32 3652)
>  %549 = fadd float %44, %548
>  %550 = call float @llvm.SI.load.const(<16 x i8> %547, i32 84)
>  %551 = call float @llvm.SI.load.const(<16 x i8> %547, i32 3656)
>  %552 = fmul float %550, %551
>  %553 = fadd float %552, %549
>  %554 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %555 = load <16 x i8>, <16 x i8> addrspace(2)* %554, align 16, !invariant.load !0
>  %556 = call float @llvm.SI.load.const(<16 x i8> %555, i32 84)
>  %557 = call float @llvm.SI.load.const(<16 x i8> %555, i32 3664)
>  %558 = fmul float %556, %557
>  %559 = fadd float %558, %545
>  %560 = call float @llvm.SI.load.const(<16 x i8> %555, i32 84)
>  %561 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %562 = load <16 x i8>, <16 x i8> addrspace(2)* %561, align 16, !invariant.load !0
>  %563 = call float @llvm.SI.load.const(<16 x i8> %562, i32 3668)
>  %564 = fmul float %560, %563
>  %565 = fadd float %564, %553
>  %566 = call float @llvm.SI.load.const(<16 x i8> %562, i32 84)
>  %567 = call float @llvm.SI.load.const(<16 x i8> %562, i32 3672)
>  %568 = fmul float %566, %567
>  %569 = fadd float %568, %48
>  %570 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %571 = load <16 x i8>, <16 x i8> addrspace(2)* %570, align 16, !invariant.load !0
>  %572 = call float @llvm.SI.load.const(<16 x i8> %571, i32 84)
>  %573 = call float @llvm.SI.load.const(<16 x i8> %571, i32 3676)
>  %574 = fmul float %572, %573
>  %575 = fadd float %574, %49
>  %576 = call float @llvm.SI.load.const(<16 x i8> %571, i32 84)
>  %577 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %578 = load <16 x i8>, <16 x i8> addrspace(2)* %577, align 16, !invariant.load !0
>  %579 = call float @llvm.SI.load.const(<16 x i8> %578, i32 3660)
>  %580 = fmul float %576, %579
>  %581 = fmul float %580, 0x401921CAC0000000
>  %582 = call float @llvm.sin.f32(float %581)
>  %583 = call float @llvm.cos.f32(float %581)
>  %584 = fadd float %559, -5.000000e-01
>  %585 = fadd float %565, -5.000000e-01
>  %586 = fmul float %585, %582
>  %587 = fmul float %584, %583
>  %588 = fsub float %587, %586
>  %589 = fmul float %584, %582
>  %590 = fmul float %585, %583
>  %591 = fadd float %590, %589
>  %592 = fadd float %588, 5.000000e-01
>  %593 = fadd float %591, 5.000000e-01
>  %594 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %595 = load <16 x i8>, <16 x i8> addrspace(2)* %594, align 16, !invariant.load !0
>  %596 = call float @llvm.SI.load.const(<16 x i8> %595, i32 3632)
>  %597 = call float @llvm.SI.load.const(<16 x i8> %595, i32 3640)
>  %598 = fsub float -0.000000e+00, %597
>  %599 = fcmp ogt float %596, 0.000000e+00
>  %600 = select i1 %599, float 1.000000e+00, float %596
>  %601 = fcmp oge float %600, 0.000000e+00
>  %602 = select i1 %601, float %600, float -1.000000e+00
>  %603 = fcmp olt float %597, -0.000000e+00
>  %604 = select i1 %603, float 1.000000e+00, float %598
>  %605 = fcmp oge float %604, 0.000000e+00
>  %606 = select i1 %605, float %604, float -1.000000e+00
>  %607 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %608 = load <16 x i8>, <16 x i8> addrspace(2)* %607, align 16, !invariant.load !0
>  %609 = call float @llvm.SI.load.const(<16 x i8> %608, i32 3632)
>  %610 = call float @llvm.fabs.f32(float %609)
>  %611 = call float @llvm.SI.load.const(<16 x i8> %608, i32 3640)
>  %612 = call float @llvm.fabs.f32(float %611)
>  %613 = fdiv float 1.000000e+00, %610, !fpmath !1
>  %614 = fdiv float 1.000000e+00, %612, !fpmath !1
>  %615 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %616 = load <16 x i8>, <16 x i8> addrspace(2)* %615, align 16, !invariant.load !0
>  %617 = call float @llvm.SI.load.const(<16 x i8> %616, i32 84)
>  %618 = fmul float %617, %613
>  %619 = call float @llvm.SI.load.const(<16 x i8> %616, i32 84)
>  %620 = fmul float %619, %614
>  %621 = call float @llvm.SI.load.const(<16 x i8> %616, i32 3636)
>  %622 = fdiv float 1.000000e+00, %621, !fpmath !1
>  %623 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %624 = load <16 x i8>, <16 x i8> addrspace(2)* %623, align 16, !invariant.load !0
>  %625 = call float @llvm.SI.load.const(<16 x i8> %624, i32 3644)
>  %626 = fdiv float 1.000000e+00, %625, !fpmath !1
>  %627 = fmul float %618, %622
>  %628 = fmul float %620, %626
>  %629 = call float @llvm.floor.f32(float %627)
>  %630 = fsub float %627, %629
>  %631 = call float @llvm.floor.f32(float %628)
>  %632 = fsub float %628, %631
>  %633 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %634 = load <16 x i8>, <16 x i8> addrspace(2)* %633, align 16, !invariant.load !0
>  %635 = call float @llvm.SI.load.const(<16 x i8> %634, i32 3636)
>  %636 = fmul float %630, %635
>  %637 = call float @llvm.SI.load.const(<16 x i8> %634, i32 3644)
>  %638 = fmul float %632, %637
>  %639 = call float @llvm.floor.f32(float %636)
>  %640 = call float @llvm.floor.f32(float %638)
>  %641 = fmul float %602, %639
>  %642 = fmul float %606, %640
>  %643 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %644 = load <16 x i8>, <16 x i8> addrspace(2)* %643, align 16, !invariant.load !0
>  %645 = call float @llvm.SI.load.const(<16 x i8> %644, i32 3636)
>  %646 = fdiv float 1.000000e+00, %645, !fpmath !1
>  %647 = call float @llvm.SI.load.const(<16 x i8> %644, i32 3644)
>  %648 = fdiv float 1.000000e+00, %647, !fpmath !1
>  %649 = fmul float %641, %646
>  %650 = fadd float %649, %592
>  %651 = fmul float %642, %648
>  %652 = fadd float %651, %593
>  %653 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %654 = load <16 x i8>, <16 x i8> addrspace(2)* %653, align 16, !invariant.load !0
>  %655 = call float @llvm.SI.load.const(<16 x i8> %654, i32 100)
>  %656 = call float @llvm.SI.load.const(<16 x i8> %654, i32 96)
>  %657 = fmul float %543, %655
>  %658 = fadd float %657, %656
>  %659 = call float @llvm.AMDGPU.clamp.(float %658, float 0.000000e+00, float 1.000000e+00)
>  %660 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %661 = load <16 x i8>, <16 x i8> addrspace(2)* %660, align 16, !invariant.load !0
>  %662 = call float @llvm.SI.load.const(<16 x i8> %661, i32 104)
>  %663 = call float @llvm.pow.f32(float %659, float %662)
>  %664 = call float @llvm.SI.load.const(<16 x i8> %661, i32 108)
>  %665 = fsub float 1.000000e+00, %664
>  %666 = call float @llvm.SI.load.const(<16 x i8> %661, i32 108)
>  %667 = fmul float %666, %663
>  %668 = fadd float %667, %665
>  %669 = fmul float %668, %668
>  %670 = bitcast i32 %12 to float
>  %671 = insertvalue <{ float, float, float }> undef, float %670, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %650, float %652, float %569, float %575)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %669, float %478, float %480, float %482)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %529, float %534, float %543, float %542)
>  ret <{ float, float, float }> %671
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[0..1]
>DCL CONST[4]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    0.0000,     0.0010,     8.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].zwww
>  1: TEX TEMP[0], TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  4: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
>  5: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[4].xxxx
>  6: ADD TEMP[2].x, IN[1].zzzz, -CONST[0].wwww
>  7: MAX TEMP[2].x, TEMP[2].xxxx, IMM[0].xxxx
>  8: ADD TEMP[3].x, CONST[1].wwww, -CONST[0].wwww
>  9: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].yyyy
> 10: RCP TEMP[3].x, TEMP[3].xxxx
> 11: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 12: FRC TEMP[3].x, CONST[1].wwww
> 13: MUL TEMP[3].x, TEMP[3].xxxx, IMM[0].zzzz
> 14: POW TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 15: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 16: MUL TEMP[2].x, IN[1].xxxx, TEMP[2].xxxx
> 17: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
> 18: MOV TEMP[1].w, TEMP[0].wwww
> 19: MOV OUT[0], TEMP[1]
> 20: END
>radeonsi: Compiling shader 54
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 7, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %45 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <8 x i32>, <8 x i32> addrspace(2)* %45, align 32, !invariant.load !0
>  %47 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %48 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %47, i64 0, i64 3, !amdgpu.uniform !0
>  %49 = load <4 x i32>, <4 x i32> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = extractelement <8 x i32> %46, i32 7
>  %51 = extractelement <4 x i32> %49, i32 0
>  %52 = and i32 %51, %50
>  %53 = insertelement <4 x i32> %49, i32 %52, i32 0
>  %54 = bitcast float %43 to i32
>  %55 = bitcast float %44 to i32
>  %56 = insertelement <2 x i32> undef, i32 %54, i32 0
>  %57 = insertelement <2 x i32> %56, i32 %55, i32 1
>  %58 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %57, <8 x i32> %46, <4 x i32> %53, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %59 = extractelement <4 x float> %58, i32 0
>  %60 = extractelement <4 x float> %58, i32 1
>  %61 = extractelement <4 x float> %58, i32 2
>  %62 = fmul float %59, %39
>  %63 = fmul float %60, %40
>  %64 = fmul float %61, %41
>  %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !invariant.load !0
>  %67 = call float @llvm.SI.load.const(<16 x i8> %66, i32 64)
>  %68 = fmul float %62, %67
>  %69 = call float @llvm.SI.load.const(<16 x i8> %66, i32 64)
>  %70 = fmul float %63, %69
>  %71 = call float @llvm.SI.load.const(<16 x i8> %66, i32 64)
>  %72 = fmul float %64, %71
>  %73 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %74 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %75 = load <16 x i8>, <16 x i8> addrspace(2)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const(<16 x i8> %75, i32 12)
>  %77 = fsub float %73, %76
>  %78 = call float @llvm.maxnum.f32(float %77, float 0.000000e+00)
>  %79 = call float @llvm.SI.load.const(<16 x i8> %75, i32 28)
>  %80 = call float @llvm.SI.load.const(<16 x i8> %75, i32 12)
>  %81 = fsub float %79, %80
>  %82 = fadd float %81, 0x3F50624DE0000000
>  %83 = fdiv float 1.000000e+00, %82, !fpmath !1
>  %84 = fmul float %78, %83
>  %85 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %86 = load <16 x i8>, <16 x i8> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = call float @llvm.SI.load.const(<16 x i8> %86, i32 28)
>  %88 = call float @llvm.floor.f32(float %87)
>  %89 = fsub float %87, %88
>  %90 = fmul float %89, 8.000000e+00
>  %91 = call float @llvm.pow.f32(float %84, float %90)
>  %92 = call float @llvm.AMDGPU.clamp.(float %91, float 0.000000e+00, float 1.000000e+00)
>  %93 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %94 = fmul float %93, %92
>  %95 = fmul float %68, %94
>  %96 = fmul float %70, %94
>  %97 = fmul float %72, %94
>  %98 = bitcast float %5 to i32
>  %99 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %98, 10
>  %100 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %99, float %95, 11
>  %101 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %100, float %96, 12
>  %102 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %101, float %97, 13
>  %103 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %102, float %42, 14
>  %104 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %103, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %104
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0xc                  ; C0860B0C
>	s_load_dwordx4 s[16:19], s[10:11], 0x10                 ; C0880B10
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[15:18], v4, s[4:7], 0 idxen   ; E00C2000 80010F04
>	buffer_load_format_xyzw v[11:14], v7, s[12:15], 0 idxen ; E00C2000 80030B07
>	buffer_load_format_xyzw v[7:10], v8, s[16:19], 0 idxen  ; E00C2000 80040708
>	s_buffer_load_dword s7, s[0:3], 0x10                    ; C2038110
>	s_buffer_load_dword s8, s[0:3], 0x11                    ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                    ; C2048112
>	s_buffer_load_dword s12, s[0:3], 0x37c                  ; C20600FF 0000037C
>	s_buffer_load_dword s6, s[0:3], 0x39c                   ; C20300FF 0000039C
>	s_buffer_load_dword s5, s[0:3], 0x39d                   ; C20280FF 0000039D
>	s_buffer_load_dword s4, s[0:3], 0x39e                   ; C20200FF 0000039E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s7                                    ; 7E000207
>	s_cmp_eq_u32 s12, -1                                    ; BF06C10C
>	v_mov_b32_e32 v1, s8                                    ; 7E020208
>	v_mov_b32_e32 v3, s9                                    ; 7E060209
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s7, s[0:3], 0x1c                    ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                    ; C204011D
>	s_buffer_load_dword s9, s[0:3], 0x1e                    ; C204811E
>	s_buffer_load_dword s10, s[0:3], 0x1f                   ; C205011F
>	s_buffer_load_dword s11, s[0:3], 0x20                   ; C2058120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s7                                    ; 7E120207
>	v_mov_b32_e32 v10, s8                                   ; 7E140208
>	s_buffer_load_dword s7, s[0:3], 0x21                    ; C2038121
>	s_buffer_load_dword s8, s[0:3], 0x22                    ; C2040122
>	v_mov_b32_e32 v4, s9                                    ; 7E080209
>	v_sub_f32_e32 v6, s10, v0                               ; 080C000A
>	v_mov_b32_e32 v5, s11                                   ; 7E0A020B
>	s_buffer_load_dword s9, s[0:3], 0x23                    ; C2048123
>	s_buffer_load_dword s10, s[0:3], 0x24                   ; C2050124
>	s_buffer_load_dword s11, s[0:3], 0x25                   ; C2058125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v14, s7                                   ; 7E1C0207
>	v_mov_b32_e32 v13, s8                                   ; 7E1A0208
>	s_buffer_load_dword s7, s[0:3], 0x26                    ; C2038126
>	s_buffer_load_dword s8, s[0:3], 0x27                    ; C2040127
>	v_sub_f32_e32 v19, s9, v1                               ; 08260209
>	v_mov_b32_e32 v20, s10                                  ; 7E28020A
>	v_mov_b32_e32 v21, s11                                  ; 7E2A020B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v22, s7                                   ; 7E2C0207
>	v_sub_f32_e32 v23, s8, v3                               ; 082E0608
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[12:15], s[10:11], 0x8                  ; C0860B08
>	s_movk_i32 s18, 0x7c                                    ; B012007C
>	s_movk_i32 s17, 0x70                                    ; B0110070
>	s_movk_i32 s16, 0x78                                    ; B0100078
>	s_buffer_load_dword s7, s[0:3], 0x380                   ; C20380FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[28:31], v6, s[12:15], 0 idxen ; E00C2000 80031C06
>	s_movk_i32 s15, 0x74                                    ; B00F0074
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v28                               ; 7E08111C
>	v_mul_lo_i32 v19, v4, 48                                ; D2D60013 00016104
>	v_add_i32_e32 v6, vcc, s15, v19                         ; 4A0C260F
>	v_add_i32_e32 v14, vcc, s18, v19                        ; 4A1C2612
>	v_add_i32_e32 v4, vcc, s17, v19                         ; 4A082611
>	buffer_load_dword v10, v6, s[0:3], 0 offen              ; E0301000 80000A06
>	buffer_load_dword v6, v14, s[0:3], 0 offen              ; E0301000 8000060E
>	v_add_i32_e32 v13, vcc, s16, v19                        ; 4A1A2610
>	buffer_load_dword v9, v4, s[0:3], 0 offen               ; E0301000 80000904
>	buffer_load_dword v4, v13, s[0:3], 0 offen              ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_subrev_f32_e32 v6, v0, v6                             ; 0A0C0D00
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v13, vcc, 0x8c, v19                       ; 4A1A26FF 0000008C
>	v_add_i32_e32 v22, vcc, 0x9c, v19                       ; 4A2C26FF 0000009C
>	v_add_i32_e32 v20, vcc, 0x88, v19                       ; 4A2826FF 00000088
>	v_add_i32_e32 v5, vcc, 0x80, v19                        ; 4A0A26FF 00000080
>	v_add_i32_e32 v14, vcc, 0x84, v19                       ; 4A1C26FF 00000084
>	v_add_i32_e32 v21, vcc, 0x94, v19                       ; 4A2A26FF 00000094
>	buffer_load_dword v23, v13, s[0:3], 0 offen             ; E0301000 8000170D
>	buffer_load_dword v13, v20, s[0:3], 0 offen             ; E0301000 80000D14
>	v_add_i32_e32 v20, vcc, 0x90, v19                       ; 4A2826FF 00000090
>	v_add_i32_e32 v19, vcc, 0x98, v19                       ; 4A2626FF 00000098
>	buffer_load_dword v24, v22, s[0:3], 0 offen             ; E0301000 80001816
>	buffer_load_dword v22, v19, s[0:3], 0 offen             ; E0301000 80001613
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v19, v1, v23                           ; 0A262F01
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_subrev_f32_e32 v23, v3, v24                           ; 0A2E3103
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                   ; C0840B04
>	s_movk_i32 s7, 0x9c                                     ; B007009C
>	s_movk_i32 s14, 0x8c                                    ; B00E008C
>	v_add_i32_e32 v21, vcc, s7, v19                         ; 4A2A2607
>	s_movk_i32 s13, 0x80                                    ; B00D0080
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v5, s[8:11], 0 idxen  ; E00C2000 80021805
>	v_cvt_i32_f32_e32 v5, v29                               ; 7E0A111D
>	s_movk_i32 s12, 0x84                                    ; B00C0084
>	s_movk_i32 s11, 0x88                                    ; B00B0088
>	s_movk_i32 s9, 0x94                                     ; B0090094
>	v_mul_lo_i32 v28, v5, 48                                ; D2D6001C 00016105
>	v_add_i32_e32 v5, vcc, s14, v19                         ; 4A0A260E
>	s_movk_i32 s10, 0x90                                    ; B00A0090
>	s_movk_i32 s8, 0x98                                     ; B0080098
>	v_add_i32_e32 v13, vcc, s13, v19                        ; 4A1A260D
>	v_add_i32_e32 v14, vcc, s12, v19                        ; 4A1C260C
>	v_add_i32_e32 v20, vcc, s11, v19                        ; 4A28260B
>	v_add_i32_e32 v23, vcc, s9, v19                         ; 4A2E2609
>	buffer_load_dword v22, v5, s[0:3], 0 offen              ; E0301000 80001605
>	v_add_i32_e32 v5, vcc, s10, v19                         ; 4A0A260A
>	v_add_i32_e32 v19, vcc, s8, v19                         ; 4A262608
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v32, v19, s[0:3], 0 offen             ; E0301000 80002013
>	buffer_load_dword v13, v13, s[0:3], 0 offen             ; E0301000 80000D0D
>	buffer_load_dword v29, v5, s[0:3], 0 offen              ; E0301000 80001D05
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v9, v24, v9                               ; 10121318
>	v_mul_f32_e32 v10, v24, v10                             ; 10141518
>	v_mul_f32_e32 v4, v24, v4                               ; 10080918
>	v_mul_f32_e32 v6, v24, v6                               ; 100C0D18
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v19, v1, v22                           ; 0A262D01
>	v_mul_f32_e32 v19, v24, v19                             ; 10262718
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v33, v3, v21                           ; 0A422B03
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v14, v24, v14                             ; 101C1D18
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v22, v24, v32                             ; 102C4118
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v5, v24, v13                              ; 100A1B18
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mul_f32_e32 v13, v24, v20                             ; 101A2918
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v21, v24, v23                             ; 102A2F18
>	v_mul_f32_e32 v20, v24, v29                             ; 10283B18
>	v_mul_f32_e32 v23, v24, v33                             ; 102E4318
>	v_add_i32_e32 v24, vcc, s18, v28                        ; 4A303812
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v0, v24                           ; 0A303100
>	v_mac_f32_e32 v6, v25, v24                              ; 3E0C3119
>	v_add_i32_e32 v24, vcc, s14, v28                        ; 4A30380E
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v1, v24                           ; 0A303101
>	v_mac_f32_e32 v19, v25, v24                             ; 3E263119
>	v_add_i32_e32 v24, vcc, s17, v28                        ; 4A303811
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v25, v24                              ; 3E123119
>	v_add_i32_e32 v24, vcc, s15, v28                        ; 4A30380F
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_buffer_load_dword s15, s[0:3], 0x384                  ; C20780FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s15, 0                                     ; BF06800F
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v25, v24                             ; 3E143119
>	v_add_i32_e32 v24, vcc, s16, v28                        ; 4A303810
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v25, v24                              ; 3E083119
>	v_add_i32_e32 v24, vcc, s13, v28                        ; 4A30380D
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v25, v24                              ; 3E0A3119
>	v_add_i32_e32 v24, vcc, s12, v28                        ; 4A30380C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v25, v24                             ; 3E1C3119
>	v_add_i32_e32 v24, vcc, s11, v28                        ; 4A30380B
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v25, v24                             ; 3E1A3119
>	v_add_i32_e32 v24, vcc, s10, v28                        ; 4A30380A
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v25, v24                             ; 3E283119
>	v_add_i32_e32 v24, vcc, s9, v28                         ; 4A303809
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v25, v24                             ; 3E2A3119
>	v_add_i32_e32 v24, vcc, s8, v28                         ; 4A303808
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v25, v24                             ; 3E2C3119
>	v_add_i32_e32 v24, vcc, s7, v28                         ; 4A303807
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v3, v24                           ; 0A303103
>	v_mac_f32_e32 v23, v25, v24                             ; 3E2E3119
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v24, v30                              ; 7E30111E
>	v_mul_lo_i32 v24, v24, 48                               ; D2D60018 00016118
>	v_add_i32_e32 v25, vcc, 0x70, v24                       ; 4A3230FF 00000070
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v26, v25                              ; 3E12331A
>	v_add_i32_e32 v25, vcc, 0x7c, v24                       ; 4A3230FF 0000007C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v0, v25                           ; 0A323300
>	v_mac_f32_e32 v6, v26, v25                              ; 3E0C331A
>	v_add_i32_e32 v25, vcc, s14, v24                        ; 4A32300E
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v1, v25                           ; 0A323301
>	v_mac_f32_e32 v19, v26, v25                             ; 3E26331A
>	v_add_i32_e32 v25, vcc, 0x74, v24                       ; 4A3230FF 00000074
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v26, v25                             ; 3E14331A
>	v_add_i32_e32 v25, vcc, 0x78, v24                       ; 4A3230FF 00000078
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v25                              ; 3E08331A
>	v_add_i32_e32 v25, vcc, s13, v24                        ; 4A32300D
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v25                              ; 3E0A331A
>	v_add_i32_e32 v25, vcc, s12, v24                        ; 4A32300C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v26, v25                             ; 3E1C331A
>	v_add_i32_e32 v25, vcc, s11, v24                        ; 4A32300B
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v26, v25                             ; 3E1A331A
>	v_add_i32_e32 v25, vcc, s10, v24                        ; 4A32300A
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v26, v25                             ; 3E28331A
>	v_add_i32_e32 v25, vcc, s9, v24                         ; 4A323009
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v26, v25                             ; 3E2A331A
>	v_add_i32_e32 v25, vcc, s8, v24                         ; 4A323008
>	v_add_i32_e32 v24, vcc, s7, v24                         ; 4A303007
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v24, v3, v24                           ; 0A303103
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v26, v25                             ; 3E2C331A
>	v_mac_f32_e32 v23, v26, v24                             ; 3E2E311A
>	s_buffer_load_dword s7, s[0:3], 0x388                   ; C20380FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s7, 0                                      ; BF068007
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v24, v31                              ; 7E30111F
>	v_mul_lo_i32 v24, v24, 48                               ; D2D60018 00016118
>	v_add_i32_e32 v25, vcc, 0x70, v24                       ; 4A3230FF 00000070
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v27, v25                              ; 3E12331B
>	v_add_i32_e32 v25, vcc, 0x7c, v24                       ; 4A3230FF 0000007C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v0, v25                           ; 0A323300
>	v_mac_f32_e32 v6, v27, v25                              ; 3E0C331B
>	v_add_i32_e32 v25, vcc, 0x8c, v24                       ; 4A3230FF 0000008C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v1, v25                           ; 0A323301
>	v_mac_f32_e32 v19, v27, v25                             ; 3E26331B
>	v_add_i32_e32 v25, vcc, 0x74, v24                       ; 4A3230FF 00000074
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v27, v25                             ; 3E14331B
>	v_add_i32_e32 v25, vcc, 0x78, v24                       ; 4A3230FF 00000078
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v27, v25                              ; 3E08331B
>	v_add_i32_e32 v25, vcc, 0x80, v24                       ; 4A3230FF 00000080
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v27, v25                              ; 3E0A331B
>	v_add_i32_e32 v25, vcc, 0x84, v24                       ; 4A3230FF 00000084
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v27, v25                             ; 3E1C331B
>	v_add_i32_e32 v25, vcc, 0x88, v24                       ; 4A3230FF 00000088
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v27, v25                             ; 3E1A331B
>	v_add_i32_e32 v25, vcc, 0x90, v24                       ; 4A3230FF 00000090
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v27, v25                             ; 3E28331B
>	v_add_i32_e32 v25, vcc, 0x94, v24                       ; 4A3230FF 00000094
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v27, v25                             ; 3E2A331B
>	v_add_i32_e32 v25, vcc, 0x98, v24                       ; 4A3230FF 00000098
>	v_add_i32_e32 v24, vcc, 0x9c, v24                       ; 4A3030FF 0000009C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v24, v3, v24                           ; 0A303103
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v27, v25                             ; 3E2C331B
>	v_mac_f32_e32 v23, v27, v24                             ; 3E2E311B
>	v_mul_f32_e32 v16, s5, v16                              ; 10202005
>	v_mul_f32_e32 v15, s6, v15                              ; 101E1E06
>	v_mul_f32_e32 v10, v10, v16                             ; 1014210A
>	v_mac_f32_e32 v10, v9, v15                              ; 3E141F09
>	v_mul_f32_e32 v9, v14, v16                              ; 1012210E
>	v_mac_f32_e32 v9, v5, v15                               ; 3E121F05
>	v_mul_f32_e32 v5, s4, v17                               ; 100A2204
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	v_mac_f32_e32 v10, v4, v5                               ; 3E140B04
>	v_mul_f32_e32 v4, v21, v16                              ; 10082115
>	v_mac_f32_e32 v4, v20, v15                              ; 3E081F14
>	v_mac_f32_e32 v10, v6, v18                              ; 3E142506
>	v_mac_f32_e32 v4, v22, v5                               ; 3E080B16
>	v_mac_f32_e32 v4, v23, v18                              ; 3E082517
>	v_add_f32_e32 v0, v0, v10                               ; 06001500
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_add_f32_e32 v3, v3, v4                                ; 06060903
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                                ; 10080004
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	v_mul_f32_e32 v6, 0, v16                                ; 100C2080
>	v_mac_f32_e32 v9, v13, v5                               ; 3E120B0D
>	v_mac_f32_e32 v6, 0, v15                                ; 3E0C1E80
>	v_mac_f32_e32 v6, 0, v5                                 ; 3E0C0A80
>	v_mac_f32_e32 v9, v19, v18                              ; 3E122513
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_add_f32_e32 v5, v18, v6                               ; 060A0D12
>	v_add_f32_e32 v1, v1, v9                                ; 06021301
>	v_mul_f32_e32 v6, s5, v0                                ; 100C0005
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v6, s4, v1                                ; 3E0C0204
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	v_mul_f32_e32 v9, s6, v0                                ; 10120006
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	v_mac_f32_e32 v9, s5, v1                                ; 3E120205
>	v_mac_f32_e32 v4, s8, v1                                ; 3E080208
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mul_f32_e32 v10, s7, v0                               ; 10140007
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v9, s4, v3                                ; 3E120604
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	v_mac_f32_e32 v10, s6, v1                               ; 3E140206
>	v_mac_f32_e32 v10, s5, v3                               ; 3E140605
>	v_mac_f32_e32 v6, s8, v3                                ; 3E0C0608
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	v_mac_f32_e32 v4, s7, v3                                ; 3E080607
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v10, s4, v5                               ; 3E140A04
>	s_buffer_load_dword s4, s[0:3], 0x390                   ; C20200FF 00000390
>	s_buffer_load_dword s9, s[0:3], 0x391                   ; C20480FF 00000391
>	s_buffer_load_dword s10, s[0:3], 0x392                  ; C20500FF 00000392
>	v_mac_f32_e32 v9, s8, v5                                ; 3E120A08
>	s_buffer_load_dword s5, s[0:3], 0x15                    ; C2028115
>	s_buffer_load_dword s12, s[0:3], 0x394                  ; C20600FF 00000394
>	v_mac_f32_e32 v4, s6, v5                                ; 3E080A06
>	v_mac_f32_e32 v6, s7, v5                                ; 3E0C0A07
>	v_add_f32_e32 v5, 0xb9d1b717, v9                        ; 060A12FF B9D1B717
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_add_f32_e32 v9, s4, v11                               ; 06121604
>	s_buffer_load_dword s4, s[0:3], 0x395                   ; C20200FF 00000395
>	v_add_f32_e32 v11, s9, v12                              ; 06161809
>	s_buffer_load_dword s9, s[0:3], 0x396                   ; C20480FF 00000396
>	v_mov_b32_e32 v12, s10                                  ; 7E18020A
>	s_buffer_load_dword s10, s[0:3], 0x397                  ; C20500FF 00000397
>	s_buffer_load_dword s11, s[0:3], 0x393                  ; C20580FF 00000393
>	v_mac_f32_e32 v11, s5, v12                              ; 3E161805
>	v_mov_b32_e32 v12, s12                                  ; 7E18020C
>	v_mac_f32_e32 v9, s5, v12                               ; 3E121805
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v12, s4                                   ; 7E180204
>	v_mac_f32_e32 v11, s5, v12                              ; 3E161805
>	v_mov_b32_e32 v12, s9                                   ; 7E180209
>	v_mad_f32 v7, s5, v12, v7                               ; D2820007 041E1805
>	v_mov_b32_e32 v12, s10                                  ; 7E18020A
>	v_mac_f32_e32 v8, s5, v12                               ; 3E101805
>	v_mov_b32_e32 v12, s11                                  ; 7E18020B
>	v_mul_f32_e32 v12, s5, v12                              ; 10181805
>	v_mul_f32_e32 v12, 0x40c90e56, v12                      ; 101818FF 40C90E56
>	v_mul_f32_e32 v12, 0x3e22f983, v12                      ; 101818FF 3E22F983
>	v_fract_f32_e32 v12, v12                                ; 7E18410C
>	v_sin_f32_e32 v13, v12                                  ; 7E1A6B0C
>	v_cos_f32_e32 v12, v12                                  ; 7E186D0C
>	s_buffer_load_dword s9, s[0:3], 0x38c                   ; C20480FF 0000038C
>	s_buffer_load_dword s10, s[0:3], 0x38d                  ; C20500FF 0000038D
>	v_add_f32_e32 v11, -0.5, v11                            ; 061616F1
>	s_buffer_load_dword s11, s[0:3], 0x38e                  ; C20580FF 0000038E
>	s_buffer_load_dword s6, s[0:3], 0x18                    ; C2030118
>	s_buffer_load_dword s7, s[0:3], 0x19                    ; C2038119
>	s_buffer_load_dword s8, s[0:3], 0x1a                    ; C204011A
>	s_buffer_load_dword s4, s[0:3], 0x1b                    ; C202011B
>	s_buffer_load_dword s2, s[0:3], 0x38f                   ; C20100FF 0000038F
>	v_add_f32_e32 v9, -0.5, v9                              ; 061212F1
>	v_mul_f32_e32 v14, v13, v11                             ; 101C170D
>	v_mad_f32 v14, v9, v12, -v14                            ; D282000E 843A1909
>	v_mad_f32 v9, v9, v13, 0.5                              ; D2820009 03C21B09
>	v_mac_f32_e32 v9, v12, v11                              ; 3E12170C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_rcp_f32_e64 v11, |s9|                                 ; D354010B 00000009
>	v_rcp_f32_e32 v13, s10                                  ; 7E1A540A
>	v_rcp_f32_e64 v12, |s11|                                ; D354010C 0000000B
>	v_rcp_f32_e32 v15, s2                                   ; 7E1E5402
>	v_mul_f32_e32 v11, s5, v11                              ; 10161605
>	v_mul_f32_e32 v16, v13, v11                             ; 1020170D
>	v_floor_f32_e32 v16, v16                                ; 7E204910
>	v_mul_f32_e32 v12, s5, v12                              ; 10181805
>	v_mad_f32 v11, v11, v13, -v16                           ; D282000B 84421B0B
>	v_mul_f32_e32 v16, v15, v12                             ; 1020190F
>	v_floor_f32_e32 v16, v16                                ; 7E204910
>	v_mad_f32 v12, v12, v15, -v16                           ; D282000C 84421F0C
>	v_cmp_gt_f32_e64 s[0:1], s9, 0                          ; D0080000 00010009
>	v_mov_b32_e32 v16, s9                                   ; 7E200209
>	v_cndmask_b32_e64 v16, v16, 1.0, s[0:1]                 ; D2000010 0001E510
>	v_cmp_le_f32_e32 vcc, 0, v16                            ; 7C062080
>	v_mul_f32_e32 v11, s10, v11                             ; 1016160A
>	v_cndmask_b32_e32 v16, -1.0, v16, vcc                   ; 002020F3
>	v_floor_f32_e32 v11, v11                                ; 7E16490B
>	v_mul_f32_e32 v11, v11, v16                             ; 1016210B
>	v_bfrev_b32_e32 v16, 1                                  ; 7E207081
>	v_cmp_lt_f32_e32 vcc, s11, v16                          ; 7C02200B
>	v_xor_b32_e32 v16, s11, v16                             ; 3A20200B
>	v_cndmask_b32_e64 v16, v16, 1.0, vcc                    ; D2000010 01A9E510
>	v_cmp_le_f32_e32 vcc, 0, v16                            ; 7C062080
>	v_mul_f32_e32 v12, s2, v12                              ; 10181802
>	v_cndmask_b32_e32 v16, -1.0, v16, vcc                   ; 002020F3
>	v_floor_f32_e32 v12, v12                                ; 7E18490C
>	v_mul_f32_e32 v12, v12, v16                             ; 1018210C
>	v_mov_b32_e32 v16, s6                                   ; 7E200206
>	v_mac_f32_e32 v16, s7, v5                               ; 3E200A07
>	v_add_f32_e64 v16, v16, 0 clamp                         ; D2060810 00010110
>	v_log_f32_e32 v16, v16                                  ; 7E204F10
>	v_add_f32_e32 v14, 0.5, v14                             ; 061C1CF0
>	v_mac_f32_e32 v14, v13, v11                             ; 3E1C170D
>	v_mac_f32_e32 v9, v15, v12                              ; 3E12190F
>	v_mul_legacy_f32_e32 v11, s8, v16                       ; 0E162008
>	v_exp_f32_e32 v11, v11                                  ; 7E164B0B
>	v_sub_f32_e64 v12, 1.0, s4                              ; D208000C 000008F2
>	v_mac_f32_e32 v12, s4, v11                              ; 3E181604
>	v_mul_f32_e32 v11, v12, v12                             ; 1016190C
>	exp 15, 32, 0, 0, 0, v14, v9, v7, v8                    ; F800020F 0807090E
>	exp 15, 33, 0, 0, 0, v11, v0, v1, v3                    ; F800021F 0301000B
>	exp 15, 12, 0, 1, 0, v4, v6, v5, v10                    ; F80008CF 0A050604
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2372 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                    ; BE80047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                      ; C08E050C
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                     ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	v_mov_b32_e32 v5, v2                                      ; 7E0A0302
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_mov_b32_e32 v4, v3                                      ; 7E080303
>	v_interp_p1_f32 v0, v5, 2, 0, [m0]                        ; C8000205
>	v_interp_p2_f32 v0, [v0], v4, 2, 0, [m0]                  ; C8010204
>	v_interp_p1_f32 v1, v5, 3, 0, [m0]                        ; C8040305
>	v_interp_p2_f32 v1, [v1], v4, 3, 0, [m0]                  ; C8050304
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s4, s4, s27                                     ; 87041B04
>	image_sample v[0:3], v[0:1], s[20:27], s[4:7] dmask:0xf   ; F0800F00 00250000
>	v_interp_p1_f32 v6, v5, 0, 0, [m0]                        ; C8180005
>	v_interp_p2_f32 v6, [v6], v4, 0, 0, [m0]                  ; C8190004
>	v_interp_p1_f32 v7, v5, 1, 0, [m0]                        ; C81C0105
>	s_and_b32 s28, s28, s19                                   ; 871C131C
>	v_interp_p2_f32 v7, [v7], v4, 1, 0, [m0]                  ; C81D0104
>	s_and_b64 exec, exec, s[0:1]                              ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	image_sample v[6:8], v[6:7], s[12:19], s[28:31] dmask:0x7 ; F0800700 00E30606
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v1, v1, v7                                  ; 10020F01
>	v_mul_f32_e32 v0, v0, v6                                  ; 10000D00
>	v_interp_p1_f32 v6, v5, 2, 1, [m0]                        ; C8180605
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x3                       ; C2020103
>	s_buffer_load_dword s5, s[0:3], 0x7                       ; C2028107
>	v_interp_p2_f32 v6, [v6], v4, 2, 1, [m0]                  ; C8190604
>	s_buffer_load_dword s0, s[0:3], 0x10                      ; C2000110
>	v_interp_p1_f32 v5, v5, 0, 1, [m0]                        ; C8140405
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mov_b32_e32 v7, s4                                      ; 7E0E0204
>	v_sub_f32_e32 v7, s5, v7                                  ; 080E0E05
>	v_add_f32_e32 v7, 0x3a83126f, v7                          ; 060E0EFF 3A83126F
>	v_rcp_f32_e32 v7, v7                                      ; 7E0E5507
>	v_subrev_f32_e32 v6, s4, v6                               ; 0A0C0C04
>	v_max_f32_e32 v6, 0, v6                                   ; 200C0C80
>	v_mul_f32_e32 v2, v2, v8                                  ; 10041102
>	v_mul_f32_e32 v6, v7, v6                                  ; 100C0D07
>	v_log_f32_e32 v6, v6                                      ; 7E0C4F06
>	v_floor_f32_e32 v7, s5                                    ; 7E0E4805
>	v_sub_f32_e32 v7, s5, v7                                  ; 080E0E05
>	v_mul_f32_e32 v7, 0x41000000, v7                          ; 100E0EFF 41000000
>	v_mul_legacy_f32_e32 v6, v7, v6                           ; 0E0C0D07
>	v_exp_f32_e32 v6, v6                                      ; 7E0C4B06
>	v_add_f32_e64 v6, v6, 0 clamp                             ; D2060806 00010106
>	v_interp_p2_f32 v5, [v5], v4, 0, 1, [m0]                  ; C8150404
>	v_mul_f32_e32 v0, s0, v0                                  ; 10000000
>	v_mul_f32_e32 v4, v6, v5                                  ; 10080B06
>	v_mul_f32_e32 v1, s0, v1                                  ; 10020200
>	v_mul_f32_e32 v2, s0, v2                                  ; 10040400
>	v_mul_f32_e32 v0, v4, v0                                  ; 10000104
>	v_mul_f32_e32 v1, v4, v1                                  ; 10020304
>	v_mul_f32_e32 v2, v4, v2                                  ; 10040504
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 272 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xy, GENERIC[1]
>DCL CONST[0..217]
>DCL TEMP[0..7], LOCAL
>DCL ADDR[0]
>IMM[0] INT32 {1, 2, 0, 0}
>IMM[1] FLT32 {    2.0000,     1.0000,     0.0000,     8.0000}
>IMM[2] FLT32 {    0.0010,     0.5000,     0.0000,     0.0000}
>  0: F2I TEMP[0].y, IN[1].xyyy
>  1: UARL ADDR[0].x, TEMP[0].yyyy
>  2: MOV TEMP[1].xyz, CONST[ADDR[0].x+8].xyzx
>  3: UADD TEMP[2].x, TEMP[0].yyyy, IMM[0].xxxx
>  4: UARL ADDR[0].x, TEMP[2].xxxx
>  5: MOV TEMP[2].xyz, CONST[ADDR[0].x+8].xyzx
>  6: ADD TEMP[3].xyz, TEMP[2].xyzz, -TEMP[1].xyzz
>  7: MUL TEMP[4], CONST[0], TEMP[1].xxxx
>  8: MAD TEMP[4], CONST[1], TEMP[1].yyyy, TEMP[4]
>  9: MAD TEMP[4], CONST[2], TEMP[1].zzzz, TEMP[4]
> 10: ADD TEMP[4].xyw, TEMP[4], CONST[3]
> 11: MUL TEMP[5], CONST[0], TEMP[2].xxxx
> 12: MAD TEMP[5], CONST[1], TEMP[2].yyyy, TEMP[5]
> 13: MAD TEMP[5], CONST[2], TEMP[2].zzzz, TEMP[5]
> 14: ADD TEMP[5].xyw, TEMP[5], CONST[3]
> 15: RCP TEMP[6].x, TEMP[4].wwww
> 16: MUL TEMP[2].xy, TEMP[4].xyyy, TEMP[6].xxxx
> 17: RCP TEMP[6].x, TEMP[5].wwww
> 18: MUL TEMP[4].xy, TEMP[5].xyyy, TEMP[6].xxxx
> 19: ADD TEMP[2].xy, TEMP[4].xyyy, -TEMP[2].xyyy
> 20: MUL TEMP[4].x, IN[0].yyyy, IMM[1].xxxx
> 21: MUL TEMP[4].x, TEMP[2].xxxx, TEMP[4].xxxx
> 22: MUL TEMP[5].x, -IN[0].yyyy, IMM[1].xxxx
> 23: MUL TEMP[2].x, TEMP[2].yyyy, TEMP[5].xxxx
> 24: MOV TEMP[4].y, TEMP[2].xxxx
> 25: MUL TEMP[5].x, IN[0].xxxx, IMM[1].xxxx
> 26: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 27: MAD TEMP[2].xyz, TEMP[3].xyzz, TEMP[5].xxxx, TEMP[1].xyzz
> 28: MOV TEMP[5].y, IMM[1].yyyy
> 29: RCP TEMP[6].x, CONST[7].yyyy
> 30: MUL TEMP[5].x, CONST[7].xxxx, TEMP[6].xxxx
> 31: MOV TEMP[6].zw, IMM[1].zzzz
> 32: DP2 TEMP[7].x, TEMP[4].yxxx, TEMP[4].yxxx
> 33: RSQ TEMP[7].x, TEMP[7].xxxx
> 34: MUL TEMP[4].xy, TEMP[4].yxxx, TEMP[7].xxxx
> 35: MUL TEMP[4].xy, TEMP[4].xyyy, CONST[7].yxxx
> 36: MUL TEMP[6].xy, TEMP[4].xyyy, TEMP[5].xyyy
> 37: MUL TEMP[4], CONST[0], TEMP[2].xxxx
> 38: MAD TEMP[4], CONST[1], TEMP[2].yyyy, TEMP[4]
> 39: MAD TEMP[4], CONST[2], TEMP[2].zzzz, TEMP[4]
> 40: ADD TEMP[4], TEMP[4], CONST[3]
> 41: UARL ADDR[0].x, TEMP[0].yyyy
> 42: UARL ADDR[0].x, TEMP[0].yyyy
> 43: MAD TEMP[4], TEMP[6], CONST[ADDR[0].x+8].wwww, TEMP[4]
> 44: MAD TEMP[5].x, TEMP[4].zzzz, CONST[6].yyyy, CONST[6].xxxx
> 45: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 46: POW TEMP[5].x, TEMP[5].xxxx, CONST[6].zzzz
> 47: ADD TEMP[6].x, IMM[1].yyyy, -CONST[6].wwww
> 48: MAD TEMP[5].x, CONST[6].wwww, TEMP[5].xxxx, TEMP[6].xxxx
> 49: ADD TEMP[1].xyz, TEMP[1].xyzz, -CONST[4].xyzz
> 50: UADD TEMP[0].x, TEMP[0].yyyy, IMM[0].yyyy
> 51: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[1].xyzz
> 52: RSQ TEMP[6].x, TEMP[6].xxxx
> 53: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[6].xxxx
> 54: DP3 TEMP[6].x, TEMP[3].xyzz, TEMP[3].xyzz
> 55: RSQ TEMP[6].x, TEMP[6].xxxx
> 56: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[6].xxxx
> 57: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[3].xyzz
> 58: ABS TEMP[1].x, TEMP[1].xxxx
> 59: ADD TEMP[1].x, IMM[1].yyyy, -TEMP[1].xxxx
> 60: MUL TEMP[1].x, TEMP[1].xxxx, IMM[1].wwww
> 61: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 62: UARL ADDR[0].x, TEMP[0].xxxx
> 63: MUL TEMP[0], CONST[ADDR[0].x+8], TEMP[1].xxxx
> 64: MUL TEMP[1].x, TEMP[5].xxxx, TEMP[5].xxxx
> 65: ADD TEMP[2].x, TEMP[2].yyyy, -CONST[4].wwww
> 66: MAX TEMP[2].x, TEMP[2].xxxx, IMM[1].zzzz
> 67: ADD TEMP[3].x, CONST[5].wwww, -CONST[4].wwww
> 68: ADD TEMP[3].x, TEMP[3].xxxx, IMM[2].xxxx
> 69: RCP TEMP[3].x, TEMP[3].xxxx
> 70: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 71: FRC TEMP[3].x, CONST[5].wwww
> 72: MUL TEMP[3].x, TEMP[3].xxxx, IMM[1].wwww
> 73: POW TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 74: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 75: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 76: MUL TEMP[0], TEMP[0], TEMP[1].xxxx
> 77: ADD TEMP[1].xy, IN[0].yxxx, IMM[2].yyyy
> 78: MOV OUT[0], TEMP[4]
> 79: MOV OUT[1], TEMP[0]
> 80: MOV OUT[2].xy, TEMP[1].xyxx
> 81: END
>radeonsi: Compiling shader 55
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 1
>  %25 = fptosi float %24 to i32
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = shl i32 %25, 4
>  %29 = add i32 %28, 128
>  %30 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %29)
>  %31 = shl i32 %25, 4
>  %32 = add i32 %31, 132
>  %33 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %32)
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = shl i32 %25, 4
>  %37 = add i32 %36, 136
>  %38 = call float @llvm.SI.load.const(<16 x i8> %35, i32 %37)
>  %39 = add i32 %25, 1
>  %40 = shl i32 %39, 4
>  %41 = add i32 %40, 128
>  %42 = call float @llvm.SI.load.const(<16 x i8> %35, i32 %41)
>  %43 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %44 = load <16 x i8>, <16 x i8> addrspace(2)* %43, align 16, !invariant.load !0
>  %45 = shl i32 %39, 4
>  %46 = add i32 %45, 132
>  %47 = call float @llvm.SI.load.const(<16 x i8> %44, i32 %46)
>  %48 = shl i32 %39, 4
>  %49 = add i32 %48, 136
>  %50 = call float @llvm.SI.load.const(<16 x i8> %44, i32 %49)
>  %51 = fsub float %42, %30
>  %52 = fsub float %47, %33
>  %53 = fsub float %50, %38
>  %54 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %55 = load <16 x i8>, <16 x i8> addrspace(2)* %54, align 16, !invariant.load !0
>  %56 = call float @llvm.SI.load.const(<16 x i8> %55, i32 0)
>  %57 = fmul float %56, %30
>  %58 = call float @llvm.SI.load.const(<16 x i8> %55, i32 4)
>  %59 = fmul float %58, %30
>  %60 = call float @llvm.SI.load.const(<16 x i8> %55, i32 12)
>  %61 = fmul float %60, %30
>  %62 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %63 = load <16 x i8>, <16 x i8> addrspace(2)* %62, align 16, !invariant.load !0
>  %64 = call float @llvm.SI.load.const(<16 x i8> %63, i32 16)
>  %65 = fmul float %64, %33
>  %66 = fadd float %65, %57
>  %67 = call float @llvm.SI.load.const(<16 x i8> %63, i32 20)
>  %68 = fmul float %67, %33
>  %69 = fadd float %68, %59
>  %70 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %71 = load <16 x i8>, <16 x i8> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = call float @llvm.SI.load.const(<16 x i8> %71, i32 28)
>  %73 = fmul float %72, %33
>  %74 = fadd float %73, %61
>  %75 = call float @llvm.SI.load.const(<16 x i8> %71, i32 32)
>  %76 = fmul float %75, %38
>  %77 = fadd float %76, %66
>  %78 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %79 = load <16 x i8>, <16 x i8> addrspace(2)* %78, align 16, !invariant.load !0
>  %80 = call float @llvm.SI.load.const(<16 x i8> %79, i32 36)
>  %81 = fmul float %80, %38
>  %82 = fadd float %81, %69
>  %83 = call float @llvm.SI.load.const(<16 x i8> %79, i32 44)
>  %84 = fmul float %83, %38
>  %85 = fadd float %84, %74
>  %86 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %87 = load <16 x i8>, <16 x i8> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = call float @llvm.SI.load.const(<16 x i8> %87, i32 48)
>  %89 = fadd float %77, %88
>  %90 = call float @llvm.SI.load.const(<16 x i8> %87, i32 52)
>  %91 = fadd float %82, %90
>  %92 = call float @llvm.SI.load.const(<16 x i8> %87, i32 60)
>  %93 = fadd float %85, %92
>  %94 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %95 = load <16 x i8>, <16 x i8> addrspace(2)* %94, align 16, !invariant.load !0
>  %96 = call float @llvm.SI.load.const(<16 x i8> %95, i32 0)
>  %97 = fmul float %96, %42
>  %98 = call float @llvm.SI.load.const(<16 x i8> %95, i32 4)
>  %99 = fmul float %98, %42
>  %100 = call float @llvm.SI.load.const(<16 x i8> %95, i32 12)
>  %101 = fmul float %100, %42
>  %102 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %103 = load <16 x i8>, <16 x i8> addrspace(2)* %102, align 16, !invariant.load !0
>  %104 = call float @llvm.SI.load.const(<16 x i8> %103, i32 16)
>  %105 = fmul float %104, %47
>  %106 = fadd float %105, %97
>  %107 = call float @llvm.SI.load.const(<16 x i8> %103, i32 20)
>  %108 = fmul float %107, %47
>  %109 = fadd float %108, %99
>  %110 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %111 = load <16 x i8>, <16 x i8> addrspace(2)* %110, align 16, !invariant.load !0
>  %112 = call float @llvm.SI.load.const(<16 x i8> %111, i32 28)
>  %113 = fmul float %112, %47
>  %114 = fadd float %113, %101
>  %115 = call float @llvm.SI.load.const(<16 x i8> %111, i32 32)
>  %116 = fmul float %115, %50
>  %117 = fadd float %116, %106
>  %118 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %119 = load <16 x i8>, <16 x i8> addrspace(2)* %118, align 16, !invariant.load !0
>  %120 = call float @llvm.SI.load.const(<16 x i8> %119, i32 36)
>  %121 = fmul float %120, %50
>  %122 = fadd float %121, %109
>  %123 = call float @llvm.SI.load.const(<16 x i8> %119, i32 44)
>  %124 = fmul float %123, %50
>  %125 = fadd float %124, %114
>  %126 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %127 = load <16 x i8>, <16 x i8> addrspace(2)* %126, align 16, !invariant.load !0
>  %128 = call float @llvm.SI.load.const(<16 x i8> %127, i32 48)
>  %129 = fadd float %117, %128
>  %130 = call float @llvm.SI.load.const(<16 x i8> %127, i32 52)
>  %131 = fadd float %122, %130
>  %132 = call float @llvm.SI.load.const(<16 x i8> %127, i32 60)
>  %133 = fadd float %125, %132
>  %134 = fdiv float 1.000000e+00, %93, !fpmath !1
>  %135 = fmul float %89, %134
>  %136 = fmul float %91, %134
>  %137 = fdiv float 1.000000e+00, %133, !fpmath !1
>  %138 = fmul float %129, %137
>  %139 = fmul float %131, %137
>  %140 = fsub float %138, %135
>  %141 = fsub float %139, %136
>  %142 = fmul float %20, 2.000000e+00
>  %143 = fmul float %140, %142
>  %144 = fmul float %20, -2.000000e+00
>  %145 = fmul float %141, %144
>  %146 = fmul float %19, 2.000000e+00
>  %147 = call float @llvm.AMDGPU.clamp.(float %146, float 0.000000e+00, float 1.000000e+00)
>  %148 = fmul float %51, %147
>  %149 = fadd float %148, %30
>  %150 = fmul float %52, %147
>  %151 = fadd float %150, %33
>  %152 = fmul float %53, %147
>  %153 = fadd float %152, %38
>  %154 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %155 = load <16 x i8>, <16 x i8> addrspace(2)* %154, align 16, !invariant.load !0
>  %156 = call float @llvm.SI.load.const(<16 x i8> %155, i32 116)
>  %157 = fdiv float 1.000000e+00, %156, !fpmath !1
>  %158 = call float @llvm.SI.load.const(<16 x i8> %155, i32 112)
>  %159 = fmul float %158, %157
>  %160 = fmul float %145, %145
>  %161 = fmul float %143, %143
>  %162 = fadd float %160, %161
>  %163 = call float @llvm.sqrt.f32(float %162)
>  %164 = fdiv float 1.000000e+00, %163, !fpmath !1
>  %165 = fmul float %145, %164
>  %166 = fmul float %143, %164
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 116)
>  %170 = fmul float %165, %169
>  %171 = call float @llvm.SI.load.const(<16 x i8> %168, i32 112)
>  %172 = fmul float %166, %171
>  %173 = fmul float %170, %159
>  %174 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %175 = load <16 x i8>, <16 x i8> addrspace(2)* %174, align 16, !invariant.load !0
>  %176 = call float @llvm.SI.load.const(<16 x i8> %175, i32 0)
>  %177 = fmul float %176, %149
>  %178 = call float @llvm.SI.load.const(<16 x i8> %175, i32 4)
>  %179 = fmul float %178, %149
>  %180 = call float @llvm.SI.load.const(<16 x i8> %175, i32 8)
>  %181 = fmul float %180, %149
>  %182 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %183 = load <16 x i8>, <16 x i8> addrspace(2)* %182, align 16, !invariant.load !0
>  %184 = call float @llvm.SI.load.const(<16 x i8> %183, i32 12)
>  %185 = fmul float %184, %149
>  %186 = call float @llvm.SI.load.const(<16 x i8> %183, i32 16)
>  %187 = fmul float %186, %151
>  %188 = fadd float %187, %177
>  %189 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %190 = load <16 x i8>, <16 x i8> addrspace(2)* %189, align 16, !invariant.load !0
>  %191 = call float @llvm.SI.load.const(<16 x i8> %190, i32 20)
>  %192 = fmul float %191, %151
>  %193 = fadd float %192, %179
>  %194 = call float @llvm.SI.load.const(<16 x i8> %190, i32 24)
>  %195 = fmul float %194, %151
>  %196 = fadd float %195, %181
>  %197 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %198 = load <16 x i8>, <16 x i8> addrspace(2)* %197, align 16, !invariant.load !0
>  %199 = call float @llvm.SI.load.const(<16 x i8> %198, i32 28)
>  %200 = fmul float %199, %151
>  %201 = fadd float %200, %185
>  %202 = call float @llvm.SI.load.const(<16 x i8> %198, i32 32)
>  %203 = fmul float %202, %153
>  %204 = fadd float %203, %188
>  %205 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %206 = load <16 x i8>, <16 x i8> addrspace(2)* %205, align 16, !invariant.load !0
>  %207 = call float @llvm.SI.load.const(<16 x i8> %206, i32 36)
>  %208 = fmul float %207, %153
>  %209 = fadd float %208, %193
>  %210 = call float @llvm.SI.load.const(<16 x i8> %206, i32 40)
>  %211 = fmul float %210, %153
>  %212 = fadd float %211, %196
>  %213 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %214 = load <16 x i8>, <16 x i8> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = call float @llvm.SI.load.const(<16 x i8> %214, i32 44)
>  %216 = fmul float %215, %153
>  %217 = fadd float %216, %201
>  %218 = call float @llvm.SI.load.const(<16 x i8> %214, i32 48)
>  %219 = fadd float %204, %218
>  %220 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %221 = load <16 x i8>, <16 x i8> addrspace(2)* %220, align 16, !invariant.load !0
>  %222 = call float @llvm.SI.load.const(<16 x i8> %221, i32 52)
>  %223 = fadd float %209, %222
>  %224 = call float @llvm.SI.load.const(<16 x i8> %221, i32 56)
>  %225 = fadd float %212, %224
>  %226 = call float @llvm.SI.load.const(<16 x i8> %221, i32 60)
>  %227 = fadd float %217, %226
>  %228 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %229 = load <16 x i8>, <16 x i8> addrspace(2)* %228, align 16, !invariant.load !0
>  %230 = shl i32 %25, 4
>  %231 = add i32 %230, 140
>  %232 = call float @llvm.SI.load.const(<16 x i8> %229, i32 %231)
>  %233 = fmul float %173, %232
>  %234 = fadd float %233, %219
>  %235 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %236 = load <16 x i8>, <16 x i8> addrspace(2)* %235, align 16, !invariant.load !0
>  %237 = shl i32 %25, 4
>  %238 = add i32 %237, 140
>  %239 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %238)
>  %240 = fmul float %172, %239
>  %241 = fadd float %240, %223
>  %242 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %243 = load <16 x i8>, <16 x i8> addrspace(2)* %242, align 16, !invariant.load !0
>  %244 = shl i32 %25, 4
>  %245 = add i32 %244, 140
>  %246 = call float @llvm.SI.load.const(<16 x i8> %243, i32 %245)
>  %247 = fmul float %246, 0.000000e+00
>  %248 = fadd float %247, %225
>  %249 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %250 = load <16 x i8>, <16 x i8> addrspace(2)* %249, align 16, !invariant.load !0
>  %251 = shl i32 %25, 4
>  %252 = add i32 %251, 140
>  %253 = call float @llvm.SI.load.const(<16 x i8> %250, i32 %252)
>  %254 = fmul float %253, 0.000000e+00
>  %255 = fadd float %254, %227
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 100)
>  %259 = call float @llvm.SI.load.const(<16 x i8> %257, i32 96)
>  %260 = fmul float %248, %258
>  %261 = fadd float %260, %259
>  %262 = call float @llvm.AMDGPU.clamp.(float %261, float 0.000000e+00, float 1.000000e+00)
>  %263 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %264 = load <16 x i8>, <16 x i8> addrspace(2)* %263, align 16, !invariant.load !0
>  %265 = call float @llvm.SI.load.const(<16 x i8> %264, i32 104)
>  %266 = call float @llvm.pow.f32(float %262, float %265)
>  %267 = call float @llvm.SI.load.const(<16 x i8> %264, i32 108)
>  %268 = fsub float 1.000000e+00, %267
>  %269 = call float @llvm.SI.load.const(<16 x i8> %264, i32 108)
>  %270 = fmul float %269, %266
>  %271 = fadd float %270, %268
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 64)
>  %275 = fsub float %30, %274
>  %276 = call float @llvm.SI.load.const(<16 x i8> %273, i32 68)
>  %277 = fsub float %33, %276
>  %278 = call float @llvm.SI.load.const(<16 x i8> %273, i32 72)
>  %279 = fsub float %38, %278
>  %280 = add i32 %25, 2
>  %281 = fmul float %275, %275
>  %282 = fmul float %277, %277
>  %283 = fadd float %282, %281
>  %284 = fmul float %279, %279
>  %285 = fadd float %283, %284
>  %286 = call float @llvm.sqrt.f32(float %285)
>  %287 = fdiv float 1.000000e+00, %286, !fpmath !1
>  %288 = fmul float %275, %287
>  %289 = fmul float %277, %287
>  %290 = fmul float %279, %287
>  %291 = fmul float %51, %51
>  %292 = fmul float %52, %52
>  %293 = fadd float %292, %291
>  %294 = fmul float %53, %53
>  %295 = fadd float %293, %294
>  %296 = call float @llvm.sqrt.f32(float %295)
>  %297 = fdiv float 1.000000e+00, %296, !fpmath !1
>  %298 = fmul float %51, %297
>  %299 = fmul float %52, %297
>  %300 = fmul float %53, %297
>  %301 = fmul float %288, %298
>  %302 = fmul float %289, %299
>  %303 = fadd float %302, %301
>  %304 = fmul float %290, %300
>  %305 = fadd float %303, %304
>  %306 = call float @llvm.fabs.f32(float %305)
>  %307 = fsub float 1.000000e+00, %306
>  %308 = fmul float %307, 8.000000e+00
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %311 = load <16 x i8>, <16 x i8> addrspace(2)* %310, align 16, !invariant.load !0
>  %312 = shl i32 %280, 4
>  %313 = add i32 %312, 128
>  %314 = call float @llvm.SI.load.const(<16 x i8> %311, i32 %313)
>  %315 = fmul float %314, %309
>  %316 = shl i32 %280, 4
>  %317 = add i32 %316, 132
>  %318 = call float @llvm.SI.load.const(<16 x i8> %311, i32 %317)
>  %319 = fmul float %318, %309
>  %320 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %321 = load <16 x i8>, <16 x i8> addrspace(2)* %320, align 16, !invariant.load !0
>  %322 = shl i32 %280, 4
>  %323 = add i32 %322, 136
>  %324 = call float @llvm.SI.load.const(<16 x i8> %321, i32 %323)
>  %325 = fmul float %324, %309
>  %326 = shl i32 %280, 4
>  %327 = add i32 %326, 140
>  %328 = call float @llvm.SI.load.const(<16 x i8> %321, i32 %327)
>  %329 = fmul float %328, %309
>  %330 = fmul float %271, %271
>  %331 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %332 = load <16 x i8>, <16 x i8> addrspace(2)* %331, align 16, !invariant.load !0
>  %333 = call float @llvm.SI.load.const(<16 x i8> %332, i32 76)
>  %334 = fsub float %151, %333
>  %335 = call float @llvm.maxnum.f32(float %334, float 0.000000e+00)
>  %336 = call float @llvm.SI.load.const(<16 x i8> %332, i32 92)
>  %337 = call float @llvm.SI.load.const(<16 x i8> %332, i32 76)
>  %338 = fsub float %336, %337
>  %339 = fadd float %338, 0x3F50624DE0000000
>  %340 = fdiv float 1.000000e+00, %339, !fpmath !1
>  %341 = fmul float %335, %340
>  %342 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %343 = load <16 x i8>, <16 x i8> addrspace(2)* %342, align 16, !invariant.load !0
>  %344 = call float @llvm.SI.load.const(<16 x i8> %343, i32 92)
>  %345 = call float @llvm.floor.f32(float %344)
>  %346 = fsub float %344, %345
>  %347 = fmul float %346, 8.000000e+00
>  %348 = call float @llvm.pow.f32(float %341, float %347)
>  %349 = call float @llvm.AMDGPU.clamp.(float %348, float 0.000000e+00, float 1.000000e+00)
>  %350 = fmul float %330, %349
>  %351 = fmul float %315, %350
>  %352 = fmul float %319, %350
>  %353 = fmul float %325, %350
>  %354 = fmul float %329, %350
>  %355 = fadd float %20, 5.000000e-01
>  %356 = fadd float %19, 5.000000e-01
>  %357 = bitcast i32 %12 to float
>  %358 = insertvalue <{ float, float, float }> undef, float %357, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %351, float %352, float %353, float %354)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %355, float %356, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %234, float %241, float %248, float %255)
>  ret <{ float, float, float }> %358
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xy, GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0..1], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[1].xyz, IN[0].xyzz, TEMP[0].xyzz
>  3: MUL TEMP[0].xyz, TEMP[1].xyzz, TEMP[0].wwww
>  4: MOV OUT[0], TEMP[0].xyzz
>  5: END
>radeonsi: Compiling shader 56
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = fmul float %43, %39
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %46 = fmul float %45, %40
>  %47 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %48 = fmul float %47, %41
>  %49 = fmul float %44, %42
>  %50 = fmul float %46, %42
>  %51 = fmul float %48, %42
>  %52 = bitcast float %5 to i32
>  %53 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %52, 10
>  %54 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %53, float %49, 11
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %54, float %50, 12
>  %56 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %55, float %51, 13
>  %57 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %56, float %51, 14
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %57, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %58
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s7, s[0:3], 0x3                   ; C2038103
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                   ; C2028101
>	s_buffer_load_dword s11, s[0:3], 0x7                  ; C2058107
>	s_buffer_load_dword s14, s[0:3], 0xb                  ; C207010B
>	s_buffer_load_dword s18, s[0:3], 0xf                  ; C209010F
>	s_buffer_load_dword s8, s[0:3], 0x4                   ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                   ; C2048105
>	s_buffer_load_dword s12, s[0:3], 0x8                  ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                  ; C2068109
>	s_buffer_load_dword s15, s[0:3], 0xc                  ; C207810C
>	s_buffer_load_dword s16, s[0:3], 0xd                  ; C208010D
>	s_buffer_load_dword s19, s[0:3], 0x10                 ; C2098110
>	s_buffer_load_dword s20, s[0:3], 0x11                 ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                 ; C20A8112
>	s_buffer_load_dword s22, s[0:3], 0x13                 ; C20B0113
>	s_buffer_load_dword s23, s[0:3], 0x17                 ; C20B8117
>	s_buffer_load_dword s6, s[0:3], 0x2                   ; C2030102
>	s_buffer_load_dword s10, s[0:3], 0x6                  ; C2050106
>	s_buffer_load_dword s17, s[0:3], 0xe                  ; C208810E
>	s_buffer_load_dword s24, s[0:3], 0x18                 ; C20C0118
>	s_buffer_load_dword s25, s[0:3], 0x19                 ; C20C8119
>	s_buffer_load_dword s26, s[0:3], 0x1a                 ; C20D011A
>	s_buffer_load_dword s27, s[0:3], 0x1b                 ; C20D811B
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v9                              ; 7E001109
>	v_lshlrev_b32_e32 v0, 4, v0                           ; 34000084
>	v_add_i32_e32 v1, vcc, 0x80, v0                       ; 4A0200FF 00000080
>	buffer_load_dword v1, v1, s[0:3], 0 offen             ; E0301000 80000101
>	v_add_i32_e32 v3, vcc, 0x84, v0                       ; 4A0600FF 00000084
>	v_add_i32_e32 v5, vcc, 0x90, v0                       ; 4A0A00FF 00000090
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	v_add_i32_e32 v4, vcc, 0x88, v0                       ; 4A0800FF 00000088
>	v_add_i32_e32 v8, vcc, 0x94, v0                       ; 4A1000FF 00000094
>	buffer_load_dword v3, v3, s[0:3], 0 offen             ; E0301000 80000303
>	v_add_i32_e32 v9, vcc, 0x98, v0                       ; 4A1200FF 00000098
>	buffer_load_dword v8, v8, s[0:3], 0 offen             ; E0301000 80000808
>	buffer_load_dword v4, v4, s[0:3], 0 offen             ; E0301000 80000404
>	buffer_load_dword v9, v9, s[0:3], 0 offen             ; E0301000 80000909
>	s_waitcnt vmcnt(5) lgkmcnt(0)                         ; BF8C0075
>	v_mul_f32_e32 v15, s7, v1                             ; 101E0207
>	v_mul_f32_e32 v13, s4, v1                             ; 101A0204
>	v_mul_f32_e32 v14, s5, v1                             ; 101C0205
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mul_f32_e32 v16, s4, v5                             ; 10200A04
>	v_mul_f32_e32 v17, s5, v5                             ; 10220A05
>	v_subrev_f32_e32 v10, v1, v5                          ; 0A140B01
>	v_mul_f32_e32 v5, s7, v5                              ; 100A0A07
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mac_f32_e32 v15, s11, v3                            ; 3E1E060B
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_mac_f32_e32 v5, s11, v8                             ; 3E0A100B
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mac_f32_e32 v15, s14, v4                            ; 3E1E080E
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, s14, v9                             ; 3E0A120E
>	v_add_f32_e32 v15, s18, v15                           ; 061E1E12
>	v_add_f32_e32 v5, s18, v5                             ; 060A0A12
>	v_rcp_f32_e32 v15, v15                                ; 7E1E550F
>	v_mac_f32_e32 v13, s8, v3                             ; 3E1A0608
>	v_mac_f32_e32 v14, s9, v3                             ; 3E1C0609
>	v_rcp_f32_e32 v5, v5                                  ; 7E0A5505
>	v_mac_f32_e32 v16, s8, v8                             ; 3E201008
>	v_mac_f32_e32 v17, s9, v8                             ; 3E221009
>	v_mac_f32_e32 v13, s12, v4                            ; 3E1A080C
>	v_mac_f32_e32 v14, s13, v4                            ; 3E1C080D
>	v_mac_f32_e32 v16, s12, v9                            ; 3E20120C
>	v_mac_f32_e32 v17, s13, v9                            ; 3E22120D
>	v_add_f32_e32 v13, s15, v13                           ; 061A1A0F
>	v_add_f32_e32 v14, s16, v14                           ; 061C1C10
>	v_subrev_f32_e32 v11, v3, v8                          ; 0A161103
>	v_subrev_f32_e32 v8, s19, v1                          ; 0A100213
>	v_mul_f32_e32 v13, v15, v13                           ; 101A1B0F
>	v_mul_f32_e32 v14, v15, v14                           ; 101C1D0F
>	v_add_f32_e32 v16, s15, v16                           ; 0620200F
>	v_add_f32_e32 v17, s16, v17                           ; 06222210
>	v_mad_f32 v13, v16, v5, -v13                          ; D282000D 84360B10
>	v_subrev_f32_e32 v12, v4, v9                          ; 0A181304
>	v_subrev_f32_e32 v9, s20, v3                          ; 0A120614
>	v_mul_f32_e32 v16, v8, v8                             ; 10201108
>	v_mad_f32 v5, v17, v5, -v14                           ; D2820005 843A0B11
>	v_mul_f32_e32 v14, v10, v10                           ; 101C150A
>	v_mac_f32_e32 v14, v11, v11                           ; 3E1C170B
>	v_subrev_f32_e32 v15, s21, v4                         ; 0A1E0815
>	v_mac_f32_e32 v16, v9, v9                             ; 3E201309
>	v_mac_f32_e32 v16, v15, v15                           ; 3E201F0F
>	v_mac_f32_e32 v14, v12, v12                           ; 3E1C190C
>	v_rsq_f32_e32 v16, v16                                ; 7E205D10
>	v_rsq_f32_e32 v14, v14                                ; 7E1C5D0E
>	s_buffer_load_dword s19, s[0:3], 0xa                  ; C209810A
>	s_buffer_load_dword s21, s[0:3], 0x1d                 ; C20A811D
>	v_mul_f32_e32 v8, v16, v8                             ; 10101110
>	v_mul_f32_e32 v17, v14, v10                           ; 1022150E
>	v_mul_f32_e32 v8, v17, v8                             ; 10101111
>	v_mul_f32_e32 v9, v16, v9                             ; 10121310
>	v_mul_f32_e32 v17, v14, v11                           ; 1022170E
>	v_mac_f32_e32 v8, v17, v9                             ; 3E101311
>	v_add_f32_e32 v17, v6, v6                             ; 06220D06
>	v_add_f32_e64 v17, v17, 0 clamp                       ; D2060811 00010111
>	v_mad_f32 v1, v17, v10, v1                            ; D2820001 04061511
>	v_mad_f32 v3, v17, v11, v3                            ; D2820003 040E1711
>	v_mad_f32 v4, v17, v12, v4                            ; D2820004 04121911
>	v_mov_b32_e32 v17, s22                                ; 7E220216
>	v_sub_f32_e32 v17, s23, v17                           ; 08222217
>	v_add_f32_e32 v17, 0x3a83126f, v17                    ; 062222FF 3A83126F
>	v_mul_f32_e32 v15, v16, v15                           ; 101E1F10
>	v_mul_f32_e32 v12, v14, v12                           ; 1018190E
>	v_rcp_f32_e32 v17, v17                                ; 7E225511
>	v_mul_f32_e32 v14, s4, v1                             ; 101C0204
>	v_mac_f32_e32 v8, v12, v15                            ; 3E101F0C
>	v_mul_f32_e32 v12, s5, v1                             ; 10180205
>	v_mul_f32_e32 v15, s6, v1                             ; 101E0206
>	v_mul_f32_e32 v1, s7, v1                              ; 10020207
>	v_mac_f32_e32 v14, s8, v3                             ; 3E1C0608
>	v_mac_f32_e32 v12, s9, v3                             ; 3E180609
>	v_mac_f32_e32 v15, s10, v3                            ; 3E1E060A
>	v_mac_f32_e32 v1, s11, v3                             ; 3E02060B
>	v_subrev_f32_e32 v3, s22, v3                          ; 0A060616
>	v_max_f32_e32 v3, 0, v3                               ; 20060680
>	v_mul_f32_e32 v3, v17, v3                             ; 10060711
>	v_log_f32_e32 v3, v3                                  ; 7E064F03
>	v_floor_f32_e32 v16, s23                              ; 7E204817
>	v_mov_b32_e32 v9, 0x41000000                          ; 7E1202FF 41000000
>	v_sub_f32_e32 v16, s23, v16                           ; 08202017
>	v_mac_f32_e32 v14, s12, v4                            ; 3E1C080C
>	v_mac_f32_e32 v12, s13, v4                            ; 3E18080D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v15, s19, v4                            ; 3E1E0813
>	v_mac_f32_e32 v1, s14, v4                             ; 3E02080E
>	v_mul_f32_e32 v4, -2.0, v7                            ; 10080EF5
>	v_add_f32_e32 v17, v7, v7                             ; 06220F07
>	v_mul_f32_e32 v16, v9, v16                            ; 10202109
>	v_mul_legacy_f32_e32 v3, v16, v3                      ; 0E060710
>	v_mad_f32 v8, -|v8|, v9, v9                           ; D2820108 24261308
>	v_add_i32_e32 v16, vcc, 0xa0, v0                      ; 4A2000FF 000000A0
>	v_add_i32_e32 v9, vcc, 0xac, v0                       ; 4A1200FF 000000AC
>	v_mul_f32_e32 v13, v17, v13                           ; 101A1B11
>	v_add_i32_e32 v17, vcc, 0xa4, v0                      ; 4A2200FF 000000A4
>	v_mul_f32_e32 v4, v4, v5                              ; 10080B04
>	v_add_i32_e32 v5, vcc, 0xa8, v0                       ; 4A0A00FF 000000A8
>	v_add_i32_e32 v0, vcc, 0x8c, v0                       ; 4A0000FF 0000008C
>	buffer_load_dword v0, v0, s[0:3], 0 offen             ; E0301000 80000000
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	buffer_load_dword v9, v9, s[0:3], 0 offen             ; E0301000 80000909
>	v_add_f32_e32 v15, s17, v15                           ; 061E1E11
>	v_mov_b32_e32 v11, s24                                ; 7E160218
>	v_add_f32_e64 v8, v8, 0 clamp                         ; D2060808 00010108
>	s_buffer_load_dword s20, s[0:3], 0x1c                 ; C20A011C
>	v_rcp_f32_e32 v10, s21                                ; 7E145415
>	v_add_f32_e32 v1, s18, v1                             ; 06020212
>	v_add_f32_e32 v14, s15, v14                           ; 061C1C0F
>	v_add_f32_e32 v12, s16, v12                           ; 06181810
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v10, s20, v10                           ; 10141414
>	v_exp_f32_e32 v3, v3                                  ; 7E064B03
>	v_add_f32_e32 v7, 0.5, v7                             ; 060E0EF0
>	v_add_f32_e32 v6, 0.5, v6                             ; 060C0CF0
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mac_f32_e32 v15, 0, v0                              ; 3E1E0080
>	v_mac_f32_e32 v11, s25, v15                           ; 3E161E19
>	v_add_f32_e64 v11, v11, 0 clamp                       ; D206080B 0001010B
>	v_log_f32_e32 v11, v11                                ; 7E164F0B
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mul_f32_e32 v16, v8, v16                            ; 10202108
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_mul_f32_e32 v17, v8, v17                            ; 10222308
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mul_f32_e32 v5, v8, v5                              ; 100A0B08
>	v_mul_legacy_f32_e32 v11, s26, v11                    ; 0E16161A
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mul_f32_e32 v8, v8, v9                              ; 10101308
>	v_sub_f32_e64 v9, 1.0, s27                            ; D2080009 000036F2
>	v_exp_f32_e32 v11, v11                                ; 7E164B0B
>	v_mac_f32_e32 v9, s27, v11                            ; 3E12161B
>	v_mul_f32_e32 v11, v13, v13                           ; 10161B0D
>	v_mac_f32_e32 v11, v4, v4                             ; 3E160904
>	v_rsq_f32_e32 v11, v11                                ; 7E165D0B
>	v_mac_f32_e32 v1, 0, v0                               ; 3E020080
>	v_mul_f32_e32 v9, v9, v9                              ; 10121309
>	v_mul_f32_e32 v4, v11, v4                             ; 1008090B
>	v_mul_f32_e32 v11, v11, v13                           ; 10161B0B
>	v_mul_f32_e32 v4, s21, v4                             ; 10080815
>	v_mul_f32_e32 v11, s20, v11                           ; 10161614
>	v_mul_f32_e32 v4, v10, v4                             ; 1008090A
>	v_mac_f32_e32 v12, v0, v11                            ; 3E181700
>	v_mac_f32_e32 v14, v0, v4                             ; 3E1C0900
>	v_add_f32_e64 v0, v3, 0 clamp                         ; D2060800 00010103
>	v_mul_f32_e32 v0, v0, v9                              ; 10001300
>	v_mul_f32_e32 v3, v0, v16                             ; 10062100
>	v_mul_f32_e32 v4, v0, v17                             ; 10082300
>	v_mul_f32_e32 v5, v0, v5                              ; 100A0B00
>	v_mul_f32_e32 v0, v0, v8                              ; 10001100
>	exp 15, 32, 0, 0, 0, v3, v4, v5, v0                   ; F800020F 00050403
>	exp 15, 33, 0, 0, 0, v7, v6, v0, v0                   ; F800021F 00000607
>	exp 15, 12, 0, 1, 0, v14, v12, v15, v1                ; F80008CF 010F0C0E
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 992 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[4:7], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030400
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	v_interp_p1_f32 v2, v2, 2, 0, [m0]                      ; C8080202
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                ; C8090203
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v2, v6, v2                                ; 10040506
>	v_mul_f32_e32 v0, v4, v0                                ; 10000104
>	v_mul_f32_e32 v1, v5, v1                                ; 10020305
>	v_mul_f32_e32 v2, v7, v2                                ; 10040507
>	v_mul_f32_e32 v0, v7, v0                                ; 10000107
>	v_mul_f32_e32 v1, v7, v1                                ; 10020307
>	v_mov_b32_e32 v3, v2                                    ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 132 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xy, GENERIC[1]
>DCL CONST[0..10]
>DCL TEMP[0..10], LOCAL
>IMM[0] FLT32 {    2.0000,     0.3333,     0.0800,     0.3000}
>IMM[1] FLT32 {    1.0000,     1.8000,     0.4000,     3.0000}
>IMM[2] INT32 {1, 3, 4, 0}
>IMM[3] FLT32 {    0.9000,     0.0200,     0.7500,     0.6000}
>IMM[4] FLT32 {    0.2000,    -0.0400,     0.0300,     4.0000}
>IMM[5] FLT32 {    9.0000,     0.5000,     0.0100,     1.3000}
>IMM[6] FLT32 {    8.0000,     0.0000,    -1.0000,     1.0000}
>IMM[7] FLT32 {    0.9999,     0.0000,     0.0000,     0.0000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: MUL TEMP[1], CONST[0], CONST[7].xxxx
>  2: MAD TEMP[1], CONST[1], CONST[7].yyyy, TEMP[1]
>  3: MAD TEMP[1], CONST[2], CONST[7].zzzz, TEMP[1]
>  4: ADD TEMP[1].xyw, TEMP[1], CONST[3]
>  5: MOV TEMP[2].x, CONST[9].xxxx
>  6: MOV TEMP[3].x, CONST[9].yyyy
>  7: MAD TEMP[4].x, CONST[8].wwww, IMM[0].xxxx, CONST[9].zzzz
>  8: MAD TEMP[5].x, TEMP[4].xxxx, IMM[0].yyyy, IMM[0].zzzz
>  9: POW TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 10: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 11: MOV TEMP[6].x, IMM[1].xxxx
> 12: POW TEMP[7].x, CONST[4].yyyy, IMM[1].zzzz
> 13: RCP TEMP[7].x, TEMP[7].xxxx
> 14: MUL TEMP[7].x, IMM[1].yyyy, TEMP[7].xxxx
> 15: USEQ TEMP[8].x, TEMP[0].xxxx, IMM[2].xxxx
> 16: UIF TEMP[8].xxxx :0
> 17:   MAD TEMP[8].x, TEMP[4].xxxx, IMM[1].wwww, IMM[1].xxxx
> 18:   MUL TEMP[2].x, CONST[9].xxxx, TEMP[8].xxxx
> 19:   MUL TEMP[8].x, TEMP[5].xxxx, IMM[3].xxxx
> 20:   ADD TEMP[8].x, IMM[1].xxxx, -TEMP[8].xxxx
> 21:   MUL TEMP[3].x, CONST[9].yyyy, TEMP[8].xxxx
> 22: ELSE :0
> 23:   USEQ TEMP[8].x, TEMP[0].xxxx, IMM[2].yyyy
> 24:   UIF TEMP[8].xxxx :0
> 25:     ADD TEMP[8].x, TEMP[2].xxxx, IMM[3].yyyy
> 26:     MUL TEMP[8].x, TEMP[8].xxxx, IMM[3].zzzz
> 27:     MAD TEMP[9].x, TEMP[7].xxxx, IMM[1].zzzz, IMM[3].wwww
> 28:     MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 29:     MAD TEMP[9].x, TEMP[4].xxxx, IMM[4].xxxx, IMM[1].xxxx
> 30:     MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 31:     ADD TEMP[9].x, TEMP[3].xxxx, IMM[4].yyyy
> 32:     MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 33:     ADD TEMP[10].x, IMM[1].xxxx, -TEMP[5].xxxx
> 34:     MUL TEMP[3].x, TEMP[9].xxxx, TEMP[10].xxxx
> 35:     RCP TEMP[9].x, TEMP[1].wwww
> 36:     MUL TEMP[9].xy, TEMP[1].xyyy, TEMP[9].xxxx
> 37:     DP2 TEMP[9].x, IN[0].xyyy, TEMP[9].xyyy
> 38:     MUL TEMP[9].x, -TEMP[9].xxxx, IMM[4].zzzz
> 39:     MAD TEMP[9].x, TEMP[9].xxxx, TEMP[7].xxxx, IMM[1].xxxx
> 40:     MUL TEMP[2].x, TEMP[8].xxxx, TEMP[9].xxxx
> 41:     ADD TEMP[10].x, IMM[4].wwww, TEMP[4].xxxx
> 42:     MUL TEMP[8].x, TEMP[8].xxxx, TEMP[10].xxxx
> 43:     MUL TEMP[6].x, TEMP[8].xxxx, TEMP[9].xxxx
> 44:   ELSE :0
> 45:     USEQ TEMP[0].x, TEMP[0].xxxx, IMM[2].zzzz
> 46:     UIF TEMP[0].xxxx :0
> 47:       ADD TEMP[0].x, TEMP[3].xxxx, IMM[4].yyyy
> 48:       MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 49:       MUL TEMP[0].x, IMM[0].xxxx, TEMP[0].xxxx
> 50:       ADD TEMP[5].x, IMM[1].xxxx, -TEMP[5].xxxx
> 51:       MUL TEMP[3].x, TEMP[0].xxxx, TEMP[5].xxxx
> 52:       MUL TEMP[0].x, TEMP[2].xxxx, IMM[5].xxxx
> 53:       MAD TEMP[5].x, TEMP[4].xxxx, IMM[5].yyyy, IMM[1].xxxx
> 54:       MUL TEMP[6].x, TEMP[0].xxxx, TEMP[5].xxxx
> 55:       MUL TEMP[0].x, TEMP[1].wwww, IMM[5].zzzz
> 56:       MUL TEMP[1].x, TEMP[2].xxxx, IMM[5].wwww
> 57:       MAD TEMP[0].x, TEMP[0].xxxx, TEMP[7].xxxx, TEMP[1].xxxx
> 58:       MAD TEMP[1].x, TEMP[4].xxxx, IMM[4].xxxx, IMM[1].xxxx
> 59:       MUL TEMP[2].x, TEMP[0].xxxx, TEMP[1].xxxx
> 60:     ENDIF
> 61:   ENDIF
> 62: ENDIF
> 63: MUL TEMP[0].x, TEMP[3].xxxx, IMM[6].xxxx
> 64: MUL TEMP[0].xyz, CONST[8].xyzz, TEMP[0].xxxx
> 65: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[9].wwww
> 66: POW TEMP[1].x, CONST[10].xxxx, IMM[1].wwww
> 67: MOV TEMP[0].w, TEMP[1].xxxx
> 68: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
> 69: FSGE TEMP[1].x, IMM[6].yyyy, TEMP[1].xxxx
> 70: UCMP TEMP[6].x, TEMP[1].xxxx, IMM[6].yyyy, TEMP[6].xxxx
> 71: UCMP TEMP[2].x, TEMP[1].xxxx, IMM[6].yyyy, TEMP[2].xxxx
> 72: MUL TEMP[1].xy, IMM[6].zwww, IN[0].yxxx
> 73: MUL TEMP[1].xy, TEMP[1].xyyy, IN[0].zzzz
> 74: MUL TEMP[1].xy, TEMP[1].xyyy, TEMP[6].xxxx
> 75: MUL TEMP[3].x, TEMP[2].xxxx, IN[0].yyyy
> 76: MUL TEMP[2].x, TEMP[2].xxxx, IN[0].xxxx
> 77: MUL TEMP[2].xyz, TEMP[2].xxxx, CONST[5].xyzz
> 78: MAD TEMP[2].xyz, TEMP[3].xxxx, CONST[6].xyzz, TEMP[2].xyzz
> 79: ADD TEMP[2].xyz, CONST[7].xyzz, TEMP[2].xyzz
> 80: MUL TEMP[3].xyz, TEMP[1].xxxx, CONST[5].xyzz
> 81: MAD TEMP[3].xyz, TEMP[1].yyyy, CONST[6].xyzz, TEMP[3].xyzz
> 82: ADD TEMP[1].xyz, TEMP[2].xyzz, TEMP[3].xyzz
> 83: MUL TEMP[2], CONST[0], TEMP[1].xxxx
> 84: MAD TEMP[2], CONST[1], TEMP[1].yyyy, TEMP[2]
> 85: MAD TEMP[1], CONST[2], TEMP[1].zzzz, TEMP[2]
> 86: ADD TEMP[1].xyw, TEMP[1], CONST[3]
> 87: MOV TEMP[2].xyw, TEMP[1].xyxw
> 88: MUL TEMP[1].x, TEMP[1].wwww, IMM[7].xxxx
> 89: MOV TEMP[2].z, TEMP[1].xxxx
> 90: MOV OUT[2].xy, IN[2].xyxx
> 91: MOV OUT[0], TEMP[2]
> 92: MOV OUT[1], TEMP[0]
> 93: END
>radeonsi: Compiling shader 57
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %16)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fptosi float %26 to i32
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call float @llvm.SI.load.const(<16 x i8> %34, i32 0)
>  %36 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %37 = fmul float %35, %36
>  %38 = call float @llvm.SI.load.const(<16 x i8> %34, i32 4)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %40 = fmul float %38, %39
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 12)
>  %44 = call float @llvm.SI.load.const(<16 x i8> %42, i32 112)
>  %45 = fmul float %43, %44
>  %46 = call float @llvm.SI.load.const(<16 x i8> %42, i32 16)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %42, i32 116)
>  %48 = fmul float %46, %47
>  %49 = fadd float %48, %37
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 20)
>  %53 = call float @llvm.SI.load.const(<16 x i8> %51, i32 116)
>  %54 = fmul float %52, %53
>  %55 = fadd float %54, %40
>  %56 = call float @llvm.SI.load.const(<16 x i8> %51, i32 28)
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 116)
>  %60 = fmul float %56, %59
>  %61 = fadd float %60, %45
>  %62 = call float @llvm.SI.load.const(<16 x i8> %58, i32 32)
>  %63 = call float @llvm.SI.load.const(<16 x i8> %58, i32 120)
>  %64 = fmul float %62, %63
>  %65 = fadd float %64, %49
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 36)
>  %69 = call float @llvm.SI.load.const(<16 x i8> %67, i32 120)
>  %70 = fmul float %68, %69
>  %71 = fadd float %70, %55
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 44)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 120)
>  %76 = fmul float %72, %75
>  %77 = fadd float %76, %61
>  %78 = call float @llvm.SI.load.const(<16 x i8> %74, i32 48)
>  %79 = fadd float %65, %78
>  %80 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !invariant.load !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 52)
>  %83 = fadd float %71, %82
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 60)
>  %85 = fadd float %77, %84
>  %86 = call float @llvm.SI.load.const(<16 x i8> %81, i32 144)
>  %87 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %88 = load <16 x i8>, <16 x i8> addrspace(2)* %87, align 16, !invariant.load !0
>  %89 = call float @llvm.SI.load.const(<16 x i8> %88, i32 148)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %88, i32 140)
>  %91 = call float @llvm.SI.load.const(<16 x i8> %88, i32 152)
>  %92 = fmul float %90, 2.000000e+00
>  %93 = fadd float %92, %91
>  %94 = fmul float %93, 0x3FD5555560000000
>  %95 = fadd float %94, 0x3FB47AE140000000
>  %96 = call float @llvm.pow.f32(float %95, float 0x3FD3333340000000)
>  %97 = call float @llvm.AMDGPU.clamp.(float %96, float 0.000000e+00, float 1.000000e+00)
>  %98 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %99 = load <16 x i8>, <16 x i8> addrspace(2)* %98, align 16, !invariant.load !0
>  %100 = call float @llvm.SI.load.const(<16 x i8> %99, i32 68)
>  %101 = call float @llvm.pow.f32(float %100, float 0x3FD99999A0000000)
>  %102 = fdiv float 1.000000e+00, %101, !fpmath !1
>  %103 = fmul float %102, 0x3FFCCCCCC0000000
>  %104 = icmp eq i32 %32, 1
>  br i1 %104, label %if16, label %else22
>
>if16:                                             ; preds = %main_body
>  %105 = fmul float %93, 3.000000e+00
>  %106 = fadd float %105, 1.000000e+00
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 144)
>  %110 = fmul float %109, %106
>  %111 = fmul float %97, 0x3FECCCCCC0000000
>  %112 = fsub float 1.000000e+00, %111
>  %113 = call float @llvm.SI.load.const(<16 x i8> %108, i32 148)
>  %114 = fmul float %113, %112
>  br label %endif62
>
>else22:                                           ; preds = %main_body
>  %115 = icmp eq i32 %32, 3
>  br i1 %115, label %if24, label %else44
>
>if24:                                             ; preds = %else22
>  %116 = fadd float %86, 0x3F947AE140000000
>  %117 = fmul float %116, 7.500000e-01
>  %118 = fmul float %103, 0x3FD99999A0000000
>  %119 = fadd float %118, 0x3FE3333340000000
>  %120 = fmul float %117, %119
>  %121 = fmul float %93, 0x3FC99999A0000000
>  %122 = fadd float %121, 1.000000e+00
>  %123 = fmul float %120, %122
>  %124 = fadd float %89, 0xBFA47AE140000000
>  %125 = call float @llvm.AMDGPU.clamp.(float %124, float 0.000000e+00, float 1.000000e+00)
>  %126 = fsub float 1.000000e+00, %97
>  %127 = fmul float %125, %126
>  %128 = fdiv float 1.000000e+00, %85, !fpmath !1
>  %129 = fmul float %79, %128
>  %130 = fmul float %83, %128
>  %131 = fmul float %20, %129
>  %132 = fmul float %21, %130
>  %133 = fadd float %131, %132
>  %134 = fmul float %133, 0xBF9EB851E0000000
>  %135 = fmul float %134, %103
>  %136 = fadd float %135, 1.000000e+00
>  %137 = fmul float %123, %136
>  %138 = fadd float %93, 4.000000e+00
>  %139 = fmul float %123, %138
>  %140 = fmul float %139, %136
>  br label %endif62
>
>else44:                                           ; preds = %else22
>  %141 = icmp eq i32 %32, 4
>  br i1 %141, label %if46, label %endif62
>
>if46:                                             ; preds = %else44
>  %142 = fadd float %89, 0xBFA47AE140000000
>  %143 = call float @llvm.AMDGPU.clamp.(float %142, float 0.000000e+00, float 1.000000e+00)
>  %144 = fmul float %143, 2.000000e+00
>  %145 = fsub float 1.000000e+00, %97
>  %146 = fmul float %144, %145
>  %147 = fmul float %86, 9.000000e+00
>  %148 = fmul float %93, 5.000000e-01
>  %149 = fadd float %148, 1.000000e+00
>  %150 = fmul float %147, %149
>  %151 = fmul float %85, 0x3F847AE140000000
>  %152 = fmul float %86, 0x3FF4CCCCC0000000
>  %153 = fmul float %151, %103
>  %154 = fadd float %153, %152
>  %155 = fmul float %93, 0x3FC99999A0000000
>  %156 = fadd float %155, 1.000000e+00
>  %157 = fmul float %154, %156
>  br label %endif62
>
>endif62:                                          ; preds = %if24, %if46, %else44, %if16
>  %.27 = phi float [ 1.000000e+00, %if16 ], [ %140, %if24 ], [ %150, %if46 ], [ 1.000000e+00, %else44 ]
>  %.24 = phi float [ %114, %if16 ], [ %127, %if24 ], [ %146, %if46 ], [ %89, %else44 ]
>  %.2 = phi float [ %110, %if16 ], [ %137, %if24 ], [ %157, %if46 ], [ %86, %else44 ]
>  %158 = fmul float %.24, 8.000000e+00
>  %159 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %160 = load <16 x i8>, <16 x i8> addrspace(2)* %159, align 16, !invariant.load !0
>  %161 = call float @llvm.SI.load.const(<16 x i8> %160, i32 128)
>  %162 = fmul float %161, %158
>  %163 = call float @llvm.SI.load.const(<16 x i8> %160, i32 132)
>  %164 = fmul float %163, %158
>  %165 = call float @llvm.SI.load.const(<16 x i8> %160, i32 136)
>  %166 = fmul float %165, %158
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 156)
>  %170 = fmul float %162, %169
>  %171 = call float @llvm.SI.load.const(<16 x i8> %168, i32 156)
>  %172 = fmul float %164, %171
>  %173 = call float @llvm.SI.load.const(<16 x i8> %168, i32 156)
>  %174 = fmul float %166, %173
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 160)
>  %178 = call float @llvm.pow.f32(float %177, float 3.000000e+00)
>  %179 = fmul float %178, %.24
>  %180 = fcmp ole float %179, 0.000000e+00
>  %181 = select i1 %180, float 0.000000e+00, float %.27
>  %182 = select i1 %180, float 0.000000e+00, float %.2
>  %183 = fmul float %21, %22
>  %184 = fmul float %20, %22
>  %185 = fmul float %183, %181
>  %186 = fsub float -0.000000e+00, %185
>  %187 = fmul float %184, %181
>  %188 = fmul float %182, %21
>  %189 = fmul float %182, %20
>  %190 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %191 = load <16 x i8>, <16 x i8> addrspace(2)* %190, align 16, !invariant.load !0
>  %192 = call float @llvm.SI.load.const(<16 x i8> %191, i32 80)
>  %193 = fmul float %189, %192
>  %194 = call float @llvm.SI.load.const(<16 x i8> %191, i32 84)
>  %195 = fmul float %189, %194
>  %196 = call float @llvm.SI.load.const(<16 x i8> %191, i32 88)
>  %197 = fmul float %189, %196
>  %198 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %199 = load <16 x i8>, <16 x i8> addrspace(2)* %198, align 16, !invariant.load !0
>  %200 = call float @llvm.SI.load.const(<16 x i8> %199, i32 96)
>  %201 = fmul float %188, %200
>  %202 = fadd float %201, %193
>  %203 = call float @llvm.SI.load.const(<16 x i8> %199, i32 100)
>  %204 = fmul float %188, %203
>  %205 = fadd float %204, %195
>  %206 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %207 = load <16 x i8>, <16 x i8> addrspace(2)* %206, align 16, !invariant.load !0
>  %208 = call float @llvm.SI.load.const(<16 x i8> %207, i32 104)
>  %209 = fmul float %188, %208
>  %210 = fadd float %209, %197
>  %211 = call float @llvm.SI.load.const(<16 x i8> %207, i32 112)
>  %212 = fadd float %211, %202
>  %213 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %214 = load <16 x i8>, <16 x i8> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = call float @llvm.SI.load.const(<16 x i8> %214, i32 116)
>  %216 = fadd float %215, %205
>  %217 = call float @llvm.SI.load.const(<16 x i8> %214, i32 120)
>  %218 = fadd float %217, %210
>  %219 = call float @llvm.SI.load.const(<16 x i8> %214, i32 80)
>  %220 = fmul float %219, %186
>  %221 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %222 = load <16 x i8>, <16 x i8> addrspace(2)* %221, align 16, !invariant.load !0
>  %223 = call float @llvm.SI.load.const(<16 x i8> %222, i32 84)
>  %224 = fmul float %223, %186
>  %225 = call float @llvm.SI.load.const(<16 x i8> %222, i32 88)
>  %226 = fmul float %225, %186
>  %227 = call float @llvm.SI.load.const(<16 x i8> %222, i32 96)
>  %228 = fmul float %187, %227
>  %229 = fadd float %228, %220
>  %230 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %231 = load <16 x i8>, <16 x i8> addrspace(2)* %230, align 16, !invariant.load !0
>  %232 = call float @llvm.SI.load.const(<16 x i8> %231, i32 100)
>  %233 = fmul float %187, %232
>  %234 = fadd float %233, %224
>  %235 = call float @llvm.SI.load.const(<16 x i8> %231, i32 104)
>  %236 = fmul float %187, %235
>  %237 = fadd float %236, %226
>  %238 = fadd float %212, %229
>  %239 = fadd float %216, %234
>  %240 = fadd float %218, %237
>  %241 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %242 = load <16 x i8>, <16 x i8> addrspace(2)* %241, align 16, !invariant.load !0
>  %243 = call float @llvm.SI.load.const(<16 x i8> %242, i32 0)
>  %244 = fmul float %243, %238
>  %245 = call float @llvm.SI.load.const(<16 x i8> %242, i32 4)
>  %246 = fmul float %245, %238
>  %247 = call float @llvm.SI.load.const(<16 x i8> %242, i32 12)
>  %248 = fmul float %247, %238
>  %249 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %250 = load <16 x i8>, <16 x i8> addrspace(2)* %249, align 16, !invariant.load !0
>  %251 = call float @llvm.SI.load.const(<16 x i8> %250, i32 16)
>  %252 = fmul float %251, %239
>  %253 = fadd float %252, %244
>  %254 = call float @llvm.SI.load.const(<16 x i8> %250, i32 20)
>  %255 = fmul float %254, %239
>  %256 = fadd float %255, %246
>  %257 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %258 = load <16 x i8>, <16 x i8> addrspace(2)* %257, align 16, !invariant.load !0
>  %259 = call float @llvm.SI.load.const(<16 x i8> %258, i32 28)
>  %260 = fmul float %259, %239
>  %261 = fadd float %260, %248
>  %262 = call float @llvm.SI.load.const(<16 x i8> %258, i32 32)
>  %263 = fmul float %262, %240
>  %264 = fadd float %263, %253
>  %265 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %266 = load <16 x i8>, <16 x i8> addrspace(2)* %265, align 16, !invariant.load !0
>  %267 = call float @llvm.SI.load.const(<16 x i8> %266, i32 36)
>  %268 = fmul float %267, %240
>  %269 = fadd float %268, %256
>  %270 = call float @llvm.SI.load.const(<16 x i8> %266, i32 44)
>  %271 = fmul float %270, %240
>  %272 = fadd float %271, %261
>  %273 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %274 = load <16 x i8>, <16 x i8> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = call float @llvm.SI.load.const(<16 x i8> %274, i32 48)
>  %276 = fadd float %264, %275
>  %277 = call float @llvm.SI.load.const(<16 x i8> %274, i32 52)
>  %278 = fadd float %269, %277
>  %279 = call float @llvm.SI.load.const(<16 x i8> %274, i32 60)
>  %280 = fadd float %272, %279
>  %281 = fmul float %280, 0x3FEFFF2E40000000
>  %282 = bitcast i32 %12 to float
>  %283 = insertvalue <{ float, float, float }> undef, float %282, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %170, float %172, float %174, float %178)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %30, float %31, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %276, float %278, float %281, float %280)
>  ret <{ float, float, float }> %283
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xy, GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0], LOCAL
>IMM[0] FLT32 {    3.0000,     0.5000,    -0.0625,     0.0000}
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].w, TEMP[0], SAMP[0], 2D
>  2: POW TEMP[0].x, TEMP[0].wwww, IMM[0].xxxx
>  3: MAD TEMP[0].x, TEMP[0].xxxx, IN[0].wwww, IMM[0].yyyy
>  4: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
>  5: MAD TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx, IMM[0].zzzz
>  6: MUL TEMP[0].xyz, IN[0].xyzz, TEMP[0].xxxx
>  7: MOV OUT[0], TEMP[0].xyzz
>  8: END
>radeonsi: Compiling shader 58
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 3
>  %40 = call float @llvm.pow.f32(float %39, float 3.000000e+00)
>  %41 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %42 = fmul float %40, %41
>  %43 = fadd float %42, 5.000000e-01
>  %44 = fmul float %43, %43
>  %45 = fmul float %44, %44
>  %46 = fadd float %45, -6.250000e-02
>  %47 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %48 = fmul float %47, %46
>  %49 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %50 = fmul float %49, %46
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %52 = fmul float %51, %46
>  %53 = bitcast float %5 to i32
>  %54 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %53, 10
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %54, float %48, 11
>  %56 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %55, float %50, 12
>  %57 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %56, float %52, 13
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %57, float %52, 14
>  %59 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %58, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %59
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                   ; C0840B08
>	v_mov_b32_e32 v0, 0x3eaaaaab                            ; 7E0002FF 3EAAAAAB
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	buffer_load_format_xyzw v[16:19], v5, s[12:15], 0 idxen ; E00C2000 80031005
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen    ; E00C2000 80020306
>	s_load_dwordx4 s[12:15], s[2:3], 0x0                    ; C0860300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s1, s[12:15], 0x26                  ; C2008D26
>	s_buffer_load_dword s0, s[12:15], 0x23                  ; C2000D23
>	s_buffer_load_dword s16, s[12:15], 0x25                 ; C2080D25
>	s_buffer_load_dword s10, s[12:15], 0x3                  ; C2050D03
>	s_buffer_load_dword s8, s[12:15], 0x7                   ; C2040D07
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v6, s1                                    ; 7E0C0201
>	v_mac_f32_e64 v6, 2.0, s0                               ; D23E0006 000000F4
>	v_madak_f32_e32 v0, v0, v6, 0x3da3d70a                  ; 42000D00 3DA3D70A
>	v_log_f32_e32 v0, v0                                    ; 7E004F00
>	s_buffer_load_dword s3, s[12:15], 0xb                   ; C2018D0B
>	s_buffer_load_dword s22, s[12:15], 0x1c                 ; C20B0D1C
>	s_buffer_load_dword s20, s[12:15], 0x1d                 ; C20A0D1D
>	s_buffer_load_dword s17, s[12:15], 0x24                 ; C2088D24
>	s_buffer_load_dword s21, s[12:15], 0x1e                 ; C20A8D1E
>	s_buffer_load_dword s11, s[12:15], 0x0                  ; C2058D00
>	s_buffer_load_dword s9, s[12:15], 0x1                   ; C2048D01
>	s_buffer_load_dword s7, s[12:15], 0x4                   ; C2038D04
>	s_buffer_load_dword s5, s[12:15], 0x5                   ; C2028D05
>	s_buffer_load_dword s6, s[12:15], 0x8                   ; C2030D08
>	s_buffer_load_dword s4, s[12:15], 0x9                   ; C2020D09
>	s_buffer_load_dword s2, s[12:15], 0xc                   ; C2010D0C
>	s_buffer_load_dword s1, s[12:15], 0xd                   ; C2008D0D
>	s_buffer_load_dword s0, s[12:15], 0xf                   ; C2000D0F
>	v_mul_legacy_f32_e32 v0, 0x3e99999a, v0                 ; 0E0000FF 3E99999A
>	v_exp_f32_e32 v10, v0                                   ; 7E144B00
>	v_add_f32_e64 v12, v10, 0 clamp                         ; D206080C 0001010A
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v5, s22                                   ; 7E0A0216
>	v_mov_b32_e32 v15, s10                                  ; 7E1E020A
>	v_mov_b32_e32 v1, s20                                   ; 7E020214
>	v_mov_b32_e32 v14, s8                                   ; 7E1C0208
>	v_mov_b32_e32 v0, s21                                   ; 7E000215
>	v_mov_b32_e32 v17, s3                                   ; 7E220203
>	v_mov_b32_e32 v10, s17                                  ; 7E140211
>	v_mov_b32_e32 v11, s16                                  ; 7E160210
>	v_cvt_i32_f32_e32 v16, v16                              ; 7E201110
>	v_cmp_ne_u32_e32 vcc, 1, v16                            ; 7D8A2081
>	s_and_saveexec_b64 s[18:19], vcc                        ; BE92246A
>	s_xor_b64 s[18:19], exec, s[18:19]                      ; 8992127E
>	s_cbranch_execz BB0_8                                   ; BF880000
>	v_mul_f32_e32 v13, s22, v15                             ; 101A1E16
>	s_buffer_load_dword s22, s[12:15], 0x11                 ; C20B0D11
>	v_mac_f32_e32 v13, s20, v14                             ; 3E1A1C14
>	v_mac_f32_e32 v13, s21, v17                             ; 3E1A2215
>	v_cmp_ne_u32_e32 vcc, 3, v16                            ; 7D8A2083
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_log_f32_e32 v15, s22                                  ; 7E1E4E16
>	v_mul_legacy_f32_e32 v15, 0x3ecccccd, v15               ; 0E1E1EFF 3ECCCCCD
>	v_exp_f32_e32 v15, v15                                  ; 7E1E4B0F
>	v_rcp_f32_e32 v18, v15                                  ; 7E24550F
>	v_add_f32_e32 v15, s0, v13                              ; 061E1A00
>	v_mul_f32_e32 v14, 0x3fe66666, v18                      ; 101C24FF 3FE66666
>	s_and_saveexec_b64 s[20:21], vcc                        ; BE94246A
>	s_xor_b64 s[20:21], exec, s[20:21]                      ; 8994147E
>	s_cbranch_execz BB0_5                                   ; BF880000
>	v_cmp_eq_u32_e32 vcc, 4, v16                            ; 7D842084
>	v_mov_b32_e32 v13, 1.0                                  ; 7E1A02F2
>	s_and_saveexec_b64 s[22:23], vcc                        ; BE96246A
>	s_xor_b64 s[22:23], exec, s[22:23]                      ; 8996167E
>	s_cbranch_execz BB0_4                                   ; BF880000
>	v_mov_b32_e32 v10, 0xbd23d70a                           ; 7E1402FF BD23D70A
>	v_add_f32_e32 v10, s16, v10                             ; 06141410
>	v_add_f32_e64 v10, v10, 0 clamp                         ; D206080A 0001010A
>	v_add_f32_e32 v10, v10, v10                             ; 0614150A
>	v_mad_f32 v11, -v12, v10, v10                           ; D282000B 242A150C
>	v_mov_b32_e32 v10, 0x41100000                           ; 7E1402FF 41100000
>	v_mul_f32_e32 v13, s17, v10                             ; 101A1411
>	v_mul_f32_e32 v10, 0.5, v6                              ; 10140CF0
>	v_mac_f32_e32 v13, v13, v10                             ; 3E1A150D
>	v_mov_b32_e32 v10, 0x3fa66666                           ; 7E1402FF 3FA66666
>	v_mul_f32_e32 v16, 0x3c23d70a, v15                      ; 10201EFF 3C23D70A
>	v_mul_f32_e32 v10, s17, v10                             ; 10141411
>	v_mac_f32_e32 v10, v14, v16                             ; 3E14210E
>	v_mul_f32_e32 v16, 0x3e4ccccd, v6                       ; 10200CFF 3E4CCCCD
>	v_mac_f32_e32 v10, v10, v16                             ; 3E14210A
>	s_or_b64 exec, exec, s[22:23]                           ; 88FE167E
>	s_or_saveexec_b64 s[20:21], s[20:21]                    ; BE942514
>	s_xor_b64 exec, exec, s[20:21]                          ; 89FE147E
>	s_cbranch_execz BB0_7                                   ; BF880000
>	v_mul_f32_e32 v10, s11, v5                              ; 10140A0B
>	v_mul_f32_e32 v11, s9, v5                               ; 10160A09
>	v_rcp_f32_e32 v15, v15                                  ; 7E1E550F
>	v_mac_f32_e32 v10, s7, v1                               ; 3E140207
>	v_mac_f32_e32 v11, s5, v1                               ; 3E160205
>	v_mac_f32_e32 v10, s6, v0                               ; 3E140006
>	v_mac_f32_e32 v11, s4, v0                               ; 3E160004
>	v_add_f32_e32 v13, s2, v10                              ; 061A1402
>	v_mov_b32_e32 v10, 0x3ca3d70a                           ; 7E1402FF 3CA3D70A
>	v_add_f32_e32 v16, s1, v11                              ; 06201601
>	v_add_f32_e32 v10, s17, v10                             ; 06141411
>	v_mov_b32_e32 v11, 0x3ecccccd                           ; 7E1602FF 3ECCCCCD
>	v_mul_f32_e32 v13, v15, v13                             ; 101A1B0F
>	v_mul_f32_e32 v15, v15, v16                             ; 101E210F
>	v_mul_f32_e32 v15, v15, v8                              ; 101E110F
>	v_mul_f32_e32 v10, 0x3f400000, v10                      ; 101414FF 3F400000
>	v_madak_f32_e32 v11, v11, v14, 0x3f19999a               ; 42161D0B 3F19999A
>	v_mac_f32_e32 v15, v13, v7                              ; 3E1E0F0D
>	v_mul_f32_e32 v10, v11, v10                             ; 1014150B
>	v_mul_f32_e32 v11, 0x3e4ccccd, v6                       ; 10160CFF 3E4CCCCD
>	v_mac_f32_e32 v10, v10, v11                             ; 3E14170A
>	v_mov_b32_e32 v11, 0xbd23d70a                           ; 7E1602FF BD23D70A
>	v_mul_f32_e32 v13, 0xbcf5c28f, v15                      ; 101A1EFF BCF5C28F
>	v_add_f32_e32 v11, s16, v11                             ; 06161610
>	v_mul_f32_e32 v14, v14, v13                             ; 101C1B0E
>	v_add_f32_e32 v13, 4.0, v6                              ; 061A0CF6
>	v_mul_f32_e32 v13, v13, v10                             ; 101A150D
>	v_add_f32_e64 v11, v11, 0 clamp                         ; D206080B 0001010B
>	v_mad_f32 v11, -v12, v11, v11                           ; D282000B 242E170C
>	v_mac_f32_e32 v10, v10, v14                             ; 3E141D0A
>	v_mac_f32_e32 v13, v13, v14                             ; 3E1A1D0D
>	s_or_b64 exec, exec, s[20:21]                           ; 88FE147E
>	s_or_saveexec_b64 s[18:19], s[18:19]                    ; BE922512
>	s_xor_b64 exec, exec, s[18:19]                          ; 89FE127E
>	v_mul_f32_e32 v6, 0x40400000, v6                        ; 100C0CFF 40400000
>	v_mad_f32 v10, v6, s17, s17                             ; D282000A 00442306
>	v_mul_f32_e32 v6, 0xbf666666, v12                       ; 100C18FF BF666666
>	v_mad_f32 v11, v6, s16, s16                             ; D282000B 00402106
>	v_mov_b32_e32 v13, 1.0                                  ; 7E1A02F2
>	s_or_b64 exec, exec, s[18:19]                           ; 88FE127E
>	s_buffer_load_dword s17, s[12:15], 0x20                 ; C2088D20
>	v_mul_f32_e32 v6, 0x41000000, v11                       ; 100C16FF 41000000
>	s_buffer_load_dword s18, s[12:15], 0x21                 ; C2090D21
>	s_buffer_load_dword s19, s[12:15], 0x22                 ; C2098D22
>	s_buffer_load_dword s20, s[12:15], 0x27                 ; C20A0D27
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v12, s17, v6                              ; 10180C11
>	s_buffer_load_dword s17, s[12:15], 0x28                 ; C2088D28
>	v_mul_f32_e32 v14, s18, v6                              ; 101C0C12
>	v_mul_f32_e32 v6, s19, v6                               ; 100C0C13
>	s_buffer_load_dword s18, s[12:15], 0x15                 ; C2090D15
>	s_buffer_load_dword s19, s[12:15], 0x16                 ; C2098D16
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_log_f32_e32 v15, s17                                  ; 7E1E4E11
>	s_buffer_load_dword s17, s[12:15], 0x14                 ; C2088D14
>	s_buffer_load_dword s16, s[12:15], 0x1a                 ; C2080D1A
>	v_mul_f32_e32 v12, s20, v12                             ; 10181814
>	v_mul_legacy_f32_e32 v15, 0x40400000, v15               ; 0E1E1EFF 40400000
>	v_exp_f32_e32 v15, v15                                  ; 7E1E4B0F
>	v_mul_f32_e32 v11, v11, v15                             ; 10161F0B
>	v_mul_f32_e32 v14, s20, v14                             ; 101C1C14
>	v_mul_f32_e32 v6, s20, v6                               ; 100C0C14
>	s_buffer_load_dword s20, s[12:15], 0x18                 ; C20A0D18
>	s_buffer_load_dword s12, s[12:15], 0x19                 ; C2060D19
>	v_cmp_ge_f32_e32 vcc, 0, v11                            ; 7C0C1680
>	v_cndmask_b32_e64 v11, v13, 0, vcc                      ; D200000B 01A9010D
>	v_mul_f32_e32 v13, v9, v8                               ; 101A1109
>	v_cndmask_b32_e64 v10, v10, 0, vcc                      ; D200000A 01A9010A
>	v_mul_f32_e32 v9, v9, v7                                ; 10120F09
>	v_mul_f32_e32 v7, v7, v10                               ; 100E1507
>	v_mul_f32_e32 v13, v11, v13                             ; 101A1B0B
>	v_mul_f32_e32 v8, v8, v10                               ; 10101508
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mad_f32 v5, s17, v7, v5                               ; D2820005 04160E11
>	v_mad_f32 v1, s18, v7, v1                               ; D2820001 04060E12
>	v_mad_f32 v0, s19, v7, v0                               ; D2820000 04020E13
>	v_mul_f32_e32 v9, v11, v9                               ; 1012130B
>	v_mul_f32_e32 v7, s17, v13                              ; 100E1A11
>	v_mac_f32_e32 v5, s20, v8                               ; 3E0A1014
>	v_mad_f32 v7, v9, s20, -v7                              ; D2820007 841C2909
>	v_mac_f32_e32 v1, s12, v8                               ; 3E02100C
>	v_mac_f32_e32 v0, s16, v8                               ; 3E001010
>	v_mul_f32_e32 v8, s18, v13                              ; 10101A12
>	v_add_f32_e32 v5, v7, v5                                ; 060A0B07
>	v_mad_f32 v8, v9, s12, -v8                              ; D2820008 84201909
>	v_mul_f32_e32 v10, s19, v13                             ; 10141A13
>	v_mad_f32 v9, v9, s16, -v10                             ; D2820009 84282109
>	v_add_f32_e32 v1, v8, v1                                ; 06020308
>	v_mul_f32_e32 v7, s11, v5                               ; 100E0A0B
>	v_mul_f32_e32 v8, s9, v5                                ; 10100A09
>	v_mul_f32_e32 v5, s10, v5                               ; 100A0A0A
>	v_add_f32_e32 v0, v9, v0                                ; 06000109
>	v_mac_f32_e32 v7, s7, v1                                ; 3E0E0207
>	v_mac_f32_e32 v5, s8, v1                                ; 3E0A0208
>	v_mac_f32_e32 v8, s5, v1                                ; 3E100205
>	v_mac_f32_e32 v5, s3, v0                                ; 3E0A0003
>	v_mac_f32_e32 v7, s6, v0                                ; 3E0E0006
>	v_mac_f32_e32 v8, s4, v0                                ; 3E100004
>	v_add_f32_e32 v0, s2, v7                                ; 06000E02
>	v_add_f32_e32 v5, s0, v5                                ; 060A0A00
>	exp 15, 32, 0, 0, 0, v12, v14, v6, v15                  ; F800020F 0F060E0C
>	v_add_f32_e32 v1, s1, v8                                ; 06021001
>	v_mul_f32_e32 v7, 0x3f7ff972, v5                        ; 100E0AFF 3F7FF972
>	exp 15, 33, 0, 0, 0, v3, v4, v0, v0                     ; F800021F 00000403
>	exp 15, 12, 0, 1, 0, v0, v1, v7, v5                     ; F80008CF 05070100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 976 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                              ; BE86047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                  ; C080050C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                  ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]            ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                  ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]            ; C8050503
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_and_b32 s0, s0, s19                               ; 87001300
>	s_and_b64 exec, exec, s[6:7]                        ; 87FE067E
>	image_sample v0, v[0:1], s[12:19], s[0:3] dmask:0x8 ; F0800800 00030000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_log_f32_e32 v0, v0                                ; 7E004F00
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                  ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]            ; C8050303
>	v_interp_p1_f32 v4, v2, 0, 0, [m0]                  ; C8100002
>	v_mul_legacy_f32_e32 v0, 0x40400000, v0             ; 0E0000FF 40400000
>	v_exp_f32_e32 v0, v0                                ; 7E004B00
>	v_mad_f32 v0, v0, v1, 0.5                           ; D2820000 03C20300
>	v_interp_p2_f32 v4, [v4], v3, 0, 0, [m0]            ; C8110003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                  ; C8040102
>	v_mul_f32_e32 v0, v0, v0                            ; 10000100
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]            ; C8050103
>	v_interp_p1_f32 v2, v2, 2, 0, [m0]                  ; C8080202
>	v_madak_f32_e32 v5, v0, v0, 0xbd800000              ; 420A0100 BD800000
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]            ; C8090203
>	v_mul_f32_e32 v2, v5, v2                            ; 10040505
>	v_mul_f32_e32 v0, v5, v4                            ; 10000905
>	v_mul_f32_e32 v1, v5, v1                            ; 10020305
>	v_mov_b32_e32 v3, v2                                ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 164 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xy, GENERIC[1]
>DCL CONST[0..10]
>DCL TEMP[0..11], LOCAL
>IMM[0] FLT32 {    2.0000,     0.3333,     0.0800,     0.3000}
>IMM[1] FLT32 {    1.0000,     1.8000,     0.4000,     3.0000}
>IMM[2] INT32 {1, 3, 4, 0}
>IMM[3] FLT32 {    0.9000,     0.0200,     0.9200,     0.5500}
>IMM[4] FLT32 {    0.9900,     0.8000,     0.2000,     0.1500}
>IMM[5] FLT32 {   -0.0400,     0.0100,     0.0300,     4.0000}
>IMM[6] FLT32 {    9.0000,     0.5000,     1.3000,     8.0000}
>IMM[7] FLT32 {    0.0000,    -1.0000,     1.0000,     0.0000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: MUL TEMP[1], CONST[0], CONST[7].xxxx
>  2: MAD TEMP[1], CONST[1], CONST[7].yyyy, TEMP[1]
>  3: MAD TEMP[1], CONST[2], CONST[7].zzzz, TEMP[1]
>  4: ADD TEMP[1].xyw, TEMP[1], CONST[3]
>  5: MOV TEMP[2].x, CONST[9].xxxx
>  6: MOV TEMP[3].x, CONST[9].yyyy
>  7: MAD TEMP[4].x, CONST[8].wwww, IMM[0].xxxx, CONST[9].zzzz
>  8: MAD TEMP[5].x, TEMP[4].xxxx, IMM[0].yyyy, IMM[0].zzzz
>  9: POW TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 10: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 11: MOV TEMP[6].x, IMM[1].xxxx
> 12: POW TEMP[7].x, CONST[4].yyyy, IMM[1].zzzz
> 13: RCP TEMP[7].x, TEMP[7].xxxx
> 14: MUL TEMP[7].x, IMM[1].yyyy, TEMP[7].xxxx
> 15: USEQ TEMP[8].x, TEMP[0].xxxx, IMM[2].xxxx
> 16: UIF TEMP[8].xxxx :0
> 17:   MAD TEMP[8].x, TEMP[4].xxxx, IMM[1].wwww, IMM[1].xxxx
> 18:   MUL TEMP[2].x, CONST[9].xxxx, TEMP[8].xxxx
> 19:   MUL TEMP[8].x, TEMP[5].xxxx, IMM[3].xxxx
> 20:   ADD TEMP[8].x, IMM[1].xxxx, -TEMP[8].xxxx
> 21:   MUL TEMP[3].x, CONST[9].yyyy, TEMP[8].xxxx
> 22: ELSE :0
> 23:   USEQ TEMP[8].x, TEMP[0].xxxx, IMM[2].yyyy
> 24:   UIF TEMP[8].xxxx :0
> 25:     MUL TEMP[8].x, TEMP[1].wwww, TEMP[7].xxxx
> 26:     POW TEMP[8].x, TEMP[8].xxxx, IMM[3].zzzz
> 27:     MUL TEMP[9].x, TEMP[2].xxxx, IMM[3].wwww
> 28:     MAD TEMP[8].x, IMM[3].yyyy, TEMP[8].xxxx, TEMP[9].xxxx
> 29:     MUL TEMP[9].x, TEMP[1].wwww, TEMP[7].xxxx
> 30:     POW TEMP[10].x, TEMP[2].xxxx, IMM[4].yyyy
> 31:     RCP TEMP[10].x, TEMP[10].xxxx
> 32:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 33:     MUL TEMP[9].x, TEMP[9].xxxx, IMM[4].zzzz
> 34:     POW TEMP[9].x, IMM[4].xxxx, TEMP[9].xxxx
> 35:     ADD TEMP[9].x, TEMP[9].xxxx, IMM[4].wwww
> 36:     MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 37:     MAD TEMP[9].x, TEMP[4].xxxx, IMM[4].zzzz, IMM[1].xxxx
> 38:     MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 39:     ADD TEMP[9].x, TEMP[3].xxxx, IMM[5].xxxx
> 40:     MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 41:     MUL TEMP[10].x, TEMP[1].wwww, TEMP[7].xxxx
> 42:     MUL TEMP[10].x, TEMP[10].xxxx, IMM[5].yyyy
> 43:     RCP TEMP[11].x, TEMP[2].xxxx
> 44:     MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 45:     MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 46:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 47:     ADD TEMP[10].x, IMM[1].xxxx, -TEMP[5].xxxx
> 48:     MUL TEMP[3].x, TEMP[9].xxxx, TEMP[10].xxxx
> 49:     RCP TEMP[9].x, TEMP[1].wwww
> 50:     MUL TEMP[9].xy, TEMP[1].xyyy, TEMP[9].xxxx
> 51:     DP2 TEMP[9].x, IN[0].xyyy, TEMP[9].xyyy
> 52:     MUL TEMP[9].x, -TEMP[9].xxxx, IMM[5].zzzz
> 53:     MAD TEMP[9].x, TEMP[9].xxxx, TEMP[7].xxxx, IMM[1].xxxx
> 54:     MUL TEMP[2].x, TEMP[8].xxxx, TEMP[9].xxxx
> 55:     ADD TEMP[10].x, IMM[5].wwww, TEMP[4].xxxx
> 56:     MUL TEMP[8].x, TEMP[8].xxxx, TEMP[10].xxxx
> 57:     MUL TEMP[6].x, TEMP[8].xxxx, TEMP[9].xxxx
> 58:   ELSE :0
> 59:     USEQ TEMP[0].x, TEMP[0].xxxx, IMM[2].zzzz
> 60:     UIF TEMP[0].xxxx :0
> 61:       ADD TEMP[0].x, TEMP[3].xxxx, IMM[5].xxxx
> 62:       MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 63:       MUL TEMP[0].x, IMM[0].xxxx, TEMP[0].xxxx
> 64:       ADD TEMP[5].x, IMM[1].xxxx, -TEMP[5].xxxx
> 65:       MUL TEMP[3].x, TEMP[0].xxxx, TEMP[5].xxxx
> 66:       MUL TEMP[0].x, TEMP[2].xxxx, IMM[6].xxxx
> 67:       MAD TEMP[5].x, TEMP[4].xxxx, IMM[6].yyyy, IMM[1].xxxx
> 68:       MUL TEMP[6].x, TEMP[0].xxxx, TEMP[5].xxxx
> 69:       MUL TEMP[0].x, TEMP[1].wwww, IMM[5].yyyy
> 70:       MUL TEMP[1].x, TEMP[2].xxxx, IMM[6].zzzz
> 71:       MAD TEMP[0].x, TEMP[0].xxxx, TEMP[7].xxxx, TEMP[1].xxxx
> 72:       MAD TEMP[1].x, TEMP[4].xxxx, IMM[4].zzzz, IMM[1].xxxx
> 73:       MUL TEMP[2].x, TEMP[0].xxxx, TEMP[1].xxxx
> 74:     ENDIF
> 75:   ENDIF
> 76: ENDIF
> 77: MUL TEMP[0].x, TEMP[3].xxxx, IMM[6].wwww
> 78: MUL TEMP[0].xyz, CONST[8].xyzz, TEMP[0].xxxx
> 79: MUL TEMP[0].xyz, TEMP[0].xyzz, CONST[9].wwww
> 80: POW TEMP[1].x, CONST[10].xxxx, IMM[1].wwww
> 81: MOV TEMP[0].w, TEMP[1].xxxx
> 82: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
> 83: FSGE TEMP[1].x, IMM[7].xxxx, TEMP[1].xxxx
> 84: UCMP TEMP[6].x, TEMP[1].xxxx, IMM[7].xxxx, TEMP[6].xxxx
> 85: UCMP TEMP[2].x, TEMP[1].xxxx, IMM[7].xxxx, TEMP[2].xxxx
> 86: MUL TEMP[1].xy, IMM[7].yzzz, IN[0].yxxx
> 87: MUL TEMP[1].xy, TEMP[1].xyyy, IN[0].zzzz
> 88: MUL TEMP[1].xy, TEMP[1].xyyy, TEMP[6].xxxx
> 89: MUL TEMP[3].x, TEMP[2].xxxx, IN[0].yyyy
> 90: MUL TEMP[2].x, TEMP[2].xxxx, IN[0].xxxx
> 91: MUL TEMP[2].xyz, TEMP[2].xxxx, CONST[5].xyzz
> 92: MAD TEMP[2].xyz, TEMP[3].xxxx, CONST[6].xyzz, TEMP[2].xyzz
> 93: ADD TEMP[2].xyz, CONST[7].xyzz, TEMP[2].xyzz
> 94: MUL TEMP[3].xyz, TEMP[1].xxxx, CONST[5].xyzz
> 95: MAD TEMP[3].xyz, TEMP[1].yyyy, CONST[6].xyzz, TEMP[3].xyzz
> 96: ADD TEMP[1].xyz, TEMP[2].xyzz, TEMP[3].xyzz
> 97: MUL TEMP[2], CONST[0], TEMP[1].xxxx
> 98: MAD TEMP[2], CONST[1], TEMP[1].yyyy, TEMP[2]
> 99: MAD TEMP[1], CONST[2], TEMP[1].zzzz, TEMP[2]
>100: ADD TEMP[1], TEMP[1], CONST[3]
>101: MOV OUT[2].xy, IN[2].xyxx
>102: MOV OUT[0], TEMP[1]
>103: MOV OUT[1], TEMP[0]
>104: END
>radeonsi: Compiling shader 59
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %16)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fptosi float %26 to i32
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call float @llvm.SI.load.const(<16 x i8> %34, i32 0)
>  %36 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %37 = fmul float %35, %36
>  %38 = call float @llvm.SI.load.const(<16 x i8> %34, i32 4)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %40 = fmul float %38, %39
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 12)
>  %44 = call float @llvm.SI.load.const(<16 x i8> %42, i32 112)
>  %45 = fmul float %43, %44
>  %46 = call float @llvm.SI.load.const(<16 x i8> %42, i32 16)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %42, i32 116)
>  %48 = fmul float %46, %47
>  %49 = fadd float %48, %37
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 20)
>  %53 = call float @llvm.SI.load.const(<16 x i8> %51, i32 116)
>  %54 = fmul float %52, %53
>  %55 = fadd float %54, %40
>  %56 = call float @llvm.SI.load.const(<16 x i8> %51, i32 28)
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 116)
>  %60 = fmul float %56, %59
>  %61 = fadd float %60, %45
>  %62 = call float @llvm.SI.load.const(<16 x i8> %58, i32 32)
>  %63 = call float @llvm.SI.load.const(<16 x i8> %58, i32 120)
>  %64 = fmul float %62, %63
>  %65 = fadd float %64, %49
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 36)
>  %69 = call float @llvm.SI.load.const(<16 x i8> %67, i32 120)
>  %70 = fmul float %68, %69
>  %71 = fadd float %70, %55
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 44)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 120)
>  %76 = fmul float %72, %75
>  %77 = fadd float %76, %61
>  %78 = call float @llvm.SI.load.const(<16 x i8> %74, i32 48)
>  %79 = fadd float %65, %78
>  %80 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !invariant.load !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 52)
>  %83 = fadd float %71, %82
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 60)
>  %85 = fadd float %77, %84
>  %86 = call float @llvm.SI.load.const(<16 x i8> %81, i32 144)
>  %87 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %88 = load <16 x i8>, <16 x i8> addrspace(2)* %87, align 16, !invariant.load !0
>  %89 = call float @llvm.SI.load.const(<16 x i8> %88, i32 148)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %88, i32 140)
>  %91 = call float @llvm.SI.load.const(<16 x i8> %88, i32 152)
>  %92 = fmul float %90, 2.000000e+00
>  %93 = fadd float %92, %91
>  %94 = fmul float %93, 0x3FD5555560000000
>  %95 = fadd float %94, 0x3FB47AE140000000
>  %96 = call float @llvm.pow.f32(float %95, float 0x3FD3333340000000)
>  %97 = call float @llvm.AMDGPU.clamp.(float %96, float 0.000000e+00, float 1.000000e+00)
>  %98 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %99 = load <16 x i8>, <16 x i8> addrspace(2)* %98, align 16, !invariant.load !0
>  %100 = call float @llvm.SI.load.const(<16 x i8> %99, i32 68)
>  %101 = call float @llvm.pow.f32(float %100, float 0x3FD99999A0000000)
>  %102 = fdiv float 1.000000e+00, %101, !fpmath !1
>  %103 = fmul float %102, 0x3FFCCCCCC0000000
>  %104 = icmp eq i32 %32, 1
>  br i1 %104, label %if16, label %else22
>
>if16:                                             ; preds = %main_body
>  %105 = fmul float %93, 3.000000e+00
>  %106 = fadd float %105, 1.000000e+00
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 144)
>  %110 = fmul float %109, %106
>  %111 = fmul float %97, 0x3FECCCCCC0000000
>  %112 = fsub float 1.000000e+00, %111
>  %113 = call float @llvm.SI.load.const(<16 x i8> %108, i32 148)
>  %114 = fmul float %113, %112
>  br label %endif76
>
>else22:                                           ; preds = %main_body
>  %115 = icmp eq i32 %32, 3
>  br i1 %115, label %if24, label %else58
>
>if24:                                             ; preds = %else22
>  %116 = fmul float %85, %103
>  %117 = call float @llvm.pow.f32(float %116, float 0x3FED70A3E0000000)
>  %118 = fmul float %86, 0x3FE19999A0000000
>  %119 = fmul float %117, 0x3F947AE140000000
>  %120 = fadd float %119, %118
>  %121 = fmul float %85, %103
>  %122 = call float @llvm.pow.f32(float %86, float 0x3FE99999A0000000)
>  %123 = fdiv float 1.000000e+00, %122, !fpmath !1
>  %124 = fmul float %121, %123
>  %125 = fmul float %124, 0x3FC99999A0000000
>  %126 = call float @llvm.pow.f32(float 0x3FEFAE1480000000, float %125)
>  %127 = fadd float %126, 0x3FC3333340000000
>  %128 = fmul float %120, %127
>  %129 = fmul float %93, 0x3FC99999A0000000
>  %130 = fadd float %129, 1.000000e+00
>  %131 = fmul float %128, %130
>  %132 = fadd float %89, 0xBFA47AE140000000
>  %133 = call float @llvm.AMDGPU.clamp.(float %132, float 0.000000e+00, float 1.000000e+00)
>  %134 = fmul float %85, %103
>  %135 = fmul float %134, 0x3F847AE140000000
>  %136 = fdiv float 1.000000e+00, %86, !fpmath !1
>  %137 = fmul float %135, %136
>  %138 = call float @llvm.AMDGPU.clamp.(float %137, float 0.000000e+00, float 1.000000e+00)
>  %139 = fmul float %133, %138
>  %140 = fsub float 1.000000e+00, %97
>  %141 = fmul float %139, %140
>  %142 = fdiv float 1.000000e+00, %85, !fpmath !1
>  %143 = fmul float %79, %142
>  %144 = fmul float %83, %142
>  %145 = fmul float %20, %143
>  %146 = fmul float %21, %144
>  %147 = fadd float %145, %146
>  %148 = fmul float %147, 0xBF9EB851E0000000
>  %149 = fmul float %148, %103
>  %150 = fadd float %149, 1.000000e+00
>  %151 = fmul float %131, %150
>  %152 = fadd float %93, 4.000000e+00
>  %153 = fmul float %131, %152
>  %154 = fmul float %153, %150
>  br label %endif76
>
>else58:                                           ; preds = %else22
>  %155 = icmp eq i32 %32, 4
>  br i1 %155, label %if60, label %endif76
>
>if60:                                             ; preds = %else58
>  %156 = fadd float %89, 0xBFA47AE140000000
>  %157 = call float @llvm.AMDGPU.clamp.(float %156, float 0.000000e+00, float 1.000000e+00)
>  %158 = fmul float %157, 2.000000e+00
>  %159 = fsub float 1.000000e+00, %97
>  %160 = fmul float %158, %159
>  %161 = fmul float %86, 9.000000e+00
>  %162 = fmul float %93, 5.000000e-01
>  %163 = fadd float %162, 1.000000e+00
>  %164 = fmul float %161, %163
>  %165 = fmul float %85, 0x3F847AE140000000
>  %166 = fmul float %86, 0x3FF4CCCCC0000000
>  %167 = fmul float %165, %103
>  %168 = fadd float %167, %166
>  %169 = fmul float %93, 0x3FC99999A0000000
>  %170 = fadd float %169, 1.000000e+00
>  %171 = fmul float %168, %170
>  br label %endif76
>
>endif76:                                          ; preds = %if24, %if60, %else58, %if16
>  %.27 = phi float [ 1.000000e+00, %if16 ], [ %154, %if24 ], [ %164, %if60 ], [ 1.000000e+00, %else58 ]
>  %.24 = phi float [ %114, %if16 ], [ %141, %if24 ], [ %160, %if60 ], [ %89, %else58 ]
>  %.2 = phi float [ %110, %if16 ], [ %151, %if24 ], [ %171, %if60 ], [ %86, %else58 ]
>  %172 = fmul float %.24, 8.000000e+00
>  %173 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %174 = load <16 x i8>, <16 x i8> addrspace(2)* %173, align 16, !invariant.load !0
>  %175 = call float @llvm.SI.load.const(<16 x i8> %174, i32 128)
>  %176 = fmul float %175, %172
>  %177 = call float @llvm.SI.load.const(<16 x i8> %174, i32 132)
>  %178 = fmul float %177, %172
>  %179 = call float @llvm.SI.load.const(<16 x i8> %174, i32 136)
>  %180 = fmul float %179, %172
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = call float @llvm.SI.load.const(<16 x i8> %182, i32 156)
>  %184 = fmul float %176, %183
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 156)
>  %186 = fmul float %178, %185
>  %187 = call float @llvm.SI.load.const(<16 x i8> %182, i32 156)
>  %188 = fmul float %180, %187
>  %189 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %190 = load <16 x i8>, <16 x i8> addrspace(2)* %189, align 16, !invariant.load !0
>  %191 = call float @llvm.SI.load.const(<16 x i8> %190, i32 160)
>  %192 = call float @llvm.pow.f32(float %191, float 3.000000e+00)
>  %193 = fmul float %192, %.24
>  %194 = fcmp ole float %193, 0.000000e+00
>  %195 = select i1 %194, float 0.000000e+00, float %.27
>  %196 = select i1 %194, float 0.000000e+00, float %.2
>  %197 = fmul float %21, %22
>  %198 = fmul float %20, %22
>  %199 = fmul float %197, %195
>  %200 = fsub float -0.000000e+00, %199
>  %201 = fmul float %198, %195
>  %202 = fmul float %196, %21
>  %203 = fmul float %196, %20
>  %204 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %205 = load <16 x i8>, <16 x i8> addrspace(2)* %204, align 16, !invariant.load !0
>  %206 = call float @llvm.SI.load.const(<16 x i8> %205, i32 80)
>  %207 = fmul float %203, %206
>  %208 = call float @llvm.SI.load.const(<16 x i8> %205, i32 84)
>  %209 = fmul float %203, %208
>  %210 = call float @llvm.SI.load.const(<16 x i8> %205, i32 88)
>  %211 = fmul float %203, %210
>  %212 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %213 = load <16 x i8>, <16 x i8> addrspace(2)* %212, align 16, !invariant.load !0
>  %214 = call float @llvm.SI.load.const(<16 x i8> %213, i32 96)
>  %215 = fmul float %202, %214
>  %216 = fadd float %215, %207
>  %217 = call float @llvm.SI.load.const(<16 x i8> %213, i32 100)
>  %218 = fmul float %202, %217
>  %219 = fadd float %218, %209
>  %220 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %221 = load <16 x i8>, <16 x i8> addrspace(2)* %220, align 16, !invariant.load !0
>  %222 = call float @llvm.SI.load.const(<16 x i8> %221, i32 104)
>  %223 = fmul float %202, %222
>  %224 = fadd float %223, %211
>  %225 = call float @llvm.SI.load.const(<16 x i8> %221, i32 112)
>  %226 = fadd float %225, %216
>  %227 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %228 = load <16 x i8>, <16 x i8> addrspace(2)* %227, align 16, !invariant.load !0
>  %229 = call float @llvm.SI.load.const(<16 x i8> %228, i32 116)
>  %230 = fadd float %229, %219
>  %231 = call float @llvm.SI.load.const(<16 x i8> %228, i32 120)
>  %232 = fadd float %231, %224
>  %233 = call float @llvm.SI.load.const(<16 x i8> %228, i32 80)
>  %234 = fmul float %233, %200
>  %235 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %236 = load <16 x i8>, <16 x i8> addrspace(2)* %235, align 16, !invariant.load !0
>  %237 = call float @llvm.SI.load.const(<16 x i8> %236, i32 84)
>  %238 = fmul float %237, %200
>  %239 = call float @llvm.SI.load.const(<16 x i8> %236, i32 88)
>  %240 = fmul float %239, %200
>  %241 = call float @llvm.SI.load.const(<16 x i8> %236, i32 96)
>  %242 = fmul float %201, %241
>  %243 = fadd float %242, %234
>  %244 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %245 = load <16 x i8>, <16 x i8> addrspace(2)* %244, align 16, !invariant.load !0
>  %246 = call float @llvm.SI.load.const(<16 x i8> %245, i32 100)
>  %247 = fmul float %201, %246
>  %248 = fadd float %247, %238
>  %249 = call float @llvm.SI.load.const(<16 x i8> %245, i32 104)
>  %250 = fmul float %201, %249
>  %251 = fadd float %250, %240
>  %252 = fadd float %226, %243
>  %253 = fadd float %230, %248
>  %254 = fadd float %232, %251
>  %255 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %256 = load <16 x i8>, <16 x i8> addrspace(2)* %255, align 16, !invariant.load !0
>  %257 = call float @llvm.SI.load.const(<16 x i8> %256, i32 0)
>  %258 = fmul float %257, %252
>  %259 = call float @llvm.SI.load.const(<16 x i8> %256, i32 4)
>  %260 = fmul float %259, %252
>  %261 = call float @llvm.SI.load.const(<16 x i8> %256, i32 8)
>  %262 = fmul float %261, %252
>  %263 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %264 = load <16 x i8>, <16 x i8> addrspace(2)* %263, align 16, !invariant.load !0
>  %265 = call float @llvm.SI.load.const(<16 x i8> %264, i32 12)
>  %266 = fmul float %265, %252
>  %267 = call float @llvm.SI.load.const(<16 x i8> %264, i32 16)
>  %268 = fmul float %267, %253
>  %269 = fadd float %268, %258
>  %270 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %271 = load <16 x i8>, <16 x i8> addrspace(2)* %270, align 16, !invariant.load !0
>  %272 = call float @llvm.SI.load.const(<16 x i8> %271, i32 20)
>  %273 = fmul float %272, %253
>  %274 = fadd float %273, %260
>  %275 = call float @llvm.SI.load.const(<16 x i8> %271, i32 24)
>  %276 = fmul float %275, %253
>  %277 = fadd float %276, %262
>  %278 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %279 = load <16 x i8>, <16 x i8> addrspace(2)* %278, align 16, !invariant.load !0
>  %280 = call float @llvm.SI.load.const(<16 x i8> %279, i32 28)
>  %281 = fmul float %280, %253
>  %282 = fadd float %281, %266
>  %283 = call float @llvm.SI.load.const(<16 x i8> %279, i32 32)
>  %284 = fmul float %283, %254
>  %285 = fadd float %284, %269
>  %286 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %287 = load <16 x i8>, <16 x i8> addrspace(2)* %286, align 16, !invariant.load !0
>  %288 = call float @llvm.SI.load.const(<16 x i8> %287, i32 36)
>  %289 = fmul float %288, %254
>  %290 = fadd float %289, %274
>  %291 = call float @llvm.SI.load.const(<16 x i8> %287, i32 40)
>  %292 = fmul float %291, %254
>  %293 = fadd float %292, %277
>  %294 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %295 = load <16 x i8>, <16 x i8> addrspace(2)* %294, align 16, !invariant.load !0
>  %296 = call float @llvm.SI.load.const(<16 x i8> %295, i32 44)
>  %297 = fmul float %296, %254
>  %298 = fadd float %297, %282
>  %299 = call float @llvm.SI.load.const(<16 x i8> %295, i32 48)
>  %300 = fadd float %285, %299
>  %301 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %302 = load <16 x i8>, <16 x i8> addrspace(2)* %301, align 16, !invariant.load !0
>  %303 = call float @llvm.SI.load.const(<16 x i8> %302, i32 52)
>  %304 = fadd float %290, %303
>  %305 = call float @llvm.SI.load.const(<16 x i8> %302, i32 56)
>  %306 = fadd float %293, %305
>  %307 = call float @llvm.SI.load.const(<16 x i8> %302, i32 60)
>  %308 = fadd float %298, %307
>  %309 = bitcast i32 %12 to float
>  %310 = insertvalue <{ float, float, float }> undef, float %309, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %184, float %186, float %188, float %192)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %30, float %31, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %300, float %304, float %306, float %308)
>  ret <{ float, float, float }> %310
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                   ; C0840B08
>	v_mov_b32_e32 v0, 0x3eaaaaab                            ; 7E0002FF 3EAAAAAB
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	buffer_load_format_xyzw v[16:19], v5, s[12:15], 0 idxen ; E00C2000 80031005
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen    ; E00C2000 80020306
>	s_load_dwordx4 s[12:15], s[2:3], 0x0                    ; C0860300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s1, s[12:15], 0x26                  ; C2008D26
>	s_buffer_load_dword s0, s[12:15], 0x23                  ; C2000D23
>	s_buffer_load_dword s17, s[12:15], 0x24                 ; C2088D24
>	s_buffer_load_dword s16, s[12:15], 0x25                 ; C2080D25
>	s_buffer_load_dword s6, s[12:15], 0x3                   ; C2030D03
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v6, s1                                    ; 7E0C0201
>	v_mac_f32_e64 v6, 2.0, s0                               ; D23E0006 000000F4
>	v_madak_f32_e32 v0, v0, v6, 0x3da3d70a                  ; 42000D00 3DA3D70A
>	v_log_f32_e32 v0, v0                                    ; 7E004F00
>	s_buffer_load_dword s9, s[12:15], 0x7                   ; C2048D07
>	s_buffer_load_dword s5, s[12:15], 0xb                   ; C2028D0B
>	s_buffer_load_dword s22, s[12:15], 0x1c                 ; C20B0D1C
>	s_buffer_load_dword s20, s[12:15], 0x1d                 ; C20A0D1D
>	s_buffer_load_dword s21, s[12:15], 0x1e                 ; C20A8D1E
>	s_buffer_load_dword s11, s[12:15], 0x0                  ; C2058D00
>	s_buffer_load_dword s8, s[12:15], 0x1                   ; C2040D01
>	s_buffer_load_dword s3, s[12:15], 0x4                   ; C2018D04
>	s_buffer_load_dword s4, s[12:15], 0x5                   ; C2020D05
>	s_buffer_load_dword s10, s[12:15], 0x8                  ; C2050D08
>	s_buffer_load_dword s7, s[12:15], 0x9                   ; C2038D09
>	s_buffer_load_dword s1, s[12:15], 0xc                   ; C2008D0C
>	s_buffer_load_dword s2, s[12:15], 0xd                   ; C2010D0D
>	s_buffer_load_dword s0, s[12:15], 0xf                   ; C2000D0F
>	v_mul_legacy_f32_e32 v0, 0x3e99999a, v0                 ; 0E0000FF 3E99999A
>	v_exp_f32_e32 v10, v0                                   ; 7E144B00
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v5, s22                                   ; 7E0A0216
>	v_mov_b32_e32 v15, s6                                   ; 7E1E0206
>	v_mov_b32_e32 v1, s20                                   ; 7E020214
>	v_mov_b32_e32 v13, s9                                   ; 7E1A0209
>	v_mov_b32_e32 v0, s21                                   ; 7E000215
>	v_add_f32_e64 v10, v10, 0 clamp                         ; D206080A 0001010A
>	v_mov_b32_e32 v17, s5                                   ; 7E220205
>	v_mov_b32_e32 v11, s17                                  ; 7E160211
>	v_mov_b32_e32 v12, s16                                  ; 7E180210
>	v_cvt_i32_f32_e32 v16, v16                              ; 7E201110
>	v_cmp_ne_u32_e32 vcc, 1, v16                            ; 7D8A2081
>	s_and_saveexec_b64 s[18:19], vcc                        ; BE92246A
>	s_xor_b64 s[18:19], exec, s[18:19]                      ; 8992127E
>	s_cbranch_execz BB0_8                                   ; BF880000
>	v_mul_f32_e32 v14, s22, v15                             ; 101C1E16
>	s_buffer_load_dword s22, s[12:15], 0x11                 ; C20B0D11
>	v_mac_f32_e32 v14, s20, v13                             ; 3E1C1A14
>	v_mac_f32_e32 v14, s21, v17                             ; 3E1C2215
>	v_cmp_ne_u32_e32 vcc, 3, v16                            ; 7D8A2083
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_log_f32_e32 v15, s22                                  ; 7E1E4E16
>	v_mul_legacy_f32_e32 v15, 0x3ecccccd, v15               ; 0E1E1EFF 3ECCCCCD
>	v_exp_f32_e32 v15, v15                                  ; 7E1E4B0F
>	v_rcp_f32_e32 v18, v15                                  ; 7E24550F
>	v_add_f32_e32 v15, s0, v14                              ; 061E1C00
>	v_mul_f32_e32 v13, 0x3fe66666, v18                      ; 101A24FF 3FE66666
>	s_and_saveexec_b64 s[20:21], vcc                        ; BE94246A
>	s_xor_b64 s[20:21], exec, s[20:21]                      ; 8994147E
>	s_cbranch_execz BB0_5                                   ; BF880000
>	v_cmp_eq_u32_e32 vcc, 4, v16                            ; 7D842084
>	v_mov_b32_e32 v14, 1.0                                  ; 7E1C02F2
>	s_and_saveexec_b64 s[22:23], vcc                        ; BE96246A
>	s_xor_b64 s[22:23], exec, s[22:23]                      ; 8996167E
>	s_cbranch_execz BB0_4                                   ; BF880000
>	v_mov_b32_e32 v11, 0xbd23d70a                           ; 7E1602FF BD23D70A
>	v_add_f32_e32 v11, s16, v11                             ; 06161610
>	v_add_f32_e64 v11, v11, 0 clamp                         ; D206080B 0001010B
>	v_add_f32_e32 v11, v11, v11                             ; 0616170B
>	v_mad_f32 v12, -v10, v11, v11                           ; D282000C 242E170A
>	v_mov_b32_e32 v11, 0x41100000                           ; 7E1602FF 41100000
>	v_mul_f32_e32 v14, s17, v11                             ; 101C1611
>	v_mul_f32_e32 v11, 0.5, v6                              ; 10160CF0
>	v_mac_f32_e32 v14, v14, v11                             ; 3E1C170E
>	v_mov_b32_e32 v11, 0x3fa66666                           ; 7E1602FF 3FA66666
>	v_mul_f32_e32 v16, 0x3c23d70a, v15                      ; 10201EFF 3C23D70A
>	v_mul_f32_e32 v11, s17, v11                             ; 10161611
>	v_mac_f32_e32 v11, v13, v16                             ; 3E16210D
>	v_mul_f32_e32 v16, 0x3e4ccccd, v6                       ; 10200CFF 3E4CCCCD
>	v_mac_f32_e32 v11, v11, v16                             ; 3E16210B
>	s_or_b64 exec, exec, s[22:23]                           ; 88FE167E
>	s_or_saveexec_b64 s[20:21], s[20:21]                    ; BE942514
>	s_xor_b64 exec, exec, s[20:21]                          ; 89FE147E
>	s_cbranch_execz BB0_7                                   ; BF880000
>	v_mul_f32_e32 v12, s8, v5                               ; 10180A08
>	v_mul_f32_e32 v11, s11, v5                              ; 10160A0B
>	v_mac_f32_e32 v12, s4, v1                               ; 3E180204
>	v_mac_f32_e32 v11, s3, v1                               ; 3E160203
>	v_log_f32_e32 v17, s17                                  ; 7E224E11
>	v_mac_f32_e32 v12, s7, v0                               ; 3E180007
>	v_mac_f32_e32 v11, s10, v0                              ; 3E16000A
>	v_add_f32_e32 v16, s2, v12                              ; 06201802
>	v_mul_f32_e32 v12, v13, v15                             ; 10181F0D
>	v_add_f32_e32 v14, s1, v11                              ; 061C1601
>	v_log_f32_e32 v11, v12                                  ; 7E164F0C
>	v_mul_legacy_f32_e32 v17, 0x3f4ccccd, v17               ; 0E2222FF 3F4CCCCD
>	v_exp_f32_e32 v17, v17                                  ; 7E224B11
>	v_mov_b32_e32 v18, 0x3f0ccccd                           ; 7E2402FF 3F0CCCCD
>	v_mul_legacy_f32_e32 v11, 0x3f6b851f, v11               ; 0E1616FF 3F6B851F
>	v_rcp_f32_e32 v17, v17                                  ; 7E225511
>	v_exp_f32_e32 v11, v11                                  ; 7E164B0B
>	v_mul_f32_e32 v18, s17, v18                             ; 10242411
>	v_mac_f32_e32 v18, 0x3ca3d70a, v11                      ; 3E2416FF 3CA3D70A
>	v_log_f32_e32 v11, 0x3f7d70a4                           ; 7E164EFF 3F7D70A4
>	v_mul_f32_e32 v17, v17, v12                             ; 10221911
>	v_mov_b32_e32 v19, 0x3e4ccccd                           ; 7E2602FF 3E4CCCCD
>	v_mul_f32_e32 v17, v19, v17                             ; 10222313
>	v_mul_legacy_f32_e32 v11, v17, v11                      ; 0E161711
>	v_rcp_f32_e32 v15, v15                                  ; 7E1E550F
>	v_exp_f32_e32 v11, v11                                  ; 7E164B0B
>	v_add_f32_e32 v11, 0x3e19999a, v11                      ; 061616FF 3E19999A
>	v_mul_f32_e32 v11, v11, v18                             ; 1016250B
>	v_rcp_f32_e32 v18, s17                                  ; 7E245411
>	v_mul_f32_e32 v14, v15, v14                             ; 101C1D0F
>	v_mul_f32_e32 v15, v15, v16                             ; 101E210F
>	v_mul_f32_e32 v15, v15, v8                              ; 101E110F
>	v_mul_f32_e32 v17, v19, v6                              ; 10220D13
>	v_mul_f32_e32 v12, 0x3c23d70a, v12                      ; 101818FF 3C23D70A
>	v_mac_f32_e32 v15, v14, v7                              ; 3E1E0F0E
>	v_mac_f32_e32 v11, v11, v17                             ; 3E16230B
>	v_mov_b32_e32 v17, 0xbd23d70a                           ; 7E2202FF BD23D70A
>	v_add_f32_e32 v17, s16, v17                             ; 06222210
>	v_mul_f32_e32 v12, v18, v12                             ; 10181912
>	v_mul_f32_e32 v14, 0xbcf5c28f, v15                      ; 101C1EFF BCF5C28F
>	v_mul_f32_e32 v13, v13, v14                             ; 101A1D0D
>	v_add_f32_e32 v14, 4.0, v6                              ; 061C0CF6
>	v_add_f32_e64 v17, v17, 0 clamp                         ; D2060811 00010111
>	v_add_f32_e64 v12, v12, 0 clamp                         ; D206080C 0001010C
>	v_mul_f32_e32 v14, v14, v11                             ; 101C170E
>	v_mul_f32_e32 v12, v12, v17                             ; 1018230C
>	v_mad_f32 v12, -v10, v12, v12                           ; D282000C 2432190A
>	v_mac_f32_e32 v11, v11, v13                             ; 3E161B0B
>	v_mac_f32_e32 v14, v14, v13                             ; 3E1C1B0E
>	s_or_b64 exec, exec, s[20:21]                           ; 88FE147E
>	s_or_saveexec_b64 s[18:19], s[18:19]                    ; BE922512
>	s_xor_b64 exec, exec, s[18:19]                          ; 89FE127E
>	v_mul_f32_e32 v6, 0x40400000, v6                        ; 100C0CFF 40400000
>	v_mad_f32 v11, v6, s17, s17                             ; D282000B 00442306
>	v_mul_f32_e32 v6, 0xbf666666, v10                       ; 100C14FF BF666666
>	v_mad_f32 v12, v6, s16, s16                             ; D282000C 00402106
>	v_mov_b32_e32 v14, 1.0                                  ; 7E1C02F2
>	s_or_b64 exec, exec, s[18:19]                           ; 88FE127E
>	s_buffer_load_dword s20, s[12:15], 0x28                 ; C20A0D28
>	s_buffer_load_dword s16, s[12:15], 0x20                 ; C2080D20
>	s_buffer_load_dword s17, s[12:15], 0x21                 ; C2088D21
>	s_buffer_load_dword s18, s[12:15], 0x22                 ; C2090D22
>	s_buffer_load_dword s19, s[12:15], 0x27                 ; C2098D27
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_log_f32_e32 v15, s20                                  ; 7E1E4E14
>	v_mul_f32_e32 v6, 0x41000000, v12                       ; 100C18FF 41000000
>	v_mul_f32_e32 v10, s16, v6                              ; 10140C10
>	v_mul_f32_e32 v13, s17, v6                              ; 101A0C11
>	v_mul_legacy_f32_e32 v15, 0x40400000, v15               ; 0E1E1EFF 40400000
>	v_mul_f32_e32 v6, s18, v6                               ; 100C0C12
>	v_exp_f32_e32 v15, v15                                  ; 7E1E4B0F
>	s_buffer_load_dword s20, s[12:15], 0x14                 ; C20A0D14
>	s_buffer_load_dword s21, s[12:15], 0x15                 ; C20A8D15
>	s_buffer_load_dword s22, s[12:15], 0x16                 ; C20B0D16
>	v_mul_f32_e32 v12, v12, v15                             ; 10181F0C
>	v_mul_f32_e32 v10, s19, v10                             ; 10141413
>	v_mul_f32_e32 v13, s19, v13                             ; 101A1A13
>	v_mul_f32_e32 v6, s19, v6                               ; 100C0C13
>	s_buffer_load_dword s16, s[12:15], 0x2                  ; C2080D02
>	s_buffer_load_dword s17, s[12:15], 0x6                  ; C2088D06
>	s_buffer_load_dword s18, s[12:15], 0xa                  ; C2090D0A
>	s_buffer_load_dword s19, s[12:15], 0xe                  ; C2098D0E
>	s_buffer_load_dword s23, s[12:15], 0x18                 ; C20B8D18
>	s_buffer_load_dword s24, s[12:15], 0x19                 ; C20C0D19
>	s_buffer_load_dword s12, s[12:15], 0x1a                 ; C2060D1A
>	v_cmp_ge_f32_e32 vcc, 0, v12                            ; 7C0C1880
>	v_cndmask_b32_e64 v12, v14, 0, vcc                      ; D200000C 01A9010E
>	v_mul_f32_e32 v14, v9, v8                               ; 101C1109
>	v_cndmask_b32_e64 v11, v11, 0, vcc                      ; D200000B 01A9010B
>	v_mul_f32_e32 v9, v9, v7                                ; 10120F09
>	v_mul_f32_e32 v7, v7, v11                               ; 100E1707
>	v_mul_f32_e32 v14, v12, v14                             ; 101C1D0C
>	v_mul_f32_e32 v8, v8, v11                               ; 10101708
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mad_f32 v5, s20, v7, v5                               ; D2820005 04160E14
>	v_mad_f32 v1, s21, v7, v1                               ; D2820001 04060E15
>	v_mad_f32 v0, s22, v7, v0                               ; D2820000 04020E16
>	v_mul_f32_e32 v9, v12, v9                               ; 1012130C
>	v_mul_f32_e32 v7, s20, v14                              ; 100E1C14
>	v_mac_f32_e32 v5, s23, v8                               ; 3E0A1017
>	v_mad_f32 v7, v9, s23, -v7                              ; D2820007 841C2F09
>	v_mac_f32_e32 v1, s24, v8                               ; 3E021018
>	v_mac_f32_e32 v0, s12, v8                               ; 3E00100C
>	v_mul_f32_e32 v8, s21, v14                              ; 10101C15
>	v_add_f32_e32 v5, v7, v5                                ; 060A0B07
>	v_mad_f32 v8, v9, s24, -v8                              ; D2820008 84203109
>	v_mul_f32_e32 v11, s22, v14                             ; 10161C16
>	v_mad_f32 v9, v9, s12, -v11                             ; D2820009 842C1909
>	v_add_f32_e32 v1, v8, v1                                ; 06020308
>	v_mul_f32_e32 v7, s11, v5                               ; 100E0A0B
>	v_mul_f32_e32 v8, s8, v5                                ; 10100A08
>	v_add_f32_e32 v0, v9, v0                                ; 06000109
>	v_mul_f32_e32 v9, s16, v5                               ; 10120A10
>	v_mul_f32_e32 v5, s6, v5                                ; 100A0A06
>	v_mac_f32_e32 v7, s3, v1                                ; 3E0E0203
>	v_mac_f32_e32 v8, s4, v1                                ; 3E100204
>	v_mac_f32_e32 v9, s17, v1                               ; 3E120211
>	v_mac_f32_e32 v5, s9, v1                                ; 3E0A0209
>	v_mac_f32_e32 v7, s10, v0                               ; 3E0E000A
>	v_mac_f32_e32 v5, s5, v0                                ; 3E0A0005
>	v_mac_f32_e32 v8, s7, v0                                ; 3E100007
>	v_mac_f32_e32 v9, s18, v0                               ; 3E120012
>	v_add_f32_e32 v0, s1, v7                                ; 06000E01
>	exp 15, 32, 0, 0, 0, v10, v13, v6, v15                  ; F800020F 0F060D0A
>	v_add_f32_e32 v1, s2, v8                                ; 06021002
>	v_add_f32_e32 v7, s19, v9                               ; 060E1213
>	v_add_f32_e32 v5, s0, v5                                ; 060A0A00
>	exp 15, 33, 0, 0, 0, v3, v4, v0, v0                     ; F800021F 00000403
>	exp 15, 12, 0, 1, 0, v0, v1, v7, v5                     ; F80008CF 05070100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1084 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                              ; BE86047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                  ; C080050C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                  ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]            ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                  ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]            ; C8050503
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_and_b32 s0, s0, s19                               ; 87001300
>	s_and_b64 exec, exec, s[6:7]                        ; 87FE067E
>	image_sample v0, v[0:1], s[12:19], s[0:3] dmask:0x8 ; F0800800 00030000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_log_f32_e32 v0, v0                                ; 7E004F00
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                  ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]            ; C8050303
>	v_interp_p1_f32 v4, v2, 0, 0, [m0]                  ; C8100002
>	v_mul_legacy_f32_e32 v0, 0x40400000, v0             ; 0E0000FF 40400000
>	v_exp_f32_e32 v0, v0                                ; 7E004B00
>	v_mad_f32 v0, v0, v1, 0.5                           ; D2820000 03C20300
>	v_interp_p2_f32 v4, [v4], v3, 0, 0, [m0]            ; C8110003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                  ; C8040102
>	v_mul_f32_e32 v0, v0, v0                            ; 10000100
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]            ; C8050103
>	v_interp_p1_f32 v2, v2, 2, 0, [m0]                  ; C8080202
>	v_madak_f32_e32 v5, v0, v0, 0xbd800000              ; 420A0100 BD800000
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]            ; C8090203
>	v_mul_f32_e32 v2, v5, v2                            ; 10040505
>	v_mul_f32_e32 v0, v5, v4                            ; 10000905
>	v_mul_f32_e32 v1, v5, v1                            ; 10020305
>	v_mov_b32_e32 v3, v2                                ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 164 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL CONST[0..9]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.0000,     0.3333,     0.0800,     0.3000}
>IMM[1] FLT32 {    1.0000,     0.0000,     1.8000,     0.4000}
>IMM[2] INT32 {1, 3, 4, 0}
>IMM[3] FLT32 {    0.9500,     3.0000,     0.9000,     0.0200}
>IMM[4] FLT32 {    0.9200,     0.5500,     0.9900,     0.8000}
>IMM[5] FLT32 {    0.2000,     0.1500,    -0.0400,     0.0100}
>IMM[6] FLT32 {    0.0300,     4.0000,     9.0000,     0.5000}
>IMM[7] FLT32 {    1.3000,     8.0000,    -1.0000,     1.0000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: MUL TEMP[1], CONST[0], CONST[7].xxxx
>  2: MAD TEMP[1], CONST[1], CONST[7].yyyy, TEMP[1]
>  3: MAD TEMP[1], CONST[2], CONST[7].zzzz, TEMP[1]
>  4: ADD TEMP[1].xyw, TEMP[1], CONST[3]
>  5: MOV TEMP[2].x, CONST[9].xxxx
>  6: MOV TEMP[3].x, CONST[9].yyyy
>  7: MAD TEMP[4].x, CONST[8].wwww, IMM[0].xxxx, CONST[9].zzzz
>  8: MAD TEMP[5].x, TEMP[4].xxxx, IMM[0].yyyy, IMM[0].zzzz
>  9: POW TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 10: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 11: MOV TEMP[6].x, IMM[1].xxxx
> 12: MOV TEMP[7].x, IMM[1].yyyy
> 13: POW TEMP[8].x, CONST[4].yyyy, IMM[1].wwww
> 14: RCP TEMP[8].x, TEMP[8].xxxx
> 15: MUL TEMP[8].x, IMM[1].zzzz, TEMP[8].xxxx
> 16: USEQ TEMP[9].x, TEMP[0].xxxx, IMM[2].xxxx
> 17: UIF TEMP[9].xxxx :0
> 18:   MOV_SAT TEMP[9].x, TEMP[4].xxxx
> 19:   ADD TEMP[9].x, IMM[1].xxxx, -TEMP[9].xxxx
> 20:   MUL TEMP[7].x, TEMP[9].xxxx, IMM[3].xxxx
> 21:   MAD TEMP[9].x, TEMP[4].xxxx, IMM[3].yyyy, IMM[1].xxxx
> 22:   MUL TEMP[2].x, CONST[9].xxxx, TEMP[9].xxxx
> 23:   MUL TEMP[9].x, TEMP[5].xxxx, IMM[3].zzzz
> 24:   ADD TEMP[9].x, IMM[1].xxxx, -TEMP[9].xxxx
> 25:   MUL TEMP[3].x, CONST[9].yyyy, TEMP[9].xxxx
> 26: ELSE :0
> 27:   USEQ TEMP[9].x, TEMP[0].xxxx, IMM[2].yyyy
> 28:   UIF TEMP[9].xxxx :0
> 29:     MUL TEMP[9].x, TEMP[1].wwww, TEMP[8].xxxx
> 30:     POW TEMP[9].x, TEMP[9].xxxx, IMM[4].xxxx
> 31:     MUL TEMP[10].x, TEMP[2].xxxx, IMM[4].yyyy
> 32:     MAD TEMP[9].x, IMM[3].wwww, TEMP[9].xxxx, TEMP[10].xxxx
> 33:     MUL TEMP[10].x, TEMP[1].wwww, TEMP[8].xxxx
> 34:     POW TEMP[11].x, TEMP[2].xxxx, IMM[4].wwww
> 35:     RCP TEMP[11].x, TEMP[11].xxxx
> 36:     MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 37:     MUL TEMP[10].x, TEMP[10].xxxx, IMM[5].xxxx
> 38:     POW TEMP[10].x, IMM[4].zzzz, TEMP[10].xxxx
> 39:     ADD TEMP[10].x, TEMP[10].xxxx, IMM[5].yyyy
> 40:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 41:     MAD TEMP[10].x, TEMP[4].xxxx, IMM[5].xxxx, IMM[1].xxxx
> 42:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 43:     ADD TEMP[10].x, TEMP[3].xxxx, IMM[5].zzzz
> 44:     MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 45:     MUL TEMP[11].x, TEMP[1].wwww, TEMP[8].xxxx
> 46:     MUL TEMP[11].x, TEMP[11].xxxx, IMM[5].wwww
> 47:     RCP TEMP[12].x, TEMP[2].xxxx
> 48:     MUL TEMP[11].x, TEMP[11].xxxx, TEMP[12].xxxx
> 49:     MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 50:     MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 51:     ADD TEMP[11].x, IMM[1].xxxx, -TEMP[5].xxxx
> 52:     MUL TEMP[3].x, TEMP[10].xxxx, TEMP[11].xxxx
> 53:     RCP TEMP[10].x, TEMP[1].wwww
> 54:     MUL TEMP[10].xy, TEMP[1].xyyy, TEMP[10].xxxx
> 55:     DP2 TEMP[10].x, IN[0].xyyy, TEMP[10].xyyy
> 56:     MUL TEMP[10].x, -TEMP[10].xxxx, IMM[6].xxxx
> 57:     MAD TEMP[10].x, TEMP[10].xxxx, TEMP[8].xxxx, IMM[1].xxxx
> 58:     MUL TEMP[2].x, TEMP[9].xxxx, TEMP[10].xxxx
> 59:     ADD TEMP[11].x, IMM[6].yyyy, TEMP[4].xxxx
> 60:     MUL TEMP[9].x, TEMP[9].xxxx, TEMP[11].xxxx
> 61:     MUL TEMP[6].x, TEMP[9].xxxx, TEMP[10].xxxx
> 62:   ELSE :0
> 63:     USEQ TEMP[0].x, TEMP[0].xxxx, IMM[2].zzzz
> 64:     UIF TEMP[0].xxxx :0
> 65:       ADD TEMP[0].x, TEMP[3].xxxx, IMM[5].zzzz
> 66:       MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 67:       MUL TEMP[0].x, IMM[0].xxxx, TEMP[0].xxxx
> 68:       ADD TEMP[5].x, IMM[1].xxxx, -TEMP[5].xxxx
> 69:       MUL TEMP[3].x, TEMP[0].xxxx, TEMP[5].xxxx
> 70:       MUL TEMP[0].x, TEMP[2].xxxx, IMM[6].zzzz
> 71:       MAD TEMP[5].x, TEMP[4].xxxx, IMM[6].wwww, IMM[1].xxxx
> 72:       MUL TEMP[6].x, TEMP[0].xxxx, TEMP[5].xxxx
> 73:       MUL TEMP[0].x, TEMP[1].wwww, IMM[5].wwww
> 74:       MUL TEMP[1].x, TEMP[2].xxxx, IMM[7].xxxx
> 75:       MAD TEMP[0].x, TEMP[0].xxxx, TEMP[8].xxxx, TEMP[1].xxxx
> 76:       MAD TEMP[1].x, TEMP[4].xxxx, IMM[5].xxxx, IMM[1].xxxx
> 77:       MUL TEMP[2].x, TEMP[0].xxxx, TEMP[1].xxxx
> 78:     ENDIF
> 79:   ENDIF
> 80: ENDIF
> 81: MUL TEMP[0].x, TEMP[3].xxxx, IMM[7].yyyy
> 82: MUL TEMP[0].xyz, CONST[8].xyzz, TEMP[0].xxxx
> 83: MOV TEMP[0].w, IMM[1].xxxx
> 84: FSGE TEMP[1].x, IMM[1].yyyy, TEMP[3].xxxx
> 85: UCMP TEMP[6].x, TEMP[1].xxxx, IMM[1].yyyy, TEMP[6].xxxx
> 86: UCMP TEMP[2].x, TEMP[1].xxxx, IMM[1].yyyy, TEMP[2].xxxx
> 87: MUL TEMP[1].xy, IMM[7].zwww, IN[0].yxxx
> 88: MUL TEMP[1].xy, TEMP[1].xyyy, IN[0].zzzz
> 89: MUL TEMP[1].xy, TEMP[1].xyyy, TEMP[6].xxxx
> 90: MUL TEMP[3].x, TEMP[2].xxxx, IN[0].yyyy
> 91: MUL TEMP[2].x, TEMP[2].xxxx, IN[0].xxxx
> 92: MUL TEMP[2].xyz, TEMP[2].xxxx, CONST[5].xyzz
> 93: MAD TEMP[2].xyz, TEMP[3].xxxx, CONST[6].xyzz, TEMP[2].xyzz
> 94: ADD TEMP[2].xyz, CONST[7].xyzz, TEMP[2].xyzz
> 95: MUL TEMP[3].xyz, TEMP[1].xxxx, CONST[5].xyzz
> 96: MAD TEMP[3].xyz, TEMP[1].yyyy, CONST[6].xyzz, TEMP[3].xyzz
> 97: ADD TEMP[1].xyz, TEMP[2].xyzz, TEMP[3].xyzz
> 98: MUL TEMP[2], CONST[0], TEMP[1].xxxx
> 99: MAD TEMP[2], CONST[1], TEMP[1].yyyy, TEMP[2]
>100: MAD TEMP[1], CONST[2], TEMP[1].zzzz, TEMP[2]
>101: ADD TEMP[1], TEMP[1], CONST[3]
>102: MOV TEMP[2].xy, IN[2].xyxx
>103: ADD TEMP[3].x, IMM[1].xxxx, -TEMP[7].xxxx
>104: RCP TEMP[3].x, TEMP[3].xxxx
>105: MOV TEMP[2].z, TEMP[3].xxxx
>106: MOV OUT[2].xyz, TEMP[2].xyzx
>107: MOV OUT[0], TEMP[1]
>108: MOV OUT[1], TEMP[0]
>109: END
>radeonsi: Compiling shader 60
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 0
>  %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %16)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fptosi float %26 to i32
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call float @llvm.SI.load.const(<16 x i8> %34, i32 0)
>  %36 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %37 = fmul float %35, %36
>  %38 = call float @llvm.SI.load.const(<16 x i8> %34, i32 4)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %34, i32 112)
>  %40 = fmul float %38, %39
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 12)
>  %44 = call float @llvm.SI.load.const(<16 x i8> %42, i32 112)
>  %45 = fmul float %43, %44
>  %46 = call float @llvm.SI.load.const(<16 x i8> %42, i32 16)
>  %47 = call float @llvm.SI.load.const(<16 x i8> %42, i32 116)
>  %48 = fmul float %46, %47
>  %49 = fadd float %48, %37
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 20)
>  %53 = call float @llvm.SI.load.const(<16 x i8> %51, i32 116)
>  %54 = fmul float %52, %53
>  %55 = fadd float %54, %40
>  %56 = call float @llvm.SI.load.const(<16 x i8> %51, i32 28)
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 116)
>  %60 = fmul float %56, %59
>  %61 = fadd float %60, %45
>  %62 = call float @llvm.SI.load.const(<16 x i8> %58, i32 32)
>  %63 = call float @llvm.SI.load.const(<16 x i8> %58, i32 120)
>  %64 = fmul float %62, %63
>  %65 = fadd float %64, %49
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 36)
>  %69 = call float @llvm.SI.load.const(<16 x i8> %67, i32 120)
>  %70 = fmul float %68, %69
>  %71 = fadd float %70, %55
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 44)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 120)
>  %76 = fmul float %72, %75
>  %77 = fadd float %76, %61
>  %78 = call float @llvm.SI.load.const(<16 x i8> %74, i32 48)
>  %79 = fadd float %65, %78
>  %80 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !invariant.load !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 52)
>  %83 = fadd float %71, %82
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 60)
>  %85 = fadd float %77, %84
>  %86 = call float @llvm.SI.load.const(<16 x i8> %81, i32 144)
>  %87 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %88 = load <16 x i8>, <16 x i8> addrspace(2)* %87, align 16, !invariant.load !0
>  %89 = call float @llvm.SI.load.const(<16 x i8> %88, i32 148)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %88, i32 140)
>  %91 = call float @llvm.SI.load.const(<16 x i8> %88, i32 152)
>  %92 = fmul float %90, 2.000000e+00
>  %93 = fadd float %92, %91
>  %94 = fmul float %93, 0x3FD5555560000000
>  %95 = fadd float %94, 0x3FB47AE140000000
>  %96 = call float @llvm.pow.f32(float %95, float 0x3FD3333340000000)
>  %97 = call float @llvm.AMDGPU.clamp.(float %96, float 0.000000e+00, float 1.000000e+00)
>  %98 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %99 = load <16 x i8>, <16 x i8> addrspace(2)* %98, align 16, !invariant.load !0
>  %100 = call float @llvm.SI.load.const(<16 x i8> %99, i32 68)
>  %101 = call float @llvm.pow.f32(float %100, float 0x3FD99999A0000000)
>  %102 = fdiv float 1.000000e+00, %101, !fpmath !1
>  %103 = fmul float %102, 0x3FFCCCCCC0000000
>  %104 = icmp eq i32 %32, 1
>  br i1 %104, label %if17, label %else26
>
>if17:                                             ; preds = %main_body
>  %105 = call float @llvm.AMDGPU.clamp.(float %93, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 1.000000e+00, %105
>  %107 = fmul float %106, 0x3FEE666660000000
>  %108 = fmul float %93, 3.000000e+00
>  %109 = fadd float %108, 1.000000e+00
>  %110 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %111 = load <16 x i8>, <16 x i8> addrspace(2)* %110, align 16, !invariant.load !0
>  %112 = call float @llvm.SI.load.const(<16 x i8> %111, i32 144)
>  %113 = fmul float %112, %109
>  %114 = fmul float %97, 0x3FECCCCCC0000000
>  %115 = fsub float 1.000000e+00, %114
>  %116 = call float @llvm.SI.load.const(<16 x i8> %111, i32 148)
>  %117 = fmul float %116, %115
>  br label %endif80
>
>else26:                                           ; preds = %main_body
>  %118 = icmp eq i32 %32, 3
>  br i1 %118, label %if28, label %else62
>
>if28:                                             ; preds = %else26
>  %119 = fmul float %85, %103
>  %120 = call float @llvm.pow.f32(float %119, float 0x3FED70A3E0000000)
>  %121 = fmul float %86, 0x3FE19999A0000000
>  %122 = fmul float %120, 0x3F947AE140000000
>  %123 = fadd float %122, %121
>  %124 = fmul float %85, %103
>  %125 = call float @llvm.pow.f32(float %86, float 0x3FE99999A0000000)
>  %126 = fdiv float 1.000000e+00, %125, !fpmath !1
>  %127 = fmul float %124, %126
>  %128 = fmul float %127, 0x3FC99999A0000000
>  %129 = call float @llvm.pow.f32(float 0x3FEFAE1480000000, float %128)
>  %130 = fadd float %129, 0x3FC3333340000000
>  %131 = fmul float %123, %130
>  %132 = fmul float %93, 0x3FC99999A0000000
>  %133 = fadd float %132, 1.000000e+00
>  %134 = fmul float %131, %133
>  %135 = fadd float %89, 0xBFA47AE140000000
>  %136 = call float @llvm.AMDGPU.clamp.(float %135, float 0.000000e+00, float 1.000000e+00)
>  %137 = fmul float %85, %103
>  %138 = fmul float %137, 0x3F847AE140000000
>  %139 = fdiv float 1.000000e+00, %86, !fpmath !1
>  %140 = fmul float %138, %139
>  %141 = call float @llvm.AMDGPU.clamp.(float %140, float 0.000000e+00, float 1.000000e+00)
>  %142 = fmul float %136, %141
>  %143 = fsub float 1.000000e+00, %97
>  %144 = fmul float %142, %143
>  %145 = fdiv float 1.000000e+00, %85, !fpmath !1
>  %146 = fmul float %79, %145
>  %147 = fmul float %83, %145
>  %148 = fmul float %20, %146
>  %149 = fmul float %21, %147
>  %150 = fadd float %148, %149
>  %151 = fmul float %150, 0xBF9EB851E0000000
>  %152 = fmul float %151, %103
>  %153 = fadd float %152, 1.000000e+00
>  %154 = fmul float %134, %153
>  %155 = fadd float %93, 4.000000e+00
>  %156 = fmul float %134, %155
>  %157 = fmul float %156, %153
>  br label %endif80
>
>else62:                                           ; preds = %else26
>  %158 = icmp eq i32 %32, 4
>  br i1 %158, label %if64, label %endif80
>
>if64:                                             ; preds = %else62
>  %159 = fadd float %89, 0xBFA47AE140000000
>  %160 = call float @llvm.AMDGPU.clamp.(float %159, float 0.000000e+00, float 1.000000e+00)
>  %161 = fmul float %160, 2.000000e+00
>  %162 = fsub float 1.000000e+00, %97
>  %163 = fmul float %161, %162
>  %164 = fmul float %86, 9.000000e+00
>  %165 = fmul float %93, 5.000000e-01
>  %166 = fadd float %165, 1.000000e+00
>  %167 = fmul float %164, %166
>  %168 = fmul float %85, 0x3F847AE140000000
>  %169 = fmul float %86, 0x3FF4CCCCC0000000
>  %170 = fmul float %168, %103
>  %171 = fadd float %170, %169
>  %172 = fmul float %93, 0x3FC99999A0000000
>  %173 = fadd float %172, 1.000000e+00
>  %174 = fmul float %171, %173
>  br label %endif80
>
>endif80:                                          ; preds = %if28, %if64, %else62, %if17
>  %.08 = phi float [ %107, %if17 ], [ 0.000000e+00, %else62 ], [ 0.000000e+00, %if64 ], [ 0.000000e+00, %if28 ]
>  %.27 = phi float [ 1.000000e+00, %if17 ], [ 1.000000e+00, %else62 ], [ %167, %if64 ], [ %157, %if28 ]
>  %.24 = phi float [ %117, %if17 ], [ %89, %else62 ], [ %163, %if64 ], [ %144, %if28 ]
>  %.2 = phi float [ %113, %if17 ], [ %86, %else62 ], [ %174, %if64 ], [ %154, %if28 ]
>  %175 = fmul float %.24, 8.000000e+00
>  %176 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %177 = load <16 x i8>, <16 x i8> addrspace(2)* %176, align 16, !invariant.load !0
>  %178 = call float @llvm.SI.load.const(<16 x i8> %177, i32 128)
>  %179 = fmul float %178, %175
>  %180 = call float @llvm.SI.load.const(<16 x i8> %177, i32 132)
>  %181 = fmul float %180, %175
>  %182 = call float @llvm.SI.load.const(<16 x i8> %177, i32 136)
>  %183 = fmul float %182, %175
>  %184 = fcmp ole float %.24, 0.000000e+00
>  %185 = select i1 %184, float 0.000000e+00, float %.27
>  %186 = select i1 %184, float 0.000000e+00, float %.2
>  %187 = fmul float %21, %22
>  %188 = fmul float %20, %22
>  %189 = fmul float %187, %185
>  %190 = fsub float -0.000000e+00, %189
>  %191 = fmul float %188, %185
>  %192 = fmul float %186, %21
>  %193 = fmul float %186, %20
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = call float @llvm.SI.load.const(<16 x i8> %195, i32 80)
>  %197 = fmul float %193, %196
>  %198 = call float @llvm.SI.load.const(<16 x i8> %195, i32 84)
>  %199 = fmul float %193, %198
>  %200 = call float @llvm.SI.load.const(<16 x i8> %195, i32 88)
>  %201 = fmul float %193, %200
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = call float @llvm.SI.load.const(<16 x i8> %203, i32 96)
>  %205 = fmul float %192, %204
>  %206 = fadd float %205, %197
>  %207 = call float @llvm.SI.load.const(<16 x i8> %203, i32 100)
>  %208 = fmul float %192, %207
>  %209 = fadd float %208, %199
>  %210 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <16 x i8>, <16 x i8> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = call float @llvm.SI.load.const(<16 x i8> %211, i32 104)
>  %213 = fmul float %192, %212
>  %214 = fadd float %213, %201
>  %215 = call float @llvm.SI.load.const(<16 x i8> %211, i32 112)
>  %216 = fadd float %215, %206
>  %217 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %218 = load <16 x i8>, <16 x i8> addrspace(2)* %217, align 16, !invariant.load !0
>  %219 = call float @llvm.SI.load.const(<16 x i8> %218, i32 116)
>  %220 = fadd float %219, %209
>  %221 = call float @llvm.SI.load.const(<16 x i8> %218, i32 120)
>  %222 = fadd float %221, %214
>  %223 = call float @llvm.SI.load.const(<16 x i8> %218, i32 80)
>  %224 = fmul float %223, %190
>  %225 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %226 = load <16 x i8>, <16 x i8> addrspace(2)* %225, align 16, !invariant.load !0
>  %227 = call float @llvm.SI.load.const(<16 x i8> %226, i32 84)
>  %228 = fmul float %227, %190
>  %229 = call float @llvm.SI.load.const(<16 x i8> %226, i32 88)
>  %230 = fmul float %229, %190
>  %231 = call float @llvm.SI.load.const(<16 x i8> %226, i32 96)
>  %232 = fmul float %191, %231
>  %233 = fadd float %232, %224
>  %234 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %235 = load <16 x i8>, <16 x i8> addrspace(2)* %234, align 16, !invariant.load !0
>  %236 = call float @llvm.SI.load.const(<16 x i8> %235, i32 100)
>  %237 = fmul float %191, %236
>  %238 = fadd float %237, %228
>  %239 = call float @llvm.SI.load.const(<16 x i8> %235, i32 104)
>  %240 = fmul float %191, %239
>  %241 = fadd float %240, %230
>  %242 = fadd float %216, %233
>  %243 = fadd float %220, %238
>  %244 = fadd float %222, %241
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 0)
>  %248 = fmul float %247, %242
>  %249 = call float @llvm.SI.load.const(<16 x i8> %246, i32 4)
>  %250 = fmul float %249, %242
>  %251 = call float @llvm.SI.load.const(<16 x i8> %246, i32 8)
>  %252 = fmul float %251, %242
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 12)
>  %256 = fmul float %255, %242
>  %257 = call float @llvm.SI.load.const(<16 x i8> %254, i32 16)
>  %258 = fmul float %257, %243
>  %259 = fadd float %258, %248
>  %260 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %261 = load <16 x i8>, <16 x i8> addrspace(2)* %260, align 16, !invariant.load !0
>  %262 = call float @llvm.SI.load.const(<16 x i8> %261, i32 20)
>  %263 = fmul float %262, %243
>  %264 = fadd float %263, %250
>  %265 = call float @llvm.SI.load.const(<16 x i8> %261, i32 24)
>  %266 = fmul float %265, %243
>  %267 = fadd float %266, %252
>  %268 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %269 = load <16 x i8>, <16 x i8> addrspace(2)* %268, align 16, !invariant.load !0
>  %270 = call float @llvm.SI.load.const(<16 x i8> %269, i32 28)
>  %271 = fmul float %270, %243
>  %272 = fadd float %271, %256
>  %273 = call float @llvm.SI.load.const(<16 x i8> %269, i32 32)
>  %274 = fmul float %273, %244
>  %275 = fadd float %274, %259
>  %276 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %277 = load <16 x i8>, <16 x i8> addrspace(2)* %276, align 16, !invariant.load !0
>  %278 = call float @llvm.SI.load.const(<16 x i8> %277, i32 36)
>  %279 = fmul float %278, %244
>  %280 = fadd float %279, %264
>  %281 = call float @llvm.SI.load.const(<16 x i8> %277, i32 40)
>  %282 = fmul float %281, %244
>  %283 = fadd float %282, %267
>  %284 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %285 = load <16 x i8>, <16 x i8> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = call float @llvm.SI.load.const(<16 x i8> %285, i32 44)
>  %287 = fmul float %286, %244
>  %288 = fadd float %287, %272
>  %289 = call float @llvm.SI.load.const(<16 x i8> %285, i32 48)
>  %290 = fadd float %275, %289
>  %291 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %292 = load <16 x i8>, <16 x i8> addrspace(2)* %291, align 16, !invariant.load !0
>  %293 = call float @llvm.SI.load.const(<16 x i8> %292, i32 52)
>  %294 = fadd float %280, %293
>  %295 = call float @llvm.SI.load.const(<16 x i8> %292, i32 56)
>  %296 = fadd float %283, %295
>  %297 = call float @llvm.SI.load.const(<16 x i8> %292, i32 60)
>  %298 = fadd float %288, %297
>  %299 = fsub float 1.000000e+00, %.08
>  %300 = fdiv float 1.000000e+00, %299, !fpmath !1
>  %301 = bitcast i32 %12 to float
>  %302 = insertvalue <{ float, float, float }> undef, float %301, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %179, float %181, float %183, float 1.000000e+00)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %30, float %31, float %300, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %290, float %294, float %296, float %298)
>  ret <{ float, float, float }> %302
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	v_mov_b32_e32 v3, 0x3eaaaaab                            ; 7E0602FF 3EAAAAAB
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                      ; C0820300
>	buffer_load_format_xyzw v[21:24], v5, s[12:15], 0 idxen ; E00C2000 80031505
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s19, s[4:7], 0x26                   ; C2098526
>	s_buffer_load_dword s18, s[4:7], 0x23                   ; C2090523
>	s_buffer_load_dword s3, s[4:7], 0x3                     ; C2018503
>	s_buffer_load_dword s26, s[4:7], 0x1c                   ; C20D051C
>	s_buffer_load_dword s24, s[4:7], 0x1d                   ; C20C051D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v12, s19                                  ; 7E180213
>	v_mac_f32_e64 v12, 2.0, s18                             ; D23E000C 000024F4
>	v_madak_f32_e32 v3, v3, v12, 0x3da3d70a                 ; 42061903 3DA3D70A
>	v_log_f32_e32 v3, v3                                    ; 7E064F03
>	s_buffer_load_dword s25, s[4:7], 0x1e                   ; C20C851E
>	s_buffer_load_dword s13, s[4:7], 0x7                    ; C2068507
>	s_buffer_load_dword s11, s[4:7], 0xb                    ; C205850B
>	v_mul_legacy_f32_e32 v3, 0x3e99999a, v3                 ; 0E0606FF 3E99999A
>	v_exp_f32_e32 v3, v3                                    ; 7E064B03
>	v_add_f32_e64 v13, v3, 0 clamp                          ; D206080D 00010103
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_buffer_load_dword s17, s[4:7], 0x24                   ; C2088524
>	s_buffer_load_dword s16, s[4:7], 0x25                   ; C2080525
>	s_buffer_load_dword s0, s[4:7], 0x0                     ; C2000500
>	s_buffer_load_dword s10, s[4:7], 0x1                    ; C2050501
>	s_buffer_load_dword s8, s[4:7], 0x4                     ; C2040504
>	s_buffer_load_dword s9, s[4:7], 0x5                     ; C2048505
>	s_buffer_load_dword s2, s[4:7], 0xd                     ; C201050D
>	s_buffer_load_dword s1, s[4:7], 0xf                     ; C200850F
>	s_buffer_load_dword s14, s[4:7], 0x8                    ; C2070508
>	s_buffer_load_dword s15, s[4:7], 0x9                    ; C2078509
>	s_buffer_load_dword s12, s[4:7], 0xc                    ; C206050C
>	v_mov_b32_e32 v0, s26                                   ; 7E00021A
>	v_mov_b32_e32 v20, s3                                   ; 7E280203
>	v_mov_b32_e32 v1, s24                                   ; 7E020218
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v18, s13                                  ; 7E24020D
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_mov_b32_e32 v10, s25                                  ; 7E140219
>	v_mov_b32_e32 v19, s11                                  ; 7E26020B
>	v_mov_b32_e32 v14, s17                                  ; 7E1C0211
>	v_mov_b32_e32 v15, s16                                  ; 7E1E0210
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_cvt_i32_f32_e32 v17, v21                              ; 7E221115
>	v_cmp_ne_u32_e32 vcc, 1, v17                            ; 7D8A2281
>	s_and_saveexec_b64 s[18:19], vcc                        ; BE92246A
>	s_xor_b64 s[18:19], exec, s[18:19]                      ; 8992127E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_execz BB0_8                                   ; BF880000
>	s_buffer_load_dword s20, s[4:7], 0x11                   ; C20A0511
>	v_mul_f32_e32 v5, s26, v20                              ; 100A281A
>	v_mac_f32_e32 v5, s24, v18                              ; 3E0A2418
>	v_mac_f32_e32 v5, s25, v19                              ; 3E0A2619
>	v_cmp_ne_u32_e32 vcc, 3, v17                            ; 7D8A2283
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_log_f32_e32 v6, s20                                   ; 7E0C4E14
>	v_mul_legacy_f32_e32 v6, 0x3ecccccd, v6                 ; 0E0C0CFF 3ECCCCCD
>	v_exp_f32_e32 v6, v6                                    ; 7E0C4B06
>	v_rcp_f32_e32 v11, v6                                   ; 7E165506
>	v_add_f32_e32 v6, s1, v5                                ; 060C0A01
>	v_mul_f32_e32 v5, 0x3fe66666, v11                       ; 100A16FF 3FE66666
>	s_and_saveexec_b64 s[20:21], vcc                        ; BE94246A
>	s_xor_b64 s[20:21], exec, s[20:21]                      ; 8994147E
>	s_cbranch_execz BB0_5                                   ; BF880000
>	v_cmp_eq_u32_e32 vcc, 4, v17                            ; 7D842284
>	v_mov_b32_e32 v11, 0                                    ; 7E160280
>	v_mov_b32_e32 v16, 1.0                                  ; 7E2002F2
>	s_and_saveexec_b64 s[22:23], vcc                        ; BE96246A
>	s_xor_b64 s[22:23], exec, s[22:23]                      ; 8996167E
>	s_cbranch_execz BB0_4                                   ; BF880000
>	v_mov_b32_e32 v11, 0xbd23d70a                           ; 7E1602FF BD23D70A
>	v_add_f32_e32 v11, s16, v11                             ; 06161610
>	v_add_f32_e64 v11, v11, 0 clamp                         ; D206080B 0001010B
>	v_add_f32_e32 v11, v11, v11                             ; 0616170B
>	v_mad_f32 v15, -v13, v11, v11                           ; D282000F 242E170D
>	v_mov_b32_e32 v11, 0x41100000                           ; 7E1602FF 41100000
>	v_mov_b32_e32 v14, 0x3fa66666                           ; 7E1C02FF 3FA66666
>	v_mul_f32_e32 v16, s17, v11                             ; 10201611
>	v_mul_f32_e32 v11, 0.5, v12                             ; 101618F0
>	v_mac_f32_e32 v16, v16, v11                             ; 3E201710
>	v_mul_f32_e32 v11, 0x3c23d70a, v6                       ; 10160CFF 3C23D70A
>	v_mul_f32_e32 v14, s17, v14                             ; 101C1C11
>	v_mac_f32_e32 v14, v5, v11                              ; 3E1C1705
>	v_mul_f32_e32 v11, 0x3e4ccccd, v12                      ; 101618FF 3E4CCCCD
>	v_mac_f32_e32 v14, v14, v11                             ; 3E1C170E
>	v_mov_b32_e32 v11, 0                                    ; 7E160280
>	s_or_b64 exec, exec, s[22:23]                           ; 88FE167E
>	s_or_saveexec_b64 s[20:21], s[20:21]                    ; BE942514
>	s_xor_b64 exec, exec, s[20:21]                          ; 89FE147E
>	s_cbranch_execz BB0_7                                   ; BF880000
>	v_mul_f32_e32 v14, s10, v0                              ; 101C000A
>	v_mac_f32_e32 v14, s9, v1                               ; 3E1C0209
>	v_log_f32_e32 v17, s17                                  ; 7E224E11
>	v_mac_f32_e32 v14, s15, v10                             ; 3E1C140F
>	v_mul_f32_e32 v15, v5, v6                               ; 101E0D05
>	v_add_f32_e32 v16, s2, v14                              ; 06201C02
>	v_log_f32_e32 v14, v15                                  ; 7E1C4F0F
>	v_mul_legacy_f32_e32 v17, 0x3f4ccccd, v17               ; 0E2222FF 3F4CCCCD
>	v_exp_f32_e32 v17, v17                                  ; 7E224B11
>	v_mov_b32_e32 v18, 0x3f0ccccd                           ; 7E2402FF 3F0CCCCD
>	v_mul_legacy_f32_e32 v14, 0x3f6b851f, v14               ; 0E1C1CFF 3F6B851F
>	v_rcp_f32_e32 v17, v17                                  ; 7E225511
>	v_exp_f32_e32 v14, v14                                  ; 7E1C4B0E
>	v_mul_f32_e32 v18, s17, v18                             ; 10242411
>	v_mac_f32_e32 v18, 0x3ca3d70a, v14                      ; 3E241CFF 3CA3D70A
>	v_log_f32_e32 v14, 0x3f7d70a4                           ; 7E1C4EFF 3F7D70A4
>	v_mul_f32_e32 v17, v17, v15                             ; 10221F11
>	v_mov_b32_e32 v19, 0x3e4ccccd                           ; 7E2602FF 3E4CCCCD
>	v_mul_f32_e32 v17, v19, v17                             ; 10222313
>	v_mul_legacy_f32_e32 v14, v17, v14                      ; 0E1C1D11
>	v_mul_f32_e32 v11, s0, v0                               ; 10160000
>	v_rcp_f32_e32 v6, v6                                    ; 7E0C5506
>	v_mac_f32_e32 v11, s8, v1                               ; 3E160208
>	v_exp_f32_e32 v14, v14                                  ; 7E1C4B0E
>	v_mac_f32_e32 v11, s14, v10                             ; 3E16140E
>	v_add_f32_e32 v14, 0x3e19999a, v14                      ; 061C1CFF 3E19999A
>	v_add_f32_e32 v11, s12, v11                             ; 0616160C
>	v_mul_f32_e32 v14, v14, v18                             ; 101C250E
>	v_rcp_f32_e32 v18, s17                                  ; 7E245411
>	v_mul_f32_e32 v11, v6, v11                              ; 10161706
>	v_mul_f32_e32 v6, v6, v16                               ; 100C2106
>	v_mul_f32_e32 v6, v6, v8                                ; 100C1106
>	v_mul_f32_e32 v17, v19, v12                             ; 10221913
>	v_mac_f32_e32 v6, v11, v7                               ; 3E0C0F0B
>	v_mul_f32_e32 v15, 0x3c23d70a, v15                      ; 101E1EFF 3C23D70A
>	v_mac_f32_e32 v14, v14, v17                             ; 3E1C230E
>	v_mov_b32_e32 v17, 0xbd23d70a                           ; 7E2202FF BD23D70A
>	v_add_f32_e32 v17, s16, v17                             ; 06222210
>	v_mul_f32_e32 v15, v18, v15                             ; 101E1F12
>	v_mul_f32_e32 v6, 0xbcf5c28f, v6                        ; 100C0CFF BCF5C28F
>	v_mul_f32_e32 v5, v5, v6                                ; 100A0D05
>	v_add_f32_e32 v6, 4.0, v12                              ; 060C18F6
>	v_add_f32_e64 v17, v17, 0 clamp                         ; D2060811 00010111
>	v_add_f32_e64 v15, v15, 0 clamp                         ; D206080F 0001010F
>	v_mul_f32_e32 v16, v6, v14                              ; 10201D06
>	v_mul_f32_e32 v15, v15, v17                             ; 101E230F
>	v_mad_f32 v15, -v13, v15, v15                           ; D282000F 243E1F0D
>	v_mac_f32_e32 v14, v14, v5                              ; 3E1C0B0E
>	v_mac_f32_e32 v16, v16, v5                              ; 3E200B10
>	v_mov_b32_e32 v11, 0                                    ; 7E160280
>	s_or_b64 exec, exec, s[20:21]                           ; 88FE147E
>	s_or_saveexec_b64 s[18:19], s[18:19]                    ; BE922512
>	s_xor_b64 exec, exec, s[18:19]                          ; 89FE127E
>	v_add_f32_e64 v5, v12, 0 clamp                          ; D2060805 0001010C
>	v_mov_b32_e32 v6, 0x3f733333                            ; 7E0C02FF 3F733333
>	v_mad_f32 v11, -v5, v6, v6                              ; D282000B 241A0D05
>	v_mul_f32_e32 v5, 0x40400000, v12                       ; 100A18FF 40400000
>	v_mad_f32 v14, v5, s17, s17                             ; D282000E 00442305
>	v_mul_f32_e32 v5, 0xbf666666, v13                       ; 100A1AFF BF666666
>	v_mad_f32 v15, v5, s16, s16                             ; D282000F 00402105
>	v_mov_b32_e32 v16, 1.0                                  ; 7E2002F2
>	s_or_b64 exec, exec, s[18:19]                           ; 88FE127E
>	s_buffer_load_dword s16, s[4:7], 0x20                   ; C2080520
>	s_buffer_load_dword s17, s[4:7], 0x21                   ; C2088521
>	s_buffer_load_dword s18, s[4:7], 0x22                   ; C2090522
>	v_mul_f32_e32 v5, 0x41000000, v15                       ; 100A1EFF 41000000
>	s_buffer_load_dword s20, s[4:7], 0x14                   ; C20A0514
>	s_buffer_load_dword s21, s[4:7], 0x15                   ; C20A8515
>	s_buffer_load_dword s22, s[4:7], 0x16                   ; C20B0516
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v6, s16, v5                               ; 100C0A10
>	v_mul_f32_e32 v12, s17, v5                              ; 10180A11
>	v_mul_f32_e32 v5, s18, v5                               ; 100A0A12
>	s_buffer_load_dword s16, s[4:7], 0x2                    ; C2080502
>	s_buffer_load_dword s17, s[4:7], 0x6                    ; C2088506
>	s_buffer_load_dword s18, s[4:7], 0xa                    ; C209050A
>	s_buffer_load_dword s19, s[4:7], 0xe                    ; C209850E
>	s_buffer_load_dword s23, s[4:7], 0x18                   ; C20B8518
>	s_buffer_load_dword s24, s[4:7], 0x19                   ; C20C0519
>	s_buffer_load_dword s4, s[4:7], 0x1a                    ; C202051A
>	v_cmp_ge_f32_e32 vcc, 0, v15                            ; 7C0C1E80
>	v_cndmask_b32_e64 v14, v14, 0, vcc                      ; D200000E 01A9010E
>	v_mul_f32_e32 v15, v9, v8                               ; 101E1109
>	v_cndmask_b32_e64 v13, v16, 0, vcc                      ; D200000D 01A90110
>	v_mul_f32_e32 v9, v9, v7                                ; 10120F09
>	v_mul_f32_e32 v7, v7, v14                               ; 100E1D07
>	v_mul_f32_e32 v15, v13, v15                             ; 101E1F0D
>	v_mul_f32_e32 v8, v8, v14                               ; 10101D08
>	v_mad_f32 v0, s20, v7, v0                               ; D2820000 04020E14
>	v_mad_f32 v1, s21, v7, v1                               ; D2820001 04060E15
>	v_mad_f32 v7, s22, v7, v10                              ; D2820007 042A0E16
>	v_mul_f32_e32 v9, v13, v9                               ; 1012130D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v0, s23, v8                               ; 3E001017
>	v_mac_f32_e32 v1, s24, v8                               ; 3E021018
>	v_mac_f32_e32 v7, s4, v8                                ; 3E0E1004
>	v_mul_f32_e32 v8, s20, v15                              ; 10101E14
>	v_mul_f32_e32 v10, s21, v15                             ; 10141E15
>	v_mad_f32 v8, v9, s23, -v8                              ; D2820008 84202F09
>	v_mul_f32_e32 v13, s22, v15                             ; 101A1E16
>	v_mad_f32 v10, v9, s24, -v10                            ; D282000A 84283109
>	v_add_f32_e32 v0, v8, v0                                ; 06000108
>	v_mad_f32 v9, v9, s4, -v13                              ; D2820009 84340909
>	v_add_f32_e32 v1, v10, v1                               ; 0602030A
>	v_add_f32_e32 v7, v9, v7                                ; 060E0F09
>	v_mul_f32_e32 v9, s10, v0                               ; 1012000A
>	v_mul_f32_e32 v8, s0, v0                                ; 10100000
>	v_mul_f32_e32 v10, s16, v0                              ; 10140010
>	v_mul_f32_e32 v0, s3, v0                                ; 10000003
>	v_mac_f32_e32 v9, s9, v1                                ; 3E120209
>	v_mac_f32_e32 v8, s8, v1                                ; 3E100208
>	v_mac_f32_e32 v10, s17, v1                              ; 3E140211
>	v_mac_f32_e32 v0, s13, v1                               ; 3E00020D
>	v_mac_f32_e32 v9, s15, v7                               ; 3E120E0F
>	v_mac_f32_e32 v0, s11, v7                               ; 3E000E0B
>	v_mac_f32_e32 v8, s14, v7                               ; 3E100E0E
>	v_mac_f32_e32 v10, s18, v7                              ; 3E140E12
>	v_add_f32_e32 v7, s2, v9                                ; 060E1202
>	v_sub_f32_e32 v9, 1.0, v11                              ; 081216F2
>	v_rcp_f32_e32 v9, v9                                    ; 7E125509
>	v_add_f32_e32 v1, s12, v8                               ; 0602100C
>	v_add_f32_e32 v8, s19, v10                              ; 06101413
>	v_mov_b32_e32 v10, 1.0                                  ; 7E1402F2
>	v_add_f32_e32 v0, s1, v0                                ; 06000001
>	exp 15, 32, 0, 0, 0, v6, v12, v5, v10                   ; F800020F 0A050C06
>	exp 15, 33, 0, 0, 0, v3, v4, v9, v0                     ; F800021F 00090403
>	exp 15, 12, 0, 1, 0, v1, v7, v8, v0                     ; F80008CF 00080701
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 28
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1104 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 9
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                              ; BE86047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                  ; C080050C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                  ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]            ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                  ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]            ; C8050503
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_and_b32 s0, s0, s19                               ; 87001300
>	s_and_b64 exec, exec, s[6:7]                        ; 87FE067E
>	image_sample v0, v[0:1], s[12:19], s[0:3] dmask:0x8 ; F0800800 00030000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_log_f32_e32 v0, v0                                ; 7E004F00
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                  ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]            ; C8050303
>	v_interp_p1_f32 v4, v2, 2, 1, [m0]                  ; C8100602
>	v_mul_legacy_f32_e32 v0, 0x40400000, v0             ; 0E0000FF 40400000
>	v_exp_f32_e32 v0, v0                                ; 7E004B00
>	v_mad_f32 v0, -v0, v1, 1.0                          ; D2820000 23CA0300
>	v_log_f32_e32 v0, v0                                ; 7E004F00
>	v_interp_p2_f32 v4, [v4], v3, 2, 1, [m0]            ; C8110603
>	v_interp_p1_f32 v1, v2, 0, 0, [m0]                  ; C8040002
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]            ; C8050003
>	v_mul_legacy_f32_e32 v0, v4, v0                     ; 0E000104
>	v_exp_f32_e32 v0, v0                                ; 7E004B00
>	v_sub_f32_e32 v0, 0x3fc00000, v0                    ; 080000FF 3FC00000
>	v_mul_f32_e32 v0, v0, v0                            ; 10000100
>	v_madak_f32_e32 v4, v0, v0, 0xbd800000              ; 42080100 BD800000
>	v_mul_f32_e32 v0, v4, v1                            ; 10000304
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                  ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]            ; C8050103
>	v_interp_p1_f32 v2, v2, 2, 0, [m0]                  ; C8080202
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]            ; C8090203
>	v_mul_f32_e32 v2, v4, v2                            ; 10040504
>	v_mul_f32_e32 v1, v4, v1                            ; 10020304
>	v_mov_b32_e32 v3, v2                                ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 192 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 1.0                                  ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xb                    ; C200010B
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v1, s9                                   ; 7E020209
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	v_mov_b32_e32 v5, s0                                   ; 7E0A0200
>	v_mac_f32_e32 v5, s8, v8                               ; 3E0A1008
>	v_mac_f32_e32 v1, s7, v7                               ; 3E020E07
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v1, v1, v1                               ; 06020301
>	exp 15, 33, 0, 0, 0, v3, v4, v0, v0                    ; F800021F 00000403
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mul_f32_e32 v3, s5, v5                               ; 10060A05
>	v_mad_f32 v1, v1, s4, -1.0                             ; D2820001 03CC0901
>	v_mad_f32 v3, v3, s6, -s6                              ; D2820003 80180D03
>	v_mov_b32_e32 v4, 0                                    ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                    ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                  ; BE80047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                      ; C082050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s4, s4, s19                                   ; 87041304
>	s_and_b64 exec, exec, s[0:1]                            ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	image_sample v[5:6], v[0:1], s[12:19], s[4:7] dmask:0x9 ; F0800900 00230500
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x4                     ; C2020104
>	s_buffer_load_dword s5, s[0:3], 0x5                     ; C2028105
>	s_buffer_load_dword s0, s[0:3], 0x6                     ; C2000106
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                      ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                ; C8110203
>	v_interp_p1_f32 v2, v2, 3, 0, [m0]                      ; C8080302
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mad_f32 v4, -v5, v4, v4                               ; D2820004 24120905
>	v_mad_f32 v0, -v5, v0, v0                               ; D2820000 24020105
>	v_mad_f32 v1, -v5, v1, v1                               ; D2820001 24060305
>	v_interp_p2_f32 v2, [v2], v3, 3, 0, [m0]                ; C8090303
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s0, v5                                ; 3E080A00
>	v_mul_f32_e32 v3, v2, v6                                ; 10060D02
>	v_mac_f32_e32 v0, s4, v5                                ; 3E000A04
>	v_mac_f32_e32 v1, s5, v5                                ; 3E020A05
>	v_mov_b32_e32 v2, v4                                    ; 7E040304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 180 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL CONST[0..3]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>  0: MAD TEMP[0].xy, IN[0].xyyy, CONST[3].xyyy, CONST[3].zwww
>  1: RCP TEMP[1].x, CONST[0].zzzz
>  2: RCP TEMP[1].y, CONST[0].wwww
>  3: MUL TEMP[0].xy, TEMP[0].xyyy, TEMP[1].xyyy
>  4: MAD TEMP[0].xy, TEMP[0].xyyy, IMM[0].xxxx, IMM[0].yyyy
>  5: MOV TEMP[1].zw, IMM[0].wwzw
>  6: MOV TEMP[1].x, TEMP[0].xyxx
>  7: MOV TEMP[1].xzw, TEMP[1].xxzw
>  8: MUL TEMP[0].x, TEMP[0].yyyy, CONST[1].zzzz
>  9: MOV TEMP[1].y, TEMP[0].xxxx
> 10: ADD TEMP[0].xy, IN[1].xyyy, -CONST[2].xyyy
> 11: MUL TEMP[0].xy, TEMP[0].xyyy, CONST[2].zwww
> 12: MAD TEMP[2].xy, IMM[0].wyyy, CONST[2].xyyy, IN[1].xyyy
> 13: MUL TEMP[2].xy, TEMP[2].xyyy, CONST[2].zwww
> 14: MOV TEMP[0].zw, TEMP[2].yyxy
> 15: MAD TEMP[2].xy, IMM[0].ywww, CONST[2].xyyy, IN[1].xyyy
> 16: MUL TEMP[2].xy, TEMP[2].xyyy, CONST[2].zwww
> 17: ADD TEMP[3].xy, IN[1].xyyy, CONST[2].xyyy
> 18: MUL TEMP[3].xy, TEMP[3].xyyy, CONST[2].zwww
> 19: MOV TEMP[2].zw, TEMP[3].yyxy
> 20: MOV OUT[1], TEMP[0]
> 21: MOV OUT[0], TEMP[1]
> 22: MOV OUT[2], TEMP[2]
> 23: END
>radeonsi: Compiling shader 61
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 48)
>  %29 = call float @llvm.SI.load.const(<16 x i8> %27, i32 56)
>  %30 = fmul float %19, %28
>  %31 = fadd float %30, %29
>  %32 = call float @llvm.SI.load.const(<16 x i8> %27, i32 52)
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call float @llvm.SI.load.const(<16 x i8> %34, i32 60)
>  %36 = fmul float %20, %32
>  %37 = fadd float %36, %35
>  %38 = call float @llvm.SI.load.const(<16 x i8> %34, i32 8)
>  %39 = fdiv float 1.000000e+00, %38, !fpmath !1
>  %40 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %41 = load <16 x i8>, <16 x i8> addrspace(2)* %40, align 16, !invariant.load !0
>  %42 = call float @llvm.SI.load.const(<16 x i8> %41, i32 12)
>  %43 = fdiv float 1.000000e+00, %42, !fpmath !1
>  %44 = fmul float %31, %39
>  %45 = fmul float %37, %43
>  %46 = fmul float %44, 2.000000e+00
>  %47 = fadd float %46, -1.000000e+00
>  %48 = fmul float %45, 2.000000e+00
>  %49 = fadd float %48, -1.000000e+00
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 24)
>  %53 = fmul float %49, %52
>  %54 = call float @llvm.SI.load.const(<16 x i8> %51, i32 32)
>  %55 = fsub float %24, %54
>  %56 = call float @llvm.SI.load.const(<16 x i8> %51, i32 36)
>  %57 = fsub float %25, %56
>  %58 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %59 = load <16 x i8>, <16 x i8> addrspace(2)* %58, align 16, !invariant.load !0
>  %60 = call float @llvm.SI.load.const(<16 x i8> %59, i32 40)
>  %61 = fmul float %55, %60
>  %62 = call float @llvm.SI.load.const(<16 x i8> %59, i32 44)
>  %63 = fmul float %57, %62
>  %64 = call float @llvm.SI.load.const(<16 x i8> %59, i32 32)
>  %65 = fadd float %64, %24
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 36)
>  %69 = fsub float %25, %68
>  %70 = call float @llvm.SI.load.const(<16 x i8> %67, i32 40)
>  %71 = fmul float %65, %70
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 44)
>  %73 = fmul float %69, %72
>  %74 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %75 = load <16 x i8>, <16 x i8> addrspace(2)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const(<16 x i8> %75, i32 32)
>  %77 = fsub float %24, %76
>  %78 = call float @llvm.SI.load.const(<16 x i8> %75, i32 36)
>  %79 = fadd float %78, %25
>  %80 = call float @llvm.SI.load.const(<16 x i8> %75, i32 40)
>  %81 = fmul float %77, %80
>  %82 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %83 = load <16 x i8>, <16 x i8> addrspace(2)* %82, align 16, !invariant.load !0
>  %84 = call float @llvm.SI.load.const(<16 x i8> %83, i32 44)
>  %85 = fmul float %79, %84
>  %86 = call float @llvm.SI.load.const(<16 x i8> %83, i32 32)
>  %87 = fadd float %24, %86
>  %88 = call float @llvm.SI.load.const(<16 x i8> %83, i32 36)
>  %89 = fadd float %25, %88
>  %90 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %91 = load <16 x i8>, <16 x i8> addrspace(2)* %90, align 16, !invariant.load !0
>  %92 = call float @llvm.SI.load.const(<16 x i8> %91, i32 40)
>  %93 = fmul float %87, %92
>  %94 = call float @llvm.SI.load.const(<16 x i8> %91, i32 44)
>  %95 = fmul float %89, %94
>  %96 = bitcast i32 %12 to float
>  %97 = insertvalue <{ float, float, float }> undef, float %96, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %61, float %63, float %71, float %73)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %81, float %85, float %93, float %95)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %47, float %53, float 0.000000e+00, float 1.000000e+00)
>  ret <{ float, float, float }> %97
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    0.2500,     0.3000,     0.5900,     0.1100}
>IMM[1] FLT32 {    1.0000,     0.5000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].zwww
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  4: MOV TEMP[2].xy, IN[1].xyyy
>  5: TEX TEMP[2].xyz, TEMP[2], SAMP[0], 2D
>  6: MOV TEMP[3].xy, IN[1].zwww
>  7: TEX TEMP[3].xyz, TEMP[3], SAMP[0], 2D
>  8: DP3 TEMP[0].x, TEMP[0].xyzz, IMM[0].yzww
>  9: ADD TEMP[0].x, TEMP[0].xxxx, IMM[1].xxxx
> 10: RCP TEMP[0].x, TEMP[0].xxxx
> 11: DP3 TEMP[1].x, TEMP[1].xyzz, IMM[0].yzww
> 12: ADD TEMP[1].x, TEMP[1].xxxx, IMM[1].xxxx
> 13: RCP TEMP[1].x, TEMP[1].xxxx
> 14: ADD TEMP[0].x, TEMP[0].xxxx, TEMP[1].xxxx
> 15: DP3 TEMP[1].x, TEMP[2].xyzz, IMM[0].yzww
> 16: ADD TEMP[1].x, TEMP[1].xxxx, IMM[1].xxxx
> 17: RCP TEMP[1].x, TEMP[1].xxxx
> 18: ADD TEMP[1].x, TEMP[0].xxxx, TEMP[1].xxxx
> 19: DP3 TEMP[2].x, TEMP[3].xyzz, IMM[0].yzww
> 20: ADD TEMP[2].x, TEMP[2].xxxx, IMM[1].xxxx
> 21: RCP TEMP[2].x, TEMP[2].xxxx
> 22: ADD TEMP[0].x, TEMP[1].xxxx, TEMP[2].xxxx
> 23: MUL TEMP[0].x, TEMP[0].xxxx, IMM[0].xxxx
> 24: POW TEMP[0].x, TEMP[0].xxxx, IMM[1].yyyy
> 25: MOV OUT[0], TEMP[0].xxxx
> 26: END
>radeonsi: Compiling shader 62
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %43 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %44 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %45 = load <8 x i32>, <8 x i32> addrspace(2)* %44, align 32, !invariant.load !0
>  %46 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %47 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %46, i64 0, i64 3, !amdgpu.uniform !0
>  %48 = load <4 x i32>, <4 x i32> addrspace(2)* %47, align 16, !invariant.load !0
>  %49 = extractelement <8 x i32> %45, i32 7
>  %50 = extractelement <4 x i32> %48, i32 0
>  %51 = and i32 %50, %49
>  %52 = insertelement <4 x i32> %48, i32 %51, i32 0
>  %53 = bitcast float %42 to i32
>  %54 = bitcast float %43 to i32
>  %55 = insertelement <2 x i32> undef, i32 %53, i32 0
>  %56 = insertelement <2 x i32> %55, i32 %54, i32 1
>  %57 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %56, <8 x i32> %45, <4 x i32> %52, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %58 = extractelement <4 x float> %57, i32 0
>  %59 = extractelement <4 x float> %57, i32 1
>  %60 = extractelement <4 x float> %57, i32 2
>  %61 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %62 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %63 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %64 = load <8 x i32>, <8 x i32> addrspace(2)* %63, align 32, !invariant.load !0
>  %65 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %66 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %65, i64 0, i64 3, !amdgpu.uniform !0
>  %67 = load <4 x i32>, <4 x i32> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = extractelement <8 x i32> %64, i32 7
>  %69 = extractelement <4 x i32> %67, i32 0
>  %70 = and i32 %69, %68
>  %71 = insertelement <4 x i32> %67, i32 %70, i32 0
>  %72 = bitcast float %61 to i32
>  %73 = bitcast float %62 to i32
>  %74 = insertelement <2 x i32> undef, i32 %72, i32 0
>  %75 = insertelement <2 x i32> %74, i32 %73, i32 1
>  %76 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %75, <8 x i32> %64, <4 x i32> %71, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %77 = extractelement <4 x float> %76, i32 0
>  %78 = extractelement <4 x float> %76, i32 1
>  %79 = extractelement <4 x float> %76, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 3, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = fmul float %39, 0x3FD3333340000000
>  %100 = fmul float %40, 0x3FE2E147A0000000
>  %101 = fadd float %100, %99
>  %102 = fmul float %41, 0x3FBC28F5C0000000
>  %103 = fadd float %101, %102
>  %104 = fadd float %103, 1.000000e+00
>  %105 = fdiv float 1.000000e+00, %104, !fpmath !1
>  %106 = fmul float %58, 0x3FD3333340000000
>  %107 = fmul float %59, 0x3FE2E147A0000000
>  %108 = fadd float %107, %106
>  %109 = fmul float %60, 0x3FBC28F5C0000000
>  %110 = fadd float %108, %109
>  %111 = fadd float %110, 1.000000e+00
>  %112 = fdiv float 1.000000e+00, %111, !fpmath !1
>  %113 = fadd float %105, %112
>  %114 = fmul float %77, 0x3FD3333340000000
>  %115 = fmul float %78, 0x3FE2E147A0000000
>  %116 = fadd float %115, %114
>  %117 = fmul float %79, 0x3FBC28F5C0000000
>  %118 = fadd float %116, %117
>  %119 = fadd float %118, 1.000000e+00
>  %120 = fdiv float 1.000000e+00, %119, !fpmath !1
>  %121 = fadd float %113, %120
>  %122 = fmul float %96, 0x3FD3333340000000
>  %123 = fmul float %97, 0x3FE2E147A0000000
>  %124 = fadd float %123, %122
>  %125 = fmul float %98, 0x3FBC28F5C0000000
>  %126 = fadd float %124, %125
>  %127 = fadd float %126, 1.000000e+00
>  %128 = fdiv float 1.000000e+00, %127, !fpmath !1
>  %129 = fadd float %121, %128
>  %130 = fmul float %129, 2.500000e-01
>  %sqrtf = call float @sqrtf(float %130) #1
>  %fabsf = call float @fabsf(float %sqrtf) #1
>  %131 = fcmp oeq float %130, 0xFFF0000000000000
>  %132 = select i1 %131, float 0x7FF0000000000000, float %fabsf
>  %133 = bitcast float %5 to i32
>  %134 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %133, 10
>  %135 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %134, float %132, 11
>  %136 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %135, float %132, 12
>  %137 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %136, float %132, 13
>  %138 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %137, float %132, 14
>  %139 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %138, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %139
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>declare float @sqrtf(float)
>
>declare float @fabsf(float)
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v0, 1.0                                 ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s13, s[0:3], 0xe                  ; C206810E
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s9, s[0:3], 0xa                   ; C204810A
>	s_buffer_load_dword s10, s[0:3], 0xb                  ; C205010B
>	s_buffer_load_dword s11, s[0:3], 0xc                  ; C205810C
>	s_buffer_load_dword s12, s[0:3], 0xd                  ; C206010D
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v4, s4                                  ; 7E085404
>	v_rcp_f32_e32 v5, s5                                  ; 7E0A5405
>	v_mov_b32_e32 v1, s13                                 ; 7E02020D
>	v_mov_b32_e32 v3, s0                                  ; 7E060200
>	v_mac_f32_e32 v1, s11, v6                             ; 3E020C0B
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v6, s7, v8                           ; 0A0C1007
>	v_add_f32_e32 v8, s7, v8                              ; 06101007
>	v_mac_f32_e32 v3, s12, v7                             ; 3E060E0C
>	v_subrev_f32_e32 v7, s8, v9                           ; 0A0E1208
>	v_mul_f32_e32 v1, v4, v1                              ; 10020304
>	v_add_f32_e32 v9, s8, v9                              ; 06121208
>	v_mul_f32_e32 v4, v5, v3                              ; 10080705
>	v_mul_f32_e32 v6, s9, v6                              ; 100C0C09
>	v_mul_f32_e32 v7, s10, v7                             ; 100E0E0A
>	v_mul_f32_e32 v8, s9, v8                              ; 10101009
>	v_mac_f32_e32 v4, v5, v3                              ; 3E080705
>	v_mul_f32_e32 v9, s10, v9                             ; 1012120A
>	exp 15, 32, 0, 0, 0, v6, v7, v8, v7                   ; F800020F 07080706
>	v_mad_f32 v3, v4, s6, -s6                             ; D2820003 80180D04
>	v_mad_f32 v1, 2.0, v1, -1.0                           ; D2820001 03CE02F4
>	exp 15, 33, 0, 0, 0, v6, v9, v8, v9                   ; F800021F 09080906
>	v_mov_b32_e32 v4, 0                                   ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                   ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 220 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x1
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                    ; BE86047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                        ; C080050C
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                        ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                  ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                        ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                  ; C8050103
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s0, s0, s19                                     ; 87001300
>	image_sample v[4:6], v[0:1], s[12:19], s[0:3] dmask:0x7   ; F0800700 00030400
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                        ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]                  ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                        ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]                  ; C8050303
>	image_sample v[7:9], v[0:1], s[12:19], s[0:3] dmask:0x7   ; F0800700 00030700
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                        ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                  ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                        ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                  ; C8050503
>	image_sample v[10:12], v[0:1], s[12:19], s[0:3] dmask:0x7 ; F0800700 00030A00
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                        ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]                  ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                        ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]                  ; C8050703
>	s_and_b64 exec, exec, s[6:7]                              ; 87FE067E
>	v_mov_b32_e32 v3, 0x3e99999a                              ; 7E0602FF 3E99999A
>	s_waitcnt vmcnt(2)                                        ; BF8C0F72
>	v_mul_f32_e32 v4, v3, v4                                  ; 10080903
>	v_mov_b32_e32 v14, 0x3f170a3d                             ; 7E1C02FF 3F170A3D
>	v_mac_f32_e32 v4, v14, v5                                 ; 3E080B0E
>	v_mov_b32_e32 v5, 0x3de147ae                              ; 7E0A02FF 3DE147AE
>	v_mac_f32_e32 v4, v5, v6                                  ; 3E080D05
>	s_waitcnt vmcnt(1)                                        ; BF8C0F71
>	v_mul_f32_e32 v6, v3, v7                                  ; 100C0F03
>	image_sample v[0:2], v[0:1], s[12:19], s[0:3] dmask:0x7   ; F0800700 00030000
>	v_mac_f32_e32 v6, v14, v8                                 ; 3E0C110E
>	s_waitcnt vmcnt(1)                                        ; BF8C0F71
>	v_mul_f32_e32 v7, v3, v10                                 ; 100E1503
>	v_mac_f32_e32 v6, v5, v9                                  ; 3E0C1305
>	v_mac_f32_e32 v7, v14, v11                                ; 3E0E170E
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v0, v3, v0                                  ; 10000103
>	v_add_f32_e32 v4, 1.0, v4                                 ; 060808F2
>	v_add_f32_e32 v6, 1.0, v6                                 ; 060C0CF2
>	v_mac_f32_e32 v7, v5, v12                                 ; 3E0E1905
>	v_mac_f32_e32 v0, v14, v1                                 ; 3E00030E
>	v_mac_f32_e32 v0, v5, v2                                  ; 3E000505
>	v_add_f32_e32 v7, 1.0, v7                                 ; 060E0EF2
>	v_rcp_f32_e32 v4, v4                                      ; 7E085504
>	v_rcp_f32_e32 v6, v6                                      ; 7E0C5506
>	v_add_f32_e32 v0, 1.0, v0                                 ; 060000F2
>	v_rcp_f32_e32 v7, v7                                      ; 7E0E5507
>	v_rcp_f32_e32 v0, v0                                      ; 7E005500
>	v_add_f32_e32 v1, v6, v4                                  ; 06020906
>	v_mov_b32_e32 v2, 0xff800000                              ; 7E0402FF FF800000
>	v_add_f32_e32 v1, v7, v1                                  ; 06020307
>	v_add_f32_e32 v0, v0, v1                                  ; 06000300
>	v_mul_f32_e32 v0, 0x3e800000, v0                          ; 100000FF 3E800000
>	v_sqrt_f32_e32 v1, v0                                     ; 7E026700
>	v_cmp_eq_f32_e32 vcc, v2, v0                              ; 7C040102
>	v_and_b32_e32 v1, 0x7fffffff, v1                          ; 360202FF 7FFFFFFF
>	v_mov_b32_e32 v0, 0x7f800000                              ; 7E0002FF 7F800000
>	v_cndmask_b32_e32 v0, v1, v0, vcc                         ; 00000101
>	v_mov_b32_e32 v1, v0                                      ; 7E020300
>	v_mov_b32_e32 v2, v0                                      ; 7E040300
>	v_mov_b32_e32 v3, v0                                      ; 7E060300
>Shader epilog disassembly:
>	exp 1, 0, 0, 1, 1, v0, v0, v0, v0 ; F8001801 00000000
>	s_endpgm                          ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 328 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL CONST[0..2]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>  0: RCP TEMP[0].x, CONST[0].zzzz
>  1: RCP TEMP[0].y, CONST[0].wwww
>  2: MUL TEMP[0].xy, IN[0].xyyy, TEMP[0].xyyy
>  3: MAD TEMP[0].xy, TEMP[0].xyyy, IMM[0].xxxx, IMM[0].yyyy
>  4: MOV TEMP[1].zw, IMM[0].wwzw
>  5: MOV TEMP[1].x, TEMP[0].xyxx
>  6: MOV TEMP[1].xzw, TEMP[1].xxzw
>  7: MUL TEMP[0].x, TEMP[0].yyyy, CONST[1].zzzz
>  8: MOV TEMP[1].y, TEMP[0].xxxx
>  9: ADD TEMP[0].xy, IN[1].xyyy, -CONST[2].xyyy
> 10: MUL TEMP[0].xy, TEMP[0].xyyy, CONST[2].zwww
> 11: MAD TEMP[2].xy, IMM[0].wyyy, CONST[2].xyyy, IN[1].xyyy
> 12: MUL TEMP[2].xy, TEMP[2].xyyy, CONST[2].zwww
> 13: MOV TEMP[0].zw, TEMP[2].yyxy
> 14: MAD TEMP[2].xy, IMM[0].ywww, CONST[2].xyyy, IN[1].xyyy
> 15: MUL TEMP[2].xy, TEMP[2].xyyy, CONST[2].zwww
> 16: ADD TEMP[3].xy, IN[1].xyyy, CONST[2].xyyy
> 17: MUL TEMP[3].xy, TEMP[3].xyyy, CONST[2].zwww
> 18: MOV TEMP[2].zw, TEMP[3].yyxy
> 19: MOV OUT[1], TEMP[0]
> 20: MOV OUT[0], TEMP[1]
> 21: MOV OUT[2], TEMP[2]
> 22: END
>radeonsi: Compiling shader 63
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 8)
>  %29 = fdiv float 1.000000e+00, %28, !fpmath !1
>  %30 = call float @llvm.SI.load.const(<16 x i8> %27, i32 12)
>  %31 = fdiv float 1.000000e+00, %30, !fpmath !1
>  %32 = fmul float %19, %29
>  %33 = fmul float %20, %31
>  %34 = fmul float %32, 2.000000e+00
>  %35 = fadd float %34, -1.000000e+00
>  %36 = fmul float %33, 2.000000e+00
>  %37 = fadd float %36, -1.000000e+00
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call float @llvm.SI.load.const(<16 x i8> %39, i32 24)
>  %41 = fmul float %37, %40
>  %42 = call float @llvm.SI.load.const(<16 x i8> %39, i32 32)
>  %43 = fsub float %24, %42
>  %44 = call float @llvm.SI.load.const(<16 x i8> %39, i32 36)
>  %45 = fsub float %25, %44
>  %46 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %47 = load <16 x i8>, <16 x i8> addrspace(2)* %46, align 16, !invariant.load !0
>  %48 = call float @llvm.SI.load.const(<16 x i8> %47, i32 40)
>  %49 = fmul float %43, %48
>  %50 = call float @llvm.SI.load.const(<16 x i8> %47, i32 44)
>  %51 = fmul float %45, %50
>  %52 = call float @llvm.SI.load.const(<16 x i8> %47, i32 32)
>  %53 = fadd float %52, %24
>  %54 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %55 = load <16 x i8>, <16 x i8> addrspace(2)* %54, align 16, !invariant.load !0
>  %56 = call float @llvm.SI.load.const(<16 x i8> %55, i32 36)
>  %57 = fsub float %25, %56
>  %58 = call float @llvm.SI.load.const(<16 x i8> %55, i32 40)
>  %59 = fmul float %53, %58
>  %60 = call float @llvm.SI.load.const(<16 x i8> %55, i32 44)
>  %61 = fmul float %57, %60
>  %62 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %63 = load <16 x i8>, <16 x i8> addrspace(2)* %62, align 16, !invariant.load !0
>  %64 = call float @llvm.SI.load.const(<16 x i8> %63, i32 32)
>  %65 = fsub float %24, %64
>  %66 = call float @llvm.SI.load.const(<16 x i8> %63, i32 36)
>  %67 = fadd float %66, %25
>  %68 = call float @llvm.SI.load.const(<16 x i8> %63, i32 40)
>  %69 = fmul float %65, %68
>  %70 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %71 = load <16 x i8>, <16 x i8> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = call float @llvm.SI.load.const(<16 x i8> %71, i32 44)
>  %73 = fmul float %67, %72
>  %74 = call float @llvm.SI.load.const(<16 x i8> %71, i32 32)
>  %75 = fadd float %24, %74
>  %76 = call float @llvm.SI.load.const(<16 x i8> %71, i32 36)
>  %77 = fadd float %25, %76
>  %78 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %79 = load <16 x i8>, <16 x i8> addrspace(2)* %78, align 16, !invariant.load !0
>  %80 = call float @llvm.SI.load.const(<16 x i8> %79, i32 40)
>  %81 = fmul float %75, %80
>  %82 = call float @llvm.SI.load.const(<16 x i8> %79, i32 44)
>  %83 = fmul float %77, %82
>  %84 = bitcast i32 %12 to float
>  %85 = insertvalue <{ float, float, float }> undef, float %84, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %49, float %51, float %59, float %61)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %69, float %73, float %81, float %83)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %35, float %41, float 0.000000e+00, float 1.000000e+00)
>  ret <{ float, float, float }> %85
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {    0.2500,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].x, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].zwww
>  3: TEX TEMP[1].x, TEMP[1], SAMP[0], 2D
>  4: ADD TEMP[0].x, TEMP[0].xxxx, TEMP[1].xxxx
>  5: MOV TEMP[1].xy, IN[1].xyyy
>  6: TEX TEMP[1].x, TEMP[1], SAMP[0], 2D
>  7: ADD TEMP[1].x, TEMP[0].xxxx, TEMP[1].xxxx
>  8: MOV TEMP[2].xy, IN[1].zwww
>  9: TEX TEMP[2].x, TEMP[2], SAMP[0], 2D
> 10: ADD TEMP[0].x, TEMP[1].xxxx, TEMP[2].xxxx
> 11: MUL TEMP[0].x, TEMP[0].xxxx, IMM[0].xxxx
> 12: MOV OUT[0], TEMP[0].xxxx
> 13: END
>radeonsi: Compiling shader 64
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %42 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <8 x i32>, <8 x i32> addrspace(2)* %42, align 32, !invariant.load !0
>  %44 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %45 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %44, i64 0, i64 3, !amdgpu.uniform !0
>  %46 = load <4 x i32>, <4 x i32> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = extractelement <8 x i32> %43, i32 7
>  %48 = extractelement <4 x i32> %46, i32 0
>  %49 = and i32 %48, %47
>  %50 = insertelement <4 x i32> %46, i32 %49, i32 0
>  %51 = bitcast float %40 to i32
>  %52 = bitcast float %41 to i32
>  %53 = insertelement <2 x i32> undef, i32 %51, i32 0
>  %54 = insertelement <2 x i32> %53, i32 %52, i32 1
>  %55 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %54, <8 x i32> %43, <4 x i32> %50, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %56 = extractelement <4 x float> %55, i32 0
>  %57 = fadd float %39, %56
>  %58 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %59 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %60 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %61 = load <8 x i32>, <8 x i32> addrspace(2)* %60, align 32, !invariant.load !0
>  %62 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %63 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %62, i64 0, i64 3, !amdgpu.uniform !0
>  %64 = load <4 x i32>, <4 x i32> addrspace(2)* %63, align 16, !invariant.load !0
>  %65 = extractelement <8 x i32> %61, i32 7
>  %66 = extractelement <4 x i32> %64, i32 0
>  %67 = and i32 %66, %65
>  %68 = insertelement <4 x i32> %64, i32 %67, i32 0
>  %69 = bitcast float %58 to i32
>  %70 = bitcast float %59 to i32
>  %71 = insertelement <2 x i32> undef, i32 %69, i32 0
>  %72 = insertelement <2 x i32> %71, i32 %70, i32 1
>  %73 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %72, <8 x i32> %61, <4 x i32> %68, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %74 = extractelement <4 x float> %73, i32 0
>  %75 = fadd float %57, %74
>  %76 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %77 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %78 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %79 = load <8 x i32>, <8 x i32> addrspace(2)* %78, align 32, !invariant.load !0
>  %80 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %81 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %80, i64 0, i64 3, !amdgpu.uniform !0
>  %82 = load <4 x i32>, <4 x i32> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = extractelement <8 x i32> %79, i32 7
>  %84 = extractelement <4 x i32> %82, i32 0
>  %85 = and i32 %84, %83
>  %86 = insertelement <4 x i32> %82, i32 %85, i32 0
>  %87 = bitcast float %76 to i32
>  %88 = bitcast float %77 to i32
>  %89 = insertelement <2 x i32> undef, i32 %87, i32 0
>  %90 = insertelement <2 x i32> %89, i32 %88, i32 1
>  %91 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %90, <8 x i32> %79, <4 x i32> %86, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %92 = extractelement <4 x float> %91, i32 0
>  %93 = fadd float %75, %92
>  %94 = fmul float %93, 2.500000e-01
>  %95 = bitcast float %5 to i32
>  %96 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %95, 10
>  %97 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %96, float %94, 11
>  %98 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %97, float %94, 12
>  %99 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %98, float %94, 13
>  %100 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %99, float %94, 14
>  %101 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %100, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %101
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v1, 1.0                                 ; 7E0202F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v0, s4                                  ; 7E005404
>	v_rcp_f32_e32 v3, s5                                  ; 7E065405
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s0, s[0:3], 0xb                   ; C200010B
>	v_mul_f32_e32 v0, v0, v6                              ; 10000D00
>	v_mul_f32_e32 v4, v3, v7                              ; 10080F03
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v5, s7, v8                           ; 0A0A1007
>	v_subrev_f32_e32 v6, s8, v9                           ; 0A0C1208
>	v_add_f32_e32 v8, s7, v8                              ; 06101007
>	v_mac_f32_e32 v4, v3, v7                              ; 3E080F03
>	v_add_f32_e32 v9, s8, v9                              ; 06121208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v3, s4, v5                              ; 10060A04
>	v_mul_f32_e32 v5, s0, v6                              ; 100A0C00
>	v_mul_f32_e32 v6, s4, v8                              ; 100C1004
>	v_mul_f32_e32 v7, s0, v9                              ; 100E1200
>	exp 15, 32, 0, 0, 0, v3, v5, v6, v5                   ; F800020F 05060503
>	exp 15, 33, 0, 0, 0, v3, v7, v6, v7                   ; F800021F 07060703
>	v_mad_f32 v0, 2.0, v0, -1.0                           ; D2820000 03CE00F4
>	v_mad_f32 v4, v4, s6, -s6                             ; D2820004 80180D04
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mov_b32_e32 v3, 0                                   ; 7E060280
>	exp 15, 12, 0, 1, 0, v0, v4, v3, v1                   ; F80008CF 01030400
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 196 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x1
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                              ; BE86047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                  ; C080050C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                  ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]            ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                  ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]            ; C8050103
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_and_b32 s0, s0, s19                               ; 87001300
>	image_sample v4, v[0:1], s[12:19], s[0:3] dmask:0x1 ; F0800100 00030400
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                  ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]            ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                  ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]            ; C8050303
>	image_sample v0, v[0:1], s[12:19], s[0:3] dmask:0x1 ; F0800100 00030000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_add_f32_e32 v4, v0, v4                            ; 06080900
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                  ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]            ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                  ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]            ; C8050503
>	image_sample v0, v[0:1], s[12:19], s[0:3] dmask:0x1 ; F0800100 00030000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_add_f32_e32 v4, v0, v4                            ; 06080900
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                  ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]            ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                  ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]            ; C8050703
>	s_and_b64 exec, exec, s[6:7]                        ; 87FE067E
>	image_sample v0, v[0:1], s[12:19], s[0:3] dmask:0x1 ; F0800100 00030000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_add_f32_e32 v0, v0, v4                            ; 06000900
>	v_mul_f32_e32 v0, 0x3e800000, v0                    ; 100000FF 3E800000
>	v_mov_b32_e32 v1, v0                                ; 7E020300
>	v_mov_b32_e32 v2, v0                                ; 7E040300
>	v_mov_b32_e32 v3, v0                                ; 7E060300
>Shader epilog disassembly:
>	exp 1, 0, 0, 1, 1, v0, v0, v0, v0 ; F8001801 00000000
>	s_endpgm                          ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL CONST[1]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    0.2500,    -1.0000,     0.0000, 100000.0000}
>IMM[1] UINT32 {4294967295, 0, 0, 0}
>IMM[2] FLT32 {    0.1000,   100.0000,     1.0000,     2.0000}
>IMM[3] FLT32 {    0.0000,    10.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].zwww
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: ADD TEMP[0], TEMP[0], TEMP[1]
>  5: MOV TEMP[1].xy, IN[1].xyyy
>  6: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  7: ADD TEMP[1], TEMP[0], TEMP[1]
>  8: MOV TEMP[2].xy, IN[1].zwww
>  9: TEX TEMP[2], TEMP[2], SAMP[0], 2D
> 10: ADD TEMP[0], TEMP[1], TEMP[2]
> 11: MUL TEMP[0].x, TEMP[0], IMM[0].xxxx
> 12: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
> 13: RCP TEMP[0].x, TEMP[0].xxxx
> 14: ADD TEMP[0].x, TEMP[0].xxxx, IMM[0].yyyy
> 15: FSNE TEMP[2].x, TEMP[0].xxxx, TEMP[0].xxxx
> 16: UCMP TEMP[1].x, TEMP[2].xxxx, IMM[1].yyyy, IMM[1].xxxx
> 17: FSLT TEMP[2].x, TEMP[0].xxxx, IMM[0].zzzz
> 18: FSLT TEMP[3].x, IMM[0].wwww, TEMP[0].xxxx
> 19: OR TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 20: UCMP TEMP[1].x, TEMP[2].xxxx, IMM[1].yyyy, TEMP[1].xxxx
> 21: MIN TEMP[2].x, TEMP[0].xxxx, IMM[2].yyyy
> 22: UCMP TEMP[0].x, TEMP[1].xxxx, TEMP[2].xxxx, IMM[2].xxxx
> 23: MUL TEMP[1].x, CONST[1].xxxx, IMM[2].wwww
> 24: ADD TEMP[0].x, TEMP[0].xxxx, IMM[3].xxxx
> 25: RCP TEMP[0].x, TEMP[0].xxxx
> 26: MUL TEMP[0].x, TEMP[1].xxxx, TEMP[0].xxxx
> 27: MIN TEMP[0].x, TEMP[0].xxxx, IMM[3].yyyy
> 28: ADD TEMP[0].x, IMM[2].zzzz, -TEMP[0].xxxx
> 29: MOV OUT[0], TEMP[0].xxxx
> 30: END
>radeonsi: Compiling shader 65
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %42 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <8 x i32>, <8 x i32> addrspace(2)* %42, align 32, !invariant.load !0
>  %44 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %45 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %44, i64 0, i64 3, !amdgpu.uniform !0
>  %46 = load <4 x i32>, <4 x i32> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = extractelement <8 x i32> %43, i32 7
>  %48 = extractelement <4 x i32> %46, i32 0
>  %49 = and i32 %48, %47
>  %50 = insertelement <4 x i32> %46, i32 %49, i32 0
>  %51 = bitcast float %40 to i32
>  %52 = bitcast float %41 to i32
>  %53 = insertelement <2 x i32> undef, i32 %51, i32 0
>  %54 = insertelement <2 x i32> %53, i32 %52, i32 1
>  %55 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %54, <8 x i32> %43, <4 x i32> %50, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %56 = extractelement <4 x float> %55, i32 0
>  %57 = fadd float %39, %56
>  %58 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %59 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %60 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %61 = load <8 x i32>, <8 x i32> addrspace(2)* %60, align 32, !invariant.load !0
>  %62 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %63 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %62, i64 0, i64 3, !amdgpu.uniform !0
>  %64 = load <4 x i32>, <4 x i32> addrspace(2)* %63, align 16, !invariant.load !0
>  %65 = extractelement <8 x i32> %61, i32 7
>  %66 = extractelement <4 x i32> %64, i32 0
>  %67 = and i32 %66, %65
>  %68 = insertelement <4 x i32> %64, i32 %67, i32 0
>  %69 = bitcast float %58 to i32
>  %70 = bitcast float %59 to i32
>  %71 = insertelement <2 x i32> undef, i32 %69, i32 0
>  %72 = insertelement <2 x i32> %71, i32 %70, i32 1
>  %73 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %72, <8 x i32> %61, <4 x i32> %68, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %74 = extractelement <4 x float> %73, i32 0
>  %75 = fadd float %57, %74
>  %76 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %77 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %78 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %79 = load <8 x i32>, <8 x i32> addrspace(2)* %78, align 32, !invariant.load !0
>  %80 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %81 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %80, i64 0, i64 3, !amdgpu.uniform !0
>  %82 = load <4 x i32>, <4 x i32> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = extractelement <8 x i32> %79, i32 7
>  %84 = extractelement <4 x i32> %82, i32 0
>  %85 = and i32 %84, %83
>  %86 = insertelement <4 x i32> %82, i32 %85, i32 0
>  %87 = bitcast float %76 to i32
>  %88 = bitcast float %77 to i32
>  %89 = insertelement <2 x i32> undef, i32 %87, i32 0
>  %90 = insertelement <2 x i32> %89, i32 %88, i32 1
>  %91 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %90, <8 x i32> %79, <4 x i32> %86, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %92 = extractelement <4 x float> %91, i32 0
>  %93 = fadd float %75, %92
>  %94 = fmul float %93, 2.500000e-01
>  %95 = fmul float %94, %94
>  %96 = fdiv float 1.000000e+00, %95, !fpmath !1
>  %97 = fadd float %96, -1.000000e+00
>  %98 = fcmp uno float %97, 0.000000e+00
>  %99 = fcmp olt float %97, 0.000000e+00
>  %100 = fcmp ogt float %97, 1.000000e+05
>  %101 = or i1 %99, %100
>  %102 = or i1 %101, %98
>  %103 = call float @llvm.minnum.f32(float %97, float 1.000000e+02)
>  %104 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %105 = load <16 x i8>, <16 x i8> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = call float @llvm.SI.load.const(<16 x i8> %105, i32 16)
>  %107 = fmul float %106, 2.000000e+00
>  %.op = fadd float %103, 0x3E45798EE0000000
>  %.op.op = fdiv float 1.000000e+00, %.op
>  %108 = select i1 %102, float 0x4023FFFFE0000000, float %.op.op
>  %109 = fmul float %107, %108
>  %110 = call float @llvm.minnum.f32(float %109, float 1.000000e+01)
>  %111 = fsub float 1.000000e+00, %110
>  %112 = bitcast float %5 to i32
>  %113 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %112, 10
>  %114 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %113, float %111, 11
>  %115 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %114, float %111, 12
>  %116 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %115, float %111, 13
>  %117 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %116, float %111, 14
>  %118 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %117, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %118
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.minnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v1, 1.0                                 ; 7E0202F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v0, s4                                  ; 7E005404
>	v_rcp_f32_e32 v3, s5                                  ; 7E065405
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s0, s[0:3], 0xb                   ; C200010B
>	v_mul_f32_e32 v0, v0, v6                              ; 10000D00
>	v_mul_f32_e32 v4, v3, v7                              ; 10080F03
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v5, s7, v8                           ; 0A0A1007
>	v_subrev_f32_e32 v6, s8, v9                           ; 0A0C1208
>	v_add_f32_e32 v8, s7, v8                              ; 06101007
>	v_mac_f32_e32 v4, v3, v7                              ; 3E080F03
>	v_add_f32_e32 v9, s8, v9                              ; 06121208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v3, s4, v5                              ; 10060A04
>	v_mul_f32_e32 v5, s0, v6                              ; 100A0C00
>	v_mul_f32_e32 v6, s4, v8                              ; 100C1004
>	v_mul_f32_e32 v7, s0, v9                              ; 100E1200
>	exp 15, 32, 0, 0, 0, v3, v5, v6, v5                   ; F800020F 05060503
>	exp 15, 33, 0, 0, 0, v3, v7, v6, v7                   ; F800021F 07060703
>	v_mad_f32 v0, 2.0, v0, -1.0                           ; D2820000 03CE00F4
>	v_mad_f32 v4, v4, s6, -s6                             ; D2820004 80180D04
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mov_b32_e32 v3, 0                                   ; 7E060280
>	exp 15, 12, 0, 1, 0, v0, v4, v3, v1                   ; F80008CF 01030400
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 196 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x1
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                              ; BE80047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                  ; C082050C
>	s_mov_b32 m0, s11                                   ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                  ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]            ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                  ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]            ; C8050103
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_and_b32 s4, s4, s19                               ; 87041304
>	image_sample v4, v[0:1], s[12:19], s[4:7] dmask:0x1 ; F0800100 00230400
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                  ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]            ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                  ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]            ; C8050303
>	image_sample v0, v[0:1], s[12:19], s[4:7] dmask:0x1 ; F0800100 00230000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_add_f32_e32 v4, v0, v4                            ; 06080900
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                  ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]            ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                  ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]            ; C8050503
>	image_sample v0, v[0:1], s[12:19], s[4:7] dmask:0x1 ; F0800100 00230000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_add_f32_e32 v4, v0, v4                            ; 06080900
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                  ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]            ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                  ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]            ; C8050703
>	s_and_b64 exec, exec, s[0:1]                        ; 87FE007E
>	image_sample v0, v[0:1], s[12:19], s[4:7] dmask:0x1 ; F0800100 00230000
>	s_waitcnt vmcnt(0)                                  ; BF8C0F70
>	v_add_f32_e32 v0, v0, v4                            ; 06000900
>	v_mul_f32_e32 v0, 0x3e800000, v0                    ; 100000FF 3E800000
>	v_mul_f32_e32 v0, v0, v0                            ; 10000100
>	v_rcp_f32_e32 v0, v0                                ; 7E005500
>	s_load_dwordx4 s[12:15], s[2:3], 0x0                ; C0860300
>	v_mov_b32_e32 v1, 0x47c35000                        ; 7E0202FF 47C35000
>	v_mov_b32_e32 v2, 0x411fffff                        ; 7E0402FF 411FFFFF
>	v_add_f32_e32 v0, -1.0, v0                          ; 060000F3
>	v_cmp_u_f32_e32 vcc, v0, v0                         ; 7C100100
>	v_cmp_gt_f32_e64 s[0:1], 0, v0                      ; D0080000 00020080
>	v_cmp_lt_f32_e64 s[4:5], v1, v0                     ; D0020004 00020101
>	v_min_f32_e32 v0, 0x42c80000, v0                    ; 1E0000FF 42C80000
>	v_add_f32_e32 v0, 0x322bcc77, v0                    ; 060000FF 322BCC77
>	v_rcp_f32_e32 v0, v0                                ; 7E005500
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_buffer_load_dword s2, s[12:15], 0x4               ; C2010D04
>	v_cndmask_b32_e32 v0, v0, v2, vcc                   ; 00000500
>	v_cndmask_b32_e64 v0, v0, v2, s[4:5]                ; D2000000 00120500
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_add_f32_e64 v1, s2, s2                            ; D2060001 00000402
>	v_cndmask_b32_e64 v0, v0, v2, s[0:1]                ; D2000000 00020500
>	v_mul_f32_e32 v0, v0, v1                            ; 10000300
>	v_min_f32_e32 v0, 0x41200000, v0                    ; 1E0000FF 41200000
>	v_sub_f32_e32 v0, 1.0, v0                           ; 080000F2
>	v_mov_b32_e32 v1, v0                                ; 7E020300
>	v_mov_b32_e32 v2, v0                                ; 7E040300
>	v_mov_b32_e32 v3, v0                                ; 7E060300
>Shader epilog disassembly:
>	exp 1, 0, 0, 1, 1, v0, v0, v0, v0 ; F8001801 00000000
>	s_endpgm                          ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 312 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {    0.2500,     1.0000,     0.5000,     0.0001}
>IMM[1] FLT32 {    0.3000,     0.5900,     0.1100,    -0.1500}
>IMM[2] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].zwww
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: ADD TEMP[0], TEMP[0], TEMP[1]
>  5: MOV TEMP[1].xy, IN[1].xyyy
>  6: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  7: ADD TEMP[1], TEMP[0], TEMP[1]
>  8: MOV TEMP[2].xy, IN[1].zwww
>  9: TEX TEMP[2], TEMP[2], SAMP[0], 2D
> 10: ADD TEMP[0], TEMP[1], TEMP[2]
> 11: MUL TEMP[1], TEMP[0], IMM[0].xxxx
> 12: MOV TEMP[2].xy, IMM[0].zzzz
> 13: TEX TEMP[2].x, TEMP[2], SAMP[1], 2D
> 14: ADD TEMP[2].x, IMM[0].yyyy, -TEMP[2].xxxx
> 15: MUL TEMP[1], TEMP[1], TEMP[2].xxxx
> 16: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[1].xyzz
> 17: ADD TEMP[2].x, TEMP[2].xxxx, IMM[0].wwww
> 18: POW TEMP[2].x, TEMP[2].xxxx, IMM[1].wwww
> 19: MUL TEMP[1], TEMP[1], TEMP[2].xxxx
> 20: MUL TEMP[1], TEMP[1], IMM[0].zzzz
> 21: FSNE TEMP[2].x, TEMP[1].xxxx, TEMP[1].xxxx
> 22: UCMP TEMP[0], TEMP[2].xxxx, IMM[2].xxxx, TEMP[1]
> 23: MOV OUT[0], TEMP[0]
> 24: END
>radeonsi: Compiling shader 66
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %44 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %45 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <8 x i32>, <8 x i32> addrspace(2)* %45, align 32, !invariant.load !0
>  %47 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %48 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %47, i64 0, i64 3, !amdgpu.uniform !0
>  %49 = load <4 x i32>, <4 x i32> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = extractelement <8 x i32> %46, i32 7
>  %51 = extractelement <4 x i32> %49, i32 0
>  %52 = and i32 %51, %50
>  %53 = insertelement <4 x i32> %49, i32 %52, i32 0
>  %54 = bitcast float %43 to i32
>  %55 = bitcast float %44 to i32
>  %56 = insertelement <2 x i32> undef, i32 %54, i32 0
>  %57 = insertelement <2 x i32> %56, i32 %55, i32 1
>  %58 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %57, <8 x i32> %46, <4 x i32> %53, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %59 = extractelement <4 x float> %58, i32 0
>  %60 = extractelement <4 x float> %58, i32 1
>  %61 = extractelement <4 x float> %58, i32 2
>  %62 = extractelement <4 x float> %58, i32 3
>  %63 = fadd float %39, %59
>  %64 = fadd float %40, %60
>  %65 = fadd float %41, %61
>  %66 = fadd float %42, %62
>  %67 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %68 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %69 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %70 = load <8 x i32>, <8 x i32> addrspace(2)* %69, align 32, !invariant.load !0
>  %71 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %72 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %71, i64 0, i64 3, !amdgpu.uniform !0
>  %73 = load <4 x i32>, <4 x i32> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = extractelement <8 x i32> %70, i32 7
>  %75 = extractelement <4 x i32> %73, i32 0
>  %76 = and i32 %75, %74
>  %77 = insertelement <4 x i32> %73, i32 %76, i32 0
>  %78 = bitcast float %67 to i32
>  %79 = bitcast float %68 to i32
>  %80 = insertelement <2 x i32> undef, i32 %78, i32 0
>  %81 = insertelement <2 x i32> %80, i32 %79, i32 1
>  %82 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %81, <8 x i32> %70, <4 x i32> %77, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %83 = extractelement <4 x float> %82, i32 0
>  %84 = extractelement <4 x float> %82, i32 1
>  %85 = extractelement <4 x float> %82, i32 2
>  %86 = extractelement <4 x float> %82, i32 3
>  %87 = fadd float %63, %83
>  %88 = fadd float %64, %84
>  %89 = fadd float %65, %85
>  %90 = fadd float %66, %86
>  %91 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %92 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %93 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %94 = load <8 x i32>, <8 x i32> addrspace(2)* %93, align 32, !invariant.load !0
>  %95 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %96 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %95, i64 0, i64 3, !amdgpu.uniform !0
>  %97 = load <4 x i32>, <4 x i32> addrspace(2)* %96, align 16, !invariant.load !0
>  %98 = extractelement <8 x i32> %94, i32 7
>  %99 = extractelement <4 x i32> %97, i32 0
>  %100 = and i32 %99, %98
>  %101 = insertelement <4 x i32> %97, i32 %100, i32 0
>  %102 = bitcast float %91 to i32
>  %103 = bitcast float %92 to i32
>  %104 = insertelement <2 x i32> undef, i32 %102, i32 0
>  %105 = insertelement <2 x i32> %104, i32 %103, i32 1
>  %106 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %105, <8 x i32> %94, <4 x i32> %101, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = extractelement <4 x float> %106, i32 2
>  %110 = extractelement <4 x float> %106, i32 3
>  %111 = fadd float %87, %107
>  %112 = fadd float %88, %108
>  %113 = fadd float %89, %109
>  %114 = fadd float %90, %110
>  %115 = fmul float %111, 2.500000e-01
>  %116 = fmul float %112, 2.500000e-01
>  %117 = fmul float %113, 2.500000e-01
>  %118 = fmul float %114, 2.500000e-01
>  %119 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %120 = load <8 x i32>, <8 x i32> addrspace(2)* %119, align 32, !invariant.load !0
>  %121 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %122 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %121, i64 0, i64 7, !amdgpu.uniform !0
>  %123 = load <4 x i32>, <4 x i32> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = extractelement <8 x i32> %120, i32 7
>  %125 = extractelement <4 x i32> %123, i32 0
>  %126 = and i32 %125, %124
>  %127 = insertelement <4 x i32> %123, i32 %126, i32 0
>  %128 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> <i32 1056964608, i32 1056964608>, <8 x i32> %120, <4 x i32> %127, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %129 = extractelement <4 x float> %128, i32 0
>  %130 = fsub float 1.000000e+00, %129
>  %131 = fmul float %115, %130
>  %132 = fmul float %116, %130
>  %133 = fmul float %117, %130
>  %134 = fmul float %118, %130
>  %135 = fmul float %131, 0x3FD3333340000000
>  %136 = fmul float %132, 0x3FE2E147A0000000
>  %137 = fadd float %136, %135
>  %138 = fmul float %133, 0x3FBC28F5C0000000
>  %139 = fadd float %137, %138
>  %140 = fadd float %139, 0x3F1A36E2E0000000
>  %141 = call float @llvm.pow.f32(float %140, float 0xBFC3333340000000)
>  %142 = fmul float %131, %141
>  %143 = fmul float %132, %141
>  %144 = fmul float %133, %141
>  %145 = fmul float %134, %141
>  %146 = fmul float %142, 5.000000e-01
>  %147 = fmul float %143, 5.000000e-01
>  %148 = fmul float %144, 5.000000e-01
>  %149 = fmul float %145, 5.000000e-01
>  %150 = fcmp uno float %146, 0.000000e+00
>  %151 = select i1 %150, float 0.000000e+00, float %146
>  %152 = select i1 %150, float 0.000000e+00, float %147
>  %153 = select i1 %150, float 0.000000e+00, float %148
>  %154 = select i1 %150, float 0.000000e+00, float %149
>  %155 = bitcast float %5 to i32
>  %156 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %155, 10
>  %157 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %156, float %151, 11
>  %158 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %157, float %152, 12
>  %159 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %158, float %153, 13
>  %160 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %159, float %154, 14
>  %161 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %160, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %161
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v0, 1.0                                 ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s13, s[0:3], 0xe                  ; C206810E
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s9, s[0:3], 0xa                   ; C204810A
>	s_buffer_load_dword s10, s[0:3], 0xb                  ; C205010B
>	s_buffer_load_dword s11, s[0:3], 0xc                  ; C205810C
>	s_buffer_load_dword s12, s[0:3], 0xd                  ; C206010D
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v4, s4                                  ; 7E085404
>	v_rcp_f32_e32 v5, s5                                  ; 7E0A5405
>	v_mov_b32_e32 v1, s13                                 ; 7E02020D
>	v_mov_b32_e32 v3, s0                                  ; 7E060200
>	v_mac_f32_e32 v1, s11, v6                             ; 3E020C0B
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v6, s7, v8                           ; 0A0C1007
>	v_add_f32_e32 v8, s7, v8                              ; 06101007
>	v_mac_f32_e32 v3, s12, v7                             ; 3E060E0C
>	v_subrev_f32_e32 v7, s8, v9                           ; 0A0E1208
>	v_mul_f32_e32 v1, v4, v1                              ; 10020304
>	v_add_f32_e32 v9, s8, v9                              ; 06121208
>	v_mul_f32_e32 v4, v5, v3                              ; 10080705
>	v_mul_f32_e32 v6, s9, v6                              ; 100C0C09
>	v_mul_f32_e32 v7, s10, v7                             ; 100E0E0A
>	v_mul_f32_e32 v8, s9, v8                              ; 10101009
>	v_mac_f32_e32 v4, v5, v3                              ; 3E080705
>	v_mul_f32_e32 v9, s10, v9                             ; 1012120A
>	exp 15, 32, 0, 0, 0, v6, v7, v8, v7                   ; F800020F 07080706
>	v_mad_f32 v3, v4, s6, -s6                             ; D2820003 80180D04
>	v_mad_f32 v1, 2.0, v1, -1.0                           ; D2820001 03CE02F4
>	exp 15, 33, 0, 0, 0, v6, v9, v8, v9                   ; F800021F 09080906
>	v_mov_b32_e32 v4, 0                                   ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                   ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 220 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                   ; BE88047E
>	s_wqm_b64 exec, exec                                     ; BEFE0A7E
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                     ; C0CA0500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                       ; C080050C
>	s_mov_b32 m0, s11                                        ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                       ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                 ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                       ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                 ; C8050103
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_and_b32 s0, s0, s27                                    ; 87001B00
>	image_sample v[4:7], v[0:1], s[20:27], s[0:3] dmask:0xf  ; F0800F00 00050400
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                       ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]                 ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                       ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]                 ; C8050303
>	image_sample v[8:11], v[0:1], s[20:27], s[0:3] dmask:0xf ; F0800F00 00050800
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                       ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                 ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                       ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                 ; C8050503
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                    ; C0C60510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                      ; C082051C
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_add_f32_e32 v8, v8, v4                                 ; 06100908
>	v_add_f32_e32 v9, v9, v5                                 ; 06120B09
>	v_add_f32_e32 v10, v10, v6                               ; 06140D0A
>	v_add_f32_e32 v11, v11, v7                               ; 06160F0B
>	image_sample v[4:7], v[0:1], s[20:27], s[0:3] dmask:0xf  ; F0800F00 00050400
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                       ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]                 ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                       ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]                 ; C8050703
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_add_f32_e32 v4, v4, v8                                 ; 06081104
>	image_sample v[0:3], v[0:1], s[20:27], s[0:3] dmask:0xf  ; F0800F00 00050000
>	v_add_f32_e32 v5, v5, v9                                 ; 060A1305
>	v_add_f32_e32 v6, v6, v10                                ; 060C1506
>	v_add_f32_e32 v7, v7, v11                                ; 060E1707
>	v_mov_b32_e32 v14, 0.5                                   ; 7E1C02F0
>	v_mov_b32_e32 v12, 0x3e800000                            ; 7E1802FF 3E800000
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_add_f32_e32 v0, v0, v4                                 ; 06000900
>	v_add_f32_e32 v1, v1, v5                                 ; 06020B01
>	v_add_f32_e32 v2, v2, v6                                 ; 06040D02
>	v_add_f32_e32 v3, v3, v7                                 ; 06060F03
>	v_mul_f32_e32 v0, v12, v0                                ; 1000010C
>	v_mul_f32_e32 v1, v12, v1                                ; 1002030C
>	v_mul_f32_e32 v2, v12, v2                                ; 1004050C
>	v_mul_f32_e32 v3, v12, v3                                ; 1006070C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_and_b32 s4, s4, s19                                    ; 87041304
>	v_mov_b32_e32 v15, v14                                   ; 7E1E030E
>	s_and_b64 exec, exec, s[8:9]                             ; 87FE087E
>	image_sample v4, v[14:15], s[12:19], s[4:7] dmask:0x1    ; F0800100 0023040E
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mad_f32 v0, -v4, v0, v0                                ; D2820000 24020104
>	v_mad_f32 v1, -v4, v1, v1                                ; D2820001 24060304
>	v_mad_f32 v2, -v4, v2, v2                                ; D2820002 240A0504
>	v_mad_f32 v3, -v4, v3, v3                                ; D2820003 240E0704
>	v_mul_f32_e32 v4, 0x3e99999a, v0                         ; 100800FF 3E99999A
>	v_mac_f32_e32 v4, 0x3f170a3d, v1                         ; 3E0802FF 3F170A3D
>	v_mac_f32_e32 v4, 0x3de147ae, v2                         ; 3E0804FF 3DE147AE
>	v_add_f32_e32 v4, 0x38d1b717, v4                         ; 060808FF 38D1B717
>	v_log_f32_e32 v4, v4                                     ; 7E084F04
>	v_mul_legacy_f32_e32 v4, 0xbe19999a, v4                  ; 0E0808FF BE19999A
>	v_exp_f32_e32 v4, v4                                     ; 7E084B04
>	v_mul_f32_e32 v0, v4, v0                                 ; 10000104
>	v_mul_f32_e32 v1, v4, v1                                 ; 10020304
>	v_mul_f32_e32 v2, v4, v2                                 ; 10040504
>	v_mul_f32_e32 v3, v4, v3                                 ; 10060704
>	v_mul_f32_e32 v0, 0.5, v0                                ; 100000F0
>	v_cmp_u_f32_e32 vcc, v0, v0                              ; 7C100100
>	v_mul_f32_e32 v1, 0.5, v1                                ; 100202F0
>	v_mul_f32_e32 v2, 0.5, v2                                ; 100404F0
>	v_mul_f32_e32 v3, 0.5, v3                                ; 100606F0
>	v_cndmask_b32_e64 v0, v0, 0, vcc                         ; D2000000 01A90100
>	v_cndmask_b32_e64 v1, v1, 0, vcc                         ; D2000001 01A90101
>	v_cndmask_b32_e64 v2, v2, 0, vcc                         ; D2000002 01A90102
>	v_cndmask_b32_e64 v3, v3, 0, vcc                         ; D2000003 01A90103
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 416 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1].xy, GENERIC[0]
>DCL CONST[0..1]
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>  0: RCP TEMP[0].x, CONST[0].zzzz
>  1: RCP TEMP[0].y, CONST[0].wwww
>  2: MUL TEMP[0].xy, IN[0].xyyy, TEMP[0].xyyy
>  3: MAD TEMP[0].xy, TEMP[0].xyyy, IMM[0].xxxx, IMM[0].yyyy
>  4: MOV TEMP[1].zw, IMM[0].wwzw
>  5: MOV TEMP[1].x, TEMP[0].xyxx
>  6: MOV TEMP[1].xzw, TEMP[1].xxzw
>  7: MUL TEMP[0].x, TEMP[0].yyyy, CONST[1].zzzz
>  8: MOV TEMP[1].y, TEMP[0].xxxx
>  9: MOV OUT[0], TEMP[1]
> 10: MOV OUT[1].xy, IN[1].xyxx
> 11: END
>radeonsi: Compiling shader 67
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 8)
>  %29 = fdiv float 1.000000e+00, %28, !fpmath !1
>  %30 = call float @llvm.SI.load.const(<16 x i8> %27, i32 12)
>  %31 = fdiv float 1.000000e+00, %30, !fpmath !1
>  %32 = fmul float %19, %29
>  %33 = fmul float %20, %31
>  %34 = fmul float %32, 2.000000e+00
>  %35 = fadd float %34, -1.000000e+00
>  %36 = fmul float %33, 2.000000e+00
>  %37 = fadd float %36, -1.000000e+00
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call float @llvm.SI.load.const(<16 x i8> %39, i32 24)
>  %41 = fmul float %37, %40
>  %42 = bitcast i32 %12 to float
>  %43 = insertvalue <{ float, float, float }> undef, float %42, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %24, float %25, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %35, float %41, float 0.000000e+00, float 1.000000e+00)
>  ret <{ float, float, float }> %43
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0].xy, GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL CONST[1..2]
>DCL TEMP[0..1], LOCAL
>  0: ADD TEMP[0].xy, IN[0].xyyy, CONST[1].zwww
>  1: MOV TEMP[0].xy, TEMP[0].xyyy
>  2: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  3: ADD TEMP[1].xy, IN[0].xyyy, CONST[1].xyyy
>  4: MOV TEMP[1].xy, TEMP[1].xyyy
>  5: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  6: MUL TEMP[1], CONST[2].xxxx, TEMP[1]
>  7: MAD TEMP[0], CONST[2].yyyy, TEMP[0], TEMP[1]
>  8: MOV OUT[0], TEMP[0]
>  9: END
>radeonsi: Compiling shader 68
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call float @llvm.SI.load.const(<16 x i8> %25, i32 24)
>  %27 = fadd float %23, %26
>  %28 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %29 = call float @llvm.SI.load.const(<16 x i8> %25, i32 28)
>  %30 = fadd float %28, %29
>  %31 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <8 x i32>, <8 x i32> addrspace(2)* %31, align 32, !invariant.load !0
>  %33 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %34 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %33, i64 0, i64 3, !amdgpu.uniform !0
>  %35 = load <4 x i32>, <4 x i32> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = extractelement <8 x i32> %32, i32 7
>  %37 = extractelement <4 x i32> %35, i32 0
>  %38 = and i32 %37, %36
>  %39 = insertelement <4 x i32> %35, i32 %38, i32 0
>  %40 = bitcast float %27 to i32
>  %41 = bitcast float %30 to i32
>  %42 = insertelement <2 x i32> undef, i32 %40, i32 0
>  %43 = insertelement <2 x i32> %42, i32 %41, i32 1
>  %44 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %43, <8 x i32> %32, <4 x i32> %39, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %45 = extractelement <4 x float> %44, i32 0
>  %46 = extractelement <4 x float> %44, i32 1
>  %47 = extractelement <4 x float> %44, i32 2
>  %48 = extractelement <4 x float> %44, i32 3
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 16)
>  %53 = fadd float %49, %52
>  %54 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %55 = call float @llvm.SI.load.const(<16 x i8> %51, i32 20)
>  %56 = fadd float %54, %55
>  %57 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <8 x i32>, <8 x i32> addrspace(2)* %57, align 32, !invariant.load !0
>  %59 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %60 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %59, i64 0, i64 3, !amdgpu.uniform !0
>  %61 = load <4 x i32>, <4 x i32> addrspace(2)* %60, align 16, !invariant.load !0
>  %62 = extractelement <8 x i32> %58, i32 7
>  %63 = extractelement <4 x i32> %61, i32 0
>  %64 = and i32 %63, %62
>  %65 = insertelement <4 x i32> %61, i32 %64, i32 0
>  %66 = bitcast float %53 to i32
>  %67 = bitcast float %56 to i32
>  %68 = insertelement <2 x i32> undef, i32 %66, i32 0
>  %69 = insertelement <2 x i32> %68, i32 %67, i32 1
>  %70 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %69, <8 x i32> %58, <4 x i32> %65, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %71 = extractelement <4 x float> %70, i32 0
>  %72 = extractelement <4 x float> %70, i32 1
>  %73 = extractelement <4 x float> %70, i32 2
>  %74 = extractelement <4 x float> %70, i32 3
>  %75 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %76 = load <16 x i8>, <16 x i8> addrspace(2)* %75, align 16, !invariant.load !0
>  %77 = call float @llvm.SI.load.const(<16 x i8> %76, i32 32)
>  %78 = fmul float %77, %71
>  %79 = call float @llvm.SI.load.const(<16 x i8> %76, i32 32)
>  %80 = fmul float %79, %72
>  %81 = call float @llvm.SI.load.const(<16 x i8> %76, i32 32)
>  %82 = fmul float %81, %73
>  %83 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %84 = load <16 x i8>, <16 x i8> addrspace(2)* %83, align 16, !invariant.load !0
>  %85 = call float @llvm.SI.load.const(<16 x i8> %84, i32 32)
>  %86 = fmul float %85, %74
>  %87 = call float @llvm.SI.load.const(<16 x i8> %84, i32 36)
>  %88 = fmul float %87, %45
>  %89 = fadd float %88, %78
>  %90 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %91 = load <16 x i8>, <16 x i8> addrspace(2)* %90, align 16, !invariant.load !0
>  %92 = call float @llvm.SI.load.const(<16 x i8> %91, i32 36)
>  %93 = fmul float %92, %46
>  %94 = fadd float %93, %80
>  %95 = call float @llvm.SI.load.const(<16 x i8> %91, i32 36)
>  %96 = fmul float %95, %47
>  %97 = fadd float %96, %82
>  %98 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %99 = load <16 x i8>, <16 x i8> addrspace(2)* %98, align 16, !invariant.load !0
>  %100 = call float @llvm.SI.load.const(<16 x i8> %99, i32 36)
>  %101 = fmul float %100, %48
>  %102 = fadd float %101, %86
>  %103 = bitcast float %5 to i32
>  %104 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %103, 10
>  %105 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %104, float %89, 11
>  %106 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %105, float %94, 12
>  %107 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %106, float %97, 13
>  %108 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %107, float %102, 14
>  %109 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %108, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %109
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v3, 1.0                                 ; 7E0602F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s0, s[0:3], 0x6                   ; C2000106
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v1, s5                                  ; 7E025405
>	v_rcp_f32_e32 v0, s4                                  ; 7E005404
>	v_mul_f32_e32 v4, v1, v7                              ; 10080F01
>	v_mac_f32_e32 v4, v1, v7                              ; 3E080F01
>	v_mul_f32_e32 v0, v0, v6                              ; 10000D00
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	exp 15, 32, 0, 0, 0, v8, v9, v0, v0                   ; F800020F 00000908
>	v_mad_f32 v1, v4, s0, -s0                             ; D2820001 80000104
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mad_f32 v0, 2.0, v0, -1.0                           ; D2820000 03CE00F4
>	v_mov_b32_e32 v4, 0                                   ; 7E080280
>	exp 15, 12, 0, 1, 0, v0, v1, v4, v3                   ; F80008CF 03040100
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 136 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                   ; BE88047E
>	s_wqm_b64 exec, exec                                     ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                       ; C0800300
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                     ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                       ; C082050C
>	s_mov_b32 m0, s11                                        ; BEFC030B
>	v_interp_p1_f32 v4, v2, 0, 0, [m0]                       ; C8100002
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_buffer_load_dword s21, s[0:3], 0x6                     ; C20A8106
>	s_buffer_load_dword s22, s[0:3], 0x7                     ; C20B0107
>	s_buffer_load_dword s11, s[0:3], 0x4                     ; C2058104
>	s_buffer_load_dword s20, s[0:3], 0x5                     ; C20A0105
>	v_interp_p2_f32 v4, [v4], v3, 0, 0, [m0]                 ; C8110003
>	v_interp_p1_f32 v5, v2, 1, 0, [m0]                       ; C8140102
>	v_interp_p2_f32 v5, [v5], v3, 1, 0, [m0]                 ; C8150103
>	s_and_b32 s4, s4, s19                                    ; 87041304
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_add_f32_e32 v2, s21, v4                                ; 06040815
>	v_add_f32_e32 v3, s22, v5                                ; 06060A16
>	v_add_f32_e32 v0, s11, v4                                ; 0600080B
>	v_add_f32_e32 v1, s20, v5                                ; 06020A14
>	image_sample v[4:7], v[2:3], s[12:19], s[4:7] dmask:0xf  ; F0800F00 00230402
>	s_and_b64 exec, exec, s[8:9]                             ; 87FE087E
>	image_sample v[8:11], v[0:1], s[12:19], s[4:7] dmask:0xf ; F0800F00 00230800
>	s_buffer_load_dword s4, s[0:3], 0x8                      ; C2020108
>	s_buffer_load_dword s0, s[0:3], 0x9                      ; C2000109
>	s_waitcnt vmcnt(0) lgkmcnt(0)                            ; BF8C0070
>	v_mul_f32_e32 v0, s4, v8                                 ; 10001004
>	v_mul_f32_e32 v1, s4, v9                                 ; 10021204
>	v_mul_f32_e32 v2, s4, v10                                ; 10041404
>	v_mul_f32_e32 v3, s4, v11                                ; 10061604
>	v_mac_f32_e32 v0, s0, v4                                 ; 3E000800
>	v_mac_f32_e32 v1, s0, v5                                 ; 3E020A00
>	v_mac_f32_e32 v2, s0, v6                                 ; 3E040C00
>	v_mac_f32_e32 v3, s0, v7                                 ; 3E060E00
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 168 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {    0.2500,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].zwww
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: ADD TEMP[0], TEMP[0], TEMP[1]
>  5: MOV TEMP[1].xy, IN[1].xyyy
>  6: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  7: ADD TEMP[1], TEMP[0], TEMP[1]
>  8: MOV TEMP[2].xy, IN[1].zwww
>  9: TEX TEMP[2], TEMP[2], SAMP[0], 2D
> 10: ADD TEMP[0], TEMP[1], TEMP[2]
> 11: MUL TEMP[0], TEMP[0], IMM[0].xxxx
> 12: MOV OUT[0], TEMP[0]
> 13: END
>radeonsi: Compiling shader 69
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %44 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %45 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <8 x i32>, <8 x i32> addrspace(2)* %45, align 32, !invariant.load !0
>  %47 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %48 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %47, i64 0, i64 3, !amdgpu.uniform !0
>  %49 = load <4 x i32>, <4 x i32> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = extractelement <8 x i32> %46, i32 7
>  %51 = extractelement <4 x i32> %49, i32 0
>  %52 = and i32 %51, %50
>  %53 = insertelement <4 x i32> %49, i32 %52, i32 0
>  %54 = bitcast float %43 to i32
>  %55 = bitcast float %44 to i32
>  %56 = insertelement <2 x i32> undef, i32 %54, i32 0
>  %57 = insertelement <2 x i32> %56, i32 %55, i32 1
>  %58 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %57, <8 x i32> %46, <4 x i32> %53, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %59 = extractelement <4 x float> %58, i32 0
>  %60 = extractelement <4 x float> %58, i32 1
>  %61 = extractelement <4 x float> %58, i32 2
>  %62 = extractelement <4 x float> %58, i32 3
>  %63 = fadd float %39, %59
>  %64 = fadd float %40, %60
>  %65 = fadd float %41, %61
>  %66 = fadd float %42, %62
>  %67 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %68 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %69 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %70 = load <8 x i32>, <8 x i32> addrspace(2)* %69, align 32, !invariant.load !0
>  %71 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %72 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %71, i64 0, i64 3, !amdgpu.uniform !0
>  %73 = load <4 x i32>, <4 x i32> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = extractelement <8 x i32> %70, i32 7
>  %75 = extractelement <4 x i32> %73, i32 0
>  %76 = and i32 %75, %74
>  %77 = insertelement <4 x i32> %73, i32 %76, i32 0
>  %78 = bitcast float %67 to i32
>  %79 = bitcast float %68 to i32
>  %80 = insertelement <2 x i32> undef, i32 %78, i32 0
>  %81 = insertelement <2 x i32> %80, i32 %79, i32 1
>  %82 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %81, <8 x i32> %70, <4 x i32> %77, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %83 = extractelement <4 x float> %82, i32 0
>  %84 = extractelement <4 x float> %82, i32 1
>  %85 = extractelement <4 x float> %82, i32 2
>  %86 = extractelement <4 x float> %82, i32 3
>  %87 = fadd float %63, %83
>  %88 = fadd float %64, %84
>  %89 = fadd float %65, %85
>  %90 = fadd float %66, %86
>  %91 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %92 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %93 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %94 = load <8 x i32>, <8 x i32> addrspace(2)* %93, align 32, !invariant.load !0
>  %95 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %96 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %95, i64 0, i64 3, !amdgpu.uniform !0
>  %97 = load <4 x i32>, <4 x i32> addrspace(2)* %96, align 16, !invariant.load !0
>  %98 = extractelement <8 x i32> %94, i32 7
>  %99 = extractelement <4 x i32> %97, i32 0
>  %100 = and i32 %99, %98
>  %101 = insertelement <4 x i32> %97, i32 %100, i32 0
>  %102 = bitcast float %91 to i32
>  %103 = bitcast float %92 to i32
>  %104 = insertelement <2 x i32> undef, i32 %102, i32 0
>  %105 = insertelement <2 x i32> %104, i32 %103, i32 1
>  %106 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %105, <8 x i32> %94, <4 x i32> %101, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %107 = extractelement <4 x float> %106, i32 0
>  %108 = extractelement <4 x float> %106, i32 1
>  %109 = extractelement <4 x float> %106, i32 2
>  %110 = extractelement <4 x float> %106, i32 3
>  %111 = fadd float %87, %107
>  %112 = fadd float %88, %108
>  %113 = fadd float %89, %109
>  %114 = fadd float %90, %110
>  %115 = fmul float %111, 2.500000e-01
>  %116 = fmul float %112, 2.500000e-01
>  %117 = fmul float %113, 2.500000e-01
>  %118 = fmul float %114, 2.500000e-01
>  %119 = bitcast float %5 to i32
>  %120 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %119, 10
>  %121 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %120, float %115, 11
>  %122 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %121, float %116, 12
>  %123 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %122, float %117, 13
>  %124 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %123, float %118, 14
>  %125 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %124, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %125
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v1, 1.0                                 ; 7E0202F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v0, s4                                  ; 7E005404
>	v_rcp_f32_e32 v3, s5                                  ; 7E065405
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s0, s[0:3], 0xb                   ; C200010B
>	v_mul_f32_e32 v0, v0, v6                              ; 10000D00
>	v_mul_f32_e32 v4, v3, v7                              ; 10080F03
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v5, s7, v8                           ; 0A0A1007
>	v_subrev_f32_e32 v6, s8, v9                           ; 0A0C1208
>	v_add_f32_e32 v8, s7, v8                              ; 06101007
>	v_mac_f32_e32 v4, v3, v7                              ; 3E080F03
>	v_add_f32_e32 v9, s8, v9                              ; 06121208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v3, s4, v5                              ; 10060A04
>	v_mul_f32_e32 v5, s0, v6                              ; 100A0C00
>	v_mul_f32_e32 v6, s4, v8                              ; 100C1004
>	v_mul_f32_e32 v7, s0, v9                              ; 100E1200
>	exp 15, 32, 0, 0, 0, v3, v5, v6, v5                   ; F800020F 05060503
>	exp 15, 33, 0, 0, 0, v3, v7, v6, v7                   ; F800021F 07060703
>	v_mad_f32 v0, 2.0, v0, -1.0                           ; D2820000 03CE00F4
>	v_mad_f32 v4, v4, s6, -s6                             ; D2820004 80180D04
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mov_b32_e32 v3, 0                                   ; 7E060280
>	exp 15, 12, 0, 1, 0, v0, v4, v3, v1                   ; F80008CF 01030400
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 196 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                   ; BE86047E
>	s_wqm_b64 exec, exec                                     ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                     ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                       ; C080050C
>	s_mov_b32 m0, s11                                        ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                       ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                 ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                       ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                 ; C8050103
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_and_b32 s0, s0, s19                                    ; 87001300
>	image_sample v[4:7], v[0:1], s[12:19], s[0:3] dmask:0xf  ; F0800F00 00030400
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                       ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]                 ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                       ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]                 ; C8050303
>	image_sample v[8:11], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030800
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                       ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                 ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                       ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                 ; C8050503
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_add_f32_e32 v8, v8, v4                                 ; 06100908
>	v_add_f32_e32 v9, v9, v5                                 ; 06120B09
>	v_add_f32_e32 v10, v10, v6                               ; 06140D0A
>	v_add_f32_e32 v11, v11, v7                               ; 06160F0B
>	image_sample v[4:7], v[0:1], s[12:19], s[0:3] dmask:0xf  ; F0800F00 00030400
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                       ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]                 ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                       ; C8040702
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_add_f32_e32 v4, v4, v8                                 ; 06081104
>	v_add_f32_e32 v5, v5, v9                                 ; 060A1305
>	v_add_f32_e32 v6, v6, v10                                ; 060C1506
>	v_add_f32_e32 v7, v7, v11                                ; 060E1707
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]                 ; C8050703
>	s_and_b64 exec, exec, s[6:7]                             ; 87FE067E
>	image_sample v[0:3], v[0:1], s[12:19], s[0:3] dmask:0xf  ; F0800F00 00030000
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_add_f32_e32 v0, v0, v4                                 ; 06000900
>	v_mov_b32_e32 v4, 0x3e800000                             ; 7E0802FF 3E800000
>	v_add_f32_e32 v1, v1, v5                                 ; 06020B01
>	v_add_f32_e32 v2, v2, v6                                 ; 06040D02
>	v_add_f32_e32 v3, v3, v7                                 ; 06060F03
>	v_mul_f32_e32 v0, v4, v0                                 ; 10000104
>	v_mul_f32_e32 v1, v4, v1                                 ; 10020304
>	v_mul_f32_e32 v2, v4, v2                                 ; 10040504
>	v_mul_f32_e32 v3, v4, v3                                 ; 10060704
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 232 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..2]
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>  0: RCP TEMP[0].x, CONST[0].zzzz
>  1: RCP TEMP[0].y, CONST[0].wwww
>  2: MUL TEMP[0].xy, IN[0].xyyy, TEMP[0].xyyy
>  3: MAD TEMP[0].xy, TEMP[0].xyyy, IMM[0].xxxx, IMM[0].yyyy
>  4: MOV TEMP[1].zw, IMM[0].wwzw
>  5: MOV TEMP[1].x, TEMP[0].xyxx
>  6: MOV TEMP[1].xzw, TEMP[1].xxzw
>  7: MUL TEMP[0].x, TEMP[0].yyyy, CONST[1].zzzz
>  8: MOV TEMP[1].y, TEMP[0].xxxx
>  9: MOV TEMP[0].xy, IN[1].xyxx
> 10: MAD TEMP[2].xy, IN[1].xyyy, CONST[2].xyyy, CONST[2].zwww
> 11: MOV TEMP[0].zw, TEMP[2].yyxy
> 12: MOV OUT[0], TEMP[1]
> 13: MOV OUT[1], TEMP[0]
> 14: END
>radeonsi: Compiling shader 70
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 8)
>  %29 = fdiv float 1.000000e+00, %28, !fpmath !1
>  %30 = call float @llvm.SI.load.const(<16 x i8> %27, i32 12)
>  %31 = fdiv float 1.000000e+00, %30, !fpmath !1
>  %32 = fmul float %19, %29
>  %33 = fmul float %20, %31
>  %34 = fmul float %32, 2.000000e+00
>  %35 = fadd float %34, -1.000000e+00
>  %36 = fmul float %33, 2.000000e+00
>  %37 = fadd float %36, -1.000000e+00
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call float @llvm.SI.load.const(<16 x i8> %39, i32 24)
>  %41 = fmul float %37, %40
>  %42 = call float @llvm.SI.load.const(<16 x i8> %39, i32 32)
>  %43 = call float @llvm.SI.load.const(<16 x i8> %39, i32 40)
>  %44 = fmul float %24, %42
>  %45 = fadd float %44, %43
>  %46 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %47 = load <16 x i8>, <16 x i8> addrspace(2)* %46, align 16, !invariant.load !0
>  %48 = call float @llvm.SI.load.const(<16 x i8> %47, i32 36)
>  %49 = call float @llvm.SI.load.const(<16 x i8> %47, i32 44)
>  %50 = fmul float %25, %48
>  %51 = fadd float %50, %49
>  %52 = bitcast i32 %12 to float
>  %53 = insertvalue <{ float, float, float }> undef, float %52, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %24, float %25, float %45, float %51)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %35, float %41, float 0.000000e+00, float 1.000000e+00)
>  ret <{ float, float, float }> %53
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0], LOCAL
>IMM[0] FLT32 {    0.5000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[0].xyz, TEMP[0].xyzx
>  3: MOV TEMP[0].w, IMM[0].xxxx
>  4: MOV OUT[0], TEMP[0]
>  5: END
>radeonsi: Compiling shader 71
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = bitcast float %5 to i32
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %42, 10
>  %44 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %43, float %39, 11
>  %45 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %44, float %40, 12
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %45, float %41, 13
>  %47 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %46, float 5.000000e-01, 14
>  %48 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %47, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %48
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v0, 1.0                                 ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s9, s[0:3], 0xa                   ; C204810A
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xb                   ; C200010B
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v1, s4                                  ; 7E025404
>	v_rcp_f32_e32 v3, s5                                  ; 7E065405
>	v_mov_b32_e32 v4, s9                                  ; 7E080209
>	v_mov_b32_e32 v5, s0                                  ; 7E0A0200
>	v_mul_f32_e32 v1, v1, v6                              ; 10020D01
>	v_mul_f32_e32 v6, v3, v7                              ; 100C0F03
>	v_mac_f32_e32 v6, v3, v7                              ; 3E0C0F03
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, s7, v8                              ; 3E081007
>	v_mac_f32_e32 v5, s8, v9                              ; 3E0A1208
>	exp 15, 32, 0, 0, 0, v8, v9, v4, v5                   ; F800020F 05040908
>	v_mad_f32 v1, 2.0, v1, -1.0                           ; D2820001 03CE02F4
>	v_mad_f32 v3, v6, s6, -s6                             ; D2820003 80180D06
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mov_b32_e32 v4, 0                                   ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                   ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 168 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[0:2], v[0:1], s[12:19], s[0:3] dmask:0x7 ; F0800700 00030000
>	v_mov_b32_e32 v3, 0.5                                   ; 7E0602F0
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 84 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    0.5000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].w, IMM[0].xxxx
>  1: MOV TEMP[1].xy, IN[0].xyyy
>  2: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  3: MOV TEMP[0].xyz, TEMP[1].xyzx
>  4: MOV OUT[0], TEMP[0]
>  5: END
>radeonsi: Compiling shader 72
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = bitcast float %5 to i32
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %42, 10
>  %44 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %43, float %39, 11
>  %45 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %44, float %40, 12
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %45, float %41, 13
>  %47 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %46, float 5.000000e-01, 14
>  %48 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %47, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %48
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v0, 1.0                                 ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s9, s[0:3], 0xa                   ; C204810A
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xb                   ; C200010B
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v1, s4                                  ; 7E025404
>	v_rcp_f32_e32 v3, s5                                  ; 7E065405
>	v_mov_b32_e32 v4, s9                                  ; 7E080209
>	v_mov_b32_e32 v5, s0                                  ; 7E0A0200
>	v_mul_f32_e32 v1, v1, v6                              ; 10020D01
>	v_mul_f32_e32 v6, v3, v7                              ; 100C0F03
>	v_mac_f32_e32 v6, v3, v7                              ; 3E0C0F03
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, s7, v8                              ; 3E081007
>	v_mac_f32_e32 v5, s8, v9                              ; 3E0A1208
>	exp 15, 32, 0, 0, 0, v8, v9, v4, v5                   ; F800020F 05040908
>	v_mad_f32 v1, 2.0, v1, -1.0                           ; D2820001 03CE02F4
>	v_mad_f32 v3, v6, s6, -s6                             ; D2820003 80180D06
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mov_b32_e32 v4, 0                                   ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                   ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 168 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[0:2], v[0:1], s[12:19], s[0:3] dmask:0x7 ; F0800700 00030000
>	v_mov_b32_e32 v3, 0.5                                   ; 7E0602F0
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 84 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL SVIEW[2], 2D, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL TEMP[0..5], LOCAL
>IMM[0] FLT32 {    1.0000,     0.5000,     0.0031,    12.9200}
>IMM[1] FLT32 {    0.2126,     0.7150,     0.0722,     1.0550}
>IMM[2] FLT32 {    0.4167,    -0.0550,     0.9412,     0.0312}
>IMM[3] FLT32 {   15.0588,     0.0625,     0.0623,    15.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0].xyz, TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IMM[0].yyyy
>  3: TEX TEMP[1].x, TEMP[1], SAMP[1], 2D
>  4: ADD TEMP[1].x, IMM[0].xxxx, -TEMP[1].xxxx
>  5: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  6: MOV TEMP[1].xy, IN[0].zwww
>  7: TEX TEMP[1].xyz, TEMP[1], SAMP[3], 2D
>  8: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[1].xyzz
>  9: ADD TEMP[2].xyz, TEMP[1].xyzz, IMM[0].xxxx
> 10: RCP TEMP[3].x, TEMP[2].xxxx
> 11: RCP TEMP[3].y, TEMP[2].yyyy
> 12: RCP TEMP[3].z, TEMP[2].zzzz
> 13: DP3 TEMP[2].x, TEMP[0].xyzz, IMM[1].xyzz
> 14: ADD TEMP[2].x, TEMP[2].xxxx, IMM[0].xxxx
> 15: RCP TEMP[2].x, TEMP[2].xxxx
> 16: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xxxx
> 17: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[3].xyzz, TEMP[0].xyzz
> 18: MOV_SAT TEMP[0].xyz, TEMP[0].xyzz
> 19: FSGE TEMP[1].xyz, IMM[0].zzzz, TEMP[0].xyzz
> 20: MUL TEMP[2].xyz, IMM[0].wwww, TEMP[0].xyzz
> 21: POW TEMP[3].x, TEMP[0].xxxx, IMM[2].xxxx
> 22: POW TEMP[3].y, TEMP[0].yyyy, IMM[2].xxxx
> 23: POW TEMP[3].z, TEMP[0].zzzz, IMM[2].xxxx
> 24: MAD TEMP[0].xyz, IMM[1].wwww, TEMP[3].xyzz, IMM[2].yyyy
> 25: UCMP TEMP[3].x, TEMP[1].xxxx, TEMP[2].xxxx, TEMP[3].xxxx
> 26: NOT TEMP[4].x, TEMP[1].xxxx
> 27: UCMP TEMP[3].x, TEMP[4].xxxx, TEMP[0].xxxx, TEMP[3].xxxx
> 28: UCMP TEMP[4].x, TEMP[1].yyyy, TEMP[2].yyyy, TEMP[4].xxxx
> 29: NOT TEMP[5].x, TEMP[1].yyyy
> 30: UCMP TEMP[4].x, TEMP[5].xxxx, TEMP[0].yyyy, TEMP[4].xxxx
> 31: UCMP TEMP[2].x, TEMP[1].zzzz, TEMP[2].zzzz, TEMP[2].xxxx
> 32: NOT TEMP[1].x, TEMP[1].zzzz
> 33: UCMP TEMP[2].x, TEMP[1].xxxx, TEMP[0].zzzz, TEMP[2].xxxx
> 34: MOV TEMP[0].x, TEMP[3].xxxx
> 35: MOV TEMP[0].y, TEMP[4].xxxx
> 36: MAD TEMP[0].xy, TEMP[0].xyyy, IMM[2].zzzz, IMM[2].wwww
> 37: MUL TEMP[1].x, IMM[3].xxxx, TEMP[2].xxxx
> 38: FRC TEMP[2].x, TEMP[1].xxxx
> 39: ADD TEMP[1].x, TEMP[1].xxxx, -TEMP[2].xxxx
> 40: MUL TEMP[3].x, TEMP[0].xxxx, IMM[3].zzzz
> 41: MAD TEMP[3].x, TEMP[1].xxxx, IMM[3].yyyy, TEMP[3].xxxx
> 42: MOV TEMP[3].y, TEMP[0].yyyy
> 43: ADD TEMP[1].x, TEMP[1].xxxx, IMM[0].xxxx
> 44: MIN TEMP[1].x, IMM[3].wwww, TEMP[1].xxxx
> 45: MUL TEMP[4].x, TEMP[0].xxxx, IMM[3].zzzz
> 46: MAD TEMP[1].x, TEMP[1].xxxx, IMM[3].yyyy, TEMP[4].xxxx
> 47: MOV TEMP[1].y, TEMP[0].yyyy
> 48: MOV TEMP[0].xy, TEMP[3].xyyy
> 49: TEX TEMP[0].xyz, TEMP[0], SAMP[2], 2D
> 50: MOV TEMP[1].xy, TEMP[1].xyyy
> 51: TEX TEMP[1].xyz, TEMP[1], SAMP[2], 2D
> 52: LRP TEMP[0].xyz, TEMP[2].xxxx, TEMP[1].xyzz, TEMP[0].xyzz
> 53: MOV OUT[0], TEMP[0].xyzz
> 54: END
>radeonsi: Compiling shader 73
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %43 = load <8 x i32>, <8 x i32> addrspace(2)* %42, align 32, !invariant.load !0
>  %44 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %45 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %44, i64 0, i64 7, !amdgpu.uniform !0
>  %46 = load <4 x i32>, <4 x i32> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = extractelement <8 x i32> %43, i32 7
>  %48 = extractelement <4 x i32> %46, i32 0
>  %49 = and i32 %48, %47
>  %50 = insertelement <4 x i32> %46, i32 %49, i32 0
>  %51 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> <i32 1056964608, i32 1056964608>, <8 x i32> %43, <4 x i32> %50, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %52 = extractelement <4 x float> %51, i32 0
>  %53 = fsub float 1.000000e+00, %52
>  %54 = fmul float %39, %53
>  %55 = fmul float %40, %53
>  %56 = fmul float %41, %53
>  %57 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %58 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %59 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %60 = load <8 x i32>, <8 x i32> addrspace(2)* %59, align 32, !invariant.load !0
>  %61 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %62 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %61, i64 0, i64 15, !amdgpu.uniform !0
>  %63 = load <4 x i32>, <4 x i32> addrspace(2)* %62, align 16, !invariant.load !0
>  %64 = extractelement <8 x i32> %60, i32 7
>  %65 = extractelement <4 x i32> %63, i32 0
>  %66 = and i32 %65, %64
>  %67 = insertelement <4 x i32> %63, i32 %66, i32 0
>  %68 = bitcast float %57 to i32
>  %69 = bitcast float %58 to i32
>  %70 = insertelement <2 x i32> undef, i32 %68, i32 0
>  %71 = insertelement <2 x i32> %70, i32 %69, i32 1
>  %72 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %71, <8 x i32> %60, <4 x i32> %67, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %73 = extractelement <4 x float> %72, i32 0
>  %74 = extractelement <4 x float> %72, i32 1
>  %75 = extractelement <4 x float> %72, i32 2
>  %76 = fmul float %73, %73
>  %77 = fmul float %74, %74
>  %78 = fmul float %75, %75
>  %79 = fadd float %76, 1.000000e+00
>  %80 = fadd float %77, 1.000000e+00
>  %81 = fadd float %78, 1.000000e+00
>  %82 = fdiv float 1.000000e+00, %79, !fpmath !1
>  %83 = fdiv float 1.000000e+00, %80, !fpmath !1
>  %84 = fdiv float 1.000000e+00, %81, !fpmath !1
>  %85 = fmul float %54, 0x3FCB367A00000000
>  %86 = fmul float %55, 0x3FE6E147A0000000
>  %87 = fadd float %86, %85
>  %88 = fmul float %56, 0x3FB27BB300000000
>  %89 = fadd float %87, %88
>  %90 = fadd float %89, 1.000000e+00
>  %91 = fdiv float 1.000000e+00, %90, !fpmath !1
>  %92 = fmul float %54, %91
>  %93 = fmul float %55, %91
>  %94 = fmul float %56, %91
>  %95 = fmul float %76, %82
>  %96 = fadd float %95, %92
>  %97 = fmul float %77, %83
>  %98 = fadd float %97, %93
>  %99 = fmul float %78, %84
>  %100 = fadd float %99, %94
>  %101 = call float @llvm.AMDGPU.clamp.(float %96, float 0.000000e+00, float 1.000000e+00)
>  %102 = call float @llvm.AMDGPU.clamp.(float %98, float 0.000000e+00, float 1.000000e+00)
>  %103 = call float @llvm.AMDGPU.clamp.(float %100, float 0.000000e+00, float 1.000000e+00)
>  %104 = fcmp ole float %101, 0x3F69A5C380000000
>  %105 = fcmp ole float %102, 0x3F69A5C380000000
>  %106 = fcmp ole float %103, 0x3F69A5C380000000
>  %107 = fmul float %101, 0x4029D70A40000000
>  %108 = fmul float %102, 0x4029D70A40000000
>  %109 = fmul float %103, 0x4029D70A40000000
>  %110 = call float @llvm.pow.f32(float %101, float 0x3FDAAAAC20000000)
>  %111 = call float @llvm.pow.f32(float %102, float 0x3FDAAAAC20000000)
>  %112 = call float @llvm.pow.f32(float %103, float 0x3FDAAAAC20000000)
>  %113 = fmul float %110, 0x3FF0E147A0000000
>  %114 = fadd float %113, 0xBFAC28F5C0000000
>  %115 = fmul float %111, 0x3FF0E147A0000000
>  %116 = fadd float %115, 0xBFAC28F5C0000000
>  %117 = fmul float %112, 0x3FF0E147A0000000
>  %118 = fadd float %117, 0xBFAC28F5C0000000
>  %119 = select i1 %104, float %107, float %114
>  %120 = select i1 %105, float %108, float %116
>  %121 = select i1 %106, float %109, float %118
>  %122 = fmul float %119, 0x3FEE1E1D20000000
>  %123 = fadd float %122, 3.125000e-02
>  %124 = fmul float %120, 0x3FEE1E1D20000000
>  %125 = fadd float %124, 3.125000e-02
>  %126 = fmul float %121, 0x402E1E1B00000000
>  %127 = call float @llvm.floor.f32(float %126)
>  %128 = fsub float %126, %127
>  %129 = fsub float %126, %128
>  %130 = fmul float %123, 0x3FAFE01FE0000000
>  %131 = fmul float %129, 6.250000e-02
>  %132 = fadd float %131, %130
>  %133 = fadd float %129, 1.000000e+00
>  %134 = call float @llvm.minnum.f32(float %133, float 1.500000e+01)
>  %135 = fmul float %123, 0x3FAFE01FE0000000
>  %136 = fmul float %134, 6.250000e-02
>  %137 = fadd float %136, %135
>  %138 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %139 = load <8 x i32>, <8 x i32> addrspace(2)* %138, align 32, !invariant.load !0
>  %140 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %141 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %140, i64 0, i64 11, !amdgpu.uniform !0
>  %142 = load <4 x i32>, <4 x i32> addrspace(2)* %141, align 16, !invariant.load !0
>  %143 = extractelement <8 x i32> %139, i32 7
>  %144 = extractelement <4 x i32> %142, i32 0
>  %145 = and i32 %144, %143
>  %146 = insertelement <4 x i32> %142, i32 %145, i32 0
>  %147 = bitcast float %132 to i32
>  %148 = bitcast float %125 to i32
>  %149 = insertelement <2 x i32> undef, i32 %147, i32 0
>  %150 = insertelement <2 x i32> %149, i32 %148, i32 1
>  %151 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %150, <8 x i32> %139, <4 x i32> %146, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %152 = extractelement <4 x float> %151, i32 0
>  %153 = extractelement <4 x float> %151, i32 1
>  %154 = extractelement <4 x float> %151, i32 2
>  %155 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %156 = load <8 x i32>, <8 x i32> addrspace(2)* %155, align 32, !invariant.load !0
>  %157 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %158 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %157, i64 0, i64 11, !amdgpu.uniform !0
>  %159 = load <4 x i32>, <4 x i32> addrspace(2)* %158, align 16, !invariant.load !0
>  %160 = extractelement <8 x i32> %156, i32 7
>  %161 = extractelement <4 x i32> %159, i32 0
>  %162 = and i32 %161, %160
>  %163 = insertelement <4 x i32> %159, i32 %162, i32 0
>  %164 = bitcast float %137 to i32
>  %165 = bitcast float %125 to i32
>  %166 = insertelement <2 x i32> undef, i32 %164, i32 0
>  %167 = insertelement <2 x i32> %166, i32 %165, i32 1
>  %168 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %167, <8 x i32> %156, <4 x i32> %163, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %169 = extractelement <4 x float> %168, i32 0
>  %170 = extractelement <4 x float> %168, i32 1
>  %171 = extractelement <4 x float> %168, i32 2
>  %172 = fsub float 1.000000e+00, %128
>  %173 = fmul float %169, %128
>  %174 = fmul float %152, %172
>  %175 = fadd float %173, %174
>  %176 = fsub float 1.000000e+00, %128
>  %177 = fmul float %170, %128
>  %178 = fmul float %153, %176
>  %179 = fadd float %177, %178
>  %180 = fsub float 1.000000e+00, %128
>  %181 = fmul float %171, %128
>  %182 = fmul float %154, %180
>  %183 = fadd float %181, %182
>  %184 = bitcast float %5 to i32
>  %185 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %184, 10
>  %186 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %185, float %175, 11
>  %187 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %186, float %179, 12
>  %188 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %187, float %183, 13
>  %189 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %188, float %183, 14
>  %190 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %189, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %190
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.minnum.f32(float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v0, 1.0                                 ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s9, s[0:3], 0xa                   ; C204810A
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xb                   ; C200010B
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v1, s4                                  ; 7E025404
>	v_rcp_f32_e32 v3, s5                                  ; 7E065405
>	v_mov_b32_e32 v4, s9                                  ; 7E080209
>	v_mov_b32_e32 v5, s0                                  ; 7E0A0200
>	v_mul_f32_e32 v1, v1, v6                              ; 10020D01
>	v_mul_f32_e32 v6, v3, v7                              ; 100C0F03
>	v_mac_f32_e32 v6, v3, v7                              ; 3E0C0F03
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, s7, v8                              ; 3E081007
>	v_mac_f32_e32 v5, s8, v9                              ; 3E0A1208
>	exp 15, 32, 0, 0, 0, v8, v9, v4, v5                   ; F800020F 05040908
>	v_mad_f32 v1, 2.0, v1, -1.0                           ; D2820001 03CE02F4
>	v_mad_f32 v3, v6, s6, -s6                             ; D2820003 80180D06
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mov_b32_e32 v4, 0                                   ; 7E080280
>	exp 15, 12, 0, 1, 0, v1, v3, v4, v0                   ; F80008CF 00040301
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 168 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                    ; BE86047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[24:31], s[4:5], 0x0                      ; C0CC0500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                        ; C080050C
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	s_load_dwordx8 s[32:39], s[4:5], 0x10                     ; C0D00510
>	s_load_dwordx4 s[40:43], s[4:5], 0x1c                     ; C094051C
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                        ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                  ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                        ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                  ; C8050103
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s0, s0, s31                                     ; 87001F00
>	image_sample v[4:6], v[0:1], s[24:31], s[0:3] dmask:0x7   ; F0800700 00060400
>	v_mov_b32_e32 v0, 0.5                                     ; 7E0002F0
>	s_load_dwordx8 s[24:31], s[4:5], 0x30                     ; C0CC0530
>	s_load_dwordx4 s[0:3], s[4:5], 0x3c                       ; C080053C
>	s_and_b32 s40, s40, s39                                   ; 87282728
>	v_mov_b32_e32 v1, v0                                      ; 7E020300
>	image_sample v0, v[0:1], s[32:39], s[40:43] dmask:0x1     ; F0800100 01480000
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mad_f32 v4, -v0, v4, v4                                 ; D2820004 24120900
>	v_mad_f32 v5, -v0, v5, v5                                 ; D2820005 24160B00
>	v_mul_f32_e32 v9, 0x3e59b3d0, v4                          ; 101208FF 3E59B3D0
>	v_mad_f32 v6, -v0, v6, v6                                 ; D2820006 241A0D00
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                        ; C8000202
>	v_mac_f32_e32 v9, 0x3f370a3d, v5                          ; 3E120AFF 3F370A3D
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]                  ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                        ; C8040302
>	v_mac_f32_e32 v9, 0x3d93dd98, v6                          ; 3E120CFF 3D93DD98
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]                  ; C8050303
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s0, s0, s31                                     ; 87001F00
>	image_sample v[0:2], v[0:1], s[24:31], s[0:3] dmask:0x7   ; F0800700 00060000
>	v_add_f32_e32 v9, 1.0, v9                                 ; 061212F2
>	v_rcp_f32_e32 v9, v9                                      ; 7E125509
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v3, v0, v0                                  ; 10060100
>	v_mad_f32 v0, v0, v0, 1.0                                 ; D2820000 03CA0100
>	v_mul_f32_e32 v7, v1, v1                                  ; 100E0301
>	v_mad_f32 v1, v1, v1, 1.0                                 ; D2820001 03CA0301
>	v_mul_f32_e32 v8, v2, v2                                  ; 10100502
>	v_mad_f32 v2, v2, v2, 1.0                                 ; D2820002 03CA0502
>	v_rcp_f32_e32 v0, v0                                      ; 7E005500
>	v_rcp_f32_e32 v1, v1                                      ; 7E025501
>	v_rcp_f32_e32 v2, v2                                      ; 7E045502
>	v_mul_f32_e32 v4, v9, v4                                  ; 10080909
>	v_mul_f32_e32 v5, v9, v5                                  ; 100A0B09
>	v_mac_f32_e32 v5, v1, v7                                  ; 3E0A0F01
>	v_mul_f32_e32 v6, v9, v6                                  ; 100C0D09
>	v_mac_f32_e32 v4, v0, v3                                  ; 3E080700
>	v_mac_f32_e32 v6, v2, v8                                  ; 3E0C1102
>	v_mov_b32_e32 v10, 0x3b4d2e1c                             ; 7E1402FF 3B4D2E1C
>	v_add_f32_e64 v0, v4, 0 clamp                             ; D2060800 00010104
>	v_mov_b32_e32 v11, 0x414eb852                             ; 7E1602FF 414EB852
>	v_add_f32_e64 v1, v5, 0 clamp                             ; D2060801 00010105
>	v_add_f32_e64 v2, v6, 0 clamp                             ; D2060802 00010106
>	v_cmp_le_f32_e32 vcc, v0, v10                             ; 7C061500
>	v_mul_f32_e32 v3, v11, v0                                 ; 1006010B
>	v_cmp_le_f32_e64 s[0:1], v1, v10                          ; D0060000 00021501
>	v_mul_f32_e32 v4, v11, v1                                 ; 1008030B
>	v_log_f32_e32 v0, v0                                      ; 7E004F00
>	v_log_f32_e32 v1, v1                                      ; 7E024F01
>	v_cmp_le_f32_e64 s[2:3], v2, v10                          ; D0060002 00021502
>	v_mul_f32_e32 v5, v11, v2                                 ; 100A050B
>	v_log_f32_e32 v2, v2                                      ; 7E044F02
>	v_mov_b32_e32 v12, 0x3ed55561                             ; 7E1802FF 3ED55561
>	v_mul_legacy_f32_e32 v0, v12, v0                          ; 0E00010C
>	v_mul_legacy_f32_e32 v1, v12, v1                          ; 0E02030C
>	v_mul_legacy_f32_e32 v2, v12, v2                          ; 0E04050C
>	v_mov_b32_e32 v6, 0xbd6147ae                              ; 7E0C02FF BD6147AE
>	v_exp_f32_e32 v0, v0                                      ; 7E004B00
>	v_mov_b32_e32 v7, 0x3f870a3d                              ; 7E0E02FF 3F870A3D
>	v_exp_f32_e32 v1, v1                                      ; 7E024B01
>	v_mad_f32 v0, v7, v0, v6                                  ; D2820000 041A0107
>	v_exp_f32_e32 v2, v2                                      ; 7E044B02
>	v_mad_f32 v1, v7, v1, v6                                  ; D2820001 041A0307
>	v_mac_f32_e32 v6, v7, v2                                  ; 3E0C0507
>	v_cndmask_b32_e64 v2, v1, v4, s[0:1]                      ; D2000002 00020901
>	v_cndmask_b32_e32 v0, v0, v3, vcc                         ; 00000700
>	v_mov_b32_e32 v1, 0x3d000000                              ; 7E0202FF 3D000000
>	v_mov_b32_e32 v4, 0x3f70f0e9                              ; 7E0802FF 3F70F0E9
>	v_mad_f32 v0, v4, v0, v1                                  ; D2820000 04060104
>	v_cndmask_b32_e64 v3, v6, v5, s[2:3]                      ; D2000003 000A0B06
>	v_mac_f32_e32 v1, v4, v2                                  ; 3E020504
>	v_mov_b32_e32 v2, 0x4170f0d8                              ; 7E0402FF 4170F0D8
>	v_mul_f32_e32 v4, v2, v3                                  ; 10080702
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                     ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                     ; C08A052C
>	v_floor_f32_e32 v4, v4                                    ; 7E084904
>	v_mad_f32 v8, v3, v2, -v4                                 ; D2820008 84120503
>	v_mad_f32 v2, v3, v2, -v8                                 ; D2820002 84220503
>	v_mul_f32_e32 v5, 0x3d7f00ff, v0                          ; 100A00FF 3D7F00FF
>	v_mov_b32_e32 v3, 0x3d800000                              ; 7E0602FF 3D800000
>	v_mad_f32 v0, v3, v2, v5                                  ; D2820000 04160503
>	v_add_f32_e32 v2, 1.0, v2                                 ; 060404F2
>	v_min_f32_e32 v2, 0x41700000, v2                          ; 1E0404FF 41700000
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s20, s20, s19                                   ; 87141314
>	v_mac_f32_e32 v5, v3, v2                                  ; 3E0A0503
>	image_sample v[2:4], v[0:1], s[12:19], s[20:23] dmask:0x7 ; F0800700 00A30200
>	v_mov_b32_e32 v6, v1                                      ; 7E0C0301
>	s_and_b64 exec, exec, s[6:7]                              ; 87FE067E
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mad_f32 v0, -v8, v2, v2                                 ; D2820000 240A0508
>	image_sample v[5:7], v[5:6], s[12:19], s[20:23] dmask:0x7 ; F0800700 00A30505
>	v_mad_f32 v2, -v8, v4, v4                                 ; D2820002 24120908
>	v_mad_f32 v1, -v8, v3, v3                                 ; D2820001 240E0708
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mac_f32_e32 v2, v8, v7                                  ; 3E040F08
>	v_mac_f32_e32 v0, v8, v5                                  ; 3E000B08
>	v_mac_f32_e32 v1, v8, v6                                  ; 3E020D08
>	v_mov_b32_e32 v3, v2                                      ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 636 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5].xyz, GENERIC[4]
>DCL CONST[0..231]
>DCL TEMP[0..15], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000, -32768.0000, -8192.0000, -65536.0000}
>IMM[1] INT32 {1, 0, 0, 0}
>IMM[2] FLT32 {-8224.0000,     0.0010,     0.0039,     0.5000}
>IMM[3] FLT32 {    0.0000,     0.0010,     8.0000,     0.1000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: UARL ADDR[0].x, TEMP[0].xxxx
>  2: MOV TEMP[1].xyz, CONST[ADDR[0].x+9].xyzx
>  3: ADD TEMP[2].xyz, CONST[4].xyzz, -TEMP[1].xyzz
>  4: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[2].xyzz
>  5: SQRT TEMP[2].x, TEMP[2].xxxx
>  6: POW TEMP[2].x, TEMP[2].xxxx, CONST[231].wwww
>  7: UADD TEMP[3].x, TEMP[0].xxxx, IMM[1].xxxx
>  8: UARL ADDR[0].x, TEMP[3].xxxx
>  9: UARL ADDR[0].x, TEMP[3].xxxx
> 10: ADD TEMP[3], CONST[ADDR[0].x+9], IMM[0].yyzw
> 11: UARL ADDR[0].x, TEMP[0].xxxx
> 12: UARL ADDR[0].x, TEMP[0].xxxx
> 13: ADD TEMP[4].x, IMM[2].xxxx, CONST[ADDR[0].x+9].wwww
> 14: FRC TEMP[5].x, TEMP[3].wwww
> 15: SIN TEMP[6].x, TEMP[4].xxxx
> 16: COS TEMP[4].x, TEMP[4].xxxx
> 17: MUL TEMP[7].x, TEMP[3].zzzz, TEMP[2].xxxx
> 18: ADD TEMP[8].x, TEMP[3].wwww, -TEMP[5].xxxx
> 19: MUL TEMP[8].x, TEMP[8].xxxx, IMM[2].yyyy
> 20: MUL TEMP[2].x, TEMP[8].xxxx, TEMP[2].xxxx
> 21: MOV TEMP[8].x, TEMP[4].xxxx
> 22: MOV TEMP[8].y, TEMP[6].xxxx
> 23: MOV TEMP[9].x, -TEMP[6].xxxx
> 24: MOV TEMP[9].y, TEMP[4].xxxx
> 25: MUL TEMP[10].x, IN[0].xxxx, TEMP[7].xxxx
> 26: MUL TEMP[11].x, IN[0].yyyy, TEMP[2].xxxx
> 27: MUL TEMP[8].xy, TEMP[8].xyyy, TEMP[10].xxxx
> 28: MAD TEMP[8].xy, TEMP[9].xyyy, TEMP[11].xxxx, TEMP[8].xyyy
> 29: MUL TEMP[10].xyz, CONST[7].xyzz, TEMP[8].xxxx
> 30: MAD TEMP[8].xyz, CONST[8].xyzz, TEMP[8].yyyy, TEMP[10].xyzz
> 31: ADD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xyzz
> 32: FRC TEMP[8].xy, TEMP[3].xyyy
> 33: ADD TEMP[3].xy, TEMP[3].xyyy, -TEMP[8].xyyy
> 34: MUL TEMP[3].xy, TEMP[3].xyyy, IMM[2].zzzz
> 35: MOV TEMP[3].z, TEMP[8].yyxy
> 36: MOV TEMP[0].xyz, TEMP[0].xyzx
> 37: MUL TEMP[10], CONST[0], TEMP[0].xxxx
> 38: MAD TEMP[10], CONST[1], TEMP[0].yyyy, TEMP[10]
> 39: MAD TEMP[10], CONST[2], TEMP[0].zzzz, TEMP[10]
> 40: ADD TEMP[10], TEMP[10], CONST[3]
> 41: MOV TEMP[3].xyz, TEMP[3].xyzx
> 42: ADD TEMP[11].x, IN[0].xxxx, IMM[2].wwww
> 43: ADD TEMP[12].x, IN[0].yyyy, IMM[2].wwww
> 44: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
> 45: FRC TEMP[13].x, CONST[231].zzzz
> 46: ADD TEMP[14].x, CONST[231].zzzz, -TEMP[13].xxxx
> 47: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[13].xxxx
> 48: RCP TEMP[13].x, TEMP[14].xxxx
> 49: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[13].xxxx
> 50: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[14].xxxx
> 51: FRC TEMP[13].x, TEMP[5].xxxx
> 52: ADD TEMP[11].x, TEMP[11].xxxx, TEMP[13].xxxx
> 53: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[13].xxxx
> 54: RCP TEMP[13].x, TEMP[14].xxxx
> 55: MAD TEMP[5].x, TEMP[5].xxxx, TEMP[13].xxxx, TEMP[12].xxxx
> 56: MOV TEMP[11].y, TEMP[5].xxxx
> 57: ADD TEMP[1].xyz, CONST[4].xyzz, -TEMP[1].xyzz
> 58: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[1].xyzz
> 59: RSQ TEMP[5].x, TEMP[5].xxxx
> 60: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[5].xxxx
> 61: MUL TEMP[5].xyz, TEMP[1].zxyy, CONST[8].yzxx
> 62: MAD TEMP[5].xyz, TEMP[1].yzxx, CONST[8].zxyy, -TEMP[5].xyzz
> 63: DP3 TEMP[12].x, TEMP[5].xyzz, TEMP[5].xyzz
> 64: RSQ TEMP[12].x, TEMP[12].xxxx
> 65: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[12].xxxx
> 66: MUL TEMP[12].xyz, TEMP[5].zxyy, TEMP[1].yzxx
> 67: MAD TEMP[12].xyz, TEMP[5].yzxx, TEMP[1].zxyy, -TEMP[12].xyzz
> 68: DP3 TEMP[13].x, TEMP[12].xyzz, TEMP[12].xyzz
> 69: RSQ TEMP[13].x, TEMP[13].xxxx
> 70: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[13].xxxx
> 71: MAD TEMP[13].x, TEMP[10].zzzz, CONST[6].yyyy, CONST[6].xxxx
> 72: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 73: POW TEMP[13].x, TEMP[13].xxxx, CONST[6].zzzz
> 74: ADD TEMP[14].x, IMM[0].xxxx, -CONST[6].wwww
> 75: MAD TEMP[13].x, CONST[6].wwww, TEMP[13].xxxx, TEMP[14].xxxx
> 76: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[13].xxxx
> 77: ADD TEMP[14].x, TEMP[0].yyyy, -CONST[4].wwww
> 78: MAX TEMP[14].x, TEMP[14].xxxx, IMM[3].xxxx
> 79: ADD TEMP[15].x, CONST[5].wwww, -CONST[4].wwww
> 80: ADD TEMP[15].x, TEMP[15].xxxx, IMM[3].yyyy
> 81: RCP TEMP[15].x, TEMP[15].xxxx
> 82: MUL TEMP[14].x, TEMP[14].xxxx, TEMP[15].xxxx
> 83: FRC TEMP[15].x, CONST[5].wwww
> 84: MUL TEMP[15].x, TEMP[15].xxxx, IMM[3].zzzz
> 85: POW TEMP[14].x, TEMP[14].xxxx, TEMP[15].xxxx
> 86: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 87: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[14].xxxx
> 88: MAX TEMP[2].x, TEMP[7].xxxx, TEMP[2].xxxx
> 89: MUL TEMP[2].x, IMM[3].wwww, TEMP[2].xxxx
> 90: ADD TEMP[2].x, TEMP[10].zzzz, -TEMP[2].xxxx
> 91: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 92: MUL TEMP[2].x, TEMP[8].yyyy, TEMP[2].xxxx
> 93: MOV TEMP[3].w, TEMP[2].xxxx
> 94: MUL TEMP[2].xyz, TEMP[5].xyzz, TEMP[4].xxxx
> 95: MAD TEMP[2].xyz, TEMP[12].xyzz, TEMP[6].xxxx, TEMP[2].xyzz
> 96: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 97: MAD TEMP[4].xyz, TEMP[12].xyzz, TEMP[4].xxxx, TEMP[5].xyzz
> 98: MOV TEMP[4].w, TEMP[2].xxxx
> 99: MOV TEMP[2].xy, TEMP[2].yzyy
>100: MOV TEMP[2].zw, TEMP[11].yyxy
>101: MOV TEMP[5].x, TEMP[13].xxxx
>102: MOV TEMP[5].yzw, TEMP[0].yxyz
>103: MOV OUT[1], TEMP[3]
>104: MOV OUT[5].xyz, TEMP[1].xyzx
>105: MOV OUT[3], TEMP[2]
>106: MOV OUT[0], TEMP[10]
>107: MOV OUT[2], TEMP[4]
>108: MOV OUT[4], TEMP[5]
>109: END
>radeonsi: Compiling shader 74
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = fptosi float %24 to i32
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = shl i32 %25, 4
>  %29 = add i32 %28, 144
>  %30 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %29)
>  %31 = shl i32 %25, 4
>  %32 = add i32 %31, 148
>  %33 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %32)
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = shl i32 %25, 4
>  %37 = add i32 %36, 152
>  %38 = call float @llvm.SI.load.const(<16 x i8> %35, i32 %37)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %35, i32 64)
>  %40 = fsub float %39, %30
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 68)
>  %44 = fsub float %43, %33
>  %45 = call float @llvm.SI.load.const(<16 x i8> %42, i32 72)
>  %46 = fsub float %45, %38
>  %47 = fmul float %40, %40
>  %48 = fmul float %44, %44
>  %49 = fadd float %48, %47
>  %50 = fmul float %46, %46
>  %51 = fadd float %49, %50
>  %52 = call float @llvm.sqrt.f32(float %51)
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 3708)
>  %56 = call float @llvm.pow.f32(float %52, float %55)
>  %57 = add i32 %25, 1
>  %58 = shl i32 %57, 4
>  %59 = add i32 %58, 144
>  %60 = call float @llvm.SI.load.const(<16 x i8> %54, i32 %59)
>  %61 = fadd float %60, -3.276800e+04
>  %62 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %63 = load <16 x i8>, <16 x i8> addrspace(2)* %62, align 16, !invariant.load !0
>  %64 = shl i32 %57, 4
>  %65 = add i32 %64, 148
>  %66 = call float @llvm.SI.load.const(<16 x i8> %63, i32 %65)
>  %67 = fadd float %66, -3.276800e+04
>  %68 = shl i32 %57, 4
>  %69 = add i32 %68, 152
>  %70 = call float @llvm.SI.load.const(<16 x i8> %63, i32 %69)
>  %71 = fadd float %70, -8.192000e+03
>  %72 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %73 = load <16 x i8>, <16 x i8> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = shl i32 %57, 4
>  %75 = add i32 %74, 156
>  %76 = call float @llvm.SI.load.const(<16 x i8> %73, i32 %75)
>  %77 = fadd float %76, -6.553600e+04
>  %78 = shl i32 %25, 4
>  %79 = add i32 %78, 156
>  %80 = call float @llvm.SI.load.const(<16 x i8> %73, i32 %79)
>  %81 = fadd float %80, -8.224000e+03
>  %82 = call float @llvm.floor.f32(float %77)
>  %83 = fsub float %77, %82
>  %84 = call float @llvm.sin.f32(float %81)
>  %85 = call float @llvm.cos.f32(float %81)
>  %86 = fmul float %71, %56
>  %87 = fsub float %77, %83
>  %88 = fmul float %87, 9.765625e-04
>  %89 = fmul float %88, %56
>  %90 = fsub float -0.000000e+00, %84
>  %91 = fmul float %19, %86
>  %92 = fmul float %20, %89
>  %93 = fmul float %85, %91
>  %94 = fmul float %84, %91
>  %95 = fmul float %92, %90
>  %96 = fadd float %95, %93
>  %97 = fmul float %85, %92
>  %98 = fadd float %97, %94
>  %99 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %100 = load <16 x i8>, <16 x i8> addrspace(2)* %99, align 16, !invariant.load !0
>  %101 = call float @llvm.SI.load.const(<16 x i8> %100, i32 112)
>  %102 = fmul float %101, %96
>  %103 = call float @llvm.SI.load.const(<16 x i8> %100, i32 116)
>  %104 = fmul float %103, %96
>  %105 = call float @llvm.SI.load.const(<16 x i8> %100, i32 120)
>  %106 = fmul float %105, %96
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 128)
>  %110 = fmul float %109, %98
>  %111 = fadd float %110, %102
>  %112 = call float @llvm.SI.load.const(<16 x i8> %108, i32 132)
>  %113 = fmul float %112, %98
>  %114 = fadd float %113, %104
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = call float @llvm.SI.load.const(<16 x i8> %116, i32 136)
>  %118 = fmul float %117, %98
>  %119 = fadd float %118, %106
>  %120 = fadd float %30, %111
>  %121 = fadd float %33, %114
>  %122 = fadd float %38, %119
>  %123 = call float @llvm.floor.f32(float %61)
>  %124 = fsub float %61, %123
>  %125 = call float @llvm.floor.f32(float %67)
>  %126 = fsub float %67, %125
>  %127 = fsub float %61, %124
>  %128 = fsub float %67, %126
>  %129 = fmul float %127, 0x3F70101020000000
>  %130 = fmul float %128, 0x3F70101020000000
>  %131 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %132 = load <16 x i8>, <16 x i8> addrspace(2)* %131, align 16, !invariant.load !0
>  %133 = call float @llvm.SI.load.const(<16 x i8> %132, i32 0)
>  %134 = fmul float %133, %120
>  %135 = call float @llvm.SI.load.const(<16 x i8> %132, i32 4)
>  %136 = fmul float %135, %120
>  %137 = call float @llvm.SI.load.const(<16 x i8> %132, i32 8)
>  %138 = fmul float %137, %120
>  %139 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %140 = load <16 x i8>, <16 x i8> addrspace(2)* %139, align 16, !invariant.load !0
>  %141 = call float @llvm.SI.load.const(<16 x i8> %140, i32 12)
>  %142 = fmul float %141, %120
>  %143 = call float @llvm.SI.load.const(<16 x i8> %140, i32 16)
>  %144 = fmul float %143, %121
>  %145 = fadd float %144, %134
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = call float @llvm.SI.load.const(<16 x i8> %147, i32 20)
>  %149 = fmul float %148, %121
>  %150 = fadd float %149, %136
>  %151 = call float @llvm.SI.load.const(<16 x i8> %147, i32 24)
>  %152 = fmul float %151, %121
>  %153 = fadd float %152, %138
>  %154 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %155 = load <16 x i8>, <16 x i8> addrspace(2)* %154, align 16, !invariant.load !0
>  %156 = call float @llvm.SI.load.const(<16 x i8> %155, i32 28)
>  %157 = fmul float %156, %121
>  %158 = fadd float %157, %142
>  %159 = call float @llvm.SI.load.const(<16 x i8> %155, i32 32)
>  %160 = fmul float %159, %122
>  %161 = fadd float %160, %145
>  %162 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %163 = load <16 x i8>, <16 x i8> addrspace(2)* %162, align 16, !invariant.load !0
>  %164 = call float @llvm.SI.load.const(<16 x i8> %163, i32 36)
>  %165 = fmul float %164, %122
>  %166 = fadd float %165, %150
>  %167 = call float @llvm.SI.load.const(<16 x i8> %163, i32 40)
>  %168 = fmul float %167, %122
>  %169 = fadd float %168, %153
>  %170 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %171 = load <16 x i8>, <16 x i8> addrspace(2)* %170, align 16, !invariant.load !0
>  %172 = call float @llvm.SI.load.const(<16 x i8> %171, i32 44)
>  %173 = fmul float %172, %122
>  %174 = fadd float %173, %158
>  %175 = call float @llvm.SI.load.const(<16 x i8> %171, i32 48)
>  %176 = fadd float %161, %175
>  %177 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %178 = load <16 x i8>, <16 x i8> addrspace(2)* %177, align 16, !invariant.load !0
>  %179 = call float @llvm.SI.load.const(<16 x i8> %178, i32 52)
>  %180 = fadd float %166, %179
>  %181 = call float @llvm.SI.load.const(<16 x i8> %178, i32 56)
>  %182 = fadd float %169, %181
>  %183 = call float @llvm.SI.load.const(<16 x i8> %178, i32 60)
>  %184 = fadd float %174, %183
>  %185 = fadd float %19, 5.000000e-01
>  %186 = fadd float %20, 5.000000e-01
>  %187 = fsub float 1.000000e+00, %186
>  %188 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %189 = load <16 x i8>, <16 x i8> addrspace(2)* %188, align 16, !invariant.load !0
>  %190 = call float @llvm.SI.load.const(<16 x i8> %189, i32 3704)
>  %191 = call float @llvm.floor.f32(float %190)
>  %192 = fsub float %190, %191
>  %193 = call float @llvm.SI.load.const(<16 x i8> %189, i32 3704)
>  %194 = fsub float %193, %192
>  %195 = fmul float %185, %192
>  %196 = fdiv float 1.000000e+00, %194, !fpmath !1
>  %197 = fmul float %187, %196
>  %198 = fmul float %83, %194
>  %199 = call float @llvm.floor.f32(float %198)
>  %200 = fsub float %198, %199
>  %201 = fadd float %195, %200
>  %202 = fsub float %198, %200
>  %203 = fdiv float 1.000000e+00, %194, !fpmath !1
>  %204 = fmul float %202, %203
>  %205 = fadd float %204, %197
>  %206 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %207 = load <16 x i8>, <16 x i8> addrspace(2)* %206, align 16, !invariant.load !0
>  %208 = call float @llvm.SI.load.const(<16 x i8> %207, i32 64)
>  %209 = fsub float %208, %30
>  %210 = call float @llvm.SI.load.const(<16 x i8> %207, i32 68)
>  %211 = fsub float %210, %33
>  %212 = call float @llvm.SI.load.const(<16 x i8> %207, i32 72)
>  %213 = fsub float %212, %38
>  %214 = fmul float %209, %209
>  %215 = fmul float %211, %211
>  %216 = fadd float %215, %214
>  %217 = fmul float %213, %213
>  %218 = fadd float %216, %217
>  %219 = call float @llvm.sqrt.f32(float %218)
>  %220 = fdiv float 1.000000e+00, %219, !fpmath !1
>  %221 = fmul float %209, %220
>  %222 = fmul float %211, %220
>  %223 = fmul float %213, %220
>  %224 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %225 = load <16 x i8>, <16 x i8> addrspace(2)* %224, align 16, !invariant.load !0
>  %226 = call float @llvm.SI.load.const(<16 x i8> %225, i32 132)
>  %227 = fmul float %223, %226
>  %228 = call float @llvm.SI.load.const(<16 x i8> %225, i32 136)
>  %229 = fmul float %221, %228
>  %230 = call float @llvm.SI.load.const(<16 x i8> %225, i32 128)
>  %231 = fmul float %222, %230
>  %232 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %233 = load <16 x i8>, <16 x i8> addrspace(2)* %232, align 16, !invariant.load !0
>  %234 = call float @llvm.SI.load.const(<16 x i8> %233, i32 136)
>  %235 = fmul float %222, %234
>  %236 = fsub float %235, %227
>  %237 = call float @llvm.SI.load.const(<16 x i8> %233, i32 128)
>  %238 = fmul float %223, %237
>  %239 = fsub float %238, %229
>  %240 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %241 = load <16 x i8>, <16 x i8> addrspace(2)* %240, align 16, !invariant.load !0
>  %242 = call float @llvm.SI.load.const(<16 x i8> %241, i32 132)
>  %243 = fmul float %221, %242
>  %244 = fsub float %243, %231
>  %245 = fmul float %236, %236
>  %246 = fmul float %239, %239
>  %247 = fadd float %246, %245
>  %248 = fmul float %244, %244
>  %249 = fadd float %247, %248
>  %250 = call float @llvm.sqrt.f32(float %249)
>  %251 = fdiv float 1.000000e+00, %250, !fpmath !1
>  %252 = fmul float %236, %251
>  %253 = fmul float %239, %251
>  %254 = fmul float %244, %251
>  %255 = fmul float %254, %222
>  %256 = fmul float %252, %223
>  %257 = fmul float %253, %221
>  %258 = fmul float %253, %223
>  %259 = fsub float %258, %255
>  %260 = fmul float %254, %221
>  %261 = fsub float %260, %256
>  %262 = fmul float %252, %222
>  %263 = fsub float %262, %257
>  %264 = fmul float %259, %259
>  %265 = fmul float %261, %261
>  %266 = fadd float %265, %264
>  %267 = fmul float %263, %263
>  %268 = fadd float %266, %267
>  %269 = call float @llvm.sqrt.f32(float %268)
>  %270 = fdiv float 1.000000e+00, %269, !fpmath !1
>  %271 = fmul float %259, %270
>  %272 = fmul float %261, %270
>  %273 = fmul float %263, %270
>  %274 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %275 = load <16 x i8>, <16 x i8> addrspace(2)* %274, align 16, !invariant.load !0
>  %276 = call float @llvm.SI.load.const(<16 x i8> %275, i32 100)
>  %277 = call float @llvm.SI.load.const(<16 x i8> %275, i32 96)
>  %278 = fmul float %182, %276
>  %279 = fadd float %278, %277
>  %280 = call float @llvm.AMDGPU.clamp.(float %279, float 0.000000e+00, float 1.000000e+00)
>  %281 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %282 = load <16 x i8>, <16 x i8> addrspace(2)* %281, align 16, !invariant.load !0
>  %283 = call float @llvm.SI.load.const(<16 x i8> %282, i32 104)
>  %284 = call float @llvm.pow.f32(float %280, float %283)
>  %285 = call float @llvm.SI.load.const(<16 x i8> %282, i32 108)
>  %286 = fsub float 1.000000e+00, %285
>  %287 = call float @llvm.SI.load.const(<16 x i8> %282, i32 108)
>  %288 = fmul float %287, %284
>  %289 = fadd float %288, %286
>  %290 = fmul float %289, %289
>  %291 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %292 = load <16 x i8>, <16 x i8> addrspace(2)* %291, align 16, !invariant.load !0
>  %293 = call float @llvm.SI.load.const(<16 x i8> %292, i32 76)
>  %294 = fsub float %121, %293
>  %295 = call float @llvm.maxnum.f32(float %294, float 0.000000e+00)
>  %296 = call float @llvm.SI.load.const(<16 x i8> %292, i32 92)
>  %297 = call float @llvm.SI.load.const(<16 x i8> %292, i32 76)
>  %298 = fsub float %296, %297
>  %299 = fadd float %298, 0x3F50624DE0000000
>  %300 = fdiv float 1.000000e+00, %299, !fpmath !1
>  %301 = fmul float %295, %300
>  %302 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %303 = load <16 x i8>, <16 x i8> addrspace(2)* %302, align 16, !invariant.load !0
>  %304 = call float @llvm.SI.load.const(<16 x i8> %303, i32 92)
>  %305 = call float @llvm.floor.f32(float %304)
>  %306 = fsub float %304, %305
>  %307 = fmul float %306, 8.000000e+00
>  %308 = call float @llvm.pow.f32(float %301, float %307)
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = fmul float %290, %309
>  %311 = call float @llvm.maxnum.f32(float %86, float %89)
>  %312 = fmul float %311, 0x3FB99999A0000000
>  %313 = fsub float %182, %312
>  %314 = call float @llvm.AMDGPU.clamp.(float %313, float 0.000000e+00, float 1.000000e+00)
>  %315 = fmul float %126, %314
>  %316 = fmul float %252, %85
>  %317 = fmul float %253, %85
>  %318 = fmul float %254, %85
>  %319 = fmul float %271, %84
>  %320 = fadd float %319, %316
>  %321 = fmul float %272, %84
>  %322 = fadd float %321, %317
>  %323 = fmul float %273, %84
>  %324 = fadd float %323, %318
>  %325 = fmul float %252, %90
>  %326 = fmul float %253, %90
>  %327 = fmul float %254, %90
>  %328 = fmul float %271, %85
>  %329 = fadd float %328, %325
>  %330 = fmul float %272, %85
>  %331 = fadd float %330, %326
>  %332 = fmul float %273, %85
>  %333 = fadd float %332, %327
>  %334 = bitcast i32 %12 to float
>  %335 = insertvalue <{ float, float, float }> undef, float %334, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %129, float %130, float %124, float %315)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %329, float %331, float %333, float %320)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %322, float %324, float %201, float %205)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %310, float %120, float %121, float %122)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %221, float %222, float %223, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %176, float %180, float %182, float %184)
>  ret <{ float, float, float }> %335
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE
>DCL IN[4].xyz, GENERIC[4], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], 2D, FLOAT
>DCL CONST[0..22]
>DCL TEMP[0..5], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.8000}
>IMM[1] FLT32 {    0.2000,     4.0000,     0.0005,     0.0000}
>  0: MOV TEMP[0].x, IN[1].wwww
>  1: MOV TEMP[0].yz, IN[2].yxyy
>  2: MOV TEMP[1].xy, IN[2].zwww
>  3: TEX TEMP[1], TEMP[1], SAMP[2], 2D
>  4: MAD TEMP[2].xyz, TEMP[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  5: MUL TEMP[3].xyz, TEMP[0].xyzz, TEMP[2].xxxx
>  6: MAD TEMP[3].xyz, IN[1].xyzz, TEMP[2].yyyy, TEMP[3].xyzz
>  7: MAD TEMP[2].xyz, IN[4].xyzz, TEMP[2].zzzz, TEMP[3].xyzz
>  8: MUL TEMP[1].x, IN[0].wwww, TEMP[1].wwww
>  9: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 10: MAD TEMP[3].xyz, CONST[0].xyzz, IMM[0].xxxx, IN[3].yzww
> 11: MOV TEMP[4].xyz, TEMP[2].xyzz
> 12: TEX TEMP[4], TEMP[4], SAMP[1], CUBE
> 13: MUL TEMP[5], CONST[19], TEMP[3].xxxx
> 14: MAD TEMP[5], CONST[20], TEMP[3].yyyy, TEMP[5]
> 15: MAD TEMP[3], CONST[21], TEMP[3].zzzz, TEMP[5]
> 16: ADD TEMP[3], TEMP[3], CONST[22]
> 17: DP3 TEMP[2].x, -CONST[0].xyzz, TEMP[2].xyzz
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[1].xxxx
> 19: MAD TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww, IMM[1].xxxx
> 20: ADD TEMP[2].x, TEMP[2].xxxx, TEMP[5].xxxx
> 21: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 22: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[4].wwww
> 23: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 24: TXP TEMP[3].x, TEMP[3], SAMP[0], SHADOW2D
> 25: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 26: MUL TEMP[2].xyz, TEMP[2].xxxx, CONST[2].xyzz
> 27: MAD TEMP[2].xyz, TEMP[4].xyzz, IMM[1].yyyy, TEMP[2].xyzz
> 28: MUL TEMP[0].xyz, IN[0].xyzz, TEMP[2].xyzz
> 29: FSLT TEMP[2].x, TEMP[1].xxxx, IMM[1].zzzz
> 30: AND TEMP[2].x, TEMP[2].xxxx, IMM[0].zzzz
> 31: KILL_IF -TEMP[2].xxxx
> 32: LRP TEMP[0].xyz, IN[3].xxxx, TEMP[0].xyzz, CONST[1].xyzz
> 33: MOV TEMP[0].xyz, TEMP[0].xyzx
> 34: MOV TEMP[0].w, TEMP[1].xxxx
> 35: MOV OUT[0], TEMP[0]
> 36: END
>radeonsi: Compiling shader 75
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %28 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %29 = load <8 x i32>, <8 x i32> addrspace(2)* %28, align 32, !invariant.load !0
>  %30 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %31 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %30, i64 0, i64 11, !amdgpu.uniform !0
>  %32 = load <4 x i32>, <4 x i32> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = extractelement <8 x i32> %29, i32 7
>  %34 = extractelement <4 x i32> %32, i32 0
>  %35 = and i32 %34, %33
>  %36 = insertelement <4 x i32> %32, i32 %35, i32 0
>  %37 = bitcast float %26 to i32
>  %38 = bitcast float %27 to i32
>  %39 = insertelement <2 x i32> undef, i32 %37, i32 0
>  %40 = insertelement <2 x i32> %39, i32 %38, i32 1
>  %41 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %40, <8 x i32> %29, <4 x i32> %36, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %42 = extractelement <4 x float> %41, i32 0
>  %43 = extractelement <4 x float> %41, i32 1
>  %44 = extractelement <4 x float> %41, i32 2
>  %45 = extractelement <4 x float> %41, i32 3
>  %46 = fmul float %42, 2.000000e+00
>  %47 = fadd float %46, -1.000000e+00
>  %48 = fmul float %43, 2.000000e+00
>  %49 = fadd float %48, -1.000000e+00
>  %50 = fmul float %44, 2.000000e+00
>  %51 = fadd float %50, -1.000000e+00
>  %52 = fmul float %23, %47
>  %53 = fmul float %24, %47
>  %54 = fmul float %25, %47
>  %55 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %56 = fmul float %55, %49
>  %57 = fadd float %56, %52
>  %58 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %59 = fmul float %58, %49
>  %60 = fadd float %59, %53
>  %61 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %62 = fmul float %61, %49
>  %63 = fadd float %62, %54
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %8)
>  %65 = fmul float %64, %51
>  %66 = fadd float %65, %57
>  %67 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %8)
>  %68 = fmul float %67, %51
>  %69 = fadd float %68, %60
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %8)
>  %71 = fmul float %70, %51
>  %72 = fadd float %71, %63
>  %73 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %74 = fmul float %73, %45
>  %75 = call float @llvm.AMDGPU.clamp.(float %74, float 0.000000e+00, float 1.000000e+00)
>  %76 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %77 = load <16 x i8>, <16 x i8> addrspace(2)* %76, align 16, !invariant.load !0
>  %78 = call float @llvm.SI.load.const(<16 x i8> %77, i32 0)
>  %79 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %8)
>  %80 = fmul float %78, 2.000000e+00
>  %81 = fadd float %80, %79
>  %82 = call float @llvm.SI.load.const(<16 x i8> %77, i32 4)
>  %83 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %8)
>  %84 = fmul float %82, 2.000000e+00
>  %85 = fadd float %84, %83
>  %86 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %87 = load <16 x i8>, <16 x i8> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = call float @llvm.SI.load.const(<16 x i8> %87, i32 8)
>  %89 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %8)
>  %90 = fmul float %88, 2.000000e+00
>  %91 = fadd float %90, %89
>  %92 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %93 = load <8 x i32>, <8 x i32> addrspace(2)* %92, align 32, !invariant.load !0
>  %94 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %95 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %94, i64 0, i64 7, !amdgpu.uniform !0
>  %96 = load <4 x i32>, <4 x i32> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = extractelement <8 x i32> %93, i32 7
>  %98 = extractelement <4 x i32> %96, i32 0
>  %99 = and i32 %98, %97
>  %100 = insertelement <4 x i32> %96, i32 %99, i32 0
>  %101 = call float @llvm.amdgcn.cubetc(float %66, float %69, float %72)
>  %102 = call float @llvm.amdgcn.cubesc(float %66, float %69, float %72)
>  %103 = call float @llvm.amdgcn.cubema(float %66, float %69, float %72)
>  %104 = call float @llvm.amdgcn.cubeid(float %66, float %69, float %72)
>  %105 = call float @llvm.fabs.f32(float %103)
>  %106 = fdiv float 1.000000e+00, %105, !fpmath !1
>  %107 = fmul float %101, %106
>  %108 = fadd float %107, 1.500000e+00
>  %109 = fmul float %102, %106
>  %110 = fadd float %109, 1.500000e+00
>  %111 = bitcast float %110 to i32
>  %112 = bitcast float %108 to i32
>  %113 = bitcast float %104 to i32
>  %114 = insertelement <4 x i32> undef, i32 %111, i32 0
>  %115 = insertelement <4 x i32> %114, i32 %112, i32 1
>  %116 = insertelement <4 x i32> %115, i32 %113, i32 2
>  %117 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %116, <8 x i32> %93, <4 x i32> %100, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %118 = extractelement <4 x float> %117, i32 0
>  %119 = extractelement <4 x float> %117, i32 1
>  %120 = extractelement <4 x float> %117, i32 2
>  %121 = extractelement <4 x float> %117, i32 3
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = call float @llvm.SI.load.const(<16 x i8> %123, i32 304)
>  %125 = fmul float %124, %81
>  %126 = call float @llvm.SI.load.const(<16 x i8> %123, i32 308)
>  %127 = fmul float %126, %81
>  %128 = call float @llvm.SI.load.const(<16 x i8> %123, i32 312)
>  %129 = fmul float %128, %81
>  %130 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %131 = load <16 x i8>, <16 x i8> addrspace(2)* %130, align 16, !invariant.load !0
>  %132 = call float @llvm.SI.load.const(<16 x i8> %131, i32 316)
>  %133 = fmul float %132, %81
>  %134 = call float @llvm.SI.load.const(<16 x i8> %131, i32 320)
>  %135 = fmul float %134, %85
>  %136 = fadd float %135, %125
>  %137 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %138 = load <16 x i8>, <16 x i8> addrspace(2)* %137, align 16, !invariant.load !0
>  %139 = call float @llvm.SI.load.const(<16 x i8> %138, i32 324)
>  %140 = fmul float %139, %85
>  %141 = fadd float %140, %127
>  %142 = call float @llvm.SI.load.const(<16 x i8> %138, i32 328)
>  %143 = fmul float %142, %85
>  %144 = fadd float %143, %129
>  %145 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %146 = load <16 x i8>, <16 x i8> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = call float @llvm.SI.load.const(<16 x i8> %146, i32 332)
>  %148 = fmul float %147, %85
>  %149 = fadd float %148, %133
>  %150 = call float @llvm.SI.load.const(<16 x i8> %146, i32 336)
>  %151 = fmul float %150, %91
>  %152 = fadd float %151, %136
>  %153 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %154 = load <16 x i8>, <16 x i8> addrspace(2)* %153, align 16, !invariant.load !0
>  %155 = call float @llvm.SI.load.const(<16 x i8> %154, i32 340)
>  %156 = fmul float %155, %91
>  %157 = fadd float %156, %141
>  %158 = call float @llvm.SI.load.const(<16 x i8> %154, i32 344)
>  %159 = fmul float %158, %91
>  %160 = fadd float %159, %144
>  %161 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %162 = load <16 x i8>, <16 x i8> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = call float @llvm.SI.load.const(<16 x i8> %162, i32 348)
>  %164 = fmul float %163, %91
>  %165 = fadd float %164, %149
>  %166 = call float @llvm.SI.load.const(<16 x i8> %162, i32 352)
>  %167 = fadd float %152, %166
>  %168 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %169 = load <16 x i8>, <16 x i8> addrspace(2)* %168, align 16, !invariant.load !0
>  %170 = call float @llvm.SI.load.const(<16 x i8> %169, i32 356)
>  %171 = fadd float %157, %170
>  %172 = call float @llvm.SI.load.const(<16 x i8> %169, i32 360)
>  %173 = fadd float %160, %172
>  %174 = call float @llvm.SI.load.const(<16 x i8> %169, i32 364)
>  %175 = fadd float %165, %174
>  %176 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %177 = load <16 x i8>, <16 x i8> addrspace(2)* %176, align 16, !invariant.load !0
>  %178 = call float @llvm.SI.load.const(<16 x i8> %177, i32 0)
>  %179 = call float @llvm.SI.load.const(<16 x i8> %177, i32 4)
>  %180 = call float @llvm.SI.load.const(<16 x i8> %177, i32 8)
>  %181 = fmul float %178, %66
>  %182 = fsub float -0.000000e+00, %181
>  %183 = fmul float %179, %69
>  %184 = fsub float %182, %183
>  %185 = fmul float %180, %72
>  %186 = fsub float %184, %185
>  %187 = fsub float 1.000000e+00, %75
>  %188 = fmul float %187, 0x3FE99999A0000000
>  %189 = fadd float %188, 0x3FC99999A0000000
>  %190 = fadd float %186, %189
>  %191 = call float @llvm.AMDGPU.clamp.(float %190, float 0.000000e+00, float 1.000000e+00)
>  %192 = fmul float %118, %121
>  %193 = fmul float %119, %121
>  %194 = fmul float %120, %121
>  %195 = fmul float %191, %191
>  %196 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %197 = load <8 x i32>, <8 x i32> addrspace(2)* %196, align 32, !invariant.load !0
>  %198 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %199 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %198, i64 0, i64 3, !amdgpu.uniform !0
>  %200 = load <4 x i32>, <4 x i32> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = extractelement <8 x i32> %197, i32 7
>  %202 = extractelement <4 x i32> %200, i32 0
>  %203 = and i32 %202, %201
>  %204 = insertelement <4 x i32> %200, i32 %203, i32 0
>  %205 = fdiv float %167, %175, !fpmath !1
>  %206 = fdiv float %171, %175, !fpmath !1
>  %207 = fdiv float %173, %175, !fpmath !1
>  %208 = bitcast float %207 to i32
>  %209 = bitcast float %205 to i32
>  %210 = bitcast float %206 to i32
>  %211 = insertelement <4 x i32> undef, i32 %208, i32 0
>  %212 = insertelement <4 x i32> %211, i32 %209, i32 1
>  %213 = insertelement <4 x i32> %212, i32 %210, i32 2
>  %214 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %213, <8 x i32> %197, <4 x i32> %204, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %215 = extractelement <4 x float> %214, i32 0
>  %216 = fmul float %195, %215
>  %217 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %218 = load <16 x i8>, <16 x i8> addrspace(2)* %217, align 16, !invariant.load !0
>  %219 = call float @llvm.SI.load.const(<16 x i8> %218, i32 32)
>  %220 = fmul float %216, %219
>  %221 = call float @llvm.SI.load.const(<16 x i8> %218, i32 36)
>  %222 = fmul float %216, %221
>  %223 = call float @llvm.SI.load.const(<16 x i8> %218, i32 40)
>  %224 = fmul float %216, %223
>  %225 = fmul float %192, 4.000000e+00
>  %226 = fadd float %225, %220
>  %227 = fmul float %193, 4.000000e+00
>  %228 = fadd float %227, %222
>  %229 = fmul float %194, 4.000000e+00
>  %230 = fadd float %229, %224
>  %231 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %232 = fmul float %231, %226
>  %233 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %234 = fmul float %233, %228
>  %235 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %236 = fmul float %235, %230
>  %237 = fcmp olt float %75, 0x3F3FFFFEE0000000
>  %238 = select i1 %237, float -1.000000e+00, float 0.000000e+00
>  call void @llvm.AMDGPU.kill(float %238)
>  %239 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %240 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %241 = load <16 x i8>, <16 x i8> addrspace(2)* %240, align 16, !invariant.load !0
>  %242 = call float @llvm.SI.load.const(<16 x i8> %241, i32 16)
>  %243 = fsub float 1.000000e+00, %239
>  %244 = fmul float %232, %239
>  %245 = fmul float %242, %243
>  %246 = fadd float %244, %245
>  %247 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %248 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %249 = load <16 x i8>, <16 x i8> addrspace(2)* %248, align 16, !invariant.load !0
>  %250 = call float @llvm.SI.load.const(<16 x i8> %249, i32 20)
>  %251 = fsub float 1.000000e+00, %247
>  %252 = fmul float %234, %247
>  %253 = fmul float %250, %251
>  %254 = fadd float %252, %253
>  %255 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 24)
>  %259 = fsub float 1.000000e+00, %255
>  %260 = fmul float %236, %255
>  %261 = fmul float %258, %259
>  %262 = fadd float %260, %261
>  %263 = bitcast float %5 to i32
>  %264 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %263, 10
>  %265 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %264, float %246, 11
>  %266 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %265, float %254, 12
>  %267 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %266, float %262, 13
>  %268 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %267, float %75, 14
>  %269 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %268, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %269
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind
>declare void @llvm.AMDGPU.kill(float) #2
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v0, 0xc7000000                          ; 7E0002FF C7000000
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s7, s[0:3], 0x10                  ; C2038110
>	s_buffer_load_dword s8, s[0:3], 0x11                  ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                  ; C2048112
>	s_buffer_load_dword s6, s[0:3], 0x39f                 ; C20300FF 0000039F
>	s_buffer_load_dword s5, s[0:3], 0x39e                 ; C20280FF 0000039E
>	s_buffer_load_dword s4, s[0:3], 0x22                  ; C2020122
>	s_buffer_load_dword s11, s[0:3], 0x2                  ; C2058102
>	s_buffer_load_dword s14, s[0:3], 0x6                  ; C2070106
>	s_buffer_load_dword s10, s[0:3], 0x13                 ; C2050113
>	s_buffer_load_dword s18, s[0:3], 0x18                 ; C2090118
>	s_buffer_load_dword s19, s[0:3], 0x19                 ; C2098119
>	s_buffer_load_dword s20, s[0:3], 0x1a                 ; C20A011A
>	s_buffer_load_dword s12, s[0:3], 0x3                  ; C2060103
>	s_buffer_load_dword s13, s[0:3], 0x4                  ; C2068104
>	s_buffer_load_dword s15, s[0:3], 0x7                  ; C2078107
>	s_buffer_load_dword s16, s[0:3], 0x8                  ; C2080108
>	s_buffer_load_dword s17, s[0:3], 0x9                  ; C2088109
>	v_add_f32_e32 v3, 0.5, v6                             ; 06060CF0
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v1, v8                              ; 7E021108
>	v_add_f32_e32 v4, 0.5, v7                             ; 06080EF0
>	v_lshlrev_b32_e32 v1, 4, v1                           ; 34020284
>	v_add_i32_e32 v5, vcc, 0x90, v1                       ; 4A0A02FF 00000090
>	v_add_i32_e32 v8, vcc, 0x94, v1                       ; 4A1002FF 00000094
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	v_add_i32_e32 v9, vcc, 0x98, v1                       ; 4A1202FF 00000098
>	buffer_load_dword v8, v8, s[0:3], 0 offen             ; E0301000 80000808
>	buffer_load_dword v9, v9, s[0:3], 0 offen             ; E0301000 80000909
>	v_add_i32_e32 v11, vcc, 0xac, v1                      ; 4A1602FF 000000AC
>	buffer_load_dword v11, v11, s[0:3], 0 offen           ; E0301000 80000B0B
>	v_add_i32_e32 v10, vcc, 0xa8, v1                      ; 4A1402FF 000000A8
>	buffer_load_dword v10, v10, s[0:3], 0 offen           ; E0301000 80000A0A
>	s_waitcnt vmcnt(4) lgkmcnt(0)                         ; BF8C0074
>	v_sub_f32_e32 v12, s7, v5                             ; 08180A07
>	v_mul_f32_e32 v15, v12, v12                           ; 101E190C
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_sub_f32_e32 v13, s8, v8                             ; 081A1008
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_sub_f32_e32 v14, s9, v9                             ; 081C1209
>	v_mac_f32_e32 v15, v13, v13                           ; 3E1E1B0D
>	v_mac_f32_e32 v15, v14, v14                           ; 3E1E1D0E
>	v_sqrt_f32_e32 v17, v15                               ; 7E22670F
>	v_log_f32_e32 v17, v17                                ; 7E224F11
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_add_f32_e32 v11, 0xc7800000, v11                    ; 061616FF C7800000
>	v_floor_f32_e32 v16, v11                              ; 7E20490B
>	v_subrev_f32_e32 v16, v16, v11                        ; 0A201710
>	v_mul_legacy_f32_e32 v17, s6, v17                     ; 0E222206
>	v_subrev_f32_e32 v11, v16, v11                        ; 0A161710
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_add_f32_e32 v10, 0xc6000000, v10                    ; 061414FF C6000000
>	v_exp_f32_e32 v17, v17                                ; 7E224B11
>	v_mul_f32_e32 v11, 0x3a800000, v11                    ; 101616FF 3A800000
>	v_mul_f32_e32 v10, v17, v10                           ; 10141511
>	v_mul_f32_e32 v11, v17, v11                           ; 10161711
>	v_floor_f32_e32 v17, s5                               ; 7E224805
>	v_sub_f32_e32 v17, s5, v17                            ; 08222205
>	v_sub_f32_e32 v18, s5, v17                            ; 08242205
>	v_mul_f32_e32 v19, v18, v16                           ; 10262112
>	v_floor_f32_e32 v19, v19                              ; 7E264913
>	v_mad_f32 v19, v16, v18, -v19                         ; D2820013 844E2510
>	v_mad_f32 v16, v16, v18, -v19                         ; D2820010 844E2510
>	v_mac_f32_e32 v19, v17, v3                            ; 3E260711
>	v_add_i32_e32 v3, vcc, 0xa0, v1                       ; 4A0602FF 000000A0
>	v_add_i32_e32 v17, vcc, 0xa4, v1                      ; 4A2202FF 000000A4
>	buffer_load_dword v3, v3, s[0:3], 0 offen             ; E0301000 80000303
>	v_add_i32_e32 v1, vcc, 0x9c, v1                       ; 4A0202FF 0000009C
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v1, v1, s[0:3], 0 offen             ; E0301000 80000101
>	v_rcp_f32_e32 v18, v18                                ; 7E245512
>	v_rsq_f32_e32 v15, v15                                ; 7E1E5D0F
>	s_buffer_load_dword s9, s[0:3], 0x21                  ; C2048121
>	s_buffer_load_dword s5, s[0:3], 0x1c                  ; C202811C
>	v_mad_f32 v4, -v4, v18, v18                           ; D2820004 244A2504
>	v_mac_f32_e32 v4, v18, v16                            ; 3E082112
>	s_buffer_load_dword s6, s[0:3], 0x1d                  ; C203011D
>	s_buffer_load_dword s7, s[0:3], 0x1e                  ; C203811E
>	s_buffer_load_dword s8, s[0:3], 0x20                  ; C2040120
>	v_mul_f32_e32 v7, v11, v7                             ; 100E0F0B
>	v_mul_f32_e32 v6, v10, v6                             ; 100C0D0A
>	v_mul_f32_e32 v14, v15, v14                           ; 101C1D0F
>	v_max_f32_e32 v10, v11, v10                           ; 2014150B
>	v_mul_f32_e32 v12, v15, v12                           ; 1018190F
>	v_mul_f32_e32 v13, v15, v13                           ; 101A1B0F
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v15, s9, v14                            ; 101E1C09
>	v_mad_f32 v15, v13, s4, -v15                          ; D282000F 843C090D
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_add_f32_e32 v3, v0, v3                              ; 06060700
>	v_floor_f32_e32 v16, v3                               ; 7E204903
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_add_f32_e32 v0, v0, v17                             ; 06002300
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_add_f32_e32 v1, 0xc6008000, v1                      ; 060202FF C6008000
>	v_floor_f32_e32 v18, v0                               ; 7E244900
>	v_mul_f32_e32 v1, 0x3e22f983, v1                      ; 100202FF 3E22F983
>	v_subrev_f32_e32 v16, v16, v3                         ; 0A200710
>	v_subrev_f32_e32 v18, v18, v0                         ; 0A240112
>	v_mov_b32_e32 v17, 0x3b808081                         ; 7E2202FF 3B808081
>	v_subrev_f32_e32 v3, v16, v3                          ; 0A060710
>	v_subrev_f32_e32 v0, v18, v0                          ; 0A000112
>	v_fract_f32_e32 v1, v1                                ; 7E024101
>	v_mul_f32_e32 v3, v17, v3                             ; 10060711
>	v_mul_f32_e32 v0, v17, v0                             ; 10000111
>	v_sin_f32_e32 v17, v1                                 ; 7E226B01
>	v_cos_f32_e32 v1, v1                                  ; 7E026D01
>	v_mul_f32_e32 v11, v17, v7                            ; 10160F11
>	v_mad_f32 v11, v1, v6, -v11                           ; D282000B 842E0D01
>	v_mul_f32_e32 v6, v6, v17                             ; 100C2306
>	v_mac_f32_e32 v6, v7, v1                              ; 3E0C0307
>	v_mac_f32_e32 v5, s5, v11                             ; 3E0A1605
>	v_mac_f32_e32 v8, s6, v11                             ; 3E101606
>	v_mac_f32_e32 v9, s7, v11                             ; 3E121607
>	v_mul_f32_e32 v7, s4, v12                             ; 100E1804
>	v_mul_f32_e32 v11, s8, v13                            ; 10161A08
>	v_mac_f32_e32 v9, s4, v6                              ; 3E120C04
>	v_mad_f32 v7, v14, s8, -v7                            ; D2820007 841C110E
>	v_mac_f32_e32 v5, s8, v6                              ; 3E0A0C08
>	v_mac_f32_e32 v8, s9, v6                              ; 3E100C09
>	v_mul_f32_e32 v6, v15, v15                            ; 100C1F0F
>	v_mad_f32 v11, v12, s9, -v11                          ; D282000B 842C130C
>	v_mac_f32_e32 v6, v7, v7                              ; 3E0C0F07
>	v_mac_f32_e32 v6, v11, v11                            ; 3E0C170B
>	v_rsq_f32_e32 v6, v6                                  ; 7E0C5D06
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s8, s[0:3], 0xe                   ; C204010E
>	s_buffer_load_dword s5, s[0:3], 0xb                   ; C202810B
>	v_mul_f32_e32 v15, v6, v15                            ; 101E1F06
>	v_mul_f32_e32 v7, v6, v7                              ; 100E0F06
>	v_mul_f32_e32 v6, v6, v11                             ; 100C1706
>	v_mul_f32_e32 v11, s11, v5                            ; 10160A0B
>	v_mac_f32_e32 v11, s14, v8                            ; 3E16100E
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v11, s4, v9                             ; 3E161204
>	v_add_f32_e32 v11, s8, v11                            ; 06161608
>	v_mov_b32_e32 v20, v11                                ; 7E28030B
>	v_mac_f32_e32 v20, 0xbdcccccd, v10                    ; 3E2814FF BDCCCCCD
>	v_add_f32_e64 v10, v20, 0 clamp                       ; D206080A 00010114
>	v_mul_f32_e32 v10, v10, v18                           ; 1014250A
>	v_mul_f32_e32 v18, v13, v6                            ; 10240D0D
>	exp 15, 32, 0, 0, 0, v3, v0, v16, v10                 ; F800020F 0A100003
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mul_f32_e32 v0, v14, v15                            ; 10001F0E
>	v_mad_f32 v10, v7, v14, -v18                          ; D282000A 844A1D07
>	v_mul_f32_e32 v3, v12, v7                             ; 10060F0C
>	v_mad_f32 v0, v6, v12, -v0                            ; D2820000 84021906
>	v_mul_f32_e32 v16, v10, v10                           ; 1020150A
>	v_mad_f32 v3, v15, v13, -v3                           ; D2820003 840E1B0F
>	v_mac_f32_e32 v16, v0, v0                             ; 3E200100
>	v_mac_f32_e32 v16, v3, v3                             ; 3E200703
>	v_rsq_f32_e32 v16, v16                                ; 7E205D10
>	s_buffer_load_dword s14, s[0:3], 0x17                 ; C2070117
>	v_mul_f32_e32 v18, v1, v15                            ; 10241F01
>	v_mul_f32_e32 v15, v17, v15                           ; 101E1F11
>	v_mul_f32_e32 v10, v16, v10                           ; 10141510
>	v_mul_f32_e32 v0, v16, v0                             ; 10000110
>	v_mul_f32_e32 v3, v16, v3                             ; 10060710
>	v_mul_f32_e32 v16, v1, v7                             ; 10200F01
>	v_mul_f32_e32 v7, v17, v7                             ; 100E0F11
>	v_mac_f32_e32 v16, v17, v0                            ; 3E200111
>	v_mad_f32 v0, v0, v1, -v7                             ; D2820000 841E0300
>	v_mov_b32_e32 v7, s10                                 ; 7E0E020A
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_sub_f32_e32 v7, s14, v7                             ; 080E0E0E
>	v_add_f32_e32 v7, 0x3a83126f, v7                      ; 060E0EFF 3A83126F
>	v_rcp_f32_e32 v7, v7                                  ; 7E0E5507
>	v_mul_f32_e32 v20, v1, v6                             ; 10280D01
>	v_mac_f32_e32 v18, v17, v10                           ; 3E241511
>	v_mad_f32 v10, v10, v1, -v15                          ; D282000A 843E030A
>	v_mov_b32_e32 v15, s18                                ; 7E1E0212
>	v_mul_f32_e32 v6, v17, v6                             ; 100C0D11
>	v_mad_f32 v1, v3, v1, -v6                             ; D2820001 841A0303
>	v_subrev_f32_e32 v6, s10, v8                          ; 0A0C100A
>	v_mac_f32_e32 v15, s19, v11                           ; 3E1E1613
>	v_max_f32_e32 v6, 0, v6                               ; 200C0C80
>	v_add_f32_e64 v15, v15, 0 clamp                       ; D206080F 0001010F
>	v_mul_f32_e32 v6, v7, v6                              ; 100C0D07
>	v_log_f32_e32 v15, v15                                ; 7E1E4F0F
>	s_buffer_load_dword s6, s[0:3], 0xc                   ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                   ; C203810D
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	s_buffer_load_dword s8, s[0:3], 0x1                   ; C2040101
>	s_buffer_load_dword s9, s[0:3], 0x5                   ; C2048105
>	s_buffer_load_dword s11, s[0:3], 0xf                  ; C205810F
>	s_buffer_load_dword s0, s[0:3], 0x1b                  ; C200011B
>	v_log_f32_e32 v6, v6                                  ; 7E0C4F06
>	v_floor_f32_e32 v7, s14                               ; 7E0E480E
>	v_sub_f32_e32 v7, s14, v7                             ; 080E0E0E
>	v_mul_legacy_f32_e32 v15, s20, v15                    ; 0E1E1E14
>	v_mul_f32_e32 v7, 0x41000000, v7                      ; 100E0EFF 41000000
>	v_mul_legacy_f32_e32 v6, v7, v6                       ; 0E0C0D07
>	v_mac_f32_e32 v20, v17, v3                            ; 3E280711
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_sub_f32_e64 v3, 1.0, s0                             ; D2080003 000000F2
>	v_exp_f32_e32 v15, v15                                ; 7E1E4B0F
>	v_mac_f32_e32 v3, s0, v15                             ; 3E061E00
>	v_exp_f32_e32 v6, v6                                  ; 7E0C4B06
>	v_mul_f32_e32 v3, v3, v3                              ; 10060703
>	v_add_f32_e64 v6, v6, 0 clamp                         ; D2060806 00010106
>	v_mul_f32_e32 v7, s4, v5                              ; 100E0A04
>	v_mul_f32_e32 v15, s8, v5                             ; 101E0A08
>	v_mul_f32_e32 v3, v6, v3                              ; 10060706
>	v_mul_f32_e32 v6, s12, v5                             ; 100C0A0C
>	exp 15, 33, 0, 0, 0, v10, v0, v1, v18                 ; F800021F 1201000A
>	v_mac_f32_e32 v7, s13, v8                             ; 3E0E100D
>	v_mac_f32_e32 v15, s9, v8                             ; 3E1E1009
>	v_mac_f32_e32 v6, s15, v8                             ; 3E0C100F
>	exp 15, 34, 0, 0, 0, v16, v20, v19, v4                ; F800022F 04131410
>	v_mac_f32_e32 v7, s16, v9                             ; 3E0E1210
>	v_mac_f32_e32 v15, s17, v9                            ; 3E1E1211
>	v_mac_f32_e32 v6, s5, v9                              ; 3E0C1205
>	exp 15, 35, 0, 0, 0, v3, v5, v8, v9                   ; F800023F 09080503
>	v_add_f32_e32 v7, s6, v7                              ; 060E0E06
>	v_add_f32_e32 v15, s7, v15                            ; 061E1E07
>	v_add_f32_e32 v6, s11, v6                             ; 060C0C0B
>	exp 15, 36, 0, 0, 0, v12, v13, v14, v0                ; F800024F 000E0D0C
>	exp 15, 12, 0, 1, 0, v7, v15, v11, v6                 ; F80008CF 060B0F07
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1128 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                    ; BE80047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v4, v2, 3, 1, [m0]                        ; C8100702
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[20:23], s[4:5], 0xc                      ; C08A050C
>	s_load_dwordx8 s[24:31], s[4:5], 0x10                     ; C0CC0510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                     ; C090051C
>	s_load_dwordx8 s[36:43], s[4:5], 0x20                     ; C0D20520
>	s_load_dwordx4 s[4:7], s[4:5], 0x2c                       ; C082052C
>	v_interp_p2_f32 v4, [v4], v3, 3, 1, [m0]                  ; C8110703
>	v_interp_p1_f32 v10, v2, 0, 2, [m0]                       ; C8280802
>	v_interp_p2_f32 v10, [v10], v3, 0, 2, [m0]                ; C8290803
>	v_interp_p1_f32 v11, v2, 1, 2, [m0]                       ; C82C0902
>	v_interp_p2_f32 v11, [v11], v3, 1, 2, [m0]                ; C82D0903
>	v_interp_p1_f32 v0, v2, 2, 2, [m0]                        ; C8000A02
>	v_interp_p2_f32 v0, [v0], v3, 2, 2, [m0]                  ; C8010A03
>	v_interp_p1_f32 v1, v2, 3, 2, [m0]                        ; C8040B02
>	v_interp_p2_f32 v1, [v1], v3, 3, 2, [m0]                  ; C8050B03
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s4, s4, s43                                     ; 87042B04
>	image_sample v[6:9], v[0:1], s[36:43], s[4:7] dmask:0xf   ; F0800F00 00290600
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_add_f32_e32 v0, v6, v6                                  ; 06000D06
>	v_mad_f32 v14, v0, v4, -v4                                ; D282000E 84120900
>	v_interp_p1_f32 v4, v2, 0, 1, [m0]                        ; C8100402
>	v_mad_f32 v1, 2.0, v7, -1.0                               ; D2820001 03CE0EF4
>	v_interp_p2_f32 v4, [v4], v3, 0, 1, [m0]                  ; C8110403
>	v_mac_f32_e32 v14, v1, v4                                 ; 3E1C0901
>	v_interp_p1_f32 v4, v2, 1, 1, [m0]                        ; C8100502
>	v_mad_f32 v10, v0, v10, -v10                              ; D282000A 842A1500
>	v_interp_p2_f32 v4, [v4], v3, 1, 1, [m0]                  ; C8110503
>	v_mac_f32_e32 v10, v1, v4                                 ; 3E140901
>	v_interp_p1_f32 v4, v2, 2, 1, [m0]                        ; C8100602
>	v_mad_f32 v0, v0, v11, -v11                               ; D2820000 842E1700
>	v_interp_p2_f32 v4, [v4], v3, 2, 1, [m0]                  ; C8110603
>	v_mac_f32_e32 v0, v1, v4                                  ; 3E000901
>	v_interp_p1_f32 v1, v2, 0, 4, [m0]                        ; C8041002
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                        ; C0820300
>	v_mad_f32 v6, 2.0, v8, -1.0                               ; D2820006 03CE10F4
>	v_interp_p2_f32 v1, [v1], v3, 0, 4, [m0]                  ; C8051003
>	v_mac_f32_e32 v14, v6, v1                                 ; 3E1C0306
>	v_interp_p1_f32 v1, v2, 1, 4, [m0]                        ; C8041102
>	v_interp_p2_f32 v1, [v1], v3, 1, 4, [m0]                  ; C8051103
>	v_mac_f32_e32 v10, v6, v1                                 ; 3E140306
>	v_interp_p1_f32 v1, v2, 2, 4, [m0]                        ; C8041202
>	v_interp_p2_f32 v1, [v1], v3, 2, 4, [m0]                  ; C8051203
>	v_mac_f32_e32 v0, v6, v1                                  ; 3E000306
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                        ; C8040302
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_buffer_load_dword s2, s[4:7], 0x0                       ; C2010500
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]                  ; C8050303
>	s_buffer_load_dword s9, s[4:7], 0x4c                      ; C204854C
>	v_mul_f32_e32 v1, v9, v1                                  ; 10020309
>	v_add_f32_e64 v4, v1, 0 clamp                             ; D2060804 00010101
>	v_interp_p1_f32 v1, v2, 1, 3, [m0]                        ; C8040D02
>	v_interp_p2_f32 v1, [v1], v3, 1, 3, [m0]                  ; C8050D03
>	v_cubema_f32 v15, v14, v10, v0                            ; D28E000F 0402150E
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mac_f32_e64 v1, 2.0, s2                                 ; D23E0001 000004F4
>	s_buffer_load_dword s36, s[4:7], 0x4d                     ; C212054D
>	v_rcp_f32_e64 v15, |v15|                                  ; D354010F 0000010F
>	v_mul_f32_e32 v16, s9, v1                                 ; 10200209
>	s_buffer_load_dword s9, s[4:7], 0x4e                      ; C204854E
>	v_interp_p1_f32 v9, v2, 2, 3, [m0]                        ; C8240E02
>	v_mov_b32_e32 v5, 0x3fc00000                              ; 7E0A02FF 3FC00000
>	v_cubetc_f32 v6, v14, v10, v0                             ; D28C0006 0402150E
>	s_buffer_load_dword s3, s[4:7], 0x1                       ; C2018501
>	v_cubesc_f32 v8, v14, v10, v0                             ; D28A0008 0402150E
>	v_interp_p2_f32 v9, [v9], v3, 2, 3, [m0]                  ; C8250E03
>	v_interp_p1_f32 v11, v2, 3, 3, [m0]                       ; C82C0F02
>	v_mad_f32 v6, v15, v6, v5                                 ; D2820006 04160D0F
>	v_mac_f32_e32 v5, v15, v8                                 ; 3E0A110F
>	s_and_b32 s32, s32, s31                                   ; 87201F20
>	s_buffer_load_dword s8, s[4:7], 0x2                       ; C2040502
>	v_cubeid_f32 v7, v14, v10, v0                             ; D2880007 0402150E
>	s_buffer_load_dword s39, s[4:7], 0x52                     ; C2138552
>	v_interp_p2_f32 v11, [v11], v3, 3, 3, [m0]                ; C82D0F03
>	image_sample v[5:8], v[5:8], s[24:31], s[32:35] dmask:0xf ; F0800F00 01060505
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v17, s36, v1                                ; 10220224
>	s_buffer_load_dword s36, s[4:7], 0x4f                     ; C212054F
>	s_buffer_load_dword s26, s[4:7], 0x56                     ; C20D0556
>	v_mul_f32_e32 v15, s9, v1                                 ; 101E0209
>	s_buffer_load_dword s37, s[4:7], 0x50                     ; C2128550
>	s_buffer_load_dword s38, s[4:7], 0x51                     ; C2130551
>	s_buffer_load_dword s9, s[4:7], 0x53                      ; C2048553
>	v_mac_f32_e64 v9, 2.0, s3                                 ; D23E0009 000006F4
>	v_mac_f32_e64 v11, 2.0, s8                                ; D23E000B 000010F4
>	v_mac_f32_e32 v15, s39, v9                                ; 3E1E1227
>	s_buffer_load_dword s27, s[4:7], 0x57                     ; C20D8557
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v1, s36, v1                                 ; 10020224
>	v_mac_f32_e32 v15, s26, v11                               ; 3E1E161A
>	s_buffer_load_dword s26, s[4:7], 0x5b                     ; C20D055B
>	v_mac_f32_e32 v1, s9, v9                                  ; 3E021209
>	v_mac_f32_e32 v16, s37, v9                                ; 3E201225
>	v_mac_f32_e32 v17, s38, v9                                ; 3E221226
>	v_mul_f32_e32 v9, s2, v14                                 ; 10121C02
>	v_mad_f32 v9, -s3, v10, -v9                               ; D2820009 A4261403
>	s_buffer_load_dword s24, s[4:7], 0x54                     ; C20C0554
>	s_buffer_load_dword s25, s[4:7], 0x55                     ; C20C8555
>	v_mad_f32 v0, -s8, v0, v9                                 ; D2820000 24260008
>	v_mov_b32_e32 v12, 0x3f4ccccd                             ; 7E1802FF 3F4CCCCD
>	v_sub_f32_e32 v9, 1.0, v4                                 ; 081208F2
>	v_mac_f32_e32 v1, s27, v11                                ; 3E02161B
>	v_madak_f32_e32 v9, v12, v9, 0x3e4ccccd                   ; 4212130C 3E4CCCCD
>	v_add_f32_e32 v0, v9, v0                                  ; 06000109
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v9, v8, v5                                  ; 10120B08
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_add_f32_e32 v1, s26, v1                                 ; 0602021A
>	v_mov_b32_e32 v5, 0x6f800000                              ; 7E0A02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v5, |v1|                            ; D002026A 00020305
>	v_mov_b32_e32 v5, 0x2f800000                              ; 7E0A02FF 2F800000
>	v_mac_f32_e32 v16, s24, v11                               ; 3E201618
>	v_mac_f32_e32 v17, s25, v11                               ; 3E221619
>	s_buffer_load_dword s9, s[4:7], 0x58                      ; C2048558
>	s_buffer_load_dword s24, s[4:7], 0x59                     ; C20C0559
>	s_buffer_load_dword s25, s[4:7], 0x5a                     ; C20C855A
>	v_cndmask_b32_e32 v5, 1.0, v5, vcc                        ; 000A0AF2
>	v_mul_f32_e32 v1, v5, v1                                  ; 10020305
>	v_rcp_f32_e32 v1, v1                                      ; 7E025501
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_add_f32_e32 v11, s9, v16                                ; 06162009
>	v_add_f32_e32 v14, s24, v17                               ; 061C2218
>	v_add_f32_e32 v15, s25, v15                               ; 061E1E19
>	v_mul_f32_e32 v10, v8, v6                                 ; 10140D08
>	v_mul_f32_e32 v6, v1, v11                                 ; 100C1701
>	v_mul_f32_e32 v8, v8, v7                                  ; 10100F08
>	v_mul_f32_e32 v7, v1, v14                                 ; 100E1D01
>	v_mul_f32_e32 v1, v1, v15                                 ; 10021F01
>	v_add_f32_e64 v0, v0, 0 clamp                             ; D2060800 00010100
>	v_mul_f32_e32 v6, v6, v5                                  ; 100C0B06
>	v_mul_f32_e32 v7, v7, v5                                  ; 100E0B07
>	v_mul_f32_e32 v5, v1, v5                                  ; 100A0B01
>	s_and_b32 s20, s20, s19                                   ; 87141314
>	v_mul_f32_e32 v0, v0, v0                                  ; 10000100
>	s_and_b64 exec, exec, s[0:1]                              ; 87FE007E
>	s_buffer_load_dword s0, s[4:7], 0x8                       ; C2000508
>	s_buffer_load_dword s1, s[4:7], 0x9                       ; C2008509
>	image_sample_c v1, v[5:8], s[12:19], s[20:23] dmask:0x1   ; F0A00100 00A30105
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v0, v1, v0                                  ; 10000101
>	s_buffer_load_dword s2, s[4:7], 0xa                       ; C201050A
>	v_interp_p1_f32 v6, v2, 0, 0, [m0]                        ; C8180002
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v1, s0, v0                                  ; 10020000
>	v_mac_f32_e32 v1, 4.0, v9                                 ; 3E0212F6
>	v_interp_p2_f32 v6, [v6], v3, 0, 0, [m0]                  ; C8190003
>	v_mul_f32_e32 v5, s1, v0                                  ; 100A0001
>	v_mul_f32_e32 v1, v1, v6                                  ; 10020D01
>	v_interp_p1_f32 v6, v2, 1, 0, [m0]                        ; C8180102
>	v_mac_f32_e32 v5, 4.0, v10                                ; 3E0A14F6
>	v_interp_p2_f32 v6, [v6], v3, 1, 0, [m0]                  ; C8190103
>	v_mul_f32_e32 v0, s2, v0                                  ; 10000002
>	v_mul_f32_e32 v5, v5, v6                                  ; 100A0D05
>	v_interp_p1_f32 v6, v2, 2, 0, [m0]                        ; C8180202
>	v_mov_b32_e32 v7, 0x39fffff7                              ; 7E0E02FF 39FFFFF7
>	v_cmp_gt_f32_e32 vcc, v7, v4                              ; 7C080907
>	v_mac_f32_e32 v0, 4.0, v8                                 ; 3E0010F6
>	v_interp_p2_f32 v6, [v6], v3, 2, 0, [m0]                  ; C8190203
>	v_cndmask_b32_e64 v7, 0, -1.0, vcc                        ; D2000007 01A9E680
>	v_mul_f32_e32 v6, v0, v6                                  ; 100C0D00
>	v_cmpx_le_f32_e32 vcc, 0, v7                              ; 7C260E80
>	s_cbranch_execnz BB0_2                                    ; BF890000
>	exp 0, 9, 0, 1, 1, v0, v0, v0, v0                         ; F8001890 00000000
>	s_endpgm                                                  ; BF810000
>	s_buffer_load_dword s0, s[4:7], 0x4                       ; C2000504
>	s_buffer_load_dword s1, s[4:7], 0x5                       ; C2008505
>	s_buffer_load_dword s2, s[4:7], 0x6                       ; C2010506
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v7, v2, 0, 3, [m0]                        ; C81C0C02
>	v_interp_p2_f32 v7, [v7], v3, 0, 3, [m0]                  ; C81D0C03
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mad_f32 v0, -v7, s0, s0                                 ; D2820000 20000107
>	v_mad_f32 v2, -v7, s2, s2                                 ; D2820002 20080507
>	v_mac_f32_e32 v0, v7, v1                                  ; 3E000307
>	v_mad_f32 v1, -v7, s1, s1                                 ; D2820001 20040307
>	v_mac_f32_e32 v1, v7, v5                                  ; 3E020B07
>	v_mac_f32_e32 v2, v7, v6                                  ; 3E040D07
>	v_mov_b32_e32 v3, v4                                      ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 880 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6].xyz, GENERIC[5]
>DCL CONST[0..235]
>DCL TEMP[0..16], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000, -32768.0000, -8192.0000, -65536.0000}
>IMM[1] INT32 {1, 0, 0, 0}
>IMM[2] FLT32 {-8224.0000,     0.0010,     0.0039,     0.5000}
>IMM[3] FLT32 {    0.0000,     0.0010,     8.0000,     0.1000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: UARL ADDR[0].x, TEMP[0].xxxx
>  2: MOV TEMP[1].xyz, CONST[ADDR[0].x+13].xyzx
>  3: ADD TEMP[2].xyz, CONST[4].xyzz, -TEMP[1].xyzz
>  4: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[2].xyzz
>  5: SQRT TEMP[2].x, TEMP[2].xxxx
>  6: POW TEMP[2].x, TEMP[2].xxxx, CONST[235].wwww
>  7: UADD TEMP[3].x, TEMP[0].xxxx, IMM[1].xxxx
>  8: UARL ADDR[0].x, TEMP[3].xxxx
>  9: UARL ADDR[0].x, TEMP[3].xxxx
> 10: ADD TEMP[3], CONST[ADDR[0].x+13], IMM[0].yyzw
> 11: UARL ADDR[0].x, TEMP[0].xxxx
> 12: UARL ADDR[0].x, TEMP[0].xxxx
> 13: ADD TEMP[4].x, IMM[2].xxxx, CONST[ADDR[0].x+13].wwww
> 14: FRC TEMP[5].x, TEMP[3].wwww
> 15: SIN TEMP[6].x, TEMP[4].xxxx
> 16: COS TEMP[4].x, TEMP[4].xxxx
> 17: MUL TEMP[7].x, TEMP[3].zzzz, TEMP[2].xxxx
> 18: ADD TEMP[8].x, TEMP[3].wwww, -TEMP[5].xxxx
> 19: MUL TEMP[8].x, TEMP[8].xxxx, IMM[2].yyyy
> 20: MUL TEMP[2].x, TEMP[8].xxxx, TEMP[2].xxxx
> 21: MOV TEMP[8].x, TEMP[4].xxxx
> 22: MOV TEMP[8].y, TEMP[6].xxxx
> 23: MOV TEMP[9].x, -TEMP[6].xxxx
> 24: MOV TEMP[9].y, TEMP[4].xxxx
> 25: MUL TEMP[10].x, IN[0].xxxx, TEMP[7].xxxx
> 26: MUL TEMP[11].x, IN[0].yyyy, TEMP[2].xxxx
> 27: MUL TEMP[8].xy, TEMP[8].xyyy, TEMP[10].xxxx
> 28: MAD TEMP[8].xy, TEMP[9].xyyy, TEMP[11].xxxx, TEMP[8].xyyy
> 29: MUL TEMP[10].xyz, CONST[7].xyzz, TEMP[8].xxxx
> 30: MAD TEMP[8].xyz, CONST[8].xyzz, TEMP[8].yyyy, TEMP[10].xyzz
> 31: ADD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xyzz
> 32: FRC TEMP[8].xy, TEMP[3].xyyy
> 33: ADD TEMP[3].xy, TEMP[3].xyyy, -TEMP[8].xyyy
> 34: MUL TEMP[3].xy, TEMP[3].xyyy, IMM[2].zzzz
> 35: MOV TEMP[3].z, TEMP[8].yyxy
> 36: MOV TEMP[0].xyz, TEMP[0].xyzx
> 37: MUL TEMP[10], CONST[0], TEMP[0].xxxx
> 38: MAD TEMP[10], CONST[1], TEMP[0].yyyy, TEMP[10]
> 39: MAD TEMP[10], CONST[2], TEMP[0].zzzz, TEMP[10]
> 40: ADD TEMP[10], TEMP[10], CONST[3]
> 41: MOV TEMP[3].xyz, TEMP[3].xyzx
> 42: ADD TEMP[11].x, IN[0].xxxx, IMM[2].wwww
> 43: ADD TEMP[12].x, IN[0].yyyy, IMM[2].wwww
> 44: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
> 45: FRC TEMP[13].x, CONST[235].zzzz
> 46: ADD TEMP[14].x, CONST[235].zzzz, -TEMP[13].xxxx
> 47: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[13].xxxx
> 48: RCP TEMP[13].x, TEMP[14].xxxx
> 49: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[13].xxxx
> 50: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[14].xxxx
> 51: FRC TEMP[13].x, TEMP[5].xxxx
> 52: ADD TEMP[11].x, TEMP[11].xxxx, TEMP[13].xxxx
> 53: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[13].xxxx
> 54: RCP TEMP[13].x, TEMP[14].xxxx
> 55: MAD TEMP[5].x, TEMP[5].xxxx, TEMP[13].xxxx, TEMP[12].xxxx
> 56: MOV TEMP[11].y, TEMP[5].xxxx
> 57: ADD TEMP[1].xyz, CONST[4].xyzz, -TEMP[1].xyzz
> 58: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[1].xyzz
> 59: RSQ TEMP[5].x, TEMP[5].xxxx
> 60: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[5].xxxx
> 61: MUL TEMP[5].xyz, TEMP[1].zxyy, CONST[8].yzxx
> 62: MAD TEMP[5].xyz, TEMP[1].yzxx, CONST[8].zxyy, -TEMP[5].xyzz
> 63: DP3 TEMP[12].x, TEMP[5].xyzz, TEMP[5].xyzz
> 64: RSQ TEMP[12].x, TEMP[12].xxxx
> 65: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[12].xxxx
> 66: MUL TEMP[12].xyz, TEMP[5].zxyy, TEMP[1].yzxx
> 67: MAD TEMP[12].xyz, TEMP[5].yzxx, TEMP[1].zxyy, -TEMP[12].xyzz
> 68: DP3 TEMP[13].x, TEMP[12].xyzz, TEMP[12].xyzz
> 69: RSQ TEMP[13].x, TEMP[13].xxxx
> 70: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[13].xxxx
> 71: MOV TEMP[13].x, CONST[9].wwww
> 72: MOV TEMP[13].y, CONST[10].wwww
> 73: MOV TEMP[13].z, CONST[11].wwww
> 74: ADD TEMP[13].xyz, TEMP[0].xyzz, -TEMP[13].xyzz
> 75: MUL TEMP[14].xyz, CONST[9].xyzz, TEMP[13].xxxx
> 76: MAD TEMP[14].xyz, CONST[10].xyzz, TEMP[13].yyyy, TEMP[14].xyzz
> 77: MAD TEMP[13].xyz, CONST[11].xyzz, TEMP[13].zzzz, TEMP[14].xyzz
> 78: MOV TEMP[14].w, TEMP[13].zzzz
> 79: MUL TEMP[15].xy, TEMP[13].xyyy, CONST[12].xyyy
> 80: MAD TEMP[14].xy, IMM[2].wwww, TEMP[13].zzzz, TEMP[15].xyyy
> 81: MAD TEMP[13].x, TEMP[13].zzzz, CONST[12].zzzz, CONST[12].wwww
> 82: MOV TEMP[14].z, TEMP[13].xxxx
> 83: MAD TEMP[13].x, TEMP[10].zzzz, CONST[6].yyyy, CONST[6].xxxx
> 84: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 85: POW TEMP[13].x, TEMP[13].xxxx, CONST[6].zzzz
> 86: ADD TEMP[15].x, IMM[0].xxxx, -CONST[6].wwww
> 87: MAD TEMP[13].x, CONST[6].wwww, TEMP[13].xxxx, TEMP[15].xxxx
> 88: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[13].xxxx
> 89: ADD TEMP[15].x, TEMP[0].yyyy, -CONST[4].wwww
> 90: MAX TEMP[15].x, TEMP[15].xxxx, IMM[3].xxxx
> 91: ADD TEMP[16].x, CONST[5].wwww, -CONST[4].wwww
> 92: ADD TEMP[16].x, TEMP[16].xxxx, IMM[3].yyyy
> 93: RCP TEMP[16].x, TEMP[16].xxxx
> 94: MUL TEMP[15].x, TEMP[15].xxxx, TEMP[16].xxxx
> 95: FRC TEMP[16].x, CONST[5].wwww
> 96: MUL TEMP[16].x, TEMP[16].xxxx, IMM[3].zzzz
> 97: POW TEMP[15].x, TEMP[15].xxxx, TEMP[16].xxxx
> 98: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 99: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[15].xxxx
>100: MAX TEMP[2].x, TEMP[7].xxxx, TEMP[2].xxxx
>101: MUL TEMP[2].x, IMM[3].wwww, TEMP[2].xxxx
>102: ADD TEMP[2].x, TEMP[10].zzzz, -TEMP[2].xxxx
>103: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>104: MUL TEMP[2].x, TEMP[8].yyyy, TEMP[2].xxxx
>105: MOV TEMP[3].w, TEMP[2].xxxx
>106: MUL TEMP[2].xyz, TEMP[5].xyzz, TEMP[4].xxxx
>107: MAD TEMP[2].xyz, TEMP[12].xyzz, TEMP[6].xxxx, TEMP[2].xyzz
>108: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
>109: MAD TEMP[4].xyz, TEMP[12].xyzz, TEMP[4].xxxx, TEMP[5].xyzz
>110: MOV TEMP[4].w, TEMP[2].xxxx
>111: MOV TEMP[2].xy, TEMP[2].yzyy
>112: MOV TEMP[2].zw, TEMP[11].yyxy
>113: MOV TEMP[5].x, TEMP[13].xxxx
>114: MOV TEMP[5].yzw, TEMP[0].yxyz
>115: MOV OUT[1], TEMP[3]
>116: MOV OUT[6].xyz, TEMP[1].xyzx
>117: MOV OUT[4], TEMP[2]
>118: MOV OUT[5], TEMP[5]
>119: MOV OUT[0], TEMP[10]
>120: MOV OUT[3], TEMP[4]
>121: MOV OUT[2], TEMP[14]
>122: END
>radeonsi: Compiling shader 76
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = fptosi float %24 to i32
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = shl i32 %25, 4
>  %29 = add i32 %28, 208
>  %30 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %29)
>  %31 = shl i32 %25, 4
>  %32 = add i32 %31, 212
>  %33 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %32)
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = shl i32 %25, 4
>  %37 = add i32 %36, 216
>  %38 = call float @llvm.SI.load.const(<16 x i8> %35, i32 %37)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %35, i32 64)
>  %40 = fsub float %39, %30
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 68)
>  %44 = fsub float %43, %33
>  %45 = call float @llvm.SI.load.const(<16 x i8> %42, i32 72)
>  %46 = fsub float %45, %38
>  %47 = fmul float %40, %40
>  %48 = fmul float %44, %44
>  %49 = fadd float %48, %47
>  %50 = fmul float %46, %46
>  %51 = fadd float %49, %50
>  %52 = call float @llvm.sqrt.f32(float %51)
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 3772)
>  %56 = call float @llvm.pow.f32(float %52, float %55)
>  %57 = add i32 %25, 1
>  %58 = shl i32 %57, 4
>  %59 = add i32 %58, 208
>  %60 = call float @llvm.SI.load.const(<16 x i8> %54, i32 %59)
>  %61 = fadd float %60, -3.276800e+04
>  %62 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %63 = load <16 x i8>, <16 x i8> addrspace(2)* %62, align 16, !invariant.load !0
>  %64 = shl i32 %57, 4
>  %65 = add i32 %64, 212
>  %66 = call float @llvm.SI.load.const(<16 x i8> %63, i32 %65)
>  %67 = fadd float %66, -3.276800e+04
>  %68 = shl i32 %57, 4
>  %69 = add i32 %68, 216
>  %70 = call float @llvm.SI.load.const(<16 x i8> %63, i32 %69)
>  %71 = fadd float %70, -8.192000e+03
>  %72 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %73 = load <16 x i8>, <16 x i8> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = shl i32 %57, 4
>  %75 = add i32 %74, 220
>  %76 = call float @llvm.SI.load.const(<16 x i8> %73, i32 %75)
>  %77 = fadd float %76, -6.553600e+04
>  %78 = shl i32 %25, 4
>  %79 = add i32 %78, 220
>  %80 = call float @llvm.SI.load.const(<16 x i8> %73, i32 %79)
>  %81 = fadd float %80, -8.224000e+03
>  %82 = call float @llvm.floor.f32(float %77)
>  %83 = fsub float %77, %82
>  %84 = call float @llvm.sin.f32(float %81)
>  %85 = call float @llvm.cos.f32(float %81)
>  %86 = fmul float %71, %56
>  %87 = fsub float %77, %83
>  %88 = fmul float %87, 9.765625e-04
>  %89 = fmul float %88, %56
>  %90 = fsub float -0.000000e+00, %84
>  %91 = fmul float %19, %86
>  %92 = fmul float %20, %89
>  %93 = fmul float %85, %91
>  %94 = fmul float %84, %91
>  %95 = fmul float %92, %90
>  %96 = fadd float %95, %93
>  %97 = fmul float %85, %92
>  %98 = fadd float %97, %94
>  %99 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %100 = load <16 x i8>, <16 x i8> addrspace(2)* %99, align 16, !invariant.load !0
>  %101 = call float @llvm.SI.load.const(<16 x i8> %100, i32 112)
>  %102 = fmul float %101, %96
>  %103 = call float @llvm.SI.load.const(<16 x i8> %100, i32 116)
>  %104 = fmul float %103, %96
>  %105 = call float @llvm.SI.load.const(<16 x i8> %100, i32 120)
>  %106 = fmul float %105, %96
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 128)
>  %110 = fmul float %109, %98
>  %111 = fadd float %110, %102
>  %112 = call float @llvm.SI.load.const(<16 x i8> %108, i32 132)
>  %113 = fmul float %112, %98
>  %114 = fadd float %113, %104
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = call float @llvm.SI.load.const(<16 x i8> %116, i32 136)
>  %118 = fmul float %117, %98
>  %119 = fadd float %118, %106
>  %120 = fadd float %30, %111
>  %121 = fadd float %33, %114
>  %122 = fadd float %38, %119
>  %123 = call float @llvm.floor.f32(float %61)
>  %124 = fsub float %61, %123
>  %125 = call float @llvm.floor.f32(float %67)
>  %126 = fsub float %67, %125
>  %127 = fsub float %61, %124
>  %128 = fsub float %67, %126
>  %129 = fmul float %127, 0x3F70101020000000
>  %130 = fmul float %128, 0x3F70101020000000
>  %131 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %132 = load <16 x i8>, <16 x i8> addrspace(2)* %131, align 16, !invariant.load !0
>  %133 = call float @llvm.SI.load.const(<16 x i8> %132, i32 0)
>  %134 = fmul float %133, %120
>  %135 = call float @llvm.SI.load.const(<16 x i8> %132, i32 4)
>  %136 = fmul float %135, %120
>  %137 = call float @llvm.SI.load.const(<16 x i8> %132, i32 8)
>  %138 = fmul float %137, %120
>  %139 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %140 = load <16 x i8>, <16 x i8> addrspace(2)* %139, align 16, !invariant.load !0
>  %141 = call float @llvm.SI.load.const(<16 x i8> %140, i32 12)
>  %142 = fmul float %141, %120
>  %143 = call float @llvm.SI.load.const(<16 x i8> %140, i32 16)
>  %144 = fmul float %143, %121
>  %145 = fadd float %144, %134
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = call float @llvm.SI.load.const(<16 x i8> %147, i32 20)
>  %149 = fmul float %148, %121
>  %150 = fadd float %149, %136
>  %151 = call float @llvm.SI.load.const(<16 x i8> %147, i32 24)
>  %152 = fmul float %151, %121
>  %153 = fadd float %152, %138
>  %154 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %155 = load <16 x i8>, <16 x i8> addrspace(2)* %154, align 16, !invariant.load !0
>  %156 = call float @llvm.SI.load.const(<16 x i8> %155, i32 28)
>  %157 = fmul float %156, %121
>  %158 = fadd float %157, %142
>  %159 = call float @llvm.SI.load.const(<16 x i8> %155, i32 32)
>  %160 = fmul float %159, %122
>  %161 = fadd float %160, %145
>  %162 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %163 = load <16 x i8>, <16 x i8> addrspace(2)* %162, align 16, !invariant.load !0
>  %164 = call float @llvm.SI.load.const(<16 x i8> %163, i32 36)
>  %165 = fmul float %164, %122
>  %166 = fadd float %165, %150
>  %167 = call float @llvm.SI.load.const(<16 x i8> %163, i32 40)
>  %168 = fmul float %167, %122
>  %169 = fadd float %168, %153
>  %170 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %171 = load <16 x i8>, <16 x i8> addrspace(2)* %170, align 16, !invariant.load !0
>  %172 = call float @llvm.SI.load.const(<16 x i8> %171, i32 44)
>  %173 = fmul float %172, %122
>  %174 = fadd float %173, %158
>  %175 = call float @llvm.SI.load.const(<16 x i8> %171, i32 48)
>  %176 = fadd float %161, %175
>  %177 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %178 = load <16 x i8>, <16 x i8> addrspace(2)* %177, align 16, !invariant.load !0
>  %179 = call float @llvm.SI.load.const(<16 x i8> %178, i32 52)
>  %180 = fadd float %166, %179
>  %181 = call float @llvm.SI.load.const(<16 x i8> %178, i32 56)
>  %182 = fadd float %169, %181
>  %183 = call float @llvm.SI.load.const(<16 x i8> %178, i32 60)
>  %184 = fadd float %174, %183
>  %185 = fadd float %19, 5.000000e-01
>  %186 = fadd float %20, 5.000000e-01
>  %187 = fsub float 1.000000e+00, %186
>  %188 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %189 = load <16 x i8>, <16 x i8> addrspace(2)* %188, align 16, !invariant.load !0
>  %190 = call float @llvm.SI.load.const(<16 x i8> %189, i32 3768)
>  %191 = call float @llvm.floor.f32(float %190)
>  %192 = fsub float %190, %191
>  %193 = call float @llvm.SI.load.const(<16 x i8> %189, i32 3768)
>  %194 = fsub float %193, %192
>  %195 = fmul float %185, %192
>  %196 = fdiv float 1.000000e+00, %194, !fpmath !1
>  %197 = fmul float %187, %196
>  %198 = fmul float %83, %194
>  %199 = call float @llvm.floor.f32(float %198)
>  %200 = fsub float %198, %199
>  %201 = fadd float %195, %200
>  %202 = fsub float %198, %200
>  %203 = fdiv float 1.000000e+00, %194, !fpmath !1
>  %204 = fmul float %202, %203
>  %205 = fadd float %204, %197
>  %206 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %207 = load <16 x i8>, <16 x i8> addrspace(2)* %206, align 16, !invariant.load !0
>  %208 = call float @llvm.SI.load.const(<16 x i8> %207, i32 64)
>  %209 = fsub float %208, %30
>  %210 = call float @llvm.SI.load.const(<16 x i8> %207, i32 68)
>  %211 = fsub float %210, %33
>  %212 = call float @llvm.SI.load.const(<16 x i8> %207, i32 72)
>  %213 = fsub float %212, %38
>  %214 = fmul float %209, %209
>  %215 = fmul float %211, %211
>  %216 = fadd float %215, %214
>  %217 = fmul float %213, %213
>  %218 = fadd float %216, %217
>  %219 = call float @llvm.sqrt.f32(float %218)
>  %220 = fdiv float 1.000000e+00, %219, !fpmath !1
>  %221 = fmul float %209, %220
>  %222 = fmul float %211, %220
>  %223 = fmul float %213, %220
>  %224 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %225 = load <16 x i8>, <16 x i8> addrspace(2)* %224, align 16, !invariant.load !0
>  %226 = call float @llvm.SI.load.const(<16 x i8> %225, i32 132)
>  %227 = fmul float %223, %226
>  %228 = call float @llvm.SI.load.const(<16 x i8> %225, i32 136)
>  %229 = fmul float %221, %228
>  %230 = call float @llvm.SI.load.const(<16 x i8> %225, i32 128)
>  %231 = fmul float %222, %230
>  %232 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %233 = load <16 x i8>, <16 x i8> addrspace(2)* %232, align 16, !invariant.load !0
>  %234 = call float @llvm.SI.load.const(<16 x i8> %233, i32 136)
>  %235 = fmul float %222, %234
>  %236 = fsub float %235, %227
>  %237 = call float @llvm.SI.load.const(<16 x i8> %233, i32 128)
>  %238 = fmul float %223, %237
>  %239 = fsub float %238, %229
>  %240 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %241 = load <16 x i8>, <16 x i8> addrspace(2)* %240, align 16, !invariant.load !0
>  %242 = call float @llvm.SI.load.const(<16 x i8> %241, i32 132)
>  %243 = fmul float %221, %242
>  %244 = fsub float %243, %231
>  %245 = fmul float %236, %236
>  %246 = fmul float %239, %239
>  %247 = fadd float %246, %245
>  %248 = fmul float %244, %244
>  %249 = fadd float %247, %248
>  %250 = call float @llvm.sqrt.f32(float %249)
>  %251 = fdiv float 1.000000e+00, %250, !fpmath !1
>  %252 = fmul float %236, %251
>  %253 = fmul float %239, %251
>  %254 = fmul float %244, %251
>  %255 = fmul float %254, %222
>  %256 = fmul float %252, %223
>  %257 = fmul float %253, %221
>  %258 = fmul float %253, %223
>  %259 = fsub float %258, %255
>  %260 = fmul float %254, %221
>  %261 = fsub float %260, %256
>  %262 = fmul float %252, %222
>  %263 = fsub float %262, %257
>  %264 = fmul float %259, %259
>  %265 = fmul float %261, %261
>  %266 = fadd float %265, %264
>  %267 = fmul float %263, %263
>  %268 = fadd float %266, %267
>  %269 = call float @llvm.sqrt.f32(float %268)
>  %270 = fdiv float 1.000000e+00, %269, !fpmath !1
>  %271 = fmul float %259, %270
>  %272 = fmul float %261, %270
>  %273 = fmul float %263, %270
>  %274 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %275 = load <16 x i8>, <16 x i8> addrspace(2)* %274, align 16, !invariant.load !0
>  %276 = call float @llvm.SI.load.const(<16 x i8> %275, i32 156)
>  %277 = call float @llvm.SI.load.const(<16 x i8> %275, i32 172)
>  %278 = call float @llvm.SI.load.const(<16 x i8> %275, i32 188)
>  %279 = fsub float %120, %276
>  %280 = fsub float %121, %277
>  %281 = fsub float %122, %278
>  %282 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %283 = load <16 x i8>, <16 x i8> addrspace(2)* %282, align 16, !invariant.load !0
>  %284 = call float @llvm.SI.load.const(<16 x i8> %283, i32 144)
>  %285 = fmul float %284, %279
>  %286 = call float @llvm.SI.load.const(<16 x i8> %283, i32 148)
>  %287 = fmul float %286, %279
>  %288 = call float @llvm.SI.load.const(<16 x i8> %283, i32 152)
>  %289 = fmul float %288, %279
>  %290 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %291 = load <16 x i8>, <16 x i8> addrspace(2)* %290, align 16, !invariant.load !0
>  %292 = call float @llvm.SI.load.const(<16 x i8> %291, i32 160)
>  %293 = fmul float %292, %280
>  %294 = fadd float %293, %285
>  %295 = call float @llvm.SI.load.const(<16 x i8> %291, i32 164)
>  %296 = fmul float %295, %280
>  %297 = fadd float %296, %287
>  %298 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %299 = load <16 x i8>, <16 x i8> addrspace(2)* %298, align 16, !invariant.load !0
>  %300 = call float @llvm.SI.load.const(<16 x i8> %299, i32 168)
>  %301 = fmul float %300, %280
>  %302 = fadd float %301, %289
>  %303 = call float @llvm.SI.load.const(<16 x i8> %299, i32 176)
>  %304 = fmul float %303, %281
>  %305 = fadd float %304, %294
>  %306 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %307 = load <16 x i8>, <16 x i8> addrspace(2)* %306, align 16, !invariant.load !0
>  %308 = call float @llvm.SI.load.const(<16 x i8> %307, i32 180)
>  %309 = fmul float %308, %281
>  %310 = fadd float %309, %297
>  %311 = call float @llvm.SI.load.const(<16 x i8> %307, i32 184)
>  %312 = fmul float %311, %281
>  %313 = fadd float %312, %302
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = call float @llvm.SI.load.const(<16 x i8> %315, i32 192)
>  %317 = fmul float %305, %316
>  %318 = call float @llvm.SI.load.const(<16 x i8> %315, i32 196)
>  %319 = fmul float %310, %318
>  %320 = fmul float %313, 5.000000e-01
>  %321 = fadd float %320, %317
>  %322 = fmul float %313, 5.000000e-01
>  %323 = fadd float %322, %319
>  %324 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %325 = load <16 x i8>, <16 x i8> addrspace(2)* %324, align 16, !invariant.load !0
>  %326 = call float @llvm.SI.load.const(<16 x i8> %325, i32 200)
>  %327 = call float @llvm.SI.load.const(<16 x i8> %325, i32 204)
>  %328 = fmul float %313, %326
>  %329 = fadd float %328, %327
>  %330 = call float @llvm.SI.load.const(<16 x i8> %325, i32 100)
>  %331 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %332 = load <16 x i8>, <16 x i8> addrspace(2)* %331, align 16, !invariant.load !0
>  %333 = call float @llvm.SI.load.const(<16 x i8> %332, i32 96)
>  %334 = fmul float %182, %330
>  %335 = fadd float %334, %333
>  %336 = call float @llvm.AMDGPU.clamp.(float %335, float 0.000000e+00, float 1.000000e+00)
>  %337 = call float @llvm.SI.load.const(<16 x i8> %332, i32 104)
>  %338 = call float @llvm.pow.f32(float %336, float %337)
>  %339 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %340 = load <16 x i8>, <16 x i8> addrspace(2)* %339, align 16, !invariant.load !0
>  %341 = call float @llvm.SI.load.const(<16 x i8> %340, i32 108)
>  %342 = fsub float 1.000000e+00, %341
>  %343 = call float @llvm.SI.load.const(<16 x i8> %340, i32 108)
>  %344 = fmul float %343, %338
>  %345 = fadd float %344, %342
>  %346 = fmul float %345, %345
>  %347 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %348 = load <16 x i8>, <16 x i8> addrspace(2)* %347, align 16, !invariant.load !0
>  %349 = call float @llvm.SI.load.const(<16 x i8> %348, i32 76)
>  %350 = fsub float %121, %349
>  %351 = call float @llvm.maxnum.f32(float %350, float 0.000000e+00)
>  %352 = call float @llvm.SI.load.const(<16 x i8> %348, i32 92)
>  %353 = call float @llvm.SI.load.const(<16 x i8> %348, i32 76)
>  %354 = fsub float %352, %353
>  %355 = fadd float %354, 0x3F50624DE0000000
>  %356 = fdiv float 1.000000e+00, %355, !fpmath !1
>  %357 = fmul float %351, %356
>  %358 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %359 = load <16 x i8>, <16 x i8> addrspace(2)* %358, align 16, !invariant.load !0
>  %360 = call float @llvm.SI.load.const(<16 x i8> %359, i32 92)
>  %361 = call float @llvm.floor.f32(float %360)
>  %362 = fsub float %360, %361
>  %363 = fmul float %362, 8.000000e+00
>  %364 = call float @llvm.pow.f32(float %357, float %363)
>  %365 = call float @llvm.AMDGPU.clamp.(float %364, float 0.000000e+00, float 1.000000e+00)
>  %366 = fmul float %346, %365
>  %367 = call float @llvm.maxnum.f32(float %86, float %89)
>  %368 = fmul float %367, 0x3FB99999A0000000
>  %369 = fsub float %182, %368
>  %370 = call float @llvm.AMDGPU.clamp.(float %369, float 0.000000e+00, float 1.000000e+00)
>  %371 = fmul float %126, %370
>  %372 = fmul float %252, %85
>  %373 = fmul float %253, %85
>  %374 = fmul float %254, %85
>  %375 = fmul float %271, %84
>  %376 = fadd float %375, %372
>  %377 = fmul float %272, %84
>  %378 = fadd float %377, %373
>  %379 = fmul float %273, %84
>  %380 = fadd float %379, %374
>  %381 = fmul float %252, %90
>  %382 = fmul float %253, %90
>  %383 = fmul float %254, %90
>  %384 = fmul float %271, %85
>  %385 = fadd float %384, %381
>  %386 = fmul float %272, %85
>  %387 = fadd float %386, %382
>  %388 = fmul float %273, %85
>  %389 = fadd float %388, %383
>  %390 = bitcast i32 %12 to float
>  %391 = insertvalue <{ float, float, float }> undef, float %390, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %129, float %130, float %124, float %371)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %321, float %323, float %329, float %313)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %385, float %387, float %389, float %376)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %378, float %380, float %201, float %205)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %366, float %120, float %121, float %122)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %221, float %222, float %223, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %176, float %180, float %182, float %184)
>  ret <{ float, float, float }> %391
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE
>DCL IN[4], GENERIC[4], PERSPECTIVE
>DCL IN[5].xyz, GENERIC[5], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[0..5]
>DCL TEMP[0..7], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.8000}
>IMM[1] FLT32 {    0.2000,     0.0000,    -0.9500,    20.0000}
>IMM[2] FLT32 {    0.0005,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwww
>  3: TEX TEMP[1], TEMP[1], SAMP[1], 2D
>  4: MAD TEMP[2].xyz, TEMP[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  5: MUL TEMP[3].xyz, TEMP[0].xyzz, TEMP[2].xxxx
>  6: MAD TEMP[3].xyz, IN[2].xyzz, TEMP[2].yyyy, TEMP[3].xyzz
>  7: MAD TEMP[2].xyz, IN[5].xyzz, TEMP[2].zzzz, TEMP[3].xyzz
>  8: MUL TEMP[1].x, IN[0].wwww, TEMP[1].wwww
>  9: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 10: ADD TEMP[3].x, IMM[0].zzzz, -TEMP[1].xxxx
> 11: MAD TEMP[3].x, TEMP[3].xxxx, IMM[0].wwww, IMM[1].xxxx
> 12: MOV TEMP[4].xyz, IMM[1].yyyy
> 13: FSLT TEMP[5].x, IMM[1].yyyy, IN[1].zzzz
> 14: UIF TEMP[5].xxxx :0
> 15:   MOV TEMP[5].x, CONST[1].wwww
> 16:   MOV TEMP[5].y, CONST[2].wwww
> 17:   MOV TEMP[5].z, CONST[3].wwww
> 18:   MOV TEMP[6].xy, IN[1].xyyy
> 19:   MOV TEMP[6].w, IN[1].wwww
> 20:   TXP TEMP[6].w, TEMP[6], SAMP[0], 2D
> 21:   ADD TEMP[5].xyz, TEMP[5].xyzz, -IN[4].yzww
> 22:   DP3 TEMP[7].x, TEMP[5].xyzz, TEMP[5].xyzz
> 23:   RSQ TEMP[7].x, TEMP[7].xxxx
> 24:   MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
> 25:   DP3 TEMP[2].x, TEMP[5].xyzz, TEMP[2].xyzz
> 26:   ADD TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 27:   MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 28:   MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 29:   ADD TEMP[3].x, IN[1].zzzz, IMM[1].zzzz
> 30:   MUL TEMP[3].x, TEMP[3].xxxx, IMM[1].wwww
> 31:   ADD TEMP[3].x, IMM[0].zzzz, -TEMP[3].xxxx
> 32:   MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 33:   MUL TEMP[3].xyz, CONST[5].xyzz, TEMP[3].xxxx
> 34:   MUL TEMP[5].x, TEMP[6].wwww, TEMP[6].wwww
> 35:   MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[5].xxxx
> 36:   MUL TEMP[4].xyz, TEMP[2].xxxx, TEMP[3].xyzz
> 37: ENDIF
> 38: MUL TEMP[0].xyz, IN[0].xyzz, TEMP[4].xyzz
> 39: FSLT TEMP[2].x, TEMP[1].xxxx, IMM[2].xxxx
> 40: AND TEMP[2].x, TEMP[2].xxxx, IMM[0].zzzz
> 41: KILL_IF -TEMP[2].xxxx
> 42: LRP TEMP[0].xyz, IN[4].xxxx, TEMP[0].xyzz, CONST[0].xyzz
> 43: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 44: MOV TEMP[0].xyz, TEMP[0].xyzx
> 45: MOV TEMP[0].w, TEMP[1].xxxx
> 46: MOV OUT[0], TEMP[0]
> 47: END
>radeonsi: Compiling shader 77
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 7, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = fmul float %39, 2.000000e+00
>  %44 = fadd float %43, -1.000000e+00
>  %45 = fmul float %40, 2.000000e+00
>  %46 = fadd float %45, -1.000000e+00
>  %47 = fmul float %41, 2.000000e+00
>  %48 = fadd float %47, -1.000000e+00
>  %49 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %50 = fmul float %49, %42
>  %51 = call float @llvm.AMDGPU.clamp.(float %50, float 0.000000e+00, float 1.000000e+00)
>  %52 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %53 = fcmp ogt float %52, 0.000000e+00
>  br i1 %53, label %if14, label %endif37
>
>if14:                                             ; preds = %main_body
>  %54 = fsub float 1.000000e+00, %51
>  %55 = fmul float %54, 0x3FE99999A0000000
>  %56 = fadd float %55, 0x3FC99999A0000000
>  %57 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %6, <2 x i32> %8)
>  %58 = fmul float %57, %48
>  %59 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %60 = fmul float %59, %46
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %8)
>  %62 = fmul float %61, %44
>  %63 = fadd float %60, %62
>  %64 = fadd float %58, %63
>  %65 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %8)
>  %66 = fmul float %65, %48
>  %67 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %68 = fmul float %67, %46
>  %69 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %70 = fmul float %69, %44
>  %71 = fadd float %68, %70
>  %72 = fadd float %66, %71
>  %73 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %8)
>  %74 = fmul float %73, %48
>  %75 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %76 = fmul float %75, %46
>  %77 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %78 = fmul float %77, %44
>  %79 = fadd float %76, %78
>  %80 = fadd float %74, %79
>  %81 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %82 = load <16 x i8>, <16 x i8> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = call float @llvm.SI.load.const(<16 x i8> %82, i32 28)
>  %84 = call float @llvm.SI.load.const(<16 x i8> %82, i32 44)
>  %85 = call float @llvm.SI.load.const(<16 x i8> %82, i32 60)
>  %86 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %87 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %88 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %89 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %90 = load <8 x i32>, <8 x i32> addrspace(2)* %89, align 32, !invariant.load !0
>  %91 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %92 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %91, i64 0, i64 3, !amdgpu.uniform !0
>  %93 = load <4 x i32>, <4 x i32> addrspace(2)* %92, align 16, !invariant.load !0
>  %94 = extractelement <8 x i32> %90, i32 7
>  %95 = extractelement <4 x i32> %93, i32 0
>  %96 = and i32 %95, %94
>  %97 = insertelement <4 x i32> %93, i32 %96, i32 0
>  %98 = fdiv float %86, %88, !fpmath !1
>  %99 = fdiv float %87, %88, !fpmath !1
>  %100 = bitcast float %98 to i32
>  %101 = bitcast float %99 to i32
>  %102 = insertelement <2 x i32> undef, i32 %100, i32 0
>  %103 = insertelement <2 x i32> %102, i32 %101, i32 1
>  %104 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %103, <8 x i32> %90, <4 x i32> %97, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %105 = extractelement <4 x float> %104, i32 3
>  %106 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %8)
>  %107 = fsub float %83, %106
>  %108 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %8)
>  %109 = fsub float %84, %108
>  %110 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %8)
>  %111 = fsub float %85, %110
>  %112 = fmul float %107, %107
>  %113 = fmul float %109, %109
>  %114 = fadd float %113, %112
>  %115 = fmul float %111, %111
>  %116 = fadd float %114, %115
>  %117 = call float @llvm.sqrt.f32(float %116)
>  %118 = fdiv float 1.000000e+00, %117, !fpmath !1
>  %119 = fmul float %107, %118
>  %120 = fmul float %109, %118
>  %121 = fmul float %111, %118
>  %122 = fmul float %119, %80
>  %123 = fmul float %120, %72
>  %124 = fadd float %123, %122
>  %125 = fmul float %121, %64
>  %126 = fadd float %124, %125
>  %127 = fadd float %126, %56
>  %128 = call float @llvm.AMDGPU.clamp.(float %127, float 0.000000e+00, float 1.000000e+00)
>  %129 = fmul float %128, %128
>  %130 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %131 = fadd float %130, 0xBFEE666660000000
>  %132 = fmul float %131, 2.000000e+01
>  %133 = fsub float 1.000000e+00, %132
>  %134 = call float @llvm.AMDGPU.clamp.(float %133, float 0.000000e+00, float 1.000000e+00)
>  %135 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %136 = load <16 x i8>, <16 x i8> addrspace(2)* %135, align 16, !invariant.load !0
>  %137 = call float @llvm.SI.load.const(<16 x i8> %136, i32 80)
>  %138 = fmul float %137, %134
>  %139 = call float @llvm.SI.load.const(<16 x i8> %136, i32 84)
>  %140 = fmul float %139, %134
>  %141 = call float @llvm.SI.load.const(<16 x i8> %136, i32 88)
>  %142 = fmul float %141, %134
>  %143 = fmul float %105, %105
>  %144 = fmul float %138, %143
>  %145 = fmul float %140, %143
>  %146 = fmul float %142, %143
>  %147 = fmul float %129, %144
>  %148 = fmul float %129, %145
>  %149 = fmul float %129, %146
>  br label %endif37
>
>endif37:                                          ; preds = %if14, %main_body
>  %.02 = phi float [ %147, %if14 ], [ 0.000000e+00, %main_body ]
>  %.01 = phi float [ %148, %if14 ], [ 0.000000e+00, %main_body ]
>  %.0 = phi float [ %149, %if14 ], [ 0.000000e+00, %main_body ]
>  %150 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %151 = fmul float %150, %.02
>  %152 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %153 = fmul float %152, %.01
>  %154 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %155 = fmul float %154, %.0
>  %156 = fcmp olt float %51, 0x3F3FFFFEE0000000
>  %157 = select i1 %156, float -1.000000e+00, float 0.000000e+00
>  call void @llvm.AMDGPU.kill(float %157)
>  %158 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %8)
>  %159 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %160 = load <16 x i8>, <16 x i8> addrspace(2)* %159, align 16, !invariant.load !0
>  %161 = call float @llvm.SI.load.const(<16 x i8> %160, i32 0)
>  %162 = fsub float 1.000000e+00, %158
>  %163 = fmul float %151, %158
>  %164 = fmul float %161, %162
>  %165 = fadd float %163, %164
>  %166 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %8)
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 4)
>  %170 = fsub float 1.000000e+00, %166
>  %171 = fmul float %153, %166
>  %172 = fmul float %169, %170
>  %173 = fadd float %171, %172
>  %174 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %8)
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 8)
>  %178 = fsub float 1.000000e+00, %174
>  %179 = fmul float %155, %174
>  %180 = fmul float %177, %178
>  %181 = fadd float %179, %180
>  %182 = fmul float %165, %51
>  %183 = fmul float %173, %51
>  %184 = fmul float %181, %51
>  %185 = bitcast float %5 to i32
>  %186 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %185, 10
>  %187 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %186, float %182, 11
>  %188 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %187, float %183, 12
>  %189 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %188, float %184, 13
>  %190 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %189, float %51, 14
>  %191 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %190, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %191
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind
>declare void @llvm.AMDGPU.kill(float) #2
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	v_mov_b32_e32 v0, 0xc7000000                          ; 7E0002FF C7000000
>	v_mov_b32_e32 v1, 0x3b808081                          ; 7E0202FF 3B808081
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                    ; C0820300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_buffer_load_dword s1, s[4:7], 0x10                  ; C2008510
>	s_buffer_load_dword s2, s[4:7], 0x11                  ; C2010511
>	s_buffer_load_dword s3, s[4:7], 0x12                  ; C2018512
>	s_buffer_load_dword s9, s[4:7], 0x3ae                 ; C20484FF 000003AE
>	s_buffer_load_dword s8, s[4:7], 0x3af                 ; C20404FF 000003AF
>	s_buffer_load_dword s10, s[4:7], 0x20                 ; C2050520
>	s_buffer_load_dword s11, s[4:7], 0x21                 ; C2058521
>	s_buffer_load_dword s12, s[4:7], 0x2                  ; C2060502
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_floor_f32_e32 v3, s9                                ; 7E064809
>	v_sub_f32_e32 v3, s9, v3                              ; 08060609
>	v_sub_f32_e32 v4, s9, v3                              ; 08080609
>	s_buffer_load_dword s9, s[4:7], 0x1e                  ; C204851E
>	s_buffer_load_dword s24, s[4:7], 0x22                 ; C20C0522
>	s_buffer_load_dword s15, s[4:7], 0x6                  ; C2078506
>	s_buffer_load_dword s19, s[4:7], 0xa                  ; C209850A
>	s_buffer_load_dword s23, s[4:7], 0xe                  ; C20B850E
>	s_buffer_load_dword s28, s[4:7], 0x27                 ; C20E0527
>	s_buffer_load_dword s25, s[4:7], 0x24                 ; C20C8524
>	s_buffer_load_dword s26, s[4:7], 0x25                 ; C20D0525
>	s_buffer_load_dword s27, s[4:7], 0x26                 ; C20D8526
>	s_buffer_load_dword s32, s[4:7], 0x2b                 ; C210052B
>	s_buffer_load_dword s29, s[4:7], 0x28                 ; C20E8528
>	s_buffer_load_dword s30, s[4:7], 0x29                 ; C20F0529
>	s_buffer_load_dword s31, s[4:7], 0x2a                 ; C20F852A
>	s_buffer_load_dword s36, s[4:7], 0x2f                 ; C212052F
>	s_buffer_load_dword s35, s[4:7], 0x2e                 ; C211852E
>	s_buffer_load_dword s33, s[4:7], 0x2c                 ; C210852C
>	s_buffer_load_dword s34, s[4:7], 0x2d                 ; C211052D
>	s_buffer_load_dword s37, s[4:7], 0x30                 ; C2128530
>	s_buffer_load_dword s38, s[4:7], 0x31                 ; C2130531
>	s_buffer_load_dword s0, s[4:7], 0x13                  ; C2000513
>	s_buffer_load_dword s13, s[4:7], 0x3                  ; C2068503
>	s_buffer_load_dword s14, s[4:7], 0x4                  ; C2070504
>	s_buffer_load_dword s16, s[4:7], 0x7                  ; C2080507
>	s_buffer_load_dword s17, s[4:7], 0x8                  ; C2088508
>	s_buffer_load_dword s18, s[4:7], 0x9                  ; C2090509
>	s_buffer_load_dword s20, s[4:7], 0xb                  ; C20A050B
>	s_buffer_load_dword s21, s[4:7], 0xc                  ; C20A850C
>	s_buffer_load_dword s22, s[4:7], 0xd                  ; C20B050D
>	v_add_f32_e32 v5, 0.5, v6                             ; 060A0CF0
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v8, v8                              ; 7E101108
>	v_add_f32_e32 v9, 0.5, v7                             ; 06120EF0
>	v_lshlrev_b32_e32 v8, 4, v8                           ; 34101084
>	v_add_i32_e32 v10, vcc, 0xd0, v8                      ; 4A1410FF 000000D0
>	v_add_i32_e32 v11, vcc, 0xd4, v8                      ; 4A1610FF 000000D4
>	buffer_load_dword v10, v10, s[4:7], 0 offen           ; E0301000 80010A0A
>	v_add_i32_e32 v12, vcc, 0xd8, v8                      ; 4A1810FF 000000D8
>	buffer_load_dword v11, v11, s[4:7], 0 offen           ; E0301000 80010B0B
>	buffer_load_dword v12, v12, s[4:7], 0 offen           ; E0301000 80010C0C
>	v_add_i32_e32 v16, vcc, 0xec, v8                      ; 4A2010FF 000000EC
>	buffer_load_dword v16, v16, s[4:7], 0 offen           ; E0301000 80011010
>	v_add_i32_e32 v15, vcc, 0xe8, v8                      ; 4A1E10FF 000000E8
>	buffer_load_dword v15, v15, s[4:7], 0 offen           ; E0301000 80010F0F
>	v_add_i32_e32 v13, vcc, 0xe0, v8                      ; 4A1A10FF 000000E0
>	v_add_i32_e32 v14, vcc, 0xe4, v8                      ; 4A1C10FF 000000E4
>	v_add_i32_e32 v8, vcc, 0xdc, v8                       ; 4A1010FF 000000DC
>	buffer_load_dword v13, v13, s[4:7], 0 offen           ; E0301000 80010D0D
>	buffer_load_dword v14, v14, s[4:7], 0 offen           ; E0301000 80010E0E
>	buffer_load_dword v8, v8, s[4:7], 0 offen             ; E0301000 80010808
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_sub_f32_e32 v17, s1, v10                            ; 08221401
>	v_mul_f32_e32 v20, v17, v17                           ; 10282311
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_sub_f32_e32 v18, s2, v11                            ; 08241602
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_sub_f32_e32 v19, s3, v12                            ; 08261803
>	v_mac_f32_e32 v20, v18, v18                           ; 3E282512
>	v_mac_f32_e32 v20, v19, v19                           ; 3E282713
>	v_sqrt_f32_e32 v21, v20                               ; 7E2A6714
>	v_log_f32_e32 v21, v21                                ; 7E2A4F15
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_add_f32_e32 v16, 0xc7800000, v16                    ; 062020FF C7800000
>	v_floor_f32_e32 v22, v16                              ; 7E2C4910
>	v_subrev_f32_e32 v22, v22, v16                        ; 0A2C2116
>	v_mul_legacy_f32_e32 v21, s8, v21                     ; 0E2A2A08
>	v_subrev_f32_e32 v16, v22, v16                        ; 0A202116
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_add_f32_e32 v15, 0xc6000000, v15                    ; 061E1EFF C6000000
>	v_exp_f32_e32 v21, v21                                ; 7E2A4B15
>	v_mul_f32_e32 v16, 0x3a800000, v16                    ; 102020FF 3A800000
>	v_mul_f32_e32 v15, v21, v15                           ; 101E1F15
>	v_mul_f32_e32 v16, v21, v16                           ; 10202115
>	v_mul_f32_e32 v21, v4, v22                            ; 102A2D04
>	v_floor_f32_e32 v21, v21                              ; 7E2A4915
>	v_mad_f32 v21, v22, v4, -v21                          ; D2820015 84560916
>	v_mad_f32 v22, v22, v4, -v21                          ; D2820016 84560916
>	v_mac_f32_e32 v21, v3, v5                             ; 3E2A0B03
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_add_f32_e32 v3, v0, v13                             ; 06061B00
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_add_f32_e32 v0, v0, v14                             ; 06001D00
>	v_floor_f32_e32 v5, v3                                ; 7E0A4903
>	v_floor_f32_e32 v13, v0                               ; 7E1A4900
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_add_f32_e32 v8, 0xc6008000, v8                      ; 061010FF C6008000
>	v_subrev_f32_e32 v5, v5, v3                           ; 0A0A0705
>	v_subrev_f32_e32 v13, v13, v0                         ; 0A1A010D
>	v_mul_f32_e32 v8, 0x3e22f983, v8                      ; 101010FF 3E22F983
>	v_subrev_f32_e32 v3, v5, v3                           ; 0A060705
>	v_subrev_f32_e32 v0, v13, v0                          ; 0A00010D
>	v_fract_f32_e32 v8, v8                                ; 7E104108
>	v_mul_f32_e32 v6, v15, v6                             ; 100C0D0F
>	v_mul_f32_e32 v7, v16, v7                             ; 100E0F10
>	v_max_f32_e32 v15, v16, v15                           ; 201E1F10
>	v_sin_f32_e32 v16, v8                                 ; 7E206B08
>	v_mul_f32_e32 v3, v1, v3                              ; 10060701
>	v_mul_f32_e32 v0, v1, v0                              ; 10000101
>	v_rsq_f32_e32 v1, v20                                 ; 7E025D14
>	v_cos_f32_e32 v8, v8                                  ; 7E106D08
>	s_buffer_load_dword s3, s[4:7], 0x1c                  ; C201851C
>	s_buffer_load_dword s8, s[4:7], 0x1d                  ; C204051D
>	v_mul_f32_e32 v14, v1, v17                            ; 101C2301
>	v_mul_f32_e32 v17, v1, v18                            ; 10222501
>	v_mul_f32_e32 v18, v16, v7                            ; 10240F10
>	v_mad_f32 v18, v8, v6, -v18                           ; D2820012 844A0D08
>	v_mul_f32_e32 v6, v6, v16                             ; 100C2106
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v10, s3, v18                            ; 3E142403
>	v_mac_f32_e32 v6, v7, v8                              ; 3E0C1107
>	v_mac_f32_e32 v11, s8, v18                            ; 3E162408
>	v_mac_f32_e32 v12, s9, v18                            ; 3E182409
>	v_mac_f32_e32 v10, s10, v6                            ; 3E140C0A
>	v_mac_f32_e32 v11, s11, v6                            ; 3E160C0B
>	v_mac_f32_e32 v12, s24, v6                            ; 3E180C18
>	v_mul_f32_e32 v6, s12, v10                            ; 100C140C
>	v_mac_f32_e32 v6, s15, v11                            ; 3E0C160F
>	v_mac_f32_e32 v6, s19, v12                            ; 3E0C1813
>	v_add_f32_e32 v6, s23, v6                             ; 060C0C17
>	v_mov_b32_e32 v7, v6                                  ; 7E0E0306
>	v_mac_f32_e32 v7, 0xbdcccccd, v15                     ; 3E0E1EFF BDCCCCCD
>	v_add_f32_e64 v7, v7, 0 clamp                         ; D2060807 00010107
>	v_mul_f32_e32 v1, v1, v19                             ; 10022701
>	v_mul_f32_e32 v7, v7, v13                             ; 100E1B07
>	v_mul_f32_e32 v13, s11, v1                            ; 101A020B
>	exp 15, 32, 0, 0, 0, v3, v0, v5, v7                   ; F800020F 07050003
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mul_f32_e32 v0, s24, v14                            ; 10001C18
>	v_mad_f32 v5, v17, s24, -v13                          ; D2820005 84343111
>	v_mul_f32_e32 v3, s10, v17                            ; 1006220A
>	v_mad_f32 v0, v1, s10, -v0                            ; D2820000 84001501
>	v_mul_f32_e32 v7, v5, v5                              ; 100E0B05
>	v_rcp_f32_e32 v4, v4                                  ; 7E085504
>	v_mad_f32 v3, v14, s11, -v3                           ; D2820003 840C170E
>	v_mac_f32_e32 v7, v0, v0                              ; 3E0E0100
>	v_mac_f32_e32 v7, v3, v3                              ; 3E0E0703
>	v_rsq_f32_e32 v7, v7                                  ; 7E0E5D07
>	v_mad_f32 v9, -v9, v4, v4                             ; D2820009 24120909
>	s_buffer_load_dword s2, s[4:7], 0x33                  ; C2010533
>	v_mac_f32_e32 v9, v4, v22                             ; 3E122D04
>	v_subrev_f32_e32 v4, s28, v10                         ; 0A08141C
>	s_buffer_load_dword s1, s[4:7], 0x32                  ; C2008532
>	v_mul_f32_e32 v3, v7, v3                              ; 10060707
>	v_subrev_f32_e32 v13, s32, v11                        ; 0A1A1620
>	v_mul_f32_e32 v18, s26, v4                            ; 1024081A
>	v_mul_f32_e32 v5, v7, v5                              ; 100A0B07
>	v_mul_f32_e32 v0, v7, v0                              ; 10000107
>	v_mul_f32_e32 v7, s25, v4                             ; 100E0819
>	v_mul_f32_e32 v4, s27, v4                             ; 1008081B
>	v_mac_f32_e32 v7, s29, v13                            ; 3E0E1A1D
>	v_mac_f32_e32 v18, s30, v13                           ; 3E241A1E
>	v_mac_f32_e32 v4, s31, v13                            ; 3E081A1F
>	v_subrev_f32_e32 v13, s36, v12                        ; 0A1A1824
>	v_mac_f32_e32 v4, s35, v13                            ; 3E081A23
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v15, s2                                 ; 7E1E0202
>	v_mac_f32_e32 v7, s33, v13                            ; 3E0E1A21
>	v_mac_f32_e32 v18, s34, v13                           ; 3E241A22
>	v_mul_f32_e32 v13, 0.5, v4                            ; 101A08F0
>	v_mad_f32 v7, s37, v7, v13                            ; D2820007 04360E25
>	v_mac_f32_e32 v13, s38, v18                           ; 3E1A2426
>	v_mac_f32_e32 v15, s1, v4                             ; 3E1E0801
>	v_mul_f32_e32 v18, v17, v3                            ; 10240711
>	exp 15, 33, 0, 0, 0, v7, v13, v15, v4                 ; F800021F 040F0D07
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mul_f32_e32 v4, v1, v5                              ; 10080B01
>	v_mad_f32 v13, v0, v1, -v18                           ; D282000D 844A0300
>	v_mul_f32_e32 v7, v14, v0                             ; 100E010E
>	v_mad_f32 v4, v3, v14, -v4                            ; D2820004 84121D03
>	v_mul_f32_e32 v15, v13, v13                           ; 101E1B0D
>	v_mad_f32 v7, v5, v17, -v7                            ; D2820007 841E2305
>	v_mac_f32_e32 v15, v4, v4                             ; 3E1E0904
>	v_mac_f32_e32 v15, v7, v7                             ; 3E1E0F07
>	v_rsq_f32_e32 v15, v15                                ; 7E1E5D0F
>	s_buffer_load_dword s9, s[4:7], 0x18                  ; C2048518
>	s_buffer_load_dword s10, s[4:7], 0x19                 ; C2050519
>	v_mul_f32_e32 v18, v8, v5                             ; 10240B08
>	v_mul_f32_e32 v13, v15, v13                           ; 101A1B0F
>	v_mul_f32_e32 v5, v16, v5                             ; 100A0B10
>	v_mac_f32_e32 v18, v16, v13                           ; 3E241B10
>	v_mad_f32 v5, v13, v8, -v5                            ; D2820005 8416110D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v13, s9                                 ; 7E1A0209
>	s_buffer_load_dword s1, s[4:7], 0x0                   ; C2008500
>	s_buffer_load_dword s2, s[4:7], 0x1                   ; C2010501
>	s_buffer_load_dword s3, s[4:7], 0x5                   ; C2018505
>	s_buffer_load_dword s8, s[4:7], 0xf                   ; C204050F
>	s_buffer_load_dword s11, s[4:7], 0x1a                 ; C205851A
>	s_buffer_load_dword s12, s[4:7], 0x1b                 ; C206051B
>	s_buffer_load_dword s4, s[4:7], 0x17                  ; C2020517
>	v_mac_f32_e32 v13, s10, v6                            ; 3E1A0C0A
>	v_add_f32_e64 v13, v13, 0 clamp                       ; D206080D 0001010D
>	v_log_f32_e32 v13, v13                                ; 7E1A4F0D
>	v_mul_f32_e32 v19, v8, v3                             ; 10260708
>	v_mul_f32_e32 v7, v15, v7                             ; 100E0F0F
>	v_mul_f32_e32 v3, v16, v3                             ; 10060710
>	v_mul_f32_e32 v4, v15, v4                             ; 1008090F
>	v_mul_f32_e32 v15, v8, v0                             ; 101E0108
>	v_mul_f32_e32 v0, v16, v0                             ; 10000110
>	v_mad_f32 v0, v4, v8, -v0                             ; D2820000 84021104
>	v_mad_f32 v3, v7, v8, -v3                             ; D2820003 840E1107
>	v_mov_b32_e32 v8, s0                                  ; 7E100200
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_sub_f32_e32 v8, s4, v8                              ; 08101004
>	v_add_f32_e32 v8, 0x3a83126f, v8                      ; 061010FF 3A83126F
>	v_mul_legacy_f32_e32 v13, s11, v13                    ; 0E1A1A0B
>	v_rcp_f32_e32 v8, v8                                  ; 7E105508
>	v_mac_f32_e32 v19, v16, v7                            ; 3E260F10
>	v_exp_f32_e32 v13, v13                                ; 7E1A4B0D
>	v_sub_f32_e64 v7, 1.0, s12                            ; D2080007 000018F2
>	v_mac_f32_e32 v7, s12, v13                            ; 3E0E1A0C
>	v_subrev_f32_e32 v13, s0, v11                         ; 0A1A1600
>	v_max_f32_e32 v13, 0, v13                             ; 201A1A80
>	v_mul_f32_e32 v8, v8, v13                             ; 10101B08
>	v_log_f32_e32 v8, v8                                  ; 7E104F08
>	v_floor_f32_e32 v13, s4                               ; 7E1A4804
>	v_sub_f32_e32 v13, s4, v13                            ; 081A1A04
>	v_mul_f32_e32 v13, 0x41000000, v13                    ; 101A1AFF 41000000
>	v_mul_legacy_f32_e32 v8, v13, v8                      ; 0E10110D
>	v_exp_f32_e32 v8, v8                                  ; 7E104B08
>	v_mul_f32_e32 v7, v7, v7                              ; 100E0F07
>	v_add_f32_e64 v8, v8, 0 clamp                         ; D2060808 00010108
>	v_mul_f32_e32 v13, s2, v10                            ; 101A1402
>	v_mac_f32_e32 v15, v16, v4                            ; 3E1E0910
>	v_mul_f32_e32 v4, s1, v10                             ; 10081401
>	v_mul_f32_e32 v7, v8, v7                              ; 100E0F08
>	v_mul_f32_e32 v8, s13, v10                            ; 1010140D
>	exp 15, 34, 0, 0, 0, v5, v0, v3, v18                  ; F800022F 12030005
>	v_mac_f32_e32 v4, s14, v11                            ; 3E08160E
>	v_mac_f32_e32 v13, s3, v11                            ; 3E1A1603
>	v_mac_f32_e32 v8, s16, v11                            ; 3E101610
>	exp 15, 35, 0, 0, 0, v15, v19, v21, v9                ; F800023F 0915130F
>	v_mac_f32_e32 v4, s17, v12                            ; 3E081811
>	v_mac_f32_e32 v13, s18, v12                           ; 3E1A1812
>	v_mac_f32_e32 v8, s20, v12                            ; 3E101814
>	exp 15, 36, 0, 0, 0, v7, v10, v11, v12                ; F800024F 0C0B0A07
>	v_add_f32_e32 v4, s21, v4                             ; 06080815
>	v_add_f32_e32 v13, s22, v13                           ; 061A1A16
>	v_add_f32_e32 v8, s8, v8                              ; 06101008
>	exp 15, 37, 0, 0, 0, v14, v17, v1, v0                 ; F800025F 0001110E
>	exp 15, 12, 0, 1, 0, v4, v13, v6, v8                  ; F80008CF 08060D04
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1284 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                     ; BE80047E
>	s_wqm_b64 exec, exec                                       ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                      ; C0C60510
>	s_load_dwordx4 s[20:23], s[4:5], 0x1c                      ; C08A051C
>	s_mov_b32 m0, s11                                          ; BEFC030B
>	v_interp_p1_f32 v7, v2, 2, 3, [m0]                         ; C81C0E02
>	v_interp_p2_f32 v7, [v7], v3, 2, 3, [m0]                   ; C81D0E03
>	v_interp_p1_f32 v8, v2, 3, 3, [m0]                         ; C8200F02
>	v_interp_p2_f32 v8, [v8], v3, 3, 3, [m0]                   ; C8210F03
>	s_waitcnt lgkmcnt(0)                                       ; BF8C007F
>	s_and_b32 s20, s20, s19                                    ; 87141314
>	image_sample v[7:10], v[7:8], s[12:19], s[20:23] dmask:0xf ; F0800F00 00A30707
>	v_interp_p1_f32 v0, v2, 3, 0, [m0]                         ; C8000302
>	v_interp_p2_f32 v0, [v0], v3, 3, 0, [m0]                   ; C8010303
>	s_waitcnt vmcnt(0)                                         ; BF8C0F70
>	v_mul_f32_e32 v0, v10, v0                                  ; 1000010A
>	v_add_f32_e64 v4, v0, 0 clamp                              ; D2060804 00010100
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                         ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]                   ; C8010603
>	v_mov_b32_e32 v6, 0                                        ; 7E0C0280
>	v_mov_b32_e32 v5, 0                                        ; 7E0A0280
>	v_mov_b32_e32 v1, 0                                        ; 7E020280
>	v_cmp_lt_f32_e32 vcc, 0, v0                                ; 7C020080
>	s_and_saveexec_b64 s[6:7], vcc                             ; BE86246A
>	s_xor_b64 s[6:7], exec, s[6:7]                             ; 8986067E
>	s_cbranch_execz BB0_2                                      ; BF880000
>	v_add_f32_e32 v1, v7, v7                                   ; 06020F07
>	v_mad_f32 v5, 2.0, v8, -1.0                                ; D2820005 03CE10F4
>	v_sub_f32_e32 v7, 1.0, v4                                  ; 080E08F2
>	v_mov_b32_e32 v8, 0x3f4ccccd                               ; 7E1002FF 3F4CCCCD
>	s_mov_b32 m0, s11                                          ; BEFC030B
>	v_madak_f32_e32 v7, v8, v7, 0x3e4ccccd                     ; 420E0F08 3E4CCCCD
>	v_interp_p1_f32 v8, v2, 2, 5, [m0]                         ; C8201602
>	v_mad_f32 v6, 2.0, v9, -1.0                                ; D2820006 03CE12F4
>	v_interp_p2_f32 v8, [v8], v3, 2, 5, [m0]                   ; C8211603
>	v_interp_p1_f32 v9, v2, 2, 2, [m0]                         ; C8240A02
>	v_interp_p2_f32 v9, [v9], v3, 2, 2, [m0]                   ; C8250A03
>	v_interp_p1_f32 v10, v2, 1, 3, [m0]                        ; C8280D02
>	v_interp_p2_f32 v10, [v10], v3, 1, 3, [m0]                 ; C8290D03
>	v_mad_f32 v10, v1, v10, -v10                               ; D282000A 842A1501
>	v_mac_f32_e32 v10, v5, v9                                  ; 3E141305
>	v_mac_f32_e32 v10, v6, v8                                  ; 3E141106
>	v_interp_p1_f32 v8, v2, 1, 5, [m0]                         ; C8201502
>	v_interp_p2_f32 v8, [v8], v3, 1, 5, [m0]                   ; C8211503
>	v_interp_p1_f32 v9, v2, 1, 2, [m0]                         ; C8240902
>	v_interp_p2_f32 v9, [v9], v3, 1, 2, [m0]                   ; C8250903
>	v_interp_p1_f32 v11, v2, 0, 3, [m0]                        ; C82C0C02
>	v_interp_p2_f32 v11, [v11], v3, 0, 3, [m0]                 ; C82D0C03
>	v_mad_f32 v11, v1, v11, -v11                               ; D282000B 842E1701
>	v_mac_f32_e32 v11, v5, v9                                  ; 3E161305
>	v_mac_f32_e32 v11, v6, v8                                  ; 3E161106
>	v_interp_p1_f32 v8, v2, 0, 5, [m0]                         ; C8201402
>	v_interp_p2_f32 v8, [v8], v3, 0, 5, [m0]                   ; C8211403
>	v_interp_p1_f32 v9, v2, 0, 2, [m0]                         ; C8240802
>	v_interp_p2_f32 v9, [v9], v3, 0, 2, [m0]                   ; C8250803
>	v_interp_p1_f32 v12, v2, 3, 2, [m0]                        ; C8300B02
>	v_interp_p2_f32 v12, [v12], v3, 3, 2, [m0]                 ; C8310B03
>	v_mad_f32 v1, v1, v12, -v12                                ; D2820001 84321901
>	v_mac_f32_e32 v1, v5, v9                                   ; 3E021305
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                         ; C8140402
>	v_mac_f32_e32 v1, v6, v8                                   ; 3E021106
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                   ; C8150403
>	v_interp_p1_f32 v6, v2, 1, 1, [m0]                         ; C8180502
>	v_interp_p2_f32 v6, [v6], v3, 1, 1, [m0]                   ; C8190503
>	v_interp_p1_f32 v8, v2, 3, 1, [m0]                         ; C8200702
>	v_interp_p2_f32 v8, [v8], v3, 3, 1, [m0]                   ; C8210703
>	v_mov_b32_e32 v9, 0x6f800000                               ; 7E1202FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v9, |v8|                             ; D002026A 00021109
>	v_mov_b32_e32 v9, 0x2f800000                               ; 7E1202FF 2F800000
>	s_load_dwordx4 s[12:15], s[2:3], 0x0                       ; C0860300
>	v_cndmask_b32_e32 v9, 1.0, v9, vcc                         ; 001212F2
>	v_mul_f32_e32 v8, v9, v8                                   ; 10101109
>	v_rcp_f32_e32 v8, v8                                       ; 7E105508
>	s_load_dwordx8 s[16:23], s[4:5], 0x0                       ; C0C80500
>	s_load_dwordx4 s[24:27], s[4:5], 0xc                       ; C08C050C
>	s_waitcnt lgkmcnt(0)                                       ; BF8C007F
>	s_buffer_load_dword s8, s[12:15], 0x7                      ; C2040D07
>	v_mul_f32_e32 v5, v8, v5                                   ; 100A0B08
>	v_mul_f32_e32 v6, v8, v6                                   ; 100C0D08
>	s_buffer_load_dword s4, s[12:15], 0xb                      ; C2020D0B
>	s_and_b32 s24, s24, s23                                    ; 87181718
>	v_mul_f32_e32 v5, v5, v9                                   ; 100A1305
>	v_mul_f32_e32 v6, v6, v9                                   ; 100C1306
>	s_buffer_load_dword s5, s[12:15], 0xf                      ; C2028D0F
>	image_sample v5, v[5:6], s[16:23], s[24:27] dmask:0x8      ; F0800800 00C40505
>	v_interp_p1_f32 v6, v2, 1, 4, [m0]                         ; C8181102
>	v_interp_p2_f32 v6, [v6], v3, 1, 4, [m0]                   ; C8191103
>	v_interp_p1_f32 v8, v2, 2, 4, [m0]                         ; C8201202
>	v_interp_p2_f32 v8, [v8], v3, 2, 4, [m0]                   ; C8211203
>	v_interp_p1_f32 v9, v2, 3, 4, [m0]                         ; C8241302
>	s_waitcnt lgkmcnt(0)                                       ; BF8C007F
>	v_sub_f32_e32 v6, s8, v6                                   ; 080C0C08
>	v_interp_p2_f32 v9, [v9], v3, 3, 4, [m0]                   ; C8251303
>	v_sub_f32_e32 v8, s4, v8                                   ; 08101004
>	v_mul_f32_e32 v12, v6, v6                                  ; 10180D06
>	v_sub_f32_e32 v9, s5, v9                                   ; 08121205
>	v_mac_f32_e32 v12, v8, v8                                  ; 3E181108
>	v_mac_f32_e32 v12, v9, v9                                  ; 3E181309
>	v_rsq_f32_e32 v12, v12                                     ; 7E185D0C
>	s_buffer_load_dword s9, s[12:15], 0x14                     ; C2048D14
>	s_buffer_load_dword s16, s[12:15], 0x15                    ; C2080D15
>	s_buffer_load_dword s4, s[12:15], 0x16                     ; C2020D16
>	v_mul_f32_e32 v6, v12, v6                                  ; 100C0D0C
>	v_mul_f32_e32 v1, v1, v6                                   ; 10020D01
>	v_mul_f32_e32 v8, v12, v8                                  ; 1010110C
>	v_mul_f32_e32 v9, v12, v9                                  ; 1012130C
>	v_mac_f32_e32 v1, v11, v8                                  ; 3E02110B
>	v_add_f32_e32 v0, 0xbf733333, v0                           ; 060000FF BF733333
>	v_mov_b32_e32 v6, 0xc1a00000                               ; 7E0C02FF C1A00000
>	v_mac_f32_e32 v1, v10, v9                                  ; 3E02130A
>	v_mad_f32 v0, v6, v0, 1.0                                  ; D2820000 03CA0106
>	v_add_f32_e32 v1, v7, v1                                   ; 06020307
>	v_add_f32_e64 v0, v0, 0 clamp                              ; D2060800 00010100
>	v_add_f32_e64 v1, v1, 0 clamp                              ; D2060801 00010101
>	s_waitcnt lgkmcnt(0)                                       ; BF8C007F
>	v_mul_f32_e32 v6, s9, v0                                   ; 100C0009
>	v_mul_f32_e32 v7, s16, v0                                  ; 100E0010
>	s_waitcnt vmcnt(0)                                         ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                   ; 100A0B05
>	v_mul_f32_e32 v0, s4, v0                                   ; 10000004
>	v_mul_f32_e32 v1, v1, v1                                   ; 10020301
>	v_mul_f32_e32 v6, v5, v6                                   ; 100C0D05
>	v_mul_f32_e32 v7, v5, v7                                   ; 100E0F05
>	v_mul_f32_e32 v0, v5, v0                                   ; 10000105
>	v_mul_f32_e32 v6, v6, v1                                   ; 100C0306
>	v_mul_f32_e32 v5, v7, v1                                   ; 100A0307
>	v_mul_f32_e32 v1, v0, v1                                   ; 10020300
>	s_or_b64 exec, exec, s[6:7]                                ; 88FE067E
>	s_and_b64 exec, exec, s[0:1]                               ; 87FE007E
>	s_mov_b32 m0, s11                                          ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                         ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                   ; C8010003
>	v_mul_f32_e32 v0, v6, v0                                   ; 10000106
>	v_interp_p1_f32 v6, v2, 1, 0, [m0]                         ; C8180102
>	v_interp_p2_f32 v6, [v6], v3, 1, 0, [m0]                   ; C8190103
>	v_mul_f32_e32 v5, v5, v6                                   ; 100A0D05
>	v_interp_p1_f32 v6, v2, 2, 0, [m0]                         ; C8180202
>	v_mov_b32_e32 v7, 0x39fffff7                               ; 7E0E02FF 39FFFFF7
>	v_cmp_gt_f32_e32 vcc, v7, v4                               ; 7C080907
>	v_interp_p2_f32 v6, [v6], v3, 2, 0, [m0]                   ; C8190203
>	v_cndmask_b32_e64 v7, 0, -1.0, vcc                         ; D2000007 01A9E680
>	v_mul_f32_e32 v1, v1, v6                                   ; 10020D01
>	v_cmpx_le_f32_e32 vcc, 0, v7                               ; 7C260E80
>	s_cbranch_execnz BB0_4                                     ; BF890000
>	exp 0, 9, 0, 1, 1, v0, v0, v0, v0                          ; F8001890 00000000
>	s_endpgm                                                   ; BF810000
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                         ; C0800300
>	s_mov_b32 m0, s11                                          ; BEFC030B
>	v_interp_p1_f32 v2, v2, 0, 4, [m0]                         ; C8081002
>	v_interp_p2_f32 v2, [v2], v3, 0, 4, [m0]                   ; C8091003
>	s_waitcnt lgkmcnt(0)                                       ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x0                        ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                        ; C2028101
>	s_buffer_load_dword s0, s[0:3], 0x2                        ; C2000102
>	s_waitcnt lgkmcnt(0)                                       ; BF8C007F
>	v_mad_f32 v3, -v2, s4, s4                                  ; D2820003 20100902
>	v_mad_f32 v6, -v2, s5, s5                                  ; D2820006 20140B02
>	v_mad_f32 v7, -v2, s0, s0                                  ; D2820007 20000102
>	v_mac_f32_e32 v3, v2, v0                                   ; 3E060102
>	v_mac_f32_e32 v6, v2, v5                                   ; 3E0C0B02
>	v_mac_f32_e32 v7, v2, v1                                   ; 3E0E0302
>	v_mul_f32_e32 v0, v4, v3                                   ; 10000704
>	v_mul_f32_e32 v1, v4, v6                                   ; 10020D04
>	v_mul_f32_e32 v2, v4, v7                                   ; 10040F04
>	v_mov_b32_e32 v3, v4                                       ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 776 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[2]
>DCL TEMP[0..4], LOCAL
>IMM[0] FLT32 {    0.2500,     2.0000,    -1.0000,     0.0000}
>IMM[1] UINT32 {4294967295, 0, 0, 0}
>IMM[2] FLT32 {100000.0000,   100.0000,     1.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     1.4427,     0.1667,     0.0000}
>IMM[4] FLT32 {   10.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MOV TEMP[1].xy, IN[0].zwww
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: ADD TEMP[0], TEMP[0], TEMP[1]
>  5: MOV TEMP[1].xy, IN[1].xyyy
>  6: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  7: ADD TEMP[1], TEMP[0], TEMP[1]
>  8: MOV TEMP[2].xy, IN[1].zwww
>  9: TEX TEMP[2], TEMP[2], SAMP[0], 2D
> 10: ADD TEMP[0], TEMP[1], TEMP[2]
> 11: MUL TEMP[0].x, TEMP[0], IMM[0].xxxx
> 12: MUL TEMP[1].x, CONST[2].xxxx, IMM[0].yyyy
> 13: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
> 14: RCP TEMP[0].x, TEMP[0].xxxx
> 15: ADD TEMP[0].x, TEMP[0].xxxx, IMM[0].zzzz
> 16: FSNE TEMP[3].x, TEMP[0].xxxx, TEMP[0].xxxx
> 17: UCMP TEMP[2].x, TEMP[3].xxxx, IMM[1].yyyy, IMM[1].xxxx
> 18: FSLT TEMP[3].x, TEMP[0].xxxx, IMM[0].wwww
> 19: FSLT TEMP[4].x, IMM[2].xxxx, TEMP[0].xxxx
> 20: OR TEMP[3].x, TEMP[3].xxxx, TEMP[4].xxxx
> 21: UCMP TEMP[2].x, TEMP[3].xxxx, IMM[1].yyyy, TEMP[2].xxxx
> 22: MIN TEMP[0].x, TEMP[0].xxxx, IMM[2].yyyy
> 23: MOV TEMP[3].xy, IMM[2].wwww
> 24: TEX TEMP[3].x, TEMP[3], SAMP[1], 2D
> 25: ADD TEMP[3].x, IMM[2].zzzz, -TEMP[3].xxxx
> 26: RCP TEMP[3].x, TEMP[3].xxxx
> 27: MUL TEMP[3].x, TEMP[1].xxxx, TEMP[3].xxxx
> 28: MOV TEMP[4].x, TEMP[3].xxxx
> 29: UIF TEMP[2].xxxx :0
> 30:   POW TEMP[2].x, TEMP[3].xxxx, IMM[3].xxxx
> 31:   POW TEMP[0].x, TEMP[0].xxxx, IMM[3].xxxx
> 32:   MUL TEMP[3].x, -CONST[2].yyyy, IMM[3].yyyy
> 33:   EX2 TEMP[3].x, TEMP[3].xxxx
> 34:   ADD TEMP[3].x, IMM[2].zzzz, -TEMP[3].xxxx
> 35:   MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 36:   LRP TEMP[0].x, TEMP[3].xxxx, TEMP[0].xxxx, TEMP[2].xxxx
> 37:   POW TEMP[4].x, TEMP[0].xxxx, IMM[3].zzzz
> 38: ENDIF
> 39: ADD TEMP[0].x, TEMP[4].xxxx, IMM[3].wwww
> 40: RCP TEMP[0].x, TEMP[0].xxxx
> 41: MUL TEMP[0].x, TEMP[1].xxxx, TEMP[0].xxxx
> 42: MIN TEMP[0].x, TEMP[0].xxxx, IMM[4].xxxx
> 43: ADD TEMP[0].x, IMM[2].zzzz, -TEMP[0].xxxx
> 44: MOV OUT[0], TEMP[0].xxxx
> 45: END
>radeonsi: Compiling shader 78
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %42 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <8 x i32>, <8 x i32> addrspace(2)* %42, align 32, !invariant.load !0
>  %44 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %45 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %44, i64 0, i64 3, !amdgpu.uniform !0
>  %46 = load <4 x i32>, <4 x i32> addrspace(2)* %45, align 16, !invariant.load !0
>  %47 = extractelement <8 x i32> %43, i32 7
>  %48 = extractelement <4 x i32> %46, i32 0
>  %49 = and i32 %48, %47
>  %50 = insertelement <4 x i32> %46, i32 %49, i32 0
>  %51 = bitcast float %40 to i32
>  %52 = bitcast float %41 to i32
>  %53 = insertelement <2 x i32> undef, i32 %51, i32 0
>  %54 = insertelement <2 x i32> %53, i32 %52, i32 1
>  %55 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %54, <8 x i32> %43, <4 x i32> %50, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %56 = extractelement <4 x float> %55, i32 0
>  %57 = fadd float %39, %56
>  %58 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %59 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %60 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %61 = load <8 x i32>, <8 x i32> addrspace(2)* %60, align 32, !invariant.load !0
>  %62 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %63 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %62, i64 0, i64 3, !amdgpu.uniform !0
>  %64 = load <4 x i32>, <4 x i32> addrspace(2)* %63, align 16, !invariant.load !0
>  %65 = extractelement <8 x i32> %61, i32 7
>  %66 = extractelement <4 x i32> %64, i32 0
>  %67 = and i32 %66, %65
>  %68 = insertelement <4 x i32> %64, i32 %67, i32 0
>  %69 = bitcast float %58 to i32
>  %70 = bitcast float %59 to i32
>  %71 = insertelement <2 x i32> undef, i32 %69, i32 0
>  %72 = insertelement <2 x i32> %71, i32 %70, i32 1
>  %73 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %72, <8 x i32> %61, <4 x i32> %68, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %74 = extractelement <4 x float> %73, i32 0
>  %75 = fadd float %57, %74
>  %76 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %77 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %78 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %79 = load <8 x i32>, <8 x i32> addrspace(2)* %78, align 32, !invariant.load !0
>  %80 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %81 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %80, i64 0, i64 3, !amdgpu.uniform !0
>  %82 = load <4 x i32>, <4 x i32> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = extractelement <8 x i32> %79, i32 7
>  %84 = extractelement <4 x i32> %82, i32 0
>  %85 = and i32 %84, %83
>  %86 = insertelement <4 x i32> %82, i32 %85, i32 0
>  %87 = bitcast float %76 to i32
>  %88 = bitcast float %77 to i32
>  %89 = insertelement <2 x i32> undef, i32 %87, i32 0
>  %90 = insertelement <2 x i32> %89, i32 %88, i32 1
>  %91 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %90, <8 x i32> %79, <4 x i32> %86, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %92 = extractelement <4 x float> %91, i32 0
>  %93 = fadd float %75, %92
>  %94 = fmul float %93, 2.500000e-01
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = call float @llvm.SI.load.const(<16 x i8> %96, i32 32)
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fmul float %94, %94
>  %100 = fdiv float 1.000000e+00, %99, !fpmath !1
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fcmp uno float %101, 0.000000e+00
>  %103 = fcmp olt float %101, 0.000000e+00
>  %104 = fcmp ogt float %101, 1.000000e+05
>  %105 = or i1 %103, %104
>  %106 = or i1 %105, %102
>  %107 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %108 = load <8 x i32>, <8 x i32> addrspace(2)* %107, align 32, !invariant.load !0
>  %109 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %110 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %109, i64 0, i64 7, !amdgpu.uniform !0
>  %111 = load <4 x i32>, <4 x i32> addrspace(2)* %110, align 16, !invariant.load !0
>  %112 = extractelement <8 x i32> %108, i32 7
>  %113 = extractelement <4 x i32> %111, i32 0
>  %114 = and i32 %113, %112
>  %115 = insertelement <4 x i32> %111, i32 %114, i32 0
>  %116 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> <i32 1056964608, i32 1056964608>, <8 x i32> %108, <4 x i32> %115, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %117 = extractelement <4 x float> %116, i32 0
>  %118 = fsub float 1.000000e+00, %117
>  %119 = fdiv float 1.000000e+00, %118, !fpmath !1
>  %120 = fmul float %98, %119
>  br i1 %106, label %endif38, label %if29
>
>if29:                                             ; preds = %main_body
>  %121 = call float @llvm.minnum.f32(float %101, float 1.000000e+02)
>  %122 = call float @llvm.pow.f32(float %120, float 6.000000e+00)
>  %123 = call float @llvm.pow.f32(float %121, float 6.000000e+00)
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 36)
>  %127 = fmul float %126, 0xBFF7154760000000
>  %128 = call float @llvm.exp2.f32(float %127)
>  %129 = fsub float 1.000000e+00, %128
>  %130 = call float @llvm.AMDGPU.clamp.(float %129, float 0.000000e+00, float 1.000000e+00)
>  %131 = fsub float 1.000000e+00, %130
>  %132 = fmul float %123, %130
>  %133 = fmul float %122, %131
>  %134 = fadd float %132, %133
>  %135 = call float @llvm.pow.f32(float %134, float 0x3FC5555820000000)
>  br label %endif38
>
>endif38:                                          ; preds = %main_body, %if29
>  %.0 = phi float [ %135, %if29 ], [ %120, %main_body ]
>  %136 = fadd float %.0, 0x3E45798EE0000000
>  %137 = fdiv float 1.000000e+00, %136, !fpmath !1
>  %138 = fmul float %98, %137
>  %139 = call float @llvm.minnum.f32(float %138, float 1.000000e+01)
>  %140 = fsub float 1.000000e+00, %139
>  %141 = bitcast float %5 to i32
>  %142 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %141, 10
>  %143 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %142, float %140, 11
>  %144 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %143, float %140, 12
>  %145 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %144, float %140, 13
>  %146 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %145, float %140, 14
>  %147 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %146, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %147
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.minnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	v_mov_b32_e32 v1, 1.0                                 ; 7E0202F2
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_buffer_load_dword s4, s[0:3], 0x2                   ; C2020102
>	s_buffer_load_dword s5, s[0:3], 0x3                   ; C2028103
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_buffer_load_dword s6, s[0:3], 0x6                   ; C2030106
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_rcp_f32_e32 v0, s4                                  ; 7E005404
>	v_rcp_f32_e32 v3, s5                                  ; 7E065405
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s0, s[0:3], 0xb                   ; C200010B
>	v_mul_f32_e32 v0, v0, v6                              ; 10000D00
>	v_mul_f32_e32 v4, v3, v7                              ; 10080F03
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v5, s7, v8                           ; 0A0A1007
>	v_subrev_f32_e32 v6, s8, v9                           ; 0A0C1208
>	v_add_f32_e32 v8, s7, v8                              ; 06101007
>	v_mac_f32_e32 v4, v3, v7                              ; 3E080F03
>	v_add_f32_e32 v9, s8, v9                              ; 06121208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v3, s4, v5                              ; 10060A04
>	v_mul_f32_e32 v5, s0, v6                              ; 100A0C00
>	v_mul_f32_e32 v6, s4, v8                              ; 100C1004
>	v_mul_f32_e32 v7, s0, v9                              ; 100E1200
>	exp 15, 32, 0, 0, 0, v3, v5, v6, v5                   ; F800020F 05060503
>	exp 15, 33, 0, 0, 0, v3, v7, v6, v7                   ; F800021F 07060703
>	v_mad_f32 v0, 2.0, v0, -1.0                           ; D2820000 03CE00F4
>	v_mad_f32 v4, v4, s6, -s6                             ; D2820004 80180D04
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>	v_mov_b32_e32 v3, 0                                   ; 7E060280
>	exp 15, 12, 0, 1, 0, v0, v4, v3, v1                   ; F80008CF 01030400
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 196 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x1
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                ; BE88047E
>	s_wqm_b64 exec, exec                                  ; BEFE0A7E
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                  ; C0CA0500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                  ; C08E050C
>	s_mov_b32 m0, s11                                     ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                    ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]              ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                    ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]              ; C8050103
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_and_b32 s28, s28, s27                               ; 871C1B1C
>	image_sample v4, v[0:1], s[20:27], s[28:31] dmask:0x1 ; F0800100 00E50400
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                    ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]              ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                    ; C8040302
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]              ; C8050303
>	image_sample v0, v[0:1], s[20:27], s[28:31] dmask:0x1 ; F0800100 00E50000
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_add_f32_e32 v4, v0, v4                              ; 06080900
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                    ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]              ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                    ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]              ; C8050503
>	image_sample v0, v[0:1], s[20:27], s[28:31] dmask:0x1 ; F0800100 00E50000
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_add_f32_e32 v4, v0, v4                              ; 06080900
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                    ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]              ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                    ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]              ; C8050703
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                 ; C0C60510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                 ; C090051C
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                    ; C0820300
>	image_sample v0, v[0:1], s[20:27], s[28:31] dmask:0x1 ; F0800100 00E50000
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_add_f32_e32 v0, v0, v4                              ; 06000900
>	v_mul_f32_e32 v1, 0x3e800000, v0                      ; 100200FF 3E800000
>	v_mul_f32_e32 v1, v1, v1                              ; 10020301
>	v_rcp_f32_e32 v1, v1                                  ; 7E025501
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_buffer_load_dword s0, s[4:7], 0x8                   ; C2000508
>	v_mov_b32_e32 v3, 0x47c35000                          ; 7E0602FF 47C35000
>	v_mov_b32_e32 v2, 0.5                                 ; 7E0402F0
>	v_add_f32_e32 v1, -1.0, v1                            ; 060202F3
>	v_cmp_nlt_f32_e64 s[2:3], v3, v1                      ; D01C0002 00020303
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_add_f32_e64 v0, s0, s0                              ; D2060000 00000000
>	v_cmp_ngt_f32_e64 s[0:1], 0, v1                       ; D0160000 00020280
>	s_and_b64 s[0:1], s[0:1], s[2:3]                      ; 87800200
>	s_and_b32 s32, s32, s19                               ; 87201320
>	v_cmp_o_f32_e32 vcc, v1, v1                           ; 7C0E0301
>	v_mov_b32_e32 v3, v2                                  ; 7E060302
>	s_and_b64 exec, exec, s[8:9]                          ; 87FE087E
>	image_sample v2, v[2:3], s[12:19], s[32:35] dmask:0x1 ; F0800100 01030202
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_sub_f32_e32 v2, 1.0, v2                             ; 080404F2
>	v_rcp_f32_e32 v2, v2                                  ; 7E045502
>	s_and_b64 s[2:3], s[0:1], vcc                         ; 87826A00
>	v_mul_f32_e32 v2, v2, v0                              ; 10040102
>	s_and_saveexec_b64 s[0:1], s[2:3]                     ; BE802402
>	s_xor_b64 s[0:1], exec, s[0:1]                        ; 8980007E
>	s_cbranch_execz BB0_2                                 ; BF880000
>	v_min_f32_e32 v1, 0x42c80000, v1                      ; 1E0202FF 42C80000
>	v_log_f32_e32 v2, v2                                  ; 7E044F02
>	v_log_f32_e32 v1, v1                                  ; 7E024F01
>	s_buffer_load_dword s2, s[4:7], 0x9                   ; C2010509
>	v_mov_b32_e32 v3, 0x40c00000                          ; 7E0602FF 40C00000
>	v_mul_legacy_f32_e32 v2, v3, v2                       ; 0E040503
>	v_mul_legacy_f32_e32 v1, v3, v1                       ; 0E020303
>	v_mov_b32_e32 v3, 0xbfb8aa3b                          ; 7E0602FF BFB8AA3B
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v3, s2, v3                              ; 10060602
>	v_exp_f32_e32 v3, v3                                  ; 7E064B03
>	v_sub_f32_e32 v3, 1.0, v3                             ; 080606F2
>	v_exp_f32_e32 v2, v2                                  ; 7E044B02
>	v_add_f32_e64 v3, v3, 0 clamp                         ; D2060803 00010103
>	v_exp_f32_e32 v1, v1                                  ; 7E024B01
>	v_mad_f32 v2, -v3, v2, v2                             ; D2820002 240A0503
>	v_mac_f32_e32 v2, v3, v1                              ; 3E040303
>	v_log_f32_e32 v1, v2                                  ; 7E024F02
>	v_mul_legacy_f32_e32 v1, 0x3e2aaac1, v1               ; 0E0202FF 3E2AAAC1
>	v_exp_f32_e32 v2, v1                                  ; 7E044B01
>	s_or_b64 exec, exec, s[0:1]                           ; 88FE007E
>	v_add_f32_e32 v1, 0x322bcc77, v2                      ; 060204FF 322BCC77
>	v_rcp_f32_e32 v1, v1                                  ; 7E025501
>	v_mul_f32_e32 v0, v1, v0                              ; 10000101
>	v_min_f32_e32 v0, 0x41200000, v0                      ; 1E0000FF 41200000
>	v_sub_f32_e32 v0, 1.0, v0                             ; 080000F2
>	v_mov_b32_e32 v1, v0                                  ; 7E020300
>	v_mov_b32_e32 v2, v0                                  ; 7E040300
>	v_mov_b32_e32 v3, v0                                  ; 7E060300
>Shader epilog disassembly:
>	exp 1, 0, 0, 1, 1, v0, v0, v0, v0 ; F8001801 00000000
>	s_endpgm                          ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 448 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen  ; E00C2000 80010704
>	s_buffer_load_dword s4, s[0:3], 0x10                  ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                  ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                  ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x374                 ; C20380FF 00000374
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v0, s4                                  ; 7E000204
>	v_mov_b32_e32 v1, s5                                  ; 7E020205
>	v_mov_b32_e32 v3, s6                                  ; 7E060206
>	s_cmp_eq_u32 s7, -1                                   ; BF06C107
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                  ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x14                  ; C2020114
>	s_buffer_load_dword s5, s[0:3], 0x15                  ; C2028115
>	s_buffer_load_dword s6, s[0:3], 0x16                  ; C2030116
>	s_buffer_load_dword s7, s[0:3], 0x17                  ; C2038117
>	s_buffer_load_dword s8, s[0:3], 0x18                  ; C2040118
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v6, s4                                  ; 7E0C0204
>	v_mov_b32_e32 v12, s5                                 ; 7E180205
>	s_buffer_load_dword s4, s[0:3], 0x19                  ; C2020119
>	s_buffer_load_dword s5, s[0:3], 0x1a                  ; C202811A
>	v_mov_b32_e32 v4, s6                                  ; 7E080206
>	v_sub_f32_e32 v11, s7, v0                             ; 08160007
>	v_mov_b32_e32 v5, s8                                  ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x1b                  ; C203011B
>	s_buffer_load_dword s7, s[0:3], 0x1c                  ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                  ; C204011D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v14, s4                                 ; 7E1C0204
>	v_mov_b32_e32 v13, s5                                 ; 7E1A0205
>	s_buffer_load_dword s4, s[0:3], 0x1e                  ; C202011E
>	s_buffer_load_dword s5, s[0:3], 0x1f                  ; C202811F
>	v_sub_f32_e32 v15, s6, v1                             ; 081E0206
>	v_mov_b32_e32 v16, s7                                 ; 7E200207
>	v_mov_b32_e32 v17, s8                                 ; 7E220208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v18, s4                                 ; 7E240204
>	v_sub_f32_e32 v19, s5, v3                             ; 08260605
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                  ; C0820B08
>	s_movk_i32 s12, 0x54                                  ; B00C0054
>	s_movk_i32 s15, 0x5c                                  ; B00F005C
>	s_movk_i32 s14, 0x50                                  ; B00E0050
>	s_movk_i32 s13, 0x58                                  ; B00D0058
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[4:7], 0 idxen ; E00C2000 80011806
>	s_buffer_load_dword s4, s[0:3], 0x378                 ; C20200FF 00000378
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                   ; BF06C104
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                             ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                              ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s12, v15                      ; 4A161E0C
>	v_add_i32_e32 v14, vcc, s15, v15                      ; 4A1C1E0F
>	v_add_i32_e32 v4, vcc, s14, v15                       ; 4A081E0E
>	buffer_load_dword v12, v11, s[0:3], 0 offen           ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen           ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s13, v15                      ; 4A1A1E0D
>	buffer_load_dword v6, v4, s[0:3], 0 offen             ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen            ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                         ; 0A161700
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                  ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                     ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                     ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                     ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                      ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                     ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                     ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen           ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen           ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                     ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                     ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen           ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen           ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                         ; 0A1E2701
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                         ; 0A262903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                  ; C0820B04
>	s_movk_i32 s11, 0x6c                                  ; B00B006C
>	s_movk_i32 s10, 0x60                                  ; B00A0060
>	s_movk_i32 s9, 0x64                                   ; B0090064
>	s_movk_i32 s8, 0x68                                   ; B0080068
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[4:7], 0 idxen ; E00C2000 80011405
>	v_cvt_i32_f32_e32 v5, v25                             ; 7E0A1119
>	s_movk_i32 s4, 0x7c                                   ; B004007C
>	v_add_i32_e32 v17, vcc, s4, v15                       ; 4A221E04
>	s_movk_i32 s6, 0x74                                   ; B0060074
>	v_mul_lo_i32 v24, v5, 48                              ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s11, v15                       ; 4A0A1E0B
>	s_movk_i32 s7, 0x70                                   ; B0070070
>	s_movk_i32 s5, 0x78                                   ; B0050078
>	v_add_i32_e32 v13, vcc, s10, v15                      ; 4A1A1E0A
>	v_add_i32_e32 v14, vcc, s9, v15                       ; 4A1C1E09
>	v_add_i32_e32 v16, vcc, s8, v15                       ; 4A201E08
>	v_add_i32_e32 v19, vcc, s6, v15                       ; 4A261E06
>	buffer_load_dword v18, v5, s[0:3], 0 offen            ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s7, v15                        ; 4A0A1E07
>	v_add_i32_e32 v15, vcc, s5, v15                       ; 4A1E1E05
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen           ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen           ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen            ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen           ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                    ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                             ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                           ; 10181914
>	v_mul_f32_e32 v4, v20, v4                             ; 10080914
>	v_mul_f32_e32 v11, v20, v11                           ; 10161714
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                         ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                           ; 101E1F14
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                         ; 0A3A2303
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                           ; 101C1D14
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                           ; 10243914
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                            ; 100A1B14
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                           ; 101A2114
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                           ; 10222714
>	v_mul_f32_e32 v16, v20, v25                           ; 10203314
>	v_mul_f32_e32 v19, v20, v29                           ; 10263B14
>	v_add_i32_e32 v20, vcc, s15, v24                      ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                         ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                           ; 3E162915
>	v_add_i32_e32 v20, vcc, s11, v24                      ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                         ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                           ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s14, v24                      ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                            ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s12, v24                      ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_buffer_load_dword s12, s[0:3], 0x37c                ; C20600FF 0000037C
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                   ; BF06800C
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                           ; 3E182915
>	v_add_i32_e32 v20, vcc, s13, v24                      ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                            ; 3E082915
>	v_add_i32_e32 v20, vcc, s10, v24                      ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                            ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s9, v24                       ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                           ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s8, v24                       ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                           ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s7, v24                       ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                           ; 3E202915
>	v_add_i32_e32 v20, vcc, s6, v24                       ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                           ; 3E222915
>	v_add_i32_e32 v20, vcc, s5, v24                       ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                           ; 3E242915
>	v_add_i32_e32 v20, vcc, s4, v24                       ; 4A283004
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                           ; 3E262915
>	s_cbranch_scc1 BB0_6                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                            ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                            ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                           ; 3E162B16
>	v_add_i32_e32 v21, vcc, s11, v20                      ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                           ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                           ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                            ; 3E082B16
>	v_add_i32_e32 v21, vcc, s10, v20                      ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                            ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s9, v20                       ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                           ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s8, v20                       ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                           ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s7, v20                       ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                           ; 3E202B16
>	v_add_i32_e32 v21, vcc, s6, v20                       ; 4A2A2806
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                           ; 3E222B16
>	v_add_i32_e32 v21, vcc, s5, v20                       ; 4A2A2805
>	v_add_i32_e32 v20, vcc, s4, v20                       ; 4A282804
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                           ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                           ; 3E262916
>	s_buffer_load_dword s4, s[0:3], 0x380                 ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                    ; BF068004
>	s_cbranch_scc1 BB0_8                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                            ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                            ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                           ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                     ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                           ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                           ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                            ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                     ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                            ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                     ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                           ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                     ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                           ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                     ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                           ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                     ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                           ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                     ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                     ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                           ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                           ; 3E262917
>	v_mul_f32_e32 v12, v12, v8                            ; 1018110C
>	v_mac_f32_e32 v12, v6, v7                             ; 3E180F06
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	v_mac_f32_e32 v12, v4, v9                             ; 3E181304
>	v_mul_f32_e32 v4, v14, v8                             ; 1008110E
>	s_buffer_load_dword s5, s[0:3], 0x1                   ; C2028101
>	s_buffer_load_dword s8, s[0:3], 0x4                   ; C2040104
>	v_mac_f32_e32 v4, v5, v7                              ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                             ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                   ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                   ; C2038103
>	v_mac_f32_e32 v4, v13, v9                             ; 3E08130D
>	v_mac_f32_e32 v5, v16, v7                             ; 3E0A0F10
>	v_mac_f32_e32 v12, v11, v10                           ; 3E18150B
>	v_mac_f32_e32 v5, v18, v9                             ; 3E0A1312
>	v_mac_f32_e32 v4, v15, v10                            ; 3E08150F
>	v_add_f32_e32 v0, v0, v12                             ; 06001900
>	v_mac_f32_e32 v5, v19, v10                            ; 3E0A1513
>	v_add_f32_e32 v1, v1, v4                              ; 06020901
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                              ; 10080004
>	s_buffer_load_dword s4, s[0:3], 0x5                   ; C2020105
>	v_mul_f32_e32 v6, 0, v8                               ; 100C1080
>	v_add_f32_e32 v3, v3, v5                              ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                              ; 100A0005
>	v_mac_f32_e32 v4, s8, v1                              ; 3E080208
>	s_buffer_load_dword s5, s[0:3], 0x6                   ; C2028106
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	v_mac_f32_e32 v6, 0, v7                               ; 3E0C0E80
>	v_mul_f32_e32 v7, s6, v0                              ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                              ; 10000007
>	s_buffer_load_dword s6, s[0:3], 0x7                   ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                              ; 3E0A0204
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	v_mac_f32_e32 v7, s5, v1                              ; 3E0E0205
>	v_mac_f32_e32 v5, s8, v3                              ; 3E0A0608
>	s_buffer_load_dword s5, s[0:3], 0xb                   ; C202810B
>	s_buffer_load_dword s8, s[0:3], 0xe                   ; C204010E
>	v_mac_f32_e32 v0, s6, v1                              ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                              ; 3E080607
>	s_buffer_load_dword s6, s[0:3], 0xc                   ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                   ; C203810D
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	v_mac_f32_e32 v6, 0, v9                               ; 3E0C1280
>	v_add_f32_e32 v6, v10, v6                             ; 060C0D0A
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                              ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                              ; 3E000605
>	v_mac_f32_e32 v7, s8, v6                              ; 3E0E0C08
>	v_mac_f32_e32 v4, s6, v6                              ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                              ; 3E0A0C07
>	v_mac_f32_e32 v0, s0, v6                              ; 3E000C00
>	v_max_f32_e32 v1, 0, v7                               ; 20020E80
>	exp 15, 12, 0, 1, 0, v4, v5, v1, v0                   ; F80008CF 00010504
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1836 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].x, GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6].x, GENERIC[5]
>DCL CONST[0..5]
>DCL TEMP[0..7], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MAD TEMP[0], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[0].zwww
>  3: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[0].wzww
>  4: MOV TEMP[2].y, TEMP[3].xxxx
>  5: DP3 TEMP[1].x, TEMP[1].xyzz, IMM[0].wwzz
>  6: MOV TEMP[2].z, TEMP[1].xxxx
>  7: DP3 TEMP[3].x, TEMP[0].xyzz, IMM[0].zwww
>  8: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wzww
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wwzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: MUL TEMP[4], CONST[0], IN[0].xxxx
> 13: MAD TEMP[4], CONST[1], IN[0].yyyy, TEMP[4]
> 14: MAD TEMP[4], CONST[2], IN[0].zzzz, TEMP[4]
> 15: MAD TEMP[4], CONST[3], IN[0].wwww, TEMP[4]
> 16: MOV TEMP[5].xyz, IN[0].xyzx
> 17: MUL TEMP[6].x, TEMP[4].wwww, CONST[5].wwww
> 18: MOV TEMP[5].w, TEMP[6].xxxx
> 19: MAD TEMP[6].x, TEMP[4].zzzz, CONST[4].yyyy, CONST[4].xxxx
> 20: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 21: POW TEMP[6].x, TEMP[6].xxxx, CONST[4].zzzz
> 22: ADD TEMP[7].x, IMM[0].zzzz, -CONST[4].wwww
> 23: MAD TEMP[6].x, CONST[4].wwww, TEMP[6].xxxx, TEMP[7].xxxx
> 24: MUL TEMP[7].xyz, TEMP[2].zxyy, TEMP[3].yzxx
> 25: MAD TEMP[7].xyz, TEMP[2].yzxx, TEMP[3].zxyy, -TEMP[7].xyzz
> 26: MUL TEMP[0].xyz, TEMP[7].xyzz, TEMP[0].wwww
> 27: MOV TEMP[3].xyz, TEMP[3].xyzx
> 28: MOV TEMP[3].w, TEMP[0].xxxx
> 29: MOV TEMP[0].xy, TEMP[0].yzyy
> 30: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[6].xxxx
> 31: MOV TEMP[7].xy, IN[3].xyxx
> 32: MOV TEMP[7].zw, IN[4].yyxy
> 33: MOV TEMP[0].zw, TEMP[2].yyxy
> 34: MOV OUT[1], TEMP[5]
> 35: MOV OUT[3].x, TEMP[6].xxxx
> 36: MOV OUT[5], TEMP[0]
> 37: MOV OUT[0], TEMP[4]
> 38: MOV OUT[4], TEMP[3]
> 39: MOV OUT[2], TEMP[7]
> 40: MOV OUT[6].x, TEMP[1].xxxx
> 41: END
>radeonsi: Compiling shader 79
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %19 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %20 = load <16 x i8>, <16 x i8> addrspace(2)* %19, align 16, !invariant.load !0
>  %21 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %14)
>  %22 = extractelement <4 x float> %21, i32 0
>  %23 = extractelement <4 x float> %21, i32 1
>  %24 = extractelement <4 x float> %21, i32 2
>  %25 = extractelement <4 x float> %21, i32 3
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %27, i32 0, i32 %15)
>  %29 = extractelement <4 x float> %28, i32 0
>  %30 = extractelement <4 x float> %28, i32 1
>  %31 = extractelement <4 x float> %28, i32 2
>  %32 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %33 = load <16 x i8>, <16 x i8> addrspace(2)* %32, align 16, !invariant.load !0
>  %34 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %33, i32 0, i32 %16)
>  %35 = extractelement <4 x float> %34, i32 0
>  %36 = extractelement <4 x float> %34, i32 1
>  %37 = extractelement <4 x float> %34, i32 2
>  %38 = extractelement <4 x float> %34, i32 3
>  %39 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %40 = load <16 x i8>, <16 x i8> addrspace(2)* %39, align 16, !invariant.load !0
>  %41 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %40, i32 0, i32 %17)
>  %42 = extractelement <4 x float> %41, i32 0
>  %43 = extractelement <4 x float> %41, i32 1
>  %44 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %45 = load <16 x i8>, <16 x i8> addrspace(2)* %44, align 16, !invariant.load !0
>  %46 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %45, i32 0, i32 %18)
>  %47 = extractelement <4 x float> %46, i32 0
>  %48 = extractelement <4 x float> %46, i32 1
>  %49 = fmul float %35, 2.000000e+00
>  %50 = fadd float %49, -1.000000e+00
>  %51 = fmul float %36, 2.000000e+00
>  %52 = fadd float %51, -1.000000e+00
>  %53 = fmul float %37, 2.000000e+00
>  %54 = fadd float %53, -1.000000e+00
>  %55 = fmul float %38, 2.000000e+00
>  %56 = fadd float %55, -1.000000e+00
>  %57 = fmul float %29, 2.000000e+00
>  %58 = fadd float %57, -1.000000e+00
>  %59 = fmul float %30, 2.000000e+00
>  %60 = fadd float %59, -1.000000e+00
>  %61 = fmul float %31, 2.000000e+00
>  %62 = fadd float %61, -1.000000e+00
>  %63 = fmul float %60, 0.000000e+00
>  %64 = fadd float %63, %58
>  %65 = fmul float %62, 0.000000e+00
>  %66 = fadd float %64, %65
>  %67 = fmul float %58, 0.000000e+00
>  %68 = fadd float %60, %67
>  %69 = fmul float %62, 0.000000e+00
>  %70 = fadd float %68, %69
>  %71 = fmul float %58, 0.000000e+00
>  %72 = fmul float %60, 0.000000e+00
>  %73 = fadd float %72, %71
>  %74 = fadd float %73, %62
>  %75 = fmul float %52, 0.000000e+00
>  %76 = fadd float %75, %50
>  %77 = fmul float %54, 0.000000e+00
>  %78 = fadd float %76, %77
>  %79 = fmul float %50, 0.000000e+00
>  %80 = fadd float %52, %79
>  %81 = fmul float %54, 0.000000e+00
>  %82 = fadd float %80, %81
>  %83 = fmul float %50, 0.000000e+00
>  %84 = fmul float %52, 0.000000e+00
>  %85 = fadd float %84, %83
>  %86 = fadd float %85, %54
>  %87 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %88 = load <16 x i8>, <16 x i8> addrspace(2)* %87, align 16, !invariant.load !0
>  %89 = call float @llvm.SI.load.const(<16 x i8> %88, i32 0)
>  %90 = fmul float %89, %22
>  %91 = call float @llvm.SI.load.const(<16 x i8> %88, i32 4)
>  %92 = fmul float %91, %22
>  %93 = call float @llvm.SI.load.const(<16 x i8> %88, i32 8)
>  %94 = fmul float %93, %22
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = call float @llvm.SI.load.const(<16 x i8> %96, i32 12)
>  %98 = fmul float %97, %22
>  %99 = call float @llvm.SI.load.const(<16 x i8> %96, i32 16)
>  %100 = fmul float %99, %23
>  %101 = fadd float %100, %90
>  %102 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %103 = load <16 x i8>, <16 x i8> addrspace(2)* %102, align 16, !invariant.load !0
>  %104 = call float @llvm.SI.load.const(<16 x i8> %103, i32 20)
>  %105 = fmul float %104, %23
>  %106 = fadd float %105, %92
>  %107 = call float @llvm.SI.load.const(<16 x i8> %103, i32 24)
>  %108 = fmul float %107, %23
>  %109 = fadd float %108, %94
>  %110 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %111 = load <16 x i8>, <16 x i8> addrspace(2)* %110, align 16, !invariant.load !0
>  %112 = call float @llvm.SI.load.const(<16 x i8> %111, i32 28)
>  %113 = fmul float %112, %23
>  %114 = fadd float %113, %98
>  %115 = call float @llvm.SI.load.const(<16 x i8> %111, i32 32)
>  %116 = fmul float %115, %24
>  %117 = fadd float %116, %101
>  %118 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %119 = load <16 x i8>, <16 x i8> addrspace(2)* %118, align 16, !invariant.load !0
>  %120 = call float @llvm.SI.load.const(<16 x i8> %119, i32 36)
>  %121 = fmul float %120, %24
>  %122 = fadd float %121, %106
>  %123 = call float @llvm.SI.load.const(<16 x i8> %119, i32 40)
>  %124 = fmul float %123, %24
>  %125 = fadd float %124, %109
>  %126 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %127 = load <16 x i8>, <16 x i8> addrspace(2)* %126, align 16, !invariant.load !0
>  %128 = call float @llvm.SI.load.const(<16 x i8> %127, i32 44)
>  %129 = fmul float %128, %24
>  %130 = fadd float %129, %114
>  %131 = call float @llvm.SI.load.const(<16 x i8> %127, i32 48)
>  %132 = fmul float %131, %25
>  %133 = fadd float %132, %117
>  %134 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %135 = load <16 x i8>, <16 x i8> addrspace(2)* %134, align 16, !invariant.load !0
>  %136 = call float @llvm.SI.load.const(<16 x i8> %135, i32 52)
>  %137 = fmul float %136, %25
>  %138 = fadd float %137, %122
>  %139 = call float @llvm.SI.load.const(<16 x i8> %135, i32 56)
>  %140 = fmul float %139, %25
>  %141 = fadd float %140, %125
>  %142 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %143 = load <16 x i8>, <16 x i8> addrspace(2)* %142, align 16, !invariant.load !0
>  %144 = call float @llvm.SI.load.const(<16 x i8> %143, i32 60)
>  %145 = fmul float %144, %25
>  %146 = fadd float %145, %130
>  %147 = call float @llvm.SI.load.const(<16 x i8> %143, i32 92)
>  %148 = fmul float %146, %147
>  %149 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %150 = load <16 x i8>, <16 x i8> addrspace(2)* %149, align 16, !invariant.load !0
>  %151 = call float @llvm.SI.load.const(<16 x i8> %150, i32 68)
>  %152 = call float @llvm.SI.load.const(<16 x i8> %150, i32 64)
>  %153 = fmul float %141, %151
>  %154 = fadd float %153, %152
>  %155 = call float @llvm.AMDGPU.clamp.(float %154, float 0.000000e+00, float 1.000000e+00)
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = call float @llvm.SI.load.const(<16 x i8> %157, i32 72)
>  %159 = call float @llvm.pow.f32(float %155, float %158)
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 76)
>  %161 = fsub float 1.000000e+00, %160
>  %162 = call float @llvm.SI.load.const(<16 x i8> %157, i32 76)
>  %163 = fmul float %162, %159
>  %164 = fadd float %163, %161
>  %165 = fmul float %74, %82
>  %166 = fmul float %66, %86
>  %167 = fmul float %70, %78
>  %168 = fmul float %70, %86
>  %169 = fsub float %168, %165
>  %170 = fmul float %74, %78
>  %171 = fsub float %170, %166
>  %172 = fmul float %66, %82
>  %173 = fsub float %172, %167
>  %174 = fmul float %169, %56
>  %175 = fmul float %171, %56
>  %176 = fmul float %173, %56
>  %177 = fmul float %164, %164
>  %178 = bitcast i32 %12 to float
>  %179 = insertvalue <{ float, float, float }> undef, float %178, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %22, float %23, float %24, float %148)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %42, float %43, float %47, float %48)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %177, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %78, float %82, float %86, float %174)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %175, float %176, float %66, float %70)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %74, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %133, float %138, float %141, float %146)
>  ret <{ float, float, float }> %179
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     6.0000,     4.0000}
>IMM[3] FLT32 {    5.0000,     0.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[5], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[4], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[4].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[4].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[4].xyzz
> 23: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[4].xyzz
> 25: MAD TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz, -TEMP[2].xyzz
> 26: MOV TEMP[6].xy, IN[1].zwww
> 27: TEX TEMP[6], TEMP[6], SAMP[6], 2D
> 28: ADD TEMP[7].xyz, TEMP[6].zyyy, IMM[1].xxxx
> 29: MUL TEMP[7].xy, TEMP[7].xyzz, IMM[0].xxxx
> 30: MUL TEMP[8].x, TEMP[6].wwww, IMM[0].xxxx
> 31: DP2 TEMP[9].x, TEMP[7].xyyy, TEMP[7].xyyy
> 32: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 33: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 34: SQRT TEMP[9].x, TEMP[9].xxxx
> 35: MUL TEMP[10].xyz, IN[3].xyzz, TEMP[7].xxxx
> 36: MAD TEMP[7].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[10].xyzz
> 37: MAD TEMP[7].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[7].xyzz
> 38: DP3 TEMP[9].x, TEMP[5].xyzz, TEMP[7].xyzz
> 39: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 40: ADD TEMP[9].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 41: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 42: POW TEMP[9].x, TEMP[9].xxxx, IMM[1].yyyy
> 43: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 44: MUL TEMP[10].x, IMM[1].zzzz, TEMP[3].zzzz
> 45: ADD TEMP[10].x, TEMP[9].xxxx, -TEMP[10].xxxx
> 46: LRP TEMP[11].x, TEMP[3].zzzz, IMM[1].wwww, IMM[0].wwww
> 47: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 48: MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 49: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 50: MUL TEMP[8].x, TEMP[8].xxxx, IMM[2].xxxx
> 51: MUL TEMP[0].x, TEMP[6].xxxx, TEMP[3].yyyy
> 52: DP3 TEMP[5].x, -TEMP[5].xyzz, TEMP[1].xyzz
> 53: ADD TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 54: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[1].xyzz
> 55: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
> 56: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 57: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[6].xxxx
> 58: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 59: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 60: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 61: MUL TEMP[5].x, TEMP[9].xxxx, TEMP[5].xxxx
> 62: MAD TEMP[1].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 63: MUL TEMP[6], CONST[4], TEMP[1].xxxx
> 64: MAD TEMP[6], CONST[5], TEMP[1].yyyy, TEMP[6]
> 65: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[6]
> 66: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 67: MOV TEMP[6].xyz, -CONST[1].xyzx
> 68: MOV TEMP[9].xyz, TEMP[4].xyzz
> 69: TEX TEMP[9], TEMP[9], SAMP[1], CUBE
> 70: DP3 TEMP[10].x, TEMP[4].xyzz, TEMP[2].xyzz
> 71: MUL TEMP[10].xyz, TEMP[10].xxxx, TEMP[4].xyzz
> 72: MAD TEMP[10].xyz, IMM[0].xxxx, TEMP[10].xyzz, -TEMP[2].xyzz
> 73: ADD TEMP[11].x, IMM[0].wwww, -TEMP[3].zzzz
> 74: MUL TEMP[11].x, TEMP[11].xxxx, IMM[2].zzzz
> 75: MOV TEMP[12].xy, TEMP[1].xyyy
> 76: MOV TEMP[12].w, IMM[0].wwww
> 77: MOV TEMP[12].z, TEMP[1].zzzz
> 78: TXP TEMP[1].x, TEMP[12], SAMP[0], SHADOW2D
> 79: DP3 TEMP[7].x, TEMP[6].xyzz, TEMP[7].xyzz
> 80: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 81: ADD TEMP[7].x, TEMP[8].xxxx, -TEMP[7].xxxx
> 82: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 83: MUL TEMP[8].xyz, TEMP[9].xyzz, TEMP[9].wwww
> 84: MUL TEMP[0].x, IMM[2].wwww, TEMP[0].xxxx
> 85: DP3 TEMP[6].x, TEMP[6].xyzz, TEMP[4].xyzz
> 86: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 87: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 88: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 89: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 90: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 91: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
> 92: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 93: MUL TEMP[1].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 94: MAD TEMP[0].xyz, TEMP[8].xyzz, TEMP[0].xxxx, TEMP[1].xyzz
> 95: MOV TEMP[1].xy, IN[1].xyyy
> 96: TEX TEMP[1].xyz, TEMP[1], SAMP[3], 2D
> 97: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[4].xyzz
> 98: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 99: ADD TEMP[2].x, IMM[0].wwww, -TEMP[2].xxxx
>100: POW TEMP[2].x, TEMP[2].xxxx, IMM[3].xxxx
>101: MAX TEMP[3].xyz, TEMP[3].zzzz, IMM[3].yyyy
>102: MUL TEMP[2].xyz, TEMP[2].xxxx, TEMP[3].xyzz
>103: MOV TEMP[3].xyz, TEMP[10].xyzz
>104: MOV TEMP[3].w, TEMP[11].xxxx
>105: TXL TEMP[3].xyz, TEMP[3], SAMP[2], CUBE
>106: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xyzz
>107: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>108: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz, TEMP[2].xyzz
>109: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>110: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].yyyy
>111: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>112: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>113: RCP TEMP[2].x, TEMP[2].xxxx
>114: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>115: FRC TEMP[2].x, CONST[1].wwww
>116: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].wwww
>117: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>118: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>119: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>120: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>121: MOV TEMP[0].w, IN[0].wwww
>122: MOV OUT[0], TEMP[0]
>123: END
>radeonsi: Compiling shader 80
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 23, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 19, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fsub float %134, %49
>  %136 = fmul float %132, 2.000000e+00
>  %137 = fsub float %136, %50
>  %138 = fmul float %133, 2.000000e+00
>  %139 = fsub float %138, %51
>  %140 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %141 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %142 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %143 = load <8 x i32>, <8 x i32> addrspace(2)* %142, align 32, !invariant.load !0
>  %144 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %145 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %144, i64 0, i64 27, !amdgpu.uniform !0
>  %146 = load <4 x i32>, <4 x i32> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = extractelement <8 x i32> %143, i32 7
>  %148 = extractelement <4 x i32> %146, i32 0
>  %149 = and i32 %148, %147
>  %150 = insertelement <4 x i32> %146, i32 %149, i32 0
>  %151 = bitcast float %140 to i32
>  %152 = bitcast float %141 to i32
>  %153 = insertelement <2 x i32> undef, i32 %151, i32 0
>  %154 = insertelement <2 x i32> %153, i32 %152, i32 1
>  %155 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %154, <8 x i32> %143, <4 x i32> %150, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %156 = extractelement <4 x float> %155, i32 0
>  %157 = extractelement <4 x float> %155, i32 1
>  %158 = extractelement <4 x float> %155, i32 2
>  %159 = extractelement <4 x float> %155, i32 3
>  %160 = fadd float %158, -5.000000e-01
>  %161 = fadd float %157, -5.000000e-01
>  %162 = fmul float %160, 2.000000e+00
>  %163 = fmul float %161, 2.000000e+00
>  %164 = fmul float %159, 2.000000e+00
>  %165 = fmul float %162, %162
>  %166 = fmul float %163, %163
>  %167 = fadd float %165, %166
>  %168 = call float @llvm.AMDGPU.clamp.(float %167, float 0.000000e+00, float 1.000000e+00)
>  %169 = fsub float 1.000000e+00, %168
>  %170 = call float @llvm.sqrt.f32(float %169)
>  %171 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %172 = fmul float %171, %162
>  %173 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %174 = fmul float %173, %162
>  %175 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %176 = fmul float %175, %162
>  %177 = fmul float %23, %163
>  %178 = fadd float %177, %172
>  %179 = fmul float %24, %163
>  %180 = fadd float %179, %174
>  %181 = fmul float %25, %163
>  %182 = fadd float %181, %176
>  %183 = fmul float %59, %170
>  %184 = fadd float %183, %178
>  %185 = fmul float %60, %170
>  %186 = fadd float %185, %180
>  %187 = fmul float %61, %170
>  %188 = fadd float %187, %182
>  %189 = fmul float %135, %184
>  %190 = fmul float %137, %186
>  %191 = fadd float %190, %189
>  %192 = fmul float %139, %188
>  %193 = fadd float %191, %192
>  %194 = call float @llvm.AMDGPU.clamp.(float %193, float 0.000000e+00, float 1.000000e+00)
>  %195 = fsub float %164, %194
>  %196 = call float @llvm.AMDGPU.clamp.(float %195, float 0.000000e+00, float 1.000000e+00)
>  %197 = call float @llvm.pow.f32(float %196, float 3.000000e+00)
>  %198 = call float @llvm.AMDGPU.clamp.(float %197, float 0.000000e+00, float 1.000000e+00)
>  %199 = fmul float %79, 0x3FD3333340000000
>  %200 = fsub float %198, %199
>  %201 = fsub float 1.000000e+00, %79
>  %202 = fmul float %79, 2.000000e+01
>  %203 = fadd float %202, %201
>  %204 = fmul float %200, %203
>  %205 = call float @llvm.AMDGPU.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %206 = fmul float %198, %205
>  %207 = fmul float %164, 0x3FF19999A0000000
>  %208 = fmul float %156, %78
>  %209 = fmul float %135, %59
>  %210 = fsub float -0.000000e+00, %209
>  %211 = fmul float %137, %60
>  %212 = fsub float %210, %211
>  %213 = fmul float %139, %61
>  %214 = fsub float %212, %213
>  %215 = fadd float %214, 1.000000e+00
>  %216 = fmul float %49, %59
>  %217 = fmul float %50, %60
>  %218 = fadd float %217, %216
>  %219 = fmul float %51, %61
>  %220 = fadd float %218, %219
>  %221 = fsub float 1.000000e+00, %220
>  %222 = call float @llvm.AMDGPU.clamp.(float %221, float 0.000000e+00, float 1.000000e+00)
>  %223 = fsub float %215, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fsub float 1.000000e+00, %224
>  %226 = fmul float %225, %225
>  %227 = fmul float %206, %226
>  %228 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %229 = fmul float %59, 0x4007700140000000
>  %230 = fadd float %229, %228
>  %231 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %232 = fmul float %60, 0x4007700140000000
>  %233 = fadd float %232, %231
>  %234 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %235 = fmul float %61, 0x4007700140000000
>  %236 = fadd float %235, %234
>  %237 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %238 = load <16 x i8>, <16 x i8> addrspace(2)* %237, align 16, !invariant.load !0
>  %239 = call float @llvm.SI.load.const(<16 x i8> %238, i32 64)
>  %240 = fmul float %239, %230
>  %241 = call float @llvm.SI.load.const(<16 x i8> %238, i32 68)
>  %242 = fmul float %241, %230
>  %243 = call float @llvm.SI.load.const(<16 x i8> %238, i32 72)
>  %244 = fmul float %243, %230
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 80)
>  %248 = fmul float %247, %233
>  %249 = fadd float %248, %240
>  %250 = call float @llvm.SI.load.const(<16 x i8> %246, i32 84)
>  %251 = fmul float %250, %233
>  %252 = fadd float %251, %242
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 88)
>  %256 = fmul float %255, %233
>  %257 = fadd float %256, %244
>  %258 = call float @llvm.SI.load.const(<16 x i8> %254, i32 96)
>  %259 = fmul float %258, %236
>  %260 = fadd float %259, %249
>  %261 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %262 = load <16 x i8>, <16 x i8> addrspace(2)* %261, align 16, !invariant.load !0
>  %263 = call float @llvm.SI.load.const(<16 x i8> %262, i32 100)
>  %264 = fmul float %263, %236
>  %265 = fadd float %264, %252
>  %266 = call float @llvm.SI.load.const(<16 x i8> %262, i32 104)
>  %267 = fmul float %266, %236
>  %268 = fadd float %267, %257
>  %269 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %270 = load <16 x i8>, <16 x i8> addrspace(2)* %269, align 16, !invariant.load !0
>  %271 = call float @llvm.SI.load.const(<16 x i8> %270, i32 112)
>  %272 = fadd float %260, %271
>  %273 = call float @llvm.SI.load.const(<16 x i8> %270, i32 116)
>  %274 = fadd float %265, %273
>  %275 = call float @llvm.SI.load.const(<16 x i8> %270, i32 120)
>  %276 = fadd float %268, %275
>  %277 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %278 = load <16 x i8>, <16 x i8> addrspace(2)* %277, align 16, !invariant.load !0
>  %279 = call float @llvm.SI.load.const(<16 x i8> %278, i32 16)
>  %280 = fsub float -0.000000e+00, %279
>  %281 = call float @llvm.SI.load.const(<16 x i8> %278, i32 20)
>  %282 = fsub float -0.000000e+00, %281
>  %283 = call float @llvm.SI.load.const(<16 x i8> %278, i32 24)
>  %284 = fsub float -0.000000e+00, %283
>  %285 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %286 = load <8 x i32>, <8 x i32> addrspace(2)* %285, align 32, !invariant.load !0
>  %287 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %288 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %287, i64 0, i64 7, !amdgpu.uniform !0
>  %289 = load <4 x i32>, <4 x i32> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = extractelement <8 x i32> %286, i32 7
>  %291 = extractelement <4 x i32> %289, i32 0
>  %292 = and i32 %291, %290
>  %293 = insertelement <4 x i32> %289, i32 %292, i32 0
>  %294 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %295 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %296 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %297 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %298 = call float @llvm.fabs.f32(float %296)
>  %299 = fdiv float 1.000000e+00, %298, !fpmath !1
>  %300 = fmul float %294, %299
>  %301 = fadd float %300, 1.500000e+00
>  %302 = fmul float %295, %299
>  %303 = fadd float %302, 1.500000e+00
>  %304 = bitcast float %303 to i32
>  %305 = bitcast float %301 to i32
>  %306 = bitcast float %297 to i32
>  %307 = insertelement <4 x i32> undef, i32 %304, i32 0
>  %308 = insertelement <4 x i32> %307, i32 %305, i32 1
>  %309 = insertelement <4 x i32> %308, i32 %306, i32 2
>  %310 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %309, <8 x i32> %286, <4 x i32> %293, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %311 = extractelement <4 x float> %310, i32 0
>  %312 = extractelement <4 x float> %310, i32 1
>  %313 = extractelement <4 x float> %310, i32 2
>  %314 = extractelement <4 x float> %310, i32 3
>  %315 = fmul float %121, %49
>  %316 = fmul float %123, %50
>  %317 = fadd float %316, %315
>  %318 = fmul float %125, %51
>  %319 = fadd float %317, %318
>  %320 = fmul float %319, %121
>  %321 = fmul float %319, %123
>  %322 = fmul float %319, %125
>  %323 = fmul float %320, 2.000000e+00
>  %324 = fsub float %323, %49
>  %325 = fmul float %321, 2.000000e+00
>  %326 = fsub float %325, %50
>  %327 = fmul float %322, 2.000000e+00
>  %328 = fsub float %327, %51
>  %329 = fsub float 1.000000e+00, %79
>  %330 = fmul float %329, 6.000000e+00
>  %331 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %332 = load <8 x i32>, <8 x i32> addrspace(2)* %331, align 32, !invariant.load !0
>  %333 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %334 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %333, i64 0, i64 3, !amdgpu.uniform !0
>  %335 = load <4 x i32>, <4 x i32> addrspace(2)* %334, align 16, !invariant.load !0
>  %336 = extractelement <8 x i32> %332, i32 7
>  %337 = extractelement <4 x i32> %335, i32 0
>  %338 = and i32 %337, %336
>  %339 = insertelement <4 x i32> %335, i32 %338, i32 0
>  %340 = bitcast float %276 to i32
>  %341 = bitcast float %272 to i32
>  %342 = bitcast float %274 to i32
>  %343 = insertelement <4 x i32> undef, i32 %340, i32 0
>  %344 = insertelement <4 x i32> %343, i32 %341, i32 1
>  %345 = insertelement <4 x i32> %344, i32 %342, i32 2
>  %346 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %345, <8 x i32> %332, <4 x i32> %339, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %347 = extractelement <4 x float> %346, i32 0
>  %348 = fmul float %184, %280
>  %349 = fmul float %186, %282
>  %350 = fadd float %349, %348
>  %351 = fmul float %188, %284
>  %352 = fadd float %350, %351
>  %353 = call float @llvm.AMDGPU.clamp.(float %352, float 0.000000e+00, float 1.000000e+00)
>  %354 = fsub float %207, %353
>  %355 = call float @llvm.AMDGPU.clamp.(float %354, float 0.000000e+00, float 1.000000e+00)
>  %356 = fmul float %311, %314
>  %357 = fmul float %312, %314
>  %358 = fmul float %313, %314
>  %359 = fmul float %208, 4.000000e+00
>  %360 = fmul float %121, %280
>  %361 = fmul float %123, %282
>  %362 = fadd float %361, %360
>  %363 = fmul float %125, %284
>  %364 = fadd float %362, %363
>  %365 = call float @llvm.AMDGPU.clamp.(float %364, float 0.000000e+00, float 1.000000e+00)
>  %366 = fmul float %347, %347
>  %367 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %368 = load <16 x i8>, <16 x i8> addrspace(2)* %367, align 16, !invariant.load !0
>  %369 = call float @llvm.SI.load.const(<16 x i8> %368, i32 48)
>  %370 = fmul float %369, %366
>  %371 = call float @llvm.SI.load.const(<16 x i8> %368, i32 52)
>  %372 = fmul float %371, %366
>  %373 = call float @llvm.SI.load.const(<16 x i8> %368, i32 56)
>  %374 = fmul float %373, %366
>  %375 = fmul float %355, %355
>  %376 = call float @llvm.AMDGPU.clamp.(float %375, float 0.000000e+00, float 1.000000e+00)
>  %377 = fmul float %370, %376
>  %378 = fmul float %372, %376
>  %379 = fmul float %374, %376
>  %380 = fmul float %377, %78
>  %381 = fmul float %378, %78
>  %382 = fmul float %379, %78
>  %383 = fmul float %365, %380
>  %384 = fmul float %365, %381
>  %385 = fmul float %365, %382
>  %386 = fmul float %356, %359
>  %387 = fadd float %386, %383
>  %388 = fmul float %357, %359
>  %389 = fadd float %388, %384
>  %390 = fmul float %358, %359
>  %391 = fadd float %390, %385
>  %392 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %393 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %394 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %395 = load <8 x i32>, <8 x i32> addrspace(2)* %394, align 32, !invariant.load !0
>  %396 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %397 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %396, i64 0, i64 15, !amdgpu.uniform !0
>  %398 = load <4 x i32>, <4 x i32> addrspace(2)* %397, align 16, !invariant.load !0
>  %399 = extractelement <8 x i32> %395, i32 7
>  %400 = extractelement <4 x i32> %398, i32 0
>  %401 = and i32 %400, %399
>  %402 = insertelement <4 x i32> %398, i32 %401, i32 0
>  %403 = bitcast float %392 to i32
>  %404 = bitcast float %393 to i32
>  %405 = insertelement <2 x i32> undef, i32 %403, i32 0
>  %406 = insertelement <2 x i32> %405, i32 %404, i32 1
>  %407 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %406, <8 x i32> %395, <4 x i32> %402, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %408 = extractelement <4 x float> %407, i32 0
>  %409 = extractelement <4 x float> %407, i32 1
>  %410 = extractelement <4 x float> %407, i32 2
>  %411 = fmul float %49, %121
>  %412 = fmul float %50, %123
>  %413 = fadd float %412, %411
>  %414 = fmul float %51, %125
>  %415 = fadd float %413, %414
>  %416 = call float @llvm.AMDGPU.clamp.(float %415, float 0.000000e+00, float 1.000000e+00)
>  %417 = fsub float 1.000000e+00, %416
>  %418 = call float @llvm.pow.f32(float %417, float 5.000000e+00)
>  %419 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %420 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %421 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %422 = fmul float %418, %419
>  %423 = fmul float %418, %420
>  %424 = fmul float %418, %421
>  %425 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %426 = load <8 x i32>, <8 x i32> addrspace(2)* %425, align 32, !invariant.load !0
>  %427 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %428 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %427, i64 0, i64 11, !amdgpu.uniform !0
>  %429 = load <4 x i32>, <4 x i32> addrspace(2)* %428, align 16, !invariant.load !0
>  %430 = extractelement <8 x i32> %426, i32 7
>  %431 = extractelement <4 x i32> %429, i32 0
>  %432 = and i32 %431, %430
>  %433 = insertelement <4 x i32> %429, i32 %432, i32 0
>  %434 = call float @llvm.amdgcn.cubetc(float %324, float %326, float %328)
>  %435 = call float @llvm.amdgcn.cubesc(float %324, float %326, float %328)
>  %436 = call float @llvm.amdgcn.cubema(float %324, float %326, float %328)
>  %437 = call float @llvm.amdgcn.cubeid(float %324, float %326, float %328)
>  %438 = call float @llvm.fabs.f32(float %436)
>  %439 = fdiv float 1.000000e+00, %438, !fpmath !1
>  %440 = fmul float %434, %439
>  %441 = fadd float %440, 1.500000e+00
>  %442 = fmul float %435, %439
>  %443 = fadd float %442, 1.500000e+00
>  %444 = bitcast float %443 to i32
>  %445 = bitcast float %441 to i32
>  %446 = bitcast float %437 to i32
>  %447 = bitcast float %330 to i32
>  %448 = insertelement <4 x i32> undef, i32 %444, i32 0
>  %449 = insertelement <4 x i32> %448, i32 %445, i32 1
>  %450 = insertelement <4 x i32> %449, i32 %446, i32 2
>  %451 = insertelement <4 x i32> %450, i32 %447, i32 3
>  %452 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %451, <8 x i32> %426, <4 x i32> %433, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %453 = extractelement <4 x float> %452, i32 0
>  %454 = extractelement <4 x float> %452, i32 1
>  %455 = extractelement <4 x float> %452, i32 2
>  %456 = fmul float %422, %453
>  %457 = fmul float %423, %454
>  %458 = fmul float %424, %455
>  %459 = fmul float %456, %227
>  %460 = fmul float %457, %227
>  %461 = fmul float %458, %227
>  %462 = fmul float %387, %408
>  %463 = fadd float %462, %459
>  %464 = fmul float %389, %409
>  %465 = fadd float %464, %460
>  %466 = fmul float %391, %410
>  %467 = fadd float %466, %461
>  %468 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %469 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %470 = load <16 x i8>, <16 x i8> addrspace(2)* %469, align 16, !invariant.load !0
>  %471 = call float @llvm.SI.load.const(<16 x i8> %470, i32 12)
>  %472 = fsub float %468, %471
>  %473 = call float @llvm.maxnum.f32(float %472, float 0.000000e+00)
>  %474 = call float @llvm.SI.load.const(<16 x i8> %470, i32 28)
>  %475 = call float @llvm.SI.load.const(<16 x i8> %470, i32 12)
>  %476 = fsub float %474, %475
>  %477 = fadd float %476, 0x3F50624DE0000000
>  %478 = fdiv float 1.000000e+00, %477, !fpmath !1
>  %479 = fmul float %473, %478
>  %480 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %481 = load <16 x i8>, <16 x i8> addrspace(2)* %480, align 16, !invariant.load !0
>  %482 = call float @llvm.SI.load.const(<16 x i8> %481, i32 28)
>  %483 = call float @llvm.floor.f32(float %482)
>  %484 = fsub float %482, %483
>  %485 = fmul float %484, 8.000000e+00
>  %486 = call float @llvm.pow.f32(float %479, float %485)
>  %487 = call float @llvm.AMDGPU.clamp.(float %486, float 0.000000e+00, float 1.000000e+00)
>  %488 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %489 = fmul float %488, %487
>  %490 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %491 = load <16 x i8>, <16 x i8> addrspace(2)* %490, align 16, !invariant.load !0
>  %492 = call float @llvm.SI.load.const(<16 x i8> %491, i32 32)
>  %493 = fsub float 1.000000e+00, %489
>  %494 = fmul float %463, %489
>  %495 = fmul float %492, %493
>  %496 = fadd float %494, %495
>  %497 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %498 = load <16 x i8>, <16 x i8> addrspace(2)* %497, align 16, !invariant.load !0
>  %499 = call float @llvm.SI.load.const(<16 x i8> %498, i32 36)
>  %500 = fsub float 1.000000e+00, %489
>  %501 = fmul float %465, %489
>  %502 = fmul float %499, %500
>  %503 = fadd float %501, %502
>  %504 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %505 = load <16 x i8>, <16 x i8> addrspace(2)* %504, align 16, !invariant.load !0
>  %506 = call float @llvm.SI.load.const(<16 x i8> %505, i32 40)
>  %507 = fsub float 1.000000e+00, %489
>  %508 = fmul float %467, %489
>  %509 = fmul float %506, %507
>  %510 = fadd float %508, %509
>  %511 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %512 = bitcast float %5 to i32
>  %513 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %512, 10
>  %514 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %513, float %496, 11
>  %515 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %514, float %503, 12
>  %516 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %515, float %510, 13
>  %517 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %516, float %511, 14
>  %518 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %517, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %518
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x3                     ; C2040103
>	s_buffer_load_dword s10, s[0:3], 0x7                    ; C2050107
>	s_buffer_load_dword s13, s[0:3], 0xb                    ; C206810B
>	s_buffer_load_dword s18, s[0:3], 0xf                    ; C209010F
>	s_buffer_load_dword s17, s[0:3], 0x17                   ; C2088117
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s22, s[0:3], 0x13                   ; C20B0113
>	s_buffer_load_dword s9, s[0:3], 0x4                     ; C2048104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s14, s[0:3], 0xc                    ; C207010C
>	s_buffer_load_dword s15, s[0:3], 0xd                    ; C207810D
>	s_buffer_load_dword s16, s[0:3], 0xe                    ; C208010E
>	s_buffer_load_dword s19, s[0:3], 0x10                   ; C2098110
>	s_buffer_load_dword s20, s[0:3], 0x11                   ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                   ; C20A8112
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_sub_f32_e64 v7, 1.0, s22                              ; D2080007 00002CF2
>	v_mul_f32_e32 v0, s8, v9                                ; 10001208
>	v_mac_f32_e32 v0, s10, v10                              ; 3E00140A
>	v_mac_f32_e32 v0, s13, v11                              ; 3E00160D
>	v_mac_f32_e32 v0, s18, v12                              ; 3E001812
>	v_mul_f32_e32 v1, s17, v0                               ; 10020011
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	v_mad_f32 v8, 2.0, v13, -1.0                            ; D2820008 03CE1AF4
>	v_mad_f32 v13, 2.0, v14, -1.0                           ; D282000D 03CE1CF4
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 33, 0, 0, 0, v16, v17, v18, v19                 ; F800021F 13121110
>	v_mad_f32 v14, 2.0, v15, -1.0                           ; D282000E 03CE1EF4
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v17, 0, v13, v8                               ; D2820011 04221A80
>	v_mad_f32 v18, 0, v8, v13                               ; D2820012 04361080
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v19, 0, v4, v3                                ; D2820013 040E0880
>	v_mac_f32_e32 v17, 0, v14                               ; 3E221C80
>	v_mac_f32_e32 v18, 0, v14                               ; 3E241C80
>	v_mac_f32_e32 v14, 0, v13                               ; 3E1C1A80
>	v_mad_f32 v13, 0, v3, v4                                ; D282000D 04120680
>	v_mac_f32_e32 v19, 0, v5                                ; 3E260A80
>	v_mac_f32_e32 v13, 0, v5                                ; 3E1A0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mul_f32_e32 v4, s6, v9                                ; 10081206
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s8, v10                               ; 3E081408
>	v_mac_f32_e32 v4, s0, v11                               ; 3E081600
>	v_mov_b32_e32 v1, s19                                   ; 7E020213
>	v_mac_f32_e32 v4, s16, v12                              ; 3E081810
>	v_mac_f32_e32 v1, s20, v4                               ; 3E020814
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v3, v19, v18                              ; 10062513
>	v_mul_legacy_f32_e32 v1, s21, v1                        ; 0E020215
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_mul_f32_e32 v8, v13, v14                              ; 10101D0D
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v17, v13, -v3                             ; D2820003 840E1B11
>	v_mac_f32_e32 v7, s22, v1                               ; 3E0E0216
>	v_mul_f32_e32 v15, s4, v9                               ; 101E1204
>	v_mul_f32_e32 v16, s5, v9                               ; 10201205
>	v_mul_f32_e32 v9, v5, v17                               ; 10122305
>	v_mad_f32 v8, v18, v5, -v8                              ; D2820008 84220B12
>	v_mad_f32 v1, v6, v3, -v3                               ; D2820001 840E0706
>	v_mul_f32_e32 v3, v7, v7                                ; 10060F07
>	v_mad_f32 v9, v14, v19, -v9                             ; D2820009 8426270E
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	exp 15, 34, 0, 0, 0, v3, v0, v0, v0                     ; F800022F 00000003
>	v_mac_f32_e32 v15, s9, v10                              ; 3E1E1409
>	v_mac_f32_e32 v16, s7, v10                              ; 3E201407
>	v_mad_f32 v9, v6, v9, -v9                               ; D2820009 84261306
>	exp 15, 35, 0, 0, 0, v19, v13, v5, v8                   ; F800023F 08050D13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	v_mac_f32_e32 v16, s12, v11                             ; 3E20160C
>	exp 15, 36, 0, 0, 0, v9, v1, v17, v18                   ; F800024F 12110109
>	v_mac_f32_e32 v15, s14, v12                             ; 3E1E180E
>	v_mac_f32_e32 v16, s15, v12                             ; 3E20180F
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v15, v16, v4, v0                   ; F80008CF 0004100F
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 552 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 3, [m0]                          ; C8200F04
>	v_interp_p2_f32 v8, [v8], v5, 3, 3, [m0]                    ; C8210F05
>	v_interp_p1_f32 v9, v4, 0, 4, [m0]                          ; C8241004
>	v_interp_p2_f32 v9, [v9], v5, 0, 4, [m0]                    ; C8251005
>	v_interp_p1_f32 v10, v4, 1, 4, [m0]                         ; C8281104
>	v_interp_p2_f32 v10, [v10], v5, 1, 4, [m0]                  ; C8291105
>	v_interp_p1_f32 v0, v4, 2, 4, [m0]                          ; C8001204
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s11, s[0:3], 0x0                        ; C2058100
>	v_interp_p2_f32 v0, [v0], v5, 2, 4, [m0]                    ; C8011205
>	v_interp_p1_f32 v1, v4, 3, 4, [m0]                          ; C8041304
>	s_buffer_load_dword s12, s[0:3], 0x1                        ; C2060101
>	v_interp_p2_f32 v1, [v1], v5, 3, 4, [m0]                    ; C8051305
>	v_interp_p1_f32 v6, v4, 0, 5, [m0]                          ; C8181404
>	s_buffer_load_dword s13, s[0:3], 0x2                        ; C2068102
>	v_interp_p2_f32 v6, [v6], v5, 0, 5, [m0]                    ; C8191405
>	v_interp_p1_f32 v11, v2, 0, 0, [m0]                         ; C82C0002
>	v_interp_p2_f32 v11, [v11], v3, 0, 0, [m0]                  ; C82D0003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v12, s11, v11                                 ; 0818160B
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v15, v2, 2, 0, [m0]                         ; C83C0202
>	v_interp_p2_f32 v15, [v15], v3, 2, 0, [m0]                  ; C83D0203
>	v_sub_f32_e32 v14, s12, v19                                 ; 081C260C
>	v_mul_f32_e32 v7, v12, v12                                  ; 100E190C
>	v_sub_f32_e32 v16, s13, v15                                 ; 08201E0D
>	v_mac_f32_e32 v7, v14, v14                                  ; 3E0E1D0E
>	v_mac_f32_e32 v7, v16, v16                                  ; 3E0E2110
>	v_rsq_f32_e32 v20, v7                                       ; 7E285D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v21, v20, v12                                 ; 102A1914
>	v_mul_f32_e32 v22, v20, v14                                 ; 102C1D14
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                       ; C090055C
>	v_mul_f32_e32 v23, v7, v0                                   ; 102E0107
>	v_mul_f32_e32 v24, v7, v1                                   ; 10300307
>	v_mul_f32_e32 v0, v23, v21                                  ; 10002B17
>	s_load_dwordx8 s[24:31], s[4:5], 0x50                       ; C0CC0550
>	v_mul_f32_e32 v25, v7, v6                                   ; 10320D07
>	v_mul_f32_e32 v26, v20, v16                                 ; 10342114
>	v_mac_f32_e32 v0, v24, v22                                  ; 3E002D18
>	v_mac_f32_e32 v0, v25, v26                                  ; 3E003519
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v27, v0, 0 clamp                              ; D206081B 00010100
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	image_sample v[17:18], v[0:1], s[24:31], s[32:35] dmask:0x6 ; F0800600 01061100
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                       ; C092054C
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	s_load_dwordx8 s[12:19], s[4:5], 0x60                       ; C0C60560
>	s_load_dwordx4 s[20:23], s[4:5], 0x6c                       ; C08A056C
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s40, s[0:3], 0x16                       ; C2140116
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s31                                     ; 87241F24
>	image_sample v[6:7], v[0:1], s[24:31], s[36:39] dmask:0xa   ; F0800A00 01260600
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v29, v6, v6                                   ; 063A0D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_interp_p1_f32 v30, v4, 0, 3, [m0]                         ; C8780C04
>	v_add_f32_e32 v28, v7, v7                                   ; 06380F07
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v29, v29, v6, -v6                                 ; D282001D 841A0D1D
>	v_interp_p2_f32 v30, [v30], v5, 0, 3, [m0]                  ; C8790C05
>	v_interp_p1_f32 v31, v4, 1, 3, [m0]                         ; C87C0D04
>	v_mac_f32_e32 v29, v7, v7                                   ; 3E3A0F07
>	v_interp_p2_f32 v31, [v31], v5, 1, 3, [m0]                  ; C87D0D05
>	v_interp_p1_f32 v32, v4, 2, 3, [m0]                         ; C8800E04
>	v_add_f32_e64 v4, v29, 0 clamp                              ; D2060804 0001011D
>	v_mad_f32 v33, v28, v30, -v30                               ; D2820021 847A3D1C
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mad_f32 v34, v28, v31, -v31                               ; D2820022 847E3F1C
>	v_interp_p2_f32 v32, [v32], v5, 2, 3, [m0]                  ; C8810E05
>	v_mac_f32_e32 v33, v6, v8                                   ; 3E421106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mad_f32 v28, v28, v32, -v32                               ; D282001C 8482411C
>	v_mac_f32_e32 v34, v6, v9                                   ; 3E441306
>	v_mac_f32_e32 v33, v4, v23                                  ; 3E422F04
>	v_mac_f32_e32 v28, v6, v10                                  ; 3E381506
>	v_mac_f32_e32 v34, v4, v24                                  ; 3E443104
>	v_mul_f32_e32 v21, v21, v33                                 ; 102A4315
>	v_mac_f32_e32 v28, v4, v25                                  ; 3E383304
>	v_mac_f32_e32 v21, v22, v34                                 ; 3E2A4516
>	v_mac_f32_e32 v21, v26, v28                                 ; 3E2A391A
>	v_mul_f32_e32 v4, v33, v21                                  ; 10082B21
>	v_mac_f32_e32 v4, v33, v21                                  ; 3E082B21
>	v_mad_f32 v12, -v12, v20, v4                                ; D282000C 2412290C
>	v_mul_f32_e32 v4, v34, v21                                  ; 10082B22
>	v_mac_f32_e32 v4, v34, v21                                  ; 3E082B22
>	v_mad_f32 v22, -v14, v20, v4                                ; D2820016 2412290E
>	v_mul_f32_e32 v4, v28, v21                                  ; 10082B1C
>	v_mac_f32_e32 v4, v28, v21                                  ; 3E082B1C
>	v_mad_f32 v20, -v16, v20, v4                                ; D2820014 24122910
>	v_interp_p1_f32 v4, v2, 2, 1, [m0]                          ; C8100602
>	v_interp_p2_f32 v4, [v4], v3, 2, 1, [m0]                    ; C8110603
>	v_interp_p1_f32 v5, v2, 3, 1, [m0]                          ; C8140702
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_interp_p2_f32 v5, [v5], v3, 3, 1, [m0]                    ; C8150703
>	image_sample v[4:7], v[4:5], s[12:19], s[20:23] dmask:0xf   ; F0800F00 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v6, -0.5, v6                                  ; 060C0CF1
>	v_add_f32_e32 v6, v6, v6                                    ; 060C0D06
>	v_add_f32_e32 v5, -0.5, v5                                  ; 060A0AF1
>	v_mul_f32_e32 v26, v6, v30                                  ; 10343D06
>	v_add_f32_e32 v5, v5, v5                                    ; 060A0B05
>	v_mul_f32_e32 v29, v6, v31                                  ; 103A3F06
>	v_mul_f32_e32 v30, v6, v32                                  ; 103C4106
>	v_mac_f32_e32 v26, v5, v8                                   ; 3E341105
>	v_mac_f32_e32 v30, v5, v10                                  ; 3E3C1505
>	v_mac_f32_e32 v29, v5, v9                                   ; 3E3A1305
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	v_mac_f32_e32 v5, v6, v6                                    ; 3E0A0D06
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_sub_f32_e32 v5, 1.0, v5                                   ; 080A0AF2
>	v_sqrt_f32_e32 v5, v5                                       ; 7E0A6705
>	v_mac_f32_e32 v26, v5, v23                                  ; 3E342F05
>	v_mac_f32_e32 v29, v5, v24                                  ; 3E3A3105
>	v_mac_f32_e32 v30, v5, v25                                  ; 3E3C3305
>	v_mul_f32_e32 v5, v26, v12                                  ; 100A191A
>	v_mac_f32_e32 v5, v29, v22                                  ; 3E0A2D1D
>	v_mac_f32_e32 v5, v30, v20                                  ; 3E0A291E
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mad_f32 v5, 2.0, v7, -v5                                  ; D2820005 84160EF4
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_log_f32_e32 v5, v5                                        ; 7E0A4F05
>	v_mul_f32_e32 v31, v17, v4                                  ; 103E0911
>	v_cubema_f32 v4, v33, v34, v28                              ; D28E0004 04724521
>	v_add_f32_e32 v6, v7, v7                                    ; 060C0F07
>	v_rcp_f32_e64 v7, |v4|                                      ; D3540107 00000104
>	v_mul_legacy_f32_e32 v5, 0x40400000, v5                     ; 0E0A0AFF 40400000
>	v_exp_f32_e32 v5, v5                                        ; 7E0A4B05
>	v_cubetc_f32 v8, v33, v34, v28                              ; D28C0008 04724521
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v10, v33, v34, v28                             ; D28A000A 04724521
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mad_f32 v9, v7, v8, v4                                    ; D2820009 04121107
>	v_mad_f32 v8, v7, v10, v4                                   ; D2820008 04121507
>	v_mov_b32_e32 v7, v5                                        ; 7E0E0305
>	v_sub_f32_e32 v10, 1.0, v18                                 ; 081424F2
>	v_mac_f32_e32 v7, 0xbe99999a, v18                           ; 3E0E24FF BE99999A
>	v_mac_f32_e32 v10, 0x41a00000, v18                          ; 3E1424FF 41A00000
>	v_mul_f32_e32 v7, v10, v7                                   ; 100E0F0A
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v7, v23, v12                                  ; 100E1917
>	v_mad_f32 v7, -v22, v24, -v7                                ; D2820007 A41E3116
>	v_mad_f32 v7, -v20, v25, v7                                 ; D2820007 241E3314
>	v_add_f32_e32 v7, 1.0, v7                                   ; 060E0EF2
>	v_subrev_f32_e32 v7, v27, v7                                ; 0A0E0F1B
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	s_buffer_load_dword s13, s[0:3], 0x11                       ; C2068111
>	v_sub_f32_e32 v10, 1.0, v7                                  ; 08140EF2
>	s_buffer_load_dword s12, s[0:3], 0x10                       ; C2060110
>	v_mad_f32 v7, -v7, v10, v10                                 ; D2820007 242A1507
>	v_mul_f32_e32 v27, v7, v5                                   ; 10360B07
>	v_mov_b32_e32 v5, 0x403b800a                                ; 7E0A02FF 403B800A
>	s_buffer_load_dword s14, s[0:3], 0x12                       ; C2070112
>	v_mac_f32_e32 v11, v5, v23                                  ; 3E162F05
>	s_buffer_load_dword s15, s[0:3], 0x14                       ; C2078114
>	v_mac_f32_e32 v15, v5, v25                                  ; 3E1E3305
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v10, s13, v11                                 ; 1014160D
>	v_mad_f32 v5, v5, v24, v19                                  ; D2820005 044E3105
>	s_buffer_load_dword s41, s[0:3], 0x18                       ; C2148118
>	s_buffer_load_dword s42, s[0:3], 0x19                       ; C2150119
>	s_buffer_load_dword s43, s[0:3], 0x1a                       ; C215811A
>	v_mul_f32_e32 v7, s12, v11                                  ; 100E160C
>	v_mac_f32_e32 v10, s11, v5                                  ; 3E140A0B
>	s_buffer_load_dword s11, s[0:3], 0x1c                       ; C205811C
>	s_buffer_load_dword s12, s[0:3], 0x1d                       ; C206011D
>	s_buffer_load_dword s13, s[0:3], 0x1e                       ; C206811E
>	v_mul_f32_e32 v11, s14, v11                                 ; 1016160E
>	v_mac_f32_e32 v7, s15, v5                                   ; 3E0E0A0F
>	v_mac_f32_e32 v11, s40, v5                                  ; 3E160A28
>	s_load_dwordx8 s[28:35], s[4:5], 0x10                       ; C0CE0510
>	s_load_dwordx4 s[52:55], s[4:5], 0x1c                       ; C09A051C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v10, s42, v15                                 ; 3E141E2A
>	v_mac_f32_e32 v11, s43, v15                                 ; 3E161E2B
>	v_mac_f32_e32 v7, s41, v15                                  ; 3E0E1E29
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                        ; C0CA0500
>	s_load_dwordx4 s[48:51], s[4:5], 0xc                        ; C098050C
>	v_add_f32_e32 v15, s11, v7                                  ; 061E0E0B
>	v_add_f32_e32 v16, s12, v10                                 ; 0620140C
>	v_add_f32_e32 v14, s13, v11                                 ; 061C160D
>	s_buffer_load_dword s9, s[0:3], 0x4                         ; C2048104
>	s_buffer_load_dword s8, s[0:3], 0x5                         ; C2040105
>	s_buffer_load_dword s11, s[0:3], 0x6                        ; C2058106
>	s_load_dwordx4 s[44:47], s[4:5], 0x3c                       ; C096053C
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[56:59], s[4:5], 0x2c                       ; C09C052C
>	s_load_dwordx8 s[36:43], s[4:5], 0x30                       ; C0D20530
>	v_mov_b32_e32 v5, 0x40c00000                                ; 7E0A02FF 40C00000
>	s_and_b32 s52, s52, s35                                     ; 87342334
>	v_cubeid_f32 v10, v33, v34, v28                             ; D288000A 04724521
>	v_mad_f32 v7, -v18, v5, v5                                  ; D2820007 24160B12
>	image_sample v[8:11], v[8:11], s[28:35], s[52:55] dmask:0xf ; F0800F00 01A70808
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s48, s48, s27                                     ; 87301B30
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_mul_f32_e32 v11, s9, v26                                  ; 10163409
>	v_mad_f32 v11, v29, -s8, -v11                               ; D282000B C42C111D
>	v_mad_f32 v11, -v30, s11, v11                               ; D282000B 242C171E
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	image_sample_c v5, v[14:17], s[20:27], s[48:51] dmask:0x1   ; F0A00100 0185050E
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_mov_b32_e32 v14, 0x3f8ccccd                               ; 7E1C02FF 3F8CCCCD
>	v_mad_f32 v6, v14, v6, -v11                                 ; D2820006 842E0D0E
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mul_f32_e32 v11, s9, v33                                  ; 10164209
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	v_mad_f32 v11, v34, -s8, -v11                               ; D282000B C42C1122
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v14, s4, v5                                   ; 101C0A04
>	v_mul_f32_e32 v15, s5, v5                                   ; 101E0A05
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mul_f32_e32 v5, s6, v5                                    ; 100A0A06
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	v_mad_f32 v11, -v28, s11, v11                               ; D282000B 242C171C
>	v_mul_f32_e32 v14, v6, v14                                  ; 101C1D06
>	v_mul_f32_e32 v15, v6, v15                                  ; 101E1F06
>	v_add_f32_e64 v6, v11, 0 clamp                              ; D2060806 0001010B
>	v_mul_f32_e32 v11, v17, v14                                 ; 10161D11
>	v_mul_f32_e32 v5, v17, v5                                   ; 100A0B11
>	v_mul_f32_e32 v14, v17, v15                                 ; 101C1F11
>	v_mul_f32_e32 v15, v5, v6                                   ; 101E0D05
>	v_mul_f32_e32 v5, 4.0, v31                                  ; 100A3EF6
>	v_mul_f32_e32 v11, v11, v6                                  ; 10160D0B
>	v_mac_f32_e32 v11, v5, v8                                   ; 3E161105
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	v_mul_f32_e32 v14, v14, v6                                  ; 101C0D0E
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mac_f32_e32 v14, v5, v9                                   ; 3E1C1305
>	v_mac_f32_e32 v15, v5, v10                                  ; 3E1E1505
>	v_cubeid_f32 v6, v12, v22, v20                              ; D2880006 04522D0C
>	v_cubetc_f32 v5, v12, v22, v20                              ; D28C0005 04522D0C
>	v_cubesc_f32 v16, v12, v22, v20                             ; D28A0010 04522D0C
>	v_cubema_f32 v12, v12, v22, v20                             ; D28E000C 04522D0C
>	v_log_f32_e32 v17, v8                                       ; 7E224F08
>	s_and_b32 s44, s44, s43                                     ; 872C2B2C
>	image_sample v[8:10], v[0:1], s[36:43], s[44:47] dmask:0x7  ; F0800700 01690800
>	v_rcp_f32_e64 v1, |v12|                                     ; D3540101 0000010C
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v17                    ; 0E0022FF 40A00000
>	s_buffer_load_dword s5, s[0:3], 0x7                         ; C2028107
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_max_f32_e32 v18, 0, v18                                   ; 20242480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s56, s56, s19                                     ; 87381338
>	v_mac_f32_e32 v4, v1, v16                                   ; 3E082101
>	v_mul_f32_e32 v0, v18, v0                                   ; 10000112
>	image_sample_l v[4:6], v[4:7], s[12:19], s[56:59] dmask:0x7 ; F0900700 01C30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v27, v0                                   ; 100A011B
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s5, v0                                    ; 08000005
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v19                                ; 0A0C2604
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s6, s[0:3], 0x8                         ; C2030108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s5                                      ; 7E0C4805
>	v_sub_f32_e32 v6, s5, v6                                    ; 080C0C05
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s7, s[0:3], 0x9                         ; C2038109
>	v_interp_p1_f32 v6, v2, 0, 2, [m0]                          ; C8180802
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 0, 2, [m0]                    ; C8190803
>	v_mul_f32_e32 v1, v27, v1                                   ; 1002031B
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v27, v4                                   ; 1008091B
>	v_mac_f32_e32 v1, v8, v11                                   ; 3E021708
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s6, s6                                   ; D2820000 20180D06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v14                                   ; 3E081D09
>	v_mad_f32 v1, -v6, s7, s7                                   ; D2820001 201C0F06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v15                                  ; 3E0A1F0A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 64
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1572 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..14]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     6.0000,     4.0000}
>IMM[3] FLT32 {    5.0000,     0.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[5], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[4], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[4].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[4].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[4].xyzz
> 23: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[4].xyzz
> 25: MAD TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz, -TEMP[2].xyzz
> 26: MOV TEMP[6].xy, IN[1].zwww
> 27: TEX TEMP[6], TEMP[6], SAMP[6], 2D
> 28: ADD TEMP[7].xyz, TEMP[6].zyyy, IMM[1].xxxx
> 29: MUL TEMP[7].xy, TEMP[7].xyzz, IMM[0].xxxx
> 30: MUL TEMP[8].x, TEMP[6].wwww, IMM[0].xxxx
> 31: DP2 TEMP[9].x, TEMP[7].xyyy, TEMP[7].xyyy
> 32: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 33: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 34: SQRT TEMP[9].x, TEMP[9].xxxx
> 35: MUL TEMP[10].xyz, IN[3].xyzz, TEMP[7].xxxx
> 36: MAD TEMP[7].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[10].xyzz
> 37: MAD TEMP[7].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[7].xyzz
> 38: DP3 TEMP[9].x, TEMP[5].xyzz, TEMP[7].xyzz
> 39: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 40: ADD TEMP[9].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 41: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 42: POW TEMP[9].x, TEMP[9].xxxx, IMM[1].yyyy
> 43: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 44: MUL TEMP[10].x, IMM[1].zzzz, TEMP[3].zzzz
> 45: ADD TEMP[10].x, TEMP[9].xxxx, -TEMP[10].xxxx
> 46: LRP TEMP[11].x, TEMP[3].zzzz, IMM[1].wwww, IMM[0].wwww
> 47: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 48: MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 49: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 50: MUL TEMP[8].x, TEMP[8].xxxx, IMM[2].xxxx
> 51: MUL TEMP[0].x, TEMP[6].xxxx, TEMP[3].yyyy
> 52: DP3 TEMP[5].x, -TEMP[5].xyzz, TEMP[1].xyzz
> 53: ADD TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 54: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[1].xyzz
> 55: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
> 56: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 57: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[6].xxxx
> 58: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 59: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 60: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 61: MUL TEMP[5].x, TEMP[9].xxxx, TEMP[5].xxxx
> 62: MAD TEMP[1].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 63: MUL TEMP[6], CONST[4], TEMP[1].xxxx
> 64: MAD TEMP[6], CONST[5], TEMP[1].yyyy, TEMP[6]
> 65: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[6]
> 66: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 67: MOV TEMP[6].xyz, -CONST[1].xyzx
> 68: MOV TEMP[9].xy, TEMP[1].xyyy
> 69: MOV TEMP[9].w, IMM[0].wwww
> 70: MOV TEMP[9].z, TEMP[1].zzzz
> 71: TXP TEMP[1].x, TEMP[9], SAMP[0], SHADOW2D
> 72: DP3 TEMP[9].x, TEMP[6].xyzz, TEMP[7].xyzz
> 73: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 74: ADD TEMP[9].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 75: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 76: MOV TEMP[10].xyz, TEMP[4].xyzz
> 77: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
> 78: DP3 TEMP[11].x, TEMP[4].xyzz, TEMP[2].xyzz
> 79: MUL TEMP[11].xyz, TEMP[11].xxxx, TEMP[4].xyzz
> 80: MAD TEMP[11].xyz, IMM[0].xxxx, TEMP[11].xyzz, -TEMP[2].xyzz
> 81: ADD TEMP[12].x, IMM[0].wwww, -TEMP[3].zzzz
> 82: MUL TEMP[12].x, TEMP[12].xxxx, IMM[2].zzzz
> 83: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
> 84: MUL TEMP[0].x, IMM[2].wwww, TEMP[0].xxxx
> 85: DP3 TEMP[6].x, TEMP[6].xyzz, TEMP[4].xyzz
> 86: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 87: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 88: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 89: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[9].xxxx
> 90: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 91: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 92: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 93: MUL TEMP[1].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 94: MAD TEMP[0].xyz, TEMP[10].xyzz, TEMP[0].xxxx, TEMP[1].xyzz
> 95: ADD TEMP[1].xyz, CONST[11].xyzz, -IN[0].xyzz
> 96: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[1].xyzz
> 97: RSQ TEMP[9].x, TEMP[6].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 99: DP3 TEMP[10].x, TEMP[1].xyzz, TEMP[7].xyzz
>100: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>101: ADD TEMP[10].x, TEMP[8].xxxx, -TEMP[10].xxxx
>102: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>103: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>104: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[4].xyzz
>105: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>106: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[9].xxxx
>107: MUL TEMP[6].x, TEMP[6].xxxx, CONST[11].wwww
>108: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>109: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
>110: MUL TEMP[6].xyz, CONST[12].xyzz, TEMP[6].xxxx
>111: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>112: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>113: LRP TEMP[9].x, TEMP[9].xxxx, IMM[0].wwww, TEMP[10].xxxx
>114: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[9].xxxx
>115: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[3].yyyy
>116: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[6].xyzz, TEMP[0].xyzz
>117: ADD TEMP[1].xyz, CONST[13].xyzz, -IN[0].xyzz
>118: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[1].xyzz
>119: RSQ TEMP[9].x, TEMP[6].xxxx
>120: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>121: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[7].xyzz
>122: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>123: ADD TEMP[7].x, TEMP[8].xxxx, -TEMP[7].xxxx
>124: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>125: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
>126: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[4].xyzz
>127: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>128: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[9].xxxx
>129: MUL TEMP[6].x, TEMP[6].xxxx, CONST[13].wwww
>130: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>131: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
>132: MUL TEMP[6].xyz, CONST[14].xyzz, TEMP[6].xxxx
>133: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
>134: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>135: LRP TEMP[7].x, TEMP[9].xxxx, IMM[0].wwww, TEMP[7].xxxx
>136: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[7].xxxx
>137: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[3].yyyy
>138: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[6].xyzz, TEMP[0].xyzz
>139: MOV TEMP[1].xy, IN[1].xyyy
>140: TEX TEMP[1].xyz, TEMP[1], SAMP[3], 2D
>141: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[4].xyzz
>142: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>143: ADD TEMP[2].x, IMM[0].wwww, -TEMP[2].xxxx
>144: POW TEMP[2].x, TEMP[2].xxxx, IMM[3].xxxx
>145: MAX TEMP[3].xyz, TEMP[3].zzzz, IMM[3].yyyy
>146: MUL TEMP[2].xyz, TEMP[2].xxxx, TEMP[3].xyzz
>147: MOV TEMP[3].xyz, TEMP[11].xyzz
>148: MOV TEMP[3].w, TEMP[12].xxxx
>149: TXL TEMP[3].xyz, TEMP[3], SAMP[2], CUBE
>150: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xyzz
>151: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>152: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz, TEMP[2].xyzz
>153: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>154: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].yyyy
>155: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>156: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>157: RCP TEMP[2].x, TEMP[2].xxxx
>158: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>159: FRC TEMP[2].x, CONST[1].wwww
>160: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].wwww
>161: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>162: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>163: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>164: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>165: MOV TEMP[0].w, IN[0].wwww
>166: MOV OUT[0], TEMP[0]
>167: END
>radeonsi: Compiling shader 81
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 23, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 19, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fsub float %134, %49
>  %136 = fmul float %132, 2.000000e+00
>  %137 = fsub float %136, %50
>  %138 = fmul float %133, 2.000000e+00
>  %139 = fsub float %138, %51
>  %140 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %141 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %142 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %143 = load <8 x i32>, <8 x i32> addrspace(2)* %142, align 32, !invariant.load !0
>  %144 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %145 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %144, i64 0, i64 27, !amdgpu.uniform !0
>  %146 = load <4 x i32>, <4 x i32> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = extractelement <8 x i32> %143, i32 7
>  %148 = extractelement <4 x i32> %146, i32 0
>  %149 = and i32 %148, %147
>  %150 = insertelement <4 x i32> %146, i32 %149, i32 0
>  %151 = bitcast float %140 to i32
>  %152 = bitcast float %141 to i32
>  %153 = insertelement <2 x i32> undef, i32 %151, i32 0
>  %154 = insertelement <2 x i32> %153, i32 %152, i32 1
>  %155 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %154, <8 x i32> %143, <4 x i32> %150, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %156 = extractelement <4 x float> %155, i32 0
>  %157 = extractelement <4 x float> %155, i32 1
>  %158 = extractelement <4 x float> %155, i32 2
>  %159 = extractelement <4 x float> %155, i32 3
>  %160 = fadd float %158, -5.000000e-01
>  %161 = fadd float %157, -5.000000e-01
>  %162 = fmul float %160, 2.000000e+00
>  %163 = fmul float %161, 2.000000e+00
>  %164 = fmul float %159, 2.000000e+00
>  %165 = fmul float %162, %162
>  %166 = fmul float %163, %163
>  %167 = fadd float %165, %166
>  %168 = call float @llvm.AMDGPU.clamp.(float %167, float 0.000000e+00, float 1.000000e+00)
>  %169 = fsub float 1.000000e+00, %168
>  %170 = call float @llvm.sqrt.f32(float %169)
>  %171 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %172 = fmul float %171, %162
>  %173 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %174 = fmul float %173, %162
>  %175 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %176 = fmul float %175, %162
>  %177 = fmul float %23, %163
>  %178 = fadd float %177, %172
>  %179 = fmul float %24, %163
>  %180 = fadd float %179, %174
>  %181 = fmul float %25, %163
>  %182 = fadd float %181, %176
>  %183 = fmul float %59, %170
>  %184 = fadd float %183, %178
>  %185 = fmul float %60, %170
>  %186 = fadd float %185, %180
>  %187 = fmul float %61, %170
>  %188 = fadd float %187, %182
>  %189 = fmul float %135, %184
>  %190 = fmul float %137, %186
>  %191 = fadd float %190, %189
>  %192 = fmul float %139, %188
>  %193 = fadd float %191, %192
>  %194 = call float @llvm.AMDGPU.clamp.(float %193, float 0.000000e+00, float 1.000000e+00)
>  %195 = fsub float %164, %194
>  %196 = call float @llvm.AMDGPU.clamp.(float %195, float 0.000000e+00, float 1.000000e+00)
>  %197 = call float @llvm.pow.f32(float %196, float 3.000000e+00)
>  %198 = call float @llvm.AMDGPU.clamp.(float %197, float 0.000000e+00, float 1.000000e+00)
>  %199 = fmul float %79, 0x3FD3333340000000
>  %200 = fsub float %198, %199
>  %201 = fsub float 1.000000e+00, %79
>  %202 = fmul float %79, 2.000000e+01
>  %203 = fadd float %202, %201
>  %204 = fmul float %200, %203
>  %205 = call float @llvm.AMDGPU.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %206 = fmul float %198, %205
>  %207 = fmul float %164, 0x3FF19999A0000000
>  %208 = fmul float %156, %78
>  %209 = fmul float %135, %59
>  %210 = fsub float -0.000000e+00, %209
>  %211 = fmul float %137, %60
>  %212 = fsub float %210, %211
>  %213 = fmul float %139, %61
>  %214 = fsub float %212, %213
>  %215 = fadd float %214, 1.000000e+00
>  %216 = fmul float %49, %59
>  %217 = fmul float %50, %60
>  %218 = fadd float %217, %216
>  %219 = fmul float %51, %61
>  %220 = fadd float %218, %219
>  %221 = fsub float 1.000000e+00, %220
>  %222 = call float @llvm.AMDGPU.clamp.(float %221, float 0.000000e+00, float 1.000000e+00)
>  %223 = fsub float %215, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fsub float 1.000000e+00, %224
>  %226 = fmul float %225, %225
>  %227 = fmul float %206, %226
>  %228 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %229 = fmul float %59, 0x4007700140000000
>  %230 = fadd float %229, %228
>  %231 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %232 = fmul float %60, 0x4007700140000000
>  %233 = fadd float %232, %231
>  %234 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %235 = fmul float %61, 0x4007700140000000
>  %236 = fadd float %235, %234
>  %237 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %238 = load <16 x i8>, <16 x i8> addrspace(2)* %237, align 16, !invariant.load !0
>  %239 = call float @llvm.SI.load.const(<16 x i8> %238, i32 64)
>  %240 = fmul float %239, %230
>  %241 = call float @llvm.SI.load.const(<16 x i8> %238, i32 68)
>  %242 = fmul float %241, %230
>  %243 = call float @llvm.SI.load.const(<16 x i8> %238, i32 72)
>  %244 = fmul float %243, %230
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 80)
>  %248 = fmul float %247, %233
>  %249 = fadd float %248, %240
>  %250 = call float @llvm.SI.load.const(<16 x i8> %246, i32 84)
>  %251 = fmul float %250, %233
>  %252 = fadd float %251, %242
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 88)
>  %256 = fmul float %255, %233
>  %257 = fadd float %256, %244
>  %258 = call float @llvm.SI.load.const(<16 x i8> %254, i32 96)
>  %259 = fmul float %258, %236
>  %260 = fadd float %259, %249
>  %261 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %262 = load <16 x i8>, <16 x i8> addrspace(2)* %261, align 16, !invariant.load !0
>  %263 = call float @llvm.SI.load.const(<16 x i8> %262, i32 100)
>  %264 = fmul float %263, %236
>  %265 = fadd float %264, %252
>  %266 = call float @llvm.SI.load.const(<16 x i8> %262, i32 104)
>  %267 = fmul float %266, %236
>  %268 = fadd float %267, %257
>  %269 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %270 = load <16 x i8>, <16 x i8> addrspace(2)* %269, align 16, !invariant.load !0
>  %271 = call float @llvm.SI.load.const(<16 x i8> %270, i32 112)
>  %272 = fadd float %260, %271
>  %273 = call float @llvm.SI.load.const(<16 x i8> %270, i32 116)
>  %274 = fadd float %265, %273
>  %275 = call float @llvm.SI.load.const(<16 x i8> %270, i32 120)
>  %276 = fadd float %268, %275
>  %277 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %278 = load <16 x i8>, <16 x i8> addrspace(2)* %277, align 16, !invariant.load !0
>  %279 = call float @llvm.SI.load.const(<16 x i8> %278, i32 16)
>  %280 = fsub float -0.000000e+00, %279
>  %281 = call float @llvm.SI.load.const(<16 x i8> %278, i32 20)
>  %282 = fsub float -0.000000e+00, %281
>  %283 = call float @llvm.SI.load.const(<16 x i8> %278, i32 24)
>  %284 = fsub float -0.000000e+00, %283
>  %285 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %286 = load <8 x i32>, <8 x i32> addrspace(2)* %285, align 32, !invariant.load !0
>  %287 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %288 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %287, i64 0, i64 3, !amdgpu.uniform !0
>  %289 = load <4 x i32>, <4 x i32> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = extractelement <8 x i32> %286, i32 7
>  %291 = extractelement <4 x i32> %289, i32 0
>  %292 = and i32 %291, %290
>  %293 = insertelement <4 x i32> %289, i32 %292, i32 0
>  %294 = bitcast float %276 to i32
>  %295 = bitcast float %272 to i32
>  %296 = bitcast float %274 to i32
>  %297 = insertelement <4 x i32> undef, i32 %294, i32 0
>  %298 = insertelement <4 x i32> %297, i32 %295, i32 1
>  %299 = insertelement <4 x i32> %298, i32 %296, i32 2
>  %300 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %299, <8 x i32> %286, <4 x i32> %293, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %301 = extractelement <4 x float> %300, i32 0
>  %302 = fmul float %184, %280
>  %303 = fmul float %186, %282
>  %304 = fadd float %303, %302
>  %305 = fmul float %188, %284
>  %306 = fadd float %304, %305
>  %307 = call float @llvm.AMDGPU.clamp.(float %306, float 0.000000e+00, float 1.000000e+00)
>  %308 = fsub float %207, %307
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 7, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %320 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %321 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %322 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %323 = call float @llvm.fabs.f32(float %321)
>  %324 = fdiv float 1.000000e+00, %323, !fpmath !1
>  %325 = fmul float %319, %324
>  %326 = fadd float %325, 1.500000e+00
>  %327 = fmul float %320, %324
>  %328 = fadd float %327, 1.500000e+00
>  %329 = bitcast float %328 to i32
>  %330 = bitcast float %326 to i32
>  %331 = bitcast float %322 to i32
>  %332 = insertelement <4 x i32> undef, i32 %329, i32 0
>  %333 = insertelement <4 x i32> %332, i32 %330, i32 1
>  %334 = insertelement <4 x i32> %333, i32 %331, i32 2
>  %335 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %334, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %336 = extractelement <4 x float> %335, i32 0
>  %337 = extractelement <4 x float> %335, i32 1
>  %338 = extractelement <4 x float> %335, i32 2
>  %339 = extractelement <4 x float> %335, i32 3
>  %340 = fmul float %121, %49
>  %341 = fmul float %123, %50
>  %342 = fadd float %341, %340
>  %343 = fmul float %125, %51
>  %344 = fadd float %342, %343
>  %345 = fmul float %344, %121
>  %346 = fmul float %344, %123
>  %347 = fmul float %344, %125
>  %348 = fmul float %345, 2.000000e+00
>  %349 = fsub float %348, %49
>  %350 = fmul float %346, 2.000000e+00
>  %351 = fsub float %350, %50
>  %352 = fmul float %347, 2.000000e+00
>  %353 = fsub float %352, %51
>  %354 = fsub float 1.000000e+00, %79
>  %355 = fmul float %354, 6.000000e+00
>  %356 = fmul float %336, %339
>  %357 = fmul float %337, %339
>  %358 = fmul float %338, %339
>  %359 = fmul float %208, 4.000000e+00
>  %360 = fmul float %121, %280
>  %361 = fmul float %123, %282
>  %362 = fadd float %361, %360
>  %363 = fmul float %125, %284
>  %364 = fadd float %362, %363
>  %365 = call float @llvm.AMDGPU.clamp.(float %364, float 0.000000e+00, float 1.000000e+00)
>  %366 = fmul float %301, %301
>  %367 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %368 = load <16 x i8>, <16 x i8> addrspace(2)* %367, align 16, !invariant.load !0
>  %369 = call float @llvm.SI.load.const(<16 x i8> %368, i32 48)
>  %370 = fmul float %369, %366
>  %371 = call float @llvm.SI.load.const(<16 x i8> %368, i32 52)
>  %372 = fmul float %371, %366
>  %373 = call float @llvm.SI.load.const(<16 x i8> %368, i32 56)
>  %374 = fmul float %373, %366
>  %375 = fmul float %309, %309
>  %376 = call float @llvm.AMDGPU.clamp.(float %375, float 0.000000e+00, float 1.000000e+00)
>  %377 = fmul float %370, %376
>  %378 = fmul float %372, %376
>  %379 = fmul float %374, %376
>  %380 = fmul float %377, %78
>  %381 = fmul float %378, %78
>  %382 = fmul float %379, %78
>  %383 = fmul float %365, %380
>  %384 = fmul float %365, %381
>  %385 = fmul float %365, %382
>  %386 = fmul float %356, %359
>  %387 = fadd float %386, %383
>  %388 = fmul float %357, %359
>  %389 = fadd float %388, %384
>  %390 = fmul float %358, %359
>  %391 = fadd float %390, %385
>  %392 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %393 = load <16 x i8>, <16 x i8> addrspace(2)* %392, align 16, !invariant.load !0
>  %394 = call float @llvm.SI.load.const(<16 x i8> %393, i32 176)
>  %395 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %396 = fsub float %394, %395
>  %397 = call float @llvm.SI.load.const(<16 x i8> %393, i32 180)
>  %398 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %399 = fsub float %397, %398
>  %400 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %401 = load <16 x i8>, <16 x i8> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = call float @llvm.SI.load.const(<16 x i8> %401, i32 184)
>  %403 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %404 = fsub float %402, %403
>  %405 = fmul float %396, %396
>  %406 = fmul float %399, %399
>  %407 = fadd float %406, %405
>  %408 = fmul float %404, %404
>  %409 = fadd float %407, %408
>  %410 = call float @llvm.sqrt.f32(float %409)
>  %411 = fdiv float 1.000000e+00, %410, !fpmath !1
>  %412 = fmul float %396, %411
>  %413 = fmul float %399, %411
>  %414 = fmul float %404, %411
>  %415 = fmul float %412, %184
>  %416 = fmul float %413, %186
>  %417 = fadd float %416, %415
>  %418 = fmul float %414, %188
>  %419 = fadd float %417, %418
>  %420 = call float @llvm.AMDGPU.clamp.(float %419, float 0.000000e+00, float 1.000000e+00)
>  %421 = fsub float %207, %420
>  %422 = call float @llvm.AMDGPU.clamp.(float %421, float 0.000000e+00, float 1.000000e+00)
>  %423 = fmul float %422, %422
>  %424 = fmul float %412, %121
>  %425 = fmul float %413, %123
>  %426 = fadd float %425, %424
>  %427 = fmul float %414, %125
>  %428 = fadd float %426, %427
>  %429 = call float @llvm.AMDGPU.clamp.(float %428, float 0.000000e+00, float 1.000000e+00)
>  %430 = fmul float %409, %411
>  %431 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %432 = load <16 x i8>, <16 x i8> addrspace(2)* %431, align 16, !invariant.load !0
>  %433 = call float @llvm.SI.load.const(<16 x i8> %432, i32 188)
>  %434 = fmul float %430, %433
>  %435 = call float @llvm.AMDGPU.clamp.(float %434, float 0.000000e+00, float 1.000000e+00)
>  %436 = fsub float 1.000000e+00, %435
>  %437 = call float @llvm.SI.load.const(<16 x i8> %432, i32 192)
>  %438 = fmul float %437, %436
>  %439 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %440 = load <16 x i8>, <16 x i8> addrspace(2)* %439, align 16, !invariant.load !0
>  %441 = call float @llvm.SI.load.const(<16 x i8> %440, i32 196)
>  %442 = fmul float %441, %436
>  %443 = call float @llvm.SI.load.const(<16 x i8> %440, i32 200)
>  %444 = fmul float %443, %436
>  %445 = fmul float %423, %423
>  %446 = call float @llvm.AMDGPU.clamp.(float %445, float 0.000000e+00, float 1.000000e+00)
>  %447 = fsub float 1.000000e+00, %411
>  %448 = fmul float %446, %447
>  %449 = fadd float %411, %448
>  %450 = fmul float %438, %449
>  %451 = fmul float %442, %449
>  %452 = fmul float %444, %449
>  %453 = fmul float %450, %78
>  %454 = fmul float %451, %78
>  %455 = fmul float %452, %78
>  %456 = fmul float %429, %453
>  %457 = fadd float %456, %387
>  %458 = fmul float %429, %454
>  %459 = fadd float %458, %389
>  %460 = fmul float %429, %455
>  %461 = fadd float %460, %391
>  %462 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %463 = load <16 x i8>, <16 x i8> addrspace(2)* %462, align 16, !invariant.load !0
>  %464 = call float @llvm.SI.load.const(<16 x i8> %463, i32 208)
>  %465 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %466 = fsub float %464, %465
>  %467 = call float @llvm.SI.load.const(<16 x i8> %463, i32 212)
>  %468 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %469 = fsub float %467, %468
>  %470 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %471 = load <16 x i8>, <16 x i8> addrspace(2)* %470, align 16, !invariant.load !0
>  %472 = call float @llvm.SI.load.const(<16 x i8> %471, i32 216)
>  %473 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %474 = fsub float %472, %473
>  %475 = fmul float %466, %466
>  %476 = fmul float %469, %469
>  %477 = fadd float %476, %475
>  %478 = fmul float %474, %474
>  %479 = fadd float %477, %478
>  %480 = call float @llvm.sqrt.f32(float %479)
>  %481 = fdiv float 1.000000e+00, %480, !fpmath !1
>  %482 = fmul float %466, %481
>  %483 = fmul float %469, %481
>  %484 = fmul float %474, %481
>  %485 = fmul float %482, %184
>  %486 = fmul float %483, %186
>  %487 = fadd float %486, %485
>  %488 = fmul float %484, %188
>  %489 = fadd float %487, %488
>  %490 = call float @llvm.AMDGPU.clamp.(float %489, float 0.000000e+00, float 1.000000e+00)
>  %491 = fsub float %207, %490
>  %492 = call float @llvm.AMDGPU.clamp.(float %491, float 0.000000e+00, float 1.000000e+00)
>  %493 = fmul float %492, %492
>  %494 = fmul float %482, %121
>  %495 = fmul float %483, %123
>  %496 = fadd float %495, %494
>  %497 = fmul float %484, %125
>  %498 = fadd float %496, %497
>  %499 = call float @llvm.AMDGPU.clamp.(float %498, float 0.000000e+00, float 1.000000e+00)
>  %500 = fmul float %479, %481
>  %501 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %502 = load <16 x i8>, <16 x i8> addrspace(2)* %501, align 16, !invariant.load !0
>  %503 = call float @llvm.SI.load.const(<16 x i8> %502, i32 220)
>  %504 = fmul float %500, %503
>  %505 = call float @llvm.AMDGPU.clamp.(float %504, float 0.000000e+00, float 1.000000e+00)
>  %506 = fsub float 1.000000e+00, %505
>  %507 = call float @llvm.SI.load.const(<16 x i8> %502, i32 224)
>  %508 = fmul float %507, %506
>  %509 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %510 = load <16 x i8>, <16 x i8> addrspace(2)* %509, align 16, !invariant.load !0
>  %511 = call float @llvm.SI.load.const(<16 x i8> %510, i32 228)
>  %512 = fmul float %511, %506
>  %513 = call float @llvm.SI.load.const(<16 x i8> %510, i32 232)
>  %514 = fmul float %513, %506
>  %515 = fmul float %493, %493
>  %516 = call float @llvm.AMDGPU.clamp.(float %515, float 0.000000e+00, float 1.000000e+00)
>  %517 = fsub float 1.000000e+00, %481
>  %518 = fmul float %516, %517
>  %519 = fadd float %481, %518
>  %520 = fmul float %508, %519
>  %521 = fmul float %512, %519
>  %522 = fmul float %514, %519
>  %523 = fmul float %520, %78
>  %524 = fmul float %521, %78
>  %525 = fmul float %522, %78
>  %526 = fmul float %499, %523
>  %527 = fadd float %526, %457
>  %528 = fmul float %499, %524
>  %529 = fadd float %528, %459
>  %530 = fmul float %499, %525
>  %531 = fadd float %530, %461
>  %532 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %533 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %534 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %535 = load <8 x i32>, <8 x i32> addrspace(2)* %534, align 32, !invariant.load !0
>  %536 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %537 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %536, i64 0, i64 15, !amdgpu.uniform !0
>  %538 = load <4 x i32>, <4 x i32> addrspace(2)* %537, align 16, !invariant.load !0
>  %539 = extractelement <8 x i32> %535, i32 7
>  %540 = extractelement <4 x i32> %538, i32 0
>  %541 = and i32 %540, %539
>  %542 = insertelement <4 x i32> %538, i32 %541, i32 0
>  %543 = bitcast float %532 to i32
>  %544 = bitcast float %533 to i32
>  %545 = insertelement <2 x i32> undef, i32 %543, i32 0
>  %546 = insertelement <2 x i32> %545, i32 %544, i32 1
>  %547 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %546, <8 x i32> %535, <4 x i32> %542, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %548 = extractelement <4 x float> %547, i32 0
>  %549 = extractelement <4 x float> %547, i32 1
>  %550 = extractelement <4 x float> %547, i32 2
>  %551 = fmul float %49, %121
>  %552 = fmul float %50, %123
>  %553 = fadd float %552, %551
>  %554 = fmul float %51, %125
>  %555 = fadd float %553, %554
>  %556 = call float @llvm.AMDGPU.clamp.(float %555, float 0.000000e+00, float 1.000000e+00)
>  %557 = fsub float 1.000000e+00, %556
>  %558 = call float @llvm.pow.f32(float %557, float 5.000000e+00)
>  %559 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %560 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %561 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %562 = fmul float %558, %559
>  %563 = fmul float %558, %560
>  %564 = fmul float %558, %561
>  %565 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %566 = load <8 x i32>, <8 x i32> addrspace(2)* %565, align 32, !invariant.load !0
>  %567 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %568 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %567, i64 0, i64 11, !amdgpu.uniform !0
>  %569 = load <4 x i32>, <4 x i32> addrspace(2)* %568, align 16, !invariant.load !0
>  %570 = extractelement <8 x i32> %566, i32 7
>  %571 = extractelement <4 x i32> %569, i32 0
>  %572 = and i32 %571, %570
>  %573 = insertelement <4 x i32> %569, i32 %572, i32 0
>  %574 = call float @llvm.amdgcn.cubetc(float %349, float %351, float %353)
>  %575 = call float @llvm.amdgcn.cubesc(float %349, float %351, float %353)
>  %576 = call float @llvm.amdgcn.cubema(float %349, float %351, float %353)
>  %577 = call float @llvm.amdgcn.cubeid(float %349, float %351, float %353)
>  %578 = call float @llvm.fabs.f32(float %576)
>  %579 = fdiv float 1.000000e+00, %578, !fpmath !1
>  %580 = fmul float %574, %579
>  %581 = fadd float %580, 1.500000e+00
>  %582 = fmul float %575, %579
>  %583 = fadd float %582, 1.500000e+00
>  %584 = bitcast float %583 to i32
>  %585 = bitcast float %581 to i32
>  %586 = bitcast float %577 to i32
>  %587 = bitcast float %355 to i32
>  %588 = insertelement <4 x i32> undef, i32 %584, i32 0
>  %589 = insertelement <4 x i32> %588, i32 %585, i32 1
>  %590 = insertelement <4 x i32> %589, i32 %586, i32 2
>  %591 = insertelement <4 x i32> %590, i32 %587, i32 3
>  %592 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %591, <8 x i32> %566, <4 x i32> %573, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %593 = extractelement <4 x float> %592, i32 0
>  %594 = extractelement <4 x float> %592, i32 1
>  %595 = extractelement <4 x float> %592, i32 2
>  %596 = fmul float %562, %593
>  %597 = fmul float %563, %594
>  %598 = fmul float %564, %595
>  %599 = fmul float %596, %227
>  %600 = fmul float %597, %227
>  %601 = fmul float %598, %227
>  %602 = fmul float %527, %548
>  %603 = fadd float %602, %599
>  %604 = fmul float %529, %549
>  %605 = fadd float %604, %600
>  %606 = fmul float %531, %550
>  %607 = fadd float %606, %601
>  %608 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %609 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %610 = load <16 x i8>, <16 x i8> addrspace(2)* %609, align 16, !invariant.load !0
>  %611 = call float @llvm.SI.load.const(<16 x i8> %610, i32 12)
>  %612 = fsub float %608, %611
>  %613 = call float @llvm.maxnum.f32(float %612, float 0.000000e+00)
>  %614 = call float @llvm.SI.load.const(<16 x i8> %610, i32 28)
>  %615 = call float @llvm.SI.load.const(<16 x i8> %610, i32 12)
>  %616 = fsub float %614, %615
>  %617 = fadd float %616, 0x3F50624DE0000000
>  %618 = fdiv float 1.000000e+00, %617, !fpmath !1
>  %619 = fmul float %613, %618
>  %620 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %621 = load <16 x i8>, <16 x i8> addrspace(2)* %620, align 16, !invariant.load !0
>  %622 = call float @llvm.SI.load.const(<16 x i8> %621, i32 28)
>  %623 = call float @llvm.floor.f32(float %622)
>  %624 = fsub float %622, %623
>  %625 = fmul float %624, 8.000000e+00
>  %626 = call float @llvm.pow.f32(float %619, float %625)
>  %627 = call float @llvm.AMDGPU.clamp.(float %626, float 0.000000e+00, float 1.000000e+00)
>  %628 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %629 = fmul float %628, %627
>  %630 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %631 = load <16 x i8>, <16 x i8> addrspace(2)* %630, align 16, !invariant.load !0
>  %632 = call float @llvm.SI.load.const(<16 x i8> %631, i32 32)
>  %633 = fsub float 1.000000e+00, %629
>  %634 = fmul float %603, %629
>  %635 = fmul float %632, %633
>  %636 = fadd float %634, %635
>  %637 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %638 = load <16 x i8>, <16 x i8> addrspace(2)* %637, align 16, !invariant.load !0
>  %639 = call float @llvm.SI.load.const(<16 x i8> %638, i32 36)
>  %640 = fsub float 1.000000e+00, %629
>  %641 = fmul float %605, %629
>  %642 = fmul float %639, %640
>  %643 = fadd float %641, %642
>  %644 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %645 = load <16 x i8>, <16 x i8> addrspace(2)* %644, align 16, !invariant.load !0
>  %646 = call float @llvm.SI.load.const(<16 x i8> %645, i32 40)
>  %647 = fsub float 1.000000e+00, %629
>  %648 = fmul float %607, %629
>  %649 = fmul float %646, %647
>  %650 = fadd float %648, %649
>  %651 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %652 = bitcast float %5 to i32
>  %653 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %652, 10
>  %654 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %653, float %636, 11
>  %655 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %654, float %643, 12
>  %656 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %655, float %650, 13
>  %657 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %656, float %651, 14
>  %658 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %657, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %658
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x3                     ; C2040103
>	s_buffer_load_dword s10, s[0:3], 0x7                    ; C2050107
>	s_buffer_load_dword s13, s[0:3], 0xb                    ; C206810B
>	s_buffer_load_dword s18, s[0:3], 0xf                    ; C209010F
>	s_buffer_load_dword s17, s[0:3], 0x17                   ; C2088117
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s22, s[0:3], 0x13                   ; C20B0113
>	s_buffer_load_dword s9, s[0:3], 0x4                     ; C2048104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s14, s[0:3], 0xc                    ; C207010C
>	s_buffer_load_dword s15, s[0:3], 0xd                    ; C207810D
>	s_buffer_load_dword s16, s[0:3], 0xe                    ; C208010E
>	s_buffer_load_dword s19, s[0:3], 0x10                   ; C2098110
>	s_buffer_load_dword s20, s[0:3], 0x11                   ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                   ; C20A8112
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_sub_f32_e64 v7, 1.0, s22                              ; D2080007 00002CF2
>	v_mul_f32_e32 v0, s8, v9                                ; 10001208
>	v_mac_f32_e32 v0, s10, v10                              ; 3E00140A
>	v_mac_f32_e32 v0, s13, v11                              ; 3E00160D
>	v_mac_f32_e32 v0, s18, v12                              ; 3E001812
>	v_mul_f32_e32 v1, s17, v0                               ; 10020011
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	v_mad_f32 v8, 2.0, v13, -1.0                            ; D2820008 03CE1AF4
>	v_mad_f32 v13, 2.0, v14, -1.0                           ; D282000D 03CE1CF4
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 33, 0, 0, 0, v16, v17, v18, v19                 ; F800021F 13121110
>	v_mad_f32 v14, 2.0, v15, -1.0                           ; D282000E 03CE1EF4
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v17, 0, v13, v8                               ; D2820011 04221A80
>	v_mad_f32 v18, 0, v8, v13                               ; D2820012 04361080
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v19, 0, v4, v3                                ; D2820013 040E0880
>	v_mac_f32_e32 v17, 0, v14                               ; 3E221C80
>	v_mac_f32_e32 v18, 0, v14                               ; 3E241C80
>	v_mac_f32_e32 v14, 0, v13                               ; 3E1C1A80
>	v_mad_f32 v13, 0, v3, v4                                ; D282000D 04120680
>	v_mac_f32_e32 v19, 0, v5                                ; 3E260A80
>	v_mac_f32_e32 v13, 0, v5                                ; 3E1A0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mul_f32_e32 v4, s6, v9                                ; 10081206
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s8, v10                               ; 3E081408
>	v_mac_f32_e32 v4, s0, v11                               ; 3E081600
>	v_mov_b32_e32 v1, s19                                   ; 7E020213
>	v_mac_f32_e32 v4, s16, v12                              ; 3E081810
>	v_mac_f32_e32 v1, s20, v4                               ; 3E020814
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v3, v19, v18                              ; 10062513
>	v_mul_legacy_f32_e32 v1, s21, v1                        ; 0E020215
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_mul_f32_e32 v8, v13, v14                              ; 10101D0D
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v17, v13, -v3                             ; D2820003 840E1B11
>	v_mac_f32_e32 v7, s22, v1                               ; 3E0E0216
>	v_mul_f32_e32 v15, s4, v9                               ; 101E1204
>	v_mul_f32_e32 v16, s5, v9                               ; 10201205
>	v_mul_f32_e32 v9, v5, v17                               ; 10122305
>	v_mad_f32 v8, v18, v5, -v8                              ; D2820008 84220B12
>	v_mad_f32 v1, v6, v3, -v3                               ; D2820001 840E0706
>	v_mul_f32_e32 v3, v7, v7                                ; 10060F07
>	v_mad_f32 v9, v14, v19, -v9                             ; D2820009 8426270E
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	exp 15, 34, 0, 0, 0, v3, v0, v0, v0                     ; F800022F 00000003
>	v_mac_f32_e32 v15, s9, v10                              ; 3E1E1409
>	v_mac_f32_e32 v16, s7, v10                              ; 3E201407
>	v_mad_f32 v9, v6, v9, -v9                               ; D2820009 84261306
>	exp 15, 35, 0, 0, 0, v19, v13, v5, v8                   ; F800023F 08050D13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	v_mac_f32_e32 v16, s12, v11                             ; 3E20160C
>	exp 15, 36, 0, 0, 0, v9, v1, v17, v18                   ; F800024F 12110109
>	v_mac_f32_e32 v15, s14, v12                             ; 3E1E180E
>	v_mac_f32_e32 v16, s15, v12                             ; 3E20180F
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v15, v16, v4, v0                   ; F80008CF 0004100F
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 552 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 3, [m0]                          ; C8200F04
>	v_interp_p2_f32 v8, [v8], v5, 3, 3, [m0]                    ; C8210F05
>	v_interp_p1_f32 v11, v4, 0, 4, [m0]                         ; C82C1004
>	v_interp_p2_f32 v11, [v11], v5, 0, 4, [m0]                  ; C82D1005
>	v_interp_p1_f32 v12, v4, 1, 4, [m0]                         ; C8301104
>	v_interp_p2_f32 v12, [v12], v5, 1, 4, [m0]                  ; C8311105
>	v_interp_p1_f32 v0, v4, 2, 4, [m0]                          ; C8001204
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s11, s[0:3], 0x0                        ; C2058100
>	v_interp_p2_f32 v0, [v0], v5, 2, 4, [m0]                    ; C8011205
>	v_interp_p1_f32 v1, v4, 3, 4, [m0]                          ; C8041304
>	s_buffer_load_dword s12, s[0:3], 0x1                        ; C2060101
>	v_interp_p2_f32 v1, [v1], v5, 3, 4, [m0]                    ; C8051305
>	v_interp_p1_f32 v6, v4, 0, 5, [m0]                          ; C8181404
>	s_buffer_load_dword s13, s[0:3], 0x2                        ; C2068102
>	v_interp_p2_f32 v6, [v6], v5, 0, 5, [m0]                    ; C8191405
>	v_interp_p1_f32 v14, v2, 0, 0, [m0]                         ; C8380002
>	v_interp_p2_f32 v14, [v14], v3, 0, 0, [m0]                  ; C8390003
>	v_interp_p1_f32 v16, v2, 1, 0, [m0]                         ; C8400102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v15, s11, v14                                 ; 081E1C0B
>	v_interp_p2_f32 v16, [v16], v3, 1, 0, [m0]                  ; C8410103
>	v_interp_p1_f32 v18, v2, 2, 0, [m0]                         ; C8480202
>	v_interp_p2_f32 v18, [v18], v3, 2, 0, [m0]                  ; C8490203
>	v_sub_f32_e32 v17, s12, v16                                 ; 0822200C
>	v_mul_f32_e32 v7, v15, v15                                  ; 100E1F0F
>	v_sub_f32_e32 v19, s13, v18                                 ; 0826240D
>	v_mac_f32_e32 v7, v17, v17                                  ; 3E0E2311
>	v_mac_f32_e32 v7, v19, v19                                  ; 3E0E2713
>	v_rsq_f32_e32 v20, v7                                       ; 7E285D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v21, v20, v15                                 ; 102A1F14
>	v_mul_f32_e32 v22, v20, v17                                 ; 102C2314
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                       ; C090055C
>	v_mul_f32_e32 v23, v7, v0                                   ; 102E0107
>	v_mul_f32_e32 v24, v7, v1                                   ; 10300307
>	v_mul_f32_e32 v0, v23, v21                                  ; 10002B17
>	s_load_dwordx8 s[24:31], s[4:5], 0x50                       ; C0CC0550
>	v_mul_f32_e32 v25, v7, v6                                   ; 10320D07
>	v_mul_f32_e32 v26, v20, v19                                 ; 10342714
>	v_mac_f32_e32 v0, v24, v22                                  ; 3E002D18
>	v_mac_f32_e32 v0, v25, v26                                  ; 3E003519
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v27, v0, 0 clamp                              ; D206081B 00010100
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	image_sample v[9:10], v[0:1], s[24:31], s[32:35] dmask:0x6  ; F0800600 01060900
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                       ; C092054C
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	s_load_dwordx8 s[12:19], s[4:5], 0x60                       ; C0C60560
>	s_load_dwordx4 s[20:23], s[4:5], 0x6c                       ; C08A056C
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s40, s[0:3], 0x16                       ; C2140116
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s31                                     ; 87241F24
>	image_sample v[6:7], v[0:1], s[24:31], s[36:39] dmask:0xa   ; F0800A00 01260600
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v29, v6, v6                                   ; 063A0D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_interp_p1_f32 v30, v4, 0, 3, [m0]                         ; C8780C04
>	v_add_f32_e32 v28, v7, v7                                   ; 06380F07
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v29, v29, v6, -v6                                 ; D282001D 841A0D1D
>	v_interp_p2_f32 v30, [v30], v5, 0, 3, [m0]                  ; C8790C05
>	v_interp_p1_f32 v31, v4, 1, 3, [m0]                         ; C87C0D04
>	v_mac_f32_e32 v29, v7, v7                                   ; 3E3A0F07
>	v_interp_p2_f32 v31, [v31], v5, 1, 3, [m0]                  ; C87D0D05
>	v_interp_p1_f32 v32, v4, 2, 3, [m0]                         ; C8800E04
>	v_add_f32_e64 v4, v29, 0 clamp                              ; D2060804 0001011D
>	v_mad_f32 v33, v28, v30, -v30                               ; D2820021 847A3D1C
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mad_f32 v34, v28, v31, -v31                               ; D2820022 847E3F1C
>	v_interp_p2_f32 v32, [v32], v5, 2, 3, [m0]                  ; C8810E05
>	v_mac_f32_e32 v33, v6, v8                                   ; 3E421106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mad_f32 v28, v28, v32, -v32                               ; D282001C 8482411C
>	v_mac_f32_e32 v34, v6, v11                                  ; 3E441706
>	v_mac_f32_e32 v33, v4, v23                                  ; 3E422F04
>	v_mac_f32_e32 v28, v6, v12                                  ; 3E381906
>	v_mac_f32_e32 v34, v4, v24                                  ; 3E443104
>	v_mul_f32_e32 v21, v21, v33                                 ; 102A4315
>	v_mac_f32_e32 v28, v4, v25                                  ; 3E383304
>	v_mac_f32_e32 v21, v22, v34                                 ; 3E2A4516
>	v_mac_f32_e32 v21, v26, v28                                 ; 3E2A391A
>	v_mul_f32_e32 v4, v33, v21                                  ; 10082B21
>	v_mac_f32_e32 v4, v33, v21                                  ; 3E082B21
>	v_mad_f32 v15, -v15, v20, v4                                ; D282000F 2412290F
>	v_mul_f32_e32 v4, v34, v21                                  ; 10082B22
>	v_mac_f32_e32 v4, v34, v21                                  ; 3E082B22
>	v_mad_f32 v17, -v17, v20, v4                                ; D2820011 24122911
>	v_mul_f32_e32 v4, v28, v21                                  ; 10082B1C
>	v_mac_f32_e32 v4, v28, v21                                  ; 3E082B1C
>	v_mad_f32 v19, -v19, v20, v4                                ; D2820013 24122913
>	v_interp_p1_f32 v4, v2, 2, 1, [m0]                          ; C8100602
>	v_interp_p2_f32 v4, [v4], v3, 2, 1, [m0]                    ; C8110603
>	v_interp_p1_f32 v5, v2, 3, 1, [m0]                          ; C8140702
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_interp_p2_f32 v5, [v5], v3, 3, 1, [m0]                    ; C8150703
>	image_sample v[4:7], v[4:5], s[12:19], s[20:23] dmask:0xf   ; F0800F00 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v6, -0.5, v6                                  ; 060C0CF1
>	v_add_f32_e32 v6, v6, v6                                    ; 060C0D06
>	v_add_f32_e32 v5, -0.5, v5                                  ; 060A0AF1
>	v_add_f32_e32 v5, v5, v5                                    ; 060A0B05
>	v_mul_f32_e32 v22, v6, v31                                  ; 102C3F06
>	v_mul_f32_e32 v20, v6, v30                                  ; 10283D06
>	v_mac_f32_e32 v22, v5, v11                                  ; 3E2C1705
>	v_mul_f32_e32 v11, v6, v32                                  ; 10164106
>	v_mac_f32_e32 v11, v5, v12                                  ; 3E161905
>	v_mac_f32_e32 v20, v5, v8                                   ; 3E281105
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	v_mac_f32_e32 v5, v6, v6                                    ; 3E0A0D06
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_sub_f32_e32 v5, 1.0, v5                                   ; 080A0AF2
>	v_sqrt_f32_e32 v5, v5                                       ; 7E0A6705
>	v_mac_f32_e32 v20, v5, v23                                  ; 3E282F05
>	v_mac_f32_e32 v22, v5, v24                                  ; 3E2C3105
>	v_mac_f32_e32 v11, v5, v25                                  ; 3E163305
>	v_mul_f32_e32 v5, v20, v15                                  ; 100A1F14
>	s_buffer_load_dword s12, s[0:3], 0x10                       ; C2060110
>	s_buffer_load_dword s13, s[0:3], 0x11                       ; C2068111
>	s_buffer_load_dword s14, s[0:3], 0x12                       ; C2070112
>	v_mac_f32_e32 v5, v22, v17                                  ; 3E0A2316
>	v_mac_f32_e32 v5, v11, v19                                  ; 3E0A270B
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v26, v9, v4                                   ; 10340909
>	v_mov_b32_e32 v4, 0x403b800a                                ; 7E0802FF 403B800A
>	v_mad_f32 v8, 2.0, v7, -v5                                  ; D2820008 84160EF4
>	v_mad_f32 v5, v4, v23, v14                                  ; D2820005 043A2F04
>	s_buffer_load_dword s15, s[0:3], 0x14                       ; C2078114
>	v_add_f32_e32 v12, v7, v7                                   ; 06180F07
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s12, v5                                   ; 100C0A0C
>	v_mul_f32_e32 v7, s13, v5                                   ; 100E0A0D
>	v_mul_f32_e32 v29, s14, v5                                  ; 103A0A0E
>	v_mad_f32 v5, v4, v24, v16                                  ; D2820005 04423104
>	s_buffer_load_dword s41, s[0:3], 0x18                       ; C2148118
>	s_buffer_load_dword s42, s[0:3], 0x19                       ; C2150119
>	s_buffer_load_dword s43, s[0:3], 0x1a                       ; C215811A
>	v_mac_f32_e32 v7, s11, v5                                   ; 3E0E0A0B
>	s_buffer_load_dword s11, s[0:3], 0x1c                       ; C205811C
>	s_buffer_load_dword s12, s[0:3], 0x1d                       ; C206011D
>	s_buffer_load_dword s13, s[0:3], 0x1e                       ; C206811E
>	v_mad_f32 v4, v4, v25, v18                                  ; D2820004 044A3304
>	v_mac_f32_e32 v6, s15, v5                                   ; 3E0C0A0F
>	v_mac_f32_e32 v29, s40, v5                                  ; 3E3A0A28
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v6, s41, v4                                   ; 3E0C0829
>	v_mac_f32_e32 v7, s42, v4                                   ; 3E0E082A
>	v_mac_f32_e32 v29, s43, v4                                  ; 3E3A082B
>	v_add_f32_e32 v5, s11, v6                                   ; 060A0C0B
>	v_add_f32_e32 v6, s12, v7                                   ; 060C0E0C
>	v_add_f32_e32 v4, s13, v29                                  ; 06083A0D
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                        ; C0C60500
>	s_load_dwordx4 s[20:23], s[4:5], 0xc                        ; C08A050C
>	v_sub_f32_e32 v30, 1.0, v10                                 ; 083C14F2
>	v_mac_f32_e32 v30, 0x41a00000, v10                          ; 3E3C14FF 41A00000
>	s_buffer_load_dword s9, s[0:3], 0x4                         ; C2048104
>	s_buffer_load_dword s8, s[0:3], 0x5                         ; C2040105
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	image_sample_c v29, v[4:7], s[12:19], s[20:23] dmask:0x1    ; F0A00100 00A31D04
>	v_cubema_f32 v4, v33, v34, v28                              ; D28E0004 04724521
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_cubetc_f32 v6, v33, v34, v28                              ; D28C0006 04724521
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v7, v33, v34, v28                              ; D28A0007 04724521
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v7, v4                                    ; D2820005 04120F05
>	v_add_f32_e64 v7, v8, 0 clamp                               ; D2060807 00010108
>	v_log_f32_e32 v7, v7                                        ; 7E0E4F07
>	s_buffer_load_dword s11, s[0:3], 0x6                        ; C2058106
>	s_load_dwordx8 s[36:43], s[4:5], 0x10                       ; C0D20510
>	s_load_dwordx4 s[44:47], s[4:5], 0x1c                       ; C096051C
>	v_mul_legacy_f32_e32 v7, 0x40400000, v7                     ; 0E0E0EFF 40400000
>	v_exp_f32_e32 v7, v7                                        ; 7E0E4B07
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mov_b32_e32 v8, v7                                        ; 7E100307
>	v_mac_f32_e32 v8, 0xbe99999a, v10                           ; 3E1014FF BE99999A
>	v_mul_f32_e32 v8, v30, v8                                   ; 1010111E
>	v_add_f32_e64 v8, v8, 0 clamp                               ; D2060808 00010108
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	v_mul_f32_e32 v8, v23, v15                                  ; 10101F17
>	v_mad_f32 v8, -v17, v24, -v8                                ; D2820008 A4223111
>	v_mad_f32 v8, -v19, v25, v8                                 ; D2820008 24223313
>	v_add_f32_e32 v8, 1.0, v8                                   ; 061010F2
>	v_subrev_f32_e32 v8, v27, v8                                ; 0A10111B
>	v_add_f32_e64 v8, v8, 0 clamp                               ; D2060808 00010108
>	v_sub_f32_e32 v23, 1.0, v8                                  ; 082E10F2
>	v_mad_f32 v8, -v8, v23, v23                                 ; D2820008 245E2F08
>	v_mul_f32_e32 v23, v8, v7                                   ; 102E0F08
>	v_mul_f32_e32 v7, s9, v20                                   ; 100E2809
>	v_mad_f32 v7, v22, -s8, -v7                                 ; D2820007 C41C1116
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                       ; C08C053C
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v7, -v11, s11, v7                                 ; D2820007 241C170B
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mov_b32_e32 v24, 0x3f8ccccd                               ; 7E3002FF 3F8CCCCD
>	v_mad_f32 v7, v12, v24, -v7                                 ; D2820007 841E310C
>	v_add_f32_e64 v25, v7, 0 clamp                              ; D2060819 00010107
>	s_and_b32 s44, s44, s43                                     ; 872C2B2C
>	v_cubeid_f32 v7, v33, v34, v28                              ; D2880007 04724521
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	image_sample v[5:8], v[5:8], s[36:43], s[44:47] dmask:0xf   ; F0800F00 01690505
>	v_mul_f32_e32 v25, v25, v25                                 ; 10323319
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v8, v5                                    ; 100A0B08
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	v_mul_f32_e32 v8, v29, v29                                  ; 10103B1D
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v27, s4, v8                                   ; 10361004
>	v_mul_f32_e32 v29, s5, v8                                   ; 103A1005
>	v_add_f32_e64 v25, v25, 0 clamp                             ; D2060819 00010119
>	v_mul_f32_e32 v8, s6, v8                                    ; 10101006
>	v_mul_f32_e32 v27, v25, v27                                 ; 10363719
>	v_mul_f32_e32 v29, v25, v29                                 ; 103A3B19
>	v_mul_f32_e32 v8, v25, v8                                   ; 10101119
>	v_mul_f32_e32 v25, s9, v33                                  ; 10324209
>	s_buffer_load_dword s7, s[0:3], 0x2c                        ; C203812C
>	v_mad_f32 v25, v34, -s8, -v25                               ; D2820019 C4641122
>	s_buffer_load_dword s36, s[0:3], 0x2d                       ; C212012D
>	v_mad_f32 v25, -v28, s11, v25                               ; D2820019 2464171C
>	s_buffer_load_dword s4, s[0:3], 0x2e                        ; C202012E
>	v_add_f32_e64 v25, v25, 0 clamp                             ; D2060819 00010119
>	v_mul_f32_e32 v27, v9, v27                                  ; 10363709
>	v_mul_f32_e32 v29, v9, v29                                  ; 103A3B09
>	v_mul_f32_e32 v8, v9, v8                                    ; 10101109
>	v_mul_f32_e32 v27, v27, v25                                 ; 1036331B
>	v_mul_f32_e32 v29, v29, v25                                 ; 103A331D
>	v_mul_f32_e32 v25, v8, v25                                  ; 10323308
>	v_mul_f32_e32 v8, 4.0, v26                                  ; 101034F6
>	v_mac_f32_e32 v27, v8, v5                                   ; 3E360B08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s7, v14                                   ; 080A1C07
>	v_mac_f32_e32 v29, v8, v6                                   ; 3E3A0D08
>	v_mac_f32_e32 v25, v8, v7                                   ; 3E320F08
>	v_sub_f32_e32 v6, s36, v16                                  ; 080C2024
>	v_mul_f32_e32 v7, v5, v5                                    ; 100E0B05
>	v_sub_f32_e32 v8, s4, v18                                   ; 08102404
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_mac_f32_e32 v7, v8, v8                                    ; 3E0E1108
>	v_rsq_f32_e32 v26, v7                                       ; 7E345D07
>	s_buffer_load_dword s5, s[0:3], 0x2f                        ; C202812F
>	s_buffer_load_dword s6, s[0:3], 0x30                        ; C2030130
>	s_buffer_load_dword s7, s[0:3], 0x31                        ; C2038131
>	v_mul_f32_e32 v5, v26, v5                                   ; 100A0B1A
>	v_mul_f32_e32 v30, v20, v5                                  ; 103C0B14
>	v_mul_f32_e32 v6, v26, v6                                   ; 100C0D1A
>	v_mul_f32_e32 v8, v26, v8                                   ; 1010111A
>	v_mac_f32_e32 v30, v22, v6                                  ; 3E3C0D16
>	v_mac_f32_e32 v30, v11, v8                                  ; 3E3C110B
>	v_add_f32_e64 v30, v30, 0 clamp                             ; D206081E 0001011E
>	v_mad_f32 v30, v12, v24, -v30                               ; D282001E 847A310C
>	v_add_f32_e64 v30, v30, 0 clamp                             ; D206081E 0001011E
>	s_buffer_load_dword s8, s[0:3], 0x32                        ; C2040132
>	v_mul_f32_e32 v30, v30, v30                                 ; 103C3D1E
>	v_mul_f32_e32 v5, v33, v5                                   ; 100A0B21
>	v_mul_f32_e32 v7, v26, v7                                   ; 100E0F1A
>	v_mac_f32_e32 v5, v34, v6                                   ; 3E0A0D22
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s5, v7                                    ; 100C0E05
>	v_mul_f32_e32 v30, v30, v30                                 ; 103C3D1E
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_add_f32_e64 v30, v30, 0 clamp                             ; D206081E 0001011E
>	v_sub_f32_e32 v31, 1.0, v26                                 ; 083E34F2
>	s_buffer_load_dword s4, s[0:3], 0x34                        ; C2020134
>	v_mad_f32 v7, -v6, s6, s6                                   ; D2820007 20180D06
>	v_mac_f32_e32 v26, v31, v30                                 ; 3E343D1F
>	s_buffer_load_dword s5, s[0:3], 0x35                        ; C2028135
>	v_mac_f32_e32 v5, v28, v8                                   ; 3E0A111C
>	v_mad_f32 v8, -v6, s7, s7                                   ; D2820008 201C0F06
>	v_mad_f32 v6, -v6, s8, s8                                   ; D2820006 20201106
>	v_mul_f32_e32 v7, v26, v7                                   ; 100E0F1A
>	s_buffer_load_dword s6, s[0:3], 0x36                        ; C2030136
>	v_mul_f32_e32 v6, v26, v6                                   ; 100C0D1A
>	v_mul_f32_e32 v8, v26, v8                                   ; 1010111A
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mac_f32_e32 v27, v7, v5                                   ; 3E360B07
>	v_mul_f32_e32 v7, v9, v8                                    ; 100E1109
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_mac_f32_e32 v29, v7, v5                                   ; 3E3A0B07
>	v_mac_f32_e32 v25, v6, v5                                   ; 3E320B06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s4, v14                                   ; 080A1C04
>	v_sub_f32_e32 v7, s5, v16                                   ; 080E2005
>	v_mul_f32_e32 v8, v5, v5                                    ; 10100B05
>	v_sub_f32_e32 v6, s6, v18                                   ; 080C2406
>	v_mac_f32_e32 v8, v7, v7                                    ; 3E100F07
>	v_mac_f32_e32 v8, v6, v6                                    ; 3E100D06
>	v_rsq_f32_e32 v14, v8                                       ; 7E1C5D08
>	s_buffer_load_dword s7, s[0:3], 0x37                        ; C2038137
>	s_buffer_load_dword s8, s[0:3], 0x38                        ; C2040138
>	s_buffer_load_dword s4, s[0:3], 0x39                        ; C2020139
>	v_mul_f32_e32 v5, v14, v5                                   ; 100A0B0E
>	v_mul_f32_e32 v18, v20, v5                                  ; 10240B14
>	v_mul_f32_e32 v7, v14, v7                                   ; 100E0F0E
>	v_mac_f32_e32 v18, v22, v7                                  ; 3E240F16
>	v_mul_f32_e32 v6, v14, v6                                   ; 100C0D0E
>	v_mac_f32_e32 v18, v11, v6                                  ; 3E240D0B
>	v_add_f32_e64 v11, v18, 0 clamp                             ; D206080B 00010112
>	v_mul_f32_e32 v5, v33, v5                                   ; 100A0B21
>	v_mac_f32_e32 v5, v34, v7                                   ; 3E0A0F22
>	v_mad_f32 v11, v12, v24, -v11                               ; D282000B 842E310C
>	v_mac_f32_e32 v5, v28, v6                                   ; 3E0A0D1C
>	v_add_f32_e64 v6, v11, 0 clamp                              ; D2060806 0001010B
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	v_mul_f32_e32 v7, v14, v8                                   ; 100E110E
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_sub_f32_e32 v8, 1.0, v14                                  ; 08101CF2
>	v_mac_f32_e32 v14, v8, v6                                   ; 3E1C0D08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s7, v7                                    ; 100C0E07
>	s_buffer_load_dword s5, s[0:3], 0x3a                        ; C202813A
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mad_f32 v7, -v6, s8, s8                                   ; D2820007 20201106
>	v_mad_f32 v8, -v6, s4, s4                                   ; D2820008 20100906
>	v_mul_f32_e32 v7, v14, v7                                   ; 100E0F0E
>	v_mul_f32_e32 v8, v14, v8                                   ; 1010110E
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v6, -v6, s5, s5                                   ; D2820006 20140B06
>	v_mac_f32_e32 v27, v7, v5                                   ; 3E360B07
>	v_mul_f32_e32 v7, v9, v8                                    ; 100E1109
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	v_mul_f32_e32 v6, v14, v6                                   ; 100C0D0E
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mac_f32_e32 v29, v7, v5                                   ; 3E3A0B07
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_cubema_f32 v12, v15, v17, v19                             ; D28E000C 044E230F
>	v_log_f32_e32 v14, v8                                       ; 7E1C4F08
>	s_and_b32 s24, s24, s35                                     ; 87182318
>	v_mac_f32_e32 v25, v6, v5                                   ; 3E320B06
>	v_cubeid_f32 v6, v15, v17, v19                              ; D2880006 044E230F
>	v_cubetc_f32 v5, v15, v17, v19                              ; D28C0005 044E230F
>	v_cubesc_f32 v11, v15, v17, v19                             ; D28A000B 044E230F
>	v_mad_f32 v7, -v10, v7, v7                                  ; D2820007 241E0F0A
>	v_max_f32_e32 v15, 0, v10                                   ; 201E1480
>	image_sample v[8:10], v[0:1], s[28:35], s[24:27] dmask:0x7  ; F0800700 00C70800
>	v_rcp_f32_e64 v1, |v12|                                     ; D3540101 0000010C
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v14                    ; 0E001CFF 40A00000
>	s_buffer_load_dword s5, s[0:3], 0x7                         ; C2028107
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_mac_f32_e32 v4, v1, v11                                   ; 3E081701
>	v_mul_f32_e32 v0, v15, v0                                   ; 1000010F
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v23, v0                                   ; 100A0117
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s5, v0                                    ; 08000005
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v16                                ; 0A0C2004
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s6, s[0:3], 0x8                         ; C2030108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s5                                      ; 7E0C4805
>	v_sub_f32_e32 v6, s5, v6                                    ; 080C0C05
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s7, s[0:3], 0x9                         ; C2038109
>	v_interp_p1_f32 v6, v2, 0, 2, [m0]                          ; C8180802
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 0, 2, [m0]                    ; C8190803
>	v_mul_f32_e32 v1, v23, v1                                   ; 10020317
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v23, v4                                   ; 10080917
>	v_mac_f32_e32 v1, v8, v27                                   ; 3E023708
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s6, s6                                   ; D2820000 20180D06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v29                                   ; 3E083B09
>	v_mad_f32 v1, -v6, s7, s7                                   ; D2820001 201C0F06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v25                                  ; 3E0A330A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2048 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..18]
>DCL TEMP[0..65], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.0000,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,     0.0010,     8.0000}
>IMM[5] INT32 {0, 4, 2, 1}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[1].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[5], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[1].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[4], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[6].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[6].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[6].xyzz
> 31: DP3 TEMP[7].x, TEMP[6].xyzz, TEMP[2].xyzz
> 32: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[6].xyzz
> 33: MAD TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz, -TEMP[2].xyzz
> 34: MOV TEMP[8].xy, IN[1].zwww
> 35: TEX TEMP[8], TEMP[8], SAMP[6], 2D
> 36: MOV TEMP[9], TEMP[8]
> 37: ADD TEMP[9].xyz, TEMP[8].zyyy, IMM[1].xxxx
> 38: MUL TEMP[9].xyz, TEMP[9].xyzz, IMM[0].xxxx
> 39: MUL TEMP[10].x, TEMP[8].wwww, IMM[0].xxxx
> 40: MOV TEMP[9].w, TEMP[10].xxxx
> 41: DP2 TEMP[11].x, TEMP[9].xyyy, TEMP[9].xyyy
> 42: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 43: ADD TEMP[11].x, IMM[0].wwww, -TEMP[11].xxxx
> 44: SQRT TEMP[11].x, TEMP[11].xxxx
> 45: MUL TEMP[12].xyz, IN[3].xyzz, TEMP[9].xxxx
> 46: MAD TEMP[12].xyz, TEMP[0].xyzz, TEMP[9].yyyy, TEMP[12].xyzz
> 47: MAD TEMP[11].xyz, TEMP[1].xyzz, TEMP[11].xxxx, TEMP[12].xyzz
> 48: MOV TEMP[9].xyz, TEMP[11].xyzx
> 49: DP3 TEMP[12].x, TEMP[7].xyzz, TEMP[11].xyzz
> 50: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 51: ADD TEMP[12].x, TEMP[10].xxxx, -TEMP[12].xxxx
> 52: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 53: POW TEMP[12].x, TEMP[12].xxxx, IMM[1].yyyy
> 54: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 55: MUL TEMP[13].x, IMM[1].zzzz, TEMP[4].zzzz
> 56: ADD TEMP[13].x, TEMP[12].xxxx, -TEMP[13].xxxx
> 57: LRP TEMP[14].x, TEMP[4].zzzz, IMM[1].wwww, IMM[0].wwww
> 58: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[14].xxxx
> 59: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 60: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[13].xxxx
> 61: MUL TEMP[10].x, TEMP[10].xxxx, IMM[2].xxxx
> 62: MOV TEMP[9].w, TEMP[10].xxxx
> 63: MUL TEMP[0].x, TEMP[8].xxxx, TEMP[4].yyyy
> 64: DP3 TEMP[7].x, -TEMP[7].xyzz, TEMP[1].xyzz
> 65: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 66: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 67: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 68: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 69: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 70: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 71: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 72: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 73: MUL TEMP[7].x, TEMP[12].xxxx, TEMP[7].xxxx
> 74: MOV TEMP[0].y, TEMP[7].xxxx
> 75: MOV TEMP[8].w, IMM[0].wwww
> 76: MAD TEMP[8].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 77: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 78: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 79: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 80: ADD TEMP[1], TEMP[1], CONST[7]
> 81: MAD TEMP[8].x, IMM[2].zzzz, TEMP[4].zzzz, IMM[0].xxxx
> 82: EX2 TEMP[8].x, TEMP[8].xxxx
> 83: MOV TEMP[12].xyz, -CONST[1].xyzx
> 84: ADD TEMP[13].xyz, TEMP[12].xyzz, TEMP[2].xyzz
> 85: MUL TEMP[13].xyz, TEMP[13].xyzz, IMM[2].wwww
> 86: DP3 TEMP[14].x, TEMP[13].xyzz, TEMP[13].xyzz
> 87: RSQ TEMP[14].x, TEMP[14].xxxx
> 88: MUL TEMP[13].xyz, TEMP[13].xyzz, TEMP[14].xxxx
> 89: DP3 TEMP[14].x, TEMP[12].xyzz, TEMP[6].xyzz
> 90: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 91: MOV TEMP[15].xy, TEMP[1].xyyy
> 92: MOV TEMP[15].w, IMM[0].wwww
> 93: MOV TEMP[15].z, TEMP[1].zzzz
> 94: TXP TEMP[1], TEMP[15], SAMP[0], SHADOW2D
> 95: MOV TEMP[15].x, TEMP[1].xxxx
> 96: DP3 TEMP[15].x, TEMP[12].xyzz, TEMP[11].xyzz
> 97: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 98: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[15].xxxx
> 99: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>100: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
>101: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
>102: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>103: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>104: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[10].xxxx
>105: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
>106: MUL TEMP[1].xyz, TEMP[14].xxxx, TEMP[1].xyzz
>107: MOV TEMP[10].xyz, TEMP[6].xyzz
>108: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
>109: MOV TEMP[15], TEMP[10]
>110: DP3 TEMP[15].x, TEMP[6].xyzz, TEMP[2].xyzz
>111: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[6].xyzz
>112: MAD TEMP[15].xyz, IMM[0].xxxx, TEMP[15].xyzz, -TEMP[2].xyzz
>113: ADD TEMP[16].x, IMM[0].wwww, -TEMP[4].zzzz
>114: MUL TEMP[16].x, TEMP[16].xxxx, IMM[3].xxxx
>115: MOV TEMP[15].w, TEMP[16].xxxx
>116: DP3 TEMP[17].x, TEMP[2].xyzz, TEMP[6].xyzz
>117: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>118: ADD TEMP[17].x, IMM[0].wwww, -TEMP[17].xxxx
>119: POW TEMP[17].x, TEMP[17].xxxx, IMM[3].yyyy
>120: MAX TEMP[4].xyz, TEMP[4].zzzz, IMM[3].zzzz
>121: MUL TEMP[4].xyz, TEMP[17].xxxx, TEMP[4].xyzz
>122: MOV TEMP[15].xyz, TEMP[15].xyzz
>123: MOV TEMP[15].w, TEMP[16].xxxx
>124: TXL TEMP[15], TEMP[15], SAMP[2], CUBE
>125: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[15].xyzz
>126: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
>127: MUL TEMP[15].x, IMM[3].wwww, TEMP[0].xxxx
>128: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[15].xxxx, TEMP[1].xyzz
>129: DP3 TEMP[12].x, TEMP[12].xyzz, TEMP[13].xyzz
>130: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>131: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
>132: POW TEMP[12].x, TEMP[12].xxxx, IMM[3].yyyy
>133: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>134: ADD TEMP[12].x, TEMP[8].xxxx, IMM[0].xxxx
>135: MUL TEMP[12].x, TEMP[12].xxxx, IMM[4].xxxx
>136: MUL TEMP[15].x, -TEMP[8].xxxx, IMM[2].wwww
>137: EX2 TEMP[15].x, TEMP[15].xxxx
>138: ADD TEMP[15].x, IMM[0].xxxx, -TEMP[15].xxxx
>139: RCP TEMP[15].x, TEMP[15].xxxx
>140: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[15].xxxx
>141: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>142: DP3 TEMP[12].x, TEMP[6].xyzz, TEMP[13].xyzz
>143: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>144: POW TEMP[12].x, TEMP[12].xxxx, TEMP[8].xxxx
>145: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>146: DP3 TEMP[12].x, TEMP[2].xyzz, TEMP[6].xyzz
>147: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>148: MAX TEMP[12].x, TEMP[14].xxxx, TEMP[12].xxxx
>149: ADD TEMP[12].x, TEMP[12].xxxx, IMM[4].yyyy
>150: RCP TEMP[12].x, TEMP[12].xxxx
>151: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx, TEMP[4].xyzz
>152: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>153: MOV TEMP[7].x, IMM[5].xxxx
>154: BGNLOOP :0
>155:   ISGE TEMP[12].x, TEMP[7].xxxx, IMM[5].yyyy
>156:   UIF TEMP[12].xxxx :0
>157:     BRK
>158:   ENDIF
>159:   UMUL TEMP[13].x, TEMP[7].xxxx, IMM[5].zzzz
>160:   UARL ADDR[0].x, TEMP[13].xxxx
>161:   UARL ADDR[0].x, TEMP[13].xxxx
>162:   ADD TEMP[14].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>163:   DP3 TEMP[15].x, TEMP[14].xyzz, TEMP[14].xyzz
>164:   RSQ TEMP[16].x, TEMP[15].xxxx
>165:   MUL TEMP[17].xyz, TEMP[14].xyzz, TEMP[16].xxxx
>166:   ADD TEMP[18].xyz, TEMP[17].xyzz, TEMP[2].xyzz
>167:   MUL TEMP[19].xyz, TEMP[18].xyzz, IMM[2].wwww
>168:   DP3 TEMP[20].x, TEMP[19].xyzz, TEMP[19].xyzz
>169:   RSQ TEMP[21].x, TEMP[20].xxxx
>170:   MUL TEMP[22].xyz, TEMP[19].xyzz, TEMP[21].xxxx
>171:   DP3 TEMP[23].x, TEMP[17].xyzz, TEMP[6].xyzz
>172:   MOV_SAT TEMP[24].x, TEMP[23].xxxx
>173:   DP3 TEMP[25].x, TEMP[17].xyzz, TEMP[11].xyzz
>174:   MOV_SAT TEMP[26].x, TEMP[25].xxxx
>175:   ADD TEMP[27].x, TEMP[9].wwww, -TEMP[26].xxxx
>176:   MOV_SAT TEMP[28].x, TEMP[27].xxxx
>177:   MUL TEMP[29].x, TEMP[28].xxxx, TEMP[28].xxxx
>178:   UMAD TEMP[30].x, TEMP[7].xxxx, IMM[5].zzzz, IMM[5].wwww
>179:   MUL TEMP[31].x, TEMP[15].xxxx, TEMP[16].xxxx
>180:   UMUL TEMP[32].x, TEMP[7].xxxx, IMM[5].zzzz
>181:   UARL ADDR[0].x, TEMP[32].xxxx
>182:   MUL TEMP[33].x, TEMP[31].xxxx, CONST[ADDR[0].x+11].wwww
>183:   MOV_SAT TEMP[34].x, TEMP[33].xxxx
>184:   ADD TEMP[35].x, IMM[0].wwww, -TEMP[34].xxxx
>185:   UARL ADDR[0].x, TEMP[30].xxxx
>186:   MUL TEMP[36].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[35].xxxx
>187:   MUL TEMP[37].x, TEMP[29].xxxx, TEMP[29].xxxx
>188:   MOV_SAT TEMP[38].x, TEMP[37].xxxx
>189:   LRP TEMP[39].x, TEMP[16].xxxx, IMM[0].wwww, TEMP[38].xxxx
>190:   MUL TEMP[40].xyz, TEMP[36].xyzz, TEMP[39].xxxx
>191:   MUL TEMP[41].xyz, TEMP[40].xyzz, TEMP[5].yyyy
>192:   MUL TEMP[42].xyz, TEMP[24].xxxx, TEMP[41].xyzz
>193:   ADD TEMP[10].xyz, TEMP[10].xyzz, TEMP[42].xyzz
>194:   DP3 TEMP[43].x, TEMP[17].xyzz, TEMP[22].xyzz
>195:   MOV_SAT TEMP[44].x, TEMP[43].xxxx
>196:   ADD TEMP[45].x, IMM[0].wwww, -TEMP[44].xxxx
>197:   POW TEMP[46].x, TEMP[45].xxxx, IMM[3].yyyy
>198:   MUL TEMP[47].xyz, TEMP[42].xyzz, TEMP[46].xxxx
>199:   ADD TEMP[48].x, TEMP[8].xxxx, IMM[0].xxxx
>200:   MUL TEMP[49].x, TEMP[48].xxxx, IMM[4].xxxx
>201:   MUL TEMP[50].x, -TEMP[8].xxxx, IMM[2].wwww
>202:   EX2 TEMP[51].x, TEMP[50].xxxx
>203:   ADD TEMP[52].x, IMM[0].xxxx, -TEMP[51].xxxx
>204:   RCP TEMP[53].x, TEMP[52].xxxx
>205:   MUL TEMP[54].x, TEMP[49].xxxx, TEMP[53].xxxx
>206:   MUL TEMP[55].xyz, TEMP[47].xyzz, TEMP[54].xxxx
>207:   DP3 TEMP[56].x, TEMP[6].xyzz, TEMP[22].xyzz
>208:   MOV_SAT TEMP[57].x, TEMP[56].xxxx
>209:   POW TEMP[58].x, TEMP[57].xxxx, TEMP[8].xxxx
>210:   MUL TEMP[59].xyz, TEMP[55].xyzz, TEMP[58].xxxx
>211:   DP3 TEMP[60].x, TEMP[2].xyzz, TEMP[6].xyzz
>212:   MOV_SAT TEMP[61].x, TEMP[60].xxxx
>213:   MAX TEMP[62].x, TEMP[24].xxxx, TEMP[61].xxxx
>214:   ADD TEMP[63].x, TEMP[62].xxxx, IMM[4].yyyy
>215:   RCP TEMP[64].x, TEMP[63].xxxx
>216:   MUL TEMP[65].xyz, TEMP[59].xyzz, TEMP[64].xxxx
>217:   MAD TEMP[1].xyz, TEMP[65].xyzz, TEMP[0].yyyy, TEMP[1].xyzz
>218:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[5].wwww
>219: ENDLOOP :0
>220: MUL TEMP[0].xyz, TEMP[4].xyzz, TEMP[0].yyyy
>221: MAD TEMP[0].xyz, TEMP[10].xyzz, TEMP[3].xyzz, TEMP[0].xyzz
>222: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>223: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].zzzz
>224: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>225: ADD TEMP[2].x, TEMP[2].xxxx, IMM[4].zzzz
>226: RCP TEMP[2].x, TEMP[2].xxxx
>227: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>228: FRC TEMP[2].x, CONST[1].wwww
>229: MUL TEMP[2].x, TEMP[2].xxxx, IMM[4].wwww
>230: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>231: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>232: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>233: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>234: MOV TEMP[0].w, IN[0].wwww
>235: MOV OUT[0], TEMP[0]
>236: END
>radeonsi: Compiling shader 82
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 15, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 23, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 19, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fsub float %153, %49
>  %155 = fmul float %151, 2.000000e+00
>  %156 = fsub float %155, %50
>  %157 = fmul float %152, 2.000000e+00
>  %158 = fsub float %157, %51
>  %159 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %160 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %161 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %162 = load <8 x i32>, <8 x i32> addrspace(2)* %161, align 32, !invariant.load !0
>  %163 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %164 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %163, i64 0, i64 27, !amdgpu.uniform !0
>  %165 = load <4 x i32>, <4 x i32> addrspace(2)* %164, align 16, !invariant.load !0
>  %166 = extractelement <8 x i32> %162, i32 7
>  %167 = extractelement <4 x i32> %165, i32 0
>  %168 = and i32 %167, %166
>  %169 = insertelement <4 x i32> %165, i32 %168, i32 0
>  %170 = bitcast float %159 to i32
>  %171 = bitcast float %160 to i32
>  %172 = insertelement <2 x i32> undef, i32 %170, i32 0
>  %173 = insertelement <2 x i32> %172, i32 %171, i32 1
>  %174 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %173, <8 x i32> %162, <4 x i32> %169, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %175 = extractelement <4 x float> %174, i32 0
>  %176 = extractelement <4 x float> %174, i32 1
>  %177 = extractelement <4 x float> %174, i32 2
>  %178 = extractelement <4 x float> %174, i32 3
>  %179 = fadd float %177, -5.000000e-01
>  %180 = fadd float %176, -5.000000e-01
>  %181 = fmul float %179, 2.000000e+00
>  %182 = fmul float %180, 2.000000e+00
>  %183 = fmul float %178, 2.000000e+00
>  %184 = fmul float %181, %181
>  %185 = fmul float %182, %182
>  %186 = fadd float %184, %185
>  %187 = call float @llvm.AMDGPU.clamp.(float %186, float 0.000000e+00, float 1.000000e+00)
>  %188 = fsub float 1.000000e+00, %187
>  %189 = call float @llvm.sqrt.f32(float %188)
>  %190 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %191 = fmul float %190, %181
>  %192 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %193 = fmul float %192, %181
>  %194 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %195 = fmul float %194, %181
>  %196 = fmul float %23, %182
>  %197 = fadd float %196, %191
>  %198 = fmul float %24, %182
>  %199 = fadd float %198, %193
>  %200 = fmul float %25, %182
>  %201 = fadd float %200, %195
>  %202 = fmul float %59, %189
>  %203 = fadd float %202, %197
>  %204 = fmul float %60, %189
>  %205 = fadd float %204, %199
>  %206 = fmul float %61, %189
>  %207 = fadd float %206, %201
>  %208 = fmul float %154, %203
>  %209 = fmul float %156, %205
>  %210 = fadd float %209, %208
>  %211 = fmul float %158, %207
>  %212 = fadd float %210, %211
>  %213 = call float @llvm.AMDGPU.clamp.(float %212, float 0.000000e+00, float 1.000000e+00)
>  %214 = fsub float %183, %213
>  %215 = call float @llvm.AMDGPU.clamp.(float %214, float 0.000000e+00, float 1.000000e+00)
>  %216 = call float @llvm.pow.f32(float %215, float 3.000000e+00)
>  %217 = call float @llvm.AMDGPU.clamp.(float %216, float 0.000000e+00, float 1.000000e+00)
>  %218 = fmul float %98, 0x3FD3333340000000
>  %219 = fsub float %217, %218
>  %220 = fsub float 1.000000e+00, %98
>  %221 = fmul float %98, 2.000000e+01
>  %222 = fadd float %221, %220
>  %223 = fmul float %219, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fmul float %217, %224
>  %226 = fmul float %183, 0x3FF19999A0000000
>  %227 = fmul float %175, %97
>  %228 = fmul float %154, %59
>  %229 = fsub float -0.000000e+00, %228
>  %230 = fmul float %156, %60
>  %231 = fsub float %229, %230
>  %232 = fmul float %158, %61
>  %233 = fsub float %231, %232
>  %234 = fadd float %233, 1.000000e+00
>  %235 = fmul float %49, %59
>  %236 = fmul float %50, %60
>  %237 = fadd float %236, %235
>  %238 = fmul float %51, %61
>  %239 = fadd float %237, %238
>  %240 = fsub float 1.000000e+00, %239
>  %241 = call float @llvm.AMDGPU.clamp.(float %240, float 0.000000e+00, float 1.000000e+00)
>  %242 = fsub float %234, %241
>  %243 = call float @llvm.AMDGPU.clamp.(float %242, float 0.000000e+00, float 1.000000e+00)
>  %244 = fsub float 1.000000e+00, %243
>  %245 = fmul float %244, %244
>  %246 = fmul float %225, %245
>  %247 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %248 = fmul float %59, 0x4007700140000000
>  %249 = fadd float %248, %247
>  %250 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %251 = fmul float %60, 0x4007700140000000
>  %252 = fadd float %251, %250
>  %253 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %254 = fmul float %61, 0x4007700140000000
>  %255 = fadd float %254, %253
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 64)
>  %259 = fmul float %258, %249
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 68)
>  %261 = fmul float %260, %249
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 72)
>  %263 = fmul float %262, %249
>  %264 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %265 = load <16 x i8>, <16 x i8> addrspace(2)* %264, align 16, !invariant.load !0
>  %266 = call float @llvm.SI.load.const(<16 x i8> %265, i32 80)
>  %267 = fmul float %266, %252
>  %268 = fadd float %267, %259
>  %269 = call float @llvm.SI.load.const(<16 x i8> %265, i32 84)
>  %270 = fmul float %269, %252
>  %271 = fadd float %270, %261
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 88)
>  %275 = fmul float %274, %252
>  %276 = fadd float %275, %263
>  %277 = call float @llvm.SI.load.const(<16 x i8> %273, i32 96)
>  %278 = fmul float %277, %255
>  %279 = fadd float %278, %268
>  %280 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %281 = load <16 x i8>, <16 x i8> addrspace(2)* %280, align 16, !invariant.load !0
>  %282 = call float @llvm.SI.load.const(<16 x i8> %281, i32 100)
>  %283 = fmul float %282, %255
>  %284 = fadd float %283, %271
>  %285 = call float @llvm.SI.load.const(<16 x i8> %281, i32 104)
>  %286 = fmul float %285, %255
>  %287 = fadd float %286, %276
>  %288 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %289 = load <16 x i8>, <16 x i8> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = call float @llvm.SI.load.const(<16 x i8> %289, i32 112)
>  %291 = fadd float %279, %290
>  %292 = call float @llvm.SI.load.const(<16 x i8> %289, i32 116)
>  %293 = fadd float %284, %292
>  %294 = call float @llvm.SI.load.const(<16 x i8> %289, i32 120)
>  %295 = fadd float %287, %294
>  %296 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %297 = load <16 x i8>, <16 x i8> addrspace(2)* %296, align 16, !invariant.load !0
>  %298 = call float @llvm.SI.load.const(<16 x i8> %297, i32 16)
>  %299 = fsub float -0.000000e+00, %298
>  %300 = call float @llvm.SI.load.const(<16 x i8> %297, i32 20)
>  %301 = fsub float -0.000000e+00, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %297, i32 24)
>  %303 = fsub float -0.000000e+00, %302
>  %304 = fmul float %140, %299
>  %305 = fmul float %142, %301
>  %306 = fadd float %305, %304
>  %307 = fmul float %144, %303
>  %308 = fadd float %306, %307
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 3, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = bitcast float %295 to i32
>  %320 = bitcast float %291 to i32
>  %321 = bitcast float %293 to i32
>  %322 = insertelement <4 x i32> undef, i32 %319, i32 0
>  %323 = insertelement <4 x i32> %322, i32 %320, i32 1
>  %324 = insertelement <4 x i32> %323, i32 %321, i32 2
>  %325 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %324, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %326 = extractelement <4 x float> %325, i32 0
>  %327 = fmul float %203, %299
>  %328 = fmul float %205, %301
>  %329 = fadd float %328, %327
>  %330 = fmul float %207, %303
>  %331 = fadd float %329, %330
>  %332 = call float @llvm.AMDGPU.clamp.(float %331, float 0.000000e+00, float 1.000000e+00)
>  %333 = fsub float %226, %332
>  %334 = call float @llvm.AMDGPU.clamp.(float %333, float 0.000000e+00, float 1.000000e+00)
>  %335 = fmul float %326, %326
>  %336 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %337 = load <16 x i8>, <16 x i8> addrspace(2)* %336, align 16, !invariant.load !0
>  %338 = call float @llvm.SI.load.const(<16 x i8> %337, i32 48)
>  %339 = fmul float %338, %335
>  %340 = call float @llvm.SI.load.const(<16 x i8> %337, i32 52)
>  %341 = fmul float %340, %335
>  %342 = call float @llvm.SI.load.const(<16 x i8> %337, i32 56)
>  %343 = fmul float %342, %335
>  %344 = fmul float %334, %334
>  %345 = call float @llvm.AMDGPU.clamp.(float %344, float 0.000000e+00, float 1.000000e+00)
>  %346 = fmul float %339, %345
>  %347 = fmul float %341, %345
>  %348 = fmul float %343, %345
>  %349 = fmul float %346, %97
>  %350 = fmul float %347, %97
>  %351 = fmul float %348, %97
>  %352 = fmul float %309, %349
>  %353 = fmul float %309, %350
>  %354 = fmul float %309, %351
>  %355 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %356 = load <8 x i32>, <8 x i32> addrspace(2)* %355, align 32, !invariant.load !0
>  %357 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %358 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %357, i64 0, i64 7, !amdgpu.uniform !0
>  %359 = load <4 x i32>, <4 x i32> addrspace(2)* %358, align 16, !invariant.load !0
>  %360 = extractelement <8 x i32> %356, i32 7
>  %361 = extractelement <4 x i32> %359, i32 0
>  %362 = and i32 %361, %360
>  %363 = insertelement <4 x i32> %359, i32 %362, i32 0
>  %364 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %365 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %366 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %367 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %368 = call float @llvm.fabs.f32(float %366)
>  %369 = fdiv float 1.000000e+00, %368, !fpmath !1
>  %370 = fmul float %364, %369
>  %371 = fadd float %370, 1.500000e+00
>  %372 = fmul float %365, %369
>  %373 = fadd float %372, 1.500000e+00
>  %374 = bitcast float %373 to i32
>  %375 = bitcast float %371 to i32
>  %376 = bitcast float %367 to i32
>  %377 = insertelement <4 x i32> undef, i32 %374, i32 0
>  %378 = insertelement <4 x i32> %377, i32 %375, i32 1
>  %379 = insertelement <4 x i32> %378, i32 %376, i32 2
>  %380 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %379, <8 x i32> %356, <4 x i32> %363, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %381 = extractelement <4 x float> %380, i32 0
>  %382 = extractelement <4 x float> %380, i32 1
>  %383 = extractelement <4 x float> %380, i32 2
>  %384 = extractelement <4 x float> %380, i32 3
>  %385 = fmul float %140, %49
>  %386 = fmul float %142, %50
>  %387 = fadd float %386, %385
>  %388 = fmul float %144, %51
>  %389 = fadd float %387, %388
>  %390 = fmul float %389, %140
>  %391 = fmul float %389, %142
>  %392 = fmul float %389, %144
>  %393 = fmul float %390, 2.000000e+00
>  %394 = fsub float %393, %49
>  %395 = fmul float %391, 2.000000e+00
>  %396 = fsub float %395, %50
>  %397 = fmul float %392, 2.000000e+00
>  %398 = fsub float %397, %51
>  %399 = fsub float 1.000000e+00, %98
>  %400 = fmul float %399, 6.000000e+00
>  %401 = fmul float %49, %140
>  %402 = fmul float %50, %142
>  %403 = fadd float %402, %401
>  %404 = fmul float %51, %144
>  %405 = fadd float %403, %404
>  %406 = call float @llvm.AMDGPU.clamp.(float %405, float 0.000000e+00, float 1.000000e+00)
>  %407 = fsub float 1.000000e+00, %406
>  %408 = call float @llvm.pow.f32(float %407, float 5.000000e+00)
>  %409 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %410 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %411 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %412 = fmul float %408, %409
>  %413 = fmul float %408, %410
>  %414 = fmul float %408, %411
>  %415 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %416 = load <8 x i32>, <8 x i32> addrspace(2)* %415, align 32, !invariant.load !0
>  %417 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %418 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %417, i64 0, i64 11, !amdgpu.uniform !0
>  %419 = load <4 x i32>, <4 x i32> addrspace(2)* %418, align 16, !invariant.load !0
>  %420 = extractelement <8 x i32> %416, i32 7
>  %421 = extractelement <4 x i32> %419, i32 0
>  %422 = and i32 %421, %420
>  %423 = insertelement <4 x i32> %419, i32 %422, i32 0
>  %424 = call float @llvm.amdgcn.cubetc(float %394, float %396, float %398)
>  %425 = call float @llvm.amdgcn.cubesc(float %394, float %396, float %398)
>  %426 = call float @llvm.amdgcn.cubema(float %394, float %396, float %398)
>  %427 = call float @llvm.amdgcn.cubeid(float %394, float %396, float %398)
>  %428 = call float @llvm.fabs.f32(float %426)
>  %429 = fdiv float 1.000000e+00, %428, !fpmath !1
>  %430 = fmul float %424, %429
>  %431 = fadd float %430, 1.500000e+00
>  %432 = fmul float %425, %429
>  %433 = fadd float %432, 1.500000e+00
>  %434 = bitcast float %433 to i32
>  %435 = bitcast float %431 to i32
>  %436 = bitcast float %427 to i32
>  %437 = bitcast float %400 to i32
>  %438 = insertelement <4 x i32> undef, i32 %434, i32 0
>  %439 = insertelement <4 x i32> %438, i32 %435, i32 1
>  %440 = insertelement <4 x i32> %439, i32 %436, i32 2
>  %441 = insertelement <4 x i32> %440, i32 %437, i32 3
>  %442 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %441, <8 x i32> %416, <4 x i32> %423, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %443 = extractelement <4 x float> %442, i32 0
>  %444 = extractelement <4 x float> %442, i32 1
>  %445 = extractelement <4 x float> %442, i32 2
>  %446 = fmul float %412, %443
>  %447 = fmul float %413, %444
>  %448 = fmul float %414, %445
>  %449 = fmul float %381, %384
>  %450 = fmul float %382, %384
>  %451 = fmul float %383, %384
>  %452 = fmul float %227, 4.000000e+00
>  %453 = fmul float %449, %452
>  %454 = fadd float %453, %352
>  %455 = fmul float %450, %452
>  %456 = fadd float %455, %353
>  %457 = fmul float %451, %452
>  %458 = fadd float %457, %354
>  %459 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %460 = load <16 x i8>, <16 x i8> addrspace(2)* %459, align 16
>  br label %loop154
>
>loop154:                                          ; preds = %endif158, %main_body
>  %.012 = phi float [ %458, %main_body ], [ %544, %endif158 ]
>  %.011 = phi float [ %456, %main_body ], [ %543, %endif158 ]
>  %.010 = phi float [ %454, %main_body ], [ %542, %endif158 ]
>  %461 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %462 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %463 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %464 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %465 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %466 = icmp sgt i32 %461, 3
>  br i1 %466, label %endloop219, label %endif158
>
>endif158:                                         ; preds = %loop154
>  %467 = shl i32 %462, 5
>  %468 = shl i32 %462, 5
>  %469 = add i32 %468, 176
>  %470 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %469)
>  %471 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %472 = fsub float %470, %471
>  %473 = shl i32 %462, 5
>  %474 = add i32 %473, 180
>  %475 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %474)
>  %476 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %477 = fsub float %475, %476
>  %478 = add i32 %467, 184
>  %479 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %478)
>  %480 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %481 = fsub float %479, %480
>  %482 = fmul float %472, %472
>  %483 = fmul float %477, %477
>  %484 = fadd float %483, %482
>  %485 = fmul float %481, %481
>  %486 = fadd float %484, %485
>  %487 = call float @llvm.sqrt.f32(float %486)
>  %488 = fdiv float 1.000000e+00, %487, !fpmath !1
>  %489 = fmul float %472, %488
>  %490 = fmul float %477, %488
>  %491 = fmul float %481, %488
>  %492 = fmul float %489, %140
>  %493 = fmul float %490, %142
>  %494 = fadd float %493, %492
>  %495 = fmul float %491, %144
>  %496 = fadd float %494, %495
>  %497 = call float @llvm.AMDGPU.clamp.(float %496, float 0.000000e+00, float 1.000000e+00)
>  %498 = fmul float %489, %203
>  %499 = fmul float %490, %205
>  %500 = fadd float %499, %498
>  %501 = fmul float %491, %207
>  %502 = fadd float %500, %501
>  %503 = call float @llvm.AMDGPU.clamp.(float %502, float 0.000000e+00, float 1.000000e+00)
>  %504 = fsub float %226, %503
>  %505 = call float @llvm.AMDGPU.clamp.(float %504, float 0.000000e+00, float 1.000000e+00)
>  %506 = fmul float %505, %505
>  %507 = shl i32 %463, 1
>  %508 = or i32 %507, 1
>  %509 = fmul float %486, %488
>  %510 = shl i32 %464, 5
>  %511 = add i32 %510, 188
>  %512 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %511)
>  %513 = fmul float %509, %512
>  %514 = call float @llvm.AMDGPU.clamp.(float %513, float 0.000000e+00, float 1.000000e+00)
>  %515 = fsub float 1.000000e+00, %514
>  %516 = shl i32 %508, 4
>  %517 = add i32 %516, 176
>  %518 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %517)
>  %519 = fmul float %518, %515
>  %520 = shl i32 %508, 4
>  %521 = add i32 %520, 180
>  %522 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %521)
>  %523 = fmul float %522, %515
>  %524 = shl i32 %508, 4
>  %525 = add i32 %524, 184
>  %526 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %525)
>  %527 = fmul float %526, %515
>  %528 = fmul float %506, %506
>  %529 = call float @llvm.AMDGPU.clamp.(float %528, float 0.000000e+00, float 1.000000e+00)
>  %530 = fsub float 1.000000e+00, %488
>  %531 = fmul float %529, %530
>  %532 = fadd float %488, %531
>  %533 = fmul float %519, %532
>  %534 = fmul float %523, %532
>  %535 = fmul float %527, %532
>  %536 = fmul float %533, %97
>  %537 = fmul float %534, %97
>  %538 = fmul float %535, %97
>  %539 = fmul float %497, %536
>  %540 = fmul float %497, %537
>  %541 = fmul float %497, %538
>  %542 = fadd float %.010, %539
>  %543 = fadd float %.011, %540
>  %544 = fadd float %.012, %541
>  %545 = add i32 %465, 1
>  br label %loop154
>
>endloop219:                                       ; preds = %loop154
>  %546 = fmul float %446, %246
>  %547 = fmul float %447, %246
>  %548 = fmul float %448, %246
>  %549 = fmul float %.010, %78
>  %550 = fadd float %549, %546
>  %551 = fmul float %.011, %79
>  %552 = fadd float %551, %547
>  %553 = fmul float %.012, %80
>  %554 = fadd float %553, %548
>  %555 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %556 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %557 = load <16 x i8>, <16 x i8> addrspace(2)* %556, align 16, !invariant.load !0
>  %558 = call float @llvm.SI.load.const(<16 x i8> %557, i32 12)
>  %559 = fsub float %555, %558
>  %560 = call float @llvm.maxnum.f32(float %559, float 0.000000e+00)
>  %561 = call float @llvm.SI.load.const(<16 x i8> %557, i32 28)
>  %562 = call float @llvm.SI.load.const(<16 x i8> %557, i32 12)
>  %563 = fsub float %561, %562
>  %564 = fadd float %563, 0x3F50624DE0000000
>  %565 = fdiv float 1.000000e+00, %564, !fpmath !1
>  %566 = fmul float %560, %565
>  %567 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %568 = load <16 x i8>, <16 x i8> addrspace(2)* %567, align 16, !invariant.load !0
>  %569 = call float @llvm.SI.load.const(<16 x i8> %568, i32 28)
>  %570 = call float @llvm.floor.f32(float %569)
>  %571 = fsub float %569, %570
>  %572 = fmul float %571, 8.000000e+00
>  %573 = call float @llvm.pow.f32(float %566, float %572)
>  %574 = call float @llvm.AMDGPU.clamp.(float %573, float 0.000000e+00, float 1.000000e+00)
>  %575 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %576 = fmul float %575, %574
>  %577 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %578 = load <16 x i8>, <16 x i8> addrspace(2)* %577, align 16, !invariant.load !0
>  %579 = call float @llvm.SI.load.const(<16 x i8> %578, i32 32)
>  %580 = fsub float 1.000000e+00, %576
>  %581 = fmul float %550, %576
>  %582 = fmul float %579, %580
>  %583 = fadd float %581, %582
>  %584 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %585 = load <16 x i8>, <16 x i8> addrspace(2)* %584, align 16, !invariant.load !0
>  %586 = call float @llvm.SI.load.const(<16 x i8> %585, i32 36)
>  %587 = fsub float 1.000000e+00, %576
>  %588 = fmul float %552, %576
>  %589 = fmul float %586, %587
>  %590 = fadd float %588, %589
>  %591 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %592 = load <16 x i8>, <16 x i8> addrspace(2)* %591, align 16, !invariant.load !0
>  %593 = call float @llvm.SI.load.const(<16 x i8> %592, i32 40)
>  %594 = fsub float 1.000000e+00, %576
>  %595 = fmul float %554, %576
>  %596 = fmul float %593, %594
>  %597 = fadd float %595, %596
>  %598 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %599 = bitcast float %5 to i32
>  %600 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %599, 10
>  %601 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %600, float %583, 11
>  %602 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %601, float %590, 12
>  %603 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %602, float %597, 13
>  %604 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %603, float %598, 14
>  %605 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %604, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %605
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x3                     ; C2040103
>	s_buffer_load_dword s10, s[0:3], 0x7                    ; C2050107
>	s_buffer_load_dword s13, s[0:3], 0xb                    ; C206810B
>	s_buffer_load_dword s18, s[0:3], 0xf                    ; C209010F
>	s_buffer_load_dword s17, s[0:3], 0x17                   ; C2088117
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s22, s[0:3], 0x13                   ; C20B0113
>	s_buffer_load_dword s9, s[0:3], 0x4                     ; C2048104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s14, s[0:3], 0xc                    ; C207010C
>	s_buffer_load_dword s15, s[0:3], 0xd                    ; C207810D
>	s_buffer_load_dword s16, s[0:3], 0xe                    ; C208010E
>	s_buffer_load_dword s19, s[0:3], 0x10                   ; C2098110
>	s_buffer_load_dword s20, s[0:3], 0x11                   ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                   ; C20A8112
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_sub_f32_e64 v7, 1.0, s22                              ; D2080007 00002CF2
>	v_mul_f32_e32 v0, s8, v9                                ; 10001208
>	v_mac_f32_e32 v0, s10, v10                              ; 3E00140A
>	v_mac_f32_e32 v0, s13, v11                              ; 3E00160D
>	v_mac_f32_e32 v0, s18, v12                              ; 3E001812
>	v_mul_f32_e32 v1, s17, v0                               ; 10020011
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	v_mad_f32 v8, 2.0, v13, -1.0                            ; D2820008 03CE1AF4
>	v_mad_f32 v13, 2.0, v14, -1.0                           ; D282000D 03CE1CF4
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 33, 0, 0, 0, v16, v17, v18, v19                 ; F800021F 13121110
>	v_mad_f32 v14, 2.0, v15, -1.0                           ; D282000E 03CE1EF4
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v17, 0, v13, v8                               ; D2820011 04221A80
>	v_mad_f32 v18, 0, v8, v13                               ; D2820012 04361080
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v19, 0, v4, v3                                ; D2820013 040E0880
>	v_mac_f32_e32 v17, 0, v14                               ; 3E221C80
>	v_mac_f32_e32 v18, 0, v14                               ; 3E241C80
>	v_mac_f32_e32 v14, 0, v13                               ; 3E1C1A80
>	v_mad_f32 v13, 0, v3, v4                                ; D282000D 04120680
>	v_mac_f32_e32 v19, 0, v5                                ; 3E260A80
>	v_mac_f32_e32 v13, 0, v5                                ; 3E1A0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mul_f32_e32 v4, s6, v9                                ; 10081206
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s8, v10                               ; 3E081408
>	v_mac_f32_e32 v4, s0, v11                               ; 3E081600
>	v_mov_b32_e32 v1, s19                                   ; 7E020213
>	v_mac_f32_e32 v4, s16, v12                              ; 3E081810
>	v_mac_f32_e32 v1, s20, v4                               ; 3E020814
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v3, v19, v18                              ; 10062513
>	v_mul_legacy_f32_e32 v1, s21, v1                        ; 0E020215
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_mul_f32_e32 v8, v13, v14                              ; 10101D0D
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v17, v13, -v3                             ; D2820003 840E1B11
>	v_mac_f32_e32 v7, s22, v1                               ; 3E0E0216
>	v_mul_f32_e32 v15, s4, v9                               ; 101E1204
>	v_mul_f32_e32 v16, s5, v9                               ; 10201205
>	v_mul_f32_e32 v9, v5, v17                               ; 10122305
>	v_mad_f32 v8, v18, v5, -v8                              ; D2820008 84220B12
>	v_mad_f32 v1, v6, v3, -v3                               ; D2820001 840E0706
>	v_mul_f32_e32 v3, v7, v7                                ; 10060F07
>	v_mad_f32 v9, v14, v19, -v9                             ; D2820009 8426270E
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	exp 15, 34, 0, 0, 0, v3, v0, v0, v0                     ; F800022F 00000003
>	v_mac_f32_e32 v15, s9, v10                              ; 3E1E1409
>	v_mac_f32_e32 v16, s7, v10                              ; 3E201407
>	v_mad_f32 v9, v6, v9, -v9                               ; D2820009 84261306
>	exp 15, 35, 0, 0, 0, v19, v13, v5, v8                   ; F800023F 08050D13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	v_mac_f32_e32 v16, s12, v11                             ; 3E20160C
>	exp 15, 36, 0, 0, 0, v9, v1, v17, v18                   ; F800024F 12110109
>	v_mac_f32_e32 v15, s14, v12                             ; 3E1E180E
>	v_mac_f32_e32 v16, s15, v12                             ; 3E20180F
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v15, v16, v4, v0                   ; F80008CF 0004100F
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 552 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v16, v4, 3, 3, [m0]                             ; C8400F04
>	v_interp_p2_f32 v16, [v16], v5, 3, 3, [m0]                      ; C8410F05
>	v_interp_p1_f32 v21, v4, 0, 4, [m0]                             ; C8541004
>	v_interp_p2_f32 v21, [v21], v5, 0, 4, [m0]                      ; C8551005
>	v_interp_p1_f32 v22, v4, 1, 4, [m0]                             ; C8581104
>	v_interp_p2_f32 v22, [v22], v5, 1, 4, [m0]                      ; C8591105
>	v_interp_p1_f32 v7, v4, 2, 4, [m0]                              ; C81C1204
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	v_interp_p2_f32 v7, [v7], v5, 2, 4, [m0]                        ; C81D1205
>	v_interp_p1_f32 v8, v4, 3, 4, [m0]                              ; C8201304
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v8, [v8], v5, 3, 4, [m0]                        ; C8211305
>	v_interp_p1_f32 v9, v4, 0, 5, [m0]                              ; C8241404
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v9, [v9], v5, 0, 5, [m0]                        ; C8251405
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v17, s12, v1                                      ; 0822020C
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_sub_f32_e32 v18, s13, v0                                      ; 0824000D
>	v_mul_f32_e32 v10, v17, v17                                     ; 10142311
>	v_sub_f32_e32 v19, s14, v2                                      ; 0826040E
>	v_mac_f32_e32 v10, v18, v18                                     ; 3E142512
>	v_mac_f32_e32 v10, v19, v19                                     ; 3E142713
>	v_rsq_f32_e32 v20, v10                                          ; 7E285D0A
>	v_mul_f32_e32 v10, v7, v7                                       ; 10140F07
>	v_mac_f32_e32 v10, v8, v8                                       ; 3E141108
>	s_load_dwordx8 s[48:55], s[4:5], 0x30                           ; C0D80530
>	s_load_dwordx4 s[56:59], s[4:5], 0x3c                           ; C09C053C
>	v_mac_f32_e32 v10, v9, v9                                       ; 3E141309
>	v_rsq_f32_e32 v10, v10                                          ; 7E145D0A
>	v_interp_p1_f32 v14, v6, 0, 1, [m0]                             ; C8380406
>	v_interp_p2_f32 v14, [v14], v3, 0, 1, [m0]                      ; C8390403
>	v_interp_p1_f32 v15, v6, 1, 1, [m0]                             ; C83C0506
>	v_interp_p2_f32 v15, [v15], v3, 1, 1, [m0]                      ; C83D0503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s56, s56, s55                                         ; 87383738
>	v_mul_f32_e32 v25, v10, v7                                      ; 10320F0A
>	v_mul_f32_e32 v26, v10, v8                                      ; 1034110A
>	v_mul_f32_e32 v27, v10, v9                                      ; 1036130A
>	image_sample v[7:9], v[14:15], s[48:55], s[56:59] dmask:0x7     ; F0800700 01CC070E
>	s_load_dwordx8 s[48:55], s[4:5], 0x50                           ; C0D80550
>	s_load_dwordx4 s[56:59], s[4:5], 0x5c                           ; C09C055C
>	s_load_dwordx8 s[40:47], s[4:5], 0x40                           ; C0D40540
>	v_mul_f32_e32 v23, v20, v17                                     ; 102E2314
>	v_mul_f32_e32 v28, v20, v18                                     ; 10382514
>	v_mul_f32_e32 v33, v20, v19                                     ; 10422714
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s56, s56, s55                                         ; 87383738
>	image_sample v[10:11], v[14:15], s[48:55], s[56:59] dmask:0x6   ; F0800600 01CC0A0E
>	s_load_dwordx4 s[48:51], s[4:5], 0x4c                           ; C098054C
>	s_load_dwordx8 s[60:67], s[4:5], 0x60                           ; C0DE0560
>	s_buffer_load_dword s68, s[0:3], 0x11                           ; C2220111
>	s_buffer_load_dword s69, s[0:3], 0x12                           ; C2228112
>	s_buffer_load_dword s70, s[0:3], 0x14                           ; C2230114
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s48, s48, s47                                         ; 87302F30
>	image_sample v[14:15], v[14:15], s[40:47], s[48:51] dmask:0xa   ; F0800A00 018A0E0E
>	v_interp_p1_f32 v29, v4, 0, 3, [m0]                             ; C8740C04
>	v_interp_p2_f32 v29, [v29], v5, 0, 3, [m0]                      ; C8750C05
>	v_interp_p1_f32 v30, v4, 1, 3, [m0]                             ; C8780D04
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v24, v14, v14                                     ; 06301D0E
>	v_mad_f32 v14, 2.0, v14, -1.0                                   ; D282000E 03CE1CF4
>	v_interp_p2_f32 v30, [v30], v5, 1, 3, [m0]                      ; C8790D05
>	v_interp_p1_f32 v31, v4, 2, 3, [m0]                             ; C87C0E04
>	v_add_f32_e32 v12, v15, v15                                     ; 06181F0F
>	v_interp_p2_f32 v31, [v31], v5, 2, 3, [m0]                      ; C87D0E05
>	v_mad_f32 v15, 2.0, v15, -1.0                                   ; D282000F 03CE1EF4
>	v_mad_f32 v24, v24, v14, -v14                                   ; D2820018 843A1D18
>	v_mad_f32 v4, v12, v29, -v29                                    ; D2820004 84763B0C
>	v_mad_f32 v5, v12, v30, -v30                                    ; D2820005 847A3D0C
>	v_mad_f32 v12, v12, v31, -v31                                   ; D282000C 847E3F0C
>	v_mac_f32_e32 v24, v15, v15                                     ; 3E301F0F
>	v_mac_f32_e32 v4, v14, v16                                      ; 3E08210E
>	v_mac_f32_e32 v5, v14, v21                                      ; 3E0A2B0E
>	v_mac_f32_e32 v12, v14, v22                                     ; 3E182D0E
>	v_add_f32_e64 v14, v24, 0 clamp                                 ; D206080E 00010118
>	v_sub_f32_e32 v14, 0x3f8020c5, v14                              ; 081C1CFF 3F8020C5
>	v_sqrt_f32_e32 v14, v14                                         ; 7E1C670E
>	v_mac_f32_e32 v4, v14, v25                                      ; 3E08330E
>	v_mac_f32_e32 v5, v14, v26                                      ; 3E0A350E
>	v_mul_f32_e32 v32, v23, v4                                      ; 10400917
>	v_mac_f32_e32 v12, v14, v27                                     ; 3E18370E
>	v_mac_f32_e32 v32, v28, v5                                      ; 3E400B1C
>	v_mac_f32_e32 v32, v33, v12                                     ; 3E401921
>	v_mul_f32_e32 v14, v4, v32                                      ; 101C4104
>	v_mac_f32_e32 v14, v4, v32                                      ; 3E1C4104
>	v_mad_f32 v34, -v17, v20, v14                                   ; D2820022 243A2911
>	v_mul_f32_e32 v14, v5, v32                                      ; 101C4105
>	s_load_dwordx4 s[40:43], s[4:5], 0x6c                           ; C094056C
>	v_mac_f32_e32 v14, v5, v32                                      ; 3E1C4105
>	v_mad_f32 v35, -v18, v20, v14                                   ; D2820023 243A2912
>	v_mul_f32_e32 v14, v12, v32                                     ; 101C410C
>	v_mac_f32_e32 v14, v12, v32                                     ; 3E1C410C
>	v_mad_f32 v36, -v19, v20, v14                                   ; D2820024 243A2913
>	v_interp_p1_f32 v14, v6, 2, 1, [m0]                             ; C8380606
>	v_interp_p2_f32 v14, [v14], v3, 2, 1, [m0]                      ; C8390603
>	v_interp_p1_f32 v15, v6, 3, 1, [m0]                             ; C83C0706
>	v_interp_p2_f32 v15, [v15], v3, 3, 1, [m0]                      ; C83D0703
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s40, s40, s67                                         ; 87284328
>	image_sample v[17:20], v[14:15], s[60:67], s[40:43] dmask:0xf   ; F0800F00 014F110E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v14, -0.5, v19                                    ; 061C26F1
>	v_add_f32_e32 v19, v14, v14                                     ; 06261D0E
>	v_add_f32_e32 v14, -0.5, v18                                    ; 061C24F1
>	v_add_f32_e32 v18, v14, v14                                     ; 06241D0E
>	v_mul_f32_e32 v14, v19, v29                                     ; 101C3B13
>	v_mul_f32_e32 v15, v19, v30                                     ; 101E3D13
>	v_mac_f32_e32 v14, v18, v16                                     ; 3E1C2112
>	v_mul_f32_e32 v16, v19, v31                                     ; 10203F13
>	v_mac_f32_e32 v15, v18, v21                                     ; 3E1E2B12
>	v_mac_f32_e32 v16, v18, v22                                     ; 3E202D12
>	v_mul_f32_e32 v18, v18, v18                                     ; 10242512
>	v_mac_f32_e32 v18, v19, v19                                     ; 3E242713
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_sub_f32_e32 v18, 1.0, v18                                     ; 082424F2
>	v_sqrt_f32_e32 v18, v18                                         ; 7E246712
>	v_mac_f32_e32 v14, v18, v25                                     ; 3E1C3312
>	v_mac_f32_e32 v15, v18, v26                                     ; 3E1E3512
>	v_mac_f32_e32 v16, v18, v27                                     ; 3E203712
>	v_mul_f32_e32 v18, v14, v34                                     ; 1024450E
>	s_buffer_load_dword s40, s[0:3], 0x10                           ; C2140110
>	v_mac_f32_e32 v18, v15, v35                                     ; 3E24470F
>	v_mac_f32_e32 v18, v16, v36                                     ; 3E244910
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v37, v10, v17                                     ; 104A230A
>	v_mov_b32_e32 v17, 0x403b800a                                   ; 7E2202FF 403B800A
>	v_mad_f32 v21, 2.0, v20, -v18                                   ; D2820015 844A28F4
>	v_mad_f32 v18, v17, v25, v1                                     ; D2820012 04063311
>	s_buffer_load_dword s41, s[0:3], 0x16                           ; C2148116
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v19, s40, v18                                     ; 10262428
>	s_buffer_load_dword s40, s[0:3], 0x18                           ; C2140118
>	s_buffer_load_dword s71, s[0:3], 0x15                           ; C2238115
>	v_mul_f32_e32 v22, s68, v18                                     ; 102C2444
>	v_mul_f32_e32 v24, s69, v18                                     ; 10302445
>	v_mad_f32 v18, v17, v26, v0                                     ; D2820012 04023511
>	v_mac_f32_e32 v24, s41, v18                                     ; 3E302429
>	v_mac_f32_e32 v19, s70, v18                                     ; 3E262446
>	v_mad_f32 v17, v17, v27, v2                                     ; D2820011 040A3711
>	s_buffer_load_dword s42, s[0:3], 0x1a                           ; C215011A
>	s_buffer_load_dword s41, s[0:3], 0x19                           ; C2148119
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v19, s40, v17                                     ; 3E262228
>	s_load_dwordx8 s[28:35], s[4:5], 0x0                            ; C0CE0500
>	s_load_dwordx4 s[36:39], s[4:5], 0xc                            ; C092050C
>	s_buffer_load_dword s43, s[0:3], 0x1c                           ; C215811C
>	s_buffer_load_dword s44, s[0:3], 0x1d                           ; C216011D
>	s_buffer_load_dword s40, s[0:3], 0x1e                           ; C214011E
>	v_mac_f32_e32 v22, s71, v18                                     ; 3E2C2447
>	v_mac_f32_e32 v22, s41, v17                                     ; 3E2C2229
>	v_mac_f32_e32 v24, s42, v17                                     ; 3E30222A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v18, s43, v19                                     ; 0624262B
>	v_add_f32_e32 v19, s44, v22                                     ; 06262C2C
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	v_add_f32_e32 v20, v20, v20                                     ; 06282914
>	v_add_f32_e32 v17, s40, v24                                     ; 06223028
>	image_sample_c v17, v[17:20], s[28:35], s[36:39] dmask:0x1      ; F0A00100 01271111
>	v_add_f32_e64 v18, v21, 0 clamp                                 ; D2060812 00010115
>	v_log_f32_e32 v18, v18                                          ; 7E244F12
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	v_sub_f32_e32 v21, 1.0, v11                                     ; 082A16F2
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	v_mul_legacy_f32_e32 v18, 0x40400000, v18                       ; 0E2424FF 40400000
>	v_exp_f32_e32 v18, v18                                          ; 7E244B12
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mov_b32_e32 v19, v18                                          ; 7E260312
>	v_mac_f32_e32 v19, 0xbe99999a, v11                              ; 3E2616FF BE99999A
>	v_mac_f32_e32 v21, 0x41a00000, v11                              ; 3E2A16FF 41A00000
>	s_buffer_load_dword s28, s[0:3], 0x6                            ; C20E0106
>	v_mul_f32_e32 v19, v21, v19                                     ; 10262715
>	v_add_f32_e64 v19, v19, 0 clamp                                 ; D2060813 00010113
>	v_mul_f32_e32 v19, v19, v18                                     ; 10262513
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v18, s9, v14                                      ; 10241C09
>	v_mad_f32 v18, v15, -s8, -v18                                   ; D2820012 C448110F
>	v_mad_f32 v18, -v16, s28, v18                                   ; D2820012 24483910
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mov_b32_e32 v21, 0x3f8ccccd                                   ; 7E2A02FF 3F8CCCCD
>	v_mad_f32 v29, v20, v21, -v18                                   ; D282001D 844A2B14
>	v_mul_f32_e32 v18, v21, v20                                     ; 10242915
>	v_cubema_f32 v21, v4, v5, v12                                   ; D28E0015 04320B04
>	v_rcp_f32_e64 v21, |v21|                                        ; D3540115 00000115
>	v_mul_f32_e32 v20, v25, v23                                     ; 10282F19
>	v_cubetc_f32 v23, v4, v5, v12                                   ; D28C0017 04320B04
>	v_mov_b32_e32 v22, 0x3fc00000                                   ; 7E2C02FF 3FC00000
>	v_cubesc_f32 v30, v4, v5, v12                                   ; D28A001E 04320B04
>	v_mac_f32_e32 v20, v26, v28                                     ; 3E28391A
>	v_mad_f32 v24, v21, v23, v22                                    ; D2820018 045A2F15
>	v_mad_f32 v23, v21, v30, v22                                    ; D2820017 045A3D15
>	v_mul_f32_e32 v21, v25, v34                                     ; 102A4519
>	v_mad_f32 v21, -v35, v26, -v21                                  ; D2820015 A4563523
>	v_mac_f32_e32 v20, v27, v33                                     ; 3E28431B
>	v_mad_f32 v21, -v36, v27, v21                                   ; D2820015 24563724
>	v_sub_f32_e32 v20, 1.0, v20                                     ; 082828F2
>	v_add_f32_e32 v21, 1.0, v21                                     ; 062A2AF2
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_subrev_f32_e32 v20, v20, v21                                  ; 0A282B14
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	s_buffer_load_dword s29, s[0:3], 0xc                            ; C20E810C
>	s_buffer_load_dword s30, s[0:3], 0xd                            ; C20F010D
>	s_buffer_load_dword s31, s[0:3], 0xe                            ; C20F810E
>	v_sub_f32_e32 v21, 1.0, v20                                     ; 082A28F2
>	v_mad_f32 v20, -v20, v21, v21                                   ; D2820014 24562B14
>	v_mul_f32_e32 v19, v20, v19                                     ; 10262714
>	v_add_f32_e64 v20, v29, 0 clamp                                 ; D2060814 0001011D
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v17, v17, v17                                     ; 10222311
>	v_mul_f32_e32 v20, v20, v20                                     ; 10282914
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v21, s29, v17                                     ; 102A221D
>	v_mul_f32_e32 v25, s30, v17                                     ; 1032221E
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_mul_f32_e32 v17, s31, v17                                     ; 1022221F
>	v_mul_f32_e32 v25, v20, v25                                     ; 10323314
>	v_mul_f32_e32 v17, v20, v17                                     ; 10222314
>	v_mul_f32_e32 v21, v20, v21                                     ; 102A2B14
>	v_mul_f32_e32 v20, s9, v4                                       ; 10280809
>	v_mad_f32 v20, v5, -s8, -v20                                    ; D2820014 C4501105
>	s_load_dwordx8 s[16:23], s[4:5], 0x10                           ; C0C80510
>	s_load_dwordx4 s[24:27], s[4:5], 0x1c                           ; C08C051C
>	v_mad_f32 v20, -v12, s28, v20                                   ; D2820014 2450390C
>	s_load_dwordx4 s[12:15], s[4:5], 0x2c                           ; C086052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x20                           ; C0CE0520
>	v_add_f32_e64 v26, v20, 0 clamp                                 ; D206081A 00010114
>	v_mul_f32_e32 v20, v10, v21                                     ; 10282B0A
>	v_mul_f32_e32 v17, v10, v17                                     ; 1022230A
>	v_mul_f32_e32 v25, v10, v25                                     ; 1032330A
>	v_mul_f32_e32 v21, v20, v26                                     ; 102A3514
>	v_mul_f32_e32 v20, v25, v26                                     ; 10283519
>	v_mul_f32_e32 v17, v17, v26                                     ; 10223511
>	v_cubeid_f32 v25, v4, v5, v12                                   ; D2880019 04320B04
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s24, s24, s23                                         ; 87181718
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	image_sample v[26:29], v[23:26], s[16:23], s[24:27] dmask:0xf   ; F0800F00 00C41A17
>	v_mov_b32_e32 v23, 0x40c00000                                   ; 7E2E02FF 40C00000
>	v_mad_f32 v25, -v11, v23, v23                                   ; D2820019 245E2F0B
>	v_add_f32_e64 v23, v32, 0 clamp                                 ; D2060817 00010120
>	v_sub_f32_e32 v23, 1.0, v23                                     ; 082E2EF2
>	v_log_f32_e32 v23, v23                                          ; 7E2E4F17
>	v_max_f32_e32 v11, 0, v11                                       ; 20161680
>	v_cubesc_f32 v31, v34, v35, v36                                 ; D28A001F 04924722
>	s_and_b32 s12, s12, s35                                         ; 870C230C
>	v_mul_legacy_f32_e32 v23, 0x40a00000, v23                       ; 0E2E2EFF 40A00000
>	v_exp_f32_e32 v23, v23                                          ; 7E2E4B17
>	v_mul_f32_e32 v11, v11, v23                                     ; 10162F0B
>	v_cubema_f32 v23, v34, v35, v36                                 ; D28E0017 04924722
>	v_rcp_f32_e64 v30, |v23|                                        ; D354011E 00000117
>	v_cubetc_f32 v23, v34, v35, v36                                 ; D28C0017 04924722
>	v_cubeid_f32 v24, v34, v35, v36                                 ; D2880018 04924722
>	v_mad_f32 v23, v30, v23, v22                                    ; D2820017 045A2F1E
>	v_mac_f32_e32 v22, v30, v31                                     ; 3E2C3F1E
>	image_sample_l v[30:32], v[22:25], s[28:35], s[12:15] dmask:0x7 ; F0900700 00671E16
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v24, v29, v26                                     ; 1030351D
>	v_mul_f32_e32 v25, v29, v27                                     ; 1032371D
>	v_mul_f32_e32 v27, 4.0, v37                                     ; 10364AF6
>	v_mul_f32_e32 v26, v29, v28                                     ; 1034391D
>	v_mac_f32_e32 v21, v27, v24                                     ; 3E2A311B
>	v_mac_f32_e32 v20, v27, v25                                     ; 3E28331B
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v23, v30, v11                                     ; 102E171E
>	v_mul_f32_e32 v22, v31, v11                                     ; 102C171F
>	v_mul_f32_e32 v11, v32, v11                                     ; 10161720
>	v_mac_f32_e32 v17, v27, v26                                     ; 3E22351B
>	v_mov_b32_e32 v24, 0xc8                                         ; 7E3002FF 000000C8
>	v_mov_b32_e32 v25, 0                                            ; 7E320280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v26, vcc, 0xffffffe8, v24                         ; 4A3430FF FFFFFFE8
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_add_i32_e32 v27, vcc, 0xffffffec, v24                         ; 4A3630FF FFFFFFEC
>	buffer_load_dword v27, v27, s[0:3], 0 offen                     ; E0301000 80001B1B
>	v_add_i32_e32 v28, vcc, -16, v24                                ; 4A3830D0
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v29, vcc, -12, v24                                ; 4A3A30CC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -8, v24                                 ; 4A3C30C8
>	v_add_i32_e32 v25, vcc, 1, v25                                  ; 4A323281
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v26, v1, v26                                   ; 0A343501
>	v_mul_f32_e32 v31, v26, v26                                     ; 103E351A
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v27, v0, v27                                   ; 0A363700
>	v_mac_f32_e32 v31, v27, v27                                     ; 3E3E371B
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v28, v2, v28                                   ; 0A383902
>	v_mac_f32_e32 v31, v28, v28                                     ; 3E3E391C
>	v_rsq_f32_e32 v32, v31                                          ; 7E405D1F
>	v_mul_f32_e32 v26, v32, v26                                     ; 10343520
>	v_mul_f32_e32 v33, v14, v26                                     ; 1042350E
>	v_mul_f32_e32 v27, v32, v27                                     ; 10363720
>	v_mul_f32_e32 v26, v4, v26                                      ; 10343504
>	v_mul_f32_e32 v28, v32, v28                                     ; 10383920
>	v_mac_f32_e32 v33, v15, v27                                     ; 3E42370F
>	v_mac_f32_e32 v26, v5, v27                                      ; 3E343705
>	v_mac_f32_e32 v33, v16, v28                                     ; 3E423910
>	v_mac_f32_e32 v26, v12, v28                                     ; 3E34390C
>	v_add_i32_e32 v28, vcc, -4, v24                                 ; 4A3830C4
>	buffer_load_dword v27, v30, s[0:3], 0 offen                     ; E0301000 80001B1E
>	buffer_load_dword v30, v24, s[0:3], 0 offen                     ; E0301000 80001E18
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_subrev_f32_e32 v33, v33, v18                                  ; 0A422521
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_mul_f32_e32 v33, v33, v33                                     ; 10424321
>	v_mul_f32_e32 v31, v32, v31                                     ; 103E3F20
>	v_mul_f32_e32 v33, v33, v33                                     ; 10424321
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_mul_f32_e32 v29, v29, v31                                     ; 103A3F1D
>	v_add_f32_e64 v29, v29, 0 clamp                                 ; D206081D 0001011D
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_sub_f32_e32 v34, 1.0, v32                                     ; 084440F2
>	v_mac_f32_e32 v32, v34, v33                                     ; 3E404322
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_add_i32_e32 v24, vcc, 32, v24                                 ; 4A3030A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v27, -v29, v27, v27                                   ; D282001B 246E371D
>	v_mul_f32_e32 v27, v32, v27                                     ; 10363720
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v28, -v29, v28, v28                                   ; D282001C 2472391D
>	v_mad_f32 v29, -v29, v30, v30                                   ; D282001D 247A3D1D
>	v_mul_f32_e32 v27, v10, v27                                     ; 1036370A
>	v_mul_f32_e32 v28, v32, v28                                     ; 10383920
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v21, v27, v26                                     ; 3E2A351B
>	v_mul_f32_e32 v27, v10, v28                                     ; 1036390A
>	v_mul_f32_e32 v28, v10, v29                                     ; 10383B0A
>	v_mac_f32_e32 v20, v27, v26                                     ; 3E28351B
>	v_mac_f32_e32 v17, v28, v26                                     ; 3E22351C
>	v_cmp_lt_i32_e32 vcc, 3, v25                                    ; 7D023283
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v5, s4                                            ; 7E0A0204
>	v_sub_f32_e32 v5, s5, v5                                        ; 080A0A05
>	v_add_f32_e32 v5, 0x3a83126f, v5                                ; 060A0AFF 3A83126F
>	v_rcp_f32_e32 v5, v5                                            ; 7E0A5505
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_f32_e32 v0, v5, v0                                        ; 10000105
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_floor_f32_e32 v5, s5                                          ; 7E0A4805
>	v_sub_f32_e32 v5, s5, v5                                        ; 080A0A05
>	v_mul_f32_e32 v5, 0x41000000, v5                                ; 100A0AFF 41000000
>	v_mul_legacy_f32_e32 v0, v5, v0                                 ; 0E000105
>	v_interp_p1_f32 v5, v6, 0, 2, [m0]                              ; C8140806
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v5, [v5], v3, 0, 2, [m0]                        ; C8150803
>	v_mul_f32_e32 v1, v19, v23                                      ; 10022F13
>	v_mul_f32_e32 v5, v0, v5                                        ; 100A0B00
>	v_mul_f32_e32 v2, v19, v22                                      ; 10042D13
>	v_mac_f32_e32 v1, v7, v21                                       ; 3E022B07
>	v_mad_f32 v0, -v5, s6, s6                                       ; D2820000 20180D05
>	v_mul_f32_e32 v4, v19, v11                                      ; 10081713
>	v_mac_f32_e32 v0, v5, v1                                        ; 3E000305
>	v_mac_f32_e32 v2, v8, v20                                       ; 3E042908
>	v_mad_f32 v1, -v5, s7, s7                                       ; D2820001 201C0F05
>	v_mac_f32_e32 v1, v5, v2                                        ; 3E020505
>	v_mac_f32_e32 v4, v9, v17                                       ; 3E082309
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v2, -v5, s0, s0                                       ; D2820002 20000105
>	v_mac_f32_e32 v2, v5, v4                                        ; 3E040905
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 80
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1944 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3].x, GENERIC[3], PERSPECTIVE
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[5], PERSPECTIVE, CENTROID
>DCL IN[6].x, GENERIC[6], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..23]
>DCL TEMP[0..65], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.0000,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,     0.0010,     8.0000}
>IMM[5] INT32 {0, 4, 2, 1}
>  0: MOV TEMP[0].x, IN[4].wwww
>  1: MOV TEMP[0].yz, IN[5].yxyy
>  2: MOV TEMP[1].xy, IN[5].zwzz
>  3: MOV TEMP[1].z, IN[6].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[4], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[2].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[6], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[2].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[5], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[4].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[6].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[6].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[6].xyzz
> 31: DP3 TEMP[7].x, TEMP[6].xyzz, TEMP[2].xyzz
> 32: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[6].xyzz
> 33: MAD TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz, -TEMP[2].xyzz
> 34: MOV TEMP[8].xy, IN[2].zwww
> 35: TEX TEMP[8], TEMP[8], SAMP[7], 2D
> 36: MOV TEMP[9], TEMP[8]
> 37: ADD TEMP[9].xyz, TEMP[8].zyyy, IMM[1].xxxx
> 38: MUL TEMP[9].xyz, TEMP[9].xyzz, IMM[0].xxxx
> 39: MUL TEMP[10].x, TEMP[8].wwww, IMM[0].xxxx
> 40: MOV TEMP[9].w, TEMP[10].xxxx
> 41: DP2 TEMP[11].x, TEMP[9].xyyy, TEMP[9].xyyy
> 42: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 43: ADD TEMP[11].x, IMM[0].wwww, -TEMP[11].xxxx
> 44: SQRT TEMP[11].x, TEMP[11].xxxx
> 45: MUL TEMP[12].xyz, IN[4].xyzz, TEMP[9].xxxx
> 46: MAD TEMP[12].xyz, TEMP[0].xyzz, TEMP[9].yyyy, TEMP[12].xyzz
> 47: MAD TEMP[11].xyz, TEMP[1].xyzz, TEMP[11].xxxx, TEMP[12].xyzz
> 48: MOV TEMP[9].xyz, TEMP[11].xyzx
> 49: DP3 TEMP[12].x, TEMP[7].xyzz, TEMP[11].xyzz
> 50: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 51: ADD TEMP[12].x, TEMP[10].xxxx, -TEMP[12].xxxx
> 52: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 53: POW TEMP[12].x, TEMP[12].xxxx, IMM[1].yyyy
> 54: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 55: MUL TEMP[13].x, IMM[1].zzzz, TEMP[4].zzzz
> 56: ADD TEMP[13].x, TEMP[12].xxxx, -TEMP[13].xxxx
> 57: LRP TEMP[14].x, TEMP[4].zzzz, IMM[1].wwww, IMM[0].wwww
> 58: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[14].xxxx
> 59: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 60: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[13].xxxx
> 61: MUL TEMP[10].x, TEMP[10].xxxx, IMM[2].xxxx
> 62: MOV TEMP[9].w, TEMP[10].xxxx
> 63: MUL TEMP[0].x, TEMP[8].xxxx, TEMP[4].yyyy
> 64: DP3 TEMP[7].x, -TEMP[7].xyzz, TEMP[1].xyzz
> 65: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 66: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 67: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 68: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 69: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 70: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 71: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 72: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 73: MUL TEMP[7].x, TEMP[12].xxxx, TEMP[7].xxxx
> 74: MOV TEMP[0].y, TEMP[7].xxxx
> 75: MOV TEMP[8].w, IMM[0].wwww
> 76: MAD TEMP[8].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 77: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 78: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 79: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 80: ADD TEMP[1], TEMP[1], CONST[7]
> 81: MAD TEMP[8].x, IMM[2].zzzz, TEMP[4].zzzz, IMM[0].xxxx
> 82: EX2 TEMP[8].x, TEMP[8].xxxx
> 83: MOV TEMP[12].xyz, -CONST[1].xyzx
> 84: ADD TEMP[13].xyz, TEMP[12].xyzz, TEMP[2].xyzz
> 85: MUL TEMP[13].xyz, TEMP[13].xyzz, IMM[2].wwww
> 86: DP3 TEMP[14].x, TEMP[13].xyzz, TEMP[13].xyzz
> 87: RSQ TEMP[14].x, TEMP[14].xxxx
> 88: MUL TEMP[13].xyz, TEMP[13].xyzz, TEMP[14].xxxx
> 89: DP3 TEMP[14].x, TEMP[12].xyzz, TEMP[6].xyzz
> 90: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 91: MOV TEMP[15].xy, TEMP[1].xyyy
> 92: MOV TEMP[15].w, IMM[0].wwww
> 93: MOV TEMP[15].z, TEMP[1].zzzz
> 94: TXP TEMP[1], TEMP[15], SAMP[0], SHADOW2D
> 95: MOV TEMP[15].x, TEMP[1].xxxx
> 96: DP3 TEMP[15].x, TEMP[12].xyzz, TEMP[11].xyzz
> 97: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 98: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[15].xxxx
> 99: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>100: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
>101: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
>102: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>103: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>104: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[10].xxxx
>105: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
>106: MUL TEMP[1].xyz, TEMP[14].xxxx, TEMP[1].xyzz
>107: MOV TEMP[10].xyz, TEMP[6].xyzz
>108: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
>109: MOV TEMP[15], TEMP[10]
>110: DP3 TEMP[15].x, TEMP[6].xyzz, TEMP[2].xyzz
>111: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[6].xyzz
>112: MAD TEMP[15].xyz, IMM[0].xxxx, TEMP[15].xyzz, -TEMP[2].xyzz
>113: ADD TEMP[16].x, IMM[0].wwww, -TEMP[4].zzzz
>114: MUL TEMP[16].x, TEMP[16].xxxx, IMM[3].xxxx
>115: MOV TEMP[15].w, TEMP[16].xxxx
>116: DP3 TEMP[17].x, TEMP[2].xyzz, TEMP[6].xyzz
>117: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>118: ADD TEMP[17].x, IMM[0].wwww, -TEMP[17].xxxx
>119: POW TEMP[17].x, TEMP[17].xxxx, IMM[3].yyyy
>120: MAX TEMP[4].xyz, TEMP[4].zzzz, IMM[3].zzzz
>121: MUL TEMP[4].xyz, TEMP[17].xxxx, TEMP[4].xyzz
>122: MOV TEMP[15].xyz, TEMP[15].xyzz
>123: MOV TEMP[15].w, TEMP[16].xxxx
>124: TXL TEMP[15], TEMP[15], SAMP[2], CUBE
>125: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[15].xyzz
>126: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
>127: MUL TEMP[15].x, IMM[3].wwww, TEMP[0].xxxx
>128: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[15].xxxx, TEMP[1].xyzz
>129: DP3 TEMP[12].x, TEMP[12].xyzz, TEMP[13].xyzz
>130: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>131: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
>132: POW TEMP[12].x, TEMP[12].xxxx, IMM[3].yyyy
>133: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>134: ADD TEMP[12].x, TEMP[8].xxxx, IMM[0].xxxx
>135: MUL TEMP[12].x, TEMP[12].xxxx, IMM[4].xxxx
>136: MUL TEMP[15].x, -TEMP[8].xxxx, IMM[2].wwww
>137: EX2 TEMP[15].x, TEMP[15].xxxx
>138: ADD TEMP[15].x, IMM[0].xxxx, -TEMP[15].xxxx
>139: RCP TEMP[15].x, TEMP[15].xxxx
>140: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[15].xxxx
>141: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>142: DP3 TEMP[12].x, TEMP[6].xyzz, TEMP[13].xyzz
>143: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>144: POW TEMP[12].x, TEMP[12].xxxx, TEMP[8].xxxx
>145: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>146: DP3 TEMP[12].x, TEMP[2].xyzz, TEMP[6].xyzz
>147: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>148: MAX TEMP[12].x, TEMP[14].xxxx, TEMP[12].xxxx
>149: ADD TEMP[12].x, TEMP[12].xxxx, IMM[4].yyyy
>150: RCP TEMP[12].x, TEMP[12].xxxx
>151: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx, TEMP[4].xyzz
>152: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>153: MOV TEMP[7].x, IMM[5].xxxx
>154: BGNLOOP :0
>155:   ISGE TEMP[12].x, TEMP[7].xxxx, IMM[5].yyyy
>156:   UIF TEMP[12].xxxx :0
>157:     BRK
>158:   ENDIF
>159:   UMUL TEMP[13].x, TEMP[7].xxxx, IMM[5].zzzz
>160:   UARL ADDR[0].x, TEMP[13].xxxx
>161:   UARL ADDR[0].x, TEMP[13].xxxx
>162:   ADD TEMP[14].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>163:   DP3 TEMP[15].x, TEMP[14].xyzz, TEMP[14].xyzz
>164:   RSQ TEMP[16].x, TEMP[15].xxxx
>165:   MUL TEMP[17].xyz, TEMP[14].xyzz, TEMP[16].xxxx
>166:   ADD TEMP[18].xyz, TEMP[17].xyzz, TEMP[2].xyzz
>167:   MUL TEMP[19].xyz, TEMP[18].xyzz, IMM[2].wwww
>168:   DP3 TEMP[20].x, TEMP[19].xyzz, TEMP[19].xyzz
>169:   RSQ TEMP[21].x, TEMP[20].xxxx
>170:   MUL TEMP[22].xyz, TEMP[19].xyzz, TEMP[21].xxxx
>171:   DP3 TEMP[23].x, TEMP[17].xyzz, TEMP[6].xyzz
>172:   MOV_SAT TEMP[24].x, TEMP[23].xxxx
>173:   DP3 TEMP[25].x, TEMP[17].xyzz, TEMP[11].xyzz
>174:   MOV_SAT TEMP[26].x, TEMP[25].xxxx
>175:   ADD TEMP[27].x, TEMP[9].wwww, -TEMP[26].xxxx
>176:   MOV_SAT TEMP[28].x, TEMP[27].xxxx
>177:   MUL TEMP[29].x, TEMP[28].xxxx, TEMP[28].xxxx
>178:   UMAD TEMP[30].x, TEMP[7].xxxx, IMM[5].zzzz, IMM[5].wwww
>179:   MUL TEMP[31].x, TEMP[15].xxxx, TEMP[16].xxxx
>180:   UMUL TEMP[32].x, TEMP[7].xxxx, IMM[5].zzzz
>181:   UARL ADDR[0].x, TEMP[32].xxxx
>182:   MUL TEMP[33].x, TEMP[31].xxxx, CONST[ADDR[0].x+11].wwww
>183:   MOV_SAT TEMP[34].x, TEMP[33].xxxx
>184:   ADD TEMP[35].x, IMM[0].wwww, -TEMP[34].xxxx
>185:   UARL ADDR[0].x, TEMP[30].xxxx
>186:   MUL TEMP[36].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[35].xxxx
>187:   MUL TEMP[37].x, TEMP[29].xxxx, TEMP[29].xxxx
>188:   MOV_SAT TEMP[38].x, TEMP[37].xxxx
>189:   LRP TEMP[39].x, TEMP[16].xxxx, IMM[0].wwww, TEMP[38].xxxx
>190:   MUL TEMP[40].xyz, TEMP[36].xyzz, TEMP[39].xxxx
>191:   MUL TEMP[41].xyz, TEMP[40].xyzz, TEMP[5].yyyy
>192:   MUL TEMP[42].xyz, TEMP[24].xxxx, TEMP[41].xyzz
>193:   ADD TEMP[10].xyz, TEMP[10].xyzz, TEMP[42].xyzz
>194:   DP3 TEMP[43].x, TEMP[17].xyzz, TEMP[22].xyzz
>195:   MOV_SAT TEMP[44].x, TEMP[43].xxxx
>196:   ADD TEMP[45].x, IMM[0].wwww, -TEMP[44].xxxx
>197:   POW TEMP[46].x, TEMP[45].xxxx, IMM[3].yyyy
>198:   MUL TEMP[47].xyz, TEMP[42].xyzz, TEMP[46].xxxx
>199:   ADD TEMP[48].x, TEMP[8].xxxx, IMM[0].xxxx
>200:   MUL TEMP[49].x, TEMP[48].xxxx, IMM[4].xxxx
>201:   MUL TEMP[50].x, -TEMP[8].xxxx, IMM[2].wwww
>202:   EX2 TEMP[51].x, TEMP[50].xxxx
>203:   ADD TEMP[52].x, IMM[0].xxxx, -TEMP[51].xxxx
>204:   RCP TEMP[53].x, TEMP[52].xxxx
>205:   MUL TEMP[54].x, TEMP[49].xxxx, TEMP[53].xxxx
>206:   MUL TEMP[55].xyz, TEMP[47].xyzz, TEMP[54].xxxx
>207:   DP3 TEMP[56].x, TEMP[6].xyzz, TEMP[22].xyzz
>208:   MOV_SAT TEMP[57].x, TEMP[56].xxxx
>209:   POW TEMP[58].x, TEMP[57].xxxx, TEMP[8].xxxx
>210:   MUL TEMP[59].xyz, TEMP[55].xyzz, TEMP[58].xxxx
>211:   DP3 TEMP[60].x, TEMP[2].xyzz, TEMP[6].xyzz
>212:   MOV_SAT TEMP[61].x, TEMP[60].xxxx
>213:   MAX TEMP[62].x, TEMP[24].xxxx, TEMP[61].xxxx
>214:   ADD TEMP[63].x, TEMP[62].xxxx, IMM[4].yyyy
>215:   RCP TEMP[64].x, TEMP[63].xxxx
>216:   MUL TEMP[65].xyz, TEMP[59].xyzz, TEMP[64].xxxx
>217:   MAD TEMP[1].xyz, TEMP[65].xyzz, TEMP[0].yyyy, TEMP[1].xyzz
>218:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[5].wwww
>219: ENDLOOP :0
>220: MOV TEMP[1].x, CONST[19].wwww
>221: MOV TEMP[1].y, CONST[20].wwww
>222: MOV TEMP[1].z, CONST[21].wwww
>223: ADD TEMP[1].xyz, TEMP[1].xyzz, -IN[0].xyzz
>224: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>225: SQRT TEMP[2].x, TEMP[2].xxxx
>226: RCP TEMP[7].x, TEMP[2].xxxx
>227: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>228: MOV TEMP[7].yz, IMM[3].zzzz
>229: MAD TEMP[7].x, TEMP[2].xxxx, CONST[22].zzzz, CONST[22].wwww
>230: MOV TEMP[2].yz, IMM[3].zzzz
>231: MOV TEMP[2].x, IN[1].zzzz
>232: MOV TEMP[8].yz, IMM[3].zzzz
>233: MOV TEMP[12].xy, IN[1].xyyy
>234: MOV TEMP[12].w, IN[1].wwww
>235: TXP TEMP[12].w, TEMP[12], SAMP[3], 2D
>236: MUL TEMP[8].x, TEMP[12].wwww, TEMP[12].wwww
>237: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[11].xyzz
>238: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>239: ADD TEMP[9].x, TEMP[9].wwww, -TEMP[11].xxxx
>240: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>241: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[6].xyzz
>242: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>243: ADD TEMP[6].xyz, TEMP[7].xyzz, IMM[1].xxxx
>244: MUL TEMP[6].xyz, TEMP[6].xyzz, IMM[0].xxxx
>245: ADD TEMP[6].xyz, IMM[0].wwww, -TEMP[6].xyzz
>246: MOV_SAT TEMP[6].xyz, TEMP[6].xyzz
>247: MUL TEMP[6].xyz, TEMP[8].xyzz, TEMP[6].xyzz
>248: MOV_SAT TEMP[2].xyz, TEMP[2].xyzz
>249: MUL TEMP[2].x, TEMP[6].xyzz, TEMP[2].xyzz
>250: MUL TEMP[2].xyz, CONST[23].xyzz, TEMP[2].xxxx
>251: MUL TEMP[6].x, TEMP[9].xxxx, TEMP[9].xxxx
>252: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>253: MUL TEMP[5].x, TEMP[6].xxxx, TEMP[5].yyyy
>254: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>255: MAD TEMP[1].xyz, TEMP[1].xxxx, TEMP[2].xyzz, TEMP[10].xyzz
>256: MUL TEMP[0].xyz, TEMP[4].xyzz, TEMP[0].yyyy
>257: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[3].xyzz, TEMP[0].xyzz
>258: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>259: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].zzzz
>260: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>261: ADD TEMP[2].x, TEMP[2].xxxx, IMM[4].zzzz
>262: RCP TEMP[2].x, TEMP[2].xxxx
>263: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>264: FRC TEMP[2].x, CONST[1].wwww
>265: MUL TEMP[2].x, TEMP[2].xxxx, IMM[4].wwww
>266: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>267: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>268: MUL TEMP[1].x, IN[3].xxxx, TEMP[1].xxxx
>269: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>270: MOV TEMP[0].w, IN[0].wwww
>271: MOV OUT[0], TEMP[0]
>272: END
>radeonsi: Compiling shader 83
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 19, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 27, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 23, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fsub float %153, %49
>  %155 = fmul float %151, 2.000000e+00
>  %156 = fsub float %155, %50
>  %157 = fmul float %152, 2.000000e+00
>  %158 = fsub float %157, %51
>  %159 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %160 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %161 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %162 = load <8 x i32>, <8 x i32> addrspace(2)* %161, align 32, !invariant.load !0
>  %163 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %164 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %163, i64 0, i64 31, !amdgpu.uniform !0
>  %165 = load <4 x i32>, <4 x i32> addrspace(2)* %164, align 16, !invariant.load !0
>  %166 = extractelement <8 x i32> %162, i32 7
>  %167 = extractelement <4 x i32> %165, i32 0
>  %168 = and i32 %167, %166
>  %169 = insertelement <4 x i32> %165, i32 %168, i32 0
>  %170 = bitcast float %159 to i32
>  %171 = bitcast float %160 to i32
>  %172 = insertelement <2 x i32> undef, i32 %170, i32 0
>  %173 = insertelement <2 x i32> %172, i32 %171, i32 1
>  %174 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %173, <8 x i32> %162, <4 x i32> %169, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %175 = extractelement <4 x float> %174, i32 0
>  %176 = extractelement <4 x float> %174, i32 1
>  %177 = extractelement <4 x float> %174, i32 2
>  %178 = extractelement <4 x float> %174, i32 3
>  %179 = fadd float %177, -5.000000e-01
>  %180 = fadd float %176, -5.000000e-01
>  %181 = fmul float %179, 2.000000e+00
>  %182 = fmul float %180, 2.000000e+00
>  %183 = fmul float %178, 2.000000e+00
>  %184 = fmul float %181, %181
>  %185 = fmul float %182, %182
>  %186 = fadd float %184, %185
>  %187 = call float @llvm.AMDGPU.clamp.(float %186, float 0.000000e+00, float 1.000000e+00)
>  %188 = fsub float 1.000000e+00, %187
>  %189 = call float @llvm.sqrt.f32(float %188)
>  %190 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %191 = fmul float %190, %181
>  %192 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %193 = fmul float %192, %181
>  %194 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %195 = fmul float %194, %181
>  %196 = fmul float %23, %182
>  %197 = fadd float %196, %191
>  %198 = fmul float %24, %182
>  %199 = fadd float %198, %193
>  %200 = fmul float %25, %182
>  %201 = fadd float %200, %195
>  %202 = fmul float %59, %189
>  %203 = fadd float %202, %197
>  %204 = fmul float %60, %189
>  %205 = fadd float %204, %199
>  %206 = fmul float %61, %189
>  %207 = fadd float %206, %201
>  %208 = fmul float %154, %203
>  %209 = fmul float %156, %205
>  %210 = fadd float %209, %208
>  %211 = fmul float %158, %207
>  %212 = fadd float %210, %211
>  %213 = call float @llvm.AMDGPU.clamp.(float %212, float 0.000000e+00, float 1.000000e+00)
>  %214 = fsub float %183, %213
>  %215 = call float @llvm.AMDGPU.clamp.(float %214, float 0.000000e+00, float 1.000000e+00)
>  %216 = call float @llvm.pow.f32(float %215, float 3.000000e+00)
>  %217 = call float @llvm.AMDGPU.clamp.(float %216, float 0.000000e+00, float 1.000000e+00)
>  %218 = fmul float %98, 0x3FD3333340000000
>  %219 = fsub float %217, %218
>  %220 = fsub float 1.000000e+00, %98
>  %221 = fmul float %98, 2.000000e+01
>  %222 = fadd float %221, %220
>  %223 = fmul float %219, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fmul float %217, %224
>  %226 = fmul float %183, 0x3FF19999A0000000
>  %227 = fmul float %175, %97
>  %228 = fmul float %154, %59
>  %229 = fsub float -0.000000e+00, %228
>  %230 = fmul float %156, %60
>  %231 = fsub float %229, %230
>  %232 = fmul float %158, %61
>  %233 = fsub float %231, %232
>  %234 = fadd float %233, 1.000000e+00
>  %235 = fmul float %49, %59
>  %236 = fmul float %50, %60
>  %237 = fadd float %236, %235
>  %238 = fmul float %51, %61
>  %239 = fadd float %237, %238
>  %240 = fsub float 1.000000e+00, %239
>  %241 = call float @llvm.AMDGPU.clamp.(float %240, float 0.000000e+00, float 1.000000e+00)
>  %242 = fsub float %234, %241
>  %243 = call float @llvm.AMDGPU.clamp.(float %242, float 0.000000e+00, float 1.000000e+00)
>  %244 = fsub float 1.000000e+00, %243
>  %245 = fmul float %244, %244
>  %246 = fmul float %225, %245
>  %247 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %248 = fmul float %59, 0x4007700140000000
>  %249 = fadd float %248, %247
>  %250 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %251 = fmul float %60, 0x4007700140000000
>  %252 = fadd float %251, %250
>  %253 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %254 = fmul float %61, 0x4007700140000000
>  %255 = fadd float %254, %253
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 64)
>  %259 = fmul float %258, %249
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 68)
>  %261 = fmul float %260, %249
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 72)
>  %263 = fmul float %262, %249
>  %264 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %265 = load <16 x i8>, <16 x i8> addrspace(2)* %264, align 16, !invariant.load !0
>  %266 = call float @llvm.SI.load.const(<16 x i8> %265, i32 80)
>  %267 = fmul float %266, %252
>  %268 = fadd float %267, %259
>  %269 = call float @llvm.SI.load.const(<16 x i8> %265, i32 84)
>  %270 = fmul float %269, %252
>  %271 = fadd float %270, %261
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 88)
>  %275 = fmul float %274, %252
>  %276 = fadd float %275, %263
>  %277 = call float @llvm.SI.load.const(<16 x i8> %273, i32 96)
>  %278 = fmul float %277, %255
>  %279 = fadd float %278, %268
>  %280 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %281 = load <16 x i8>, <16 x i8> addrspace(2)* %280, align 16, !invariant.load !0
>  %282 = call float @llvm.SI.load.const(<16 x i8> %281, i32 100)
>  %283 = fmul float %282, %255
>  %284 = fadd float %283, %271
>  %285 = call float @llvm.SI.load.const(<16 x i8> %281, i32 104)
>  %286 = fmul float %285, %255
>  %287 = fadd float %286, %276
>  %288 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %289 = load <16 x i8>, <16 x i8> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = call float @llvm.SI.load.const(<16 x i8> %289, i32 112)
>  %291 = fadd float %279, %290
>  %292 = call float @llvm.SI.load.const(<16 x i8> %289, i32 116)
>  %293 = fadd float %284, %292
>  %294 = call float @llvm.SI.load.const(<16 x i8> %289, i32 120)
>  %295 = fadd float %287, %294
>  %296 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %297 = load <16 x i8>, <16 x i8> addrspace(2)* %296, align 16, !invariant.load !0
>  %298 = call float @llvm.SI.load.const(<16 x i8> %297, i32 16)
>  %299 = fsub float -0.000000e+00, %298
>  %300 = call float @llvm.SI.load.const(<16 x i8> %297, i32 20)
>  %301 = fsub float -0.000000e+00, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %297, i32 24)
>  %303 = fsub float -0.000000e+00, %302
>  %304 = fmul float %140, %299
>  %305 = fmul float %142, %301
>  %306 = fadd float %305, %304
>  %307 = fmul float %144, %303
>  %308 = fadd float %306, %307
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 3, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = bitcast float %295 to i32
>  %320 = bitcast float %291 to i32
>  %321 = bitcast float %293 to i32
>  %322 = insertelement <4 x i32> undef, i32 %319, i32 0
>  %323 = insertelement <4 x i32> %322, i32 %320, i32 1
>  %324 = insertelement <4 x i32> %323, i32 %321, i32 2
>  %325 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %324, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %326 = extractelement <4 x float> %325, i32 0
>  %327 = fmul float %203, %299
>  %328 = fmul float %205, %301
>  %329 = fadd float %328, %327
>  %330 = fmul float %207, %303
>  %331 = fadd float %329, %330
>  %332 = call float @llvm.AMDGPU.clamp.(float %331, float 0.000000e+00, float 1.000000e+00)
>  %333 = fsub float %226, %332
>  %334 = call float @llvm.AMDGPU.clamp.(float %333, float 0.000000e+00, float 1.000000e+00)
>  %335 = fmul float %326, %326
>  %336 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %337 = load <16 x i8>, <16 x i8> addrspace(2)* %336, align 16, !invariant.load !0
>  %338 = call float @llvm.SI.load.const(<16 x i8> %337, i32 48)
>  %339 = fmul float %338, %335
>  %340 = call float @llvm.SI.load.const(<16 x i8> %337, i32 52)
>  %341 = fmul float %340, %335
>  %342 = call float @llvm.SI.load.const(<16 x i8> %337, i32 56)
>  %343 = fmul float %342, %335
>  %344 = fmul float %334, %334
>  %345 = call float @llvm.AMDGPU.clamp.(float %344, float 0.000000e+00, float 1.000000e+00)
>  %346 = fmul float %339, %345
>  %347 = fmul float %341, %345
>  %348 = fmul float %343, %345
>  %349 = fmul float %346, %97
>  %350 = fmul float %347, %97
>  %351 = fmul float %348, %97
>  %352 = fmul float %309, %349
>  %353 = fmul float %309, %350
>  %354 = fmul float %309, %351
>  %355 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %356 = load <8 x i32>, <8 x i32> addrspace(2)* %355, align 32, !invariant.load !0
>  %357 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %358 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %357, i64 0, i64 7, !amdgpu.uniform !0
>  %359 = load <4 x i32>, <4 x i32> addrspace(2)* %358, align 16, !invariant.load !0
>  %360 = extractelement <8 x i32> %356, i32 7
>  %361 = extractelement <4 x i32> %359, i32 0
>  %362 = and i32 %361, %360
>  %363 = insertelement <4 x i32> %359, i32 %362, i32 0
>  %364 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %365 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %366 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %367 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %368 = call float @llvm.fabs.f32(float %366)
>  %369 = fdiv float 1.000000e+00, %368, !fpmath !1
>  %370 = fmul float %364, %369
>  %371 = fadd float %370, 1.500000e+00
>  %372 = fmul float %365, %369
>  %373 = fadd float %372, 1.500000e+00
>  %374 = bitcast float %373 to i32
>  %375 = bitcast float %371 to i32
>  %376 = bitcast float %367 to i32
>  %377 = insertelement <4 x i32> undef, i32 %374, i32 0
>  %378 = insertelement <4 x i32> %377, i32 %375, i32 1
>  %379 = insertelement <4 x i32> %378, i32 %376, i32 2
>  %380 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %379, <8 x i32> %356, <4 x i32> %363, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %381 = extractelement <4 x float> %380, i32 0
>  %382 = extractelement <4 x float> %380, i32 1
>  %383 = extractelement <4 x float> %380, i32 2
>  %384 = extractelement <4 x float> %380, i32 3
>  %385 = fmul float %140, %49
>  %386 = fmul float %142, %50
>  %387 = fadd float %386, %385
>  %388 = fmul float %144, %51
>  %389 = fadd float %387, %388
>  %390 = fmul float %389, %140
>  %391 = fmul float %389, %142
>  %392 = fmul float %389, %144
>  %393 = fmul float %390, 2.000000e+00
>  %394 = fsub float %393, %49
>  %395 = fmul float %391, 2.000000e+00
>  %396 = fsub float %395, %50
>  %397 = fmul float %392, 2.000000e+00
>  %398 = fsub float %397, %51
>  %399 = fsub float 1.000000e+00, %98
>  %400 = fmul float %399, 6.000000e+00
>  %401 = fmul float %49, %140
>  %402 = fmul float %50, %142
>  %403 = fadd float %402, %401
>  %404 = fmul float %51, %144
>  %405 = fadd float %403, %404
>  %406 = call float @llvm.AMDGPU.clamp.(float %405, float 0.000000e+00, float 1.000000e+00)
>  %407 = fsub float 1.000000e+00, %406
>  %408 = call float @llvm.pow.f32(float %407, float 5.000000e+00)
>  %409 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %410 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %411 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %412 = fmul float %408, %409
>  %413 = fmul float %408, %410
>  %414 = fmul float %408, %411
>  %415 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %416 = load <8 x i32>, <8 x i32> addrspace(2)* %415, align 32, !invariant.load !0
>  %417 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %418 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %417, i64 0, i64 11, !amdgpu.uniform !0
>  %419 = load <4 x i32>, <4 x i32> addrspace(2)* %418, align 16, !invariant.load !0
>  %420 = extractelement <8 x i32> %416, i32 7
>  %421 = extractelement <4 x i32> %419, i32 0
>  %422 = and i32 %421, %420
>  %423 = insertelement <4 x i32> %419, i32 %422, i32 0
>  %424 = call float @llvm.amdgcn.cubetc(float %394, float %396, float %398)
>  %425 = call float @llvm.amdgcn.cubesc(float %394, float %396, float %398)
>  %426 = call float @llvm.amdgcn.cubema(float %394, float %396, float %398)
>  %427 = call float @llvm.amdgcn.cubeid(float %394, float %396, float %398)
>  %428 = call float @llvm.fabs.f32(float %426)
>  %429 = fdiv float 1.000000e+00, %428, !fpmath !1
>  %430 = fmul float %424, %429
>  %431 = fadd float %430, 1.500000e+00
>  %432 = fmul float %425, %429
>  %433 = fadd float %432, 1.500000e+00
>  %434 = bitcast float %433 to i32
>  %435 = bitcast float %431 to i32
>  %436 = bitcast float %427 to i32
>  %437 = bitcast float %400 to i32
>  %438 = insertelement <4 x i32> undef, i32 %434, i32 0
>  %439 = insertelement <4 x i32> %438, i32 %435, i32 1
>  %440 = insertelement <4 x i32> %439, i32 %436, i32 2
>  %441 = insertelement <4 x i32> %440, i32 %437, i32 3
>  %442 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %441, <8 x i32> %416, <4 x i32> %423, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %443 = extractelement <4 x float> %442, i32 0
>  %444 = extractelement <4 x float> %442, i32 1
>  %445 = extractelement <4 x float> %442, i32 2
>  %446 = fmul float %412, %443
>  %447 = fmul float %413, %444
>  %448 = fmul float %414, %445
>  %449 = fmul float %381, %384
>  %450 = fmul float %382, %384
>  %451 = fmul float %383, %384
>  %452 = fmul float %227, 4.000000e+00
>  %453 = fmul float %449, %452
>  %454 = fadd float %453, %352
>  %455 = fmul float %450, %452
>  %456 = fadd float %455, %353
>  %457 = fmul float %451, %452
>  %458 = fadd float %457, %354
>  %459 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %460 = load <16 x i8>, <16 x i8> addrspace(2)* %459, align 16
>  br label %loop154
>
>loop154:                                          ; preds = %endif158, %main_body
>  %.012 = phi float [ %458, %main_body ], [ %544, %endif158 ]
>  %.011 = phi float [ %456, %main_body ], [ %543, %endif158 ]
>  %.010 = phi float [ %454, %main_body ], [ %542, %endif158 ]
>  %461 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %462 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %463 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %464 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %465 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %466 = icmp sgt i32 %461, 3
>  br i1 %466, label %endloop219, label %endif158
>
>endif158:                                         ; preds = %loop154
>  %467 = shl i32 %462, 5
>  %468 = shl i32 %462, 5
>  %469 = add i32 %468, 176
>  %470 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %469)
>  %471 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %472 = fsub float %470, %471
>  %473 = shl i32 %462, 5
>  %474 = add i32 %473, 180
>  %475 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %474)
>  %476 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %477 = fsub float %475, %476
>  %478 = add i32 %467, 184
>  %479 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %478)
>  %480 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %481 = fsub float %479, %480
>  %482 = fmul float %472, %472
>  %483 = fmul float %477, %477
>  %484 = fadd float %483, %482
>  %485 = fmul float %481, %481
>  %486 = fadd float %484, %485
>  %487 = call float @llvm.sqrt.f32(float %486)
>  %488 = fdiv float 1.000000e+00, %487, !fpmath !1
>  %489 = fmul float %472, %488
>  %490 = fmul float %477, %488
>  %491 = fmul float %481, %488
>  %492 = fmul float %489, %140
>  %493 = fmul float %490, %142
>  %494 = fadd float %493, %492
>  %495 = fmul float %491, %144
>  %496 = fadd float %494, %495
>  %497 = call float @llvm.AMDGPU.clamp.(float %496, float 0.000000e+00, float 1.000000e+00)
>  %498 = fmul float %489, %203
>  %499 = fmul float %490, %205
>  %500 = fadd float %499, %498
>  %501 = fmul float %491, %207
>  %502 = fadd float %500, %501
>  %503 = call float @llvm.AMDGPU.clamp.(float %502, float 0.000000e+00, float 1.000000e+00)
>  %504 = fsub float %226, %503
>  %505 = call float @llvm.AMDGPU.clamp.(float %504, float 0.000000e+00, float 1.000000e+00)
>  %506 = fmul float %505, %505
>  %507 = shl i32 %463, 1
>  %508 = or i32 %507, 1
>  %509 = fmul float %486, %488
>  %510 = shl i32 %464, 5
>  %511 = add i32 %510, 188
>  %512 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %511)
>  %513 = fmul float %509, %512
>  %514 = call float @llvm.AMDGPU.clamp.(float %513, float 0.000000e+00, float 1.000000e+00)
>  %515 = fsub float 1.000000e+00, %514
>  %516 = shl i32 %508, 4
>  %517 = add i32 %516, 176
>  %518 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %517)
>  %519 = fmul float %518, %515
>  %520 = shl i32 %508, 4
>  %521 = add i32 %520, 180
>  %522 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %521)
>  %523 = fmul float %522, %515
>  %524 = shl i32 %508, 4
>  %525 = add i32 %524, 184
>  %526 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %525)
>  %527 = fmul float %526, %515
>  %528 = fmul float %506, %506
>  %529 = call float @llvm.AMDGPU.clamp.(float %528, float 0.000000e+00, float 1.000000e+00)
>  %530 = fsub float 1.000000e+00, %488
>  %531 = fmul float %529, %530
>  %532 = fadd float %488, %531
>  %533 = fmul float %519, %532
>  %534 = fmul float %523, %532
>  %535 = fmul float %527, %532
>  %536 = fmul float %533, %97
>  %537 = fmul float %534, %97
>  %538 = fmul float %535, %97
>  %539 = fmul float %497, %536
>  %540 = fmul float %497, %537
>  %541 = fmul float %497, %538
>  %542 = fadd float %.010, %539
>  %543 = fadd float %.011, %540
>  %544 = fadd float %.012, %541
>  %545 = add i32 %465, 1
>  br label %loop154
>
>endloop219:                                       ; preds = %loop154
>  %546 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %547 = load <16 x i8>, <16 x i8> addrspace(2)* %546, align 16, !invariant.load !0
>  %548 = call float @llvm.SI.load.const(<16 x i8> %547, i32 316)
>  %549 = call float @llvm.SI.load.const(<16 x i8> %547, i32 332)
>  %550 = call float @llvm.SI.load.const(<16 x i8> %547, i32 348)
>  %551 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %552 = fsub float %548, %551
>  %553 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %554 = fsub float %549, %553
>  %555 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %556 = fsub float %550, %555
>  %557 = fmul float %552, %552
>  %558 = fmul float %554, %554
>  %559 = fadd float %558, %557
>  %560 = fmul float %556, %556
>  %561 = fadd float %559, %560
>  %562 = call float @llvm.sqrt.f32(float %561)
>  %563 = fdiv float 1.000000e+00, %562, !fpmath !1
>  %564 = fmul float %552, %563
>  %565 = fmul float %554, %563
>  %566 = fmul float %556, %563
>  %567 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %568 = load <16 x i8>, <16 x i8> addrspace(2)* %567, align 16, !invariant.load !0
>  %569 = call float @llvm.SI.load.const(<16 x i8> %568, i32 360)
>  %570 = call float @llvm.SI.load.const(<16 x i8> %568, i32 364)
>  %571 = fmul float %562, %569
>  %572 = fadd float %571, %570
>  %573 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %574 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %575 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %576 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %577 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %578 = load <8 x i32>, <8 x i32> addrspace(2)* %577, align 32, !invariant.load !0
>  %579 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %580 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %579, i64 0, i64 15, !amdgpu.uniform !0
>  %581 = load <4 x i32>, <4 x i32> addrspace(2)* %580, align 16, !invariant.load !0
>  %582 = extractelement <8 x i32> %578, i32 7
>  %583 = extractelement <4 x i32> %581, i32 0
>  %584 = and i32 %583, %582
>  %585 = insertelement <4 x i32> %581, i32 %584, i32 0
>  %586 = fdiv float %574, %576, !fpmath !1
>  %587 = fdiv float %575, %576, !fpmath !1
>  %588 = bitcast float %586 to i32
>  %589 = bitcast float %587 to i32
>  %590 = insertelement <2 x i32> undef, i32 %588, i32 0
>  %591 = insertelement <2 x i32> %590, i32 %589, i32 1
>  %592 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %591, <8 x i32> %578, <4 x i32> %585, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %593 = extractelement <4 x float> %592, i32 3
>  %594 = fmul float %593, %593
>  %595 = fmul float %564, %203
>  %596 = fmul float %565, %205
>  %597 = fadd float %596, %595
>  %598 = fmul float %566, %207
>  %599 = fadd float %597, %598
>  %600 = call float @llvm.AMDGPU.clamp.(float %599, float 0.000000e+00, float 1.000000e+00)
>  %601 = fsub float %226, %600
>  %602 = call float @llvm.AMDGPU.clamp.(float %601, float 0.000000e+00, float 1.000000e+00)
>  %603 = fmul float %564, %140
>  %604 = fmul float %565, %142
>  %605 = fadd float %604, %603
>  %606 = fmul float %566, %144
>  %607 = fadd float %605, %606
>  %608 = call float @llvm.AMDGPU.clamp.(float %607, float 0.000000e+00, float 1.000000e+00)
>  %609 = fadd float %572, -5.000000e-01
>  %610 = fmul float %609, 2.000000e+00
>  %611 = fsub float 1.000000e+00, %610
>  %612 = call float @llvm.AMDGPU.clamp.(float %611, float 0.000000e+00, float 1.000000e+00)
>  %613 = fmul float %594, %612
>  %614 = call float @llvm.AMDGPU.clamp.(float %573, float 0.000000e+00, float 1.000000e+00)
>  %615 = fmul float %613, %614
>  %616 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %617 = load <16 x i8>, <16 x i8> addrspace(2)* %616, align 16, !invariant.load !0
>  %618 = call float @llvm.SI.load.const(<16 x i8> %617, i32 368)
>  %619 = fmul float %618, %615
>  %620 = call float @llvm.SI.load.const(<16 x i8> %617, i32 372)
>  %621 = fmul float %620, %615
>  %622 = call float @llvm.SI.load.const(<16 x i8> %617, i32 376)
>  %623 = fmul float %622, %615
>  %624 = fmul float %602, %602
>  %625 = call float @llvm.AMDGPU.clamp.(float %624, float 0.000000e+00, float 1.000000e+00)
>  %626 = fmul float %625, %97
>  %627 = fmul float %619, %626
>  %628 = fmul float %621, %626
>  %629 = fmul float %623, %626
>  %630 = fmul float %608, %627
>  %631 = fadd float %630, %.010
>  %632 = fmul float %608, %628
>  %633 = fadd float %632, %.011
>  %634 = fmul float %608, %629
>  %635 = fadd float %634, %.012
>  %636 = fmul float %446, %246
>  %637 = fmul float %447, %246
>  %638 = fmul float %448, %246
>  %639 = fmul float %631, %78
>  %640 = fadd float %639, %636
>  %641 = fmul float %633, %79
>  %642 = fadd float %641, %637
>  %643 = fmul float %635, %80
>  %644 = fadd float %643, %638
>  %645 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %646 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %647 = load <16 x i8>, <16 x i8> addrspace(2)* %646, align 16, !invariant.load !0
>  %648 = call float @llvm.SI.load.const(<16 x i8> %647, i32 12)
>  %649 = fsub float %645, %648
>  %650 = call float @llvm.maxnum.f32(float %649, float 0.000000e+00)
>  %651 = call float @llvm.SI.load.const(<16 x i8> %647, i32 28)
>  %652 = call float @llvm.SI.load.const(<16 x i8> %647, i32 12)
>  %653 = fsub float %651, %652
>  %654 = fadd float %653, 0x3F50624DE0000000
>  %655 = fdiv float 1.000000e+00, %654, !fpmath !1
>  %656 = fmul float %650, %655
>  %657 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %658 = load <16 x i8>, <16 x i8> addrspace(2)* %657, align 16, !invariant.load !0
>  %659 = call float @llvm.SI.load.const(<16 x i8> %658, i32 28)
>  %660 = call float @llvm.floor.f32(float %659)
>  %661 = fsub float %659, %660
>  %662 = fmul float %661, 8.000000e+00
>  %663 = call float @llvm.pow.f32(float %656, float %662)
>  %664 = call float @llvm.AMDGPU.clamp.(float %663, float 0.000000e+00, float 1.000000e+00)
>  %665 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %666 = fmul float %665, %664
>  %667 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %668 = load <16 x i8>, <16 x i8> addrspace(2)* %667, align 16, !invariant.load !0
>  %669 = call float @llvm.SI.load.const(<16 x i8> %668, i32 32)
>  %670 = fsub float 1.000000e+00, %666
>  %671 = fmul float %640, %666
>  %672 = fmul float %669, %670
>  %673 = fadd float %671, %672
>  %674 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %675 = load <16 x i8>, <16 x i8> addrspace(2)* %674, align 16, !invariant.load !0
>  %676 = call float @llvm.SI.load.const(<16 x i8> %675, i32 36)
>  %677 = fsub float 1.000000e+00, %666
>  %678 = fmul float %642, %666
>  %679 = fmul float %676, %677
>  %680 = fadd float %678, %679
>  %681 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %682 = load <16 x i8>, <16 x i8> addrspace(2)* %681, align 16, !invariant.load !0
>  %683 = call float @llvm.SI.load.const(<16 x i8> %682, i32 40)
>  %684 = fsub float 1.000000e+00, %666
>  %685 = fmul float %644, %666
>  %686 = fmul float %683, %684
>  %687 = fadd float %685, %686
>  %688 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %689 = bitcast float %5 to i32
>  %690 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %689, 10
>  %691 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %690, float %673, 11
>  %692 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %691, float %680, 12
>  %693 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %692, float %687, 13
>  %694 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %693, float %688, 14
>  %695 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %694, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %695
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_buffer_load_dword s17, s[0:3], 0x1b                   ; C208811B
>	s_buffer_load_dword s14, s[0:3], 0x18                   ; C2070118
>	s_buffer_load_dword s15, s[0:3], 0x19                   ; C2078119
>	s_buffer_load_dword s16, s[0:3], 0x1a                   ; C208011A
>	s_buffer_load_dword s21, s[0:3], 0x1f                   ; C20A811F
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_buffer_load_dword s25, s[0:3], 0x23                   ; C20C8123
>	s_buffer_load_dword s20, s[0:3], 0x1e                   ; C20A011E
>	s_buffer_load_dword s18, s[0:3], 0x1c                   ; C209011C
>	s_buffer_load_dword s19, s[0:3], 0x1d                   ; C209811D
>	s_buffer_load_dword s24, s[0:3], 0x22                   ; C20C0122
>	s_buffer_load_dword s22, s[0:3], 0x20                   ; C20B0120
>	s_buffer_load_dword s23, s[0:3], 0x21                   ; C20B8121
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_buffer_load_dword s26, s[0:3], 0x24                   ; C20D0124
>	s_buffer_load_dword s27, s[0:3], 0x25                   ; C20D8125
>	s_buffer_load_dword s28, s[0:3], 0x3                    ; C20E0103
>	s_buffer_load_dword s30, s[0:3], 0x7                    ; C20F0107
>	s_buffer_load_dword s33, s[0:3], 0xb                    ; C210810B
>	s_buffer_load_dword s8, s[0:3], 0xf                     ; C204010F
>	s_buffer_load_dword s13, s[0:3], 0x17                   ; C2068117
>	s_buffer_load_dword s9, s[0:3], 0x10                    ; C2048110
>	s_buffer_load_dword s10, s[0:3], 0x11                   ; C2050111
>	s_buffer_load_dword s11, s[0:3], 0x12                   ; C2058112
>	s_buffer_load_dword s12, s[0:3], 0x13                   ; C2060113
>	s_buffer_load_dword s29, s[0:3], 0x4                    ; C20E8104
>	s_buffer_load_dword s31, s[0:3], 0x8                    ; C20F8108
>	s_buffer_load_dword s32, s[0:3], 0x9                    ; C2100109
>	s_buffer_load_dword s34, s[0:3], 0xc                    ; C211010C
>	s_buffer_load_dword s35, s[0:3], 0xd                    ; C211810D
>	s_buffer_load_dword s36, s[0:3], 0xe                    ; C212010E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_subrev_f32_e32 v7, s17, v9                            ; 0A0E1211
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v18, s21, v10                          ; 0A241415
>	v_mul_f32_e32 v20, s14, v7                              ; 10280E0E
>	v_mul_f32_e32 v21, s15, v7                              ; 102A0E0F
>	v_mul_f32_e32 v7, s16, v7                               ; 100E0E10
>	v_subrev_f32_e32 v19, s25, v11                          ; 0A261619
>	v_mac_f32_e32 v7, s20, v18                              ; 3E0E2414
>	v_mac_f32_e32 v20, s18, v18                             ; 3E282412
>	v_mac_f32_e32 v21, s19, v18                             ; 3E2A2413
>	v_mac_f32_e32 v7, s24, v19                              ; 3E0E2618
>	v_mac_f32_e32 v20, s22, v19                             ; 3E282616
>	v_mul_f32_e32 v22, 0.5, v7                              ; 102C0EF0
>	v_mac_f32_e32 v21, s23, v19                             ; 3E2A2617
>	v_mad_f32 v23, s26, v20, v22                            ; D2820017 045A281A
>	v_mac_f32_e32 v22, s27, v21                             ; 3E2C2A1B
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	v_mul_f32_e32 v0, s28, v9                               ; 1000121C
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_mac_f32_e32 v0, s30, v10                              ; 3E00141E
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	v_mac_f32_e32 v0, s33, v11                              ; 3E001621
>	v_mac_f32_e32 v0, s8, v12                               ; 3E001808
>	v_mul_f32_e32 v1, s13, v0                               ; 1002000D
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	s_waitcnt expcnt(0) lgkmcnt(0)                          ; BF8C000F
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mac_f32_e32 v1, s4, v7                                ; 3E020E04
>	exp 15, 33, 0, 0, 0, v23, v22, v1, v7                   ; F800021F 07011617
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v1, 2.0, v3, -1.0                             ; D2820001 03CE06F4
>	v_mad_f32 v3, 2.0, v4, -1.0                             ; D2820003 03CE08F4
>	v_mad_f32 v4, 2.0, v5, -1.0                             ; D2820004 03CE0AF4
>	v_add_f32_e32 v5, v6, v6                                ; 060A0D06
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mad_f32 v6, 2.0, v13, -1.0                            ; D2820006 03CE1AF4
>	v_mad_f32 v7, 2.0, v14, -1.0                            ; D2820007 03CE1CF4
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	v_mad_f32 v8, 2.0, v15, -1.0                            ; D2820008 03CE1EF4
>	v_mad_f32 v13, 0, v7, v6                                ; D282000D 041A0E80
>	v_mad_f32 v14, 0, v6, v7                                ; D282000E 041E0C80
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	v_mac_f32_e32 v13, 0, v8                                ; 3E1A1080
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v8, 0, v7                                 ; 3E100E80
>	v_mad_f32 v7, 0, v1, v3                                 ; D2820007 040E0280
>	v_mac_f32_e32 v8, 0, v6                                 ; 3E100C80
>	v_mad_f32 v6, 0, v3, v1                                 ; D2820006 04060680
>	v_mac_f32_e32 v6, 0, v4                                 ; 3E0C0880
>	v_mac_f32_e32 v7, 0, v4                                 ; 3E0E0880
>	v_mac_f32_e32 v4, 0, v3                                 ; 3E080680
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v3, s5, v9                                ; 10061205
>	v_mac_f32_e32 v4, 0, v1                                 ; 3E080280
>	v_mul_f32_e32 v1, s4, v9                                ; 10021204
>	v_mul_f32_e32 v9, s6, v9                                ; 10121206
>	v_mac_f32_e32 v9, s8, v10                               ; 3E121408
>	v_mac_f32_e32 v9, s0, v11                               ; 3E121600
>	v_mac_f32_e32 v1, s29, v10                              ; 3E02141D
>	v_mac_f32_e32 v3, s7, v10                               ; 3E061407
>	v_mac_f32_e32 v9, s36, v12                              ; 3E121824
>	v_mov_b32_e32 v10, s9                                   ; 7E140209
>	v_mac_f32_e32 v10, s10, v9                              ; 3E14120A
>	v_add_f32_e64 v10, v10, 0 clamp                         ; D206080A 0001010A
>	v_log_f32_e32 v10, v10                                  ; 7E144F0A
>	v_mac_f32_e32 v1, s31, v11                              ; 3E02161F
>	v_mac_f32_e32 v3, s32, v11                              ; 3E061620
>	v_sub_f32_e64 v11, 1.0, s12                             ; D208000B 000018F2
>	v_mul_legacy_f32_e32 v10, s11, v10                      ; 0E14140B
>	v_exp_f32_e32 v10, v10                                  ; 7E144B0A
>	v_mac_f32_e32 v11, s12, v10                             ; 3E16140C
>	v_mul_f32_e32 v10, v7, v8                               ; 10141107
>	v_mul_f32_e32 v15, v6, v14                              ; 101E1D06
>	v_mad_f32 v10, v14, v4, -v10                            ; D282000A 842A090E
>	v_mac_f32_e32 v1, s34, v12                              ; 3E021822
>	v_mac_f32_e32 v3, s35, v12                              ; 3E061823
>	v_mul_f32_e32 v12, v4, v13                              ; 10181B04
>	v_mul_f32_e32 v11, v11, v11                             ; 1016170B
>	v_mad_f32 v12, v8, v6, -v12                             ; D282000C 84320D08
>	v_mad_f32 v15, v13, v7, -v15                            ; D282000F 843E0F0D
>	v_mad_f32 v10, v5, v10, -v10                            ; D282000A 842A1505
>	v_mad_f32 v12, v5, v12, -v12                            ; D282000C 84321905
>	v_mad_f32 v5, v5, v15, -v15                             ; D2820005 843E1F05
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 34, 0, 0, 0, v16, v17, v18, v19                 ; F800022F 13121110
>	exp 15, 35, 0, 0, 0, v11, v0, v0, v0                    ; F800023F 0000000B
>	exp 15, 36, 0, 0, 0, v6, v7, v4, v10                    ; F800024F 0A040706
>	exp 15, 37, 0, 0, 0, v12, v5, v13, v14                  ; F800025F 0E0D050C
>	exp 15, 38, 0, 0, 0, v8, v0, v0, v0                     ; F800026F 00000008
>	exp 15, 12, 0, 1, 0, v1, v3, v9, v0                     ; F80008CF 00090301
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 696 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v16, v4, 3, 4, [m0]                             ; C8401304
>	v_interp_p2_f32 v16, [v16], v5, 3, 4, [m0]                      ; C8411305
>	v_interp_p1_f32 v21, v4, 0, 5, [m0]                             ; C8541404
>	v_interp_p2_f32 v21, [v21], v5, 0, 5, [m0]                      ; C8551405
>	v_interp_p1_f32 v22, v4, 1, 5, [m0]                             ; C8581504
>	v_interp_p2_f32 v22, [v22], v5, 1, 5, [m0]                      ; C8591505
>	v_interp_p1_f32 v1, v4, 2, 5, [m0]                              ; C8041604
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	v_interp_p2_f32 v1, [v1], v5, 2, 5, [m0]                        ; C8051605
>	v_interp_p1_f32 v2, v4, 3, 5, [m0]                              ; C8081704
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v2, [v2], v5, 3, 5, [m0]                        ; C8091705
>	v_interp_p1_f32 v7, v4, 0, 6, [m0]                              ; C81C1804
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v7, [v7], v5, 0, 6, [m0]                        ; C81D1805
>	v_interp_p1_f32 v10, v6, 0, 0, [m0]                             ; C8280006
>	v_interp_p2_f32 v10, [v10], v3, 0, 0, [m0]                      ; C8290003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v11, v6, 2, 0, [m0]                             ; C82C0206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v17, s12, v10                                     ; 0822140C
>	v_interp_p2_f32 v11, [v11], v3, 2, 0, [m0]                      ; C82D0203
>	v_sub_f32_e32 v18, s13, v0                                      ; 0824000D
>	v_mul_f32_e32 v8, v17, v17                                      ; 10102311
>	v_sub_f32_e32 v19, s14, v11                                     ; 0826160E
>	v_mac_f32_e32 v8, v18, v18                                      ; 3E102512
>	v_mac_f32_e32 v8, v19, v19                                      ; 3E102713
>	v_rsq_f32_e32 v20, v8                                           ; 7E285D08
>	v_mul_f32_e32 v8, v1, v1                                        ; 10100301
>	v_mac_f32_e32 v8, v2, v2                                        ; 3E100502
>	s_load_dwordx4 s[40:43], s[4:5], 0x4c                           ; C094054C
>	s_load_dwordx8 s[32:39], s[4:5], 0x40                           ; C0D00540
>	v_mac_f32_e32 v8, v7, v7                                        ; 3E100F07
>	v_rsq_f32_e32 v8, v8                                            ; 7E105D08
>	v_interp_p1_f32 v14, v6, 0, 2, [m0]                             ; C8380806
>	v_interp_p2_f32 v14, [v14], v3, 0, 2, [m0]                      ; C8390803
>	v_interp_p1_f32 v15, v6, 1, 2, [m0]                             ; C83C0906
>	v_interp_p2_f32 v15, [v15], v3, 1, 2, [m0]                      ; C83D0903
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	s_load_dwordx8 s[24:31], s[4:5], 0x50                           ; C0CC0550
>	s_load_dwordx4 s[48:51], s[4:5], 0x5c                           ; C098055C
>	s_load_dwordx4 s[44:47], s[4:5], 0x6c                           ; C096056C
>	v_mul_f32_e32 v28, v8, v1                                       ; 10380308
>	v_mul_f32_e32 v29, v8, v2                                       ; 103A0508
>	v_mul_f32_e32 v30, v8, v7                                       ; 103C0F08
>	image_sample v[7:9], v[14:15], s[32:39], s[40:43] dmask:0x7     ; F0800700 0148070E
>	s_load_dwordx8 s[32:39], s[4:5], 0x60                           ; C0D00560
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s48, s48, s31                                         ; 87301F30
>	v_mul_f32_e32 v31, v20, v17                                     ; 103E2314
>	v_mul_f32_e32 v32, v20, v18                                     ; 10402514
>	v_mul_f32_e32 v33, v20, v19                                     ; 10422714
>	s_and_b32 s44, s44, s39                                         ; 872C272C
>	image_sample v[1:2], v[14:15], s[32:39], s[44:47] dmask:0x6     ; F0800600 0168010E
>	image_sample v[14:15], v[14:15], s[24:31], s[48:51] dmask:0xa   ; F0800A00 01860E0E
>	v_interp_p1_f32 v24, v4, 0, 4, [m0]                             ; C8601004
>	v_interp_p2_f32 v24, [v24], v5, 0, 4, [m0]                      ; C8611005
>	v_interp_p1_f32 v25, v4, 1, 4, [m0]                             ; C8641104
>	v_interp_p2_f32 v25, [v25], v5, 1, 4, [m0]                      ; C8651105
>	v_interp_p1_f32 v26, v4, 2, 4, [m0]                             ; C8681204
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v23, v15, v15                                     ; 062E1F0F
>	v_mad_f32 v12, 2.0, v15, -1.0                                   ; D282000C 03CE1EF4
>	v_add_f32_e32 v15, v14, v14                                     ; 061E1D0E
>	v_mad_f32 v14, 2.0, v14, -1.0                                   ; D282000E 03CE1CF4
>	v_mad_f32 v15, v15, v14, -v14                                   ; D282000F 843A1D0F
>	v_interp_p2_f32 v26, [v26], v5, 2, 4, [m0]                      ; C8691205
>	v_mad_f32 v5, v23, v25, -v25                                    ; D2820005 84663317
>	v_mad_f32 v4, v23, v26, -v26                                    ; D2820004 846A3517
>	v_mac_f32_e32 v15, v12, v12                                     ; 3E1E190C
>	v_mad_f32 v12, v23, v24, -v24                                   ; D282000C 84623117
>	v_mac_f32_e32 v12, v14, v16                                     ; 3E18210E
>	v_mac_f32_e32 v5, v14, v21                                      ; 3E0A2B0E
>	v_mac_f32_e32 v4, v14, v22                                      ; 3E082D0E
>	v_add_f32_e64 v14, v15, 0 clamp                                 ; D206080E 0001010F
>	v_sub_f32_e32 v14, 0x3f8020c5, v14                              ; 081C1CFF 3F8020C5
>	v_sqrt_f32_e32 v14, v14                                         ; 7E1C670E
>	v_mac_f32_e32 v12, v14, v28                                     ; 3E18390E
>	v_mac_f32_e32 v5, v14, v29                                      ; 3E0A3B0E
>	v_mul_f32_e32 v23, v31, v12                                     ; 102E191F
>	v_mac_f32_e32 v4, v14, v30                                      ; 3E083D0E
>	v_mac_f32_e32 v23, v32, v5                                      ; 3E2E0B20
>	v_mac_f32_e32 v23, v33, v4                                      ; 3E2E0921
>	v_mul_f32_e32 v14, v12, v23                                     ; 101C2F0C
>	v_mac_f32_e32 v14, v12, v23                                     ; 3E1C2F0C
>	v_mad_f32 v34, -v17, v20, v14                                   ; D2820022 243A2911
>	v_mul_f32_e32 v14, v5, v23                                      ; 101C2F05
>	v_mac_f32_e32 v14, v5, v23                                      ; 3E1C2F05
>	s_load_dwordx8 s[12:19], s[4:5], 0x70                           ; C0C60570
>	s_load_dwordx4 s[20:23], s[4:5], 0x7c                           ; C08A057C
>	v_mad_f32 v35, -v18, v20, v14                                   ; D2820023 243A2912
>	v_mul_f32_e32 v14, v4, v23                                      ; 101C2F04
>	v_mac_f32_e32 v14, v4, v23                                      ; 3E1C2F04
>	v_mad_f32 v36, -v19, v20, v14                                   ; D2820024 243A2913
>	v_interp_p1_f32 v14, v6, 2, 2, [m0]                             ; C8380A06
>	v_interp_p2_f32 v14, [v14], v3, 2, 2, [m0]                      ; C8390A03
>	v_interp_p1_f32 v15, v6, 3, 2, [m0]                             ; C83C0B06
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_interp_p2_f32 v15, [v15], v3, 3, 2, [m0]                      ; C83D0B03
>	image_sample v[17:20], v[14:15], s[12:19], s[20:23] dmask:0xf   ; F0800F00 00A3110E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v14, -0.5, v19                                    ; 061C26F1
>	v_add_f32_e32 v19, v14, v14                                     ; 06261D0E
>	v_add_f32_e32 v14, -0.5, v18                                    ; 061C24F1
>	v_add_f32_e32 v18, v14, v14                                     ; 06241D0E
>	v_mul_f32_e32 v14, v19, v24                                     ; 101C3113
>	v_mul_f32_e32 v15, v19, v25                                     ; 101E3313
>	v_mac_f32_e32 v14, v18, v16                                     ; 3E1C2112
>	v_mul_f32_e32 v16, v19, v26                                     ; 10203513
>	v_mac_f32_e32 v15, v18, v21                                     ; 3E1E2B12
>	v_mac_f32_e32 v16, v18, v22                                     ; 3E202D12
>	v_mul_f32_e32 v18, v18, v18                                     ; 10242512
>	v_mac_f32_e32 v18, v19, v19                                     ; 3E242713
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_sub_f32_e32 v18, 1.0, v18                                     ; 082424F2
>	v_sqrt_f32_e32 v18, v18                                         ; 7E246712
>	v_mac_f32_e32 v14, v18, v28                                     ; 3E1C3912
>	v_mac_f32_e32 v15, v18, v29                                     ; 3E1E3B12
>	v_mac_f32_e32 v16, v18, v30                                     ; 3E203D12
>	v_mul_f32_e32 v18, v14, v34                                     ; 1024450E
>	s_buffer_load_dword s12, s[0:3], 0x10                           ; C2060110
>	v_mac_f32_e32 v18, v15, v35                                     ; 3E24470F
>	v_mac_f32_e32 v18, v16, v36                                     ; 3E244910
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v39, v1, v17                                      ; 104E2301
>	s_buffer_load_dword s52, s[0:3], 0x11                           ; C21A0111
>	s_buffer_load_dword s53, s[0:3], 0x12                           ; C21A8112
>	v_mov_b32_e32 v17, 0x403b800a                                   ; 7E2202FF 403B800A
>	v_mad_f32 v37, 2.0, v20, -v18                                   ; D2820025 844A28F4
>	v_mad_f32 v18, v17, v28, v10                                    ; D2820012 042A3911
>	s_buffer_load_dword s13, s[0:3], 0x14                           ; C2068114
>	s_buffer_load_dword s14, s[0:3], 0x15                           ; C2070115
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v19, s12, v18                                     ; 1026240C
>	s_buffer_load_dword s15, s[0:3], 0x16                           ; C2078116
>	s_buffer_load_dword s12, s[0:3], 0x18                           ; C2060118
>	v_add_f32_e32 v38, v20, v20                                     ; 064C2914
>	v_mul_f32_e32 v20, s52, v18                                     ; 10282434
>	v_mul_f32_e32 v21, s53, v18                                     ; 102A2435
>	v_mad_f32 v18, v17, v29, v0                                     ; D2820012 04023B11
>	v_mac_f32_e32 v19, s13, v18                                     ; 3E26240D
>	v_mac_f32_e32 v20, s14, v18                                     ; 3E28240E
>	v_mad_f32 v17, v17, v30, v11                                    ; D2820011 042E3D11
>	s_buffer_load_dword s13, s[0:3], 0x19                           ; C2068119
>	s_buffer_load_dword s14, s[0:3], 0x1a                           ; C207011A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v21, s15, v18                                     ; 3E2A240F
>	v_mac_f32_e32 v19, s12, v17                                     ; 3E26220C
>	s_buffer_load_dword s15, s[0:3], 0x1c                           ; C207811C
>	s_buffer_load_dword s16, s[0:3], 0x1d                           ; C208011D
>	s_buffer_load_dword s12, s[0:3], 0x1e                           ; C206011E
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                            ; C0CA0500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                            ; C08E050C
>	v_mac_f32_e32 v20, s13, v17                                     ; 3E28220D
>	v_mac_f32_e32 v21, s14, v17                                     ; 3E2A220E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v18, s15, v19                                     ; 0624260F
>	v_add_f32_e32 v19, s16, v20                                     ; 06262810
>	v_add_f32_e32 v17, s12, v21                                     ; 06222A0C
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	image_sample_c v40, v[17:20], s[20:27], s[28:31] dmask:0x1      ; F0A00100 00E52811
>	v_cubema_f32 v17, v12, v5, v4                                   ; D28E0011 04120B0C
>	v_rcp_f32_e64 v18, |v17|                                        ; D3540112 00000111
>	v_cubetc_f32 v19, v12, v5, v4                                   ; D28C0013 04120B0C
>	v_mov_b32_e32 v17, 0x3fc00000                                   ; 7E2202FF 3FC00000
>	v_cubesc_f32 v20, v12, v5, v4                                   ; D28A0014 04120B0C
>	v_mad_f32 v22, v18, v19, v17                                    ; D2820016 04462712
>	v_mad_f32 v21, v18, v20, v17                                    ; D2820015 04462912
>	v_mov_b32_e32 v18, 0x40c00000                                   ; 7E2402FF 40C00000
>	v_mad_f32 v20, -v2, v18, v18                                    ; D2820014 244A2502
>	v_add_f32_e64 v18, v23, 0 clamp                                 ; D2060812 00010117
>	v_sub_f32_e32 v18, 1.0, v18                                     ; 082424F2
>	v_log_f32_e32 v18, v18                                          ; 7E244F12
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                           ; C0C60510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                           ; C090051C
>	s_load_dwordx4 s[28:31], s[4:5], 0x2c                           ; C08E052C
>	v_mul_legacy_f32_e32 v18, 0x40a00000, v18                       ; 0E2424FF 40A00000
>	v_exp_f32_e32 v19, v18                                          ; 7E264B12
>	v_cubema_f32 v18, v34, v35, v36                                 ; D28E0012 04924722
>	v_rcp_f32_e64 v23, |v18|                                        ; D3540117 00000112
>	s_load_dwordx8 s[20:27], s[4:5], 0x20                           ; C0CA0520
>	v_cubetc_f32 v18, v34, v35, v36                                 ; D28C0012 04924722
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	v_cubesc_f32 v25, v34, v35, v36                                 ; D28A0019 04924722
>	v_max_f32_e32 v24, 0, v2                                        ; 20300480
>	v_mad_f32 v18, v23, v18, v17                                    ; D2820012 04462517
>	v_mac_f32_e32 v17, v23, v25                                     ; 3E223317
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v23, v12, v5, v4                                   ; D2880017 04120B0C
>	v_mul_f32_e32 v41, v24, v19                                     ; 10522718
>	image_sample v[21:24], v[21:24], s[12:19], s[32:35] dmask:0xf   ; F0800F00 01031515
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v19, v34, v35, v36                                 ; D2880013 04924722
>	s_buffer_load_dword s12, s[0:3], 0x6                            ; C2060106
>	image_sample_l v[25:27], v[17:20], s[20:27], s[28:31] dmask:0x7 ; F0900700 00E51911
>	v_mul_f32_e32 v17, v28, v34                                     ; 1022451C
>	v_mad_f32 v17, -v35, v29, -v17                                  ; D2820011 A4463B23
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v20, v27, v41                                     ; 1028531B
>	v_mad_f32 v27, -v36, v30, v17                                   ; D282001B 24463D24
>	v_mul_f32_e32 v17, s9, v14                                      ; 10221C09
>	v_mad_f32 v17, v15, -s8, -v17                                   ; D2820011 C444110F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v17, -v16, s12, v17                                   ; D2820011 24441910
>	s_buffer_load_dword s13, s[0:3], 0xc                            ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                            ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                            ; C207810E
>	v_mul_f32_e32 v18, v25, v41                                     ; 10245319
>	v_mul_f32_e32 v19, v26, v41                                     ; 1026531A
>	v_mul_f32_e32 v25, v24, v21                                     ; 10322B18
>	v_mul_f32_e32 v26, v24, v22                                     ; 10342D18
>	v_mul_f32_e32 v23, v24, v23                                     ; 102E2F18
>	v_mul_f32_e32 v24, v28, v31                                     ; 10303F1C
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_mov_b32_e32 v28, 0x3f8ccccd                                   ; 7E3802FF 3F8CCCCD
>	v_mad_f32 v17, v38, v28, -v17                                   ; D2820011 84463926
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_mul_f32_e32 v17, v17, v17                                     ; 10222311
>	v_mul_f32_e32 v21, v40, v40                                     ; 102A5128
>	v_mac_f32_e32 v24, v29, v32                                     ; 3E30411D
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v22, s13, v21                                     ; 102C2A0D
>	v_mul_f32_e32 v29, s14, v21                                     ; 103A2A0E
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_mul_f32_e32 v21, s15, v21                                     ; 102A2A0F
>	v_mul_f32_e32 v29, v17, v29                                     ; 103A3B11
>	v_mul_f32_e32 v22, v17, v22                                     ; 102C2D11
>	v_mul_f32_e32 v17, v17, v21                                     ; 10222B11
>	v_mul_f32_e32 v21, s9, v12                                      ; 102A1809
>	v_mad_f32 v21, v5, -s8, -v21                                    ; D2820015 C4541105
>	v_mad_f32 v21, -v4, s12, v21                                    ; D2820015 24541904
>	v_mac_f32_e32 v24, v30, v33                                     ; 3E30431E
>	v_add_f32_e64 v30, v21, 0 clamp                                 ; D206081E 00010115
>	v_mul_f32_e32 v21, v1, v22                                      ; 102A2D01
>	v_mul_f32_e32 v17, v1, v17                                      ; 10222301
>	v_mul_f32_e32 v29, v1, v29                                      ; 103A3B01
>	v_mul_f32_e32 v22, v21, v30                                     ; 102C3D15
>	v_mul_f32_e32 v21, v29, v30                                     ; 102A3D1D
>	v_mul_f32_e32 v29, 4.0, v39                                     ; 103A4EF6
>	v_mul_f32_e32 v17, v17, v30                                     ; 10223D11
>	v_mac_f32_e32 v17, v29, v23                                     ; 3E222F1D
>	v_add_f32_e64 v23, v37, 0 clamp                                 ; D2060817 00010125
>	v_log_f32_e32 v23, v23                                          ; 7E2E4F17
>	v_mac_f32_e32 v21, v29, v26                                     ; 3E2A351D
>	v_sub_f32_e32 v26, 1.0, v2                                      ; 083404F2
>	v_mac_f32_e32 v22, v29, v25                                     ; 3E2C331D
>	v_mul_legacy_f32_e32 v23, 0x40400000, v23                       ; 0E2E2EFF 40400000
>	v_exp_f32_e32 v23, v23                                          ; 7E2E4B17
>	v_add_f32_e64 v23, v23, 0 clamp                                 ; D2060817 00010117
>	v_mov_b32_e32 v25, v23                                          ; 7E320317
>	v_sub_f32_e32 v24, 1.0, v24                                     ; 083030F2
>	v_mac_f32_e32 v25, 0xbe99999a, v2                               ; 3E3204FF BE99999A
>	v_mac_f32_e32 v26, 0x41a00000, v2                               ; 3E3404FF 41A00000
>	v_mul_f32_e32 v2, v26, v25                                      ; 1004331A
>	v_add_f32_e32 v25, 1.0, v27                                     ; 063236F2
>	v_add_f32_e64 v24, v24, 0 clamp                                 ; D2060818 00010118
>	v_subrev_f32_e32 v24, v24, v25                                  ; 0A303318
>	v_add_f32_e64 v24, v24, 0 clamp                                 ; D2060818 00010118
>	v_add_f32_e64 v2, v2, 0 clamp                                   ; D2060802 00010102
>	v_sub_f32_e32 v25, 1.0, v24                                     ; 083230F2
>	v_mul_f32_e32 v2, v2, v23                                       ; 10042F02
>	v_mad_f32 v24, -v24, v25, v25                                   ; D2820018 24663318
>	v_mul_f32_e32 v2, v24, v2                                       ; 10040518
>	v_mul_f32_e32 v23, v28, v38                                     ; 102E4D1C
>	v_mov_b32_e32 v24, 0xc8                                         ; 7E3002FF 000000C8
>	v_mov_b32_e32 v25, 0                                            ; 7E320280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v26, vcc, 0xffffffe8, v24                         ; 4A3430FF FFFFFFE8
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_add_i32_e32 v27, vcc, 0xffffffec, v24                         ; 4A3630FF FFFFFFEC
>	buffer_load_dword v27, v27, s[0:3], 0 offen                     ; E0301000 80001B1B
>	v_add_i32_e32 v28, vcc, -16, v24                                ; 4A3830D0
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v29, vcc, -12, v24                                ; 4A3A30CC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -8, v24                                 ; 4A3C30C8
>	v_add_i32_e32 v25, vcc, 1, v25                                  ; 4A323281
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v26, v10, v26                                  ; 0A34350A
>	v_mul_f32_e32 v31, v26, v26                                     ; 103E351A
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v27, v0, v27                                   ; 0A363700
>	v_mac_f32_e32 v31, v27, v27                                     ; 3E3E371B
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v28, v11, v28                                  ; 0A38390B
>	v_mac_f32_e32 v31, v28, v28                                     ; 3E3E391C
>	v_rsq_f32_e32 v32, v31                                          ; 7E405D1F
>	v_mul_f32_e32 v26, v32, v26                                     ; 10343520
>	v_mul_f32_e32 v33, v14, v26                                     ; 1042350E
>	v_mul_f32_e32 v27, v32, v27                                     ; 10363720
>	v_mul_f32_e32 v26, v12, v26                                     ; 1034350C
>	v_mul_f32_e32 v28, v32, v28                                     ; 10383920
>	v_mac_f32_e32 v33, v15, v27                                     ; 3E42370F
>	v_mac_f32_e32 v26, v5, v27                                      ; 3E343705
>	v_mac_f32_e32 v33, v16, v28                                     ; 3E423910
>	v_mac_f32_e32 v26, v4, v28                                      ; 3E343904
>	v_add_i32_e32 v28, vcc, -4, v24                                 ; 4A3830C4
>	buffer_load_dword v27, v30, s[0:3], 0 offen                     ; E0301000 80001B1E
>	buffer_load_dword v30, v24, s[0:3], 0 offen                     ; E0301000 80001E18
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_subrev_f32_e32 v33, v33, v23                                  ; 0A422F21
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_mul_f32_e32 v33, v33, v33                                     ; 10424321
>	v_mul_f32_e32 v31, v32, v31                                     ; 103E3F20
>	v_mul_f32_e32 v33, v33, v33                                     ; 10424321
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_mul_f32_e32 v29, v29, v31                                     ; 103A3F1D
>	v_add_f32_e64 v29, v29, 0 clamp                                 ; D206081D 0001011D
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_sub_f32_e32 v34, 1.0, v32                                     ; 084440F2
>	v_mac_f32_e32 v32, v34, v33                                     ; 3E404322
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_add_i32_e32 v24, vcc, 32, v24                                 ; 4A3030A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v27, -v29, v27, v27                                   ; D282001B 246E371D
>	v_mul_f32_e32 v27, v32, v27                                     ; 10363720
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v28, -v29, v28, v28                                   ; D282001C 2472391D
>	v_mad_f32 v29, -v29, v30, v30                                   ; D282001D 247A3D1D
>	v_mul_f32_e32 v27, v1, v27                                      ; 10363701
>	v_mul_f32_e32 v28, v32, v28                                     ; 10383920
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v22, v27, v26                                     ; 3E2C351B
>	v_mul_f32_e32 v27, v1, v28                                      ; 10363901
>	v_mul_f32_e32 v28, v1, v29                                      ; 10383B01
>	v_mac_f32_e32 v21, v27, v26                                     ; 3E2A351B
>	v_mac_f32_e32 v17, v28, v26                                     ; 3E22351C
>	v_cmp_lt_i32_e32 vcc, 3, v25                                    ; 7D023283
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s8, s[0:3], 0x4f                            ; C204014F
>	s_buffer_load_dword s9, s[0:3], 0x53                            ; C2048153
>	s_buffer_load_dword s12, s[0:3], 0x57                           ; C2060157
>	s_buffer_load_dword s14, s[0:3], 0x5b                           ; C207015B
>	s_buffer_load_dword s13, s[0:3], 0x5a                           ; C206815A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v10, s8, v10                                      ; 08141408
>	v_sub_f32_e32 v24, s9, v0                                       ; 08300009
>	v_mul_f32_e32 v25, v10, v10                                     ; 1032150A
>	v_sub_f32_e32 v11, s12, v11                                     ; 0816160C
>	v_mac_f32_e32 v25, v24, v24                                     ; 3E323118
>	v_mac_f32_e32 v25, v11, v11                                     ; 3E32170B
>	v_sqrt_f32_e32 v26, v25                                         ; 7E346719
>	v_rsq_f32_e32 v25, v25                                          ; 7E325D19
>	v_mov_b32_e32 v28, s14                                          ; 7E38020E
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_mac_f32_e32 v28, s13, v26                                     ; 3E38340D
>	v_interp_p1_f32 v26, v6, 2, 1, [m0]                             ; C8680606
>	v_mul_f32_e32 v27, v25, v10                                     ; 10361519
>	v_interp_p2_f32 v26, [v26], v3, 2, 1, [m0]                      ; C8690603
>	v_interp_p1_f32 v10, v6, 0, 1, [m0]                             ; C8280406
>	v_mul_f32_e32 v24, v25, v24                                     ; 10303119
>	v_mul_f32_e32 v25, v25, v11                                     ; 10321719
>	v_interp_p2_f32 v10, [v10], v3, 0, 1, [m0]                      ; C8290403
>	v_interp_p1_f32 v11, v6, 1, 1, [m0]                             ; C82C0506
>	v_interp_p2_f32 v11, [v11], v3, 1, 1, [m0]                      ; C82D0503
>	v_interp_p1_f32 v29, v6, 3, 1, [m0]                             ; C8740706
>	v_interp_p2_f32 v29, [v29], v3, 3, 1, [m0]                      ; C8750703
>	v_mov_b32_e32 v30, 0x6f800000                                   ; 7E3C02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v30, |v29|                                ; D002026A 00023B1E
>	v_mov_b32_e32 v30, 0x2f800000                                   ; 7E3C02FF 2F800000
>	v_cndmask_b32_e32 v30, 1.0, v30, vcc                            ; 003C3CF2
>	v_mul_f32_e32 v29, v30, v29                                     ; 103A3B1E
>	v_rcp_f32_e32 v29, v29                                          ; 7E3A551D
>	s_load_dwordx8 s[12:19], s[4:5], 0x30                           ; C0C60530
>	s_load_dwordx4 s[20:23], s[4:5], 0x3c                           ; C08A053C
>	v_mul_f32_e32 v10, v29, v10                                     ; 1014151D
>	v_mul_f32_e32 v11, v29, v11                                     ; 1016171D
>	v_mul_f32_e32 v10, v10, v30                                     ; 10143D0A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_mul_f32_e32 v11, v11, v30                                     ; 10163D0B
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	image_sample v10, v[10:11], s[12:19], s[20:23] dmask:0x8        ; F0800800 00A30A0A
>	v_mul_f32_e32 v11, v14, v27                                     ; 1016370E
>	v_mac_f32_e32 v11, v15, v24                                     ; 3E16310F
>	v_mul_f32_e32 v12, v12, v27                                     ; 1018370C
>	v_mac_f32_e32 v12, v5, v24                                      ; 3E183105
>	v_mac_f32_e32 v11, v16, v25                                     ; 3E163310
>	v_mac_f32_e32 v12, v4, v25                                      ; 3E183304
>	v_add_f32_e64 v4, v11, 0 clamp                                  ; D2060804 0001010B
>	v_subrev_f32_e32 v4, v4, v23                                    ; 0A082F04
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	v_mul_f32_e32 v4, v4, v4                                        ; 10080904
>	v_add_f32_e32 v5, -0.5, v28                                     ; 060A38F1
>	s_buffer_load_dword s4, s[0:3], 0x5c                            ; C202015C
>	v_mad_f32 v5, v5, -2.0, 1.0                                     ; D2820005 03C9EB05
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	s_buffer_load_dword s5, s[0:3], 0x5d                            ; C202815D
>	v_mul_f32_e32 v1, v1, v4                                        ; 10020901
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v4, v10, v10                                      ; 1008150A
>	v_add_f32_e64 v5, v5, 0 clamp                                   ; D2060805 00010105
>	v_mul_f32_e32 v4, v5, v4                                        ; 10080905
>	v_add_f32_e64 v5, v26, 0 clamp                                  ; D2060805 0001011A
>	s_buffer_load_dword s6, s[0:3], 0x5e                            ; C203015E
>	v_mul_f32_e32 v4, v5, v4                                        ; 10080905
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v5, s4, v4                                        ; 100A0804
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mul_f32_e32 v10, s5, v4                                       ; 10140805
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v4, s6, v4                                        ; 10080806
>	v_mul_f32_e32 v5, v1, v5                                        ; 100A0B01
>	v_mul_f32_e32 v10, v1, v10                                      ; 10141501
>	v_mul_f32_e32 v1, v1, v4                                        ; 10020901
>	v_add_f32_e64 v4, v12, 0 clamp                                  ; D2060804 0001010C
>	v_mac_f32_e32 v22, v5, v4                                       ; 3E2C0905
>	v_mac_f32_e32 v17, v1, v4                                       ; 3E220901
>	v_mul_f32_e32 v1, v2, v18                                       ; 10022502
>	v_mul_f32_e32 v5, v2, v20                                       ; 100A2902
>	v_mac_f32_e32 v21, v10, v4                                      ; 3E2A090A
>	v_mul_f32_e32 v4, v2, v19                                       ; 10082702
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_floor_f32_e32 v2, s5                                          ; 7E044805
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_mul_f32_e32 v2, 0x41000000, v2                                ; 100404FF 41000000
>	v_mul_legacy_f32_e32 v0, v2, v0                                 ; 0E000102
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	v_interp_p1_f32 v2, v6, 0, 3, [m0]                              ; C8080C06
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v2, [v2], v3, 0, 3, [m0]                        ; C8090C03
>	v_mac_f32_e32 v1, v7, v22                                       ; 3E022D07
>	v_mul_f32_e32 v7, v0, v2                                        ; 100E0500
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v7, s6, s6                                       ; D2820000 20180D07
>	v_mac_f32_e32 v0, v7, v1                                        ; 3E000307
>	v_mac_f32_e32 v4, v8, v21                                       ; 3E082B08
>	v_mad_f32 v1, -v7, s7, s7                                       ; D2820001 201C0F07
>	v_mac_f32_e32 v1, v7, v4                                        ; 3E020907
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mac_f32_e32 v5, v9, v17                                       ; 3E0A2309
>	v_mad_f32 v2, -v7, s0, s0                                       ; D2820002 20000107
>	v_mac_f32_e32 v2, v7, v5                                        ; 3E040B07
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 44
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2280 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..12]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     6.0000,     4.0000}
>IMM[3] FLT32 {    5.0000,     0.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[5], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[4], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[4].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[4].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[4].xyzz
> 23: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[4].xyzz
> 25: MAD TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz, -TEMP[2].xyzz
> 26: MOV TEMP[6].xy, IN[1].zwww
> 27: TEX TEMP[6], TEMP[6], SAMP[6], 2D
> 28: ADD TEMP[7].xyz, TEMP[6].zyyy, IMM[1].xxxx
> 29: MUL TEMP[7].xy, TEMP[7].xyzz, IMM[0].xxxx
> 30: MUL TEMP[8].x, TEMP[6].wwww, IMM[0].xxxx
> 31: DP2 TEMP[9].x, TEMP[7].xyyy, TEMP[7].xyyy
> 32: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 33: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 34: SQRT TEMP[9].x, TEMP[9].xxxx
> 35: MUL TEMP[10].xyz, IN[3].xyzz, TEMP[7].xxxx
> 36: MAD TEMP[7].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[10].xyzz
> 37: MAD TEMP[7].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[7].xyzz
> 38: DP3 TEMP[9].x, TEMP[5].xyzz, TEMP[7].xyzz
> 39: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 40: ADD TEMP[9].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 41: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 42: POW TEMP[9].x, TEMP[9].xxxx, IMM[1].yyyy
> 43: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 44: MUL TEMP[10].x, IMM[1].zzzz, TEMP[3].zzzz
> 45: ADD TEMP[10].x, TEMP[9].xxxx, -TEMP[10].xxxx
> 46: LRP TEMP[11].x, TEMP[3].zzzz, IMM[1].wwww, IMM[0].wwww
> 47: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 48: MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 49: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 50: MUL TEMP[8].x, TEMP[8].xxxx, IMM[2].xxxx
> 51: MUL TEMP[0].x, TEMP[6].xxxx, TEMP[3].yyyy
> 52: DP3 TEMP[5].x, -TEMP[5].xyzz, TEMP[1].xyzz
> 53: ADD TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 54: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[1].xyzz
> 55: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
> 56: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 57: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[6].xxxx
> 58: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 59: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 60: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 61: MUL TEMP[5].x, TEMP[9].xxxx, TEMP[5].xxxx
> 62: MAD TEMP[1].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 63: MUL TEMP[6], CONST[4], TEMP[1].xxxx
> 64: MAD TEMP[6], CONST[5], TEMP[1].yyyy, TEMP[6]
> 65: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[6]
> 66: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 67: MOV TEMP[6].xyz, -CONST[1].xyzx
> 68: MOV TEMP[9].xyz, TEMP[4].xyzz
> 69: TEX TEMP[9], TEMP[9], SAMP[1], CUBE
> 70: DP3 TEMP[10].x, TEMP[4].xyzz, TEMP[2].xyzz
> 71: MUL TEMP[10].xyz, TEMP[10].xxxx, TEMP[4].xyzz
> 72: MAD TEMP[10].xyz, IMM[0].xxxx, TEMP[10].xyzz, -TEMP[2].xyzz
> 73: ADD TEMP[11].x, IMM[0].wwww, -TEMP[3].zzzz
> 74: MUL TEMP[11].x, TEMP[11].xxxx, IMM[2].zzzz
> 75: MOV TEMP[12].xy, TEMP[1].xyyy
> 76: MOV TEMP[12].w, IMM[0].wwww
> 77: MOV TEMP[12].z, TEMP[1].zzzz
> 78: TXP TEMP[1].x, TEMP[12], SAMP[0], SHADOW2D
> 79: DP3 TEMP[12].x, TEMP[6].xyzz, TEMP[7].xyzz
> 80: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 81: ADD TEMP[12].x, TEMP[8].xxxx, -TEMP[12].xxxx
> 82: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 83: MUL TEMP[9].xyz, TEMP[9].xyzz, TEMP[9].wwww
> 84: MUL TEMP[0].x, IMM[2].wwww, TEMP[0].xxxx
> 85: DP3 TEMP[6].x, TEMP[6].xyzz, TEMP[4].xyzz
> 86: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 87: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 88: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 89: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[12].xxxx
> 90: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 91: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
> 92: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 93: MUL TEMP[1].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 94: MAD TEMP[0].xyz, TEMP[9].xyzz, TEMP[0].xxxx, TEMP[1].xyzz
> 95: ADD TEMP[1].xyz, CONST[11].xyzz, -IN[0].xyzz
> 96: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[1].xyzz
> 97: RSQ TEMP[9].x, TEMP[6].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 99: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[7].xyzz
>100: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>101: ADD TEMP[7].x, TEMP[8].xxxx, -TEMP[7].xxxx
>102: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>103: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
>104: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[4].xyzz
>105: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>106: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[9].xxxx
>107: MUL TEMP[6].x, TEMP[6].xxxx, CONST[11].wwww
>108: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>109: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
>110: MUL TEMP[6].xyz, CONST[12].xyzz, TEMP[6].xxxx
>111: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
>112: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>113: LRP TEMP[7].x, TEMP[9].xxxx, IMM[0].wwww, TEMP[7].xxxx
>114: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[7].xxxx
>115: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[3].yyyy
>116: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[6].xyzz, TEMP[0].xyzz
>117: MOV TEMP[1].xy, IN[1].xyyy
>118: TEX TEMP[1].xyz, TEMP[1], SAMP[3], 2D
>119: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[4].xyzz
>120: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>121: ADD TEMP[2].x, IMM[0].wwww, -TEMP[2].xxxx
>122: POW TEMP[2].x, TEMP[2].xxxx, IMM[3].xxxx
>123: MAX TEMP[3].xyz, TEMP[3].zzzz, IMM[3].yyyy
>124: MUL TEMP[2].xyz, TEMP[2].xxxx, TEMP[3].xyzz
>125: MOV TEMP[3].xyz, TEMP[10].xyzz
>126: MOV TEMP[3].w, TEMP[11].xxxx
>127: TXL TEMP[3].xyz, TEMP[3], SAMP[2], CUBE
>128: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xyzz
>129: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>130: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz, TEMP[2].xyzz
>131: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>132: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].yyyy
>133: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>134: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>135: RCP TEMP[2].x, TEMP[2].xxxx
>136: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>137: FRC TEMP[2].x, CONST[1].wwww
>138: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].wwww
>139: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>140: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>141: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>142: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>143: MOV TEMP[0].w, IN[0].wwww
>144: MOV OUT[0], TEMP[0]
>145: END
>radeonsi: Compiling shader 84
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 23, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 19, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fsub float %134, %49
>  %136 = fmul float %132, 2.000000e+00
>  %137 = fsub float %136, %50
>  %138 = fmul float %133, 2.000000e+00
>  %139 = fsub float %138, %51
>  %140 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %141 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %142 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %143 = load <8 x i32>, <8 x i32> addrspace(2)* %142, align 32, !invariant.load !0
>  %144 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %145 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %144, i64 0, i64 27, !amdgpu.uniform !0
>  %146 = load <4 x i32>, <4 x i32> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = extractelement <8 x i32> %143, i32 7
>  %148 = extractelement <4 x i32> %146, i32 0
>  %149 = and i32 %148, %147
>  %150 = insertelement <4 x i32> %146, i32 %149, i32 0
>  %151 = bitcast float %140 to i32
>  %152 = bitcast float %141 to i32
>  %153 = insertelement <2 x i32> undef, i32 %151, i32 0
>  %154 = insertelement <2 x i32> %153, i32 %152, i32 1
>  %155 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %154, <8 x i32> %143, <4 x i32> %150, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %156 = extractelement <4 x float> %155, i32 0
>  %157 = extractelement <4 x float> %155, i32 1
>  %158 = extractelement <4 x float> %155, i32 2
>  %159 = extractelement <4 x float> %155, i32 3
>  %160 = fadd float %158, -5.000000e-01
>  %161 = fadd float %157, -5.000000e-01
>  %162 = fmul float %160, 2.000000e+00
>  %163 = fmul float %161, 2.000000e+00
>  %164 = fmul float %159, 2.000000e+00
>  %165 = fmul float %162, %162
>  %166 = fmul float %163, %163
>  %167 = fadd float %165, %166
>  %168 = call float @llvm.AMDGPU.clamp.(float %167, float 0.000000e+00, float 1.000000e+00)
>  %169 = fsub float 1.000000e+00, %168
>  %170 = call float @llvm.sqrt.f32(float %169)
>  %171 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %172 = fmul float %171, %162
>  %173 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %174 = fmul float %173, %162
>  %175 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %176 = fmul float %175, %162
>  %177 = fmul float %23, %163
>  %178 = fadd float %177, %172
>  %179 = fmul float %24, %163
>  %180 = fadd float %179, %174
>  %181 = fmul float %25, %163
>  %182 = fadd float %181, %176
>  %183 = fmul float %59, %170
>  %184 = fadd float %183, %178
>  %185 = fmul float %60, %170
>  %186 = fadd float %185, %180
>  %187 = fmul float %61, %170
>  %188 = fadd float %187, %182
>  %189 = fmul float %135, %184
>  %190 = fmul float %137, %186
>  %191 = fadd float %190, %189
>  %192 = fmul float %139, %188
>  %193 = fadd float %191, %192
>  %194 = call float @llvm.AMDGPU.clamp.(float %193, float 0.000000e+00, float 1.000000e+00)
>  %195 = fsub float %164, %194
>  %196 = call float @llvm.AMDGPU.clamp.(float %195, float 0.000000e+00, float 1.000000e+00)
>  %197 = call float @llvm.pow.f32(float %196, float 3.000000e+00)
>  %198 = call float @llvm.AMDGPU.clamp.(float %197, float 0.000000e+00, float 1.000000e+00)
>  %199 = fmul float %79, 0x3FD3333340000000
>  %200 = fsub float %198, %199
>  %201 = fsub float 1.000000e+00, %79
>  %202 = fmul float %79, 2.000000e+01
>  %203 = fadd float %202, %201
>  %204 = fmul float %200, %203
>  %205 = call float @llvm.AMDGPU.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %206 = fmul float %198, %205
>  %207 = fmul float %164, 0x3FF19999A0000000
>  %208 = fmul float %156, %78
>  %209 = fmul float %135, %59
>  %210 = fsub float -0.000000e+00, %209
>  %211 = fmul float %137, %60
>  %212 = fsub float %210, %211
>  %213 = fmul float %139, %61
>  %214 = fsub float %212, %213
>  %215 = fadd float %214, 1.000000e+00
>  %216 = fmul float %49, %59
>  %217 = fmul float %50, %60
>  %218 = fadd float %217, %216
>  %219 = fmul float %51, %61
>  %220 = fadd float %218, %219
>  %221 = fsub float 1.000000e+00, %220
>  %222 = call float @llvm.AMDGPU.clamp.(float %221, float 0.000000e+00, float 1.000000e+00)
>  %223 = fsub float %215, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fsub float 1.000000e+00, %224
>  %226 = fmul float %225, %225
>  %227 = fmul float %206, %226
>  %228 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %229 = fmul float %59, 0x4007700140000000
>  %230 = fadd float %229, %228
>  %231 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %232 = fmul float %60, 0x4007700140000000
>  %233 = fadd float %232, %231
>  %234 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %235 = fmul float %61, 0x4007700140000000
>  %236 = fadd float %235, %234
>  %237 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %238 = load <16 x i8>, <16 x i8> addrspace(2)* %237, align 16, !invariant.load !0
>  %239 = call float @llvm.SI.load.const(<16 x i8> %238, i32 64)
>  %240 = fmul float %239, %230
>  %241 = call float @llvm.SI.load.const(<16 x i8> %238, i32 68)
>  %242 = fmul float %241, %230
>  %243 = call float @llvm.SI.load.const(<16 x i8> %238, i32 72)
>  %244 = fmul float %243, %230
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 80)
>  %248 = fmul float %247, %233
>  %249 = fadd float %248, %240
>  %250 = call float @llvm.SI.load.const(<16 x i8> %246, i32 84)
>  %251 = fmul float %250, %233
>  %252 = fadd float %251, %242
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 88)
>  %256 = fmul float %255, %233
>  %257 = fadd float %256, %244
>  %258 = call float @llvm.SI.load.const(<16 x i8> %254, i32 96)
>  %259 = fmul float %258, %236
>  %260 = fadd float %259, %249
>  %261 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %262 = load <16 x i8>, <16 x i8> addrspace(2)* %261, align 16, !invariant.load !0
>  %263 = call float @llvm.SI.load.const(<16 x i8> %262, i32 100)
>  %264 = fmul float %263, %236
>  %265 = fadd float %264, %252
>  %266 = call float @llvm.SI.load.const(<16 x i8> %262, i32 104)
>  %267 = fmul float %266, %236
>  %268 = fadd float %267, %257
>  %269 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %270 = load <16 x i8>, <16 x i8> addrspace(2)* %269, align 16, !invariant.load !0
>  %271 = call float @llvm.SI.load.const(<16 x i8> %270, i32 112)
>  %272 = fadd float %260, %271
>  %273 = call float @llvm.SI.load.const(<16 x i8> %270, i32 116)
>  %274 = fadd float %265, %273
>  %275 = call float @llvm.SI.load.const(<16 x i8> %270, i32 120)
>  %276 = fadd float %268, %275
>  %277 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %278 = load <16 x i8>, <16 x i8> addrspace(2)* %277, align 16, !invariant.load !0
>  %279 = call float @llvm.SI.load.const(<16 x i8> %278, i32 16)
>  %280 = fsub float -0.000000e+00, %279
>  %281 = call float @llvm.SI.load.const(<16 x i8> %278, i32 20)
>  %282 = fsub float -0.000000e+00, %281
>  %283 = call float @llvm.SI.load.const(<16 x i8> %278, i32 24)
>  %284 = fsub float -0.000000e+00, %283
>  %285 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %286 = load <8 x i32>, <8 x i32> addrspace(2)* %285, align 32, !invariant.load !0
>  %287 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %288 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %287, i64 0, i64 7, !amdgpu.uniform !0
>  %289 = load <4 x i32>, <4 x i32> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = extractelement <8 x i32> %286, i32 7
>  %291 = extractelement <4 x i32> %289, i32 0
>  %292 = and i32 %291, %290
>  %293 = insertelement <4 x i32> %289, i32 %292, i32 0
>  %294 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %295 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %296 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %297 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %298 = call float @llvm.fabs.f32(float %296)
>  %299 = fdiv float 1.000000e+00, %298, !fpmath !1
>  %300 = fmul float %294, %299
>  %301 = fadd float %300, 1.500000e+00
>  %302 = fmul float %295, %299
>  %303 = fadd float %302, 1.500000e+00
>  %304 = bitcast float %303 to i32
>  %305 = bitcast float %301 to i32
>  %306 = bitcast float %297 to i32
>  %307 = insertelement <4 x i32> undef, i32 %304, i32 0
>  %308 = insertelement <4 x i32> %307, i32 %305, i32 1
>  %309 = insertelement <4 x i32> %308, i32 %306, i32 2
>  %310 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %309, <8 x i32> %286, <4 x i32> %293, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %311 = extractelement <4 x float> %310, i32 0
>  %312 = extractelement <4 x float> %310, i32 1
>  %313 = extractelement <4 x float> %310, i32 2
>  %314 = extractelement <4 x float> %310, i32 3
>  %315 = fmul float %121, %49
>  %316 = fmul float %123, %50
>  %317 = fadd float %316, %315
>  %318 = fmul float %125, %51
>  %319 = fadd float %317, %318
>  %320 = fmul float %319, %121
>  %321 = fmul float %319, %123
>  %322 = fmul float %319, %125
>  %323 = fmul float %320, 2.000000e+00
>  %324 = fsub float %323, %49
>  %325 = fmul float %321, 2.000000e+00
>  %326 = fsub float %325, %50
>  %327 = fmul float %322, 2.000000e+00
>  %328 = fsub float %327, %51
>  %329 = fsub float 1.000000e+00, %79
>  %330 = fmul float %329, 6.000000e+00
>  %331 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %332 = load <8 x i32>, <8 x i32> addrspace(2)* %331, align 32, !invariant.load !0
>  %333 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %334 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %333, i64 0, i64 3, !amdgpu.uniform !0
>  %335 = load <4 x i32>, <4 x i32> addrspace(2)* %334, align 16, !invariant.load !0
>  %336 = extractelement <8 x i32> %332, i32 7
>  %337 = extractelement <4 x i32> %335, i32 0
>  %338 = and i32 %337, %336
>  %339 = insertelement <4 x i32> %335, i32 %338, i32 0
>  %340 = bitcast float %276 to i32
>  %341 = bitcast float %272 to i32
>  %342 = bitcast float %274 to i32
>  %343 = insertelement <4 x i32> undef, i32 %340, i32 0
>  %344 = insertelement <4 x i32> %343, i32 %341, i32 1
>  %345 = insertelement <4 x i32> %344, i32 %342, i32 2
>  %346 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %345, <8 x i32> %332, <4 x i32> %339, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %347 = extractelement <4 x float> %346, i32 0
>  %348 = fmul float %184, %280
>  %349 = fmul float %186, %282
>  %350 = fadd float %349, %348
>  %351 = fmul float %188, %284
>  %352 = fadd float %350, %351
>  %353 = call float @llvm.AMDGPU.clamp.(float %352, float 0.000000e+00, float 1.000000e+00)
>  %354 = fsub float %207, %353
>  %355 = call float @llvm.AMDGPU.clamp.(float %354, float 0.000000e+00, float 1.000000e+00)
>  %356 = fmul float %311, %314
>  %357 = fmul float %312, %314
>  %358 = fmul float %313, %314
>  %359 = fmul float %208, 4.000000e+00
>  %360 = fmul float %121, %280
>  %361 = fmul float %123, %282
>  %362 = fadd float %361, %360
>  %363 = fmul float %125, %284
>  %364 = fadd float %362, %363
>  %365 = call float @llvm.AMDGPU.clamp.(float %364, float 0.000000e+00, float 1.000000e+00)
>  %366 = fmul float %347, %347
>  %367 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %368 = load <16 x i8>, <16 x i8> addrspace(2)* %367, align 16, !invariant.load !0
>  %369 = call float @llvm.SI.load.const(<16 x i8> %368, i32 48)
>  %370 = fmul float %369, %366
>  %371 = call float @llvm.SI.load.const(<16 x i8> %368, i32 52)
>  %372 = fmul float %371, %366
>  %373 = call float @llvm.SI.load.const(<16 x i8> %368, i32 56)
>  %374 = fmul float %373, %366
>  %375 = fmul float %355, %355
>  %376 = call float @llvm.AMDGPU.clamp.(float %375, float 0.000000e+00, float 1.000000e+00)
>  %377 = fmul float %370, %376
>  %378 = fmul float %372, %376
>  %379 = fmul float %374, %376
>  %380 = fmul float %377, %78
>  %381 = fmul float %378, %78
>  %382 = fmul float %379, %78
>  %383 = fmul float %365, %380
>  %384 = fmul float %365, %381
>  %385 = fmul float %365, %382
>  %386 = fmul float %356, %359
>  %387 = fadd float %386, %383
>  %388 = fmul float %357, %359
>  %389 = fadd float %388, %384
>  %390 = fmul float %358, %359
>  %391 = fadd float %390, %385
>  %392 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %393 = load <16 x i8>, <16 x i8> addrspace(2)* %392, align 16, !invariant.load !0
>  %394 = call float @llvm.SI.load.const(<16 x i8> %393, i32 176)
>  %395 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %396 = fsub float %394, %395
>  %397 = call float @llvm.SI.load.const(<16 x i8> %393, i32 180)
>  %398 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %399 = fsub float %397, %398
>  %400 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %401 = load <16 x i8>, <16 x i8> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = call float @llvm.SI.load.const(<16 x i8> %401, i32 184)
>  %403 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %404 = fsub float %402, %403
>  %405 = fmul float %396, %396
>  %406 = fmul float %399, %399
>  %407 = fadd float %406, %405
>  %408 = fmul float %404, %404
>  %409 = fadd float %407, %408
>  %410 = call float @llvm.sqrt.f32(float %409)
>  %411 = fdiv float 1.000000e+00, %410, !fpmath !1
>  %412 = fmul float %396, %411
>  %413 = fmul float %399, %411
>  %414 = fmul float %404, %411
>  %415 = fmul float %412, %184
>  %416 = fmul float %413, %186
>  %417 = fadd float %416, %415
>  %418 = fmul float %414, %188
>  %419 = fadd float %417, %418
>  %420 = call float @llvm.AMDGPU.clamp.(float %419, float 0.000000e+00, float 1.000000e+00)
>  %421 = fsub float %207, %420
>  %422 = call float @llvm.AMDGPU.clamp.(float %421, float 0.000000e+00, float 1.000000e+00)
>  %423 = fmul float %422, %422
>  %424 = fmul float %412, %121
>  %425 = fmul float %413, %123
>  %426 = fadd float %425, %424
>  %427 = fmul float %414, %125
>  %428 = fadd float %426, %427
>  %429 = call float @llvm.AMDGPU.clamp.(float %428, float 0.000000e+00, float 1.000000e+00)
>  %430 = fmul float %409, %411
>  %431 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %432 = load <16 x i8>, <16 x i8> addrspace(2)* %431, align 16, !invariant.load !0
>  %433 = call float @llvm.SI.load.const(<16 x i8> %432, i32 188)
>  %434 = fmul float %430, %433
>  %435 = call float @llvm.AMDGPU.clamp.(float %434, float 0.000000e+00, float 1.000000e+00)
>  %436 = fsub float 1.000000e+00, %435
>  %437 = call float @llvm.SI.load.const(<16 x i8> %432, i32 192)
>  %438 = fmul float %437, %436
>  %439 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %440 = load <16 x i8>, <16 x i8> addrspace(2)* %439, align 16, !invariant.load !0
>  %441 = call float @llvm.SI.load.const(<16 x i8> %440, i32 196)
>  %442 = fmul float %441, %436
>  %443 = call float @llvm.SI.load.const(<16 x i8> %440, i32 200)
>  %444 = fmul float %443, %436
>  %445 = fmul float %423, %423
>  %446 = call float @llvm.AMDGPU.clamp.(float %445, float 0.000000e+00, float 1.000000e+00)
>  %447 = fsub float 1.000000e+00, %411
>  %448 = fmul float %446, %447
>  %449 = fadd float %411, %448
>  %450 = fmul float %438, %449
>  %451 = fmul float %442, %449
>  %452 = fmul float %444, %449
>  %453 = fmul float %450, %78
>  %454 = fmul float %451, %78
>  %455 = fmul float %452, %78
>  %456 = fmul float %429, %453
>  %457 = fadd float %456, %387
>  %458 = fmul float %429, %454
>  %459 = fadd float %458, %389
>  %460 = fmul float %429, %455
>  %461 = fadd float %460, %391
>  %462 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %463 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %464 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %465 = load <8 x i32>, <8 x i32> addrspace(2)* %464, align 32, !invariant.load !0
>  %466 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %467 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %466, i64 0, i64 15, !amdgpu.uniform !0
>  %468 = load <4 x i32>, <4 x i32> addrspace(2)* %467, align 16, !invariant.load !0
>  %469 = extractelement <8 x i32> %465, i32 7
>  %470 = extractelement <4 x i32> %468, i32 0
>  %471 = and i32 %470, %469
>  %472 = insertelement <4 x i32> %468, i32 %471, i32 0
>  %473 = bitcast float %462 to i32
>  %474 = bitcast float %463 to i32
>  %475 = insertelement <2 x i32> undef, i32 %473, i32 0
>  %476 = insertelement <2 x i32> %475, i32 %474, i32 1
>  %477 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %476, <8 x i32> %465, <4 x i32> %472, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %478 = extractelement <4 x float> %477, i32 0
>  %479 = extractelement <4 x float> %477, i32 1
>  %480 = extractelement <4 x float> %477, i32 2
>  %481 = fmul float %49, %121
>  %482 = fmul float %50, %123
>  %483 = fadd float %482, %481
>  %484 = fmul float %51, %125
>  %485 = fadd float %483, %484
>  %486 = call float @llvm.AMDGPU.clamp.(float %485, float 0.000000e+00, float 1.000000e+00)
>  %487 = fsub float 1.000000e+00, %486
>  %488 = call float @llvm.pow.f32(float %487, float 5.000000e+00)
>  %489 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %490 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %491 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %492 = fmul float %488, %489
>  %493 = fmul float %488, %490
>  %494 = fmul float %488, %491
>  %495 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %496 = load <8 x i32>, <8 x i32> addrspace(2)* %495, align 32, !invariant.load !0
>  %497 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %498 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %497, i64 0, i64 11, !amdgpu.uniform !0
>  %499 = load <4 x i32>, <4 x i32> addrspace(2)* %498, align 16, !invariant.load !0
>  %500 = extractelement <8 x i32> %496, i32 7
>  %501 = extractelement <4 x i32> %499, i32 0
>  %502 = and i32 %501, %500
>  %503 = insertelement <4 x i32> %499, i32 %502, i32 0
>  %504 = call float @llvm.amdgcn.cubetc(float %324, float %326, float %328)
>  %505 = call float @llvm.amdgcn.cubesc(float %324, float %326, float %328)
>  %506 = call float @llvm.amdgcn.cubema(float %324, float %326, float %328)
>  %507 = call float @llvm.amdgcn.cubeid(float %324, float %326, float %328)
>  %508 = call float @llvm.fabs.f32(float %506)
>  %509 = fdiv float 1.000000e+00, %508, !fpmath !1
>  %510 = fmul float %504, %509
>  %511 = fadd float %510, 1.500000e+00
>  %512 = fmul float %505, %509
>  %513 = fadd float %512, 1.500000e+00
>  %514 = bitcast float %513 to i32
>  %515 = bitcast float %511 to i32
>  %516 = bitcast float %507 to i32
>  %517 = bitcast float %330 to i32
>  %518 = insertelement <4 x i32> undef, i32 %514, i32 0
>  %519 = insertelement <4 x i32> %518, i32 %515, i32 1
>  %520 = insertelement <4 x i32> %519, i32 %516, i32 2
>  %521 = insertelement <4 x i32> %520, i32 %517, i32 3
>  %522 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %521, <8 x i32> %496, <4 x i32> %503, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %523 = extractelement <4 x float> %522, i32 0
>  %524 = extractelement <4 x float> %522, i32 1
>  %525 = extractelement <4 x float> %522, i32 2
>  %526 = fmul float %492, %523
>  %527 = fmul float %493, %524
>  %528 = fmul float %494, %525
>  %529 = fmul float %526, %227
>  %530 = fmul float %527, %227
>  %531 = fmul float %528, %227
>  %532 = fmul float %457, %478
>  %533 = fadd float %532, %529
>  %534 = fmul float %459, %479
>  %535 = fadd float %534, %530
>  %536 = fmul float %461, %480
>  %537 = fadd float %536, %531
>  %538 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %539 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %540 = load <16 x i8>, <16 x i8> addrspace(2)* %539, align 16, !invariant.load !0
>  %541 = call float @llvm.SI.load.const(<16 x i8> %540, i32 12)
>  %542 = fsub float %538, %541
>  %543 = call float @llvm.maxnum.f32(float %542, float 0.000000e+00)
>  %544 = call float @llvm.SI.load.const(<16 x i8> %540, i32 28)
>  %545 = call float @llvm.SI.load.const(<16 x i8> %540, i32 12)
>  %546 = fsub float %544, %545
>  %547 = fadd float %546, 0x3F50624DE0000000
>  %548 = fdiv float 1.000000e+00, %547, !fpmath !1
>  %549 = fmul float %543, %548
>  %550 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %551 = load <16 x i8>, <16 x i8> addrspace(2)* %550, align 16, !invariant.load !0
>  %552 = call float @llvm.SI.load.const(<16 x i8> %551, i32 28)
>  %553 = call float @llvm.floor.f32(float %552)
>  %554 = fsub float %552, %553
>  %555 = fmul float %554, 8.000000e+00
>  %556 = call float @llvm.pow.f32(float %549, float %555)
>  %557 = call float @llvm.AMDGPU.clamp.(float %556, float 0.000000e+00, float 1.000000e+00)
>  %558 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %559 = fmul float %558, %557
>  %560 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %561 = load <16 x i8>, <16 x i8> addrspace(2)* %560, align 16, !invariant.load !0
>  %562 = call float @llvm.SI.load.const(<16 x i8> %561, i32 32)
>  %563 = fsub float 1.000000e+00, %559
>  %564 = fmul float %533, %559
>  %565 = fmul float %562, %563
>  %566 = fadd float %564, %565
>  %567 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %568 = load <16 x i8>, <16 x i8> addrspace(2)* %567, align 16, !invariant.load !0
>  %569 = call float @llvm.SI.load.const(<16 x i8> %568, i32 36)
>  %570 = fsub float 1.000000e+00, %559
>  %571 = fmul float %535, %559
>  %572 = fmul float %569, %570
>  %573 = fadd float %571, %572
>  %574 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %575 = load <16 x i8>, <16 x i8> addrspace(2)* %574, align 16, !invariant.load !0
>  %576 = call float @llvm.SI.load.const(<16 x i8> %575, i32 40)
>  %577 = fsub float 1.000000e+00, %559
>  %578 = fmul float %537, %559
>  %579 = fmul float %576, %577
>  %580 = fadd float %578, %579
>  %581 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %582 = bitcast float %5 to i32
>  %583 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %582, 10
>  %584 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %583, float %566, 11
>  %585 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %584, float %573, 12
>  %586 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %585, float %580, 13
>  %587 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %586, float %581, 14
>  %588 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %587, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %588
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x3                     ; C2040103
>	s_buffer_load_dword s10, s[0:3], 0x7                    ; C2050107
>	s_buffer_load_dword s13, s[0:3], 0xb                    ; C206810B
>	s_buffer_load_dword s18, s[0:3], 0xf                    ; C209010F
>	s_buffer_load_dword s17, s[0:3], 0x17                   ; C2088117
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s22, s[0:3], 0x13                   ; C20B0113
>	s_buffer_load_dword s9, s[0:3], 0x4                     ; C2048104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s14, s[0:3], 0xc                    ; C207010C
>	s_buffer_load_dword s15, s[0:3], 0xd                    ; C207810D
>	s_buffer_load_dword s16, s[0:3], 0xe                    ; C208010E
>	s_buffer_load_dword s19, s[0:3], 0x10                   ; C2098110
>	s_buffer_load_dword s20, s[0:3], 0x11                   ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                   ; C20A8112
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_sub_f32_e64 v7, 1.0, s22                              ; D2080007 00002CF2
>	v_mul_f32_e32 v0, s8, v9                                ; 10001208
>	v_mac_f32_e32 v0, s10, v10                              ; 3E00140A
>	v_mac_f32_e32 v0, s13, v11                              ; 3E00160D
>	v_mac_f32_e32 v0, s18, v12                              ; 3E001812
>	v_mul_f32_e32 v1, s17, v0                               ; 10020011
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	v_mad_f32 v8, 2.0, v13, -1.0                            ; D2820008 03CE1AF4
>	v_mad_f32 v13, 2.0, v14, -1.0                           ; D282000D 03CE1CF4
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 33, 0, 0, 0, v16, v17, v18, v19                 ; F800021F 13121110
>	v_mad_f32 v14, 2.0, v15, -1.0                           ; D282000E 03CE1EF4
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v17, 0, v13, v8                               ; D2820011 04221A80
>	v_mad_f32 v18, 0, v8, v13                               ; D2820012 04361080
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v19, 0, v4, v3                                ; D2820013 040E0880
>	v_mac_f32_e32 v17, 0, v14                               ; 3E221C80
>	v_mac_f32_e32 v18, 0, v14                               ; 3E241C80
>	v_mac_f32_e32 v14, 0, v13                               ; 3E1C1A80
>	v_mad_f32 v13, 0, v3, v4                                ; D282000D 04120680
>	v_mac_f32_e32 v19, 0, v5                                ; 3E260A80
>	v_mac_f32_e32 v13, 0, v5                                ; 3E1A0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mul_f32_e32 v4, s6, v9                                ; 10081206
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s8, v10                               ; 3E081408
>	v_mac_f32_e32 v4, s0, v11                               ; 3E081600
>	v_mov_b32_e32 v1, s19                                   ; 7E020213
>	v_mac_f32_e32 v4, s16, v12                              ; 3E081810
>	v_mac_f32_e32 v1, s20, v4                               ; 3E020814
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v3, v19, v18                              ; 10062513
>	v_mul_legacy_f32_e32 v1, s21, v1                        ; 0E020215
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_mul_f32_e32 v8, v13, v14                              ; 10101D0D
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v17, v13, -v3                             ; D2820003 840E1B11
>	v_mac_f32_e32 v7, s22, v1                               ; 3E0E0216
>	v_mul_f32_e32 v15, s4, v9                               ; 101E1204
>	v_mul_f32_e32 v16, s5, v9                               ; 10201205
>	v_mul_f32_e32 v9, v5, v17                               ; 10122305
>	v_mad_f32 v8, v18, v5, -v8                              ; D2820008 84220B12
>	v_mad_f32 v1, v6, v3, -v3                               ; D2820001 840E0706
>	v_mul_f32_e32 v3, v7, v7                                ; 10060F07
>	v_mad_f32 v9, v14, v19, -v9                             ; D2820009 8426270E
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	exp 15, 34, 0, 0, 0, v3, v0, v0, v0                     ; F800022F 00000003
>	v_mac_f32_e32 v15, s9, v10                              ; 3E1E1409
>	v_mac_f32_e32 v16, s7, v10                              ; 3E201407
>	v_mad_f32 v9, v6, v9, -v9                               ; D2820009 84261306
>	exp 15, 35, 0, 0, 0, v19, v13, v5, v8                   ; F800023F 08050D13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	v_mac_f32_e32 v16, s12, v11                             ; 3E20160C
>	exp 15, 36, 0, 0, 0, v9, v1, v17, v18                   ; F800024F 12110109
>	v_mac_f32_e32 v15, s14, v12                             ; 3E1E180E
>	v_mac_f32_e32 v16, s15, v12                             ; 3E20180F
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v15, v16, v4, v0                   ; F80008CF 0004100F
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 552 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 3, [m0]                          ; C8200F04
>	v_interp_p2_f32 v8, [v8], v5, 3, 3, [m0]                    ; C8210F05
>	v_interp_p1_f32 v9, v4, 0, 4, [m0]                          ; C8241004
>	v_interp_p2_f32 v9, [v9], v5, 0, 4, [m0]                    ; C8251005
>	v_interp_p1_f32 v10, v4, 1, 4, [m0]                         ; C8281104
>	v_interp_p2_f32 v10, [v10], v5, 1, 4, [m0]                  ; C8291105
>	v_interp_p1_f32 v0, v4, 2, 4, [m0]                          ; C8001204
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s11, s[0:3], 0x0                        ; C2058100
>	v_interp_p2_f32 v0, [v0], v5, 2, 4, [m0]                    ; C8011205
>	v_interp_p1_f32 v1, v4, 3, 4, [m0]                          ; C8041304
>	s_buffer_load_dword s12, s[0:3], 0x1                        ; C2060101
>	v_interp_p2_f32 v1, [v1], v5, 3, 4, [m0]                    ; C8051305
>	v_interp_p1_f32 v6, v4, 0, 5, [m0]                          ; C8181404
>	s_buffer_load_dword s13, s[0:3], 0x2                        ; C2068102
>	v_interp_p2_f32 v6, [v6], v5, 0, 5, [m0]                    ; C8191405
>	v_interp_p1_f32 v12, v2, 0, 0, [m0]                         ; C8300002
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                  ; C8310003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v11, s11, v12                                 ; 0816180B
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v20, v2, 2, 0, [m0]                         ; C8500202
>	v_interp_p2_f32 v20, [v20], v3, 2, 0, [m0]                  ; C8510203
>	v_sub_f32_e32 v14, s12, v19                                 ; 081C260C
>	v_mul_f32_e32 v7, v11, v11                                  ; 100E170B
>	v_sub_f32_e32 v15, s13, v20                                 ; 081E280D
>	v_mac_f32_e32 v7, v14, v14                                  ; 3E0E1D0E
>	v_mac_f32_e32 v7, v15, v15                                  ; 3E0E1F0F
>	v_rsq_f32_e32 v16, v7                                       ; 7E205D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v21, v16, v11                                 ; 102A1710
>	v_mul_f32_e32 v22, v16, v14                                 ; 102C1D10
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                       ; C090055C
>	v_mul_f32_e32 v23, v7, v0                                   ; 102E0107
>	v_mul_f32_e32 v24, v7, v1                                   ; 10300307
>	v_mul_f32_e32 v0, v23, v21                                  ; 10002B17
>	s_load_dwordx8 s[24:31], s[4:5], 0x50                       ; C0CC0550
>	v_mul_f32_e32 v25, v7, v6                                   ; 10320D07
>	v_mul_f32_e32 v26, v16, v15                                 ; 10341F10
>	v_mac_f32_e32 v0, v24, v22                                  ; 3E002D18
>	v_mac_f32_e32 v0, v25, v26                                  ; 3E003519
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v27, v0, 0 clamp                              ; D206081B 00010100
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	image_sample v[17:18], v[0:1], s[24:31], s[32:35] dmask:0x6 ; F0800600 01061100
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                       ; C092054C
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	s_load_dwordx8 s[12:19], s[4:5], 0x60                       ; C0C60560
>	s_load_dwordx4 s[20:23], s[4:5], 0x6c                       ; C08A056C
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s40, s[0:3], 0x16                       ; C2140116
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s31                                     ; 87241F24
>	image_sample v[6:7], v[0:1], s[24:31], s[36:39] dmask:0xa   ; F0800A00 01260600
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v29, v6, v6                                   ; 063A0D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_interp_p1_f32 v30, v4, 0, 3, [m0]                         ; C8780C04
>	v_add_f32_e32 v28, v7, v7                                   ; 06380F07
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v29, v29, v6, -v6                                 ; D282001D 841A0D1D
>	v_interp_p2_f32 v30, [v30], v5, 0, 3, [m0]                  ; C8790C05
>	v_interp_p1_f32 v31, v4, 1, 3, [m0]                         ; C87C0D04
>	v_mac_f32_e32 v29, v7, v7                                   ; 3E3A0F07
>	v_interp_p2_f32 v31, [v31], v5, 1, 3, [m0]                  ; C87D0D05
>	v_interp_p1_f32 v32, v4, 2, 3, [m0]                         ; C8800E04
>	v_add_f32_e64 v4, v29, 0 clamp                              ; D2060804 0001011D
>	v_mad_f32 v33, v28, v30, -v30                               ; D2820021 847A3D1C
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mad_f32 v34, v28, v31, -v31                               ; D2820022 847E3F1C
>	v_interp_p2_f32 v32, [v32], v5, 2, 3, [m0]                  ; C8810E05
>	v_mac_f32_e32 v33, v6, v8                                   ; 3E421106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mad_f32 v28, v28, v32, -v32                               ; D282001C 8482411C
>	v_mac_f32_e32 v34, v6, v9                                   ; 3E441306
>	v_mac_f32_e32 v33, v4, v23                                  ; 3E422F04
>	v_mac_f32_e32 v28, v6, v10                                  ; 3E381506
>	v_mac_f32_e32 v34, v4, v24                                  ; 3E443104
>	v_mul_f32_e32 v21, v21, v33                                 ; 102A4315
>	v_mac_f32_e32 v28, v4, v25                                  ; 3E383304
>	v_mac_f32_e32 v21, v22, v34                                 ; 3E2A4516
>	v_mac_f32_e32 v21, v26, v28                                 ; 3E2A391A
>	v_mul_f32_e32 v4, v33, v21                                  ; 10082B21
>	v_mac_f32_e32 v4, v33, v21                                  ; 3E082B21
>	v_mad_f32 v22, -v11, v16, v4                                ; D2820016 2412210B
>	v_mul_f32_e32 v4, v34, v21                                  ; 10082B22
>	v_mac_f32_e32 v4, v34, v21                                  ; 3E082B22
>	v_mad_f32 v26, -v14, v16, v4                                ; D282001A 2412210E
>	v_mul_f32_e32 v4, v28, v21                                  ; 10082B1C
>	v_mac_f32_e32 v4, v28, v21                                  ; 3E082B1C
>	v_mad_f32 v29, -v15, v16, v4                                ; D282001D 2412210F
>	v_interp_p1_f32 v4, v2, 2, 1, [m0]                          ; C8100602
>	v_interp_p2_f32 v4, [v4], v3, 2, 1, [m0]                    ; C8110603
>	v_interp_p1_f32 v5, v2, 3, 1, [m0]                          ; C8140702
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_interp_p2_f32 v5, [v5], v3, 3, 1, [m0]                    ; C8150703
>	image_sample v[4:7], v[4:5], s[12:19], s[20:23] dmask:0xf   ; F0800F00 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v6, -0.5, v6                                  ; 060C0CF1
>	v_add_f32_e32 v6, v6, v6                                    ; 060C0D06
>	v_add_f32_e32 v5, -0.5, v5                                  ; 060A0AF1
>	v_add_f32_e32 v5, v5, v5                                    ; 060A0B05
>	v_mul_f32_e32 v30, v6, v30                                  ; 103C3D06
>	v_mul_f32_e32 v31, v6, v31                                  ; 103E3F06
>	v_mul_f32_e32 v32, v6, v32                                  ; 10404106
>	v_mac_f32_e32 v30, v5, v8                                   ; 3E3C1105
>	v_mac_f32_e32 v32, v5, v10                                  ; 3E401505
>	v_mac_f32_e32 v31, v5, v9                                   ; 3E3E1305
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	v_mac_f32_e32 v5, v6, v6                                    ; 3E0A0D06
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_sub_f32_e32 v5, 1.0, v5                                   ; 080A0AF2
>	v_sqrt_f32_e32 v5, v5                                       ; 7E0A6705
>	v_mac_f32_e32 v30, v5, v23                                  ; 3E3C2F05
>	v_mac_f32_e32 v31, v5, v24                                  ; 3E3E3105
>	v_mac_f32_e32 v32, v5, v25                                  ; 3E403305
>	v_mul_f32_e32 v5, v30, v22                                  ; 100A2D1E
>	v_mac_f32_e32 v5, v31, v26                                  ; 3E0A351F
>	v_mac_f32_e32 v5, v32, v29                                  ; 3E0A3B20
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mad_f32 v5, 2.0, v7, -v5                                  ; D2820005 84160EF4
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_log_f32_e32 v5, v5                                        ; 7E0A4F05
>	v_mul_f32_e32 v35, v17, v4                                  ; 10460911
>	v_cubema_f32 v4, v33, v34, v28                              ; D28E0004 04724521
>	v_add_f32_e32 v6, v7, v7                                    ; 060C0F07
>	v_rcp_f32_e64 v7, |v4|                                      ; D3540107 00000104
>	v_mul_legacy_f32_e32 v5, 0x40400000, v5                     ; 0E0A0AFF 40400000
>	v_exp_f32_e32 v5, v5                                        ; 7E0A4B05
>	v_cubetc_f32 v8, v33, v34, v28                              ; D28C0008 04724521
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v10, v33, v34, v28                             ; D28A000A 04724521
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mad_f32 v9, v7, v8, v4                                    ; D2820009 04121107
>	v_mad_f32 v8, v7, v10, v4                                   ; D2820008 04121507
>	v_mov_b32_e32 v7, v5                                        ; 7E0E0305
>	v_sub_f32_e32 v10, 1.0, v18                                 ; 081424F2
>	v_mac_f32_e32 v7, 0xbe99999a, v18                           ; 3E0E24FF BE99999A
>	v_mac_f32_e32 v10, 0x41a00000, v18                          ; 3E1424FF 41A00000
>	v_mul_f32_e32 v7, v10, v7                                   ; 100E0F0A
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v7, v23, v22                                  ; 100E2D17
>	v_mad_f32 v7, -v26, v24, -v7                                ; D2820007 A41E311A
>	v_mad_f32 v7, -v29, v25, v7                                 ; D2820007 241E331D
>	v_add_f32_e32 v7, 1.0, v7                                   ; 060E0EF2
>	v_subrev_f32_e32 v7, v27, v7                                ; 0A0E0F1B
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	s_buffer_load_dword s13, s[0:3], 0x11                       ; C2068111
>	v_sub_f32_e32 v10, 1.0, v7                                  ; 08140EF2
>	s_buffer_load_dword s12, s[0:3], 0x10                       ; C2060110
>	v_mad_f32 v7, -v7, v10, v10                                 ; D2820007 242A1507
>	v_mul_f32_e32 v27, v7, v5                                   ; 10360B07
>	v_mov_b32_e32 v5, 0x403b800a                                ; 7E0A02FF 403B800A
>	s_buffer_load_dword s14, s[0:3], 0x12                       ; C2070112
>	v_mad_f32 v7, v5, v23, v12                                  ; D2820007 04322F05
>	s_buffer_load_dword s15, s[0:3], 0x14                       ; C2078114
>	v_mad_f32 v10, v5, v24, v19                                 ; D282000A 044E3105
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v14, s13, v7                                  ; 101C0E0D
>	s_buffer_load_dword s41, s[0:3], 0x18                       ; C2148118
>	s_buffer_load_dword s42, s[0:3], 0x19                       ; C2150119
>	s_buffer_load_dword s43, s[0:3], 0x1a                       ; C215811A
>	v_mul_f32_e32 v11, s12, v7                                  ; 10160E0C
>	v_mac_f32_e32 v14, s11, v10                                 ; 3E1C140B
>	s_buffer_load_dword s11, s[0:3], 0x1c                       ; C205811C
>	s_buffer_load_dword s12, s[0:3], 0x1d                       ; C206011D
>	s_buffer_load_dword s13, s[0:3], 0x1e                       ; C206811E
>	v_mul_f32_e32 v7, s14, v7                                   ; 100E0E0E
>	v_mad_f32 v5, v5, v25, v20                                  ; D2820005 04523305
>	v_mac_f32_e32 v11, s15, v10                                 ; 3E16140F
>	v_mac_f32_e32 v7, s40, v10                                  ; 3E0E1428
>	s_load_dwordx8 s[44:51], s[4:5], 0x10                       ; C0D60510
>	s_load_dwordx4 s[56:59], s[4:5], 0x1c                       ; C09C051C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v11, s41, v5                                  ; 3E160A29
>	v_mac_f32_e32 v14, s42, v5                                  ; 3E1C0A2A
>	v_mac_f32_e32 v7, s43, v5                                   ; 3E0E0A2B
>	s_load_dwordx8 s[36:43], s[4:5], 0x0                        ; C0D20500
>	s_load_dwordx4 s[52:55], s[4:5], 0xc                        ; C09A050C
>	v_add_f32_e32 v15, s11, v11                                 ; 061E160B
>	v_add_f32_e32 v16, s12, v14                                 ; 06201C0C
>	v_add_f32_e32 v14, s13, v7                                  ; 061C0E0D
>	s_buffer_load_dword s9, s[0:3], 0x4                         ; C2048104
>	s_buffer_load_dword s8, s[0:3], 0x5                         ; C2040105
>	s_buffer_load_dword s11, s[0:3], 0x6                        ; C2058106
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                       ; C08C053C
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	v_mov_b32_e32 v5, 0x40c00000                                ; 7E0A02FF 40C00000
>	s_and_b32 s56, s56, s51                                     ; 87383338
>	v_cubeid_f32 v10, v33, v34, v28                             ; D288000A 04724521
>	v_mad_f32 v7, -v18, v5, v5                                  ; D2820007 24160B12
>	image_sample v[8:11], v[8:11], s[44:51], s[56:59] dmask:0xf ; F0800F00 01CB0808
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s52, s52, s43                                     ; 87342B34
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	image_sample_c v5, v[14:17], s[36:43], s[52:55] dmask:0x1   ; F0A00100 01A9050E
>	v_mul_f32_e32 v14, s9, v30                                  ; 101C3C09
>	s_waitcnt vmcnt(1)                                          ; BF8C0F71
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_mad_f32 v11, v31, -s8, -v14                               ; D282000B C438111F
>	v_mad_f32 v11, -v32, s11, v11                               ; D282000B 242C1720
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_mov_b32_e32 v14, 0x3f8ccccd                               ; 7E1C02FF 3F8CCCCD
>	v_mad_f32 v11, v6, v14, -v11                                ; D282000B 842E1D06
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	v_mul_f32_e32 v11, v11, v11                                 ; 1016170B
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v15, s4, v5                                   ; 101E0A04
>	v_mul_f32_e32 v16, s5, v5                                   ; 10200A05
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_mul_f32_e32 v5, s6, v5                                    ; 100A0A06
>	v_mul_f32_e32 v15, v11, v15                                 ; 101E1F0B
>	v_mul_f32_e32 v16, v11, v16                                 ; 1020210B
>	v_mul_f32_e32 v5, v11, v5                                   ; 100A0B0B
>	v_mul_f32_e32 v11, s9, v33                                  ; 10164209
>	s_buffer_load_dword s7, s[0:3], 0x2c                        ; C203812C
>	v_mad_f32 v11, v34, -s8, -v11                               ; D282000B C42C1122
>	s_buffer_load_dword s36, s[0:3], 0x2d                       ; C212012D
>	v_mad_f32 v11, -v28, s11, v11                               ; D282000B 242C171C
>	s_buffer_load_dword s4, s[0:3], 0x2e                        ; C202012E
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_mul_f32_e32 v15, v17, v15                                 ; 101E1F11
>	v_mul_f32_e32 v16, v17, v16                                 ; 10202111
>	v_mul_f32_e32 v5, v17, v5                                   ; 100A0B11
>	v_mul_f32_e32 v15, v15, v11                                 ; 101E170F
>	v_mul_f32_e32 v16, v16, v11                                 ; 10201710
>	v_mul_f32_e32 v11, v5, v11                                  ; 10161705
>	v_mul_f32_e32 v5, 4.0, v35                                  ; 100A46F6
>	v_mac_f32_e32 v15, v5, v8                                   ; 3E1E1105
>	v_mac_f32_e32 v16, v5, v9                                   ; 3E201305
>	v_mac_f32_e32 v11, v5, v10                                  ; 3E161505
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s7, v12                                   ; 080A1807
>	v_sub_f32_e32 v9, s36, v19                                  ; 08122624
>	v_mul_f32_e32 v10, v5, v5                                   ; 10140B05
>	v_sub_f32_e32 v8, s4, v20                                   ; 08102804
>	v_mac_f32_e32 v10, v9, v9                                   ; 3E141309
>	v_mac_f32_e32 v10, v8, v8                                   ; 3E141108
>	v_rsq_f32_e32 v12, v10                                      ; 7E185D0A
>	s_buffer_load_dword s5, s[0:3], 0x2f                        ; C202812F
>	s_buffer_load_dword s6, s[0:3], 0x30                        ; C2030130
>	s_buffer_load_dword s7, s[0:3], 0x31                        ; C2038131
>	v_mul_f32_e32 v5, v12, v5                                   ; 100A0B0C
>	v_mul_f32_e32 v20, v30, v5                                  ; 10280B1E
>	v_mul_f32_e32 v9, v12, v9                                   ; 1012130C
>	v_mac_f32_e32 v20, v31, v9                                  ; 3E28131F
>	v_mul_f32_e32 v8, v12, v8                                   ; 1010110C
>	v_mac_f32_e32 v20, v32, v8                                  ; 3E281120
>	v_add_f32_e64 v20, v20, 0 clamp                             ; D2060814 00010114
>	v_mad_f32 v6, v6, v14, -v20                                 ; D2820006 84521D06
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mul_f32_e32 v5, v33, v5                                   ; 100A0B21
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	v_mac_f32_e32 v5, v34, v9                                   ; 3E0A1322
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	v_mac_f32_e32 v5, v28, v8                                   ; 3E0A111C
>	v_mul_f32_e32 v8, v12, v10                                  ; 1010150C
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_sub_f32_e32 v9, 1.0, v12                                  ; 081218F2
>	v_mac_f32_e32 v12, v9, v6                                   ; 3E180D09
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s5, v8                                    ; 100C1005
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s8, s[0:3], 0x32                        ; C2040132
>	v_mad_f32 v8, -v6, s6, s6                                   ; D2820008 20180D06
>	v_mad_f32 v9, -v6, s7, s7                                   ; D2820009 201C0F06
>	v_mul_f32_e32 v8, v12, v8                                   ; 1010110C
>	v_mul_f32_e32 v9, v12, v9                                   ; 1012130C
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_mac_f32_e32 v15, v8, v5                                   ; 3E1E0B08
>	v_mul_f32_e32 v8, v17, v9                                   ; 10101311
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v6, -v6, s8, s8                                   ; D2820006 20201106
>	v_mac_f32_e32 v16, v8, v5                                   ; 3E200B08
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	v_mul_f32_e32 v6, v12, v6                                   ; 100C0D0C
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_cubema_f32 v14, v22, v26, v29                             ; D28E000E 04763516
>	v_log_f32_e32 v17, v8                                       ; 7E224F08
>	s_and_b32 s24, s24, s35                                     ; 87182318
>	image_sample v[8:10], v[0:1], s[28:35], s[24:27] dmask:0x7  ; F0800700 00C70800
>	v_rcp_f32_e64 v1, |v14|                                     ; D3540101 0000010E
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mac_f32_e32 v11, v6, v5                                   ; 3E160B06
>	v_cubetc_f32 v5, v22, v26, v29                              ; D28C0005 04763516
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v17                    ; 0E0022FF 40A00000
>	v_cubesc_f32 v12, v22, v26, v29                             ; D28A000C 04763516
>	s_buffer_load_dword s5, s[0:3], 0x7                         ; C2028107
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_cubeid_f32 v6, v22, v26, v29                              ; D2880006 04763516
>	v_max_f32_e32 v18, 0, v18                                   ; 20242480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_mac_f32_e32 v4, v1, v12                                   ; 3E081901
>	v_mul_f32_e32 v0, v18, v0                                   ; 10000112
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v27, v0                                   ; 100A011B
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s5, v0                                    ; 08000005
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v19                                ; 0A0C2604
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s6, s[0:3], 0x8                         ; C2030108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s5                                      ; 7E0C4805
>	v_sub_f32_e32 v6, s5, v6                                    ; 080C0C05
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s7, s[0:3], 0x9                         ; C2038109
>	v_interp_p1_f32 v6, v2, 0, 2, [m0]                          ; C8180802
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 0, 2, [m0]                    ; C8190803
>	v_mul_f32_e32 v1, v27, v1                                   ; 1002031B
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v27, v4                                   ; 1008091B
>	v_mac_f32_e32 v1, v8, v15                                   ; 3E021F08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s6, s6                                   ; D2820000 20180D06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v16                                   ; 3E082109
>	v_mad_f32 v1, -v6, s7, s7                                   ; D2820001 201C0F06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v11                                  ; 3E0A170A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 64
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1816 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..14]
>DCL CONST[20]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     6.0000,     4.0000}
>IMM[3] FLT32 {    0.3000,     0.5900,     0.1100,    32.0000}
>IMM[4] FLT32 {    5.0000,     0.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[5], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[4], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[4].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[4].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[4].xyzz
> 23: DP3 TEMP[5].x, TEMP[4].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[4].xyzz
> 25: MAD TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz, -TEMP[2].xyzz
> 26: MOV TEMP[6].xy, IN[1].zwww
> 27: TEX TEMP[6], TEMP[6], SAMP[6], 2D
> 28: ADD TEMP[7].xyz, TEMP[6].zyyy, IMM[1].xxxx
> 29: MUL TEMP[7].xy, TEMP[7].xyzz, IMM[0].xxxx
> 30: MUL TEMP[8].x, TEMP[6].wwww, IMM[0].xxxx
> 31: DP2 TEMP[9].x, TEMP[7].xyyy, TEMP[7].xyyy
> 32: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 33: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 34: SQRT TEMP[9].x, TEMP[9].xxxx
> 35: MUL TEMP[10].xyz, IN[3].xyzz, TEMP[7].xxxx
> 36: MAD TEMP[7].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[10].xyzz
> 37: MAD TEMP[7].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[7].xyzz
> 38: DP3 TEMP[9].x, TEMP[5].xyzz, TEMP[7].xyzz
> 39: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 40: ADD TEMP[9].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 41: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 42: POW TEMP[9].x, TEMP[9].xxxx, IMM[1].yyyy
> 43: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 44: MUL TEMP[10].x, IMM[1].zzzz, TEMP[3].zzzz
> 45: ADD TEMP[10].x, TEMP[9].xxxx, -TEMP[10].xxxx
> 46: LRP TEMP[11].x, TEMP[3].zzzz, IMM[1].wwww, IMM[0].wwww
> 47: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[11].xxxx
> 48: MOV_SAT TEMP[10].x, TEMP[10].xxxx
> 49: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 50: MUL TEMP[8].x, TEMP[8].xxxx, IMM[2].xxxx
> 51: MUL TEMP[0].x, TEMP[6].xxxx, TEMP[3].yyyy
> 52: DP3 TEMP[5].x, -TEMP[5].xyzz, TEMP[1].xyzz
> 53: ADD TEMP[5].x, TEMP[5].xxxx, IMM[0].wwww
> 54: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[1].xyzz
> 55: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
> 56: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 57: ADD TEMP[5].x, TEMP[5].xxxx, -TEMP[6].xxxx
> 58: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 59: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 60: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 61: MUL TEMP[5].x, TEMP[9].xxxx, TEMP[5].xxxx
> 62: MAD TEMP[1].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 63: MUL TEMP[6], CONST[4], TEMP[1].xxxx
> 64: MAD TEMP[6], CONST[5], TEMP[1].yyyy, TEMP[6]
> 65: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[6]
> 66: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 67: MOV TEMP[6].xyz, -CONST[1].xyzx
> 68: MOV TEMP[9].xy, TEMP[1].xyyy
> 69: MOV TEMP[9].w, IMM[0].wwww
> 70: MOV TEMP[9].z, TEMP[1].zzzz
> 71: TXP TEMP[1].x, TEMP[9], SAMP[0], SHADOW2D
> 72: DP3 TEMP[9].x, TEMP[6].xyzz, TEMP[7].xyzz
> 73: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 74: ADD TEMP[9].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 75: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 76: MOV TEMP[10].xyz, TEMP[4].xyzz
> 77: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
> 78: DP3 TEMP[11].x, TEMP[4].xyzz, TEMP[2].xyzz
> 79: MUL TEMP[11].xyz, TEMP[11].xxxx, TEMP[4].xyzz
> 80: MAD TEMP[11].xyz, IMM[0].xxxx, TEMP[11].xyzz, -TEMP[2].xyzz
> 81: ADD TEMP[12].x, IMM[0].wwww, -TEMP[3].zzzz
> 82: MUL TEMP[12].x, TEMP[12].xxxx, IMM[2].zzzz
> 83: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
> 84: MUL TEMP[0].x, IMM[2].wwww, TEMP[0].xxxx
> 85: DP3 TEMP[6].x, TEMP[6].xyzz, TEMP[4].xyzz
> 86: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 87: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 88: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 89: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[9].xxxx
> 90: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 91: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 92: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 93: MUL TEMP[1].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 94: MAD TEMP[0].xyz, TEMP[10].xyzz, TEMP[0].xxxx, TEMP[1].xyzz
> 95: ADD TEMP[1].xyz, CONST[11].xyzz, -IN[0].xyzz
> 96: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[1].xyzz
> 97: RSQ TEMP[9].x, TEMP[6].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 99: DP3 TEMP[10].x, TEMP[1].xyzz, TEMP[7].xyzz
>100: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>101: ADD TEMP[10].x, TEMP[8].xxxx, -TEMP[10].xxxx
>102: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>103: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>104: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[4].xyzz
>105: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>106: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[9].xxxx
>107: MUL TEMP[6].x, TEMP[6].xxxx, CONST[11].wwww
>108: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>109: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
>110: MUL TEMP[6].xyz, CONST[12].xyzz, TEMP[6].xxxx
>111: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>112: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>113: LRP TEMP[9].x, TEMP[9].xxxx, IMM[0].wwww, TEMP[10].xxxx
>114: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[9].xxxx
>115: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[3].yyyy
>116: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[6].xyzz, TEMP[0].xyzz
>117: ADD TEMP[1].xyz, CONST[13].xyzz, -IN[0].xyzz
>118: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[1].xyzz
>119: RSQ TEMP[9].x, TEMP[6].xxxx
>120: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>121: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[7].xyzz
>122: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>123: ADD TEMP[7].x, TEMP[8].xxxx, -TEMP[7].xxxx
>124: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>125: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
>126: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[4].xyzz
>127: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>128: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[9].xxxx
>129: MUL TEMP[6].x, TEMP[6].xxxx, CONST[13].wwww
>130: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>131: ADD TEMP[6].x, IMM[0].wwww, -TEMP[6].xxxx
>132: MUL TEMP[6].xyz, CONST[14].xyzz, TEMP[6].xxxx
>133: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
>134: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>135: LRP TEMP[7].x, TEMP[9].xxxx, IMM[0].wwww, TEMP[7].xxxx
>136: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[7].xxxx
>137: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[3].yyyy
>138: MAD TEMP[0].xyz, TEMP[1].xxxx, TEMP[6].xyzz, TEMP[0].xyzz
>139: MOV TEMP[1].xy, IN[1].xyyy
>140: TEX TEMP[1], TEMP[1], SAMP[7], 2D
>141: MOV TEMP[6].w, TEMP[1].wwww
>142: DP3 TEMP[7].x, TEMP[1].xyzz, IMM[3].xyzz
>143: ADD TEMP[8].x, CONST[20].wwww, IMM[0].wwww
>144: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[8].xxxx
>145: MUL TEMP[6].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>146: MUL TEMP[1].xyz, TEMP[6], IMM[3].wwww
>147: MOV TEMP[6].xy, IN[1].xyyy
>148: TEX TEMP[6].xyz, TEMP[6], SAMP[3], 2D
>149: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[4].xyzz
>150: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>151: ADD TEMP[2].x, IMM[0].wwww, -TEMP[2].xxxx
>152: POW TEMP[2].x, TEMP[2].xxxx, IMM[4].xxxx
>153: MAX TEMP[3].xyz, TEMP[3].zzzz, IMM[4].yyyy
>154: MUL TEMP[2].xyz, TEMP[2].xxxx, TEMP[3].xyzz
>155: MOV TEMP[3].xyz, TEMP[11].xyzz
>156: MOV TEMP[3].w, TEMP[12].xxxx
>157: TXL TEMP[3].xyz, TEMP[3], SAMP[2], CUBE
>158: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xyzz
>159: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>160: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[6].xyzz, TEMP[2].xyzz
>161: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>162: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>163: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].yyyy
>164: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>165: ADD TEMP[2].x, TEMP[2].xxxx, IMM[4].zzzz
>166: RCP TEMP[2].x, TEMP[2].xxxx
>167: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>168: FRC TEMP[2].x, CONST[1].wwww
>169: MUL TEMP[2].x, TEMP[2].xxxx, IMM[4].wwww
>170: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>171: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>172: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>173: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>174: MOV TEMP[0].w, IN[0].wwww
>175: MOV OUT[0], TEMP[0]
>176: END
>radeonsi: Compiling shader 85
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 23, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 19, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fsub float %134, %49
>  %136 = fmul float %132, 2.000000e+00
>  %137 = fsub float %136, %50
>  %138 = fmul float %133, 2.000000e+00
>  %139 = fsub float %138, %51
>  %140 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %141 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %142 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %143 = load <8 x i32>, <8 x i32> addrspace(2)* %142, align 32, !invariant.load !0
>  %144 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %145 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %144, i64 0, i64 27, !amdgpu.uniform !0
>  %146 = load <4 x i32>, <4 x i32> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = extractelement <8 x i32> %143, i32 7
>  %148 = extractelement <4 x i32> %146, i32 0
>  %149 = and i32 %148, %147
>  %150 = insertelement <4 x i32> %146, i32 %149, i32 0
>  %151 = bitcast float %140 to i32
>  %152 = bitcast float %141 to i32
>  %153 = insertelement <2 x i32> undef, i32 %151, i32 0
>  %154 = insertelement <2 x i32> %153, i32 %152, i32 1
>  %155 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %154, <8 x i32> %143, <4 x i32> %150, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %156 = extractelement <4 x float> %155, i32 0
>  %157 = extractelement <4 x float> %155, i32 1
>  %158 = extractelement <4 x float> %155, i32 2
>  %159 = extractelement <4 x float> %155, i32 3
>  %160 = fadd float %158, -5.000000e-01
>  %161 = fadd float %157, -5.000000e-01
>  %162 = fmul float %160, 2.000000e+00
>  %163 = fmul float %161, 2.000000e+00
>  %164 = fmul float %159, 2.000000e+00
>  %165 = fmul float %162, %162
>  %166 = fmul float %163, %163
>  %167 = fadd float %165, %166
>  %168 = call float @llvm.AMDGPU.clamp.(float %167, float 0.000000e+00, float 1.000000e+00)
>  %169 = fsub float 1.000000e+00, %168
>  %170 = call float @llvm.sqrt.f32(float %169)
>  %171 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %172 = fmul float %171, %162
>  %173 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %174 = fmul float %173, %162
>  %175 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %176 = fmul float %175, %162
>  %177 = fmul float %23, %163
>  %178 = fadd float %177, %172
>  %179 = fmul float %24, %163
>  %180 = fadd float %179, %174
>  %181 = fmul float %25, %163
>  %182 = fadd float %181, %176
>  %183 = fmul float %59, %170
>  %184 = fadd float %183, %178
>  %185 = fmul float %60, %170
>  %186 = fadd float %185, %180
>  %187 = fmul float %61, %170
>  %188 = fadd float %187, %182
>  %189 = fmul float %135, %184
>  %190 = fmul float %137, %186
>  %191 = fadd float %190, %189
>  %192 = fmul float %139, %188
>  %193 = fadd float %191, %192
>  %194 = call float @llvm.AMDGPU.clamp.(float %193, float 0.000000e+00, float 1.000000e+00)
>  %195 = fsub float %164, %194
>  %196 = call float @llvm.AMDGPU.clamp.(float %195, float 0.000000e+00, float 1.000000e+00)
>  %197 = call float @llvm.pow.f32(float %196, float 3.000000e+00)
>  %198 = call float @llvm.AMDGPU.clamp.(float %197, float 0.000000e+00, float 1.000000e+00)
>  %199 = fmul float %79, 0x3FD3333340000000
>  %200 = fsub float %198, %199
>  %201 = fsub float 1.000000e+00, %79
>  %202 = fmul float %79, 2.000000e+01
>  %203 = fadd float %202, %201
>  %204 = fmul float %200, %203
>  %205 = call float @llvm.AMDGPU.clamp.(float %204, float 0.000000e+00, float 1.000000e+00)
>  %206 = fmul float %198, %205
>  %207 = fmul float %164, 0x3FF19999A0000000
>  %208 = fmul float %156, %78
>  %209 = fmul float %135, %59
>  %210 = fsub float -0.000000e+00, %209
>  %211 = fmul float %137, %60
>  %212 = fsub float %210, %211
>  %213 = fmul float %139, %61
>  %214 = fsub float %212, %213
>  %215 = fadd float %214, 1.000000e+00
>  %216 = fmul float %49, %59
>  %217 = fmul float %50, %60
>  %218 = fadd float %217, %216
>  %219 = fmul float %51, %61
>  %220 = fadd float %218, %219
>  %221 = fsub float 1.000000e+00, %220
>  %222 = call float @llvm.AMDGPU.clamp.(float %221, float 0.000000e+00, float 1.000000e+00)
>  %223 = fsub float %215, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fsub float 1.000000e+00, %224
>  %226 = fmul float %225, %225
>  %227 = fmul float %206, %226
>  %228 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %229 = fmul float %59, 0x4007700140000000
>  %230 = fadd float %229, %228
>  %231 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %232 = fmul float %60, 0x4007700140000000
>  %233 = fadd float %232, %231
>  %234 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %235 = fmul float %61, 0x4007700140000000
>  %236 = fadd float %235, %234
>  %237 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %238 = load <16 x i8>, <16 x i8> addrspace(2)* %237, align 16, !invariant.load !0
>  %239 = call float @llvm.SI.load.const(<16 x i8> %238, i32 64)
>  %240 = fmul float %239, %230
>  %241 = call float @llvm.SI.load.const(<16 x i8> %238, i32 68)
>  %242 = fmul float %241, %230
>  %243 = call float @llvm.SI.load.const(<16 x i8> %238, i32 72)
>  %244 = fmul float %243, %230
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 80)
>  %248 = fmul float %247, %233
>  %249 = fadd float %248, %240
>  %250 = call float @llvm.SI.load.const(<16 x i8> %246, i32 84)
>  %251 = fmul float %250, %233
>  %252 = fadd float %251, %242
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 88)
>  %256 = fmul float %255, %233
>  %257 = fadd float %256, %244
>  %258 = call float @llvm.SI.load.const(<16 x i8> %254, i32 96)
>  %259 = fmul float %258, %236
>  %260 = fadd float %259, %249
>  %261 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %262 = load <16 x i8>, <16 x i8> addrspace(2)* %261, align 16, !invariant.load !0
>  %263 = call float @llvm.SI.load.const(<16 x i8> %262, i32 100)
>  %264 = fmul float %263, %236
>  %265 = fadd float %264, %252
>  %266 = call float @llvm.SI.load.const(<16 x i8> %262, i32 104)
>  %267 = fmul float %266, %236
>  %268 = fadd float %267, %257
>  %269 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %270 = load <16 x i8>, <16 x i8> addrspace(2)* %269, align 16, !invariant.load !0
>  %271 = call float @llvm.SI.load.const(<16 x i8> %270, i32 112)
>  %272 = fadd float %260, %271
>  %273 = call float @llvm.SI.load.const(<16 x i8> %270, i32 116)
>  %274 = fadd float %265, %273
>  %275 = call float @llvm.SI.load.const(<16 x i8> %270, i32 120)
>  %276 = fadd float %268, %275
>  %277 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %278 = load <16 x i8>, <16 x i8> addrspace(2)* %277, align 16, !invariant.load !0
>  %279 = call float @llvm.SI.load.const(<16 x i8> %278, i32 16)
>  %280 = fsub float -0.000000e+00, %279
>  %281 = call float @llvm.SI.load.const(<16 x i8> %278, i32 20)
>  %282 = fsub float -0.000000e+00, %281
>  %283 = call float @llvm.SI.load.const(<16 x i8> %278, i32 24)
>  %284 = fsub float -0.000000e+00, %283
>  %285 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %286 = load <8 x i32>, <8 x i32> addrspace(2)* %285, align 32, !invariant.load !0
>  %287 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %288 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %287, i64 0, i64 3, !amdgpu.uniform !0
>  %289 = load <4 x i32>, <4 x i32> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = extractelement <8 x i32> %286, i32 7
>  %291 = extractelement <4 x i32> %289, i32 0
>  %292 = and i32 %291, %290
>  %293 = insertelement <4 x i32> %289, i32 %292, i32 0
>  %294 = bitcast float %276 to i32
>  %295 = bitcast float %272 to i32
>  %296 = bitcast float %274 to i32
>  %297 = insertelement <4 x i32> undef, i32 %294, i32 0
>  %298 = insertelement <4 x i32> %297, i32 %295, i32 1
>  %299 = insertelement <4 x i32> %298, i32 %296, i32 2
>  %300 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %299, <8 x i32> %286, <4 x i32> %293, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %301 = extractelement <4 x float> %300, i32 0
>  %302 = fmul float %184, %280
>  %303 = fmul float %186, %282
>  %304 = fadd float %303, %302
>  %305 = fmul float %188, %284
>  %306 = fadd float %304, %305
>  %307 = call float @llvm.AMDGPU.clamp.(float %306, float 0.000000e+00, float 1.000000e+00)
>  %308 = fsub float %207, %307
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 7, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %320 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %321 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %322 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %323 = call float @llvm.fabs.f32(float %321)
>  %324 = fdiv float 1.000000e+00, %323, !fpmath !1
>  %325 = fmul float %319, %324
>  %326 = fadd float %325, 1.500000e+00
>  %327 = fmul float %320, %324
>  %328 = fadd float %327, 1.500000e+00
>  %329 = bitcast float %328 to i32
>  %330 = bitcast float %326 to i32
>  %331 = bitcast float %322 to i32
>  %332 = insertelement <4 x i32> undef, i32 %329, i32 0
>  %333 = insertelement <4 x i32> %332, i32 %330, i32 1
>  %334 = insertelement <4 x i32> %333, i32 %331, i32 2
>  %335 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %334, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %336 = extractelement <4 x float> %335, i32 0
>  %337 = extractelement <4 x float> %335, i32 1
>  %338 = extractelement <4 x float> %335, i32 2
>  %339 = extractelement <4 x float> %335, i32 3
>  %340 = fmul float %121, %49
>  %341 = fmul float %123, %50
>  %342 = fadd float %341, %340
>  %343 = fmul float %125, %51
>  %344 = fadd float %342, %343
>  %345 = fmul float %344, %121
>  %346 = fmul float %344, %123
>  %347 = fmul float %344, %125
>  %348 = fmul float %345, 2.000000e+00
>  %349 = fsub float %348, %49
>  %350 = fmul float %346, 2.000000e+00
>  %351 = fsub float %350, %50
>  %352 = fmul float %347, 2.000000e+00
>  %353 = fsub float %352, %51
>  %354 = fsub float 1.000000e+00, %79
>  %355 = fmul float %354, 6.000000e+00
>  %356 = fmul float %336, %339
>  %357 = fmul float %337, %339
>  %358 = fmul float %338, %339
>  %359 = fmul float %208, 4.000000e+00
>  %360 = fmul float %121, %280
>  %361 = fmul float %123, %282
>  %362 = fadd float %361, %360
>  %363 = fmul float %125, %284
>  %364 = fadd float %362, %363
>  %365 = call float @llvm.AMDGPU.clamp.(float %364, float 0.000000e+00, float 1.000000e+00)
>  %366 = fmul float %301, %301
>  %367 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %368 = load <16 x i8>, <16 x i8> addrspace(2)* %367, align 16, !invariant.load !0
>  %369 = call float @llvm.SI.load.const(<16 x i8> %368, i32 48)
>  %370 = fmul float %369, %366
>  %371 = call float @llvm.SI.load.const(<16 x i8> %368, i32 52)
>  %372 = fmul float %371, %366
>  %373 = call float @llvm.SI.load.const(<16 x i8> %368, i32 56)
>  %374 = fmul float %373, %366
>  %375 = fmul float %309, %309
>  %376 = call float @llvm.AMDGPU.clamp.(float %375, float 0.000000e+00, float 1.000000e+00)
>  %377 = fmul float %370, %376
>  %378 = fmul float %372, %376
>  %379 = fmul float %374, %376
>  %380 = fmul float %377, %78
>  %381 = fmul float %378, %78
>  %382 = fmul float %379, %78
>  %383 = fmul float %365, %380
>  %384 = fmul float %365, %381
>  %385 = fmul float %365, %382
>  %386 = fmul float %356, %359
>  %387 = fadd float %386, %383
>  %388 = fmul float %357, %359
>  %389 = fadd float %388, %384
>  %390 = fmul float %358, %359
>  %391 = fadd float %390, %385
>  %392 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %393 = load <16 x i8>, <16 x i8> addrspace(2)* %392, align 16, !invariant.load !0
>  %394 = call float @llvm.SI.load.const(<16 x i8> %393, i32 176)
>  %395 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %396 = fsub float %394, %395
>  %397 = call float @llvm.SI.load.const(<16 x i8> %393, i32 180)
>  %398 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %399 = fsub float %397, %398
>  %400 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %401 = load <16 x i8>, <16 x i8> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = call float @llvm.SI.load.const(<16 x i8> %401, i32 184)
>  %403 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %404 = fsub float %402, %403
>  %405 = fmul float %396, %396
>  %406 = fmul float %399, %399
>  %407 = fadd float %406, %405
>  %408 = fmul float %404, %404
>  %409 = fadd float %407, %408
>  %410 = call float @llvm.sqrt.f32(float %409)
>  %411 = fdiv float 1.000000e+00, %410, !fpmath !1
>  %412 = fmul float %396, %411
>  %413 = fmul float %399, %411
>  %414 = fmul float %404, %411
>  %415 = fmul float %412, %184
>  %416 = fmul float %413, %186
>  %417 = fadd float %416, %415
>  %418 = fmul float %414, %188
>  %419 = fadd float %417, %418
>  %420 = call float @llvm.AMDGPU.clamp.(float %419, float 0.000000e+00, float 1.000000e+00)
>  %421 = fsub float %207, %420
>  %422 = call float @llvm.AMDGPU.clamp.(float %421, float 0.000000e+00, float 1.000000e+00)
>  %423 = fmul float %422, %422
>  %424 = fmul float %412, %121
>  %425 = fmul float %413, %123
>  %426 = fadd float %425, %424
>  %427 = fmul float %414, %125
>  %428 = fadd float %426, %427
>  %429 = call float @llvm.AMDGPU.clamp.(float %428, float 0.000000e+00, float 1.000000e+00)
>  %430 = fmul float %409, %411
>  %431 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %432 = load <16 x i8>, <16 x i8> addrspace(2)* %431, align 16, !invariant.load !0
>  %433 = call float @llvm.SI.load.const(<16 x i8> %432, i32 188)
>  %434 = fmul float %430, %433
>  %435 = call float @llvm.AMDGPU.clamp.(float %434, float 0.000000e+00, float 1.000000e+00)
>  %436 = fsub float 1.000000e+00, %435
>  %437 = call float @llvm.SI.load.const(<16 x i8> %432, i32 192)
>  %438 = fmul float %437, %436
>  %439 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %440 = load <16 x i8>, <16 x i8> addrspace(2)* %439, align 16, !invariant.load !0
>  %441 = call float @llvm.SI.load.const(<16 x i8> %440, i32 196)
>  %442 = fmul float %441, %436
>  %443 = call float @llvm.SI.load.const(<16 x i8> %440, i32 200)
>  %444 = fmul float %443, %436
>  %445 = fmul float %423, %423
>  %446 = call float @llvm.AMDGPU.clamp.(float %445, float 0.000000e+00, float 1.000000e+00)
>  %447 = fsub float 1.000000e+00, %411
>  %448 = fmul float %446, %447
>  %449 = fadd float %411, %448
>  %450 = fmul float %438, %449
>  %451 = fmul float %442, %449
>  %452 = fmul float %444, %449
>  %453 = fmul float %450, %78
>  %454 = fmul float %451, %78
>  %455 = fmul float %452, %78
>  %456 = fmul float %429, %453
>  %457 = fadd float %456, %387
>  %458 = fmul float %429, %454
>  %459 = fadd float %458, %389
>  %460 = fmul float %429, %455
>  %461 = fadd float %460, %391
>  %462 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %463 = load <16 x i8>, <16 x i8> addrspace(2)* %462, align 16, !invariant.load !0
>  %464 = call float @llvm.SI.load.const(<16 x i8> %463, i32 208)
>  %465 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %466 = fsub float %464, %465
>  %467 = call float @llvm.SI.load.const(<16 x i8> %463, i32 212)
>  %468 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %469 = fsub float %467, %468
>  %470 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %471 = load <16 x i8>, <16 x i8> addrspace(2)* %470, align 16, !invariant.load !0
>  %472 = call float @llvm.SI.load.const(<16 x i8> %471, i32 216)
>  %473 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %474 = fsub float %472, %473
>  %475 = fmul float %466, %466
>  %476 = fmul float %469, %469
>  %477 = fadd float %476, %475
>  %478 = fmul float %474, %474
>  %479 = fadd float %477, %478
>  %480 = call float @llvm.sqrt.f32(float %479)
>  %481 = fdiv float 1.000000e+00, %480, !fpmath !1
>  %482 = fmul float %466, %481
>  %483 = fmul float %469, %481
>  %484 = fmul float %474, %481
>  %485 = fmul float %482, %184
>  %486 = fmul float %483, %186
>  %487 = fadd float %486, %485
>  %488 = fmul float %484, %188
>  %489 = fadd float %487, %488
>  %490 = call float @llvm.AMDGPU.clamp.(float %489, float 0.000000e+00, float 1.000000e+00)
>  %491 = fsub float %207, %490
>  %492 = call float @llvm.AMDGPU.clamp.(float %491, float 0.000000e+00, float 1.000000e+00)
>  %493 = fmul float %492, %492
>  %494 = fmul float %482, %121
>  %495 = fmul float %483, %123
>  %496 = fadd float %495, %494
>  %497 = fmul float %484, %125
>  %498 = fadd float %496, %497
>  %499 = call float @llvm.AMDGPU.clamp.(float %498, float 0.000000e+00, float 1.000000e+00)
>  %500 = fmul float %479, %481
>  %501 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %502 = load <16 x i8>, <16 x i8> addrspace(2)* %501, align 16, !invariant.load !0
>  %503 = call float @llvm.SI.load.const(<16 x i8> %502, i32 220)
>  %504 = fmul float %500, %503
>  %505 = call float @llvm.AMDGPU.clamp.(float %504, float 0.000000e+00, float 1.000000e+00)
>  %506 = fsub float 1.000000e+00, %505
>  %507 = call float @llvm.SI.load.const(<16 x i8> %502, i32 224)
>  %508 = fmul float %507, %506
>  %509 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %510 = load <16 x i8>, <16 x i8> addrspace(2)* %509, align 16, !invariant.load !0
>  %511 = call float @llvm.SI.load.const(<16 x i8> %510, i32 228)
>  %512 = fmul float %511, %506
>  %513 = call float @llvm.SI.load.const(<16 x i8> %510, i32 232)
>  %514 = fmul float %513, %506
>  %515 = fmul float %493, %493
>  %516 = call float @llvm.AMDGPU.clamp.(float %515, float 0.000000e+00, float 1.000000e+00)
>  %517 = fsub float 1.000000e+00, %481
>  %518 = fmul float %516, %517
>  %519 = fadd float %481, %518
>  %520 = fmul float %508, %519
>  %521 = fmul float %512, %519
>  %522 = fmul float %514, %519
>  %523 = fmul float %520, %78
>  %524 = fmul float %521, %78
>  %525 = fmul float %522, %78
>  %526 = fmul float %499, %523
>  %527 = fadd float %526, %457
>  %528 = fmul float %499, %524
>  %529 = fadd float %528, %459
>  %530 = fmul float %499, %525
>  %531 = fadd float %530, %461
>  %532 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %533 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %534 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %535 = load <8 x i32>, <8 x i32> addrspace(2)* %534, align 32, !invariant.load !0
>  %536 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %537 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %536, i64 0, i64 31, !amdgpu.uniform !0
>  %538 = load <4 x i32>, <4 x i32> addrspace(2)* %537, align 16, !invariant.load !0
>  %539 = extractelement <8 x i32> %535, i32 7
>  %540 = extractelement <4 x i32> %538, i32 0
>  %541 = and i32 %540, %539
>  %542 = insertelement <4 x i32> %538, i32 %541, i32 0
>  %543 = bitcast float %532 to i32
>  %544 = bitcast float %533 to i32
>  %545 = insertelement <2 x i32> undef, i32 %543, i32 0
>  %546 = insertelement <2 x i32> %545, i32 %544, i32 1
>  %547 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %546, <8 x i32> %535, <4 x i32> %542, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %548 = extractelement <4 x float> %547, i32 0
>  %549 = extractelement <4 x float> %547, i32 1
>  %550 = extractelement <4 x float> %547, i32 2
>  %551 = fmul float %548, 0x3FD3333340000000
>  %552 = fmul float %549, 0x3FE2E147A0000000
>  %553 = fadd float %552, %551
>  %554 = fmul float %550, 0x3FBC28F5C0000000
>  %555 = fadd float %553, %554
>  %556 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %557 = load <16 x i8>, <16 x i8> addrspace(2)* %556, align 16, !invariant.load !0
>  %558 = call float @llvm.SI.load.const(<16 x i8> %557, i32 332)
>  %559 = fadd float %558, 1.000000e+00
>  %560 = fmul float %555, %559
>  %561 = fmul float %548, %560
>  %562 = fmul float %549, %560
>  %563 = fmul float %550, %560
>  %564 = fmul float %561, 3.200000e+01
>  %565 = fmul float %562, 3.200000e+01
>  %566 = fmul float %563, 3.200000e+01
>  %567 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %568 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %569 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %570 = load <8 x i32>, <8 x i32> addrspace(2)* %569, align 32, !invariant.load !0
>  %571 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %572 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %571, i64 0, i64 15, !amdgpu.uniform !0
>  %573 = load <4 x i32>, <4 x i32> addrspace(2)* %572, align 16, !invariant.load !0
>  %574 = extractelement <8 x i32> %570, i32 7
>  %575 = extractelement <4 x i32> %573, i32 0
>  %576 = and i32 %575, %574
>  %577 = insertelement <4 x i32> %573, i32 %576, i32 0
>  %578 = bitcast float %567 to i32
>  %579 = bitcast float %568 to i32
>  %580 = insertelement <2 x i32> undef, i32 %578, i32 0
>  %581 = insertelement <2 x i32> %580, i32 %579, i32 1
>  %582 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %581, <8 x i32> %570, <4 x i32> %577, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %583 = extractelement <4 x float> %582, i32 0
>  %584 = extractelement <4 x float> %582, i32 1
>  %585 = extractelement <4 x float> %582, i32 2
>  %586 = fmul float %49, %121
>  %587 = fmul float %50, %123
>  %588 = fadd float %587, %586
>  %589 = fmul float %51, %125
>  %590 = fadd float %588, %589
>  %591 = call float @llvm.AMDGPU.clamp.(float %590, float 0.000000e+00, float 1.000000e+00)
>  %592 = fsub float 1.000000e+00, %591
>  %593 = call float @llvm.pow.f32(float %592, float 5.000000e+00)
>  %594 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %595 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %596 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %597 = fmul float %593, %594
>  %598 = fmul float %593, %595
>  %599 = fmul float %593, %596
>  %600 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %601 = load <8 x i32>, <8 x i32> addrspace(2)* %600, align 32, !invariant.load !0
>  %602 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %603 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %602, i64 0, i64 11, !amdgpu.uniform !0
>  %604 = load <4 x i32>, <4 x i32> addrspace(2)* %603, align 16, !invariant.load !0
>  %605 = extractelement <8 x i32> %601, i32 7
>  %606 = extractelement <4 x i32> %604, i32 0
>  %607 = and i32 %606, %605
>  %608 = insertelement <4 x i32> %604, i32 %607, i32 0
>  %609 = call float @llvm.amdgcn.cubetc(float %349, float %351, float %353)
>  %610 = call float @llvm.amdgcn.cubesc(float %349, float %351, float %353)
>  %611 = call float @llvm.amdgcn.cubema(float %349, float %351, float %353)
>  %612 = call float @llvm.amdgcn.cubeid(float %349, float %351, float %353)
>  %613 = call float @llvm.fabs.f32(float %611)
>  %614 = fdiv float 1.000000e+00, %613, !fpmath !1
>  %615 = fmul float %609, %614
>  %616 = fadd float %615, 1.500000e+00
>  %617 = fmul float %610, %614
>  %618 = fadd float %617, 1.500000e+00
>  %619 = bitcast float %618 to i32
>  %620 = bitcast float %616 to i32
>  %621 = bitcast float %612 to i32
>  %622 = bitcast float %355 to i32
>  %623 = insertelement <4 x i32> undef, i32 %619, i32 0
>  %624 = insertelement <4 x i32> %623, i32 %620, i32 1
>  %625 = insertelement <4 x i32> %624, i32 %621, i32 2
>  %626 = insertelement <4 x i32> %625, i32 %622, i32 3
>  %627 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %626, <8 x i32> %601, <4 x i32> %608, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %628 = extractelement <4 x float> %627, i32 0
>  %629 = extractelement <4 x float> %627, i32 1
>  %630 = extractelement <4 x float> %627, i32 2
>  %631 = fmul float %597, %628
>  %632 = fmul float %598, %629
>  %633 = fmul float %599, %630
>  %634 = fmul float %631, %227
>  %635 = fmul float %632, %227
>  %636 = fmul float %633, %227
>  %637 = fmul float %527, %583
>  %638 = fadd float %637, %634
>  %639 = fmul float %529, %584
>  %640 = fadd float %639, %635
>  %641 = fmul float %531, %585
>  %642 = fadd float %641, %636
>  %643 = fadd float %638, %564
>  %644 = fadd float %640, %565
>  %645 = fadd float %642, %566
>  %646 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %647 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %648 = load <16 x i8>, <16 x i8> addrspace(2)* %647, align 16, !invariant.load !0
>  %649 = call float @llvm.SI.load.const(<16 x i8> %648, i32 12)
>  %650 = fsub float %646, %649
>  %651 = call float @llvm.maxnum.f32(float %650, float 0.000000e+00)
>  %652 = call float @llvm.SI.load.const(<16 x i8> %648, i32 28)
>  %653 = call float @llvm.SI.load.const(<16 x i8> %648, i32 12)
>  %654 = fsub float %652, %653
>  %655 = fadd float %654, 0x3F50624DE0000000
>  %656 = fdiv float 1.000000e+00, %655, !fpmath !1
>  %657 = fmul float %651, %656
>  %658 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %659 = load <16 x i8>, <16 x i8> addrspace(2)* %658, align 16, !invariant.load !0
>  %660 = call float @llvm.SI.load.const(<16 x i8> %659, i32 28)
>  %661 = call float @llvm.floor.f32(float %660)
>  %662 = fsub float %660, %661
>  %663 = fmul float %662, 8.000000e+00
>  %664 = call float @llvm.pow.f32(float %657, float %663)
>  %665 = call float @llvm.AMDGPU.clamp.(float %664, float 0.000000e+00, float 1.000000e+00)
>  %666 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %667 = fmul float %666, %665
>  %668 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %669 = load <16 x i8>, <16 x i8> addrspace(2)* %668, align 16, !invariant.load !0
>  %670 = call float @llvm.SI.load.const(<16 x i8> %669, i32 32)
>  %671 = fsub float 1.000000e+00, %667
>  %672 = fmul float %643, %667
>  %673 = fmul float %670, %671
>  %674 = fadd float %672, %673
>  %675 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %676 = load <16 x i8>, <16 x i8> addrspace(2)* %675, align 16, !invariant.load !0
>  %677 = call float @llvm.SI.load.const(<16 x i8> %676, i32 36)
>  %678 = fsub float 1.000000e+00, %667
>  %679 = fmul float %644, %667
>  %680 = fmul float %677, %678
>  %681 = fadd float %679, %680
>  %682 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %683 = load <16 x i8>, <16 x i8> addrspace(2)* %682, align 16, !invariant.load !0
>  %684 = call float @llvm.SI.load.const(<16 x i8> %683, i32 40)
>  %685 = fsub float 1.000000e+00, %667
>  %686 = fmul float %645, %667
>  %687 = fmul float %684, %685
>  %688 = fadd float %686, %687
>  %689 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %690 = bitcast float %5 to i32
>  %691 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %690, 10
>  %692 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %691, float %674, 11
>  %693 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %692, float %681, 12
>  %694 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %693, float %688, 13
>  %695 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %694, float %689, 14
>  %696 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %695, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %696
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x3                     ; C2040103
>	s_buffer_load_dword s10, s[0:3], 0x7                    ; C2050107
>	s_buffer_load_dword s13, s[0:3], 0xb                    ; C206810B
>	s_buffer_load_dword s18, s[0:3], 0xf                    ; C209010F
>	s_buffer_load_dword s17, s[0:3], 0x17                   ; C2088117
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s22, s[0:3], 0x13                   ; C20B0113
>	s_buffer_load_dword s9, s[0:3], 0x4                     ; C2048104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s14, s[0:3], 0xc                    ; C207010C
>	s_buffer_load_dword s15, s[0:3], 0xd                    ; C207810D
>	s_buffer_load_dword s16, s[0:3], 0xe                    ; C208010E
>	s_buffer_load_dword s19, s[0:3], 0x10                   ; C2098110
>	s_buffer_load_dword s20, s[0:3], 0x11                   ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                   ; C20A8112
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_sub_f32_e64 v7, 1.0, s22                              ; D2080007 00002CF2
>	v_mul_f32_e32 v0, s8, v9                                ; 10001208
>	v_mac_f32_e32 v0, s10, v10                              ; 3E00140A
>	v_mac_f32_e32 v0, s13, v11                              ; 3E00160D
>	v_mac_f32_e32 v0, s18, v12                              ; 3E001812
>	v_mul_f32_e32 v1, s17, v0                               ; 10020011
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	v_mad_f32 v8, 2.0, v13, -1.0                            ; D2820008 03CE1AF4
>	v_mad_f32 v13, 2.0, v14, -1.0                           ; D282000D 03CE1CF4
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 33, 0, 0, 0, v16, v17, v18, v19                 ; F800021F 13121110
>	v_mad_f32 v14, 2.0, v15, -1.0                           ; D282000E 03CE1EF4
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v17, 0, v13, v8                               ; D2820011 04221A80
>	v_mad_f32 v18, 0, v8, v13                               ; D2820012 04361080
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v19, 0, v4, v3                                ; D2820013 040E0880
>	v_mac_f32_e32 v17, 0, v14                               ; 3E221C80
>	v_mac_f32_e32 v18, 0, v14                               ; 3E241C80
>	v_mac_f32_e32 v14, 0, v13                               ; 3E1C1A80
>	v_mad_f32 v13, 0, v3, v4                                ; D282000D 04120680
>	v_mac_f32_e32 v19, 0, v5                                ; 3E260A80
>	v_mac_f32_e32 v13, 0, v5                                ; 3E1A0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mul_f32_e32 v4, s6, v9                                ; 10081206
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s8, v10                               ; 3E081408
>	v_mac_f32_e32 v4, s0, v11                               ; 3E081600
>	v_mov_b32_e32 v1, s19                                   ; 7E020213
>	v_mac_f32_e32 v4, s16, v12                              ; 3E081810
>	v_mac_f32_e32 v1, s20, v4                               ; 3E020814
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v3, v19, v18                              ; 10062513
>	v_mul_legacy_f32_e32 v1, s21, v1                        ; 0E020215
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_mul_f32_e32 v8, v13, v14                              ; 10101D0D
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v17, v13, -v3                             ; D2820003 840E1B11
>	v_mac_f32_e32 v7, s22, v1                               ; 3E0E0216
>	v_mul_f32_e32 v15, s4, v9                               ; 101E1204
>	v_mul_f32_e32 v16, s5, v9                               ; 10201205
>	v_mul_f32_e32 v9, v5, v17                               ; 10122305
>	v_mad_f32 v8, v18, v5, -v8                              ; D2820008 84220B12
>	v_mad_f32 v1, v6, v3, -v3                               ; D2820001 840E0706
>	v_mul_f32_e32 v3, v7, v7                                ; 10060F07
>	v_mad_f32 v9, v14, v19, -v9                             ; D2820009 8426270E
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	exp 15, 34, 0, 0, 0, v3, v0, v0, v0                     ; F800022F 00000003
>	v_mac_f32_e32 v15, s9, v10                              ; 3E1E1409
>	v_mac_f32_e32 v16, s7, v10                              ; 3E201407
>	v_mad_f32 v9, v6, v9, -v9                               ; D2820009 84261306
>	exp 15, 35, 0, 0, 0, v19, v13, v5, v8                   ; F800023F 08050D13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	v_mac_f32_e32 v16, s12, v11                             ; 3E20160C
>	exp 15, 36, 0, 0, 0, v9, v1, v17, v18                   ; F800024F 12110109
>	v_mac_f32_e32 v15, s14, v12                             ; 3E1E180E
>	v_mac_f32_e32 v16, s15, v12                             ; 3E20180F
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v15, v16, v4, v0                   ; F80008CF 0004100F
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 552 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                       ; BE88047E
>	s_wqm_b64 exec, exec                                         ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                           ; C0800300
>	s_mov_b32 m0, s11                                            ; BEFC030B
>	v_interp_p1_f32 v1, v4, 3, 3, [m0]                           ; C8040F04
>	v_interp_p2_f32 v1, [v1], v5, 3, 3, [m0]                     ; C8050F05
>	v_interp_p1_f32 v8, v4, 0, 4, [m0]                           ; C8201004
>	v_interp_p2_f32 v8, [v8], v5, 0, 4, [m0]                     ; C8211005
>	v_interp_p1_f32 v14, v4, 1, 4, [m0]                          ; C8381104
>	v_interp_p2_f32 v14, [v14], v5, 1, 4, [m0]                   ; C8391105
>	v_interp_p1_f32 v6, v4, 2, 4, [m0]                           ; C8181204
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	s_buffer_load_dword s11, s[0:3], 0x0                         ; C2058100
>	v_interp_p2_f32 v6, [v6], v5, 2, 4, [m0]                     ; C8191205
>	v_interp_p1_f32 v7, v4, 3, 4, [m0]                           ; C81C1304
>	s_buffer_load_dword s12, s[0:3], 0x1                         ; C2060101
>	v_interp_p2_f32 v7, [v7], v5, 3, 4, [m0]                     ; C81D1305
>	v_interp_p1_f32 v9, v4, 0, 5, [m0]                           ; C8241404
>	s_buffer_load_dword s13, s[0:3], 0x2                         ; C2068102
>	v_interp_p2_f32 v9, [v9], v5, 0, 5, [m0]                     ; C8251405
>	v_interp_p1_f32 v15, v2, 0, 0, [m0]                          ; C83C0002
>	v_interp_p2_f32 v15, [v15], v3, 0, 0, [m0]                   ; C83D0003
>	v_interp_p1_f32 v0, v2, 1, 0, [m0]                           ; C8000102
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_sub_f32_e32 v16, s11, v15                                  ; 08201E0B
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                     ; C8010103
>	v_interp_p1_f32 v18, v2, 2, 0, [m0]                          ; C8480202
>	v_interp_p2_f32 v18, [v18], v3, 2, 0, [m0]                   ; C8490203
>	v_sub_f32_e32 v17, s12, v0                                   ; 0822000C
>	v_mul_f32_e32 v10, v16, v16                                  ; 10142110
>	v_sub_f32_e32 v19, s13, v18                                  ; 0826240D
>	v_mac_f32_e32 v10, v17, v17                                  ; 3E142311
>	v_mac_f32_e32 v10, v19, v19                                  ; 3E142713
>	v_rsq_f32_e32 v20, v10                                       ; 7E285D0A
>	v_mul_f32_e32 v10, v6, v6                                    ; 10140D06
>	v_mac_f32_e32 v10, v7, v7                                    ; 3E140F07
>	v_mac_f32_e32 v10, v9, v9                                    ; 3E141309
>	v_rsq_f32_e32 v10, v10                                       ; 7E145D0A
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                        ; C090055C
>	s_load_dwordx8 s[24:31], s[4:5], 0x50                        ; C0CC0550
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                        ; C092054C
>	v_mul_f32_e32 v25, v10, v9                                   ; 1032130A
>	v_interp_p1_f32 v9, v2, 0, 1, [m0]                           ; C8240402
>	v_mul_f32_e32 v23, v10, v6                                   ; 102E0D0A
>	v_mul_f32_e32 v24, v10, v7                                   ; 10300F0A
>	v_interp_p2_f32 v9, [v9], v3, 0, 1, [m0]                     ; C8250403
>	v_interp_p1_f32 v10, v2, 1, 1, [m0]                          ; C8280502
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	s_and_b32 s32, s32, s31                                      ; 87201F20
>	v_interp_p2_f32 v10, [v10], v3, 1, 1, [m0]                   ; C8290503
>	image_sample v[11:12], v[9:10], s[24:31], s[32:35] dmask:0x6 ; F0800600 01060B09
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                        ; C0CC0540
>	v_mul_f32_e32 v21, v20, v16                                  ; 102A2114
>	v_mul_f32_e32 v22, v20, v17                                  ; 102C2314
>	v_mul_f32_e32 v26, v20, v19                                  ; 10342714
>	s_load_dwordx8 s[12:19], s[4:5], 0x60                        ; C0C60560
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	s_and_b32 s36, s36, s31                                      ; 87241F24
>	image_sample v[6:7], v[9:10], s[24:31], s[36:39] dmask:0xa   ; F0800A00 01260609
>	s_waitcnt vmcnt(0)                                           ; BF8C0F70
>	v_add_f32_e32 v29, v6, v6                                    ; 063A0D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                  ; D2820006 03CE0CF4
>	v_interp_p1_f32 v30, v4, 0, 3, [m0]                          ; C8780C04
>	v_add_f32_e32 v28, v7, v7                                    ; 06380F07
>	v_mad_f32 v7, 2.0, v7, -1.0                                  ; D2820007 03CE0EF4
>	v_mad_f32 v29, v29, v6, -v6                                  ; D282001D 841A0D1D
>	v_interp_p2_f32 v30, [v30], v5, 0, 3, [m0]                   ; C8790C05
>	v_interp_p1_f32 v31, v4, 1, 3, [m0]                          ; C87C0D04
>	v_mac_f32_e32 v29, v7, v7                                    ; 3E3A0F07
>	v_interp_p2_f32 v31, [v31], v5, 1, 3, [m0]                   ; C87D0D05
>	v_interp_p1_f32 v32, v4, 2, 3, [m0]                          ; C8800E04
>	v_add_f32_e64 v4, v29, 0 clamp                               ; D2060804 0001011D
>	v_mad_f32 v33, v28, v30, -v30                                ; D2820021 847A3D1C
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                             ; 080808FF 3F8020C5
>	v_mad_f32 v34, v28, v31, -v31                                ; D2820022 847E3F1C
>	v_interp_p2_f32 v32, [v32], v5, 2, 3, [m0]                   ; C8810E05
>	v_mac_f32_e32 v33, v6, v1                                    ; 3E420306
>	v_sqrt_f32_e32 v4, v4                                        ; 7E086704
>	v_mad_f32 v28, v28, v32, -v32                                ; D282001C 8482411C
>	v_mac_f32_e32 v34, v6, v8                                    ; 3E441106
>	v_mac_f32_e32 v33, v4, v23                                   ; 3E422F04
>	v_mac_f32_e32 v28, v6, v14                                   ; 3E381D06
>	v_mac_f32_e32 v34, v4, v24                                   ; 3E443104
>	v_mul_f32_e32 v29, v21, v33                                  ; 103A4315
>	v_mac_f32_e32 v28, v4, v25                                   ; 3E383304
>	v_mac_f32_e32 v29, v22, v34                                  ; 3E3A4516
>	v_mac_f32_e32 v29, v26, v28                                  ; 3E3A391A
>	v_mul_f32_e32 v4, v33, v29                                   ; 10083B21
>	v_mac_f32_e32 v4, v33, v29                                   ; 3E083B21
>	v_mad_f32 v16, -v16, v20, v4                                 ; D2820010 24122910
>	v_mul_f32_e32 v4, v34, v29                                   ; 10083B22
>	s_load_dwordx4 s[20:23], s[4:5], 0x6c                        ; C08A056C
>	v_mac_f32_e32 v4, v34, v29                                   ; 3E083B22
>	v_mad_f32 v17, -v17, v20, v4                                 ; D2820011 24122911
>	v_mul_f32_e32 v4, v28, v29                                   ; 10083B1C
>	v_mac_f32_e32 v4, v28, v29                                   ; 3E083B1C
>	v_mad_f32 v19, -v19, v20, v4                                 ; D2820013 24122913
>	v_interp_p1_f32 v4, v2, 2, 1, [m0]                           ; C8100602
>	v_interp_p2_f32 v4, [v4], v3, 2, 1, [m0]                     ; C8110603
>	v_interp_p1_f32 v5, v2, 3, 1, [m0]                           ; C8140702
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	s_and_b32 s20, s20, s19                                      ; 87141314
>	v_interp_p2_f32 v5, [v5], v3, 3, 1, [m0]                     ; C8150703
>	image_sample v[4:7], v[4:5], s[12:19], s[20:23] dmask:0xf    ; F0800F00 00A30404
>	s_waitcnt vmcnt(0)                                           ; BF8C0F70
>	v_add_f32_e32 v6, -0.5, v6                                   ; 060C0CF1
>	v_add_f32_e32 v5, -0.5, v5                                   ; 060A0AF1
>	v_add_f32_e32 v6, v6, v6                                     ; 060C0D06
>	v_mul_f32_e32 v20, v6, v30                                   ; 10283D06
>	v_add_f32_e32 v5, v5, v5                                     ; 060A0B05
>	v_mul_f32_e32 v30, v6, v32                                   ; 103C4106
>	v_mac_f32_e32 v20, v5, v1                                    ; 3E280305
>	v_mul_f32_e32 v1, v6, v31                                    ; 10023F06
>	v_mac_f32_e32 v30, v5, v14                                   ; 3E3C1D05
>	v_mac_f32_e32 v1, v5, v8                                     ; 3E021105
>	v_mul_f32_e32 v5, v5, v5                                     ; 100A0B05
>	v_mac_f32_e32 v5, v6, v6                                     ; 3E0A0D06
>	v_add_f32_e64 v5, v5, 0 clamp                                ; D2060805 00010105
>	v_sub_f32_e32 v5, 1.0, v5                                    ; 080A0AF2
>	v_sqrt_f32_e32 v5, v5                                        ; 7E0A6705
>	v_mac_f32_e32 v20, v5, v23                                   ; 3E282F05
>	v_mac_f32_e32 v1, v5, v24                                    ; 3E023105
>	v_mac_f32_e32 v30, v5, v25                                   ; 3E3C3305
>	v_mul_f32_e32 v5, v20, v16                                   ; 100A2114
>	s_buffer_load_dword s12, s[0:3], 0x10                        ; C2060110
>	s_buffer_load_dword s13, s[0:3], 0x11                        ; C2068111
>	s_buffer_load_dword s14, s[0:3], 0x12                        ; C2070112
>	v_mac_f32_e32 v5, v1, v17                                    ; 3E0A2301
>	s_buffer_load_dword s11, s[0:3], 0x15                        ; C2058115
>	v_mac_f32_e32 v5, v30, v19                                   ; 3E0A271E
>	v_add_f32_e64 v5, v5, 0 clamp                                ; D2060805 00010105
>	v_mul_f32_e32 v31, v11, v4                                   ; 103E090B
>	v_mov_b32_e32 v4, 0x403b800a                                 ; 7E0802FF 403B800A
>	v_mad_f32 v8, 2.0, v7, -v5                                   ; D2820008 84160EF4
>	v_mad_f32 v5, v4, v23, v15                                   ; D2820005 043E2F04
>	s_buffer_load_dword s40, s[0:3], 0x16                        ; C2140116
>	s_buffer_load_dword s15, s[0:3], 0x14                        ; C2078114
>	v_add_f32_e32 v14, v7, v7                                    ; 061C0F07
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_mul_f32_e32 v6, s12, v5                                    ; 100C0A0C
>	v_mul_f32_e32 v7, s13, v5                                    ; 100E0A0D
>	v_mul_f32_e32 v32, s14, v5                                   ; 10400A0E
>	v_mad_f32 v5, v4, v24, v0                                    ; D2820005 04023104
>	s_buffer_load_dword s41, s[0:3], 0x18                        ; C2148118
>	s_buffer_load_dword s42, s[0:3], 0x19                        ; C2150119
>	s_buffer_load_dword s43, s[0:3], 0x1a                        ; C215811A
>	v_mac_f32_e32 v7, s11, v5                                    ; 3E0E0A0B
>	s_buffer_load_dword s11, s[0:3], 0x1c                        ; C205811C
>	s_buffer_load_dword s12, s[0:3], 0x1d                        ; C206011D
>	s_buffer_load_dword s13, s[0:3], 0x1e                        ; C206811E
>	v_mad_f32 v4, v4, v25, v18                                   ; D2820004 044A3304
>	v_mac_f32_e32 v6, s15, v5                                    ; 3E0C0A0F
>	v_mac_f32_e32 v32, s40, v5                                   ; 3E400A28
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_mac_f32_e32 v6, s41, v4                                    ; 3E0C0829
>	v_mac_f32_e32 v7, s42, v4                                    ; 3E0E082A
>	v_mac_f32_e32 v32, s43, v4                                   ; 3E40082B
>	v_add_f32_e32 v5, s11, v6                                    ; 060A0C0B
>	v_add_f32_e32 v6, s12, v7                                    ; 060C0E0C
>	v_add_f32_e32 v4, s13, v32                                   ; 0608400D
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                         ; C0C60500
>	s_load_dwordx4 s[20:23], s[4:5], 0xc                         ; C08A050C
>	v_mov_b32_e32 v27, 0x3e99999a                                ; 7E3602FF 3E99999A
>	s_buffer_load_dword s7, s[0:3], 0x4                          ; C2038104
>	s_buffer_load_dword s6, s[0:3], 0x5                          ; C2030105
>	s_buffer_load_dword s11, s[0:3], 0x6                         ; C2058106
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	s_and_b32 s20, s20, s19                                      ; 87141314
>	image_sample_c v32, v[4:7], s[12:19], s[20:23] dmask:0x1     ; F0A00100 00A32004
>	v_cubema_f32 v4, v33, v34, v28                               ; D28E0004 04724521
>	v_rcp_f32_e64 v5, |v4|                                       ; D3540105 00000104
>	v_cubetc_f32 v6, v33, v34, v28                               ; D28C0006 04724521
>	v_mov_b32_e32 v4, 0x3fc00000                                 ; 7E0802FF 3FC00000
>	v_cubesc_f32 v7, v33, v34, v28                               ; D28A0007 04724521
>	v_mad_f32 v6, v5, v6, v4                                     ; D2820006 04120D05
>	v_mad_f32 v5, v5, v7, v4                                     ; D2820005 04120F05
>	v_add_f32_e64 v7, v8, 0 clamp                                ; D2060807 00010108
>	v_log_f32_e32 v7, v7                                         ; 7E0E4F07
>	v_sub_f32_e32 v8, 1.0, v12                                   ; 081018F2
>	v_mac_f32_e32 v8, 0x41a00000, v12                            ; 3E1018FF 41A00000
>	s_load_dwordx8 s[36:43], s[4:5], 0x10                        ; C0D20510
>	v_mul_legacy_f32_e32 v7, 0x40400000, v7                      ; 0E0E0EFF 40400000
>	v_exp_f32_e32 v7, v7                                         ; 7E0E4B07
>	v_add_f32_e64 v7, v7, 0 clamp                                ; D2060807 00010107
>	v_mad_f32 v35, -v12, v27, v7                                 ; D2820023 241E370C
>	v_mul_f32_e32 v8, v8, v35                                    ; 10104708
>	v_add_f32_e64 v8, v8, 0 clamp                                ; D2060808 00010108
>	v_mul_f32_e32 v7, v8, v7                                     ; 100E0F08
>	v_mul_f32_e32 v8, v23, v21                                   ; 10102B17
>	v_mac_f32_e32 v8, v24, v22                                   ; 3E102D18
>	v_mul_f32_e32 v21, v23, v16                                  ; 102A2117
>	v_mad_f32 v21, -v17, v24, -v21                               ; D2820015 A4563111
>	v_mac_f32_e32 v8, v25, v26                                   ; 3E103519
>	v_mad_f32 v21, -v19, v25, v21                                ; D2820015 24563313
>	v_sub_f32_e32 v8, 1.0, v8                                    ; 081010F2
>	v_add_f32_e32 v21, 1.0, v21                                  ; 062A2AF2
>	v_add_f32_e64 v8, v8, 0 clamp                                ; D2060808 00010108
>	v_subrev_f32_e32 v8, v8, v21                                 ; 0A102B08
>	v_add_f32_e64 v8, v8, 0 clamp                                ; D2060808 00010108
>	v_sub_f32_e32 v21, 1.0, v8                                   ; 082A10F2
>	v_mad_f32 v8, -v8, v21, v21                                  ; D2820008 24562B08
>	s_load_dwordx4 s[44:47], s[4:5], 0x1c                        ; C096051C
>	v_mul_f32_e32 v21, v8, v7                                    ; 102A0F08
>	v_mul_f32_e32 v7, s7, v20                                    ; 100E2807
>	v_mad_f32 v7, v1, -s6, -v7                                   ; D2820007 C41C0D01
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                        ; C08C053C
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                        ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                        ; C08A052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                        ; C0CE0530
>	v_mad_f32 v7, -v30, s11, v7                                  ; D2820007 241C171E
>	v_add_f32_e64 v7, v7, 0 clamp                                ; D2060807 00010107
>	v_mov_b32_e32 v22, 0x3f8ccccd                                ; 7E2C02FF 3F8CCCCD
>	v_mad_f32 v7, v14, v22, -v7                                  ; D2820007 841E2D0E
>	v_add_f32_e64 v23, v7, 0 clamp                               ; D2060817 00010107
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	s_and_b32 s44, s44, s43                                      ; 872C2B2C
>	v_cubeid_f32 v7, v33, v34, v28                               ; D2880007 04724521
>	s_and_b64 exec, exec, s[8:9]                                 ; 87FE087E
>	image_sample v[5:8], v[5:8], s[36:43], s[44:47] dmask:0xf    ; F0800F00 01690505
>	s_load_dwordx8 s[36:43], s[4:5], 0x70                        ; C0D20570
>	s_load_dwordx4 s[44:47], s[4:5], 0x7c                        ; C096057C
>	s_buffer_load_dword s4, s[0:3], 0x53                         ; C2020153
>	s_waitcnt vmcnt(0)                                           ; BF8C0F70
>	v_mul_f32_e32 v24, v8, v5                                    ; 10300B08
>	v_mul_f32_e32 v25, v8, v6                                    ; 10320D08
>	v_mul_f32_e32 v8, v8, v7                                     ; 10100F08
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	s_and_b32 s44, s44, s43                                      ; 872C2B2C
>	image_sample v[5:7], v[9:10], s[36:43], s[44:47] dmask:0x7   ; F0800700 01690509
>	s_waitcnt vmcnt(0)                                           ; BF8C0F70
>	v_mul_f32_e32 v26, v27, v5                                   ; 10340B1B
>	v_mac_f32_e32 v26, 0x3f170a3d, v6                            ; 3E340CFF 3F170A3D
>	v_mac_f32_e32 v26, 0x3de147ae, v7                            ; 3E340EFF 3DE147AE
>	v_mac_f32_e32 v26, s4, v26                                   ; 3E343404
>	s_buffer_load_dword s4, s[0:3], 0xc                          ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                          ; C202810D
>	s_buffer_load_dword s8, s[0:3], 0xe                          ; C204010E
>	v_mul_f32_e32 v23, v23, v23                                  ; 102E2F17
>	v_mul_f32_e32 v27, v26, v5                                   ; 10360B1A
>	v_mul_f32_e32 v5, v32, v32                                   ; 100A4120
>	v_mul_f32_e32 v35, v26, v6                                   ; 10460D1A
>	v_mul_f32_e32 v26, v26, v7                                   ; 10340F1A
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_mul_f32_e32 v6, s4, v5                                     ; 100C0A04
>	v_mul_f32_e32 v7, s5, v5                                     ; 100E0A05
>	v_add_f32_e64 v23, v23, 0 clamp                              ; D2060817 00010117
>	v_mul_f32_e32 v5, s8, v5                                     ; 100A0A08
>	v_mul_f32_e32 v6, v23, v6                                    ; 100C0D17
>	v_mul_f32_e32 v7, v23, v7                                    ; 100E0F17
>	v_mul_f32_e32 v5, v23, v5                                    ; 100A0B17
>	v_mul_f32_e32 v23, s7, v33                                   ; 102E4207
>	s_buffer_load_dword s9, s[0:3], 0x2c                         ; C204812C
>	v_mad_f32 v23, v34, -s6, -v23                                ; D2820017 C45C0D22
>	s_buffer_load_dword s36, s[0:3], 0x2d                        ; C212012D
>	v_mad_f32 v23, -v28, s11, v23                                ; D2820017 245C171C
>	s_buffer_load_dword s4, s[0:3], 0x2e                         ; C202012E
>	v_add_f32_e64 v23, v23, 0 clamp                              ; D2060817 00010117
>	v_mul_f32_e32 v6, v11, v6                                    ; 100C0D0B
>	v_mul_f32_e32 v7, v11, v7                                    ; 100E0F0B
>	v_mul_f32_e32 v5, v11, v5                                    ; 100A0B0B
>	v_mul_f32_e32 v32, v6, v23                                   ; 10402F06
>	v_mul_f32_e32 v36, v7, v23                                   ; 10482F07
>	v_mul_f32_e32 v23, v5, v23                                   ; 102E2F05
>	v_mul_f32_e32 v5, 4.0, v31                                   ; 100A3EF6
>	v_mac_f32_e32 v23, v5, v8                                    ; 3E2E1105
>	v_mac_f32_e32 v32, v5, v24                                   ; 3E403105
>	v_mac_f32_e32 v36, v5, v25                                   ; 3E483305
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_sub_f32_e32 v5, s9, v15                                    ; 080A1E09
>	v_sub_f32_e32 v6, s36, v0                                    ; 080C0024
>	v_mul_f32_e32 v7, v5, v5                                     ; 100E0B05
>	v_sub_f32_e32 v8, s4, v18                                    ; 08102404
>	v_mac_f32_e32 v7, v6, v6                                     ; 3E0E0D06
>	v_mac_f32_e32 v7, v8, v8                                     ; 3E0E1108
>	v_rsq_f32_e32 v24, v7                                        ; 7E305D07
>	s_buffer_load_dword s5, s[0:3], 0x2f                         ; C202812F
>	s_buffer_load_dword s6, s[0:3], 0x30                         ; C2030130
>	s_buffer_load_dword s7, s[0:3], 0x31                         ; C2038131
>	v_mul_f32_e32 v5, v24, v5                                    ; 100A0B18
>	v_mul_f32_e32 v25, v20, v5                                   ; 10320B14
>	v_mul_f32_e32 v6, v24, v6                                    ; 100C0D18
>	v_mul_f32_e32 v8, v24, v8                                    ; 10101118
>	v_mac_f32_e32 v25, v1, v6                                    ; 3E320D01
>	v_mac_f32_e32 v25, v30, v8                                   ; 3E32111E
>	v_add_f32_e64 v25, v25, 0 clamp                              ; D2060819 00010119
>	v_mad_f32 v25, v14, v22, -v25                                ; D2820019 84662D0E
>	v_add_f32_e64 v25, v25, 0 clamp                              ; D2060819 00010119
>	s_buffer_load_dword s8, s[0:3], 0x32                         ; C2040132
>	v_mul_f32_e32 v25, v25, v25                                  ; 10323319
>	v_mul_f32_e32 v5, v33, v5                                    ; 100A0B21
>	v_mul_f32_e32 v7, v24, v7                                    ; 100E0F18
>	v_mac_f32_e32 v5, v34, v6                                    ; 3E0A0D22
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_mul_f32_e32 v6, s5, v7                                     ; 100C0E05
>	v_mul_f32_e32 v25, v25, v25                                  ; 10323319
>	v_add_f32_e64 v6, v6, 0 clamp                                ; D2060806 00010106
>	v_add_f32_e64 v25, v25, 0 clamp                              ; D2060819 00010119
>	v_sub_f32_e32 v31, 1.0, v24                                  ; 083E30F2
>	s_buffer_load_dword s4, s[0:3], 0x34                         ; C2020134
>	v_mad_f32 v7, -v6, s6, s6                                    ; D2820007 20180D06
>	v_mac_f32_e32 v24, v31, v25                                  ; 3E30331F
>	s_buffer_load_dword s5, s[0:3], 0x35                         ; C2028135
>	v_mac_f32_e32 v5, v28, v8                                    ; 3E0A111C
>	v_mad_f32 v8, -v6, s7, s7                                    ; D2820008 201C0F06
>	v_mad_f32 v6, -v6, s8, s8                                    ; D2820006 20201106
>	v_mul_f32_e32 v7, v24, v7                                    ; 100E0F18
>	s_buffer_load_dword s6, s[0:3], 0x36                         ; C2030136
>	v_mul_f32_e32 v6, v24, v6                                    ; 100C0D18
>	v_mul_f32_e32 v8, v24, v8                                    ; 10101118
>	v_add_f32_e64 v5, v5, 0 clamp                                ; D2060805 00010105
>	v_mul_f32_e32 v7, v11, v7                                    ; 100E0F0B
>	v_mac_f32_e32 v32, v7, v5                                    ; 3E400B07
>	v_mul_f32_e32 v7, v11, v8                                    ; 100E110B
>	v_mul_f32_e32 v6, v11, v6                                    ; 100C0D0B
>	v_mac_f32_e32 v36, v7, v5                                    ; 3E480B07
>	v_mac_f32_e32 v23, v6, v5                                    ; 3E2E0B06
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_sub_f32_e32 v5, s4, v15                                    ; 080A1E04
>	v_sub_f32_e32 v7, s5, v0                                     ; 080E0005
>	v_mul_f32_e32 v8, v5, v5                                     ; 10100B05
>	v_sub_f32_e32 v6, s6, v18                                    ; 080C2406
>	v_mac_f32_e32 v8, v7, v7                                     ; 3E100F07
>	v_mac_f32_e32 v8, v6, v6                                     ; 3E100D06
>	v_rsq_f32_e32 v15, v8                                        ; 7E1E5D08
>	s_buffer_load_dword s7, s[0:3], 0x37                         ; C2038137
>	s_buffer_load_dword s8, s[0:3], 0x38                         ; C2040138
>	s_buffer_load_dword s4, s[0:3], 0x39                         ; C2020139
>	v_mul_f32_e32 v5, v15, v5                                    ; 100A0B0F
>	v_mul_f32_e32 v18, v20, v5                                   ; 10240B14
>	v_mul_f32_e32 v7, v15, v7                                    ; 100E0F0F
>	v_mac_f32_e32 v18, v1, v7                                    ; 3E240F01
>	v_mul_f32_e32 v1, v15, v6                                    ; 10020D0F
>	v_mac_f32_e32 v18, v30, v1                                   ; 3E24031E
>	v_add_f32_e64 v6, v18, 0 clamp                               ; D2060806 00010112
>	v_mul_f32_e32 v5, v33, v5                                    ; 100A0B21
>	v_mac_f32_e32 v5, v34, v7                                    ; 3E0A0F22
>	v_mad_f32 v6, v14, v22, -v6                                  ; D2820006 841A2D0E
>	v_mac_f32_e32 v5, v28, v1                                    ; 3E0A031C
>	v_add_f32_e64 v1, v6, 0 clamp                                ; D2060801 00010106
>	v_mul_f32_e32 v1, v1, v1                                     ; 10020301
>	v_mul_f32_e32 v1, v1, v1                                     ; 10020301
>	s_buffer_load_dword s5, s[0:3], 0x3a                         ; C202813A
>	v_mul_f32_e32 v6, v15, v8                                    ; 100C110F
>	v_add_f32_e64 v1, v1, 0 clamp                                ; D2060801 00010101
>	v_sub_f32_e32 v7, 1.0, v15                                   ; 080E1EF2
>	v_mac_f32_e32 v15, v7, v1                                    ; 3E1E0307
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_mul_f32_e32 v1, s7, v6                                     ; 10020C07
>	v_add_f32_e64 v1, v1, 0 clamp                                ; D2060801 00010101
>	v_mad_f32 v6, -v1, s8, s8                                    ; D2820006 20201101
>	v_mad_f32 v7, -v1, s4, s4                                    ; D2820007 20100901
>	v_mad_f32 v1, -v1, s5, s5                                    ; D2820001 20140B01
>	v_mul_f32_e32 v6, v15, v6                                    ; 100C0D0F
>	v_mul_f32_e32 v1, v15, v1                                    ; 1002030F
>	v_mul_f32_e32 v7, v15, v7                                    ; 100E0F0F
>	v_add_f32_e64 v5, v5, 0 clamp                                ; D2060805 00010105
>	v_mul_f32_e32 v6, v11, v6                                    ; 100C0D0B
>	v_mac_f32_e32 v32, v6, v5                                    ; 3E400B06
>	v_mul_f32_e32 v6, v11, v7                                    ; 100C0F0B
>	v_mul_f32_e32 v1, v11, v1                                    ; 1002030B
>	v_mac_f32_e32 v36, v6, v5                                    ; 3E480B06
>	v_mac_f32_e32 v23, v1, v5                                    ; 3E2E0B01
>	v_cubema_f32 v5, v16, v17, v19                               ; D28E0005 044E2310
>	v_rcp_f32_e64 v8, |v5|                                       ; D3540108 00000105
>	v_cubetc_f32 v1, v16, v17, v19                               ; D28C0001 044E2310
>	s_buffer_load_dword s4, s[0:3], 0x3                          ; C2020103
>	v_cubesc_f32 v7, v16, v17, v19                               ; D28A0007 044E2310
>	v_mad_f32 v5, v8, v1, v4                                     ; D2820005 04120308
>	v_mov_b32_e32 v1, 0x40c00000                                 ; 7E0202FF 40C00000
>	s_buffer_load_dword s5, s[0:3], 0x7                          ; C2028107
>	v_mac_f32_e32 v4, v8, v7                                     ; 3E080F08
>	v_mad_f32 v7, -v12, v1, v1                                   ; D2820007 2406030C
>	v_add_f32_e64 v1, v29, 0 clamp                               ; D2060801 0001011D
>	v_sub_f32_e32 v1, 1.0, v1                                    ; 080202F2
>	v_log_f32_e32 v1, v1                                         ; 7E024F01
>	s_and_b32 s24, s24, s35                                      ; 87182318
>	v_cubeid_f32 v6, v16, v17, v19                               ; D2880006 044E2310
>	s_and_b32 s20, s20, s19                                      ; 87141314
>	image_sample v[8:10], v[9:10], s[28:35], s[24:27] dmask:0x7  ; F0800700 00C70809
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7  ; F0900700 00A30404
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_mov_b32_e32 v7, s4                                         ; 7E0E0204
>	v_sub_f32_e32 v7, s5, v7                                     ; 080E0E05
>	v_add_f32_e32 v7, 0x3a83126f, v7                             ; 060E0EFF 3A83126F
>	v_mul_legacy_f32_e32 v1, 0x40a00000, v1                      ; 0E0202FF 40A00000
>	v_rcp_f32_e32 v7, v7                                         ; 7E0E5507
>	v_max_f32_e32 v11, 0, v12                                    ; 20161880
>	v_exp_f32_e32 v1, v1                                         ; 7E024B01
>	v_mul_f32_e32 v1, v11, v1                                    ; 1002030B
>	v_subrev_f32_e32 v0, s4, v0                                  ; 0A000004
>	s_waitcnt vmcnt(0)                                           ; BF8C0F70
>	v_mul_f32_e32 v4, v4, v1                                     ; 10080304
>	v_mul_f32_e32 v5, v5, v1                                     ; 100A0305
>	v_mul_f32_e32 v1, v6, v1                                     ; 10020306
>	v_max_f32_e32 v0, 0, v0                                      ; 20000080
>	v_mul_f32_e32 v6, v21, v1                                    ; 100C0315
>	v_mul_f32_e32 v4, v21, v4                                    ; 10080915
>	v_mul_f32_e32 v5, v21, v5                                    ; 100A0B15
>	v_mul_f32_e32 v0, v7, v0                                     ; 10000107
>	v_mac_f32_e32 v4, v8, v32                                    ; 3E084108
>	v_mov_b32_e32 v1, 0x42000000                                 ; 7E0202FF 42000000
>	v_mac_f32_e32 v5, v9, v36                                    ; 3E0A4909
>	v_mac_f32_e32 v6, v10, v23                                   ; 3E0C2F0A
>	v_log_f32_e32 v0, v0                                         ; 7E004F00
>	v_mac_f32_e32 v4, v1, v27                                    ; 3E083701
>	v_mac_f32_e32 v5, v1, v35                                    ; 3E0A4701
>	v_mac_f32_e32 v6, v1, v26                                    ; 3E0C3501
>	v_floor_f32_e32 v1, s5                                       ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                     ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                             ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                          ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                          ; C2038109
>	v_mul_legacy_f32_e32 v0, v1, v0                              ; 0E000101
>	s_buffer_load_dword s0, s[0:3], 0xa                          ; C200010A
>	v_interp_p1_f32 v1, v2, 0, 2, [m0]                           ; C8040802
>	v_exp_f32_e32 v0, v0                                         ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                                ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                     ; C8050803
>	v_mul_f32_e32 v7, v0, v1                                     ; 100E0300
>	s_waitcnt lgkmcnt(0)                                         ; BF8C007F
>	v_mad_f32 v0, -v7, s6, s6                                    ; D2820000 20180D07
>	v_mad_f32 v1, -v7, s7, s7                                    ; D2820001 201C0F07
>	v_mac_f32_e32 v0, v7, v4                                     ; 3E000907
>	v_mad_f32 v4, -v7, s0, s0                                    ; D2820004 20000107
>	v_mac_f32_e32 v1, v7, v5                                     ; 3E020B07
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                           ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                     ; C8150303
>	v_mac_f32_e32 v4, v7, v6                                     ; 3E080D07
>	v_mov_b32_e32 v2, v4                                         ; 7E040304
>	v_mov_b32_e32 v3, v5                                         ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2140 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..18]
>DCL CONST[24]
>DCL TEMP[0..65], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.0000,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,    32.0000,     0.0010}
>IMM[5] INT32 {0, 4, 2, 1}
>IMM[6] FLT32 {    0.3000,     0.5900,     0.1100,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[1].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[5], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[1].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[4], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[6].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[6].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[6].xyzz
> 31: DP3 TEMP[7].x, TEMP[6].xyzz, TEMP[2].xyzz
> 32: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[6].xyzz
> 33: MAD TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz, -TEMP[2].xyzz
> 34: MOV TEMP[8].xy, IN[1].zwww
> 35: TEX TEMP[8], TEMP[8], SAMP[6], 2D
> 36: MOV TEMP[9], TEMP[8]
> 37: ADD TEMP[9].xyz, TEMP[8].zyyy, IMM[1].xxxx
> 38: MUL TEMP[9].xyz, TEMP[9].xyzz, IMM[0].xxxx
> 39: MUL TEMP[10].x, TEMP[8].wwww, IMM[0].xxxx
> 40: MOV TEMP[9].w, TEMP[10].xxxx
> 41: DP2 TEMP[11].x, TEMP[9].xyyy, TEMP[9].xyyy
> 42: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 43: ADD TEMP[11].x, IMM[0].wwww, -TEMP[11].xxxx
> 44: SQRT TEMP[11].x, TEMP[11].xxxx
> 45: MUL TEMP[12].xyz, IN[3].xyzz, TEMP[9].xxxx
> 46: MAD TEMP[12].xyz, TEMP[0].xyzz, TEMP[9].yyyy, TEMP[12].xyzz
> 47: MAD TEMP[11].xyz, TEMP[1].xyzz, TEMP[11].xxxx, TEMP[12].xyzz
> 48: MOV TEMP[9].xyz, TEMP[11].xyzx
> 49: DP3 TEMP[12].x, TEMP[7].xyzz, TEMP[11].xyzz
> 50: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 51: ADD TEMP[12].x, TEMP[10].xxxx, -TEMP[12].xxxx
> 52: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 53: POW TEMP[12].x, TEMP[12].xxxx, IMM[1].yyyy
> 54: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 55: MUL TEMP[13].x, IMM[1].zzzz, TEMP[4].zzzz
> 56: ADD TEMP[13].x, TEMP[12].xxxx, -TEMP[13].xxxx
> 57: LRP TEMP[14].x, TEMP[4].zzzz, IMM[1].wwww, IMM[0].wwww
> 58: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[14].xxxx
> 59: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 60: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[13].xxxx
> 61: MUL TEMP[10].x, TEMP[10].xxxx, IMM[2].xxxx
> 62: MOV TEMP[9].w, TEMP[10].xxxx
> 63: MUL TEMP[0].x, TEMP[8].xxxx, TEMP[4].yyyy
> 64: DP3 TEMP[7].x, -TEMP[7].xyzz, TEMP[1].xyzz
> 65: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 66: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 67: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 68: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 69: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 70: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 71: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 72: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 73: MUL TEMP[7].x, TEMP[12].xxxx, TEMP[7].xxxx
> 74: MOV TEMP[0].y, TEMP[7].xxxx
> 75: MOV TEMP[8].w, IMM[0].wwww
> 76: MAD TEMP[8].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 77: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 78: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 79: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 80: ADD TEMP[1], TEMP[1], CONST[7]
> 81: MAD TEMP[8].x, IMM[2].zzzz, TEMP[4].zzzz, IMM[0].xxxx
> 82: EX2 TEMP[8].x, TEMP[8].xxxx
> 83: MOV TEMP[12].xyz, -CONST[1].xyzx
> 84: ADD TEMP[13].xyz, TEMP[12].xyzz, TEMP[2].xyzz
> 85: MUL TEMP[13].xyz, TEMP[13].xyzz, IMM[2].wwww
> 86: DP3 TEMP[14].x, TEMP[13].xyzz, TEMP[13].xyzz
> 87: RSQ TEMP[14].x, TEMP[14].xxxx
> 88: MUL TEMP[13].xyz, TEMP[13].xyzz, TEMP[14].xxxx
> 89: DP3 TEMP[14].x, TEMP[12].xyzz, TEMP[6].xyzz
> 90: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 91: MOV TEMP[15].xy, TEMP[1].xyyy
> 92: MOV TEMP[15].w, IMM[0].wwww
> 93: MOV TEMP[15].z, TEMP[1].zzzz
> 94: TXP TEMP[1], TEMP[15], SAMP[0], SHADOW2D
> 95: MOV TEMP[15].x, TEMP[1].xxxx
> 96: DP3 TEMP[15].x, TEMP[12].xyzz, TEMP[11].xyzz
> 97: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 98: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[15].xxxx
> 99: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>100: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
>101: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
>102: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>103: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>104: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[10].xxxx
>105: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
>106: MUL TEMP[1].xyz, TEMP[14].xxxx, TEMP[1].xyzz
>107: MOV TEMP[10].xyz, TEMP[6].xyzz
>108: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
>109: MOV TEMP[15], TEMP[10]
>110: DP3 TEMP[15].x, TEMP[6].xyzz, TEMP[2].xyzz
>111: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[6].xyzz
>112: MAD TEMP[15].xyz, IMM[0].xxxx, TEMP[15].xyzz, -TEMP[2].xyzz
>113: ADD TEMP[16].x, IMM[0].wwww, -TEMP[4].zzzz
>114: MUL TEMP[16].x, TEMP[16].xxxx, IMM[3].xxxx
>115: MOV TEMP[15].w, TEMP[16].xxxx
>116: DP3 TEMP[17].x, TEMP[2].xyzz, TEMP[6].xyzz
>117: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>118: ADD TEMP[17].x, IMM[0].wwww, -TEMP[17].xxxx
>119: POW TEMP[17].x, TEMP[17].xxxx, IMM[3].yyyy
>120: MAX TEMP[4].xyz, TEMP[4].zzzz, IMM[3].zzzz
>121: MUL TEMP[4].xyz, TEMP[17].xxxx, TEMP[4].xyzz
>122: MOV TEMP[15].xyz, TEMP[15].xyzz
>123: MOV TEMP[15].w, TEMP[16].xxxx
>124: TXL TEMP[15], TEMP[15], SAMP[2], CUBE
>125: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[15].xyzz
>126: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
>127: MUL TEMP[15].x, IMM[3].wwww, TEMP[0].xxxx
>128: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[15].xxxx, TEMP[1].xyzz
>129: DP3 TEMP[12].x, TEMP[12].xyzz, TEMP[13].xyzz
>130: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>131: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
>132: POW TEMP[12].x, TEMP[12].xxxx, IMM[3].yyyy
>133: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>134: ADD TEMP[12].x, TEMP[8].xxxx, IMM[0].xxxx
>135: MUL TEMP[12].x, TEMP[12].xxxx, IMM[4].xxxx
>136: MUL TEMP[15].x, -TEMP[8].xxxx, IMM[2].wwww
>137: EX2 TEMP[15].x, TEMP[15].xxxx
>138: ADD TEMP[15].x, IMM[0].xxxx, -TEMP[15].xxxx
>139: RCP TEMP[15].x, TEMP[15].xxxx
>140: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[15].xxxx
>141: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>142: DP3 TEMP[12].x, TEMP[6].xyzz, TEMP[13].xyzz
>143: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>144: POW TEMP[12].x, TEMP[12].xxxx, TEMP[8].xxxx
>145: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>146: DP3 TEMP[12].x, TEMP[2].xyzz, TEMP[6].xyzz
>147: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>148: MAX TEMP[12].x, TEMP[14].xxxx, TEMP[12].xxxx
>149: ADD TEMP[12].x, TEMP[12].xxxx, IMM[4].yyyy
>150: RCP TEMP[12].x, TEMP[12].xxxx
>151: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx, TEMP[4].xyzz
>152: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>153: MOV TEMP[7].x, IMM[5].xxxx
>154: BGNLOOP :0
>155:   ISGE TEMP[12].x, TEMP[7].xxxx, IMM[5].yyyy
>156:   UIF TEMP[12].xxxx :0
>157:     BRK
>158:   ENDIF
>159:   UMUL TEMP[13].x, TEMP[7].xxxx, IMM[5].zzzz
>160:   UARL ADDR[0].x, TEMP[13].xxxx
>161:   UARL ADDR[0].x, TEMP[13].xxxx
>162:   ADD TEMP[14].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>163:   DP3 TEMP[15].x, TEMP[14].xyzz, TEMP[14].xyzz
>164:   RSQ TEMP[16].x, TEMP[15].xxxx
>165:   MUL TEMP[17].xyz, TEMP[14].xyzz, TEMP[16].xxxx
>166:   ADD TEMP[18].xyz, TEMP[17].xyzz, TEMP[2].xyzz
>167:   MUL TEMP[19].xyz, TEMP[18].xyzz, IMM[2].wwww
>168:   DP3 TEMP[20].x, TEMP[19].xyzz, TEMP[19].xyzz
>169:   RSQ TEMP[21].x, TEMP[20].xxxx
>170:   MUL TEMP[22].xyz, TEMP[19].xyzz, TEMP[21].xxxx
>171:   DP3 TEMP[23].x, TEMP[17].xyzz, TEMP[6].xyzz
>172:   MOV_SAT TEMP[24].x, TEMP[23].xxxx
>173:   DP3 TEMP[25].x, TEMP[17].xyzz, TEMP[11].xyzz
>174:   MOV_SAT TEMP[26].x, TEMP[25].xxxx
>175:   ADD TEMP[27].x, TEMP[9].wwww, -TEMP[26].xxxx
>176:   MOV_SAT TEMP[28].x, TEMP[27].xxxx
>177:   MUL TEMP[29].x, TEMP[28].xxxx, TEMP[28].xxxx
>178:   UMAD TEMP[30].x, TEMP[7].xxxx, IMM[5].zzzz, IMM[5].wwww
>179:   MUL TEMP[31].x, TEMP[15].xxxx, TEMP[16].xxxx
>180:   UMUL TEMP[32].x, TEMP[7].xxxx, IMM[5].zzzz
>181:   UARL ADDR[0].x, TEMP[32].xxxx
>182:   MUL TEMP[33].x, TEMP[31].xxxx, CONST[ADDR[0].x+11].wwww
>183:   MOV_SAT TEMP[34].x, TEMP[33].xxxx
>184:   ADD TEMP[35].x, IMM[0].wwww, -TEMP[34].xxxx
>185:   UARL ADDR[0].x, TEMP[30].xxxx
>186:   MUL TEMP[36].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[35].xxxx
>187:   MUL TEMP[37].x, TEMP[29].xxxx, TEMP[29].xxxx
>188:   MOV_SAT TEMP[38].x, TEMP[37].xxxx
>189:   LRP TEMP[39].x, TEMP[16].xxxx, IMM[0].wwww, TEMP[38].xxxx
>190:   MUL TEMP[40].xyz, TEMP[36].xyzz, TEMP[39].xxxx
>191:   MUL TEMP[41].xyz, TEMP[40].xyzz, TEMP[5].yyyy
>192:   MUL TEMP[42].xyz, TEMP[24].xxxx, TEMP[41].xyzz
>193:   ADD TEMP[10].xyz, TEMP[10].xyzz, TEMP[42].xyzz
>194:   DP3 TEMP[43].x, TEMP[17].xyzz, TEMP[22].xyzz
>195:   MOV_SAT TEMP[44].x, TEMP[43].xxxx
>196:   ADD TEMP[45].x, IMM[0].wwww, -TEMP[44].xxxx
>197:   POW TEMP[46].x, TEMP[45].xxxx, IMM[3].yyyy
>198:   MUL TEMP[47].xyz, TEMP[42].xyzz, TEMP[46].xxxx
>199:   ADD TEMP[48].x, TEMP[8].xxxx, IMM[0].xxxx
>200:   MUL TEMP[49].x, TEMP[48].xxxx, IMM[4].xxxx
>201:   MUL TEMP[50].x, -TEMP[8].xxxx, IMM[2].wwww
>202:   EX2 TEMP[51].x, TEMP[50].xxxx
>203:   ADD TEMP[52].x, IMM[0].xxxx, -TEMP[51].xxxx
>204:   RCP TEMP[53].x, TEMP[52].xxxx
>205:   MUL TEMP[54].x, TEMP[49].xxxx, TEMP[53].xxxx
>206:   MUL TEMP[55].xyz, TEMP[47].xyzz, TEMP[54].xxxx
>207:   DP3 TEMP[56].x, TEMP[6].xyzz, TEMP[22].xyzz
>208:   MOV_SAT TEMP[57].x, TEMP[56].xxxx
>209:   POW TEMP[58].x, TEMP[57].xxxx, TEMP[8].xxxx
>210:   MUL TEMP[59].xyz, TEMP[55].xyzz, TEMP[58].xxxx
>211:   DP3 TEMP[60].x, TEMP[2].xyzz, TEMP[6].xyzz
>212:   MOV_SAT TEMP[61].x, TEMP[60].xxxx
>213:   MAX TEMP[62].x, TEMP[24].xxxx, TEMP[61].xxxx
>214:   ADD TEMP[63].x, TEMP[62].xxxx, IMM[4].yyyy
>215:   RCP TEMP[64].x, TEMP[63].xxxx
>216:   MUL TEMP[65].xyz, TEMP[59].xyzz, TEMP[64].xxxx
>217:   MAD TEMP[1].xyz, TEMP[65].xyzz, TEMP[0].yyyy, TEMP[1].xyzz
>218:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[5].wwww
>219: ENDLOOP :0
>220: MUL TEMP[0].xyz, TEMP[4].xyzz, TEMP[0].yyyy
>221: MOV TEMP[1].xy, IN[1].xyyy
>222: TEX TEMP[1], TEMP[1], SAMP[7], 2D
>223: MOV TEMP[2].w, TEMP[1].wwww
>224: DP3 TEMP[4].x, TEMP[1].xyzz, IMM[6].xyzz
>225: ADD TEMP[5].x, CONST[24].wwww, IMM[0].wwww
>226: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[5].xxxx
>227: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[4].xxxx
>228: MUL TEMP[1].xyz, TEMP[2], IMM[4].zzzz
>229: MAD TEMP[0].xyz, TEMP[10].xyzz, TEMP[3].xyzz, TEMP[0].xyzz
>230: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>231: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>232: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].zzzz
>233: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>234: ADD TEMP[2].x, TEMP[2].xxxx, IMM[4].wwww
>235: RCP TEMP[2].x, TEMP[2].xxxx
>236: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>237: FRC TEMP[2].x, CONST[1].wwww
>238: MUL TEMP[2].x, TEMP[2].xxxx, IMM[6].wwww
>239: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>240: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>241: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>242: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>243: MOV TEMP[0].w, IN[0].wwww
>244: MOV OUT[0], TEMP[0]
>245: END
>radeonsi: Compiling shader 86
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 15, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 23, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 19, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fsub float %153, %49
>  %155 = fmul float %151, 2.000000e+00
>  %156 = fsub float %155, %50
>  %157 = fmul float %152, 2.000000e+00
>  %158 = fsub float %157, %51
>  %159 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %160 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %161 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %162 = load <8 x i32>, <8 x i32> addrspace(2)* %161, align 32, !invariant.load !0
>  %163 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %164 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %163, i64 0, i64 27, !amdgpu.uniform !0
>  %165 = load <4 x i32>, <4 x i32> addrspace(2)* %164, align 16, !invariant.load !0
>  %166 = extractelement <8 x i32> %162, i32 7
>  %167 = extractelement <4 x i32> %165, i32 0
>  %168 = and i32 %167, %166
>  %169 = insertelement <4 x i32> %165, i32 %168, i32 0
>  %170 = bitcast float %159 to i32
>  %171 = bitcast float %160 to i32
>  %172 = insertelement <2 x i32> undef, i32 %170, i32 0
>  %173 = insertelement <2 x i32> %172, i32 %171, i32 1
>  %174 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %173, <8 x i32> %162, <4 x i32> %169, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %175 = extractelement <4 x float> %174, i32 0
>  %176 = extractelement <4 x float> %174, i32 1
>  %177 = extractelement <4 x float> %174, i32 2
>  %178 = extractelement <4 x float> %174, i32 3
>  %179 = fadd float %177, -5.000000e-01
>  %180 = fadd float %176, -5.000000e-01
>  %181 = fmul float %179, 2.000000e+00
>  %182 = fmul float %180, 2.000000e+00
>  %183 = fmul float %178, 2.000000e+00
>  %184 = fmul float %181, %181
>  %185 = fmul float %182, %182
>  %186 = fadd float %184, %185
>  %187 = call float @llvm.AMDGPU.clamp.(float %186, float 0.000000e+00, float 1.000000e+00)
>  %188 = fsub float 1.000000e+00, %187
>  %189 = call float @llvm.sqrt.f32(float %188)
>  %190 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %191 = fmul float %190, %181
>  %192 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %193 = fmul float %192, %181
>  %194 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %195 = fmul float %194, %181
>  %196 = fmul float %23, %182
>  %197 = fadd float %196, %191
>  %198 = fmul float %24, %182
>  %199 = fadd float %198, %193
>  %200 = fmul float %25, %182
>  %201 = fadd float %200, %195
>  %202 = fmul float %59, %189
>  %203 = fadd float %202, %197
>  %204 = fmul float %60, %189
>  %205 = fadd float %204, %199
>  %206 = fmul float %61, %189
>  %207 = fadd float %206, %201
>  %208 = fmul float %154, %203
>  %209 = fmul float %156, %205
>  %210 = fadd float %209, %208
>  %211 = fmul float %158, %207
>  %212 = fadd float %210, %211
>  %213 = call float @llvm.AMDGPU.clamp.(float %212, float 0.000000e+00, float 1.000000e+00)
>  %214 = fsub float %183, %213
>  %215 = call float @llvm.AMDGPU.clamp.(float %214, float 0.000000e+00, float 1.000000e+00)
>  %216 = call float @llvm.pow.f32(float %215, float 3.000000e+00)
>  %217 = call float @llvm.AMDGPU.clamp.(float %216, float 0.000000e+00, float 1.000000e+00)
>  %218 = fmul float %98, 0x3FD3333340000000
>  %219 = fsub float %217, %218
>  %220 = fsub float 1.000000e+00, %98
>  %221 = fmul float %98, 2.000000e+01
>  %222 = fadd float %221, %220
>  %223 = fmul float %219, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fmul float %217, %224
>  %226 = fmul float %183, 0x3FF19999A0000000
>  %227 = fmul float %175, %97
>  %228 = fmul float %154, %59
>  %229 = fsub float -0.000000e+00, %228
>  %230 = fmul float %156, %60
>  %231 = fsub float %229, %230
>  %232 = fmul float %158, %61
>  %233 = fsub float %231, %232
>  %234 = fadd float %233, 1.000000e+00
>  %235 = fmul float %49, %59
>  %236 = fmul float %50, %60
>  %237 = fadd float %236, %235
>  %238 = fmul float %51, %61
>  %239 = fadd float %237, %238
>  %240 = fsub float 1.000000e+00, %239
>  %241 = call float @llvm.AMDGPU.clamp.(float %240, float 0.000000e+00, float 1.000000e+00)
>  %242 = fsub float %234, %241
>  %243 = call float @llvm.AMDGPU.clamp.(float %242, float 0.000000e+00, float 1.000000e+00)
>  %244 = fsub float 1.000000e+00, %243
>  %245 = fmul float %244, %244
>  %246 = fmul float %225, %245
>  %247 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %248 = fmul float %59, 0x4007700140000000
>  %249 = fadd float %248, %247
>  %250 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %251 = fmul float %60, 0x4007700140000000
>  %252 = fadd float %251, %250
>  %253 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %254 = fmul float %61, 0x4007700140000000
>  %255 = fadd float %254, %253
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 64)
>  %259 = fmul float %258, %249
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 68)
>  %261 = fmul float %260, %249
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 72)
>  %263 = fmul float %262, %249
>  %264 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %265 = load <16 x i8>, <16 x i8> addrspace(2)* %264, align 16, !invariant.load !0
>  %266 = call float @llvm.SI.load.const(<16 x i8> %265, i32 80)
>  %267 = fmul float %266, %252
>  %268 = fadd float %267, %259
>  %269 = call float @llvm.SI.load.const(<16 x i8> %265, i32 84)
>  %270 = fmul float %269, %252
>  %271 = fadd float %270, %261
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 88)
>  %275 = fmul float %274, %252
>  %276 = fadd float %275, %263
>  %277 = call float @llvm.SI.load.const(<16 x i8> %273, i32 96)
>  %278 = fmul float %277, %255
>  %279 = fadd float %278, %268
>  %280 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %281 = load <16 x i8>, <16 x i8> addrspace(2)* %280, align 16, !invariant.load !0
>  %282 = call float @llvm.SI.load.const(<16 x i8> %281, i32 100)
>  %283 = fmul float %282, %255
>  %284 = fadd float %283, %271
>  %285 = call float @llvm.SI.load.const(<16 x i8> %281, i32 104)
>  %286 = fmul float %285, %255
>  %287 = fadd float %286, %276
>  %288 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %289 = load <16 x i8>, <16 x i8> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = call float @llvm.SI.load.const(<16 x i8> %289, i32 112)
>  %291 = fadd float %279, %290
>  %292 = call float @llvm.SI.load.const(<16 x i8> %289, i32 116)
>  %293 = fadd float %284, %292
>  %294 = call float @llvm.SI.load.const(<16 x i8> %289, i32 120)
>  %295 = fadd float %287, %294
>  %296 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %297 = load <16 x i8>, <16 x i8> addrspace(2)* %296, align 16, !invariant.load !0
>  %298 = call float @llvm.SI.load.const(<16 x i8> %297, i32 16)
>  %299 = fsub float -0.000000e+00, %298
>  %300 = call float @llvm.SI.load.const(<16 x i8> %297, i32 20)
>  %301 = fsub float -0.000000e+00, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %297, i32 24)
>  %303 = fsub float -0.000000e+00, %302
>  %304 = fmul float %140, %299
>  %305 = fmul float %142, %301
>  %306 = fadd float %305, %304
>  %307 = fmul float %144, %303
>  %308 = fadd float %306, %307
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 3, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = bitcast float %295 to i32
>  %320 = bitcast float %291 to i32
>  %321 = bitcast float %293 to i32
>  %322 = insertelement <4 x i32> undef, i32 %319, i32 0
>  %323 = insertelement <4 x i32> %322, i32 %320, i32 1
>  %324 = insertelement <4 x i32> %323, i32 %321, i32 2
>  %325 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %324, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %326 = extractelement <4 x float> %325, i32 0
>  %327 = fmul float %203, %299
>  %328 = fmul float %205, %301
>  %329 = fadd float %328, %327
>  %330 = fmul float %207, %303
>  %331 = fadd float %329, %330
>  %332 = call float @llvm.AMDGPU.clamp.(float %331, float 0.000000e+00, float 1.000000e+00)
>  %333 = fsub float %226, %332
>  %334 = call float @llvm.AMDGPU.clamp.(float %333, float 0.000000e+00, float 1.000000e+00)
>  %335 = fmul float %326, %326
>  %336 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %337 = load <16 x i8>, <16 x i8> addrspace(2)* %336, align 16, !invariant.load !0
>  %338 = call float @llvm.SI.load.const(<16 x i8> %337, i32 48)
>  %339 = fmul float %338, %335
>  %340 = call float @llvm.SI.load.const(<16 x i8> %337, i32 52)
>  %341 = fmul float %340, %335
>  %342 = call float @llvm.SI.load.const(<16 x i8> %337, i32 56)
>  %343 = fmul float %342, %335
>  %344 = fmul float %334, %334
>  %345 = call float @llvm.AMDGPU.clamp.(float %344, float 0.000000e+00, float 1.000000e+00)
>  %346 = fmul float %339, %345
>  %347 = fmul float %341, %345
>  %348 = fmul float %343, %345
>  %349 = fmul float %346, %97
>  %350 = fmul float %347, %97
>  %351 = fmul float %348, %97
>  %352 = fmul float %309, %349
>  %353 = fmul float %309, %350
>  %354 = fmul float %309, %351
>  %355 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %356 = load <8 x i32>, <8 x i32> addrspace(2)* %355, align 32, !invariant.load !0
>  %357 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %358 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %357, i64 0, i64 7, !amdgpu.uniform !0
>  %359 = load <4 x i32>, <4 x i32> addrspace(2)* %358, align 16, !invariant.load !0
>  %360 = extractelement <8 x i32> %356, i32 7
>  %361 = extractelement <4 x i32> %359, i32 0
>  %362 = and i32 %361, %360
>  %363 = insertelement <4 x i32> %359, i32 %362, i32 0
>  %364 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %365 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %366 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %367 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %368 = call float @llvm.fabs.f32(float %366)
>  %369 = fdiv float 1.000000e+00, %368, !fpmath !1
>  %370 = fmul float %364, %369
>  %371 = fadd float %370, 1.500000e+00
>  %372 = fmul float %365, %369
>  %373 = fadd float %372, 1.500000e+00
>  %374 = bitcast float %373 to i32
>  %375 = bitcast float %371 to i32
>  %376 = bitcast float %367 to i32
>  %377 = insertelement <4 x i32> undef, i32 %374, i32 0
>  %378 = insertelement <4 x i32> %377, i32 %375, i32 1
>  %379 = insertelement <4 x i32> %378, i32 %376, i32 2
>  %380 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %379, <8 x i32> %356, <4 x i32> %363, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %381 = extractelement <4 x float> %380, i32 0
>  %382 = extractelement <4 x float> %380, i32 1
>  %383 = extractelement <4 x float> %380, i32 2
>  %384 = extractelement <4 x float> %380, i32 3
>  %385 = fmul float %140, %49
>  %386 = fmul float %142, %50
>  %387 = fadd float %386, %385
>  %388 = fmul float %144, %51
>  %389 = fadd float %387, %388
>  %390 = fmul float %389, %140
>  %391 = fmul float %389, %142
>  %392 = fmul float %389, %144
>  %393 = fmul float %390, 2.000000e+00
>  %394 = fsub float %393, %49
>  %395 = fmul float %391, 2.000000e+00
>  %396 = fsub float %395, %50
>  %397 = fmul float %392, 2.000000e+00
>  %398 = fsub float %397, %51
>  %399 = fsub float 1.000000e+00, %98
>  %400 = fmul float %399, 6.000000e+00
>  %401 = fmul float %49, %140
>  %402 = fmul float %50, %142
>  %403 = fadd float %402, %401
>  %404 = fmul float %51, %144
>  %405 = fadd float %403, %404
>  %406 = call float @llvm.AMDGPU.clamp.(float %405, float 0.000000e+00, float 1.000000e+00)
>  %407 = fsub float 1.000000e+00, %406
>  %408 = call float @llvm.pow.f32(float %407, float 5.000000e+00)
>  %409 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %410 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %411 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %412 = fmul float %408, %409
>  %413 = fmul float %408, %410
>  %414 = fmul float %408, %411
>  %415 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %416 = load <8 x i32>, <8 x i32> addrspace(2)* %415, align 32, !invariant.load !0
>  %417 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %418 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %417, i64 0, i64 11, !amdgpu.uniform !0
>  %419 = load <4 x i32>, <4 x i32> addrspace(2)* %418, align 16, !invariant.load !0
>  %420 = extractelement <8 x i32> %416, i32 7
>  %421 = extractelement <4 x i32> %419, i32 0
>  %422 = and i32 %421, %420
>  %423 = insertelement <4 x i32> %419, i32 %422, i32 0
>  %424 = call float @llvm.amdgcn.cubetc(float %394, float %396, float %398)
>  %425 = call float @llvm.amdgcn.cubesc(float %394, float %396, float %398)
>  %426 = call float @llvm.amdgcn.cubema(float %394, float %396, float %398)
>  %427 = call float @llvm.amdgcn.cubeid(float %394, float %396, float %398)
>  %428 = call float @llvm.fabs.f32(float %426)
>  %429 = fdiv float 1.000000e+00, %428, !fpmath !1
>  %430 = fmul float %424, %429
>  %431 = fadd float %430, 1.500000e+00
>  %432 = fmul float %425, %429
>  %433 = fadd float %432, 1.500000e+00
>  %434 = bitcast float %433 to i32
>  %435 = bitcast float %431 to i32
>  %436 = bitcast float %427 to i32
>  %437 = bitcast float %400 to i32
>  %438 = insertelement <4 x i32> undef, i32 %434, i32 0
>  %439 = insertelement <4 x i32> %438, i32 %435, i32 1
>  %440 = insertelement <4 x i32> %439, i32 %436, i32 2
>  %441 = insertelement <4 x i32> %440, i32 %437, i32 3
>  %442 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %441, <8 x i32> %416, <4 x i32> %423, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %443 = extractelement <4 x float> %442, i32 0
>  %444 = extractelement <4 x float> %442, i32 1
>  %445 = extractelement <4 x float> %442, i32 2
>  %446 = fmul float %412, %443
>  %447 = fmul float %413, %444
>  %448 = fmul float %414, %445
>  %449 = fmul float %381, %384
>  %450 = fmul float %382, %384
>  %451 = fmul float %383, %384
>  %452 = fmul float %227, 4.000000e+00
>  %453 = fmul float %449, %452
>  %454 = fadd float %453, %352
>  %455 = fmul float %450, %452
>  %456 = fadd float %455, %353
>  %457 = fmul float %451, %452
>  %458 = fadd float %457, %354
>  %459 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %460 = load <16 x i8>, <16 x i8> addrspace(2)* %459, align 16
>  br label %loop154
>
>loop154:                                          ; preds = %endif158, %main_body
>  %.012 = phi float [ %458, %main_body ], [ %544, %endif158 ]
>  %.011 = phi float [ %456, %main_body ], [ %543, %endif158 ]
>  %.010 = phi float [ %454, %main_body ], [ %542, %endif158 ]
>  %461 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %462 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %463 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %464 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %465 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %466 = icmp sgt i32 %461, 3
>  br i1 %466, label %endloop219, label %endif158
>
>endif158:                                         ; preds = %loop154
>  %467 = shl i32 %462, 5
>  %468 = shl i32 %462, 5
>  %469 = add i32 %468, 176
>  %470 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %469)
>  %471 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %472 = fsub float %470, %471
>  %473 = shl i32 %462, 5
>  %474 = add i32 %473, 180
>  %475 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %474)
>  %476 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %477 = fsub float %475, %476
>  %478 = add i32 %467, 184
>  %479 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %478)
>  %480 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %481 = fsub float %479, %480
>  %482 = fmul float %472, %472
>  %483 = fmul float %477, %477
>  %484 = fadd float %483, %482
>  %485 = fmul float %481, %481
>  %486 = fadd float %484, %485
>  %487 = call float @llvm.sqrt.f32(float %486)
>  %488 = fdiv float 1.000000e+00, %487, !fpmath !1
>  %489 = fmul float %472, %488
>  %490 = fmul float %477, %488
>  %491 = fmul float %481, %488
>  %492 = fmul float %489, %140
>  %493 = fmul float %490, %142
>  %494 = fadd float %493, %492
>  %495 = fmul float %491, %144
>  %496 = fadd float %494, %495
>  %497 = call float @llvm.AMDGPU.clamp.(float %496, float 0.000000e+00, float 1.000000e+00)
>  %498 = fmul float %489, %203
>  %499 = fmul float %490, %205
>  %500 = fadd float %499, %498
>  %501 = fmul float %491, %207
>  %502 = fadd float %500, %501
>  %503 = call float @llvm.AMDGPU.clamp.(float %502, float 0.000000e+00, float 1.000000e+00)
>  %504 = fsub float %226, %503
>  %505 = call float @llvm.AMDGPU.clamp.(float %504, float 0.000000e+00, float 1.000000e+00)
>  %506 = fmul float %505, %505
>  %507 = shl i32 %463, 1
>  %508 = or i32 %507, 1
>  %509 = fmul float %486, %488
>  %510 = shl i32 %464, 5
>  %511 = add i32 %510, 188
>  %512 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %511)
>  %513 = fmul float %509, %512
>  %514 = call float @llvm.AMDGPU.clamp.(float %513, float 0.000000e+00, float 1.000000e+00)
>  %515 = fsub float 1.000000e+00, %514
>  %516 = shl i32 %508, 4
>  %517 = add i32 %516, 176
>  %518 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %517)
>  %519 = fmul float %518, %515
>  %520 = shl i32 %508, 4
>  %521 = add i32 %520, 180
>  %522 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %521)
>  %523 = fmul float %522, %515
>  %524 = shl i32 %508, 4
>  %525 = add i32 %524, 184
>  %526 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %525)
>  %527 = fmul float %526, %515
>  %528 = fmul float %506, %506
>  %529 = call float @llvm.AMDGPU.clamp.(float %528, float 0.000000e+00, float 1.000000e+00)
>  %530 = fsub float 1.000000e+00, %488
>  %531 = fmul float %529, %530
>  %532 = fadd float %488, %531
>  %533 = fmul float %519, %532
>  %534 = fmul float %523, %532
>  %535 = fmul float %527, %532
>  %536 = fmul float %533, %97
>  %537 = fmul float %534, %97
>  %538 = fmul float %535, %97
>  %539 = fmul float %497, %536
>  %540 = fmul float %497, %537
>  %541 = fmul float %497, %538
>  %542 = fadd float %.010, %539
>  %543 = fadd float %.011, %540
>  %544 = fadd float %.012, %541
>  %545 = add i32 %465, 1
>  br label %loop154
>
>endloop219:                                       ; preds = %loop154
>  %546 = fmul float %446, %246
>  %547 = fmul float %447, %246
>  %548 = fmul float %448, %246
>  %549 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %550 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %551 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %552 = load <8 x i32>, <8 x i32> addrspace(2)* %551, align 32, !invariant.load !0
>  %553 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %554 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %553, i64 0, i64 31, !amdgpu.uniform !0
>  %555 = load <4 x i32>, <4 x i32> addrspace(2)* %554, align 16, !invariant.load !0
>  %556 = extractelement <8 x i32> %552, i32 7
>  %557 = extractelement <4 x i32> %555, i32 0
>  %558 = and i32 %557, %556
>  %559 = insertelement <4 x i32> %555, i32 %558, i32 0
>  %560 = bitcast float %549 to i32
>  %561 = bitcast float %550 to i32
>  %562 = insertelement <2 x i32> undef, i32 %560, i32 0
>  %563 = insertelement <2 x i32> %562, i32 %561, i32 1
>  %564 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %563, <8 x i32> %552, <4 x i32> %559, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %565 = extractelement <4 x float> %564, i32 0
>  %566 = extractelement <4 x float> %564, i32 1
>  %567 = extractelement <4 x float> %564, i32 2
>  %568 = fmul float %565, 0x3FD3333340000000
>  %569 = fmul float %566, 0x3FE2E147A0000000
>  %570 = fadd float %569, %568
>  %571 = fmul float %567, 0x3FBC28F5C0000000
>  %572 = fadd float %570, %571
>  %573 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %574 = load <16 x i8>, <16 x i8> addrspace(2)* %573, align 16, !invariant.load !0
>  %575 = call float @llvm.SI.load.const(<16 x i8> %574, i32 396)
>  %576 = fadd float %575, 1.000000e+00
>  %577 = fmul float %572, %576
>  %578 = fmul float %565, %577
>  %579 = fmul float %566, %577
>  %580 = fmul float %567, %577
>  %581 = fmul float %578, 3.200000e+01
>  %582 = fmul float %579, 3.200000e+01
>  %583 = fmul float %580, 3.200000e+01
>  %584 = fmul float %.010, %78
>  %585 = fadd float %584, %546
>  %586 = fmul float %.011, %79
>  %587 = fadd float %586, %547
>  %588 = fmul float %.012, %80
>  %589 = fadd float %588, %548
>  %590 = fadd float %585, %581
>  %591 = fadd float %587, %582
>  %592 = fadd float %589, %583
>  %593 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %594 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %595 = load <16 x i8>, <16 x i8> addrspace(2)* %594, align 16, !invariant.load !0
>  %596 = call float @llvm.SI.load.const(<16 x i8> %595, i32 12)
>  %597 = fsub float %593, %596
>  %598 = call float @llvm.maxnum.f32(float %597, float 0.000000e+00)
>  %599 = call float @llvm.SI.load.const(<16 x i8> %595, i32 28)
>  %600 = call float @llvm.SI.load.const(<16 x i8> %595, i32 12)
>  %601 = fsub float %599, %600
>  %602 = fadd float %601, 0x3F50624DE0000000
>  %603 = fdiv float 1.000000e+00, %602, !fpmath !1
>  %604 = fmul float %598, %603
>  %605 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %606 = load <16 x i8>, <16 x i8> addrspace(2)* %605, align 16, !invariant.load !0
>  %607 = call float @llvm.SI.load.const(<16 x i8> %606, i32 28)
>  %608 = call float @llvm.floor.f32(float %607)
>  %609 = fsub float %607, %608
>  %610 = fmul float %609, 8.000000e+00
>  %611 = call float @llvm.pow.f32(float %604, float %610)
>  %612 = call float @llvm.AMDGPU.clamp.(float %611, float 0.000000e+00, float 1.000000e+00)
>  %613 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %614 = fmul float %613, %612
>  %615 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %616 = load <16 x i8>, <16 x i8> addrspace(2)* %615, align 16, !invariant.load !0
>  %617 = call float @llvm.SI.load.const(<16 x i8> %616, i32 32)
>  %618 = fsub float 1.000000e+00, %614
>  %619 = fmul float %590, %614
>  %620 = fmul float %617, %618
>  %621 = fadd float %619, %620
>  %622 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %623 = load <16 x i8>, <16 x i8> addrspace(2)* %622, align 16, !invariant.load !0
>  %624 = call float @llvm.SI.load.const(<16 x i8> %623, i32 36)
>  %625 = fsub float 1.000000e+00, %614
>  %626 = fmul float %591, %614
>  %627 = fmul float %624, %625
>  %628 = fadd float %626, %627
>  %629 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %630 = load <16 x i8>, <16 x i8> addrspace(2)* %629, align 16, !invariant.load !0
>  %631 = call float @llvm.SI.load.const(<16 x i8> %630, i32 40)
>  %632 = fsub float 1.000000e+00, %614
>  %633 = fmul float %592, %614
>  %634 = fmul float %631, %632
>  %635 = fadd float %633, %634
>  %636 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %637 = bitcast float %5 to i32
>  %638 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %637, 10
>  %639 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %638, float %621, 11
>  %640 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %639, float %628, 12
>  %641 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %640, float %635, 13
>  %642 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %641, float %636, 14
>  %643 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %642, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %643
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x3                     ; C2040103
>	s_buffer_load_dword s10, s[0:3], 0x7                    ; C2050107
>	s_buffer_load_dword s13, s[0:3], 0xb                    ; C206810B
>	s_buffer_load_dword s18, s[0:3], 0xf                    ; C209010F
>	s_buffer_load_dword s17, s[0:3], 0x17                   ; C2088117
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s22, s[0:3], 0x13                   ; C20B0113
>	s_buffer_load_dword s9, s[0:3], 0x4                     ; C2048104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s14, s[0:3], 0xc                    ; C207010C
>	s_buffer_load_dword s15, s[0:3], 0xd                    ; C207810D
>	s_buffer_load_dword s16, s[0:3], 0xe                    ; C208010E
>	s_buffer_load_dword s19, s[0:3], 0x10                   ; C2098110
>	s_buffer_load_dword s20, s[0:3], 0x11                   ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                   ; C20A8112
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_sub_f32_e64 v7, 1.0, s22                              ; D2080007 00002CF2
>	v_mul_f32_e32 v0, s8, v9                                ; 10001208
>	v_mac_f32_e32 v0, s10, v10                              ; 3E00140A
>	v_mac_f32_e32 v0, s13, v11                              ; 3E00160D
>	v_mac_f32_e32 v0, s18, v12                              ; 3E001812
>	v_mul_f32_e32 v1, s17, v0                               ; 10020011
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	v_mad_f32 v8, 2.0, v13, -1.0                            ; D2820008 03CE1AF4
>	v_mad_f32 v13, 2.0, v14, -1.0                           ; D282000D 03CE1CF4
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 33, 0, 0, 0, v16, v17, v18, v19                 ; F800021F 13121110
>	v_mad_f32 v14, 2.0, v15, -1.0                           ; D282000E 03CE1EF4
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v17, 0, v13, v8                               ; D2820011 04221A80
>	v_mad_f32 v18, 0, v8, v13                               ; D2820012 04361080
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v19, 0, v4, v3                                ; D2820013 040E0880
>	v_mac_f32_e32 v17, 0, v14                               ; 3E221C80
>	v_mac_f32_e32 v18, 0, v14                               ; 3E241C80
>	v_mac_f32_e32 v14, 0, v13                               ; 3E1C1A80
>	v_mad_f32 v13, 0, v3, v4                                ; D282000D 04120680
>	v_mac_f32_e32 v19, 0, v5                                ; 3E260A80
>	v_mac_f32_e32 v13, 0, v5                                ; 3E1A0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mul_f32_e32 v4, s6, v9                                ; 10081206
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v4, s8, v10                               ; 3E081408
>	v_mac_f32_e32 v4, s0, v11                               ; 3E081600
>	v_mov_b32_e32 v1, s19                                   ; 7E020213
>	v_mac_f32_e32 v4, s16, v12                              ; 3E081810
>	v_mac_f32_e32 v1, s20, v4                               ; 3E020814
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v3, v19, v18                              ; 10062513
>	v_mul_legacy_f32_e32 v1, s21, v1                        ; 0E020215
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_mul_f32_e32 v8, v13, v14                              ; 10101D0D
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v17, v13, -v3                             ; D2820003 840E1B11
>	v_mac_f32_e32 v7, s22, v1                               ; 3E0E0216
>	v_mul_f32_e32 v15, s4, v9                               ; 101E1204
>	v_mul_f32_e32 v16, s5, v9                               ; 10201205
>	v_mul_f32_e32 v9, v5, v17                               ; 10122305
>	v_mad_f32 v8, v18, v5, -v8                              ; D2820008 84220B12
>	v_mad_f32 v1, v6, v3, -v3                               ; D2820001 840E0706
>	v_mul_f32_e32 v3, v7, v7                                ; 10060F07
>	v_mad_f32 v9, v14, v19, -v9                             ; D2820009 8426270E
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	exp 15, 34, 0, 0, 0, v3, v0, v0, v0                     ; F800022F 00000003
>	v_mac_f32_e32 v15, s9, v10                              ; 3E1E1409
>	v_mac_f32_e32 v16, s7, v10                              ; 3E201407
>	v_mad_f32 v9, v6, v9, -v9                               ; D2820009 84261306
>	exp 15, 35, 0, 0, 0, v19, v13, v5, v8                   ; F800023F 08050D13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	v_mac_f32_e32 v16, s12, v11                             ; 3E20160C
>	exp 15, 36, 0, 0, 0, v9, v1, v17, v18                   ; F800024F 12110109
>	v_mac_f32_e32 v15, s14, v12                             ; 3E1E180E
>	v_mac_f32_e32 v16, s15, v12                             ; 3E20180F
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v15, v16, v4, v0                   ; F80008CF 0004100F
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 552 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v18, v4, 3, 3, [m0]                             ; C8480F04
>	v_interp_p2_f32 v18, [v18], v5, 3, 3, [m0]                      ; C8490F05
>	v_interp_p1_f32 v23, v4, 0, 4, [m0]                             ; C85C1004
>	v_interp_p2_f32 v23, [v23], v5, 0, 4, [m0]                      ; C85D1005
>	v_interp_p1_f32 v24, v4, 1, 4, [m0]                             ; C8601104
>	v_interp_p2_f32 v24, [v24], v5, 1, 4, [m0]                      ; C8611105
>	v_interp_p1_f32 v7, v4, 2, 4, [m0]                              ; C81C1204
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	v_interp_p2_f32 v7, [v7], v5, 2, 4, [m0]                        ; C81D1205
>	v_interp_p1_f32 v8, v4, 3, 4, [m0]                              ; C8201304
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v8, [v8], v5, 3, 4, [m0]                        ; C8211305
>	v_interp_p1_f32 v9, v4, 0, 5, [m0]                              ; C8241404
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v9, [v9], v5, 0, 5, [m0]                        ; C8251405
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v19, s12, v1                                      ; 0826020C
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_sub_f32_e32 v20, s13, v0                                      ; 0828000D
>	v_mul_f32_e32 v10, v19, v19                                     ; 10142713
>	v_sub_f32_e32 v21, s14, v2                                      ; 082A040E
>	v_mac_f32_e32 v10, v20, v20                                     ; 3E142914
>	v_mac_f32_e32 v10, v21, v21                                     ; 3E142B15
>	v_rsq_f32_e32 v22, v10                                          ; 7E2C5D0A
>	v_mul_f32_e32 v10, v7, v7                                       ; 10140F07
>	v_mac_f32_e32 v10, v8, v8                                       ; 3E141108
>	v_mac_f32_e32 v10, v9, v9                                       ; 3E141309
>	v_rsq_f32_e32 v10, v10                                          ; 7E145D0A
>	s_load_dwordx8 s[52:59], s[4:5], 0x30                           ; C0DA0530
>	s_load_dwordx4 s[60:63], s[4:5], 0x3c                           ; C09E053C
>	s_load_dwordx8 s[44:51], s[4:5], 0x40                           ; C0D60540
>	v_mul_f32_e32 v30, v10, v7                                      ; 103C0F0A
>	v_interp_p1_f32 v7, v6, 0, 1, [m0]                              ; C81C0406
>	v_mul_f32_e32 v31, v10, v8                                      ; 103E110A
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]                        ; C81D0403
>	v_interp_p1_f32 v8, v6, 1, 1, [m0]                              ; C8200506
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]                        ; C8210503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s60, s60, s59                                         ; 873C3B3C
>	v_mul_f32_e32 v32, v10, v9                                      ; 1040130A
>	image_sample v[9:11], v[7:8], s[52:59], s[60:63] dmask:0x7      ; F0800700 01ED0907
>	s_load_dwordx8 s[52:59], s[4:5], 0x50                           ; C0DA0550
>	s_load_dwordx4 s[60:63], s[4:5], 0x5c                           ; C09E055C
>	v_mul_f32_e32 v33, v22, v19                                     ; 10422716
>	v_mul_f32_e32 v34, v22, v20                                     ; 10442916
>	v_mul_f32_e32 v35, v22, v21                                     ; 10462B16
>	s_load_dwordx8 s[64:71], s[4:5], 0x60                           ; C0E00560
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s60, s60, s59                                         ; 873C3B3C
>	image_sample v[14:15], v[7:8], s[52:59], s[60:63] dmask:0x6     ; F0800600 01ED0E07
>	s_load_dwordx4 s[52:55], s[4:5], 0x4c                           ; C09A054C
>	s_buffer_load_dword s72, s[0:3], 0x11                           ; C2240111
>	s_buffer_load_dword s73, s[0:3], 0x12                           ; C2248112
>	s_load_dwordx8 s[32:39], s[4:5], 0x0                            ; C0D00500
>	s_load_dwordx4 s[40:43], s[4:5], 0xc                            ; C094050C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[16:17], v[7:8], s[44:51], s[52:55] dmask:0xa     ; F0800A00 01AB1007
>	v_interp_p1_f32 v26, v4, 0, 3, [m0]                             ; C8680C04
>	v_interp_p2_f32 v26, [v26], v5, 0, 3, [m0]                      ; C8690C05
>	v_interp_p1_f32 v27, v4, 1, 3, [m0]                             ; C86C0D04
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v25, v16, v16                                     ; 06322110
>	v_mad_f32 v16, 2.0, v16, -1.0                                   ; D2820010 03CE20F4
>	v_interp_p2_f32 v27, [v27], v5, 1, 3, [m0]                      ; C86D0D05
>	v_interp_p1_f32 v28, v4, 2, 3, [m0]                             ; C8700E04
>	v_add_f32_e32 v12, v17, v17                                     ; 06182311
>	v_interp_p2_f32 v28, [v28], v5, 2, 3, [m0]                      ; C8710E05
>	v_mad_f32 v17, 2.0, v17, -1.0                                   ; D2820011 03CE22F4
>	v_mad_f32 v25, v25, v16, -v16                                   ; D2820019 84422119
>	v_mad_f32 v4, v12, v26, -v26                                    ; D2820004 846A350C
>	v_mad_f32 v5, v12, v27, -v27                                    ; D2820005 846E370C
>	v_mad_f32 v12, v12, v28, -v28                                   ; D282000C 8472390C
>	v_mac_f32_e32 v25, v17, v17                                     ; 3E322311
>	v_mac_f32_e32 v4, v16, v18                                      ; 3E082510
>	v_mac_f32_e32 v5, v16, v23                                      ; 3E0A2F10
>	v_mac_f32_e32 v12, v16, v24                                     ; 3E183110
>	v_add_f32_e64 v16, v25, 0 clamp                                 ; D2060810 00010119
>	v_sub_f32_e32 v16, 0x3f8020c5, v16                              ; 082020FF 3F8020C5
>	v_sqrt_f32_e32 v16, v16                                         ; 7E206710
>	v_mac_f32_e32 v4, v16, v30                                      ; 3E083D10
>	v_mac_f32_e32 v5, v16, v31                                      ; 3E0A3F10
>	v_mul_f32_e32 v25, v33, v4                                      ; 10320921
>	v_mac_f32_e32 v12, v16, v32                                     ; 3E184110
>	v_mac_f32_e32 v25, v34, v5                                      ; 3E320B22
>	v_mac_f32_e32 v25, v35, v12                                     ; 3E321923
>	v_mul_f32_e32 v16, v4, v25                                      ; 10203304
>	v_mac_f32_e32 v16, v4, v25                                      ; 3E203304
>	v_mad_f32 v36, -v19, v22, v16                                   ; D2820024 24422D13
>	v_mul_f32_e32 v16, v5, v25                                      ; 10203305
>	s_load_dwordx4 s[44:47], s[4:5], 0x6c                           ; C096056C
>	v_mac_f32_e32 v16, v5, v25                                      ; 3E203305
>	v_mad_f32 v37, -v20, v22, v16                                   ; D2820025 24422D14
>	v_mul_f32_e32 v16, v12, v25                                     ; 1020330C
>	v_mac_f32_e32 v16, v12, v25                                     ; 3E20330C
>	v_mad_f32 v38, -v21, v22, v16                                   ; D2820026 24422D15
>	v_interp_p1_f32 v16, v6, 2, 1, [m0]                             ; C8400606
>	v_interp_p2_f32 v16, [v16], v3, 2, 1, [m0]                      ; C8410603
>	v_interp_p1_f32 v17, v6, 3, 1, [m0]                             ; C8440706
>	v_interp_p2_f32 v17, [v17], v3, 3, 1, [m0]                      ; C8450703
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s44, s44, s71                                         ; 872C472C
>	image_sample v[19:22], v[16:17], s[64:71], s[44:47] dmask:0xf   ; F0800F00 01701310
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v16, -0.5, v21                                    ; 06202AF1
>	v_add_f32_e32 v21, v16, v16                                     ; 062A2110
>	v_add_f32_e32 v16, -0.5, v20                                    ; 062028F1
>	v_add_f32_e32 v20, v16, v16                                     ; 06282110
>	v_mul_f32_e32 v16, v21, v26                                     ; 10203515
>	v_mul_f32_e32 v17, v21, v27                                     ; 10223715
>	v_mac_f32_e32 v16, v20, v18                                     ; 3E202514
>	v_mul_f32_e32 v18, v21, v28                                     ; 10243915
>	v_mac_f32_e32 v17, v20, v23                                     ; 3E222F14
>	v_mac_f32_e32 v18, v20, v24                                     ; 3E243114
>	v_mul_f32_e32 v20, v20, v20                                     ; 10282914
>	v_mac_f32_e32 v20, v21, v21                                     ; 3E282B15
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_sub_f32_e32 v20, 1.0, v20                                     ; 082828F2
>	v_sqrt_f32_e32 v20, v20                                         ; 7E286714
>	v_mac_f32_e32 v16, v20, v30                                     ; 3E203D14
>	v_mac_f32_e32 v17, v20, v31                                     ; 3E223F14
>	v_mac_f32_e32 v18, v20, v32                                     ; 3E244114
>	v_mul_f32_e32 v20, v16, v36                                     ; 10284910
>	s_buffer_load_dword s44, s[0:3], 0x10                           ; C2160110
>	v_mac_f32_e32 v20, v17, v37                                     ; 3E284B11
>	v_mac_f32_e32 v20, v18, v38                                     ; 3E284D12
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_mul_f32_e32 v41, v14, v19                                     ; 1052270E
>	v_mov_b32_e32 v19, 0x403b800a                                   ; 7E2602FF 403B800A
>	v_mad_f32 v39, 2.0, v22, -v20                                   ; D2820027 84522CF4
>	v_mad_f32 v20, v19, v30, v1                                     ; D2820014 04063D13
>	s_buffer_load_dword s45, s[0:3], 0x14                           ; C2168114
>	s_buffer_load_dword s46, s[0:3], 0x15                           ; C2170115
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v21, s44, v20                                     ; 102A282C
>	s_buffer_load_dword s47, s[0:3], 0x16                           ; C2178116
>	s_buffer_load_dword s44, s[0:3], 0x18                           ; C2160118
>	v_add_f32_e32 v40, v22, v22                                     ; 06502D16
>	v_mul_f32_e32 v22, s72, v20                                     ; 102C2848
>	v_mul_f32_e32 v23, s73, v20                                     ; 102E2849
>	v_mad_f32 v20, v19, v31, v0                                     ; D2820014 04023F13
>	v_mac_f32_e32 v21, s45, v20                                     ; 3E2A282D
>	v_mac_f32_e32 v22, s46, v20                                     ; 3E2C282E
>	v_mad_f32 v19, v19, v32, v2                                     ; D2820013 040A4113
>	s_buffer_load_dword s45, s[0:3], 0x19                           ; C2168119
>	s_buffer_load_dword s46, s[0:3], 0x1a                           ; C217011A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v23, s47, v20                                     ; 3E2E282F
>	v_mac_f32_e32 v21, s44, v19                                     ; 3E2A262C
>	s_buffer_load_dword s47, s[0:3], 0x1c                           ; C217811C
>	s_buffer_load_dword s48, s[0:3], 0x1d                           ; C218011D
>	s_buffer_load_dword s44, s[0:3], 0x1e                           ; C216011E
>	v_mac_f32_e32 v22, s45, v19                                     ; 3E2C262D
>	v_mac_f32_e32 v23, s46, v19                                     ; 3E2E262E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v20, s47, v21                                     ; 06282A2F
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	v_add_f32_e32 v19, s44, v23                                     ; 06262E2C
>	v_add_f32_e32 v21, s48, v22                                     ; 062A2C30
>	image_sample_c v42, v[19:22], s[32:39], s[40:43] dmask:0x1      ; F0A00100 01482A13
>	v_cubema_f32 v19, v4, v5, v12                                   ; D28E0013 04320B04
>	v_rcp_f32_e64 v20, |v19|                                        ; D3540114 00000113
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                           ; C08E051C
>	v_cubetc_f32 v21, v4, v5, v12                                   ; D28C0015 04320B04
>	v_mov_b32_e32 v19, 0x3fc00000                                   ; 7E2602FF 3FC00000
>	v_cubesc_f32 v23, v4, v5, v12                                   ; D28A0017 04320B04
>	v_mad_f32 v21, v20, v21, v19                                    ; D2820015 044E2B14
>	v_mad_f32 v20, v20, v23, v19                                    ; D2820014 044E2F14
>	v_add_f32_e64 v23, v25, 0 clamp                                 ; D2060817 00010119
>	v_sub_f32_e32 v23, 1.0, v23                                     ; 082E2EF2
>	v_log_f32_e32 v27, v23                                          ; 7E364F17
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v22, v4, v5, v12                                   ; D2880016 04320B04
>	image_sample v[23:26], v[20:23], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E51714
>	v_mov_b32_e32 v20, 0x40c00000                                   ; 7E2802FF 40C00000
>	v_mad_f32 v22, -v15, v20, v20                                   ; D2820016 2452290F
>	v_mul_legacy_f32_e32 v20, 0x40a00000, v27                       ; 0E2836FF 40A00000
>	v_cubema_f32 v27, v36, v37, v38                                 ; D28E001B 049A4B24
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                           ; C090052C
>	v_rcp_f32_e64 v27, |v27|                                        ; D354011B 0000011B
>	v_exp_f32_e32 v20, v20                                          ; 7E284B14
>	v_max_f32_e32 v21, 0, v15                                       ; 202A1E80
>	v_mul_f32_e32 v43, v21, v20                                     ; 10562915
>	v_cubetc_f32 v20, v36, v37, v38                                 ; D28C0014 049A4B24
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	v_cubesc_f32 v28, v36, v37, v38                                 ; D28A001C 049A4B24
>	v_mad_f32 v20, v27, v20, v19                                    ; D2820014 044E291B
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v21, v36, v37, v38                                 ; D2880015 049A4B24
>	v_mac_f32_e32 v19, v27, v28                                     ; 3E26391B
>	image_sample_l v[27:29], v[19:22], s[12:19], s[32:35] dmask:0x7 ; F0900700 01031B13
>	s_buffer_load_dword s12, s[0:3], 0x6                            ; C2060106
>	v_mul_f32_e32 v22, v30, v36                                     ; 102C491E
>	v_mad_f32 v22, -v37, v31, -v22                                  ; D2820016 A45A3F25
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v21, v29, v43                                     ; 102A571D
>	v_mad_f32 v29, -v38, v32, v22                                   ; D282001D 245A4126
>	v_mul_f32_e32 v22, s9, v16                                      ; 102C2009
>	v_mad_f32 v22, v17, -s8, -v22                                   ; D2820016 C4581111
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v22, -v18, s12, v22                                   ; D2820016 24581912
>	s_buffer_load_dword s13, s[0:3], 0xc                            ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                            ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                            ; C207810E
>	v_mul_f32_e32 v19, v27, v43                                     ; 1026571B
>	v_mul_f32_e32 v20, v28, v43                                     ; 1028571C
>	v_mul_f32_e32 v27, v26, v23                                     ; 10362F1A
>	v_mul_f32_e32 v28, v26, v24                                     ; 1038311A
>	v_mul_f32_e32 v25, v26, v25                                     ; 1032331A
>	v_mul_f32_e32 v26, v30, v33                                     ; 1034431E
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mov_b32_e32 v30, 0x3f8ccccd                                   ; 7E3C02FF 3F8CCCCD
>	v_mad_f32 v22, v40, v30, -v22                                   ; D2820016 845A3D28
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mul_f32_e32 v22, v22, v22                                     ; 102C2D16
>	v_mul_f32_e32 v23, v42, v42                                     ; 102E552A
>	v_mac_f32_e32 v26, v31, v34                                     ; 3E34451F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v24, s13, v23                                     ; 10302E0D
>	v_mul_f32_e32 v31, s14, v23                                     ; 103E2E0E
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mul_f32_e32 v23, s15, v23                                     ; 102E2E0F
>	v_mul_f32_e32 v31, v22, v31                                     ; 103E3F16
>	v_mul_f32_e32 v24, v22, v24                                     ; 10303116
>	v_mul_f32_e32 v22, v22, v23                                     ; 102C2F16
>	v_mul_f32_e32 v23, s9, v4                                       ; 102E0809
>	v_mad_f32 v23, v5, -s8, -v23                                    ; D2820017 C45C1105
>	v_mad_f32 v23, -v12, s12, v23                                   ; D2820017 245C190C
>	v_mac_f32_e32 v26, v32, v35                                     ; 3E344720
>	v_add_f32_e64 v32, v23, 0 clamp                                 ; D2060820 00010117
>	v_mul_f32_e32 v23, v14, v24                                     ; 102E310E
>	v_mul_f32_e32 v22, v14, v22                                     ; 102C2D0E
>	v_mul_f32_e32 v31, v14, v31                                     ; 103E3F0E
>	v_mul_f32_e32 v24, v23, v32                                     ; 10304117
>	v_mul_f32_e32 v23, v31, v32                                     ; 102E411F
>	v_mul_f32_e32 v31, 4.0, v41                                     ; 103E52F6
>	v_mul_f32_e32 v22, v22, v32                                     ; 102C4116
>	v_mac_f32_e32 v22, v31, v25                                     ; 3E2C331F
>	v_add_f32_e64 v25, v39, 0 clamp                                 ; D2060819 00010127
>	v_log_f32_e32 v25, v25                                          ; 7E324F19
>	v_mac_f32_e32 v23, v31, v28                                     ; 3E2E391F
>	v_sub_f32_e32 v28, 1.0, v15                                     ; 08381EF2
>	v_mac_f32_e32 v24, v31, v27                                     ; 3E30371F
>	v_mul_legacy_f32_e32 v25, 0x40400000, v25                       ; 0E3232FF 40400000
>	v_exp_f32_e32 v25, v25                                          ; 7E324B19
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	v_mov_b32_e32 v27, v25                                          ; 7E360319
>	v_sub_f32_e32 v26, 1.0, v26                                     ; 083434F2
>	v_mac_f32_e32 v27, 0xbe99999a, v15                              ; 3E361EFF BE99999A
>	v_mac_f32_e32 v28, 0x41a00000, v15                              ; 3E381EFF 41A00000
>	v_mul_f32_e32 v15, v28, v27                                     ; 101E371C
>	v_add_f32_e32 v27, 1.0, v29                                     ; 06363AF2
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_subrev_f32_e32 v26, v26, v27                                  ; 0A34371A
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_add_f32_e64 v15, v15, 0 clamp                                 ; D206080F 0001010F
>	v_sub_f32_e32 v27, 1.0, v26                                     ; 083634F2
>	v_mul_f32_e32 v15, v15, v25                                     ; 101E330F
>	v_mad_f32 v26, -v26, v27, v27                                   ; D282001A 246E371A
>	v_mul_f32_e32 v15, v26, v15                                     ; 101E1F1A
>	v_mul_f32_e32 v25, v30, v40                                     ; 1032511E
>	v_mov_b32_e32 v26, 0xc8                                         ; 7E3402FF 000000C8
>	v_mov_b32_e32 v27, 0                                            ; 7E360280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v28, vcc, 0xffffffe8, v26                         ; 4A3834FF FFFFFFE8
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v29, vcc, 0xffffffec, v26                         ; 4A3A34FF FFFFFFEC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -16, v26                                ; 4A3C34D0
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v31, vcc, -12, v26                                ; 4A3E34CC
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v32, vcc, -8, v26                                 ; 4A4034C8
>	v_add_i32_e32 v27, vcc, 1, v27                                  ; 4A363681
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v28, v1, v28                                   ; 0A383901
>	v_mul_f32_e32 v33, v28, v28                                     ; 1042391C
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v29, v0, v29                                   ; 0A3A3B00
>	v_mac_f32_e32 v33, v29, v29                                     ; 3E423B1D
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v30, v2, v30                                   ; 0A3C3D02
>	v_mac_f32_e32 v33, v30, v30                                     ; 3E423D1E
>	v_rsq_f32_e32 v34, v33                                          ; 7E445D21
>	v_mul_f32_e32 v28, v34, v28                                     ; 10383922
>	v_mul_f32_e32 v35, v16, v28                                     ; 10463910
>	v_mul_f32_e32 v29, v34, v29                                     ; 103A3B22
>	v_mul_f32_e32 v28, v4, v28                                      ; 10383904
>	v_mul_f32_e32 v30, v34, v30                                     ; 103C3D22
>	v_mac_f32_e32 v35, v17, v29                                     ; 3E463B11
>	v_mac_f32_e32 v28, v5, v29                                      ; 3E383B05
>	v_mac_f32_e32 v35, v18, v30                                     ; 3E463D12
>	v_mac_f32_e32 v28, v12, v30                                     ; 3E383D0C
>	v_add_i32_e32 v30, vcc, -4, v26                                 ; 4A3C34C4
>	buffer_load_dword v29, v32, s[0:3], 0 offen                     ; E0301000 80001D20
>	buffer_load_dword v32, v26, s[0:3], 0 offen                     ; E0301000 8000201A
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_f32_e64 v35, v35, 0 clamp                                 ; D2060823 00010123
>	v_subrev_f32_e32 v35, v35, v25                                  ; 0A463323
>	v_add_f32_e64 v35, v35, 0 clamp                                 ; D2060823 00010123
>	v_mul_f32_e32 v35, v35, v35                                     ; 10464723
>	v_mul_f32_e32 v33, v34, v33                                     ; 10424322
>	v_mul_f32_e32 v35, v35, v35                                     ; 10464723
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_mul_f32_e32 v31, v31, v33                                     ; 103E431F
>	v_add_f32_e64 v31, v31, 0 clamp                                 ; D206081F 0001011F
>	v_add_f32_e64 v35, v35, 0 clamp                                 ; D2060823 00010123
>	v_sub_f32_e32 v36, 1.0, v34                                     ; 084844F2
>	v_mac_f32_e32 v34, v36, v35                                     ; 3E444724
>	v_add_f32_e64 v28, v28, 0 clamp                                 ; D206081C 0001011C
>	v_add_i32_e32 v26, vcc, 32, v26                                 ; 4A3434A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v29, -v31, v29, v29                                   ; D282001D 24763B1F
>	v_mul_f32_e32 v29, v34, v29                                     ; 103A3B22
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v30, -v31, v30, v30                                   ; D282001E 247A3D1F
>	v_mad_f32 v31, -v31, v32, v32                                   ; D282001F 2482411F
>	v_mul_f32_e32 v29, v14, v29                                     ; 103A3B0E
>	v_mul_f32_e32 v30, v34, v30                                     ; 103C3D22
>	v_mul_f32_e32 v31, v34, v31                                     ; 103E3F22
>	v_mac_f32_e32 v24, v29, v28                                     ; 3E30391D
>	v_mul_f32_e32 v29, v14, v30                                     ; 103A3D0E
>	v_mul_f32_e32 v30, v14, v31                                     ; 103C3F0E
>	v_mac_f32_e32 v23, v29, v28                                     ; 3E2E391D
>	v_mac_f32_e32 v22, v30, v28                                     ; 3E2C391E
>	v_cmp_lt_i32_e32 vcc, 3, v27                                    ; 7D023683
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	s_load_dwordx8 s[12:19], s[4:5], 0x70                           ; C0C60570
>	s_load_dwordx4 s[4:7], s[4:5], 0x7c                             ; C082057C
>	s_buffer_load_dword s8, s[0:3], 0x63                            ; C2040163
>	v_mul_f32_e32 v5, v15, v19                                      ; 100A270F
>	v_mac_f32_e32 v5, v9, v24                                       ; 3E0A3109
>	v_mov_b32_e32 v9, 0x42000000                                    ; 7E1202FF 42000000
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	image_sample v[16:18], v[7:8], s[12:19], s[4:7] dmask:0x7       ; F0800700 00231007
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v16                               ; 100220FF 3E99999A
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v1, 0x3f170a3d, v17                               ; 3E0222FF 3F170A3D
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mac_f32_e32 v1, 0x3de147ae, v18                               ; 3E0224FF 3DE147AE
>	v_mac_f32_e32 v1, s8, v1                                        ; 3E020208
>	v_mul_f32_e32 v2, v1, v16                                       ; 10042101
>	v_mac_f32_e32 v5, v9, v2                                        ; 3E0A0509
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v8, v15, v21                                      ; 10102B0F
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v4, v1, v17                                       ; 10082301
>	v_mul_f32_e32 v1, v1, v18                                       ; 10022501
>	v_mac_f32_e32 v8, v11, v22                                      ; 3E102D0B
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v8, v9, v1                                        ; 3E100309
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v7, v15, v20                                      ; 100E290F
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v7, v10, v23                                      ; 3E0E2F0A
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_mac_f32_e32 v7, v9, v4                                        ; 3E0E0909
>	v_mul_f32_e32 v4, v0, v1                                        ; 10080300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v4, s6, s6                                       ; D2820000 20180D04
>	v_mad_f32 v1, -v4, s7, s7                                       ; D2820001 201C0F04
>	v_mad_f32 v2, -v4, s0, s0                                       ; D2820002 20000104
>	v_mac_f32_e32 v0, v4, v5                                        ; 3E000B04
>	v_mac_f32_e32 v1, v4, v7                                        ; 3E020F04
>	v_mac_f32_e32 v2, v4, v8                                        ; 3E041104
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 80
>VGPRS: 44
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2032 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5].x, GENERIC[4]
>DCL CONST[0..5]
>DCL TEMP[0..7], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MAD TEMP[0], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[0].zwww
>  3: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[0].wzww
>  4: MOV TEMP[2].y, TEMP[3].xxxx
>  5: DP3 TEMP[1].x, TEMP[1].xyzz, IMM[0].wwzz
>  6: MOV TEMP[2].z, TEMP[1].xxxx
>  7: DP3 TEMP[3].x, TEMP[0].xyzz, IMM[0].zwww
>  8: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wzww
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wwzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: MUL TEMP[4], CONST[0], IN[0].xxxx
> 13: MAD TEMP[4], CONST[1], IN[0].yyyy, TEMP[4]
> 14: MAD TEMP[4], CONST[2], IN[0].zzzz, TEMP[4]
> 15: MAD TEMP[4], CONST[3], IN[0].wwww, TEMP[4]
> 16: MOV TEMP[5].xyz, IN[0].xyzx
> 17: MUL TEMP[6].x, TEMP[4].wwww, CONST[5].wwww
> 18: MOV TEMP[5].w, TEMP[6].xxxx
> 19: MAD TEMP[6].x, TEMP[4].zzzz, CONST[4].yyyy, CONST[4].xxxx
> 20: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 21: POW TEMP[6].x, TEMP[6].xxxx, CONST[4].zzzz
> 22: ADD TEMP[7].x, IMM[0].zzzz, -CONST[4].wwww
> 23: MAD TEMP[6].x, CONST[4].wwww, TEMP[6].xxxx, TEMP[7].xxxx
> 24: MUL TEMP[7].xyz, TEMP[2].zxyy, TEMP[3].yzxx
> 25: MAD TEMP[7].xyz, TEMP[2].yzxx, TEMP[3].zxyy, -TEMP[7].xyzz
> 26: MUL TEMP[0].xyz, TEMP[7].xyzz, TEMP[0].wwww
> 27: MOV TEMP[3].xyz, TEMP[3].xyzx
> 28: MOV TEMP[3].w, TEMP[0].xxxx
> 29: MOV TEMP[0].xy, TEMP[0].yzyy
> 30: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[6].xxxx
> 31: MOV TEMP[6].z, TEMP[6].xxxx
> 32: MOV TEMP[6].xy, IN[3].xyxx
> 33: MOV TEMP[0].zw, TEMP[2].yyxy
> 34: MOV OUT[1], TEMP[5]
> 35: MOV OUT[4], TEMP[0]
> 36: MOV OUT[0], TEMP[4]
> 37: MOV OUT[3], TEMP[3]
> 38: MOV OUT[2].xyz, TEMP[6].xyzx
> 39: MOV OUT[5].x, TEMP[1].xxxx
> 40: END
>radeonsi: Compiling shader 87
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %18 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %19 = load <16 x i8>, <16 x i8> addrspace(2)* %18, align 16, !invariant.load !0
>  %20 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %19, i32 0, i32 %14)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = extractelement <4 x float> %20, i32 1
>  %23 = extractelement <4 x float> %20, i32 2
>  %24 = extractelement <4 x float> %20, i32 3
>  %25 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, align 16, !invariant.load !0
>  %27 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %26, i32 0, i32 %15)
>  %28 = extractelement <4 x float> %27, i32 0
>  %29 = extractelement <4 x float> %27, i32 1
>  %30 = extractelement <4 x float> %27, i32 2
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %39, i32 0, i32 %17)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = fmul float %34, 2.000000e+00
>  %44 = fadd float %43, -1.000000e+00
>  %45 = fmul float %35, 2.000000e+00
>  %46 = fadd float %45, -1.000000e+00
>  %47 = fmul float %36, 2.000000e+00
>  %48 = fadd float %47, -1.000000e+00
>  %49 = fmul float %37, 2.000000e+00
>  %50 = fadd float %49, -1.000000e+00
>  %51 = fmul float %28, 2.000000e+00
>  %52 = fadd float %51, -1.000000e+00
>  %53 = fmul float %29, 2.000000e+00
>  %54 = fadd float %53, -1.000000e+00
>  %55 = fmul float %30, 2.000000e+00
>  %56 = fadd float %55, -1.000000e+00
>  %57 = fmul float %54, 0.000000e+00
>  %58 = fadd float %57, %52
>  %59 = fmul float %56, 0.000000e+00
>  %60 = fadd float %58, %59
>  %61 = fmul float %52, 0.000000e+00
>  %62 = fadd float %54, %61
>  %63 = fmul float %56, 0.000000e+00
>  %64 = fadd float %62, %63
>  %65 = fmul float %52, 0.000000e+00
>  %66 = fmul float %54, 0.000000e+00
>  %67 = fadd float %66, %65
>  %68 = fadd float %67, %56
>  %69 = fmul float %46, 0.000000e+00
>  %70 = fadd float %69, %44
>  %71 = fmul float %48, 0.000000e+00
>  %72 = fadd float %70, %71
>  %73 = fmul float %44, 0.000000e+00
>  %74 = fadd float %46, %73
>  %75 = fmul float %48, 0.000000e+00
>  %76 = fadd float %74, %75
>  %77 = fmul float %44, 0.000000e+00
>  %78 = fmul float %46, 0.000000e+00
>  %79 = fadd float %78, %77
>  %80 = fadd float %79, %48
>  %81 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %82 = load <16 x i8>, <16 x i8> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = call float @llvm.SI.load.const(<16 x i8> %82, i32 0)
>  %84 = fmul float %83, %21
>  %85 = call float @llvm.SI.load.const(<16 x i8> %82, i32 4)
>  %86 = fmul float %85, %21
>  %87 = call float @llvm.SI.load.const(<16 x i8> %82, i32 8)
>  %88 = fmul float %87, %21
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = call float @llvm.SI.load.const(<16 x i8> %90, i32 12)
>  %92 = fmul float %91, %21
>  %93 = call float @llvm.SI.load.const(<16 x i8> %90, i32 16)
>  %94 = fmul float %93, %22
>  %95 = fadd float %94, %84
>  %96 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %97 = load <16 x i8>, <16 x i8> addrspace(2)* %96, align 16, !invariant.load !0
>  %98 = call float @llvm.SI.load.const(<16 x i8> %97, i32 20)
>  %99 = fmul float %98, %22
>  %100 = fadd float %99, %86
>  %101 = call float @llvm.SI.load.const(<16 x i8> %97, i32 24)
>  %102 = fmul float %101, %22
>  %103 = fadd float %102, %88
>  %104 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %105 = load <16 x i8>, <16 x i8> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = call float @llvm.SI.load.const(<16 x i8> %105, i32 28)
>  %107 = fmul float %106, %22
>  %108 = fadd float %107, %92
>  %109 = call float @llvm.SI.load.const(<16 x i8> %105, i32 32)
>  %110 = fmul float %109, %23
>  %111 = fadd float %110, %95
>  %112 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %113 = load <16 x i8>, <16 x i8> addrspace(2)* %112, align 16, !invariant.load !0
>  %114 = call float @llvm.SI.load.const(<16 x i8> %113, i32 36)
>  %115 = fmul float %114, %23
>  %116 = fadd float %115, %100
>  %117 = call float @llvm.SI.load.const(<16 x i8> %113, i32 40)
>  %118 = fmul float %117, %23
>  %119 = fadd float %118, %103
>  %120 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %121 = load <16 x i8>, <16 x i8> addrspace(2)* %120, align 16, !invariant.load !0
>  %122 = call float @llvm.SI.load.const(<16 x i8> %121, i32 44)
>  %123 = fmul float %122, %23
>  %124 = fadd float %123, %108
>  %125 = call float @llvm.SI.load.const(<16 x i8> %121, i32 48)
>  %126 = fmul float %125, %24
>  %127 = fadd float %126, %111
>  %128 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %129 = load <16 x i8>, <16 x i8> addrspace(2)* %128, align 16, !invariant.load !0
>  %130 = call float @llvm.SI.load.const(<16 x i8> %129, i32 52)
>  %131 = fmul float %130, %24
>  %132 = fadd float %131, %116
>  %133 = call float @llvm.SI.load.const(<16 x i8> %129, i32 56)
>  %134 = fmul float %133, %24
>  %135 = fadd float %134, %119
>  %136 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %137 = load <16 x i8>, <16 x i8> addrspace(2)* %136, align 16, !invariant.load !0
>  %138 = call float @llvm.SI.load.const(<16 x i8> %137, i32 60)
>  %139 = fmul float %138, %24
>  %140 = fadd float %139, %124
>  %141 = call float @llvm.SI.load.const(<16 x i8> %137, i32 92)
>  %142 = fmul float %140, %141
>  %143 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %144 = load <16 x i8>, <16 x i8> addrspace(2)* %143, align 16, !invariant.load !0
>  %145 = call float @llvm.SI.load.const(<16 x i8> %144, i32 68)
>  %146 = call float @llvm.SI.load.const(<16 x i8> %144, i32 64)
>  %147 = fmul float %135, %145
>  %148 = fadd float %147, %146
>  %149 = call float @llvm.AMDGPU.clamp.(float %148, float 0.000000e+00, float 1.000000e+00)
>  %150 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %151 = load <16 x i8>, <16 x i8> addrspace(2)* %150, align 16, !invariant.load !0
>  %152 = call float @llvm.SI.load.const(<16 x i8> %151, i32 72)
>  %153 = call float @llvm.pow.f32(float %149, float %152)
>  %154 = call float @llvm.SI.load.const(<16 x i8> %151, i32 76)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = call float @llvm.SI.load.const(<16 x i8> %151, i32 76)
>  %157 = fmul float %156, %153
>  %158 = fadd float %157, %155
>  %159 = fmul float %68, %76
>  %160 = fmul float %60, %80
>  %161 = fmul float %64, %72
>  %162 = fmul float %64, %80
>  %163 = fsub float %162, %159
>  %164 = fmul float %68, %72
>  %165 = fsub float %164, %160
>  %166 = fmul float %60, %76
>  %167 = fsub float %166, %161
>  %168 = fmul float %163, %50
>  %169 = fmul float %165, %50
>  %170 = fmul float %167, %50
>  %171 = fmul float %158, %158
>  %172 = bitcast i32 %12 to float
>  %173 = insertvalue <{ float, float, float }> undef, float %172, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %21, float %22, float %23, float %142)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %41, float %42, float %171, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %72, float %76, float %80, float %168)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %169, float %170, float %60, float %64)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %68, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %127, float %132, float %135, float %140)
>  ret <{ float, float, float }> %173
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4].x, GENERIC[4], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..18]
>DCL TEMP[0..54], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[2] FLT32 {    5.0000,     0.0000,     4.0000,     0.2500}
>IMM[3] FLT32 {    0.0000,     0.0010,     8.0000,     0.0000}
>IMM[4] INT32 {0, 4, 2, 1}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwzz
>  3: MOV TEMP[1].z, IN[4].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[1].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[5], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[1].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[4], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[2].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[0].xyzz
> 31: MOV TEMP[6].x, TEMP[4].yyyy
> 32: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[2].xyzz
> 33: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[0].xyzz
> 34: MUL TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz
> 35: ADD TEMP[7].xyz, TEMP[2].xyzz, -TEMP[7].xyzz
> 36: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[1].xyzz
> 37: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 38: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 39: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 40: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 41: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 42: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 43: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 44: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 45: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[7].xxxx
> 46: MOV TEMP[6].y, TEMP[7].xxxx
> 47: MOV TEMP[8].w, IMM[0].wwww
> 48: MAD TEMP[8].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 49: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 50: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 51: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 52: ADD TEMP[1], TEMP[1], CONST[7]
> 53: MAD TEMP[8].x, IMM[1].yyyy, TEMP[4].zzzz, IMM[0].xxxx
> 54: EX2 TEMP[8].x, TEMP[8].xxxx
> 55: MOV TEMP[9].xyz, -CONST[1].xyzx
> 56: ADD TEMP[10].xyz, TEMP[9].xyzz, TEMP[2].xyzz
> 57: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[1].zzzz
> 58: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 59: RSQ TEMP[11].x, TEMP[11].xxxx
> 60: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 61: DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[0].xyzz
> 62: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 63: MOV TEMP[12].xy, TEMP[1].xyyy
> 64: MOV TEMP[12].w, IMM[0].wwww
> 65: MOV TEMP[12].z, TEMP[1].zzzz
> 66: TXP TEMP[1], TEMP[12], SAMP[0], SHADOW2D
> 67: MOV TEMP[12].x, TEMP[1].xxxx
> 68: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 69: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 70: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
> 71: MUL TEMP[1].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 72: MOV TEMP[12].xyz, TEMP[0].xyzz
> 73: TEX TEMP[12], TEMP[12], SAMP[1], CUBE
> 74: MOV TEMP[13], TEMP[12]
> 75: DP3 TEMP[13].x, TEMP[0].xyzz, TEMP[2].xyzz
> 76: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[0].xyzz
> 77: MAD TEMP[13].xyz, IMM[0].xxxx, TEMP[13].xyzz, -TEMP[2].xyzz
> 78: ADD TEMP[14].x, IMM[0].wwww, -TEMP[4].zzzz
> 79: MUL TEMP[14].x, TEMP[14].xxxx, IMM[1].wwww
> 80: MOV TEMP[13].w, TEMP[14].xxxx
> 81: DP3 TEMP[15].x, TEMP[2].xyzz, TEMP[0].xyzz
> 82: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 83: ADD TEMP[15].x, IMM[0].wwww, -TEMP[15].xxxx
> 84: POW TEMP[15].x, TEMP[15].xxxx, IMM[2].xxxx
> 85: MAX TEMP[16].xyz, TEMP[4].zzzz, IMM[2].yyyy
> 86: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[16].xyzz
> 87: MOV TEMP[13].xyz, TEMP[13].xyzz
> 88: MOV TEMP[13].w, TEMP[14].xxxx
> 89: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
> 90: MUL TEMP[13].xyz, TEMP[15].xyzz, TEMP[13].xyzz
> 91: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[12].wwww
> 92: MUL TEMP[4].x, IMM[2].zzzz, TEMP[4].yyyy
> 93: MAD TEMP[4].xyz, TEMP[12].xyzz, TEMP[4].xxxx, TEMP[1].xyzz
> 94: DP3 TEMP[9].x, TEMP[9].xyzz, TEMP[10].xyzz
> 95: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 96: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 97: POW TEMP[9].x, TEMP[9].xxxx, IMM[2].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 99: ADD TEMP[9].x, TEMP[8].xxxx, IMM[0].xxxx
>100: MUL TEMP[9].x, TEMP[9].xxxx, IMM[2].wwww
>101: MUL TEMP[12].x, -TEMP[8].xxxx, IMM[1].zzzz
>102: EX2 TEMP[12].x, TEMP[12].xxxx
>103: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
>104: RCP TEMP[12].x, TEMP[12].xxxx
>105: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[12].xxxx
>106: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>107: DP3 TEMP[9].x, TEMP[0].xyzz, TEMP[10].xyzz
>108: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>109: POW TEMP[9].x, TEMP[9].xxxx, TEMP[8].xxxx
>110: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>111: DP3 TEMP[9].x, TEMP[2].xyzz, TEMP[0].xyzz
>112: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>113: MAX TEMP[9].x, TEMP[11].xxxx, TEMP[9].xxxx
>114: ADD TEMP[9].x, TEMP[9].xxxx, IMM[3].xxxx
>115: RCP TEMP[9].x, TEMP[9].xxxx
>116: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[13].xyzz
>117: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>118: MOV TEMP[7].x, IMM[4].xxxx
>119: BGNLOOP :0
>120:   ISGE TEMP[9].x, TEMP[7].xxxx, IMM[4].yyyy
>121:   UIF TEMP[9].xxxx :0
>122:     BRK
>123:   ENDIF
>124:   UMUL TEMP[10].x, TEMP[7].xxxx, IMM[4].zzzz
>125:   UARL ADDR[0].x, TEMP[10].xxxx
>126:   UARL ADDR[0].x, TEMP[10].xxxx
>127:   ADD TEMP[11].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>128:   DP3 TEMP[12].x, TEMP[11].xyzz, TEMP[11].xyzz
>129:   RSQ TEMP[14].x, TEMP[12].xxxx
>130:   MUL TEMP[15].xyz, TEMP[11].xyzz, TEMP[14].xxxx
>131:   ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[2].xyzz
>132:   MUL TEMP[17].xyz, TEMP[16].xyzz, IMM[1].zzzz
>133:   DP3 TEMP[18].x, TEMP[17].xyzz, TEMP[17].xyzz
>134:   RSQ TEMP[19].x, TEMP[18].xxxx
>135:   MUL TEMP[20].xyz, TEMP[17].xyzz, TEMP[19].xxxx
>136:   DP3 TEMP[21].x, TEMP[15].xyzz, TEMP[0].xyzz
>137:   MOV_SAT TEMP[22].x, TEMP[21].xxxx
>138:   UMAD TEMP[23].x, TEMP[7].xxxx, IMM[4].zzzz, IMM[4].wwww
>139:   MUL TEMP[24].x, TEMP[12].xxxx, TEMP[14].xxxx
>140:   UMUL TEMP[25].x, TEMP[7].xxxx, IMM[4].zzzz
>141:   UARL ADDR[0].x, TEMP[25].xxxx
>142:   MUL TEMP[26].x, TEMP[24].xxxx, CONST[ADDR[0].x+11].wwww
>143:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>144:   ADD TEMP[28].x, IMM[0].wwww, -TEMP[27].xxxx
>145:   UARL ADDR[0].x, TEMP[23].xxxx
>146:   MUL TEMP[29].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[28].xxxx
>147:   MUL TEMP[30].xyz, TEMP[29].xyzz, TEMP[5].yyyy
>148:   MUL TEMP[31].xyz, TEMP[22].xxxx, TEMP[30].xyzz
>149:   ADD TEMP[4].xyz, TEMP[4].xyzz, TEMP[31].xyzz
>150:   DP3 TEMP[32].x, TEMP[15].xyzz, TEMP[20].xyzz
>151:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>152:   ADD TEMP[34].x, IMM[0].wwww, -TEMP[33].xxxx
>153:   POW TEMP[35].x, TEMP[34].xxxx, IMM[2].xxxx
>154:   MUL TEMP[36].xyz, TEMP[31].xyzz, TEMP[35].xxxx
>155:   ADD TEMP[37].x, TEMP[8].xxxx, IMM[0].xxxx
>156:   MUL TEMP[38].x, TEMP[37].xxxx, IMM[2].wwww
>157:   MUL TEMP[39].x, -TEMP[8].xxxx, IMM[1].zzzz
>158:   EX2 TEMP[40].x, TEMP[39].xxxx
>159:   ADD TEMP[41].x, IMM[0].xxxx, -TEMP[40].xxxx
>160:   RCP TEMP[42].x, TEMP[41].xxxx
>161:   MUL TEMP[43].x, TEMP[38].xxxx, TEMP[42].xxxx
>162:   MUL TEMP[44].xyz, TEMP[36].xyzz, TEMP[43].xxxx
>163:   DP3 TEMP[45].x, TEMP[0].xyzz, TEMP[20].xyzz
>164:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>165:   POW TEMP[47].x, TEMP[46].xxxx, TEMP[8].xxxx
>166:   MUL TEMP[48].xyz, TEMP[44].xyzz, TEMP[47].xxxx
>167:   DP3 TEMP[49].x, TEMP[2].xyzz, TEMP[0].xyzz
>168:   MOV_SAT TEMP[50].x, TEMP[49].xxxx
>169:   MAX TEMP[51].x, TEMP[22].xxxx, TEMP[50].xxxx
>170:   ADD TEMP[52].x, TEMP[51].xxxx, IMM[3].xxxx
>171:   RCP TEMP[53].x, TEMP[52].xxxx
>172:   MUL TEMP[54].xyz, TEMP[48].xyzz, TEMP[53].xxxx
>173:   MAD TEMP[1].xyz, TEMP[54].xyzz, TEMP[6].yyyy, TEMP[1].xyzz
>174:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[4].wwww
>175: ENDLOOP :0
>176: MUL TEMP[0].xyz, TEMP[13].xyzz, TEMP[6].yyyy
>177: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[3].xyzz, TEMP[0].xyzz
>178: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>179: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].yyyy
>180: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>181: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].yyyy
>182: RCP TEMP[2].x, TEMP[2].xxxx
>183: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>184: FRC TEMP[2].x, CONST[1].wwww
>185: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>186: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>187: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>188: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
>189: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>190: MOV TEMP[0].w, IN[0].wwww
>191: MOV OUT[0], TEMP[0]
>192: END
>radeonsi: Compiling shader 88
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 15, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 23, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 19, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fmul float %151, 2.000000e+00
>  %155 = fmul float %152, 2.000000e+00
>  %156 = fsub float %49, %153
>  %157 = fsub float %50, %154
>  %158 = fsub float %51, %155
>  %159 = fmul float %156, %59
>  %160 = fmul float %157, %60
>  %161 = fadd float %160, %159
>  %162 = fmul float %158, %61
>  %163 = fadd float %161, %162
>  %164 = fadd float %163, 1.000000e+00
>  %165 = fmul float %49, %59
>  %166 = fmul float %50, %60
>  %167 = fadd float %166, %165
>  %168 = fmul float %51, %61
>  %169 = fadd float %167, %168
>  %170 = fsub float 1.000000e+00, %169
>  %171 = call float @llvm.AMDGPU.clamp.(float %170, float 0.000000e+00, float 1.000000e+00)
>  %172 = fsub float %164, %171
>  %173 = call float @llvm.AMDGPU.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %174 = fsub float 1.000000e+00, %173
>  %175 = fmul float %174, %174
>  %176 = fmul float %97, %175
>  %177 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %178 = fmul float %59, 0x4007700140000000
>  %179 = fadd float %178, %177
>  %180 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %181 = fmul float %60, 0x4007700140000000
>  %182 = fadd float %181, %180
>  %183 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %184 = fmul float %61, 0x4007700140000000
>  %185 = fadd float %184, %183
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = call float @llvm.SI.load.const(<16 x i8> %187, i32 64)
>  %189 = fmul float %188, %179
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 68)
>  %191 = fmul float %190, %179
>  %192 = call float @llvm.SI.load.const(<16 x i8> %187, i32 72)
>  %193 = fmul float %192, %179
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = call float @llvm.SI.load.const(<16 x i8> %195, i32 80)
>  %197 = fmul float %196, %182
>  %198 = fadd float %197, %189
>  %199 = call float @llvm.SI.load.const(<16 x i8> %195, i32 84)
>  %200 = fmul float %199, %182
>  %201 = fadd float %200, %191
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = call float @llvm.SI.load.const(<16 x i8> %203, i32 88)
>  %205 = fmul float %204, %182
>  %206 = fadd float %205, %193
>  %207 = call float @llvm.SI.load.const(<16 x i8> %203, i32 96)
>  %208 = fmul float %207, %185
>  %209 = fadd float %208, %198
>  %210 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <16 x i8>, <16 x i8> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = call float @llvm.SI.load.const(<16 x i8> %211, i32 100)
>  %213 = fmul float %212, %185
>  %214 = fadd float %213, %201
>  %215 = call float @llvm.SI.load.const(<16 x i8> %211, i32 104)
>  %216 = fmul float %215, %185
>  %217 = fadd float %216, %206
>  %218 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %219 = load <16 x i8>, <16 x i8> addrspace(2)* %218, align 16, !invariant.load !0
>  %220 = call float @llvm.SI.load.const(<16 x i8> %219, i32 112)
>  %221 = fadd float %209, %220
>  %222 = call float @llvm.SI.load.const(<16 x i8> %219, i32 116)
>  %223 = fadd float %214, %222
>  %224 = call float @llvm.SI.load.const(<16 x i8> %219, i32 120)
>  %225 = fadd float %217, %224
>  %226 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %227 = load <16 x i8>, <16 x i8> addrspace(2)* %226, align 16, !invariant.load !0
>  %228 = call float @llvm.SI.load.const(<16 x i8> %227, i32 16)
>  %229 = call float @llvm.SI.load.const(<16 x i8> %227, i32 20)
>  %230 = call float @llvm.SI.load.const(<16 x i8> %227, i32 24)
>  %231 = fmul float %228, %140
>  %232 = fsub float -0.000000e+00, %231
>  %233 = fmul float %229, %142
>  %234 = fsub float %232, %233
>  %235 = fmul float %230, %144
>  %236 = fsub float %234, %235
>  %237 = call float @llvm.AMDGPU.clamp.(float %236, float 0.000000e+00, float 1.000000e+00)
>  %238 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %239 = load <8 x i32>, <8 x i32> addrspace(2)* %238, align 32, !invariant.load !0
>  %240 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %241 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %240, i64 0, i64 3, !amdgpu.uniform !0
>  %242 = load <4 x i32>, <4 x i32> addrspace(2)* %241, align 16, !invariant.load !0
>  %243 = extractelement <8 x i32> %239, i32 7
>  %244 = extractelement <4 x i32> %242, i32 0
>  %245 = and i32 %244, %243
>  %246 = insertelement <4 x i32> %242, i32 %245, i32 0
>  %247 = bitcast float %225 to i32
>  %248 = bitcast float %221 to i32
>  %249 = bitcast float %223 to i32
>  %250 = insertelement <4 x i32> undef, i32 %247, i32 0
>  %251 = insertelement <4 x i32> %250, i32 %248, i32 1
>  %252 = insertelement <4 x i32> %251, i32 %249, i32 2
>  %253 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %252, <8 x i32> %239, <4 x i32> %246, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %254 = extractelement <4 x float> %253, i32 0
>  %255 = fmul float %254, %254
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 48)
>  %259 = fmul float %258, %255
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 52)
>  %261 = fmul float %260, %255
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 56)
>  %263 = fmul float %262, %255
>  %264 = fmul float %259, %97
>  %265 = fmul float %261, %97
>  %266 = fmul float %263, %97
>  %267 = fmul float %237, %264
>  %268 = fmul float %237, %265
>  %269 = fmul float %237, %266
>  %270 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %271 = load <8 x i32>, <8 x i32> addrspace(2)* %270, align 32, !invariant.load !0
>  %272 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %273 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %272, i64 0, i64 7, !amdgpu.uniform !0
>  %274 = load <4 x i32>, <4 x i32> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = extractelement <8 x i32> %271, i32 7
>  %276 = extractelement <4 x i32> %274, i32 0
>  %277 = and i32 %276, %275
>  %278 = insertelement <4 x i32> %274, i32 %277, i32 0
>  %279 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %280 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %281 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %282 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %283 = call float @llvm.fabs.f32(float %281)
>  %284 = fdiv float 1.000000e+00, %283, !fpmath !1
>  %285 = fmul float %279, %284
>  %286 = fadd float %285, 1.500000e+00
>  %287 = fmul float %280, %284
>  %288 = fadd float %287, 1.500000e+00
>  %289 = bitcast float %288 to i32
>  %290 = bitcast float %286 to i32
>  %291 = bitcast float %282 to i32
>  %292 = insertelement <4 x i32> undef, i32 %289, i32 0
>  %293 = insertelement <4 x i32> %292, i32 %290, i32 1
>  %294 = insertelement <4 x i32> %293, i32 %291, i32 2
>  %295 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %294, <8 x i32> %271, <4 x i32> %278, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %296 = extractelement <4 x float> %295, i32 0
>  %297 = extractelement <4 x float> %295, i32 1
>  %298 = extractelement <4 x float> %295, i32 2
>  %299 = extractelement <4 x float> %295, i32 3
>  %300 = fmul float %140, %49
>  %301 = fmul float %142, %50
>  %302 = fadd float %301, %300
>  %303 = fmul float %144, %51
>  %304 = fadd float %302, %303
>  %305 = fmul float %304, %140
>  %306 = fmul float %304, %142
>  %307 = fmul float %304, %144
>  %308 = fmul float %305, 2.000000e+00
>  %309 = fsub float %308, %49
>  %310 = fmul float %306, 2.000000e+00
>  %311 = fsub float %310, %50
>  %312 = fmul float %307, 2.000000e+00
>  %313 = fsub float %312, %51
>  %314 = fsub float 1.000000e+00, %98
>  %315 = fmul float %314, 6.000000e+00
>  %316 = fmul float %49, %140
>  %317 = fmul float %50, %142
>  %318 = fadd float %317, %316
>  %319 = fmul float %51, %144
>  %320 = fadd float %318, %319
>  %321 = call float @llvm.AMDGPU.clamp.(float %320, float 0.000000e+00, float 1.000000e+00)
>  %322 = fsub float 1.000000e+00, %321
>  %323 = call float @llvm.pow.f32(float %322, float 5.000000e+00)
>  %324 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %325 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %326 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %327 = fmul float %323, %324
>  %328 = fmul float %323, %325
>  %329 = fmul float %323, %326
>  %330 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %331 = load <8 x i32>, <8 x i32> addrspace(2)* %330, align 32, !invariant.load !0
>  %332 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %333 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %332, i64 0, i64 11, !amdgpu.uniform !0
>  %334 = load <4 x i32>, <4 x i32> addrspace(2)* %333, align 16, !invariant.load !0
>  %335 = extractelement <8 x i32> %331, i32 7
>  %336 = extractelement <4 x i32> %334, i32 0
>  %337 = and i32 %336, %335
>  %338 = insertelement <4 x i32> %334, i32 %337, i32 0
>  %339 = call float @llvm.amdgcn.cubetc(float %309, float %311, float %313)
>  %340 = call float @llvm.amdgcn.cubesc(float %309, float %311, float %313)
>  %341 = call float @llvm.amdgcn.cubema(float %309, float %311, float %313)
>  %342 = call float @llvm.amdgcn.cubeid(float %309, float %311, float %313)
>  %343 = call float @llvm.fabs.f32(float %341)
>  %344 = fdiv float 1.000000e+00, %343, !fpmath !1
>  %345 = fmul float %339, %344
>  %346 = fadd float %345, 1.500000e+00
>  %347 = fmul float %340, %344
>  %348 = fadd float %347, 1.500000e+00
>  %349 = bitcast float %348 to i32
>  %350 = bitcast float %346 to i32
>  %351 = bitcast float %342 to i32
>  %352 = bitcast float %315 to i32
>  %353 = insertelement <4 x i32> undef, i32 %349, i32 0
>  %354 = insertelement <4 x i32> %353, i32 %350, i32 1
>  %355 = insertelement <4 x i32> %354, i32 %351, i32 2
>  %356 = insertelement <4 x i32> %355, i32 %352, i32 3
>  %357 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %356, <8 x i32> %331, <4 x i32> %338, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %358 = extractelement <4 x float> %357, i32 0
>  %359 = extractelement <4 x float> %357, i32 1
>  %360 = extractelement <4 x float> %357, i32 2
>  %361 = fmul float %327, %358
>  %362 = fmul float %328, %359
>  %363 = fmul float %329, %360
>  %364 = fmul float %296, %299
>  %365 = fmul float %297, %299
>  %366 = fmul float %298, %299
>  %367 = fmul float %97, 4.000000e+00
>  %368 = fmul float %364, %367
>  %369 = fadd float %368, %267
>  %370 = fmul float %365, %367
>  %371 = fadd float %370, %268
>  %372 = fmul float %366, %367
>  %373 = fadd float %372, %269
>  %374 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %375 = load <16 x i8>, <16 x i8> addrspace(2)* %374, align 16
>  br label %loop119
>
>loop119:                                          ; preds = %endif123, %main_body
>  %376 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %377 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %378 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %379 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %380 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %.011 = phi float [ %373, %main_body ], [ %442, %endif123 ]
>  %.010 = phi float [ %371, %main_body ], [ %441, %endif123 ]
>  %.09 = phi float [ %369, %main_body ], [ %440, %endif123 ]
>  %381 = icmp sgt i32 %376, 3
>  br i1 %381, label %endloop175, label %endif123
>
>endif123:                                         ; preds = %loop119
>  %382 = shl i32 %377, 5
>  %383 = shl i32 %377, 5
>  %384 = add i32 %383, 176
>  %385 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %384)
>  %386 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %387 = fsub float %385, %386
>  %388 = shl i32 %377, 5
>  %389 = add i32 %388, 180
>  %390 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %389)
>  %391 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %392 = fsub float %390, %391
>  %393 = add i32 %382, 184
>  %394 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %393)
>  %395 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %396 = fsub float %394, %395
>  %397 = fmul float %387, %387
>  %398 = fmul float %392, %392
>  %399 = fadd float %398, %397
>  %400 = fmul float %396, %396
>  %401 = fadd float %399, %400
>  %402 = call float @llvm.sqrt.f32(float %401)
>  %403 = fdiv float 1.000000e+00, %402, !fpmath !1
>  %404 = fmul float %387, %403
>  %405 = fmul float %392, %403
>  %406 = fmul float %396, %403
>  %407 = fmul float %404, %140
>  %408 = fmul float %405, %142
>  %409 = fadd float %408, %407
>  %410 = fmul float %406, %144
>  %411 = fadd float %409, %410
>  %412 = call float @llvm.AMDGPU.clamp.(float %411, float 0.000000e+00, float 1.000000e+00)
>  %413 = shl i32 %378, 1
>  %414 = or i32 %413, 1
>  %415 = fmul float %401, %403
>  %416 = shl i32 %379, 5
>  %417 = add i32 %416, 188
>  %418 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %417)
>  %419 = fmul float %415, %418
>  %420 = call float @llvm.AMDGPU.clamp.(float %419, float 0.000000e+00, float 1.000000e+00)
>  %421 = fsub float 1.000000e+00, %420
>  %422 = shl i32 %414, 4
>  %423 = add i32 %422, 176
>  %424 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %423)
>  %425 = fmul float %424, %421
>  %426 = shl i32 %414, 4
>  %427 = add i32 %426, 180
>  %428 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %427)
>  %429 = fmul float %428, %421
>  %430 = shl i32 %414, 4
>  %431 = add i32 %430, 184
>  %432 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %431)
>  %433 = fmul float %432, %421
>  %434 = fmul float %425, %97
>  %435 = fmul float %429, %97
>  %436 = fmul float %433, %97
>  %437 = fmul float %412, %434
>  %438 = fmul float %412, %435
>  %439 = fmul float %412, %436
>  %440 = fadd float %.09, %437
>  %441 = fadd float %.010, %438
>  %442 = fadd float %.011, %439
>  %443 = add i32 %380, 1
>  br label %loop119
>
>endloop175:                                       ; preds = %loop119
>  %444 = fmul float %361, %176
>  %445 = fmul float %362, %176
>  %446 = fmul float %363, %176
>  %447 = fmul float %.09, %78
>  %448 = fadd float %447, %444
>  %449 = fmul float %.010, %79
>  %450 = fadd float %449, %445
>  %451 = fmul float %.011, %80
>  %452 = fadd float %451, %446
>  %453 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %454 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %455 = load <16 x i8>, <16 x i8> addrspace(2)* %454, align 16, !invariant.load !0
>  %456 = call float @llvm.SI.load.const(<16 x i8> %455, i32 12)
>  %457 = fsub float %453, %456
>  %458 = call float @llvm.maxnum.f32(float %457, float 0.000000e+00)
>  %459 = call float @llvm.SI.load.const(<16 x i8> %455, i32 28)
>  %460 = call float @llvm.SI.load.const(<16 x i8> %455, i32 12)
>  %461 = fsub float %459, %460
>  %462 = fadd float %461, 0x3F50624DE0000000
>  %463 = fdiv float 1.000000e+00, %462, !fpmath !1
>  %464 = fmul float %458, %463
>  %465 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %466 = load <16 x i8>, <16 x i8> addrspace(2)* %465, align 16, !invariant.load !0
>  %467 = call float @llvm.SI.load.const(<16 x i8> %466, i32 28)
>  %468 = call float @llvm.floor.f32(float %467)
>  %469 = fsub float %467, %468
>  %470 = fmul float %469, 8.000000e+00
>  %471 = call float @llvm.pow.f32(float %464, float %470)
>  %472 = call float @llvm.AMDGPU.clamp.(float %471, float 0.000000e+00, float 1.000000e+00)
>  %473 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %474 = fmul float %473, %472
>  %475 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %476 = load <16 x i8>, <16 x i8> addrspace(2)* %475, align 16, !invariant.load !0
>  %477 = call float @llvm.SI.load.const(<16 x i8> %476, i32 32)
>  %478 = fsub float 1.000000e+00, %474
>  %479 = fmul float %448, %474
>  %480 = fmul float %477, %478
>  %481 = fadd float %479, %480
>  %482 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %483 = load <16 x i8>, <16 x i8> addrspace(2)* %482, align 16, !invariant.load !0
>  %484 = call float @llvm.SI.load.const(<16 x i8> %483, i32 36)
>  %485 = fsub float 1.000000e+00, %474
>  %486 = fmul float %450, %474
>  %487 = fmul float %484, %485
>  %488 = fadd float %486, %487
>  %489 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %490 = load <16 x i8>, <16 x i8> addrspace(2)* %489, align 16, !invariant.load !0
>  %491 = call float @llvm.SI.load.const(<16 x i8> %490, i32 40)
>  %492 = fsub float 1.000000e+00, %474
>  %493 = fmul float %452, %474
>  %494 = fmul float %491, %492
>  %495 = fadd float %493, %494
>  %496 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %497 = bitcast float %5 to i32
>  %498 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %497, 10
>  %499 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %498, float %481, 11
>  %500 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %499, float %488, 12
>  %501 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %500, float %495, 13
>  %502 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %501, float %496, 14
>  %503 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %502, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %503
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[12:15], v5, s[12:15], 0 idxen ; E00C2000 80030C05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen   ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[15:18], v7, s[8:11], 0 idxen  ; E00C2000 80020F07
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	s_buffer_load_dword s20, s[0:3], 0xf                    ; C20A010F
>	s_buffer_load_dword s19, s[0:3], 0x17                   ; C2098117
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s21, s[0:3], 0x10                   ; C20A8110
>	s_buffer_load_dword s22, s[0:3], 0x11                   ; C20B0111
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s23, s[0:3], 0x12                   ; C20B8112
>	s_buffer_load_dword s0, s[0:3], 0x13                    ; C2000113
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v1, s7, v8                                ; 10021007
>	v_mac_f32_e32 v1, s11, v9                               ; 3E02120B
>	v_mac_f32_e32 v1, s15, v10                              ; 3E02140F
>	v_mac_f32_e32 v1, s20, v11                              ; 3E021614
>	v_mul_f32_e32 v7, s19, v1                               ; 100E0213
>	v_mul_f32_e32 v0, s4, v8                                ; 10001004
>	exp 15, 32, 0, 0, 0, v8, v9, v10, v7                    ; F800020F 070A0908
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v7, s5, v8                                ; 100E1005
>	v_mul_f32_e32 v8, s6, v8                                ; 10101006
>	v_mac_f32_e32 v8, s10, v9                               ; 3E10120A
>	v_mac_f32_e32 v8, s14, v10                              ; 3E10140E
>	v_mac_f32_e32 v0, s8, v9                                ; 3E001208
>	v_mac_f32_e32 v7, s9, v9                                ; 3E0E1209
>	v_mac_f32_e32 v8, s18, v11                              ; 3E101612
>	v_mov_b32_e32 v9, s21                                   ; 7E120215
>	v_mac_f32_e32 v9, s22, v8                               ; 3E121016
>	v_add_f32_e64 v9, v9, 0 clamp                           ; D2060809 00010109
>	v_log_f32_e32 v9, v9                                    ; 7E124F09
>	v_mac_f32_e32 v0, s12, v10                              ; 3E00140C
>	v_mac_f32_e32 v7, s13, v10                              ; 3E0E140D
>	v_mad_f32 v10, 2.0, v12, -1.0                           ; D282000A 03CE18F4
>	v_mac_f32_e32 v0, s16, v11                              ; 3E001610
>	v_mac_f32_e32 v7, s17, v11                              ; 3E0E1611
>	v_mad_f32 v11, 2.0, v13, -1.0                           ; D282000B 03CE1AF4
>	v_mad_f32 v12, 2.0, v14, -1.0                           ; D282000C 03CE1CF4
>	v_mad_f32 v13, 0, v11, v10                              ; D282000D 042A1680
>	v_mad_f32 v14, 0, v10, v11                              ; D282000E 042E1480
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mul_legacy_f32_e32 v9, s23, v9                        ; 0E121217
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mad_f32 v17, 0, v4, v3                                ; D2820011 040E0880
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_mac_f32_e32 v14, 0, v12                               ; 3E1C1880
>	v_mac_f32_e32 v12, 0, v11                               ; 3E181680
>	v_mad_f32 v11, 0, v3, v4                                ; D282000B 04120680
>	v_mac_f32_e32 v17, 0, v5                                ; 3E220A80
>	v_mac_f32_e32 v11, 0, v5                                ; 3E160A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mac_f32_e32 v12, 0, v10                               ; 3E181480
>	v_sub_f32_e64 v4, 1.0, s0                               ; D2080004 000000F2
>	v_exp_f32_e32 v9, v9                                    ; 7E124B09
>	v_mac_f32_e32 v4, s0, v9                                ; 3E081200
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v10, v11, v12                             ; 1014190B
>	v_mul_f32_e32 v3, v17, v14                              ; 10061D11
>	v_mul_f32_e32 v9, v5, v13                               ; 10121B05
>	v_mul_f32_e32 v4, v4, v4                                ; 10080904
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v10, v14, v5, -v10                            ; D282000A 842A0B0E
>	v_mad_f32 v3, v13, v11, -v3                             ; D2820003 840E170D
>	v_mad_f32 v9, v12, v17, -v9                             ; D2820009 8426230C
>	v_mad_f32 v10, v6, v10, -v10                            ; D282000A 842A1506
>	exp 15, 33, 0, 0, 0, v15, v16, v4, v0                   ; F800021F 0004100F
>	v_mad_f32 v9, v6, v9, -v9                               ; D2820009 84261306
>	v_mad_f32 v3, v6, v3, -v3                               ; D2820003 840E0706
>	exp 15, 34, 0, 0, 0, v17, v11, v5, v10                  ; F800022F 0A050B11
>	exp 15, 35, 0, 0, 0, v9, v3, v13, v14                   ; F800023F 0E0D0309
>	exp 15, 36, 0, 0, 0, v12, v0, v0, v0                    ; F800024F 0000000C
>	exp 15, 12, 0, 1, 0, v0, v7, v8, v1                     ; F80008CF 01080700
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 520 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v19, v4, 3, 2, [m0]                             ; C84C0B04
>	v_interp_p2_f32 v19, [v19], v5, 3, 2, [m0]                      ; C84D0B05
>	v_interp_p1_f32 v20, v4, 0, 3, [m0]                             ; C8500C04
>	v_interp_p2_f32 v20, [v20], v5, 0, 3, [m0]                      ; C8510C05
>	v_interp_p1_f32 v21, v4, 1, 3, [m0]                             ; C8540D04
>	v_interp_p2_f32 v21, [v21], v5, 1, 3, [m0]                      ; C8550D05
>	v_interp_p1_f32 v7, v4, 2, 3, [m0]                              ; C81C0E04
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	v_interp_p2_f32 v7, [v7], v5, 2, 3, [m0]                        ; C81D0E05
>	v_interp_p1_f32 v8, v4, 3, 3, [m0]                              ; C8200F04
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v8, [v8], v5, 3, 3, [m0]                        ; C8210F05
>	v_interp_p1_f32 v9, v4, 0, 4, [m0]                              ; C8241004
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v9, [v9], v5, 0, 4, [m0]                        ; C8251005
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v22, s8, v1                                       ; 082C0208
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_sub_f32_e32 v26, s9, v0                                       ; 08340009
>	v_mul_f32_e32 v10, v22, v22                                     ; 10142D16
>	v_sub_f32_e32 v27, s12, v2                                      ; 0836040C
>	v_mac_f32_e32 v10, v26, v26                                     ; 3E14351A
>	v_mac_f32_e32 v10, v27, v27                                     ; 3E14371B
>	v_rsq_f32_e32 v28, v10                                          ; 7E385D0A
>	v_mul_f32_e32 v10, v7, v7                                       ; 10140F07
>	v_mac_f32_e32 v10, v8, v8                                       ; 3E141108
>	s_load_dwordx8 s[40:47], s[4:5], 0x30                           ; C0D40530
>	s_load_dwordx4 s[56:59], s[4:5], 0x3c                           ; C09C053C
>	v_mac_f32_e32 v10, v9, v9                                       ; 3E141309
>	v_rsq_f32_e32 v10, v10                                          ; 7E145D0A
>	v_interp_p1_f32 v14, v6, 0, 1, [m0]                             ; C8380406
>	v_interp_p2_f32 v14, [v14], v3, 0, 1, [m0]                      ; C8390403
>	v_interp_p1_f32 v15, v6, 1, 1, [m0]                             ; C83C0506
>	v_interp_p2_f32 v15, [v15], v3, 1, 1, [m0]                      ; C83D0503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s56, s56, s47                                         ; 87382F38
>	v_mul_f32_e32 v23, v10, v7                                      ; 102E0F0A
>	v_mul_f32_e32 v24, v10, v8                                      ; 1030110A
>	v_mul_f32_e32 v25, v10, v9                                      ; 1032130A
>	image_sample v[7:9], v[14:15], s[40:47], s[56:59] dmask:0x7     ; F0800700 01CA070E
>	s_load_dwordx8 s[40:47], s[4:5], 0x50                           ; C0D40550
>	s_load_dwordx4 s[56:59], s[4:5], 0x5c                           ; C09C055C
>	s_load_dwordx8 s[48:55], s[4:5], 0x40                           ; C0D80540
>	s_buffer_load_dword s8, s[0:3], 0x11                            ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                            ; C2048112
>	s_buffer_load_dword s62, s[0:3], 0x14                           ; C21F0114
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s56, s56, s47                                         ; 87382F38
>	image_sample v[10:11], v[14:15], s[40:47], s[56:59] dmask:0x6   ; F0800600 01CA0A0E
>	s_load_dwordx4 s[40:43], s[4:5], 0x4c                           ; C094054C
>	s_buffer_load_dword s63, s[0:3], 0x15                           ; C21F8115
>	s_load_dwordx8 s[28:35], s[4:5], 0x0                            ; C0CE0500
>	s_load_dwordx4 s[36:39], s[4:5], 0xc                            ; C092050C
>	v_mul_f32_e32 v29, v28, v22                                     ; 103A2D1C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s40, s40, s55                                         ; 87283728
>	image_sample v[17:18], v[14:15], s[48:55], s[40:43] dmask:0xa   ; F0800A00 014C110E
>	v_interp_p1_f32 v12, v4, 0, 2, [m0]                             ; C8300804
>	v_interp_p2_f32 v12, [v12], v5, 0, 2, [m0]                      ; C8310805
>	v_interp_p1_f32 v31, v4, 1, 2, [m0]                             ; C87C0904
>	v_interp_p2_f32 v31, [v31], v5, 1, 2, [m0]                      ; C87D0905
>	v_interp_p1_f32 v32, v4, 2, 2, [m0]                             ; C8800A04
>	v_mov_b32_e32 v4, 0x403b800a                                    ; 7E0802FF 403B800A
>	s_buffer_load_dword s40, s[0:3], 0x10                           ; C2140110
>	v_interp_p2_f32 v32, [v32], v5, 2, 2, [m0]                      ; C8810A05
>	v_mad_f32 v5, v4, v23, v1                                       ; D2820005 04062F04
>	v_mul_f32_e32 v16, s8, v5                                       ; 10200A08
>	s_buffer_load_dword s41, s[0:3], 0x16                           ; C2148116
>	s_buffer_load_dword s8, s[0:3], 0x18                            ; C2040118
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s40, v5                                      ; 101C0A28
>	v_mad_f32 v15, v4, v24, v0                                      ; D282000F 04023104
>	v_mul_f32_e32 v5, s9, v5                                        ; 100A0A09
>	v_mac_f32_e32 v14, s62, v15                                     ; 3E1C1E3E
>	v_mad_f32 v4, v4, v25, v2                                       ; D2820004 040A3304
>	s_buffer_load_dword s9, s[0:3], 0x19                            ; C2048119
>	s_buffer_load_dword s40, s[0:3], 0x1a                           ; C214011A
>	v_mac_f32_e32 v5, s41, v15                                      ; 3E0A1E29
>	v_mac_f32_e32 v14, s8, v4                                       ; 3E1C0808
>	s_buffer_load_dword s41, s[0:3], 0x1c                           ; C214811C
>	s_buffer_load_dword s42, s[0:3], 0x1d                           ; C215011D
>	s_buffer_load_dword s8, s[0:3], 0x1e                            ; C204011E
>	v_mac_f32_e32 v16, s63, v15                                     ; 3E201E3F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v16, s9, v4                                       ; 3E200809
>	v_mac_f32_e32 v5, s40, v4                                       ; 3E0A0828
>	v_add_f32_e32 v15, s41, v14                                     ; 061E1C29
>	v_add_f32_e32 v14, s8, v5                                       ; 061C0A08
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	v_add_f32_e32 v16, s42, v16                                     ; 0620202A
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	image_sample_c v5, v[14:17], s[28:35], s[36:39] dmask:0x1       ; F0A00100 0127050E
>	v_add_f32_e32 v16, v17, v17                                     ; 06202311
>	v_mad_f32 v17, 2.0, v17, -1.0                                   ; D2820011 03CE22F4
>	v_mad_f32 v15, 2.0, v18, -1.0                                   ; D282000F 03CE24F4
>	v_mad_f32 v16, v16, v17, -v17                                   ; D2820010 84462310
>	v_mac_f32_e32 v16, v15, v15                                     ; 3E201F0F
>	v_add_f32_e64 v15, v16, 0 clamp                                 ; D206080F 00010110
>	v_add_f32_e32 v14, v18, v18                                     ; 061C2512
>	v_mad_f32 v4, v14, v12, -v12                                    ; D2820004 8432190E
>	v_sub_f32_e32 v15, 0x3f8020c5, v15                              ; 081E1EFF 3F8020C5
>	v_mad_f32 v12, v14, v31, -v31                                   ; D282000C 847E3F0E
>	v_mac_f32_e32 v4, v17, v19                                      ; 3E082711
>	v_sqrt_f32_e32 v15, v15                                         ; 7E1E670F
>	v_mad_f32 v14, v14, v32, -v32                                   ; D282000E 8482410E
>	v_mac_f32_e32 v12, v17, v20                                     ; 3E182911
>	v_mac_f32_e32 v4, v15, v23                                      ; 3E082F0F
>	v_mac_f32_e32 v14, v17, v21                                     ; 3E1C2B11
>	v_mul_f32_e32 v30, v28, v26                                     ; 103C351C
>	v_mac_f32_e32 v12, v15, v24                                     ; 3E18310F
>	v_mul_f32_e32 v31, v29, v4                                      ; 103E091D
>	v_mac_f32_e32 v14, v15, v25                                     ; 3E1C330F
>	v_mac_f32_e32 v31, v30, v12                                     ; 3E3E191E
>	v_mul_f32_e32 v15, v28, v27                                     ; 101E371C
>	v_mac_f32_e32 v31, v15, v14                                     ; 3E3E1D0F
>	v_mul_f32_e32 v32, v4, v31                                      ; 10403F04
>	v_mul_f32_e32 v33, v12, v31                                     ; 10423F0C
>	v_mac_f32_e32 v32, v4, v31                                      ; 3E403F04
>	v_mad_f32 v16, v22, v28, -v32                                   ; D2820010 84823916
>	v_mac_f32_e32 v33, v12, v31                                     ; 3E423F0C
>	v_mul_f32_e32 v16, v23, v16                                     ; 10202117
>	v_mad_f32 v17, v26, v28, -v33                                   ; D2820011 8486391A
>	v_mac_f32_e32 v16, v24, v17                                     ; 3E202318
>	v_mul_f32_e32 v17, v23, v29                                     ; 10223B17
>	v_mac_f32_e32 v17, v24, v30                                     ; 3E223D18
>	v_mac_f32_e32 v17, v25, v15                                     ; 3E221F19
>	v_cubema_f32 v15, v4, v12, v14                                  ; D28E000F 043A1904
>	v_mul_f32_e32 v29, v14, v31                                     ; 103A3F0E
>	v_rcp_f32_e64 v15, |v15|                                        ; D354010F 0000010F
>	v_mac_f32_e32 v29, v14, v31                                     ; 3E3A3F0E
>	v_mad_f32 v18, v27, v28, -v29                                   ; D2820012 8476391B
>	v_mac_f32_e32 v16, v25, v18                                     ; 3E202519
>	v_cubetc_f32 v19, v4, v12, v14                                  ; D28C0013 043A1904
>	v_mov_b32_e32 v18, 0x3fc00000                                   ; 7E2402FF 3FC00000
>	v_cubesc_f32 v21, v4, v12, v14                                  ; D28A0015 043A1904
>	v_mad_f32 v20, v15, v19, v18                                    ; D2820014 044A270F
>	v_mad_f32 v19, v15, v21, v18                                    ; D2820013 044A2B0F
>	v_add_f32_e32 v15, 1.0, v16                                     ; 061E20F2
>	v_sub_f32_e32 v16, 1.0, v17                                     ; 082022F2
>	s_buffer_load_dword s60, s[0:3], 0x4                            ; C21E0104
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	s_buffer_load_dword s61, s[0:3], 0x5                            ; C21E8105
>	v_subrev_f32_e32 v15, v16, v15                                  ; 0A1E1F10
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	v_add_f32_e64 v15, v15, 0 clamp                                 ; D206080F 0001010F
>	s_buffer_load_dword s9, s[0:3], 0xc                             ; C204810C
>	s_buffer_load_dword s28, s[0:3], 0xd                            ; C20E010D
>	s_buffer_load_dword s29, s[0:3], 0xe                            ; C20E810E
>	v_sub_f32_e32 v16, 1.0, v15                                     ; 08201EF2
>	v_mad_f32 v17, -v15, v16, v16                                   ; D2820011 2442210F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v15, s60, v4                                      ; 101E083C
>	v_mad_f32 v15, -s61, v12, -v15                                  ; D282000F A43E183D
>	v_mad_f32 v15, -s8, v14, v15                                    ; D282000F 243E1C08
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                        ; 100A0B05
>	s_load_dwordx8 s[16:23], s[4:5], 0x10                           ; C0C80510
>	s_load_dwordx4 s[24:27], s[4:5], 0x1c                           ; C08C051C
>	v_add_f32_e64 v21, v15, 0 clamp                                 ; D2060815 0001010F
>	v_mul_f32_e32 v15, s9, v5                                       ; 101E0A09
>	v_mul_f32_e32 v16, s28, v5                                      ; 10200A1C
>	v_mul_f32_e32 v5, s29, v5                                       ; 100A0A1D
>	s_load_dwordx4 s[12:15], s[4:5], 0x2c                           ; C086052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x20                           ; C0CE0520
>	v_mul_f32_e32 v5, v10, v5                                       ; 100A0B0A
>	v_mul_f32_e32 v15, v10, v15                                     ; 101E1F0A
>	v_mul_f32_e32 v23, v10, v16                                     ; 102E210A
>	v_mul_f32_e32 v16, v15, v21                                     ; 10202B0F
>	v_mul_f32_e32 v15, v23, v21                                     ; 101E2B17
>	v_mul_f32_e32 v5, v5, v21                                       ; 100A2B05
>	v_mul_f32_e32 v17, v17, v10                                     ; 10221511
>	v_cubeid_f32 v21, v4, v12, v14                                  ; D2880015 043A1904
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s24, s24, s23                                         ; 87181718
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	v_mad_f32 v30, -v22, v28, v32                                   ; D282001E 24823916
>	image_sample v[22:25], v[19:22], s[16:23], s[24:27] dmask:0xf   ; F0800F00 00C41613
>	v_mad_f32 v19, -v26, v28, v33                                   ; D2820013 2486391A
>	v_add_f32_e64 v26, v31, 0 clamp                                 ; D206081A 0001011F
>	v_sub_f32_e32 v26, 1.0, v26                                     ; 083434F2
>	v_log_f32_e32 v26, v26                                          ; 7E344F1A
>	v_mov_b32_e32 v21, 0x40c00000                                   ; 7E2A02FF 40C00000
>	v_mad_f32 v20, -v27, v28, v29                                   ; D2820014 2476391B
>	v_mad_f32 v21, -v11, v21, v21                                   ; D2820015 24562B0B
>	v_mul_legacy_f32_e32 v26, 0x40a00000, v26                       ; 0E3434FF 40A00000
>	v_exp_f32_e32 v26, v26                                          ; 7E344B1A
>	v_max_f32_e32 v11, 0, v11                                       ; 20161680
>	v_mul_f32_e32 v26, v11, v26                                     ; 1034350B
>	v_cubema_f32 v11, v30, v19, v20                                 ; D28E000B 0452271E
>	v_rcp_f32_e64 v11, |v11|                                        ; D354010B 0000010B
>	v_cubetc_f32 v27, v30, v19, v20                                 ; D28C001B 0452271E
>	v_cubesc_f32 v28, v30, v19, v20                                 ; D28A001C 0452271E
>	v_cubeid_f32 v20, v30, v19, v20                                 ; D2880014 0452271E
>	v_mad_f32 v19, v11, v27, v18                                    ; D2820013 044A370B
>	s_and_b32 s12, s12, s35                                         ; 870C230C
>	v_mac_f32_e32 v18, v11, v28                                     ; 3E24390B
>	image_sample_l v[19:21], v[18:21], s[28:35], s[12:15] dmask:0x7 ; F0900700 00671312
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v11, v19, v26                                     ; 10163513
>	v_mul_f32_e32 v18, v20, v26                                     ; 10243514
>	v_mul_f32_e32 v19, v21, v26                                     ; 10263515
>	v_mul_f32_e32 v20, v25, v22                                     ; 10282D19
>	v_mul_f32_e32 v21, v25, v23                                     ; 102A2F19
>	v_mul_f32_e32 v23, 4.0, v10                                     ; 102E14F6
>	v_mul_f32_e32 v22, v25, v24                                     ; 102C3119
>	v_mac_f32_e32 v16, v23, v20                                     ; 3E202917
>	v_mac_f32_e32 v15, v23, v21                                     ; 3E1E2B17
>	v_mac_f32_e32 v5, v23, v22                                      ; 3E0A2D17
>	v_mov_b32_e32 v20, 0xc8                                         ; 7E2802FF 000000C8
>	v_mov_b32_e32 v21, 0                                            ; 7E2A0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v22, vcc, 0xffffffe8, v20                         ; 4A2C28FF FFFFFFE8
>	buffer_load_dword v22, v22, s[0:3], 0 offen                     ; E0301000 80001616
>	v_add_i32_e32 v23, vcc, 0xffffffec, v20                         ; 4A2E28FF FFFFFFEC
>	buffer_load_dword v23, v23, s[0:3], 0 offen                     ; E0301000 80001717
>	v_add_i32_e32 v24, vcc, -16, v20                                ; 4A3028D0
>	buffer_load_dword v24, v24, s[0:3], 0 offen                     ; E0301000 80001818
>	v_add_i32_e32 v27, vcc, -12, v20                                ; 4A3628CC
>	buffer_load_dword v27, v27, s[0:3], 0 offen                     ; E0301000 80001B1B
>	v_add_i32_e32 v28, vcc, -8, v20                                 ; 4A3828C8
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v21, vcc, 1, v21                                  ; 4A2A2A81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v22, v1, v22                                   ; 0A2C2D01
>	v_mul_f32_e32 v25, v22, v22                                     ; 10322D16
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v23, v0, v23                                   ; 0A2E2F00
>	v_mac_f32_e32 v25, v23, v23                                     ; 3E322F17
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v24, v2, v24                                   ; 0A303102
>	v_mac_f32_e32 v25, v24, v24                                     ; 3E323118
>	v_rsq_f32_e32 v26, v25                                          ; 7E345D19
>	v_mul_f32_e32 v22, v26, v22                                     ; 102C2D1A
>	v_mul_f32_e32 v25, v26, v25                                     ; 1032331A
>	v_mul_f32_e32 v23, v26, v23                                     ; 102E2F1A
>	v_mul_f32_e32 v24, v26, v24                                     ; 1030311A
>	v_add_i32_e32 v26, vcc, -4, v20                                 ; 4A3428C4
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v25, v27, v25                                     ; 1032331B
>	buffer_load_dword v27, v20, s[0:3], 0 offen                     ; E0301000 80001B14
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_mul_f32_e32 v22, v4, v22                                      ; 102C2D04
>	v_mac_f32_e32 v22, v12, v23                                     ; 3E2C2F0C
>	v_add_f32_e64 v23, v25, 0 clamp                                 ; D2060817 00010119
>	v_mac_f32_e32 v22, v14, v24                                     ; 3E2C310E
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v24, -v23, v28, v28                                   ; D2820018 24723917
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mul_f32_e32 v24, v10, v24                                     ; 1030310A
>	v_mac_f32_e32 v16, v24, v22                                     ; 3E202D18
>	v_add_i32_e32 v20, vcc, 32, v20                                 ; 4A2828A0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v25, -v23, v26, v26                                   ; D2820019 246A3517
>	v_mad_f32 v23, -v23, v27, v27                                   ; D2820017 246E3717
>	v_mul_f32_e32 v25, v10, v25                                     ; 1032330A
>	v_mul_f32_e32 v23, v10, v23                                     ; 102E2F0A
>	v_mac_f32_e32 v15, v25, v22                                     ; 3E1E2D19
>	v_mac_f32_e32 v5, v23, v22                                      ; 3E0A2D17
>	v_cmp_lt_i32_e32 vcc, 3, v21                                    ; 7D022A83
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v1, v17, v11                                      ; 10021711
>	v_mac_f32_e32 v1, v7, v16                                       ; 3E022107
>	v_mul_f32_e32 v4, v17, v19                                      ; 10082711
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v7, s4                                            ; 7E0E0204
>	v_sub_f32_e32 v7, s5, v7                                        ; 080E0E05
>	v_add_f32_e32 v7, 0x3a83126f, v7                                ; 060E0EFF 3A83126F
>	v_rcp_f32_e32 v7, v7                                            ; 7E0E5507
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mac_f32_e32 v4, v9, v5                                        ; 3E080B09
>	v_mul_f32_e32 v0, v7, v0                                        ; 10000107
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_floor_f32_e32 v5, s5                                          ; 7E0A4805
>	v_sub_f32_e32 v5, s5, v5                                        ; 080A0A05
>	v_mul_f32_e32 v5, 0x41000000, v5                                ; 100A0AFF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	v_mul_legacy_f32_e32 v0, v5, v0                                 ; 0E000105
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v5, v6, 2, 1, [m0]                              ; C8140606
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v5, [v5], v3, 2, 1, [m0]                        ; C8150603
>	v_mul_f32_e32 v5, v0, v5                                        ; 100A0B00
>	v_mul_f32_e32 v2, v17, v18                                      ; 10042511
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v5, s6, s6                                       ; D2820000 20180D05
>	v_mac_f32_e32 v0, v5, v1                                        ; 3E000305
>	v_mac_f32_e32 v2, v8, v15                                       ; 3E041F08
>	v_mad_f32 v1, -v5, s7, s7                                       ; D2820001 201C0F05
>	v_mac_f32_e32 v1, v5, v2                                        ; 3E020505
>	v_mad_f32 v2, -v5, s0, s0                                       ; D2820002 20000105
>	v_mac_f32_e32 v2, v5, v4                                        ; 3E040905
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 72
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1572 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..23]
>DCL TEMP[0..54], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[2] FLT32 {    5.0000,     0.0000,     4.0000,     0.2500}
>IMM[3] FLT32 {    0.0000,    -0.5000,     0.0010,     8.0000}
>IMM[4] INT32 {0, 4, 2, 1}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[4], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[2].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[6], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[2].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[5], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[0].xyzz
> 31: MOV TEMP[6].x, TEMP[4].yyyy
> 32: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[2].xyzz
> 33: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[0].xyzz
> 34: MUL TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz
> 35: ADD TEMP[7].xyz, TEMP[2].xyzz, -TEMP[7].xyzz
> 36: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[1].xyzz
> 37: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 38: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 39: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 40: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 41: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 42: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 43: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 44: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 45: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[7].xxxx
> 46: MOV TEMP[6].y, TEMP[7].xxxx
> 47: MOV TEMP[8].w, IMM[0].wwww
> 48: MAD TEMP[8].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 49: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 50: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 51: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 52: ADD TEMP[1], TEMP[1], CONST[7]
> 53: MAD TEMP[8].x, IMM[1].yyyy, TEMP[4].zzzz, IMM[0].xxxx
> 54: EX2 TEMP[8].x, TEMP[8].xxxx
> 55: MOV TEMP[9].xyz, -CONST[1].xyzx
> 56: ADD TEMP[10].xyz, TEMP[9].xyzz, TEMP[2].xyzz
> 57: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[1].zzzz
> 58: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 59: RSQ TEMP[11].x, TEMP[11].xxxx
> 60: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 61: DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[0].xyzz
> 62: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 63: MOV TEMP[12].xy, TEMP[1].xyyy
> 64: MOV TEMP[12].w, IMM[0].wwww
> 65: MOV TEMP[12].z, TEMP[1].zzzz
> 66: TXP TEMP[1], TEMP[12], SAMP[0], SHADOW2D
> 67: MOV TEMP[12].x, TEMP[1].xxxx
> 68: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 69: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 70: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
> 71: MUL TEMP[1].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 72: MOV TEMP[12].xyz, TEMP[0].xyzz
> 73: TEX TEMP[12], TEMP[12], SAMP[1], CUBE
> 74: MOV TEMP[13], TEMP[12]
> 75: DP3 TEMP[13].x, TEMP[0].xyzz, TEMP[2].xyzz
> 76: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[0].xyzz
> 77: MAD TEMP[13].xyz, IMM[0].xxxx, TEMP[13].xyzz, -TEMP[2].xyzz
> 78: ADD TEMP[14].x, IMM[0].wwww, -TEMP[4].zzzz
> 79: MUL TEMP[14].x, TEMP[14].xxxx, IMM[1].wwww
> 80: MOV TEMP[13].w, TEMP[14].xxxx
> 81: DP3 TEMP[15].x, TEMP[2].xyzz, TEMP[0].xyzz
> 82: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 83: ADD TEMP[15].x, IMM[0].wwww, -TEMP[15].xxxx
> 84: POW TEMP[15].x, TEMP[15].xxxx, IMM[2].xxxx
> 85: MAX TEMP[16].xyz, TEMP[4].zzzz, IMM[2].yyyy
> 86: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[16].xyzz
> 87: MOV TEMP[13].xyz, TEMP[13].xyzz
> 88: MOV TEMP[13].w, TEMP[14].xxxx
> 89: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
> 90: MUL TEMP[13].xyz, TEMP[15].xyzz, TEMP[13].xyzz
> 91: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[12].wwww
> 92: MUL TEMP[4].x, IMM[2].zzzz, TEMP[4].yyyy
> 93: MAD TEMP[4].xyz, TEMP[12].xyzz, TEMP[4].xxxx, TEMP[1].xyzz
> 94: DP3 TEMP[9].x, TEMP[9].xyzz, TEMP[10].xyzz
> 95: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 96: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 97: POW TEMP[9].x, TEMP[9].xxxx, IMM[2].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 99: ADD TEMP[9].x, TEMP[8].xxxx, IMM[0].xxxx
>100: MUL TEMP[9].x, TEMP[9].xxxx, IMM[2].wwww
>101: MUL TEMP[12].x, -TEMP[8].xxxx, IMM[1].zzzz
>102: EX2 TEMP[12].x, TEMP[12].xxxx
>103: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
>104: RCP TEMP[12].x, TEMP[12].xxxx
>105: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[12].xxxx
>106: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>107: DP3 TEMP[9].x, TEMP[0].xyzz, TEMP[10].xyzz
>108: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>109: POW TEMP[9].x, TEMP[9].xxxx, TEMP[8].xxxx
>110: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>111: DP3 TEMP[9].x, TEMP[2].xyzz, TEMP[0].xyzz
>112: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>113: MAX TEMP[9].x, TEMP[11].xxxx, TEMP[9].xxxx
>114: ADD TEMP[9].x, TEMP[9].xxxx, IMM[3].xxxx
>115: RCP TEMP[9].x, TEMP[9].xxxx
>116: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[13].xyzz
>117: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>118: MOV TEMP[7].x, IMM[4].xxxx
>119: BGNLOOP :0
>120:   ISGE TEMP[9].x, TEMP[7].xxxx, IMM[4].yyyy
>121:   UIF TEMP[9].xxxx :0
>122:     BRK
>123:   ENDIF
>124:   UMUL TEMP[10].x, TEMP[7].xxxx, IMM[4].zzzz
>125:   UARL ADDR[0].x, TEMP[10].xxxx
>126:   UARL ADDR[0].x, TEMP[10].xxxx
>127:   ADD TEMP[11].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>128:   DP3 TEMP[12].x, TEMP[11].xyzz, TEMP[11].xyzz
>129:   RSQ TEMP[14].x, TEMP[12].xxxx
>130:   MUL TEMP[15].xyz, TEMP[11].xyzz, TEMP[14].xxxx
>131:   ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[2].xyzz
>132:   MUL TEMP[17].xyz, TEMP[16].xyzz, IMM[1].zzzz
>133:   DP3 TEMP[18].x, TEMP[17].xyzz, TEMP[17].xyzz
>134:   RSQ TEMP[19].x, TEMP[18].xxxx
>135:   MUL TEMP[20].xyz, TEMP[17].xyzz, TEMP[19].xxxx
>136:   DP3 TEMP[21].x, TEMP[15].xyzz, TEMP[0].xyzz
>137:   MOV_SAT TEMP[22].x, TEMP[21].xxxx
>138:   UMAD TEMP[23].x, TEMP[7].xxxx, IMM[4].zzzz, IMM[4].wwww
>139:   MUL TEMP[24].x, TEMP[12].xxxx, TEMP[14].xxxx
>140:   UMUL TEMP[25].x, TEMP[7].xxxx, IMM[4].zzzz
>141:   UARL ADDR[0].x, TEMP[25].xxxx
>142:   MUL TEMP[26].x, TEMP[24].xxxx, CONST[ADDR[0].x+11].wwww
>143:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>144:   ADD TEMP[28].x, IMM[0].wwww, -TEMP[27].xxxx
>145:   UARL ADDR[0].x, TEMP[23].xxxx
>146:   MUL TEMP[29].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[28].xxxx
>147:   MUL TEMP[30].xyz, TEMP[29].xyzz, TEMP[5].yyyy
>148:   MUL TEMP[31].xyz, TEMP[22].xxxx, TEMP[30].xyzz
>149:   ADD TEMP[4].xyz, TEMP[4].xyzz, TEMP[31].xyzz
>150:   DP3 TEMP[32].x, TEMP[15].xyzz, TEMP[20].xyzz
>151:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>152:   ADD TEMP[34].x, IMM[0].wwww, -TEMP[33].xxxx
>153:   POW TEMP[35].x, TEMP[34].xxxx, IMM[2].xxxx
>154:   MUL TEMP[36].xyz, TEMP[31].xyzz, TEMP[35].xxxx
>155:   ADD TEMP[37].x, TEMP[8].xxxx, IMM[0].xxxx
>156:   MUL TEMP[38].x, TEMP[37].xxxx, IMM[2].wwww
>157:   MUL TEMP[39].x, -TEMP[8].xxxx, IMM[1].zzzz
>158:   EX2 TEMP[40].x, TEMP[39].xxxx
>159:   ADD TEMP[41].x, IMM[0].xxxx, -TEMP[40].xxxx
>160:   RCP TEMP[42].x, TEMP[41].xxxx
>161:   MUL TEMP[43].x, TEMP[38].xxxx, TEMP[42].xxxx
>162:   MUL TEMP[44].xyz, TEMP[36].xyzz, TEMP[43].xxxx
>163:   DP3 TEMP[45].x, TEMP[0].xyzz, TEMP[20].xyzz
>164:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>165:   POW TEMP[47].x, TEMP[46].xxxx, TEMP[8].xxxx
>166:   MUL TEMP[48].xyz, TEMP[44].xyzz, TEMP[47].xxxx
>167:   DP3 TEMP[49].x, TEMP[2].xyzz, TEMP[0].xyzz
>168:   MOV_SAT TEMP[50].x, TEMP[49].xxxx
>169:   MAX TEMP[51].x, TEMP[22].xxxx, TEMP[50].xxxx
>170:   ADD TEMP[52].x, TEMP[51].xxxx, IMM[3].xxxx
>171:   RCP TEMP[53].x, TEMP[52].xxxx
>172:   MUL TEMP[54].xyz, TEMP[48].xyzz, TEMP[53].xxxx
>173:   MAD TEMP[1].xyz, TEMP[54].xyzz, TEMP[6].yyyy, TEMP[1].xyzz
>174:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[4].wwww
>175: ENDLOOP :0
>176: MOV TEMP[1].x, CONST[19].wwww
>177: MOV TEMP[1].y, CONST[20].wwww
>178: MOV TEMP[1].z, CONST[21].wwww
>179: ADD TEMP[1].xyz, TEMP[1].xyzz, -IN[0].xyzz
>180: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>181: SQRT TEMP[2].x, TEMP[2].xxxx
>182: MOV TEMP[7].yz, IMM[2].yyyy
>183: MAD TEMP[7].x, TEMP[2].xxxx, CONST[22].zzzz, CONST[22].wwww
>184: MOV TEMP[8].yz, IMM[2].yyyy
>185: MOV TEMP[8].x, IN[1].zzzz
>186: MOV TEMP[9].yz, IMM[2].yyyy
>187: MOV TEMP[10].xy, IN[1].xyyy
>188: MOV TEMP[10].w, IN[1].wwww
>189: TXP TEMP[10].w, TEMP[10], SAMP[3], 2D
>190: MUL TEMP[9].x, TEMP[10].wwww, TEMP[10].wwww
>191: RCP TEMP[2].x, TEMP[2].xxxx
>192: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
>193: DP3 TEMP[0].x, TEMP[1].xyzz, TEMP[0].xyzz
>194: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>195: ADD TEMP[1].xyz, TEMP[7].xyzz, IMM[3].yyyy
>196: MUL TEMP[1].xyz, TEMP[1].xyzz, IMM[0].xxxx
>197: ADD TEMP[1].xyz, IMM[0].wwww, -TEMP[1].xyzz
>198: MOV_SAT TEMP[1].xyz, TEMP[1].xyzz
>199: MUL TEMP[1].xyz, TEMP[9].xyzz, TEMP[1].xyzz
>200: MOV_SAT TEMP[2].xyz, TEMP[8].xyzz
>201: MUL TEMP[1].x, TEMP[1].xyzz, TEMP[2].xyzz
>202: MUL TEMP[1].xyz, CONST[23].xyzz, TEMP[1].xxxx
>203: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[5].yyyy
>204: MAD TEMP[0].xyz, TEMP[0].xxxx, TEMP[1].xyzz, TEMP[4].xyzz
>205: MUL TEMP[1].xyz, TEMP[13].xyzz, TEMP[6].yyyy
>206: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xyzz, TEMP[1].xyzz
>207: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>208: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].yyyy
>209: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>210: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>211: RCP TEMP[2].x, TEMP[2].xxxx
>212: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>213: FRC TEMP[2].x, CONST[1].wwww
>214: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].wwww
>215: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>216: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>217: MUL TEMP[1].x, IN[2].zzzz, TEMP[1].xxxx
>218: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>219: MOV TEMP[0].w, IN[0].wwww
>220: MOV OUT[0], TEMP[0]
>221: END
>radeonsi: Compiling shader 89
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 19, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 27, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 23, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fmul float %151, 2.000000e+00
>  %155 = fmul float %152, 2.000000e+00
>  %156 = fsub float %49, %153
>  %157 = fsub float %50, %154
>  %158 = fsub float %51, %155
>  %159 = fmul float %156, %59
>  %160 = fmul float %157, %60
>  %161 = fadd float %160, %159
>  %162 = fmul float %158, %61
>  %163 = fadd float %161, %162
>  %164 = fadd float %163, 1.000000e+00
>  %165 = fmul float %49, %59
>  %166 = fmul float %50, %60
>  %167 = fadd float %166, %165
>  %168 = fmul float %51, %61
>  %169 = fadd float %167, %168
>  %170 = fsub float 1.000000e+00, %169
>  %171 = call float @llvm.AMDGPU.clamp.(float %170, float 0.000000e+00, float 1.000000e+00)
>  %172 = fsub float %164, %171
>  %173 = call float @llvm.AMDGPU.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %174 = fsub float 1.000000e+00, %173
>  %175 = fmul float %174, %174
>  %176 = fmul float %97, %175
>  %177 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %178 = fmul float %59, 0x4007700140000000
>  %179 = fadd float %178, %177
>  %180 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %181 = fmul float %60, 0x4007700140000000
>  %182 = fadd float %181, %180
>  %183 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %184 = fmul float %61, 0x4007700140000000
>  %185 = fadd float %184, %183
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = call float @llvm.SI.load.const(<16 x i8> %187, i32 64)
>  %189 = fmul float %188, %179
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 68)
>  %191 = fmul float %190, %179
>  %192 = call float @llvm.SI.load.const(<16 x i8> %187, i32 72)
>  %193 = fmul float %192, %179
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = call float @llvm.SI.load.const(<16 x i8> %195, i32 80)
>  %197 = fmul float %196, %182
>  %198 = fadd float %197, %189
>  %199 = call float @llvm.SI.load.const(<16 x i8> %195, i32 84)
>  %200 = fmul float %199, %182
>  %201 = fadd float %200, %191
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = call float @llvm.SI.load.const(<16 x i8> %203, i32 88)
>  %205 = fmul float %204, %182
>  %206 = fadd float %205, %193
>  %207 = call float @llvm.SI.load.const(<16 x i8> %203, i32 96)
>  %208 = fmul float %207, %185
>  %209 = fadd float %208, %198
>  %210 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <16 x i8>, <16 x i8> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = call float @llvm.SI.load.const(<16 x i8> %211, i32 100)
>  %213 = fmul float %212, %185
>  %214 = fadd float %213, %201
>  %215 = call float @llvm.SI.load.const(<16 x i8> %211, i32 104)
>  %216 = fmul float %215, %185
>  %217 = fadd float %216, %206
>  %218 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %219 = load <16 x i8>, <16 x i8> addrspace(2)* %218, align 16, !invariant.load !0
>  %220 = call float @llvm.SI.load.const(<16 x i8> %219, i32 112)
>  %221 = fadd float %209, %220
>  %222 = call float @llvm.SI.load.const(<16 x i8> %219, i32 116)
>  %223 = fadd float %214, %222
>  %224 = call float @llvm.SI.load.const(<16 x i8> %219, i32 120)
>  %225 = fadd float %217, %224
>  %226 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %227 = load <16 x i8>, <16 x i8> addrspace(2)* %226, align 16, !invariant.load !0
>  %228 = call float @llvm.SI.load.const(<16 x i8> %227, i32 16)
>  %229 = call float @llvm.SI.load.const(<16 x i8> %227, i32 20)
>  %230 = call float @llvm.SI.load.const(<16 x i8> %227, i32 24)
>  %231 = fmul float %228, %140
>  %232 = fsub float -0.000000e+00, %231
>  %233 = fmul float %229, %142
>  %234 = fsub float %232, %233
>  %235 = fmul float %230, %144
>  %236 = fsub float %234, %235
>  %237 = call float @llvm.AMDGPU.clamp.(float %236, float 0.000000e+00, float 1.000000e+00)
>  %238 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %239 = load <8 x i32>, <8 x i32> addrspace(2)* %238, align 32, !invariant.load !0
>  %240 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %241 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %240, i64 0, i64 3, !amdgpu.uniform !0
>  %242 = load <4 x i32>, <4 x i32> addrspace(2)* %241, align 16, !invariant.load !0
>  %243 = extractelement <8 x i32> %239, i32 7
>  %244 = extractelement <4 x i32> %242, i32 0
>  %245 = and i32 %244, %243
>  %246 = insertelement <4 x i32> %242, i32 %245, i32 0
>  %247 = bitcast float %225 to i32
>  %248 = bitcast float %221 to i32
>  %249 = bitcast float %223 to i32
>  %250 = insertelement <4 x i32> undef, i32 %247, i32 0
>  %251 = insertelement <4 x i32> %250, i32 %248, i32 1
>  %252 = insertelement <4 x i32> %251, i32 %249, i32 2
>  %253 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %252, <8 x i32> %239, <4 x i32> %246, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %254 = extractelement <4 x float> %253, i32 0
>  %255 = fmul float %254, %254
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 48)
>  %259 = fmul float %258, %255
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 52)
>  %261 = fmul float %260, %255
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 56)
>  %263 = fmul float %262, %255
>  %264 = fmul float %259, %97
>  %265 = fmul float %261, %97
>  %266 = fmul float %263, %97
>  %267 = fmul float %237, %264
>  %268 = fmul float %237, %265
>  %269 = fmul float %237, %266
>  %270 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %271 = load <8 x i32>, <8 x i32> addrspace(2)* %270, align 32, !invariant.load !0
>  %272 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %273 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %272, i64 0, i64 7, !amdgpu.uniform !0
>  %274 = load <4 x i32>, <4 x i32> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = extractelement <8 x i32> %271, i32 7
>  %276 = extractelement <4 x i32> %274, i32 0
>  %277 = and i32 %276, %275
>  %278 = insertelement <4 x i32> %274, i32 %277, i32 0
>  %279 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %280 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %281 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %282 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %283 = call float @llvm.fabs.f32(float %281)
>  %284 = fdiv float 1.000000e+00, %283, !fpmath !1
>  %285 = fmul float %279, %284
>  %286 = fadd float %285, 1.500000e+00
>  %287 = fmul float %280, %284
>  %288 = fadd float %287, 1.500000e+00
>  %289 = bitcast float %288 to i32
>  %290 = bitcast float %286 to i32
>  %291 = bitcast float %282 to i32
>  %292 = insertelement <4 x i32> undef, i32 %289, i32 0
>  %293 = insertelement <4 x i32> %292, i32 %290, i32 1
>  %294 = insertelement <4 x i32> %293, i32 %291, i32 2
>  %295 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %294, <8 x i32> %271, <4 x i32> %278, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %296 = extractelement <4 x float> %295, i32 0
>  %297 = extractelement <4 x float> %295, i32 1
>  %298 = extractelement <4 x float> %295, i32 2
>  %299 = extractelement <4 x float> %295, i32 3
>  %300 = fmul float %140, %49
>  %301 = fmul float %142, %50
>  %302 = fadd float %301, %300
>  %303 = fmul float %144, %51
>  %304 = fadd float %302, %303
>  %305 = fmul float %304, %140
>  %306 = fmul float %304, %142
>  %307 = fmul float %304, %144
>  %308 = fmul float %305, 2.000000e+00
>  %309 = fsub float %308, %49
>  %310 = fmul float %306, 2.000000e+00
>  %311 = fsub float %310, %50
>  %312 = fmul float %307, 2.000000e+00
>  %313 = fsub float %312, %51
>  %314 = fsub float 1.000000e+00, %98
>  %315 = fmul float %314, 6.000000e+00
>  %316 = fmul float %49, %140
>  %317 = fmul float %50, %142
>  %318 = fadd float %317, %316
>  %319 = fmul float %51, %144
>  %320 = fadd float %318, %319
>  %321 = call float @llvm.AMDGPU.clamp.(float %320, float 0.000000e+00, float 1.000000e+00)
>  %322 = fsub float 1.000000e+00, %321
>  %323 = call float @llvm.pow.f32(float %322, float 5.000000e+00)
>  %324 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %325 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %326 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %327 = fmul float %323, %324
>  %328 = fmul float %323, %325
>  %329 = fmul float %323, %326
>  %330 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %331 = load <8 x i32>, <8 x i32> addrspace(2)* %330, align 32, !invariant.load !0
>  %332 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %333 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %332, i64 0, i64 11, !amdgpu.uniform !0
>  %334 = load <4 x i32>, <4 x i32> addrspace(2)* %333, align 16, !invariant.load !0
>  %335 = extractelement <8 x i32> %331, i32 7
>  %336 = extractelement <4 x i32> %334, i32 0
>  %337 = and i32 %336, %335
>  %338 = insertelement <4 x i32> %334, i32 %337, i32 0
>  %339 = call float @llvm.amdgcn.cubetc(float %309, float %311, float %313)
>  %340 = call float @llvm.amdgcn.cubesc(float %309, float %311, float %313)
>  %341 = call float @llvm.amdgcn.cubema(float %309, float %311, float %313)
>  %342 = call float @llvm.amdgcn.cubeid(float %309, float %311, float %313)
>  %343 = call float @llvm.fabs.f32(float %341)
>  %344 = fdiv float 1.000000e+00, %343, !fpmath !1
>  %345 = fmul float %339, %344
>  %346 = fadd float %345, 1.500000e+00
>  %347 = fmul float %340, %344
>  %348 = fadd float %347, 1.500000e+00
>  %349 = bitcast float %348 to i32
>  %350 = bitcast float %346 to i32
>  %351 = bitcast float %342 to i32
>  %352 = bitcast float %315 to i32
>  %353 = insertelement <4 x i32> undef, i32 %349, i32 0
>  %354 = insertelement <4 x i32> %353, i32 %350, i32 1
>  %355 = insertelement <4 x i32> %354, i32 %351, i32 2
>  %356 = insertelement <4 x i32> %355, i32 %352, i32 3
>  %357 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %356, <8 x i32> %331, <4 x i32> %338, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %358 = extractelement <4 x float> %357, i32 0
>  %359 = extractelement <4 x float> %357, i32 1
>  %360 = extractelement <4 x float> %357, i32 2
>  %361 = fmul float %327, %358
>  %362 = fmul float %328, %359
>  %363 = fmul float %329, %360
>  %364 = fmul float %296, %299
>  %365 = fmul float %297, %299
>  %366 = fmul float %298, %299
>  %367 = fmul float %97, 4.000000e+00
>  %368 = fmul float %364, %367
>  %369 = fadd float %368, %267
>  %370 = fmul float %365, %367
>  %371 = fadd float %370, %268
>  %372 = fmul float %366, %367
>  %373 = fadd float %372, %269
>  %374 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %375 = load <16 x i8>, <16 x i8> addrspace(2)* %374, align 16
>  br label %loop119
>
>loop119:                                          ; preds = %endif123, %main_body
>  %376 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %377 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %378 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %379 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %380 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %.011 = phi float [ %373, %main_body ], [ %442, %endif123 ]
>  %.010 = phi float [ %371, %main_body ], [ %441, %endif123 ]
>  %.09 = phi float [ %369, %main_body ], [ %440, %endif123 ]
>  %381 = icmp sgt i32 %376, 3
>  br i1 %381, label %endloop175, label %endif123
>
>endif123:                                         ; preds = %loop119
>  %382 = shl i32 %377, 5
>  %383 = shl i32 %377, 5
>  %384 = add i32 %383, 176
>  %385 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %384)
>  %386 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %387 = fsub float %385, %386
>  %388 = shl i32 %377, 5
>  %389 = add i32 %388, 180
>  %390 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %389)
>  %391 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %392 = fsub float %390, %391
>  %393 = add i32 %382, 184
>  %394 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %393)
>  %395 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %396 = fsub float %394, %395
>  %397 = fmul float %387, %387
>  %398 = fmul float %392, %392
>  %399 = fadd float %398, %397
>  %400 = fmul float %396, %396
>  %401 = fadd float %399, %400
>  %402 = call float @llvm.sqrt.f32(float %401)
>  %403 = fdiv float 1.000000e+00, %402, !fpmath !1
>  %404 = fmul float %387, %403
>  %405 = fmul float %392, %403
>  %406 = fmul float %396, %403
>  %407 = fmul float %404, %140
>  %408 = fmul float %405, %142
>  %409 = fadd float %408, %407
>  %410 = fmul float %406, %144
>  %411 = fadd float %409, %410
>  %412 = call float @llvm.AMDGPU.clamp.(float %411, float 0.000000e+00, float 1.000000e+00)
>  %413 = shl i32 %378, 1
>  %414 = or i32 %413, 1
>  %415 = fmul float %401, %403
>  %416 = shl i32 %379, 5
>  %417 = add i32 %416, 188
>  %418 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %417)
>  %419 = fmul float %415, %418
>  %420 = call float @llvm.AMDGPU.clamp.(float %419, float 0.000000e+00, float 1.000000e+00)
>  %421 = fsub float 1.000000e+00, %420
>  %422 = shl i32 %414, 4
>  %423 = add i32 %422, 176
>  %424 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %423)
>  %425 = fmul float %424, %421
>  %426 = shl i32 %414, 4
>  %427 = add i32 %426, 180
>  %428 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %427)
>  %429 = fmul float %428, %421
>  %430 = shl i32 %414, 4
>  %431 = add i32 %430, 184
>  %432 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %431)
>  %433 = fmul float %432, %421
>  %434 = fmul float %425, %97
>  %435 = fmul float %429, %97
>  %436 = fmul float %433, %97
>  %437 = fmul float %412, %434
>  %438 = fmul float %412, %435
>  %439 = fmul float %412, %436
>  %440 = fadd float %.09, %437
>  %441 = fadd float %.010, %438
>  %442 = fadd float %.011, %439
>  %443 = add i32 %380, 1
>  br label %loop119
>
>endloop175:                                       ; preds = %loop119
>  %444 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %445 = load <16 x i8>, <16 x i8> addrspace(2)* %444, align 16, !invariant.load !0
>  %446 = call float @llvm.SI.load.const(<16 x i8> %445, i32 316)
>  %447 = call float @llvm.SI.load.const(<16 x i8> %445, i32 332)
>  %448 = call float @llvm.SI.load.const(<16 x i8> %445, i32 348)
>  %449 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %450 = fsub float %446, %449
>  %451 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %452 = fsub float %447, %451
>  %453 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %454 = fsub float %448, %453
>  %455 = fmul float %450, %450
>  %456 = fmul float %452, %452
>  %457 = fadd float %456, %455
>  %458 = fmul float %454, %454
>  %459 = fadd float %457, %458
>  %460 = call float @llvm.sqrt.f32(float %459)
>  %461 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %462 = load <16 x i8>, <16 x i8> addrspace(2)* %461, align 16, !invariant.load !0
>  %463 = call float @llvm.SI.load.const(<16 x i8> %462, i32 360)
>  %464 = call float @llvm.SI.load.const(<16 x i8> %462, i32 364)
>  %465 = fmul float %460, %463
>  %466 = fadd float %465, %464
>  %467 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %468 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %469 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %470 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %471 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %472 = load <8 x i32>, <8 x i32> addrspace(2)* %471, align 32, !invariant.load !0
>  %473 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %474 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %473, i64 0, i64 15, !amdgpu.uniform !0
>  %475 = load <4 x i32>, <4 x i32> addrspace(2)* %474, align 16, !invariant.load !0
>  %476 = extractelement <8 x i32> %472, i32 7
>  %477 = extractelement <4 x i32> %475, i32 0
>  %478 = and i32 %477, %476
>  %479 = insertelement <4 x i32> %475, i32 %478, i32 0
>  %480 = fdiv float %468, %470, !fpmath !1
>  %481 = fdiv float %469, %470, !fpmath !1
>  %482 = bitcast float %480 to i32
>  %483 = bitcast float %481 to i32
>  %484 = insertelement <2 x i32> undef, i32 %482, i32 0
>  %485 = insertelement <2 x i32> %484, i32 %483, i32 1
>  %486 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %485, <8 x i32> %472, <4 x i32> %479, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %487 = extractelement <4 x float> %486, i32 3
>  %488 = fmul float %487, %487
>  %489 = fdiv float 1.000000e+00, %460, !fpmath !1
>  %490 = fmul float %450, %489
>  %491 = fmul float %452, %489
>  %492 = fmul float %454, %489
>  %493 = fmul float %490, %140
>  %494 = fmul float %491, %142
>  %495 = fadd float %494, %493
>  %496 = fmul float %492, %144
>  %497 = fadd float %495, %496
>  %498 = call float @llvm.AMDGPU.clamp.(float %497, float 0.000000e+00, float 1.000000e+00)
>  %499 = fadd float %466, -5.000000e-01
>  %500 = fmul float %499, 2.000000e+00
>  %501 = fsub float 1.000000e+00, %500
>  %502 = call float @llvm.AMDGPU.clamp.(float %501, float 0.000000e+00, float 1.000000e+00)
>  %503 = fmul float %488, %502
>  %504 = call float @llvm.AMDGPU.clamp.(float %467, float 0.000000e+00, float 1.000000e+00)
>  %505 = fmul float %503, %504
>  %506 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %507 = load <16 x i8>, <16 x i8> addrspace(2)* %506, align 16, !invariant.load !0
>  %508 = call float @llvm.SI.load.const(<16 x i8> %507, i32 368)
>  %509 = fmul float %508, %505
>  %510 = call float @llvm.SI.load.const(<16 x i8> %507, i32 372)
>  %511 = fmul float %510, %505
>  %512 = call float @llvm.SI.load.const(<16 x i8> %507, i32 376)
>  %513 = fmul float %512, %505
>  %514 = fmul float %509, %97
>  %515 = fmul float %511, %97
>  %516 = fmul float %513, %97
>  %517 = fmul float %498, %514
>  %518 = fadd float %517, %.09
>  %519 = fmul float %498, %515
>  %520 = fadd float %519, %.010
>  %521 = fmul float %498, %516
>  %522 = fadd float %521, %.011
>  %523 = fmul float %361, %176
>  %524 = fmul float %362, %176
>  %525 = fmul float %363, %176
>  %526 = fmul float %518, %78
>  %527 = fadd float %526, %523
>  %528 = fmul float %520, %79
>  %529 = fadd float %528, %524
>  %530 = fmul float %522, %80
>  %531 = fadd float %530, %525
>  %532 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %533 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %534 = load <16 x i8>, <16 x i8> addrspace(2)* %533, align 16, !invariant.load !0
>  %535 = call float @llvm.SI.load.const(<16 x i8> %534, i32 12)
>  %536 = fsub float %532, %535
>  %537 = call float @llvm.maxnum.f32(float %536, float 0.000000e+00)
>  %538 = call float @llvm.SI.load.const(<16 x i8> %534, i32 28)
>  %539 = call float @llvm.SI.load.const(<16 x i8> %534, i32 12)
>  %540 = fsub float %538, %539
>  %541 = fadd float %540, 0x3F50624DE0000000
>  %542 = fdiv float 1.000000e+00, %541, !fpmath !1
>  %543 = fmul float %537, %542
>  %544 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %545 = load <16 x i8>, <16 x i8> addrspace(2)* %544, align 16, !invariant.load !0
>  %546 = call float @llvm.SI.load.const(<16 x i8> %545, i32 28)
>  %547 = call float @llvm.floor.f32(float %546)
>  %548 = fsub float %546, %547
>  %549 = fmul float %548, 8.000000e+00
>  %550 = call float @llvm.pow.f32(float %543, float %549)
>  %551 = call float @llvm.AMDGPU.clamp.(float %550, float 0.000000e+00, float 1.000000e+00)
>  %552 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %553 = fmul float %552, %551
>  %554 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %555 = load <16 x i8>, <16 x i8> addrspace(2)* %554, align 16, !invariant.load !0
>  %556 = call float @llvm.SI.load.const(<16 x i8> %555, i32 32)
>  %557 = fsub float 1.000000e+00, %553
>  %558 = fmul float %527, %553
>  %559 = fmul float %556, %557
>  %560 = fadd float %558, %559
>  %561 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %562 = load <16 x i8>, <16 x i8> addrspace(2)* %561, align 16, !invariant.load !0
>  %563 = call float @llvm.SI.load.const(<16 x i8> %562, i32 36)
>  %564 = fsub float 1.000000e+00, %553
>  %565 = fmul float %529, %553
>  %566 = fmul float %563, %564
>  %567 = fadd float %565, %566
>  %568 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %569 = load <16 x i8>, <16 x i8> addrspace(2)* %568, align 16, !invariant.load !0
>  %570 = call float @llvm.SI.load.const(<16 x i8> %569, i32 40)
>  %571 = fsub float 1.000000e+00, %553
>  %572 = fmul float %531, %553
>  %573 = fmul float %570, %571
>  %574 = fadd float %572, %573
>  %575 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %576 = bitcast float %5 to i32
>  %577 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %576, 10
>  %578 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %577, float %560, 11
>  %579 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %578, float %567, 12
>  %580 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %579, float %574, 13
>  %581 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %580, float %575, 14
>  %582 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %581, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %582
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[12:15], v5, s[12:15], 0 idxen ; E00C2000 80030C05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen   ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[15:18], v7, s[8:11], 0 idxen  ; E00C2000 80020F07
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	s_buffer_load_dword s24, s[0:3], 0x17                   ; C20C0117
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s28, s[0:3], 0x1b                   ; C20E011B
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s26, s[0:3], 0x19                   ; C20D0119
>	s_buffer_load_dword s32, s[0:3], 0x1f                   ; C210011F
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s30, s[0:3], 0x1d                   ; C20F011D
>	s_buffer_load_dword s34, s[0:3], 0x23                   ; C2110123
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s25, s[0:3], 0x18                   ; C20C8118
>	s_buffer_load_dword s27, s[0:3], 0x1a                   ; C20D811A
>	s_buffer_load_dword s31, s[0:3], 0x1e                   ; C20F811E
>	s_buffer_load_dword s29, s[0:3], 0x1c                   ; C20E811C
>	s_buffer_load_dword s20, s[0:3], 0x10                   ; C20A0110
>	s_buffer_load_dword s21, s[0:3], 0x11                   ; C20A8111
>	s_buffer_load_dword s22, s[0:3], 0x12                   ; C20B0112
>	s_buffer_load_dword s23, s[0:3], 0x13                   ; C20B8113
>	s_buffer_load_dword s33, s[0:3], 0x20                   ; C2108120
>	s_buffer_load_dword s35, s[0:3], 0x24                   ; C2118124
>	s_buffer_load_dword s36, s[0:3], 0x25                   ; C2120125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v0, s4, v8                                ; 10001004
>	v_mad_f32 v1, 2.0, v12, -1.0                            ; D2820001 03CE18F4
>	v_mad_f32 v12, 2.0, v14, -1.0                           ; D282000C 03CE1CF4
>	v_mul_f32_e32 v14, s7, v8                               ; 101C1007
>	v_mac_f32_e32 v14, s11, v9                              ; 3E1C120B
>	v_mac_f32_e32 v14, s15, v10                             ; 3E1C140F
>	v_mac_f32_e32 v14, s19, v11                             ; 3E1C1613
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v17, s24, v14                             ; 10221C18
>	v_mad_f32 v7, 2.0, v13, -1.0                            ; D2820007 03CE1AF4
>	v_mul_f32_e32 v13, s5, v8                               ; 101A1005
>	exp 15, 32, 0, 0, 0, v8, v9, v10, v17                   ; F800020F 110A0908
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v17, s6, v8                               ; 10221006
>	v_subrev_f32_e32 v8, s28, v8                            ; 0A10101C
>	v_mac_f32_e32 v0, s8, v9                                ; 3E001208
>	v_mac_f32_e32 v13, s9, v9                               ; 3E1A1209
>	v_mac_f32_e32 v17, s10, v9                              ; 3E22120A
>	v_subrev_f32_e32 v9, s32, v9                            ; 0A121220
>	v_mul_f32_e32 v19, s26, v8                              ; 1026101A
>	v_mac_f32_e32 v0, s12, v10                              ; 3E00140C
>	v_mac_f32_e32 v13, s13, v10                             ; 3E1A140D
>	v_mac_f32_e32 v17, s14, v10                             ; 3E22140E
>	v_subrev_f32_e32 v10, s34, v10                          ; 0A141422
>	v_mac_f32_e32 v19, s30, v9                              ; 3E26121E
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v19, s4, v10                              ; 3E261404
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s0, s[0:3], 0x27                    ; C2000127
>	v_mad_f32 v18, 0, v1, v7                                ; D2820012 041E0280
>	v_mac_f32_e32 v0, s16, v11                              ; 3E001610
>	v_mac_f32_e32 v13, s17, v11                             ; 3E1A1611
>	v_mac_f32_e32 v17, s18, v11                             ; 3E221612
>	v_mad_f32 v11, 0, v7, v1                                ; D282000B 04060E80
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_mac_f32_e32 v18, 0, v12                               ; 3E241880
>	v_mac_f32_e32 v12, 0, v7                                ; 3E180E80
>	v_mul_f32_e32 v7, s25, v8                               ; 100E1019
>	v_mul_f32_e32 v8, s27, v8                               ; 1010101B
>	v_mac_f32_e32 v8, s31, v9                               ; 3E10121F
>	v_mac_f32_e32 v7, s29, v9                               ; 3E0E121D
>	v_mac_f32_e32 v8, s5, v10                               ; 3E101405
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s0                                    ; 7E120200
>	v_mac_f32_e32 v12, 0, v1                                ; 3E180280
>	v_mac_f32_e32 v7, s33, v10                              ; 3E0E1421
>	v_mul_f32_e32 v1, 0.5, v8                               ; 100210F0
>	v_mad_f32 v7, s35, v7, v1                               ; D2820007 04060E23
>	v_mac_f32_e32 v1, s36, v19                              ; 3E022624
>	v_mac_f32_e32 v9, s4, v8                                ; 3E121004
>	exp 15, 33, 0, 0, 0, v7, v1, v9, v8                     ; F800021F 08090107
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mov_b32_e32 v8, s20                                   ; 7E100214
>	v_mac_f32_e32 v8, s21, v17                              ; 3E102215
>	v_add_f32_e64 v8, v8, 0 clamp                           ; D2060808 00010108
>	v_log_f32_e32 v8, v8                                    ; 7E104F08
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	v_mad_f32 v1, 0, v4, v3                                 ; D2820001 040E0880
>	v_mad_f32 v7, 0, v3, v4                                 ; D2820007 04120680
>	v_mac_f32_e32 v1, 0, v5                                 ; 3E020A80
>	v_mac_f32_e32 v7, 0, v5                                 ; 3E0E0A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_legacy_f32_e32 v3, s22, v8                        ; 0E061016
>	v_exp_f32_e32 v3, v3                                    ; 7E064B03
>	v_sub_f32_e64 v4, 1.0, s23                              ; D2080004 00002EF2
>	v_mac_f32_e32 v4, s23, v3                               ; 3E080617
>	v_mul_f32_e32 v3, v7, v12                               ; 10061907
>	v_mul_f32_e32 v8, v5, v11                               ; 10101705
>	v_mul_f32_e32 v9, v1, v18                               ; 10122501
>	v_mul_f32_e32 v4, v4, v4                                ; 10080904
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v3, v18, v5, -v3                              ; D2820003 840E0B12
>	v_mad_f32 v8, v12, v1, -v8                              ; D2820008 8422030C
>	v_mad_f32 v9, v11, v7, -v9                              ; D2820009 84260F0B
>	v_mad_f32 v3, v6, v3, -v3                               ; D2820003 840E0706
>	exp 15, 34, 0, 0, 0, v15, v16, v4, v0                   ; F800022F 0004100F
>	v_mad_f32 v8, v6, v8, -v8                               ; D2820008 84221106
>	v_mad_f32 v6, v6, v9, -v9                               ; D2820006 84261306
>	exp 15, 35, 0, 0, 0, v1, v7, v5, v3                     ; F800023F 03050701
>	exp 15, 36, 0, 0, 0, v8, v6, v11, v18                   ; F800024F 120B0608
>	exp 15, 37, 0, 0, 0, v12, v0, v0, v0                    ; F800025F 0000000C
>	exp 15, 12, 0, 1, 0, v0, v13, v17, v14                  ; F80008CF 0E110D00
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 672 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v19, v4, 3, 3, [m0]                             ; C84C0F04
>	v_interp_p2_f32 v19, [v19], v5, 3, 3, [m0]                      ; C84D0F05
>	v_interp_p1_f32 v20, v4, 0, 4, [m0]                             ; C8501004
>	v_interp_p2_f32 v20, [v20], v5, 0, 4, [m0]                      ; C8511005
>	v_interp_p1_f32 v21, v4, 1, 4, [m0]                             ; C8541104
>	v_interp_p2_f32 v21, [v21], v5, 1, 4, [m0]                      ; C8551105
>	v_interp_p1_f32 v1, v4, 2, 4, [m0]                              ; C8041204
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	v_interp_p2_f32 v1, [v1], v5, 2, 4, [m0]                        ; C8051205
>	v_interp_p1_f32 v2, v4, 3, 4, [m0]                              ; C8081304
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v2, [v2], v5, 3, 4, [m0]                        ; C8091305
>	v_interp_p1_f32 v7, v4, 0, 5, [m0]                              ; C81C1404
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v7, [v7], v5, 0, 5, [m0]                        ; C81D1405
>	v_interp_p1_f32 v10, v6, 0, 0, [m0]                             ; C8280006
>	v_interp_p2_f32 v10, [v10], v3, 0, 0, [m0]                      ; C8290003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v25, s8, v10                                      ; 08321408
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v11, v6, 2, 0, [m0]                             ; C82C0206
>	v_interp_p2_f32 v11, [v11], v3, 2, 0, [m0]                      ; C82D0203
>	v_sub_f32_e32 v26, s9, v0                                       ; 08340009
>	v_mul_f32_e32 v8, v25, v25                                      ; 10103319
>	v_sub_f32_e32 v27, s12, v11                                     ; 0836160C
>	v_mac_f32_e32 v8, v26, v26                                      ; 3E10351A
>	v_mac_f32_e32 v8, v27, v27                                      ; 3E10371B
>	v_rsq_f32_e32 v28, v8                                           ; 7E385D08
>	v_mul_f32_e32 v8, v1, v1                                        ; 10100301
>	v_mac_f32_e32 v8, v2, v2                                        ; 3E100502
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                           ; C092054C
>	s_load_dwordx8 s[28:35], s[4:5], 0x40                           ; C0CE0540
>	s_load_dwordx8 s[12:19], s[4:5], 0x50                           ; C0C60550
>	s_load_dwordx4 s[44:47], s[4:5], 0x5c                           ; C096055C
>	s_load_dwordx4 s[40:43], s[4:5], 0x6c                           ; C094056C
>	s_load_dwordx8 s[20:27], s[4:5], 0x60                           ; C0CA0560
>	v_mac_f32_e32 v8, v7, v7                                        ; 3E100F07
>	v_rsq_f32_e32 v8, v8                                            ; 7E105D08
>	v_interp_p1_f32 v14, v6, 0, 2, [m0]                             ; C8380806
>	v_interp_p2_f32 v14, [v14], v3, 0, 2, [m0]                      ; C8390803
>	v_interp_p1_f32 v15, v6, 1, 2, [m0]                             ; C83C0906
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s40, s40, s27                                         ; 87281B28
>	s_and_b32 s44, s44, s19                                         ; 872C132C
>	v_interp_p2_f32 v15, [v15], v3, 1, 2, [m0]                      ; C83D0903
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	v_mul_f32_e32 v29, v8, v1                                       ; 103A0308
>	v_mul_f32_e32 v30, v8, v2                                       ; 103C0508
>	v_mul_f32_e32 v31, v8, v7                                       ; 103E0F08
>	image_sample v[7:9], v[14:15], s[28:35], s[36:39] dmask:0x7     ; F0800700 0127070E
>	image_sample v[1:2], v[14:15], s[20:27], s[40:43] dmask:0x6     ; F0800600 0145010E
>	image_sample v[17:18], v[14:15], s[12:19], s[44:47] dmask:0xa   ; F0800A00 0163110E
>	v_interp_p1_f32 v12, v4, 0, 3, [m0]                             ; C8300C04
>	s_buffer_load_dword s8, s[0:3], 0x11                            ; C2040111
>	v_interp_p2_f32 v12, [v12], v5, 0, 3, [m0]                      ; C8310C05
>	v_interp_p1_f32 v22, v4, 1, 3, [m0]                             ; C8580D04
>	v_interp_p2_f32 v22, [v22], v5, 1, 3, [m0]                      ; C8590D05
>	v_interp_p1_f32 v4, v4, 2, 3, [m0]                              ; C8100E04
>	v_interp_p2_f32 v4, [v4], v5, 2, 3, [m0]                        ; C8110E05
>	v_mov_b32_e32 v5, 0x403b800a                                    ; 7E0A02FF 403B800A
>	v_mad_f32 v14, v5, v29, v10                                     ; D282000E 042A3B05
>	s_buffer_load_dword s12, s[0:3], 0x10                           ; C2060110
>	s_buffer_load_dword s9, s[0:3], 0x12                            ; C2048112
>	s_buffer_load_dword s51, s[0:3], 0x15                           ; C2198115
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v16, s8, v14                                      ; 10201C08
>	s_buffer_load_dword s8, s[0:3], 0x19                            ; C2040119
>	v_mad_f32 v23, v5, v30, v0                                      ; D2820017 04023D05
>	s_buffer_load_dword s50, s[0:3], 0x14                           ; C2190114
>	s_buffer_load_dword s52, s[0:3], 0x16                           ; C21A0116
>	v_mul_f32_e32 v15, s12, v14                                     ; 101E1C0C
>	v_mul_f32_e32 v14, s9, v14                                      ; 101C1C09
>	s_buffer_load_dword s53, s[0:3], 0x18                           ; C21A8118
>	v_mac_f32_e32 v16, s51, v23                                     ; 3E202E33
>	v_mad_f32 v5, v5, v31, v11                                      ; D2820005 042E3F05
>	s_buffer_load_dword s9, s[0:3], 0x1a                            ; C204811A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v16, s8, v5                                       ; 3E200A08
>	s_buffer_load_dword s13, s[0:3], 0x1d                           ; C206811D
>	s_buffer_load_dword s12, s[0:3], 0x1c                           ; C206011C
>	s_buffer_load_dword s8, s[0:3], 0x1e                            ; C204011E
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                            ; C0CA0500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                            ; C08E050C
>	v_mac_f32_e32 v15, s50, v23                                     ; 3E1E2E32
>	v_mac_f32_e32 v14, s52, v23                                     ; 3E1C2E34
>	v_mac_f32_e32 v14, s9, v5                                       ; 3E1C0A09
>	v_mac_f32_e32 v15, s53, v5                                      ; 3E1E0A35
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v14, s8, v14                                      ; 061C1C08
>	v_add_f32_e32 v15, s12, v15                                     ; 061E1E0C
>	v_add_f32_e32 v16, s13, v16                                     ; 0620200D
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	image_sample_c v34, v[14:17], s[20:27], s[28:31] dmask:0x1      ; F0A00100 00E5220E
>	v_add_f32_e32 v14, v18, v18                                     ; 061C2512
>	v_add_f32_e32 v16, v17, v17                                     ; 06202311
>	v_mad_f32 v17, 2.0, v17, -1.0                                   ; D2820011 03CE22F4
>	v_mad_f32 v12, v14, v12, -v12                                   ; D282000C 8432190E
>	v_mad_f32 v5, v14, v22, -v22                                    ; D2820005 845A2D0E
>	v_mad_f32 v4, v14, v4, -v4                                      ; D2820004 8412090E
>	v_mad_f32 v15, 2.0, v18, -1.0                                   ; D282000F 03CE24F4
>	v_mad_f32 v14, v16, v17, -v17                                   ; D282000E 84462310
>	v_mac_f32_e32 v14, v15, v15                                     ; 3E1C1F0F
>	v_add_f32_e64 v14, v14, 0 clamp                                 ; D206080E 0001010E
>	v_sub_f32_e32 v14, 0x3f8020c5, v14                              ; 081C1CFF 3F8020C5
>	v_mac_f32_e32 v12, v17, v19                                     ; 3E182711
>	v_sqrt_f32_e32 v14, v14                                         ; 7E1C670E
>	v_mac_f32_e32 v5, v17, v20                                      ; 3E0A2911
>	v_mul_f32_e32 v32, v28, v25                                     ; 1040331C
>	v_mac_f32_e32 v12, v14, v29                                     ; 3E183B0E
>	v_mac_f32_e32 v4, v17, v21                                      ; 3E082B11
>	v_mul_f32_e32 v33, v28, v26                                     ; 1042351C
>	v_mac_f32_e32 v5, v14, v30                                      ; 3E0A3D0E
>	v_mul_f32_e32 v20, v32, v12                                     ; 10281920
>	v_mac_f32_e32 v4, v14, v31                                      ; 3E083F0E
>	v_mac_f32_e32 v20, v33, v5                                      ; 3E280B21
>	v_mul_f32_e32 v35, v28, v27                                     ; 1046371C
>	v_mac_f32_e32 v20, v35, v4                                      ; 3E280923
>	v_cubema_f32 v14, v12, v5, v4                                   ; D28E000E 04120B0C
>	v_mul_f32_e32 v36, v12, v20                                     ; 1048290C
>	v_mul_f32_e32 v37, v5, v20                                      ; 104A2905
>	v_mul_f32_e32 v38, v4, v20                                      ; 104C2904
>	v_rcp_f32_e64 v15, |v14|                                        ; D354010F 0000010E
>	v_mac_f32_e32 v36, v12, v20                                     ; 3E48290C
>	v_mac_f32_e32 v37, v5, v20                                      ; 3E4A2905
>	v_mac_f32_e32 v38, v4, v20                                      ; 3E4C2904
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_sub_f32_e32 v20, 1.0, v20                                     ; 082828F2
>	v_log_f32_e32 v20, v20                                          ; 7E284F14
>	v_cubetc_f32 v16, v12, v5, v4                                   ; D28C0010 04120B0C
>	v_mov_b32_e32 v14, 0x3fc00000                                   ; 7E1C02FF 3FC00000
>	v_cubesc_f32 v17, v12, v5, v4                                   ; D28A0011 04120B0C
>	v_mad_f32 v19, v15, v16, v14                                    ; D2820013 043A210F
>	v_mad_f32 v18, v15, v17, v14                                    ; D2820012 043A230F
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                           ; C0C60510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                           ; C090051C
>	v_mad_f32 v15, -v25, v28, v36                                   ; D282000F 24923919
>	v_mad_f32 v16, -v26, v28, v37                                   ; D2820010 2496391A
>	v_mad_f32 v17, -v27, v28, v38                                   ; D2820011 249A391B
>	v_cubema_f32 v21, v15, v16, v17                                 ; D28E0015 0446210F
>	s_load_dwordx4 s[28:31], s[4:5], 0x2c                           ; C08E052C
>	s_load_dwordx8 s[20:27], s[4:5], 0x20                           ; C0CA0520
>	v_rcp_f32_e64 v21, |v21|                                        ; D3540115 00000115
>	v_mul_legacy_f32_e32 v20, 0x40a00000, v20                       ; 0E2828FF 40A00000
>	v_cubetc_f32 v22, v15, v16, v17                                 ; D28C0016 0446210F
>	v_cubesc_f32 v23, v15, v16, v17                                 ; D28A0017 0446210F
>	v_cubeid_f32 v16, v15, v16, v17                                 ; D2880010 0446210F
>	v_mov_b32_e32 v17, 0x40c00000                                   ; 7E2202FF 40C00000
>	v_mad_f32 v17, -v2, v17, v17                                    ; D2820011 24462302
>	s_buffer_load_dword s48, s[0:3], 0x4                            ; C2180104
>	v_exp_f32_e32 v20, v20                                          ; 7E284B14
>	v_max_f32_e32 v2, 0, v2                                         ; 20040480
>	v_mul_f32_e32 v2, v2, v20                                       ; 10042902
>	s_buffer_load_dword s49, s[0:3], 0x5                            ; C2188105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v20, v12, v5, v4                                   ; D2880014 04120B0C
>	v_mad_f32 v15, v21, v22, v14                                    ; D282000F 043A2D15
>	v_mac_f32_e32 v14, v21, v23                                     ; 3E1C2F15
>	image_sample v[18:21], v[18:21], s[12:19], s[32:35] dmask:0xf   ; F0800F00 01031212
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	s_buffer_load_dword s9, s[0:3], 0xc                             ; C204810C
>	s_buffer_load_dword s12, s[0:3], 0xd                            ; C206010D
>	s_buffer_load_dword s13, s[0:3], 0xe                            ; C206810E
>	image_sample_l v[22:24], v[14:17], s[20:27], s[28:31] dmask:0x7 ; F0900700 00E5160E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v16, v22, v2                                      ; 10200516
>	v_mul_f32_e32 v15, v23, v2                                      ; 101E0517
>	v_mul_f32_e32 v14, v24, v2                                      ; 101C0518
>	v_mad_f32 v2, v25, v28, -v36                                    ; D2820002 84923919
>	v_mul_f32_e32 v22, v21, v18                                     ; 102C2515
>	v_mul_f32_e32 v19, v21, v19                                     ; 10262715
>	v_mul_f32_e32 v20, v21, v20                                     ; 10282915
>	v_mul_f32_e32 v21, v29, v2                                      ; 102A051D
>	v_mul_f32_e32 v2, s48, v12                                      ; 10041830
>	v_mad_f32 v17, v26, v28, -v37                                   ; D2820011 8496391A
>	v_mad_f32 v2, -s49, v5, -v2                                     ; D2820002 A40A0A31
>	v_mac_f32_e32 v21, v30, v17                                     ; 3E2A231E
>	v_mad_f32 v18, v27, v28, -v38                                   ; D2820012 849A391B
>	v_mul_f32_e32 v17, v34, v34                                     ; 10224522
>	v_mul_f32_e32 v23, v29, v32                                     ; 102E411D
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v2, -s8, v4, v2                                       ; D2820002 240A0808
>	v_mul_f32_e32 v24, s12, v17                                     ; 1030220C
>	v_mac_f32_e32 v21, v31, v18                                     ; 3E2A251F
>	v_mul_f32_e32 v18, s9, v17                                      ; 10242209
>	v_mul_f32_e32 v17, s13, v17                                     ; 1022220D
>	v_mac_f32_e32 v23, v30, v33                                     ; 3E2E431E
>	v_add_f32_e64 v2, v2, 0 clamp                                   ; D2060802 00010102
>	v_mul_f32_e32 v18, v1, v18                                      ; 10242501
>	v_mul_f32_e32 v24, v1, v24                                      ; 10303101
>	v_mul_f32_e32 v25, v1, v17                                      ; 10322301
>	v_mul_f32_e32 v17, v24, v2                                      ; 10220518
>	v_mul_f32_e32 v18, v18, v2                                      ; 10240512
>	v_mul_f32_e32 v24, 4.0, v1                                      ; 103002F6
>	v_mul_f32_e32 v2, v25, v2                                       ; 10040519
>	v_mac_f32_e32 v23, v31, v35                                     ; 3E2E471F
>	v_mac_f32_e32 v2, v24, v20                                      ; 3E042918
>	v_sub_f32_e32 v20, 1.0, v23                                     ; 08282EF2
>	v_mac_f32_e32 v17, v24, v19                                     ; 3E222718
>	v_add_f32_e32 v19, 1.0, v21                                     ; 06262AF2
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_subrev_f32_e32 v19, v20, v19                                  ; 0A262714
>	v_add_f32_e64 v19, v19, 0 clamp                                 ; D2060813 00010113
>	v_sub_f32_e32 v20, 1.0, v19                                     ; 082826F2
>	v_mad_f32 v19, -v19, v20, v20                                   ; D2820013 24522913
>	v_mac_f32_e32 v18, v24, v22                                     ; 3E242D18
>	v_mul_f32_e32 v19, v19, v1                                      ; 10260313
>	v_mov_b32_e32 v20, 0xc8                                         ; 7E2802FF 000000C8
>	v_mov_b32_e32 v21, 0                                            ; 7E2A0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v22, vcc, 0xffffffe8, v20                         ; 4A2C28FF FFFFFFE8
>	buffer_load_dword v22, v22, s[0:3], 0 offen                     ; E0301000 80001616
>	v_add_i32_e32 v23, vcc, 0xffffffec, v20                         ; 4A2E28FF FFFFFFEC
>	buffer_load_dword v23, v23, s[0:3], 0 offen                     ; E0301000 80001717
>	v_add_i32_e32 v24, vcc, -16, v20                                ; 4A3028D0
>	buffer_load_dword v24, v24, s[0:3], 0 offen                     ; E0301000 80001818
>	v_add_i32_e32 v27, vcc, -12, v20                                ; 4A3628CC
>	buffer_load_dword v27, v27, s[0:3], 0 offen                     ; E0301000 80001B1B
>	v_add_i32_e32 v28, vcc, -8, v20                                 ; 4A3828C8
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v21, vcc, 1, v21                                  ; 4A2A2A81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v22, v10, v22                                  ; 0A2C2D0A
>	v_mul_f32_e32 v25, v22, v22                                     ; 10322D16
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v23, v0, v23                                   ; 0A2E2F00
>	v_mac_f32_e32 v25, v23, v23                                     ; 3E322F17
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v24, v11, v24                                  ; 0A30310B
>	v_mac_f32_e32 v25, v24, v24                                     ; 3E323118
>	v_rsq_f32_e32 v26, v25                                          ; 7E345D19
>	v_mul_f32_e32 v22, v26, v22                                     ; 102C2D1A
>	v_mul_f32_e32 v25, v26, v25                                     ; 1032331A
>	v_mul_f32_e32 v23, v26, v23                                     ; 102E2F1A
>	v_mul_f32_e32 v24, v26, v24                                     ; 1030311A
>	v_add_i32_e32 v26, vcc, -4, v20                                 ; 4A3428C4
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v25, v27, v25                                     ; 1032331B
>	buffer_load_dword v27, v20, s[0:3], 0 offen                     ; E0301000 80001B14
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_mul_f32_e32 v22, v12, v22                                     ; 102C2D0C
>	v_mac_f32_e32 v22, v5, v23                                      ; 3E2C2F05
>	v_add_f32_e64 v23, v25, 0 clamp                                 ; D2060817 00010119
>	v_mac_f32_e32 v22, v4, v24                                      ; 3E2C3104
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v24, -v23, v28, v28                                   ; D2820018 24723917
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mul_f32_e32 v24, v1, v24                                      ; 10303101
>	v_mac_f32_e32 v18, v24, v22                                     ; 3E242D18
>	v_add_i32_e32 v20, vcc, 32, v20                                 ; 4A2828A0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v25, -v23, v26, v26                                   ; D2820019 246A3517
>	v_mad_f32 v23, -v23, v27, v27                                   ; D2820017 246E3717
>	v_mul_f32_e32 v25, v1, v25                                      ; 10323301
>	v_mul_f32_e32 v23, v1, v23                                      ; 102E2F01
>	v_mac_f32_e32 v17, v25, v22                                     ; 3E222D19
>	v_mac_f32_e32 v2, v23, v22                                      ; 3E042D17
>	v_cmp_lt_i32_e32 vcc, 3, v21                                    ; 7D022A83
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s8, s[0:3], 0x4f                            ; C204014F
>	s_buffer_load_dword s9, s[0:3], 0x53                            ; C2048153
>	s_buffer_load_dword s12, s[0:3], 0x57                           ; C2060157
>	s_buffer_load_dword s14, s[0:3], 0x5b                           ; C207015B
>	s_buffer_load_dword s13, s[0:3], 0x5a                           ; C206815A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v20, s8, v10                                      ; 08281408
>	v_sub_f32_e32 v21, s9, v0                                       ; 082A0009
>	v_mul_f32_e32 v23, v20, v20                                     ; 102E2914
>	v_sub_f32_e32 v22, s12, v11                                     ; 082C160C
>	v_mac_f32_e32 v23, v21, v21                                     ; 3E2E2B15
>	v_mac_f32_e32 v23, v22, v22                                     ; 3E2E2D16
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v25, v6, 2, 1, [m0]                             ; C8640606
>	v_sqrt_f32_e32 v10, v23                                         ; 7E146717
>	v_mov_b32_e32 v24, s14                                          ; 7E30020E
>	v_mac_f32_e32 v24, s13, v10                                     ; 3E30140D
>	v_interp_p2_f32 v25, [v25], v3, 2, 1, [m0]                      ; C8650603
>	v_interp_p1_f32 v10, v6, 0, 1, [m0]                             ; C8280406
>	v_interp_p2_f32 v10, [v10], v3, 0, 1, [m0]                      ; C8290403
>	v_interp_p1_f32 v11, v6, 1, 1, [m0]                             ; C82C0506
>	v_interp_p2_f32 v11, [v11], v3, 1, 1, [m0]                      ; C82D0503
>	v_interp_p1_f32 v26, v6, 3, 1, [m0]                             ; C8680706
>	v_interp_p2_f32 v26, [v26], v3, 3, 1, [m0]                      ; C8690703
>	v_mov_b32_e32 v27, 0x6f800000                                   ; 7E3602FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v27, |v26|                                ; D002026A 0002351B
>	v_mov_b32_e32 v27, 0x2f800000                                   ; 7E3602FF 2F800000
>	v_cndmask_b32_e32 v27, 1.0, v27, vcc                            ; 003636F2
>	v_mul_f32_e32 v26, v27, v26                                     ; 1034351B
>	v_rcp_f32_e32 v26, v26                                          ; 7E34551A
>	s_load_dwordx8 s[12:19], s[4:5], 0x30                           ; C0C60530
>	s_load_dwordx4 s[20:23], s[4:5], 0x3c                           ; C08A053C
>	v_mul_f32_e32 v10, v26, v10                                     ; 1014151A
>	v_mul_f32_e32 v11, v26, v11                                     ; 1016171A
>	v_mul_f32_e32 v10, v10, v27                                     ; 1014370A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_mul_f32_e32 v11, v11, v27                                     ; 1016370B
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	image_sample v10, v[10:11], s[12:19], s[20:23] dmask:0x8        ; F0800800 00A30A0A
>	v_rsq_f32_e32 v11, v23                                          ; 7E165D17
>	v_add_f32_e32 v23, -0.5, v24                                    ; 062E30F1
>	s_buffer_load_dword s4, s[0:3], 0x5c                            ; C202015C
>	v_mad_f32 v23, v23, -2.0, 1.0                                   ; D2820017 03C9EB17
>	v_mul_f32_e32 v20, v11, v20                                     ; 1028290B
>	v_mul_f32_e32 v12, v12, v20                                     ; 1018290C
>	v_mul_f32_e32 v20, v11, v21                                     ; 10282B0B
>	s_buffer_load_dword s5, s[0:3], 0x5d                            ; C202815D
>	v_mac_f32_e32 v12, v5, v20                                      ; 3E182905
>	v_mul_f32_e32 v5, v11, v22                                      ; 100A2D0B
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v10, v10, v10                                     ; 1014150A
>	v_add_f32_e64 v23, v23, 0 clamp                                 ; D2060817 00010117
>	s_buffer_load_dword s6, s[0:3], 0x5e                            ; C203015E
>	v_mac_f32_e32 v12, v4, v5                                       ; 3E180B04
>	v_mul_f32_e32 v4, v23, v10                                      ; 10081517
>	v_add_f32_e64 v5, v25, 0 clamp                                  ; D2060805 00010119
>	v_mul_f32_e32 v4, v5, v4                                        ; 10080905
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v5, s4, v4                                        ; 100A0804
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mul_f32_e32 v10, s5, v4                                       ; 10140805
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v4, s6, v4                                        ; 10080806
>	v_mul_f32_e32 v5, v1, v5                                        ; 100A0B01
>	v_mul_f32_e32 v10, v1, v10                                      ; 10141501
>	v_mul_f32_e32 v1, v1, v4                                        ; 10020901
>	v_add_f32_e64 v4, v12, 0 clamp                                  ; D2060804 0001010C
>	v_mac_f32_e32 v18, v5, v4                                       ; 3E240905
>	v_mac_f32_e32 v2, v1, v4                                        ; 3E040901
>	v_mul_f32_e32 v1, v19, v16                                      ; 10022113
>	v_mac_f32_e32 v1, v7, v18                                       ; 3E022507
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v7, s4                                            ; 7E0E0204
>	v_sub_f32_e32 v7, s5, v7                                        ; 080E0E05
>	v_add_f32_e32 v7, 0x3a83126f, v7                                ; 060E0EFF 3A83126F
>	v_rcp_f32_e32 v7, v7                                            ; 7E0E5507
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v5, v19, v14                                      ; 100A1D13
>	v_mul_f32_e32 v0, v7, v0                                        ; 10000107
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v5, v9, v2                                        ; 3E0A0509
>	v_floor_f32_e32 v2, s5                                          ; 7E044805
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_mul_f32_e32 v2, 0x41000000, v2                                ; 100404FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	v_mul_legacy_f32_e32 v0, v2, v0                                 ; 0E000102
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	v_interp_p1_f32 v2, v6, 2, 2, [m0]                              ; C8080A06
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v2, [v2], v3, 2, 2, [m0]                        ; C8090A03
>	v_mul_f32_e32 v7, v0, v2                                        ; 100E0500
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v7, s6, s6                                       ; D2820000 20180D07
>	v_mac_f32_e32 v17, v10, v4                                      ; 3E22090A
>	v_mul_f32_e32 v4, v19, v15                                      ; 10081F13
>	v_mac_f32_e32 v0, v7, v1                                        ; 3E000307
>	v_mac_f32_e32 v4, v8, v17                                       ; 3E082308
>	v_mad_f32 v1, -v7, s7, s7                                       ; D2820001 201C0F07
>	v_mac_f32_e32 v1, v7, v4                                        ; 3E020907
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_mad_f32 v2, -v7, s0, s0                                       ; D2820002 20000107
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mac_f32_e32 v2, v7, v5                                        ; 3E040B07
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1864 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3].x, GENERIC[3], PERSPECTIVE
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[5], PERSPECTIVE, CENTROID
>DCL IN[6].x, GENERIC[6], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SAMP[8]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL SVIEW[8], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..23]
>DCL CONST[30]
>DCL TEMP[0..65], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.0000,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,    32.0000,     0.0010}
>IMM[5] INT32 {0, 4, 2, 1}
>IMM[6] FLT32 {    0.3000,     0.5900,     0.1100,     8.0000}
>  0: MOV TEMP[0].x, IN[4].wwww
>  1: MOV TEMP[0].yz, IN[5].yxyy
>  2: MOV TEMP[1].xy, IN[5].zwzz
>  3: MOV TEMP[1].z, IN[6].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[4], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[2].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[6], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[2].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[5], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[4].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[6].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[6].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[6].xyzz
> 31: DP3 TEMP[7].x, TEMP[6].xyzz, TEMP[2].xyzz
> 32: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[6].xyzz
> 33: MAD TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz, -TEMP[2].xyzz
> 34: MOV TEMP[8].xy, IN[2].zwww
> 35: TEX TEMP[8], TEMP[8], SAMP[7], 2D
> 36: MOV TEMP[9], TEMP[8]
> 37: ADD TEMP[9].xyz, TEMP[8].zyyy, IMM[1].xxxx
> 38: MUL TEMP[9].xyz, TEMP[9].xyzz, IMM[0].xxxx
> 39: MUL TEMP[10].x, TEMP[8].wwww, IMM[0].xxxx
> 40: MOV TEMP[9].w, TEMP[10].xxxx
> 41: DP2 TEMP[11].x, TEMP[9].xyyy, TEMP[9].xyyy
> 42: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 43: ADD TEMP[11].x, IMM[0].wwww, -TEMP[11].xxxx
> 44: SQRT TEMP[11].x, TEMP[11].xxxx
> 45: MUL TEMP[12].xyz, IN[4].xyzz, TEMP[9].xxxx
> 46: MAD TEMP[12].xyz, TEMP[0].xyzz, TEMP[9].yyyy, TEMP[12].xyzz
> 47: MAD TEMP[11].xyz, TEMP[1].xyzz, TEMP[11].xxxx, TEMP[12].xyzz
> 48: MOV TEMP[9].xyz, TEMP[11].xyzx
> 49: DP3 TEMP[12].x, TEMP[7].xyzz, TEMP[11].xyzz
> 50: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 51: ADD TEMP[12].x, TEMP[10].xxxx, -TEMP[12].xxxx
> 52: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 53: POW TEMP[12].x, TEMP[12].xxxx, IMM[1].yyyy
> 54: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 55: MUL TEMP[13].x, IMM[1].zzzz, TEMP[4].zzzz
> 56: ADD TEMP[13].x, TEMP[12].xxxx, -TEMP[13].xxxx
> 57: LRP TEMP[14].x, TEMP[4].zzzz, IMM[1].wwww, IMM[0].wwww
> 58: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[14].xxxx
> 59: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 60: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[13].xxxx
> 61: MUL TEMP[10].x, TEMP[10].xxxx, IMM[2].xxxx
> 62: MOV TEMP[9].w, TEMP[10].xxxx
> 63: MUL TEMP[0].x, TEMP[8].xxxx, TEMP[4].yyyy
> 64: DP3 TEMP[7].x, -TEMP[7].xyzz, TEMP[1].xyzz
> 65: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 66: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 67: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 68: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 69: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 70: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 71: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 72: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 73: MUL TEMP[7].x, TEMP[12].xxxx, TEMP[7].xxxx
> 74: MOV TEMP[0].y, TEMP[7].xxxx
> 75: MOV TEMP[8].w, IMM[0].wwww
> 76: MAD TEMP[8].xyz, IMM[2].yyyy, TEMP[1].xyzz, IN[0].xyzz
> 77: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 78: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 79: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 80: ADD TEMP[1], TEMP[1], CONST[7]
> 81: MAD TEMP[8].x, IMM[2].zzzz, TEMP[4].zzzz, IMM[0].xxxx
> 82: EX2 TEMP[8].x, TEMP[8].xxxx
> 83: MOV TEMP[12].xyz, -CONST[1].xyzx
> 84: ADD TEMP[13].xyz, TEMP[12].xyzz, TEMP[2].xyzz
> 85: MUL TEMP[13].xyz, TEMP[13].xyzz, IMM[2].wwww
> 86: DP3 TEMP[14].x, TEMP[13].xyzz, TEMP[13].xyzz
> 87: RSQ TEMP[14].x, TEMP[14].xxxx
> 88: MUL TEMP[13].xyz, TEMP[13].xyzz, TEMP[14].xxxx
> 89: DP3 TEMP[14].x, TEMP[12].xyzz, TEMP[6].xyzz
> 90: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 91: MOV TEMP[15].xy, TEMP[1].xyyy
> 92: MOV TEMP[15].w, IMM[0].wwww
> 93: MOV TEMP[15].z, TEMP[1].zzzz
> 94: TXP TEMP[1], TEMP[15], SAMP[0], SHADOW2D
> 95: MOV TEMP[15].x, TEMP[1].xxxx
> 96: DP3 TEMP[15].x, TEMP[12].xyzz, TEMP[11].xyzz
> 97: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 98: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[15].xxxx
> 99: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>100: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
>101: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
>102: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>103: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>104: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[10].xxxx
>105: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
>106: MUL TEMP[1].xyz, TEMP[14].xxxx, TEMP[1].xyzz
>107: MOV TEMP[10].xyz, TEMP[6].xyzz
>108: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
>109: MOV TEMP[15], TEMP[10]
>110: DP3 TEMP[15].x, TEMP[6].xyzz, TEMP[2].xyzz
>111: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[6].xyzz
>112: MAD TEMP[15].xyz, IMM[0].xxxx, TEMP[15].xyzz, -TEMP[2].xyzz
>113: ADD TEMP[16].x, IMM[0].wwww, -TEMP[4].zzzz
>114: MUL TEMP[16].x, TEMP[16].xxxx, IMM[3].xxxx
>115: MOV TEMP[15].w, TEMP[16].xxxx
>116: DP3 TEMP[17].x, TEMP[2].xyzz, TEMP[6].xyzz
>117: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>118: ADD TEMP[17].x, IMM[0].wwww, -TEMP[17].xxxx
>119: POW TEMP[17].x, TEMP[17].xxxx, IMM[3].yyyy
>120: MAX TEMP[4].xyz, TEMP[4].zzzz, IMM[3].zzzz
>121: MUL TEMP[4].xyz, TEMP[17].xxxx, TEMP[4].xyzz
>122: MOV TEMP[15].xyz, TEMP[15].xyzz
>123: MOV TEMP[15].w, TEMP[16].xxxx
>124: TXL TEMP[15], TEMP[15], SAMP[2], CUBE
>125: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[15].xyzz
>126: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
>127: MUL TEMP[15].x, IMM[3].wwww, TEMP[0].xxxx
>128: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[15].xxxx, TEMP[1].xyzz
>129: DP3 TEMP[12].x, TEMP[12].xyzz, TEMP[13].xyzz
>130: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>131: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
>132: POW TEMP[12].x, TEMP[12].xxxx, IMM[3].yyyy
>133: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>134: ADD TEMP[12].x, TEMP[8].xxxx, IMM[0].xxxx
>135: MUL TEMP[12].x, TEMP[12].xxxx, IMM[4].xxxx
>136: MUL TEMP[15].x, -TEMP[8].xxxx, IMM[2].wwww
>137: EX2 TEMP[15].x, TEMP[15].xxxx
>138: ADD TEMP[15].x, IMM[0].xxxx, -TEMP[15].xxxx
>139: RCP TEMP[15].x, TEMP[15].xxxx
>140: MUL TEMP[12].x, TEMP[12].xxxx, TEMP[15].xxxx
>141: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>142: DP3 TEMP[12].x, TEMP[6].xyzz, TEMP[13].xyzz
>143: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>144: POW TEMP[12].x, TEMP[12].xxxx, TEMP[8].xxxx
>145: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx
>146: DP3 TEMP[12].x, TEMP[2].xyzz, TEMP[6].xyzz
>147: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>148: MAX TEMP[12].x, TEMP[14].xxxx, TEMP[12].xxxx
>149: ADD TEMP[12].x, TEMP[12].xxxx, IMM[4].yyyy
>150: RCP TEMP[12].x, TEMP[12].xxxx
>151: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[12].xxxx, TEMP[4].xyzz
>152: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>153: MOV TEMP[7].x, IMM[5].xxxx
>154: BGNLOOP :0
>155:   ISGE TEMP[12].x, TEMP[7].xxxx, IMM[5].yyyy
>156:   UIF TEMP[12].xxxx :0
>157:     BRK
>158:   ENDIF
>159:   UMUL TEMP[13].x, TEMP[7].xxxx, IMM[5].zzzz
>160:   UARL ADDR[0].x, TEMP[13].xxxx
>161:   UARL ADDR[0].x, TEMP[13].xxxx
>162:   ADD TEMP[14].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>163:   DP3 TEMP[15].x, TEMP[14].xyzz, TEMP[14].xyzz
>164:   RSQ TEMP[16].x, TEMP[15].xxxx
>165:   MUL TEMP[17].xyz, TEMP[14].xyzz, TEMP[16].xxxx
>166:   ADD TEMP[18].xyz, TEMP[17].xyzz, TEMP[2].xyzz
>167:   MUL TEMP[19].xyz, TEMP[18].xyzz, IMM[2].wwww
>168:   DP3 TEMP[20].x, TEMP[19].xyzz, TEMP[19].xyzz
>169:   RSQ TEMP[21].x, TEMP[20].xxxx
>170:   MUL TEMP[22].xyz, TEMP[19].xyzz, TEMP[21].xxxx
>171:   DP3 TEMP[23].x, TEMP[17].xyzz, TEMP[6].xyzz
>172:   MOV_SAT TEMP[24].x, TEMP[23].xxxx
>173:   DP3 TEMP[25].x, TEMP[17].xyzz, TEMP[11].xyzz
>174:   MOV_SAT TEMP[26].x, TEMP[25].xxxx
>175:   ADD TEMP[27].x, TEMP[9].wwww, -TEMP[26].xxxx
>176:   MOV_SAT TEMP[28].x, TEMP[27].xxxx
>177:   MUL TEMP[29].x, TEMP[28].xxxx, TEMP[28].xxxx
>178:   UMAD TEMP[30].x, TEMP[7].xxxx, IMM[5].zzzz, IMM[5].wwww
>179:   MUL TEMP[31].x, TEMP[15].xxxx, TEMP[16].xxxx
>180:   UMUL TEMP[32].x, TEMP[7].xxxx, IMM[5].zzzz
>181:   UARL ADDR[0].x, TEMP[32].xxxx
>182:   MUL TEMP[33].x, TEMP[31].xxxx, CONST[ADDR[0].x+11].wwww
>183:   MOV_SAT TEMP[34].x, TEMP[33].xxxx
>184:   ADD TEMP[35].x, IMM[0].wwww, -TEMP[34].xxxx
>185:   UARL ADDR[0].x, TEMP[30].xxxx
>186:   MUL TEMP[36].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[35].xxxx
>187:   MUL TEMP[37].x, TEMP[29].xxxx, TEMP[29].xxxx
>188:   MOV_SAT TEMP[38].x, TEMP[37].xxxx
>189:   LRP TEMP[39].x, TEMP[16].xxxx, IMM[0].wwww, TEMP[38].xxxx
>190:   MUL TEMP[40].xyz, TEMP[36].xyzz, TEMP[39].xxxx
>191:   MUL TEMP[41].xyz, TEMP[40].xyzz, TEMP[5].yyyy
>192:   MUL TEMP[42].xyz, TEMP[24].xxxx, TEMP[41].xyzz
>193:   ADD TEMP[10].xyz, TEMP[10].xyzz, TEMP[42].xyzz
>194:   DP3 TEMP[43].x, TEMP[17].xyzz, TEMP[22].xyzz
>195:   MOV_SAT TEMP[44].x, TEMP[43].xxxx
>196:   ADD TEMP[45].x, IMM[0].wwww, -TEMP[44].xxxx
>197:   POW TEMP[46].x, TEMP[45].xxxx, IMM[3].yyyy
>198:   MUL TEMP[47].xyz, TEMP[42].xyzz, TEMP[46].xxxx
>199:   ADD TEMP[48].x, TEMP[8].xxxx, IMM[0].xxxx
>200:   MUL TEMP[49].x, TEMP[48].xxxx, IMM[4].xxxx
>201:   MUL TEMP[50].x, -TEMP[8].xxxx, IMM[2].wwww
>202:   EX2 TEMP[51].x, TEMP[50].xxxx
>203:   ADD TEMP[52].x, IMM[0].xxxx, -TEMP[51].xxxx
>204:   RCP TEMP[53].x, TEMP[52].xxxx
>205:   MUL TEMP[54].x, TEMP[49].xxxx, TEMP[53].xxxx
>206:   MUL TEMP[55].xyz, TEMP[47].xyzz, TEMP[54].xxxx
>207:   DP3 TEMP[56].x, TEMP[6].xyzz, TEMP[22].xyzz
>208:   MOV_SAT TEMP[57].x, TEMP[56].xxxx
>209:   POW TEMP[58].x, TEMP[57].xxxx, TEMP[8].xxxx
>210:   MUL TEMP[59].xyz, TEMP[55].xyzz, TEMP[58].xxxx
>211:   DP3 TEMP[60].x, TEMP[2].xyzz, TEMP[6].xyzz
>212:   MOV_SAT TEMP[61].x, TEMP[60].xxxx
>213:   MAX TEMP[62].x, TEMP[24].xxxx, TEMP[61].xxxx
>214:   ADD TEMP[63].x, TEMP[62].xxxx, IMM[4].yyyy
>215:   RCP TEMP[64].x, TEMP[63].xxxx
>216:   MUL TEMP[65].xyz, TEMP[59].xyzz, TEMP[64].xxxx
>217:   MAD TEMP[1].xyz, TEMP[65].xyzz, TEMP[0].yyyy, TEMP[1].xyzz
>218:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[5].wwww
>219: ENDLOOP :0
>220: MOV TEMP[1].x, CONST[19].wwww
>221: MOV TEMP[1].y, CONST[20].wwww
>222: MOV TEMP[1].z, CONST[21].wwww
>223: ADD TEMP[1].xyz, TEMP[1].xyzz, -IN[0].xyzz
>224: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>225: SQRT TEMP[2].x, TEMP[2].xxxx
>226: RCP TEMP[7].x, TEMP[2].xxxx
>227: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>228: MOV TEMP[7].yz, IMM[3].zzzz
>229: MAD TEMP[7].x, TEMP[2].xxxx, CONST[22].zzzz, CONST[22].wwww
>230: MOV TEMP[2].yz, IMM[3].zzzz
>231: MOV TEMP[2].x, IN[1].zzzz
>232: MOV TEMP[8].yz, IMM[3].zzzz
>233: MOV TEMP[12].xy, IN[1].xyyy
>234: MOV TEMP[12].w, IN[1].wwww
>235: TXP TEMP[12].w, TEMP[12], SAMP[3], 2D
>236: MUL TEMP[8].x, TEMP[12].wwww, TEMP[12].wwww
>237: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[11].xyzz
>238: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>239: ADD TEMP[9].x, TEMP[9].wwww, -TEMP[11].xxxx
>240: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>241: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[6].xyzz
>242: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>243: ADD TEMP[6].xyz, TEMP[7].xyzz, IMM[1].xxxx
>244: MUL TEMP[6].xyz, TEMP[6].xyzz, IMM[0].xxxx
>245: ADD TEMP[6].xyz, IMM[0].wwww, -TEMP[6].xyzz
>246: MOV_SAT TEMP[6].xyz, TEMP[6].xyzz
>247: MUL TEMP[6].xyz, TEMP[8].xyzz, TEMP[6].xyzz
>248: MOV_SAT TEMP[2].xyz, TEMP[2].xyzz
>249: MUL TEMP[2].x, TEMP[6].xyzz, TEMP[2].xyzz
>250: MUL TEMP[2].xyz, CONST[23].xyzz, TEMP[2].xxxx
>251: MUL TEMP[6].x, TEMP[9].xxxx, TEMP[9].xxxx
>252: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>253: MUL TEMP[5].x, TEMP[6].xxxx, TEMP[5].yyyy
>254: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>255: MAD TEMP[1].xyz, TEMP[1].xxxx, TEMP[2].xyzz, TEMP[10].xyzz
>256: MUL TEMP[0].xyz, TEMP[4].xyzz, TEMP[0].yyyy
>257: MOV TEMP[2].xy, IN[2].xyyy
>258: TEX TEMP[2], TEMP[2], SAMP[8], 2D
>259: MOV TEMP[4].w, TEMP[2].wwww
>260: DP3 TEMP[5].x, TEMP[2].xyzz, IMM[6].xyzz
>261: ADD TEMP[6].x, CONST[30].wwww, IMM[0].wwww
>262: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[6].xxxx
>263: MUL TEMP[4].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>264: MUL TEMP[2].xyz, TEMP[4], IMM[4].zzzz
>265: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[3].xyzz, TEMP[0].xyzz
>266: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>267: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>268: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].zzzz
>269: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>270: ADD TEMP[2].x, TEMP[2].xxxx, IMM[4].wwww
>271: RCP TEMP[2].x, TEMP[2].xxxx
>272: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>273: FRC TEMP[2].x, CONST[1].wwww
>274: MUL TEMP[2].x, TEMP[2].xxxx, IMM[6].wwww
>275: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>276: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>277: MUL TEMP[1].x, IN[3].xxxx, TEMP[1].xxxx
>278: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>279: MOV TEMP[0].w, IN[0].wwww
>280: MOV OUT[0], TEMP[0]
>281: END
>radeonsi: Compiling shader 90
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 19, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 27, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 23, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fsub float %153, %49
>  %155 = fmul float %151, 2.000000e+00
>  %156 = fsub float %155, %50
>  %157 = fmul float %152, 2.000000e+00
>  %158 = fsub float %157, %51
>  %159 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %160 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %161 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %162 = load <8 x i32>, <8 x i32> addrspace(2)* %161, align 32, !invariant.load !0
>  %163 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %164 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %163, i64 0, i64 31, !amdgpu.uniform !0
>  %165 = load <4 x i32>, <4 x i32> addrspace(2)* %164, align 16, !invariant.load !0
>  %166 = extractelement <8 x i32> %162, i32 7
>  %167 = extractelement <4 x i32> %165, i32 0
>  %168 = and i32 %167, %166
>  %169 = insertelement <4 x i32> %165, i32 %168, i32 0
>  %170 = bitcast float %159 to i32
>  %171 = bitcast float %160 to i32
>  %172 = insertelement <2 x i32> undef, i32 %170, i32 0
>  %173 = insertelement <2 x i32> %172, i32 %171, i32 1
>  %174 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %173, <8 x i32> %162, <4 x i32> %169, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %175 = extractelement <4 x float> %174, i32 0
>  %176 = extractelement <4 x float> %174, i32 1
>  %177 = extractelement <4 x float> %174, i32 2
>  %178 = extractelement <4 x float> %174, i32 3
>  %179 = fadd float %177, -5.000000e-01
>  %180 = fadd float %176, -5.000000e-01
>  %181 = fmul float %179, 2.000000e+00
>  %182 = fmul float %180, 2.000000e+00
>  %183 = fmul float %178, 2.000000e+00
>  %184 = fmul float %181, %181
>  %185 = fmul float %182, %182
>  %186 = fadd float %184, %185
>  %187 = call float @llvm.AMDGPU.clamp.(float %186, float 0.000000e+00, float 1.000000e+00)
>  %188 = fsub float 1.000000e+00, %187
>  %189 = call float @llvm.sqrt.f32(float %188)
>  %190 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %191 = fmul float %190, %181
>  %192 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %193 = fmul float %192, %181
>  %194 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %195 = fmul float %194, %181
>  %196 = fmul float %23, %182
>  %197 = fadd float %196, %191
>  %198 = fmul float %24, %182
>  %199 = fadd float %198, %193
>  %200 = fmul float %25, %182
>  %201 = fadd float %200, %195
>  %202 = fmul float %59, %189
>  %203 = fadd float %202, %197
>  %204 = fmul float %60, %189
>  %205 = fadd float %204, %199
>  %206 = fmul float %61, %189
>  %207 = fadd float %206, %201
>  %208 = fmul float %154, %203
>  %209 = fmul float %156, %205
>  %210 = fadd float %209, %208
>  %211 = fmul float %158, %207
>  %212 = fadd float %210, %211
>  %213 = call float @llvm.AMDGPU.clamp.(float %212, float 0.000000e+00, float 1.000000e+00)
>  %214 = fsub float %183, %213
>  %215 = call float @llvm.AMDGPU.clamp.(float %214, float 0.000000e+00, float 1.000000e+00)
>  %216 = call float @llvm.pow.f32(float %215, float 3.000000e+00)
>  %217 = call float @llvm.AMDGPU.clamp.(float %216, float 0.000000e+00, float 1.000000e+00)
>  %218 = fmul float %98, 0x3FD3333340000000
>  %219 = fsub float %217, %218
>  %220 = fsub float 1.000000e+00, %98
>  %221 = fmul float %98, 2.000000e+01
>  %222 = fadd float %221, %220
>  %223 = fmul float %219, %222
>  %224 = call float @llvm.AMDGPU.clamp.(float %223, float 0.000000e+00, float 1.000000e+00)
>  %225 = fmul float %217, %224
>  %226 = fmul float %183, 0x3FF19999A0000000
>  %227 = fmul float %175, %97
>  %228 = fmul float %154, %59
>  %229 = fsub float -0.000000e+00, %228
>  %230 = fmul float %156, %60
>  %231 = fsub float %229, %230
>  %232 = fmul float %158, %61
>  %233 = fsub float %231, %232
>  %234 = fadd float %233, 1.000000e+00
>  %235 = fmul float %49, %59
>  %236 = fmul float %50, %60
>  %237 = fadd float %236, %235
>  %238 = fmul float %51, %61
>  %239 = fadd float %237, %238
>  %240 = fsub float 1.000000e+00, %239
>  %241 = call float @llvm.AMDGPU.clamp.(float %240, float 0.000000e+00, float 1.000000e+00)
>  %242 = fsub float %234, %241
>  %243 = call float @llvm.AMDGPU.clamp.(float %242, float 0.000000e+00, float 1.000000e+00)
>  %244 = fsub float 1.000000e+00, %243
>  %245 = fmul float %244, %244
>  %246 = fmul float %225, %245
>  %247 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %248 = fmul float %59, 0x4007700140000000
>  %249 = fadd float %248, %247
>  %250 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %251 = fmul float %60, 0x4007700140000000
>  %252 = fadd float %251, %250
>  %253 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %254 = fmul float %61, 0x4007700140000000
>  %255 = fadd float %254, %253
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 64)
>  %259 = fmul float %258, %249
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 68)
>  %261 = fmul float %260, %249
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 72)
>  %263 = fmul float %262, %249
>  %264 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %265 = load <16 x i8>, <16 x i8> addrspace(2)* %264, align 16, !invariant.load !0
>  %266 = call float @llvm.SI.load.const(<16 x i8> %265, i32 80)
>  %267 = fmul float %266, %252
>  %268 = fadd float %267, %259
>  %269 = call float @llvm.SI.load.const(<16 x i8> %265, i32 84)
>  %270 = fmul float %269, %252
>  %271 = fadd float %270, %261
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 88)
>  %275 = fmul float %274, %252
>  %276 = fadd float %275, %263
>  %277 = call float @llvm.SI.load.const(<16 x i8> %273, i32 96)
>  %278 = fmul float %277, %255
>  %279 = fadd float %278, %268
>  %280 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %281 = load <16 x i8>, <16 x i8> addrspace(2)* %280, align 16, !invariant.load !0
>  %282 = call float @llvm.SI.load.const(<16 x i8> %281, i32 100)
>  %283 = fmul float %282, %255
>  %284 = fadd float %283, %271
>  %285 = call float @llvm.SI.load.const(<16 x i8> %281, i32 104)
>  %286 = fmul float %285, %255
>  %287 = fadd float %286, %276
>  %288 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %289 = load <16 x i8>, <16 x i8> addrspace(2)* %288, align 16, !invariant.load !0
>  %290 = call float @llvm.SI.load.const(<16 x i8> %289, i32 112)
>  %291 = fadd float %279, %290
>  %292 = call float @llvm.SI.load.const(<16 x i8> %289, i32 116)
>  %293 = fadd float %284, %292
>  %294 = call float @llvm.SI.load.const(<16 x i8> %289, i32 120)
>  %295 = fadd float %287, %294
>  %296 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %297 = load <16 x i8>, <16 x i8> addrspace(2)* %296, align 16, !invariant.load !0
>  %298 = call float @llvm.SI.load.const(<16 x i8> %297, i32 16)
>  %299 = fsub float -0.000000e+00, %298
>  %300 = call float @llvm.SI.load.const(<16 x i8> %297, i32 20)
>  %301 = fsub float -0.000000e+00, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %297, i32 24)
>  %303 = fsub float -0.000000e+00, %302
>  %304 = fmul float %140, %299
>  %305 = fmul float %142, %301
>  %306 = fadd float %305, %304
>  %307 = fmul float %144, %303
>  %308 = fadd float %306, %307
>  %309 = call float @llvm.AMDGPU.clamp.(float %308, float 0.000000e+00, float 1.000000e+00)
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 3, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = bitcast float %295 to i32
>  %320 = bitcast float %291 to i32
>  %321 = bitcast float %293 to i32
>  %322 = insertelement <4 x i32> undef, i32 %319, i32 0
>  %323 = insertelement <4 x i32> %322, i32 %320, i32 1
>  %324 = insertelement <4 x i32> %323, i32 %321, i32 2
>  %325 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %324, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %326 = extractelement <4 x float> %325, i32 0
>  %327 = fmul float %203, %299
>  %328 = fmul float %205, %301
>  %329 = fadd float %328, %327
>  %330 = fmul float %207, %303
>  %331 = fadd float %329, %330
>  %332 = call float @llvm.AMDGPU.clamp.(float %331, float 0.000000e+00, float 1.000000e+00)
>  %333 = fsub float %226, %332
>  %334 = call float @llvm.AMDGPU.clamp.(float %333, float 0.000000e+00, float 1.000000e+00)
>  %335 = fmul float %326, %326
>  %336 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %337 = load <16 x i8>, <16 x i8> addrspace(2)* %336, align 16, !invariant.load !0
>  %338 = call float @llvm.SI.load.const(<16 x i8> %337, i32 48)
>  %339 = fmul float %338, %335
>  %340 = call float @llvm.SI.load.const(<16 x i8> %337, i32 52)
>  %341 = fmul float %340, %335
>  %342 = call float @llvm.SI.load.const(<16 x i8> %337, i32 56)
>  %343 = fmul float %342, %335
>  %344 = fmul float %334, %334
>  %345 = call float @llvm.AMDGPU.clamp.(float %344, float 0.000000e+00, float 1.000000e+00)
>  %346 = fmul float %339, %345
>  %347 = fmul float %341, %345
>  %348 = fmul float %343, %345
>  %349 = fmul float %346, %97
>  %350 = fmul float %347, %97
>  %351 = fmul float %348, %97
>  %352 = fmul float %309, %349
>  %353 = fmul float %309, %350
>  %354 = fmul float %309, %351
>  %355 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %356 = load <8 x i32>, <8 x i32> addrspace(2)* %355, align 32, !invariant.load !0
>  %357 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %358 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %357, i64 0, i64 7, !amdgpu.uniform !0
>  %359 = load <4 x i32>, <4 x i32> addrspace(2)* %358, align 16, !invariant.load !0
>  %360 = extractelement <8 x i32> %356, i32 7
>  %361 = extractelement <4 x i32> %359, i32 0
>  %362 = and i32 %361, %360
>  %363 = insertelement <4 x i32> %359, i32 %362, i32 0
>  %364 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %365 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %366 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %367 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %368 = call float @llvm.fabs.f32(float %366)
>  %369 = fdiv float 1.000000e+00, %368, !fpmath !1
>  %370 = fmul float %364, %369
>  %371 = fadd float %370, 1.500000e+00
>  %372 = fmul float %365, %369
>  %373 = fadd float %372, 1.500000e+00
>  %374 = bitcast float %373 to i32
>  %375 = bitcast float %371 to i32
>  %376 = bitcast float %367 to i32
>  %377 = insertelement <4 x i32> undef, i32 %374, i32 0
>  %378 = insertelement <4 x i32> %377, i32 %375, i32 1
>  %379 = insertelement <4 x i32> %378, i32 %376, i32 2
>  %380 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %379, <8 x i32> %356, <4 x i32> %363, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %381 = extractelement <4 x float> %380, i32 0
>  %382 = extractelement <4 x float> %380, i32 1
>  %383 = extractelement <4 x float> %380, i32 2
>  %384 = extractelement <4 x float> %380, i32 3
>  %385 = fmul float %140, %49
>  %386 = fmul float %142, %50
>  %387 = fadd float %386, %385
>  %388 = fmul float %144, %51
>  %389 = fadd float %387, %388
>  %390 = fmul float %389, %140
>  %391 = fmul float %389, %142
>  %392 = fmul float %389, %144
>  %393 = fmul float %390, 2.000000e+00
>  %394 = fsub float %393, %49
>  %395 = fmul float %391, 2.000000e+00
>  %396 = fsub float %395, %50
>  %397 = fmul float %392, 2.000000e+00
>  %398 = fsub float %397, %51
>  %399 = fsub float 1.000000e+00, %98
>  %400 = fmul float %399, 6.000000e+00
>  %401 = fmul float %49, %140
>  %402 = fmul float %50, %142
>  %403 = fadd float %402, %401
>  %404 = fmul float %51, %144
>  %405 = fadd float %403, %404
>  %406 = call float @llvm.AMDGPU.clamp.(float %405, float 0.000000e+00, float 1.000000e+00)
>  %407 = fsub float 1.000000e+00, %406
>  %408 = call float @llvm.pow.f32(float %407, float 5.000000e+00)
>  %409 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %410 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %411 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %412 = fmul float %408, %409
>  %413 = fmul float %408, %410
>  %414 = fmul float %408, %411
>  %415 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %416 = load <8 x i32>, <8 x i32> addrspace(2)* %415, align 32, !invariant.load !0
>  %417 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %418 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %417, i64 0, i64 11, !amdgpu.uniform !0
>  %419 = load <4 x i32>, <4 x i32> addrspace(2)* %418, align 16, !invariant.load !0
>  %420 = extractelement <8 x i32> %416, i32 7
>  %421 = extractelement <4 x i32> %419, i32 0
>  %422 = and i32 %421, %420
>  %423 = insertelement <4 x i32> %419, i32 %422, i32 0
>  %424 = call float @llvm.amdgcn.cubetc(float %394, float %396, float %398)
>  %425 = call float @llvm.amdgcn.cubesc(float %394, float %396, float %398)
>  %426 = call float @llvm.amdgcn.cubema(float %394, float %396, float %398)
>  %427 = call float @llvm.amdgcn.cubeid(float %394, float %396, float %398)
>  %428 = call float @llvm.fabs.f32(float %426)
>  %429 = fdiv float 1.000000e+00, %428, !fpmath !1
>  %430 = fmul float %424, %429
>  %431 = fadd float %430, 1.500000e+00
>  %432 = fmul float %425, %429
>  %433 = fadd float %432, 1.500000e+00
>  %434 = bitcast float %433 to i32
>  %435 = bitcast float %431 to i32
>  %436 = bitcast float %427 to i32
>  %437 = bitcast float %400 to i32
>  %438 = insertelement <4 x i32> undef, i32 %434, i32 0
>  %439 = insertelement <4 x i32> %438, i32 %435, i32 1
>  %440 = insertelement <4 x i32> %439, i32 %436, i32 2
>  %441 = insertelement <4 x i32> %440, i32 %437, i32 3
>  %442 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %441, <8 x i32> %416, <4 x i32> %423, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %443 = extractelement <4 x float> %442, i32 0
>  %444 = extractelement <4 x float> %442, i32 1
>  %445 = extractelement <4 x float> %442, i32 2
>  %446 = fmul float %412, %443
>  %447 = fmul float %413, %444
>  %448 = fmul float %414, %445
>  %449 = fmul float %381, %384
>  %450 = fmul float %382, %384
>  %451 = fmul float %383, %384
>  %452 = fmul float %227, 4.000000e+00
>  %453 = fmul float %449, %452
>  %454 = fadd float %453, %352
>  %455 = fmul float %450, %452
>  %456 = fadd float %455, %353
>  %457 = fmul float %451, %452
>  %458 = fadd float %457, %354
>  %459 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %460 = load <16 x i8>, <16 x i8> addrspace(2)* %459, align 16
>  br label %loop154
>
>loop154:                                          ; preds = %endif158, %main_body
>  %.012 = phi float [ %458, %main_body ], [ %544, %endif158 ]
>  %.011 = phi float [ %456, %main_body ], [ %543, %endif158 ]
>  %.010 = phi float [ %454, %main_body ], [ %542, %endif158 ]
>  %461 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %462 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %463 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %464 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %465 = phi i32 [ 0, %main_body ], [ %545, %endif158 ]
>  %466 = icmp sgt i32 %461, 3
>  br i1 %466, label %endloop219, label %endif158
>
>endif158:                                         ; preds = %loop154
>  %467 = shl i32 %462, 5
>  %468 = shl i32 %462, 5
>  %469 = add i32 %468, 176
>  %470 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %469)
>  %471 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %472 = fsub float %470, %471
>  %473 = shl i32 %462, 5
>  %474 = add i32 %473, 180
>  %475 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %474)
>  %476 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %477 = fsub float %475, %476
>  %478 = add i32 %467, 184
>  %479 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %478)
>  %480 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %481 = fsub float %479, %480
>  %482 = fmul float %472, %472
>  %483 = fmul float %477, %477
>  %484 = fadd float %483, %482
>  %485 = fmul float %481, %481
>  %486 = fadd float %484, %485
>  %487 = call float @llvm.sqrt.f32(float %486)
>  %488 = fdiv float 1.000000e+00, %487, !fpmath !1
>  %489 = fmul float %472, %488
>  %490 = fmul float %477, %488
>  %491 = fmul float %481, %488
>  %492 = fmul float %489, %140
>  %493 = fmul float %490, %142
>  %494 = fadd float %493, %492
>  %495 = fmul float %491, %144
>  %496 = fadd float %494, %495
>  %497 = call float @llvm.AMDGPU.clamp.(float %496, float 0.000000e+00, float 1.000000e+00)
>  %498 = fmul float %489, %203
>  %499 = fmul float %490, %205
>  %500 = fadd float %499, %498
>  %501 = fmul float %491, %207
>  %502 = fadd float %500, %501
>  %503 = call float @llvm.AMDGPU.clamp.(float %502, float 0.000000e+00, float 1.000000e+00)
>  %504 = fsub float %226, %503
>  %505 = call float @llvm.AMDGPU.clamp.(float %504, float 0.000000e+00, float 1.000000e+00)
>  %506 = fmul float %505, %505
>  %507 = shl i32 %463, 1
>  %508 = or i32 %507, 1
>  %509 = fmul float %486, %488
>  %510 = shl i32 %464, 5
>  %511 = add i32 %510, 188
>  %512 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %511)
>  %513 = fmul float %509, %512
>  %514 = call float @llvm.AMDGPU.clamp.(float %513, float 0.000000e+00, float 1.000000e+00)
>  %515 = fsub float 1.000000e+00, %514
>  %516 = shl i32 %508, 4
>  %517 = add i32 %516, 176
>  %518 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %517)
>  %519 = fmul float %518, %515
>  %520 = shl i32 %508, 4
>  %521 = add i32 %520, 180
>  %522 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %521)
>  %523 = fmul float %522, %515
>  %524 = shl i32 %508, 4
>  %525 = add i32 %524, 184
>  %526 = call float @llvm.SI.load.const(<16 x i8> %460, i32 %525)
>  %527 = fmul float %526, %515
>  %528 = fmul float %506, %506
>  %529 = call float @llvm.AMDGPU.clamp.(float %528, float 0.000000e+00, float 1.000000e+00)
>  %530 = fsub float 1.000000e+00, %488
>  %531 = fmul float %529, %530
>  %532 = fadd float %488, %531
>  %533 = fmul float %519, %532
>  %534 = fmul float %523, %532
>  %535 = fmul float %527, %532
>  %536 = fmul float %533, %97
>  %537 = fmul float %534, %97
>  %538 = fmul float %535, %97
>  %539 = fmul float %497, %536
>  %540 = fmul float %497, %537
>  %541 = fmul float %497, %538
>  %542 = fadd float %.010, %539
>  %543 = fadd float %.011, %540
>  %544 = fadd float %.012, %541
>  %545 = add i32 %465, 1
>  br label %loop154
>
>endloop219:                                       ; preds = %loop154
>  %546 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %547 = load <16 x i8>, <16 x i8> addrspace(2)* %546, align 16, !invariant.load !0
>  %548 = call float @llvm.SI.load.const(<16 x i8> %547, i32 316)
>  %549 = call float @llvm.SI.load.const(<16 x i8> %547, i32 332)
>  %550 = call float @llvm.SI.load.const(<16 x i8> %547, i32 348)
>  %551 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %552 = fsub float %548, %551
>  %553 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %554 = fsub float %549, %553
>  %555 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %556 = fsub float %550, %555
>  %557 = fmul float %552, %552
>  %558 = fmul float %554, %554
>  %559 = fadd float %558, %557
>  %560 = fmul float %556, %556
>  %561 = fadd float %559, %560
>  %562 = call float @llvm.sqrt.f32(float %561)
>  %563 = fdiv float 1.000000e+00, %562, !fpmath !1
>  %564 = fmul float %552, %563
>  %565 = fmul float %554, %563
>  %566 = fmul float %556, %563
>  %567 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %568 = load <16 x i8>, <16 x i8> addrspace(2)* %567, align 16, !invariant.load !0
>  %569 = call float @llvm.SI.load.const(<16 x i8> %568, i32 360)
>  %570 = call float @llvm.SI.load.const(<16 x i8> %568, i32 364)
>  %571 = fmul float %562, %569
>  %572 = fadd float %571, %570
>  %573 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %574 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %575 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %576 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %577 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %578 = load <8 x i32>, <8 x i32> addrspace(2)* %577, align 32, !invariant.load !0
>  %579 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %580 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %579, i64 0, i64 15, !amdgpu.uniform !0
>  %581 = load <4 x i32>, <4 x i32> addrspace(2)* %580, align 16, !invariant.load !0
>  %582 = extractelement <8 x i32> %578, i32 7
>  %583 = extractelement <4 x i32> %581, i32 0
>  %584 = and i32 %583, %582
>  %585 = insertelement <4 x i32> %581, i32 %584, i32 0
>  %586 = fdiv float %574, %576, !fpmath !1
>  %587 = fdiv float %575, %576, !fpmath !1
>  %588 = bitcast float %586 to i32
>  %589 = bitcast float %587 to i32
>  %590 = insertelement <2 x i32> undef, i32 %588, i32 0
>  %591 = insertelement <2 x i32> %590, i32 %589, i32 1
>  %592 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %591, <8 x i32> %578, <4 x i32> %585, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %593 = extractelement <4 x float> %592, i32 3
>  %594 = fmul float %593, %593
>  %595 = fmul float %564, %203
>  %596 = fmul float %565, %205
>  %597 = fadd float %596, %595
>  %598 = fmul float %566, %207
>  %599 = fadd float %597, %598
>  %600 = call float @llvm.AMDGPU.clamp.(float %599, float 0.000000e+00, float 1.000000e+00)
>  %601 = fsub float %226, %600
>  %602 = call float @llvm.AMDGPU.clamp.(float %601, float 0.000000e+00, float 1.000000e+00)
>  %603 = fmul float %564, %140
>  %604 = fmul float %565, %142
>  %605 = fadd float %604, %603
>  %606 = fmul float %566, %144
>  %607 = fadd float %605, %606
>  %608 = call float @llvm.AMDGPU.clamp.(float %607, float 0.000000e+00, float 1.000000e+00)
>  %609 = fadd float %572, -5.000000e-01
>  %610 = fmul float %609, 2.000000e+00
>  %611 = fsub float 1.000000e+00, %610
>  %612 = call float @llvm.AMDGPU.clamp.(float %611, float 0.000000e+00, float 1.000000e+00)
>  %613 = fmul float %594, %612
>  %614 = call float @llvm.AMDGPU.clamp.(float %573, float 0.000000e+00, float 1.000000e+00)
>  %615 = fmul float %613, %614
>  %616 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %617 = load <16 x i8>, <16 x i8> addrspace(2)* %616, align 16, !invariant.load !0
>  %618 = call float @llvm.SI.load.const(<16 x i8> %617, i32 368)
>  %619 = fmul float %618, %615
>  %620 = call float @llvm.SI.load.const(<16 x i8> %617, i32 372)
>  %621 = fmul float %620, %615
>  %622 = call float @llvm.SI.load.const(<16 x i8> %617, i32 376)
>  %623 = fmul float %622, %615
>  %624 = fmul float %602, %602
>  %625 = call float @llvm.AMDGPU.clamp.(float %624, float 0.000000e+00, float 1.000000e+00)
>  %626 = fmul float %625, %97
>  %627 = fmul float %619, %626
>  %628 = fmul float %621, %626
>  %629 = fmul float %623, %626
>  %630 = fmul float %608, %627
>  %631 = fadd float %630, %.010
>  %632 = fmul float %608, %628
>  %633 = fadd float %632, %.011
>  %634 = fmul float %608, %629
>  %635 = fadd float %634, %.012
>  %636 = fmul float %446, %246
>  %637 = fmul float %447, %246
>  %638 = fmul float %448, %246
>  %639 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %640 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %641 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 16, !amdgpu.uniform !0
>  %642 = load <8 x i32>, <8 x i32> addrspace(2)* %641, align 32, !invariant.load !0
>  %643 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %644 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %643, i64 0, i64 35, !amdgpu.uniform !0
>  %645 = load <4 x i32>, <4 x i32> addrspace(2)* %644, align 16, !invariant.load !0
>  %646 = extractelement <8 x i32> %642, i32 7
>  %647 = extractelement <4 x i32> %645, i32 0
>  %648 = and i32 %647, %646
>  %649 = insertelement <4 x i32> %645, i32 %648, i32 0
>  %650 = bitcast float %639 to i32
>  %651 = bitcast float %640 to i32
>  %652 = insertelement <2 x i32> undef, i32 %650, i32 0
>  %653 = insertelement <2 x i32> %652, i32 %651, i32 1
>  %654 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %653, <8 x i32> %642, <4 x i32> %649, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %655 = extractelement <4 x float> %654, i32 0
>  %656 = extractelement <4 x float> %654, i32 1
>  %657 = extractelement <4 x float> %654, i32 2
>  %658 = fmul float %655, 0x3FD3333340000000
>  %659 = fmul float %656, 0x3FE2E147A0000000
>  %660 = fadd float %659, %658
>  %661 = fmul float %657, 0x3FBC28F5C0000000
>  %662 = fadd float %660, %661
>  %663 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %664 = load <16 x i8>, <16 x i8> addrspace(2)* %663, align 16, !invariant.load !0
>  %665 = call float @llvm.SI.load.const(<16 x i8> %664, i32 492)
>  %666 = fadd float %665, 1.000000e+00
>  %667 = fmul float %662, %666
>  %668 = fmul float %655, %667
>  %669 = fmul float %656, %667
>  %670 = fmul float %657, %667
>  %671 = fmul float %668, 3.200000e+01
>  %672 = fmul float %669, 3.200000e+01
>  %673 = fmul float %670, 3.200000e+01
>  %674 = fmul float %631, %78
>  %675 = fadd float %674, %636
>  %676 = fmul float %633, %79
>  %677 = fadd float %676, %637
>  %678 = fmul float %635, %80
>  %679 = fadd float %678, %638
>  %680 = fadd float %675, %671
>  %681 = fadd float %677, %672
>  %682 = fadd float %679, %673
>  %683 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %684 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %685 = load <16 x i8>, <16 x i8> addrspace(2)* %684, align 16, !invariant.load !0
>  %686 = call float @llvm.SI.load.const(<16 x i8> %685, i32 12)
>  %687 = fsub float %683, %686
>  %688 = call float @llvm.maxnum.f32(float %687, float 0.000000e+00)
>  %689 = call float @llvm.SI.load.const(<16 x i8> %685, i32 28)
>  %690 = call float @llvm.SI.load.const(<16 x i8> %685, i32 12)
>  %691 = fsub float %689, %690
>  %692 = fadd float %691, 0x3F50624DE0000000
>  %693 = fdiv float 1.000000e+00, %692, !fpmath !1
>  %694 = fmul float %688, %693
>  %695 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %696 = load <16 x i8>, <16 x i8> addrspace(2)* %695, align 16, !invariant.load !0
>  %697 = call float @llvm.SI.load.const(<16 x i8> %696, i32 28)
>  %698 = call float @llvm.floor.f32(float %697)
>  %699 = fsub float %697, %698
>  %700 = fmul float %699, 8.000000e+00
>  %701 = call float @llvm.pow.f32(float %694, float %700)
>  %702 = call float @llvm.AMDGPU.clamp.(float %701, float 0.000000e+00, float 1.000000e+00)
>  %703 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %704 = fmul float %703, %702
>  %705 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %706 = load <16 x i8>, <16 x i8> addrspace(2)* %705, align 16, !invariant.load !0
>  %707 = call float @llvm.SI.load.const(<16 x i8> %706, i32 32)
>  %708 = fsub float 1.000000e+00, %704
>  %709 = fmul float %680, %704
>  %710 = fmul float %707, %708
>  %711 = fadd float %709, %710
>  %712 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %713 = load <16 x i8>, <16 x i8> addrspace(2)* %712, align 16, !invariant.load !0
>  %714 = call float @llvm.SI.load.const(<16 x i8> %713, i32 36)
>  %715 = fsub float 1.000000e+00, %704
>  %716 = fmul float %681, %704
>  %717 = fmul float %714, %715
>  %718 = fadd float %716, %717
>  %719 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %720 = load <16 x i8>, <16 x i8> addrspace(2)* %719, align 16, !invariant.load !0
>  %721 = call float @llvm.SI.load.const(<16 x i8> %720, i32 40)
>  %722 = fsub float 1.000000e+00, %704
>  %723 = fmul float %682, %704
>  %724 = fmul float %721, %722
>  %725 = fadd float %723, %724
>  %726 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %727 = bitcast float %5 to i32
>  %728 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %727, 10
>  %729 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %728, float %711, 11
>  %730 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %729, float %718, 12
>  %731 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %730, float %725, 13
>  %732 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %731, float %726, 14
>  %733 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %732, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %733
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                  ; C0860B00
>	s_load_dwordx4 s[16:19], s[10:11], 0x4                  ; C0880B04
>	s_load_dwordx4 s[20:23], s[10:11], 0x8                  ; C08A0B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_load_dwordx4 s[24:27], s[10:11], 0xc                  ; C08C0B0C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[9:12], v4, s[12:15], 0 idxen  ; E00C2000 80030904
>	buffer_load_format_xyzw v[13:16], v5, s[16:19], 0 idxen ; E00C2000 80040D05
>	buffer_load_format_xyzw v[3:6], v6, s[20:23], 0 idxen   ; E00C2000 80050306
>	s_buffer_load_dword s17, s[0:3], 0x1b                   ; C208811B
>	s_buffer_load_dword s14, s[0:3], 0x18                   ; C2070118
>	s_buffer_load_dword s15, s[0:3], 0x19                   ; C2078119
>	s_buffer_load_dword s16, s[0:3], 0x1a                   ; C208011A
>	s_buffer_load_dword s21, s[0:3], 0x1f                   ; C20A811F
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[16:19], v7, s[24:27], 0 idxen ; E00C2000 80061007
>	s_buffer_load_dword s25, s[0:3], 0x23                   ; C20C8123
>	s_buffer_load_dword s20, s[0:3], 0x1e                   ; C20A011E
>	s_buffer_load_dword s18, s[0:3], 0x1c                   ; C209011C
>	s_buffer_load_dword s19, s[0:3], 0x1d                   ; C209811D
>	s_buffer_load_dword s24, s[0:3], 0x22                   ; C20C0122
>	s_buffer_load_dword s22, s[0:3], 0x20                   ; C20B0120
>	s_buffer_load_dword s23, s[0:3], 0x21                   ; C20B8121
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_buffer_load_dword s26, s[0:3], 0x24                   ; C20D0124
>	s_buffer_load_dword s27, s[0:3], 0x25                   ; C20D8125
>	s_buffer_load_dword s28, s[0:3], 0x3                    ; C20E0103
>	s_buffer_load_dword s30, s[0:3], 0x7                    ; C20F0107
>	s_buffer_load_dword s33, s[0:3], 0xb                    ; C210810B
>	s_buffer_load_dword s8, s[0:3], 0xf                     ; C204010F
>	s_buffer_load_dword s13, s[0:3], 0x17                   ; C2068117
>	s_buffer_load_dword s9, s[0:3], 0x10                    ; C2048110
>	s_buffer_load_dword s10, s[0:3], 0x11                   ; C2050111
>	s_buffer_load_dword s11, s[0:3], 0x12                   ; C2058112
>	s_buffer_load_dword s12, s[0:3], 0x13                   ; C2060113
>	s_buffer_load_dword s29, s[0:3], 0x4                    ; C20E8104
>	s_buffer_load_dword s31, s[0:3], 0x8                    ; C20F8108
>	s_buffer_load_dword s32, s[0:3], 0x9                    ; C2100109
>	s_buffer_load_dword s34, s[0:3], 0xc                    ; C211010C
>	s_buffer_load_dword s35, s[0:3], 0xd                    ; C211810D
>	s_buffer_load_dword s36, s[0:3], 0xe                    ; C212010E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_subrev_f32_e32 v7, s17, v9                            ; 0A0E1211
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v18, s21, v10                          ; 0A241415
>	v_mul_f32_e32 v20, s14, v7                              ; 10280E0E
>	v_mul_f32_e32 v21, s15, v7                              ; 102A0E0F
>	v_mul_f32_e32 v7, s16, v7                               ; 100E0E10
>	v_subrev_f32_e32 v19, s25, v11                          ; 0A261619
>	v_mac_f32_e32 v7, s20, v18                              ; 3E0E2414
>	v_mac_f32_e32 v20, s18, v18                             ; 3E282412
>	v_mac_f32_e32 v21, s19, v18                             ; 3E2A2413
>	v_mac_f32_e32 v7, s24, v19                              ; 3E0E2618
>	v_mac_f32_e32 v20, s22, v19                             ; 3E282616
>	v_mul_f32_e32 v22, 0.5, v7                              ; 102C0EF0
>	v_mac_f32_e32 v21, s23, v19                             ; 3E2A2617
>	v_mad_f32 v23, s26, v20, v22                            ; D2820017 045A281A
>	v_mac_f32_e32 v22, s27, v21                             ; 3E2C2A1B
>	buffer_load_format_xyzw v[18:21], v8, s[4:7], 0 idxen   ; E00C2000 80011208
>	v_mul_f32_e32 v0, s28, v9                               ; 1000121C
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_mac_f32_e32 v0, s30, v10                              ; 3E00141E
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	v_mac_f32_e32 v0, s33, v11                              ; 3E001621
>	v_mac_f32_e32 v0, s8, v12                               ; 3E001808
>	v_mul_f32_e32 v1, s13, v0                               ; 1002000D
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v1                   ; F800020F 010B0A09
>	s_waitcnt expcnt(0) lgkmcnt(0)                          ; BF8C000F
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mac_f32_e32 v1, s4, v7                                ; 3E020E04
>	exp 15, 33, 0, 0, 0, v23, v22, v1, v7                   ; F800021F 07011617
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v1, 2.0, v3, -1.0                             ; D2820001 03CE06F4
>	v_mad_f32 v3, 2.0, v4, -1.0                             ; D2820003 03CE08F4
>	v_mad_f32 v4, 2.0, v5, -1.0                             ; D2820004 03CE0AF4
>	v_add_f32_e32 v5, v6, v6                                ; 060A0D06
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mad_f32 v6, 2.0, v13, -1.0                            ; D2820006 03CE1AF4
>	v_mad_f32 v7, 2.0, v14, -1.0                            ; D2820007 03CE1CF4
>	s_buffer_load_dword s8, s[0:3], 0x6                     ; C2040106
>	v_mad_f32 v8, 2.0, v15, -1.0                            ; D2820008 03CE1EF4
>	v_mad_f32 v13, 0, v7, v6                                ; D282000D 041A0E80
>	v_mad_f32 v14, 0, v6, v7                                ; D282000E 041E0C80
>	s_buffer_load_dword s7, s[0:3], 0x5                     ; C2038105
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	v_mac_f32_e32 v13, 0, v8                                ; 3E1A1080
>	v_mac_f32_e32 v14, 0, v8                                ; 3E1C1080
>	v_mac_f32_e32 v8, 0, v7                                 ; 3E100E80
>	v_mad_f32 v7, 0, v1, v3                                 ; D2820007 040E0280
>	v_mac_f32_e32 v8, 0, v6                                 ; 3E100C80
>	v_mad_f32 v6, 0, v3, v1                                 ; D2820006 04060680
>	v_mac_f32_e32 v6, 0, v4                                 ; 3E0C0880
>	v_mac_f32_e32 v7, 0, v4                                 ; 3E0E0880
>	v_mac_f32_e32 v4, 0, v3                                 ; 3E080680
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v3, s5, v9                                ; 10061205
>	v_mac_f32_e32 v4, 0, v1                                 ; 3E080280
>	v_mul_f32_e32 v1, s4, v9                                ; 10021204
>	v_mul_f32_e32 v9, s6, v9                                ; 10121206
>	v_mac_f32_e32 v9, s8, v10                               ; 3E121408
>	v_mac_f32_e32 v9, s0, v11                               ; 3E121600
>	v_mac_f32_e32 v1, s29, v10                              ; 3E02141D
>	v_mac_f32_e32 v3, s7, v10                               ; 3E061407
>	v_mac_f32_e32 v9, s36, v12                              ; 3E121824
>	v_mov_b32_e32 v10, s9                                   ; 7E140209
>	v_mac_f32_e32 v10, s10, v9                              ; 3E14120A
>	v_add_f32_e64 v10, v10, 0 clamp                         ; D206080A 0001010A
>	v_log_f32_e32 v10, v10                                  ; 7E144F0A
>	v_mac_f32_e32 v1, s31, v11                              ; 3E02161F
>	v_mac_f32_e32 v3, s32, v11                              ; 3E061620
>	v_sub_f32_e64 v11, 1.0, s12                             ; D208000B 000018F2
>	v_mul_legacy_f32_e32 v10, s11, v10                      ; 0E14140B
>	v_exp_f32_e32 v10, v10                                  ; 7E144B0A
>	v_mac_f32_e32 v11, s12, v10                             ; 3E16140C
>	v_mul_f32_e32 v10, v7, v8                               ; 10141107
>	v_mul_f32_e32 v15, v6, v14                              ; 101E1D06
>	v_mad_f32 v10, v14, v4, -v10                            ; D282000A 842A090E
>	v_mac_f32_e32 v1, s34, v12                              ; 3E021822
>	v_mac_f32_e32 v3, s35, v12                              ; 3E061823
>	v_mul_f32_e32 v12, v4, v13                              ; 10181B04
>	v_mul_f32_e32 v11, v11, v11                             ; 1016170B
>	v_mad_f32 v12, v8, v6, -v12                             ; D282000C 84320D08
>	v_mad_f32 v15, v13, v7, -v15                            ; D282000F 843E0F0D
>	v_mad_f32 v10, v5, v10, -v10                            ; D282000A 842A1505
>	v_mad_f32 v12, v5, v12, -v12                            ; D282000C 84321905
>	v_mad_f32 v5, v5, v15, -v15                             ; D2820005 843E1F05
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	exp 15, 34, 0, 0, 0, v16, v17, v18, v19                 ; F800022F 13121110
>	exp 15, 35, 0, 0, 0, v11, v0, v0, v0                    ; F800023F 0000000B
>	exp 15, 36, 0, 0, 0, v6, v7, v4, v10                    ; F800024F 0A040706
>	exp 15, 37, 0, 0, 0, v12, v5, v13, v14                  ; F800025F 0E0D050C
>	exp 15, 38, 0, 0, 0, v8, v0, v0, v0                     ; F800026F 00000008
>	exp 15, 12, 0, 1, 0, v1, v3, v9, v0                     ; F80008CF 00090301
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 24
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 696 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v18, v4, 3, 4, [m0]                             ; C8481304
>	v_interp_p2_f32 v18, [v18], v5, 3, 4, [m0]                      ; C8491305
>	v_interp_p1_f32 v23, v4, 0, 5, [m0]                             ; C85C1404
>	v_interp_p2_f32 v23, [v23], v5, 0, 5, [m0]                      ; C85D1405
>	v_interp_p1_f32 v24, v4, 1, 5, [m0]                             ; C8601504
>	v_interp_p2_f32 v24, [v24], v5, 1, 5, [m0]                      ; C8611505
>	v_interp_p1_f32 v1, v4, 2, 5, [m0]                              ; C8041604
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	v_interp_p2_f32 v1, [v1], v5, 2, 5, [m0]                        ; C8051605
>	v_interp_p1_f32 v2, v4, 3, 5, [m0]                              ; C8081704
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v2, [v2], v5, 3, 5, [m0]                        ; C8091705
>	v_interp_p1_f32 v7, v4, 0, 6, [m0]                              ; C81C1804
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v7, [v7], v5, 0, 6, [m0]                        ; C81D1805
>	v_interp_p1_f32 v14, v6, 0, 0, [m0]                             ; C8380006
>	v_interp_p2_f32 v14, [v14], v3, 0, 0, [m0]                      ; C8390003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v15, v6, 2, 0, [m0]                             ; C83C0206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v19, s12, v14                                     ; 08261C0C
>	v_interp_p2_f32 v15, [v15], v3, 2, 0, [m0]                      ; C83D0203
>	v_sub_f32_e32 v20, s13, v0                                      ; 0828000D
>	v_mul_f32_e32 v8, v19, v19                                      ; 10102713
>	v_sub_f32_e32 v21, s14, v15                                     ; 082A1E0E
>	v_mac_f32_e32 v8, v20, v20                                      ; 3E102914
>	v_mac_f32_e32 v8, v21, v21                                      ; 3E102B15
>	v_rsq_f32_e32 v22, v8                                           ; 7E2C5D08
>	v_mul_f32_e32 v8, v1, v1                                        ; 10100301
>	v_mac_f32_e32 v8, v2, v2                                        ; 3E100502
>	v_mac_f32_e32 v8, v7, v7                                        ; 3E100F07
>	v_rsq_f32_e32 v8, v8                                            ; 7E105D08
>	s_load_dwordx4 s[40:43], s[4:5], 0x4c                           ; C094054C
>	s_load_dwordx8 s[32:39], s[4:5], 0x40                           ; C0D00540
>	s_load_dwordx8 s[24:31], s[4:5], 0x50                           ; C0CC0550
>	v_mul_f32_e32 v30, v8, v1                                       ; 103C0308
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v31, v8, v2                                       ; 103E0508
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_interp_p1_f32 v2, v6, 1, 2, [m0]                              ; C8080906
>	v_interp_p2_f32 v2, [v2], v3, 1, 2, [m0]                        ; C8090903
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	s_load_dwordx4 s[48:51], s[4:5], 0x5c                           ; C098055C
>	v_mul_f32_e32 v32, v8, v7                                       ; 10400F08
>	image_sample v[7:9], v[1:2], s[32:39], s[40:43] dmask:0x7       ; F0800700 01480701
>	s_load_dwordx4 s[44:47], s[4:5], 0x6c                           ; C096056C
>	s_load_dwordx8 s[32:39], s[4:5], 0x60                           ; C0D00560
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s48, s48, s31                                         ; 87301F30
>	v_mul_f32_e32 v33, v22, v19                                     ; 10422716
>	v_mul_f32_e32 v34, v22, v20                                     ; 10442916
>	v_mul_f32_e32 v35, v22, v21                                     ; 10462B16
>	s_and_b32 s44, s44, s39                                         ; 872C272C
>	image_sample v[10:11], v[1:2], s[32:39], s[44:47] dmask:0x6     ; F0800600 01680A01
>	image_sample v[16:17], v[1:2], s[24:31], s[48:51] dmask:0xa     ; F0800A00 01861001
>	v_interp_p1_f32 v26, v4, 0, 4, [m0]                             ; C8681004
>	v_interp_p2_f32 v26, [v26], v5, 0, 4, [m0]                      ; C8691005
>	v_interp_p1_f32 v27, v4, 1, 4, [m0]                             ; C86C1104
>	v_interp_p2_f32 v27, [v27], v5, 1, 4, [m0]                      ; C86D1105
>	v_interp_p1_f32 v28, v4, 2, 4, [m0]                             ; C8701204
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v25, v17, v17                                     ; 06322311
>	v_mad_f32 v12, 2.0, v17, -1.0                                   ; D282000C 03CE22F4
>	v_add_f32_e32 v17, v16, v16                                     ; 06222110
>	v_mad_f32 v16, 2.0, v16, -1.0                                   ; D2820010 03CE20F4
>	v_mad_f32 v17, v17, v16, -v16                                   ; D2820011 84422111
>	v_interp_p2_f32 v28, [v28], v5, 2, 4, [m0]                      ; C8711205
>	v_mad_f32 v5, v25, v26, -v26                                    ; D2820005 846A3519
>	v_mad_f32 v4, v25, v28, -v28                                    ; D2820004 84723919
>	v_mac_f32_e32 v17, v12, v12                                     ; 3E22190C
>	v_mad_f32 v12, v25, v27, -v27                                   ; D282000C 846E3719
>	v_mac_f32_e32 v5, v16, v18                                      ; 3E0A2510
>	v_mac_f32_e32 v12, v16, v23                                     ; 3E182F10
>	v_mac_f32_e32 v4, v16, v24                                      ; 3E083110
>	v_add_f32_e64 v16, v17, 0 clamp                                 ; D2060810 00010111
>	v_sub_f32_e32 v16, 0x3f8020c5, v16                              ; 082020FF 3F8020C5
>	v_sqrt_f32_e32 v16, v16                                         ; 7E206710
>	v_mac_f32_e32 v5, v16, v30                                      ; 3E0A3D10
>	v_mac_f32_e32 v12, v16, v31                                     ; 3E183F10
>	v_mul_f32_e32 v25, v33, v5                                      ; 10320B21
>	v_mac_f32_e32 v4, v16, v32                                      ; 3E084110
>	v_mac_f32_e32 v25, v34, v12                                     ; 3E321922
>	v_mac_f32_e32 v25, v35, v4                                      ; 3E320923
>	v_mul_f32_e32 v16, v5, v25                                      ; 10203305
>	v_mac_f32_e32 v16, v5, v25                                      ; 3E203305
>	v_mad_f32 v36, -v19, v22, v16                                   ; D2820024 24422D13
>	v_mul_f32_e32 v16, v12, v25                                     ; 1020330C
>	v_mac_f32_e32 v16, v12, v25                                     ; 3E20330C
>	s_load_dwordx8 s[12:19], s[4:5], 0x70                           ; C0C60570
>	s_load_dwordx4 s[20:23], s[4:5], 0x7c                           ; C08A057C
>	v_mad_f32 v37, -v20, v22, v16                                   ; D2820025 24422D14
>	v_mul_f32_e32 v16, v4, v25                                      ; 10203304
>	v_mac_f32_e32 v16, v4, v25                                      ; 3E203304
>	v_mad_f32 v38, -v21, v22, v16                                   ; D2820026 24422D15
>	v_interp_p1_f32 v16, v6, 2, 2, [m0]                             ; C8400A06
>	v_interp_p2_f32 v16, [v16], v3, 2, 2, [m0]                      ; C8410A03
>	v_interp_p1_f32 v17, v6, 3, 2, [m0]                             ; C8440B06
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_interp_p2_f32 v17, [v17], v3, 3, 2, [m0]                      ; C8450B03
>	image_sample v[19:22], v[16:17], s[12:19], s[20:23] dmask:0xf   ; F0800F00 00A31310
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v16, -0.5, v21                                    ; 06202AF1
>	v_add_f32_e32 v21, v16, v16                                     ; 062A2110
>	v_add_f32_e32 v16, -0.5, v20                                    ; 062028F1
>	v_add_f32_e32 v20, v16, v16                                     ; 06282110
>	v_mul_f32_e32 v17, v21, v26                                     ; 10223515
>	v_mul_f32_e32 v16, v21, v28                                     ; 10203915
>	v_mac_f32_e32 v17, v20, v18                                     ; 3E222514
>	v_mul_f32_e32 v18, v21, v27                                     ; 10243715
>	v_mac_f32_e32 v18, v20, v23                                     ; 3E242F14
>	v_mac_f32_e32 v16, v20, v24                                     ; 3E203114
>	v_mul_f32_e32 v20, v20, v20                                     ; 10282914
>	v_mac_f32_e32 v20, v21, v21                                     ; 3E282B15
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_sub_f32_e32 v20, 1.0, v20                                     ; 082828F2
>	v_sqrt_f32_e32 v20, v20                                         ; 7E286714
>	v_mac_f32_e32 v17, v20, v30                                     ; 3E223D14
>	v_mac_f32_e32 v18, v20, v31                                     ; 3E243F14
>	v_mac_f32_e32 v16, v20, v32                                     ; 3E204114
>	v_mul_f32_e32 v20, v17, v36                                     ; 10284911
>	s_buffer_load_dword s12, s[0:3], 0x10                           ; C2060110
>	v_mac_f32_e32 v20, v18, v37                                     ; 3E284B12
>	v_mac_f32_e32 v20, v16, v38                                     ; 3E284D10
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_mul_f32_e32 v41, v10, v19                                     ; 1052270A
>	s_buffer_load_dword s52, s[0:3], 0x11                           ; C21A0111
>	s_buffer_load_dword s53, s[0:3], 0x12                           ; C21A8112
>	v_mov_b32_e32 v19, 0x403b800a                                   ; 7E2602FF 403B800A
>	v_mad_f32 v39, 2.0, v22, -v20                                   ; D2820027 84522CF4
>	v_mad_f32 v20, v19, v30, v14                                    ; D2820014 043A3D13
>	s_buffer_load_dword s13, s[0:3], 0x14                           ; C2068114
>	s_buffer_load_dword s14, s[0:3], 0x15                           ; C2070115
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v21, s12, v20                                     ; 102A280C
>	s_buffer_load_dword s15, s[0:3], 0x16                           ; C2078116
>	s_buffer_load_dword s12, s[0:3], 0x18                           ; C2060118
>	v_add_f32_e32 v40, v22, v22                                     ; 06502D16
>	v_mul_f32_e32 v22, s52, v20                                     ; 102C2834
>	v_mul_f32_e32 v23, s53, v20                                     ; 102E2835
>	v_mad_f32 v20, v19, v31, v0                                     ; D2820014 04023F13
>	v_mac_f32_e32 v21, s13, v20                                     ; 3E2A280D
>	v_mac_f32_e32 v22, s14, v20                                     ; 3E2C280E
>	v_mad_f32 v19, v19, v32, v15                                    ; D2820013 043E4113
>	s_buffer_load_dword s13, s[0:3], 0x19                           ; C2068119
>	s_buffer_load_dword s14, s[0:3], 0x1a                           ; C207011A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v23, s15, v20                                     ; 3E2E280F
>	v_mac_f32_e32 v21, s12, v19                                     ; 3E2A260C
>	s_buffer_load_dword s15, s[0:3], 0x1c                           ; C207811C
>	s_buffer_load_dword s16, s[0:3], 0x1d                           ; C208011D
>	s_buffer_load_dword s12, s[0:3], 0x1e                           ; C206011E
>	v_mac_f32_e32 v22, s13, v19                                     ; 3E2C260D
>	v_mac_f32_e32 v23, s14, v19                                     ; 3E2E260E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v20, s15, v21                                     ; 06282A0F
>	v_add_f32_e32 v21, s16, v22                                     ; 062A2C10
>	v_add_f32_e32 v19, s12, v23                                     ; 06262E0C
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                            ; C0C60500
>	s_load_dwordx4 s[20:23], s[4:5], 0xc                            ; C08A050C
>	s_load_dwordx8 s[24:31], s[4:5], 0x10                           ; C0CC0510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                           ; C090051C
>	v_cubesc_f32 v23, v5, v12, v4                                   ; D28A0017 04121905
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	image_sample_c v42, v[19:22], s[12:19], s[20:23] dmask:0x1      ; F0A00100 00A32A13
>	v_cubema_f32 v19, v5, v12, v4                                   ; D28E0013 04121905
>	v_rcp_f32_e64 v20, |v19|                                        ; D3540114 00000113
>	v_cubetc_f32 v21, v5, v12, v4                                   ; D28C0015 04121905
>	v_mov_b32_e32 v19, 0x3fc00000                                   ; 7E2602FF 3FC00000
>	s_and_b32 s32, s32, s31                                         ; 87201F20
>	v_mad_f32 v21, v20, v21, v19                                    ; D2820015 044E2B14
>	v_mad_f32 v20, v20, v23, v19                                    ; D2820014 044E2F14
>	v_add_f32_e64 v23, v25, 0 clamp                                 ; D2060817 00010119
>	v_sub_f32_e32 v23, 1.0, v23                                     ; 082E2EF2
>	v_log_f32_e32 v27, v23                                          ; 7E364F17
>	v_cubeid_f32 v22, v5, v12, v4                                   ; D2880016 04121905
>	image_sample v[23:26], v[20:23], s[24:31], s[32:35] dmask:0xf   ; F0800F00 01061714
>	v_mov_b32_e32 v20, 0x40c00000                                   ; 7E2802FF 40C00000
>	v_mad_f32 v22, -v11, v20, v20                                   ; D2820016 2452290B
>	v_mul_legacy_f32_e32 v20, 0x40a00000, v27                       ; 0E2836FF 40A00000
>	v_cubema_f32 v27, v36, v37, v38                                 ; D28E001B 049A4B24
>	s_load_dwordx4 s[12:15], s[4:5], 0x2c                           ; C086052C
>	s_load_dwordx8 s[16:23], s[4:5], 0x20                           ; C0C80520
>	v_rcp_f32_e64 v27, |v27|                                        ; D354011B 0000011B
>	v_exp_f32_e32 v20, v20                                          ; 7E284B14
>	v_max_f32_e32 v21, 0, v11                                       ; 202A1680
>	v_mul_f32_e32 v43, v21, v20                                     ; 10562915
>	v_cubetc_f32 v20, v36, v37, v38                                 ; D28C0014 049A4B24
>	v_cubesc_f32 v28, v36, v37, v38                                 ; D28A001C 049A4B24
>	v_mad_f32 v20, v27, v20, v19                                    ; D2820014 044E291B
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s12, s12, s23                                         ; 870C170C
>	v_cubeid_f32 v21, v36, v37, v38                                 ; D2880015 049A4B24
>	v_mac_f32_e32 v19, v27, v28                                     ; 3E26391B
>	image_sample_l v[27:29], v[19:22], s[16:23], s[12:15] dmask:0x7 ; F0900700 00641B13
>	s_buffer_load_dword s12, s[0:3], 0x6                            ; C2060106
>	v_mul_f32_e32 v22, v30, v36                                     ; 102C491E
>	v_mad_f32 v22, -v37, v31, -v22                                  ; D2820016 A45A3F25
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v21, v29, v43                                     ; 102A571D
>	v_mad_f32 v29, -v38, v32, v22                                   ; D282001D 245A4126
>	v_mul_f32_e32 v22, s9, v17                                      ; 102C2209
>	v_mad_f32 v22, v18, -s8, -v22                                   ; D2820016 C4581112
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v22, -v16, s12, v22                                   ; D2820016 24581910
>	s_buffer_load_dword s13, s[0:3], 0xc                            ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                            ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                            ; C207810E
>	v_mul_f32_e32 v19, v27, v43                                     ; 1026571B
>	v_mul_f32_e32 v20, v28, v43                                     ; 1028571C
>	v_mul_f32_e32 v27, v26, v23                                     ; 10362F1A
>	v_mul_f32_e32 v28, v26, v24                                     ; 1038311A
>	v_mul_f32_e32 v25, v26, v25                                     ; 1032331A
>	v_mul_f32_e32 v26, v30, v33                                     ; 1034431E
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mov_b32_e32 v30, 0x3f8ccccd                                   ; 7E3C02FF 3F8CCCCD
>	v_mad_f32 v22, v40, v30, -v22                                   ; D2820016 845A3D28
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mul_f32_e32 v22, v22, v22                                     ; 102C2D16
>	v_mul_f32_e32 v23, v42, v42                                     ; 102E552A
>	v_mac_f32_e32 v26, v31, v34                                     ; 3E34451F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v24, s13, v23                                     ; 10302E0D
>	v_mul_f32_e32 v31, s14, v23                                     ; 103E2E0E
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mul_f32_e32 v23, s15, v23                                     ; 102E2E0F
>	v_mul_f32_e32 v31, v22, v31                                     ; 103E3F16
>	v_mul_f32_e32 v24, v22, v24                                     ; 10303116
>	v_mul_f32_e32 v22, v22, v23                                     ; 102C2F16
>	v_mul_f32_e32 v23, s9, v5                                       ; 102E0A09
>	v_mad_f32 v23, v12, -s8, -v23                                   ; D2820017 C45C110C
>	v_mad_f32 v23, -v4, s12, v23                                    ; D2820017 245C1904
>	v_mac_f32_e32 v26, v32, v35                                     ; 3E344720
>	v_add_f32_e64 v32, v23, 0 clamp                                 ; D2060820 00010117
>	v_mul_f32_e32 v23, v10, v24                                     ; 102E310A
>	v_mul_f32_e32 v22, v10, v22                                     ; 102C2D0A
>	v_mul_f32_e32 v31, v10, v31                                     ; 103E3F0A
>	v_mul_f32_e32 v24, v23, v32                                     ; 10304117
>	v_mul_f32_e32 v23, v31, v32                                     ; 102E411F
>	v_mul_f32_e32 v31, 4.0, v41                                     ; 103E52F6
>	v_mul_f32_e32 v22, v22, v32                                     ; 102C4116
>	v_mac_f32_e32 v22, v31, v25                                     ; 3E2C331F
>	v_add_f32_e64 v25, v39, 0 clamp                                 ; D2060819 00010127
>	v_log_f32_e32 v25, v25                                          ; 7E324F19
>	v_mac_f32_e32 v23, v31, v28                                     ; 3E2E391F
>	v_sub_f32_e32 v28, 1.0, v11                                     ; 083816F2
>	v_mac_f32_e32 v24, v31, v27                                     ; 3E30371F
>	v_mul_legacy_f32_e32 v25, 0x40400000, v25                       ; 0E3232FF 40400000
>	v_exp_f32_e32 v25, v25                                          ; 7E324B19
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	v_mov_b32_e32 v27, v25                                          ; 7E360319
>	v_sub_f32_e32 v26, 1.0, v26                                     ; 083434F2
>	v_mac_f32_e32 v27, 0xbe99999a, v11                              ; 3E3616FF BE99999A
>	v_mac_f32_e32 v28, 0x41a00000, v11                              ; 3E3816FF 41A00000
>	v_mul_f32_e32 v11, v28, v27                                     ; 1016371C
>	v_add_f32_e32 v27, 1.0, v29                                     ; 06363AF2
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_subrev_f32_e32 v26, v26, v27                                  ; 0A34371A
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_add_f32_e64 v11, v11, 0 clamp                                 ; D206080B 0001010B
>	v_sub_f32_e32 v27, 1.0, v26                                     ; 083634F2
>	v_mul_f32_e32 v11, v11, v25                                     ; 1016330B
>	v_mad_f32 v26, -v26, v27, v27                                   ; D282001A 246E371A
>	v_mul_f32_e32 v11, v26, v11                                     ; 1016171A
>	v_mul_f32_e32 v25, v30, v40                                     ; 1032511E
>	v_mov_b32_e32 v26, 0xc8                                         ; 7E3402FF 000000C8
>	v_mov_b32_e32 v27, 0                                            ; 7E360280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v28, vcc, 0xffffffe8, v26                         ; 4A3834FF FFFFFFE8
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v29, vcc, 0xffffffec, v26                         ; 4A3A34FF FFFFFFEC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -16, v26                                ; 4A3C34D0
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v31, vcc, -12, v26                                ; 4A3E34CC
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v32, vcc, -8, v26                                 ; 4A4034C8
>	v_add_i32_e32 v27, vcc, 1, v27                                  ; 4A363681
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v28, v14, v28                                  ; 0A38390E
>	v_mul_f32_e32 v33, v28, v28                                     ; 1042391C
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v29, v0, v29                                   ; 0A3A3B00
>	v_mac_f32_e32 v33, v29, v29                                     ; 3E423B1D
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v30, v15, v30                                  ; 0A3C3D0F
>	v_mac_f32_e32 v33, v30, v30                                     ; 3E423D1E
>	v_rsq_f32_e32 v34, v33                                          ; 7E445D21
>	v_mul_f32_e32 v28, v34, v28                                     ; 10383922
>	v_mul_f32_e32 v35, v17, v28                                     ; 10463911
>	v_mul_f32_e32 v29, v34, v29                                     ; 103A3B22
>	v_mul_f32_e32 v28, v5, v28                                      ; 10383905
>	v_mul_f32_e32 v30, v34, v30                                     ; 103C3D22
>	v_mac_f32_e32 v35, v18, v29                                     ; 3E463B12
>	v_mac_f32_e32 v28, v12, v29                                     ; 3E383B0C
>	v_mac_f32_e32 v35, v16, v30                                     ; 3E463D10
>	v_mac_f32_e32 v28, v4, v30                                      ; 3E383D04
>	v_add_i32_e32 v30, vcc, -4, v26                                 ; 4A3C34C4
>	buffer_load_dword v29, v32, s[0:3], 0 offen                     ; E0301000 80001D20
>	buffer_load_dword v32, v26, s[0:3], 0 offen                     ; E0301000 8000201A
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_f32_e64 v35, v35, 0 clamp                                 ; D2060823 00010123
>	v_subrev_f32_e32 v35, v35, v25                                  ; 0A463323
>	v_add_f32_e64 v35, v35, 0 clamp                                 ; D2060823 00010123
>	v_mul_f32_e32 v35, v35, v35                                     ; 10464723
>	v_mul_f32_e32 v33, v34, v33                                     ; 10424322
>	v_mul_f32_e32 v35, v35, v35                                     ; 10464723
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_mul_f32_e32 v31, v31, v33                                     ; 103E431F
>	v_add_f32_e64 v31, v31, 0 clamp                                 ; D206081F 0001011F
>	v_add_f32_e64 v35, v35, 0 clamp                                 ; D2060823 00010123
>	v_sub_f32_e32 v36, 1.0, v34                                     ; 084844F2
>	v_mac_f32_e32 v34, v36, v35                                     ; 3E444724
>	v_add_f32_e64 v28, v28, 0 clamp                                 ; D206081C 0001011C
>	v_add_i32_e32 v26, vcc, 32, v26                                 ; 4A3434A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v29, -v31, v29, v29                                   ; D282001D 24763B1F
>	v_mul_f32_e32 v29, v34, v29                                     ; 103A3B22
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v30, -v31, v30, v30                                   ; D282001E 247A3D1F
>	v_mad_f32 v31, -v31, v32, v32                                   ; D282001F 2482411F
>	v_mul_f32_e32 v29, v10, v29                                     ; 103A3B0A
>	v_mul_f32_e32 v30, v34, v30                                     ; 103C3D22
>	v_mul_f32_e32 v31, v34, v31                                     ; 103E3F22
>	v_mac_f32_e32 v24, v29, v28                                     ; 3E30391D
>	v_mul_f32_e32 v29, v10, v30                                     ; 103A3D0A
>	v_mul_f32_e32 v30, v10, v31                                     ; 103C3F0A
>	v_mac_f32_e32 v23, v29, v28                                     ; 3E2E391D
>	v_mac_f32_e32 v22, v30, v28                                     ; 3E2C391E
>	v_cmp_lt_i32_e32 vcc, 3, v27                                    ; 7D023683
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s8, s[0:3], 0x4f                            ; C204014F
>	s_buffer_load_dword s9, s[0:3], 0x53                            ; C2048153
>	s_buffer_load_dword s12, s[0:3], 0x57                           ; C2060157
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v33, v6, 2, 1, [m0]                             ; C8840606
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v14, s8, v14                                      ; 081C1C08
>	v_sub_f32_e32 v26, s9, v0                                       ; 08340009
>	v_mul_f32_e32 v27, v14, v14                                     ; 10361D0E
>	v_sub_f32_e32 v15, s12, v15                                     ; 081E1E0C
>	v_mac_f32_e32 v27, v26, v26                                     ; 3E36351A
>	v_mac_f32_e32 v27, v15, v15                                     ; 3E361F0F
>	v_sqrt_f32_e32 v28, v27                                         ; 7E38671B
>	v_rsq_f32_e32 v27, v27                                          ; 7E365D1B
>	v_interp_p2_f32 v33, [v33], v3, 2, 1, [m0]                      ; C8850603
>	s_buffer_load_dword s14, s[0:3], 0x5b                           ; C207015B
>	s_buffer_load_dword s13, s[0:3], 0x5a                           ; C206815A
>	v_mul_f32_e32 v29, v27, v14                                     ; 103A1D1B
>	v_interp_p1_f32 v14, v6, 0, 1, [m0]                             ; C8380406
>	v_mul_f32_e32 v31, v27, v15                                     ; 103E1F1B
>	v_interp_p2_f32 v14, [v14], v3, 0, 1, [m0]                      ; C8390403
>	v_interp_p1_f32 v15, v6, 1, 1, [m0]                             ; C83C0506
>	v_mul_f32_e32 v30, v27, v26                                     ; 103C351B
>	v_interp_p2_f32 v15, [v15], v3, 1, 1, [m0]                      ; C83D0503
>	v_interp_p1_f32 v26, v6, 3, 1, [m0]                             ; C8680706
>	v_interp_p2_f32 v26, [v26], v3, 3, 1, [m0]                      ; C8690703
>	v_mov_b32_e32 v27, 0x6f800000                                   ; 7E3602FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v27, |v26|                                ; D002026A 0002351B
>	v_mov_b32_e32 v27, 0x2f800000                                   ; 7E3602FF 2F800000
>	v_cndmask_b32_e32 v27, 1.0, v27, vcc                            ; 003636F2
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v32, s14                                          ; 7E40020E
>	v_mul_f32_e32 v26, v27, v26                                     ; 1034351B
>	v_rcp_f32_e32 v26, v26                                          ; 7E34551A
>	v_mac_f32_e32 v32, s13, v28                                     ; 3E40380D
>	s_load_dwordx8 s[12:19], s[4:5], 0x30                           ; C0C60530
>	s_load_dwordx4 s[20:23], s[4:5], 0x3c                           ; C08A053C
>	v_mul_f32_e32 v14, v26, v14                                     ; 101C1D1A
>	v_mul_f32_e32 v15, v26, v15                                     ; 101E1F1A
>	v_mul_f32_e32 v14, v14, v27                                     ; 101C370E
>	v_mul_f32_e32 v15, v15, v27                                     ; 101E370F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	image_sample v14, v[14:15], s[12:19], s[20:23] dmask:0x8        ; F0800800 00A30E0E
>	s_load_dwordx8 s[12:19], s[4:5], 0x80                           ; C0C60580
>	s_load_dwordx4 s[4:7], s[4:5], 0x8c                             ; C082058C
>	v_mul_f32_e32 v15, v17, v29                                     ; 101E3B11
>	v_mac_f32_e32 v15, v18, v30                                     ; 3E1E3D12
>	v_mul_f32_e32 v5, v5, v29                                       ; 100A3B05
>	v_mac_f32_e32 v5, v12, v30                                      ; 3E0A3D0C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	v_mac_f32_e32 v15, v16, v31                                     ; 3E1E3F10
>	image_sample v[26:28], v[1:2], s[12:19], s[4:7] dmask:0x7       ; F0800700 00231A01
>	v_mac_f32_e32 v5, v4, v31                                       ; 3E0A3F04
>	v_add_f32_e64 v4, v15, 0 clamp                                  ; D2060804 0001010F
>	s_buffer_load_dword s4, s[0:3], 0x7b                            ; C202017B
>	v_subrev_f32_e32 v4, v4, v25                                    ; 0A083304
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v26                               ; 100234FF 3E99999A
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	v_mac_f32_e32 v1, 0x3f170a3d, v27                               ; 3E0236FF 3F170A3D
>	v_mul_f32_e32 v4, v4, v4                                        ; 10080904
>	v_mac_f32_e32 v1, 0x3de147ae, v28                               ; 3E0238FF 3DE147AE
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v1, s4, v1                                        ; 3E020204
>	v_mul_f32_e32 v4, v10, v4                                       ; 1008090A
>	v_add_f32_e32 v10, -0.5, v32                                    ; 061440F1
>	s_buffer_load_dword s4, s[0:3], 0x5c                            ; C202015C
>	v_mad_f32 v10, v10, -2.0, 1.0                                   ; D282000A 03C9EB0A
>	s_buffer_load_dword s5, s[0:3], 0x5d                            ; C202815D
>	s_buffer_load_dword s6, s[0:3], 0x5e                            ; C203015E
>	v_mul_f32_e32 v14, v14, v14                                     ; 101C1D0E
>	v_add_f32_e64 v10, v10, 0 clamp                                 ; D206080A 0001010A
>	v_mul_f32_e32 v10, v10, v14                                     ; 10141D0A
>	v_add_f32_e64 v12, v33, 0 clamp                                 ; D206080C 00010121
>	v_mul_f32_e32 v10, v12, v10                                     ; 1014150C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v12, s4, v10                                      ; 10181404
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mul_f32_e32 v14, s5, v10                                      ; 101C1405
>	v_mul_f32_e32 v10, s6, v10                                      ; 10141406
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v12, v4, v12                                      ; 10181904
>	v_mul_f32_e32 v14, v4, v14                                      ; 101C1D04
>	v_add_f32_e64 v5, v5, 0 clamp                                   ; D2060805 00010105
>	v_mul_f32_e32 v4, v4, v10                                       ; 10081504
>	v_mac_f32_e32 v22, v4, v5                                       ; 3E2C0B04
>	v_mac_f32_e32 v24, v12, v5                                      ; 3E300B0C
>	v_mul_f32_e32 v4, v11, v19                                      ; 1008270B
>	v_mac_f32_e32 v4, v7, v24                                       ; 3E083107
>	v_mul_f32_e32 v2, v1, v26                                       ; 10043501
>	v_mov_b32_e32 v7, 0x42000000                                    ; 7E0E02FF 42000000
>	v_mac_f32_e32 v4, v7, v2                                        ; 3E080507
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v10, v11, v21                                     ; 10142B0B
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v17, v1, v27                                      ; 10223701
>	v_mul_f32_e32 v1, v1, v28                                       ; 10023901
>	v_mac_f32_e32 v10, v9, v22                                      ; 3E142D09
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v10, v7, v1                                       ; 3E140307
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	v_interp_p1_f32 v1, v6, 0, 3, [m0]                              ; C8040C06
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v23, v14, v5                                      ; 3E2E0B0E
>	v_mul_f32_e32 v5, v11, v20                                      ; 100A290B
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mac_f32_e32 v5, v8, v23                                       ; 3E0A2F08
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 3, [m0]                        ; C8050C03
>	v_mac_f32_e32 v5, v7, v17                                       ; 3E0A2307
>	v_mul_f32_e32 v7, v0, v1                                        ; 100E0300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v7, s6, s6                                       ; D2820000 20180D07
>	v_mac_f32_e32 v0, v7, v4                                        ; 3E000907
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_mad_f32 v1, -v7, s7, s7                                       ; D2820001 201C0F07
>	v_mad_f32 v2, -v7, s0, s0                                       ; D2820002 20000107
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mac_f32_e32 v1, v7, v5                                        ; 3E020B07
>	v_mac_f32_e32 v2, v7, v10                                       ; 3E041507
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 44
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2380 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL CONST[0..5]
>DCL TEMP[0..5], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,    -1.0000,     0.0000}
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV TEMP[1].xyz, IN[0].xyzx
>  5: MUL TEMP[2].x, TEMP[0].wwww, CONST[5].wwww
>  6: MOV TEMP[1].w, TEMP[2].xxxx
>  7: MAD TEMP[2].x, TEMP[0].zzzz, CONST[4].yyyy, CONST[4].xxxx
>  8: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>  9: POW TEMP[2].x, TEMP[2].xxxx, CONST[4].zzzz
> 10: ADD TEMP[3].x, IMM[0].xxxx, -CONST[4].wwww
> 11: MAD TEMP[2].x, CONST[4].wwww, TEMP[2].xxxx, TEMP[3].xxxx
> 12: MAD TEMP[3].xyz, IN[1].xyzz, IMM[0].yyyy, IMM[0].zzzz
> 13: DP3 TEMP[4].x, TEMP[3].xyzz, IMM[0].xwww
> 14: DP3 TEMP[5].x, TEMP[3].xyzz, IMM[0].wxww
> 15: MOV TEMP[4].y, TEMP[5].xxxx
> 16: DP3 TEMP[3].x, TEMP[3].xyzz, IMM[0].wwxx
> 17: MOV TEMP[4].z, TEMP[3].xxxx
> 18: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 19: MOV TEMP[2].z, TEMP[2].xxxx
> 20: MOV TEMP[2].xy, IN[2].xyxx
> 21: MOV OUT[2].xyz, TEMP[2].xyzx
> 22: MOV OUT[0], TEMP[0]
> 23: MOV OUT[1], TEMP[1]
> 24: MOV OUT[3].xyz, TEMP[4].xyzx
> 25: END
>radeonsi: Compiling shader 91
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 0
>  %28 = extractelement <4 x float> %26, i32 1
>  %29 = extractelement <4 x float> %26, i32 2
>  %30 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !invariant.load !0
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %31, i32 0, i32 %16)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %36 = load <16 x i8>, <16 x i8> addrspace(2)* %35, align 16, !invariant.load !0
>  %37 = call float @llvm.SI.load.const(<16 x i8> %36, i32 0)
>  %38 = fmul float %37, %20
>  %39 = call float @llvm.SI.load.const(<16 x i8> %36, i32 4)
>  %40 = fmul float %39, %20
>  %41 = call float @llvm.SI.load.const(<16 x i8> %36, i32 8)
>  %42 = fmul float %41, %20
>  %43 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %44 = load <16 x i8>, <16 x i8> addrspace(2)* %43, align 16, !invariant.load !0
>  %45 = call float @llvm.SI.load.const(<16 x i8> %44, i32 12)
>  %46 = fmul float %45, %20
>  %47 = call float @llvm.SI.load.const(<16 x i8> %44, i32 16)
>  %48 = fmul float %47, %21
>  %49 = fadd float %48, %38
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 20)
>  %53 = fmul float %52, %21
>  %54 = fadd float %53, %40
>  %55 = call float @llvm.SI.load.const(<16 x i8> %51, i32 24)
>  %56 = fmul float %55, %21
>  %57 = fadd float %56, %42
>  %58 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %59 = load <16 x i8>, <16 x i8> addrspace(2)* %58, align 16, !invariant.load !0
>  %60 = call float @llvm.SI.load.const(<16 x i8> %59, i32 28)
>  %61 = fmul float %60, %21
>  %62 = fadd float %61, %46
>  %63 = call float @llvm.SI.load.const(<16 x i8> %59, i32 32)
>  %64 = fmul float %63, %22
>  %65 = fadd float %64, %49
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 36)
>  %69 = fmul float %68, %22
>  %70 = fadd float %69, %54
>  %71 = call float @llvm.SI.load.const(<16 x i8> %67, i32 40)
>  %72 = fmul float %71, %22
>  %73 = fadd float %72, %57
>  %74 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %75 = load <16 x i8>, <16 x i8> addrspace(2)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const(<16 x i8> %75, i32 44)
>  %77 = fmul float %76, %22
>  %78 = fadd float %77, %62
>  %79 = call float @llvm.SI.load.const(<16 x i8> %75, i32 48)
>  %80 = fmul float %79, %23
>  %81 = fadd float %80, %65
>  %82 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %83 = load <16 x i8>, <16 x i8> addrspace(2)* %82, align 16, !invariant.load !0
>  %84 = call float @llvm.SI.load.const(<16 x i8> %83, i32 52)
>  %85 = fmul float %84, %23
>  %86 = fadd float %85, %70
>  %87 = call float @llvm.SI.load.const(<16 x i8> %83, i32 56)
>  %88 = fmul float %87, %23
>  %89 = fadd float %88, %73
>  %90 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %91 = load <16 x i8>, <16 x i8> addrspace(2)* %90, align 16, !invariant.load !0
>  %92 = call float @llvm.SI.load.const(<16 x i8> %91, i32 60)
>  %93 = fmul float %92, %23
>  %94 = fadd float %93, %78
>  %95 = call float @llvm.SI.load.const(<16 x i8> %91, i32 92)
>  %96 = fmul float %94, %95
>  %97 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %98 = load <16 x i8>, <16 x i8> addrspace(2)* %97, align 16, !invariant.load !0
>  %99 = call float @llvm.SI.load.const(<16 x i8> %98, i32 68)
>  %100 = call float @llvm.SI.load.const(<16 x i8> %98, i32 64)
>  %101 = fmul float %89, %99
>  %102 = fadd float %101, %100
>  %103 = call float @llvm.AMDGPU.clamp.(float %102, float 0.000000e+00, float 1.000000e+00)
>  %104 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %105 = load <16 x i8>, <16 x i8> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = call float @llvm.SI.load.const(<16 x i8> %105, i32 72)
>  %107 = call float @llvm.pow.f32(float %103, float %106)
>  %108 = call float @llvm.SI.load.const(<16 x i8> %105, i32 76)
>  %109 = fsub float 1.000000e+00, %108
>  %110 = call float @llvm.SI.load.const(<16 x i8> %105, i32 76)
>  %111 = fmul float %110, %107
>  %112 = fadd float %111, %109
>  %113 = fmul float %27, 2.000000e+00
>  %114 = fadd float %113, -1.000000e+00
>  %115 = fmul float %28, 2.000000e+00
>  %116 = fadd float %115, -1.000000e+00
>  %117 = fmul float %29, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %116, 0.000000e+00
>  %120 = fadd float %119, %114
>  %121 = fmul float %118, 0.000000e+00
>  %122 = fadd float %120, %121
>  %123 = fmul float %114, 0.000000e+00
>  %124 = fadd float %116, %123
>  %125 = fmul float %118, 0.000000e+00
>  %126 = fadd float %124, %125
>  %127 = fmul float %114, 0.000000e+00
>  %128 = fmul float %116, 0.000000e+00
>  %129 = fadd float %128, %127
>  %130 = fadd float %129, %118
>  %131 = fmul float %112, %112
>  %132 = bitcast i32 %12 to float
>  %133 = insertvalue <{ float, float, float }> undef, float %132, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %20, float %21, float %22, float %96)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %33, float %34, float %131, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %122, float %126, float %130, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %81, float %86, float %89, float %94)
>  ret <{ float, float, float }> %133
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..18]
>DCL TEMP[0..54], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,     2.9297,     9.0000}
>IMM[1] FLT32 {    0.5000,     6.0000,     5.0000,     0.0000}
>IMM[2] FLT32 {    4.0000,     0.2500,     0.0000,     0.0010}
>IMM[3] INT32 {0, 4, 2, 1}
>IMM[4] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[2].xyzz, IN[2].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[2].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xy, IN[1].xyyy
>  8: TEX TEMP[2], TEMP[2], SAMP[3], 2D
>  9: MOV TEMP[2], TEMP[2]
> 10: MOV TEMP[3].xy, IN[1].xyyy
> 11: TEX TEMP[3], TEMP[3], SAMP[4], 2D
> 12: MOV TEMP[4], TEMP[3]
> 13: MOV TEMP[5].x, TEMP[3].yyyy
> 14: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[0].xyzz
> 15: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 16: MUL TEMP[6].xyz, IMM[0].yyyy, TEMP[6].xyzz
> 17: ADD TEMP[6].xyz, TEMP[0].xyzz, -TEMP[6].xyzz
> 18: DP3 TEMP[6].x, TEMP[6].xyzz, TEMP[1].xyzz
> 19: ADD TEMP[6].x, TEMP[6].xxxx, IMM[0].xxxx
> 20: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[1].xyzz
> 21: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[7].xxxx
> 22: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 23: ADD TEMP[6].x, TEMP[6].xxxx, -TEMP[7].xxxx
> 24: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 25: ADD TEMP[6].x, IMM[0].xxxx, -TEMP[6].xxxx
> 26: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[6].xxxx
> 27: MUL TEMP[6].x, TEMP[3].yyyy, TEMP[6].xxxx
> 28: MOV TEMP[5].y, TEMP[6].xxxx
> 29: MOV TEMP[7].w, IMM[0].xxxx
> 30: MAD TEMP[7].xyz, IMM[0].zzzz, TEMP[1].xyzz, IN[0].xyzz
> 31: MUL TEMP[8], CONST[4], TEMP[7].xxxx
> 32: MAD TEMP[8], CONST[5], TEMP[7].yyyy, TEMP[8]
> 33: MAD TEMP[7], CONST[6], TEMP[7].zzzz, TEMP[8]
> 34: ADD TEMP[7], TEMP[7], CONST[7]
> 35: MAD TEMP[8].x, IMM[0].wwww, TEMP[3].zzzz, IMM[0].yyyy
> 36: EX2 TEMP[8].x, TEMP[8].xxxx
> 37: MOV TEMP[9].xyz, -CONST[1].xyzx
> 38: ADD TEMP[10].xyz, TEMP[9].xyzz, TEMP[0].xyzz
> 39: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[1].xxxx
> 40: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 41: RSQ TEMP[11].x, TEMP[11].xxxx
> 42: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 43: DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[1].xyzz
> 44: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 45: MOV TEMP[12].xy, TEMP[7].xyyy
> 46: MOV TEMP[12].w, IMM[0].xxxx
> 47: MOV TEMP[12].z, TEMP[7].zzzz
> 48: TXP TEMP[7], TEMP[12], SAMP[0], SHADOW2D
> 49: MOV TEMP[12].x, TEMP[7].xxxx
> 50: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 51: MUL TEMP[7].xyz, CONST[3].xyzz, TEMP[7].xxxx
> 52: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[3].yyyy
> 53: MUL TEMP[7].xyz, TEMP[11].xxxx, TEMP[7].xyzz
> 54: MOV TEMP[12].xyz, TEMP[1].xyzz
> 55: TEX TEMP[12], TEMP[12], SAMP[1], CUBE
> 56: MOV TEMP[13], TEMP[12]
> 57: DP3 TEMP[13].x, TEMP[1].xyzz, TEMP[0].xyzz
> 58: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[1].xyzz
> 59: MAD TEMP[13].xyz, IMM[0].yyyy, TEMP[13].xyzz, -TEMP[0].xyzz
> 60: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[3].zzzz
> 61: MUL TEMP[14].x, TEMP[14].xxxx, IMM[1].yyyy
> 62: MOV TEMP[13].w, TEMP[14].xxxx
> 63: DP3 TEMP[15].x, TEMP[0].xyzz, TEMP[1].xyzz
> 64: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 65: ADD TEMP[15].x, IMM[0].xxxx, -TEMP[15].xxxx
> 66: POW TEMP[15].x, TEMP[15].xxxx, IMM[1].zzzz
> 67: MAX TEMP[16].xyz, TEMP[3].zzzz, IMM[1].wwww
> 68: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[16].xyzz
> 69: MOV TEMP[13].xyz, TEMP[13].xyzz
> 70: MOV TEMP[13].w, TEMP[14].xxxx
> 71: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
> 72: MUL TEMP[13].xyz, TEMP[15].xyzz, TEMP[13].xyzz
> 73: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[12].wwww
> 74: MUL TEMP[3].x, IMM[2].xxxx, TEMP[3].yyyy
> 75: MAD TEMP[3].xyz, TEMP[12].xyzz, TEMP[3].xxxx, TEMP[7].xyzz
> 76: DP3 TEMP[9].x, TEMP[9].xyzz, TEMP[10].xyzz
> 77: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 78: ADD TEMP[9].x, IMM[0].xxxx, -TEMP[9].xxxx
> 79: POW TEMP[9].x, TEMP[9].xxxx, IMM[1].zzzz
> 80: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[9].xxxx
> 81: ADD TEMP[9].x, TEMP[8].xxxx, IMM[0].yyyy
> 82: MUL TEMP[9].x, TEMP[9].xxxx, IMM[2].yyyy
> 83: MUL TEMP[12].x, -TEMP[8].xxxx, IMM[1].xxxx
> 84: EX2 TEMP[12].x, TEMP[12].xxxx
> 85: ADD TEMP[12].x, IMM[0].yyyy, -TEMP[12].xxxx
> 86: RCP TEMP[12].x, TEMP[12].xxxx
> 87: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[12].xxxx
> 88: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[9].xxxx
> 89: DP3 TEMP[9].x, TEMP[1].xyzz, TEMP[10].xyzz
> 90: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 91: POW TEMP[9].x, TEMP[9].xxxx, TEMP[8].xxxx
> 92: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[9].xxxx
> 93: DP3 TEMP[9].x, TEMP[0].xyzz, TEMP[1].xyzz
> 94: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 95: MAX TEMP[9].x, TEMP[11].xxxx, TEMP[9].xxxx
> 96: ADD TEMP[9].x, TEMP[9].xxxx, IMM[2].zzzz
> 97: RCP TEMP[9].x, TEMP[9].xxxx
> 98: MAD TEMP[7].xyz, TEMP[7].xyzz, TEMP[9].xxxx, TEMP[13].xyzz
> 99: MUL TEMP[6].xyz, TEMP[7].xyzz, TEMP[6].xxxx
>100: MOV TEMP[7].x, IMM[3].xxxx
>101: BGNLOOP :0
>102:   ISGE TEMP[9].x, TEMP[7].xxxx, IMM[3].yyyy
>103:   UIF TEMP[9].xxxx :0
>104:     BRK
>105:   ENDIF
>106:   UMUL TEMP[10].x, TEMP[7].xxxx, IMM[3].zzzz
>107:   UARL ADDR[0].x, TEMP[10].xxxx
>108:   UARL ADDR[0].x, TEMP[10].xxxx
>109:   ADD TEMP[11].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>110:   DP3 TEMP[12].x, TEMP[11].xyzz, TEMP[11].xyzz
>111:   RSQ TEMP[14].x, TEMP[12].xxxx
>112:   MUL TEMP[15].xyz, TEMP[11].xyzz, TEMP[14].xxxx
>113:   ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[0].xyzz
>114:   MUL TEMP[17].xyz, TEMP[16].xyzz, IMM[1].xxxx
>115:   DP3 TEMP[18].x, TEMP[17].xyzz, TEMP[17].xyzz
>116:   RSQ TEMP[19].x, TEMP[18].xxxx
>117:   MUL TEMP[20].xyz, TEMP[17].xyzz, TEMP[19].xxxx
>118:   DP3 TEMP[21].x, TEMP[15].xyzz, TEMP[1].xyzz
>119:   MOV_SAT TEMP[22].x, TEMP[21].xxxx
>120:   UMAD TEMP[23].x, TEMP[7].xxxx, IMM[3].zzzz, IMM[3].wwww
>121:   MUL TEMP[24].x, TEMP[12].xxxx, TEMP[14].xxxx
>122:   UMUL TEMP[25].x, TEMP[7].xxxx, IMM[3].zzzz
>123:   UARL ADDR[0].x, TEMP[25].xxxx
>124:   MUL TEMP[26].x, TEMP[24].xxxx, CONST[ADDR[0].x+11].wwww
>125:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>126:   ADD TEMP[28].x, IMM[0].xxxx, -TEMP[27].xxxx
>127:   UARL ADDR[0].x, TEMP[23].xxxx
>128:   MUL TEMP[29].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[28].xxxx
>129:   MUL TEMP[30].xyz, TEMP[29].xyzz, TEMP[4].yyyy
>130:   MUL TEMP[31].xyz, TEMP[22].xxxx, TEMP[30].xyzz
>131:   ADD TEMP[3].xyz, TEMP[3].xyzz, TEMP[31].xyzz
>132:   DP3 TEMP[32].x, TEMP[15].xyzz, TEMP[20].xyzz
>133:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>134:   ADD TEMP[34].x, IMM[0].xxxx, -TEMP[33].xxxx
>135:   POW TEMP[35].x, TEMP[34].xxxx, IMM[1].zzzz
>136:   MUL TEMP[36].xyz, TEMP[31].xyzz, TEMP[35].xxxx
>137:   ADD TEMP[37].x, TEMP[8].xxxx, IMM[0].yyyy
>138:   MUL TEMP[38].x, TEMP[37].xxxx, IMM[2].yyyy
>139:   MUL TEMP[39].x, -TEMP[8].xxxx, IMM[1].xxxx
>140:   EX2 TEMP[40].x, TEMP[39].xxxx
>141:   ADD TEMP[41].x, IMM[0].yyyy, -TEMP[40].xxxx
>142:   RCP TEMP[42].x, TEMP[41].xxxx
>143:   MUL TEMP[43].x, TEMP[38].xxxx, TEMP[42].xxxx
>144:   MUL TEMP[44].xyz, TEMP[36].xyzz, TEMP[43].xxxx
>145:   DP3 TEMP[45].x, TEMP[1].xyzz, TEMP[20].xyzz
>146:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>147:   POW TEMP[47].x, TEMP[46].xxxx, TEMP[8].xxxx
>148:   MUL TEMP[48].xyz, TEMP[44].xyzz, TEMP[47].xxxx
>149:   DP3 TEMP[49].x, TEMP[0].xyzz, TEMP[1].xyzz
>150:   MOV_SAT TEMP[50].x, TEMP[49].xxxx
>151:   MAX TEMP[51].x, TEMP[22].xxxx, TEMP[50].xxxx
>152:   ADD TEMP[52].x, TEMP[51].xxxx, IMM[2].zzzz
>153:   RCP TEMP[53].x, TEMP[52].xxxx
>154:   MUL TEMP[54].xyz, TEMP[48].xyzz, TEMP[53].xxxx
>155:   MAD TEMP[6].xyz, TEMP[54].xyzz, TEMP[5].yyyy, TEMP[6].xyzz
>156:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[3].wwww
>157: ENDLOOP :0
>158: MUL TEMP[0].xyz, TEMP[13].xyzz, TEMP[5].yyyy
>159: MAD TEMP[0].xyz, TEMP[3].xyzz, TEMP[2].xyzz, TEMP[0].xyzz
>160: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>161: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].wwww
>162: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>163: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].wwww
>164: RCP TEMP[2].x, TEMP[2].xxxx
>165: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>166: FRC TEMP[2].x, CONST[1].wwww
>167: MUL TEMP[2].x, TEMP[2].xxxx, IMM[4].xxxx
>168: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>169: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>170: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
>171: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>172: MOV TEMP[0].w, IN[0].wwww
>173: MOV OUT[0], TEMP[0]
>174: END
>radeonsi: Compiling shader 92
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %67 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %68 = load <8 x i32>, <8 x i32> addrspace(2)* %67, align 32, !invariant.load !0
>  %69 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %70 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %69, i64 0, i64 15, !amdgpu.uniform !0
>  %71 = load <4 x i32>, <4 x i32> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = extractelement <8 x i32> %68, i32 7
>  %73 = extractelement <4 x i32> %71, i32 0
>  %74 = and i32 %73, %72
>  %75 = insertelement <4 x i32> %71, i32 %74, i32 0
>  %76 = bitcast float %65 to i32
>  %77 = bitcast float %66 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %79, <8 x i32> %68, <4 x i32> %75, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %81 = extractelement <4 x float> %80, i32 0
>  %82 = extractelement <4 x float> %80, i32 1
>  %83 = extractelement <4 x float> %80, i32 2
>  %84 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %85 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %86 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %87 = load <8 x i32>, <8 x i32> addrspace(2)* %86, align 32, !invariant.load !0
>  %88 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %89 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %88, i64 0, i64 19, !amdgpu.uniform !0
>  %90 = load <4 x i32>, <4 x i32> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = extractelement <8 x i32> %87, i32 7
>  %92 = extractelement <4 x i32> %90, i32 0
>  %93 = and i32 %92, %91
>  %94 = insertelement <4 x i32> %90, i32 %93, i32 0
>  %95 = bitcast float %84 to i32
>  %96 = bitcast float %85 to i32
>  %97 = insertelement <2 x i32> undef, i32 %95, i32 0
>  %98 = insertelement <2 x i32> %97, i32 %96, i32 1
>  %99 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %98, <8 x i32> %87, <4 x i32> %94, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %100 = extractelement <4 x float> %99, i32 1
>  %101 = extractelement <4 x float> %99, i32 2
>  %102 = fmul float %60, %43
>  %103 = fmul float %62, %44
>  %104 = fadd float %103, %102
>  %105 = fmul float %64, %45
>  %106 = fadd float %104, %105
>  %107 = fmul float %106, %60
>  %108 = fmul float %106, %62
>  %109 = fmul float %106, %64
>  %110 = fmul float %107, 2.000000e+00
>  %111 = fmul float %108, 2.000000e+00
>  %112 = fmul float %109, 2.000000e+00
>  %113 = fsub float %43, %110
>  %114 = fsub float %44, %111
>  %115 = fsub float %45, %112
>  %116 = fmul float %113, %60
>  %117 = fmul float %114, %62
>  %118 = fadd float %117, %116
>  %119 = fmul float %115, %64
>  %120 = fadd float %118, %119
>  %121 = fadd float %120, 1.000000e+00
>  %122 = fmul float %43, %60
>  %123 = fmul float %44, %62
>  %124 = fadd float %123, %122
>  %125 = fmul float %45, %64
>  %126 = fadd float %124, %125
>  %127 = fsub float 1.000000e+00, %126
>  %128 = call float @llvm.AMDGPU.clamp.(float %127, float 0.000000e+00, float 1.000000e+00)
>  %129 = fsub float %121, %128
>  %130 = call float @llvm.AMDGPU.clamp.(float %129, float 0.000000e+00, float 1.000000e+00)
>  %131 = fsub float 1.000000e+00, %130
>  %132 = fmul float %131, %131
>  %133 = fmul float %100, %132
>  %134 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %135 = fmul float %60, 0x4007700140000000
>  %136 = fadd float %135, %134
>  %137 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %138 = fmul float %62, 0x4007700140000000
>  %139 = fadd float %138, %137
>  %140 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %141 = fmul float %64, 0x4007700140000000
>  %142 = fadd float %141, %140
>  %143 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %144 = load <16 x i8>, <16 x i8> addrspace(2)* %143, align 16, !invariant.load !0
>  %145 = call float @llvm.SI.load.const(<16 x i8> %144, i32 64)
>  %146 = fmul float %145, %136
>  %147 = call float @llvm.SI.load.const(<16 x i8> %144, i32 68)
>  %148 = fmul float %147, %136
>  %149 = call float @llvm.SI.load.const(<16 x i8> %144, i32 72)
>  %150 = fmul float %149, %136
>  %151 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %152 = load <16 x i8>, <16 x i8> addrspace(2)* %151, align 16, !invariant.load !0
>  %153 = call float @llvm.SI.load.const(<16 x i8> %152, i32 80)
>  %154 = fmul float %153, %139
>  %155 = fadd float %154, %146
>  %156 = call float @llvm.SI.load.const(<16 x i8> %152, i32 84)
>  %157 = fmul float %156, %139
>  %158 = fadd float %157, %148
>  %159 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %160 = load <16 x i8>, <16 x i8> addrspace(2)* %159, align 16, !invariant.load !0
>  %161 = call float @llvm.SI.load.const(<16 x i8> %160, i32 88)
>  %162 = fmul float %161, %139
>  %163 = fadd float %162, %150
>  %164 = call float @llvm.SI.load.const(<16 x i8> %160, i32 96)
>  %165 = fmul float %164, %142
>  %166 = fadd float %165, %155
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 100)
>  %170 = fmul float %169, %142
>  %171 = fadd float %170, %158
>  %172 = call float @llvm.SI.load.const(<16 x i8> %168, i32 104)
>  %173 = fmul float %172, %142
>  %174 = fadd float %173, %163
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 112)
>  %178 = fadd float %166, %177
>  %179 = call float @llvm.SI.load.const(<16 x i8> %176, i32 116)
>  %180 = fadd float %171, %179
>  %181 = call float @llvm.SI.load.const(<16 x i8> %176, i32 120)
>  %182 = fadd float %174, %181
>  %183 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %184 = load <16 x i8>, <16 x i8> addrspace(2)* %183, align 16, !invariant.load !0
>  %185 = call float @llvm.SI.load.const(<16 x i8> %184, i32 16)
>  %186 = call float @llvm.SI.load.const(<16 x i8> %184, i32 20)
>  %187 = call float @llvm.SI.load.const(<16 x i8> %184, i32 24)
>  %188 = fmul float %185, %60
>  %189 = fsub float -0.000000e+00, %188
>  %190 = fmul float %186, %62
>  %191 = fsub float %189, %190
>  %192 = fmul float %187, %64
>  %193 = fsub float %191, %192
>  %194 = call float @llvm.AMDGPU.clamp.(float %193, float 0.000000e+00, float 1.000000e+00)
>  %195 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %196 = load <8 x i32>, <8 x i32> addrspace(2)* %195, align 32, !invariant.load !0
>  %197 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %198 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %197, i64 0, i64 3, !amdgpu.uniform !0
>  %199 = load <4 x i32>, <4 x i32> addrspace(2)* %198, align 16, !invariant.load !0
>  %200 = extractelement <8 x i32> %196, i32 7
>  %201 = extractelement <4 x i32> %199, i32 0
>  %202 = and i32 %201, %200
>  %203 = insertelement <4 x i32> %199, i32 %202, i32 0
>  %204 = bitcast float %182 to i32
>  %205 = bitcast float %178 to i32
>  %206 = bitcast float %180 to i32
>  %207 = insertelement <4 x i32> undef, i32 %204, i32 0
>  %208 = insertelement <4 x i32> %207, i32 %205, i32 1
>  %209 = insertelement <4 x i32> %208, i32 %206, i32 2
>  %210 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %209, <8 x i32> %196, <4 x i32> %203, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %211 = extractelement <4 x float> %210, i32 0
>  %212 = fmul float %211, %211
>  %213 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %214 = load <16 x i8>, <16 x i8> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = call float @llvm.SI.load.const(<16 x i8> %214, i32 48)
>  %216 = fmul float %215, %212
>  %217 = call float @llvm.SI.load.const(<16 x i8> %214, i32 52)
>  %218 = fmul float %217, %212
>  %219 = call float @llvm.SI.load.const(<16 x i8> %214, i32 56)
>  %220 = fmul float %219, %212
>  %221 = fmul float %216, %100
>  %222 = fmul float %218, %100
>  %223 = fmul float %220, %100
>  %224 = fmul float %194, %221
>  %225 = fmul float %194, %222
>  %226 = fmul float %194, %223
>  %227 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %228 = load <8 x i32>, <8 x i32> addrspace(2)* %227, align 32, !invariant.load !0
>  %229 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %230 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %229, i64 0, i64 7, !amdgpu.uniform !0
>  %231 = load <4 x i32>, <4 x i32> addrspace(2)* %230, align 16, !invariant.load !0
>  %232 = extractelement <8 x i32> %228, i32 7
>  %233 = extractelement <4 x i32> %231, i32 0
>  %234 = and i32 %233, %232
>  %235 = insertelement <4 x i32> %231, i32 %234, i32 0
>  %236 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %237 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %238 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %239 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %240 = call float @llvm.fabs.f32(float %238)
>  %241 = fdiv float 1.000000e+00, %240, !fpmath !1
>  %242 = fmul float %236, %241
>  %243 = fadd float %242, 1.500000e+00
>  %244 = fmul float %237, %241
>  %245 = fadd float %244, 1.500000e+00
>  %246 = bitcast float %245 to i32
>  %247 = bitcast float %243 to i32
>  %248 = bitcast float %239 to i32
>  %249 = insertelement <4 x i32> undef, i32 %246, i32 0
>  %250 = insertelement <4 x i32> %249, i32 %247, i32 1
>  %251 = insertelement <4 x i32> %250, i32 %248, i32 2
>  %252 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %251, <8 x i32> %228, <4 x i32> %235, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %253 = extractelement <4 x float> %252, i32 0
>  %254 = extractelement <4 x float> %252, i32 1
>  %255 = extractelement <4 x float> %252, i32 2
>  %256 = extractelement <4 x float> %252, i32 3
>  %257 = fmul float %60, %43
>  %258 = fmul float %62, %44
>  %259 = fadd float %258, %257
>  %260 = fmul float %64, %45
>  %261 = fadd float %259, %260
>  %262 = fmul float %261, %60
>  %263 = fmul float %261, %62
>  %264 = fmul float %261, %64
>  %265 = fmul float %262, 2.000000e+00
>  %266 = fsub float %265, %43
>  %267 = fmul float %263, 2.000000e+00
>  %268 = fsub float %267, %44
>  %269 = fmul float %264, 2.000000e+00
>  %270 = fsub float %269, %45
>  %271 = fsub float 1.000000e+00, %101
>  %272 = fmul float %271, 6.000000e+00
>  %273 = fmul float %43, %60
>  %274 = fmul float %44, %62
>  %275 = fadd float %274, %273
>  %276 = fmul float %45, %64
>  %277 = fadd float %275, %276
>  %278 = call float @llvm.AMDGPU.clamp.(float %277, float 0.000000e+00, float 1.000000e+00)
>  %279 = fsub float 1.000000e+00, %278
>  %280 = call float @llvm.pow.f32(float %279, float 5.000000e+00)
>  %281 = call float @llvm.maxnum.f32(float %101, float 0.000000e+00)
>  %282 = call float @llvm.maxnum.f32(float %101, float 0.000000e+00)
>  %283 = call float @llvm.maxnum.f32(float %101, float 0.000000e+00)
>  %284 = fmul float %280, %281
>  %285 = fmul float %280, %282
>  %286 = fmul float %280, %283
>  %287 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %288 = load <8 x i32>, <8 x i32> addrspace(2)* %287, align 32, !invariant.load !0
>  %289 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %290 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %289, i64 0, i64 11, !amdgpu.uniform !0
>  %291 = load <4 x i32>, <4 x i32> addrspace(2)* %290, align 16, !invariant.load !0
>  %292 = extractelement <8 x i32> %288, i32 7
>  %293 = extractelement <4 x i32> %291, i32 0
>  %294 = and i32 %293, %292
>  %295 = insertelement <4 x i32> %291, i32 %294, i32 0
>  %296 = call float @llvm.amdgcn.cubetc(float %266, float %268, float %270)
>  %297 = call float @llvm.amdgcn.cubesc(float %266, float %268, float %270)
>  %298 = call float @llvm.amdgcn.cubema(float %266, float %268, float %270)
>  %299 = call float @llvm.amdgcn.cubeid(float %266, float %268, float %270)
>  %300 = call float @llvm.fabs.f32(float %298)
>  %301 = fdiv float 1.000000e+00, %300, !fpmath !1
>  %302 = fmul float %296, %301
>  %303 = fadd float %302, 1.500000e+00
>  %304 = fmul float %297, %301
>  %305 = fadd float %304, 1.500000e+00
>  %306 = bitcast float %305 to i32
>  %307 = bitcast float %303 to i32
>  %308 = bitcast float %299 to i32
>  %309 = bitcast float %272 to i32
>  %310 = insertelement <4 x i32> undef, i32 %306, i32 0
>  %311 = insertelement <4 x i32> %310, i32 %307, i32 1
>  %312 = insertelement <4 x i32> %311, i32 %308, i32 2
>  %313 = insertelement <4 x i32> %312, i32 %309, i32 3
>  %314 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %313, <8 x i32> %288, <4 x i32> %295, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %315 = extractelement <4 x float> %314, i32 0
>  %316 = extractelement <4 x float> %314, i32 1
>  %317 = extractelement <4 x float> %314, i32 2
>  %318 = fmul float %284, %315
>  %319 = fmul float %285, %316
>  %320 = fmul float %286, %317
>  %321 = fmul float %253, %256
>  %322 = fmul float %254, %256
>  %323 = fmul float %255, %256
>  %324 = fmul float %100, 4.000000e+00
>  %325 = fmul float %321, %324
>  %326 = fadd float %325, %224
>  %327 = fmul float %322, %324
>  %328 = fadd float %327, %225
>  %329 = fmul float %323, %324
>  %330 = fadd float %329, %226
>  %331 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %332 = load <16 x i8>, <16 x i8> addrspace(2)* %331, align 16
>  br label %loop101
>
>loop101:                                          ; preds = %endif105, %main_body
>  %333 = phi i32 [ 0, %main_body ], [ %400, %endif105 ]
>  %334 = phi i32 [ 0, %main_body ], [ %400, %endif105 ]
>  %335 = phi i32 [ 0, %main_body ], [ %400, %endif105 ]
>  %336 = phi i32 [ 0, %main_body ], [ %400, %endif105 ]
>  %337 = phi i32 [ 0, %main_body ], [ %400, %endif105 ]
>  %.08 = phi float [ %330, %main_body ], [ %399, %endif105 ]
>  %.07 = phi float [ %328, %main_body ], [ %398, %endif105 ]
>  %.0 = phi float [ %326, %main_body ], [ %397, %endif105 ]
>  %338 = icmp sgt i32 %333, 3
>  br i1 %338, label %endloop157, label %endif105
>
>endif105:                                         ; preds = %loop101
>  %339 = shl i32 %334, 5
>  %340 = shl i32 %334, 5
>  %341 = add i32 %340, 176
>  %342 = call float @llvm.SI.load.const(<16 x i8> %332, i32 %341)
>  %343 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %344 = fsub float %342, %343
>  %345 = shl i32 %334, 5
>  %346 = add i32 %345, 180
>  %347 = call float @llvm.SI.load.const(<16 x i8> %332, i32 %346)
>  %348 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %349 = fsub float %347, %348
>  %350 = add i32 %339, 184
>  %351 = call float @llvm.SI.load.const(<16 x i8> %332, i32 %350)
>  %352 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %353 = fsub float %351, %352
>  %354 = fmul float %344, %344
>  %355 = fmul float %349, %349
>  %356 = fadd float %355, %354
>  %357 = fmul float %353, %353
>  %358 = fadd float %356, %357
>  %359 = call float @llvm.sqrt.f32(float %358)
>  %360 = fdiv float 1.000000e+00, %359, !fpmath !1
>  %361 = fmul float %344, %360
>  %362 = fmul float %349, %360
>  %363 = fmul float %353, %360
>  %364 = fmul float %361, %60
>  %365 = fmul float %362, %62
>  %366 = fadd float %365, %364
>  %367 = fmul float %363, %64
>  %368 = fadd float %366, %367
>  %369 = call float @llvm.AMDGPU.clamp.(float %368, float 0.000000e+00, float 1.000000e+00)
>  %370 = shl i32 %335, 1
>  %371 = or i32 %370, 1
>  %372 = fmul float %358, %360
>  %373 = shl i32 %336, 5
>  %374 = add i32 %373, 188
>  %375 = call float @llvm.SI.load.const(<16 x i8> %332, i32 %374)
>  %376 = fmul float %372, %375
>  %377 = call float @llvm.AMDGPU.clamp.(float %376, float 0.000000e+00, float 1.000000e+00)
>  %378 = fsub float 1.000000e+00, %377
>  %379 = shl i32 %371, 4
>  %380 = add i32 %379, 176
>  %381 = call float @llvm.SI.load.const(<16 x i8> %332, i32 %380)
>  %382 = fmul float %381, %378
>  %383 = shl i32 %371, 4
>  %384 = add i32 %383, 180
>  %385 = call float @llvm.SI.load.const(<16 x i8> %332, i32 %384)
>  %386 = fmul float %385, %378
>  %387 = shl i32 %371, 4
>  %388 = add i32 %387, 184
>  %389 = call float @llvm.SI.load.const(<16 x i8> %332, i32 %388)
>  %390 = fmul float %389, %378
>  %391 = fmul float %382, %100
>  %392 = fmul float %386, %100
>  %393 = fmul float %390, %100
>  %394 = fmul float %369, %391
>  %395 = fmul float %369, %392
>  %396 = fmul float %369, %393
>  %397 = fadd float %.0, %394
>  %398 = fadd float %.07, %395
>  %399 = fadd float %.08, %396
>  %400 = add i32 %337, 1
>  br label %loop101
>
>endloop157:                                       ; preds = %loop101
>  %401 = fmul float %318, %133
>  %402 = fmul float %319, %133
>  %403 = fmul float %320, %133
>  %404 = fmul float %.0, %81
>  %405 = fadd float %404, %401
>  %406 = fmul float %.07, %82
>  %407 = fadd float %406, %402
>  %408 = fmul float %.08, %83
>  %409 = fadd float %408, %403
>  %410 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %411 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %412 = load <16 x i8>, <16 x i8> addrspace(2)* %411, align 16, !invariant.load !0
>  %413 = call float @llvm.SI.load.const(<16 x i8> %412, i32 12)
>  %414 = fsub float %410, %413
>  %415 = call float @llvm.maxnum.f32(float %414, float 0.000000e+00)
>  %416 = call float @llvm.SI.load.const(<16 x i8> %412, i32 28)
>  %417 = call float @llvm.SI.load.const(<16 x i8> %412, i32 12)
>  %418 = fsub float %416, %417
>  %419 = fadd float %418, 0x3F50624DE0000000
>  %420 = fdiv float 1.000000e+00, %419, !fpmath !1
>  %421 = fmul float %415, %420
>  %422 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %423 = load <16 x i8>, <16 x i8> addrspace(2)* %422, align 16, !invariant.load !0
>  %424 = call float @llvm.SI.load.const(<16 x i8> %423, i32 28)
>  %425 = call float @llvm.floor.f32(float %424)
>  %426 = fsub float %424, %425
>  %427 = fmul float %426, 8.000000e+00
>  %428 = call float @llvm.pow.f32(float %421, float %427)
>  %429 = call float @llvm.AMDGPU.clamp.(float %428, float 0.000000e+00, float 1.000000e+00)
>  %430 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %431 = fmul float %430, %429
>  %432 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %433 = load <16 x i8>, <16 x i8> addrspace(2)* %432, align 16, !invariant.load !0
>  %434 = call float @llvm.SI.load.const(<16 x i8> %433, i32 32)
>  %435 = fsub float 1.000000e+00, %431
>  %436 = fmul float %405, %431
>  %437 = fmul float %434, %435
>  %438 = fadd float %436, %437
>  %439 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %440 = load <16 x i8>, <16 x i8> addrspace(2)* %439, align 16, !invariant.load !0
>  %441 = call float @llvm.SI.load.const(<16 x i8> %440, i32 36)
>  %442 = fsub float 1.000000e+00, %431
>  %443 = fmul float %407, %431
>  %444 = fmul float %441, %442
>  %445 = fadd float %443, %444
>  %446 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %447 = load <16 x i8>, <16 x i8> addrspace(2)* %446, align 16, !invariant.load !0
>  %448 = call float @llvm.SI.load.const(<16 x i8> %447, i32 40)
>  %449 = fsub float 1.000000e+00, %431
>  %450 = fmul float %409, %431
>  %451 = fmul float %448, %449
>  %452 = fadd float %450, %451
>  %453 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %454 = bitcast float %5 to i32
>  %455 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %454, 10
>  %456 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %455, float %438, 11
>  %457 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %456, float %445, 12
>  %458 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %457, float %452, 13
>  %459 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %458, float %453, 14
>  %460 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %459, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %460
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen ; E00C2000 80030B05
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s21, s[0:3], 0x10                   ; C20A8110
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v6, s[4:7], 0 idxen     ; E00C2000 80010306
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s22, s[0:3], 0x11                   ; C20B0111
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mov_b32_e32 v0, s21                                   ; 7E000215
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	s_buffer_load_dword s23, s[0:3], 0x12                   ; C20B8112
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s19, s[0:3], 0x17                   ; C2098117
>	s_buffer_load_dword s20, s[0:3], 0xf                    ; C20A010F
>	s_buffer_load_dword s0, s[0:3], 0x13                    ; C2000113
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_sub_f32_e64 v1, 1.0, s0                               ; D2080001 000000F2
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mul_f32_e32 v14, s6, v7                               ; 101C0E06
>	v_mac_f32_e32 v14, s10, v8                              ; 3E1C100A
>	v_mac_f32_e32 v14, s14, v9                              ; 3E1C120E
>	v_mac_f32_e32 v14, s18, v10                             ; 3E1C1412
>	v_mac_f32_e32 v0, s22, v14                              ; 3E001C16
>	v_add_f32_e64 v0, v0, 0 clamp                           ; D2060800 00010100
>	v_log_f32_e32 v0, v0                                    ; 7E004F00
>	v_mul_f32_e32 v15, s7, v7                               ; 101E0E07
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v5, s4, v7                                ; 100A0E04
>	v_mul_f32_e32 v6, s5, v7                                ; 100C0E05
>	v_mac_f32_e32 v15, s11, v8                              ; 3E1E100B
>	v_mac_f32_e32 v5, s8, v8                                ; 3E0A1008
>	v_mac_f32_e32 v6, s9, v8                                ; 3E0C1009
>	v_mac_f32_e32 v15, s15, v9                              ; 3E1E120F
>	v_mul_legacy_f32_e32 v0, s23, v0                        ; 0E000017
>	v_mac_f32_e32 v5, s12, v9                               ; 3E0A120C
>	v_mac_f32_e32 v6, s13, v9                               ; 3E0C120D
>	v_exp_f32_e32 v0, v0                                    ; 7E004B00
>	v_mad_f32 v11, 2.0, v11, -1.0                           ; D282000B 03CE16F4
>	v_mad_f32 v12, 2.0, v12, -1.0                           ; D282000C 03CE18F4
>	v_mac_f32_e32 v15, s20, v10                             ; 3E1E1414
>	v_mac_f32_e32 v1, s0, v0                                ; 3E020000
>	v_mad_f32 v13, 2.0, v13, -1.0                           ; D282000D 03CE1AF4
>	v_mad_f32 v16, 0, v12, v11                              ; D2820010 042E1880
>	v_mad_f32 v17, 0, v11, v12                              ; D2820011 04321680
>	v_mac_f32_e32 v5, s16, v10                              ; 3E0A1410
>	v_mac_f32_e32 v6, s17, v10                              ; 3E0C1411
>	v_mul_f32_e32 v10, s19, v15                             ; 10141E13
>	v_mac_f32_e32 v16, 0, v13                               ; 3E201A80
>	v_mac_f32_e32 v17, 0, v13                               ; 3E221A80
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_mul_f32_e32 v0, v1, v1                                ; 10000301
>	exp 15, 32, 0, 0, 0, v7, v8, v9, v10                    ; F800020F 0A090807
>	v_mac_f32_e32 v13, 0, v11                               ; 3E1A1680
>	exp 15, 33, 0, 0, 0, v3, v4, v0, v0                     ; F800021F 00000403
>	exp 15, 34, 0, 0, 0, v16, v17, v13, v0                  ; F800022F 000D1110
>	exp 15, 12, 0, 1, 0, v5, v6, v14, v15                   ; F80008CF 0F0E0605
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 364 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v22, s8, v1                                       ; 082C0208
>	v_sub_f32_e32 v26, s9, v0                                       ; 08340009
>	v_mul_f32_e32 v7, v22, v22                                      ; 100E2D16
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_sub_f32_e32 v27, s12, v2                                      ; 0836040C
>	v_mac_f32_e32 v7, v26, v26                                      ; 3E0E351A
>	v_mac_f32_e32 v7, v27, v27                                      ; 3E0E371B
>	v_rsq_f32_e32 v28, v7                                           ; 7E385D07
>	v_interp_p1_f32 v7, v4, 0, 2, [m0]                              ; C81C0804
>	v_interp_p2_f32 v7, [v7], v5, 0, 2, [m0]                        ; C81D0805
>	v_interp_p1_f32 v8, v4, 1, 2, [m0]                              ; C8200904
>	v_interp_p2_f32 v8, [v8], v5, 1, 2, [m0]                        ; C8210905
>	v_interp_p1_f32 v10, v4, 2, 2, [m0]                             ; C8280A04
>	v_mul_f32_e32 v4, v7, v7                                        ; 10080F07
>	v_interp_p2_f32 v10, [v10], v5, 2, 2, [m0]                      ; C8290A05
>	v_mac_f32_e32 v4, v8, v8                                        ; 3E081108
>	v_mac_f32_e32 v4, v10, v10                                      ; 3E08150A
>	v_rsq_f32_e32 v16, v4                                           ; 7E205D04
>	v_mul_f32_e32 v9, v28, v22                                      ; 10122D1C
>	v_mul_f32_e32 v14, v28, v26                                     ; 101C351C
>	s_load_dwordx8 s[52:59], s[4:5], 0x30                           ; C0DA0530
>	v_mul_f32_e32 v4, v16, v7                                       ; 10080F10
>	s_load_dwordx4 s[60:63], s[4:5], 0x3c                           ; C09E053C
>	v_mul_f32_e32 v5, v16, v8                                       ; 100A1110
>	v_mul_f32_e32 v29, v9, v4                                       ; 103A0909
>	s_buffer_load_dword s9, s[0:3], 0x10                            ; C2048110
>	v_mac_f32_e32 v29, v14, v5                                      ; 3E3A0B0E
>	v_mul_f32_e32 v15, v28, v27                                     ; 101E371C
>	v_mul_f32_e32 v10, v16, v10                                     ; 10141510
>	v_mac_f32_e32 v29, v15, v10                                     ; 3E3A150F
>	v_interp_p1_f32 v11, v6, 0, 1, [m0]                             ; C82C0406
>	v_mul_f32_e32 v23, v4, v29                                      ; 102E3B04
>	v_mov_b32_e32 v14, 0x403b800a                                   ; 7E1C02FF 403B800A
>	v_interp_p2_f32 v11, [v11], v3, 0, 1, [m0]                      ; C82D0403
>	v_interp_p1_f32 v12, v6, 1, 1, [m0]                             ; C8300506
>	v_mac_f32_e32 v23, v4, v29                                      ; 3E2E3B04
>	v_mad_f32 v15, v14, v4, v1                                      ; D282000F 0406090E
>	v_mad_f32 v7, v22, v28, -v23                                    ; D2820007 845E3916
>	s_buffer_load_dword s8, s[0:3], 0x11                            ; C2040111
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v18, s9, v15                                      ; 10241E09
>	v_interp_p2_f32 v12, [v12], v3, 1, 1, [m0]                      ; C8310503
>	s_and_b32 s60, s60, s59                                         ; 873C3B3C
>	s_buffer_load_dword s9, s[0:3], 0x14                            ; C2048114
>	v_mul_f32_e32 v17, v4, v7                                       ; 10220F04
>	image_sample v[7:9], v[11:12], s[52:59], s[60:63] dmask:0x7     ; F0800700 01ED070B
>	s_buffer_load_dword s52, s[0:3], 0x12                           ; C21A0112
>	s_buffer_load_dword s53, s[0:3], 0x15                           ; C21A8115
>	v_mad_f32 v16, v14, v5, v0                                      ; D2820010 04020B0E
>	v_mul_f32_e32 v19, s8, v15                                      ; 10261E08
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v18, s9, v16                                      ; 3E242009
>	s_buffer_load_dword s54, s[0:3], 0x16                           ; C21B0116
>	s_buffer_load_dword s8, s[0:3], 0x18                            ; C2040118
>	s_buffer_load_dword s9, s[0:3], 0x19                            ; C2048119
>	v_mul_f32_e32 v20, s52, v15                                     ; 10281E34
>	v_mac_f32_e32 v19, s53, v16                                     ; 3E262035
>	s_buffer_load_dword s52, s[0:3], 0x1a                           ; C21A011A
>	s_buffer_load_dword s53, s[0:3], 0x1c                           ; C21A811C
>	s_buffer_load_dword s55, s[0:3], 0x1d                           ; C21B811D
>	v_mad_f32 v14, v14, v10, v2                                     ; D282000E 040A150E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v18, s8, v14                                      ; 3E241C08
>	v_mac_f32_e32 v20, s54, v16                                     ; 3E282036
>	v_mac_f32_e32 v19, s9, v14                                      ; 3E261C09
>	v_add_f32_e32 v15, s53, v18                                     ; 061E2435
>	v_add_f32_e32 v16, s55, v19                                     ; 06202637
>	v_mac_f32_e32 v20, s52, v14                                     ; 3E281C34
>	s_buffer_load_dword s8, s[0:3], 0x1e                            ; C204011E
>	s_load_dwordx8 s[32:39], s[4:5], 0x0                            ; C0D00500
>	s_load_dwordx4 s[40:43], s[4:5], 0xc                            ; C094050C
>	s_load_dwordx8 s[44:51], s[4:5], 0x40                           ; C0D60540
>	s_load_dwordx4 s[52:55], s[4:5], 0x4c                           ; C09A054C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v14, s8, v20                                      ; 061C2808
>	v_mul_f32_e32 v30, v5, v29                                      ; 103C3B05
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	v_mul_f32_e32 v31, v10, v29                                     ; 103E3B0A
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[11:12], v[11:12], s[44:51], s[52:55] dmask:0x6   ; F0800600 01AB0B0B
>	image_sample_c v14, v[14:17], s[32:39], s[40:43] dmask:0x1      ; F0A00100 01480E0E
>	v_cubema_f32 v15, v4, v5, v10                                   ; D28E000F 042A0B04
>	v_rcp_f32_e64 v15, |v15|                                        ; D354010F 0000010F
>	v_mac_f32_e32 v30, v5, v29                                      ; 3E3C3B05
>	v_cubetc_f32 v16, v4, v5, v10                                   ; D28C0010 042A0B04
>	v_mov_b32_e32 v18, 0x3fc00000                                   ; 7E2402FF 3FC00000
>	v_cubesc_f32 v19, v4, v5, v10                                   ; D28A0013 042A0B04
>	v_mad_f32 v20, v15, v16, v18                                    ; D2820014 044A210F
>	v_mad_f32 v19, v15, v19, v18                                    ; D2820013 044A270F
>	v_mad_f32 v15, v26, v28, -v30                                   ; D282000F 847A391A
>	v_mac_f32_e32 v31, v10, v29                                     ; 3E3E3B0A
>	v_mac_f32_e32 v17, v5, v15                                      ; 3E221F05
>	v_mad_f32 v15, v27, v28, -v31                                   ; D282000F 847E391B
>	v_mac_f32_e32 v17, v10, v15                                     ; 3E221F0A
>	v_sub_f32_e32 v16, 1.0, v29                                     ; 08203AF2
>	s_buffer_load_dword s64, s[0:3], 0x4                            ; C2200104
>	s_buffer_load_dword s65, s[0:3], 0x5                            ; C2208105
>	v_add_f32_e32 v15, 1.0, v17                                     ; 061E22F2
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	v_subrev_f32_e32 v15, v16, v15                                  ; 0A1E1F10
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	v_add_f32_e64 v15, v15, 0 clamp                                 ; D206080F 0001010F
>	s_buffer_load_dword s9, s[0:3], 0xc                             ; C204810C
>	s_buffer_load_dword s32, s[0:3], 0xd                            ; C210010D
>	s_buffer_load_dword s33, s[0:3], 0xe                            ; C210810E
>	v_sub_f32_e32 v16, 1.0, v15                                     ; 08201EF2
>	v_mad_f32 v17, -v15, v16, v16                                   ; D2820011 2442210F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v15, s64, v4                                      ; 101E0840
>	v_mad_f32 v15, -s65, v5, -v15                                   ; D282000F A43E0A41
>	v_mad_f32 v15, -s8, v10, v15                                    ; D282000F 243E1408
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v14, v14, v14                                     ; 101C1D0E
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                           ; C08E051C
>	v_add_f32_e64 v21, v15, 0 clamp                                 ; D2060815 0001010F
>	v_mul_f32_e32 v15, s9, v14                                      ; 101E1C09
>	v_mul_f32_e32 v16, s32, v14                                     ; 10201C20
>	v_mul_f32_e32 v14, s33, v14                                     ; 101C1C21
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                           ; C090052C
>	v_mul_f32_e32 v14, v11, v14                                     ; 101C1D0B
>	v_mul_f32_e32 v15, v11, v15                                     ; 101E1F0B
>	v_mul_f32_e32 v24, v11, v16                                     ; 1030210B
>	v_mul_f32_e32 v16, v15, v21                                     ; 10202B0F
>	v_mul_f32_e32 v15, v24, v21                                     ; 101E2B18
>	v_mul_f32_e32 v14, v14, v21                                     ; 101C2B0E
>	v_mul_f32_e32 v17, v17, v11                                     ; 10221711
>	v_cubeid_f32 v21, v4, v5, v10                                   ; D2880015 042A0B04
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	v_mad_f32 v32, -v22, v28, v23                                   ; D2820020 245E3916
>	image_sample v[22:25], v[19:22], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E51613
>	v_mad_f32 v19, -v26, v28, v30                                   ; D2820013 247A391A
>	v_add_f32_e64 v26, v29, 0 clamp                                 ; D206081A 0001011D
>	v_sub_f32_e32 v26, 1.0, v26                                     ; 083434F2
>	v_log_f32_e32 v26, v26                                          ; 7E344F1A
>	v_mov_b32_e32 v21, 0x40c00000                                   ; 7E2A02FF 40C00000
>	v_mad_f32 v20, -v27, v28, v31                                   ; D2820014 247E391B
>	v_mad_f32 v21, -v12, v21, v21                                   ; D2820015 24562B0C
>	v_mul_legacy_f32_e32 v26, 0x40a00000, v26                       ; 0E3434FF 40A00000
>	v_exp_f32_e32 v26, v26                                          ; 7E344B1A
>	v_max_f32_e32 v12, 0, v12                                       ; 20181880
>	v_mul_f32_e32 v26, v12, v26                                     ; 1034350C
>	v_cubema_f32 v12, v32, v19, v20                                 ; D28E000C 04522720
>	v_rcp_f32_e64 v12, |v12|                                        ; D354010C 0000010C
>	v_cubetc_f32 v27, v32, v19, v20                                 ; D28C001B 04522720
>	v_cubesc_f32 v28, v32, v19, v20                                 ; D28A001C 04522720
>	v_cubeid_f32 v20, v32, v19, v20                                 ; D2880014 04522720
>	v_mad_f32 v19, v12, v27, v18                                    ; D2820013 044A370C
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_mac_f32_e32 v18, v12, v28                                     ; 3E24390C
>	image_sample_l v[19:21], v[18:21], s[12:19], s[32:35] dmask:0x7 ; F0900700 01031312
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v12, v19, v26                                     ; 10183513
>	v_mul_f32_e32 v18, v20, v26                                     ; 10243514
>	v_mul_f32_e32 v19, v21, v26                                     ; 10263515
>	v_mul_f32_e32 v20, v25, v22                                     ; 10282D19
>	v_mul_f32_e32 v21, v25, v23                                     ; 102A2F19
>	v_mul_f32_e32 v23, 4.0, v11                                     ; 102E16F6
>	v_mul_f32_e32 v22, v25, v24                                     ; 102C3119
>	v_mac_f32_e32 v16, v23, v20                                     ; 3E202917
>	v_mac_f32_e32 v15, v23, v21                                     ; 3E1E2B17
>	v_mac_f32_e32 v14, v23, v22                                     ; 3E1C2D17
>	v_mov_b32_e32 v20, 0xc8                                         ; 7E2802FF 000000C8
>	v_mov_b32_e32 v21, 0                                            ; 7E2A0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v22, vcc, 0xffffffe8, v20                         ; 4A2C28FF FFFFFFE8
>	buffer_load_dword v22, v22, s[0:3], 0 offen                     ; E0301000 80001616
>	v_add_i32_e32 v23, vcc, 0xffffffec, v20                         ; 4A2E28FF FFFFFFEC
>	buffer_load_dword v23, v23, s[0:3], 0 offen                     ; E0301000 80001717
>	v_add_i32_e32 v24, vcc, -16, v20                                ; 4A3028D0
>	buffer_load_dword v24, v24, s[0:3], 0 offen                     ; E0301000 80001818
>	v_add_i32_e32 v27, vcc, -12, v20                                ; 4A3628CC
>	buffer_load_dword v27, v27, s[0:3], 0 offen                     ; E0301000 80001B1B
>	v_add_i32_e32 v28, vcc, -8, v20                                 ; 4A3828C8
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v21, vcc, 1, v21                                  ; 4A2A2A81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v22, v1, v22                                   ; 0A2C2D01
>	v_mul_f32_e32 v25, v22, v22                                     ; 10322D16
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v23, v0, v23                                   ; 0A2E2F00
>	v_mac_f32_e32 v25, v23, v23                                     ; 3E322F17
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v24, v2, v24                                   ; 0A303102
>	v_mac_f32_e32 v25, v24, v24                                     ; 3E323118
>	v_rsq_f32_e32 v26, v25                                          ; 7E345D19
>	v_mul_f32_e32 v22, v26, v22                                     ; 102C2D1A
>	v_mul_f32_e32 v25, v26, v25                                     ; 1032331A
>	v_mul_f32_e32 v23, v26, v23                                     ; 102E2F1A
>	v_mul_f32_e32 v24, v26, v24                                     ; 1030311A
>	v_add_i32_e32 v26, vcc, -4, v20                                 ; 4A3428C4
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v25, v27, v25                                     ; 1032331B
>	buffer_load_dword v27, v20, s[0:3], 0 offen                     ; E0301000 80001B14
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_mul_f32_e32 v22, v4, v22                                      ; 102C2D04
>	v_mac_f32_e32 v22, v5, v23                                      ; 3E2C2F05
>	v_add_f32_e64 v23, v25, 0 clamp                                 ; D2060817 00010119
>	v_mac_f32_e32 v22, v10, v24                                     ; 3E2C310A
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v24, -v23, v28, v28                                   ; D2820018 24723917
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_mul_f32_e32 v24, v11, v24                                     ; 1030310B
>	v_mac_f32_e32 v16, v24, v22                                     ; 3E202D18
>	v_add_i32_e32 v20, vcc, 32, v20                                 ; 4A2828A0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v25, -v23, v26, v26                                   ; D2820019 246A3517
>	v_mad_f32 v23, -v23, v27, v27                                   ; D2820017 246E3717
>	v_mul_f32_e32 v25, v11, v25                                     ; 1032330B
>	v_mul_f32_e32 v23, v11, v23                                     ; 102E2F0B
>	v_mac_f32_e32 v15, v25, v22                                     ; 3E1E2D19
>	v_mac_f32_e32 v14, v23, v22                                     ; 3E1C2D17
>	v_cmp_lt_i32_e32 vcc, 3, v21                                    ; 7D022A83
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v5, s4                                            ; 7E0A0204
>	v_sub_f32_e32 v5, s5, v5                                        ; 080A0A05
>	v_add_f32_e32 v5, 0x3a83126f, v5                                ; 060A0AFF 3A83126F
>	v_rcp_f32_e32 v5, v5                                            ; 7E0A5505
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_f32_e32 v0, v5, v0                                        ; 10000105
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_floor_f32_e32 v5, s5                                          ; 7E0A4805
>	v_sub_f32_e32 v5, s5, v5                                        ; 080A0A05
>	v_mul_f32_e32 v5, 0x41000000, v5                                ; 100A0AFF 41000000
>	v_mul_legacy_f32_e32 v0, v5, v0                                 ; 0E000105
>	v_interp_p1_f32 v5, v6, 2, 1, [m0]                              ; C8140606
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v5, [v5], v3, 2, 1, [m0]                        ; C8150603
>	v_mul_f32_e32 v1, v17, v12                                      ; 10021911
>	v_mul_f32_e32 v5, v0, v5                                        ; 100A0B00
>	v_mul_f32_e32 v2, v17, v18                                      ; 10042511
>	v_mac_f32_e32 v1, v7, v16                                       ; 3E022107
>	v_mad_f32 v0, -v5, s6, s6                                       ; D2820000 20180D05
>	v_mul_f32_e32 v4, v17, v19                                      ; 10082711
>	v_mac_f32_e32 v0, v5, v1                                        ; 3E000305
>	v_mac_f32_e32 v2, v8, v15                                       ; 3E041F08
>	v_mad_f32 v1, -v5, s7, s7                                       ; D2820001 201C0F05
>	v_mac_f32_e32 v1, v5, v2                                        ; 3E020505
>	v_mac_f32_e32 v4, v9, v14                                       ; 3E081D09
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v2, -v5, s0, s0                                       ; D2820002 20000105
>	v_mac_f32_e32 v2, v5, v4                                        ; 3E040905
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 72
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1380 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL OUT[4].xyz, GENERIC[3]
>DCL CONST[0..230]
>DCL TEMP[0..8], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>IMM[2] FLT32 {    0.5000,     0.0000,     0.0000,     0.0000}
>  0: F2I TEMP[0], IN[3]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MOV TEMP[2].xyz, IMM[0].zzzz
>  3: MOV TEMP[2].w, CONST[4].xxxx
>  4: MOV TEMP[3].xyz, IMM[0].zzzz
>  5: MOV TEMP[3].w, CONST[4].yyyy
>  6: MOV TEMP[4].xyz, IMM[0].zzzz
>  7: MOV TEMP[4].w, CONST[4].zzzz
>  8: NOT TEMP[5].x, CONST[227].xxxx
>  9: UIF TEMP[5].xxxx :0
> 10:   ADD TEMP[5], CONST[11], -TEMP[2]
> 11:   ADD TEMP[6], CONST[12], -TEMP[3]
> 12:   ADD TEMP[7], CONST[13], -TEMP[4]
> 13: ELSE :0
> 14:   NOT TEMP[8].x, CONST[228].xxxx
> 15:   UIF TEMP[8].xxxx :0
> 16:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 17:     UARL ADDR[0].x, TEMP[8].xxxx
> 18:     UARL ADDR[0].x, TEMP[8].xxxx
> 19:     ADD TEMP[5], CONST[ADDR[0].x+11], -TEMP[2]
> 20:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 21:     UARL ADDR[0].x, TEMP[8].xxxx
> 22:     UARL ADDR[0].x, TEMP[8].xxxx
> 23:     ADD TEMP[6], CONST[ADDR[0].x+11], -TEMP[3]
> 24:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 25:     UARL ADDR[0].x, TEMP[8].xxxx
> 26:     UARL ADDR[0].x, TEMP[8].xxxx
> 27:     ADD TEMP[7], CONST[ADDR[0].x+11], -TEMP[4]
> 28:   ELSE :0
> 29:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 30:     UARL ADDR[0].x, TEMP[8].xxxx
> 31:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[2]
> 32:     MUL TEMP[5], TEMP[8], IN[2].xxxx
> 33:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 34:     UARL ADDR[0].x, TEMP[8].xxxx
> 35:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[3]
> 36:     MUL TEMP[6], TEMP[8], IN[2].xxxx
> 37:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 38:     UARL ADDR[0].x, TEMP[8].xxxx
> 39:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[4]
> 40:     MUL TEMP[7], TEMP[8], IN[2].xxxx
> 41:     UMUL TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx
> 42:     UARL ADDR[0].x, TEMP[8].xxxx
> 43:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[2]
> 44:     MAD TEMP[5], TEMP[8], IN[2].yyyy, TEMP[5]
> 45:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 46:     UARL ADDR[0].x, TEMP[8].xxxx
> 47:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[3]
> 48:     MAD TEMP[6], TEMP[8], IN[2].yyyy, TEMP[6]
> 49:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 50:     UARL ADDR[0].x, TEMP[8].xxxx
> 51:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[4]
> 52:     MAD TEMP[7], TEMP[8], IN[2].yyyy, TEMP[7]
> 53:     UIF CONST[229].xxxx :0
> 54:       UMUL TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx
> 55:       UARL ADDR[0].x, TEMP[8].xxxx
> 56:       ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[2]
> 57:       MAD TEMP[5], TEMP[8], IN[2].zzzz, TEMP[5]
> 58:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 59:       UARL ADDR[0].x, TEMP[8].xxxx
> 60:       ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[3]
> 61:       MAD TEMP[6], TEMP[8], IN[2].zzzz, TEMP[6]
> 62:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 63:       UARL ADDR[0].x, TEMP[8].xxxx
> 64:       ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[4]
> 65:       MAD TEMP[7], TEMP[8], IN[2].zzzz, TEMP[7]
> 66:     ENDIF
> 67:     UIF CONST[230].xxxx :0
> 68:       UMUL TEMP[8].x, TEMP[0].wwww, IMM[1].xxxx
> 69:       UARL ADDR[0].x, TEMP[8].xxxx
> 70:       ADD TEMP[2], CONST[ADDR[0].x+11], -TEMP[2]
> 71:       MAD TEMP[5], TEMP[2], IN[2].wwww, TEMP[5]
> 72:       UMAD TEMP[2].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 73:       UARL ADDR[0].x, TEMP[2].xxxx
> 74:       ADD TEMP[2], CONST[ADDR[0].x+11], -TEMP[3]
> 75:       MAD TEMP[6], TEMP[2], IN[2].wwww, TEMP[6]
> 76:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 77:       UARL ADDR[0].x, TEMP[0].xxxx
> 78:       ADD TEMP[0], CONST[ADDR[0].x+11], -TEMP[4]
> 79:       MAD TEMP[7], TEMP[0], IN[2].wwww, TEMP[7]
> 80:     ENDIF
> 81:   ENDIF
> 82: ENDIF
> 83: DP4 TEMP[0].x, IN[0], TEMP[5]
> 84: DP4 TEMP[2].x, IN[0], TEMP[6]
> 85: MOV TEMP[0].y, TEMP[2].xxxx
> 86: DP4 TEMP[2].x, IN[0], TEMP[7]
> 87: MOV TEMP[0].z, TEMP[2].xxxx
> 88: DP4 TEMP[2].x, IN[0], IMM[0].zzzw
> 89: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 90: MUL TEMP[3], CONST[0], TEMP[0].xxxx
> 91: MAD TEMP[3], CONST[1], TEMP[0].yyyy, TEMP[3]
> 92: MAD TEMP[3], CONST[2], TEMP[0].zzzz, TEMP[3]
> 93: MAD TEMP[2], CONST[3], TEMP[2].xxxx, TEMP[3]
> 94: MOV TEMP[3].xyz, TEMP[0].xyzx
> 95: MUL TEMP[4].x, TEMP[2].wwww, CONST[6].wwww
> 96: MOV TEMP[3].w, TEMP[4].xxxx
> 97: MOV TEMP[4].x, CONST[7].wwww
> 98: MOV TEMP[4].y, CONST[8].wwww
> 99: MOV TEMP[4].z, CONST[9].wwww
>100: ADD TEMP[0].xyz, TEMP[0].xyzz, -TEMP[4].xyzz
>101: MUL TEMP[4].xyz, CONST[7].xyzz, TEMP[0].xxxx
>102: MAD TEMP[4].xyz, CONST[8].xyzz, TEMP[0].yyyy, TEMP[4].xyzz
>103: MAD TEMP[0].xyz, CONST[9].xyzz, TEMP[0].zzzz, TEMP[4].xyzz
>104: MOV TEMP[4].w, TEMP[0].zzzz
>105: MUL TEMP[8].xy, TEMP[0].xyyy, CONST[10].xyyy
>106: MAD TEMP[4].xy, IMM[2].xxxx, TEMP[0].zzzz, TEMP[8].xyyy
>107: MAD TEMP[0].x, TEMP[0].zzzz, CONST[10].zzzz, CONST[10].wwww
>108: MOV TEMP[4].z, TEMP[0].xxxx
>109: MAD TEMP[0].x, TEMP[2].zzzz, CONST[5].yyyy, CONST[5].xxxx
>110: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>111: POW TEMP[0].x, TEMP[0].xxxx, CONST[5].zzzz
>112: ADD TEMP[8].x, IMM[0].wwww, -CONST[5].wwww
>113: MAD TEMP[0].x, CONST[5].wwww, TEMP[0].xxxx, TEMP[8].xxxx
>114: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[5].xyzz
>115: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[6].xyzz
>116: MOV TEMP[5].y, TEMP[6].xxxx
>117: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[7].xyzz
>118: MOV TEMP[5].z, TEMP[1].xxxx
>119: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
>120: MOV TEMP[0].z, TEMP[0].xxxx
>121: MOV TEMP[0].xy, IN[4].xyxx
>122: MOV OUT[1], TEMP[3]
>123: MOV OUT[0], TEMP[2]
>124: MOV OUT[3].xyz, TEMP[0].xyzx
>125: MOV OUT[4].xyz, TEMP[5].xyzx
>126: MOV OUT[2], TEMP[4]
>127: END
>radeonsi: Compiling shader 93
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %19 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %20 = load <16 x i8>, <16 x i8> addrspace(2)* %19, align 16, !invariant.load !0
>  %21 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %20, i32 0, i32 %14)
>  %22 = extractelement <4 x float> %21, i32 0
>  %23 = extractelement <4 x float> %21, i32 1
>  %24 = extractelement <4 x float> %21, i32 2
>  %25 = extractelement <4 x float> %21, i32 3
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %27, i32 0, i32 %15)
>  %29 = extractelement <4 x float> %28, i32 0
>  %30 = extractelement <4 x float> %28, i32 1
>  %31 = extractelement <4 x float> %28, i32 2
>  %32 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %33 = load <16 x i8>, <16 x i8> addrspace(2)* %32, align 16, !invariant.load !0
>  %34 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %33, i32 0, i32 %16)
>  %35 = extractelement <4 x float> %34, i32 0
>  %36 = extractelement <4 x float> %34, i32 1
>  %37 = extractelement <4 x float> %34, i32 2
>  %38 = extractelement <4 x float> %34, i32 3
>  %39 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %40 = load <16 x i8>, <16 x i8> addrspace(2)* %39, align 16, !invariant.load !0
>  %41 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %40, i32 0, i32 %17)
>  %42 = extractelement <4 x float> %41, i32 0
>  %43 = extractelement <4 x float> %41, i32 1
>  %44 = extractelement <4 x float> %41, i32 2
>  %45 = extractelement <4 x float> %41, i32 3
>  %46 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %47 = load <16 x i8>, <16 x i8> addrspace(2)* %46, align 16, !invariant.load !0
>  %48 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %47, i32 0, i32 %18)
>  %49 = extractelement <4 x float> %48, i32 0
>  %50 = extractelement <4 x float> %48, i32 1
>  %51 = fptosi float %42 to i32
>  %52 = fptosi float %43 to i32
>  %53 = fptosi float %44 to i32
>  %54 = fptosi float %45 to i32
>  %55 = fmul float %29, 2.000000e+00
>  %56 = fadd float %55, -1.000000e+00
>  %57 = fmul float %30, 2.000000e+00
>  %58 = fadd float %57, -1.000000e+00
>  %59 = fmul float %31, 2.000000e+00
>  %60 = fadd float %59, -1.000000e+00
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call float @llvm.SI.load.const(<16 x i8> %62, i32 64)
>  %64 = call float @llvm.SI.load.const(<16 x i8> %62, i32 68)
>  %65 = call float @llvm.SI.load.const(<16 x i8> %62, i32 72)
>  %66 = call float @llvm.SI.load.const(<16 x i8> %62, i32 3632)
>  %67 = bitcast float %66 to i32
>  %68 = icmp eq i32 %67, -1
>  %69 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %70 = load <16 x i8>, <16 x i8> addrspace(2)* %69, align 16, !invariant.load !0
>  br i1 %68, label %else13, label %if9
>
>if9:                                              ; preds = %main_body
>  %71 = call float @llvm.SI.load.const(<16 x i8> %70, i32 176)
>  %72 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %73 = load <16 x i8>, <16 x i8> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = call float @llvm.SI.load.const(<16 x i8> %73, i32 180)
>  %75 = call float @llvm.SI.load.const(<16 x i8> %73, i32 184)
>  %76 = call float @llvm.SI.load.const(<16 x i8> %73, i32 188)
>  %77 = fsub float %76, %63
>  %78 = call float @llvm.SI.load.const(<16 x i8> %73, i32 192)
>  %79 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %80 = load <16 x i8>, <16 x i8> addrspace(2)* %79, align 16, !invariant.load !0
>  %81 = call float @llvm.SI.load.const(<16 x i8> %80, i32 196)
>  %82 = call float @llvm.SI.load.const(<16 x i8> %80, i32 200)
>  %83 = call float @llvm.SI.load.const(<16 x i8> %80, i32 204)
>  %84 = fsub float %83, %64
>  %85 = call float @llvm.SI.load.const(<16 x i8> %80, i32 208)
>  %86 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %87 = load <16 x i8>, <16 x i8> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = call float @llvm.SI.load.const(<16 x i8> %87, i32 212)
>  %89 = call float @llvm.SI.load.const(<16 x i8> %87, i32 216)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %87, i32 220)
>  %91 = fsub float %90, %65
>  br label %endif82
>
>else13:                                           ; preds = %main_body
>  %92 = call float @llvm.SI.load.const(<16 x i8> %70, i32 3648)
>  %93 = bitcast float %92 to i32
>  %94 = icmp eq i32 %93, -1
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = mul i32 %51, 48
>  %98 = add i32 %97, 176
>  %99 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %98)
>  %100 = mul i32 %51, 48
>  %101 = add i32 %100, 180
>  %102 = call float @llvm.SI.load.const(<16 x i8> %96, i32 %101)
>  %103 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %104 = load <16 x i8>, <16 x i8> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = mul i32 %51, 48
>  %106 = add i32 %105, 184
>  %107 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %106)
>  %108 = mul i32 %51, 48
>  %109 = add i32 %108, 188
>  %110 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %109)
>  %111 = fsub float %110, %63
>  br i1 %94, label %else28, label %if15
>
>if15:                                             ; preds = %else13
>  %112 = mul i32 %51, 3
>  %113 = add i32 %112, 1
>  %114 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %115 = load <16 x i8>, <16 x i8> addrspace(2)* %114, align 16, !invariant.load !0
>  %116 = shl i32 %113, 4
>  %117 = add i32 %116, 176
>  %118 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %117)
>  %119 = shl i32 %113, 4
>  %120 = add i32 %119, 180
>  %121 = call float @llvm.SI.load.const(<16 x i8> %115, i32 %120)
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = shl i32 %113, 4
>  %125 = add i32 %124, 184
>  %126 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %125)
>  %127 = shl i32 %113, 4
>  %128 = add i32 %127, 188
>  %129 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %128)
>  %130 = fsub float %129, %64
>  %131 = mul i32 %51, 3
>  %132 = add i32 %131, 2
>  %133 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %134 = load <16 x i8>, <16 x i8> addrspace(2)* %133, align 16, !invariant.load !0
>  %135 = shl i32 %132, 4
>  %136 = add i32 %135, 176
>  %137 = call float @llvm.SI.load.const(<16 x i8> %134, i32 %136)
>  %138 = shl i32 %132, 4
>  %139 = add i32 %138, 180
>  %140 = call float @llvm.SI.load.const(<16 x i8> %134, i32 %139)
>  %141 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %142 = load <16 x i8>, <16 x i8> addrspace(2)* %141, align 16, !invariant.load !0
>  %143 = shl i32 %132, 4
>  %144 = add i32 %143, 184
>  %145 = call float @llvm.SI.load.const(<16 x i8> %142, i32 %144)
>  %146 = shl i32 %132, 4
>  %147 = add i32 %146, 188
>  %148 = call float @llvm.SI.load.const(<16 x i8> %142, i32 %147)
>  %149 = fsub float %148, %65
>  br label %endif82
>
>else28:                                           ; preds = %else13
>  %150 = fmul float %99, %35
>  %151 = fmul float %102, %35
>  %152 = fmul float %107, %35
>  %153 = fmul float %111, %35
>  %154 = mul i32 %51, 3
>  %155 = add i32 %154, 1
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = shl i32 %155, 4
>  %159 = add i32 %158, 176
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 %159)
>  %161 = shl i32 %155, 4
>  %162 = add i32 %161, 180
>  %163 = call float @llvm.SI.load.const(<16 x i8> %157, i32 %162)
>  %164 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %165 = load <16 x i8>, <16 x i8> addrspace(2)* %164, align 16, !invariant.load !0
>  %166 = shl i32 %155, 4
>  %167 = add i32 %166, 184
>  %168 = call float @llvm.SI.load.const(<16 x i8> %165, i32 %167)
>  %169 = shl i32 %155, 4
>  %170 = add i32 %169, 188
>  %171 = call float @llvm.SI.load.const(<16 x i8> %165, i32 %170)
>  %172 = fsub float %171, %64
>  %173 = fmul float %160, %35
>  %174 = fmul float %163, %35
>  %175 = fmul float %168, %35
>  %176 = fmul float %172, %35
>  %177 = mul i32 %51, 3
>  %178 = add i32 %177, 2
>  %179 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %180 = load <16 x i8>, <16 x i8> addrspace(2)* %179, align 16, !invariant.load !0
>  %181 = shl i32 %178, 4
>  %182 = add i32 %181, 176
>  %183 = call float @llvm.SI.load.const(<16 x i8> %180, i32 %182)
>  %184 = shl i32 %178, 4
>  %185 = add i32 %184, 180
>  %186 = call float @llvm.SI.load.const(<16 x i8> %180, i32 %185)
>  %187 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %188 = load <16 x i8>, <16 x i8> addrspace(2)* %187, align 16, !invariant.load !0
>  %189 = shl i32 %178, 4
>  %190 = add i32 %189, 184
>  %191 = call float @llvm.SI.load.const(<16 x i8> %188, i32 %190)
>  %192 = shl i32 %178, 4
>  %193 = add i32 %192, 188
>  %194 = call float @llvm.SI.load.const(<16 x i8> %188, i32 %193)
>  %195 = fsub float %194, %65
>  %196 = fmul float %183, %35
>  %197 = fmul float %186, %35
>  %198 = fmul float %191, %35
>  %199 = fmul float %195, %35
>  %200 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %201 = load <16 x i8>, <16 x i8> addrspace(2)* %200, align 16, !invariant.load !0
>  %202 = mul i32 %52, 48
>  %203 = add i32 %202, 176
>  %204 = call float @llvm.SI.load.const(<16 x i8> %201, i32 %203)
>  %205 = mul i32 %52, 48
>  %206 = add i32 %205, 180
>  %207 = call float @llvm.SI.load.const(<16 x i8> %201, i32 %206)
>  %208 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %209 = load <16 x i8>, <16 x i8> addrspace(2)* %208, align 16, !invariant.load !0
>  %210 = mul i32 %52, 48
>  %211 = add i32 %210, 184
>  %212 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %211)
>  %213 = mul i32 %52, 48
>  %214 = add i32 %213, 188
>  %215 = call float @llvm.SI.load.const(<16 x i8> %209, i32 %214)
>  %216 = fsub float %215, %63
>  %217 = fmul float %204, %36
>  %218 = fadd float %217, %150
>  %219 = fmul float %207, %36
>  %220 = fadd float %219, %151
>  %221 = fmul float %212, %36
>  %222 = fadd float %221, %152
>  %223 = fmul float %216, %36
>  %224 = fadd float %223, %153
>  %225 = mul i32 %52, 3
>  %226 = add i32 %225, 1
>  %227 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %228 = load <16 x i8>, <16 x i8> addrspace(2)* %227, align 16, !invariant.load !0
>  %229 = shl i32 %226, 4
>  %230 = add i32 %229, 176
>  %231 = call float @llvm.SI.load.const(<16 x i8> %228, i32 %230)
>  %232 = shl i32 %226, 4
>  %233 = add i32 %232, 180
>  %234 = call float @llvm.SI.load.const(<16 x i8> %228, i32 %233)
>  %235 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %236 = load <16 x i8>, <16 x i8> addrspace(2)* %235, align 16, !invariant.load !0
>  %237 = shl i32 %226, 4
>  %238 = add i32 %237, 184
>  %239 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %238)
>  %240 = shl i32 %226, 4
>  %241 = add i32 %240, 188
>  %242 = call float @llvm.SI.load.const(<16 x i8> %236, i32 %241)
>  %243 = fsub float %242, %64
>  %244 = fmul float %231, %36
>  %245 = fadd float %244, %173
>  %246 = fmul float %234, %36
>  %247 = fadd float %246, %174
>  %248 = fmul float %239, %36
>  %249 = fadd float %248, %175
>  %250 = fmul float %243, %36
>  %251 = fadd float %250, %176
>  %252 = mul i32 %52, 3
>  %253 = add i32 %252, 2
>  %254 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %255 = load <16 x i8>, <16 x i8> addrspace(2)* %254, align 16, !invariant.load !0
>  %256 = shl i32 %253, 4
>  %257 = add i32 %256, 176
>  %258 = call float @llvm.SI.load.const(<16 x i8> %255, i32 %257)
>  %259 = shl i32 %253, 4
>  %260 = add i32 %259, 180
>  %261 = call float @llvm.SI.load.const(<16 x i8> %255, i32 %260)
>  %262 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %263 = load <16 x i8>, <16 x i8> addrspace(2)* %262, align 16, !invariant.load !0
>  %264 = shl i32 %253, 4
>  %265 = add i32 %264, 184
>  %266 = call float @llvm.SI.load.const(<16 x i8> %263, i32 %265)
>  %267 = shl i32 %253, 4
>  %268 = add i32 %267, 188
>  %269 = call float @llvm.SI.load.const(<16 x i8> %263, i32 %268)
>  %270 = fsub float %269, %65
>  %271 = fmul float %258, %36
>  %272 = fadd float %271, %196
>  %273 = fmul float %261, %36
>  %274 = fadd float %273, %197
>  %275 = fmul float %266, %36
>  %276 = fadd float %275, %198
>  %277 = fmul float %270, %36
>  %278 = fadd float %277, %199
>  %279 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %280 = load <16 x i8>, <16 x i8> addrspace(2)* %279, align 16, !invariant.load !0
>  %281 = call float @llvm.SI.load.const(<16 x i8> %280, i32 3664)
>  %282 = bitcast float %281 to i32
>  %283 = icmp eq i32 %282, 0
>  br i1 %283, label %endif66, label %if53
>
>if53:                                             ; preds = %else28
>  %284 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %285 = load <16 x i8>, <16 x i8> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = mul i32 %53, 48
>  %287 = add i32 %286, 176
>  %288 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %287)
>  %289 = mul i32 %53, 48
>  %290 = add i32 %289, 180
>  %291 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %290)
>  %292 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %293 = load <16 x i8>, <16 x i8> addrspace(2)* %292, align 16, !invariant.load !0
>  %294 = mul i32 %53, 48
>  %295 = add i32 %294, 184
>  %296 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %295)
>  %297 = mul i32 %53, 48
>  %298 = add i32 %297, 188
>  %299 = call float @llvm.SI.load.const(<16 x i8> %293, i32 %298)
>  %300 = fsub float %299, %63
>  %301 = fmul float %288, %37
>  %302 = fadd float %301, %218
>  %303 = fmul float %291, %37
>  %304 = fadd float %303, %220
>  %305 = fmul float %296, %37
>  %306 = fadd float %305, %222
>  %307 = fmul float %300, %37
>  %308 = fadd float %307, %224
>  %309 = mul i32 %53, 3
>  %310 = add i32 %309, 1
>  %311 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %312 = load <16 x i8>, <16 x i8> addrspace(2)* %311, align 16, !invariant.load !0
>  %313 = shl i32 %310, 4
>  %314 = add i32 %313, 176
>  %315 = call float @llvm.SI.load.const(<16 x i8> %312, i32 %314)
>  %316 = shl i32 %310, 4
>  %317 = add i32 %316, 180
>  %318 = call float @llvm.SI.load.const(<16 x i8> %312, i32 %317)
>  %319 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %320 = load <16 x i8>, <16 x i8> addrspace(2)* %319, align 16, !invariant.load !0
>  %321 = shl i32 %310, 4
>  %322 = add i32 %321, 184
>  %323 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %322)
>  %324 = shl i32 %310, 4
>  %325 = add i32 %324, 188
>  %326 = call float @llvm.SI.load.const(<16 x i8> %320, i32 %325)
>  %327 = fsub float %326, %64
>  %328 = fmul float %315, %37
>  %329 = fadd float %328, %245
>  %330 = fmul float %318, %37
>  %331 = fadd float %330, %247
>  %332 = fmul float %323, %37
>  %333 = fadd float %332, %249
>  %334 = fmul float %327, %37
>  %335 = fadd float %334, %251
>  %336 = mul i32 %53, 3
>  %337 = add i32 %336, 2
>  %338 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %339 = load <16 x i8>, <16 x i8> addrspace(2)* %338, align 16, !invariant.load !0
>  %340 = shl i32 %337, 4
>  %341 = add i32 %340, 176
>  %342 = call float @llvm.SI.load.const(<16 x i8> %339, i32 %341)
>  %343 = shl i32 %337, 4
>  %344 = add i32 %343, 180
>  %345 = call float @llvm.SI.load.const(<16 x i8> %339, i32 %344)
>  %346 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %347 = load <16 x i8>, <16 x i8> addrspace(2)* %346, align 16, !invariant.load !0
>  %348 = shl i32 %337, 4
>  %349 = add i32 %348, 184
>  %350 = call float @llvm.SI.load.const(<16 x i8> %347, i32 %349)
>  %351 = shl i32 %337, 4
>  %352 = add i32 %351, 188
>  %353 = call float @llvm.SI.load.const(<16 x i8> %347, i32 %352)
>  %354 = fsub float %353, %65
>  %355 = fmul float %342, %37
>  %356 = fadd float %355, %272
>  %357 = fmul float %345, %37
>  %358 = fadd float %357, %274
>  %359 = fmul float %350, %37
>  %360 = fadd float %359, %276
>  %361 = fmul float %354, %37
>  %362 = fadd float %361, %278
>  br label %endif66
>
>endif66:                                          ; preds = %else28, %if53
>  %.0101 = phi float [ %302, %if53 ], [ %218, %else28 ]
>  %.097 = phi float [ %304, %if53 ], [ %220, %else28 ]
>  %.093 = phi float [ %306, %if53 ], [ %222, %else28 ]
>  %.089 = phi float [ %308, %if53 ], [ %224, %else28 ]
>  %.085 = phi float [ %329, %if53 ], [ %245, %else28 ]
>  %.081 = phi float [ %331, %if53 ], [ %247, %else28 ]
>  %.077 = phi float [ %333, %if53 ], [ %249, %else28 ]
>  %.073 = phi float [ %335, %if53 ], [ %251, %else28 ]
>  %.069 = phi float [ %356, %if53 ], [ %272, %else28 ]
>  %.065 = phi float [ %358, %if53 ], [ %274, %else28 ]
>  %.061 = phi float [ %360, %if53 ], [ %276, %else28 ]
>  %.0 = phi float [ %362, %if53 ], [ %278, %else28 ]
>  %363 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %364 = load <16 x i8>, <16 x i8> addrspace(2)* %363, align 16, !invariant.load !0
>  %365 = call float @llvm.SI.load.const(<16 x i8> %364, i32 3680)
>  %366 = bitcast float %365 to i32
>  %367 = icmp eq i32 %366, 0
>  br i1 %367, label %endif82, label %if67
>
>if67:                                             ; preds = %endif66
>  %368 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %369 = load <16 x i8>, <16 x i8> addrspace(2)* %368, align 16, !invariant.load !0
>  %370 = mul i32 %54, 48
>  %371 = add i32 %370, 176
>  %372 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %371)
>  %373 = mul i32 %54, 48
>  %374 = add i32 %373, 180
>  %375 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %374)
>  %376 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %377 = load <16 x i8>, <16 x i8> addrspace(2)* %376, align 16, !invariant.load !0
>  %378 = mul i32 %54, 48
>  %379 = add i32 %378, 184
>  %380 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %379)
>  %381 = mul i32 %54, 48
>  %382 = add i32 %381, 188
>  %383 = call float @llvm.SI.load.const(<16 x i8> %377, i32 %382)
>  %384 = fsub float %383, %63
>  %385 = fmul float %372, %38
>  %386 = fadd float %385, %.0101
>  %387 = fmul float %375, %38
>  %388 = fadd float %387, %.097
>  %389 = fmul float %380, %38
>  %390 = fadd float %389, %.093
>  %391 = fmul float %384, %38
>  %392 = fadd float %391, %.089
>  %393 = mul i32 %54, 3
>  %394 = add i32 %393, 1
>  %395 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %396 = load <16 x i8>, <16 x i8> addrspace(2)* %395, align 16, !invariant.load !0
>  %397 = shl i32 %394, 4
>  %398 = add i32 %397, 176
>  %399 = call float @llvm.SI.load.const(<16 x i8> %396, i32 %398)
>  %400 = shl i32 %394, 4
>  %401 = add i32 %400, 180
>  %402 = call float @llvm.SI.load.const(<16 x i8> %396, i32 %401)
>  %403 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %404 = load <16 x i8>, <16 x i8> addrspace(2)* %403, align 16, !invariant.load !0
>  %405 = shl i32 %394, 4
>  %406 = add i32 %405, 184
>  %407 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %406)
>  %408 = shl i32 %394, 4
>  %409 = add i32 %408, 188
>  %410 = call float @llvm.SI.load.const(<16 x i8> %404, i32 %409)
>  %411 = fsub float %410, %64
>  %412 = fmul float %399, %38
>  %413 = fadd float %412, %.085
>  %414 = fmul float %402, %38
>  %415 = fadd float %414, %.081
>  %416 = fmul float %407, %38
>  %417 = fadd float %416, %.077
>  %418 = fmul float %411, %38
>  %419 = fadd float %418, %.073
>  %420 = mul i32 %54, 3
>  %421 = add i32 %420, 2
>  %422 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %423 = load <16 x i8>, <16 x i8> addrspace(2)* %422, align 16, !invariant.load !0
>  %424 = shl i32 %421, 4
>  %425 = add i32 %424, 176
>  %426 = call float @llvm.SI.load.const(<16 x i8> %423, i32 %425)
>  %427 = shl i32 %421, 4
>  %428 = add i32 %427, 180
>  %429 = call float @llvm.SI.load.const(<16 x i8> %423, i32 %428)
>  %430 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %431 = load <16 x i8>, <16 x i8> addrspace(2)* %430, align 16, !invariant.load !0
>  %432 = shl i32 %421, 4
>  %433 = add i32 %432, 184
>  %434 = call float @llvm.SI.load.const(<16 x i8> %431, i32 %433)
>  %435 = shl i32 %421, 4
>  %436 = add i32 %435, 188
>  %437 = call float @llvm.SI.load.const(<16 x i8> %431, i32 %436)
>  %438 = fsub float %437, %65
>  %439 = fmul float %426, %38
>  %440 = fadd float %439, %.069
>  %441 = fmul float %429, %38
>  %442 = fadd float %441, %.065
>  %443 = fmul float %434, %38
>  %444 = fadd float %443, %.061
>  %445 = fmul float %438, %38
>  %446 = fadd float %445, %.0
>  br label %endif82
>
>endif82:                                          ; preds = %endif66, %if15, %if67, %if9
>  %.3104 = phi float [ %71, %if9 ], [ %99, %if15 ], [ %386, %if67 ], [ %.0101, %endif66 ]
>  %.3100 = phi float [ %74, %if9 ], [ %102, %if15 ], [ %388, %if67 ], [ %.097, %endif66 ]
>  %.396 = phi float [ %75, %if9 ], [ %107, %if15 ], [ %390, %if67 ], [ %.093, %endif66 ]
>  %.392 = phi float [ %77, %if9 ], [ %111, %if15 ], [ %392, %if67 ], [ %.089, %endif66 ]
>  %.388 = phi float [ %78, %if9 ], [ %118, %if15 ], [ %413, %if67 ], [ %.085, %endif66 ]
>  %.384 = phi float [ %81, %if9 ], [ %121, %if15 ], [ %415, %if67 ], [ %.081, %endif66 ]
>  %.380 = phi float [ %82, %if9 ], [ %126, %if15 ], [ %417, %if67 ], [ %.077, %endif66 ]
>  %.376 = phi float [ %84, %if9 ], [ %130, %if15 ], [ %419, %if67 ], [ %.073, %endif66 ]
>  %.372 = phi float [ %85, %if9 ], [ %137, %if15 ], [ %440, %if67 ], [ %.069, %endif66 ]
>  %.368 = phi float [ %88, %if9 ], [ %140, %if15 ], [ %442, %if67 ], [ %.065, %endif66 ]
>  %.364 = phi float [ %89, %if9 ], [ %145, %if15 ], [ %444, %if67 ], [ %.061, %endif66 ]
>  %.3 = phi float [ %91, %if9 ], [ %149, %if15 ], [ %446, %if67 ], [ %.0, %endif66 ]
>  %447 = fmul float %22, %.3104
>  %448 = fmul float %23, %.3100
>  %449 = fadd float %447, %448
>  %450 = fmul float %24, %.396
>  %451 = fadd float %449, %450
>  %452 = fmul float %25, %.392
>  %453 = fadd float %451, %452
>  %454 = fmul float %22, %.388
>  %455 = fmul float %23, %.384
>  %456 = fadd float %454, %455
>  %457 = fmul float %24, %.380
>  %458 = fadd float %456, %457
>  %459 = fmul float %25, %.376
>  %460 = fadd float %458, %459
>  %461 = fmul float %22, %.372
>  %462 = fmul float %23, %.368
>  %463 = fadd float %461, %462
>  %464 = fmul float %24, %.364
>  %465 = fadd float %463, %464
>  %466 = fmul float %25, %.3
>  %467 = fadd float %465, %466
>  %468 = fmul float %22, 0.000000e+00
>  %469 = fmul float %23, 0.000000e+00
>  %470 = fadd float %468, %469
>  %471 = fmul float %24, 0.000000e+00
>  %472 = fadd float %470, %471
>  %473 = fadd float %472, %25
>  %474 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %475 = load <16 x i8>, <16 x i8> addrspace(2)* %474, align 16, !invariant.load !0
>  %476 = call float @llvm.SI.load.const(<16 x i8> %475, i32 64)
>  %477 = fadd float %453, %476
>  %478 = call float @llvm.SI.load.const(<16 x i8> %475, i32 68)
>  %479 = fadd float %460, %478
>  %480 = call float @llvm.SI.load.const(<16 x i8> %475, i32 72)
>  %481 = fadd float %467, %480
>  %482 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %483 = load <16 x i8>, <16 x i8> addrspace(2)* %482, align 16, !invariant.load !0
>  %484 = call float @llvm.SI.load.const(<16 x i8> %483, i32 0)
>  %485 = fmul float %484, %477
>  %486 = call float @llvm.SI.load.const(<16 x i8> %483, i32 4)
>  %487 = fmul float %486, %477
>  %488 = call float @llvm.SI.load.const(<16 x i8> %483, i32 8)
>  %489 = fmul float %488, %477
>  %490 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %491 = load <16 x i8>, <16 x i8> addrspace(2)* %490, align 16, !invariant.load !0
>  %492 = call float @llvm.SI.load.const(<16 x i8> %491, i32 12)
>  %493 = fmul float %492, %477
>  %494 = call float @llvm.SI.load.const(<16 x i8> %491, i32 16)
>  %495 = fmul float %494, %479
>  %496 = fadd float %495, %485
>  %497 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %498 = load <16 x i8>, <16 x i8> addrspace(2)* %497, align 16, !invariant.load !0
>  %499 = call float @llvm.SI.load.const(<16 x i8> %498, i32 20)
>  %500 = fmul float %499, %479
>  %501 = fadd float %500, %487
>  %502 = call float @llvm.SI.load.const(<16 x i8> %498, i32 24)
>  %503 = fmul float %502, %479
>  %504 = fadd float %503, %489
>  %505 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %506 = load <16 x i8>, <16 x i8> addrspace(2)* %505, align 16, !invariant.load !0
>  %507 = call float @llvm.SI.load.const(<16 x i8> %506, i32 28)
>  %508 = fmul float %507, %479
>  %509 = fadd float %508, %493
>  %510 = call float @llvm.SI.load.const(<16 x i8> %506, i32 32)
>  %511 = fmul float %510, %481
>  %512 = fadd float %511, %496
>  %513 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %514 = load <16 x i8>, <16 x i8> addrspace(2)* %513, align 16, !invariant.load !0
>  %515 = call float @llvm.SI.load.const(<16 x i8> %514, i32 36)
>  %516 = fmul float %515, %481
>  %517 = fadd float %516, %501
>  %518 = call float @llvm.SI.load.const(<16 x i8> %514, i32 40)
>  %519 = fmul float %518, %481
>  %520 = fadd float %519, %504
>  %521 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %522 = load <16 x i8>, <16 x i8> addrspace(2)* %521, align 16, !invariant.load !0
>  %523 = call float @llvm.SI.load.const(<16 x i8> %522, i32 44)
>  %524 = fmul float %523, %481
>  %525 = fadd float %524, %509
>  %526 = call float @llvm.SI.load.const(<16 x i8> %522, i32 48)
>  %527 = fmul float %526, %473
>  %528 = fadd float %527, %512
>  %529 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %530 = load <16 x i8>, <16 x i8> addrspace(2)* %529, align 16, !invariant.load !0
>  %531 = call float @llvm.SI.load.const(<16 x i8> %530, i32 52)
>  %532 = fmul float %531, %473
>  %533 = fadd float %532, %517
>  %534 = call float @llvm.SI.load.const(<16 x i8> %530, i32 56)
>  %535 = fmul float %534, %473
>  %536 = fadd float %535, %520
>  %537 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %538 = load <16 x i8>, <16 x i8> addrspace(2)* %537, align 16, !invariant.load !0
>  %539 = call float @llvm.SI.load.const(<16 x i8> %538, i32 60)
>  %540 = fmul float %539, %473
>  %541 = fadd float %540, %525
>  %542 = call float @llvm.SI.load.const(<16 x i8> %538, i32 108)
>  %543 = fmul float %541, %542
>  %544 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %545 = load <16 x i8>, <16 x i8> addrspace(2)* %544, align 16, !invariant.load !0
>  %546 = call float @llvm.SI.load.const(<16 x i8> %545, i32 124)
>  %547 = call float @llvm.SI.load.const(<16 x i8> %545, i32 140)
>  %548 = call float @llvm.SI.load.const(<16 x i8> %545, i32 156)
>  %549 = fsub float %477, %546
>  %550 = fsub float %479, %547
>  %551 = fsub float %481, %548
>  %552 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %553 = load <16 x i8>, <16 x i8> addrspace(2)* %552, align 16, !invariant.load !0
>  %554 = call float @llvm.SI.load.const(<16 x i8> %553, i32 112)
>  %555 = fmul float %554, %549
>  %556 = call float @llvm.SI.load.const(<16 x i8> %553, i32 116)
>  %557 = fmul float %556, %549
>  %558 = call float @llvm.SI.load.const(<16 x i8> %553, i32 120)
>  %559 = fmul float %558, %549
>  %560 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %561 = load <16 x i8>, <16 x i8> addrspace(2)* %560, align 16, !invariant.load !0
>  %562 = call float @llvm.SI.load.const(<16 x i8> %561, i32 128)
>  %563 = fmul float %562, %550
>  %564 = fadd float %563, %555
>  %565 = call float @llvm.SI.load.const(<16 x i8> %561, i32 132)
>  %566 = fmul float %565, %550
>  %567 = fadd float %566, %557
>  %568 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %569 = load <16 x i8>, <16 x i8> addrspace(2)* %568, align 16, !invariant.load !0
>  %570 = call float @llvm.SI.load.const(<16 x i8> %569, i32 136)
>  %571 = fmul float %570, %550
>  %572 = fadd float %571, %559
>  %573 = call float @llvm.SI.load.const(<16 x i8> %569, i32 144)
>  %574 = fmul float %573, %551
>  %575 = fadd float %574, %564
>  %576 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %577 = load <16 x i8>, <16 x i8> addrspace(2)* %576, align 16, !invariant.load !0
>  %578 = call float @llvm.SI.load.const(<16 x i8> %577, i32 148)
>  %579 = fmul float %578, %551
>  %580 = fadd float %579, %567
>  %581 = call float @llvm.SI.load.const(<16 x i8> %577, i32 152)
>  %582 = fmul float %581, %551
>  %583 = fadd float %582, %572
>  %584 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %585 = load <16 x i8>, <16 x i8> addrspace(2)* %584, align 16, !invariant.load !0
>  %586 = call float @llvm.SI.load.const(<16 x i8> %585, i32 160)
>  %587 = fmul float %575, %586
>  %588 = call float @llvm.SI.load.const(<16 x i8> %585, i32 164)
>  %589 = fmul float %580, %588
>  %590 = fmul float %583, 5.000000e-01
>  %591 = fadd float %590, %587
>  %592 = fmul float %583, 5.000000e-01
>  %593 = fadd float %592, %589
>  %594 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %595 = load <16 x i8>, <16 x i8> addrspace(2)* %594, align 16, !invariant.load !0
>  %596 = call float @llvm.SI.load.const(<16 x i8> %595, i32 168)
>  %597 = call float @llvm.SI.load.const(<16 x i8> %595, i32 172)
>  %598 = fmul float %583, %596
>  %599 = fadd float %598, %597
>  %600 = call float @llvm.SI.load.const(<16 x i8> %595, i32 84)
>  %601 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %602 = load <16 x i8>, <16 x i8> addrspace(2)* %601, align 16, !invariant.load !0
>  %603 = call float @llvm.SI.load.const(<16 x i8> %602, i32 80)
>  %604 = fmul float %536, %600
>  %605 = fadd float %604, %603
>  %606 = call float @llvm.AMDGPU.clamp.(float %605, float 0.000000e+00, float 1.000000e+00)
>  %607 = call float @llvm.SI.load.const(<16 x i8> %602, i32 88)
>  %608 = call float @llvm.pow.f32(float %606, float %607)
>  %609 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %610 = load <16 x i8>, <16 x i8> addrspace(2)* %609, align 16, !invariant.load !0
>  %611 = call float @llvm.SI.load.const(<16 x i8> %610, i32 92)
>  %612 = fsub float 1.000000e+00, %611
>  %613 = call float @llvm.SI.load.const(<16 x i8> %610, i32 92)
>  %614 = fmul float %613, %608
>  %615 = fadd float %614, %612
>  %616 = fmul float %56, %.3104
>  %617 = fmul float %58, %.3100
>  %618 = fadd float %617, %616
>  %619 = fmul float %60, %.396
>  %620 = fadd float %618, %619
>  %621 = fmul float %56, %.388
>  %622 = fmul float %58, %.384
>  %623 = fadd float %622, %621
>  %624 = fmul float %60, %.380
>  %625 = fadd float %623, %624
>  %626 = fmul float %56, %.372
>  %627 = fmul float %58, %.368
>  %628 = fadd float %627, %626
>  %629 = fmul float %60, %.364
>  %630 = fadd float %628, %629
>  %631 = fmul float %615, %615
>  %632 = bitcast i32 %12 to float
>  %633 = insertvalue <{ float, float, float }> undef, float %632, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %477, float %479, float %481, float %543)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %591, float %593, float %599, float %583)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %49, float %50, float %631, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %620, float %625, float %630, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %528, float %533, float %536, float %541)
>  ret <{ float, float, float }> %633
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE
>DCL IN[3].xyz, GENERIC[3], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..19]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,     2.9297,     6.0000}
>IMM[1] FLT32 {    4.0000,     0.0000,    -0.5000,     5.0000}
>IMM[2] FLT32 {    0.0010,     8.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[3].xyzz, IN[3].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[3].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xy, IN[2].xyyy
>  8: TEX TEMP[2].yz, TEMP[2], SAMP[5], 2D
>  9: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[0].xyzz
> 10: MUL TEMP[3].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 11: MUL TEMP[3].xyz, IMM[0].yyyy, TEMP[3].xyzz
> 12: ADD TEMP[3].xyz, TEMP[0].xyzz, -TEMP[3].xyzz
> 13: DP3 TEMP[3].x, TEMP[3].xyzz, TEMP[1].xyzz
> 14: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].xxxx
> 15: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[1].xyzz
> 16: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 17: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 18: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[4].xxxx
> 19: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 20: ADD TEMP[3].x, IMM[0].xxxx, -TEMP[3].xxxx
> 21: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[3].x, TEMP[2].yyyy, TEMP[3].xxxx
> 23: MAD TEMP[4].xyz, IMM[0].zzzz, TEMP[1].xyzz, IN[0].xyzz
> 24: MUL TEMP[5], CONST[4], TEMP[4].xxxx
> 25: MAD TEMP[5], CONST[5], TEMP[4].yyyy, TEMP[5]
> 26: MAD TEMP[4], CONST[6], TEMP[4].zzzz, TEMP[5]
> 27: ADD TEMP[4].xyz, TEMP[4], CONST[7]
> 28: MOV TEMP[5].xy, TEMP[4].xyyy
> 29: MOV TEMP[5].w, IMM[0].xxxx
> 30: MOV TEMP[5].z, TEMP[4].zzzz
> 31: TXP TEMP[4].x, TEMP[5], SAMP[0], SHADOW2D
> 32: MOV TEMP[5].xyz, TEMP[1].xyzz
> 33: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 34: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[0].xyzz
> 35: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 36: MAD TEMP[6].xyz, IMM[0].yyyy, TEMP[6].xyzz, -TEMP[0].xyzz
> 37: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[2].zzzz
> 38: MUL TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 39: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 40: MUL TEMP[8].x, IMM[1].xxxx, TEMP[2].yyyy
> 41: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[1].xyzz
> 42: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 43: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 44: MUL TEMP[4].xyz, CONST[3].xyzz, TEMP[4].xxxx
> 45: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[2].yyyy
> 46: MUL TEMP[4].xyz, TEMP[9].xxxx, TEMP[4].xyzz
> 47: MAD TEMP[4].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[4].xyzz
> 48: ADD TEMP[5].xyz, CONST[11].xyzz, -IN[0].xyzz
> 49: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 50: RSQ TEMP[9].x, TEMP[8].xxxx
> 51: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 52: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 53: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 54: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 55: MUL TEMP[8].x, TEMP[8].xxxx, CONST[11].wwww
> 56: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 57: ADD TEMP[8].x, IMM[0].xxxx, -TEMP[8].xxxx
> 58: MUL TEMP[8].xyz, CONST[12].xyzz, TEMP[8].xxxx
> 59: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[2].yyyy
> 60: MAD TEMP[4].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[4].xyzz
> 61: ADD TEMP[5].xyz, CONST[13].xyzz, -IN[0].xyzz
> 62: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 63: RSQ TEMP[9].x, TEMP[8].xxxx
> 64: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 65: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 66: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 67: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 68: MUL TEMP[8].x, TEMP[8].xxxx, CONST[13].wwww
> 69: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 70: ADD TEMP[8].x, IMM[0].xxxx, -TEMP[8].xxxx
> 71: MUL TEMP[8].xyz, CONST[14].xyzz, TEMP[8].xxxx
> 72: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[2].yyyy
> 73: MAD TEMP[4].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[4].xyzz
> 74: MOV TEMP[5].x, CONST[15].wwww
> 75: MOV TEMP[5].y, CONST[16].wwww
> 76: MOV TEMP[5].z, CONST[17].wwww
> 77: ADD TEMP[5].xyz, TEMP[5].xyzz, -IN[0].xyzz
> 78: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 79: SQRT TEMP[8].x, TEMP[8].xxxx
> 80: MOV TEMP[9].yz, IMM[1].yyyy
> 81: MAD TEMP[9].x, TEMP[8].xxxx, CONST[18].zzzz, CONST[18].wwww
> 82: MOV TEMP[10].yz, IMM[1].yyyy
> 83: MOV TEMP[10].x, IN[1].zzzz
> 84: MOV TEMP[11].yz, IMM[1].yyyy
> 85: MOV TEMP[12].xy, IN[1].xyyy
> 86: MOV TEMP[12].w, IN[1].wwww
> 87: TXP TEMP[12].w, TEMP[12], SAMP[3], 2D
> 88: MUL TEMP[11].x, TEMP[12].wwww, TEMP[12].wwww
> 89: RCP TEMP[8].x, TEMP[8].xxxx
> 90: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[8].xxxx
> 91: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 92: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 93: ADD TEMP[8].xyz, TEMP[9].xyzz, IMM[1].zzzz
> 94: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[0].yyyy
> 95: ADD TEMP[8].xyz, IMM[0].xxxx, -TEMP[8].xyzz
> 96: MOV_SAT TEMP[8].xyz, TEMP[8].xyzz
> 97: MUL TEMP[8].xyz, TEMP[11].xyzz, TEMP[8].xyzz
> 98: MOV_SAT TEMP[9].xyz, TEMP[10].xyzz
> 99: MUL TEMP[8].x, TEMP[8].xyzz, TEMP[9].xyzz
>100: MUL TEMP[8].xyz, CONST[19].xyzz, TEMP[8].xxxx
>101: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[2].yyyy
>102: MAD TEMP[4].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[4].xyzz
>103: MOV TEMP[5].xy, IN[2].xyyy
>104: TEX TEMP[5].xyz, TEMP[5], SAMP[4], 2D
>105: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[1].xyzz
>106: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>107: ADD TEMP[0].x, IMM[0].xxxx, -TEMP[0].xxxx
>108: POW TEMP[0].x, TEMP[0].xxxx, IMM[1].wwww
>109: MAX TEMP[1].xyz, TEMP[2].zzzz, IMM[1].yyyy
>110: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[1].xyzz
>111: MOV TEMP[1].xyz, TEMP[6].xyzz
>112: MOV TEMP[1].w, TEMP[7].xxxx
>113: TXL TEMP[1].xyz, TEMP[1], SAMP[2], CUBE
>114: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>115: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx
>116: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[5].xyzz, TEMP[0].xyzz
>117: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>118: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].yyyy
>119: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>120: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].xxxx
>121: RCP TEMP[2].x, TEMP[2].xxxx
>122: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>123: FRC TEMP[2].x, CONST[1].wwww
>124: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].yyyy
>125: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>126: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>127: MUL TEMP[1].x, IN[2].zzzz, TEMP[1].xxxx
>128: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>129: MOV TEMP[0].w, IN[0].wwww
>130: MOV OUT[0], TEMP[0]
>131: END
>radeonsi: Compiling shader 94
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %67 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %68 = load <8 x i32>, <8 x i32> addrspace(2)* %67, align 32, !invariant.load !0
>  %69 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %70 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %69, i64 0, i64 23, !amdgpu.uniform !0
>  %71 = load <4 x i32>, <4 x i32> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = extractelement <8 x i32> %68, i32 7
>  %73 = extractelement <4 x i32> %71, i32 0
>  %74 = and i32 %73, %72
>  %75 = insertelement <4 x i32> %71, i32 %74, i32 0
>  %76 = bitcast float %65 to i32
>  %77 = bitcast float %66 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %79, <8 x i32> %68, <4 x i32> %75, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %81 = extractelement <4 x float> %80, i32 1
>  %82 = extractelement <4 x float> %80, i32 2
>  %83 = fmul float %60, %43
>  %84 = fmul float %62, %44
>  %85 = fadd float %84, %83
>  %86 = fmul float %64, %45
>  %87 = fadd float %85, %86
>  %88 = fmul float %87, %60
>  %89 = fmul float %87, %62
>  %90 = fmul float %87, %64
>  %91 = fmul float %88, 2.000000e+00
>  %92 = fmul float %89, 2.000000e+00
>  %93 = fmul float %90, 2.000000e+00
>  %94 = fsub float %43, %91
>  %95 = fsub float %44, %92
>  %96 = fsub float %45, %93
>  %97 = fmul float %94, %60
>  %98 = fmul float %95, %62
>  %99 = fadd float %98, %97
>  %100 = fmul float %96, %64
>  %101 = fadd float %99, %100
>  %102 = fadd float %101, 1.000000e+00
>  %103 = fmul float %43, %60
>  %104 = fmul float %44, %62
>  %105 = fadd float %104, %103
>  %106 = fmul float %45, %64
>  %107 = fadd float %105, %106
>  %108 = fsub float 1.000000e+00, %107
>  %109 = call float @llvm.AMDGPU.clamp.(float %108, float 0.000000e+00, float 1.000000e+00)
>  %110 = fsub float %102, %109
>  %111 = call float @llvm.AMDGPU.clamp.(float %110, float 0.000000e+00, float 1.000000e+00)
>  %112 = fsub float 1.000000e+00, %111
>  %113 = fmul float %112, %112
>  %114 = fmul float %81, %113
>  %115 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %116 = fmul float %60, 0x4007700140000000
>  %117 = fadd float %116, %115
>  %118 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %119 = fmul float %62, 0x4007700140000000
>  %120 = fadd float %119, %118
>  %121 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %122 = fmul float %64, 0x4007700140000000
>  %123 = fadd float %122, %121
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 64)
>  %127 = fmul float %126, %117
>  %128 = call float @llvm.SI.load.const(<16 x i8> %125, i32 68)
>  %129 = fmul float %128, %117
>  %130 = call float @llvm.SI.load.const(<16 x i8> %125, i32 72)
>  %131 = fmul float %130, %117
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 80)
>  %135 = fmul float %134, %120
>  %136 = fadd float %135, %127
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 84)
>  %138 = fmul float %137, %120
>  %139 = fadd float %138, %129
>  %140 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %141 = load <16 x i8>, <16 x i8> addrspace(2)* %140, align 16, !invariant.load !0
>  %142 = call float @llvm.SI.load.const(<16 x i8> %141, i32 88)
>  %143 = fmul float %142, %120
>  %144 = fadd float %143, %131
>  %145 = call float @llvm.SI.load.const(<16 x i8> %141, i32 96)
>  %146 = fmul float %145, %123
>  %147 = fadd float %146, %136
>  %148 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %149 = load <16 x i8>, <16 x i8> addrspace(2)* %148, align 16, !invariant.load !0
>  %150 = call float @llvm.SI.load.const(<16 x i8> %149, i32 100)
>  %151 = fmul float %150, %123
>  %152 = fadd float %151, %139
>  %153 = call float @llvm.SI.load.const(<16 x i8> %149, i32 104)
>  %154 = fmul float %153, %123
>  %155 = fadd float %154, %144
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = call float @llvm.SI.load.const(<16 x i8> %157, i32 112)
>  %159 = fadd float %147, %158
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 116)
>  %161 = fadd float %152, %160
>  %162 = call float @llvm.SI.load.const(<16 x i8> %157, i32 120)
>  %163 = fadd float %155, %162
>  %164 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %165 = load <8 x i32>, <8 x i32> addrspace(2)* %164, align 32, !invariant.load !0
>  %166 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %167 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %166, i64 0, i64 3, !amdgpu.uniform !0
>  %168 = load <4 x i32>, <4 x i32> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = extractelement <8 x i32> %165, i32 7
>  %170 = extractelement <4 x i32> %168, i32 0
>  %171 = and i32 %170, %169
>  %172 = insertelement <4 x i32> %168, i32 %171, i32 0
>  %173 = bitcast float %163 to i32
>  %174 = bitcast float %159 to i32
>  %175 = bitcast float %161 to i32
>  %176 = insertelement <4 x i32> undef, i32 %173, i32 0
>  %177 = insertelement <4 x i32> %176, i32 %174, i32 1
>  %178 = insertelement <4 x i32> %177, i32 %175, i32 2
>  %179 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %178, <8 x i32> %165, <4 x i32> %172, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %180 = extractelement <4 x float> %179, i32 0
>  %181 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %182 = load <8 x i32>, <8 x i32> addrspace(2)* %181, align 32, !invariant.load !0
>  %183 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %184 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %183, i64 0, i64 7, !amdgpu.uniform !0
>  %185 = load <4 x i32>, <4 x i32> addrspace(2)* %184, align 16, !invariant.load !0
>  %186 = extractelement <8 x i32> %182, i32 7
>  %187 = extractelement <4 x i32> %185, i32 0
>  %188 = and i32 %187, %186
>  %189 = insertelement <4 x i32> %185, i32 %188, i32 0
>  %190 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %191 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %192 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %193 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %194 = call float @llvm.fabs.f32(float %192)
>  %195 = fdiv float 1.000000e+00, %194, !fpmath !1
>  %196 = fmul float %190, %195
>  %197 = fadd float %196, 1.500000e+00
>  %198 = fmul float %191, %195
>  %199 = fadd float %198, 1.500000e+00
>  %200 = bitcast float %199 to i32
>  %201 = bitcast float %197 to i32
>  %202 = bitcast float %193 to i32
>  %203 = insertelement <4 x i32> undef, i32 %200, i32 0
>  %204 = insertelement <4 x i32> %203, i32 %201, i32 1
>  %205 = insertelement <4 x i32> %204, i32 %202, i32 2
>  %206 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %205, <8 x i32> %182, <4 x i32> %189, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %207 = extractelement <4 x float> %206, i32 0
>  %208 = extractelement <4 x float> %206, i32 1
>  %209 = extractelement <4 x float> %206, i32 2
>  %210 = extractelement <4 x float> %206, i32 3
>  %211 = fmul float %60, %43
>  %212 = fmul float %62, %44
>  %213 = fadd float %212, %211
>  %214 = fmul float %64, %45
>  %215 = fadd float %213, %214
>  %216 = fmul float %215, %60
>  %217 = fmul float %215, %62
>  %218 = fmul float %215, %64
>  %219 = fmul float %216, 2.000000e+00
>  %220 = fsub float %219, %43
>  %221 = fmul float %217, 2.000000e+00
>  %222 = fsub float %221, %44
>  %223 = fmul float %218, 2.000000e+00
>  %224 = fsub float %223, %45
>  %225 = fsub float 1.000000e+00, %82
>  %226 = fmul float %225, 6.000000e+00
>  %227 = fmul float %207, %210
>  %228 = fmul float %208, %210
>  %229 = fmul float %209, %210
>  %230 = fmul float %81, 4.000000e+00
>  %231 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %232 = load <16 x i8>, <16 x i8> addrspace(2)* %231, align 16, !invariant.load !0
>  %233 = call float @llvm.SI.load.const(<16 x i8> %232, i32 16)
>  %234 = call float @llvm.SI.load.const(<16 x i8> %232, i32 20)
>  %235 = call float @llvm.SI.load.const(<16 x i8> %232, i32 24)
>  %236 = fmul float %233, %60
>  %237 = fsub float -0.000000e+00, %236
>  %238 = fmul float %234, %62
>  %239 = fsub float %237, %238
>  %240 = fmul float %235, %64
>  %241 = fsub float %239, %240
>  %242 = call float @llvm.AMDGPU.clamp.(float %241, float 0.000000e+00, float 1.000000e+00)
>  %243 = fmul float %180, %180
>  %244 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %245 = load <16 x i8>, <16 x i8> addrspace(2)* %244, align 16, !invariant.load !0
>  %246 = call float @llvm.SI.load.const(<16 x i8> %245, i32 48)
>  %247 = fmul float %246, %243
>  %248 = call float @llvm.SI.load.const(<16 x i8> %245, i32 52)
>  %249 = fmul float %248, %243
>  %250 = call float @llvm.SI.load.const(<16 x i8> %245, i32 56)
>  %251 = fmul float %250, %243
>  %252 = fmul float %247, %81
>  %253 = fmul float %249, %81
>  %254 = fmul float %251, %81
>  %255 = fmul float %242, %252
>  %256 = fmul float %242, %253
>  %257 = fmul float %242, %254
>  %258 = fmul float %227, %230
>  %259 = fadd float %258, %255
>  %260 = fmul float %228, %230
>  %261 = fadd float %260, %256
>  %262 = fmul float %229, %230
>  %263 = fadd float %262, %257
>  %264 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %265 = load <16 x i8>, <16 x i8> addrspace(2)* %264, align 16, !invariant.load !0
>  %266 = call float @llvm.SI.load.const(<16 x i8> %265, i32 176)
>  %267 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %268 = fsub float %266, %267
>  %269 = call float @llvm.SI.load.const(<16 x i8> %265, i32 180)
>  %270 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %271 = fsub float %269, %270
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 184)
>  %275 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %276 = fsub float %274, %275
>  %277 = fmul float %268, %268
>  %278 = fmul float %271, %271
>  %279 = fadd float %278, %277
>  %280 = fmul float %276, %276
>  %281 = fadd float %279, %280
>  %282 = call float @llvm.sqrt.f32(float %281)
>  %283 = fdiv float 1.000000e+00, %282, !fpmath !1
>  %284 = fmul float %268, %283
>  %285 = fmul float %271, %283
>  %286 = fmul float %276, %283
>  %287 = fmul float %284, %60
>  %288 = fmul float %285, %62
>  %289 = fadd float %288, %287
>  %290 = fmul float %286, %64
>  %291 = fadd float %289, %290
>  %292 = call float @llvm.AMDGPU.clamp.(float %291, float 0.000000e+00, float 1.000000e+00)
>  %293 = fmul float %281, %283
>  %294 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %295 = load <16 x i8>, <16 x i8> addrspace(2)* %294, align 16, !invariant.load !0
>  %296 = call float @llvm.SI.load.const(<16 x i8> %295, i32 188)
>  %297 = fmul float %293, %296
>  %298 = call float @llvm.AMDGPU.clamp.(float %297, float 0.000000e+00, float 1.000000e+00)
>  %299 = fsub float 1.000000e+00, %298
>  %300 = call float @llvm.SI.load.const(<16 x i8> %295, i32 192)
>  %301 = fmul float %300, %299
>  %302 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %303 = load <16 x i8>, <16 x i8> addrspace(2)* %302, align 16, !invariant.load !0
>  %304 = call float @llvm.SI.load.const(<16 x i8> %303, i32 196)
>  %305 = fmul float %304, %299
>  %306 = call float @llvm.SI.load.const(<16 x i8> %303, i32 200)
>  %307 = fmul float %306, %299
>  %308 = fmul float %301, %81
>  %309 = fmul float %305, %81
>  %310 = fmul float %307, %81
>  %311 = fmul float %292, %308
>  %312 = fadd float %311, %259
>  %313 = fmul float %292, %309
>  %314 = fadd float %313, %261
>  %315 = fmul float %292, %310
>  %316 = fadd float %315, %263
>  %317 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %318 = load <16 x i8>, <16 x i8> addrspace(2)* %317, align 16, !invariant.load !0
>  %319 = call float @llvm.SI.load.const(<16 x i8> %318, i32 208)
>  %320 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %321 = fsub float %319, %320
>  %322 = call float @llvm.SI.load.const(<16 x i8> %318, i32 212)
>  %323 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %324 = fsub float %322, %323
>  %325 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %326 = load <16 x i8>, <16 x i8> addrspace(2)* %325, align 16, !invariant.load !0
>  %327 = call float @llvm.SI.load.const(<16 x i8> %326, i32 216)
>  %328 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %329 = fsub float %327, %328
>  %330 = fmul float %321, %321
>  %331 = fmul float %324, %324
>  %332 = fadd float %331, %330
>  %333 = fmul float %329, %329
>  %334 = fadd float %332, %333
>  %335 = call float @llvm.sqrt.f32(float %334)
>  %336 = fdiv float 1.000000e+00, %335, !fpmath !1
>  %337 = fmul float %321, %336
>  %338 = fmul float %324, %336
>  %339 = fmul float %329, %336
>  %340 = fmul float %337, %60
>  %341 = fmul float %338, %62
>  %342 = fadd float %341, %340
>  %343 = fmul float %339, %64
>  %344 = fadd float %342, %343
>  %345 = call float @llvm.AMDGPU.clamp.(float %344, float 0.000000e+00, float 1.000000e+00)
>  %346 = fmul float %334, %336
>  %347 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %348 = load <16 x i8>, <16 x i8> addrspace(2)* %347, align 16, !invariant.load !0
>  %349 = call float @llvm.SI.load.const(<16 x i8> %348, i32 220)
>  %350 = fmul float %346, %349
>  %351 = call float @llvm.AMDGPU.clamp.(float %350, float 0.000000e+00, float 1.000000e+00)
>  %352 = fsub float 1.000000e+00, %351
>  %353 = call float @llvm.SI.load.const(<16 x i8> %348, i32 224)
>  %354 = fmul float %353, %352
>  %355 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %356 = load <16 x i8>, <16 x i8> addrspace(2)* %355, align 16, !invariant.load !0
>  %357 = call float @llvm.SI.load.const(<16 x i8> %356, i32 228)
>  %358 = fmul float %357, %352
>  %359 = call float @llvm.SI.load.const(<16 x i8> %356, i32 232)
>  %360 = fmul float %359, %352
>  %361 = fmul float %354, %81
>  %362 = fmul float %358, %81
>  %363 = fmul float %360, %81
>  %364 = fmul float %345, %361
>  %365 = fadd float %364, %312
>  %366 = fmul float %345, %362
>  %367 = fadd float %366, %314
>  %368 = fmul float %345, %363
>  %369 = fadd float %368, %316
>  %370 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %371 = load <16 x i8>, <16 x i8> addrspace(2)* %370, align 16, !invariant.load !0
>  %372 = call float @llvm.SI.load.const(<16 x i8> %371, i32 252)
>  %373 = call float @llvm.SI.load.const(<16 x i8> %371, i32 268)
>  %374 = call float @llvm.SI.load.const(<16 x i8> %371, i32 284)
>  %375 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %376 = fsub float %372, %375
>  %377 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %378 = fsub float %373, %377
>  %379 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %380 = fsub float %374, %379
>  %381 = fmul float %376, %376
>  %382 = fmul float %378, %378
>  %383 = fadd float %382, %381
>  %384 = fmul float %380, %380
>  %385 = fadd float %383, %384
>  %386 = call float @llvm.sqrt.f32(float %385)
>  %387 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %388 = load <16 x i8>, <16 x i8> addrspace(2)* %387, align 16, !invariant.load !0
>  %389 = call float @llvm.SI.load.const(<16 x i8> %388, i32 296)
>  %390 = call float @llvm.SI.load.const(<16 x i8> %388, i32 300)
>  %391 = fmul float %386, %389
>  %392 = fadd float %391, %390
>  %393 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %394 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %395 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %396 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %397 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %398 = load <8 x i32>, <8 x i32> addrspace(2)* %397, align 32, !invariant.load !0
>  %399 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %400 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %399, i64 0, i64 15, !amdgpu.uniform !0
>  %401 = load <4 x i32>, <4 x i32> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = extractelement <8 x i32> %398, i32 7
>  %403 = extractelement <4 x i32> %401, i32 0
>  %404 = and i32 %403, %402
>  %405 = insertelement <4 x i32> %401, i32 %404, i32 0
>  %406 = fdiv float %394, %396, !fpmath !1
>  %407 = fdiv float %395, %396, !fpmath !1
>  %408 = bitcast float %406 to i32
>  %409 = bitcast float %407 to i32
>  %410 = insertelement <2 x i32> undef, i32 %408, i32 0
>  %411 = insertelement <2 x i32> %410, i32 %409, i32 1
>  %412 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %411, <8 x i32> %398, <4 x i32> %405, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %413 = extractelement <4 x float> %412, i32 3
>  %414 = fmul float %413, %413
>  %415 = fdiv float 1.000000e+00, %386, !fpmath !1
>  %416 = fmul float %376, %415
>  %417 = fmul float %378, %415
>  %418 = fmul float %380, %415
>  %419 = fmul float %416, %60
>  %420 = fmul float %417, %62
>  %421 = fadd float %420, %419
>  %422 = fmul float %418, %64
>  %423 = fadd float %421, %422
>  %424 = call float @llvm.AMDGPU.clamp.(float %423, float 0.000000e+00, float 1.000000e+00)
>  %425 = fadd float %392, -5.000000e-01
>  %426 = fmul float %425, 2.000000e+00
>  %427 = fsub float 1.000000e+00, %426
>  %428 = call float @llvm.AMDGPU.clamp.(float %427, float 0.000000e+00, float 1.000000e+00)
>  %429 = fmul float %414, %428
>  %430 = call float @llvm.AMDGPU.clamp.(float %393, float 0.000000e+00, float 1.000000e+00)
>  %431 = fmul float %429, %430
>  %432 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %433 = load <16 x i8>, <16 x i8> addrspace(2)* %432, align 16, !invariant.load !0
>  %434 = call float @llvm.SI.load.const(<16 x i8> %433, i32 304)
>  %435 = fmul float %434, %431
>  %436 = call float @llvm.SI.load.const(<16 x i8> %433, i32 308)
>  %437 = fmul float %436, %431
>  %438 = call float @llvm.SI.load.const(<16 x i8> %433, i32 312)
>  %439 = fmul float %438, %431
>  %440 = fmul float %435, %81
>  %441 = fmul float %437, %81
>  %442 = fmul float %439, %81
>  %443 = fmul float %424, %440
>  %444 = fadd float %443, %365
>  %445 = fmul float %424, %441
>  %446 = fadd float %445, %367
>  %447 = fmul float %424, %442
>  %448 = fadd float %447, %369
>  %449 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %450 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %451 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %452 = load <8 x i32>, <8 x i32> addrspace(2)* %451, align 32, !invariant.load !0
>  %453 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %454 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %453, i64 0, i64 19, !amdgpu.uniform !0
>  %455 = load <4 x i32>, <4 x i32> addrspace(2)* %454, align 16, !invariant.load !0
>  %456 = extractelement <8 x i32> %452, i32 7
>  %457 = extractelement <4 x i32> %455, i32 0
>  %458 = and i32 %457, %456
>  %459 = insertelement <4 x i32> %455, i32 %458, i32 0
>  %460 = bitcast float %449 to i32
>  %461 = bitcast float %450 to i32
>  %462 = insertelement <2 x i32> undef, i32 %460, i32 0
>  %463 = insertelement <2 x i32> %462, i32 %461, i32 1
>  %464 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %463, <8 x i32> %452, <4 x i32> %459, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %465 = extractelement <4 x float> %464, i32 0
>  %466 = extractelement <4 x float> %464, i32 1
>  %467 = extractelement <4 x float> %464, i32 2
>  %468 = fmul float %43, %60
>  %469 = fmul float %44, %62
>  %470 = fadd float %469, %468
>  %471 = fmul float %45, %64
>  %472 = fadd float %470, %471
>  %473 = call float @llvm.AMDGPU.clamp.(float %472, float 0.000000e+00, float 1.000000e+00)
>  %474 = fsub float 1.000000e+00, %473
>  %475 = call float @llvm.pow.f32(float %474, float 5.000000e+00)
>  %476 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %477 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %478 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %479 = fmul float %475, %476
>  %480 = fmul float %475, %477
>  %481 = fmul float %475, %478
>  %482 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %483 = load <8 x i32>, <8 x i32> addrspace(2)* %482, align 32, !invariant.load !0
>  %484 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %485 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %484, i64 0, i64 11, !amdgpu.uniform !0
>  %486 = load <4 x i32>, <4 x i32> addrspace(2)* %485, align 16, !invariant.load !0
>  %487 = extractelement <8 x i32> %483, i32 7
>  %488 = extractelement <4 x i32> %486, i32 0
>  %489 = and i32 %488, %487
>  %490 = insertelement <4 x i32> %486, i32 %489, i32 0
>  %491 = call float @llvm.amdgcn.cubetc(float %220, float %222, float %224)
>  %492 = call float @llvm.amdgcn.cubesc(float %220, float %222, float %224)
>  %493 = call float @llvm.amdgcn.cubema(float %220, float %222, float %224)
>  %494 = call float @llvm.amdgcn.cubeid(float %220, float %222, float %224)
>  %495 = call float @llvm.fabs.f32(float %493)
>  %496 = fdiv float 1.000000e+00, %495, !fpmath !1
>  %497 = fmul float %491, %496
>  %498 = fadd float %497, 1.500000e+00
>  %499 = fmul float %492, %496
>  %500 = fadd float %499, 1.500000e+00
>  %501 = bitcast float %500 to i32
>  %502 = bitcast float %498 to i32
>  %503 = bitcast float %494 to i32
>  %504 = bitcast float %226 to i32
>  %505 = insertelement <4 x i32> undef, i32 %501, i32 0
>  %506 = insertelement <4 x i32> %505, i32 %502, i32 1
>  %507 = insertelement <4 x i32> %506, i32 %503, i32 2
>  %508 = insertelement <4 x i32> %507, i32 %504, i32 3
>  %509 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %508, <8 x i32> %483, <4 x i32> %490, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %510 = extractelement <4 x float> %509, i32 0
>  %511 = extractelement <4 x float> %509, i32 1
>  %512 = extractelement <4 x float> %509, i32 2
>  %513 = fmul float %479, %510
>  %514 = fmul float %480, %511
>  %515 = fmul float %481, %512
>  %516 = fmul float %513, %114
>  %517 = fmul float %514, %114
>  %518 = fmul float %515, %114
>  %519 = fmul float %444, %465
>  %520 = fadd float %519, %516
>  %521 = fmul float %446, %466
>  %522 = fadd float %521, %517
>  %523 = fmul float %448, %467
>  %524 = fadd float %523, %518
>  %525 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %526 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %527 = load <16 x i8>, <16 x i8> addrspace(2)* %526, align 16, !invariant.load !0
>  %528 = call float @llvm.SI.load.const(<16 x i8> %527, i32 12)
>  %529 = fsub float %525, %528
>  %530 = call float @llvm.maxnum.f32(float %529, float 0.000000e+00)
>  %531 = call float @llvm.SI.load.const(<16 x i8> %527, i32 28)
>  %532 = call float @llvm.SI.load.const(<16 x i8> %527, i32 12)
>  %533 = fsub float %531, %532
>  %534 = fadd float %533, 0x3F50624DE0000000
>  %535 = fdiv float 1.000000e+00, %534, !fpmath !1
>  %536 = fmul float %530, %535
>  %537 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %538 = load <16 x i8>, <16 x i8> addrspace(2)* %537, align 16, !invariant.load !0
>  %539 = call float @llvm.SI.load.const(<16 x i8> %538, i32 28)
>  %540 = call float @llvm.floor.f32(float %539)
>  %541 = fsub float %539, %540
>  %542 = fmul float %541, 8.000000e+00
>  %543 = call float @llvm.pow.f32(float %536, float %542)
>  %544 = call float @llvm.AMDGPU.clamp.(float %543, float 0.000000e+00, float 1.000000e+00)
>  %545 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %546 = fmul float %545, %544
>  %547 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %548 = load <16 x i8>, <16 x i8> addrspace(2)* %547, align 16, !invariant.load !0
>  %549 = call float @llvm.SI.load.const(<16 x i8> %548, i32 32)
>  %550 = fsub float 1.000000e+00, %546
>  %551 = fmul float %520, %546
>  %552 = fmul float %549, %550
>  %553 = fadd float %551, %552
>  %554 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %555 = load <16 x i8>, <16 x i8> addrspace(2)* %554, align 16, !invariant.load !0
>  %556 = call float @llvm.SI.load.const(<16 x i8> %555, i32 36)
>  %557 = fsub float 1.000000e+00, %546
>  %558 = fmul float %522, %546
>  %559 = fmul float %556, %557
>  %560 = fadd float %558, %559
>  %561 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %562 = load <16 x i8>, <16 x i8> addrspace(2)* %561, align 16, !invariant.load !0
>  %563 = call float @llvm.SI.load.const(<16 x i8> %562, i32 40)
>  %564 = fsub float 1.000000e+00, %546
>  %565 = fmul float %524, %546
>  %566 = fmul float %563, %564
>  %567 = fadd float %565, %566
>  %568 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %569 = bitcast float %5 to i32
>  %570 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %569, 10
>  %571 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %570, float %553, 11
>  %572 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %571, float %560, 12
>  %573 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %572, float %567, 13
>  %574 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %573, float %568, 14
>  %575 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %574, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %575
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x10                 ; C0880B10
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[12:15], v4, s[4:7], 0 idxen   ; E00C2000 80010C04
>	buffer_load_format_xyzw v[16:19], v5, s[12:15], 0 idxen ; E00C2000 80031005
>	buffer_load_format_xyzw v[8:11], v8, s[16:19], 0 idxen  ; E00C2000 80040808
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x38c                   ; C20380FF 0000038C
>	s_waitcnt vmcnt(1) lgkmcnt(0)                           ; BF8C0071
>	v_mov_b32_e32 v19, s4                                   ; 7E260204
>	v_mov_b32_e32 v20, s5                                   ; 7E280205
>	v_mov_b32_e32 v21, s6                                   ; 7E2A0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x2c                    ; C202012C
>	s_buffer_load_dword s5, s[0:3], 0x2d                    ; C202812D
>	s_buffer_load_dword s6, s[0:3], 0x2e                    ; C203012E
>	s_buffer_load_dword s7, s[0:3], 0x2f                    ; C203812F
>	s_buffer_load_dword s8, s[0:3], 0x30                    ; C2040130
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v4, s4                                    ; 7E080204
>	v_mov_b32_e32 v3, s5                                    ; 7E060205
>	s_buffer_load_dword s4, s[0:3], 0x31                    ; C2020131
>	s_buffer_load_dword s5, s[0:3], 0x32                    ; C2028132
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v22, s7, v19                              ; 082C2607
>	v_mov_b32_e32 v5, s8                                    ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x33                    ; C2030133
>	s_buffer_load_dword s7, s[0:3], 0x34                    ; C2038134
>	s_buffer_load_dword s8, s[0:3], 0x35                    ; C2040135
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v7, s4                                    ; 7E0E0204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x36                    ; C2020136
>	s_buffer_load_dword s5, s[0:3], 0x37                    ; C2028137
>	v_sub_f32_e32 v23, s6, v20                              ; 082E2806
>	v_mov_b32_e32 v10, s7                                   ; 7E140207
>	v_mov_b32_e32 v11, s8                                   ; 7E160208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v6, s4                                    ; 7E0C0204
>	v_sub_f32_e32 v24, s5, v21                              ; 08302A05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s12, 0xb4                                    ; B00C00B4
>	s_movk_i32 s15, 0xbc                                    ; B00F00BC
>	s_movk_i32 s14, 0xb0                                    ; B00E00B0
>	s_movk_i32 s13, 0xb8                                    ; B00D00B8
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	s_buffer_load_dword s4, s[0:3], 0x390                   ; C20200FF 00000390
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v29                               ; 7E00111D
>	v_mul_lo_i32 v23, v0, 48                                ; D2D60017 00016100
>	v_add_i32_e32 v1, vcc, s12, v23                         ; 4A022E0C
>	v_add_i32_e32 v7, vcc, s15, v23                         ; 4A0E2E0F
>	v_add_i32_e32 v0, vcc, s14, v23                         ; 4A002E0E
>	buffer_load_dword v3, v1, s[0:3], 0 offen               ; E0301000 80000301
>	buffer_load_dword v1, v7, s[0:3], 0 offen               ; E0301000 80000107
>	v_add_i32_e32 v5, vcc, s13, v23                         ; 4A0A2E0D
>	buffer_load_dword v4, v0, s[0:3], 0 offen               ; E0301000 80000400
>	buffer_load_dword v0, v5, s[0:3], 0 offen               ; E0301000 80000005
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_subrev_f32_e32 v22, v19, v1                           ; 0A2C0313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0xcc, v23                        ; 4A0A2EFF 000000CC
>	v_add_i32_e32 v6, vcc, 0xdc, v23                        ; 4A0C2EFF 000000DC
>	v_add_i32_e32 v1, vcc, 0xc0, v23                        ; 4A022EFF 000000C0
>	v_add_i32_e32 v10, vcc, 0xc8, v23                       ; 4A142EFF 000000C8
>	v_add_i32_e32 v7, vcc, 0xc4, v23                        ; 4A0E2EFF 000000C4
>	v_add_i32_e32 v11, vcc, 0xd4, v23                       ; 4A162EFF 000000D4
>	buffer_load_dword v24, v5, s[0:3], 0 offen              ; E0301000 80001805
>	buffer_load_dword v5, v1, s[0:3], 0 offen               ; E0301000 80000501
>	buffer_load_dword v1, v10, s[0:3], 0 offen              ; E0301000 8000010A
>	v_add_i32_e32 v10, vcc, 0xd0, v23                       ; 4A142EFF 000000D0
>	v_add_i32_e32 v23, vcc, 0xd8, v23                       ; 4A2E2EFF 000000D8
>	buffer_load_dword v25, v6, s[0:3], 0 offen              ; E0301000 80001906
>	buffer_load_dword v6, v23, s[0:3], 0 offen              ; E0301000 80000617
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v10, v10, s[0:3], 0 offen             ; E0301000 80000A0A
>	buffer_load_dword v11, v11, s[0:3], 0 offen             ; E0301000 80000B0B
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v23, v20, v24                          ; 0A2E3114
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v24, v21, v25                          ; 0A303315
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v1, v30                               ; 7E02111E
>	s_movk_i32 s8, 0xc8                                     ; B00800C8
>	v_add_i32_e32 v7, vcc, s8, v23                          ; 4A0E2E08
>	s_movk_i32 s9, 0xc4                                     ; B00900C4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[25:28], v6, s[4:7], 0 idxen   ; E00C2000 80011906
>	s_movk_i32 s11, 0xcc                                    ; B00B00CC
>	s_movk_i32 s4, 0xdc                                     ; B00400DC
>	v_add_i32_e32 v6, vcc, s9, v23                          ; 4A0C2E09
>	s_movk_i32 s10, 0xc0                                    ; B00A00C0
>	buffer_load_dword v10, v7, s[0:3], 0 offen              ; E0301000 80000A07
>	v_mul_lo_i32 v29, v1, 48                                ; D2D6001D 00016101
>	v_add_i32_e32 v1, vcc, s11, v23                         ; 4A022E0B
>	s_movk_i32 s6, 0xd4                                     ; B00600D4
>	v_add_i32_e32 v7, vcc, s4, v23                          ; 4A0E2E04
>	s_movk_i32 s7, 0xd0                                     ; B00700D0
>	s_movk_i32 s5, 0xd8                                     ; B00500D8
>	v_add_i32_e32 v5, vcc, s10, v23                         ; 4A0A2E0A
>	v_add_i32_e32 v24, vcc, s6, v23                         ; 4A302E06
>	buffer_load_dword v30, v7, s[0:3], 0 offen              ; E0301000 80001E07
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v11, v1, s[0:3], 0 offen              ; E0301000 80000B01
>	v_add_i32_e32 v1, vcc, s7, v23                          ; 4A022E07
>	v_add_i32_e32 v23, vcc, s5, v23                         ; 4A2E2E05
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v33, v1, s[0:3], 0 offen              ; E0301000 80002101
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v34, v23, s[0:3], 0 offen             ; E0301000 80002217
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v4, v25, v4                               ; 10080919
>	v_mul_f32_e32 v3, v25, v3                               ; 10060719
>	v_mul_f32_e32 v0, v25, v0                               ; 10000119
>	v_mul_f32_e32 v22, v25, v22                             ; 102C2D19
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_mul_f32_e32 v1, v25, v10                              ; 10021519
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v30, v21, v30                          ; 0A3C3D15
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v7, v25, v6                               ; 100E0D19
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v6, v20, v11                           ; 0A0C1714
>	v_mul_f32_e32 v23, v25, v6                              ; 102E0D19
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v5, v25, v5                               ; 100A0B19
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_mul_f32_e32 v10, v25, v33                             ; 10144319
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mul_f32_e32 v11, v25, v24                             ; 10163119
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v6, v25, v34                              ; 100C4519
>	v_mul_f32_e32 v24, v25, v30                             ; 10303D19
>	v_add_i32_e32 v25, vcc, s15, v29                        ; 4A323A0F
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	v_mac_f32_e32 v22, v26, v25                             ; 3E2C331A
>	v_add_i32_e32 v25, vcc, s11, v29                        ; 4A323A0B
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v20, v25                          ; 0A323314
>	v_mac_f32_e32 v23, v26, v25                             ; 3E2E331A
>	v_add_i32_e32 v25, vcc, s14, v29                        ; 4A323A0E
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v25                              ; 3E08331A
>	v_add_i32_e32 v25, vcc, s12, v29                        ; 4A323A0C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_buffer_load_dword s12, s[0:3], 0x394                  ; C20600FF 00000394
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v25                              ; 3E06331A
>	v_add_i32_e32 v25, vcc, s13, v29                        ; 4A323A0D
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v25                              ; 3E00331A
>	v_add_i32_e32 v25, vcc, s10, v29                        ; 4A323A0A
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v25                              ; 3E0A331A
>	v_add_i32_e32 v25, vcc, s9, v29                         ; 4A323A09
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v25                              ; 3E0E331A
>	v_add_i32_e32 v25, vcc, s8, v29                         ; 4A323A08
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v25                              ; 3E02331A
>	v_add_i32_e32 v25, vcc, s7, v29                         ; 4A323A07
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v26, v25                             ; 3E14331A
>	v_add_i32_e32 v25, vcc, s6, v29                         ; 4A323A06
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v11, v26, v25                             ; 3E16331A
>	v_add_i32_e32 v25, vcc, s5, v29                         ; 4A323A05
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v25                              ; 3E0C331A
>	v_add_i32_e32 v25, vcc, s4, v29                         ; 4A323A04
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v21, v25                          ; 0A323315
>	v_mac_f32_e32 v24, v26, v25                             ; 3E30331A
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v31                              ; 7E32111F
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0xb0, v25                       ; 4A3432FF 000000B0
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v27, v26                              ; 3E08351B
>	v_add_i32_e32 v26, vcc, 0xbc, v25                       ; 4A3432FF 000000BC
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v19, v26                          ; 0A343513
>	v_mac_f32_e32 v22, v27, v26                             ; 3E2C351B
>	v_add_i32_e32 v26, vcc, s11, v25                        ; 4A34320B
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v20, v26                          ; 0A343514
>	v_mac_f32_e32 v23, v27, v26                             ; 3E2E351B
>	v_add_i32_e32 v26, vcc, 0xb4, v25                       ; 4A3432FF 000000B4
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v27, v26                              ; 3E06351B
>	v_add_i32_e32 v26, vcc, 0xb8, v25                       ; 4A3432FF 000000B8
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v27, v26                              ; 3E00351B
>	v_add_i32_e32 v26, vcc, s10, v25                        ; 4A34320A
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v27, v26                              ; 3E0A351B
>	v_add_i32_e32 v26, vcc, s9, v25                         ; 4A343209
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v27, v26                              ; 3E0E351B
>	v_add_i32_e32 v26, vcc, s8, v25                         ; 4A343208
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v27, v26                              ; 3E02351B
>	v_add_i32_e32 v26, vcc, s7, v25                         ; 4A343207
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v27, v26                             ; 3E14351B
>	v_add_i32_e32 v26, vcc, s6, v25                         ; 4A343206
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v11, v27, v26                             ; 3E16351B
>	v_add_i32_e32 v26, vcc, s5, v25                         ; 4A343205
>	v_add_i32_e32 v25, vcc, s4, v25                         ; 4A323204
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v21, v25                          ; 0A323315
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v27, v26                              ; 3E0C351B
>	v_mac_f32_e32 v24, v27, v25                             ; 3E30331B
>	s_buffer_load_dword s4, s[0:3], 0x398                   ; C20200FF 00000398
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v32                              ; 7E321120
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0xb0, v25                       ; 4A3432FF 000000B0
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v28, v26                              ; 3E08351C
>	v_add_i32_e32 v26, vcc, 0xbc, v25                       ; 4A3432FF 000000BC
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v19, v26                          ; 0A343513
>	v_mac_f32_e32 v22, v28, v26                             ; 3E2C351C
>	v_add_i32_e32 v26, vcc, 0xcc, v25                       ; 4A3432FF 000000CC
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v20, v26                          ; 0A343514
>	v_mac_f32_e32 v23, v28, v26                             ; 3E2E351C
>	v_add_i32_e32 v26, vcc, 0xb4, v25                       ; 4A3432FF 000000B4
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v28, v26                              ; 3E06351C
>	v_add_i32_e32 v26, vcc, 0xb8, v25                       ; 4A3432FF 000000B8
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v28, v26                              ; 3E00351C
>	v_add_i32_e32 v26, vcc, 0xc0, v25                       ; 4A3432FF 000000C0
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v28, v26                              ; 3E0A351C
>	v_add_i32_e32 v26, vcc, 0xc4, v25                       ; 4A3432FF 000000C4
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v28, v26                              ; 3E0E351C
>	v_add_i32_e32 v26, vcc, 0xc8, v25                       ; 4A3432FF 000000C8
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v28, v26                              ; 3E02351C
>	v_add_i32_e32 v26, vcc, 0xd0, v25                       ; 4A3432FF 000000D0
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v28, v26                             ; 3E14351C
>	v_add_i32_e32 v26, vcc, 0xd4, v25                       ; 4A3432FF 000000D4
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v11, v28, v26                             ; 3E16351C
>	v_add_i32_e32 v26, vcc, 0xd8, v25                       ; 4A3432FF 000000D8
>	v_add_i32_e32 v25, vcc, 0xdc, v25                       ; 4A3232FF 000000DC
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v21, v25                          ; 0A323315
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v28, v26                              ; 3E0C351C
>	v_mac_f32_e32 v24, v28, v25                             ; 3E30331C
>	v_mul_f32_e32 v25, v3, v13                              ; 10321B03
>	v_mac_f32_e32 v25, v4, v12                              ; 3E321904
>	v_mac_f32_e32 v25, v0, v14                              ; 3E321D00
>	v_mac_f32_e32 v25, v22, v15                             ; 3E321F16
>	v_mul_f32_e32 v22, v7, v13                              ; 102C1B07
>	v_mac_f32_e32 v22, v5, v12                              ; 3E2C1905
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	v_mac_f32_e32 v22, v1, v14                              ; 3E2C1D01
>	v_mac_f32_e32 v22, v23, v15                             ; 3E2C1F17
>	v_mul_f32_e32 v23, v11, v13                             ; 102E1B0B
>	v_mul_f32_e32 v13, 0, v13                               ; 101A1A80
>	v_mac_f32_e32 v23, v10, v12                             ; 3E2E190A
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_add_f32_e32 v16, v16, v16                             ; 06202110
>	v_mac_f32_e32 v23, v6, v14                              ; 3E2E1D06
>	v_mac_f32_e32 v13, 0, v14                               ; 3E1A1C80
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_mad_f32 v4, v16, v4, -v4                              ; D2820004 84120910
>	v_add_f32_e32 v14, v19, v25                             ; 061C3313
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_mac_f32_e32 v4, v3, v17                               ; 3E082303
>	v_mad_f32 v3, v16, v5, -v5                              ; D2820003 84160B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v5, s4, v14                               ; 100A1C04
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_add_f32_e32 v12, v15, v13                             ; 06181B0F
>	v_mac_f32_e32 v23, v24, v15                             ; 3E2E1F18
>	v_mac_f32_e32 v3, v7, v17                               ; 3E062307
>	v_mad_f32 v7, v16, v10, -v10                            ; D2820007 842A1510
>	v_mul_f32_e32 v10, s5, v14                              ; 10141C05
>	v_add_f32_e32 v15, v20, v22                             ; 061E2D14
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v10, s4, v15                              ; 3E141E04
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	v_mac_f32_e32 v7, v11, v17                              ; 3E0E230B
>	v_mul_f32_e32 v11, s6, v14                              ; 10161C06
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	v_mad_f32 v13, 2.0, v18, -1.0                           ; D282000D 03CE24F4
>	v_mac_f32_e32 v11, s5, v15                              ; 3E161E05
>	v_add_f32_e32 v18, v21, v23                             ; 06242F15
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mul_f32_e32 v16, s7, v14                              ; 10201C07
>	v_mac_f32_e32 v5, s8, v15                               ; 3E0A1E08
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v11, s4, v18                              ; 3E162404
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	v_mac_f32_e32 v16, s6, v15                              ; 3E201E06
>	v_mac_f32_e32 v16, s5, v18                              ; 3E202405
>	v_mac_f32_e32 v5, s7, v18                               ; 3E0A2407
>	v_mac_f32_e32 v10, s8, v18                              ; 3E142408
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v16, s4, v12                              ; 3E201804
>	s_buffer_load_dword s4, s[0:3], 0x1b                    ; C202011B
>	s_buffer_load_dword s12, s[0:3], 0x1f                   ; C206011F
>	s_buffer_load_dword s10, s[0:3], 0x1d                   ; C205011D
>	s_buffer_load_dword s9, s[0:3], 0x1c                    ; C204811C
>	s_buffer_load_dword s14, s[0:3], 0x23                   ; C2070123
>	v_mac_f32_e32 v5, s6, v12                               ; 3E0A1806
>	v_mac_f32_e32 v10, s7, v12                              ; 3E141807
>	v_mac_f32_e32 v11, s8, v12                              ; 3E161808
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v12, s4, v16                              ; 10182004
>	s_buffer_load_dword s4, s[0:3], 0x20                    ; C2020120
>	exp 15, 32, 0, 0, 0, v14, v15, v18, v12                 ; F800020F 0C120F0E
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_subrev_f32_e32 v12, s12, v14                          ; 0A181C0C
>	s_buffer_load_dword s11, s[0:3], 0x1e                   ; C205811E
>	s_buffer_load_dword s12, s[0:3], 0x21                   ; C2060121
>	v_mul_f32_e32 v17, s10, v12                             ; 1022180A
>	s_buffer_load_dword s13, s[0:3], 0x22                   ; C2068122
>	s_buffer_load_dword s10, s[0:3], 0x27                   ; C2050127
>	v_subrev_f32_e32 v14, s14, v15                          ; 0A1C1E0E
>	v_mul_f32_e32 v15, s9, v12                              ; 101E1809
>	s_buffer_load_dword s9, s[0:3], 0x26                    ; C2048126
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s4, v14                              ; 3E1E1C04
>	s_buffer_load_dword s15, s[0:3], 0x24                   ; C2078124
>	s_buffer_load_dword s4, s[0:3], 0x25                    ; C2020125
>	v_mul_f32_e32 v12, s11, v12                             ; 1018180B
>	v_mac_f32_e32 v17, s12, v14                             ; 3E221C0C
>	s_buffer_load_dword s5, s[0:3], 0x14                    ; C2028114
>	s_buffer_load_dword s11, s[0:3], 0x28                   ; C2058128
>	s_buffer_load_dword s12, s[0:3], 0x29                   ; C2060129
>	s_buffer_load_dword s6, s[0:3], 0x15                    ; C2030115
>	v_mac_f32_e32 v12, s13, v14                             ; 3E181C0D
>	v_subrev_f32_e32 v14, s10, v18                          ; 0A1C240A
>	v_mac_f32_e32 v12, s9, v14                              ; 3E181C09
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v17, s4, v14                              ; 3E221C04
>	v_mac_f32_e32 v15, s15, v14                             ; 3E1E1C0F
>	v_mul_f32_e32 v14, 0.5, v12                             ; 101C18F0
>	v_mad_f32 v15, s11, v15, v14                            ; D282000F 043A1E0B
>	v_mac_f32_e32 v14, s12, v17                             ; 3E1C220C
>	v_mov_b32_e32 v17, s5                                   ; 7E220205
>	v_mac_f32_e32 v17, s6, v11                              ; 3E221606
>	v_add_f32_e64 v17, v17, 0 clamp                         ; D2060811 00010111
>	s_buffer_load_dword s7, s[0:3], 0x16                    ; C2038116
>	v_log_f32_e32 v17, v17                                  ; 7E224F11
>	s_buffer_load_dword s8, s[0:3], 0x17                    ; C2040117
>	s_buffer_load_dword s4, s[0:3], 0x2a                    ; C202012A
>	s_buffer_load_dword s0, s[0:3], 0x2b                    ; C200012B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v17, s7, v17                       ; 0E222207
>	v_mac_f32_e32 v4, v0, v13                               ; 3E081B00
>	v_exp_f32_e32 v17, v17                                  ; 7E224B11
>	v_sub_f32_e64 v18, 1.0, s8                              ; D2080012 000010F2
>	v_mov_b32_e32 v0, s0                                    ; 7E000200
>	v_mac_f32_e32 v0, s4, v12                               ; 3E001804
>	v_mac_f32_e32 v18, s8, v17                              ; 3E242208
>	v_mac_f32_e32 v3, v1, v13                               ; 3E061B01
>	v_mul_f32_e32 v1, v18, v18                              ; 10022512
>	exp 15, 33, 0, 0, 0, v15, v14, v0, v12                  ; F800021F 0C000E0F
>	v_mac_f32_e32 v7, v6, v13                               ; 3E0E1B06
>	exp 15, 34, 0, 0, 0, v8, v9, v1, v0                     ; F800022F 00010908
>	exp 15, 35, 0, 0, 0, v4, v3, v7, v0                     ; F800023F 00070304
>	exp 15, 12, 0, 1, 0, v5, v10, v11, v16                  ; F80008CF 100B0A05
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2196 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v11, v2, 0, 0, [m0]                         ; C82C0002
>	v_interp_p2_f32 v11, [v11], v3, 0, 0, [m0]                  ; C82D0003
>	v_interp_p1_f32 v12, v2, 1, 0, [m0]                         ; C8300102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	s_buffer_load_dword s12, s[0:3], 0x2                        ; C2060102
>	v_interp_p2_f32 v12, [v12], v3, 1, 0, [m0]                  ; C8310103
>	v_interp_p1_f32 v14, v2, 2, 0, [m0]                         ; C8380202
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v6, s8, v11                                   ; 080C1608
>	v_interp_p2_f32 v14, [v14], v3, 2, 0, [m0]                  ; C8390203
>	v_sub_f32_e32 v7, s9, v12                                   ; 080E1809
>	v_mul_f32_e32 v0, v6, v6                                    ; 10000D06
>	v_interp_p1_f32 v10, v4, 0, 3, [m0]                         ; C8280C04
>	v_sub_f32_e32 v8, s12, v14                                  ; 08101C0C
>	v_mac_f32_e32 v0, v7, v7                                    ; 3E000F07
>	v_mac_f32_e32 v0, v8, v8                                    ; 3E001108
>	v_interp_p2_f32 v10, [v10], v5, 0, 3, [m0]                  ; C8290C05
>	v_interp_p1_f32 v15, v4, 1, 3, [m0]                         ; C83C0D04
>	v_rsq_f32_e32 v9, v0                                        ; 7E125D00
>	v_interp_p2_f32 v15, [v15], v5, 1, 3, [m0]                  ; C83D0D05
>	v_interp_p1_f32 v4, v4, 2, 3, [m0]                          ; C8100E04
>	v_mul_f32_e32 v0, v10, v10                                  ; 1000150A
>	v_interp_p2_f32 v4, [v4], v5, 2, 3, [m0]                    ; C8110E05
>	v_mac_f32_e32 v0, v15, v15                                  ; 3E001F0F
>	v_mac_f32_e32 v0, v4, v4                                    ; 3E000904
>	v_rsq_f32_e32 v5, v0                                        ; 7E0A5D00
>	v_mul_f32_e32 v16, v9, v6                                   ; 10200D09
>	v_mul_f32_e32 v17, v9, v7                                   ; 10220F09
>	v_mul_f32_e32 v18, v9, v8                                   ; 10241109
>	v_mul_f32_e32 v19, v5, v10                                  ; 10261505
>	v_mul_f32_e32 v15, v5, v15                                  ; 101E1F05
>	v_mul_f32_e32 v16, v16, v19                                 ; 10202710
>	v_mul_f32_e32 v20, v5, v4                                   ; 10280905
>	v_mac_f32_e32 v16, v17, v15                                 ; 3E201F11
>	v_mac_f32_e32 v16, v18, v20                                 ; 3E202912
>	v_mul_f32_e32 v4, v19, v16                                  ; 10082113
>	v_mul_f32_e32 v5, v15, v16                                  ; 100A210F
>	v_mac_f32_e32 v4, v19, v16                                  ; 3E082113
>	v_mul_f32_e32 v10, v20, v16                                 ; 10142114
>	v_mac_f32_e32 v5, v15, v16                                  ; 3E0A210F
>	v_mad_f32 v17, v6, v9, -v4                                  ; D2820011 84121306
>	v_mac_f32_e32 v10, v20, v16                                 ; 3E142114
>	v_mad_f32 v18, v7, v9, -v5                                  ; D2820012 84161307
>	v_mul_f32_e32 v17, v19, v17                                 ; 10222313
>	v_mac_f32_e32 v17, v15, v18                                 ; 3E22250F
>	v_mad_f32 v18, v8, v9, -v10                                 ; D2820012 842A1308
>	v_mac_f32_e32 v17, v20, v18                                 ; 3E222514
>	v_sub_f32_e32 v18, 1.0, v16                                 ; 082420F2
>	v_add_f32_e32 v17, 1.0, v17                                 ; 062222F2
>	v_add_f32_e64 v18, v18, 0 clamp                             ; D2060812 00010112
>	v_subrev_f32_e32 v17, v18, v17                              ; 0A222312
>	s_buffer_load_dword s8, s[0:3], 0x11                        ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                        ; C2048112
>	s_buffer_load_dword s52, s[0:3], 0x10                       ; C21A0110
>	v_add_f32_e64 v17, v17, 0 clamp                             ; D2060811 00010111
>	s_buffer_load_dword s11, s[0:3], 0x14                       ; C2058114
>	s_buffer_load_dword s20, s[0:3], 0x15                       ; C20A0115
>	s_buffer_load_dword s21, s[0:3], 0x16                       ; C20A8116
>	v_sub_f32_e32 v18, 1.0, v17                                 ; 082422F2
>	s_buffer_load_dword s42, s[0:3], 0x18                       ; C2150118
>	s_buffer_load_dword s22, s[0:3], 0x19                       ; C20B0119
>	s_buffer_load_dword s23, s[0:3], 0x1a                       ; C20B811A
>	v_mad_f32 v17, -v17, v18, v18                               ; D2820011 244A2511
>	s_load_dwordx4 s[36:39], s[4:5], 0x5c                       ; C092055C
>	s_load_dwordx8 s[28:35], s[4:5], 0x50                       ; C0CE0550
>	v_mov_b32_e32 v18, 0x403b800a                               ; 7E2402FF 403B800A
>	s_buffer_load_dword s43, s[0:3], 0x1c                       ; C215811C
>	s_buffer_load_dword s44, s[0:3], 0x1d                       ; C216011D
>	s_buffer_load_dword s45, s[0:3], 0x1e                       ; C216811E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                        ; C0C60500
>	s_load_dwordx4 s[24:27], s[4:5], 0xc                        ; C08C050C
>	v_mad_f32 v21, -v6, v9, v4                                  ; D2820015 24121306
>	v_mad_f32 v4, v18, v19, v11                                 ; D2820004 042E2712
>	v_mad_f32 v22, -v7, v9, v5                                  ; D2820016 24161307
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v7, s8, v4                                    ; 100E0808
>	v_mad_f32 v5, v18, v15, v12                                 ; D2820005 04321F12
>	v_mad_f32 v6, v18, v20, v14                                 ; D2820006 043A2912
>	v_mad_f32 v18, -v8, v9, v10                                 ; D2820012 242A1308
>	v_mul_f32_e32 v8, s9, v4                                    ; 10100809
>	v_mul_f32_e32 v4, s52, v4                                   ; 10080834
>	v_interp_p1_f32 v0, v2, 0, 2, [m0]                          ; C8000802
>	v_mac_f32_e32 v4, s11, v5                                   ; 3E080A0B
>	v_mac_f32_e32 v7, s20, v5                                   ; 3E0E0A14
>	v_mac_f32_e32 v8, s21, v5                                   ; 3E100A15
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                    ; C8010803
>	v_interp_p1_f32 v1, v2, 1, 2, [m0]                          ; C8040902
>	v_mac_f32_e32 v4, s42, v6                                   ; 3E080C2A
>	v_mac_f32_e32 v7, s22, v6                                   ; 3E0E0C16
>	v_mac_f32_e32 v8, s23, v6                                   ; 3E100C17
>	v_add_f32_e32 v5, s43, v4                                   ; 060A082B
>	v_interp_p2_f32 v1, [v1], v3, 1, 2, [m0]                    ; C8050903
>	s_and_b32 s36, s36, s35                                     ; 87242324
>	v_add_f32_e32 v6, s44, v7                                   ; 060C0E2C
>	v_add_f32_e32 v4, s45, v8                                   ; 0608102D
>	s_and_b32 s24, s24, s19                                     ; 87181318
>	image_sample v[9:10], v[0:1], s[28:35], s[36:39] dmask:0x6  ; F0800600 01270900
>	image_sample_c v24, v[4:7], s[12:19], s[24:27] dmask:0x1    ; F0A00100 00C31804
>	v_cubema_f32 v4, v19, v15, v20                              ; D28E0004 04521F13
>	s_load_dwordx4 s[20:23], s[4:5], 0x1c                       ; C08A051C
>	s_load_dwordx8 s[28:35], s[4:5], 0x10                       ; C0CE0510
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	s_buffer_load_dword s40, s[0:3], 0x4                        ; C2140104
>	s_buffer_load_dword s41, s[0:3], 0x5                        ; C2148105
>	s_buffer_load_dword s8, s[0:3], 0x6                         ; C2040106
>	s_buffer_load_dword s9, s[0:3], 0xc                         ; C204810C
>	s_buffer_load_dword s50, s[0:3], 0xd                        ; C219010D
>	v_cubetc_f32 v23, v19, v15, v20                             ; D28C0017 04521F13
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	s_buffer_load_dword s51, s[0:3], 0xe                        ; C219810E
>	v_cubesc_f32 v7, v19, v15, v20                              ; D28A0007 04521F13
>	v_mad_f32 v6, v5, v23, v4                                   ; D2820006 04122F05
>	v_mad_f32 v5, v5, v7, v4                                    ; D2820005 04120F05
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s20, s20, s35                                     ; 87142314
>	v_cubeid_f32 v7, v19, v15, v20                              ; D2880007 04521F13
>	image_sample v[5:8], v[5:8], s[28:35], s[20:23] dmask:0xf   ; F0800F00 00A70505
>	s_buffer_load_dword s46, s[0:3], 0x2c                       ; C217012C
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v8, v5                                    ; 100A0B08
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	v_mul_f32_e32 v8, s40, v19                                  ; 10102628
>	v_mul_f32_e32 v23, v24, v24                                 ; 102E3118
>	v_mad_f32 v8, -s41, v15, -v8                                ; D2820008 A4221E29
>	s_buffer_load_dword s47, s[0:3], 0x2d                       ; C217812D
>	v_mad_f32 v8, -s8, v20, v8                                  ; D2820008 24222808
>	v_mul_f32_e32 v24, s9, v23                                  ; 10302E09
>	v_mul_f32_e32 v25, s50, v23                                 ; 10322E32
>	v_mul_f32_e32 v23, s51, v23                                 ; 102E2E33
>	s_buffer_load_dword s48, s[0:3], 0x2e                       ; C218012E
>	v_add_f32_e64 v8, v8, 0 clamp                               ; D2060808 00010108
>	v_mul_f32_e32 v24, v9, v24                                  ; 10303109
>	v_mul_f32_e32 v25, v9, v25                                  ; 10323309
>	v_mul_f32_e32 v23, v9, v23                                  ; 102E2F09
>	v_mul_f32_e32 v24, v24, v8                                  ; 10301118
>	v_mul_f32_e32 v25, v25, v8                                  ; 10321119
>	v_mul_f32_e32 v23, v23, v8                                  ; 102E1117
>	v_mul_f32_e32 v8, 4.0, v9                                   ; 101012F6
>	v_mac_f32_e32 v24, v8, v5                                   ; 3E300B08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s46, v11                                  ; 080A162E
>	v_mac_f32_e32 v25, v8, v6                                   ; 3E320D08
>	v_mac_f32_e32 v23, v8, v7                                   ; 3E2E0F08
>	v_sub_f32_e32 v6, s47, v12                                  ; 080C182F
>	v_mul_f32_e32 v7, v5, v5                                    ; 100E0B05
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_sub_f32_e32 v8, s48, v14                                  ; 08101C30
>	v_mac_f32_e32 v7, v8, v8                                    ; 3E0E1108
>	v_rsq_f32_e32 v26, v7                                       ; 7E345D07
>	s_buffer_load_dword s49, s[0:3], 0x2f                       ; C218812F
>	s_buffer_load_dword s8, s[0:3], 0x30                        ; C2040130
>	s_buffer_load_dword s9, s[0:3], 0x31                        ; C2048131
>	v_mul_f32_e32 v5, v26, v5                                   ; 100A0B1A
>	v_mul_f32_e32 v6, v26, v6                                   ; 100C0D1A
>	v_mul_f32_e32 v5, v19, v5                                   ; 100A0B13
>	v_mac_f32_e32 v5, v15, v6                                   ; 3E0A0D0F
>	v_mul_f32_e32 v6, v26, v8                                   ; 100C111A
>	v_mac_f32_e32 v5, v20, v6                                   ; 3E0A0D14
>	v_mul_f32_e32 v6, v26, v7                                   ; 100C0F1A
>	s_buffer_load_dword s11, s[0:3], 0x32                       ; C2058132
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s49, v6                                   ; 100C0C31
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s20, s[0:3], 0x34                       ; C20A0134
>	v_mad_f32 v7, -v6, s8, s8                                   ; D2820007 20201106
>	s_buffer_load_dword s21, s[0:3], 0x35                       ; C20A8135
>	s_buffer_load_dword s8, s[0:3], 0x36                        ; C2040136
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mac_f32_e32 v24, v7, v5                                   ; 3E300B07
>	v_mad_f32 v7, -v6, s9, s9                                   ; D2820007 20241306
>	v_mad_f32 v6, -v6, s11, s11                                 ; D2820006 202C1706
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_mac_f32_e32 v23, v6, v5                                   ; 3E2E0B06
>	v_mac_f32_e32 v25, v7, v5                                   ; 3E320B07
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s20, v11                                  ; 080A1614
>	v_sub_f32_e32 v6, s21, v12                                  ; 080C1815
>	v_mul_f32_e32 v7, v5, v5                                    ; 100E0B05
>	v_sub_f32_e32 v8, s8, v14                                   ; 08101C08
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_mac_f32_e32 v7, v8, v8                                    ; 3E0E1108
>	v_rsq_f32_e32 v26, v7                                       ; 7E345D07
>	s_buffer_load_dword s9, s[0:3], 0x37                        ; C2048137
>	s_buffer_load_dword s11, s[0:3], 0x38                       ; C2058138
>	s_buffer_load_dword s20, s[0:3], 0x39                       ; C20A0139
>	v_mul_f32_e32 v5, v26, v5                                   ; 100A0B1A
>	v_mul_f32_e32 v6, v26, v6                                   ; 100C0D1A
>	v_mul_f32_e32 v5, v19, v5                                   ; 100A0B13
>	v_mac_f32_e32 v5, v15, v6                                   ; 3E0A0D0F
>	v_mul_f32_e32 v6, v26, v8                                   ; 100C111A
>	v_mac_f32_e32 v5, v20, v6                                   ; 3E0A0D14
>	v_mul_f32_e32 v6, v26, v7                                   ; 100C0F1A
>	s_buffer_load_dword s21, s[0:3], 0x3a                       ; C20A813A
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s9, v6                                    ; 100C0C09
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mad_f32 v7, -v6, s11, s11                                 ; D2820007 202C1706
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mac_f32_e32 v24, v7, v5                                   ; 3E300B07
>	v_mad_f32 v7, -v6, s20, s20                                 ; D2820007 20502906
>	v_mad_f32 v6, -v6, s21, s21                                 ; D2820006 20542B06
>	v_interp_p1_f32 v8, v2, 2, 1, [m0]                          ; C8200602
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_mac_f32_e32 v25, v7, v5                                   ; 3E320B07
>	v_mac_f32_e32 v23, v6, v5                                   ; 3E2E0B06
>	v_interp_p2_f32 v8, [v8], v3, 2, 1, [m0]                    ; C8210603
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                          ; C8140402
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                    ; C8150403
>	v_interp_p1_f32 v6, v2, 1, 1, [m0]                          ; C8180502
>	v_interp_p2_f32 v6, [v6], v3, 1, 1, [m0]                    ; C8190503
>	v_interp_p1_f32 v7, v2, 3, 1, [m0]                          ; C81C0702
>	v_interp_p2_f32 v7, [v7], v3, 3, 1, [m0]                    ; C81D0703
>	v_mov_b32_e32 v26, 0x6f800000                               ; 7E3402FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v26, |v7|                             ; D002026A 00020F1A
>	v_mov_b32_e32 v26, 0x2f800000                               ; 7E3402FF 2F800000
>	v_cndmask_b32_e32 v26, 1.0, v26, vcc                        ; 003434F2
>	v_mul_f32_e32 v7, v26, v7                                   ; 100E0F1A
>	s_buffer_load_dword s8, s[0:3], 0x3f                        ; C204013F
>	v_rcp_f32_e32 v7, v7                                        ; 7E0E5507
>	s_buffer_load_dword s9, s[0:3], 0x43                        ; C2048143
>	s_buffer_load_dword s11, s[0:3], 0x47                       ; C2058147
>	s_buffer_load_dword s21, s[0:3], 0x4b                       ; C20A814B
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v6, v7, v6                                    ; 100C0D07
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v11, s8, v11                                  ; 08161608
>	s_buffer_load_dword s20, s[0:3], 0x4a                       ; C20A014A
>	v_mul_f32_e32 v5, v5, v26                                   ; 100A3505
>	v_mul_f32_e32 v6, v6, v26                                   ; 100C3506
>	v_sub_f32_e32 v26, s9, v12                                  ; 08341809
>	v_mul_f32_e32 v27, v11, v11                                 ; 1036170B
>	v_sub_f32_e32 v14, s11, v14                                 ; 081C1C0B
>	v_mac_f32_e32 v27, v26, v26                                 ; 3E36351A
>	v_mac_f32_e32 v27, v14, v14                                 ; 3E361D0E
>	v_sqrt_f32_e32 v28, v27                                     ; 7E38671B
>	v_mov_b32_e32 v29, s21                                      ; 7E3A0215
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v29, s20, v28                                 ; 3E3A3814
>	s_load_dwordx4 s[28:31], s[4:5], 0x3c                       ; C08E053C
>	s_load_dwordx8 s[20:27], s[4:5], 0x30                       ; C0CA0530
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                       ; C090052C
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_mad_f32 v7, -v10, v7, v7                                  ; D2820007 241E0F0A
>	v_mul_f32_e32 v17, v17, v9                                  ; 10221311
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s28, s28, s27                                     ; 871C1B1C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	image_sample v5, v[5:6], s[20:27], s[28:31] dmask:0x8       ; F0800800 00E50505
>	v_rsq_f32_e32 v6, v27                                       ; 7E0C5D1B
>	s_buffer_load_dword s6, s[0:3], 0x4c                        ; C203014C
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	s_buffer_load_dword s7, s[0:3], 0x4d                        ; C203814D
>	v_mul_f32_e32 v11, v6, v11                                  ; 10161706
>	v_mul_f32_e32 v11, v19, v11                                 ; 10161713
>	v_mul_f32_e32 v19, v6, v26                                  ; 10263506
>	v_mul_f32_e32 v6, v6, v14                                   ; 100C1D06
>	v_mac_f32_e32 v11, v15, v19                                 ; 3E16270F
>	v_mac_f32_e32 v11, v20, v6                                  ; 3E160D14
>	v_add_f32_e32 v6, -0.5, v29                                 ; 060C3AF1
>	v_mad_f32 v6, -2.0, v6, 1.0                                 ; D2820006 03CA0CF5
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	v_add_f32_e64 v6, v8, 0 clamp                               ; D2060806 00010108
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s6, v5                                    ; 10100A06
>	v_add_f32_e64 v6, v11, 0 clamp                              ; D2060806 0001010B
>	v_mul_f32_e32 v8, v9, v8                                    ; 10101109
>	v_mac_f32_e32 v24, v8, v6                                   ; 3E300D08
>	v_mul_f32_e32 v8, s7, v5                                    ; 10100A07
>	s_buffer_load_dword s8, s[0:3], 0x4e                        ; C204014E
>	s_load_dwordx8 s[20:27], s[4:5], 0x40                       ; C0CA0540
>	s_load_dwordx4 s[4:7], s[4:5], 0x4c                         ; C082054C
>	v_mul_f32_e32 v8, v9, v8                                    ; 10101109
>	v_mac_f32_e32 v25, v8, v6                                   ; 3E320D08
>	v_add_f32_e64 v8, v16, 0 clamp                              ; D2060808 00010110
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v5, s8, v5                                    ; 100A0A08
>	v_cubema_f32 v14, v21, v22, v18                             ; D28E000E 044A2D15
>	v_log_f32_e32 v15, v8                                       ; 7E1E4F08
>	s_and_b32 s4, s4, s27                                       ; 87041B04
>	v_mul_f32_e32 v5, v9, v5                                    ; 100A0B09
>	v_max_f32_e32 v16, 0, v10                                   ; 20201480
>	image_sample v[8:10], v[0:1], s[20:27], s[4:7] dmask:0x7    ; F0800700 00250800
>	v_rcp_f32_e64 v1, |v14|                                     ; D3540101 0000010E
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mac_f32_e32 v23, v5, v6                                   ; 3E2E0D05
>	v_cubetc_f32 v5, v21, v22, v18                              ; D28C0005 044A2D15
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v15                    ; 0E001EFF 40A00000
>	v_cubesc_f32 v11, v21, v22, v18                             ; D28A000B 044A2D15
>	s_buffer_load_dword s5, s[0:3], 0x7                         ; C2028107
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_cubeid_f32 v6, v21, v22, v18                              ; D2880006 044A2D15
>	s_and_b32 s32, s32, s19                                     ; 87201320
>	v_mac_f32_e32 v4, v1, v11                                   ; 3E081701
>	v_mul_f32_e32 v0, v16, v0                                   ; 10000110
>	image_sample_l v[4:6], v[4:7], s[12:19], s[32:35] dmask:0x7 ; F0900700 01030404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v17, v0                                   ; 100A0111
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s5, v0                                    ; 08000005
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v12                                ; 0A0C1804
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s6, s[0:3], 0x8                         ; C2030108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s5                                      ; 7E0C4805
>	v_sub_f32_e32 v6, s5, v6                                    ; 080C0C05
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s7, s[0:3], 0x9                         ; C2038109
>	v_interp_p1_f32 v6, v2, 2, 2, [m0]                          ; C8180A02
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 2, [m0]                    ; C8190A03
>	v_mul_f32_e32 v1, v17, v1                                   ; 10020311
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v17, v4                                   ; 10080911
>	v_mac_f32_e32 v1, v8, v24                                   ; 3E023108
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s6, s6                                   ; D2820000 20180D06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v25                                   ; 3E083309
>	v_mad_f32 v1, -v6, s7, s7                                   ; D2820001 201C0F06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v23                                  ; 3E0A2F0A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1716 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..12]
>DCL CONST[16..17]
>DCL TEMP[0..10], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,     2.9297,     6.0000}
>IMM[1] FLT32 {    4.0000,     0.3000,     0.5900,     0.1100}
>IMM[2] FLT32 {   32.0000,     5.0000,     0.0000,     0.0010}
>IMM[3] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[2].xyzz, IN[2].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[2].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xy, IN[1].xyyy
>  8: TEX TEMP[2].yz, TEMP[2], SAMP[4], 2D
>  9: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[0].xyzz
> 10: MUL TEMP[3].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 11: MUL TEMP[3].xyz, IMM[0].yyyy, TEMP[3].xyzz
> 12: ADD TEMP[3].xyz, TEMP[0].xyzz, -TEMP[3].xyzz
> 13: DP3 TEMP[3].x, TEMP[3].xyzz, TEMP[1].xyzz
> 14: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].xxxx
> 15: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[1].xyzz
> 16: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 17: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 18: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[4].xxxx
> 19: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 20: ADD TEMP[3].x, IMM[0].xxxx, -TEMP[3].xxxx
> 21: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[3].x, TEMP[2].yyyy, TEMP[3].xxxx
> 23: MAD TEMP[4].xyz, IMM[0].zzzz, TEMP[1].xyzz, IN[0].xyzz
> 24: MUL TEMP[5], CONST[4], TEMP[4].xxxx
> 25: MAD TEMP[5], CONST[5], TEMP[4].yyyy, TEMP[5]
> 26: MAD TEMP[4], CONST[6], TEMP[4].zzzz, TEMP[5]
> 27: ADD TEMP[4].xyz, TEMP[4], CONST[7]
> 28: MOV TEMP[5].xyz, TEMP[1].xyzz
> 29: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 30: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[0].xyzz
> 31: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 32: MAD TEMP[6].xyz, IMM[0].yyyy, TEMP[6].xyzz, -TEMP[0].xyzz
> 33: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[2].zzzz
> 34: MUL TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 35: MOV TEMP[8].xy, TEMP[4].xyyy
> 36: MOV TEMP[8].w, IMM[0].xxxx
> 37: MOV TEMP[8].z, TEMP[4].zzzz
> 38: TXP TEMP[4].x, TEMP[8], SAMP[0], SHADOW2D
> 39: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 40: MUL TEMP[8].x, IMM[1].xxxx, TEMP[2].yyyy
> 41: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[1].xyzz
> 42: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 43: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 44: MUL TEMP[4].xyz, CONST[3].xyzz, TEMP[4].xxxx
> 45: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[2].yyyy
> 46: MUL TEMP[4].xyz, TEMP[9].xxxx, TEMP[4].xyzz
> 47: MAD TEMP[4].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[4].xyzz
> 48: ADD TEMP[5].xyz, CONST[11].xyzz, -IN[0].xyzz
> 49: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 50: RSQ TEMP[9].x, TEMP[8].xxxx
> 51: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 52: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 53: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 54: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 55: MUL TEMP[8].x, TEMP[8].xxxx, CONST[11].wwww
> 56: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 57: ADD TEMP[8].x, IMM[0].xxxx, -TEMP[8].xxxx
> 58: MUL TEMP[8].xyz, CONST[12].xyzz, TEMP[8].xxxx
> 59: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[2].yyyy
> 60: MAD TEMP[4].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[4].xyzz
> 61: MOV TEMP[5].xy, IN[1].xyyy
> 62: TEX TEMP[5], TEMP[5], SAMP[5], 2D
> 63: MOV TEMP[8].w, TEMP[5].wwww
> 64: DP3 TEMP[9].x, TEMP[5].xyzz, IMM[1].yzww
> 65: MUL TEMP[9].x, TEMP[9].xxxx, CONST[17].xxxx
> 66: ADD TEMP[10].x, CONST[16].wwww, IMM[0].xxxx
> 67: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 68: MUL TEMP[8].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 69: MUL TEMP[5].xyz, TEMP[8], IMM[2].xxxx
> 70: MOV TEMP[8].xy, IN[1].xyyy
> 71: TEX TEMP[8].xyz, TEMP[8], SAMP[3], 2D
> 72: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[1].xyzz
> 73: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 74: ADD TEMP[0].x, IMM[0].xxxx, -TEMP[0].xxxx
> 75: POW TEMP[0].x, TEMP[0].xxxx, IMM[2].yyyy
> 76: MAX TEMP[1].xyz, TEMP[2].zzzz, IMM[2].zzzz
> 77: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[1].xyzz
> 78: MOV TEMP[1].xyz, TEMP[6].xyzz
> 79: MOV TEMP[1].w, TEMP[7].xxxx
> 80: TXL TEMP[1].xyz, TEMP[1], SAMP[2], CUBE
> 81: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 82: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx
> 83: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[8].xyzz, TEMP[0].xyzz
> 84: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[5].xyzz
> 85: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
> 86: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].zzzz
> 87: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
> 88: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].wwww
> 89: RCP TEMP[2].x, TEMP[2].xxxx
> 90: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 91: FRC TEMP[2].x, CONST[1].wwww
> 92: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].xxxx
> 93: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 94: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 95: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
> 96: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
> 97: MOV TEMP[0].w, IN[0].wwww
> 98: MOV OUT[0], TEMP[0]
> 99: END
>radeonsi: Compiling shader 95
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %67 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %68 = load <8 x i32>, <8 x i32> addrspace(2)* %67, align 32, !invariant.load !0
>  %69 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %70 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %69, i64 0, i64 19, !amdgpu.uniform !0
>  %71 = load <4 x i32>, <4 x i32> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = extractelement <8 x i32> %68, i32 7
>  %73 = extractelement <4 x i32> %71, i32 0
>  %74 = and i32 %73, %72
>  %75 = insertelement <4 x i32> %71, i32 %74, i32 0
>  %76 = bitcast float %65 to i32
>  %77 = bitcast float %66 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %79, <8 x i32> %68, <4 x i32> %75, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %81 = extractelement <4 x float> %80, i32 1
>  %82 = extractelement <4 x float> %80, i32 2
>  %83 = fmul float %60, %43
>  %84 = fmul float %62, %44
>  %85 = fadd float %84, %83
>  %86 = fmul float %64, %45
>  %87 = fadd float %85, %86
>  %88 = fmul float %87, %60
>  %89 = fmul float %87, %62
>  %90 = fmul float %87, %64
>  %91 = fmul float %88, 2.000000e+00
>  %92 = fmul float %89, 2.000000e+00
>  %93 = fmul float %90, 2.000000e+00
>  %94 = fsub float %43, %91
>  %95 = fsub float %44, %92
>  %96 = fsub float %45, %93
>  %97 = fmul float %94, %60
>  %98 = fmul float %95, %62
>  %99 = fadd float %98, %97
>  %100 = fmul float %96, %64
>  %101 = fadd float %99, %100
>  %102 = fadd float %101, 1.000000e+00
>  %103 = fmul float %43, %60
>  %104 = fmul float %44, %62
>  %105 = fadd float %104, %103
>  %106 = fmul float %45, %64
>  %107 = fadd float %105, %106
>  %108 = fsub float 1.000000e+00, %107
>  %109 = call float @llvm.AMDGPU.clamp.(float %108, float 0.000000e+00, float 1.000000e+00)
>  %110 = fsub float %102, %109
>  %111 = call float @llvm.AMDGPU.clamp.(float %110, float 0.000000e+00, float 1.000000e+00)
>  %112 = fsub float 1.000000e+00, %111
>  %113 = fmul float %112, %112
>  %114 = fmul float %81, %113
>  %115 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %116 = fmul float %60, 0x4007700140000000
>  %117 = fadd float %116, %115
>  %118 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %119 = fmul float %62, 0x4007700140000000
>  %120 = fadd float %119, %118
>  %121 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %122 = fmul float %64, 0x4007700140000000
>  %123 = fadd float %122, %121
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 64)
>  %127 = fmul float %126, %117
>  %128 = call float @llvm.SI.load.const(<16 x i8> %125, i32 68)
>  %129 = fmul float %128, %117
>  %130 = call float @llvm.SI.load.const(<16 x i8> %125, i32 72)
>  %131 = fmul float %130, %117
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 80)
>  %135 = fmul float %134, %120
>  %136 = fadd float %135, %127
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 84)
>  %138 = fmul float %137, %120
>  %139 = fadd float %138, %129
>  %140 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %141 = load <16 x i8>, <16 x i8> addrspace(2)* %140, align 16, !invariant.load !0
>  %142 = call float @llvm.SI.load.const(<16 x i8> %141, i32 88)
>  %143 = fmul float %142, %120
>  %144 = fadd float %143, %131
>  %145 = call float @llvm.SI.load.const(<16 x i8> %141, i32 96)
>  %146 = fmul float %145, %123
>  %147 = fadd float %146, %136
>  %148 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %149 = load <16 x i8>, <16 x i8> addrspace(2)* %148, align 16, !invariant.load !0
>  %150 = call float @llvm.SI.load.const(<16 x i8> %149, i32 100)
>  %151 = fmul float %150, %123
>  %152 = fadd float %151, %139
>  %153 = call float @llvm.SI.load.const(<16 x i8> %149, i32 104)
>  %154 = fmul float %153, %123
>  %155 = fadd float %154, %144
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = call float @llvm.SI.load.const(<16 x i8> %157, i32 112)
>  %159 = fadd float %147, %158
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 116)
>  %161 = fadd float %152, %160
>  %162 = call float @llvm.SI.load.const(<16 x i8> %157, i32 120)
>  %163 = fadd float %155, %162
>  %164 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %165 = load <8 x i32>, <8 x i32> addrspace(2)* %164, align 32, !invariant.load !0
>  %166 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %167 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %166, i64 0, i64 7, !amdgpu.uniform !0
>  %168 = load <4 x i32>, <4 x i32> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = extractelement <8 x i32> %165, i32 7
>  %170 = extractelement <4 x i32> %168, i32 0
>  %171 = and i32 %170, %169
>  %172 = insertelement <4 x i32> %168, i32 %171, i32 0
>  %173 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %174 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %175 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %176 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %177 = call float @llvm.fabs.f32(float %175)
>  %178 = fdiv float 1.000000e+00, %177, !fpmath !1
>  %179 = fmul float %173, %178
>  %180 = fadd float %179, 1.500000e+00
>  %181 = fmul float %174, %178
>  %182 = fadd float %181, 1.500000e+00
>  %183 = bitcast float %182 to i32
>  %184 = bitcast float %180 to i32
>  %185 = bitcast float %176 to i32
>  %186 = insertelement <4 x i32> undef, i32 %183, i32 0
>  %187 = insertelement <4 x i32> %186, i32 %184, i32 1
>  %188 = insertelement <4 x i32> %187, i32 %185, i32 2
>  %189 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %188, <8 x i32> %165, <4 x i32> %172, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %190 = extractelement <4 x float> %189, i32 0
>  %191 = extractelement <4 x float> %189, i32 1
>  %192 = extractelement <4 x float> %189, i32 2
>  %193 = extractelement <4 x float> %189, i32 3
>  %194 = fmul float %60, %43
>  %195 = fmul float %62, %44
>  %196 = fadd float %195, %194
>  %197 = fmul float %64, %45
>  %198 = fadd float %196, %197
>  %199 = fmul float %198, %60
>  %200 = fmul float %198, %62
>  %201 = fmul float %198, %64
>  %202 = fmul float %199, 2.000000e+00
>  %203 = fsub float %202, %43
>  %204 = fmul float %200, 2.000000e+00
>  %205 = fsub float %204, %44
>  %206 = fmul float %201, 2.000000e+00
>  %207 = fsub float %206, %45
>  %208 = fsub float 1.000000e+00, %82
>  %209 = fmul float %208, 6.000000e+00
>  %210 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <8 x i32>, <8 x i32> addrspace(2)* %210, align 32, !invariant.load !0
>  %212 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %213 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %212, i64 0, i64 3, !amdgpu.uniform !0
>  %214 = load <4 x i32>, <4 x i32> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = extractelement <8 x i32> %211, i32 7
>  %216 = extractelement <4 x i32> %214, i32 0
>  %217 = and i32 %216, %215
>  %218 = insertelement <4 x i32> %214, i32 %217, i32 0
>  %219 = bitcast float %163 to i32
>  %220 = bitcast float %159 to i32
>  %221 = bitcast float %161 to i32
>  %222 = insertelement <4 x i32> undef, i32 %219, i32 0
>  %223 = insertelement <4 x i32> %222, i32 %220, i32 1
>  %224 = insertelement <4 x i32> %223, i32 %221, i32 2
>  %225 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %224, <8 x i32> %211, <4 x i32> %218, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %226 = extractelement <4 x float> %225, i32 0
>  %227 = fmul float %190, %193
>  %228 = fmul float %191, %193
>  %229 = fmul float %192, %193
>  %230 = fmul float %81, 4.000000e+00
>  %231 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %232 = load <16 x i8>, <16 x i8> addrspace(2)* %231, align 16, !invariant.load !0
>  %233 = call float @llvm.SI.load.const(<16 x i8> %232, i32 16)
>  %234 = call float @llvm.SI.load.const(<16 x i8> %232, i32 20)
>  %235 = call float @llvm.SI.load.const(<16 x i8> %232, i32 24)
>  %236 = fmul float %233, %60
>  %237 = fsub float -0.000000e+00, %236
>  %238 = fmul float %234, %62
>  %239 = fsub float %237, %238
>  %240 = fmul float %235, %64
>  %241 = fsub float %239, %240
>  %242 = call float @llvm.AMDGPU.clamp.(float %241, float 0.000000e+00, float 1.000000e+00)
>  %243 = fmul float %226, %226
>  %244 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %245 = load <16 x i8>, <16 x i8> addrspace(2)* %244, align 16, !invariant.load !0
>  %246 = call float @llvm.SI.load.const(<16 x i8> %245, i32 48)
>  %247 = fmul float %246, %243
>  %248 = call float @llvm.SI.load.const(<16 x i8> %245, i32 52)
>  %249 = fmul float %248, %243
>  %250 = call float @llvm.SI.load.const(<16 x i8> %245, i32 56)
>  %251 = fmul float %250, %243
>  %252 = fmul float %247, %81
>  %253 = fmul float %249, %81
>  %254 = fmul float %251, %81
>  %255 = fmul float %242, %252
>  %256 = fmul float %242, %253
>  %257 = fmul float %242, %254
>  %258 = fmul float %227, %230
>  %259 = fadd float %258, %255
>  %260 = fmul float %228, %230
>  %261 = fadd float %260, %256
>  %262 = fmul float %229, %230
>  %263 = fadd float %262, %257
>  %264 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %265 = load <16 x i8>, <16 x i8> addrspace(2)* %264, align 16, !invariant.load !0
>  %266 = call float @llvm.SI.load.const(<16 x i8> %265, i32 176)
>  %267 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %268 = fsub float %266, %267
>  %269 = call float @llvm.SI.load.const(<16 x i8> %265, i32 180)
>  %270 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %271 = fsub float %269, %270
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 184)
>  %275 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %276 = fsub float %274, %275
>  %277 = fmul float %268, %268
>  %278 = fmul float %271, %271
>  %279 = fadd float %278, %277
>  %280 = fmul float %276, %276
>  %281 = fadd float %279, %280
>  %282 = call float @llvm.sqrt.f32(float %281)
>  %283 = fdiv float 1.000000e+00, %282, !fpmath !1
>  %284 = fmul float %268, %283
>  %285 = fmul float %271, %283
>  %286 = fmul float %276, %283
>  %287 = fmul float %284, %60
>  %288 = fmul float %285, %62
>  %289 = fadd float %288, %287
>  %290 = fmul float %286, %64
>  %291 = fadd float %289, %290
>  %292 = call float @llvm.AMDGPU.clamp.(float %291, float 0.000000e+00, float 1.000000e+00)
>  %293 = fmul float %281, %283
>  %294 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %295 = load <16 x i8>, <16 x i8> addrspace(2)* %294, align 16, !invariant.load !0
>  %296 = call float @llvm.SI.load.const(<16 x i8> %295, i32 188)
>  %297 = fmul float %293, %296
>  %298 = call float @llvm.AMDGPU.clamp.(float %297, float 0.000000e+00, float 1.000000e+00)
>  %299 = fsub float 1.000000e+00, %298
>  %300 = call float @llvm.SI.load.const(<16 x i8> %295, i32 192)
>  %301 = fmul float %300, %299
>  %302 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %303 = load <16 x i8>, <16 x i8> addrspace(2)* %302, align 16, !invariant.load !0
>  %304 = call float @llvm.SI.load.const(<16 x i8> %303, i32 196)
>  %305 = fmul float %304, %299
>  %306 = call float @llvm.SI.load.const(<16 x i8> %303, i32 200)
>  %307 = fmul float %306, %299
>  %308 = fmul float %301, %81
>  %309 = fmul float %305, %81
>  %310 = fmul float %307, %81
>  %311 = fmul float %292, %308
>  %312 = fadd float %311, %259
>  %313 = fmul float %292, %309
>  %314 = fadd float %313, %261
>  %315 = fmul float %292, %310
>  %316 = fadd float %315, %263
>  %317 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %318 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %319 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %320 = load <8 x i32>, <8 x i32> addrspace(2)* %319, align 32, !invariant.load !0
>  %321 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %322 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %321, i64 0, i64 23, !amdgpu.uniform !0
>  %323 = load <4 x i32>, <4 x i32> addrspace(2)* %322, align 16, !invariant.load !0
>  %324 = extractelement <8 x i32> %320, i32 7
>  %325 = extractelement <4 x i32> %323, i32 0
>  %326 = and i32 %325, %324
>  %327 = insertelement <4 x i32> %323, i32 %326, i32 0
>  %328 = bitcast float %317 to i32
>  %329 = bitcast float %318 to i32
>  %330 = insertelement <2 x i32> undef, i32 %328, i32 0
>  %331 = insertelement <2 x i32> %330, i32 %329, i32 1
>  %332 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %331, <8 x i32> %320, <4 x i32> %327, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %333 = extractelement <4 x float> %332, i32 0
>  %334 = extractelement <4 x float> %332, i32 1
>  %335 = extractelement <4 x float> %332, i32 2
>  %336 = fmul float %333, 0x3FD3333340000000
>  %337 = fmul float %334, 0x3FE2E147A0000000
>  %338 = fadd float %337, %336
>  %339 = fmul float %335, 0x3FBC28F5C0000000
>  %340 = fadd float %338, %339
>  %341 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %342 = load <16 x i8>, <16 x i8> addrspace(2)* %341, align 16, !invariant.load !0
>  %343 = call float @llvm.SI.load.const(<16 x i8> %342, i32 272)
>  %344 = fmul float %340, %343
>  %345 = call float @llvm.SI.load.const(<16 x i8> %342, i32 268)
>  %346 = fadd float %345, 1.000000e+00
>  %347 = fmul float %344, %346
>  %348 = fmul float %333, %347
>  %349 = fmul float %334, %347
>  %350 = fmul float %335, %347
>  %351 = fmul float %348, 3.200000e+01
>  %352 = fmul float %349, 3.200000e+01
>  %353 = fmul float %350, 3.200000e+01
>  %354 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %355 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %356 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %357 = load <8 x i32>, <8 x i32> addrspace(2)* %356, align 32, !invariant.load !0
>  %358 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %359 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %358, i64 0, i64 15, !amdgpu.uniform !0
>  %360 = load <4 x i32>, <4 x i32> addrspace(2)* %359, align 16, !invariant.load !0
>  %361 = extractelement <8 x i32> %357, i32 7
>  %362 = extractelement <4 x i32> %360, i32 0
>  %363 = and i32 %362, %361
>  %364 = insertelement <4 x i32> %360, i32 %363, i32 0
>  %365 = bitcast float %354 to i32
>  %366 = bitcast float %355 to i32
>  %367 = insertelement <2 x i32> undef, i32 %365, i32 0
>  %368 = insertelement <2 x i32> %367, i32 %366, i32 1
>  %369 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %368, <8 x i32> %357, <4 x i32> %364, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %370 = extractelement <4 x float> %369, i32 0
>  %371 = extractelement <4 x float> %369, i32 1
>  %372 = extractelement <4 x float> %369, i32 2
>  %373 = fmul float %43, %60
>  %374 = fmul float %44, %62
>  %375 = fadd float %374, %373
>  %376 = fmul float %45, %64
>  %377 = fadd float %375, %376
>  %378 = call float @llvm.AMDGPU.clamp.(float %377, float 0.000000e+00, float 1.000000e+00)
>  %379 = fsub float 1.000000e+00, %378
>  %380 = call float @llvm.pow.f32(float %379, float 5.000000e+00)
>  %381 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %382 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %383 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %384 = fmul float %380, %381
>  %385 = fmul float %380, %382
>  %386 = fmul float %380, %383
>  %387 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %388 = load <8 x i32>, <8 x i32> addrspace(2)* %387, align 32, !invariant.load !0
>  %389 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %390 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %389, i64 0, i64 11, !amdgpu.uniform !0
>  %391 = load <4 x i32>, <4 x i32> addrspace(2)* %390, align 16, !invariant.load !0
>  %392 = extractelement <8 x i32> %388, i32 7
>  %393 = extractelement <4 x i32> %391, i32 0
>  %394 = and i32 %393, %392
>  %395 = insertelement <4 x i32> %391, i32 %394, i32 0
>  %396 = call float @llvm.amdgcn.cubetc(float %203, float %205, float %207)
>  %397 = call float @llvm.amdgcn.cubesc(float %203, float %205, float %207)
>  %398 = call float @llvm.amdgcn.cubema(float %203, float %205, float %207)
>  %399 = call float @llvm.amdgcn.cubeid(float %203, float %205, float %207)
>  %400 = call float @llvm.fabs.f32(float %398)
>  %401 = fdiv float 1.000000e+00, %400, !fpmath !1
>  %402 = fmul float %396, %401
>  %403 = fadd float %402, 1.500000e+00
>  %404 = fmul float %397, %401
>  %405 = fadd float %404, 1.500000e+00
>  %406 = bitcast float %405 to i32
>  %407 = bitcast float %403 to i32
>  %408 = bitcast float %399 to i32
>  %409 = bitcast float %209 to i32
>  %410 = insertelement <4 x i32> undef, i32 %406, i32 0
>  %411 = insertelement <4 x i32> %410, i32 %407, i32 1
>  %412 = insertelement <4 x i32> %411, i32 %408, i32 2
>  %413 = insertelement <4 x i32> %412, i32 %409, i32 3
>  %414 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %413, <8 x i32> %388, <4 x i32> %395, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %415 = extractelement <4 x float> %414, i32 0
>  %416 = extractelement <4 x float> %414, i32 1
>  %417 = extractelement <4 x float> %414, i32 2
>  %418 = fmul float %384, %415
>  %419 = fmul float %385, %416
>  %420 = fmul float %386, %417
>  %421 = fmul float %418, %114
>  %422 = fmul float %419, %114
>  %423 = fmul float %420, %114
>  %424 = fmul float %312, %370
>  %425 = fadd float %424, %421
>  %426 = fmul float %314, %371
>  %427 = fadd float %426, %422
>  %428 = fmul float %316, %372
>  %429 = fadd float %428, %423
>  %430 = fadd float %425, %351
>  %431 = fadd float %427, %352
>  %432 = fadd float %429, %353
>  %433 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %434 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %435 = load <16 x i8>, <16 x i8> addrspace(2)* %434, align 16, !invariant.load !0
>  %436 = call float @llvm.SI.load.const(<16 x i8> %435, i32 12)
>  %437 = fsub float %433, %436
>  %438 = call float @llvm.maxnum.f32(float %437, float 0.000000e+00)
>  %439 = call float @llvm.SI.load.const(<16 x i8> %435, i32 28)
>  %440 = call float @llvm.SI.load.const(<16 x i8> %435, i32 12)
>  %441 = fsub float %439, %440
>  %442 = fadd float %441, 0x3F50624DE0000000
>  %443 = fdiv float 1.000000e+00, %442, !fpmath !1
>  %444 = fmul float %438, %443
>  %445 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %446 = load <16 x i8>, <16 x i8> addrspace(2)* %445, align 16, !invariant.load !0
>  %447 = call float @llvm.SI.load.const(<16 x i8> %446, i32 28)
>  %448 = call float @llvm.floor.f32(float %447)
>  %449 = fsub float %447, %448
>  %450 = fmul float %449, 8.000000e+00
>  %451 = call float @llvm.pow.f32(float %444, float %450)
>  %452 = call float @llvm.AMDGPU.clamp.(float %451, float 0.000000e+00, float 1.000000e+00)
>  %453 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %454 = fmul float %453, %452
>  %455 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %456 = load <16 x i8>, <16 x i8> addrspace(2)* %455, align 16, !invariant.load !0
>  %457 = call float @llvm.SI.load.const(<16 x i8> %456, i32 32)
>  %458 = fsub float 1.000000e+00, %454
>  %459 = fmul float %430, %454
>  %460 = fmul float %457, %458
>  %461 = fadd float %459, %460
>  %462 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %463 = load <16 x i8>, <16 x i8> addrspace(2)* %462, align 16, !invariant.load !0
>  %464 = call float @llvm.SI.load.const(<16 x i8> %463, i32 36)
>  %465 = fsub float 1.000000e+00, %454
>  %466 = fmul float %431, %454
>  %467 = fmul float %464, %465
>  %468 = fadd float %466, %467
>  %469 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %470 = load <16 x i8>, <16 x i8> addrspace(2)* %469, align 16, !invariant.load !0
>  %471 = call float @llvm.SI.load.const(<16 x i8> %470, i32 40)
>  %472 = fsub float 1.000000e+00, %454
>  %473 = fmul float %432, %454
>  %474 = fmul float %471, %472
>  %475 = fadd float %473, %474
>  %476 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %477 = bitcast float %5 to i32
>  %478 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %477, 10
>  %479 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %478, float %461, 11
>  %480 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %479, float %468, 12
>  %481 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %480, float %475, 13
>  %482 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %481, float %476, 14
>  %483 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %482, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %483
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x10                 ; C0880B10
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[12:15], v4, s[4:7], 0 idxen   ; E00C2000 80010C04
>	buffer_load_format_xyzw v[16:19], v5, s[12:15], 0 idxen ; E00C2000 80031005
>	buffer_load_format_xyzw v[8:11], v8, s[16:19], 0 idxen  ; E00C2000 80040808
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v10, s4                                   ; 7E140204
>	v_mov_b32_e32 v11, s5                                   ; 7E160205
>	v_mov_b32_e32 v19, s6                                   ; 7E260206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v3, s4                                    ; 7E060204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v22, s7, v10                              ; 082C1407
>	v_mov_b32_e32 v5, s8                                    ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v6, s4                                    ; 7E0C0204
>	v_mov_b32_e32 v4, s5                                    ; 7E080205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v23, s6, v11                              ; 082E1606
>	v_mov_b32_e32 v20, s7                                   ; 7E280207
>	v_mov_b32_e32 v21, s8                                   ; 7E2A0208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v7, s4                                    ; 7E0E0204
>	v_sub_f32_e32 v24, s5, v19                              ; 08302605
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v29                               ; 7E00111D
>	v_mul_lo_i32 v7, v0, 48                                 ; D2D60007 00016100
>	v_add_i32_e32 v0, vcc, s14, v7                          ; 4A000E0E
>	v_add_i32_e32 v4, vcc, s13, v7                          ; 4A080E0D
>	v_add_i32_e32 v5, vcc, s15, v7                          ; 4A0A0E0F
>	v_add_i32_e32 v1, vcc, s12, v7                          ; 4A020E0C
>	buffer_load_dword v3, v0, s[0:3], 0 offen               ; E0301000 80000300
>	buffer_load_dword v0, v4, s[0:3], 0 offen               ; E0301000 80000004
>	buffer_load_dword v4, v5, s[0:3], 0 offen               ; E0301000 80000405
>	buffer_load_dword v1, v1, s[0:3], 0 offen               ; E0301000 80000101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v22, v10, v4                           ; 0A2C090A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0x8c, v7                         ; 4A0A0EFF 0000008C
>	v_add_i32_e32 v23, vcc, 0x9c, v7                        ; 4A2E0EFF 0000009C
>	v_add_i32_e32 v4, vcc, 0x80, v7                         ; 4A080EFF 00000080
>	v_add_i32_e32 v20, vcc, 0x88, v7                        ; 4A280EFF 00000088
>	v_add_i32_e32 v6, vcc, 0x84, v7                         ; 4A0C0EFF 00000084
>	v_add_i32_e32 v21, vcc, 0x94, v7                        ; 4A2A0EFF 00000094
>	buffer_load_dword v24, v5, s[0:3], 0 offen              ; E0301000 80001805
>	buffer_load_dword v5, v4, s[0:3], 0 offen               ; E0301000 80000504
>	buffer_load_dword v4, v20, s[0:3], 0 offen              ; E0301000 80000414
>	v_add_i32_e32 v20, vcc, 0x90, v7                        ; 4A280EFF 00000090
>	v_add_i32_e32 v7, vcc, 0x98, v7                         ; 4A0E0EFF 00000098
>	buffer_load_dword v25, v23, s[0:3], 0 offen             ; E0301000 80001917
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v23, v11, v24                          ; 0A2E310B
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v24, v19, v25                          ; 0A303313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v4, v30                               ; 7E08111E
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	v_add_i32_e32 v20, vcc, s8, v7                          ; 4A280E08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[25:28], v6, s[4:7], 0 idxen   ; E00C2000 80011906
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v21, vcc, s4, v7                          ; 4A2A0E04
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	v_mul_lo_i32 v29, v4, 48                                ; D2D6001D 00016104
>	v_add_i32_e32 v4, vcc, s11, v7                          ; 4A080E0B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v5, vcc, s10, v7                          ; 4A0A0E0A
>	v_add_i32_e32 v6, vcc, s9, v7                           ; 4A0C0E09
>	v_add_i32_e32 v24, vcc, s6, v7                          ; 4A300E06
>	buffer_load_dword v23, v4, s[0:3], 0 offen              ; E0301000 80001704
>	v_add_i32_e32 v4, vcc, s7, v7                           ; 4A080E07
>	v_add_i32_e32 v7, vcc, s5, v7                           ; 4A0E0E05
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v30, v4, s[0:3], 0 offen              ; E0301000 80001E04
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v3, v25, v3                               ; 10060719
>	v_mul_f32_e32 v1, v25, v1                               ; 10020319
>	v_mul_f32_e32 v0, v25, v0                               ; 10000119
>	v_mul_f32_e32 v22, v25, v22                             ; 102C2D19
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v33, v19, v21                          ; 0A422B13
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v4, v25, v20                              ; 10082919
>	v_subrev_f32_e32 v20, v11, v23                          ; 0A282F0B
>	v_mul_f32_e32 v23, v25, v20                             ; 102E2919
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v5, v25, v5                               ; 100A0B19
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v6, v25, v6                               ; 100C0D19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v21, v25, v24                             ; 102A3119
>	v_mul_f32_e32 v20, v25, v30                             ; 10283D19
>	v_mul_f32_e32 v7, v25, v7                               ; 100E0F19
>	v_mul_f32_e32 v24, v25, v33                             ; 10304319
>	v_add_i32_e32 v25, vcc, s15, v29                        ; 4A323A0F
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v10, v25                          ; 0A32330A
>	v_mac_f32_e32 v22, v26, v25                             ; 3E2C331A
>	v_add_i32_e32 v25, vcc, s11, v29                        ; 4A323A0B
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v11, v25                          ; 0A32330B
>	v_mac_f32_e32 v23, v26, v25                             ; 3E2E331A
>	v_add_i32_e32 v25, vcc, s14, v29                        ; 4A323A0E
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v25                              ; 3E06331A
>	v_add_i32_e32 v25, vcc, s12, v29                        ; 4A323A0C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v25                              ; 3E02331A
>	v_add_i32_e32 v25, vcc, s13, v29                        ; 4A323A0D
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v25                              ; 3E00331A
>	v_add_i32_e32 v25, vcc, s10, v29                        ; 4A323A0A
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v25                              ; 3E0A331A
>	v_add_i32_e32 v25, vcc, s9, v29                         ; 4A323A09
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v25                              ; 3E0C331A
>	v_add_i32_e32 v25, vcc, s8, v29                         ; 4A323A08
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v25                              ; 3E08331A
>	v_add_i32_e32 v25, vcc, s7, v29                         ; 4A323A07
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v26, v25                             ; 3E28331A
>	v_add_i32_e32 v25, vcc, s6, v29                         ; 4A323A06
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v26, v25                             ; 3E2A331A
>	v_add_i32_e32 v25, vcc, s5, v29                         ; 4A323A05
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v25                              ; 3E0E331A
>	v_add_i32_e32 v25, vcc, s4, v29                         ; 4A323A04
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	v_mac_f32_e32 v24, v26, v25                             ; 3E30331A
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v31                              ; 7E32111F
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0x70, v25                       ; 4A3432FF 00000070
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v27, v26                              ; 3E06351B
>	v_add_i32_e32 v26, vcc, 0x7c, v25                       ; 4A3432FF 0000007C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v10, v26                          ; 0A34350A
>	v_mac_f32_e32 v22, v27, v26                             ; 3E2C351B
>	v_add_i32_e32 v26, vcc, s11, v25                        ; 4A34320B
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v11, v26                          ; 0A34350B
>	v_mac_f32_e32 v23, v27, v26                             ; 3E2E351B
>	v_add_i32_e32 v26, vcc, 0x74, v25                       ; 4A3432FF 00000074
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v27, v26                              ; 3E02351B
>	v_add_i32_e32 v26, vcc, 0x78, v25                       ; 4A3432FF 00000078
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v27, v26                              ; 3E00351B
>	v_add_i32_e32 v26, vcc, s10, v25                        ; 4A34320A
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v27, v26                              ; 3E0A351B
>	v_add_i32_e32 v26, vcc, s9, v25                         ; 4A343209
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v27, v26                              ; 3E0C351B
>	v_add_i32_e32 v26, vcc, s8, v25                         ; 4A343208
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v27, v26                              ; 3E08351B
>	v_add_i32_e32 v26, vcc, s7, v25                         ; 4A343207
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v27, v26                             ; 3E28351B
>	v_add_i32_e32 v26, vcc, s6, v25                         ; 4A343206
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v27, v26                             ; 3E2A351B
>	v_add_i32_e32 v26, vcc, s5, v25                         ; 4A343205
>	v_add_i32_e32 v25, vcc, s4, v25                         ; 4A323204
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v27, v26                              ; 3E0E351B
>	v_mac_f32_e32 v24, v27, v25                             ; 3E30331B
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v32                              ; 7E321120
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0x70, v25                       ; 4A3432FF 00000070
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v28, v26                              ; 3E06351C
>	v_add_i32_e32 v26, vcc, 0x7c, v25                       ; 4A3432FF 0000007C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v10, v26                          ; 0A34350A
>	v_mac_f32_e32 v22, v28, v26                             ; 3E2C351C
>	v_add_i32_e32 v26, vcc, 0x8c, v25                       ; 4A3432FF 0000008C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v11, v26                          ; 0A34350B
>	v_mac_f32_e32 v23, v28, v26                             ; 3E2E351C
>	v_add_i32_e32 v26, vcc, 0x74, v25                       ; 4A3432FF 00000074
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v28, v26                              ; 3E02351C
>	v_add_i32_e32 v26, vcc, 0x78, v25                       ; 4A3432FF 00000078
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v28, v26                              ; 3E00351C
>	v_add_i32_e32 v26, vcc, 0x80, v25                       ; 4A3432FF 00000080
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v28, v26                              ; 3E0A351C
>	v_add_i32_e32 v26, vcc, 0x84, v25                       ; 4A3432FF 00000084
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v28, v26                              ; 3E0C351C
>	v_add_i32_e32 v26, vcc, 0x88, v25                       ; 4A3432FF 00000088
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v28, v26                              ; 3E08351C
>	v_add_i32_e32 v26, vcc, 0x90, v25                       ; 4A3432FF 00000090
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v28, v26                             ; 3E28351C
>	v_add_i32_e32 v26, vcc, 0x94, v25                       ; 4A3432FF 00000094
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v28, v26                             ; 3E2A351C
>	v_add_i32_e32 v26, vcc, 0x98, v25                       ; 4A3432FF 00000098
>	v_add_i32_e32 v25, vcc, 0x9c, v25                       ; 4A3232FF 0000009C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v28, v26                              ; 3E0E351C
>	v_mac_f32_e32 v24, v28, v25                             ; 3E30331C
>	v_mul_f32_e32 v25, v1, v13                              ; 10321B01
>	v_mac_f32_e32 v25, v3, v12                              ; 3E321903
>	v_mac_f32_e32 v25, v0, v14                              ; 3E321D00
>	v_mac_f32_e32 v25, v22, v15                             ; 3E321F16
>	v_mul_f32_e32 v22, v6, v13                              ; 102C1B06
>	v_mac_f32_e32 v22, v5, v12                              ; 3E2C1905
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_mac_f32_e32 v22, v4, v14                              ; 3E2C1D04
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mac_f32_e32 v22, v23, v15                             ; 3E2C1F17
>	v_mul_f32_e32 v23, v21, v13                             ; 102E1B15
>	v_mul_f32_e32 v13, 0, v13                               ; 101A1A80
>	v_mac_f32_e32 v23, v20, v12                             ; 3E2E1914
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_add_f32_e32 v16, v16, v16                             ; 06202110
>	v_mac_f32_e32 v23, v7, v14                              ; 3E2E1D07
>	v_mac_f32_e32 v13, 0, v14                               ; 3E1A1C80
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_mad_f32 v3, v16, v3, -v3                              ; D2820003 840E0710
>	v_add_f32_e32 v10, v10, v25                             ; 0614330A
>	v_mac_f32_e32 v23, v24, v15                             ; 3E2E1F18
>	v_add_f32_e32 v12, v15, v13                             ; 06181B0F
>	v_mac_f32_e32 v3, v1, v17                               ; 3E062301
>	v_mad_f32 v1, v16, v5, -v5                              ; D2820001 84160B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v5, s4, v10                               ; 100A1404
>	v_mul_f32_e32 v15, s5, v10                              ; 101E1405
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	v_mac_f32_e32 v1, v6, v17                               ; 3E022306
>	v_mad_f32 v6, v16, v20, -v20                            ; D2820006 84522910
>	v_mul_f32_e32 v16, s6, v10                              ; 10201406
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	v_add_f32_e32 v11, v11, v22                             ; 06162D0B
>	v_mac_f32_e32 v6, v21, v17                              ; 3E0C2315
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v17, s7, v10                              ; 10221407
>	v_mac_f32_e32 v5, s8, v11                               ; 3E0A1608
>	v_mac_f32_e32 v15, s4, v11                              ; 3E1E1604
>	v_mac_f32_e32 v16, s5, v11                              ; 3E201605
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mac_f32_e32 v17, s6, v11                              ; 3E221606
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	v_add_f32_e32 v14, v19, v23                             ; 061C2F13
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v5, s7, v14                               ; 3E0A1C07
>	v_mac_f32_e32 v15, s8, v14                              ; 3E1E1C08
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	v_mac_f32_e32 v16, s4, v14                              ; 3E201C04
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	v_mac_f32_e32 v17, s5, v14                              ; 3E221C05
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	s_buffer_load_dword s5, s[0:3], 0x14                    ; C2028114
>	v_mac_f32_e32 v5, s6, v12                               ; 3E0A1806
>	s_buffer_load_dword s6, s[0:3], 0x15                    ; C2030115
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v12                              ; 3E1E1807
>	v_mac_f32_e32 v16, s8, v12                              ; 3E201808
>	v_mac_f32_e32 v17, s4, v12                              ; 3E221804
>	v_mov_b32_e32 v12, s5                                   ; 7E180205
>	v_mac_f32_e32 v12, s6, v16                              ; 3E182006
>	v_add_f32_e64 v12, v12, 0 clamp                         ; D206080C 0001010C
>	s_buffer_load_dword s7, s[0:3], 0x16                    ; C2038116
>	v_log_f32_e32 v12, v12                                  ; 7E184F0C
>	s_buffer_load_dword s8, s[0:3], 0x17                    ; C2040117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	v_mad_f32 v13, 2.0, v18, -1.0                           ; D282000D 03CE24F4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v12, s7, v12                       ; 0E181807
>	v_exp_f32_e32 v12, v12                                  ; 7E184B0C
>	v_sub_f32_e64 v18, 1.0, s8                              ; D2080012 000010F2
>	v_mac_f32_e32 v3, v0, v13                               ; 3E061B00
>	v_mul_f32_e32 v0, s0, v17                               ; 10002200
>	v_mac_f32_e32 v18, s8, v12                              ; 3E241808
>	v_mac_f32_e32 v1, v4, v13                               ; 3E021B04
>	v_mul_f32_e32 v4, v18, v18                              ; 10082512
>	exp 15, 32, 0, 0, 0, v10, v11, v14, v0                  ; F800020F 000E0B0A
>	v_mac_f32_e32 v6, v7, v13                               ; 3E0C1B07
>	exp 15, 33, 0, 0, 0, v8, v9, v4, v0                     ; F800021F 00040908
>	exp 15, 34, 0, 0, 0, v3, v1, v6, v0                     ; F800022F 00060103
>	exp 15, 12, 0, 1, 0, v5, v15, v16, v17                  ; F80008CF 11100F05
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2020 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v6, v2, 0, 0, [m0]                          ; C8180002
>	v_interp_p2_f32 v6, [v6], v3, 0, 0, [m0]                    ; C8190003
>	v_interp_p1_f32 v12, v2, 1, 0, [m0]                         ; C8300102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	s_buffer_load_dword s12, s[0:3], 0x2                        ; C2060102
>	v_interp_p2_f32 v12, [v12], v3, 1, 0, [m0]                  ; C8310103
>	v_interp_p1_f32 v19, v2, 2, 0, [m0]                         ; C84C0202
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v7, s8, v6                                    ; 080E0C08
>	v_interp_p2_f32 v19, [v19], v3, 2, 0, [m0]                  ; C84D0203
>	v_sub_f32_e32 v8, s9, v12                                   ; 08101809
>	v_mul_f32_e32 v0, v7, v7                                    ; 10000F07
>	v_interp_p1_f32 v11, v4, 0, 2, [m0]                         ; C82C0804
>	v_sub_f32_e32 v9, s12, v19                                  ; 0812260C
>	v_mac_f32_e32 v0, v8, v8                                    ; 3E001108
>	v_mac_f32_e32 v0, v9, v9                                    ; 3E001309
>	v_interp_p2_f32 v11, [v11], v5, 0, 2, [m0]                  ; C82D0805
>	v_interp_p1_f32 v14, v4, 1, 2, [m0]                         ; C8380904
>	v_rsq_f32_e32 v10, v0                                       ; 7E145D00
>	v_interp_p2_f32 v14, [v14], v5, 1, 2, [m0]                  ; C8390905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                          ; C8100A04
>	v_mul_f32_e32 v0, v11, v11                                  ; 1000170B
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                    ; C8110A05
>	v_mac_f32_e32 v0, v14, v14                                  ; 3E001D0E
>	v_mac_f32_e32 v0, v4, v4                                    ; 3E000904
>	v_rsq_f32_e32 v5, v0                                        ; 7E0A5D00
>	v_mul_f32_e32 v15, v10, v7                                  ; 101E0F0A
>	v_mul_f32_e32 v16, v10, v8                                  ; 1020110A
>	v_mul_f32_e32 v17, v10, v9                                  ; 1022130A
>	v_mul_f32_e32 v20, v5, v11                                  ; 10281705
>	v_mul_f32_e32 v21, v5, v14                                  ; 102A1D05
>	v_mul_f32_e32 v22, v15, v20                                 ; 102C290F
>	v_mul_f32_e32 v5, v5, v4                                    ; 100A0905
>	v_mac_f32_e32 v22, v16, v21                                 ; 3E2C2B10
>	v_mac_f32_e32 v22, v17, v5                                  ; 3E2C0B11
>	v_mul_f32_e32 v4, v20, v22                                  ; 10082D14
>	v_mul_f32_e32 v11, v21, v22                                 ; 10162D15
>	v_mac_f32_e32 v4, v20, v22                                  ; 3E082D14
>	v_mul_f32_e32 v14, v5, v22                                  ; 101C2D05
>	v_mac_f32_e32 v11, v21, v22                                 ; 3E162D15
>	v_mad_f32 v15, v7, v10, -v4                                 ; D282000F 84121507
>	v_mac_f32_e32 v14, v5, v22                                  ; 3E1C2D05
>	v_mad_f32 v16, v8, v10, -v11                                ; D2820010 842E1508
>	v_mul_f32_e32 v15, v20, v15                                 ; 101E1F14
>	v_mac_f32_e32 v15, v21, v16                                 ; 3E1E2115
>	v_mad_f32 v16, v9, v10, -v14                                ; D2820010 843A1509
>	v_mac_f32_e32 v15, v5, v16                                  ; 3E1E2105
>	v_sub_f32_e32 v16, 1.0, v22                                 ; 08202CF2
>	v_add_f32_e32 v15, 1.0, v15                                 ; 061E1EF2
>	v_add_f32_e64 v16, v16, 0 clamp                             ; D2060810 00010110
>	v_subrev_f32_e32 v15, v16, v15                              ; 0A1E1F10
>	s_buffer_load_dword s13, s[0:3], 0x10                       ; C2068110
>	s_buffer_load_dword s14, s[0:3], 0x11                       ; C2070111
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	v_add_f32_e64 v15, v15, 0 clamp                             ; D206080F 0001010F
>	v_sub_f32_e32 v16, 1.0, v15                                 ; 08201EF2
>	v_mad_f32 v23, -v15, v16, v16                               ; D2820017 2442210F
>	v_mov_b32_e32 v15, 0x403b800a                               ; 7E1E02FF 403B800A
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s12, s[0:3], 0x16                       ; C2060116
>	v_mad_f32 v24, -v7, v10, v4                                 ; D2820018 24121507
>	s_buffer_load_dword s20, s[0:3], 0x18                       ; C20A0118
>	s_buffer_load_dword s21, s[0:3], 0x19                       ; C20A8119
>	s_buffer_load_dword s22, s[0:3], 0x1a                       ; C20B011A
>	v_mad_f32 v4, v15, v20, v6                                  ; D2820004 041A290F
>	v_mad_f32 v25, -v8, v10, v11                                ; D2820019 242E1508
>	v_mad_f32 v26, -v9, v10, v14                                ; D282001A 243A1509
>	s_buffer_load_dword s28, s[0:3], 0x1c                       ; C20E011C
>	s_buffer_load_dword s29, s[0:3], 0x1d                       ; C20E811D
>	s_buffer_load_dword s30, s[0:3], 0x1e                       ; C20F011E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v10, s13, v4                                  ; 1014080D
>	v_mul_f32_e32 v11, s14, v4                                  ; 1016080E
>	v_mul_f32_e32 v14, s8, v4                                   ; 101C0808
>	v_cubema_f32 v4, v20, v21, v5                               ; D28E0004 04162B14
>	v_mad_f32 v7, v15, v21, v12                                 ; D2820007 04322B0F
>	v_mad_f32 v8, v15, v5, v19                                  ; D2820008 044E0B0F
>	v_rcp_f32_e64 v15, |v4|                                     ; D354010F 00000104
>	v_mac_f32_e32 v14, s12, v7                                  ; 3E1C0E0C
>	v_mac_f32_e32 v10, s9, v7                                   ; 3E140E09
>	v_mac_f32_e32 v11, s11, v7                                  ; 3E160E0B
>	v_mac_f32_e32 v14, s22, v8                                  ; 3E1C1016
>	v_mac_f32_e32 v11, s21, v8                                  ; 3E161015
>	v_mac_f32_e32 v10, s20, v8                                  ; 3E141014
>	v_cubetc_f32 v7, v20, v21, v5                               ; D28C0007 04162B14
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v8, v20, v21, v5                               ; D28A0008 04162B14
>	v_mad_f32 v9, v15, v7, v4                                   ; D2820009 04120F0F
>	v_mad_f32 v8, v15, v8, v4                                   ; D2820008 0412110F
>	v_add_f32_e32 v15, s28, v10                                 ; 061E141C
>	s_load_dwordx4 s[24:27], s[4:5], 0x4c                       ; C08C054C
>	v_add_f32_e32 v16, s29, v11                                 ; 0620161D
>	v_add_f32_e32 v14, s30, v14                                 ; 061C1C1E
>	s_load_dwordx8 s[28:35], s[4:5], 0x40                       ; C0CE0540
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_load_dwordx4 s[48:51], s[4:5], 0x1c                       ; C098051C
>	s_load_dwordx8 s[52:59], s[4:5], 0x10                       ; C0DA0510
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s24, s24, s35                                     ; 87182318
>	s_load_dwordx8 s[36:43], s[4:5], 0x0                        ; C0D20500
>	s_load_dwordx4 s[44:47], s[4:5], 0xc                        ; C096050C
>	image_sample v[17:18], v[0:1], s[28:35], s[24:27] dmask:0x6 ; F0800600 00C71100
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                       ; C08C053C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	s_and_b32 s48, s48, s59                                     ; 87303B30
>	v_cubeid_f32 v10, v20, v21, v5                              ; D288000A 04162B14
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mad_f32 v7, -v18, v7, v7                                  ; D2820007 241E0F12
>	v_mul_f32_e32 v23, v23, v17                                 ; 102E2317
>	image_sample v[8:11], v[8:11], s[52:59], s[48:51] dmask:0xf ; F0800F00 018D0808
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s44, s44, s43                                     ; 872C2B2C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	image_sample_c v14, v[14:17], s[36:43], s[44:47] dmask:0x1  ; F0A00100 01690E0E
>	s_load_dwordx8 s[36:43], s[4:5], 0x50                       ; C0D20550
>	s_load_dwordx4 s[4:7], s[4:5], 0x5c                         ; C082055C
>	s_waitcnt vmcnt(1)                                          ; BF8C0F71
>	v_mul_f32_e32 v15, v11, v8                                  ; 101E110B
>	v_mul_f32_e32 v16, v11, v9                                  ; 1020130B
>	v_mul_f32_e32 v11, v11, v10                                 ; 1016150B
>	s_buffer_load_dword s8, s[0:3], 0x4                         ; C2040104
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s4, s4, s43                                       ; 87042B04
>	image_sample v[8:10], v[0:1], s[36:43], s[4:7] dmask:0x7    ; F0800700 00290800
>	s_buffer_load_dword s5, s[0:3], 0x44                        ; C2028144
>	s_buffer_load_dword s4, s[0:3], 0x43                        ; C2020143
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v27, 0x3e99999a, v8                           ; 103610FF 3E99999A
>	v_mac_f32_e32 v27, 0x3f170a3d, v9                           ; 3E3612FF 3F170A3D
>	v_mac_f32_e32 v27, 0x3de147ae, v10                          ; 3E3614FF 3DE147AE
>	s_buffer_load_dword s9, s[0:3], 0x5                         ; C2048105
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v27, s5, v27                                  ; 10363605
>	v_mac_f32_e32 v27, s4, v27                                  ; 3E363604
>	s_buffer_load_dword s11, s[0:3], 0x6                        ; C2058106
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	s_buffer_load_dword s7, s[0:3], 0x2c                        ; C203812C
>	v_mul_f32_e32 v28, v27, v8                                  ; 1038111B
>	v_mul_f32_e32 v8, s8, v20                                   ; 10102808
>	s_buffer_load_dword s8, s[0:3], 0x2d                        ; C204012D
>	v_mad_f32 v8, -s9, v21, -v8                                 ; D2820008 A4222A09
>	s_buffer_load_dword s9, s[0:3], 0x2e                        ; C204812E
>	v_mul_f32_e32 v14, v14, v14                                 ; 101C1D0E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v8, -s11, v5, v8                                  ; D2820008 24220A0B
>	v_mul_f32_e32 v29, v27, v9                                  ; 103A131B
>	v_mul_f32_e32 v9, s4, v14                                   ; 10121C04
>	v_mul_f32_e32 v27, v27, v10                                 ; 1036151B
>	v_mul_f32_e32 v10, s5, v14                                  ; 10141C05
>	v_mul_f32_e32 v14, s6, v14                                  ; 101C1C06
>	v_add_f32_e64 v8, v8, 0 clamp                               ; D2060808 00010108
>	v_mul_f32_e32 v14, v17, v14                                 ; 101C1D11
>	v_mul_f32_e32 v9, v17, v9                                   ; 10121311
>	v_mul_f32_e32 v10, v17, v10                                 ; 10141511
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_mul_f32_e32 v30, v9, v8                                   ; 103C1109
>	v_mul_f32_e32 v31, v10, v8                                  ; 103E110A
>	v_mul_f32_e32 v14, v14, v8                                  ; 101C110E
>	v_mul_f32_e32 v8, 4.0, v17                                  ; 101022F6
>	v_sub_f32_e32 v9, s8, v12                                   ; 08121808
>	v_mul_f32_e32 v10, v6, v6                                   ; 10140D06
>	v_mac_f32_e32 v30, v8, v15                                  ; 3E3C1F08
>	v_mac_f32_e32 v31, v8, v16                                  ; 3E3E2108
>	v_mac_f32_e32 v14, v8, v11                                  ; 3E1C1708
>	v_sub_f32_e32 v8, s9, v19                                   ; 08102609
>	v_mac_f32_e32 v10, v9, v9                                   ; 3E141309
>	v_mac_f32_e32 v10, v8, v8                                   ; 3E141108
>	v_rsq_f32_e32 v11, v10                                      ; 7E165D0A
>	s_buffer_load_dword s11, s[0:3], 0x2f                       ; C205812F
>	s_buffer_load_dword s4, s[0:3], 0x30                        ; C2020130
>	s_buffer_load_dword s5, s[0:3], 0x31                        ; C2028131
>	v_mul_f32_e32 v6, v11, v6                                   ; 100C0D0B
>	v_mul_f32_e32 v6, v20, v6                                   ; 100C0D14
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mac_f32_e32 v6, v21, v9                                   ; 3E0C1315
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mac_f32_e32 v6, v5, v8                                    ; 3E0C1105
>	v_mul_f32_e32 v5, v11, v10                                  ; 100A150B
>	s_buffer_load_dword s6, s[0:3], 0x32                        ; C2030132
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v5, s11, v5                                   ; 100A0A0B
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mad_f32 v8, -v5, s4, s4                                   ; D2820008 20100905
>	v_cubema_f32 v9, v24, v25, v26                              ; D28E0009 046A3318
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_rcp_f32_e64 v9, |v9|                                      ; D3540109 00000109
>	v_mac_f32_e32 v30, v8, v6                                   ; 3E3C0D08
>	v_mad_f32 v8, -v5, s5, s5                                   ; D2820008 20140B05
>	v_mad_f32 v5, -v5, s6, s6                                   ; D2820005 20180D05
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_mul_f32_e32 v5, v17, v5                                   ; 100A0B11
>	v_mac_f32_e32 v31, v8, v6                                   ; 3E3E0D08
>	v_mac_f32_e32 v14, v5, v6                                   ; 3E1C0D05
>	v_cubetc_f32 v5, v24, v25, v26                              ; D28C0005 046A3318
>	v_cubesc_f32 v8, v24, v25, v26                              ; D28A0008 046A3318
>	v_mad_f32 v5, v9, v5, v4                                    ; D2820005 04120B09
>	v_mac_f32_e32 v4, v9, v8                                    ; 3E081109
>	v_add_f32_e64 v8, v22, 0 clamp                              ; D2060808 00010116
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_log_f32_e32 v11, v8                                       ; 7E164F08
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	s_and_b32 s24, s24, s35                                     ; 87182318
>	s_buffer_load_dword s44, s[0:3], 0x7                        ; C2160107
>	image_sample v[8:10], v[0:1], s[28:35], s[24:27] dmask:0x7  ; F0800700 00C70800
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v11                    ; 0E0016FF 40A00000
>	v_cubeid_f32 v6, v24, v25, v26                              ; D2880006 046A3318
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_max_f32_e32 v15, 0, v18                                   ; 201E2480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_mul_f32_e32 v0, v15, v0                                   ; 1000010F
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v6, s4                                        ; 7E0C0204
>	v_sub_f32_e32 v6, s44, v6                                   ; 080C0C2C
>	v_add_f32_e32 v6, 0x3a83126f, v6                            ; 060C0CFF 3A83126F
>	v_mul_f32_e32 v5, v23, v0                                   ; 100A0117
>	v_mul_f32_e32 v1, v23, v1                                   ; 10020317
>	v_mul_f32_e32 v4, v23, v4                                   ; 10080917
>	v_rcp_f32_e32 v6, v6                                        ; 7E0C5506
>	v_mac_f32_e32 v1, v8, v30                                   ; 3E023D08
>	v_mov_b32_e32 v0, 0x42000000                                ; 7E0002FF 42000000
>	v_mac_f32_e32 v4, v9, v31                                   ; 3E083F09
>	v_mac_f32_e32 v5, v10, v14                                  ; 3E0A1D0A
>	v_mac_f32_e32 v1, v0, v28                                   ; 3E023900
>	v_mac_f32_e32 v4, v0, v29                                   ; 3E083B00
>	v_mac_f32_e32 v5, v0, v27                                   ; 3E0A3700
>	v_subrev_f32_e32 v0, s4, v12                                ; 0A001804
>	v_max_f32_e32 v0, 0, v0                                     ; 20000080
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s44                                     ; 7E0C482C
>	v_sub_f32_e32 v6, s44, v6                                   ; 080C0C2C
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 64
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1360 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4].x, GENERIC[4], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..12]
>DCL TEMP[0..9], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     6.0000,     4.0000,     5.0000}
>IMM[2] FLT32 {    0.0000,     0.0010,     8.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwzz
>  3: MOV TEMP[1].z, IN[4].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[5], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[4], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[2].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
> 23: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, IMM[0].xxxx, TEMP[4].xyzz
> 26: ADD TEMP[4].xyz, TEMP[2].xyzz, -TEMP[4].xyzz
> 27: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 28: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].wwww
> 29: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[1].xyzz
> 30: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 31: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 32: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 33: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 34: ADD TEMP[4].x, IMM[0].wwww, -TEMP[4].xxxx
> 35: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 36: MUL TEMP[4].x, TEMP[3].yyyy, TEMP[4].xxxx
> 37: MAD TEMP[1].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 38: MUL TEMP[5], CONST[4], TEMP[1].xxxx
> 39: MAD TEMP[5], CONST[5], TEMP[1].yyyy, TEMP[5]
> 40: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[5]
> 41: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 42: MOV TEMP[5].xyz, TEMP[0].xyzz
> 43: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 44: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[2].xyzz
> 45: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[0].xyzz
> 46: MAD TEMP[6].xyz, IMM[0].xxxx, TEMP[6].xyzz, -TEMP[2].xyzz
> 47: ADD TEMP[7].x, IMM[0].wwww, -TEMP[3].zzzz
> 48: MUL TEMP[7].x, TEMP[7].xxxx, IMM[1].yyyy
> 49: MOV TEMP[8].xy, TEMP[1].xyyy
> 50: MOV TEMP[8].w, IMM[0].wwww
> 51: MOV TEMP[8].z, TEMP[1].zzzz
> 52: TXP TEMP[1].x, TEMP[8], SAMP[0], SHADOW2D
> 53: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 54: MUL TEMP[8].x, IMM[1].zzzz, TEMP[3].yyyy
> 55: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[0].xyzz
> 56: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 57: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 58: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 59: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 60: MUL TEMP[1].xyz, TEMP[9].xxxx, TEMP[1].xyzz
> 61: MAD TEMP[1].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[1].xyzz
> 62: ADD TEMP[5].xyz, CONST[11].xyzz, -IN[0].xyzz
> 63: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 64: RSQ TEMP[9].x, TEMP[8].xxxx
> 65: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 66: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[0].xyzz
> 67: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 68: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 69: MUL TEMP[8].x, TEMP[8].xxxx, CONST[11].wwww
> 70: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 71: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 72: MUL TEMP[8].xyz, CONST[12].xyzz, TEMP[8].xxxx
> 73: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[3].yyyy
> 74: MAD TEMP[1].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[1].xyzz
> 75: MOV TEMP[5].xy, IN[1].xyyy
> 76: TEX TEMP[5].xyz, TEMP[5], SAMP[3], 2D
> 77: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
> 78: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 79: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
> 80: POW TEMP[0].x, TEMP[0].xxxx, IMM[1].wwww
> 81: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[2].xxxx
> 82: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
> 83: MOV TEMP[2].xyz, TEMP[6].xyzz
> 84: MOV TEMP[2].w, TEMP[7].xxxx
> 85: TXL TEMP[2].xyz, TEMP[2], SAMP[2], CUBE
> 86: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 87: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].xxxx
> 88: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xyzz, TEMP[0].xyzz
> 89: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
> 90: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].xxxx
> 91: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
> 92: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].yyyy
> 93: RCP TEMP[2].x, TEMP[2].xxxx
> 94: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 95: FRC TEMP[2].x, CONST[1].wwww
> 96: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].zzzz
> 97: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 98: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 99: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
>100: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>101: MOV TEMP[0].w, IN[0].wwww
>102: MOV OUT[0], TEMP[0]
>103: END
>radeonsi: Compiling shader 96
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 23, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 19, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fmul float %132, 2.000000e+00
>  %136 = fmul float %133, 2.000000e+00
>  %137 = fsub float %49, %134
>  %138 = fsub float %50, %135
>  %139 = fsub float %51, %136
>  %140 = fmul float %137, %59
>  %141 = fmul float %138, %60
>  %142 = fadd float %141, %140
>  %143 = fmul float %139, %61
>  %144 = fadd float %142, %143
>  %145 = fadd float %144, 1.000000e+00
>  %146 = fmul float %49, %59
>  %147 = fmul float %50, %60
>  %148 = fadd float %147, %146
>  %149 = fmul float %51, %61
>  %150 = fadd float %148, %149
>  %151 = fsub float 1.000000e+00, %150
>  %152 = call float @llvm.AMDGPU.clamp.(float %151, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float %145, %152
>  %154 = call float @llvm.AMDGPU.clamp.(float %153, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = fmul float %155, %155
>  %157 = fmul float %78, %156
>  %158 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %159 = fmul float %59, 0x4007700140000000
>  %160 = fadd float %159, %158
>  %161 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %162 = fmul float %60, 0x4007700140000000
>  %163 = fadd float %162, %161
>  %164 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %165 = fmul float %61, 0x4007700140000000
>  %166 = fadd float %165, %164
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 64)
>  %170 = fmul float %169, %160
>  %171 = call float @llvm.SI.load.const(<16 x i8> %168, i32 68)
>  %172 = fmul float %171, %160
>  %173 = call float @llvm.SI.load.const(<16 x i8> %168, i32 72)
>  %174 = fmul float %173, %160
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 80)
>  %178 = fmul float %177, %163
>  %179 = fadd float %178, %170
>  %180 = call float @llvm.SI.load.const(<16 x i8> %176, i32 84)
>  %181 = fmul float %180, %163
>  %182 = fadd float %181, %172
>  %183 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %184 = load <16 x i8>, <16 x i8> addrspace(2)* %183, align 16, !invariant.load !0
>  %185 = call float @llvm.SI.load.const(<16 x i8> %184, i32 88)
>  %186 = fmul float %185, %163
>  %187 = fadd float %186, %174
>  %188 = call float @llvm.SI.load.const(<16 x i8> %184, i32 96)
>  %189 = fmul float %188, %166
>  %190 = fadd float %189, %179
>  %191 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %192 = load <16 x i8>, <16 x i8> addrspace(2)* %191, align 16, !invariant.load !0
>  %193 = call float @llvm.SI.load.const(<16 x i8> %192, i32 100)
>  %194 = fmul float %193, %166
>  %195 = fadd float %194, %182
>  %196 = call float @llvm.SI.load.const(<16 x i8> %192, i32 104)
>  %197 = fmul float %196, %166
>  %198 = fadd float %197, %187
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 112)
>  %202 = fadd float %190, %201
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 116)
>  %204 = fadd float %195, %203
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 120)
>  %206 = fadd float %198, %205
>  %207 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %208 = load <8 x i32>, <8 x i32> addrspace(2)* %207, align 32, !invariant.load !0
>  %209 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %210 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %209, i64 0, i64 7, !amdgpu.uniform !0
>  %211 = load <4 x i32>, <4 x i32> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = extractelement <8 x i32> %208, i32 7
>  %213 = extractelement <4 x i32> %211, i32 0
>  %214 = and i32 %213, %212
>  %215 = insertelement <4 x i32> %211, i32 %214, i32 0
>  %216 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %217 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %218 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %219 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %220 = call float @llvm.fabs.f32(float %218)
>  %221 = fdiv float 1.000000e+00, %220, !fpmath !1
>  %222 = fmul float %216, %221
>  %223 = fadd float %222, 1.500000e+00
>  %224 = fmul float %217, %221
>  %225 = fadd float %224, 1.500000e+00
>  %226 = bitcast float %225 to i32
>  %227 = bitcast float %223 to i32
>  %228 = bitcast float %219 to i32
>  %229 = insertelement <4 x i32> undef, i32 %226, i32 0
>  %230 = insertelement <4 x i32> %229, i32 %227, i32 1
>  %231 = insertelement <4 x i32> %230, i32 %228, i32 2
>  %232 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %231, <8 x i32> %208, <4 x i32> %215, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %233 = extractelement <4 x float> %232, i32 0
>  %234 = extractelement <4 x float> %232, i32 1
>  %235 = extractelement <4 x float> %232, i32 2
>  %236 = extractelement <4 x float> %232, i32 3
>  %237 = fmul float %121, %49
>  %238 = fmul float %123, %50
>  %239 = fadd float %238, %237
>  %240 = fmul float %125, %51
>  %241 = fadd float %239, %240
>  %242 = fmul float %241, %121
>  %243 = fmul float %241, %123
>  %244 = fmul float %241, %125
>  %245 = fmul float %242, 2.000000e+00
>  %246 = fsub float %245, %49
>  %247 = fmul float %243, 2.000000e+00
>  %248 = fsub float %247, %50
>  %249 = fmul float %244, 2.000000e+00
>  %250 = fsub float %249, %51
>  %251 = fsub float 1.000000e+00, %79
>  %252 = fmul float %251, 6.000000e+00
>  %253 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <8 x i32>, <8 x i32> addrspace(2)* %253, align 32, !invariant.load !0
>  %255 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %256 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %255, i64 0, i64 3, !amdgpu.uniform !0
>  %257 = load <4 x i32>, <4 x i32> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = extractelement <8 x i32> %254, i32 7
>  %259 = extractelement <4 x i32> %257, i32 0
>  %260 = and i32 %259, %258
>  %261 = insertelement <4 x i32> %257, i32 %260, i32 0
>  %262 = bitcast float %206 to i32
>  %263 = bitcast float %202 to i32
>  %264 = bitcast float %204 to i32
>  %265 = insertelement <4 x i32> undef, i32 %262, i32 0
>  %266 = insertelement <4 x i32> %265, i32 %263, i32 1
>  %267 = insertelement <4 x i32> %266, i32 %264, i32 2
>  %268 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %267, <8 x i32> %254, <4 x i32> %261, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %269 = extractelement <4 x float> %268, i32 0
>  %270 = fmul float %233, %236
>  %271 = fmul float %234, %236
>  %272 = fmul float %235, %236
>  %273 = fmul float %78, 4.000000e+00
>  %274 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %275 = load <16 x i8>, <16 x i8> addrspace(2)* %274, align 16, !invariant.load !0
>  %276 = call float @llvm.SI.load.const(<16 x i8> %275, i32 16)
>  %277 = call float @llvm.SI.load.const(<16 x i8> %275, i32 20)
>  %278 = call float @llvm.SI.load.const(<16 x i8> %275, i32 24)
>  %279 = fmul float %276, %121
>  %280 = fsub float -0.000000e+00, %279
>  %281 = fmul float %277, %123
>  %282 = fsub float %280, %281
>  %283 = fmul float %278, %125
>  %284 = fsub float %282, %283
>  %285 = call float @llvm.AMDGPU.clamp.(float %284, float 0.000000e+00, float 1.000000e+00)
>  %286 = fmul float %269, %269
>  %287 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %288 = load <16 x i8>, <16 x i8> addrspace(2)* %287, align 16, !invariant.load !0
>  %289 = call float @llvm.SI.load.const(<16 x i8> %288, i32 48)
>  %290 = fmul float %289, %286
>  %291 = call float @llvm.SI.load.const(<16 x i8> %288, i32 52)
>  %292 = fmul float %291, %286
>  %293 = call float @llvm.SI.load.const(<16 x i8> %288, i32 56)
>  %294 = fmul float %293, %286
>  %295 = fmul float %290, %78
>  %296 = fmul float %292, %78
>  %297 = fmul float %294, %78
>  %298 = fmul float %285, %295
>  %299 = fmul float %285, %296
>  %300 = fmul float %285, %297
>  %301 = fmul float %270, %273
>  %302 = fadd float %301, %298
>  %303 = fmul float %271, %273
>  %304 = fadd float %303, %299
>  %305 = fmul float %272, %273
>  %306 = fadd float %305, %300
>  %307 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %308 = load <16 x i8>, <16 x i8> addrspace(2)* %307, align 16, !invariant.load !0
>  %309 = call float @llvm.SI.load.const(<16 x i8> %308, i32 176)
>  %310 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %311 = fsub float %309, %310
>  %312 = call float @llvm.SI.load.const(<16 x i8> %308, i32 180)
>  %313 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %314 = fsub float %312, %313
>  %315 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %316 = load <16 x i8>, <16 x i8> addrspace(2)* %315, align 16, !invariant.load !0
>  %317 = call float @llvm.SI.load.const(<16 x i8> %316, i32 184)
>  %318 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %319 = fsub float %317, %318
>  %320 = fmul float %311, %311
>  %321 = fmul float %314, %314
>  %322 = fadd float %321, %320
>  %323 = fmul float %319, %319
>  %324 = fadd float %322, %323
>  %325 = call float @llvm.sqrt.f32(float %324)
>  %326 = fdiv float 1.000000e+00, %325, !fpmath !1
>  %327 = fmul float %311, %326
>  %328 = fmul float %314, %326
>  %329 = fmul float %319, %326
>  %330 = fmul float %327, %121
>  %331 = fmul float %328, %123
>  %332 = fadd float %331, %330
>  %333 = fmul float %329, %125
>  %334 = fadd float %332, %333
>  %335 = call float @llvm.AMDGPU.clamp.(float %334, float 0.000000e+00, float 1.000000e+00)
>  %336 = fmul float %324, %326
>  %337 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %338 = load <16 x i8>, <16 x i8> addrspace(2)* %337, align 16, !invariant.load !0
>  %339 = call float @llvm.SI.load.const(<16 x i8> %338, i32 188)
>  %340 = fmul float %336, %339
>  %341 = call float @llvm.AMDGPU.clamp.(float %340, float 0.000000e+00, float 1.000000e+00)
>  %342 = fsub float 1.000000e+00, %341
>  %343 = call float @llvm.SI.load.const(<16 x i8> %338, i32 192)
>  %344 = fmul float %343, %342
>  %345 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %346 = load <16 x i8>, <16 x i8> addrspace(2)* %345, align 16, !invariant.load !0
>  %347 = call float @llvm.SI.load.const(<16 x i8> %346, i32 196)
>  %348 = fmul float %347, %342
>  %349 = call float @llvm.SI.load.const(<16 x i8> %346, i32 200)
>  %350 = fmul float %349, %342
>  %351 = fmul float %344, %78
>  %352 = fmul float %348, %78
>  %353 = fmul float %350, %78
>  %354 = fmul float %335, %351
>  %355 = fadd float %354, %302
>  %356 = fmul float %335, %352
>  %357 = fadd float %356, %304
>  %358 = fmul float %335, %353
>  %359 = fadd float %358, %306
>  %360 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %361 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %362 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %363 = load <8 x i32>, <8 x i32> addrspace(2)* %362, align 32, !invariant.load !0
>  %364 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %365 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %364, i64 0, i64 15, !amdgpu.uniform !0
>  %366 = load <4 x i32>, <4 x i32> addrspace(2)* %365, align 16, !invariant.load !0
>  %367 = extractelement <8 x i32> %363, i32 7
>  %368 = extractelement <4 x i32> %366, i32 0
>  %369 = and i32 %368, %367
>  %370 = insertelement <4 x i32> %366, i32 %369, i32 0
>  %371 = bitcast float %360 to i32
>  %372 = bitcast float %361 to i32
>  %373 = insertelement <2 x i32> undef, i32 %371, i32 0
>  %374 = insertelement <2 x i32> %373, i32 %372, i32 1
>  %375 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %374, <8 x i32> %363, <4 x i32> %370, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %376 = extractelement <4 x float> %375, i32 0
>  %377 = extractelement <4 x float> %375, i32 1
>  %378 = extractelement <4 x float> %375, i32 2
>  %379 = fmul float %49, %121
>  %380 = fmul float %50, %123
>  %381 = fadd float %380, %379
>  %382 = fmul float %51, %125
>  %383 = fadd float %381, %382
>  %384 = call float @llvm.AMDGPU.clamp.(float %383, float 0.000000e+00, float 1.000000e+00)
>  %385 = fsub float 1.000000e+00, %384
>  %386 = call float @llvm.pow.f32(float %385, float 5.000000e+00)
>  %387 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %388 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %389 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %390 = fmul float %386, %387
>  %391 = fmul float %386, %388
>  %392 = fmul float %386, %389
>  %393 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %394 = load <8 x i32>, <8 x i32> addrspace(2)* %393, align 32, !invariant.load !0
>  %395 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %396 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %395, i64 0, i64 11, !amdgpu.uniform !0
>  %397 = load <4 x i32>, <4 x i32> addrspace(2)* %396, align 16, !invariant.load !0
>  %398 = extractelement <8 x i32> %394, i32 7
>  %399 = extractelement <4 x i32> %397, i32 0
>  %400 = and i32 %399, %398
>  %401 = insertelement <4 x i32> %397, i32 %400, i32 0
>  %402 = call float @llvm.amdgcn.cubetc(float %246, float %248, float %250)
>  %403 = call float @llvm.amdgcn.cubesc(float %246, float %248, float %250)
>  %404 = call float @llvm.amdgcn.cubema(float %246, float %248, float %250)
>  %405 = call float @llvm.amdgcn.cubeid(float %246, float %248, float %250)
>  %406 = call float @llvm.fabs.f32(float %404)
>  %407 = fdiv float 1.000000e+00, %406, !fpmath !1
>  %408 = fmul float %402, %407
>  %409 = fadd float %408, 1.500000e+00
>  %410 = fmul float %403, %407
>  %411 = fadd float %410, 1.500000e+00
>  %412 = bitcast float %411 to i32
>  %413 = bitcast float %409 to i32
>  %414 = bitcast float %405 to i32
>  %415 = bitcast float %252 to i32
>  %416 = insertelement <4 x i32> undef, i32 %412, i32 0
>  %417 = insertelement <4 x i32> %416, i32 %413, i32 1
>  %418 = insertelement <4 x i32> %417, i32 %414, i32 2
>  %419 = insertelement <4 x i32> %418, i32 %415, i32 3
>  %420 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %419, <8 x i32> %394, <4 x i32> %401, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %421 = extractelement <4 x float> %420, i32 0
>  %422 = extractelement <4 x float> %420, i32 1
>  %423 = extractelement <4 x float> %420, i32 2
>  %424 = fmul float %390, %421
>  %425 = fmul float %391, %422
>  %426 = fmul float %392, %423
>  %427 = fmul float %424, %157
>  %428 = fmul float %425, %157
>  %429 = fmul float %426, %157
>  %430 = fmul float %355, %376
>  %431 = fadd float %430, %427
>  %432 = fmul float %357, %377
>  %433 = fadd float %432, %428
>  %434 = fmul float %359, %378
>  %435 = fadd float %434, %429
>  %436 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %437 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %438 = load <16 x i8>, <16 x i8> addrspace(2)* %437, align 16, !invariant.load !0
>  %439 = call float @llvm.SI.load.const(<16 x i8> %438, i32 12)
>  %440 = fsub float %436, %439
>  %441 = call float @llvm.maxnum.f32(float %440, float 0.000000e+00)
>  %442 = call float @llvm.SI.load.const(<16 x i8> %438, i32 28)
>  %443 = call float @llvm.SI.load.const(<16 x i8> %438, i32 12)
>  %444 = fsub float %442, %443
>  %445 = fadd float %444, 0x3F50624DE0000000
>  %446 = fdiv float 1.000000e+00, %445, !fpmath !1
>  %447 = fmul float %441, %446
>  %448 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %449 = load <16 x i8>, <16 x i8> addrspace(2)* %448, align 16, !invariant.load !0
>  %450 = call float @llvm.SI.load.const(<16 x i8> %449, i32 28)
>  %451 = call float @llvm.floor.f32(float %450)
>  %452 = fsub float %450, %451
>  %453 = fmul float %452, 8.000000e+00
>  %454 = call float @llvm.pow.f32(float %447, float %453)
>  %455 = call float @llvm.AMDGPU.clamp.(float %454, float 0.000000e+00, float 1.000000e+00)
>  %456 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %457 = fmul float %456, %455
>  %458 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %459 = load <16 x i8>, <16 x i8> addrspace(2)* %458, align 16, !invariant.load !0
>  %460 = call float @llvm.SI.load.const(<16 x i8> %459, i32 32)
>  %461 = fsub float 1.000000e+00, %457
>  %462 = fmul float %431, %457
>  %463 = fmul float %460, %461
>  %464 = fadd float %462, %463
>  %465 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %466 = load <16 x i8>, <16 x i8> addrspace(2)* %465, align 16, !invariant.load !0
>  %467 = call float @llvm.SI.load.const(<16 x i8> %466, i32 36)
>  %468 = fsub float 1.000000e+00, %457
>  %469 = fmul float %433, %457
>  %470 = fmul float %467, %468
>  %471 = fadd float %469, %470
>  %472 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %473 = load <16 x i8>, <16 x i8> addrspace(2)* %472, align 16, !invariant.load !0
>  %474 = call float @llvm.SI.load.const(<16 x i8> %473, i32 40)
>  %475 = fsub float 1.000000e+00, %457
>  %476 = fmul float %435, %457
>  %477 = fmul float %474, %475
>  %478 = fadd float %476, %477
>  %479 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %480 = bitcast float %5 to i32
>  %481 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %480, 10
>  %482 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %481, float %464, 11
>  %483 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %482, float %471, 12
>  %484 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %483, float %478, 13
>  %485 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %484, float %479, 14
>  %486 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %485, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %486
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[10:13], v4, s[4:7], 0 idxen   ; E00C2000 80010A04
>	buffer_load_format_xyzw v[19:22], v5, s[12:15], 0 idxen ; E00C2000 80031305
>	buffer_load_format_xyzw v[15:18], v6, s[16:19], 0 idxen ; E00C2000 80040F06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s4                                    ; 7E000204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s4                                    ; 7E100204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	v_sub_f32_e32 v23, s7, v0                               ; 082E0007
>	v_mov_b32_e32 v7, s8                                    ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s4                                    ; 7E120204
>	v_mov_b32_e32 v22, s5                                   ; 7E2C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v27, s6, v1                               ; 08360206
>	v_mov_b32_e32 v24, s7                                   ; 7E300207
>	v_mov_b32_e32 v25, s8                                   ; 7E320208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v26, s4                                   ; 7E340204
>	v_sub_f32_e32 v28, s5, v14                              ; 08381C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[4:7], 0 idxen   ; E00C2000 80012108
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v5, v33                               ; 7E0A1121
>	v_mul_lo_i32 v26, v5, 48                                ; D2D6001A 00016105
>	v_add_i32_e32 v5, vcc, s14, v26                         ; 4A0A340E
>	v_add_i32_e32 v9, vcc, s13, v26                         ; 4A12340D
>	v_add_i32_e32 v22, vcc, s15, v26                        ; 4A2C340F
>	v_add_i32_e32 v6, vcc, s12, v26                         ; 4A0C340C
>	buffer_load_dword v8, v5, s[0:3], 0 offen               ; E0301000 80000805
>	buffer_load_dword v5, v9, s[0:3], 0 offen               ; E0301000 80000509
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v0, v9                            ; 0A2E1300
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v9, vcc, 0x8c, v26                        ; 4A1234FF 0000008C
>	v_add_i32_e32 v27, vcc, 0x9c, v26                       ; 4A3634FF 0000009C
>	v_add_i32_e32 v22, vcc, 0x84, v26                       ; 4A2C34FF 00000084
>	v_add_i32_e32 v24, vcc, 0x88, v26                       ; 4A3034FF 00000088
>	v_add_i32_e32 v7, vcc, 0x80, v26                        ; 4A0E34FF 00000080
>	v_add_i32_e32 v25, vcc, 0x94, v26                       ; 4A3234FF 00000094
>	buffer_load_dword v28, v9, s[0:3], 0 offen              ; E0301000 80001C09
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v22, v24, s[0:3], 0 offen             ; E0301000 80001618
>	v_add_i32_e32 v24, vcc, 0x90, v26                       ; 4A3034FF 00000090
>	v_add_i32_e32 v26, vcc, 0x98, v26                       ; 4A3434FF 00000098
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v1, v28                           ; 0A363901
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v28, v14, v29                          ; 0A383B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	v_cvt_i32_f32_e32 v7, v34                               ; 7E0E1122
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v9, vcc, s10, v26                         ; 4A12340A
>	v_add_i32_e32 v22, vcc, s9, v26                         ; 4A2C3409
>	v_add_i32_e32 v24, vcc, s8, v26                         ; 4A303408
>	v_add_i32_e32 v25, vcc, s4, v26                         ; 4A323404
>	v_mul_lo_i32 v33, v7, 48                                ; D2D60021 00016107
>	v_add_i32_e32 v7, vcc, s11, v26                         ; 4A0E340B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v28, vcc, s6, v26                         ; 4A383406
>	buffer_load_dword v27, v7, s[0:3], 0 offen              ; E0301000 80001B07
>	v_add_i32_e32 v7, vcc, s7, v26                          ; 4A0E3407
>	v_add_i32_e32 v26, vcc, s5, v26                         ; 4A343405
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	buffer_load_dword v34, v7, s[0:3], 0 offen              ; E0301000 80002207
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	v_mul_f32_e32 v6, v29, v6                               ; 100C0D1D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v23, v29, v23                             ; 102E2F1D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v14, v25                          ; 0A4A330E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v9, v29, v22                              ; 10122D1D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v22, v29, v24                             ; 102C311D
>	v_subrev_f32_e32 v24, v1, v27                           ; 0A303701
>	v_mul_f32_e32 v27, v29, v24                             ; 1036311D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v25, v29, v28                             ; 1032391D
>	v_mul_f32_e32 v24, v29, v34                             ; 1030451D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v0, v29                           ; 0A3A3B00
>	v_mac_f32_e32 v23, v30, v29                             ; 3E2E3B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v1, v29                           ; 0A3A3B01
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v30, v29                             ; 3E2C3B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v30, v29                             ; 3E303B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v30, v29                             ; 3E323B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s4, v33                         ; 4A3A4204
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v31, v30                             ; 3E2E3D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v31, v30                             ; 3E2C3D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v31, v30                             ; 3E303D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v31, v30                             ; 3E323D1F
>	v_add_i32_e32 v30, vcc, s5, v29                         ; 4A3C3A05
>	v_add_i32_e32 v29, vcc, s4, v29                         ; 4A3A3A04
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v32, v30                             ; 3E2E3D20
>	v_add_i32_e32 v30, vcc, 0x8c, v29                       ; 4A3C3AFF 0000008C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0x80, v29                       ; 4A3C3AFF 00000080
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0x84, v29                       ; 4A3C3AFF 00000084
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0x88, v29                       ; 4A3C3AFF 00000088
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v32, v30                             ; 3E2C3D20
>	v_add_i32_e32 v30, vcc, 0x90, v29                       ; 4A3C3AFF 00000090
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v32, v30                             ; 3E303D20
>	v_add_i32_e32 v30, vcc, 0x94, v29                       ; 4A3C3AFF 00000094
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v32, v30                             ; 3E323D20
>	v_add_i32_e32 v30, vcc, 0x98, v29                       ; 4A3C3AFF 00000098
>	v_add_i32_e32 v29, vcc, 0x9c, v29                       ; 4A3A3AFF 0000009C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v29, v6, v11                              ; 103A1706
>	v_mac_f32_e32 v29, v8, v10                              ; 3E3A1508
>	v_mac_f32_e32 v29, v5, v12                              ; 3E3A1905
>	v_mac_f32_e32 v29, v23, v13                             ; 3E3A1B17
>	v_mul_f32_e32 v23, v9, v11                              ; 102E1709
>	v_mac_f32_e32 v23, v7, v10                              ; 3E2E1507
>	v_mac_f32_e32 v23, v22, v12                             ; 3E2E1916
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v23, v27, v13                             ; 3E2E1B1B
>	v_mul_f32_e32 v27, v25, v11                             ; 10361719
>	v_mul_f32_e32 v11, 0, v11                               ; 10161680
>	v_mac_f32_e32 v27, v24, v10                             ; 3E361518
>	v_mac_f32_e32 v11, 0, v10                               ; 3E161480
>	v_add_f32_e32 v19, v19, v19                             ; 06262713
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mac_f32_e32 v27, v26, v12                             ; 3E36191A
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_mad_f32 v12, v19, v8, -v8                             ; D282000C 84221113
>	v_mad_f32 v20, 2.0, v20, -1.0                           ; D2820014 03CE28F4
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v8, v15, v8, -v8                              ; D2820008 8422110F
>	v_mad_f32 v21, 2.0, v21, -1.0                           ; D2820015 03CE2AF4
>	v_mac_f32_e32 v12, v6, v20                              ; 3E182906
>	v_mac_f32_e32 v8, v6, v16                               ; 3E102106
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_add_f32_e32 v0, v0, v29                               ; 06003B00
>	v_mad_f32 v6, v15, v24, -v24                            ; D2820006 8462310F
>	v_mac_f32_e32 v12, v5, v21                              ; 3E182B05
>	v_mac_f32_e32 v8, v5, v17                               ; 3E102305
>	v_mad_f32 v5, v15, v7, -v7                              ; D2820005 841E0F0F
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v15, s7, v0                               ; 101E0007
>	s_buffer_load_dword s7, s[0:3], 0x7                     ; C2038107
>	s_buffer_load_dword s11, s[0:3], 0xb                    ; C205810B
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_add_f32_e32 v1, v1, v23                               ; 06022F01
>	v_mac_f32_e32 v27, v28, v13                             ; 3E361B1C
>	v_add_f32_e32 v10, v13, v11                             ; 0614170D
>	v_add_f32_e32 v11, v14, v27                             ; 0616370E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v1                               ; 3E1E0207
>	v_mad_f32 v13, v19, v7, -v7                             ; D282000D 841E0F13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	s_buffer_load_dword s11, s[0:3], 0xf                    ; C205810F
>	v_mac_f32_e32 v13, v9, v20                              ; 3E1A2909
>	v_mac_f32_e32 v5, v9, v16                               ; 3E0A2109
>	v_mul_f32_e32 v7, s4, v0                                ; 100E0004
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	v_mul_f32_e32 v9, s5, v0                                ; 10120005
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s9, s[0:3], 0x8                     ; C2048108
>	s_buffer_load_dword s10, s[0:3], 0x9                    ; C2050109
>	s_buffer_load_dword s7, s[0:3], 0xa                     ; C203810A
>	s_buffer_load_dword s12, s[0:3], 0xc                    ; C206010C
>	s_buffer_load_dword s13, s[0:3], 0xd                    ; C206810D
>	s_buffer_load_dword s14, s[0:3], 0xe                    ; C207010E
>	s_buffer_load_dword s15, s[0:3], 0x14                   ; C2078114
>	s_buffer_load_dword s16, s[0:3], 0x15                   ; C2080115
>	s_buffer_load_dword s17, s[0:3], 0x16                   ; C2088116
>	s_buffer_load_dword s18, s[0:3], 0x17                   ; C2090117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s11, v10                             ; 3E1E140B
>	v_mac_f32_e32 v6, v25, v16                              ; 3E0C2119
>	v_mac_f32_e32 v7, s8, v1                                ; 3E0E0208
>	v_mac_f32_e32 v9, s4, v1                                ; 3E120204
>	v_mul_f32_e32 v16, s0, v15                              ; 10201E00
>	exp 15, 32, 0, 0, 0, v0, v1, v11, v16                   ; F800020F 100B0100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v0, s6, v0                                ; 10000006
>	v_mac_f32_e32 v0, s5, v1                                ; 3E000205
>	v_mac_f32_e32 v0, s7, v11                               ; 3E001607
>	v_mac_f32_e32 v0, s14, v10                              ; 3E00140E
>	v_mov_b32_e32 v1, s15                                   ; 7E02020F
>	v_mac_f32_e32 v1, s16, v0                               ; 3E020010
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mad_f32 v14, v19, v24, -v24                           ; D282000E 84623113
>	v_mac_f32_e32 v14, v25, v20                             ; 3E1C2919
>	v_mac_f32_e32 v7, s9, v11                               ; 3E0E1609
>	v_mac_f32_e32 v9, s10, v11                              ; 3E12160A
>	v_mul_legacy_f32_e32 v1, s17, v1                        ; 0E020211
>	v_mac_f32_e32 v14, v26, v21                             ; 3E1C2B1A
>	v_mac_f32_e32 v5, v22, v17                              ; 3E0A2316
>	v_mac_f32_e32 v7, s12, v10                              ; 3E0E140C
>	v_mac_f32_e32 v9, s13, v10                              ; 3E12140D
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_sub_f32_e64 v10, 1.0, s18                             ; D208000A 000024F2
>	v_mac_f32_e32 v10, s18, v1                              ; 3E140212
>	v_mac_f32_e32 v13, v22, v21                             ; 3E1A2B16
>	v_mac_f32_e32 v6, v26, v17                              ; 3E0C231A
>	v_mul_f32_e32 v1, v5, v14                               ; 10021D05
>	v_mul_f32_e32 v11, v6, v12                              ; 10161906
>	v_mul_f32_e32 v16, v8, v13                              ; 10201B08
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_add_f32_e32 v18, v18, v18                             ; 06242512
>	v_mad_f32 v1, v13, v6, -v1                              ; D2820001 84060D0D
>	v_mad_f32 v11, v14, v8, -v11                            ; D282000B 842E110E
>	v_mad_f32 v16, v12, v5, -v16                            ; D2820010 84420B0C
>	v_mad_f32 v1, v18, v1, -v1                              ; D2820001 84060312
>	exp 15, 33, 0, 0, 0, v3, v4, v10, v0                    ; F800021F 000A0403
>	v_mad_f32 v11, v18, v11, -v11                           ; D282000B 842E1712
>	v_mad_f32 v16, v18, v16, -v16                           ; D2820010 84422112
>	exp 15, 34, 0, 0, 0, v8, v5, v6, v1                     ; F800022F 01060508
>	exp 15, 35, 0, 0, 0, v11, v16, v12, v13                 ; F800023F 0D0C100B
>	exp 15, 36, 0, 0, 0, v14, v0, v0, v0                    ; F800024F 0000000E
>	exp 15, 12, 0, 1, 0, v7, v9, v0, v15                    ; F80008CF 0F000907
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 2, [m0]                          ; C8200B04
>	v_interp_p2_f32 v8, [v8], v5, 3, 2, [m0]                    ; C8210B05
>	v_interp_p1_f32 v9, v4, 0, 3, [m0]                          ; C8240C04
>	v_interp_p2_f32 v9, [v9], v5, 0, 3, [m0]                    ; C8250C05
>	v_interp_p1_f32 v10, v4, 1, 3, [m0]                         ; C8280D04
>	v_interp_p2_f32 v10, [v10], v5, 1, 3, [m0]                  ; C8290D05
>	v_interp_p1_f32 v0, v4, 2, 3, [m0]                          ; C8000E04
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 3, [m0]                    ; C8010E05
>	v_interp_p1_f32 v1, v4, 3, 3, [m0]                          ; C8040F04
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	v_interp_p2_f32 v1, [v1], v5, 3, 3, [m0]                    ; C8050F05
>	v_interp_p1_f32 v6, v4, 0, 4, [m0]                          ; C8181004
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 4, [m0]                    ; C8191005
>	v_interp_p1_f32 v12, v2, 0, 0, [m0]                         ; C8300002
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                  ; C8310003
>	v_interp_p1_f32 v19, v2, 1, 0, [m0]                         ; C84C0102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v11, s8, v12                                  ; 08161808
>	v_interp_p2_f32 v19, [v19], v3, 1, 0, [m0]                  ; C84D0103
>	v_interp_p1_f32 v20, v2, 2, 0, [m0]                         ; C8500202
>	v_sub_f32_e32 v14, s9, v19                                  ; 081C2609
>	v_mul_f32_e32 v7, v11, v11                                  ; 100E170B
>	v_interp_p2_f32 v20, [v20], v3, 2, 0, [m0]                  ; C8510203
>	v_sub_f32_e32 v15, s11, v20                                 ; 081E280B
>	v_mac_f32_e32 v7, v14, v14                                  ; 3E0E1D0E
>	v_mac_f32_e32 v7, v15, v15                                  ; 3E0E1F0F
>	v_rsq_f32_e32 v16, v7                                       ; 7E205D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v21, v16, v11                                 ; 102A1710
>	v_mul_f32_e32 v22, v16, v14                                 ; 102C1D10
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                       ; C090055C
>	v_mul_f32_e32 v23, v7, v0                                   ; 102E0107
>	v_mul_f32_e32 v24, v7, v1                                   ; 10300307
>	v_mul_f32_e32 v0, v23, v21                                  ; 10002B17
>	s_load_dwordx8 s[16:23], s[4:5], 0x50                       ; C0C80550
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                       ; C092054C
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	v_mul_f32_e32 v25, v7, v6                                   ; 10320D07
>	v_mul_f32_e32 v26, v16, v15                                 ; 10341F10
>	v_mac_f32_e32 v0, v24, v22                                  ; 3E002D18
>	v_mac_f32_e32 v0, v25, v26                                  ; 3E003519
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v27, v0, 0 clamp                              ; D206081B 00010100
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s23                                     ; 87201720
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_and_b32 s36, s36, s31                                     ; 87241F24
>	image_sample v[17:18], v[0:1], s[16:23], s[32:35] dmask:0x6 ; F0800600 01041100
>	image_sample v[6:7], v[0:1], s[24:31], s[36:39] dmask:0xa   ; F0800A00 01260600
>	v_interp_p1_f32 v30, v4, 0, 2, [m0]                         ; C8780804
>	v_interp_p2_f32 v30, [v30], v5, 0, 2, [m0]                  ; C8790805
>	v_interp_p1_f32 v31, v4, 1, 2, [m0]                         ; C87C0904
>	v_interp_p2_f32 v31, [v31], v5, 1, 2, [m0]                  ; C87D0905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                          ; C8100A04
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v28, v7, v7                                   ; 06380F07
>	v_add_f32_e32 v29, v6, v6                                   ; 063A0D06
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                    ; C8110A05
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_mad_f32 v5, v28, v30, -v30                                ; D2820005 847A3D1C
>	v_mad_f32 v30, v28, v31, -v31                               ; D282001E 847E3F1C
>	v_mad_f32 v28, v28, v4, -v4                                 ; D282001C 8412091C
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v4, v29, v6, -v6                                  ; D2820004 841A0D1D
>	v_mac_f32_e32 v4, v7, v7                                    ; 3E080F07
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v5, v6, v8                                    ; 3E0A1106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v30, v6, v9                                   ; 3E3C1306
>	v_mac_f32_e32 v28, v6, v10                                  ; 3E381506
>	v_mac_f32_e32 v5, v4, v23                                   ; 3E0A2F04
>	v_mac_f32_e32 v30, v4, v24                                  ; 3E3C3104
>	v_mac_f32_e32 v28, v4, v25                                  ; 3E383304
>	v_cubema_f32 v4, v5, v30, v28                               ; D28E0004 04723D05
>	v_rcp_f32_e64 v6, |v4|                                      ; D3540106 00000104
>	v_mul_f32_e32 v21, v21, v5                                  ; 102A0B15
>	v_mac_f32_e32 v21, v22, v30                                 ; 3E2A3D16
>	v_cubetc_f32 v7, v5, v30, v28                               ; D28C0007 04723D05
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v8, v5, v30, v28                               ; D28A0008 04723D05
>	v_mac_f32_e32 v21, v26, v28                                 ; 3E2A391A
>	v_mad_f32 v9, v6, v7, v4                                    ; D2820009 04120F06
>	v_mad_f32 v8, v6, v8, v4                                    ; D2820008 04121106
>	v_mul_f32_e32 v6, v5, v21                                   ; 100C2B05
>	v_mac_f32_e32 v6, v5, v21                                   ; 3E0C2B05
>	v_mad_f32 v7, v11, v16, -v6                                 ; D2820007 841A210B
>	v_mad_f32 v22, -v11, v16, v6                                ; D2820016 241A210B
>	v_mul_f32_e32 v6, v30, v21                                  ; 100C2B1E
>	v_mac_f32_e32 v6, v30, v21                                  ; 3E0C2B1E
>	v_mad_f32 v10, v14, v16, -v6                                ; D282000A 841A210E
>	v_mad_f32 v26, -v14, v16, v6                                ; D282001A 241A210E
>	v_mul_f32_e32 v6, v28, v21                                  ; 100C2B1C
>	v_mac_f32_e32 v6, v28, v21                                  ; 3E0C2B1C
>	v_mad_f32 v11, v15, v16, -v6                                ; D282000B 841A210F
>	v_mad_f32 v29, -v15, v16, v6                                ; D282001D 241A210F
>	v_mul_f32_e32 v6, v23, v7                                   ; 100C0F17
>	v_mac_f32_e32 v6, v24, v10                                  ; 3E0C1518
>	v_mac_f32_e32 v6, v25, v11                                  ; 3E0C1719
>	v_add_f32_e32 v6, 1.0, v6                                   ; 060C0CF2
>	v_subrev_f32_e32 v6, v27, v6                                ; 0A0C0D1B
>	s_buffer_load_dword s40, s[0:3], 0x10                       ; C2140110
>	s_buffer_load_dword s41, s[0:3], 0x11                       ; C2148111
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s42, s[0:3], 0x16                       ; C2150116
>	v_sub_f32_e32 v7, 1.0, v6                                   ; 080E0CF2
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s43, s[0:3], 0x18                       ; C2158118
>	s_buffer_load_dword s45, s[0:3], 0x1a                       ; C216811A
>	v_mad_f32 v6, -v6, v7, v7                                   ; D2820006 241E0F06
>	v_mov_b32_e32 v7, 0x403b800a                                ; 7E0E02FF 403B800A
>	s_buffer_load_dword s44, s[0:3], 0x19                       ; C2160119
>	s_buffer_load_dword s46, s[0:3], 0x1c                       ; C217011C
>	s_buffer_load_dword s48, s[0:3], 0x1e                       ; C218011E
>	v_mad_f32 v10, v7, v23, v12                                 ; D282000A 04322F07
>	s_buffer_load_dword s47, s[0:3], 0x1d                       ; C217811D
>	v_mad_f32 v11, v7, v24, v19                                 ; D282000B 044E3107
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v14, s40, v10                                 ; 101C1428
>	v_mul_f32_e32 v16, s41, v10                                 ; 10201429
>	v_mul_f32_e32 v10, s8, v10                                  ; 10141408
>	v_mad_f32 v7, v7, v25, v20                                  ; D2820007 04523307
>	v_mac_f32_e32 v14, s9, v11                                  ; 3E1C1609
>	v_mac_f32_e32 v10, s42, v11                                 ; 3E14162A
>	v_mac_f32_e32 v16, s11, v11                                 ; 3E20160B
>	v_mac_f32_e32 v14, s43, v7                                  ; 3E1C0E2B
>	v_mac_f32_e32 v10, s45, v7                                  ; 3E140E2D
>	v_mac_f32_e32 v16, s44, v7                                  ; 3E200E2C
>	v_add_f32_e32 v15, s46, v14                                 ; 061E1C2E
>	v_add_f32_e32 v14, s48, v10                                 ; 061C1430
>	s_load_dwordx8 s[48:55], s[4:5], 0x10                       ; C0D80510
>	s_load_dwordx4 s[56:59], s[4:5], 0x1c                       ; C09C051C
>	v_add_f32_e32 v16, s47, v16                                 ; 0620202F
>	s_load_dwordx4 s[12:15], s[4:5], 0xc                        ; C086050C
>	s_load_dwordx8 s[40:47], s[4:5], 0x0                        ; C0D40500
>	s_load_dwordx4 s[28:31], s[4:5], 0x3c                       ; C08E053C
>	s_load_dwordx8 s[16:23], s[4:5], 0x20                       ; C0C80520
>	s_load_dwordx4 s[24:27], s[4:5], 0x2c                       ; C08C052C
>	s_load_dwordx8 s[32:39], s[4:5], 0x30                       ; C0D00530
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s56, s56, s55                                     ; 87383738
>	v_cubeid_f32 v10, v5, v30, v28                              ; D288000A 04723D05
>	v_mad_f32 v7, -v18, v7, v7                                  ; D2820007 241E0F12
>	v_mul_f32_e32 v23, v6, v17                                  ; 102E2306
>	image_sample v[8:11], v[8:11], s[48:55], s[56:59] dmask:0xf ; F0800F00 01CC0808
>	s_and_b32 s12, s12, s47                                     ; 870C2F0C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	s_buffer_load_dword s4, s[0:3], 0x4                         ; C2020104
>	s_buffer_load_dword s5, s[0:3], 0x5                         ; C2028105
>	s_buffer_load_dword s6, s[0:3], 0x6                         ; C2030106
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v9, v11, v9                                   ; 1012130B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v11, s4, v5                                   ; 10160A04
>	v_mad_f32 v11, -s5, v30, -v11                               ; D282000B A42E3C05
>	v_mad_f32 v11, -s6, v28, v11                                ; D282000B 242E3806
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	image_sample_c v6, v[14:17], s[40:47], s[12:15] dmask:0x1   ; F0A00100 006A060E
>	s_buffer_load_dword s8, s[0:3], 0x2c                        ; C204012C
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v6, v6, v6                                    ; 100C0D06
>	s_buffer_load_dword s9, s[0:3], 0x2d                        ; C204812D
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v14, s4, v6                                   ; 101C0C04
>	v_mul_f32_e32 v15, s5, v6                                   ; 101E0C05
>	v_mul_f32_e32 v6, s6, v6                                    ; 100C0C06
>	s_buffer_load_dword s11, s[0:3], 0x2e                       ; C205812E
>	v_add_f32_e64 v11, v11, 0 clamp                             ; D206080B 0001010B
>	v_mul_f32_e32 v14, v17, v14                                 ; 101C1D11
>	v_mul_f32_e32 v15, v17, v15                                 ; 101E1F11
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_mul_f32_e32 v14, v14, v11                                 ; 101C170E
>	v_mul_f32_e32 v15, v15, v11                                 ; 101E170F
>	v_mul_f32_e32 v11, v6, v11                                  ; 10161706
>	v_mul_f32_e32 v6, 4.0, v17                                  ; 100C22F6
>	v_mac_f32_e32 v14, v6, v8                                   ; 3E1C1106
>	v_mac_f32_e32 v15, v6, v9                                   ; 3E1E1306
>	v_mac_f32_e32 v11, v6, v10                                  ; 3E161506
>	v_sub_f32_e32 v6, s8, v12                                   ; 080C1808
>	v_sub_f32_e32 v9, s9, v19                                   ; 08122609
>	v_mul_f32_e32 v10, v6, v6                                   ; 10140D06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v8, s11, v20                                  ; 0810280B
>	v_mac_f32_e32 v10, v9, v9                                   ; 3E141309
>	v_mac_f32_e32 v10, v8, v8                                   ; 3E141108
>	v_rsq_f32_e32 v12, v10                                      ; 7E185D0A
>	s_buffer_load_dword s12, s[0:3], 0x2f                       ; C206012F
>	s_buffer_load_dword s4, s[0:3], 0x30                        ; C2020130
>	s_buffer_load_dword s5, s[0:3], 0x31                        ; C2028131
>	v_mul_f32_e32 v6, v12, v6                                   ; 100C0D0C
>	v_mul_f32_e32 v5, v5, v6                                    ; 100A0D05
>	v_mul_f32_e32 v6, v12, v9                                   ; 100C130C
>	v_mac_f32_e32 v5, v30, v6                                   ; 3E0A0D1E
>	v_mul_f32_e32 v6, v12, v8                                   ; 100C110C
>	v_mac_f32_e32 v5, v28, v6                                   ; 3E0A0D1C
>	v_mul_f32_e32 v6, v12, v10                                  ; 100C150C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s12, v6                                   ; 100C0C0C
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mad_f32 v8, -v6, s4, s4                                   ; D2820008 20100906
>	s_buffer_load_dword s6, s[0:3], 0x32                        ; C2030132
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_mac_f32_e32 v14, v8, v5                                   ; 3E1C0B08
>	v_mad_f32 v8, -v6, s5, s5                                   ; D2820008 20140B06
>	v_mul_f32_e32 v8, v17, v8                                   ; 10101111
>	v_mac_f32_e32 v15, v8, v5                                   ; 3E1E0B08
>	v_add_f32_e64 v8, v21, 0 clamp                              ; D2060808 00010115
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v6, -v6, s6, s6                                   ; D2820006 20180D06
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mul_f32_e32 v6, v17, v6                                   ; 100C0D11
>	v_cubema_f32 v16, v22, v26, v29                             ; D28E0010 04763516
>	v_log_f32_e32 v17, v8                                       ; 7E224F08
>	s_and_b32 s28, s28, s39                                     ; 871C271C
>	image_sample v[8:10], v[0:1], s[32:39], s[28:31] dmask:0x7  ; F0800700 00E80800
>	v_rcp_f32_e64 v1, |v16|                                     ; D3540101 00000110
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mac_f32_e32 v11, v6, v5                                   ; 3E160B06
>	v_cubetc_f32 v5, v22, v26, v29                              ; D28C0005 04763516
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v17                    ; 0E0022FF 40A00000
>	s_buffer_load_dword s7, s[0:3], 0x7                         ; C2038107
>	v_cubesc_f32 v12, v22, v26, v29                             ; D28A000C 04763516
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	v_cubeid_f32 v6, v22, v26, v29                              ; D2880006 04763516
>	v_max_f32_e32 v18, 0, v18                                   ; 20242480
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s24, s24, s23                                     ; 87181718
>	v_mac_f32_e32 v4, v1, v12                                   ; 3E081901
>	v_mul_f32_e32 v0, v18, v0                                   ; 10000112
>	image_sample_l v[4:6], v[4:7], s[16:23], s[24:27] dmask:0x7 ; F0900700 00C40404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v23, v0                                   ; 100A0117
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s7, v0                                    ; 08000007
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v19                                ; 0A0C2604
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s7                                      ; 7E0C4807
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v1, v23, v1                                   ; 10020317
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v23, v4                                   ; 10080917
>	v_mac_f32_e32 v1, v8, v14                                   ; 3E021D08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v15                                   ; 3E081F09
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v11                                  ; 3E0A170A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 64
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1456 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5].x, GENERIC[4]
>DCL CONST[0..5]
>DCL TEMP[0..6], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0000,     0.0000}
>  0: MAD TEMP[0], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: DP3 TEMP[2].x, TEMP[1].xyzz, IMM[0].zwww
>  3: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[0].wzww
>  4: MOV TEMP[2].y, TEMP[3].xxxx
>  5: DP3 TEMP[1].x, TEMP[1].xyzz, IMM[0].wwzz
>  6: MOV TEMP[2].z, TEMP[1].xxxx
>  7: DP3 TEMP[3].x, TEMP[0].xyzz, IMM[0].zwww
>  8: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wzww
>  9: MOV TEMP[3].y, TEMP[4].xxxx
> 10: DP3 TEMP[4].x, TEMP[0].xyzz, IMM[0].wwzz
> 11: MOV TEMP[3].z, TEMP[4].xxxx
> 12: MUL TEMP[4], CONST[0], IN[0].xxxx
> 13: MAD TEMP[4], CONST[1], IN[0].yyyy, TEMP[4]
> 14: MAD TEMP[4], CONST[2], IN[0].zzzz, TEMP[4]
> 15: MAD TEMP[4], CONST[3], IN[0].wwww, TEMP[4]
> 16: MOV TEMP[5].xyz, IN[0].xyzx
> 17: MUL TEMP[6].x, TEMP[4].wwww, CONST[4].wwww
> 18: MOV TEMP[5].w, TEMP[6].xxxx
> 19: MUL TEMP[6].xyz, TEMP[2].zxyy, TEMP[3].yzxx
> 20: MAD TEMP[6].xyz, TEMP[2].yzxx, TEMP[3].zxyy, -TEMP[6].xyzz
> 21: MUL TEMP[0].xyz, TEMP[6].xyzz, TEMP[0].wwww
> 22: MOV TEMP[3].xyz, TEMP[3].xyzx
> 23: MOV TEMP[3].w, TEMP[0].xxxx
> 24: MOV TEMP[0].xy, TEMP[0].yzyy
> 25: ADD TEMP[6].x, IMM[0].zzzz, -CONST[5].zzzz
> 26: MOV TEMP[6].z, TEMP[6].xxxx
> 27: MOV TEMP[6].xy, IN[3].xyxx
> 28: MOV TEMP[0].zw, TEMP[2].yyxy
> 29: MOV OUT[1], TEMP[5]
> 30: MOV OUT[4], TEMP[0]
> 31: MOV OUT[0], TEMP[4]
> 32: MOV OUT[3], TEMP[3]
> 33: MOV OUT[2].xyz, TEMP[6].xyzx
> 34: MOV OUT[5].x, TEMP[1].xxxx
> 35: END
>radeonsi: Compiling shader 97
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %18 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %19 = load <16 x i8>, <16 x i8> addrspace(2)* %18, align 16, !invariant.load !0
>  %20 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %19, i32 0, i32 %14)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = extractelement <4 x float> %20, i32 1
>  %23 = extractelement <4 x float> %20, i32 2
>  %24 = extractelement <4 x float> %20, i32 3
>  %25 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, align 16, !invariant.load !0
>  %27 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %26, i32 0, i32 %15)
>  %28 = extractelement <4 x float> %27, i32 0
>  %29 = extractelement <4 x float> %27, i32 1
>  %30 = extractelement <4 x float> %27, i32 2
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %39, i32 0, i32 %17)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = fmul float %34, 2.000000e+00
>  %44 = fadd float %43, -1.000000e+00
>  %45 = fmul float %35, 2.000000e+00
>  %46 = fadd float %45, -1.000000e+00
>  %47 = fmul float %36, 2.000000e+00
>  %48 = fadd float %47, -1.000000e+00
>  %49 = fmul float %37, 2.000000e+00
>  %50 = fadd float %49, -1.000000e+00
>  %51 = fmul float %28, 2.000000e+00
>  %52 = fadd float %51, -1.000000e+00
>  %53 = fmul float %29, 2.000000e+00
>  %54 = fadd float %53, -1.000000e+00
>  %55 = fmul float %30, 2.000000e+00
>  %56 = fadd float %55, -1.000000e+00
>  %57 = fmul float %54, 0.000000e+00
>  %58 = fadd float %57, %52
>  %59 = fmul float %56, 0.000000e+00
>  %60 = fadd float %58, %59
>  %61 = fmul float %52, 0.000000e+00
>  %62 = fadd float %54, %61
>  %63 = fmul float %56, 0.000000e+00
>  %64 = fadd float %62, %63
>  %65 = fmul float %52, 0.000000e+00
>  %66 = fmul float %54, 0.000000e+00
>  %67 = fadd float %66, %65
>  %68 = fadd float %67, %56
>  %69 = fmul float %46, 0.000000e+00
>  %70 = fadd float %69, %44
>  %71 = fmul float %48, 0.000000e+00
>  %72 = fadd float %70, %71
>  %73 = fmul float %44, 0.000000e+00
>  %74 = fadd float %46, %73
>  %75 = fmul float %48, 0.000000e+00
>  %76 = fadd float %74, %75
>  %77 = fmul float %44, 0.000000e+00
>  %78 = fmul float %46, 0.000000e+00
>  %79 = fadd float %78, %77
>  %80 = fadd float %79, %48
>  %81 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %82 = load <16 x i8>, <16 x i8> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = call float @llvm.SI.load.const(<16 x i8> %82, i32 0)
>  %84 = fmul float %83, %21
>  %85 = call float @llvm.SI.load.const(<16 x i8> %82, i32 4)
>  %86 = fmul float %85, %21
>  %87 = call float @llvm.SI.load.const(<16 x i8> %82, i32 8)
>  %88 = fmul float %87, %21
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = call float @llvm.SI.load.const(<16 x i8> %90, i32 12)
>  %92 = fmul float %91, %21
>  %93 = call float @llvm.SI.load.const(<16 x i8> %90, i32 16)
>  %94 = fmul float %93, %22
>  %95 = fadd float %94, %84
>  %96 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %97 = load <16 x i8>, <16 x i8> addrspace(2)* %96, align 16, !invariant.load !0
>  %98 = call float @llvm.SI.load.const(<16 x i8> %97, i32 20)
>  %99 = fmul float %98, %22
>  %100 = fadd float %99, %86
>  %101 = call float @llvm.SI.load.const(<16 x i8> %97, i32 24)
>  %102 = fmul float %101, %22
>  %103 = fadd float %102, %88
>  %104 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %105 = load <16 x i8>, <16 x i8> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = call float @llvm.SI.load.const(<16 x i8> %105, i32 28)
>  %107 = fmul float %106, %22
>  %108 = fadd float %107, %92
>  %109 = call float @llvm.SI.load.const(<16 x i8> %105, i32 32)
>  %110 = fmul float %109, %23
>  %111 = fadd float %110, %95
>  %112 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %113 = load <16 x i8>, <16 x i8> addrspace(2)* %112, align 16, !invariant.load !0
>  %114 = call float @llvm.SI.load.const(<16 x i8> %113, i32 36)
>  %115 = fmul float %114, %23
>  %116 = fadd float %115, %100
>  %117 = call float @llvm.SI.load.const(<16 x i8> %113, i32 40)
>  %118 = fmul float %117, %23
>  %119 = fadd float %118, %103
>  %120 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %121 = load <16 x i8>, <16 x i8> addrspace(2)* %120, align 16, !invariant.load !0
>  %122 = call float @llvm.SI.load.const(<16 x i8> %121, i32 44)
>  %123 = fmul float %122, %23
>  %124 = fadd float %123, %108
>  %125 = call float @llvm.SI.load.const(<16 x i8> %121, i32 48)
>  %126 = fmul float %125, %24
>  %127 = fadd float %126, %111
>  %128 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %129 = load <16 x i8>, <16 x i8> addrspace(2)* %128, align 16, !invariant.load !0
>  %130 = call float @llvm.SI.load.const(<16 x i8> %129, i32 52)
>  %131 = fmul float %130, %24
>  %132 = fadd float %131, %116
>  %133 = call float @llvm.SI.load.const(<16 x i8> %129, i32 56)
>  %134 = fmul float %133, %24
>  %135 = fadd float %134, %119
>  %136 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %137 = load <16 x i8>, <16 x i8> addrspace(2)* %136, align 16, !invariant.load !0
>  %138 = call float @llvm.SI.load.const(<16 x i8> %137, i32 60)
>  %139 = fmul float %138, %24
>  %140 = fadd float %139, %124
>  %141 = call float @llvm.SI.load.const(<16 x i8> %137, i32 76)
>  %142 = fmul float %140, %141
>  %143 = fmul float %68, %76
>  %144 = fmul float %60, %80
>  %145 = fmul float %64, %72
>  %146 = fmul float %64, %80
>  %147 = fsub float %146, %143
>  %148 = fmul float %68, %72
>  %149 = fsub float %148, %144
>  %150 = fmul float %60, %76
>  %151 = fsub float %150, %145
>  %152 = fmul float %147, %50
>  %153 = fmul float %149, %50
>  %154 = fmul float %151, %50
>  %155 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %156 = load <16 x i8>, <16 x i8> addrspace(2)* %155, align 16, !invariant.load !0
>  %157 = call float @llvm.SI.load.const(<16 x i8> %156, i32 88)
>  %158 = fsub float 1.000000e+00, %157
>  %159 = bitcast i32 %12 to float
>  %160 = insertvalue <{ float, float, float }> undef, float %159, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %21, float %22, float %23, float %142)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %41, float %42, float %158, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %72, float %76, float %80, float %152)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %153, float %154, float %60, float %64)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %68, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %127, float %132, float %135, float %140)
>  ret <{ float, float, float }> %160
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4].x, GENERIC[4], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SVIEW[0], CUBE, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], 2D, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL CONST[0..3]
>DCL CONST[10]
>DCL TEMP[0..10], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    6.0000,     0.3000,     0.5900,     0.1100}
>IMM[2] FLT32 {   32.0000,     4.0000,     5.0000,     0.0000}
>IMM[3] FLT32 {    0.0010,     8.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwzz
>  3: MOV TEMP[1].z, IN[4].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[4], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[3], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[2].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
> 23: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, IMM[0].xxxx, TEMP[4].xyzz
> 26: ADD TEMP[4].xyz, TEMP[2].xyzz, -TEMP[4].xyzz
> 27: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 28: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].wwww
> 29: DP3 TEMP[1].x, TEMP[2].xyzz, TEMP[1].xyzz
> 30: ADD TEMP[1].x, IMM[0].wwww, -TEMP[1].xxxx
> 31: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 32: ADD TEMP[1].x, TEMP[4].xxxx, -TEMP[1].xxxx
> 33: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 34: ADD TEMP[1].x, IMM[0].wwww, -TEMP[1].xxxx
> 35: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 36: MUL TEMP[1].x, TEMP[3].yyyy, TEMP[1].xxxx
> 37: MOV TEMP[4].xyz, TEMP[0].xyzz
> 38: TEX TEMP[4], TEMP[4], SAMP[0], CUBE
> 39: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[2].xyzz
> 40: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[0].xyzz
> 41: MAD TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz, -TEMP[2].xyzz
> 42: ADD TEMP[6].x, IMM[0].wwww, -TEMP[3].zzzz
> 43: MUL TEMP[6].x, TEMP[6].xxxx, IMM[1].xxxx
> 44: MOV TEMP[7].xy, IN[1].xyyy
> 45: TEX TEMP[7], TEMP[7], SAMP[5], 2D
> 46: MOV TEMP[8].w, TEMP[7].wwww
> 47: DP3 TEMP[9].x, TEMP[7].xyzz, IMM[1].yzww
> 48: ADD TEMP[10].x, CONST[10].wwww, IMM[0].wwww
> 49: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 50: MUL TEMP[8].xyz, TEMP[7].xyzz, TEMP[9].xxxx
> 51: MUL TEMP[7].xyz, TEMP[8], IMM[2].xxxx
> 52: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[4].wwww
> 53: MUL TEMP[8].x, IMM[2].yyyy, TEMP[3].yyyy
> 54: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[0].xyzz
> 55: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 56: MUL TEMP[10].xyz, CONST[3].xyzz, TEMP[3].yyyy
> 57: MUL TEMP[9].xyz, TEMP[9].xxxx, TEMP[10].xyzz
> 58: MAD TEMP[4].xyz, TEMP[4].xyzz, TEMP[8].xxxx, TEMP[9].xyzz
> 59: MOV TEMP[8].xy, IN[1].xyyy
> 60: TEX TEMP[8].xyz, TEMP[8], SAMP[2], 2D
> 61: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
> 62: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 63: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
> 64: POW TEMP[0].x, TEMP[0].xxxx, IMM[2].zzzz
> 65: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[2].wwww
> 66: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
> 67: MOV TEMP[2].xyz, TEMP[5].xyzz
> 68: MOV TEMP[2].w, TEMP[6].xxxx
> 69: TXL TEMP[2].xyz, TEMP[2], SAMP[1], CUBE
> 70: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 71: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 72: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[8].xyzz, TEMP[0].xyzz
> 73: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[7].xyzz
> 74: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
> 75: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].wwww
> 76: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
> 77: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].xxxx
> 78: RCP TEMP[2].x, TEMP[2].xxxx
> 79: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 80: FRC TEMP[2].x, CONST[1].wwww
> 81: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].yyyy
> 82: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 83: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 84: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
> 85: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
> 86: MOV TEMP[0].w, IN[0].wwww
> 87: MOV OUT[0], TEMP[0]
> 88: END
>radeonsi: Compiling shader 98
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 19, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 15, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fmul float %132, 2.000000e+00
>  %136 = fmul float %133, 2.000000e+00
>  %137 = fsub float %49, %134
>  %138 = fsub float %50, %135
>  %139 = fsub float %51, %136
>  %140 = fmul float %137, %59
>  %141 = fmul float %138, %60
>  %142 = fadd float %141, %140
>  %143 = fmul float %139, %61
>  %144 = fadd float %142, %143
>  %145 = fadd float %144, 1.000000e+00
>  %146 = fmul float %49, %59
>  %147 = fmul float %50, %60
>  %148 = fadd float %147, %146
>  %149 = fmul float %51, %61
>  %150 = fadd float %148, %149
>  %151 = fsub float 1.000000e+00, %150
>  %152 = call float @llvm.AMDGPU.clamp.(float %151, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float %145, %152
>  %154 = call float @llvm.AMDGPU.clamp.(float %153, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = fmul float %155, %155
>  %157 = fmul float %78, %156
>  %158 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %159 = load <8 x i32>, <8 x i32> addrspace(2)* %158, align 32, !invariant.load !0
>  %160 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %161 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %160, i64 0, i64 3, !amdgpu.uniform !0
>  %162 = load <4 x i32>, <4 x i32> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = extractelement <8 x i32> %159, i32 7
>  %164 = extractelement <4 x i32> %162, i32 0
>  %165 = and i32 %164, %163
>  %166 = insertelement <4 x i32> %162, i32 %165, i32 0
>  %167 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %168 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %169 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %170 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %171 = call float @llvm.fabs.f32(float %169)
>  %172 = fdiv float 1.000000e+00, %171, !fpmath !1
>  %173 = fmul float %167, %172
>  %174 = fadd float %173, 1.500000e+00
>  %175 = fmul float %168, %172
>  %176 = fadd float %175, 1.500000e+00
>  %177 = bitcast float %176 to i32
>  %178 = bitcast float %174 to i32
>  %179 = bitcast float %170 to i32
>  %180 = insertelement <4 x i32> undef, i32 %177, i32 0
>  %181 = insertelement <4 x i32> %180, i32 %178, i32 1
>  %182 = insertelement <4 x i32> %181, i32 %179, i32 2
>  %183 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %182, <8 x i32> %159, <4 x i32> %166, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %184 = extractelement <4 x float> %183, i32 0
>  %185 = extractelement <4 x float> %183, i32 1
>  %186 = extractelement <4 x float> %183, i32 2
>  %187 = extractelement <4 x float> %183, i32 3
>  %188 = fmul float %121, %49
>  %189 = fmul float %123, %50
>  %190 = fadd float %189, %188
>  %191 = fmul float %125, %51
>  %192 = fadd float %190, %191
>  %193 = fmul float %192, %121
>  %194 = fmul float %192, %123
>  %195 = fmul float %192, %125
>  %196 = fmul float %193, 2.000000e+00
>  %197 = fsub float %196, %49
>  %198 = fmul float %194, 2.000000e+00
>  %199 = fsub float %198, %50
>  %200 = fmul float %195, 2.000000e+00
>  %201 = fsub float %200, %51
>  %202 = fsub float 1.000000e+00, %79
>  %203 = fmul float %202, 6.000000e+00
>  %204 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %205 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %206 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %207 = load <8 x i32>, <8 x i32> addrspace(2)* %206, align 32, !invariant.load !0
>  %208 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %209 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %208, i64 0, i64 23, !amdgpu.uniform !0
>  %210 = load <4 x i32>, <4 x i32> addrspace(2)* %209, align 16, !invariant.load !0
>  %211 = extractelement <8 x i32> %207, i32 7
>  %212 = extractelement <4 x i32> %210, i32 0
>  %213 = and i32 %212, %211
>  %214 = insertelement <4 x i32> %210, i32 %213, i32 0
>  %215 = bitcast float %204 to i32
>  %216 = bitcast float %205 to i32
>  %217 = insertelement <2 x i32> undef, i32 %215, i32 0
>  %218 = insertelement <2 x i32> %217, i32 %216, i32 1
>  %219 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %218, <8 x i32> %207, <4 x i32> %214, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %220 = extractelement <4 x float> %219, i32 0
>  %221 = extractelement <4 x float> %219, i32 1
>  %222 = extractelement <4 x float> %219, i32 2
>  %223 = fmul float %220, 0x3FD3333340000000
>  %224 = fmul float %221, 0x3FE2E147A0000000
>  %225 = fadd float %224, %223
>  %226 = fmul float %222, 0x3FBC28F5C0000000
>  %227 = fadd float %225, %226
>  %228 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %229 = load <16 x i8>, <16 x i8> addrspace(2)* %228, align 16, !invariant.load !0
>  %230 = call float @llvm.SI.load.const(<16 x i8> %229, i32 172)
>  %231 = fadd float %230, 1.000000e+00
>  %232 = fmul float %227, %231
>  %233 = fmul float %220, %232
>  %234 = fmul float %221, %232
>  %235 = fmul float %222, %232
>  %236 = fmul float %233, 3.200000e+01
>  %237 = fmul float %234, 3.200000e+01
>  %238 = fmul float %235, 3.200000e+01
>  %239 = fmul float %184, %187
>  %240 = fmul float %185, %187
>  %241 = fmul float %186, %187
>  %242 = fmul float %78, 4.000000e+00
>  %243 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %244 = load <16 x i8>, <16 x i8> addrspace(2)* %243, align 16, !invariant.load !0
>  %245 = call float @llvm.SI.load.const(<16 x i8> %244, i32 16)
>  %246 = call float @llvm.SI.load.const(<16 x i8> %244, i32 20)
>  %247 = call float @llvm.SI.load.const(<16 x i8> %244, i32 24)
>  %248 = fmul float %245, %121
>  %249 = fsub float -0.000000e+00, %248
>  %250 = fmul float %246, %123
>  %251 = fsub float %249, %250
>  %252 = fmul float %247, %125
>  %253 = fsub float %251, %252
>  %254 = call float @llvm.AMDGPU.clamp.(float %253, float 0.000000e+00, float 1.000000e+00)
>  %255 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %256 = load <16 x i8>, <16 x i8> addrspace(2)* %255, align 16, !invariant.load !0
>  %257 = call float @llvm.SI.load.const(<16 x i8> %256, i32 48)
>  %258 = fmul float %257, %78
>  %259 = call float @llvm.SI.load.const(<16 x i8> %256, i32 52)
>  %260 = fmul float %259, %78
>  %261 = call float @llvm.SI.load.const(<16 x i8> %256, i32 56)
>  %262 = fmul float %261, %78
>  %263 = fmul float %254, %258
>  %264 = fmul float %254, %260
>  %265 = fmul float %254, %262
>  %266 = fmul float %239, %242
>  %267 = fadd float %266, %263
>  %268 = fmul float %240, %242
>  %269 = fadd float %268, %264
>  %270 = fmul float %241, %242
>  %271 = fadd float %270, %265
>  %272 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %273 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %274 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %275 = load <8 x i32>, <8 x i32> addrspace(2)* %274, align 32, !invariant.load !0
>  %276 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %277 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %276, i64 0, i64 11, !amdgpu.uniform !0
>  %278 = load <4 x i32>, <4 x i32> addrspace(2)* %277, align 16, !invariant.load !0
>  %279 = extractelement <8 x i32> %275, i32 7
>  %280 = extractelement <4 x i32> %278, i32 0
>  %281 = and i32 %280, %279
>  %282 = insertelement <4 x i32> %278, i32 %281, i32 0
>  %283 = bitcast float %272 to i32
>  %284 = bitcast float %273 to i32
>  %285 = insertelement <2 x i32> undef, i32 %283, i32 0
>  %286 = insertelement <2 x i32> %285, i32 %284, i32 1
>  %287 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %286, <8 x i32> %275, <4 x i32> %282, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %288 = extractelement <4 x float> %287, i32 0
>  %289 = extractelement <4 x float> %287, i32 1
>  %290 = extractelement <4 x float> %287, i32 2
>  %291 = fmul float %49, %121
>  %292 = fmul float %50, %123
>  %293 = fadd float %292, %291
>  %294 = fmul float %51, %125
>  %295 = fadd float %293, %294
>  %296 = call float @llvm.AMDGPU.clamp.(float %295, float 0.000000e+00, float 1.000000e+00)
>  %297 = fsub float 1.000000e+00, %296
>  %298 = call float @llvm.pow.f32(float %297, float 5.000000e+00)
>  %299 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %300 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %301 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %302 = fmul float %298, %299
>  %303 = fmul float %298, %300
>  %304 = fmul float %298, %301
>  %305 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %306 = load <8 x i32>, <8 x i32> addrspace(2)* %305, align 32, !invariant.load !0
>  %307 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %308 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %307, i64 0, i64 7, !amdgpu.uniform !0
>  %309 = load <4 x i32>, <4 x i32> addrspace(2)* %308, align 16, !invariant.load !0
>  %310 = extractelement <8 x i32> %306, i32 7
>  %311 = extractelement <4 x i32> %309, i32 0
>  %312 = and i32 %311, %310
>  %313 = insertelement <4 x i32> %309, i32 %312, i32 0
>  %314 = call float @llvm.amdgcn.cubetc(float %197, float %199, float %201)
>  %315 = call float @llvm.amdgcn.cubesc(float %197, float %199, float %201)
>  %316 = call float @llvm.amdgcn.cubema(float %197, float %199, float %201)
>  %317 = call float @llvm.amdgcn.cubeid(float %197, float %199, float %201)
>  %318 = call float @llvm.fabs.f32(float %316)
>  %319 = fdiv float 1.000000e+00, %318, !fpmath !1
>  %320 = fmul float %314, %319
>  %321 = fadd float %320, 1.500000e+00
>  %322 = fmul float %315, %319
>  %323 = fadd float %322, 1.500000e+00
>  %324 = bitcast float %323 to i32
>  %325 = bitcast float %321 to i32
>  %326 = bitcast float %317 to i32
>  %327 = bitcast float %203 to i32
>  %328 = insertelement <4 x i32> undef, i32 %324, i32 0
>  %329 = insertelement <4 x i32> %328, i32 %325, i32 1
>  %330 = insertelement <4 x i32> %329, i32 %326, i32 2
>  %331 = insertelement <4 x i32> %330, i32 %327, i32 3
>  %332 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %331, <8 x i32> %306, <4 x i32> %313, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %333 = extractelement <4 x float> %332, i32 0
>  %334 = extractelement <4 x float> %332, i32 1
>  %335 = extractelement <4 x float> %332, i32 2
>  %336 = fmul float %302, %333
>  %337 = fmul float %303, %334
>  %338 = fmul float %304, %335
>  %339 = fmul float %336, %157
>  %340 = fmul float %337, %157
>  %341 = fmul float %338, %157
>  %342 = fmul float %267, %288
>  %343 = fadd float %342, %339
>  %344 = fmul float %269, %289
>  %345 = fadd float %344, %340
>  %346 = fmul float %271, %290
>  %347 = fadd float %346, %341
>  %348 = fadd float %343, %236
>  %349 = fadd float %345, %237
>  %350 = fadd float %347, %238
>  %351 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %352 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %353 = load <16 x i8>, <16 x i8> addrspace(2)* %352, align 16, !invariant.load !0
>  %354 = call float @llvm.SI.load.const(<16 x i8> %353, i32 12)
>  %355 = fsub float %351, %354
>  %356 = call float @llvm.maxnum.f32(float %355, float 0.000000e+00)
>  %357 = call float @llvm.SI.load.const(<16 x i8> %353, i32 28)
>  %358 = call float @llvm.SI.load.const(<16 x i8> %353, i32 12)
>  %359 = fsub float %357, %358
>  %360 = fadd float %359, 0x3F50624DE0000000
>  %361 = fdiv float 1.000000e+00, %360, !fpmath !1
>  %362 = fmul float %356, %361
>  %363 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %364 = load <16 x i8>, <16 x i8> addrspace(2)* %363, align 16, !invariant.load !0
>  %365 = call float @llvm.SI.load.const(<16 x i8> %364, i32 28)
>  %366 = call float @llvm.floor.f32(float %365)
>  %367 = fsub float %365, %366
>  %368 = fmul float %367, 8.000000e+00
>  %369 = call float @llvm.pow.f32(float %362, float %368)
>  %370 = call float @llvm.AMDGPU.clamp.(float %369, float 0.000000e+00, float 1.000000e+00)
>  %371 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %372 = fmul float %371, %370
>  %373 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %374 = load <16 x i8>, <16 x i8> addrspace(2)* %373, align 16, !invariant.load !0
>  %375 = call float @llvm.SI.load.const(<16 x i8> %374, i32 32)
>  %376 = fsub float 1.000000e+00, %372
>  %377 = fmul float %348, %372
>  %378 = fmul float %375, %376
>  %379 = fadd float %377, %378
>  %380 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %381 = load <16 x i8>, <16 x i8> addrspace(2)* %380, align 16, !invariant.load !0
>  %382 = call float @llvm.SI.load.const(<16 x i8> %381, i32 36)
>  %383 = fsub float 1.000000e+00, %372
>  %384 = fmul float %349, %372
>  %385 = fmul float %382, %383
>  %386 = fadd float %384, %385
>  %387 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %388 = load <16 x i8>, <16 x i8> addrspace(2)* %387, align 16, !invariant.load !0
>  %389 = call float @llvm.SI.load.const(<16 x i8> %388, i32 40)
>  %390 = fsub float 1.000000e+00, %372
>  %391 = fmul float %350, %372
>  %392 = fmul float %389, %390
>  %393 = fadd float %391, %392
>  %394 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %395 = bitcast float %5 to i32
>  %396 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %395, 10
>  %397 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %396, float %379, 11
>  %398 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %397, float %386, 12
>  %399 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %398, float %393, 13
>  %400 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %399, float %394, 14
>  %401 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %400, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %401
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[12:15], v5, s[12:15], 0 idxen ; E00C2000 80030C05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen   ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[15:18], v7, s[8:11], 0 idxen  ; E00C2000 80020F07
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	s_buffer_load_dword s20, s[0:3], 0x13                   ; C20A0113
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s0, s[0:3], 0x16                    ; C2000116
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v1, s7, v8                                ; 10021007
>	v_mac_f32_e32 v1, s11, v9                               ; 3E02120B
>	v_mac_f32_e32 v1, s15, v10                              ; 3E02140F
>	v_mac_f32_e32 v1, s19, v11                              ; 3E021613
>	v_mul_f32_e32 v7, s20, v1                               ; 100E0214
>	v_mul_f32_e32 v0, s4, v8                                ; 10001004
>	exp 15, 32, 0, 0, 0, v8, v9, v10, v7                    ; F800020F 070A0908
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v7, s5, v8                                ; 100E1005
>	v_mul_f32_e32 v8, s6, v8                                ; 10101006
>	v_mac_f32_e32 v0, s8, v9                                ; 3E001208
>	v_mac_f32_e32 v7, s9, v9                                ; 3E0E1209
>	v_mac_f32_e32 v8, s10, v9                               ; 3E10120A
>	v_mac_f32_e32 v0, s12, v10                              ; 3E00140C
>	v_mac_f32_e32 v7, s13, v10                              ; 3E0E140D
>	v_mac_f32_e32 v8, s14, v10                              ; 3E10140E
>	v_mad_f32 v10, 2.0, v12, -1.0                           ; D282000A 03CE18F4
>	v_mac_f32_e32 v0, s16, v11                              ; 3E001610
>	v_mac_f32_e32 v7, s17, v11                              ; 3E0E1611
>	v_mac_f32_e32 v8, s18, v11                              ; 3E101612
>	v_mad_f32 v11, 2.0, v13, -1.0                           ; D282000B 03CE1AF4
>	v_mad_f32 v12, 2.0, v14, -1.0                           ; D282000C 03CE1CF4
>	v_mad_f32 v13, 0, v11, v10                              ; D282000D 042A1680
>	v_mad_f32 v14, 0, v10, v11                              ; D282000E 042E1480
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mad_f32 v17, 0, v4, v3                                ; D2820011 040E0880
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_mac_f32_e32 v14, 0, v12                               ; 3E1C1880
>	v_mac_f32_e32 v12, 0, v11                               ; 3E181680
>	v_mad_f32 v11, 0, v3, v4                                ; D282000B 04120680
>	v_mac_f32_e32 v17, 0, v5                                ; 3E220A80
>	v_mac_f32_e32 v11, 0, v5                                ; 3E160A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mac_f32_e32 v12, 0, v10                               ; 3E181480
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v4, v11, v12                              ; 1008190B
>	v_mul_f32_e32 v3, v17, v14                              ; 10061D11
>	v_mul_f32_e32 v10, v5, v13                              ; 10141B05
>	v_sub_f32_e64 v9, 1.0, s0                               ; D2080009 000000F2
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v4, v14, v5, -v4                              ; D2820004 84120B0E
>	v_mad_f32 v3, v13, v11, -v3                             ; D2820003 840E170D
>	v_mad_f32 v10, v12, v17, -v10                           ; D282000A 842A230C
>	v_mad_f32 v4, v6, v4, -v4                               ; D2820004 84120906
>	exp 15, 33, 0, 0, 0, v15, v16, v9, v0                   ; F800021F 0009100F
>	v_mad_f32 v3, v6, v3, -v3                               ; D2820003 840E0706
>	v_mad_f32 v6, v6, v10, -v10                             ; D2820006 842A1506
>	exp 15, 34, 0, 0, 0, v17, v11, v5, v4                   ; F800022F 04050B11
>	exp 15, 35, 0, 0, 0, v6, v3, v13, v14                   ; F800023F 0E0D0306
>	exp 15, 36, 0, 0, 0, v12, v0, v0, v0                    ; F800024F 0000000C
>	exp 15, 12, 0, 1, 0, v0, v7, v8, v1                     ; F80008CF 01080700
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 472 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 2, [m0]                          ; C8200B04
>	v_interp_p2_f32 v8, [v8], v5, 3, 2, [m0]                    ; C8210B05
>	v_interp_p1_f32 v9, v4, 0, 3, [m0]                          ; C8240C04
>	v_interp_p2_f32 v9, [v9], v5, 0, 3, [m0]                    ; C8250C05
>	v_interp_p1_f32 v10, v4, 1, 3, [m0]                         ; C8280D04
>	v_interp_p2_f32 v10, [v10], v5, 1, 3, [m0]                  ; C8290D05
>	v_interp_p1_f32 v0, v4, 2, 3, [m0]                          ; C8000E04
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 3, [m0]                    ; C8010E05
>	v_interp_p1_f32 v1, v4, 3, 3, [m0]                          ; C8040F04
>	v_interp_p2_f32 v1, [v1], v5, 3, 3, [m0]                    ; C8050F05
>	v_interp_p1_f32 v6, v4, 0, 4, [m0]                          ; C8181004
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 4, [m0]                    ; C8191005
>	v_interp_p1_f32 v7, v2, 0, 0, [m0]                          ; C81C0002
>	v_interp_p2_f32 v7, [v7], v3, 0, 0, [m0]                    ; C81D0003
>	v_interp_p1_f32 v12, v2, 1, 0, [m0]                         ; C8300102
>	v_interp_p2_f32 v12, [v12], v3, 1, 0, [m0]                  ; C8310103
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v11, s8, v7                                   ; 08160E08
>	v_interp_p1_f32 v7, v2, 2, 0, [m0]                          ; C81C0202
>	v_interp_p2_f32 v7, [v7], v3, 2, 0, [m0]                    ; C81D0203
>	v_sub_f32_e32 v17, s11, v7                                  ; 08220E0B
>	v_sub_f32_e32 v16, s9, v12                                  ; 08201809
>	v_mul_f32_e32 v7, v11, v11                                  ; 100E170B
>	v_mac_f32_e32 v7, v16, v16                                  ; 3E0E2110
>	v_mac_f32_e32 v7, v17, v17                                  ; 3E0E2311
>	v_rsq_f32_e32 v18, v7                                       ; 7E245D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	s_load_dwordx4 s[48:51], s[4:5], 0x4c                       ; C098054C
>	s_load_dwordx8 s[28:35], s[4:5], 0x40                       ; C0CE0540
>	v_mul_f32_e32 v19, v18, v11                                 ; 10261712
>	v_mul_f32_e32 v22, v7, v0                                   ; 102C0107
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_mul_f32_e32 v23, v7, v1                                   ; 102E0307
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s48, s48, s35                                     ; 87302330
>	image_sample v[14:15], v[0:1], s[28:35], s[48:51] dmask:0x6 ; F0800600 01870E00
>	s_load_dwordx4 s[48:51], s[4:5], 0x3c                       ; C098053C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	v_mul_f32_e32 v24, v7, v6                                   ; 10300D07
>	v_mul_f32_e32 v20, v18, v16                                 ; 10282112
>	v_mul_f32_e32 v6, v22, v19                                  ; 100C2716
>	v_mul_f32_e32 v21, v18, v17                                 ; 102A2312
>	v_mac_f32_e32 v6, v23, v20                                  ; 3E0C2917
>	v_mac_f32_e32 v6, v24, v21                                  ; 3E0C2B18
>	v_sub_f32_e32 v6, 1.0, v6                                   ; 080C0CF2
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s48, s48, s35                                     ; 87302330
>	v_add_f32_e64 v25, v6, 0 clamp                              ; D2060819 00010106
>	image_sample v[6:7], v[0:1], s[28:35], s[48:51] dmask:0xa   ; F0800A00 01870600
>	v_interp_p1_f32 v28, v4, 0, 2, [m0]                         ; C8700804
>	v_interp_p2_f32 v28, [v28], v5, 0, 2, [m0]                  ; C8710805
>	v_interp_p1_f32 v29, v4, 1, 2, [m0]                         ; C8740904
>	v_interp_p2_f32 v29, [v29], v5, 1, 2, [m0]                  ; C8750905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                          ; C8100A04
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v26, v7, v7                                   ; 06340F07
>	v_add_f32_e32 v27, v6, v6                                   ; 06360D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                    ; C8110A05
>	v_mad_f32 v28, v26, v28, -v28                               ; D282001C 8472391A
>	v_mad_f32 v29, v26, v29, -v29                               ; D282001D 84763B1A
>	v_mad_f32 v26, v26, v4, -v4                                 ; D282001A 8412091A
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v4, v27, v6, -v6                                  ; D2820004 841A0D1B
>	v_mac_f32_e32 v4, v7, v7                                    ; 3E080F07
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v28, v6, v8                                   ; 3E381106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v29, v6, v9                                   ; 3E3A1306
>	v_mac_f32_e32 v28, v4, v22                                  ; 3E382D04
>	v_mac_f32_e32 v26, v6, v10                                  ; 3E341506
>	v_mac_f32_e32 v29, v4, v23                                  ; 3E3A2F04
>	v_mul_f32_e32 v19, v19, v28                                 ; 10263913
>	v_mac_f32_e32 v26, v4, v24                                  ; 3E343104
>	v_mac_f32_e32 v19, v20, v29                                 ; 3E263B14
>	v_mac_f32_e32 v19, v21, v26                                 ; 3E263515
>	v_mul_f32_e32 v8, v28, v19                                  ; 1010271C
>	v_mul_f32_e32 v20, v29, v19                                 ; 1028271D
>	v_mac_f32_e32 v8, v28, v19                                  ; 3E10271C
>	v_mul_f32_e32 v21, v26, v19                                 ; 102A271A
>	v_mad_f32 v4, v11, v18, -v8                                 ; D2820004 8422250B
>	v_mac_f32_e32 v20, v29, v19                                 ; 3E28271D
>	v_mul_f32_e32 v7, v22, v4                                   ; 100E0916
>	v_mad_f32 v4, v16, v18, -v20                                ; D2820004 84522510
>	v_mac_f32_e32 v21, v26, v19                                 ; 3E2A271A
>	v_mac_f32_e32 v7, v23, v4                                   ; 3E0E0917
>	v_mad_f32 v4, v17, v18, -v21                                ; D2820004 84562511
>	v_mac_f32_e32 v7, v24, v4                                   ; 3E0E0918
>	v_cubema_f32 v4, v28, v29, v26                              ; D28E0004 046A3B1C
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_add_f32_e32 v7, 1.0, v7                                   ; 060E0EF2
>	s_load_dwordx8 s[36:43], s[4:5], 0x0                        ; C0D20500
>	s_load_dwordx4 s[44:47], s[4:5], 0xc                        ; C096050C
>	v_subrev_f32_e32 v7, v25, v7                                ; 0A0E0F19
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                       ; C0C60510
>	s_load_dwordx4 s[20:23], s[4:5], 0x1c                       ; C08A051C
>	s_load_dwordx4 s[24:27], s[4:5], 0x2c                       ; C08C052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x20                       ; C0CE0520
>	v_cubetc_f32 v6, v28, v29, v26                              ; D28C0006 046A3B1C
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v9, v28, v29, v26                              ; D28A0009 046A3B1C
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v9, v4                                    ; D2820005 04121305
>	v_sub_f32_e32 v9, 1.0, v7                                   ; 08120EF2
>	v_mad_f32 v7, -v7, v9, v9                                   ; D2820007 24261307
>	v_mul_f32_e32 v22, v7, v14                                  ; 102C1D07
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s44, s44, s43                                     ; 872C2B2C
>	v_cubeid_f32 v7, v28, v29, v26                              ; D2880007 046A3B1C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	v_mad_f32 v23, -v11, v18, v8                                ; D2820017 2422250B
>	image_sample v[5:8], v[5:8], s[36:43], s[44:47] dmask:0xf   ; F0800F00 01690505
>	s_load_dwordx8 s[36:43], s[4:5], 0x50                       ; C0D20550
>	s_load_dwordx4 s[4:7], s[4:5], 0x5c                         ; C082055C
>	s_buffer_load_dword s8, s[0:3], 0x2b                        ; C204012B
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v8, v5                                    ; 100A0B08
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s4, s4, s43                                       ; 87042B04
>	image_sample v[9:11], v[0:1], s[36:43], s[4:7] dmask:0x7    ; F0800700 00290900
>	s_buffer_load_dword s4, s[0:3], 0x4                         ; C2020104
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v24, 0x3e99999a, v9                           ; 103012FF 3E99999A
>	s_buffer_load_dword s5, s[0:3], 0x5                         ; C2028105
>	v_mac_f32_e32 v24, 0x3f170a3d, v10                          ; 3E3014FF 3F170A3D
>	s_buffer_load_dword s6, s[0:3], 0x6                         ; C2030106
>	v_mac_f32_e32 v24, 0x3de147ae, v11                          ; 3E3016FF 3DE147AE
>	v_mac_f32_e32 v24, s8, v24                                  ; 3E303008
>	v_mul_f32_e32 v27, v24, v10                                 ; 10361518
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v10, s4, v28                                  ; 10143804
>	v_mad_f32 v10, -s5, v29, -v10                               ; D282000A A42A3A05
>	v_mad_f32 v10, -s6, v26, v10                                ; D282000A 242A3406
>	s_buffer_load_dword s4, s[0:3], 0xe                         ; C202010E
>	s_buffer_load_dword s5, s[0:3], 0xc                         ; C202810C
>	s_buffer_load_dword s6, s[0:3], 0xd                         ; C203010D
>	v_mul_f32_e32 v25, v24, v9                                  ; 10321318
>	v_mad_f32 v8, -v16, v18, v20                                ; D2820008 24522510
>	v_mad_f32 v9, -v17, v18, v21                                ; D2820009 24562511
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v16, s5, v14                                  ; 10201C05
>	v_add_f32_e64 v10, v10, 0 clamp                             ; D206080A 0001010A
>	v_mul_f32_e32 v17, s6, v14                                  ; 10221C06
>	v_mul_f32_e32 v18, s4, v14                                  ; 10241C04
>	v_mul_f32_e32 v16, v16, v10                                 ; 10201510
>	v_mul_f32_e32 v17, v17, v10                                 ; 10221511
>	v_mul_f32_e32 v18, v18, v10                                 ; 10241512
>	v_mul_f32_e32 v10, 4.0, v14                                 ; 10141CF6
>	v_mac_f32_e32 v16, v10, v5                                  ; 3E200B0A
>	v_mac_f32_e32 v17, v10, v6                                  ; 3E220D0A
>	v_mac_f32_e32 v18, v10, v7                                  ; 3E240F0A
>	v_cubeid_f32 v6, v23, v8, v9                                ; D2880006 04261117
>	v_cubetc_f32 v5, v23, v8, v9                                ; D28C0005 04261117
>	v_cubesc_f32 v7, v23, v8, v9                                ; D28A0007 04261117
>	v_cubema_f32 v8, v23, v8, v9                                ; D28E0008 04261117
>	v_rcp_f32_e64 v8, |v8|                                      ; D3540108 00000108
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	s_buffer_load_dword s7, s[0:3], 0x7                         ; C2038107
>	s_and_b32 s24, s24, s35                                     ; 87182318
>	v_mad_f32 v5, v8, v5, v4                                    ; D2820005 04120B08
>	v_mac_f32_e32 v4, v8, v7                                    ; 3E080F08
>	v_add_f32_e64 v8, v19, 0 clamp                              ; D2060808 00010113
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_log_f32_e32 v14, v8                                       ; 7E1C4F08
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	image_sample v[8:10], v[0:1], s[28:35], s[24:27] dmask:0x7  ; F0800700 00C70800
>	v_mad_f32 v7, -v15, v7, v7                                  ; D2820007 241E0F0F
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v14                    ; 0E001CFF 40A00000
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_max_f32_e32 v15, 0, v15                                   ; 201E1E80
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_mul_f32_e32 v0, v15, v0                                   ; 1000010F
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v6, s4                                        ; 7E0C0204
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_add_f32_e32 v6, 0x3a83126f, v6                            ; 060C0CFF 3A83126F
>	v_mul_f32_e32 v5, v22, v0                                   ; 100A0116
>	v_mul_f32_e32 v1, v22, v1                                   ; 10020316
>	v_mul_f32_e32 v4, v22, v4                                   ; 10080916
>	v_rcp_f32_e32 v6, v6                                        ; 7E0C5506
>	v_mul_f32_e32 v11, v24, v11                                 ; 10161718
>	v_mac_f32_e32 v1, v8, v16                                   ; 3E022108
>	v_mov_b32_e32 v0, 0x42000000                                ; 7E0002FF 42000000
>	v_mac_f32_e32 v4, v9, v17                                   ; 3E082309
>	v_mac_f32_e32 v5, v10, v18                                  ; 3E0A250A
>	v_mac_f32_e32 v1, v0, v25                                   ; 3E023300
>	v_mac_f32_e32 v4, v0, v27                                   ; 3E083700
>	v_mac_f32_e32 v5, v0, v11                                   ; 3E0A1700
>	v_subrev_f32_e32 v0, s4, v12                                ; 0A001804
>	v_max_f32_e32 v0, 0, v0                                     ; 20000080
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s7                                      ; 7E0C4807
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1216 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4].x, GENERIC[4], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SVIEW[0], CUBE, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], 2D, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL CONST[0..3]
>DCL TEMP[0..9], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    6.0000,     4.0000,     5.0000,     0.0000}
>IMM[2] FLT32 {    0.0010,     8.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwzz
>  3: MOV TEMP[1].z, IN[4].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[4], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[3], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[2].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
> 23: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, IMM[0].xxxx, TEMP[4].xyzz
> 26: ADD TEMP[4].xyz, TEMP[2].xyzz, -TEMP[4].xyzz
> 27: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 28: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].wwww
> 29: DP3 TEMP[1].x, TEMP[2].xyzz, TEMP[1].xyzz
> 30: ADD TEMP[1].x, IMM[0].wwww, -TEMP[1].xxxx
> 31: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 32: ADD TEMP[1].x, TEMP[4].xxxx, -TEMP[1].xxxx
> 33: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 34: ADD TEMP[1].x, IMM[0].wwww, -TEMP[1].xxxx
> 35: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 36: MUL TEMP[1].x, TEMP[3].yyyy, TEMP[1].xxxx
> 37: MOV TEMP[4].xyz, TEMP[0].xyzz
> 38: TEX TEMP[4], TEMP[4], SAMP[0], CUBE
> 39: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[2].xyzz
> 40: MUL TEMP[5].xyz, TEMP[5].xxxx, TEMP[0].xyzz
> 41: MAD TEMP[5].xyz, IMM[0].xxxx, TEMP[5].xyzz, -TEMP[2].xyzz
> 42: ADD TEMP[6].x, IMM[0].wwww, -TEMP[3].zzzz
> 43: MUL TEMP[6].x, TEMP[6].xxxx, IMM[1].xxxx
> 44: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[4].wwww
> 45: MUL TEMP[7].x, IMM[1].yyyy, TEMP[3].yyyy
> 46: DP3 TEMP[8].x, -CONST[1].xyzz, TEMP[0].xyzz
> 47: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 48: MUL TEMP[9].xyz, CONST[3].xyzz, TEMP[3].yyyy
> 49: MUL TEMP[8].xyz, TEMP[8].xxxx, TEMP[9].xyzz
> 50: MAD TEMP[4].xyz, TEMP[4].xyzz, TEMP[7].xxxx, TEMP[8].xyzz
> 51: MOV TEMP[7].xy, IN[1].xyyy
> 52: TEX TEMP[7].xyz, TEMP[7], SAMP[2], 2D
> 53: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
> 54: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 55: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
> 56: POW TEMP[0].x, TEMP[0].xxxx, IMM[1].zzzz
> 57: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[1].wwww
> 58: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
> 59: MOV TEMP[2].xyz, TEMP[5].xyzz
> 60: MOV TEMP[2].w, TEMP[6].xxxx
> 61: TXL TEMP[2].xyz, TEMP[2], SAMP[1], CUBE
> 62: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
> 63: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 64: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[7].xyzz, TEMP[0].xyzz
> 65: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
> 66: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].wwww
> 67: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
> 68: ADD TEMP[2].x, TEMP[2].xxxx, IMM[2].xxxx
> 69: RCP TEMP[2].x, TEMP[2].xxxx
> 70: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 71: FRC TEMP[2].x, CONST[1].wwww
> 72: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].yyyy
> 73: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 74: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 75: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
> 76: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
> 77: MOV TEMP[0].w, IN[0].wwww
> 78: MOV OUT[0], TEMP[0]
> 79: END
>radeonsi: Compiling shader 99
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 19, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 15, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fmul float %132, 2.000000e+00
>  %136 = fmul float %133, 2.000000e+00
>  %137 = fsub float %49, %134
>  %138 = fsub float %50, %135
>  %139 = fsub float %51, %136
>  %140 = fmul float %137, %59
>  %141 = fmul float %138, %60
>  %142 = fadd float %141, %140
>  %143 = fmul float %139, %61
>  %144 = fadd float %142, %143
>  %145 = fadd float %144, 1.000000e+00
>  %146 = fmul float %49, %59
>  %147 = fmul float %50, %60
>  %148 = fadd float %147, %146
>  %149 = fmul float %51, %61
>  %150 = fadd float %148, %149
>  %151 = fsub float 1.000000e+00, %150
>  %152 = call float @llvm.AMDGPU.clamp.(float %151, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float %145, %152
>  %154 = call float @llvm.AMDGPU.clamp.(float %153, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = fmul float %155, %155
>  %157 = fmul float %78, %156
>  %158 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %159 = load <8 x i32>, <8 x i32> addrspace(2)* %158, align 32, !invariant.load !0
>  %160 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %161 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %160, i64 0, i64 3, !amdgpu.uniform !0
>  %162 = load <4 x i32>, <4 x i32> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = extractelement <8 x i32> %159, i32 7
>  %164 = extractelement <4 x i32> %162, i32 0
>  %165 = and i32 %164, %163
>  %166 = insertelement <4 x i32> %162, i32 %165, i32 0
>  %167 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %168 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %169 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %170 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %171 = call float @llvm.fabs.f32(float %169)
>  %172 = fdiv float 1.000000e+00, %171, !fpmath !1
>  %173 = fmul float %167, %172
>  %174 = fadd float %173, 1.500000e+00
>  %175 = fmul float %168, %172
>  %176 = fadd float %175, 1.500000e+00
>  %177 = bitcast float %176 to i32
>  %178 = bitcast float %174 to i32
>  %179 = bitcast float %170 to i32
>  %180 = insertelement <4 x i32> undef, i32 %177, i32 0
>  %181 = insertelement <4 x i32> %180, i32 %178, i32 1
>  %182 = insertelement <4 x i32> %181, i32 %179, i32 2
>  %183 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %182, <8 x i32> %159, <4 x i32> %166, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %184 = extractelement <4 x float> %183, i32 0
>  %185 = extractelement <4 x float> %183, i32 1
>  %186 = extractelement <4 x float> %183, i32 2
>  %187 = extractelement <4 x float> %183, i32 3
>  %188 = fmul float %121, %49
>  %189 = fmul float %123, %50
>  %190 = fadd float %189, %188
>  %191 = fmul float %125, %51
>  %192 = fadd float %190, %191
>  %193 = fmul float %192, %121
>  %194 = fmul float %192, %123
>  %195 = fmul float %192, %125
>  %196 = fmul float %193, 2.000000e+00
>  %197 = fsub float %196, %49
>  %198 = fmul float %194, 2.000000e+00
>  %199 = fsub float %198, %50
>  %200 = fmul float %195, 2.000000e+00
>  %201 = fsub float %200, %51
>  %202 = fsub float 1.000000e+00, %79
>  %203 = fmul float %202, 6.000000e+00
>  %204 = fmul float %184, %187
>  %205 = fmul float %185, %187
>  %206 = fmul float %186, %187
>  %207 = fmul float %78, 4.000000e+00
>  %208 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %209 = load <16 x i8>, <16 x i8> addrspace(2)* %208, align 16, !invariant.load !0
>  %210 = call float @llvm.SI.load.const(<16 x i8> %209, i32 16)
>  %211 = call float @llvm.SI.load.const(<16 x i8> %209, i32 20)
>  %212 = call float @llvm.SI.load.const(<16 x i8> %209, i32 24)
>  %213 = fmul float %210, %121
>  %214 = fsub float -0.000000e+00, %213
>  %215 = fmul float %211, %123
>  %216 = fsub float %214, %215
>  %217 = fmul float %212, %125
>  %218 = fsub float %216, %217
>  %219 = call float @llvm.AMDGPU.clamp.(float %218, float 0.000000e+00, float 1.000000e+00)
>  %220 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %221 = load <16 x i8>, <16 x i8> addrspace(2)* %220, align 16, !invariant.load !0
>  %222 = call float @llvm.SI.load.const(<16 x i8> %221, i32 48)
>  %223 = fmul float %222, %78
>  %224 = call float @llvm.SI.load.const(<16 x i8> %221, i32 52)
>  %225 = fmul float %224, %78
>  %226 = call float @llvm.SI.load.const(<16 x i8> %221, i32 56)
>  %227 = fmul float %226, %78
>  %228 = fmul float %219, %223
>  %229 = fmul float %219, %225
>  %230 = fmul float %219, %227
>  %231 = fmul float %204, %207
>  %232 = fadd float %231, %228
>  %233 = fmul float %205, %207
>  %234 = fadd float %233, %229
>  %235 = fmul float %206, %207
>  %236 = fadd float %235, %230
>  %237 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %238 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %239 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %240 = load <8 x i32>, <8 x i32> addrspace(2)* %239, align 32, !invariant.load !0
>  %241 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %242 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %241, i64 0, i64 11, !amdgpu.uniform !0
>  %243 = load <4 x i32>, <4 x i32> addrspace(2)* %242, align 16, !invariant.load !0
>  %244 = extractelement <8 x i32> %240, i32 7
>  %245 = extractelement <4 x i32> %243, i32 0
>  %246 = and i32 %245, %244
>  %247 = insertelement <4 x i32> %243, i32 %246, i32 0
>  %248 = bitcast float %237 to i32
>  %249 = bitcast float %238 to i32
>  %250 = insertelement <2 x i32> undef, i32 %248, i32 0
>  %251 = insertelement <2 x i32> %250, i32 %249, i32 1
>  %252 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %251, <8 x i32> %240, <4 x i32> %247, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %253 = extractelement <4 x float> %252, i32 0
>  %254 = extractelement <4 x float> %252, i32 1
>  %255 = extractelement <4 x float> %252, i32 2
>  %256 = fmul float %49, %121
>  %257 = fmul float %50, %123
>  %258 = fadd float %257, %256
>  %259 = fmul float %51, %125
>  %260 = fadd float %258, %259
>  %261 = call float @llvm.AMDGPU.clamp.(float %260, float 0.000000e+00, float 1.000000e+00)
>  %262 = fsub float 1.000000e+00, %261
>  %263 = call float @llvm.pow.f32(float %262, float 5.000000e+00)
>  %264 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %265 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %266 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %267 = fmul float %263, %264
>  %268 = fmul float %263, %265
>  %269 = fmul float %263, %266
>  %270 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %271 = load <8 x i32>, <8 x i32> addrspace(2)* %270, align 32, !invariant.load !0
>  %272 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %273 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %272, i64 0, i64 7, !amdgpu.uniform !0
>  %274 = load <4 x i32>, <4 x i32> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = extractelement <8 x i32> %271, i32 7
>  %276 = extractelement <4 x i32> %274, i32 0
>  %277 = and i32 %276, %275
>  %278 = insertelement <4 x i32> %274, i32 %277, i32 0
>  %279 = call float @llvm.amdgcn.cubetc(float %197, float %199, float %201)
>  %280 = call float @llvm.amdgcn.cubesc(float %197, float %199, float %201)
>  %281 = call float @llvm.amdgcn.cubema(float %197, float %199, float %201)
>  %282 = call float @llvm.amdgcn.cubeid(float %197, float %199, float %201)
>  %283 = call float @llvm.fabs.f32(float %281)
>  %284 = fdiv float 1.000000e+00, %283, !fpmath !1
>  %285 = fmul float %279, %284
>  %286 = fadd float %285, 1.500000e+00
>  %287 = fmul float %280, %284
>  %288 = fadd float %287, 1.500000e+00
>  %289 = bitcast float %288 to i32
>  %290 = bitcast float %286 to i32
>  %291 = bitcast float %282 to i32
>  %292 = bitcast float %203 to i32
>  %293 = insertelement <4 x i32> undef, i32 %289, i32 0
>  %294 = insertelement <4 x i32> %293, i32 %290, i32 1
>  %295 = insertelement <4 x i32> %294, i32 %291, i32 2
>  %296 = insertelement <4 x i32> %295, i32 %292, i32 3
>  %297 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %296, <8 x i32> %271, <4 x i32> %278, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %298 = extractelement <4 x float> %297, i32 0
>  %299 = extractelement <4 x float> %297, i32 1
>  %300 = extractelement <4 x float> %297, i32 2
>  %301 = fmul float %267, %298
>  %302 = fmul float %268, %299
>  %303 = fmul float %269, %300
>  %304 = fmul float %301, %157
>  %305 = fmul float %302, %157
>  %306 = fmul float %303, %157
>  %307 = fmul float %232, %253
>  %308 = fadd float %307, %304
>  %309 = fmul float %234, %254
>  %310 = fadd float %309, %305
>  %311 = fmul float %236, %255
>  %312 = fadd float %311, %306
>  %313 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = call float @llvm.SI.load.const(<16 x i8> %315, i32 12)
>  %317 = fsub float %313, %316
>  %318 = call float @llvm.maxnum.f32(float %317, float 0.000000e+00)
>  %319 = call float @llvm.SI.load.const(<16 x i8> %315, i32 28)
>  %320 = call float @llvm.SI.load.const(<16 x i8> %315, i32 12)
>  %321 = fsub float %319, %320
>  %322 = fadd float %321, 0x3F50624DE0000000
>  %323 = fdiv float 1.000000e+00, %322, !fpmath !1
>  %324 = fmul float %318, %323
>  %325 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %326 = load <16 x i8>, <16 x i8> addrspace(2)* %325, align 16, !invariant.load !0
>  %327 = call float @llvm.SI.load.const(<16 x i8> %326, i32 28)
>  %328 = call float @llvm.floor.f32(float %327)
>  %329 = fsub float %327, %328
>  %330 = fmul float %329, 8.000000e+00
>  %331 = call float @llvm.pow.f32(float %324, float %330)
>  %332 = call float @llvm.AMDGPU.clamp.(float %331, float 0.000000e+00, float 1.000000e+00)
>  %333 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %334 = fmul float %333, %332
>  %335 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %336 = load <16 x i8>, <16 x i8> addrspace(2)* %335, align 16, !invariant.load !0
>  %337 = call float @llvm.SI.load.const(<16 x i8> %336, i32 32)
>  %338 = fsub float 1.000000e+00, %334
>  %339 = fmul float %308, %334
>  %340 = fmul float %337, %338
>  %341 = fadd float %339, %340
>  %342 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %343 = load <16 x i8>, <16 x i8> addrspace(2)* %342, align 16, !invariant.load !0
>  %344 = call float @llvm.SI.load.const(<16 x i8> %343, i32 36)
>  %345 = fsub float 1.000000e+00, %334
>  %346 = fmul float %310, %334
>  %347 = fmul float %344, %345
>  %348 = fadd float %346, %347
>  %349 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %350 = load <16 x i8>, <16 x i8> addrspace(2)* %349, align 16, !invariant.load !0
>  %351 = call float @llvm.SI.load.const(<16 x i8> %350, i32 40)
>  %352 = fsub float 1.000000e+00, %334
>  %353 = fmul float %312, %334
>  %354 = fmul float %351, %352
>  %355 = fadd float %353, %354
>  %356 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %357 = bitcast float %5 to i32
>  %358 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %357, 10
>  %359 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %358, float %341, 11
>  %360 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %359, float %348, 12
>  %361 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %360, float %355, 13
>  %362 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %361, float %356, 14
>  %363 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %362, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %363
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[12:15], v5, s[12:15], 0 idxen ; E00C2000 80030C05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen   ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	buffer_load_format_xyzw v[15:18], v7, s[8:11], 0 idxen  ; E00C2000 80020F07
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	s_buffer_load_dword s20, s[0:3], 0x13                   ; C20A0113
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s0, s[0:3], 0x16                    ; C2000116
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v1, s7, v8                                ; 10021007
>	v_mac_f32_e32 v1, s11, v9                               ; 3E02120B
>	v_mac_f32_e32 v1, s15, v10                              ; 3E02140F
>	v_mac_f32_e32 v1, s19, v11                              ; 3E021613
>	v_mul_f32_e32 v7, s20, v1                               ; 100E0214
>	v_mul_f32_e32 v0, s4, v8                                ; 10001004
>	exp 15, 32, 0, 0, 0, v8, v9, v10, v7                    ; F800020F 070A0908
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v7, s5, v8                                ; 100E1005
>	v_mul_f32_e32 v8, s6, v8                                ; 10101006
>	v_mac_f32_e32 v0, s8, v9                                ; 3E001208
>	v_mac_f32_e32 v7, s9, v9                                ; 3E0E1209
>	v_mac_f32_e32 v8, s10, v9                               ; 3E10120A
>	v_mac_f32_e32 v0, s12, v10                              ; 3E00140C
>	v_mac_f32_e32 v7, s13, v10                              ; 3E0E140D
>	v_mac_f32_e32 v8, s14, v10                              ; 3E10140E
>	v_mad_f32 v10, 2.0, v12, -1.0                           ; D282000A 03CE18F4
>	v_mac_f32_e32 v0, s16, v11                              ; 3E001610
>	v_mac_f32_e32 v7, s17, v11                              ; 3E0E1611
>	v_mac_f32_e32 v8, s18, v11                              ; 3E101612
>	v_mad_f32 v11, 2.0, v13, -1.0                           ; D282000B 03CE1AF4
>	v_mad_f32 v12, 2.0, v14, -1.0                           ; D282000C 03CE1CF4
>	v_mad_f32 v13, 0, v11, v10                              ; D282000D 042A1680
>	v_mad_f32 v14, 0, v10, v11                              ; D282000E 042E1480
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mad_f32 v3, 2.0, v3, -1.0                             ; D2820003 03CE06F4
>	v_mad_f32 v4, 2.0, v4, -1.0                             ; D2820004 03CE08F4
>	v_mad_f32 v5, 2.0, v5, -1.0                             ; D2820005 03CE0AF4
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mad_f32 v17, 0, v4, v3                                ; D2820011 040E0880
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_mac_f32_e32 v14, 0, v12                               ; 3E1C1880
>	v_mac_f32_e32 v12, 0, v11                               ; 3E181680
>	v_mad_f32 v11, 0, v3, v4                                ; D282000B 04120680
>	v_mac_f32_e32 v17, 0, v5                                ; 3E220A80
>	v_mac_f32_e32 v11, 0, v5                                ; 3E160A80
>	v_mac_f32_e32 v5, 0, v4                                 ; 3E0A0880
>	v_mac_f32_e32 v12, 0, v10                               ; 3E181480
>	v_mac_f32_e32 v5, 0, v3                                 ; 3E0A0680
>	v_mul_f32_e32 v4, v11, v12                              ; 1008190B
>	v_mul_f32_e32 v3, v17, v14                              ; 10061D11
>	v_mul_f32_e32 v10, v5, v13                              ; 10141B05
>	v_sub_f32_e64 v9, 1.0, s0                               ; D2080009 000000F2
>	v_add_f32_e32 v6, v6, v6                                ; 060C0D06
>	v_mad_f32 v4, v14, v5, -v4                              ; D2820004 84120B0E
>	v_mad_f32 v3, v13, v11, -v3                             ; D2820003 840E170D
>	v_mad_f32 v10, v12, v17, -v10                           ; D282000A 842A230C
>	v_mad_f32 v4, v6, v4, -v4                               ; D2820004 84120906
>	exp 15, 33, 0, 0, 0, v15, v16, v9, v0                   ; F800021F 0009100F
>	v_mad_f32 v3, v6, v3, -v3                               ; D2820003 840E0706
>	v_mad_f32 v6, v6, v10, -v10                             ; D2820006 842A1506
>	exp 15, 34, 0, 0, 0, v17, v11, v5, v4                   ; F800022F 04050B11
>	exp 15, 35, 0, 0, 0, v6, v3, v13, v14                   ; F800023F 0E0D0306
>	exp 15, 36, 0, 0, 0, v12, v0, v0, v0                    ; F800024F 0000000C
>	exp 15, 12, 0, 1, 0, v0, v7, v8, v1                     ; F80008CF 01080700
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 472 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v8, v4, 3, 2, [m0]                          ; C8200B04
>	v_interp_p2_f32 v8, [v8], v5, 3, 2, [m0]                    ; C8210B05
>	v_interp_p1_f32 v11, v4, 0, 3, [m0]                         ; C82C0C04
>	v_interp_p2_f32 v11, [v11], v5, 0, 3, [m0]                  ; C82D0C05
>	v_interp_p1_f32 v12, v4, 1, 3, [m0]                         ; C8300D04
>	v_interp_p2_f32 v12, [v12], v5, 1, 3, [m0]                  ; C8310D05
>	v_interp_p1_f32 v0, v4, 2, 3, [m0]                          ; C8000E04
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 3, [m0]                    ; C8010E05
>	v_interp_p1_f32 v1, v4, 3, 3, [m0]                          ; C8040F04
>	v_interp_p2_f32 v1, [v1], v5, 3, 3, [m0]                    ; C8050F05
>	v_interp_p1_f32 v6, v4, 0, 4, [m0]                          ; C8181004
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 4, [m0]                    ; C8191005
>	v_interp_p1_f32 v7, v2, 0, 0, [m0]                          ; C81C0002
>	v_interp_p2_f32 v7, [v7], v3, 0, 0, [m0]                    ; C81D0003
>	v_interp_p1_f32 v15, v2, 1, 0, [m0]                         ; C83C0102
>	v_interp_p2_f32 v15, [v15], v3, 1, 0, [m0]                  ; C83D0103
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v14, s8, v7                                   ; 081C0E08
>	v_interp_p1_f32 v7, v2, 2, 0, [m0]                          ; C81C0202
>	v_interp_p2_f32 v7, [v7], v3, 2, 0, [m0]                    ; C81D0203
>	v_sub_f32_e32 v17, s11, v7                                  ; 08220E0B
>	v_sub_f32_e32 v16, s9, v15                                  ; 08201E09
>	v_mul_f32_e32 v7, v14, v14                                  ; 100E1D0E
>	v_mac_f32_e32 v7, v16, v16                                  ; 3E0E2110
>	v_mac_f32_e32 v7, v17, v17                                  ; 3E0E2311
>	v_rsq_f32_e32 v18, v7                                       ; 7E245D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	s_load_dwordx4 s[48:51], s[4:5], 0x4c                       ; C098054C
>	s_load_dwordx8 s[40:47], s[4:5], 0x40                       ; C0D40540
>	v_mul_f32_e32 v19, v18, v14                                 ; 10261D12
>	v_mul_f32_e32 v22, v7, v0                                   ; 102C0107
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_mul_f32_e32 v23, v7, v1                                   ; 102E0307
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s48, s48, s47                                     ; 87302F30
>	image_sample v[9:10], v[0:1], s[40:47], s[48:51] dmask:0x6  ; F0800600 018A0900
>	s_load_dwordx4 s[48:51], s[4:5], 0x3c                       ; C098053C
>	s_load_dwordx8 s[40:47], s[4:5], 0x30                       ; C0D40530
>	v_mul_f32_e32 v24, v7, v6                                   ; 10300D07
>	v_mul_f32_e32 v20, v18, v16                                 ; 10282112
>	v_mul_f32_e32 v6, v22, v19                                  ; 100C2716
>	v_mul_f32_e32 v21, v18, v17                                 ; 102A2312
>	v_mac_f32_e32 v6, v23, v20                                  ; 3E0C2917
>	v_mac_f32_e32 v6, v24, v21                                  ; 3E0C2B18
>	v_sub_f32_e32 v6, 1.0, v6                                   ; 080C0CF2
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s48, s48, s47                                     ; 87302F30
>	v_add_f32_e64 v25, v6, 0 clamp                              ; D2060819 00010106
>	image_sample v[6:7], v[0:1], s[40:47], s[48:51] dmask:0xa   ; F0800A00 018A0600
>	v_interp_p1_f32 v28, v4, 0, 2, [m0]                         ; C8700804
>	v_interp_p2_f32 v28, [v28], v5, 0, 2, [m0]                  ; C8710805
>	v_interp_p1_f32 v29, v4, 1, 2, [m0]                         ; C8740904
>	v_interp_p2_f32 v29, [v29], v5, 1, 2, [m0]                  ; C8750905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                          ; C8100A04
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_add_f32_e32 v26, v7, v7                                   ; 06340F07
>	v_add_f32_e32 v27, v6, v6                                   ; 06360D06
>	v_mad_f32 v6, 2.0, v6, -1.0                                 ; D2820006 03CE0CF4
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                    ; C8110A05
>	v_mad_f32 v28, v26, v28, -v28                               ; D282001C 8472391A
>	v_mad_f32 v29, v26, v29, -v29                               ; D282001D 84763B1A
>	v_mad_f32 v26, v26, v4, -v4                                 ; D282001A 8412091A
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v4, v27, v6, -v6                                  ; D2820004 841A0D1B
>	v_mac_f32_e32 v4, v7, v7                                    ; 3E080F07
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v28, v6, v8                                   ; 3E381106
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v29, v6, v11                                  ; 3E3A1706
>	v_mac_f32_e32 v28, v4, v22                                  ; 3E382D04
>	v_mac_f32_e32 v26, v6, v12                                  ; 3E341906
>	v_mac_f32_e32 v29, v4, v23                                  ; 3E3A2F04
>	v_mul_f32_e32 v11, v19, v28                                 ; 10163913
>	v_mac_f32_e32 v26, v4, v24                                  ; 3E343104
>	v_mac_f32_e32 v11, v20, v29                                 ; 3E163B14
>	v_mac_f32_e32 v11, v21, v26                                 ; 3E163515
>	v_mul_f32_e32 v8, v28, v11                                  ; 1010171C
>	v_mul_f32_e32 v12, v29, v11                                 ; 1018171D
>	v_mac_f32_e32 v8, v28, v11                                  ; 3E10171C
>	v_mul_f32_e32 v19, v26, v11                                 ; 1026171A
>	v_mad_f32 v4, v14, v18, -v8                                 ; D2820004 8422250E
>	v_mac_f32_e32 v12, v29, v11                                 ; 3E18171D
>	v_mul_f32_e32 v7, v22, v4                                   ; 100E0916
>	v_mad_f32 v4, v16, v18, -v12                                ; D2820004 84322510
>	v_mac_f32_e32 v19, v26, v11                                 ; 3E26171A
>	v_mac_f32_e32 v7, v23, v4                                   ; 3E0E0917
>	v_mad_f32 v4, v17, v18, -v19                                ; D2820004 844E2511
>	v_mac_f32_e32 v7, v24, v4                                   ; 3E0E0918
>	v_cubema_f32 v4, v28, v29, v26                              ; D28E0004 046A3B1C
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_add_f32_e32 v7, 1.0, v7                                   ; 060E0EF2
>	s_load_dwordx8 s[28:35], s[4:5], 0x0                        ; C0CE0500
>	s_load_dwordx4 s[36:39], s[4:5], 0xc                        ; C092050C
>	v_subrev_f32_e32 v7, v25, v7                                ; 0A0E0F19
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                       ; C0C60510
>	s_load_dwordx4 s[20:23], s[4:5], 0x1c                       ; C08A051C
>	s_load_dwordx4 s[24:27], s[4:5], 0x2c                       ; C08C052C
>	s_load_dwordx8 s[40:47], s[4:5], 0x20                       ; C0D40520
>	v_cubetc_f32 v6, v28, v29, v26                              ; D28C0006 046A3B1C
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v20, v28, v29, v26                             ; D28A0014 046A3B1C
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v20, v4                                   ; D2820005 04122905
>	v_sub_f32_e32 v20, 1.0, v7                                  ; 08280EF2
>	v_mad_f32 v7, -v7, v20, v20                                 ; D2820007 24522907
>	v_mul_f32_e32 v20, v7, v9                                   ; 10281307
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s35                                     ; 87242324
>	v_cubeid_f32 v7, v28, v29, v26                              ; D2880007 046A3B1C
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	s_buffer_load_dword s4, s[0:3], 0x4                         ; C2020104
>	s_buffer_load_dword s5, s[0:3], 0x5                         ; C2028105
>	s_buffer_load_dword s6, s[0:3], 0x6                         ; C2030106
>	v_mad_f32 v14, -v14, v18, v8                                ; D282000E 2422250E
>	image_sample v[5:8], v[5:8], s[28:35], s[36:39] dmask:0xf   ; F0800F00 01270505
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v8, v5                                    ; 100A0B08
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	v_mad_f32 v8, -v16, v18, v12                                ; D2820008 24322510
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v16, s4, v28                                  ; 10203804
>	v_mad_f32 v16, -s5, v29, -v16                               ; D2820010 A4423A05
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	v_mad_f32 v16, -s6, v26, v16                                ; D2820010 24423406
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	v_mad_f32 v12, -v17, v18, v19                               ; D282000C 244E2511
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v17, s4, v9                                   ; 10221204
>	v_add_f32_e64 v16, v16, 0 clamp                             ; D2060810 00010110
>	v_mul_f32_e32 v18, s5, v9                                   ; 10241205
>	v_mul_f32_e32 v19, s6, v9                                   ; 10261206
>	v_mul_f32_e32 v17, v17, v16                                 ; 10222111
>	v_mul_f32_e32 v18, v18, v16                                 ; 10242112
>	v_mul_f32_e32 v9, 4.0, v9                                   ; 101212F6
>	v_mul_f32_e32 v16, v19, v16                                 ; 10202113
>	v_mac_f32_e32 v17, v9, v5                                   ; 3E220B09
>	v_mac_f32_e32 v18, v9, v6                                   ; 3E240D09
>	v_cubeid_f32 v6, v14, v8, v12                               ; D2880006 0432110E
>	v_cubetc_f32 v5, v14, v8, v12                               ; D28C0005 0432110E
>	v_cubesc_f32 v19, v14, v8, v12                              ; D28A0013 0432110E
>	v_cubema_f32 v12, v14, v8, v12                              ; D28E000C 0432110E
>	v_add_f32_e64 v8, v11, 0 clamp                              ; D2060808 0001010B
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mac_f32_e32 v16, v9, v7                                   ; 3E200F09
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_log_f32_e32 v11, v8                                       ; 7E164F08
>	s_and_b32 s24, s24, s47                                     ; 87182F18
>	v_mad_f32 v7, -v10, v7, v7                                  ; D2820007 241E0F0A
>	v_max_f32_e32 v14, 0, v10                                   ; 201C1480
>	image_sample v[8:10], v[0:1], s[40:47], s[24:27] dmask:0x7  ; F0800700 00CA0800
>	v_rcp_f32_e64 v1, |v12|                                     ; D3540101 0000010C
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v11                    ; 0E0016FF 40A00000
>	s_buffer_load_dword s7, s[0:3], 0x7                         ; C2038107
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_mac_f32_e32 v4, v1, v19                                   ; 3E082701
>	v_mul_f32_e32 v0, v14, v0                                   ; 1000010E
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v20, v0                                   ; 100A0114
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s7, v0                                    ; 08000007
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v15                                ; 0A0C1E04
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s7                                      ; 7E0C4807
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v1, v20, v1                                   ; 10020314
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v20, v4                                   ; 10080914
>	v_mac_f32_e32 v1, v8, v17                                   ; 3E022308
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v18                                   ; 3E082509
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v16                                  ; 3E0A210A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1124 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1].xy, GENERIC[0]
>DCL OUT[2].xyz, GENERIC[1]
>DCL CONST[0..6]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {   -0.5000,     6.2830,     0.5000,     0.0000}
>  0: ADD TEMP[0].xy, IN[2].xyyy, IMM[0].xxxx
>  1: MUL TEMP[1].x, CONST[4].yyyy, CONST[5].xxxx
>  2: MUL TEMP[1].x, IMM[0].yyyy, TEMP[1].xxxx
>  3: SIN TEMP[2].x, TEMP[1].xxxx
>  4: COS TEMP[1].x, TEMP[1].xxxx
>  5: MUL TEMP[3].x, TEMP[0].yyyy, TEMP[2].xxxx
>  6: MAD TEMP[3].x, TEMP[0].xxxx, TEMP[1].xxxx, -TEMP[3].xxxx
>  7: MUL TEMP[2].x, TEMP[0].xxxx, TEMP[2].xxxx
>  8: MAD TEMP[0].x, TEMP[0].yyyy, TEMP[1].xxxx, TEMP[2].xxxx
>  9: MOV TEMP[3].y, TEMP[0].xxxx
> 10: ADD TEMP[0].xy, TEMP[3].xyyy, IMM[0].zzzz
> 11: MAD TEMP[3].x, CONST[4].yyyy, CONST[5].yyyy, TEMP[0].xxxx
> 12: MAD TEMP[0].x, CONST[4].yyyy, CONST[6].xxxx, TEMP[0].yyyy
> 13: MOV TEMP[3].y, TEMP[0].xxxx
> 14: MUL TEMP[0], CONST[0], IN[0].xxxx
> 15: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
> 16: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
> 17: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
> 18: MOV OUT[0], TEMP[0]
> 19: MOV OUT[1].xy, TEMP[3].xyxx
> 20: MOV OUT[2].xyz, IN[1].xyzx
> 21: END
>radeonsi: Compiling shader 100
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 0
>  %28 = extractelement <4 x float> %26, i32 1
>  %29 = extractelement <4 x float> %26, i32 2
>  %30 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %31 = load <16 x i8>, <16 x i8> addrspace(2)* %30, align 16, !invariant.load !0
>  %32 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %31, i32 0, i32 %16)
>  %33 = extractelement <4 x float> %32, i32 0
>  %34 = extractelement <4 x float> %32, i32 1
>  %35 = fadd float %33, -5.000000e-01
>  %36 = fadd float %34, -5.000000e-01
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 68)
>  %40 = call float @llvm.SI.load.const(<16 x i8> %38, i32 80)
>  %41 = fmul float %39, %40
>  %42 = fmul float %41, 0x401921CAC0000000
>  %43 = call float @llvm.sin.f32(float %42)
>  %44 = call float @llvm.cos.f32(float %42)
>  %45 = fmul float %36, %43
>  %46 = fmul float %35, %44
>  %47 = fsub float %46, %45
>  %48 = fmul float %35, %43
>  %49 = fmul float %36, %44
>  %50 = fadd float %49, %48
>  %51 = fadd float %47, 5.000000e-01
>  %52 = fadd float %50, 5.000000e-01
>  %53 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %54 = load <16 x i8>, <16 x i8> addrspace(2)* %53, align 16, !invariant.load !0
>  %55 = call float @llvm.SI.load.const(<16 x i8> %54, i32 68)
>  %56 = call float @llvm.SI.load.const(<16 x i8> %54, i32 84)
>  %57 = fmul float %55, %56
>  %58 = fadd float %57, %51
>  %59 = call float @llvm.SI.load.const(<16 x i8> %54, i32 68)
>  %60 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %61 = load <16 x i8>, <16 x i8> addrspace(2)* %60, align 16, !invariant.load !0
>  %62 = call float @llvm.SI.load.const(<16 x i8> %61, i32 96)
>  %63 = fmul float %59, %62
>  %64 = fadd float %63, %52
>  %65 = call float @llvm.SI.load.const(<16 x i8> %61, i32 0)
>  %66 = fmul float %65, %20
>  %67 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %68 = load <16 x i8>, <16 x i8> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = call float @llvm.SI.load.const(<16 x i8> %68, i32 4)
>  %70 = fmul float %69, %20
>  %71 = call float @llvm.SI.load.const(<16 x i8> %68, i32 8)
>  %72 = fmul float %71, %20
>  %73 = call float @llvm.SI.load.const(<16 x i8> %68, i32 12)
>  %74 = fmul float %73, %20
>  %75 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %76 = load <16 x i8>, <16 x i8> addrspace(2)* %75, align 16, !invariant.load !0
>  %77 = call float @llvm.SI.load.const(<16 x i8> %76, i32 16)
>  %78 = fmul float %77, %21
>  %79 = fadd float %78, %66
>  %80 = call float @llvm.SI.load.const(<16 x i8> %76, i32 20)
>  %81 = fmul float %80, %21
>  %82 = fadd float %81, %70
>  %83 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %84 = load <16 x i8>, <16 x i8> addrspace(2)* %83, align 16, !invariant.load !0
>  %85 = call float @llvm.SI.load.const(<16 x i8> %84, i32 24)
>  %86 = fmul float %85, %21
>  %87 = fadd float %86, %72
>  %88 = call float @llvm.SI.load.const(<16 x i8> %84, i32 28)
>  %89 = fmul float %88, %21
>  %90 = fadd float %89, %74
>  %91 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %92 = load <16 x i8>, <16 x i8> addrspace(2)* %91, align 16, !invariant.load !0
>  %93 = call float @llvm.SI.load.const(<16 x i8> %92, i32 32)
>  %94 = fmul float %93, %22
>  %95 = fadd float %94, %79
>  %96 = call float @llvm.SI.load.const(<16 x i8> %92, i32 36)
>  %97 = fmul float %96, %22
>  %98 = fadd float %97, %82
>  %99 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %100 = load <16 x i8>, <16 x i8> addrspace(2)* %99, align 16, !invariant.load !0
>  %101 = call float @llvm.SI.load.const(<16 x i8> %100, i32 40)
>  %102 = fmul float %101, %22
>  %103 = fadd float %102, %87
>  %104 = call float @llvm.SI.load.const(<16 x i8> %100, i32 44)
>  %105 = fmul float %104, %22
>  %106 = fadd float %105, %90
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 48)
>  %110 = fmul float %109, %23
>  %111 = fadd float %110, %95
>  %112 = call float @llvm.SI.load.const(<16 x i8> %108, i32 52)
>  %113 = fmul float %112, %23
>  %114 = fadd float %113, %98
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = call float @llvm.SI.load.const(<16 x i8> %116, i32 56)
>  %118 = fmul float %117, %23
>  %119 = fadd float %118, %103
>  %120 = call float @llvm.SI.load.const(<16 x i8> %116, i32 60)
>  %121 = fmul float %120, %23
>  %122 = fadd float %121, %106
>  %123 = bitcast i32 %12 to float
>  %124 = insertvalue <{ float, float, float }> undef, float %123, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %58, float %64, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %27, float %28, float %29, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %111, float %114, float %119, float %122)
>  ret <{ float, float, float }> %124
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0].xy, GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], CUBE, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[0..2]
>DCL CONST[5]
>DCL TEMP[0..4], LOCAL
>IMM[0] FLT32 {    0.3000,     0.5900,     0.1100,     0.5000}
>IMM[1] FLT32 {    8.0000,     4.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[1], 2D
>  2: DP3 TEMP[1].x, TEMP[0].xyzz, IMM[0].xyzz
>  3: POW TEMP[2].x, TEMP[1].xxxx, IMM[0].wwww
>  4: MUL TEMP[2].x, TEMP[2].xxxx, IMM[1].xxxx
>  5: MUL TEMP[1].xyz, TEMP[0].xyzz, TEMP[2].xxxx
>  6: DP3 TEMP[2].x, IN[1].xyzz, IN[1].xyzz
>  7: RSQ TEMP[2].x, TEMP[2].xxxx
>  8: MUL TEMP[2].xyz, IN[1].xyzz, TEMP[2].xxxx
>  9: MOV TEMP[3].xyz, TEMP[2].xyzz
> 10: TEX TEMP[3], TEMP[3], SAMP[0], CUBE
> 11: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[3].wwww
> 12: MUL TEMP[4].x, IMM[1].yyyy, CONST[2].wwww
> 13: DP3 TEMP[2].x, -CONST[0].xyzz, TEMP[2].xyzz
> 14: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 15: MUL TEMP[2].xyz, TEMP[2].xxxx, CONST[2].xyzz
> 16: MAD TEMP[2].xyz, TEMP[3].xyzz, TEMP[4].xxxx, TEMP[2].xyzz
> 17: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xyzz
> 18: LRP TEMP[1].xyz, CONST[5].zzzz, CONST[1].xyzz, TEMP[1].xyzz
> 19: MOV TEMP[1].xyz, TEMP[1].xyzx
> 20: MOV TEMP[1].w, TEMP[0].wwww
> 21: MOV OUT[0], TEMP[1]
> 22: END
>radeonsi: Compiling shader 101
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 7, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = fmul float %39, 0x3FD3333340000000
>  %44 = fmul float %40, 0x3FE2E147A0000000
>  %45 = fadd float %44, %43
>  %46 = fmul float %41, 0x3FBC28F5C0000000
>  %47 = fadd float %45, %46
>  %sqrtf = call float @sqrtf(float %47) #1
>  %fabsf = call float @fabsf(float %sqrtf) #1
>  %48 = fcmp oeq float %47, 0xFFF0000000000000
>  %fabsf.op = fmul float %fabsf, 8.000000e+00
>  %49 = select i1 %48, float 0x7FF0000000000000, float %fabsf.op
>  %50 = fmul float %39, %49
>  %51 = fmul float %40, %49
>  %52 = fmul float %41, %49
>  %53 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %9)
>  %54 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %9)
>  %55 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %9)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %9)
>  %57 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %9)
>  %58 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %9)
>  %59 = fmul float %53, %56
>  %60 = fmul float %54, %57
>  %61 = fadd float %60, %59
>  %62 = fmul float %55, %58
>  %63 = fadd float %61, %62
>  %64 = call float @llvm.sqrt.f32(float %63)
>  %65 = fdiv float 1.000000e+00, %64, !fpmath !1
>  %66 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %9)
>  %67 = fmul float %66, %65
>  %68 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %9)
>  %69 = fmul float %68, %65
>  %70 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %9)
>  %71 = fmul float %70, %65
>  %72 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %73 = load <8 x i32>, <8 x i32> addrspace(2)* %72, align 32, !invariant.load !0
>  %74 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %75 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %74, i64 0, i64 3, !amdgpu.uniform !0
>  %76 = load <4 x i32>, <4 x i32> addrspace(2)* %75, align 16, !invariant.load !0
>  %77 = extractelement <8 x i32> %73, i32 7
>  %78 = extractelement <4 x i32> %76, i32 0
>  %79 = and i32 %78, %77
>  %80 = insertelement <4 x i32> %76, i32 %79, i32 0
>  %81 = call float @llvm.amdgcn.cubetc(float %67, float %69, float %71)
>  %82 = call float @llvm.amdgcn.cubesc(float %67, float %69, float %71)
>  %83 = call float @llvm.amdgcn.cubema(float %67, float %69, float %71)
>  %84 = call float @llvm.amdgcn.cubeid(float %67, float %69, float %71)
>  %85 = call float @llvm.fabs.f32(float %83)
>  %86 = fdiv float 1.000000e+00, %85, !fpmath !1
>  %87 = fmul float %81, %86
>  %88 = fadd float %87, 1.500000e+00
>  %89 = fmul float %82, %86
>  %90 = fadd float %89, 1.500000e+00
>  %91 = bitcast float %90 to i32
>  %92 = bitcast float %88 to i32
>  %93 = bitcast float %84 to i32
>  %94 = insertelement <4 x i32> undef, i32 %91, i32 0
>  %95 = insertelement <4 x i32> %94, i32 %92, i32 1
>  %96 = insertelement <4 x i32> %95, i32 %93, i32 2
>  %97 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %96, <8 x i32> %73, <4 x i32> %80, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %98 = extractelement <4 x float> %97, i32 0
>  %99 = extractelement <4 x float> %97, i32 1
>  %100 = extractelement <4 x float> %97, i32 2
>  %101 = extractelement <4 x float> %97, i32 3
>  %102 = fmul float %98, %101
>  %103 = fmul float %99, %101
>  %104 = fmul float %100, %101
>  %105 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %106 = load <16 x i8>, <16 x i8> addrspace(2)* %105, align 16, !invariant.load !0
>  %107 = call float @llvm.SI.load.const(<16 x i8> %106, i32 44)
>  %108 = fmul float %107, 4.000000e+00
>  %109 = call float @llvm.SI.load.const(<16 x i8> %106, i32 0)
>  %110 = call float @llvm.SI.load.const(<16 x i8> %106, i32 4)
>  %111 = call float @llvm.SI.load.const(<16 x i8> %106, i32 8)
>  %112 = fmul float %109, %67
>  %113 = fsub float -0.000000e+00, %112
>  %114 = fmul float %110, %69
>  %115 = fsub float %113, %114
>  %116 = fmul float %111, %71
>  %117 = fsub float %115, %116
>  %118 = call float @llvm.AMDGPU.clamp.(float %117, float 0.000000e+00, float 1.000000e+00)
>  %119 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %120 = load <16 x i8>, <16 x i8> addrspace(2)* %119, align 16, !invariant.load !0
>  %121 = call float @llvm.SI.load.const(<16 x i8> %120, i32 32)
>  %122 = fmul float %118, %121
>  %123 = call float @llvm.SI.load.const(<16 x i8> %120, i32 36)
>  %124 = fmul float %118, %123
>  %125 = call float @llvm.SI.load.const(<16 x i8> %120, i32 40)
>  %126 = fmul float %118, %125
>  %127 = fmul float %102, %108
>  %128 = fadd float %127, %122
>  %129 = fmul float %103, %108
>  %130 = fadd float %129, %124
>  %131 = fmul float %104, %108
>  %132 = fadd float %131, %126
>  %133 = fmul float %50, %128
>  %134 = fmul float %51, %130
>  %135 = fmul float %52, %132
>  %136 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %137 = load <16 x i8>, <16 x i8> addrspace(2)* %136, align 16, !invariant.load !0
>  %138 = call float @llvm.SI.load.const(<16 x i8> %137, i32 88)
>  %139 = call float @llvm.SI.load.const(<16 x i8> %137, i32 16)
>  %140 = fsub float 1.000000e+00, %138
>  %141 = fmul float %139, %138
>  %142 = fmul float %133, %140
>  %143 = fadd float %141, %142
>  %144 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %145 = load <16 x i8>, <16 x i8> addrspace(2)* %144, align 16, !invariant.load !0
>  %146 = call float @llvm.SI.load.const(<16 x i8> %145, i32 88)
>  %147 = call float @llvm.SI.load.const(<16 x i8> %145, i32 20)
>  %148 = fsub float 1.000000e+00, %146
>  %149 = fmul float %147, %146
>  %150 = fmul float %134, %148
>  %151 = fadd float %149, %150
>  %152 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %153 = load <16 x i8>, <16 x i8> addrspace(2)* %152, align 16, !invariant.load !0
>  %154 = call float @llvm.SI.load.const(<16 x i8> %153, i32 88)
>  %155 = call float @llvm.SI.load.const(<16 x i8> %153, i32 24)
>  %156 = fsub float 1.000000e+00, %154
>  %157 = fmul float %155, %154
>  %158 = fmul float %135, %156
>  %159 = fadd float %157, %158
>  %160 = bitcast float %5 to i32
>  %161 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %160, 10
>  %162 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %161, float %143, 11
>  %163 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %162, float %151, 12
>  %164 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %163, float %159, 13
>  %165 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %164, float %42, 14
>  %166 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %165, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %166
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>declare float @sqrtf(float)
>
>declare float @fabsf(float)
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                   ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen ; E00C2000 80030B05
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen    ; E00C2000 80020306
>	s_buffer_load_dword s6, s[0:3], 0x14                    ; C2030114
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s7, s[0:3], 0x15                    ; C2038115
>	s_buffer_load_dword s8, s[0:3], 0x18                    ; C2040118
>	s_buffer_load_dword s9, s[0:3], 0x0                     ; C2048100
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_mul_f32_e32 v0, s5, v0                                ; 10000005
>	v_mul_f32_e32 v0, 0x40c90e56, v0                        ; 100000FF 40C90E56
>	v_mul_f32_e32 v0, 0x3e22f983, v0                        ; 100000FF 3E22F983
>	v_fract_f32_e32 v0, v0                                  ; 7E004100
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_sin_f32_e32 v6, v0                                    ; 7E0C6B00
>	s_buffer_load_dword s10, s[0:3], 0x1                    ; C2050101
>	s_buffer_load_dword s11, s[0:3], 0x2                    ; C2058102
>	s_buffer_load_dword s12, s[0:3], 0x3                    ; C2060103
>	v_cos_f32_e32 v0, v0                                    ; 7E006D00
>	s_buffer_load_dword s13, s[0:3], 0x4                    ; C2068104
>	s_buffer_load_dword s14, s[0:3], 0x5                    ; C2070105
>	s_buffer_load_dword s15, s[0:3], 0x6                    ; C2078106
>	s_buffer_load_dword s16, s[0:3], 0x7                    ; C2080107
>	s_buffer_load_dword s17, s[0:3], 0x8                    ; C2088108
>	s_buffer_load_dword s18, s[0:3], 0x9                    ; C2090109
>	s_buffer_load_dword s19, s[0:3], 0xa                    ; C209810A
>	s_buffer_load_dword s20, s[0:3], 0xb                    ; C20A010B
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	s_buffer_load_dword s21, s[0:3], 0xc                    ; C20A810C
>	s_buffer_load_dword s22, s[0:3], 0xd                    ; C20B010D
>	s_buffer_load_dword s0, s[0:3], 0xe                     ; C200010E
>	v_mov_b32_e32 v1, s7                                    ; 7E020207
>	v_mov_b32_e32 v5, s8                                    ; 7E0A0208
>	v_mul_f32_e32 v14, s9, v7                               ; 101C0E09
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v15, s10, v7                              ; 101E0E0A
>	v_add_f32_e32 v4, -0.5, v4                              ; 060808F1
>	v_add_f32_e32 v3, -0.5, v3                              ; 060606F1
>	v_mul_f32_e32 v17, v6, v4                               ; 10220906
>	v_mad_f32 v6, v3, v6, 0.5                               ; D2820006 03C20D03
>	v_mad_f32 v3, v3, v0, -v17                              ; D2820003 84460103
>	v_mul_f32_e32 v16, s11, v7                              ; 10200E0B
>	v_mac_f32_e32 v6, v0, v4                                ; 3E0C0900
>	v_mul_f32_e32 v7, s12, v7                               ; 100E0E0C
>	v_add_f32_e32 v0, 0.5, v3                               ; 060006F0
>	v_mac_f32_e32 v14, s13, v8                              ; 3E1C100D
>	v_mac_f32_e32 v15, s14, v8                              ; 3E1E100E
>	v_mac_f32_e32 v16, s15, v8                              ; 3E20100F
>	v_mac_f32_e32 v7, s16, v8                               ; 3E0E1010
>	v_mac_f32_e32 v6, s5, v5                                ; 3E0C0A05
>	v_mac_f32_e32 v0, s5, v1                                ; 3E000205
>	v_mac_f32_e32 v14, s17, v9                              ; 3E1C1211
>	v_mac_f32_e32 v15, s18, v9                              ; 3E1E1212
>	v_mac_f32_e32 v16, s19, v9                              ; 3E201213
>	v_mac_f32_e32 v7, s20, v9                               ; 3E0E1214
>	exp 15, 32, 0, 0, 0, v0, v6, v0, v0                     ; F800020F 00000600
>	v_mac_f32_e32 v14, s21, v10                             ; 3E1C1415
>	v_mac_f32_e32 v15, s22, v10                             ; 3E1E1416
>	v_mac_f32_e32 v16, s0, v10                              ; 3E201400
>	v_mac_f32_e32 v7, s4, v10                               ; 3E0E1404
>	exp 15, 33, 0, 0, 0, v11, v12, v13, v0                  ; F800021F 000D0C0B
>	exp 15, 12, 0, 1, 0, v14, v15, v16, v7                  ; F80008CF 07100F0E
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 332 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                    ; BE80047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[20:23], s[4:5], 0xc                      ; C08A050C
>	s_load_dwordx8 s[24:31], s[4:5], 0x10                     ; C0CC0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                        ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                  ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                        ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                  ; C8050103
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s4, s4, s31                                     ; 87041F04
>	image_sample v[0:3], v[0:1], s[24:31], s[4:7] dmask:0xf   ; F0800F00 00260000
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v9, 0x3e99999a, v0                          ; 101200FF 3E99999A
>	v_mac_f32_e32 v9, 0x3f170a3d, v1                          ; 3E1202FF 3F170A3D
>	v_mac_f32_e32 v9, 0x3de147ae, v2                          ; 3E1204FF 3DE147AE
>	v_mov_b32_e32 v6, 0xff800000                              ; 7E0C02FF FF800000
>	v_mov_b32_e32 v7, 0x41000000                              ; 7E0E02FF 41000000
>	v_sqrt_f32_e32 v10, v9                                    ; 7E146709
>	v_cmp_eq_f32_e32 vcc, v6, v9                              ; 7C041306
>	v_mov_b32_e32 v8, 0x7f800000                              ; 7E1002FF 7F800000
>	v_mul_f32_e64 v6, v7, |v10|                               ; D2100206 00021507
>	v_cndmask_b32_e32 v6, v6, v8, vcc                         ; 000C1106
>	v_mul_f32_e32 v0, v6, v0                                  ; 10000106
>	v_mul_f32_e32 v1, v6, v1                                  ; 10020306
>	v_mul_f32_e32 v2, v6, v2                                  ; 10040506
>	v_interp_p1_f32 v6, v4, 0, 1, [m0]                        ; C8180404
>	v_interp_p2_f32 v6, [v6], v5, 0, 1, [m0]                  ; C8190405
>	v_interp_p1_f32 v7, v4, 1, 1, [m0]                        ; C81C0504
>	v_interp_p2_f32 v7, [v7], v5, 1, 1, [m0]                  ; C81D0505
>	v_interp_p1_f32 v8, v4, 2, 1, [m0]                        ; C8200604
>	v_mul_f32_e32 v4, v6, v6                                  ; 10080D06
>	v_interp_p2_f32 v8, [v8], v5, 2, 1, [m0]                  ; C8210605
>	v_mac_f32_e32 v4, v7, v7                                  ; 3E080F07
>	v_mac_f32_e32 v4, v8, v8                                  ; 3E081108
>	v_rsq_f32_e32 v5, v4                                      ; 7E0A5D04
>	v_mov_b32_e32 v4, 0x3fc00000                              ; 7E0802FF 3FC00000
>	s_and_b32 s20, s20, s19                                   ; 87141314
>	v_mul_f32_e32 v9, v5, v6                                  ; 10120D05
>	v_mul_f32_e32 v10, v5, v7                                 ; 10140F05
>	v_mul_f32_e32 v8, v5, v8                                  ; 10101105
>	v_cubema_f32 v6, v9, v10, v8                              ; D28E0006 04221509
>	v_rcp_f32_e64 v7, |v6|                                    ; D3540107 00000106
>	v_cubetc_f32 v5, v9, v10, v8                              ; D28C0005 04221509
>	v_cubesc_f32 v11, v9, v10, v8                             ; D28A000B 04221509
>	v_cubeid_f32 v6, v9, v10, v8                              ; D2880006 04221509
>	v_mad_f32 v5, v7, v5, v4                                  ; D2820005 04120B07
>	v_mac_f32_e32 v4, v7, v11                                 ; 3E081707
>	s_and_b64 exec, exec, s[0:1]                              ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	image_sample v[4:7], v[4:7], s[12:19], s[20:23] dmask:0xf ; F0800F00 00A30404
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v4, v7, v4                                  ; 10080907
>	v_mul_f32_e32 v5, v7, v5                                  ; 100A0B07
>	v_mul_f32_e32 v6, v7, v6                                  ; 100C0D07
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0xb                       ; C204010B
>	s_buffer_load_dword s9, s[0:3], 0x1                       ; C2048101
>	s_buffer_load_dword s11, s[0:3], 0x2                      ; C2058102
>	s_buffer_load_dword s5, s[0:3], 0x8                       ; C2028108
>	s_buffer_load_dword s6, s[0:3], 0x9                       ; C2030109
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e64 v7, s8, 4.0                                 ; D2100007 0001EC08
>	s_buffer_load_dword s8, s[0:3], 0x0                       ; C2040100
>	s_buffer_load_dword s7, s[0:3], 0xa                       ; C203810A
>	s_buffer_load_dword s4, s[0:3], 0x6                       ; C2020106
>	s_buffer_load_dword s12, s[0:3], 0x4                      ; C2060104
>	s_buffer_load_dword s13, s[0:3], 0x5                      ; C2068105
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v9, s8, v9                                  ; 10121208
>	v_mad_f32 v9, -s9, v10, -v9                               ; D2820009 A4261409
>	v_mad_f32 v8, -s11, v8, v9                                ; D2820008 2426100B
>	s_buffer_load_dword s0, s[0:3], 0x16                      ; C2000116
>	v_add_f32_e64 v8, v8, 0 clamp                             ; D2060808 00010108
>	v_mul_f32_e32 v9, s5, v8                                  ; 10121005
>	v_mul_f32_e32 v10, s6, v8                                 ; 10141006
>	v_mul_f32_e32 v8, s7, v8                                  ; 10101007
>	v_mac_f32_e32 v9, v7, v4                                  ; 3E120907
>	v_mac_f32_e32 v10, v7, v5                                 ; 3E140B07
>	v_mac_f32_e32 v8, v7, v6                                  ; 3E100D07
>	v_mul_f32_e32 v0, v9, v0                                  ; 10000109
>	v_mul_f32_e32 v1, v10, v1                                 ; 1002030A
>	v_mul_f32_e32 v2, v8, v2                                  ; 10040508
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mad_f32 v0, -s0, v0, v0                                 ; D2820000 24020000
>	v_mov_b32_e32 v4, s0                                      ; 7E080200
>	v_mad_f32 v1, -s0, v1, v1                                 ; D2820001 24060200
>	v_mad_f32 v2, -s0, v2, v2                                 ; D2820002 240A0400
>	v_mac_f32_e32 v0, s12, v4                                 ; 3E00080C
>	v_mac_f32_e32 v1, s13, v4                                 ; 3E02080D
>	v_mac_f32_e32 v2, s4, v4                                  ; 3E040804
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 512 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..6]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {   -0.5000,     6.2830,     0.5000,    64.0000}
>  0: ADD TEMP[0].xy, IN[2].xyyy, IMM[0].xxxx
>  1: MUL TEMP[1].x, CONST[4].yyyy, CONST[5].xxxx
>  2: MUL TEMP[1].x, IMM[0].yyyy, TEMP[1].xxxx
>  3: SIN TEMP[2].x, TEMP[1].xxxx
>  4: COS TEMP[1].x, TEMP[1].xxxx
>  5: MUL TEMP[3].x, TEMP[0].yyyy, TEMP[2].xxxx
>  6: MAD TEMP[3].x, TEMP[0].xxxx, TEMP[1].xxxx, -TEMP[3].xxxx
>  7: MUL TEMP[2].x, TEMP[0].xxxx, TEMP[2].xxxx
>  8: MAD TEMP[0].x, TEMP[0].yyyy, TEMP[1].xxxx, TEMP[2].xxxx
>  9: MOV TEMP[3].y, TEMP[0].xxxx
> 10: ADD TEMP[0].xy, TEMP[3].xyyy, IMM[0].zzzz
> 11: MAD TEMP[3].x, CONST[4].yyyy, CONST[5].yyyy, TEMP[0].xxxx
> 12: MAD TEMP[0].x, CONST[4].yyyy, CONST[6].xxxx, TEMP[0].yyyy
> 13: MOV TEMP[3].y, TEMP[0].xxxx
> 14: MUL TEMP[0], CONST[0], IN[0].xxxx
> 15: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
> 16: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
> 17: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
> 18: MOV TEMP[1].xy, TEMP[3].xyxx
> 19: MUL TEMP[2].xy, IN[1].zwww, IMM[0].wwww
> 20: MOV TEMP[1].zw, TEMP[2].yyxy
> 21: MOV OUT[0], TEMP[0]
> 22: MOV OUT[1], TEMP[1]
> 23: END
>radeonsi: Compiling shader 102
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 2
>  %28 = extractelement <4 x float> %26, i32 3
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %16)
>  %32 = extractelement <4 x float> %31, i32 0
>  %33 = extractelement <4 x float> %31, i32 1
>  %34 = fadd float %32, -5.000000e-01
>  %35 = fadd float %33, -5.000000e-01
>  %36 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %37 = load <16 x i8>, <16 x i8> addrspace(2)* %36, align 16, !invariant.load !0
>  %38 = call float @llvm.SI.load.const(<16 x i8> %37, i32 68)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %37, i32 80)
>  %40 = fmul float %38, %39
>  %41 = fmul float %40, 0x401921CAC0000000
>  %42 = call float @llvm.sin.f32(float %41)
>  %43 = call float @llvm.cos.f32(float %41)
>  %44 = fmul float %35, %42
>  %45 = fmul float %34, %43
>  %46 = fsub float %45, %44
>  %47 = fmul float %34, %42
>  %48 = fmul float %35, %43
>  %49 = fadd float %48, %47
>  %50 = fadd float %46, 5.000000e-01
>  %51 = fadd float %49, 5.000000e-01
>  %52 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %53 = load <16 x i8>, <16 x i8> addrspace(2)* %52, align 16, !invariant.load !0
>  %54 = call float @llvm.SI.load.const(<16 x i8> %53, i32 68)
>  %55 = call float @llvm.SI.load.const(<16 x i8> %53, i32 84)
>  %56 = fmul float %54, %55
>  %57 = fadd float %56, %50
>  %58 = call float @llvm.SI.load.const(<16 x i8> %53, i32 68)
>  %59 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %60 = load <16 x i8>, <16 x i8> addrspace(2)* %59, align 16, !invariant.load !0
>  %61 = call float @llvm.SI.load.const(<16 x i8> %60, i32 96)
>  %62 = fmul float %58, %61
>  %63 = fadd float %62, %51
>  %64 = call float @llvm.SI.load.const(<16 x i8> %60, i32 0)
>  %65 = fmul float %64, %20
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 4)
>  %69 = fmul float %68, %20
>  %70 = call float @llvm.SI.load.const(<16 x i8> %67, i32 8)
>  %71 = fmul float %70, %20
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 12)
>  %73 = fmul float %72, %20
>  %74 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %75 = load <16 x i8>, <16 x i8> addrspace(2)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const(<16 x i8> %75, i32 16)
>  %77 = fmul float %76, %21
>  %78 = fadd float %77, %65
>  %79 = call float @llvm.SI.load.const(<16 x i8> %75, i32 20)
>  %80 = fmul float %79, %21
>  %81 = fadd float %80, %69
>  %82 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %83 = load <16 x i8>, <16 x i8> addrspace(2)* %82, align 16, !invariant.load !0
>  %84 = call float @llvm.SI.load.const(<16 x i8> %83, i32 24)
>  %85 = fmul float %84, %21
>  %86 = fadd float %85, %71
>  %87 = call float @llvm.SI.load.const(<16 x i8> %83, i32 28)
>  %88 = fmul float %87, %21
>  %89 = fadd float %88, %73
>  %90 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %91 = load <16 x i8>, <16 x i8> addrspace(2)* %90, align 16, !invariant.load !0
>  %92 = call float @llvm.SI.load.const(<16 x i8> %91, i32 32)
>  %93 = fmul float %92, %22
>  %94 = fadd float %93, %78
>  %95 = call float @llvm.SI.load.const(<16 x i8> %91, i32 36)
>  %96 = fmul float %95, %22
>  %97 = fadd float %96, %81
>  %98 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %99 = load <16 x i8>, <16 x i8> addrspace(2)* %98, align 16, !invariant.load !0
>  %100 = call float @llvm.SI.load.const(<16 x i8> %99, i32 40)
>  %101 = fmul float %100, %22
>  %102 = fadd float %101, %86
>  %103 = call float @llvm.SI.load.const(<16 x i8> %99, i32 44)
>  %104 = fmul float %103, %22
>  %105 = fadd float %104, %89
>  %106 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %107 = load <16 x i8>, <16 x i8> addrspace(2)* %106, align 16, !invariant.load !0
>  %108 = call float @llvm.SI.load.const(<16 x i8> %107, i32 48)
>  %109 = fmul float %108, %23
>  %110 = fadd float %109, %94
>  %111 = call float @llvm.SI.load.const(<16 x i8> %107, i32 52)
>  %112 = fmul float %111, %23
>  %113 = fadd float %112, %97
>  %114 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %115 = load <16 x i8>, <16 x i8> addrspace(2)* %114, align 16, !invariant.load !0
>  %116 = call float @llvm.SI.load.const(<16 x i8> %115, i32 56)
>  %117 = fmul float %116, %23
>  %118 = fadd float %117, %102
>  %119 = call float @llvm.SI.load.const(<16 x i8> %115, i32 60)
>  %120 = fmul float %119, %23
>  %121 = fadd float %120, %105
>  %122 = fmul float %27, 6.400000e+01
>  %123 = fmul float %28, 6.400000e+01
>  %124 = bitcast i32 %12 to float
>  %125 = insertvalue <{ float, float, float }> undef, float %124, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %57, float %63, float %122, float %123)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %110, float %113, float %118, float %121)
>  ret <{ float, float, float }> %125
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                   ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	v_mov_b32_e32 v0, 0x42800000                            ; 7E0002FF 42800000
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen ; E00C2000 80030B05
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen    ; E00C2000 80020306
>	s_buffer_load_dword s6, s[0:3], 0x14                    ; C2030114
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s9, s[0:3], 0x0                     ; C2048100
>	s_buffer_load_dword s10, s[0:3], 0x1                    ; C2050101
>	s_buffer_load_dword s11, s[0:3], 0x2                    ; C2058102
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v1, s6                                    ; 7E020206
>	v_mul_f32_e32 v1, s5, v1                                ; 10020205
>	v_mul_f32_e32 v1, 0x40c90e56, v1                        ; 100202FF 40C90E56
>	v_mul_f32_e32 v1, 0x3e22f983, v1                        ; 100202FF 3E22F983
>	v_fract_f32_e32 v1, v1                                  ; 7E024101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_sin_f32_e32 v11, v1                                   ; 7E166B01
>	s_buffer_load_dword s12, s[0:3], 0x3                    ; C2060103
>	s_buffer_load_dword s7, s[0:3], 0x15                    ; C2038115
>	s_buffer_load_dword s8, s[0:3], 0x18                    ; C2040118
>	s_buffer_load_dword s13, s[0:3], 0x4                    ; C2068104
>	s_buffer_load_dword s14, s[0:3], 0x5                    ; C2070105
>	s_buffer_load_dword s15, s[0:3], 0x6                    ; C2078106
>	s_buffer_load_dword s16, s[0:3], 0x7                    ; C2080107
>	v_cos_f32_e32 v1, v1                                    ; 7E026D01
>	s_buffer_load_dword s17, s[0:3], 0x8                    ; C2088108
>	s_buffer_load_dword s18, s[0:3], 0x9                    ; C2090109
>	s_buffer_load_dword s19, s[0:3], 0xa                    ; C209810A
>	s_buffer_load_dword s20, s[0:3], 0xb                    ; C20A010B
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	s_buffer_load_dword s21, s[0:3], 0xc                    ; C20A810C
>	s_buffer_load_dword s22, s[0:3], 0xd                    ; C20B010D
>	s_buffer_load_dword s0, s[0:3], 0xe                     ; C200010E
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v5, s7                                    ; 7E0A0207
>	v_mov_b32_e32 v6, s8                                    ; 7E0C0208
>	v_mul_f32_e32 v12, s9, v7                               ; 10180E09
>	v_mul_f32_e32 v15, s10, v7                              ; 101E0E0A
>	v_add_f32_e32 v4, -0.5, v4                              ; 060808F1
>	v_add_f32_e32 v3, -0.5, v3                              ; 060606F1
>	v_mul_f32_e32 v17, v11, v4                              ; 1022090B
>	v_mul_f32_e32 v16, s11, v7                              ; 10200E0B
>	v_mad_f32 v11, v3, v11, 0.5                             ; D282000B 03C21703
>	v_mad_f32 v3, v3, v1, -v17                              ; D2820003 84460303
>	v_mul_f32_e32 v7, s12, v7                               ; 100E0E0C
>	v_mac_f32_e32 v11, v1, v4                               ; 3E160901
>	v_mac_f32_e32 v12, s13, v8                              ; 3E18100D
>	v_mac_f32_e32 v15, s14, v8                              ; 3E1E100E
>	v_mac_f32_e32 v16, s15, v8                              ; 3E20100F
>	v_mac_f32_e32 v7, s16, v8                               ; 3E0E1010
>	v_add_f32_e32 v3, 0.5, v3                               ; 060606F0
>	v_mac_f32_e32 v12, s17, v9                              ; 3E181211
>	v_mac_f32_e32 v15, s18, v9                              ; 3E1E1212
>	v_mac_f32_e32 v16, s19, v9                              ; 3E201213
>	v_mac_f32_e32 v7, s20, v9                               ; 3E0E1214
>	v_mul_f32_e32 v1, v0, v13                               ; 10021B00
>	v_mac_f32_e32 v11, s5, v6                               ; 3E160C05
>	v_mac_f32_e32 v3, s5, v5                                ; 3E060A05
>	v_mul_f32_e32 v0, v0, v14                               ; 10001D00
>	v_mac_f32_e32 v12, s21, v10                             ; 3E181415
>	v_mac_f32_e32 v15, s22, v10                             ; 3E1E1416
>	v_mac_f32_e32 v16, s0, v10                              ; 3E201400
>	v_mac_f32_e32 v7, s4, v10                               ; 3E0E1404
>	exp 15, 32, 0, 0, 0, v3, v11, v1, v0                    ; F800020F 00010B03
>	exp 15, 12, 0, 1, 0, v12, v15, v16, v7                  ; F80008CF 07100F0C
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 340 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                    ; BE88047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                      ; C08E050C
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                        ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                  ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                        ; C8040102
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                  ; C8050103
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s28, s28, s19                                   ; 871C131C
>	image_sample v[4:7], v[0:1], s[12:19], s[28:31] dmask:0xf ; F0800F00 00E30400
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v0, 0x3e99999a, v4                          ; 100008FF 3E99999A
>	v_mac_f32_e32 v0, 0x3f170a3d, v5                          ; 3E000AFF 3F170A3D
>	v_mac_f32_e32 v0, 0x3de147ae, v6                          ; 3E000CFF 3DE147AE
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                     ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	v_mov_b32_e32 v8, 0xff800000                              ; 7E1002FF FF800000
>	v_mov_b32_e32 v9, 0x41000000                              ; 7E1202FF 41000000
>	v_sqrt_f32_e32 v1, v0                                     ; 7E026700
>	s_buffer_load_dword s11, s[0:3], 0xc                      ; C205810C
>	v_cmp_eq_f32_e32 vcc, v8, v0                              ; 7C040108
>	v_mul_f32_e64 v0, v9, |v1|                                ; D2100200 00020309
>	v_mov_b32_e32 v1, 0x7f800000                              ; 7E0202FF 7F800000
>	v_cndmask_b32_e32 v0, v0, v1, vcc                         ; 00000300
>	v_mul_f32_e32 v4, v0, v4                                  ; 10080900
>	v_mul_f32_e32 v5, v0, v5                                  ; 100A0B00
>	v_mul_f32_e32 v6, v0, v6                                  ; 100C0D00
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                        ; C8000202
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]                  ; C8010203
>	v_interp_p1_f32 v1, v2, 3, 0, [m0]                        ; C8040302
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v4, s11, v4                                 ; 1008080B
>	v_mul_f32_e32 v5, s11, v5                                 ; 100A0A0B
>	v_mul_f32_e32 v6, s11, v6                                 ; 100C0C0B
>	v_interp_p2_f32 v1, [v1], v3, 3, 0, [m0]                  ; C8050303
>	s_and_b32 s4, s4, s27                                     ; 87041B04
>	s_and_b64 exec, exec, s[8:9]                              ; 87FE087E
>	s_buffer_load_dword s0, s[0:3], 0x3                       ; C2000103
>	image_sample v[0:3], v[0:1], s[20:27], s[4:7] dmask:0xf   ; F0800F00 00250000
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_add_f32_e32 v0, v0, v0                                  ; 06000100
>	v_add_f32_e32 v1, v1, v1                                  ; 06020301
>	v_add_f32_e32 v2, v2, v2                                  ; 06040502
>	v_mul_f32_e32 v0, v0, v4                                  ; 10000900
>	v_mul_f32_e32 v1, v1, v5                                  ; 10020B01
>	v_mul_f32_e32 v2, v2, v6                                  ; 10040D02
>	v_mul_f32_e32 v3, v3, v7                                  ; 10060F03
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v0, s0, v0                                  ; 10000000
>	v_mul_f32_e32 v1, s0, v1                                  ; 10020200
>	v_mul_f32_e32 v2, s0, v2                                  ; 10040400
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 272 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL CONST[0..2]
>DCL TEMP[0..1], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xy, CONST[2].zwww, IMM[0].xxxx
>  1: ADD TEMP[1].xy, CONST[2].xyyy, IMM[0].yyyy
>  2: MAD TEMP[0].xy, IN[0].xyyy, TEMP[0].xyyy, TEMP[1].xyyy
>  3: MOV TEMP[1].zw, IMM[0].wwzw
>  4: MOV TEMP[1].x, TEMP[0].xyxx
>  5: MOV TEMP[1].xw, TEMP[1].xxzw
>  6: MUL TEMP[0].x, TEMP[0].yyyy, CONST[0].zzzz
>  7: MOV TEMP[1].y, TEMP[0].xxxx
>  8: MOV TEMP[0].xyw, TEMP[1].xyxw
>  9: MOV TEMP[0].z, IMM[1].xxxx
> 10: MOV OUT[0], TEMP[0]
> 11: MOV OUT[1], CONST[1]
> 12: END
>radeonsi: Compiling shader 103
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32) {
>main_body:
>  %15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %16 = load <16 x i8>, <16 x i8> addrspace(2)* %15, align 16, !invariant.load !0
>  %17 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %16, i32 0, i32 %14)
>  %18 = extractelement <4 x float> %17, i32 0
>  %19 = extractelement <4 x float> %17, i32 1
>  %20 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, align 16, !invariant.load !0
>  %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 40)
>  %23 = fadd float %22, 2.000000e+00
>  %24 = call float @llvm.SI.load.const(<16 x i8> %21, i32 44)
>  %25 = fadd float %24, 2.000000e+00
>  %26 = call float @llvm.SI.load.const(<16 x i8> %21, i32 32)
>  %27 = fadd float %26, -1.000000e+00
>  %28 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %29 = load <16 x i8>, <16 x i8> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = call float @llvm.SI.load.const(<16 x i8> %29, i32 36)
>  %31 = fadd float %30, -1.000000e+00
>  %32 = fmul float %18, %23
>  %33 = fadd float %32, %27
>  %34 = fmul float %19, %25
>  %35 = fadd float %34, %31
>  %36 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %37 = load <16 x i8>, <16 x i8> addrspace(2)* %36, align 16, !invariant.load !0
>  %38 = call float @llvm.SI.load.const(<16 x i8> %37, i32 8)
>  %39 = fmul float %35, %38
>  %40 = call float @llvm.SI.load.const(<16 x i8> %37, i32 16)
>  %41 = call float @llvm.SI.load.const(<16 x i8> %37, i32 20)
>  %42 = call float @llvm.SI.load.const(<16 x i8> %37, i32 24)
>  %43 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %44 = load <16 x i8>, <16 x i8> addrspace(2)* %43, align 16, !invariant.load !0
>  %45 = call float @llvm.SI.load.const(<16 x i8> %44, i32 28)
>  %46 = bitcast i32 %12 to float
>  %47 = insertvalue <{ float, float, float }> undef, float %46, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %40, float %41, float %42, float %45)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %33, float %39, float 0x3FEFFFEB00000000, float 1.000000e+00)
>  ret <{ float, float, float }> %47
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL OUT[0], COLOR
>  0: MOV OUT[0], IN[0]
>  1: END
>radeonsi: Compiling shader 104
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %25 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %26 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %27 = bitcast float %5 to i32
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %27, 10
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %28, float %23, 11
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %29, float %24, 12
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %30, float %25, 13
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %31, float %26, 14
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %32, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %33
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	v_mov_b32_e32 v0, 1.0                               ; 7E0002F2
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	buffer_load_format_xyzw v[3:6], v4, s[4:7], 0 idxen ; E00C2000 80010304
>	s_buffer_load_dword s5, s[0:3], 0x9                 ; C2028109
>	s_buffer_load_dword s7, s[0:3], 0xb                 ; C203810B
>	s_buffer_load_dword s4, s[0:3], 0x8                 ; C2020108
>	s_buffer_load_dword s6, s[0:3], 0xa                 ; C203010A
>	s_buffer_load_dword s9, s[0:3], 0x4                 ; C2048104
>	s_buffer_load_dword s10, s[0:3], 0x5                ; C2050105
>	s_buffer_load_dword s11, s[0:3], 0x6                ; C2058106
>	s_buffer_load_dword s8, s[0:3], 0x2                 ; C2040102
>	s_buffer_load_dword s0, s[0:3], 0x7                 ; C2000107
>	s_waitcnt vmcnt(0) lgkmcnt(0)                       ; BF8C0070
>	v_add_f32_e64 v5, s7, 2.0                           ; D2060005 0001E807
>	v_add_f32_e64 v7, s5, -1.0                          ; D2060007 0001E605
>	v_add_f32_e64 v1, s6, 2.0                           ; D2060001 0001E806
>	v_add_f32_e64 v6, s4, -1.0                          ; D2060006 0001E604
>	v_mov_b32_e32 v8, s9                                ; 7E100209
>	v_mov_b32_e32 v9, s10                               ; 7E12020A
>	v_mov_b32_e32 v10, s11                              ; 7E14020B
>	v_mov_b32_e32 v11, s0                               ; 7E160200
>	exp 15, 32, 0, 0, 0, v8, v9, v10, v11               ; F800020F 0B0A0908
>	v_mac_f32_e32 v7, v5, v4                            ; 3E0E0905
>	v_mac_f32_e32 v6, v1, v3                            ; 3E0C0701
>	v_mul_f32_e32 v1, s8, v7                            ; 10020E08
>	v_mov_b32_e32 v3, 0x3f7fff58                        ; 7E0602FF 3F7FFF58
>	exp 15, 12, 0, 1, 0, v6, v1, v3, v0                 ; F80008CF 00030106
>	s_waitcnt expcnt(0)                                 ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 12
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 160 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b32 m0, s11                        ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]       ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0] ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]       ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0] ; C8050103
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]       ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0] ; C8110203
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]       ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0] ; C8150303
>	v_mov_b32_e32 v2, v4                     ; 7E040304
>	v_mov_b32_e32 v3, v5                     ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 64 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL CONST[0..8]
>DCL TEMP[0..6], LOCAL
>IMM[0] FLT32 {   -0.0000,     6.2830,    -0.5000,     0.5000}
>IMM[1] FLT32 {    1.0000,    -1.0000,     0.0000,     0.0000}
>  0: MUL TEMP[0], CONST[0], IN[0].xxxx
>  1: MAD TEMP[0], CONST[1], IN[0].yyyy, TEMP[0]
>  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[0]
>  3: MAD TEMP[0], CONST[3], IN[0].wwww, TEMP[0]
>  4: MOV TEMP[1].xyw, TEMP[0].xyxw
>  5: ADD TEMP[0].x, TEMP[0].zzzz, IMM[0].xxxx
>  6: MOV TEMP[1].z, TEMP[0].xxxx
>  7: MOV TEMP[2].zw, IN[2].yyxy
>  8: ADD TEMP[2].xy, IN[1].xyyy, CONST[7].xyyy
>  9: MAD TEMP[3].x, CONST[4].yyyy, CONST[7].zzzz, TEMP[2].yyyy
> 10: MOV TEMP[2].y, TEMP[3].xxxx
> 11: MAD TEMP[3], CONST[4].yyyy, CONST[8], TEMP[2]
> 12: MOV TEMP[2].zw, TEMP[3].wwzw
> 13: MUL TEMP[4].x, CONST[4].yyyy, CONST[7].wwww
> 14: MUL TEMP[4].x, IMM[0].yyyy, TEMP[4].xxxx
> 15: SIN TEMP[5].x, TEMP[4].xxxx
> 16: COS TEMP[4].x, TEMP[4].xxxx
> 17: ADD TEMP[3].xy, TEMP[3].xyyy, IMM[0].zzzz
> 18: MUL TEMP[6].x, TEMP[3].yyyy, TEMP[5].xxxx
> 19: MAD TEMP[2].x, TEMP[3].xxxx, TEMP[4].xxxx, -TEMP[6].xxxx
> 20: MUL TEMP[5].x, TEMP[3].xxxx, TEMP[5].xxxx
> 21: MAD TEMP[3].x, TEMP[3].yyyy, TEMP[4].xxxx, TEMP[5].xxxx
> 22: MOV TEMP[2].y, TEMP[3].xxxx
> 23: ADD TEMP[2].xy, TEMP[2].xyyy, IMM[0].wwww
> 24: MUL TEMP[3].xy, IMM[1].xyyy, CONST[6].xzzz
> 25: SSG TEMP[3].xy, TEMP[3].xyyy
> 26: ABS TEMP[4].xy, CONST[6].xzzz
> 27: RCP TEMP[5].x, TEMP[4].xxxx
> 28: RCP TEMP[5].y, TEMP[4].yyyy
> 29: MUL TEMP[4].xy, CONST[4].yyyy, TEMP[5].xyyy
> 30: RCP TEMP[5].x, CONST[6].yyyy
> 31: RCP TEMP[5].y, CONST[6].wwww
> 32: MUL TEMP[4].xy, TEMP[4].xyyy, TEMP[5].xyyy
> 33: FRC TEMP[4].xy, TEMP[4].xyyy
> 34: MUL TEMP[4].xy, TEMP[4].xyyy, CONST[6].ywww
> 35: FLR TEMP[4].xy, TEMP[4].xyyy
> 36: MUL TEMP[3].xy, TEMP[3].xyyy, TEMP[4].xyyy
> 37: RCP TEMP[4].x, CONST[6].yyyy
> 38: RCP TEMP[4].y, CONST[6].wwww
> 39: MAD TEMP[2].xy, TEMP[3].xyyy, TEMP[4].xyyy, TEMP[2].xyyy
> 40: MAD TEMP[0].x, TEMP[0].xxxx, CONST[5].yyyy, CONST[5].xxxx
> 41: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 42: POW TEMP[0].x, TEMP[0].xxxx, CONST[5].zzzz
> 43: ADD TEMP[3].x, IMM[1].xxxx, -CONST[5].wwww
> 44: MAD TEMP[0].x, CONST[5].wwww, TEMP[0].xxxx, TEMP[3].xxxx
> 45: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
> 46: MOV TEMP[0].yzw, IN[0].yxyz
> 47: MOV OUT[1], TEMP[2]
> 48: MOV OUT[0], TEMP[1]
> 49: MOV OUT[2], TEMP[0]
> 50: END
>radeonsi: Compiling shader 105
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 0
>  %28 = extractelement <4 x float> %26, i32 1
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %16)
>  %32 = extractelement <4 x float> %31, i32 0
>  %33 = extractelement <4 x float> %31, i32 1
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 0)
>  %37 = fmul float %36, %20
>  %38 = call float @llvm.SI.load.const(<16 x i8> %35, i32 4)
>  %39 = fmul float %38, %20
>  %40 = call float @llvm.SI.load.const(<16 x i8> %35, i32 8)
>  %41 = fmul float %40, %20
>  %42 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <16 x i8>, <16 x i8> addrspace(2)* %42, align 16, !invariant.load !0
>  %44 = call float @llvm.SI.load.const(<16 x i8> %43, i32 12)
>  %45 = fmul float %44, %20
>  %46 = call float @llvm.SI.load.const(<16 x i8> %43, i32 16)
>  %47 = fmul float %46, %21
>  %48 = fadd float %47, %37
>  %49 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %50 = load <16 x i8>, <16 x i8> addrspace(2)* %49, align 16, !invariant.load !0
>  %51 = call float @llvm.SI.load.const(<16 x i8> %50, i32 20)
>  %52 = fmul float %51, %21
>  %53 = fadd float %52, %39
>  %54 = call float @llvm.SI.load.const(<16 x i8> %50, i32 24)
>  %55 = fmul float %54, %21
>  %56 = fadd float %55, %41
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 28)
>  %60 = fmul float %59, %21
>  %61 = fadd float %60, %45
>  %62 = call float @llvm.SI.load.const(<16 x i8> %58, i32 32)
>  %63 = fmul float %62, %22
>  %64 = fadd float %63, %48
>  %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !invariant.load !0
>  %67 = call float @llvm.SI.load.const(<16 x i8> %66, i32 36)
>  %68 = fmul float %67, %22
>  %69 = fadd float %68, %53
>  %70 = call float @llvm.SI.load.const(<16 x i8> %66, i32 40)
>  %71 = fmul float %70, %22
>  %72 = fadd float %71, %56
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 44)
>  %76 = fmul float %75, %22
>  %77 = fadd float %76, %61
>  %78 = call float @llvm.SI.load.const(<16 x i8> %74, i32 48)
>  %79 = fmul float %78, %23
>  %80 = fadd float %79, %64
>  %81 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %82 = load <16 x i8>, <16 x i8> addrspace(2)* %81, align 16, !invariant.load !0
>  %83 = call float @llvm.SI.load.const(<16 x i8> %82, i32 52)
>  %84 = fmul float %83, %23
>  %85 = fadd float %84, %69
>  %86 = call float @llvm.SI.load.const(<16 x i8> %82, i32 56)
>  %87 = fmul float %86, %23
>  %88 = fadd float %87, %72
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = call float @llvm.SI.load.const(<16 x i8> %90, i32 60)
>  %92 = fmul float %91, %23
>  %93 = fadd float %92, %77
>  %94 = fadd float %88, 0xBF04F8B580000000
>  %95 = call float @llvm.SI.load.const(<16 x i8> %90, i32 112)
>  %96 = fadd float %27, %95
>  %97 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %98 = load <16 x i8>, <16 x i8> addrspace(2)* %97, align 16, !invariant.load !0
>  %99 = call float @llvm.SI.load.const(<16 x i8> %98, i32 116)
>  %100 = fadd float %28, %99
>  %101 = call float @llvm.SI.load.const(<16 x i8> %98, i32 68)
>  %102 = call float @llvm.SI.load.const(<16 x i8> %98, i32 120)
>  %103 = fmul float %101, %102
>  %104 = fadd float %103, %100
>  %105 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %106 = load <16 x i8>, <16 x i8> addrspace(2)* %105, align 16, !invariant.load !0
>  %107 = call float @llvm.SI.load.const(<16 x i8> %106, i32 68)
>  %108 = call float @llvm.SI.load.const(<16 x i8> %106, i32 128)
>  %109 = fmul float %107, %108
>  %110 = fadd float %109, %96
>  %111 = call float @llvm.SI.load.const(<16 x i8> %106, i32 68)
>  %112 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %113 = load <16 x i8>, <16 x i8> addrspace(2)* %112, align 16, !invariant.load !0
>  %114 = call float @llvm.SI.load.const(<16 x i8> %113, i32 132)
>  %115 = fmul float %111, %114
>  %116 = fadd float %115, %104
>  %117 = call float @llvm.SI.load.const(<16 x i8> %113, i32 68)
>  %118 = call float @llvm.SI.load.const(<16 x i8> %113, i32 136)
>  %119 = fmul float %117, %118
>  %120 = fadd float %119, %32
>  %121 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %122 = load <16 x i8>, <16 x i8> addrspace(2)* %121, align 16, !invariant.load !0
>  %123 = call float @llvm.SI.load.const(<16 x i8> %122, i32 68)
>  %124 = call float @llvm.SI.load.const(<16 x i8> %122, i32 140)
>  %125 = fmul float %123, %124
>  %126 = fadd float %125, %33
>  %127 = call float @llvm.SI.load.const(<16 x i8> %122, i32 68)
>  %128 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %129 = load <16 x i8>, <16 x i8> addrspace(2)* %128, align 16, !invariant.load !0
>  %130 = call float @llvm.SI.load.const(<16 x i8> %129, i32 124)
>  %131 = fmul float %127, %130
>  %132 = fmul float %131, 0x401921CAC0000000
>  %133 = call float @llvm.sin.f32(float %132)
>  %134 = call float @llvm.cos.f32(float %132)
>  %135 = fadd float %110, -5.000000e-01
>  %136 = fadd float %116, -5.000000e-01
>  %137 = fmul float %136, %133
>  %138 = fmul float %135, %134
>  %139 = fsub float %138, %137
>  %140 = fmul float %135, %133
>  %141 = fmul float %136, %134
>  %142 = fadd float %141, %140
>  %143 = fadd float %139, 5.000000e-01
>  %144 = fadd float %142, 5.000000e-01
>  %145 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %146 = load <16 x i8>, <16 x i8> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = call float @llvm.SI.load.const(<16 x i8> %146, i32 96)
>  %148 = call float @llvm.SI.load.const(<16 x i8> %146, i32 104)
>  %149 = fsub float -0.000000e+00, %148
>  %150 = fcmp ogt float %147, 0.000000e+00
>  %151 = select i1 %150, float 1.000000e+00, float %147
>  %152 = fcmp oge float %151, 0.000000e+00
>  %153 = select i1 %152, float %151, float -1.000000e+00
>  %154 = fcmp olt float %148, -0.000000e+00
>  %155 = select i1 %154, float 1.000000e+00, float %149
>  %156 = fcmp oge float %155, 0.000000e+00
>  %157 = select i1 %156, float %155, float -1.000000e+00
>  %158 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %159 = load <16 x i8>, <16 x i8> addrspace(2)* %158, align 16, !invariant.load !0
>  %160 = call float @llvm.SI.load.const(<16 x i8> %159, i32 96)
>  %161 = call float @llvm.fabs.f32(float %160)
>  %162 = call float @llvm.SI.load.const(<16 x i8> %159, i32 104)
>  %163 = call float @llvm.fabs.f32(float %162)
>  %164 = fdiv float 1.000000e+00, %161, !fpmath !1
>  %165 = fdiv float 1.000000e+00, %163, !fpmath !1
>  %166 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %167 = load <16 x i8>, <16 x i8> addrspace(2)* %166, align 16, !invariant.load !0
>  %168 = call float @llvm.SI.load.const(<16 x i8> %167, i32 68)
>  %169 = fmul float %168, %164
>  %170 = call float @llvm.SI.load.const(<16 x i8> %167, i32 68)
>  %171 = fmul float %170, %165
>  %172 = call float @llvm.SI.load.const(<16 x i8> %167, i32 100)
>  %173 = fdiv float 1.000000e+00, %172, !fpmath !1
>  %174 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %175 = load <16 x i8>, <16 x i8> addrspace(2)* %174, align 16, !invariant.load !0
>  %176 = call float @llvm.SI.load.const(<16 x i8> %175, i32 108)
>  %177 = fdiv float 1.000000e+00, %176, !fpmath !1
>  %178 = fmul float %169, %173
>  %179 = fmul float %171, %177
>  %180 = call float @llvm.floor.f32(float %178)
>  %181 = fsub float %178, %180
>  %182 = call float @llvm.floor.f32(float %179)
>  %183 = fsub float %179, %182
>  %184 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %185 = load <16 x i8>, <16 x i8> addrspace(2)* %184, align 16, !invariant.load !0
>  %186 = call float @llvm.SI.load.const(<16 x i8> %185, i32 100)
>  %187 = fmul float %181, %186
>  %188 = call float @llvm.SI.load.const(<16 x i8> %185, i32 108)
>  %189 = fmul float %183, %188
>  %190 = call float @llvm.floor.f32(float %187)
>  %191 = call float @llvm.floor.f32(float %189)
>  %192 = fmul float %153, %190
>  %193 = fmul float %157, %191
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = call float @llvm.SI.load.const(<16 x i8> %195, i32 100)
>  %197 = fdiv float 1.000000e+00, %196, !fpmath !1
>  %198 = call float @llvm.SI.load.const(<16 x i8> %195, i32 108)
>  %199 = fdiv float 1.000000e+00, %198, !fpmath !1
>  %200 = fmul float %192, %197
>  %201 = fadd float %200, %143
>  %202 = fmul float %193, %199
>  %203 = fadd float %202, %144
>  %204 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %205 = load <16 x i8>, <16 x i8> addrspace(2)* %204, align 16, !invariant.load !0
>  %206 = call float @llvm.SI.load.const(<16 x i8> %205, i32 84)
>  %207 = call float @llvm.SI.load.const(<16 x i8> %205, i32 80)
>  %208 = fmul float %94, %206
>  %209 = fadd float %208, %207
>  %210 = call float @llvm.AMDGPU.clamp.(float %209, float 0.000000e+00, float 1.000000e+00)
>  %211 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %212 = load <16 x i8>, <16 x i8> addrspace(2)* %211, align 16, !invariant.load !0
>  %213 = call float @llvm.SI.load.const(<16 x i8> %212, i32 88)
>  %214 = call float @llvm.pow.f32(float %210, float %213)
>  %215 = call float @llvm.SI.load.const(<16 x i8> %212, i32 92)
>  %216 = fsub float 1.000000e+00, %215
>  %217 = call float @llvm.SI.load.const(<16 x i8> %212, i32 92)
>  %218 = fmul float %217, %214
>  %219 = fadd float %218, %216
>  %220 = fmul float %219, %219
>  %221 = bitcast i32 %12 to float
>  %222 = insertvalue <{ float, float, float }> undef, float %221, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %201, float %203, float %120, float %126)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %220, float %20, float %21, float %22)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %80, float %85, float %94, float %93)
>  ret <{ float, float, float }> %222
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[0..2]
>DCL CONST[5]
>DCL TEMP[0..3], LOCAL
>IMM[0] FLT32 {    0.0000,     0.0010,     8.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[0].zwww
>  1: TEX TEMP[0], TEMP[0], SAMP[1], 2D
>  2: MOV TEMP[1].xy, IN[0].xyyy
>  3: TEX TEMP[1].xyz, TEMP[1], SAMP[0], 2D
>  4: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].xyzz
>  5: MUL TEMP[1].xyz, TEMP[1].xyzz, CONST[5].xxxx
>  6: ADD TEMP[2].x, IN[1].zzzz, -CONST[0].wwww
>  7: MAX TEMP[2].x, TEMP[2].xxxx, IMM[0].xxxx
>  8: ADD TEMP[3].x, CONST[1].wwww, -CONST[0].wwww
>  9: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].yyyy
> 10: RCP TEMP[3].x, TEMP[3].xxxx
> 11: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 12: FRC TEMP[3].x, CONST[1].wwww
> 13: MUL TEMP[3].x, TEMP[3].xxxx, IMM[0].zzzz
> 14: POW TEMP[2].x, TEMP[2].xxxx, TEMP[3].xxxx
> 15: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 16: MUL TEMP[2].x, IN[1].xxxx, TEMP[2].xxxx
> 17: LRP TEMP[1].xyz, TEMP[2].xxxx, TEMP[1].xyzz, CONST[2].xyzz
> 18: MOV TEMP[1].w, TEMP[0].wwww
> 19: MOV OUT[0], TEMP[1]
> 20: END
>radeonsi: Compiling shader 106
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 7, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %45 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %46 = load <8 x i32>, <8 x i32> addrspace(2)* %45, align 32, !invariant.load !0
>  %47 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %48 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %47, i64 0, i64 3, !amdgpu.uniform !0
>  %49 = load <4 x i32>, <4 x i32> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = extractelement <8 x i32> %46, i32 7
>  %51 = extractelement <4 x i32> %49, i32 0
>  %52 = and i32 %51, %50
>  %53 = insertelement <4 x i32> %49, i32 %52, i32 0
>  %54 = bitcast float %43 to i32
>  %55 = bitcast float %44 to i32
>  %56 = insertelement <2 x i32> undef, i32 %54, i32 0
>  %57 = insertelement <2 x i32> %56, i32 %55, i32 1
>  %58 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %57, <8 x i32> %46, <4 x i32> %53, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %59 = extractelement <4 x float> %58, i32 0
>  %60 = extractelement <4 x float> %58, i32 1
>  %61 = extractelement <4 x float> %58, i32 2
>  %62 = fmul float %59, %39
>  %63 = fmul float %60, %40
>  %64 = fmul float %61, %41
>  %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !invariant.load !0
>  %67 = call float @llvm.SI.load.const(<16 x i8> %66, i32 80)
>  %68 = fmul float %62, %67
>  %69 = call float @llvm.SI.load.const(<16 x i8> %66, i32 80)
>  %70 = fmul float %63, %69
>  %71 = call float @llvm.SI.load.const(<16 x i8> %66, i32 80)
>  %72 = fmul float %64, %71
>  %73 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %74 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %75 = load <16 x i8>, <16 x i8> addrspace(2)* %74, align 16, !invariant.load !0
>  %76 = call float @llvm.SI.load.const(<16 x i8> %75, i32 12)
>  %77 = fsub float %73, %76
>  %78 = call float @llvm.maxnum.f32(float %77, float 0.000000e+00)
>  %79 = call float @llvm.SI.load.const(<16 x i8> %75, i32 28)
>  %80 = call float @llvm.SI.load.const(<16 x i8> %75, i32 12)
>  %81 = fsub float %79, %80
>  %82 = fadd float %81, 0x3F50624DE0000000
>  %83 = fdiv float 1.000000e+00, %82, !fpmath !1
>  %84 = fmul float %78, %83
>  %85 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %86 = load <16 x i8>, <16 x i8> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = call float @llvm.SI.load.const(<16 x i8> %86, i32 28)
>  %88 = call float @llvm.floor.f32(float %87)
>  %89 = fsub float %87, %88
>  %90 = fmul float %89, 8.000000e+00
>  %91 = call float @llvm.pow.f32(float %84, float %90)
>  %92 = call float @llvm.AMDGPU.clamp.(float %91, float 0.000000e+00, float 1.000000e+00)
>  %93 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %94 = fmul float %93, %92
>  %95 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %96 = load <16 x i8>, <16 x i8> addrspace(2)* %95, align 16, !invariant.load !0
>  %97 = call float @llvm.SI.load.const(<16 x i8> %96, i32 32)
>  %98 = fsub float 1.000000e+00, %94
>  %99 = fmul float %68, %94
>  %100 = fmul float %97, %98
>  %101 = fadd float %99, %100
>  %102 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %103 = load <16 x i8>, <16 x i8> addrspace(2)* %102, align 16, !invariant.load !0
>  %104 = call float @llvm.SI.load.const(<16 x i8> %103, i32 36)
>  %105 = fsub float 1.000000e+00, %94
>  %106 = fmul float %70, %94
>  %107 = fmul float %104, %105
>  %108 = fadd float %106, %107
>  %109 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %110 = load <16 x i8>, <16 x i8> addrspace(2)* %109, align 16, !invariant.load !0
>  %111 = call float @llvm.SI.load.const(<16 x i8> %110, i32 40)
>  %112 = fsub float 1.000000e+00, %94
>  %113 = fmul float %72, %94
>  %114 = fmul float %111, %112
>  %115 = fadd float %113, %114
>  %116 = bitcast float %5 to i32
>  %117 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %116, 10
>  %118 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %117, float %101, 11
>  %119 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %118, float %108, 12
>  %120 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %119, float %115, 13
>  %121 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %120, float %42, 14
>  %122 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %121, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %122
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[12:15], s[10:11], 0x0                 ; C0860B00
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                   ; C0820B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_bfrev_b32_e32 v0, 1                                  ; 7E007081
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[12:15], 0 idxen ; E00C2000 80030704
>	buffer_load_format_xyzw v[11:14], v5, s[4:7], 0 idxen  ; E00C2000 80010B05
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s20, s[0:3], 0x1d                  ; C20A011D
>	s_buffer_load_dword s21, s[0:3], 0x1e                  ; C20A811E
>	s_buffer_load_dword s22, s[0:3], 0x1f                  ; C20B011F
>	s_buffer_load_dword s28, s[0:3], 0x18                  ; C20E0118
>	s_buffer_load_dword s29, s[0:3], 0x19                  ; C20E8119
>	s_buffer_load_dword s33, s[0:3], 0x11                  ; C2108111
>	s_buffer_load_dword s30, s[0:3], 0x1a                  ; C20F011A
>	s_buffer_load_dword s19, s[0:3], 0x1c                  ; C209811C
>	s_buffer_load_dword s23, s[0:3], 0x20                  ; C20B8120
>	s_buffer_load_dword s25, s[0:3], 0x22                  ; C20C8122
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v15, s22                                 ; 7E1E0216
>	v_mov_b32_e32 v1, s21                                  ; 7E020215
>	v_rcp_f32_e64 v17, |s28|                               ; D3540111 0000001C
>	v_mul_f32_e32 v15, s33, v15                            ; 101E1E21
>	s_buffer_load_dword s24, s[0:3], 0x21                  ; C20C0121
>	v_mul_f32_e32 v15, 0x40c90e56, v15                     ; 101E1EFF 40C90E56
>	v_mul_f32_e32 v15, 0x3e22f983, v15                     ; 101E1EFF 3E22F983
>	s_waitcnt vmcnt(1)                                     ; BF8C0F71
>	v_mov_b32_e32 v13, s25                                 ; 7E1A0219
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	v_mov_b32_e32 v5, s23                                  ; 7E0A0217
>	v_xor_b32_e32 v16, s30, v0                             ; 3A20001E
>	v_cmp_lt_f32_e32 vcc, s30, v0                          ; 7C02001E
>	v_fract_f32_e32 v15, v15                               ; 7E1E410F
>	v_mul_f32_e32 v0, s33, v17                             ; 10002221
>	s_buffer_load_dword s26, s[0:3], 0x23                  ; C20D0123
>	s_buffer_load_dword s6, s[0:3], 0x2                    ; C2030102
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s7, s[0:3], 0x3                    ; C2038103
>	s_buffer_load_dword s10, s[0:3], 0x6                   ; C2050106
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mov_b32_e32 v6, s24                                  ; 7E0C0218
>	s_buffer_load_dword s8, s[0:3], 0x4                    ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                    ; C2048105
>	s_buffer_load_dword s11, s[0:3], 0x7                   ; C2058107
>	s_buffer_load_dword s12, s[0:3], 0x8                   ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                   ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                   ; C207010A
>	s_buffer_load_dword s15, s[0:3], 0xb                   ; C207810B
>	s_buffer_load_dword s16, s[0:3], 0xc                   ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                   ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                   ; C209010E
>	s_buffer_load_dword s27, s[0:3], 0x17                  ; C20D8117
>	s_buffer_load_dword s31, s[0:3], 0x1b                  ; C20F811B
>	s_buffer_load_dword s32, s[0:3], 0xf                   ; C210010F
>	s_buffer_load_dword s34, s[0:3], 0x14                  ; C2110114
>	s_buffer_load_dword s35, s[0:3], 0x15                  ; C2118115
>	s_buffer_load_dword s2, s[0:3], 0x16                   ; C2010116
>	v_cmp_gt_f32_e64 s[0:1], s28, 0                        ; D0080000 0001001C
>	v_mov_b32_e32 v14, s26                                 ; 7E1C021A
>	v_add_f32_e32 v12, s20, v12                            ; 06181814
>	v_mac_f32_e32 v12, s33, v1                             ; 3E180221
>	v_rcp_f32_e32 v1, s29                                  ; 7E02541D
>	v_add_f32_e32 v11, s19, v11                            ; 06161613
>	v_mac_f32_e32 v11, s33, v5                             ; 3E160A21
>	v_sin_f32_e32 v5, v15                                  ; 7E0A6B0F
>	v_mad_f32 v3, s33, v13, v3                             ; D2820003 040E1A21
>	v_mul_f32_e32 v13, v1, v0                              ; 101A0101
>	v_floor_f32_e32 v13, v13                               ; 7E1A490D
>	v_cos_f32_e32 v15, v15                                 ; 7E1E6D0F
>	v_mad_f32 v0, v0, v1, -v13                             ; D2820000 84360300
>	v_mov_b32_e32 v13, s28                                 ; 7E1A021C
>	v_mac_f32_e32 v12, s33, v6                             ; 3E180C21
>	v_cndmask_b32_e64 v13, v13, 1.0, s[0:1]                ; D200000D 0001E50D
>	v_add_f32_e32 v6, -0.5, v11                            ; 060C16F1
>	v_add_f32_e32 v11, -0.5, v12                           ; 061618F1
>	v_mad_f32 v12, v6, v5, 0.5                             ; D282000C 03C20B06
>	v_mul_f32_e32 v5, v5, v11                              ; 100A1705
>	v_cmp_le_f32_e64 s[0:1], 0, v13                        ; D0060000 00021A80
>	v_mul_f32_e32 v0, s29, v0                              ; 1000001D
>	v_mad_f32 v5, v6, v15, -v5                             ; D2820005 84161F06
>	v_mac_f32_e32 v12, v15, v11                            ; 3E18170F
>	v_mul_f32_e32 v15, s6, v7                              ; 101E0E06
>	v_cndmask_b32_e64 v13, -1.0, v13, s[0:1]               ; D200000D 00021AF3
>	v_floor_f32_e32 v0, v0                                 ; 7E004900
>	v_mul_f32_e32 v11, s4, v7                              ; 10160E04
>	v_mul_f32_e32 v6, s5, v7                               ; 100C0E05
>	v_mac_f32_e32 v15, s10, v8                             ; 3E1E100A
>	v_mac_f32_e32 v4, s33, v14                             ; 3E081C21
>	v_mul_f32_e32 v14, s7, v7                              ; 101C0E07
>	v_mul_f32_e32 v0, v0, v13                              ; 10001B00
>	v_add_f32_e32 v5, 0.5, v5                              ; 060A0AF0
>	v_rcp_f32_e64 v13, |s30|                               ; D354010D 0000001E
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	v_mac_f32_e32 v11, s8, v8                              ; 3E161008
>	v_mac_f32_e32 v6, s9, v8                               ; 3E0C1009
>	v_mac_f32_e32 v14, s11, v8                             ; 3E1C100B
>	v_mac_f32_e32 v15, s14, v9                             ; 3E1E120E
>	v_mac_f32_e32 v5, v1, v0                               ; 3E0A0101
>	v_rcp_f32_e32 v0, s31                                  ; 7E00541F
>	v_mac_f32_e32 v11, s12, v9                             ; 3E16120C
>	v_mac_f32_e32 v6, s13, v9                              ; 3E0C120D
>	v_mac_f32_e32 v14, s15, v9                             ; 3E1C120F
>	v_mac_f32_e32 v15, s18, v10                            ; 3E1E1412
>	v_mac_f32_e32 v11, s16, v10                            ; 3E161410
>	v_mac_f32_e32 v6, s17, v10                             ; 3E0C1411
>	v_mac_f32_e32 v14, s32, v10                            ; 3E1C1420
>	v_add_f32_e32 v10, 0xb827c5ac, v15                     ; 06141EFF B827C5AC
>	v_cndmask_b32_e64 v15, v16, 1.0, vcc                   ; D200000F 01A9E510
>	v_cmp_le_f32_e32 vcc, 0, v15                           ; 7C061E80
>	v_mul_f32_e32 v13, s33, v13                            ; 101A1A21
>	v_cndmask_b32_e32 v1, -1.0, v15, vcc                   ; 00021EF3
>	v_mul_f32_e32 v15, v0, v13                             ; 101E1B00
>	v_floor_f32_e32 v15, v15                               ; 7E1E490F
>	v_mad_f32 v13, v13, v0, -v15                           ; D282000D 843E010D
>	v_mov_b32_e32 v15, s34                                 ; 7E1E0222
>	v_mac_f32_e32 v15, s35, v10                            ; 3E1E1423
>	v_add_f32_e64 v15, v15, 0 clamp                        ; D206080F 0001010F
>	v_log_f32_e32 v15, v15                                 ; 7E1E4F0F
>	v_mul_f32_e32 v13, s31, v13                            ; 101A1A1F
>	v_floor_f32_e32 v13, v13                               ; 7E1A490D
>	v_mul_f32_e32 v1, v13, v1                              ; 1002030D
>	v_mac_f32_e32 v12, v0, v1                              ; 3E180300
>	v_mul_legacy_f32_e32 v0, s2, v15                       ; 0E001E02
>	v_exp_f32_e32 v0, v0                                   ; 7E004B00
>	v_sub_f32_e64 v1, 1.0, s27                             ; D2080001 000036F2
>	v_mac_f32_e32 v1, s27, v0                              ; 3E02001B
>	v_mul_f32_e32 v0, v1, v1                               ; 10000301
>	exp 15, 32, 0, 0, 0, v5, v12, v3, v4                   ; F800020F 04030C05
>	exp 15, 33, 0, 0, 0, v0, v7, v8, v9                    ; F800021F 09080700
>	exp 15, 12, 0, 1, 0, v11, v6, v10, v14                 ; F80008CF 0E0A060B
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 640 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                    ; BE80047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                      ; C08E050C
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                     ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	v_mov_b32_e32 v5, v2                                      ; 7E0A0302
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_mov_b32_e32 v4, v3                                      ; 7E080303
>	v_interp_p1_f32 v0, v5, 2, 0, [m0]                        ; C8000205
>	v_interp_p2_f32 v0, [v0], v4, 2, 0, [m0]                  ; C8010204
>	v_interp_p1_f32 v1, v5, 3, 0, [m0]                        ; C8040305
>	v_interp_p2_f32 v1, [v1], v4, 3, 0, [m0]                  ; C8050304
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s4, s4, s27                                     ; 87041B04
>	image_sample v[0:3], v[0:1], s[20:27], s[4:7] dmask:0xf   ; F0800F00 00250000
>	v_interp_p1_f32 v6, v5, 0, 0, [m0]                        ; C8180005
>	v_interp_p2_f32 v6, [v6], v4, 0, 0, [m0]                  ; C8190004
>	v_interp_p1_f32 v7, v5, 1, 0, [m0]                        ; C81C0105
>	s_and_b32 s28, s28, s19                                   ; 871C131C
>	v_interp_p2_f32 v7, [v7], v4, 1, 0, [m0]                  ; C81D0104
>	s_and_b64 exec, exec, s[0:1]                              ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	image_sample v[6:8], v[6:7], s[12:19], s[28:31] dmask:0x7 ; F0800700 00E30606
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v0, v0, v6                                  ; 10000D00
>	v_mul_f32_e32 v1, v1, v7                                  ; 10020F01
>	v_mul_f32_e32 v2, v2, v8                                  ; 10041102
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x14                      ; C2020114
>	s_buffer_load_dword s5, s[0:3], 0x7                       ; C2028107
>	v_interp_p1_f32 v6, v5, 2, 1, [m0]                        ; C8180605
>	v_interp_p2_f32 v6, [v6], v4, 2, 1, [m0]                  ; C8190604
>	s_buffer_load_dword s6, s[0:3], 0x8                       ; C2030108
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mul_f32_e32 v7, s4, v0                                  ; 100E0004
>	v_mul_f32_e32 v8, s4, v1                                  ; 10100204
>	v_mul_f32_e32 v9, s4, v2                                  ; 10120404
>	s_buffer_load_dword s4, s[0:3], 0x3                       ; C2020103
>	s_buffer_load_dword s7, s[0:3], 0x9                       ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                       ; C200010A
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mov_b32_e32 v0, s4                                      ; 7E000204
>	v_sub_f32_e32 v0, s5, v0                                  ; 08000005
>	v_add_f32_e32 v0, 0x3a83126f, v0                          ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                      ; 7E005500
>	v_subrev_f32_e32 v1, s4, v6                               ; 0A020C04
>	v_max_f32_e32 v1, 0, v1                                   ; 20020280
>	v_mul_f32_e32 v0, v0, v1                                  ; 10000300
>	v_log_f32_e32 v0, v0                                      ; 7E004F00
>	v_floor_f32_e32 v1, s5                                    ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                  ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                          ; 100202FF 41000000
>	v_mul_legacy_f32_e32 v0, v1, v0                           ; 0E000101
>	v_interp_p1_f32 v1, v5, 0, 1, [m0]                        ; C8040405
>	v_exp_f32_e32 v0, v0                                      ; 7E004B00
>	v_add_f32_e64 v0, v0, 0 clamp                             ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v4, 0, 1, [m0]                  ; C8050404
>	v_mul_f32_e32 v4, v0, v1                                  ; 10080300
>	v_mad_f32 v0, -v4, s6, s6                                 ; D2820000 20180D04
>	v_mad_f32 v1, -v4, s7, s7                                 ; D2820001 201C0F04
>	v_mad_f32 v2, -v4, s0, s0                                 ; D2820002 20000104
>	v_mac_f32_e32 v0, v4, v7                                  ; 3E000F04
>	v_mac_f32_e32 v1, v4, v8                                  ; 3E021104
>	v_mac_f32_e32 v2, v4, v9                                  ; 3E041304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 312 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0xc                  ; C0860B0C
>	s_load_dwordx4 s[16:19], s[10:11], 0x10                 ; C0880B10
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[15:18], v4, s[4:7], 0 idxen   ; E00C2000 80010F04
>	buffer_load_format_xyzw v[11:14], v7, s[12:15], 0 idxen ; E00C2000 80030B07
>	buffer_load_format_xyzw v[7:10], v8, s[16:19], 0 idxen  ; E00C2000 80040708
>	s_buffer_load_dword s7, s[0:3], 0x10                    ; C2038110
>	s_buffer_load_dword s8, s[0:3], 0x11                    ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                    ; C2048112
>	s_buffer_load_dword s12, s[0:3], 0x37c                  ; C20600FF 0000037C
>	s_buffer_load_dword s6, s[0:3], 0x39c                   ; C20300FF 0000039C
>	s_buffer_load_dword s5, s[0:3], 0x39d                   ; C20280FF 0000039D
>	s_buffer_load_dword s4, s[0:3], 0x39e                   ; C20200FF 0000039E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s7                                    ; 7E000207
>	s_cmp_eq_u32 s12, -1                                    ; BF06C10C
>	v_mov_b32_e32 v1, s8                                    ; 7E020208
>	v_mov_b32_e32 v3, s9                                    ; 7E060209
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s7, s[0:3], 0x1c                    ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                    ; C204011D
>	s_buffer_load_dword s9, s[0:3], 0x1e                    ; C204811E
>	s_buffer_load_dword s10, s[0:3], 0x1f                   ; C205011F
>	s_buffer_load_dword s11, s[0:3], 0x20                   ; C2058120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s7                                    ; 7E120207
>	v_mov_b32_e32 v10, s8                                   ; 7E140208
>	s_buffer_load_dword s7, s[0:3], 0x21                    ; C2038121
>	s_buffer_load_dword s8, s[0:3], 0x22                    ; C2040122
>	v_mov_b32_e32 v4, s9                                    ; 7E080209
>	v_sub_f32_e32 v6, s10, v0                               ; 080C000A
>	v_mov_b32_e32 v5, s11                                   ; 7E0A020B
>	s_buffer_load_dword s9, s[0:3], 0x23                    ; C2048123
>	s_buffer_load_dword s10, s[0:3], 0x24                   ; C2050124
>	s_buffer_load_dword s11, s[0:3], 0x25                   ; C2058125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v14, s7                                   ; 7E1C0207
>	v_mov_b32_e32 v13, s8                                   ; 7E1A0208
>	s_buffer_load_dword s7, s[0:3], 0x26                    ; C2038126
>	s_buffer_load_dword s8, s[0:3], 0x27                    ; C2040127
>	v_sub_f32_e32 v19, s9, v1                               ; 08260209
>	v_mov_b32_e32 v20, s10                                  ; 7E28020A
>	v_mov_b32_e32 v21, s11                                  ; 7E2A020B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v22, s7                                   ; 7E2C0207
>	v_sub_f32_e32 v23, s8, v3                               ; 082E0608
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[12:15], s[10:11], 0x8                  ; C0860B08
>	s_movk_i32 s18, 0x7c                                    ; B012007C
>	s_movk_i32 s17, 0x70                                    ; B0110070
>	s_movk_i32 s16, 0x78                                    ; B0100078
>	s_buffer_load_dword s7, s[0:3], 0x380                   ; C20380FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[28:31], v6, s[12:15], 0 idxen ; E00C2000 80031C06
>	s_movk_i32 s15, 0x74                                    ; B00F0074
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v28                               ; 7E08111C
>	v_mul_lo_i32 v19, v4, 48                                ; D2D60013 00016104
>	v_add_i32_e32 v6, vcc, s15, v19                         ; 4A0C260F
>	v_add_i32_e32 v14, vcc, s18, v19                        ; 4A1C2612
>	v_add_i32_e32 v4, vcc, s17, v19                         ; 4A082611
>	buffer_load_dword v10, v6, s[0:3], 0 offen              ; E0301000 80000A06
>	buffer_load_dword v6, v14, s[0:3], 0 offen              ; E0301000 8000060E
>	v_add_i32_e32 v13, vcc, s16, v19                        ; 4A1A2610
>	buffer_load_dword v9, v4, s[0:3], 0 offen               ; E0301000 80000904
>	buffer_load_dword v4, v13, s[0:3], 0 offen              ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_subrev_f32_e32 v6, v0, v6                             ; 0A0C0D00
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v13, vcc, 0x8c, v19                       ; 4A1A26FF 0000008C
>	v_add_i32_e32 v22, vcc, 0x9c, v19                       ; 4A2C26FF 0000009C
>	v_add_i32_e32 v20, vcc, 0x88, v19                       ; 4A2826FF 00000088
>	v_add_i32_e32 v5, vcc, 0x80, v19                        ; 4A0A26FF 00000080
>	v_add_i32_e32 v14, vcc, 0x84, v19                       ; 4A1C26FF 00000084
>	v_add_i32_e32 v21, vcc, 0x94, v19                       ; 4A2A26FF 00000094
>	buffer_load_dword v23, v13, s[0:3], 0 offen             ; E0301000 8000170D
>	buffer_load_dword v13, v20, s[0:3], 0 offen             ; E0301000 80000D14
>	v_add_i32_e32 v20, vcc, 0x90, v19                       ; 4A2826FF 00000090
>	v_add_i32_e32 v19, vcc, 0x98, v19                       ; 4A2626FF 00000098
>	buffer_load_dword v24, v22, s[0:3], 0 offen             ; E0301000 80001816
>	buffer_load_dword v22, v19, s[0:3], 0 offen             ; E0301000 80001613
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v19, v1, v23                           ; 0A262F01
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_subrev_f32_e32 v23, v3, v24                           ; 0A2E3103
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                   ; C0840B04
>	s_movk_i32 s7, 0x9c                                     ; B007009C
>	s_movk_i32 s14, 0x8c                                    ; B00E008C
>	v_add_i32_e32 v21, vcc, s7, v19                         ; 4A2A2607
>	s_movk_i32 s13, 0x80                                    ; B00D0080
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v5, s[8:11], 0 idxen  ; E00C2000 80021805
>	v_cvt_i32_f32_e32 v5, v29                               ; 7E0A111D
>	s_movk_i32 s12, 0x84                                    ; B00C0084
>	s_movk_i32 s11, 0x88                                    ; B00B0088
>	s_movk_i32 s9, 0x94                                     ; B0090094
>	v_mul_lo_i32 v28, v5, 48                                ; D2D6001C 00016105
>	v_add_i32_e32 v5, vcc, s14, v19                         ; 4A0A260E
>	s_movk_i32 s10, 0x90                                    ; B00A0090
>	s_movk_i32 s8, 0x98                                     ; B0080098
>	v_add_i32_e32 v13, vcc, s13, v19                        ; 4A1A260D
>	v_add_i32_e32 v14, vcc, s12, v19                        ; 4A1C260C
>	v_add_i32_e32 v20, vcc, s11, v19                        ; 4A28260B
>	v_add_i32_e32 v23, vcc, s9, v19                         ; 4A2E2609
>	buffer_load_dword v22, v5, s[0:3], 0 offen              ; E0301000 80001605
>	v_add_i32_e32 v5, vcc, s10, v19                         ; 4A0A260A
>	v_add_i32_e32 v19, vcc, s8, v19                         ; 4A262608
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v32, v19, s[0:3], 0 offen             ; E0301000 80002013
>	buffer_load_dword v13, v13, s[0:3], 0 offen             ; E0301000 80000D0D
>	buffer_load_dword v29, v5, s[0:3], 0 offen              ; E0301000 80001D05
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v9, v24, v9                               ; 10121318
>	v_mul_f32_e32 v10, v24, v10                             ; 10141518
>	v_mul_f32_e32 v4, v24, v4                               ; 10080918
>	v_mul_f32_e32 v6, v24, v6                               ; 100C0D18
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v19, v1, v22                           ; 0A262D01
>	v_mul_f32_e32 v19, v24, v19                             ; 10262718
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v33, v3, v21                           ; 0A422B03
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v14, v24, v14                             ; 101C1D18
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v22, v24, v32                             ; 102C4118
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v5, v24, v13                              ; 100A1B18
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mul_f32_e32 v13, v24, v20                             ; 101A2918
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v21, v24, v23                             ; 102A2F18
>	v_mul_f32_e32 v20, v24, v29                             ; 10283B18
>	v_mul_f32_e32 v23, v24, v33                             ; 102E4318
>	v_add_i32_e32 v24, vcc, s18, v28                        ; 4A303812
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v0, v24                           ; 0A303100
>	v_mac_f32_e32 v6, v25, v24                              ; 3E0C3119
>	v_add_i32_e32 v24, vcc, s14, v28                        ; 4A30380E
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v1, v24                           ; 0A303101
>	v_mac_f32_e32 v19, v25, v24                             ; 3E263119
>	v_add_i32_e32 v24, vcc, s17, v28                        ; 4A303811
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v25, v24                              ; 3E123119
>	v_add_i32_e32 v24, vcc, s15, v28                        ; 4A30380F
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_buffer_load_dword s15, s[0:3], 0x384                  ; C20780FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s15, 0                                     ; BF06800F
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v25, v24                             ; 3E143119
>	v_add_i32_e32 v24, vcc, s16, v28                        ; 4A303810
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v25, v24                              ; 3E083119
>	v_add_i32_e32 v24, vcc, s13, v28                        ; 4A30380D
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v25, v24                              ; 3E0A3119
>	v_add_i32_e32 v24, vcc, s12, v28                        ; 4A30380C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v25, v24                             ; 3E1C3119
>	v_add_i32_e32 v24, vcc, s11, v28                        ; 4A30380B
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v25, v24                             ; 3E1A3119
>	v_add_i32_e32 v24, vcc, s10, v28                        ; 4A30380A
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v25, v24                             ; 3E283119
>	v_add_i32_e32 v24, vcc, s9, v28                         ; 4A303809
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v25, v24                             ; 3E2A3119
>	v_add_i32_e32 v24, vcc, s8, v28                         ; 4A303808
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v25, v24                             ; 3E2C3119
>	v_add_i32_e32 v24, vcc, s7, v28                         ; 4A303807
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v3, v24                           ; 0A303103
>	v_mac_f32_e32 v23, v25, v24                             ; 3E2E3119
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v24, v30                              ; 7E30111E
>	v_mul_lo_i32 v24, v24, 48                               ; D2D60018 00016118
>	v_add_i32_e32 v25, vcc, 0x70, v24                       ; 4A3230FF 00000070
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v26, v25                              ; 3E12331A
>	v_add_i32_e32 v25, vcc, 0x7c, v24                       ; 4A3230FF 0000007C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v0, v25                           ; 0A323300
>	v_mac_f32_e32 v6, v26, v25                              ; 3E0C331A
>	v_add_i32_e32 v25, vcc, s14, v24                        ; 4A32300E
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v1, v25                           ; 0A323301
>	v_mac_f32_e32 v19, v26, v25                             ; 3E26331A
>	v_add_i32_e32 v25, vcc, 0x74, v24                       ; 4A3230FF 00000074
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v26, v25                             ; 3E14331A
>	v_add_i32_e32 v25, vcc, 0x78, v24                       ; 4A3230FF 00000078
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v25                              ; 3E08331A
>	v_add_i32_e32 v25, vcc, s13, v24                        ; 4A32300D
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v25                              ; 3E0A331A
>	v_add_i32_e32 v25, vcc, s12, v24                        ; 4A32300C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v26, v25                             ; 3E1C331A
>	v_add_i32_e32 v25, vcc, s11, v24                        ; 4A32300B
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v26, v25                             ; 3E1A331A
>	v_add_i32_e32 v25, vcc, s10, v24                        ; 4A32300A
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v26, v25                             ; 3E28331A
>	v_add_i32_e32 v25, vcc, s9, v24                         ; 4A323009
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v26, v25                             ; 3E2A331A
>	v_add_i32_e32 v25, vcc, s8, v24                         ; 4A323008
>	v_add_i32_e32 v24, vcc, s7, v24                         ; 4A303007
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v24, v3, v24                           ; 0A303103
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v26, v25                             ; 3E2C331A
>	v_mac_f32_e32 v23, v26, v24                             ; 3E2E311A
>	s_buffer_load_dword s7, s[0:3], 0x388                   ; C20380FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s7, 0                                      ; BF068007
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v24, v31                              ; 7E30111F
>	v_mul_lo_i32 v24, v24, 48                               ; D2D60018 00016118
>	v_add_i32_e32 v25, vcc, 0x70, v24                       ; 4A3230FF 00000070
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v27, v25                              ; 3E12331B
>	v_add_i32_e32 v25, vcc, 0x7c, v24                       ; 4A3230FF 0000007C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v0, v25                           ; 0A323300
>	v_mac_f32_e32 v6, v27, v25                              ; 3E0C331B
>	v_add_i32_e32 v25, vcc, 0x8c, v24                       ; 4A3230FF 0000008C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v1, v25                           ; 0A323301
>	v_mac_f32_e32 v19, v27, v25                             ; 3E26331B
>	v_add_i32_e32 v25, vcc, 0x74, v24                       ; 4A3230FF 00000074
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v10, v27, v25                             ; 3E14331B
>	v_add_i32_e32 v25, vcc, 0x78, v24                       ; 4A3230FF 00000078
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v27, v25                              ; 3E08331B
>	v_add_i32_e32 v25, vcc, 0x80, v24                       ; 4A3230FF 00000080
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v27, v25                              ; 3E0A331B
>	v_add_i32_e32 v25, vcc, 0x84, v24                       ; 4A3230FF 00000084
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v27, v25                             ; 3E1C331B
>	v_add_i32_e32 v25, vcc, 0x88, v24                       ; 4A3230FF 00000088
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v27, v25                             ; 3E1A331B
>	v_add_i32_e32 v25, vcc, 0x90, v24                       ; 4A3230FF 00000090
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v27, v25                             ; 3E28331B
>	v_add_i32_e32 v25, vcc, 0x94, v24                       ; 4A3230FF 00000094
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v27, v25                             ; 3E2A331B
>	v_add_i32_e32 v25, vcc, 0x98, v24                       ; 4A3230FF 00000098
>	v_add_i32_e32 v24, vcc, 0x9c, v24                       ; 4A3030FF 0000009C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v24, v3, v24                           ; 0A303103
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v27, v25                             ; 3E2C331B
>	v_mac_f32_e32 v23, v27, v24                             ; 3E2E311B
>	v_mul_f32_e32 v16, s5, v16                              ; 10202005
>	v_mul_f32_e32 v15, s6, v15                              ; 101E1E06
>	v_mul_f32_e32 v10, v10, v16                             ; 1014210A
>	v_mac_f32_e32 v10, v9, v15                              ; 3E141F09
>	v_mul_f32_e32 v9, v14, v16                              ; 1012210E
>	v_mac_f32_e32 v9, v5, v15                               ; 3E121F05
>	v_mul_f32_e32 v5, s4, v17                               ; 100A2204
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	v_mac_f32_e32 v10, v4, v5                               ; 3E140B04
>	v_mul_f32_e32 v4, v21, v16                              ; 10082115
>	v_mac_f32_e32 v4, v20, v15                              ; 3E081F14
>	v_mac_f32_e32 v10, v6, v18                              ; 3E142506
>	v_mac_f32_e32 v4, v22, v5                               ; 3E080B16
>	v_mac_f32_e32 v4, v23, v18                              ; 3E082517
>	v_add_f32_e32 v0, v0, v10                               ; 06001500
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_add_f32_e32 v3, v3, v4                                ; 06060903
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                                ; 10080004
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	v_mul_f32_e32 v6, 0, v16                                ; 100C2080
>	v_mac_f32_e32 v9, v13, v5                               ; 3E120B0D
>	v_mac_f32_e32 v6, 0, v15                                ; 3E0C1E80
>	v_mac_f32_e32 v6, 0, v5                                 ; 3E0C0A80
>	v_mac_f32_e32 v9, v19, v18                              ; 3E122513
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_add_f32_e32 v5, v18, v6                               ; 060A0D12
>	v_add_f32_e32 v1, v1, v9                                ; 06021301
>	v_mul_f32_e32 v6, s5, v0                                ; 100C0005
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v6, s4, v1                                ; 3E0C0204
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	v_mul_f32_e32 v9, s6, v0                                ; 10120006
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	v_mac_f32_e32 v9, s5, v1                                ; 3E120205
>	v_mac_f32_e32 v4, s8, v1                                ; 3E080208
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mul_f32_e32 v10, s7, v0                               ; 10140007
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v9, s4, v3                                ; 3E120604
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	v_mac_f32_e32 v10, s6, v1                               ; 3E140206
>	v_mac_f32_e32 v10, s5, v3                               ; 3E140605
>	v_mac_f32_e32 v6, s8, v3                                ; 3E0C0608
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	v_mac_f32_e32 v4, s7, v3                                ; 3E080607
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v10, s4, v5                               ; 3E140A04
>	s_buffer_load_dword s4, s[0:3], 0x390                   ; C20200FF 00000390
>	s_buffer_load_dword s9, s[0:3], 0x391                   ; C20480FF 00000391
>	s_buffer_load_dword s10, s[0:3], 0x392                  ; C20500FF 00000392
>	v_mac_f32_e32 v9, s8, v5                                ; 3E120A08
>	s_buffer_load_dword s5, s[0:3], 0x15                    ; C2028115
>	s_buffer_load_dword s12, s[0:3], 0x394                  ; C20600FF 00000394
>	v_mac_f32_e32 v4, s6, v5                                ; 3E080A06
>	v_mac_f32_e32 v6, s7, v5                                ; 3E0C0A07
>	v_add_f32_e32 v5, 0xb9d1b717, v9                        ; 060A12FF B9D1B717
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_add_f32_e32 v9, s4, v11                               ; 06121604
>	s_buffer_load_dword s4, s[0:3], 0x395                   ; C20200FF 00000395
>	v_add_f32_e32 v11, s9, v12                              ; 06161809
>	s_buffer_load_dword s9, s[0:3], 0x396                   ; C20480FF 00000396
>	v_mov_b32_e32 v12, s10                                  ; 7E18020A
>	s_buffer_load_dword s10, s[0:3], 0x397                  ; C20500FF 00000397
>	s_buffer_load_dword s11, s[0:3], 0x393                  ; C20580FF 00000393
>	v_mac_f32_e32 v11, s5, v12                              ; 3E161805
>	v_mov_b32_e32 v12, s12                                  ; 7E18020C
>	v_mac_f32_e32 v9, s5, v12                               ; 3E121805
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v12, s4                                   ; 7E180204
>	v_mac_f32_e32 v11, s5, v12                              ; 3E161805
>	v_mov_b32_e32 v12, s9                                   ; 7E180209
>	v_mad_f32 v7, s5, v12, v7                               ; D2820007 041E1805
>	v_mov_b32_e32 v12, s10                                  ; 7E18020A
>	v_mac_f32_e32 v8, s5, v12                               ; 3E101805
>	v_mov_b32_e32 v12, s11                                  ; 7E18020B
>	v_mul_f32_e32 v12, s5, v12                              ; 10181805
>	v_mul_f32_e32 v12, 0x40c90e56, v12                      ; 101818FF 40C90E56
>	v_mul_f32_e32 v12, 0x3e22f983, v12                      ; 101818FF 3E22F983
>	v_fract_f32_e32 v12, v12                                ; 7E18410C
>	v_sin_f32_e32 v13, v12                                  ; 7E1A6B0C
>	v_cos_f32_e32 v12, v12                                  ; 7E186D0C
>	s_buffer_load_dword s9, s[0:3], 0x38c                   ; C20480FF 0000038C
>	s_buffer_load_dword s10, s[0:3], 0x38d                  ; C20500FF 0000038D
>	v_add_f32_e32 v11, -0.5, v11                            ; 061616F1
>	s_buffer_load_dword s11, s[0:3], 0x38e                  ; C20580FF 0000038E
>	s_buffer_load_dword s6, s[0:3], 0x18                    ; C2030118
>	s_buffer_load_dword s7, s[0:3], 0x19                    ; C2038119
>	s_buffer_load_dword s8, s[0:3], 0x1a                    ; C204011A
>	s_buffer_load_dword s4, s[0:3], 0x1b                    ; C202011B
>	s_buffer_load_dword s2, s[0:3], 0x38f                   ; C20100FF 0000038F
>	v_add_f32_e32 v9, -0.5, v9                              ; 061212F1
>	v_mul_f32_e32 v14, v13, v11                             ; 101C170D
>	v_mad_f32 v14, v9, v12, -v14                            ; D282000E 843A1909
>	v_mad_f32 v9, v9, v13, 0.5                              ; D2820009 03C21B09
>	v_mac_f32_e32 v9, v12, v11                              ; 3E12170C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_rcp_f32_e64 v11, |s9|                                 ; D354010B 00000009
>	v_rcp_f32_e32 v13, s10                                  ; 7E1A540A
>	v_rcp_f32_e64 v12, |s11|                                ; D354010C 0000000B
>	v_rcp_f32_e32 v15, s2                                   ; 7E1E5402
>	v_mul_f32_e32 v11, s5, v11                              ; 10161605
>	v_mul_f32_e32 v16, v13, v11                             ; 1020170D
>	v_floor_f32_e32 v16, v16                                ; 7E204910
>	v_mul_f32_e32 v12, s5, v12                              ; 10181805
>	v_mad_f32 v11, v11, v13, -v16                           ; D282000B 84421B0B
>	v_mul_f32_e32 v16, v15, v12                             ; 1020190F
>	v_floor_f32_e32 v16, v16                                ; 7E204910
>	v_mad_f32 v12, v12, v15, -v16                           ; D282000C 84421F0C
>	v_cmp_gt_f32_e64 s[0:1], s9, 0                          ; D0080000 00010009
>	v_mov_b32_e32 v16, s9                                   ; 7E200209
>	v_cndmask_b32_e64 v16, v16, 1.0, s[0:1]                 ; D2000010 0001E510
>	v_cmp_le_f32_e32 vcc, 0, v16                            ; 7C062080
>	v_mul_f32_e32 v11, s10, v11                             ; 1016160A
>	v_cndmask_b32_e32 v16, -1.0, v16, vcc                   ; 002020F3
>	v_floor_f32_e32 v11, v11                                ; 7E16490B
>	v_mul_f32_e32 v11, v11, v16                             ; 1016210B
>	v_bfrev_b32_e32 v16, 1                                  ; 7E207081
>	v_cmp_lt_f32_e32 vcc, s11, v16                          ; 7C02200B
>	v_xor_b32_e32 v16, s11, v16                             ; 3A20200B
>	v_cndmask_b32_e64 v16, v16, 1.0, vcc                    ; D2000010 01A9E510
>	v_cmp_le_f32_e32 vcc, 0, v16                            ; 7C062080
>	v_mul_f32_e32 v12, s2, v12                              ; 10181802
>	v_cndmask_b32_e32 v16, -1.0, v16, vcc                   ; 002020F3
>	v_floor_f32_e32 v12, v12                                ; 7E18490C
>	v_mul_f32_e32 v12, v12, v16                             ; 1018210C
>	v_mov_b32_e32 v16, s6                                   ; 7E200206
>	v_mac_f32_e32 v16, s7, v5                               ; 3E200A07
>	v_add_f32_e64 v16, v16, 0 clamp                         ; D2060810 00010110
>	v_log_f32_e32 v16, v16                                  ; 7E204F10
>	v_add_f32_e32 v14, 0.5, v14                             ; 061C1CF0
>	v_mac_f32_e32 v14, v13, v11                             ; 3E1C170D
>	v_mac_f32_e32 v9, v15, v12                              ; 3E12190F
>	v_mul_legacy_f32_e32 v11, s8, v16                       ; 0E162008
>	v_exp_f32_e32 v11, v11                                  ; 7E164B0B
>	v_sub_f32_e64 v12, 1.0, s4                              ; D208000C 000008F2
>	v_mac_f32_e32 v12, s4, v11                              ; 3E181604
>	v_mul_f32_e32 v11, v12, v12                             ; 1016190C
>	exp 15, 32, 0, 0, 0, v14, v9, v7, v8                    ; F800020F 0807090E
>	exp 15, 33, 0, 0, 0, v11, v0, v1, v3                    ; F800021F 0301000B
>	exp 15, 12, 0, 1, 0, v4, v6, v5, v10                    ; F80008CF 0A050604
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2372 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                    ; BE80047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                      ; C08E050C
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                     ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	v_mov_b32_e32 v5, v2                                      ; 7E0A0302
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_mov_b32_e32 v4, v3                                      ; 7E080303
>	v_interp_p1_f32 v0, v5, 2, 0, [m0]                        ; C8000205
>	v_interp_p2_f32 v0, [v0], v4, 2, 0, [m0]                  ; C8010204
>	v_interp_p1_f32 v1, v5, 3, 0, [m0]                        ; C8040305
>	v_interp_p2_f32 v1, [v1], v4, 3, 0, [m0]                  ; C8050304
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s4, s4, s27                                     ; 87041B04
>	image_sample v[0:3], v[0:1], s[20:27], s[4:7] dmask:0xf   ; F0800F00 00250000
>	v_interp_p1_f32 v6, v5, 0, 0, [m0]                        ; C8180005
>	v_interp_p2_f32 v6, [v6], v4, 0, 0, [m0]                  ; C8190004
>	v_interp_p1_f32 v7, v5, 1, 0, [m0]                        ; C81C0105
>	s_and_b32 s28, s28, s19                                   ; 871C131C
>	v_interp_p2_f32 v7, [v7], v4, 1, 0, [m0]                  ; C81D0104
>	s_and_b64 exec, exec, s[0:1]                              ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	image_sample v[6:8], v[6:7], s[12:19], s[28:31] dmask:0x7 ; F0800700 00E30606
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v1, v1, v7                                  ; 10020F01
>	v_mul_f32_e32 v0, v0, v6                                  ; 10000D00
>	v_interp_p1_f32 v6, v5, 2, 1, [m0]                        ; C8180605
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x3                       ; C2020103
>	s_buffer_load_dword s5, s[0:3], 0x7                       ; C2028107
>	v_interp_p2_f32 v6, [v6], v4, 2, 1, [m0]                  ; C8190604
>	s_buffer_load_dword s0, s[0:3], 0x10                      ; C2000110
>	v_interp_p1_f32 v5, v5, 0, 1, [m0]                        ; C8140405
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mov_b32_e32 v7, s4                                      ; 7E0E0204
>	v_sub_f32_e32 v7, s5, v7                                  ; 080E0E05
>	v_add_f32_e32 v7, 0x3a83126f, v7                          ; 060E0EFF 3A83126F
>	v_rcp_f32_e32 v7, v7                                      ; 7E0E5507
>	v_subrev_f32_e32 v6, s4, v6                               ; 0A0C0C04
>	v_max_f32_e32 v6, 0, v6                                   ; 200C0C80
>	v_mul_f32_e32 v2, v2, v8                                  ; 10041102
>	v_mul_f32_e32 v6, v7, v6                                  ; 100C0D07
>	v_log_f32_e32 v6, v6                                      ; 7E0C4F06
>	v_floor_f32_e32 v7, s5                                    ; 7E0E4805
>	v_sub_f32_e32 v7, s5, v7                                  ; 080E0E05
>	v_mul_f32_e32 v7, 0x41000000, v7                          ; 100E0EFF 41000000
>	v_mul_legacy_f32_e32 v6, v7, v6                           ; 0E0C0D07
>	v_exp_f32_e32 v6, v6                                      ; 7E0C4B06
>	v_add_f32_e64 v6, v6, 0 clamp                             ; D2060806 00010106
>	v_interp_p2_f32 v5, [v5], v4, 0, 1, [m0]                  ; C8150404
>	v_mul_f32_e32 v0, s0, v0                                  ; 10000000
>	v_mul_f32_e32 v4, v6, v5                                  ; 10080B06
>	v_mul_f32_e32 v1, s0, v1                                  ; 10020200
>	v_mul_f32_e32 v2, s0, v2                                  ; 10040400
>	v_mul_f32_e32 v0, v4, v0                                  ; 10000104
>	v_mul_f32_e32 v1, v4, v1                                  ; 10020304
>	v_mul_f32_e32 v2, v4, v2                                  ; 10040504
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 272 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL CONST[0..3]
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
>  0: MAD TEMP[0].xy, IN[0].xyyy, CONST[2].xyyy, CONST[2].zwww
>  1: MUL TEMP[0].xy, TEMP[0].xyyy, IMM[0].xxxx
>  2: MAD TEMP[0].xy, TEMP[0].xyyy, CONST[0].xyyy, IMM[0].yyyy
>  3: MOV TEMP[1].zw, IMM[0].wwzw
>  4: MOV TEMP[1].x, TEMP[0].xyxx
>  5: MOV TEMP[1].xzw, TEMP[1].xxzw
>  6: MUL TEMP[0].x, TEMP[0].yyyy, CONST[1].zzzz
>  7: MOV TEMP[1].y, TEMP[0].xxxx
>  8: MAD TEMP[0].xy, IN[0].xyyy, CONST[3].xyyy, CONST[3].zwww
>  9: ADD TEMP[0].xy, TEMP[0].xyyy, IMM[1].xxxx
> 10: MOV TEMP[2].xy, IN[2].xyxx
> 11: MOV TEMP[2].zw, TEMP[0].yyxy
> 12: MOV OUT[2], TEMP[2]
> 13: MOV OUT[0], TEMP[1]
> 14: MOV OUT[1], IN[1].zyxw
> 15: END
>radeonsi: Compiling shader 107
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %23 = load <16 x i8>, <16 x i8> addrspace(2)* %22, align 16, !invariant.load !0
>  %24 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %23, i32 0, i32 %15)
>  %25 = extractelement <4 x float> %24, i32 0
>  %26 = extractelement <4 x float> %24, i32 1
>  %27 = extractelement <4 x float> %24, i32 2
>  %28 = extractelement <4 x float> %24, i32 3
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %16)
>  %32 = extractelement <4 x float> %31, i32 0
>  %33 = extractelement <4 x float> %31, i32 1
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 32)
>  %37 = call float @llvm.SI.load.const(<16 x i8> %35, i32 40)
>  %38 = fmul float %20, %36
>  %39 = fadd float %38, %37
>  %40 = call float @llvm.SI.load.const(<16 x i8> %35, i32 36)
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 44)
>  %44 = fmul float %21, %40
>  %45 = fadd float %44, %43
>  %46 = fmul float %39, 2.000000e+00
>  %47 = fmul float %45, 2.000000e+00
>  %48 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %49 = load <16 x i8>, <16 x i8> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = call float @llvm.SI.load.const(<16 x i8> %49, i32 0)
>  %51 = fmul float %46, %50
>  %52 = fadd float %51, -1.000000e+00
>  %53 = call float @llvm.SI.load.const(<16 x i8> %49, i32 4)
>  %54 = fmul float %47, %53
>  %55 = fadd float %54, -1.000000e+00
>  %56 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %57 = load <16 x i8>, <16 x i8> addrspace(2)* %56, align 16, !invariant.load !0
>  %58 = call float @llvm.SI.load.const(<16 x i8> %57, i32 24)
>  %59 = fmul float %55, %58
>  %60 = call float @llvm.SI.load.const(<16 x i8> %57, i32 48)
>  %61 = call float @llvm.SI.load.const(<16 x i8> %57, i32 56)
>  %62 = fmul float %20, %60
>  %63 = fadd float %62, %61
>  %64 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %65 = load <16 x i8>, <16 x i8> addrspace(2)* %64, align 16, !invariant.load !0
>  %66 = call float @llvm.SI.load.const(<16 x i8> %65, i32 52)
>  %67 = call float @llvm.SI.load.const(<16 x i8> %65, i32 60)
>  %68 = fmul float %21, %66
>  %69 = fadd float %68, %67
>  %70 = fadd float %63, 0x3ED4F8B580000000
>  %71 = fadd float %69, 0x3ED4F8B580000000
>  %72 = bitcast i32 %12 to float
>  %73 = insertvalue <{ float, float, float }> undef, float %72, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %27, float %26, float %25, float %28)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %32, float %33, float %70, float %71)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %52, float %59, float 0.000000e+00, float 1.000000e+00)
>  ret <{ float, float, float }> %73
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL TEMP[0..2], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0], TEMP[0], IN[0]
>  3: MOV TEMP[1].xyz, TEMP[0].xyzx
>  4: MOV TEMP[2].xy, IN[1].zwww
>  5: TEX TEMP[2].w, TEMP[2], SAMP[1], 2D
>  6: MUL TEMP[0].x, TEMP[0].wwww, TEMP[2].wwww
>  7: MOV TEMP[1].w, TEMP[0].xxxx
>  8: MOV OUT[0], TEMP[1]
>  9: END
>radeonsi: Compiling shader 108
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = fmul float %39, %43
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %46 = fmul float %40, %45
>  %47 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %48 = fmul float %41, %47
>  %49 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %50 = fmul float %42, %49
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %52 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %53 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %54 = load <8 x i32>, <8 x i32> addrspace(2)* %53, align 32, !invariant.load !0
>  %55 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %56 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %55, i64 0, i64 7, !amdgpu.uniform !0
>  %57 = load <4 x i32>, <4 x i32> addrspace(2)* %56, align 16, !invariant.load !0
>  %58 = extractelement <8 x i32> %54, i32 7
>  %59 = extractelement <4 x i32> %57, i32 0
>  %60 = and i32 %59, %58
>  %61 = insertelement <4 x i32> %57, i32 %60, i32 0
>  %62 = bitcast float %51 to i32
>  %63 = bitcast float %52 to i32
>  %64 = insertelement <2 x i32> undef, i32 %62, i32 0
>  %65 = insertelement <2 x i32> %64, i32 %63, i32 1
>  %66 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %65, <8 x i32> %54, <4 x i32> %61, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %67 = extractelement <4 x float> %66, i32 3
>  %68 = fmul float %50, %67
>  %69 = bitcast float %5 to i32
>  %70 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %69, 10
>  %71 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %70, float %44, 11
>  %72 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %71, float %46, 12
>  %73 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %72, float %48, 13
>  %74 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %73, float %68, 14
>  %75 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %74, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %75
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 0x36a7c5ac                           ; 7E0002FF 36A7C5AC
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s10, s[0:3], 0xb                   ; C205010B
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s13, s[0:3], 0xe                   ; C206810E
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xc                   ; C205810C
>	s_buffer_load_dword s12, s[0:3], 0xd                   ; C206010D
>	s_buffer_load_dword s0, s[0:3], 0xf                    ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                          ; BF8C0070
>	v_mov_b32_e32 v6, s10                                  ; 7E0C020A
>	v_mov_b32_e32 v5, s9                                   ; 7E0A0209
>	v_mov_b32_e32 v13, s13                                 ; 7E1A020D
>	v_mov_b32_e32 v1, 1.0                                  ; 7E0202F2
>	v_mov_b32_e32 v14, s0                                  ; 7E1C0200
>	v_mac_f32_e32 v6, s8, v8                               ; 3E0C1008
>	v_mac_f32_e32 v5, s7, v7                               ; 3E0A0E07
>	v_mac_f32_e32 v13, s11, v7                             ; 3E1A0E0B
>	v_add_f32_e32 v6, v6, v6                               ; 060C0D06
>	v_mac_f32_e32 v14, s12, v8                             ; 3E1C100C
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v7, v0, v13                              ; 060E1B00
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v0, v0, v14                              ; 06001D00
>	v_mul_f32_e32 v6, s5, v6                               ; 100C0C05
>	exp 15, 33, 0, 0, 0, v3, v4, v7, v0                    ; F800021F 00070403
>	v_mad_f32 v5, v5, s4, -1.0                             ; D2820005 03CC0905
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mad_f32 v0, v6, s6, -s6                              ; D2820000 80180D06
>	v_mov_b32_e32 v3, 0                                    ; 7E060280
>	exp 15, 12, 0, 1, 0, v5, v0, v3, v1                    ; F80008CF 01030005
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 228 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                  ; BE88047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	image_sample v[5:8], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030500
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                      ; C8100202
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                   ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                     ; C082051C
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                ; C8110203
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v0, v0, v5                                ; 10000B00
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                      ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                ; C8150303
>	v_mul_f32_e32 v4, v4, v7                                ; 10080F04
>	v_mul_f32_e32 v7, v5, v8                                ; 100E1105
>	v_interp_p1_f32 v5, v2, 2, 1, [m0]                      ; C8140602
>	v_mul_f32_e32 v1, v1, v6                                ; 10020D01
>	v_interp_p2_f32 v5, [v5], v3, 2, 1, [m0]                ; C8150603
>	v_interp_p1_f32 v6, v2, 3, 1, [m0]                      ; C8180702
>	v_interp_p2_f32 v6, [v6], v3, 3, 1, [m0]                ; C8190703
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s4, s4, s27                                   ; 87041B04
>	s_and_b64 exec, exec, s[8:9]                            ; 87FE087E
>	image_sample v2, v[5:6], s[20:27], s[4:7] dmask:0x8     ; F0800800 00250205
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v3, v2, v7                                ; 10060F02
>	v_mov_b32_e32 v2, v4                                    ; 7E040304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 180 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL TEMP[0..2], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0], TEMP[0], IN[0]
>  3: MOV TEMP[1].w, TEMP[0].wwww
>  4: MOV TEMP[2].xy, IN[1].zwww
>  5: TEX TEMP[2].w, TEMP[2], SAMP[1], 2D
>  6: MUL TEMP[1].xyz, TEMP[0].xyzz, TEMP[2].wwww
>  7: MOV OUT[0], TEMP[1]
>  8: END
>radeonsi: Compiling shader 109
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = fmul float %39, %43
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %46 = fmul float %40, %45
>  %47 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %48 = fmul float %41, %47
>  %49 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %50 = fmul float %42, %49
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %52 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %53 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %54 = load <8 x i32>, <8 x i32> addrspace(2)* %53, align 32, !invariant.load !0
>  %55 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %56 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %55, i64 0, i64 7, !amdgpu.uniform !0
>  %57 = load <4 x i32>, <4 x i32> addrspace(2)* %56, align 16, !invariant.load !0
>  %58 = extractelement <8 x i32> %54, i32 7
>  %59 = extractelement <4 x i32> %57, i32 0
>  %60 = and i32 %59, %58
>  %61 = insertelement <4 x i32> %57, i32 %60, i32 0
>  %62 = bitcast float %51 to i32
>  %63 = bitcast float %52 to i32
>  %64 = insertelement <2 x i32> undef, i32 %62, i32 0
>  %65 = insertelement <2 x i32> %64, i32 %63, i32 1
>  %66 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %65, <8 x i32> %54, <4 x i32> %61, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %67 = extractelement <4 x float> %66, i32 3
>  %68 = fmul float %44, %67
>  %69 = fmul float %46, %67
>  %70 = fmul float %48, %67
>  %71 = bitcast float %5 to i32
>  %72 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %71, 10
>  %73 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %72, float %68, 11
>  %74 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %73, float %69, 12
>  %75 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %74, float %70, 13
>  %76 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %75, float %50, 14
>  %77 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %76, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %77
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 0x36a7c5ac                           ; 7E0002FF 36A7C5AC
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s10, s[0:3], 0xb                   ; C205010B
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s13, s[0:3], 0xe                   ; C206810E
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xc                   ; C205810C
>	s_buffer_load_dword s12, s[0:3], 0xd                   ; C206010D
>	s_buffer_load_dword s0, s[0:3], 0xf                    ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                          ; BF8C0070
>	v_mov_b32_e32 v6, s10                                  ; 7E0C020A
>	v_mov_b32_e32 v5, s9                                   ; 7E0A0209
>	v_mov_b32_e32 v13, s13                                 ; 7E1A020D
>	v_mov_b32_e32 v1, 1.0                                  ; 7E0202F2
>	v_mov_b32_e32 v14, s0                                  ; 7E1C0200
>	v_mac_f32_e32 v6, s8, v8                               ; 3E0C1008
>	v_mac_f32_e32 v5, s7, v7                               ; 3E0A0E07
>	v_mac_f32_e32 v13, s11, v7                             ; 3E1A0E0B
>	v_add_f32_e32 v6, v6, v6                               ; 060C0D06
>	v_mac_f32_e32 v14, s12, v8                             ; 3E1C100C
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v7, v0, v13                              ; 060E1B00
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v0, v0, v14                              ; 06001D00
>	v_mul_f32_e32 v6, s5, v6                               ; 100C0C05
>	exp 15, 33, 0, 0, 0, v3, v4, v7, v0                    ; F800021F 00070403
>	v_mad_f32 v5, v5, s4, -1.0                             ; D2820005 03CC0905
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mad_f32 v0, v6, s6, -s6                              ; D2820000 80180D06
>	v_mov_b32_e32 v3, 0                                    ; 7E060280
>	exp 15, 12, 0, 1, 0, v5, v0, v3, v1                    ; F80008CF 01030005
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 228 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                  ; BE88047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	image_sample v[4:7], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030400
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v8, v0, v4                                ; 10100900
>	v_interp_p1_f32 v0, v2, 1, 0, [m0]                      ; C8000102
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                ; C8010103
>	v_mul_f32_e32 v5, v0, v5                                ; 100A0B00
>	v_interp_p1_f32 v0, v2, 2, 0, [m0]                      ; C8000202
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                   ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                     ; C082051C
>	v_interp_p2_f32 v0, [v0], v3, 2, 0, [m0]                ; C8010203
>	v_mul_f32_e32 v6, v0, v6                                ; 100C0D00
>	v_interp_p1_f32 v0, v2, 3, 0, [m0]                      ; C8000302
>	v_interp_p2_f32 v0, [v0], v3, 3, 0, [m0]                ; C8010303
>	v_mul_f32_e32 v4, v0, v7                                ; 10080F00
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                      ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]                ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                      ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]                ; C8050703
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s4, s4, s27                                   ; 87041B04
>	s_and_b64 exec, exec, s[8:9]                            ; 87FE087E
>	image_sample v2, v[0:1], s[20:27], s[4:7] dmask:0x8     ; F0800800 00250200
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v0, v2, v8                                ; 10001102
>	v_mul_f32_e32 v1, v2, v5                                ; 10020B02
>	v_mul_f32_e32 v2, v2, v6                                ; 10040D02
>	v_mov_b32_e32 v3, v4                                    ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 188 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[2]
>DCL TEMP[0..2], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].xw, TEMP[0], SAMP[0], 2D
>  2: LRP TEMP[1].xyz, TEMP[0].xxxx, CONST[2].xyzz, IN[0].xyzz
>  3: MUL TEMP[0].x, TEMP[0].wwww, IN[0].wwww
>  4: MOV TEMP[2].xy, IN[1].zwww
>  5: TEX TEMP[2].w, TEMP[2], SAMP[1], 2D
>  6: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[2].wwww
>  7: MOV TEMP[1].w, TEMP[0].xxxx
>  8: MOV OUT[0], TEMP[1]
>  9: END
>radeonsi: Compiling shader 110
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 3
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 32)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %45 = fsub float 1.000000e+00, %39
>  %46 = fmul float %43, %39
>  %47 = fmul float %44, %45
>  %48 = fadd float %46, %47
>  %49 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %50 = load <16 x i8>, <16 x i8> addrspace(2)* %49, align 16, !invariant.load !0
>  %51 = call float @llvm.SI.load.const(<16 x i8> %50, i32 36)
>  %52 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %53 = fsub float 1.000000e+00, %39
>  %54 = fmul float %51, %39
>  %55 = fmul float %52, %53
>  %56 = fadd float %54, %55
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 40)
>  %60 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %61 = fsub float 1.000000e+00, %39
>  %62 = fmul float %59, %39
>  %63 = fmul float %60, %61
>  %64 = fadd float %62, %63
>  %65 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %66 = fmul float %40, %65
>  %67 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %68 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %69 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %70 = load <8 x i32>, <8 x i32> addrspace(2)* %69, align 32, !invariant.load !0
>  %71 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %72 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %71, i64 0, i64 7, !amdgpu.uniform !0
>  %73 = load <4 x i32>, <4 x i32> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = extractelement <8 x i32> %70, i32 7
>  %75 = extractelement <4 x i32> %73, i32 0
>  %76 = and i32 %75, %74
>  %77 = insertelement <4 x i32> %73, i32 %76, i32 0
>  %78 = bitcast float %67 to i32
>  %79 = bitcast float %68 to i32
>  %80 = insertelement <2 x i32> undef, i32 %78, i32 0
>  %81 = insertelement <2 x i32> %80, i32 %79, i32 1
>  %82 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %81, <8 x i32> %70, <4 x i32> %77, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %83 = extractelement <4 x float> %82, i32 3
>  %84 = fmul float %66, %83
>  %85 = bitcast float %5 to i32
>  %86 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %85, 10
>  %87 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %86, float %48, 11
>  %88 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %87, float %56, 12
>  %89 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %88, float %64, 13
>  %90 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %89, float %84, 14
>  %91 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %90, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %91
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 0x36a7c5ac                           ; 7E0002FF 36A7C5AC
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s10, s[0:3], 0xb                   ; C205010B
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s13, s[0:3], 0xe                   ; C206810E
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xc                   ; C205810C
>	s_buffer_load_dword s12, s[0:3], 0xd                   ; C206010D
>	s_buffer_load_dword s0, s[0:3], 0xf                    ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                          ; BF8C0070
>	v_mov_b32_e32 v6, s10                                  ; 7E0C020A
>	v_mov_b32_e32 v5, s9                                   ; 7E0A0209
>	v_mov_b32_e32 v13, s13                                 ; 7E1A020D
>	v_mov_b32_e32 v1, 1.0                                  ; 7E0202F2
>	v_mov_b32_e32 v14, s0                                  ; 7E1C0200
>	v_mac_f32_e32 v6, s8, v8                               ; 3E0C1008
>	v_mac_f32_e32 v5, s7, v7                               ; 3E0A0E07
>	v_mac_f32_e32 v13, s11, v7                             ; 3E1A0E0B
>	v_add_f32_e32 v6, v6, v6                               ; 060C0D06
>	v_mac_f32_e32 v14, s12, v8                             ; 3E1C100C
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v7, v0, v13                              ; 060E1B00
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v0, v0, v14                              ; 06001D00
>	v_mul_f32_e32 v6, s5, v6                               ; 100C0C05
>	exp 15, 33, 0, 0, 0, v3, v4, v7, v0                    ; F800021F 00070403
>	v_mad_f32 v5, v5, s4, -1.0                             ; D2820005 03CC0905
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mad_f32 v0, v6, s6, -s6                              ; D2820000 80180D06
>	v_mov_b32_e32 v3, 0                                    ; 7E060280
>	exp 15, 12, 0, 1, 0, v5, v0, v3, v1                    ; F80008CF 01030005
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 228 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                    ; BE88047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                      ; C08E050C
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                        ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                  ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                        ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                  ; C8050503
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s28, s28, s19                                   ; 871C131C
>	image_sample v[5:6], v[0:1], s[12:19], s[28:31] dmask:0x9 ; F0800900 00E30500
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                        ; C8000002
>	s_buffer_load_dword s11, s[0:3], 0x8                      ; C2058108
>	s_buffer_load_dword s32, s[0:3], 0x9                      ; C2100109
>	s_buffer_load_dword s0, s[0:3], 0xa                       ; C200010A
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                  ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                        ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                  ; C8050103
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                        ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                  ; C8110203
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mad_f32 v0, -v5, v0, v0                                 ; D2820000 24020105
>	v_mad_f32 v1, -v5, v1, v1                                 ; D2820001 24060305
>	v_mad_f32 v4, -v5, v4, v4                                 ; D2820004 24120905
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                     ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mac_f32_e32 v0, s11, v5                                 ; 3E000A0B
>	v_mac_f32_e32 v1, s32, v5                                 ; 3E020A20
>	v_mac_f32_e32 v4, s0, v5                                  ; 3E080A00
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                        ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                  ; C8150303
>	v_mul_f32_e32 v7, v5, v6                                  ; 100E0D05
>	v_interp_p1_f32 v5, v2, 2, 1, [m0]                        ; C8140602
>	v_interp_p2_f32 v5, [v5], v3, 2, 1, [m0]                  ; C8150603
>	v_interp_p1_f32 v6, v2, 3, 1, [m0]                        ; C8180702
>	v_interp_p2_f32 v6, [v6], v3, 3, 1, [m0]                  ; C8190703
>	s_and_b32 s4, s4, s27                                     ; 87041B04
>	s_and_b64 exec, exec, s[8:9]                              ; 87FE087E
>	image_sample v2, v[5:6], s[20:27], s[4:7] dmask:0x8       ; F0800800 00250205
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v3, v2, v7                                  ; 10060F02
>	v_mov_b32_e32 v2, v4                                      ; 7E040304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 220 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL CONST[0..229]
>DCL TEMP[0..8], LOCAL
>DCL ADDR[0]
>IMM[0] INT32 {1, 0, 0, 0}
>IMM[1] FLT32 {-32768.0000, -2048.0000,     0.0039,     0.0010}
>IMM[2] FLT32 {    2.0000,    -1.0000,     0.0020,     1.0000}
>IMM[3] FLT32 {    0.0000,     0.0010,     8.0000,     0.1000}
>  0: F2I TEMP[0].y, IN[1].xyyy
>  1: UADD TEMP[1].x, TEMP[0].yyyy, IMM[0].xxxx
>  2: UARL ADDR[0].x, TEMP[1].xxxx
>  3: UARL ADDR[0].x, TEMP[1].xxxx
>  4: ADD TEMP[1], CONST[ADDR[0].x+7], IMM[1].xxyy
>  5: FRC TEMP[2], TEMP[1]
>  6: ADD TEMP[1], TEMP[1], -TEMP[2]
>  7: UARL ADDR[0].x, TEMP[0].yyyy
>  8: UARL ADDR[0].x, TEMP[0].yyyy
>  9: ADD TEMP[3].x, CONST[ADDR[0].x+7].wwww, IMM[1].xxxx
> 10: FRC TEMP[4].x, TEMP[3].xxxx
> 11: MOV TEMP[5].x, TEMP[4].xxxx
> 12: MUL TEMP[6].x, TEMP[1].yyyy, IMM[1].zzzz
> 13: MOV TEMP[5].y, TEMP[6].xxxx
> 14: MOV TEMP[5].z, TEMP[2].yyxy
> 15: MUL TEMP[6].xy, TEMP[1].zwww, IMM[1].wwww
> 16: MUL TEMP[7].xy, TEMP[2].zwww, IMM[2].xxxx
> 17: MOV TEMP[6].zw, TEMP[7].yyxy
> 18: ADD TEMP[6], TEMP[6], IMM[2].yyyy
> 19: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[4].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, IMM[2].zzzz
> 21: MUL TEMP[1].x, TEMP[1].xxxx, IMM[2].zzzz
> 22: MOV TEMP[3].y, TEMP[1].xxxx
> 23: MOV TEMP[3].z, TEMP[3].xxxx
> 24: MUL TEMP[1].xyz, TEMP[3].xyzz, IN[0].xyzz
> 25: MUL TEMP[4].xyz, TEMP[6].zxyy, TEMP[1].yzxx
> 26: MAD TEMP[4].xyz, TEMP[6].yzxx, TEMP[1].zxyy, -TEMP[4].xyzz
> 27: MAD TEMP[4].xyz, TEMP[6].wwww, TEMP[1].xyzz, TEMP[4].xyzz
> 28: DP3 TEMP[1].x, TEMP[6].xyzz, -TEMP[1].xyzz
> 29: MOV TEMP[7].xyz, -TEMP[6].xyzx
> 30: MUL TEMP[8].xyz, TEMP[4].zxyy, TEMP[7].yzxx
> 31: MAD TEMP[7].xyz, TEMP[4].yzxx, TEMP[7].zxyy, -TEMP[8].xyzz
> 32: MAD TEMP[1].xyz, TEMP[1].xxxx, -TEMP[6].xyzz, TEMP[7].xyzz
> 33: MAD TEMP[1].xyz, TEMP[6].wwww, TEMP[4].xyzz, TEMP[1].xyzz
> 34: UARL ADDR[0].x, TEMP[0].yyyy
> 35: UARL ADDR[0].x, TEMP[0].yyyy
> 36: ADD TEMP[1].xyz, CONST[ADDR[0].x+7].xyzz, TEMP[1].xyzz
> 37: MOV TEMP[1].xyz, TEMP[1].xyzx
> 38: MUL TEMP[0], CONST[0], TEMP[1].xxxx
> 39: MAD TEMP[0], CONST[1], TEMP[1].yyyy, TEMP[0]
> 40: MAD TEMP[0], CONST[2], TEMP[1].zzzz, TEMP[0]
> 41: ADD TEMP[0], TEMP[0], CONST[3]
> 42: MOV TEMP[4].w, TEMP[2].yyyy
> 43: MUL TEMP[4].xyz, TEMP[5].xyzz, CONST[229].xxxx
> 44: MOV TEMP[5].x, CONST[229].yyyy
> 45: ADD TEMP[6].x, TEMP[2].yyyy, IMM[2].yyyy
> 46: MUL TEMP[6].x, TEMP[6].xxxx, CONST[229].yyyy
> 47: MOV TEMP[5].y, TEMP[6].xxxx
> 48: MOV TEMP[6].y, TEMP[5].xyxx
> 49: ADD TEMP[2].x, CONST[229].yyyy, TEMP[2].yyyy
> 50: FSEQ TEMP[7].x, CONST[229].yyyy, IMM[3].xxxx
> 51: UCMP TEMP[6].x, TEMP[7].xxxx, TEMP[2].xxxx, TEMP[5].xyyy
> 52: MAD TEMP[2].x, TEMP[0].zzzz, CONST[6].yyyy, CONST[6].xxxx
> 53: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 54: POW TEMP[2].x, TEMP[2].xxxx, CONST[6].zzzz
> 55: ADD TEMP[5].x, IMM[2].wwww, -CONST[6].wwww
> 56: MAD TEMP[2].x, CONST[6].wwww, TEMP[2].xxxx, TEMP[5].xxxx
> 57: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
> 58: ADD TEMP[1].x, TEMP[1].yyyy, -CONST[4].wwww
> 59: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].xxxx
> 60: ADD TEMP[5].x, CONST[5].wwww, -CONST[4].wwww
> 61: ADD TEMP[5].x, TEMP[5].xxxx, IMM[3].yyyy
> 62: RCP TEMP[5].x, TEMP[5].xxxx
> 63: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[5].xxxx
> 64: FRC TEMP[5].x, CONST[5].wwww
> 65: MUL TEMP[5].x, TEMP[5].xxxx, IMM[3].zzzz
> 66: POW TEMP[1].x, TEMP[1].xxxx, TEMP[5].xxxx
> 67: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 68: MUL TEMP[1].x, TEMP[2].xxxx, TEMP[1].xxxx
> 69: MUL TEMP[1], TEMP[4], TEMP[1].xxxx
> 70: MOV TEMP[2].w, TEMP[1].wwww
> 71: MUL TEMP[3].x, IMM[3].wwww, TEMP[3].xxxx
> 72: ADD TEMP[3].x, TEMP[0].zzzz, -TEMP[3].xxxx
> 73: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 74: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 75: MOV TEMP[1].xy, IN[2].xyxx
> 76: MOV TEMP[1].zw, TEMP[6].yyxy
> 77: MOV OUT[1], TEMP[2]
> 78: MOV OUT[0], TEMP[0]
> 79: MOV OUT[2], TEMP[1]
> 80: END
>radeonsi: Compiling shader 111
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %24, i32 0, i32 %15)
>  %26 = extractelement <4 x float> %25, i32 1
>  %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %16)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = fptosi float %26 to i32
>  %33 = add i32 %32, 1
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = shl i32 %33, 4
>  %37 = add i32 %36, 112
>  %38 = call float @llvm.SI.load.const(<16 x i8> %35, i32 %37)
>  %39 = fadd float %38, -3.276800e+04
>  %40 = shl i32 %33, 4
>  %41 = add i32 %40, 116
>  %42 = call float @llvm.SI.load.const(<16 x i8> %35, i32 %41)
>  %43 = fadd float %42, -3.276800e+04
>  %44 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %45 = load <16 x i8>, <16 x i8> addrspace(2)* %44, align 16, !invariant.load !0
>  %46 = shl i32 %33, 4
>  %47 = add i32 %46, 120
>  %48 = call float @llvm.SI.load.const(<16 x i8> %45, i32 %47)
>  %49 = fadd float %48, -2.048000e+03
>  %50 = shl i32 %33, 4
>  %51 = add i32 %50, 124
>  %52 = call float @llvm.SI.load.const(<16 x i8> %45, i32 %51)
>  %53 = fadd float %52, -2.048000e+03
>  %54 = call float @llvm.floor.f32(float %39)
>  %55 = fsub float %39, %54
>  %56 = call float @llvm.floor.f32(float %43)
>  %57 = fsub float %43, %56
>  %58 = call float @llvm.floor.f32(float %49)
>  %59 = fsub float %49, %58
>  %60 = call float @llvm.floor.f32(float %53)
>  %61 = fsub float %53, %60
>  %62 = fsub float %39, %55
>  %63 = fsub float %43, %57
>  %64 = fsub float %49, %59
>  %65 = fsub float %53, %61
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = shl i32 %32, 4
>  %69 = add i32 %68, 124
>  %70 = call float @llvm.SI.load.const(<16 x i8> %67, i32 %69)
>  %71 = fadd float %70, -3.276800e+04
>  %72 = call float @llvm.floor.f32(float %71)
>  %73 = fsub float %71, %72
>  %74 = fmul float %63, 0x3F70101020000000
>  %75 = fmul float %64, 9.765625e-04
>  %76 = fmul float %65, 9.765625e-04
>  %77 = fmul float %59, 2.000000e+00
>  %78 = fmul float %61, 2.000000e+00
>  %79 = fadd float %75, -1.000000e+00
>  %80 = fadd float %76, -1.000000e+00
>  %81 = fadd float %77, -1.000000e+00
>  %82 = fadd float %78, -1.000000e+00
>  %83 = fsub float %71, %73
>  %84 = fmul float %83, 1.953125e-03
>  %85 = fmul float %62, 1.953125e-03
>  %86 = fmul float %84, %20
>  %87 = fmul float %85, %21
>  %88 = fmul float %84, %22
>  %89 = fmul float %81, %87
>  %90 = fmul float %79, %88
>  %91 = fmul float %80, %86
>  %92 = fmul float %80, %88
>  %93 = fsub float %92, %89
>  %94 = fmul float %81, %86
>  %95 = fsub float %94, %90
>  %96 = fmul float %79, %87
>  %97 = fsub float %96, %91
>  %98 = fmul float %82, %86
>  %99 = fadd float %98, %93
>  %100 = fmul float %82, %87
>  %101 = fadd float %100, %95
>  %102 = fmul float %82, %88
>  %103 = fadd float %102, %97
>  %104 = fmul float %86, %79
>  %105 = fsub float -0.000000e+00, %104
>  %106 = fmul float %87, %80
>  %107 = fsub float %105, %106
>  %108 = fmul float %88, %81
>  %109 = fsub float %107, %108
>  %110 = fsub float -0.000000e+00, %79
>  %111 = fsub float -0.000000e+00, %80
>  %112 = fsub float -0.000000e+00, %81
>  %113 = fmul float %103, %111
>  %114 = fmul float %99, %112
>  %115 = fmul float %101, %110
>  %116 = fmul float %101, %112
>  %117 = fsub float %116, %113
>  %118 = fmul float %103, %110
>  %119 = fsub float %118, %114
>  %120 = fmul float %99, %111
>  %121 = fsub float %120, %115
>  %122 = fmul float %79, %109
>  %123 = fsub float %117, %122
>  %124 = fmul float %80, %109
>  %125 = fsub float %119, %124
>  %126 = fmul float %81, %109
>  %127 = fsub float %121, %126
>  %128 = fmul float %82, %99
>  %129 = fadd float %128, %123
>  %130 = fmul float %82, %101
>  %131 = fadd float %130, %125
>  %132 = fmul float %82, %103
>  %133 = fadd float %132, %127
>  %134 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %135 = load <16 x i8>, <16 x i8> addrspace(2)* %134, align 16, !invariant.load !0
>  %136 = shl i32 %32, 4
>  %137 = add i32 %136, 112
>  %138 = call float @llvm.SI.load.const(<16 x i8> %135, i32 %137)
>  %139 = fadd float %138, %129
>  %140 = shl i32 %32, 4
>  %141 = add i32 %140, 116
>  %142 = call float @llvm.SI.load.const(<16 x i8> %135, i32 %141)
>  %143 = fadd float %142, %131
>  %144 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %145 = load <16 x i8>, <16 x i8> addrspace(2)* %144, align 16, !invariant.load !0
>  %146 = shl i32 %32, 4
>  %147 = add i32 %146, 120
>  %148 = call float @llvm.SI.load.const(<16 x i8> %145, i32 %147)
>  %149 = fadd float %148, %133
>  %150 = call float @llvm.SI.load.const(<16 x i8> %145, i32 0)
>  %151 = fmul float %150, %139
>  %152 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %153 = load <16 x i8>, <16 x i8> addrspace(2)* %152, align 16, !invariant.load !0
>  %154 = call float @llvm.SI.load.const(<16 x i8> %153, i32 4)
>  %155 = fmul float %154, %139
>  %156 = call float @llvm.SI.load.const(<16 x i8> %153, i32 8)
>  %157 = fmul float %156, %139
>  %158 = call float @llvm.SI.load.const(<16 x i8> %153, i32 12)
>  %159 = fmul float %158, %139
>  %160 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %161 = load <16 x i8>, <16 x i8> addrspace(2)* %160, align 16, !invariant.load !0
>  %162 = call float @llvm.SI.load.const(<16 x i8> %161, i32 16)
>  %163 = fmul float %162, %143
>  %164 = fadd float %163, %151
>  %165 = call float @llvm.SI.load.const(<16 x i8> %161, i32 20)
>  %166 = fmul float %165, %143
>  %167 = fadd float %166, %155
>  %168 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %169 = load <16 x i8>, <16 x i8> addrspace(2)* %168, align 16, !invariant.load !0
>  %170 = call float @llvm.SI.load.const(<16 x i8> %169, i32 24)
>  %171 = fmul float %170, %143
>  %172 = fadd float %171, %157
>  %173 = call float @llvm.SI.load.const(<16 x i8> %169, i32 28)
>  %174 = fmul float %173, %143
>  %175 = fadd float %174, %159
>  %176 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %177 = load <16 x i8>, <16 x i8> addrspace(2)* %176, align 16, !invariant.load !0
>  %178 = call float @llvm.SI.load.const(<16 x i8> %177, i32 32)
>  %179 = fmul float %178, %149
>  %180 = fadd float %179, %164
>  %181 = call float @llvm.SI.load.const(<16 x i8> %177, i32 36)
>  %182 = fmul float %181, %149
>  %183 = fadd float %182, %167
>  %184 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %185 = load <16 x i8>, <16 x i8> addrspace(2)* %184, align 16, !invariant.load !0
>  %186 = call float @llvm.SI.load.const(<16 x i8> %185, i32 40)
>  %187 = fmul float %186, %149
>  %188 = fadd float %187, %172
>  %189 = call float @llvm.SI.load.const(<16 x i8> %185, i32 44)
>  %190 = fmul float %189, %149
>  %191 = fadd float %190, %175
>  %192 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %193 = load <16 x i8>, <16 x i8> addrspace(2)* %192, align 16, !invariant.load !0
>  %194 = call float @llvm.SI.load.const(<16 x i8> %193, i32 48)
>  %195 = fadd float %180, %194
>  %196 = call float @llvm.SI.load.const(<16 x i8> %193, i32 52)
>  %197 = fadd float %183, %196
>  %198 = call float @llvm.SI.load.const(<16 x i8> %193, i32 56)
>  %199 = fadd float %188, %198
>  %200 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %201 = load <16 x i8>, <16 x i8> addrspace(2)* %200, align 16, !invariant.load !0
>  %202 = call float @llvm.SI.load.const(<16 x i8> %201, i32 60)
>  %203 = fadd float %191, %202
>  %204 = call float @llvm.SI.load.const(<16 x i8> %201, i32 3664)
>  %205 = fmul float %73, %204
>  %206 = call float @llvm.SI.load.const(<16 x i8> %201, i32 3664)
>  %207 = fmul float %74, %206
>  %208 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %209 = load <16 x i8>, <16 x i8> addrspace(2)* %208, align 16, !invariant.load !0
>  %210 = call float @llvm.SI.load.const(<16 x i8> %209, i32 3664)
>  %211 = fmul float %55, %210
>  %212 = call float @llvm.SI.load.const(<16 x i8> %209, i32 3668)
>  %213 = fadd float %57, -1.000000e+00
>  %214 = call float @llvm.SI.load.const(<16 x i8> %209, i32 3668)
>  %215 = fmul float %213, %214
>  %216 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %217 = load <16 x i8>, <16 x i8> addrspace(2)* %216, align 16, !invariant.load !0
>  %218 = call float @llvm.SI.load.const(<16 x i8> %217, i32 3668)
>  %219 = fadd float %218, %57
>  %220 = call float @llvm.SI.load.const(<16 x i8> %217, i32 3668)
>  %221 = fcmp oeq float %220, 0.000000e+00
>  %222 = select i1 %221, float %219, float %212
>  %223 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %224 = load <16 x i8>, <16 x i8> addrspace(2)* %223, align 16, !invariant.load !0
>  %225 = call float @llvm.SI.load.const(<16 x i8> %224, i32 100)
>  %226 = call float @llvm.SI.load.const(<16 x i8> %224, i32 96)
>  %227 = fmul float %199, %225
>  %228 = fadd float %227, %226
>  %229 = call float @llvm.AMDGPU.clamp.(float %228, float 0.000000e+00, float 1.000000e+00)
>  %230 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %231 = load <16 x i8>, <16 x i8> addrspace(2)* %230, align 16, !invariant.load !0
>  %232 = call float @llvm.SI.load.const(<16 x i8> %231, i32 104)
>  %233 = call float @llvm.pow.f32(float %229, float %232)
>  %234 = call float @llvm.SI.load.const(<16 x i8> %231, i32 108)
>  %235 = fsub float 1.000000e+00, %234
>  %236 = call float @llvm.SI.load.const(<16 x i8> %231, i32 108)
>  %237 = fmul float %236, %233
>  %238 = fadd float %237, %235
>  %239 = fmul float %238, %238
>  %240 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %241 = load <16 x i8>, <16 x i8> addrspace(2)* %240, align 16, !invariant.load !0
>  %242 = call float @llvm.SI.load.const(<16 x i8> %241, i32 76)
>  %243 = fsub float %143, %242
>  %244 = call float @llvm.maxnum.f32(float %243, float 0.000000e+00)
>  %245 = call float @llvm.SI.load.const(<16 x i8> %241, i32 92)
>  %246 = call float @llvm.SI.load.const(<16 x i8> %241, i32 76)
>  %247 = fsub float %245, %246
>  %248 = fadd float %247, 0x3F50624DE0000000
>  %249 = fdiv float 1.000000e+00, %248, !fpmath !1
>  %250 = fmul float %244, %249
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = call float @llvm.SI.load.const(<16 x i8> %252, i32 92)
>  %254 = call float @llvm.floor.f32(float %253)
>  %255 = fsub float %253, %254
>  %256 = fmul float %255, 8.000000e+00
>  %257 = call float @llvm.pow.f32(float %250, float %256)
>  %258 = call float @llvm.AMDGPU.clamp.(float %257, float 0.000000e+00, float 1.000000e+00)
>  %259 = fmul float %239, %258
>  %260 = fmul float %205, %259
>  %261 = fmul float %207, %259
>  %262 = fmul float %211, %259
>  %263 = fmul float %57, %259
>  %264 = fmul float %84, 0x3FB99999A0000000
>  %265 = fsub float %199, %264
>  %266 = call float @llvm.AMDGPU.clamp.(float %265, float 0.000000e+00, float 1.000000e+00)
>  %267 = fmul float %260, %266
>  %268 = fmul float %261, %266
>  %269 = fmul float %262, %266
>  %270 = bitcast i32 %12 to float
>  %271 = insertvalue <{ float, float, float }> undef, float %270, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %267, float %268, float %269, float %263)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %30, float %31, float %222, float %215)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %195, float %197, float %199, float %203)
>  ret <{ float, float, float }> %271
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0..1], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[1], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[0].xyz, IN[0].xyzz, TEMP[1].xyzz
>  3: MAD TEMP[1].x, TEMP[1].wwww, IN[1].zzzz, IN[1].wwww
>  4: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>  5: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  6: MOV OUT[0], TEMP[0].xyzz
>  7: END
>radeonsi: Compiling shader 112
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = fmul float %43, %39
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %46 = fmul float %45, %40
>  %47 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %48 = fmul float %47, %41
>  %49 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %50 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %51 = fmul float %42, %49
>  %52 = fadd float %51, %50
>  %53 = call float @llvm.AMDGPU.clamp.(float %52, float 0.000000e+00, float 1.000000e+00)
>  %54 = fmul float %44, %53
>  %55 = fmul float %46, %53
>  %56 = fmul float %48, %53
>  %57 = bitcast float %5 to i32
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %57, 10
>  %59 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %58, float %54, 11
>  %60 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %59, float %55, 12
>  %61 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %60, float %56, 13
>  %62 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %61, float %56, 14
>  %63 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %62, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %63
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	v_mov_b32_e32 v0, 0xc7000000                            ; 7E0002FF C7000000
>	v_mov_b32_e32 v1, 0xc5000000                            ; 7E0202FF C5000000
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                   ; C0840B08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	buffer_load_format_xyzw v[10:13], v5, s[12:15], 0 idxen ; E00C2000 80030A05
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                      ; C0820300
>	v_mov_b32_e32 v5, 0x3b000000                            ; 7E0A02FF 3B000000
>	v_mov_b32_e32 v4, 0x3a800000                            ; 7E0802FF 3A800000
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_buffer_load_dword s24, s[4:7], 0x395                  ; C20C04FF 00000395
>	s_buffer_load_dword s26, s[4:7], 0x13                   ; C20D0513
>	s_buffer_load_dword s27, s[4:7], 0x17                   ; C20D8517
>	s_buffer_load_dword s2, s[4:7], 0x0                     ; C2010500
>	s_buffer_load_dword s3, s[4:7], 0x1                     ; C2018501
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_cmp_eq_f32_e64 s[0:1], s24, 0                         ; D0040000 00010018
>	s_buffer_load_dword s12, s[4:7], 0x6                    ; C2060506
>	s_buffer_load_dword s13, s[4:7], 0x7                    ; C2068507
>	s_buffer_load_dword s16, s[4:7], 0xa                    ; C208050A
>	s_buffer_load_dword s20, s[4:7], 0xe                    ; C20A050E
>	s_buffer_load_dword s28, s[4:7], 0x18                   ; C20E0518
>	s_buffer_load_dword s29, s[4:7], 0x19                   ; C20E8519
>	s_buffer_load_dword s14, s[4:7], 0x8                    ; C2070508
>	s_buffer_load_dword s15, s[4:7], 0x9                    ; C2078509
>	s_buffer_load_dword s17, s[4:7], 0xb                    ; C208850B
>	s_buffer_load_dword s21, s[4:7], 0x1a                   ; C20A851A
>	s_buffer_load_dword s22, s[4:7], 0x1b                   ; C20B051B
>	s_buffer_load_dword s23, s[4:7], 0x394                  ; C20B84FF 00000394
>	s_buffer_load_dword s18, s[4:7], 0xc                    ; C209050C
>	s_buffer_load_dword s19, s[4:7], 0xd                    ; C209850D
>	s_buffer_load_dword s25, s[4:7], 0xf                    ; C20C850F
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v3, v11                               ; 7E06110B
>	v_lshlrev_b32_e32 v10, 4, v3                            ; 34140684
>	v_add_i32_e32 v3, vcc, 0x80, v10                        ; 4A0614FF 00000080
>	v_add_i32_e32 v11, vcc, 0x88, v10                       ; 4A1614FF 00000088
>	v_add_i32_e32 v12, vcc, 0x8c, v10                       ; 4A1814FF 0000008C
>	v_add_i32_e32 v13, vcc, 0x7c, v10                       ; 4A1A14FF 0000007C
>	buffer_load_dword v3, v3, s[4:7], 0 offen               ; E0301000 80010303
>	buffer_load_dword v11, v11, s[4:7], 0 offen             ; E0301000 80010B0B
>	buffer_load_dword v12, v12, s[4:7], 0 offen             ; E0301000 80010C0C
>	buffer_load_dword v13, v13, s[4:7], 0 offen             ; E0301000 80010D0D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_add_f32_e32 v3, v0, v3                                ; 06060700
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_add_f32_e32 v11, v1, v11                              ; 06161701
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_add_f32_e32 v1, v1, v12                               ; 06021901
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_add_f32_e32 v12, v0, v13                              ; 06181B00
>	v_floor_f32_e32 v13, v3                                 ; 7E1A4903
>	v_floor_f32_e32 v16, v12                                ; 7E20490C
>	v_floor_f32_e32 v14, v11                                ; 7E1C490B
>	v_floor_f32_e32 v15, v1                                 ; 7E1E4901
>	v_subrev_f32_e32 v13, v13, v3                           ; 0A1A070D
>	v_subrev_f32_e32 v16, v16, v12                          ; 0A201910
>	v_subrev_f32_e32 v3, v13, v3                            ; 0A06070D
>	v_subrev_f32_e32 v12, v16, v12                          ; 0A181910
>	v_subrev_f32_e32 v14, v14, v11                          ; 0A1C170E
>	v_subrev_f32_e32 v15, v15, v1                           ; 0A1E030F
>	v_subrev_f32_e32 v1, v15, v1                            ; 0A02030F
>	v_mul_f32_e32 v3, v5, v3                                ; 10060705
>	v_mul_f32_e32 v12, v5, v12                              ; 10181905
>	v_subrev_f32_e32 v11, v14, v11                          ; 0A16170E
>	v_mul_f32_e32 v17, v4, v11                              ; 10221704
>	v_mul_f32_e32 v18, v4, v1                               ; 10240304
>	v_mul_f32_e32 v5, v7, v12                               ; 100A1907
>	v_mul_f32_e32 v7, v9, v12                               ; 100E1909
>	v_mad_f32 v11, v11, v4, -1.0                            ; D282000B 03CE090B
>	v_mad_f32 v1, v1, v4, -1.0                              ; D2820001 03CE0901
>	v_add_f32_e32 v4, v14, v14                              ; 06081D0E
>	v_mul_f32_e32 v3, v8, v3                                ; 10060708
>	v_mad_f32 v8, v4, v3, -v3                               ; D2820008 840E0704
>	v_mad_f32 v14, 2.0, v14, -1.0                           ; D282000E 03CE1CF4
>	v_mad_f32 v9, v17, v7, -v7                              ; D2820009 841E0F11
>	v_mad_f32 v19, v18, v5, -v5                             ; D2820013 84160B12
>	v_mad_f32 v15, 2.0, v15, -1.0                           ; D282000F 03CE1EF4
>	v_mad_f32 v8, v1, v7, -v8                               ; D2820008 84220F01
>	v_mad_f32 v9, v14, v5, -v9                              ; D2820009 84260B0E
>	v_mad_f32 v19, v11, v3, -v19                            ; D2820013 844E070B
>	v_mac_f32_e32 v8, v5, v15                               ; 3E101F05
>	v_mad_f32 v5, v17, v5, -v5                              ; D2820005 84160B11
>	v_mac_f32_e32 v9, v3, v15                               ; 3E121F03
>	v_mad_f32 v5, -v3, v1, -v5                              ; D2820005 A4160303
>	v_mac_f32_e32 v19, v7, v15                              ; 3E261F07
>	v_mad_f32 v3, v4, v9, -v9                               ; D2820003 84261304
>	v_mad_f32 v4, v18, v8, -v8                              ; D2820004 84221112
>	v_mad_f32 v7, -v7, v14, v5                              ; D2820007 24161D07
>	v_mad_f32 v3, v19, v1, -v3                              ; D2820003 840E0313
>	v_mad_f32 v18, v9, v11, -v4                             ; D2820012 84121709
>	v_mad_f32 v11, -v11, v7, v3                             ; D282000B 240E0F0B
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen    ; E00C2000 80020306
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mad_f32 v5, v17, v19, -v19                            ; D2820005 844E2711
>	v_mad_f32 v6, -v14, v7, v18                             ; D2820006 244A0F0E
>	v_mad_f32 v5, v8, v14, -v5                              ; D2820005 84161D08
>	v_add_i32_e32 v14, vcc, 0x84, v10                       ; 4A1C14FF 00000084
>	buffer_load_dword v14, v14, s[4:7], 0 offen             ; E0301000 80010E0E
>	v_mad_f32 v1, -v1, v7, v5                               ; D2820001 24160F01
>	v_mac_f32_e32 v11, v8, v15                              ; 3E161F08
>	v_mac_f32_e32 v1, v9, v15                               ; 3E021F09
>	v_mac_f32_e32 v6, v19, v15                              ; 3E0C1F13
>	v_add_i32_e32 v9, vcc, 0x70, v10                        ; 4A1214FF 00000070
>	v_mov_b32_e32 v5, s24                                   ; 7E0A0218
>	buffer_load_dword v9, v9, s[4:7], 0 offen               ; E0301000 80010909
>	s_buffer_load_dword s8, s[4:7], 0x2                     ; C2040502
>	s_buffer_load_dword s9, s[4:7], 0x3                     ; C2048503
>	v_mov_b32_e32 v8, s26                                   ; 7E10021A
>	s_buffer_load_dword s10, s[4:7], 0x4                    ; C2050504
>	s_buffer_load_dword s11, s[4:7], 0x5                    ; C2058505
>	v_sub_f32_e32 v8, s27, v8                               ; 0810101B
>	v_add_f32_e32 v8, 0x3a83126f, v8                        ; 061010FF 3A83126F
>	v_rcp_f32_e32 v8, v8                                    ; 7E105508
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v7, s28                                   ; 7E0E021C
>	v_mul_f32_e32 v16, s23, v16                             ; 10202017
>	v_mul_f32_e32 v13, s23, v13                             ; 101A1A17
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_add_f32_e32 v0, v0, v14                               ; 06001D00
>	v_floor_f32_e32 v15, v0                                 ; 7E1E4900
>	v_subrev_f32_e32 v15, v15, v0                           ; 0A1E010F
>	v_add_f32_e32 v17, s24, v15                             ; 06221E18
>	v_cndmask_b32_e64 v5, v5, v17, s[0:1]                   ; D2000005 00022305
>	v_add_i32_e32 v17, vcc, 0x74, v10                       ; 4A2214FF 00000074
>	v_add_i32_e32 v10, vcc, 0x78, v10                       ; 4A1414FF 00000078
>	buffer_load_dword v10, v10, s[4:7], 0 offen             ; E0301000 80010A0A
>	buffer_load_dword v17, v17, s[4:7], 0 offen             ; E0301000 80011111
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_add_f32_e32 v9, v11, v9                               ; 0612130B
>	v_mul_f32_e32 v11, s3, v9                               ; 10161203
>	v_sub_f32_e64 v14, 1.0, s22                             ; D208000E 00002CF2
>	v_subrev_f32_e32 v0, v15, v0                            ; 0A00010F
>	v_mul_f32_e32 v0, 0x3b808081, v0                        ; 100000FF 3B808081
>	v_mul_f32_e32 v0, s23, v0                               ; 10000017
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_add_f32_e32 v6, v6, v10                               ; 060C1506
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_add_f32_e32 v1, v1, v17                               ; 06022301
>	v_mul_f32_e32 v10, s2, v9                               ; 10141202
>	v_mul_f32_e32 v17, s8, v9                               ; 10221208
>	v_mul_f32_e32 v9, s9, v9                                ; 10121209
>	v_mac_f32_e32 v10, s10, v1                              ; 3E14020A
>	v_mac_f32_e32 v11, s11, v1                              ; 3E16020B
>	v_mac_f32_e32 v17, s12, v1                              ; 3E22020C
>	v_mac_f32_e32 v9, s13, v1                               ; 3E12020D
>	v_subrev_f32_e32 v1, s26, v1                            ; 0A02021A
>	v_max_f32_e32 v1, 0, v1                                 ; 20020280
>	v_mac_f32_e32 v17, s16, v6                              ; 3E220C10
>	v_mul_f32_e32 v1, v8, v1                                ; 10020308
>	v_add_f32_e32 v8, s20, v17                              ; 06102214
>	v_mac_f32_e32 v7, s29, v8                               ; 3E0E101D
>	v_add_f32_e64 v7, v7, 0 clamp                           ; D2060807 00010107
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_log_f32_e32 v7, v7                                    ; 7E0E4F07
>	v_mac_f32_e32 v10, s14, v6                              ; 3E140C0E
>	v_mac_f32_e32 v11, s15, v6                              ; 3E160C0F
>	v_mac_f32_e32 v9, s17, v6                               ; 3E120C11
>	v_floor_f32_e32 v6, s27                                 ; 7E0C481B
>	v_sub_f32_e32 v6, s27, v6                               ; 080C0C1B
>	v_mul_f32_e32 v6, 0x41000000, v6                        ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v1, v6, v1                         ; 0E020306
>	v_mul_legacy_f32_e32 v6, s21, v7                        ; 0E0C0E15
>	v_exp_f32_e32 v6, v6                                    ; 7E0C4B06
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_mac_f32_e32 v14, s22, v6                              ; 3E1C0C16
>	v_mov_b32_e32 v17, v8                                   ; 7E220308
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_mul_f32_e32 v6, v14, v14                              ; 100C1D0E
>	v_mul_f32_e32 v1, v1, v6                                ; 10020D01
>	v_mac_f32_e32 v17, 0xbdcccccd, v12                      ; 3E2218FF BDCCCCCD
>	v_add_f32_e64 v17, v17, 0 clamp                         ; D2060811 00010111
>	v_mul_f32_e32 v6, v1, v16                               ; 100C2101
>	v_mul_f32_e32 v0, v1, v0                                ; 10000101
>	v_mul_f32_e32 v7, v1, v13                               ; 100E1B01
>	v_mul_f32_e32 v1, v1, v15                               ; 10021F01
>	v_mul_f32_e32 v6, v17, v6                               ; 100C0D11
>	v_mul_f32_e32 v0, v17, v0                               ; 10000111
>	v_mul_f32_e32 v7, v17, v7                               ; 100E0F11
>	v_mad_f32 v12, v15, s24, -s24                           ; D282000C 8060310F
>	exp 15, 32, 0, 0, 0, v6, v0, v7, v1                     ; F800020F 01070006
>	v_add_f32_e32 v10, s18, v10                             ; 06141412
>	v_add_f32_e32 v11, s19, v11                             ; 06161613
>	v_add_f32_e32 v9, s25, v9                               ; 06121219
>	exp 15, 33, 0, 0, 0, v3, v4, v5, v12                    ; F800021F 0C050403
>	exp 15, 12, 0, 1, 0, v10, v11, v8, v9                   ; F80008CF 09080B0A
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1020 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                      ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                      ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                ; C8050503
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[4:7], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030400
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; C8000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; C8010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v0, v4, v0                                ; 10000104
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                      ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                ; C8110203
>	v_mul_f32_e32 v1, v5, v1                                ; 10020305
>	v_interp_p1_f32 v5, v2, 2, 1, [m0]                      ; C8140602
>	v_interp_p2_f32 v5, [v5], v3, 2, 1, [m0]                ; C8150603
>	v_interp_p1_f32 v2, v2, 3, 1, [m0]                      ; C8080702
>	v_interp_p2_f32 v2, [v2], v3, 3, 1, [m0]                ; C8090703
>	v_mac_f32_e32 v2, v5, v7                                ; 3E040F05
>	v_add_f32_e64 v2, v2, 0 clamp                           ; D2060802 00010102
>	v_mul_f32_e32 v4, v6, v4                                ; 10080906
>	v_mul_f32_e32 v0, v2, v0                                ; 10000102
>	v_mul_f32_e32 v1, v2, v1                                ; 10020302
>	v_mul_f32_e32 v2, v2, v4                                ; 10040902
>	v_mov_b32_e32 v3, v2                                    ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 160 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL CONST[0..231]
>DCL TEMP[0..13], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000, -32768.0000, -8192.0000,   -32.0000}
>IMM[1] INT32 {1, 0, 0, 0}
>IMM[2] FLT32 {    0.0039,    -1.0000,     0.0000,     0.5000}
>IMM[3] FLT32 { -128.0000,     0.0010,     8.0000,     0.1000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: UARL ADDR[0].x, TEMP[0].xxxx
>  2: MOV TEMP[1].xyz, CONST[ADDR[0].x+9].xyzx
>  3: ADD TEMP[2].xyz, CONST[4].xyzz, -TEMP[1].xyzz
>  4: UADD TEMP[3].x, TEMP[0].xxxx, IMM[1].xxxx
>  5: UARL ADDR[0].x, TEMP[3].xxxx
>  6: UARL ADDR[0].x, TEMP[3].xxxx
>  7: ADD TEMP[3], CONST[ADDR[0].x+9], IMM[0].yyzz
>  8: ADD TEMP[4].x, TEMP[3].wwww, IMM[0].wwww
>  9: SIN TEMP[5].x, TEMP[4].xxxx
> 10: COS TEMP[4].x, TEMP[4].xxxx
> 11: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[2].xyzz
> 12: SQRT TEMP[6].x, TEMP[6].xxxx
> 13: POW TEMP[6].x, TEMP[6].xxxx, CONST[231].wwww
> 14: MUL TEMP[6].x, TEMP[3].zzzz, TEMP[6].xxxx
> 15: MOV TEMP[7].x, TEMP[4].xxxx
> 16: MOV TEMP[7].y, TEMP[5].xxxx
> 17: MOV TEMP[5].x, -TEMP[5].xxxx
> 18: MOV TEMP[5].y, TEMP[4].xxxx
> 19: MUL TEMP[4].xy, TEMP[7].xyyy, IN[0].xxxx
> 20: MAD TEMP[4].xy, TEMP[5].xyyy, IN[0].yyyy, TEMP[4].xyyy
> 21: MUL TEMP[8].xyz, CONST[7].xyzz, TEMP[4].xxxx
> 22: MAD TEMP[4].xyz, CONST[8].xyzz, TEMP[4].yyyy, TEMP[8].xyzz
> 23: MAD TEMP[2].xyz, TEMP[6].xxxx, TEMP[4].xyzz, TEMP[1].xyzz
> 24: FRC TEMP[4].xy, TEMP[3].xyyy
> 25: ADD TEMP[3].xy, TEMP[3].xyyy, -TEMP[4].xyyy
> 26: MUL TEMP[3].xy, TEMP[3].xyyy, IMM[2].xxxx
> 27: MOV TEMP[3].z, TEMP[4].yyxy
> 28: MOV TEMP[2].xyz, TEMP[2].xyzx
> 29: MUL TEMP[8], CONST[0], TEMP[2].xxxx
> 30: MAD TEMP[8], CONST[1], TEMP[2].yyyy, TEMP[8]
> 31: MAD TEMP[8], CONST[2], TEMP[2].zzzz, TEMP[8]
> 32: ADD TEMP[8], TEMP[8], CONST[3]
> 33: MUL TEMP[3].xyz, TEMP[3].xyzz, CONST[231].xxxx
> 34: MOV TEMP[9].x, CONST[231].yyyy
> 35: ADD TEMP[10].x, TEMP[4].yyyy, IMM[2].yyyy
> 36: MUL TEMP[10].x, TEMP[10].xxxx, CONST[231].yyyy
> 37: MOV TEMP[9].y, TEMP[10].xxxx
> 38: MOV TEMP[10].y, TEMP[9].xyxx
> 39: ADD TEMP[11].x, CONST[231].yyyy, TEMP[4].yyyy
> 40: FSEQ TEMP[12].x, CONST[231].yyyy, IMM[2].zzzz
> 41: UCMP TEMP[10].x, TEMP[12].xxxx, TEMP[11].xxxx, TEMP[9].xyyy
> 42: MOV TEMP[3].xyz, TEMP[3].xyzx
> 43: ADD TEMP[9].x, IN[0].xxxx, IMM[2].wwww
> 44: ADD TEMP[11].x, IN[0].yyyy, IMM[2].wwww
> 45: ADD TEMP[11].x, IMM[0].xxxx, -TEMP[11].xxxx
> 46: FRC TEMP[12].x, CONST[231].zzzz
> 47: ADD TEMP[13].x, CONST[231].zzzz, -TEMP[12].xxxx
> 48: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[12].xxxx
> 49: RCP TEMP[12].x, TEMP[13].xxxx
> 50: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[12].xxxx
> 51: UARL ADDR[0].x, TEMP[0].xxxx
> 52: ADD TEMP[0].x, CONST[ADDR[0].x+9].wwww, IMM[3].xxxx
> 53: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[13].xxxx
> 54: FRC TEMP[12].x, TEMP[0].xxxx
> 55: ADD TEMP[9].x, TEMP[9].xxxx, TEMP[12].xxxx
> 56: ADD TEMP[0].x, TEMP[0].xxxx, -TEMP[12].xxxx
> 57: RCP TEMP[12].x, TEMP[13].xxxx
> 58: MAD TEMP[0].x, TEMP[0].xxxx, TEMP[12].xxxx, TEMP[11].xxxx
> 59: MOV TEMP[9].y, TEMP[0].xxxx
> 60: ADD TEMP[0].xyz, CONST[4].xyzz, -TEMP[1].xyzz
> 61: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
> 62: RSQ TEMP[1].x, TEMP[1].xxxx
> 63: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
> 64: MUL TEMP[1].xyz, TEMP[0].zxyy, CONST[8].yzxx
> 65: MAD TEMP[1].xyz, TEMP[0].yzxx, CONST[8].zxyy, -TEMP[1].xyzz
> 66: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[1].xyzz
> 67: RSQ TEMP[11].x, TEMP[11].xxxx
> 68: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[11].xxxx
> 69: MUL TEMP[11].xyz, TEMP[1].zxyy, TEMP[0].yzxx
> 70: MAD TEMP[11].xyz, TEMP[1].yzxx, TEMP[0].zxyy, -TEMP[11].xyzz
> 71: ADD TEMP[12].xyz, -CONST[5].xyzz, TEMP[0].xyzz
> 72: MUL TEMP[12].xyz, TEMP[12].xyzz, IMM[2].wwww
> 73: DP3 TEMP[13].x, TEMP[12].xyzz, TEMP[12].xyzz
> 74: RSQ TEMP[13].x, TEMP[13].xxxx
> 75: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[13].xxxx
> 76: DP3 TEMP[1].x, TEMP[12].xyzz, TEMP[1].xyzz
> 77: DP3 TEMP[13].x, TEMP[11].xyzz, TEMP[11].xyzz
> 78: RSQ TEMP[13].x, TEMP[13].xxxx
> 79: MUL TEMP[11].xyz, TEMP[11].xyzz, TEMP[13].xxxx
> 80: DP3 TEMP[11].x, TEMP[12].xyzz, TEMP[11].xyzz
> 81: MOV TEMP[1].y, TEMP[11].xxxx
> 82: DP3 TEMP[0].x, TEMP[12].xyzz, TEMP[0].xyzz
> 83: MOV TEMP[0].z, TEMP[0].xxxx
> 84: DP2 TEMP[7].x, TEMP[1].xyyy, TEMP[7].xyyy
> 85: DP2 TEMP[1].x, TEMP[1].xyyy, TEMP[5].xyyy
> 86: MOV TEMP[7].y, TEMP[1].xxxx
> 87: MOV TEMP[0].xy, TEMP[7].xyxx
> 88: MAD TEMP[1].x, TEMP[8].zzzz, CONST[6].yyyy, CONST[6].xxxx
> 89: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 90: POW TEMP[1].x, TEMP[1].xxxx, CONST[6].zzzz
> 91: ADD TEMP[5].x, IMM[0].xxxx, -CONST[6].wwww
> 92: MAD TEMP[1].x, CONST[6].wwww, TEMP[1].xxxx, TEMP[5].xxxx
> 93: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 94: ADD TEMP[2].x, TEMP[2].yyyy, -CONST[4].wwww
> 95: MAX TEMP[2].x, TEMP[2].xxxx, IMM[2].zzzz
> 96: ADD TEMP[5].x, CONST[5].wwww, -CONST[4].wwww
> 97: ADD TEMP[5].x, TEMP[5].xxxx, IMM[3].yyyy
> 98: RCP TEMP[5].x, TEMP[5].xxxx
> 99: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[5].xxxx
>100: FRC TEMP[5].x, CONST[5].wwww
>101: MUL TEMP[5].x, TEMP[5].xxxx, IMM[3].zzzz
>102: POW TEMP[2].x, TEMP[2].xxxx, TEMP[5].xxxx
>103: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>104: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>105: MUL TEMP[2].x, IMM[3].wwww, TEMP[6].xxxx
>106: ADD TEMP[2].x, TEMP[8].zzzz, -TEMP[2].xxxx
>107: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>108: MUL TEMP[2].x, TEMP[4].yyyy, TEMP[2].xxxx
>109: MOV TEMP[3].w, TEMP[2].xxxx
>110: MOV TEMP[2].zw, TEMP[9].yyxy
>111: MOV TEMP[1].x, TEMP[1].xxxx
>112: MOV TEMP[2].xy, TEMP[10].xyxx
>113: MOV TEMP[1].yzw, TEMP[0].yxyz
>114: MOV OUT[1], TEMP[3]
>115: MOV OUT[2], TEMP[2]
>116: MOV OUT[0], TEMP[8]
>117: MOV OUT[3], TEMP[1]
>118: END
>radeonsi: Compiling shader 113
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 0
>  %20 = extractelement <4 x float> %18, i32 1
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %15)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = fptosi float %24 to i32
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = shl i32 %25, 4
>  %29 = add i32 %28, 144
>  %30 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %29)
>  %31 = shl i32 %25, 4
>  %32 = add i32 %31, 148
>  %33 = call float @llvm.SI.load.const(<16 x i8> %27, i32 %32)
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = shl i32 %25, 4
>  %37 = add i32 %36, 152
>  %38 = call float @llvm.SI.load.const(<16 x i8> %35, i32 %37)
>  %39 = call float @llvm.SI.load.const(<16 x i8> %35, i32 64)
>  %40 = fsub float %39, %30
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 68)
>  %44 = fsub float %43, %33
>  %45 = call float @llvm.SI.load.const(<16 x i8> %42, i32 72)
>  %46 = fsub float %45, %38
>  %47 = add i32 %25, 1
>  %48 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %49 = load <16 x i8>, <16 x i8> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = shl i32 %47, 4
>  %51 = add i32 %50, 144
>  %52 = call float @llvm.SI.load.const(<16 x i8> %49, i32 %51)
>  %53 = fadd float %52, -3.276800e+04
>  %54 = shl i32 %47, 4
>  %55 = add i32 %54, 148
>  %56 = call float @llvm.SI.load.const(<16 x i8> %49, i32 %55)
>  %57 = fadd float %56, -3.276800e+04
>  %58 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %59 = load <16 x i8>, <16 x i8> addrspace(2)* %58, align 16, !invariant.load !0
>  %60 = shl i32 %47, 4
>  %61 = add i32 %60, 152
>  %62 = call float @llvm.SI.load.const(<16 x i8> %59, i32 %61)
>  %63 = fadd float %62, -8.192000e+03
>  %64 = shl i32 %47, 4
>  %65 = add i32 %64, 156
>  %66 = call float @llvm.SI.load.const(<16 x i8> %59, i32 %65)
>  %67 = fadd float %66, -8.192000e+03
>  %68 = fadd float %67, -3.200000e+01
>  %69 = call float @llvm.sin.f32(float %68)
>  %70 = call float @llvm.cos.f32(float %68)
>  %71 = fmul float %40, %40
>  %72 = fmul float %44, %44
>  %73 = fadd float %72, %71
>  %74 = fmul float %46, %46
>  %75 = fadd float %73, %74
>  %76 = call float @llvm.sqrt.f32(float %75)
>  %77 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %78 = load <16 x i8>, <16 x i8> addrspace(2)* %77, align 16, !invariant.load !0
>  %79 = call float @llvm.SI.load.const(<16 x i8> %78, i32 3708)
>  %80 = call float @llvm.pow.f32(float %76, float %79)
>  %81 = fmul float %63, %80
>  %82 = fsub float -0.000000e+00, %69
>  %83 = fmul float %70, %19
>  %84 = fmul float %69, %19
>  %85 = fmul float %20, %82
>  %86 = fadd float %85, %83
>  %87 = fmul float %70, %20
>  %88 = fadd float %87, %84
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = call float @llvm.SI.load.const(<16 x i8> %90, i32 112)
>  %92 = fmul float %91, %86
>  %93 = call float @llvm.SI.load.const(<16 x i8> %90, i32 116)
>  %94 = fmul float %93, %86
>  %95 = call float @llvm.SI.load.const(<16 x i8> %90, i32 120)
>  %96 = fmul float %95, %86
>  %97 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %98 = load <16 x i8>, <16 x i8> addrspace(2)* %97, align 16, !invariant.load !0
>  %99 = call float @llvm.SI.load.const(<16 x i8> %98, i32 128)
>  %100 = fmul float %99, %88
>  %101 = fadd float %100, %92
>  %102 = call float @llvm.SI.load.const(<16 x i8> %98, i32 132)
>  %103 = fmul float %102, %88
>  %104 = fadd float %103, %94
>  %105 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %106 = load <16 x i8>, <16 x i8> addrspace(2)* %105, align 16, !invariant.load !0
>  %107 = call float @llvm.SI.load.const(<16 x i8> %106, i32 136)
>  %108 = fmul float %107, %88
>  %109 = fadd float %108, %96
>  %110 = fmul float %81, %101
>  %111 = fadd float %110, %30
>  %112 = fmul float %81, %104
>  %113 = fadd float %112, %33
>  %114 = fmul float %81, %109
>  %115 = fadd float %114, %38
>  %116 = call float @llvm.floor.f32(float %53)
>  %117 = fsub float %53, %116
>  %118 = call float @llvm.floor.f32(float %57)
>  %119 = fsub float %57, %118
>  %120 = fsub float %53, %117
>  %121 = fsub float %57, %119
>  %122 = fmul float %120, 0x3F70101020000000
>  %123 = fmul float %121, 0x3F70101020000000
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 0)
>  %127 = fmul float %126, %111
>  %128 = call float @llvm.SI.load.const(<16 x i8> %125, i32 4)
>  %129 = fmul float %128, %111
>  %130 = call float @llvm.SI.load.const(<16 x i8> %125, i32 8)
>  %131 = fmul float %130, %111
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 12)
>  %135 = fmul float %134, %111
>  %136 = call float @llvm.SI.load.const(<16 x i8> %133, i32 16)
>  %137 = fmul float %136, %113
>  %138 = fadd float %137, %127
>  %139 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %140 = load <16 x i8>, <16 x i8> addrspace(2)* %139, align 16, !invariant.load !0
>  %141 = call float @llvm.SI.load.const(<16 x i8> %140, i32 20)
>  %142 = fmul float %141, %113
>  %143 = fadd float %142, %129
>  %144 = call float @llvm.SI.load.const(<16 x i8> %140, i32 24)
>  %145 = fmul float %144, %113
>  %146 = fadd float %145, %131
>  %147 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %148 = load <16 x i8>, <16 x i8> addrspace(2)* %147, align 16, !invariant.load !0
>  %149 = call float @llvm.SI.load.const(<16 x i8> %148, i32 28)
>  %150 = fmul float %149, %113
>  %151 = fadd float %150, %135
>  %152 = call float @llvm.SI.load.const(<16 x i8> %148, i32 32)
>  %153 = fmul float %152, %115
>  %154 = fadd float %153, %138
>  %155 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %156 = load <16 x i8>, <16 x i8> addrspace(2)* %155, align 16, !invariant.load !0
>  %157 = call float @llvm.SI.load.const(<16 x i8> %156, i32 36)
>  %158 = fmul float %157, %115
>  %159 = fadd float %158, %143
>  %160 = call float @llvm.SI.load.const(<16 x i8> %156, i32 40)
>  %161 = fmul float %160, %115
>  %162 = fadd float %161, %146
>  %163 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %164 = load <16 x i8>, <16 x i8> addrspace(2)* %163, align 16, !invariant.load !0
>  %165 = call float @llvm.SI.load.const(<16 x i8> %164, i32 44)
>  %166 = fmul float %165, %115
>  %167 = fadd float %166, %151
>  %168 = call float @llvm.SI.load.const(<16 x i8> %164, i32 48)
>  %169 = fadd float %154, %168
>  %170 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %171 = load <16 x i8>, <16 x i8> addrspace(2)* %170, align 16, !invariant.load !0
>  %172 = call float @llvm.SI.load.const(<16 x i8> %171, i32 52)
>  %173 = fadd float %159, %172
>  %174 = call float @llvm.SI.load.const(<16 x i8> %171, i32 56)
>  %175 = fadd float %162, %174
>  %176 = call float @llvm.SI.load.const(<16 x i8> %171, i32 60)
>  %177 = fadd float %167, %176
>  %178 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %179 = load <16 x i8>, <16 x i8> addrspace(2)* %178, align 16, !invariant.load !0
>  %180 = call float @llvm.SI.load.const(<16 x i8> %179, i32 3696)
>  %181 = fmul float %122, %180
>  %182 = call float @llvm.SI.load.const(<16 x i8> %179, i32 3696)
>  %183 = fmul float %123, %182
>  %184 = call float @llvm.SI.load.const(<16 x i8> %179, i32 3696)
>  %185 = fmul float %117, %184
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = call float @llvm.SI.load.const(<16 x i8> %187, i32 3700)
>  %189 = fadd float %119, -1.000000e+00
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 3700)
>  %191 = fmul float %189, %190
>  %192 = call float @llvm.SI.load.const(<16 x i8> %187, i32 3700)
>  %193 = fadd float %192, %119
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = call float @llvm.SI.load.const(<16 x i8> %195, i32 3700)
>  %197 = fcmp oeq float %196, 0.000000e+00
>  %198 = select i1 %197, float %193, float %188
>  %199 = fadd float %19, 5.000000e-01
>  %200 = fadd float %20, 5.000000e-01
>  %201 = fsub float 1.000000e+00, %200
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = call float @llvm.SI.load.const(<16 x i8> %203, i32 3704)
>  %205 = call float @llvm.floor.f32(float %204)
>  %206 = fsub float %204, %205
>  %207 = call float @llvm.SI.load.const(<16 x i8> %203, i32 3704)
>  %208 = fsub float %207, %206
>  %209 = fmul float %199, %206
>  %210 = fdiv float 1.000000e+00, %208, !fpmath !1
>  %211 = fmul float %201, %210
>  %212 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %213 = load <16 x i8>, <16 x i8> addrspace(2)* %212, align 16, !invariant.load !0
>  %214 = shl i32 %25, 4
>  %215 = add i32 %214, 156
>  %216 = call float @llvm.SI.load.const(<16 x i8> %213, i32 %215)
>  %217 = fadd float %216, -1.280000e+02
>  %218 = fmul float %217, %208
>  %219 = call float @llvm.floor.f32(float %218)
>  %220 = fsub float %218, %219
>  %221 = fadd float %209, %220
>  %222 = fsub float %218, %220
>  %223 = fdiv float 1.000000e+00, %208, !fpmath !1
>  %224 = fmul float %222, %223
>  %225 = fadd float %224, %211
>  %226 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %227 = load <16 x i8>, <16 x i8> addrspace(2)* %226, align 16, !invariant.load !0
>  %228 = call float @llvm.SI.load.const(<16 x i8> %227, i32 64)
>  %229 = fsub float %228, %30
>  %230 = call float @llvm.SI.load.const(<16 x i8> %227, i32 68)
>  %231 = fsub float %230, %33
>  %232 = call float @llvm.SI.load.const(<16 x i8> %227, i32 72)
>  %233 = fsub float %232, %38
>  %234 = fmul float %229, %229
>  %235 = fmul float %231, %231
>  %236 = fadd float %235, %234
>  %237 = fmul float %233, %233
>  %238 = fadd float %236, %237
>  %239 = call float @llvm.sqrt.f32(float %238)
>  %240 = fdiv float 1.000000e+00, %239, !fpmath !1
>  %241 = fmul float %229, %240
>  %242 = fmul float %231, %240
>  %243 = fmul float %233, %240
>  %244 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %245 = load <16 x i8>, <16 x i8> addrspace(2)* %244, align 16, !invariant.load !0
>  %246 = call float @llvm.SI.load.const(<16 x i8> %245, i32 132)
>  %247 = fmul float %243, %246
>  %248 = call float @llvm.SI.load.const(<16 x i8> %245, i32 136)
>  %249 = fmul float %241, %248
>  %250 = call float @llvm.SI.load.const(<16 x i8> %245, i32 128)
>  %251 = fmul float %242, %250
>  %252 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %253 = load <16 x i8>, <16 x i8> addrspace(2)* %252, align 16, !invariant.load !0
>  %254 = call float @llvm.SI.load.const(<16 x i8> %253, i32 136)
>  %255 = fmul float %242, %254
>  %256 = fsub float %255, %247
>  %257 = call float @llvm.SI.load.const(<16 x i8> %253, i32 128)
>  %258 = fmul float %243, %257
>  %259 = fsub float %258, %249
>  %260 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %261 = load <16 x i8>, <16 x i8> addrspace(2)* %260, align 16, !invariant.load !0
>  %262 = call float @llvm.SI.load.const(<16 x i8> %261, i32 132)
>  %263 = fmul float %241, %262
>  %264 = fsub float %263, %251
>  %265 = fmul float %256, %256
>  %266 = fmul float %259, %259
>  %267 = fadd float %266, %265
>  %268 = fmul float %264, %264
>  %269 = fadd float %267, %268
>  %270 = call float @llvm.sqrt.f32(float %269)
>  %271 = fdiv float 1.000000e+00, %270, !fpmath !1
>  %272 = fmul float %256, %271
>  %273 = fmul float %259, %271
>  %274 = fmul float %264, %271
>  %275 = fmul float %274, %242
>  %276 = fmul float %272, %243
>  %277 = fmul float %273, %241
>  %278 = fmul float %273, %243
>  %279 = fsub float %278, %275
>  %280 = fmul float %274, %241
>  %281 = fsub float %280, %276
>  %282 = fmul float %272, %242
>  %283 = fsub float %282, %277
>  %284 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %285 = load <16 x i8>, <16 x i8> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = call float @llvm.SI.load.const(<16 x i8> %285, i32 80)
>  %287 = fsub float %241, %286
>  %288 = call float @llvm.SI.load.const(<16 x i8> %285, i32 84)
>  %289 = fsub float %242, %288
>  %290 = call float @llvm.SI.load.const(<16 x i8> %285, i32 88)
>  %291 = fsub float %243, %290
>  %292 = fmul float %287, 5.000000e-01
>  %293 = fmul float %289, 5.000000e-01
>  %294 = fmul float %291, 5.000000e-01
>  %295 = fmul float %292, %292
>  %296 = fmul float %293, %293
>  %297 = fadd float %296, %295
>  %298 = fmul float %294, %294
>  %299 = fadd float %297, %298
>  %300 = call float @llvm.sqrt.f32(float %299)
>  %301 = fdiv float 1.000000e+00, %300, !fpmath !1
>  %302 = fmul float %292, %301
>  %303 = fmul float %293, %301
>  %304 = fmul float %294, %301
>  %305 = fmul float %302, %272
>  %306 = fmul float %303, %273
>  %307 = fadd float %306, %305
>  %308 = fmul float %304, %274
>  %309 = fadd float %307, %308
>  %310 = fmul float %279, %279
>  %311 = fmul float %281, %281
>  %312 = fadd float %311, %310
>  %313 = fmul float %283, %283
>  %314 = fadd float %312, %313
>  %315 = call float @llvm.sqrt.f32(float %314)
>  %316 = fdiv float 1.000000e+00, %315, !fpmath !1
>  %317 = fmul float %279, %316
>  %318 = fmul float %281, %316
>  %319 = fmul float %283, %316
>  %320 = fmul float %302, %317
>  %321 = fmul float %303, %318
>  %322 = fadd float %321, %320
>  %323 = fmul float %304, %319
>  %324 = fadd float %322, %323
>  %325 = fmul float %302, %241
>  %326 = fmul float %303, %242
>  %327 = fadd float %326, %325
>  %328 = fmul float %304, %243
>  %329 = fadd float %327, %328
>  %330 = fmul float %309, %70
>  %331 = fmul float %324, %69
>  %332 = fadd float %330, %331
>  %333 = fmul float %309, %82
>  %334 = fmul float %324, %70
>  %335 = fadd float %333, %334
>  %336 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %337 = load <16 x i8>, <16 x i8> addrspace(2)* %336, align 16, !invariant.load !0
>  %338 = call float @llvm.SI.load.const(<16 x i8> %337, i32 100)
>  %339 = call float @llvm.SI.load.const(<16 x i8> %337, i32 96)
>  %340 = fmul float %175, %338
>  %341 = fadd float %340, %339
>  %342 = call float @llvm.AMDGPU.clamp.(float %341, float 0.000000e+00, float 1.000000e+00)
>  %343 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %344 = load <16 x i8>, <16 x i8> addrspace(2)* %343, align 16, !invariant.load !0
>  %345 = call float @llvm.SI.load.const(<16 x i8> %344, i32 104)
>  %346 = call float @llvm.pow.f32(float %342, float %345)
>  %347 = call float @llvm.SI.load.const(<16 x i8> %344, i32 108)
>  %348 = fsub float 1.000000e+00, %347
>  %349 = call float @llvm.SI.load.const(<16 x i8> %344, i32 108)
>  %350 = fmul float %349, %346
>  %351 = fadd float %350, %348
>  %352 = fmul float %351, %351
>  %353 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %354 = load <16 x i8>, <16 x i8> addrspace(2)* %353, align 16, !invariant.load !0
>  %355 = call float @llvm.SI.load.const(<16 x i8> %354, i32 76)
>  %356 = fsub float %113, %355
>  %357 = call float @llvm.maxnum.f32(float %356, float 0.000000e+00)
>  %358 = call float @llvm.SI.load.const(<16 x i8> %354, i32 92)
>  %359 = call float @llvm.SI.load.const(<16 x i8> %354, i32 76)
>  %360 = fsub float %358, %359
>  %361 = fadd float %360, 0x3F50624DE0000000
>  %362 = fdiv float 1.000000e+00, %361, !fpmath !1
>  %363 = fmul float %357, %362
>  %364 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %365 = load <16 x i8>, <16 x i8> addrspace(2)* %364, align 16, !invariant.load !0
>  %366 = call float @llvm.SI.load.const(<16 x i8> %365, i32 92)
>  %367 = call float @llvm.floor.f32(float %366)
>  %368 = fsub float %366, %367
>  %369 = fmul float %368, 8.000000e+00
>  %370 = call float @llvm.pow.f32(float %363, float %369)
>  %371 = call float @llvm.AMDGPU.clamp.(float %370, float 0.000000e+00, float 1.000000e+00)
>  %372 = fmul float %352, %371
>  %373 = fmul float %81, 0x3FB99999A0000000
>  %374 = fsub float %175, %373
>  %375 = call float @llvm.AMDGPU.clamp.(float %374, float 0.000000e+00, float 1.000000e+00)
>  %376 = fmul float %119, %375
>  %377 = bitcast i32 %12 to float
>  %378 = insertvalue <{ float, float, float }> undef, float %377, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %181, float %183, float %185, float %376)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %198, float %191, float %221, float %225)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %372, float %332, float %335, float %329)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %169, float %173, float %175, float %177)
>  ret <{ float, float, float }> %378
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sin.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.cos.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[0..1]
>DCL TEMP[0..2], LOCAL
>IMM[0] FLT32 {    0.0005,     1.0000,     1.9375,     2.0000}
>IMM[1] FLT32 {   -1.0000,     8.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].xy, IN[1].zwww
>  1: TEX TEMP[0], TEMP[0], SAMP[0], 2D
>  2: MUL TEMP[1].xyz, IN[0].xyzz, TEMP[0].xyzz
>  3: MAD TEMP[0].x, TEMP[0].wwww, IN[1].xxxx, IN[1].yyyy
>  4: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>  5: FSLT TEMP[2].x, TEMP[0].xxxx, IMM[0].xxxx
>  6: AND TEMP[2].x, TEMP[2].xxxx, IMM[0].yyyy
>  7: KILL_IF -TEMP[2].xxxx
>  8: LRP TEMP[1].xyz, IN[2].xxxx, TEMP[1].xyzz, CONST[0].xyzz
>  9: MOV TEMP[2].xy, IN[1].zwww
> 10: TEX TEMP[2].xyz, TEMP[2], SAMP[1], 2D
> 11: MAD TEMP[2].xyz, TEMP[2].xyzz, IMM[0].wwww, IMM[1].xxxx
> 12: DP3 TEMP[2].x, IN[2].yzww, TEMP[2].xyzz
> 13: MOV_SAT TEMP[2].x, TEMP[2].xxxx
> 14: POW TEMP[2].x, TEMP[2].xxxx, IMM[1].yyyy
> 15: MUL TEMP[2].x, IMM[0].zzzz, TEMP[2].xxxx
> 16: MAD TEMP[1].xyz, TEMP[2].xxxx, CONST[1].xyzz, TEMP[1].xyzz
> 17: MOV TEMP[1].xyz, TEMP[1].xyzx
> 18: MOV TEMP[1].w, TEMP[0].xxxx
> 19: MOV OUT[0], TEMP[1]
> 20: END
>radeonsi: Compiling shader 114
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 1
>  %41 = extractelement <4 x float> %38, i32 2
>  %42 = extractelement <4 x float> %38, i32 3
>  %43 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %44 = fmul float %43, %39
>  %45 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %46 = fmul float %45, %40
>  %47 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %48 = fmul float %47, %41
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %51 = fmul float %42, %49
>  %52 = fadd float %51, %50
>  %53 = call float @llvm.AMDGPU.clamp.(float %52, float 0.000000e+00, float 1.000000e+00)
>  %54 = fcmp olt float %53, 0x3F3FFFFEE0000000
>  %55 = select i1 %54, float -1.000000e+00, float 0.000000e+00
>  call void @llvm.AMDGPU.kill(float %55)
>  %56 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 0)
>  %60 = fsub float 1.000000e+00, %56
>  %61 = fmul float %44, %56
>  %62 = fmul float %59, %60
>  %63 = fadd float %61, %62
>  %64 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !invariant.load !0
>  %67 = call float @llvm.SI.load.const(<16 x i8> %66, i32 4)
>  %68 = fsub float 1.000000e+00, %64
>  %69 = fmul float %46, %64
>  %70 = fmul float %67, %68
>  %71 = fadd float %69, %70
>  %72 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 8)
>  %76 = fsub float 1.000000e+00, %72
>  %77 = fmul float %48, %72
>  %78 = fmul float %75, %76
>  %79 = fadd float %77, %78
>  %80 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 7, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 0
>  %97 = extractelement <4 x float> %95, i32 1
>  %98 = extractelement <4 x float> %95, i32 2
>  %99 = fmul float %96, 2.000000e+00
>  %100 = fadd float %99, -1.000000e+00
>  %101 = fmul float %97, 2.000000e+00
>  %102 = fadd float %101, -1.000000e+00
>  %103 = fmul float %98, 2.000000e+00
>  %104 = fadd float %103, -1.000000e+00
>  %105 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %106 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %107 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %108 = fmul float %105, %100
>  %109 = fmul float %106, %102
>  %110 = fadd float %109, %108
>  %111 = fmul float %107, %104
>  %112 = fadd float %110, %111
>  %113 = call float @llvm.AMDGPU.clamp.(float %112, float 0.000000e+00, float 1.000000e+00)
>  %114 = call float @llvm.pow.f32(float %113, float 8.000000e+00)
>  %115 = fmul float %114, 1.937500e+00
>  %116 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %117 = load <16 x i8>, <16 x i8> addrspace(2)* %116, align 16, !invariant.load !0
>  %118 = call float @llvm.SI.load.const(<16 x i8> %117, i32 16)
>  %119 = fmul float %115, %118
>  %120 = fadd float %119, %63
>  %121 = call float @llvm.SI.load.const(<16 x i8> %117, i32 20)
>  %122 = fmul float %115, %121
>  %123 = fadd float %122, %71
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 24)
>  %127 = fmul float %115, %126
>  %128 = fadd float %127, %79
>  %129 = bitcast float %5 to i32
>  %130 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %129, 10
>  %131 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %130, float %120, 11
>  %132 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %131, float %123, 12
>  %133 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %132, float %128, 13
>  %134 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %133, float %53, 14
>  %135 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %134, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %135
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind
>declare void @llvm.AMDGPU.kill(float) #2
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                 ; C0840B04
>	v_mov_b32_e32 v1, 0xc6000000                          ; 7E0202FF C6000000
>	v_mov_b32_e32 v0, 0xc7000000                          ; 7E0002FF C7000000
>	v_mov_b32_e32 v3, 0x3b808081                          ; 7E0602FF 3B808081
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen   ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	buffer_load_format_xyzw v[8:11], v5, s[8:11], 0 idxen ; E00C2000 80020805
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                    ; C0820300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_buffer_load_dword s21, s[4:7], 0x39e                ; C20A84FF 0000039E
>	s_buffer_load_dword s15, s[4:7], 0x10                 ; C2078510
>	s_buffer_load_dword s16, s[4:7], 0x11                 ; C2080511
>	s_buffer_load_dword s17, s[4:7], 0x12                 ; C2088512
>	s_buffer_load_dword s12, s[4:7], 0x14                 ; C2060514
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_floor_f32_e32 v4, s21                               ; 7E084815
>	v_sub_f32_e32 v4, s21, v4                             ; 08080815
>	v_sub_f32_e32 v5, s21, v4                             ; 080A0815
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_rcp_f32_e32 v9, v5                                  ; 7E125505
>	s_buffer_load_dword s13, s[4:7], 0x15                 ; C2068515
>	s_buffer_load_dword s10, s[4:7], 0x21                 ; C2050521
>	s_buffer_load_dword s14, s[4:7], 0x16                 ; C2070516
>	s_buffer_load_dword s11, s[4:7], 0x22                 ; C2058522
>	s_buffer_load_dword s9, s[4:7], 0x20                  ; C2048520
>	s_buffer_load_dword s18, s[4:7], 0x39f                ; C20904FF 0000039F
>	s_buffer_load_dword s19, s[4:7], 0x1c                 ; C209851C
>	s_buffer_load_dword s20, s[4:7], 0x1d                 ; C20A051D
>	s_buffer_load_dword s8, s[4:7], 0x1e                  ; C204051E
>	s_buffer_load_dword s3, s[4:7], 0x39c                 ; C20184FF 0000039C
>	s_buffer_load_dword s21, s[4:7], 0x8                  ; C20A8508
>	s_buffer_load_dword s22, s[4:7], 0x9                  ; C20B0509
>	s_buffer_load_dword s23, s[4:7], 0xa                  ; C20B850A
>	s_buffer_load_dword s24, s[4:7], 0xb                  ; C20C050B
>	s_buffer_load_dword s25, s[4:7], 0xc                  ; C20C850C
>	s_buffer_load_dword s0, s[4:7], 0x17                  ; C2000517
>	s_buffer_load_dword s2, s[4:7], 0x18                  ; C2010518
>	s_buffer_load_dword s1, s[4:7], 0x13                  ; C2008513
>	s_buffer_load_dword s26, s[4:7], 0xd                  ; C20D050D
>	v_add_f32_e32 v10, 0.5, v6                            ; 06140CF0
>	v_cvt_i32_f32_e32 v8, v8                              ; 7E101108
>	v_add_f32_e32 v11, 0.5, v7                            ; 06160EF0
>	v_mad_f32 v11, -v11, v9, v9                           ; D282000B 2426130B
>	v_lshlrev_b32_e32 v8, 4, v8                           ; 34101084
>	v_add_i32_e32 v17, vcc, 0xa8, v8                      ; 4A2210FF 000000A8
>	v_add_i32_e32 v20, vcc, 0xac, v8                      ; 4A2810FF 000000AC
>	buffer_load_dword v17, v17, s[4:7], 0 offen           ; E0301000 80011111
>	buffer_load_dword v20, v20, s[4:7], 0 offen           ; E0301000 80011414
>	v_add_i32_e32 v12, vcc, 0x90, v8                      ; 4A1810FF 00000090
>	v_add_i32_e32 v15, vcc, 0xa0, v8                      ; 4A1E10FF 000000A0
>	v_add_i32_e32 v16, vcc, 0xa4, v8                      ; 4A2010FF 000000A4
>	v_add_i32_e32 v13, vcc, 0x94, v8                      ; 4A1A10FF 00000094
>	buffer_load_dword v15, v15, s[4:7], 0 offen           ; E0301000 80010F0F
>	buffer_load_dword v12, v12, s[4:7], 0 offen           ; E0301000 80010C0C
>	buffer_load_dword v16, v16, s[4:7], 0 offen           ; E0301000 80011010
>	v_add_i32_e32 v14, vcc, 0x98, v8                      ; 4A1C10FF 00000098
>	buffer_load_dword v13, v13, s[4:7], 0 offen           ; E0301000 80010D0D
>	buffer_load_dword v14, v14, s[4:7], 0 offen           ; E0301000 80010E0E
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_add_f32_e32 v17, v1, v17                            ; 06222301
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_add_f32_e32 v1, v1, v20                             ; 06022901
>	v_add_f32_e32 v1, 0xc2000000, v1                      ; 060202FF C2000000
>	v_mul_f32_e32 v1, 0x3e22f983, v1                      ; 100202FF 3E22F983
>	v_fract_f32_e32 v1, v1                                ; 7E024101
>	v_sin_f32_e32 v20, v1                                 ; 7E286B01
>	v_cos_f32_e32 v1, v1                                  ; 7E026D01
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_add_f32_e32 v15, v0, v15                            ; 061E1F00
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_add_f32_e32 v0, v0, v16                             ; 06002100
>	v_mul_f32_e32 v21, v20, v7                            ; 102A0F14
>	v_mad_f32 v21, v1, v6, -v21                           ; D2820015 84560D01
>	v_mul_f32_e32 v6, v6, v20                             ; 100C2906
>	v_mac_f32_e32 v6, v7, v1                              ; 3E0C0307
>	v_add_i32_e32 v7, vcc, 0x9c, v8                       ; 4A0E10FF 0000009C
>	buffer_load_dword v7, v7, s[4:7], 0 offen             ; E0301000 80010707
>	v_sub_f32_e32 v16, s15, v12                           ; 0820180F
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_sub_f32_e32 v18, s16, v13                           ; 08241A10
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_sub_f32_e32 v19, s17, v14                           ; 08261C11
>	s_buffer_load_dword s15, s[4:7], 0x2                  ; C2078502
>	s_buffer_load_dword s16, s[4:7], 0x3                  ; C2080503
>	s_buffer_load_dword s17, s[4:7], 0x4                  ; C2088504
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_add_f32_e32 v7, 0xc3000000, v7                      ; 060E0EFF C3000000
>	v_mul_f32_e32 v8, v5, v7                              ; 10100F05
>	v_floor_f32_e32 v8, v8                                ; 7E104908
>	v_mad_f32 v8, v7, v5, -v8                             ; D2820008 84220B07
>	v_mad_f32 v5, v7, v5, -v8                             ; D2820005 84220B07
>	v_mac_f32_e32 v8, v4, v10                             ; 3E101504
>	v_mul_f32_e32 v4, v16, v16                            ; 10082110
>	v_mac_f32_e32 v4, v18, v18                            ; 3E082512
>	v_mac_f32_e32 v4, v19, v19                            ; 3E082713
>	v_mac_f32_e32 v11, v9, v5                             ; 3E160B09
>	v_rsq_f32_e32 v5, v4                                  ; 7E0A5D04
>	v_mad_f32 v9, v16, v5, -s12                           ; D2820009 80320B10
>	v_mul_f32_e32 v7, v5, v16                             ; 100E2105
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mad_f32 v16, v18, v5, -s13                          ; D2820010 80360B12
>	v_mul_f32_e32 v10, v5, v18                            ; 10142505
>	v_mul_f32_e32 v18, v5, v19                            ; 10242705
>	v_mad_f32 v5, v19, v5, -s14                           ; D2820005 803A0B13
>	v_mul_f32_e32 v19, s10, v18                           ; 1026240A
>	v_mul_f32_e32 v22, s11, v7                            ; 102C0E0B
>	v_mad_f32 v19, v10, s11, -v19                         ; D2820013 844C170A
>	v_mul_f32_e32 v23, s9, v10                            ; 102E1409
>	v_mad_f32 v22, v18, s9, -v22                          ; D2820016 84581312
>	v_mul_f32_e32 v24, v19, v19                           ; 10302713
>	v_mad_f32 v23, v7, s10, -v23                          ; D2820017 845C1507
>	v_mac_f32_e32 v24, v22, v22                           ; 3E302D16
>	v_mac_f32_e32 v24, v23, v23                           ; 3E302F17
>	v_rsq_f32_e32 v24, v24                                ; 7E305D18
>	v_mul_f32_e32 v9, 0.5, v9                             ; 101212F0
>	v_mul_f32_e32 v16, 0.5, v16                           ; 102020F0
>	v_mul_f32_e32 v5, 0.5, v5                             ; 100A0AF0
>	v_mul_f32_e32 v19, v24, v19                           ; 10262718
>	v_mul_f32_e32 v22, v24, v22                           ; 102C2D18
>	v_mul_f32_e32 v23, v24, v23                           ; 102E2F18
>	v_mul_f32_e32 v24, v9, v9                             ; 10301309
>	v_mac_f32_e32 v24, v16, v16                           ; 3E302110
>	v_mac_f32_e32 v24, v5, v5                             ; 3E300B05
>	v_rsq_f32_e32 v24, v24                                ; 7E305D18
>	v_mul_f32_e32 v25, v18, v19                           ; 10322712
>	v_mad_f32 v25, v23, v7, -v25                          ; D2820019 84660F17
>	s_buffer_load_dword s13, s[4:7], 0x0                  ; C2068500
>	v_mul_f32_e32 v9, v24, v9                             ; 10121318
>	v_mul_f32_e32 v26, v7, v9                             ; 10341307
>	v_mul_f32_e32 v7, v7, v22                             ; 100E2D07
>	v_mul_f32_e32 v16, v24, v16                           ; 10202118
>	v_mad_f32 v7, v19, v10, -v7                           ; D2820007 841E1513
>	v_mac_f32_e32 v26, v10, v16                           ; 3E34210A
>	v_mul_f32_e32 v10, v10, v23                           ; 10142F0A
>	v_mul_f32_e32 v19, v19, v9                            ; 10261313
>	v_mad_f32 v10, v22, v18, -v10                         ; D282000A 842A2516
>	v_mac_f32_e32 v19, v22, v16                           ; 3E262116
>	v_mul_f32_e32 v22, v10, v10                           ; 102C150A
>	v_mac_f32_e32 v22, v25, v25                           ; 3E2C3319
>	v_mac_f32_e32 v22, v7, v7                             ; 3E2C0F07
>	v_rsq_f32_e32 v22, v22                                ; 7E2C5D16
>	s_buffer_load_dword s14, s[4:7], 0x1                  ; C2070501
>	s_buffer_load_dword s12, s[4:7], 0x1b                 ; C206051B
>	v_mul_f32_e32 v10, v22, v10                           ; 10141516
>	v_mul_f32_e32 v9, v10, v9                             ; 1012130A
>	v_mul_f32_e32 v10, v22, v25                           ; 10143316
>	v_mac_f32_e32 v9, v10, v16                            ; 3E12210A
>	v_floor_f32_e32 v10, v15                              ; 7E14490F
>	v_floor_f32_e32 v16, v0                               ; 7E204900
>	v_subrev_f32_e32 v10, v10, v15                        ; 0A141F0A
>	v_subrev_f32_e32 v16, v16, v0                         ; 0A200110
>	v_subrev_f32_e32 v15, v10, v15                        ; 0A1E1F0A
>	v_subrev_f32_e32 v0, v16, v0                          ; 0A000110
>	v_mul_f32_e32 v0, v3, v0                              ; 10000103
>	v_mul_f32_e32 v15, v3, v15                            ; 101E1F03
>	v_sqrt_f32_e32 v3, v4                                 ; 7E066704
>	v_log_f32_e32 v3, v3                                  ; 7E064F03
>	v_mul_f32_e32 v4, s19, v21                            ; 10082A13
>	s_buffer_load_dword s19, s[4:7], 0x6                  ; C2098506
>	v_mac_f32_e32 v4, s9, v6                              ; 3E080C09
>	v_mul_legacy_f32_e32 v3, s18, v3                      ; 0E060612
>	v_exp_f32_e32 v3, v3                                  ; 7E064B03
>	v_mul_f32_e32 v3, v3, v17                             ; 10062303
>	v_mul_f32_e32 v17, s20, v21                           ; 10222A14
>	s_buffer_load_dword s18, s[4:7], 0x5                  ; C2090505
>	s_buffer_load_dword s20, s[4:7], 0x7                  ; C20A0507
>	v_mul_f32_e32 v21, s8, v21                            ; 102A2A08
>	v_mac_f32_e32 v17, s10, v6                            ; 3E220C0A
>	v_mac_f32_e32 v21, s11, v6                            ; 3E2A0C0B
>	s_buffer_load_dword s9, s[4:7], 0x39d                 ; C20484FF 0000039D
>	v_mac_f32_e32 v12, v4, v3                             ; 3E180704
>	s_buffer_load_dword s8, s[4:7], 0xf                   ; C204050F
>	s_buffer_load_dword s10, s[4:7], 0x19                 ; C2050519
>	s_buffer_load_dword s11, s[4:7], 0x1a                 ; C205851A
>	s_buffer_load_dword s4, s[4:7], 0xe                   ; C202050E
>	v_mul_f32_e32 v4, v24, v5                             ; 10080B18
>	v_mul_f32_e32 v5, s3, v10                             ; 100A1403
>	v_mul_f32_e32 v10, s3, v15                            ; 10141E03
>	v_mul_f32_e32 v7, v22, v7                             ; 100E0F16
>	v_mac_f32_e32 v13, v17, v3                            ; 3E1A0711
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v15, s13, v12                           ; 101E180D
>	v_mac_f32_e32 v26, v18, v4                            ; 3E340912
>	v_mac_f32_e32 v19, v23, v4                            ; 3E260917
>	v_mac_f32_e32 v9, v7, v4                              ; 3E120907
>	v_mul_f32_e32 v4, s14, v12                            ; 1008180E
>	v_mul_f32_e32 v7, s15, v12                            ; 100E180F
>	v_mul_f32_e32 v12, s16, v12                           ; 10181810
>	v_mac_f32_e32 v14, v21, v3                            ; 3E1C0715
>	v_mac_f32_e32 v15, s17, v13                           ; 3E1E1A11
>	v_mac_f32_e32 v4, s18, v13                            ; 3E081A12
>	v_mac_f32_e32 v7, s19, v13                            ; 3E0E1A13
>	v_mac_f32_e32 v12, s20, v13                           ; 3E181A14
>	v_mac_f32_e32 v15, s21, v14                           ; 3E1E1C15
>	v_mac_f32_e32 v4, s22, v14                            ; 3E081C16
>	v_mac_f32_e32 v7, s23, v14                            ; 3E0E1C17
>	v_mac_f32_e32 v12, s24, v14                           ; 3E181C18
>	v_add_f32_e32 v14, s25, v15                           ; 061C1E19
>	v_mul_f32_e32 v15, v20, v9                            ; 101E1314
>	v_mul_f32_e32 v17, v20, v19                           ; 10222714
>	v_mac_f32_e32 v15, v1, v19                            ; 3E1E2701
>	v_mad_f32 v1, v9, v1, -v17                            ; D2820001 84460309
>	v_add_f32_e32 v7, s4, v7                              ; 060E0E04
>	v_mov_b32_e32 v9, s2                                  ; 7E120202
>	v_mac_f32_e32 v9, s10, v7                             ; 3E120E0A
>	v_add_f32_e64 v9, v9, 0 clamp                         ; D2060809 00010109
>	v_log_f32_e32 v9, v9                                  ; 7E124F09
>	v_add_f32_e32 v18, s9, v16                            ; 06242009
>	v_cmp_eq_f32_e64 vcc, s9, 0                           ; D004006A 00010009
>	v_mov_b32_e32 v17, s9                                 ; 7E220209
>	v_mul_legacy_f32_e32 v9, s11, v9                      ; 0E12120B
>	v_cndmask_b32_e32 v17, v17, v18, vcc                  ; 00222511
>	v_exp_f32_e32 v9, v9                                  ; 7E124B09
>	v_sub_f32_e64 v18, 1.0, s12                           ; D2080012 000018F2
>	v_mac_f32_e32 v18, s12, v9                            ; 3E24120C
>	v_mov_b32_e32 v9, s1                                  ; 7E120201
>	v_sub_f32_e32 v9, s0, v9                              ; 08121200
>	v_add_f32_e32 v9, 0x3a83126f, v9                      ; 061212FF 3A83126F
>	v_rcp_f32_e32 v9, v9                                  ; 7E125509
>	v_subrev_f32_e32 v13, s1, v13                         ; 0A1A1A01
>	v_max_f32_e32 v13, 0, v13                             ; 201A1A80
>	v_mul_f32_e32 v0, s3, v0                              ; 10000003
>	v_mul_f32_e32 v9, v9, v13                             ; 10121B09
>	v_log_f32_e32 v9, v9                                  ; 7E124F09
>	v_floor_f32_e32 v13, s0                               ; 7E1A4800
>	v_sub_f32_e32 v13, s0, v13                            ; 081A1A00
>	v_mul_f32_e32 v13, 0x41000000, v13                    ; 101A1AFF 41000000
>	v_mul_legacy_f32_e32 v9, v13, v9                      ; 0E12130D
>	v_mov_b32_e32 v13, v7                                 ; 7E1A0307
>	v_mac_f32_e32 v13, 0xbdcccccd, v3                     ; 3E1A06FF BDCCCCCD
>	v_add_f32_e64 v3, v13, 0 clamp                        ; D2060803 0001010D
>	v_exp_f32_e32 v9, v9                                  ; 7E124B09
>	v_mul_f32_e32 v3, v3, v16                             ; 10062103
>	v_mad_f32 v6, v16, s9, -s9                            ; D2820006 80241310
>	exp 15, 32, 0, 0, 0, v10, v0, v5, v3                  ; F800020F 0305000A
>	v_mul_f32_e32 v18, v18, v18                           ; 10242512
>	v_add_f32_e64 v9, v9, 0 clamp                         ; D2060809 00010109
>	v_mul_f32_e32 v9, v9, v18                             ; 10122509
>	exp 15, 33, 0, 0, 0, v17, v6, v8, v11                 ; F800021F 0B080611
>	v_add_f32_e32 v4, s26, v4                             ; 0608081A
>	v_add_f32_e32 v12, s8, v12                            ; 06181808
>	exp 15, 34, 0, 0, 0, v9, v15, v1, v26                 ; F800022F 1A010F09
>	exp 15, 12, 0, 1, 0, v14, v4, v7, v12                 ; F80008CF 0C07040E
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 28
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1216 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 9
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[0:1], exec                                      ; BE80047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                        ; C0C60500
>	s_load_dwordx4 s[20:23], s[4:5], 0xc                        ; C08A050C
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v5, v2, 2, 1, [m0]                          ; C8140602
>	v_interp_p2_f32 v5, [v5], v3, 2, 1, [m0]                    ; C8150603
>	v_interp_p1_f32 v6, v2, 3, 1, [m0]                          ; C8180702
>	v_interp_p2_f32 v6, [v6], v3, 3, 1, [m0]                    ; C8190703
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	image_sample v[14:17], v[5:6], s[12:19], s[20:23] dmask:0xf ; F0800F00 00A30E05
>	v_interp_p1_f32 v1, v2, 0, 0, [m0]                          ; C8040002
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                    ; C8050003
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v9, v14, v1                                   ; 1012030E
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                          ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                    ; C8050103
>	v_mul_f32_e32 v7, v15, v1                                   ; 100E030F
>	v_interp_p1_f32 v1, v2, 2, 0, [m0]                          ; C8040202
>	v_interp_p2_f32 v1, [v1], v3, 2, 0, [m0]                    ; C8050203
>	v_mul_f32_e32 v8, v16, v1                                   ; 10100310
>	v_interp_p1_f32 v1, v2, 0, 1, [m0]                          ; C8040402
>	v_interp_p2_f32 v1, [v1], v3, 0, 1, [m0]                    ; C8050403
>	v_interp_p1_f32 v4, v2, 1, 1, [m0]                          ; C8100502
>	v_interp_p2_f32 v4, [v4], v3, 1, 1, [m0]                    ; C8110503
>	v_mac_f32_e32 v4, v1, v17                                   ; 3E082301
>	v_mov_b32_e32 v0, 0x39fffff7                                ; 7E0002FF 39FFFFF7
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_cmp_gt_f32_e32 vcc, v0, v4                                ; 7C080900
>	v_cndmask_b32_e64 v0, 0, -1.0, vcc                          ; D2000000 01A9E680
>	v_cmpx_le_f32_e32 vcc, 0, v0                                ; 7C260080
>	s_cbranch_execnz BB0_2                                      ; BF890000
>	exp 0, 9, 0, 1, 1, v0, v0, v0, v0                           ; F8001890 00000000
>	s_endpgm                                                    ; BF810000
>	s_and_b64 exec, exec, s[0:1]                                ; 87FE007E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v12, v2, 0, 2, [m0]                         ; C8300802
>	v_interp_p2_f32 v12, [v12], v3, 0, 2, [m0]                  ; C8310803
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                       ; C0C60510
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s6, s[0:3], 0x0                         ; C2030100
>	s_buffer_load_dword s7, s[0:3], 0x1                         ; C2038101
>	s_buffer_load_dword s8, s[0:3], 0x2                         ; C2040102
>	s_buffer_load_dword s9, s[0:3], 0x4                         ; C2048104
>	s_buffer_load_dword s11, s[0:3], 0x5                        ; C2058105
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v12, s6, s6                                  ; D2820000 20180D0C
>	v_mad_f32 v1, -v12, s7, s7                                  ; D2820001 201C0F0C
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                         ; C082051C
>	v_mac_f32_e32 v0, v12, v9                                   ; 3E00130C
>	s_buffer_load_dword s0, s[0:3], 0x6                         ; C2000106
>	v_mac_f32_e32 v1, v12, v7                                   ; 3E020F0C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s4, s4, s19                                       ; 87041304
>	image_sample v[9:11], v[5:6], s[12:19], s[4:7] dmask:0x7    ; F0800700 00230905
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mad_f32 v6, 2.0, v10, -1.0                                ; D2820006 03CE14F4
>	v_interp_p1_f32 v10, v2, 1, 2, [m0]                         ; C8280902
>	v_add_f32_e32 v5, v9, v9                                    ; 060A1309
>	v_mad_f32 v9, 2.0, v11, -1.0                                ; D2820009 03CE16F4
>	v_interp_p2_f32 v10, [v10], v3, 1, 2, [m0]                  ; C8290903
>	v_interp_p1_f32 v11, v2, 2, 2, [m0]                         ; C82C0A02
>	v_interp_p2_f32 v11, [v11], v3, 2, 2, [m0]                  ; C82D0A03
>	v_interp_p1_f32 v2, v2, 3, 2, [m0]                          ; C8080B02
>	v_interp_p2_f32 v2, [v2], v3, 3, 2, [m0]                    ; C8090B03
>	v_mad_f32 v3, v5, v10, -v10                                 ; D2820003 842A1505
>	v_mac_f32_e32 v3, v6, v11                                   ; 3E061706
>	v_mac_f32_e32 v3, v9, v2                                    ; 3E060509
>	v_add_f32_e64 v2, v3, 0 clamp                               ; D2060802 00010103
>	v_log_f32_e32 v3, v2                                        ; 7E064F02
>	v_mad_f32 v2, -v12, s8, s8                                  ; D2820002 2020110C
>	v_mac_f32_e32 v2, v12, v8                                   ; 3E04110C
>	v_mul_legacy_f32_e32 v3, 0x41000000, v3                     ; 0E0606FF 41000000
>	v_exp_f32_e32 v3, v3                                        ; 7E064B03
>	v_mul_f32_e32 v3, 0x3ff80000, v3                            ; 100606FF 3FF80000
>	v_mac_f32_e32 v0, s9, v3                                    ; 3E000609
>	v_mac_f32_e32 v1, s11, v3                                   ; 3E02060B
>	v_mac_f32_e32 v2, s0, v3                                    ; 3E040600
>	v_mov_b32_e32 v3, v4                                        ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 404 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen  ; E00C2000 80010704
>	s_buffer_load_dword s4, s[0:3], 0x10                  ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                  ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                  ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x374                 ; C20380FF 00000374
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v0, s4                                  ; 7E000204
>	v_mov_b32_e32 v1, s5                                  ; 7E020205
>	v_mov_b32_e32 v3, s6                                  ; 7E060206
>	s_cmp_eq_u32 s7, -1                                   ; BF06C107
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                  ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x14                  ; C2020114
>	s_buffer_load_dword s5, s[0:3], 0x15                  ; C2028115
>	s_buffer_load_dword s6, s[0:3], 0x16                  ; C2030116
>	s_buffer_load_dword s7, s[0:3], 0x17                  ; C2038117
>	s_buffer_load_dword s8, s[0:3], 0x18                  ; C2040118
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v6, s4                                  ; 7E0C0204
>	v_mov_b32_e32 v12, s5                                 ; 7E180205
>	s_buffer_load_dword s4, s[0:3], 0x19                  ; C2020119
>	s_buffer_load_dword s5, s[0:3], 0x1a                  ; C202811A
>	v_mov_b32_e32 v4, s6                                  ; 7E080206
>	v_sub_f32_e32 v11, s7, v0                             ; 08160007
>	v_mov_b32_e32 v5, s8                                  ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x1b                  ; C203011B
>	s_buffer_load_dword s7, s[0:3], 0x1c                  ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                  ; C204011D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v14, s4                                 ; 7E1C0204
>	v_mov_b32_e32 v13, s5                                 ; 7E1A0205
>	s_buffer_load_dword s4, s[0:3], 0x1e                  ; C202011E
>	s_buffer_load_dword s5, s[0:3], 0x1f                  ; C202811F
>	v_sub_f32_e32 v15, s6, v1                             ; 081E0206
>	v_mov_b32_e32 v16, s7                                 ; 7E200207
>	v_mov_b32_e32 v17, s8                                 ; 7E220208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v18, s4                                 ; 7E240204
>	v_sub_f32_e32 v19, s5, v3                             ; 08260605
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                  ; C0820B08
>	s_movk_i32 s12, 0x54                                  ; B00C0054
>	s_movk_i32 s15, 0x5c                                  ; B00F005C
>	s_movk_i32 s14, 0x50                                  ; B00E0050
>	s_movk_i32 s13, 0x58                                  ; B00D0058
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[4:7], 0 idxen ; E00C2000 80011806
>	s_buffer_load_dword s4, s[0:3], 0x378                 ; C20200FF 00000378
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                   ; BF06C104
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                             ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                              ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s12, v15                      ; 4A161E0C
>	v_add_i32_e32 v14, vcc, s15, v15                      ; 4A1C1E0F
>	v_add_i32_e32 v4, vcc, s14, v15                       ; 4A081E0E
>	buffer_load_dword v12, v11, s[0:3], 0 offen           ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen           ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s13, v15                      ; 4A1A1E0D
>	buffer_load_dword v6, v4, s[0:3], 0 offen             ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen            ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                         ; 0A161700
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                  ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                     ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                     ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                     ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                      ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                     ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                     ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen           ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen           ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                     ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                     ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen           ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen           ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                         ; 0A1E2701
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                         ; 0A262903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                  ; C0820B04
>	s_movk_i32 s11, 0x6c                                  ; B00B006C
>	s_movk_i32 s10, 0x60                                  ; B00A0060
>	s_movk_i32 s9, 0x64                                   ; B0090064
>	s_movk_i32 s8, 0x68                                   ; B0080068
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[4:7], 0 idxen ; E00C2000 80011405
>	v_cvt_i32_f32_e32 v5, v25                             ; 7E0A1119
>	s_movk_i32 s4, 0x7c                                   ; B004007C
>	v_add_i32_e32 v17, vcc, s4, v15                       ; 4A221E04
>	s_movk_i32 s6, 0x74                                   ; B0060074
>	v_mul_lo_i32 v24, v5, 48                              ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s11, v15                       ; 4A0A1E0B
>	s_movk_i32 s7, 0x70                                   ; B0070070
>	s_movk_i32 s5, 0x78                                   ; B0050078
>	v_add_i32_e32 v13, vcc, s10, v15                      ; 4A1A1E0A
>	v_add_i32_e32 v14, vcc, s9, v15                       ; 4A1C1E09
>	v_add_i32_e32 v16, vcc, s8, v15                       ; 4A201E08
>	v_add_i32_e32 v19, vcc, s6, v15                       ; 4A261E06
>	buffer_load_dword v18, v5, s[0:3], 0 offen            ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s7, v15                        ; 4A0A1E07
>	v_add_i32_e32 v15, vcc, s5, v15                       ; 4A1E1E05
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen           ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen           ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen            ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen           ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                    ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                             ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                           ; 10181914
>	v_mul_f32_e32 v4, v20, v4                             ; 10080914
>	v_mul_f32_e32 v11, v20, v11                           ; 10161714
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                         ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                           ; 101E1F14
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                         ; 0A3A2303
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                           ; 101C1D14
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                           ; 10243914
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                            ; 100A1B14
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                           ; 101A2114
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                           ; 10222714
>	v_mul_f32_e32 v16, v20, v25                           ; 10203314
>	v_mul_f32_e32 v19, v20, v29                           ; 10263B14
>	v_add_i32_e32 v20, vcc, s15, v24                      ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                         ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                           ; 3E162915
>	v_add_i32_e32 v20, vcc, s11, v24                      ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                         ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                           ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s14, v24                      ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                            ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s12, v24                      ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_buffer_load_dword s12, s[0:3], 0x37c                ; C20600FF 0000037C
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                   ; BF06800C
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                           ; 3E182915
>	v_add_i32_e32 v20, vcc, s13, v24                      ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                            ; 3E082915
>	v_add_i32_e32 v20, vcc, s10, v24                      ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                            ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s9, v24                       ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                           ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s8, v24                       ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                           ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s7, v24                       ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                           ; 3E202915
>	v_add_i32_e32 v20, vcc, s6, v24                       ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                           ; 3E222915
>	v_add_i32_e32 v20, vcc, s5, v24                       ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                           ; 3E242915
>	v_add_i32_e32 v20, vcc, s4, v24                       ; 4A283004
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                           ; 3E262915
>	s_cbranch_scc1 BB0_6                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                            ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                            ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                           ; 3E162B16
>	v_add_i32_e32 v21, vcc, s11, v20                      ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                           ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                           ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                            ; 3E082B16
>	v_add_i32_e32 v21, vcc, s10, v20                      ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                            ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s9, v20                       ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                           ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s8, v20                       ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                           ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s7, v20                       ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                           ; 3E202B16
>	v_add_i32_e32 v21, vcc, s6, v20                       ; 4A2A2806
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                           ; 3E222B16
>	v_add_i32_e32 v21, vcc, s5, v20                       ; 4A2A2805
>	v_add_i32_e32 v20, vcc, s4, v20                       ; 4A282804
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                           ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                           ; 3E262916
>	s_buffer_load_dword s4, s[0:3], 0x380                 ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                    ; BF068004
>	s_cbranch_scc1 BB0_8                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                            ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                            ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                           ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                     ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                           ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                           ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                            ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                     ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                            ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                     ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                           ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                     ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                           ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                     ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                           ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                     ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                           ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                     ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                     ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                           ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                           ; 3E262917
>	v_mul_f32_e32 v12, v12, v8                            ; 1018110C
>	v_mac_f32_e32 v12, v6, v7                             ; 3E180F06
>	v_mac_f32_e32 v12, v4, v9                             ; 3E181304
>	v_mul_f32_e32 v4, v14, v8                             ; 1008110E
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                   ; C2028101
>	v_mac_f32_e32 v4, v5, v7                              ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                             ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                   ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                   ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                   ; C2040104
>	v_mac_f32_e32 v5, v16, v7                             ; 3E0A0F10
>	v_mac_f32_e32 v4, v13, v9                             ; 3E08130D
>	v_mac_f32_e32 v5, v18, v9                             ; 3E0A1312
>	v_mac_f32_e32 v12, v11, v10                           ; 3E18150B
>	v_mac_f32_e32 v4, v15, v10                            ; 3E08150F
>	v_mac_f32_e32 v5, v19, v10                            ; 3E0A1513
>	v_add_f32_e32 v0, v0, v12                             ; 06001900
>	v_mul_f32_e32 v6, 0, v8                               ; 100C1080
>	v_add_f32_e32 v1, v1, v4                              ; 06020901
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                              ; 10080004
>	v_add_f32_e32 v3, v3, v5                              ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                              ; 100A0005
>	s_buffer_load_dword s4, s[0:3], 0x5                   ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                   ; C2028106
>	v_mac_f32_e32 v6, 0, v7                               ; 3E0C0E80
>	v_mul_f32_e32 v7, s6, v0                              ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                              ; 10000007
>	v_mac_f32_e32 v4, s8, v1                              ; 3E080208
>	s_buffer_load_dword s6, s[0:3], 0x7                   ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                              ; 3E0A0204
>	v_mac_f32_e32 v7, s5, v1                              ; 3E0E0205
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                   ; C202810B
>	v_mac_f32_e32 v0, s6, v1                              ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                              ; 3E080607
>	v_mac_f32_e32 v5, s8, v3                              ; 3E0A0608
>	s_buffer_load_dword s6, s[0:3], 0xc                   ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                   ; C203810D
>	s_buffer_load_dword s8, s[0:3], 0xe                   ; C204010E
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	v_mac_f32_e32 v6, 0, v9                               ; 3E0C1280
>	v_add_f32_e32 v6, v10, v6                             ; 060C0D0A
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                              ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                              ; 3E000605
>	v_mac_f32_e32 v4, s6, v6                              ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                              ; 3E0A0C07
>	v_mac_f32_e32 v7, s8, v6                              ; 3E0E0C08
>	v_mac_f32_e32 v0, s0, v6                              ; 3E000C00
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v0                   ; F80008CF 00070504
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1832 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL OUT[0], POSITION
>DCL CONST[0..225]
>DCL TEMP[0..8], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    0.0000,     1.0000,     0.0000,     0.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>  0: F2I TEMP[0], IN[2]
>  1: MOV TEMP[1].w, IN[0].wwww
>  2: MUL TEMP[1].xyz, IN[0].xyzz, CONST[225].zzzz
>  3: MOV TEMP[2].xyz, IMM[0].xxxx
>  4: MOV TEMP[2].w, CONST[4].xxxx
>  5: MOV TEMP[3].xyz, IMM[0].xxxx
>  6: MOV TEMP[3].w, CONST[4].yyyy
>  7: MOV TEMP[4].xyz, IMM[0].xxxx
>  8: MOV TEMP[4].w, CONST[4].zzzz
>  9: NOT TEMP[5].x, CONST[221].xxxx
> 10: UIF TEMP[5].xxxx :0
> 11:   ADD TEMP[5], CONST[5], -TEMP[2]
> 12:   ADD TEMP[6], CONST[6], -TEMP[3]
> 13:   ADD TEMP[7], CONST[7], -TEMP[4]
> 14: ELSE :0
> 15:   NOT TEMP[8].x, CONST[222].xxxx
> 16:   UIF TEMP[8].xxxx :0
> 17:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 18:     UARL ADDR[0].x, TEMP[8].xxxx
> 19:     UARL ADDR[0].x, TEMP[8].xxxx
> 20:     ADD TEMP[5], CONST[ADDR[0].x+5], -TEMP[2]
> 21:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 22:     UARL ADDR[0].x, TEMP[8].xxxx
> 23:     UARL ADDR[0].x, TEMP[8].xxxx
> 24:     ADD TEMP[6], CONST[ADDR[0].x+5], -TEMP[3]
> 25:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 26:     UARL ADDR[0].x, TEMP[8].xxxx
> 27:     UARL ADDR[0].x, TEMP[8].xxxx
> 28:     ADD TEMP[7], CONST[ADDR[0].x+5], -TEMP[4]
> 29:   ELSE :0
> 30:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 31:     UARL ADDR[0].x, TEMP[8].xxxx
> 32:     ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[2]
> 33:     MUL TEMP[5], TEMP[8], IN[1].xxxx
> 34:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 35:     UARL ADDR[0].x, TEMP[8].xxxx
> 36:     ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[3]
> 37:     MUL TEMP[6], TEMP[8], IN[1].xxxx
> 38:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 39:     UARL ADDR[0].x, TEMP[8].xxxx
> 40:     ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[4]
> 41:     MUL TEMP[7], TEMP[8], IN[1].xxxx
> 42:     UMUL TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx
> 43:     UARL ADDR[0].x, TEMP[8].xxxx
> 44:     ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[2]
> 45:     MAD TEMP[5], TEMP[8], IN[1].yyyy, TEMP[5]
> 46:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 47:     UARL ADDR[0].x, TEMP[8].xxxx
> 48:     ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[3]
> 49:     MAD TEMP[6], TEMP[8], IN[1].yyyy, TEMP[6]
> 50:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 51:     UARL ADDR[0].x, TEMP[8].xxxx
> 52:     ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[4]
> 53:     MAD TEMP[7], TEMP[8], IN[1].yyyy, TEMP[7]
> 54:     UIF CONST[223].xxxx :0
> 55:       UMUL TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx
> 56:       UARL ADDR[0].x, TEMP[8].xxxx
> 57:       ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[2]
> 58:       MAD TEMP[5], TEMP[8], IN[1].zzzz, TEMP[5]
> 59:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 60:       UARL ADDR[0].x, TEMP[8].xxxx
> 61:       ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[3]
> 62:       MAD TEMP[6], TEMP[8], IN[1].zzzz, TEMP[6]
> 63:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 64:       UARL ADDR[0].x, TEMP[8].xxxx
> 65:       ADD TEMP[8], CONST[ADDR[0].x+5], -TEMP[4]
> 66:       MAD TEMP[7], TEMP[8], IN[1].zzzz, TEMP[7]
> 67:     ENDIF
> 68:     UIF CONST[224].xxxx :0
> 69:       UMUL TEMP[8].x, TEMP[0].wwww, IMM[1].xxxx
> 70:       UARL ADDR[0].x, TEMP[8].xxxx
> 71:       ADD TEMP[2], CONST[ADDR[0].x+5], -TEMP[2]
> 72:       MAD TEMP[5], TEMP[2], IN[1].wwww, TEMP[5]
> 73:       UMAD TEMP[2].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 74:       UARL ADDR[0].x, TEMP[2].xxxx
> 75:       ADD TEMP[2], CONST[ADDR[0].x+5], -TEMP[3]
> 76:       MAD TEMP[6], TEMP[2], IN[1].wwww, TEMP[6]
> 77:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 78:       UARL ADDR[0].x, TEMP[0].xxxx
> 79:       ADD TEMP[0], CONST[ADDR[0].x+5], -TEMP[4]
> 80:       MAD TEMP[7], TEMP[0], IN[1].wwww, TEMP[7]
> 81:     ENDIF
> 82:   ENDIF
> 83: ENDIF
> 84: DP4 TEMP[0].x, TEMP[1], TEMP[5]
> 85: DP4 TEMP[2].x, TEMP[1], TEMP[6]
> 86: MOV TEMP[0].y, TEMP[2].xxxx
> 87: DP4 TEMP[2].x, TEMP[1], TEMP[7]
> 88: MOV TEMP[0].z, TEMP[2].xxxx
> 89: DP4 TEMP[1].x, TEMP[1], IMM[0].xxxy
> 90: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 91: MUL TEMP[2], CONST[0], TEMP[0].xxxx
> 92: MAD TEMP[2], CONST[1], TEMP[0].yyyy, TEMP[2]
> 93: MAD TEMP[0], CONST[2], TEMP[0].zzzz, TEMP[2]
> 94: MAD TEMP[0], CONST[3], TEMP[1].xxxx, TEMP[0]
> 95: MOV OUT[0], TEMP[0]
> 96: END
>radeonsi: Compiling shader 115
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %17 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %18 = load <16 x i8>, <16 x i8> addrspace(2)* %17, align 16, !invariant.load !0
>  %19 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %18, i32 0, i32 %14)
>  %20 = extractelement <4 x float> %19, i32 0
>  %21 = extractelement <4 x float> %19, i32 1
>  %22 = extractelement <4 x float> %19, i32 2
>  %23 = extractelement <4 x float> %19, i32 3
>  %24 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %25 = load <16 x i8>, <16 x i8> addrspace(2)* %24, align 16, !invariant.load !0
>  %26 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %25, i32 0, i32 %15)
>  %27 = extractelement <4 x float> %26, i32 0
>  %28 = extractelement <4 x float> %26, i32 1
>  %29 = extractelement <4 x float> %26, i32 2
>  %30 = extractelement <4 x float> %26, i32 3
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = fptosi float %34 to i32
>  %39 = fptosi float %35 to i32
>  %40 = fptosi float %36 to i32
>  %41 = fptosi float %37 to i32
>  %42 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <16 x i8>, <16 x i8> addrspace(2)* %42, align 16, !invariant.load !0
>  %44 = call float @llvm.SI.load.const(<16 x i8> %43, i32 3608)
>  %45 = fmul float %20, %44
>  %46 = call float @llvm.SI.load.const(<16 x i8> %43, i32 3608)
>  %47 = fmul float %21, %46
>  %48 = call float @llvm.SI.load.const(<16 x i8> %43, i32 3608)
>  %49 = fmul float %22, %48
>  %50 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %51 = load <16 x i8>, <16 x i8> addrspace(2)* %50, align 16, !invariant.load !0
>  %52 = call float @llvm.SI.load.const(<16 x i8> %51, i32 64)
>  %53 = call float @llvm.SI.load.const(<16 x i8> %51, i32 68)
>  %54 = call float @llvm.SI.load.const(<16 x i8> %51, i32 72)
>  %55 = call float @llvm.SI.load.const(<16 x i8> %51, i32 3536)
>  %56 = bitcast float %55 to i32
>  %57 = icmp eq i32 %56, -1
>  %58 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %59 = load <16 x i8>, <16 x i8> addrspace(2)* %58, align 16, !invariant.load !0
>  br i1 %57, label %else14, label %if10
>
>if10:                                             ; preds = %main_body
>  %60 = call float @llvm.SI.load.const(<16 x i8> %59, i32 80)
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call float @llvm.SI.load.const(<16 x i8> %62, i32 84)
>  %64 = call float @llvm.SI.load.const(<16 x i8> %62, i32 88)
>  %65 = call float @llvm.SI.load.const(<16 x i8> %62, i32 92)
>  %66 = fsub float %65, %52
>  %67 = call float @llvm.SI.load.const(<16 x i8> %62, i32 96)
>  %68 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %69 = load <16 x i8>, <16 x i8> addrspace(2)* %68, align 16, !invariant.load !0
>  %70 = call float @llvm.SI.load.const(<16 x i8> %69, i32 100)
>  %71 = call float @llvm.SI.load.const(<16 x i8> %69, i32 104)
>  %72 = call float @llvm.SI.load.const(<16 x i8> %69, i32 108)
>  %73 = fsub float %72, %53
>  %74 = call float @llvm.SI.load.const(<16 x i8> %69, i32 112)
>  %75 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %76 = load <16 x i8>, <16 x i8> addrspace(2)* %75, align 16, !invariant.load !0
>  %77 = call float @llvm.SI.load.const(<16 x i8> %76, i32 116)
>  %78 = call float @llvm.SI.load.const(<16 x i8> %76, i32 120)
>  %79 = call float @llvm.SI.load.const(<16 x i8> %76, i32 124)
>  %80 = fsub float %79, %54
>  br label %endif83
>
>else14:                                           ; preds = %main_body
>  %81 = call float @llvm.SI.load.const(<16 x i8> %59, i32 3552)
>  %82 = bitcast float %81 to i32
>  %83 = icmp eq i32 %82, -1
>  %84 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %85 = load <16 x i8>, <16 x i8> addrspace(2)* %84, align 16, !invariant.load !0
>  %86 = mul i32 %38, 48
>  %87 = add i32 %86, 80
>  %88 = call float @llvm.SI.load.const(<16 x i8> %85, i32 %87)
>  %89 = mul i32 %38, 48
>  %90 = add i32 %89, 84
>  %91 = call float @llvm.SI.load.const(<16 x i8> %85, i32 %90)
>  %92 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %93 = load <16 x i8>, <16 x i8> addrspace(2)* %92, align 16, !invariant.load !0
>  %94 = mul i32 %38, 48
>  %95 = add i32 %94, 88
>  %96 = call float @llvm.SI.load.const(<16 x i8> %93, i32 %95)
>  %97 = mul i32 %38, 48
>  %98 = add i32 %97, 92
>  %99 = call float @llvm.SI.load.const(<16 x i8> %93, i32 %98)
>  %100 = fsub float %99, %52
>  br i1 %83, label %else29, label %if16
>
>if16:                                             ; preds = %else14
>  %101 = mul i32 %38, 3
>  %102 = add i32 %101, 1
>  %103 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %104 = load <16 x i8>, <16 x i8> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = shl i32 %102, 4
>  %106 = add i32 %105, 80
>  %107 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %106)
>  %108 = shl i32 %102, 4
>  %109 = add i32 %108, 84
>  %110 = call float @llvm.SI.load.const(<16 x i8> %104, i32 %109)
>  %111 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %112 = load <16 x i8>, <16 x i8> addrspace(2)* %111, align 16, !invariant.load !0
>  %113 = shl i32 %102, 4
>  %114 = add i32 %113, 88
>  %115 = call float @llvm.SI.load.const(<16 x i8> %112, i32 %114)
>  %116 = shl i32 %102, 4
>  %117 = add i32 %116, 92
>  %118 = call float @llvm.SI.load.const(<16 x i8> %112, i32 %117)
>  %119 = fsub float %118, %53
>  %120 = mul i32 %38, 3
>  %121 = add i32 %120, 2
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = shl i32 %121, 4
>  %125 = add i32 %124, 80
>  %126 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %125)
>  %127 = shl i32 %121, 4
>  %128 = add i32 %127, 84
>  %129 = call float @llvm.SI.load.const(<16 x i8> %123, i32 %128)
>  %130 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %131 = load <16 x i8>, <16 x i8> addrspace(2)* %130, align 16, !invariant.load !0
>  %132 = shl i32 %121, 4
>  %133 = add i32 %132, 88
>  %134 = call float @llvm.SI.load.const(<16 x i8> %131, i32 %133)
>  %135 = shl i32 %121, 4
>  %136 = add i32 %135, 92
>  %137 = call float @llvm.SI.load.const(<16 x i8> %131, i32 %136)
>  %138 = fsub float %137, %54
>  br label %endif83
>
>else29:                                           ; preds = %else14
>  %139 = fmul float %88, %27
>  %140 = fmul float %91, %27
>  %141 = fmul float %96, %27
>  %142 = fmul float %100, %27
>  %143 = mul i32 %38, 3
>  %144 = add i32 %143, 1
>  %145 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %146 = load <16 x i8>, <16 x i8> addrspace(2)* %145, align 16, !invariant.load !0
>  %147 = shl i32 %144, 4
>  %148 = add i32 %147, 80
>  %149 = call float @llvm.SI.load.const(<16 x i8> %146, i32 %148)
>  %150 = shl i32 %144, 4
>  %151 = add i32 %150, 84
>  %152 = call float @llvm.SI.load.const(<16 x i8> %146, i32 %151)
>  %153 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %154 = load <16 x i8>, <16 x i8> addrspace(2)* %153, align 16, !invariant.load !0
>  %155 = shl i32 %144, 4
>  %156 = add i32 %155, 88
>  %157 = call float @llvm.SI.load.const(<16 x i8> %154, i32 %156)
>  %158 = shl i32 %144, 4
>  %159 = add i32 %158, 92
>  %160 = call float @llvm.SI.load.const(<16 x i8> %154, i32 %159)
>  %161 = fsub float %160, %53
>  %162 = fmul float %149, %27
>  %163 = fmul float %152, %27
>  %164 = fmul float %157, %27
>  %165 = fmul float %161, %27
>  %166 = mul i32 %38, 3
>  %167 = add i32 %166, 2
>  %168 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %169 = load <16 x i8>, <16 x i8> addrspace(2)* %168, align 16, !invariant.load !0
>  %170 = shl i32 %167, 4
>  %171 = add i32 %170, 80
>  %172 = call float @llvm.SI.load.const(<16 x i8> %169, i32 %171)
>  %173 = shl i32 %167, 4
>  %174 = add i32 %173, 84
>  %175 = call float @llvm.SI.load.const(<16 x i8> %169, i32 %174)
>  %176 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %177 = load <16 x i8>, <16 x i8> addrspace(2)* %176, align 16, !invariant.load !0
>  %178 = shl i32 %167, 4
>  %179 = add i32 %178, 88
>  %180 = call float @llvm.SI.load.const(<16 x i8> %177, i32 %179)
>  %181 = shl i32 %167, 4
>  %182 = add i32 %181, 92
>  %183 = call float @llvm.SI.load.const(<16 x i8> %177, i32 %182)
>  %184 = fsub float %183, %54
>  %185 = fmul float %172, %27
>  %186 = fmul float %175, %27
>  %187 = fmul float %180, %27
>  %188 = fmul float %184, %27
>  %189 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %190 = load <16 x i8>, <16 x i8> addrspace(2)* %189, align 16, !invariant.load !0
>  %191 = mul i32 %39, 48
>  %192 = add i32 %191, 80
>  %193 = call float @llvm.SI.load.const(<16 x i8> %190, i32 %192)
>  %194 = mul i32 %39, 48
>  %195 = add i32 %194, 84
>  %196 = call float @llvm.SI.load.const(<16 x i8> %190, i32 %195)
>  %197 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %198 = load <16 x i8>, <16 x i8> addrspace(2)* %197, align 16, !invariant.load !0
>  %199 = mul i32 %39, 48
>  %200 = add i32 %199, 88
>  %201 = call float @llvm.SI.load.const(<16 x i8> %198, i32 %200)
>  %202 = mul i32 %39, 48
>  %203 = add i32 %202, 92
>  %204 = call float @llvm.SI.load.const(<16 x i8> %198, i32 %203)
>  %205 = fsub float %204, %52
>  %206 = fmul float %193, %28
>  %207 = fadd float %206, %139
>  %208 = fmul float %196, %28
>  %209 = fadd float %208, %140
>  %210 = fmul float %201, %28
>  %211 = fadd float %210, %141
>  %212 = fmul float %205, %28
>  %213 = fadd float %212, %142
>  %214 = mul i32 %39, 3
>  %215 = add i32 %214, 1
>  %216 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %217 = load <16 x i8>, <16 x i8> addrspace(2)* %216, align 16, !invariant.load !0
>  %218 = shl i32 %215, 4
>  %219 = add i32 %218, 80
>  %220 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %219)
>  %221 = shl i32 %215, 4
>  %222 = add i32 %221, 84
>  %223 = call float @llvm.SI.load.const(<16 x i8> %217, i32 %222)
>  %224 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %225 = load <16 x i8>, <16 x i8> addrspace(2)* %224, align 16, !invariant.load !0
>  %226 = shl i32 %215, 4
>  %227 = add i32 %226, 88
>  %228 = call float @llvm.SI.load.const(<16 x i8> %225, i32 %227)
>  %229 = shl i32 %215, 4
>  %230 = add i32 %229, 92
>  %231 = call float @llvm.SI.load.const(<16 x i8> %225, i32 %230)
>  %232 = fsub float %231, %53
>  %233 = fmul float %220, %28
>  %234 = fadd float %233, %162
>  %235 = fmul float %223, %28
>  %236 = fadd float %235, %163
>  %237 = fmul float %228, %28
>  %238 = fadd float %237, %164
>  %239 = fmul float %232, %28
>  %240 = fadd float %239, %165
>  %241 = mul i32 %39, 3
>  %242 = add i32 %241, 2
>  %243 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %244 = load <16 x i8>, <16 x i8> addrspace(2)* %243, align 16, !invariant.load !0
>  %245 = shl i32 %242, 4
>  %246 = add i32 %245, 80
>  %247 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %246)
>  %248 = shl i32 %242, 4
>  %249 = add i32 %248, 84
>  %250 = call float @llvm.SI.load.const(<16 x i8> %244, i32 %249)
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = shl i32 %242, 4
>  %254 = add i32 %253, 88
>  %255 = call float @llvm.SI.load.const(<16 x i8> %252, i32 %254)
>  %256 = shl i32 %242, 4
>  %257 = add i32 %256, 92
>  %258 = call float @llvm.SI.load.const(<16 x i8> %252, i32 %257)
>  %259 = fsub float %258, %54
>  %260 = fmul float %247, %28
>  %261 = fadd float %260, %185
>  %262 = fmul float %250, %28
>  %263 = fadd float %262, %186
>  %264 = fmul float %255, %28
>  %265 = fadd float %264, %187
>  %266 = fmul float %259, %28
>  %267 = fadd float %266, %188
>  %268 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %269 = load <16 x i8>, <16 x i8> addrspace(2)* %268, align 16, !invariant.load !0
>  %270 = call float @llvm.SI.load.const(<16 x i8> %269, i32 3568)
>  %271 = bitcast float %270 to i32
>  %272 = icmp eq i32 %271, 0
>  br i1 %272, label %endif67, label %if54
>
>if54:                                             ; preds = %else29
>  %273 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %274 = load <16 x i8>, <16 x i8> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = mul i32 %40, 48
>  %276 = add i32 %275, 80
>  %277 = call float @llvm.SI.load.const(<16 x i8> %274, i32 %276)
>  %278 = mul i32 %40, 48
>  %279 = add i32 %278, 84
>  %280 = call float @llvm.SI.load.const(<16 x i8> %274, i32 %279)
>  %281 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %282 = load <16 x i8>, <16 x i8> addrspace(2)* %281, align 16, !invariant.load !0
>  %283 = mul i32 %40, 48
>  %284 = add i32 %283, 88
>  %285 = call float @llvm.SI.load.const(<16 x i8> %282, i32 %284)
>  %286 = mul i32 %40, 48
>  %287 = add i32 %286, 92
>  %288 = call float @llvm.SI.load.const(<16 x i8> %282, i32 %287)
>  %289 = fsub float %288, %52
>  %290 = fmul float %277, %29
>  %291 = fadd float %290, %207
>  %292 = fmul float %280, %29
>  %293 = fadd float %292, %209
>  %294 = fmul float %285, %29
>  %295 = fadd float %294, %211
>  %296 = fmul float %289, %29
>  %297 = fadd float %296, %213
>  %298 = mul i32 %40, 3
>  %299 = add i32 %298, 1
>  %300 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %301 = load <16 x i8>, <16 x i8> addrspace(2)* %300, align 16, !invariant.load !0
>  %302 = shl i32 %299, 4
>  %303 = add i32 %302, 80
>  %304 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %303)
>  %305 = shl i32 %299, 4
>  %306 = add i32 %305, 84
>  %307 = call float @llvm.SI.load.const(<16 x i8> %301, i32 %306)
>  %308 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %309 = load <16 x i8>, <16 x i8> addrspace(2)* %308, align 16, !invariant.load !0
>  %310 = shl i32 %299, 4
>  %311 = add i32 %310, 88
>  %312 = call float @llvm.SI.load.const(<16 x i8> %309, i32 %311)
>  %313 = shl i32 %299, 4
>  %314 = add i32 %313, 92
>  %315 = call float @llvm.SI.load.const(<16 x i8> %309, i32 %314)
>  %316 = fsub float %315, %53
>  %317 = fmul float %304, %29
>  %318 = fadd float %317, %234
>  %319 = fmul float %307, %29
>  %320 = fadd float %319, %236
>  %321 = fmul float %312, %29
>  %322 = fadd float %321, %238
>  %323 = fmul float %316, %29
>  %324 = fadd float %323, %240
>  %325 = mul i32 %40, 3
>  %326 = add i32 %325, 2
>  %327 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %328 = load <16 x i8>, <16 x i8> addrspace(2)* %327, align 16, !invariant.load !0
>  %329 = shl i32 %326, 4
>  %330 = add i32 %329, 80
>  %331 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %330)
>  %332 = shl i32 %326, 4
>  %333 = add i32 %332, 84
>  %334 = call float @llvm.SI.load.const(<16 x i8> %328, i32 %333)
>  %335 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %336 = load <16 x i8>, <16 x i8> addrspace(2)* %335, align 16, !invariant.load !0
>  %337 = shl i32 %326, 4
>  %338 = add i32 %337, 88
>  %339 = call float @llvm.SI.load.const(<16 x i8> %336, i32 %338)
>  %340 = shl i32 %326, 4
>  %341 = add i32 %340, 92
>  %342 = call float @llvm.SI.load.const(<16 x i8> %336, i32 %341)
>  %343 = fsub float %342, %54
>  %344 = fmul float %331, %29
>  %345 = fadd float %344, %261
>  %346 = fmul float %334, %29
>  %347 = fadd float %346, %263
>  %348 = fmul float %339, %29
>  %349 = fadd float %348, %265
>  %350 = fmul float %343, %29
>  %351 = fadd float %350, %267
>  br label %endif67
>
>endif67:                                          ; preds = %else29, %if54
>  %.0101 = phi float [ %291, %if54 ], [ %207, %else29 ]
>  %.097 = phi float [ %293, %if54 ], [ %209, %else29 ]
>  %.093 = phi float [ %295, %if54 ], [ %211, %else29 ]
>  %.089 = phi float [ %297, %if54 ], [ %213, %else29 ]
>  %.085 = phi float [ %318, %if54 ], [ %234, %else29 ]
>  %.081 = phi float [ %320, %if54 ], [ %236, %else29 ]
>  %.077 = phi float [ %322, %if54 ], [ %238, %else29 ]
>  %.073 = phi float [ %324, %if54 ], [ %240, %else29 ]
>  %.069 = phi float [ %345, %if54 ], [ %261, %else29 ]
>  %.065 = phi float [ %347, %if54 ], [ %263, %else29 ]
>  %.061 = phi float [ %349, %if54 ], [ %265, %else29 ]
>  %.0 = phi float [ %351, %if54 ], [ %267, %else29 ]
>  %352 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %353 = load <16 x i8>, <16 x i8> addrspace(2)* %352, align 16, !invariant.load !0
>  %354 = call float @llvm.SI.load.const(<16 x i8> %353, i32 3584)
>  %355 = bitcast float %354 to i32
>  %356 = icmp eq i32 %355, 0
>  br i1 %356, label %endif83, label %if68
>
>if68:                                             ; preds = %endif67
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = mul i32 %41, 48
>  %360 = add i32 %359, 80
>  %361 = call float @llvm.SI.load.const(<16 x i8> %358, i32 %360)
>  %362 = mul i32 %41, 48
>  %363 = add i32 %362, 84
>  %364 = call float @llvm.SI.load.const(<16 x i8> %358, i32 %363)
>  %365 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %366 = load <16 x i8>, <16 x i8> addrspace(2)* %365, align 16, !invariant.load !0
>  %367 = mul i32 %41, 48
>  %368 = add i32 %367, 88
>  %369 = call float @llvm.SI.load.const(<16 x i8> %366, i32 %368)
>  %370 = mul i32 %41, 48
>  %371 = add i32 %370, 92
>  %372 = call float @llvm.SI.load.const(<16 x i8> %366, i32 %371)
>  %373 = fsub float %372, %52
>  %374 = fmul float %361, %30
>  %375 = fadd float %374, %.0101
>  %376 = fmul float %364, %30
>  %377 = fadd float %376, %.097
>  %378 = fmul float %369, %30
>  %379 = fadd float %378, %.093
>  %380 = fmul float %373, %30
>  %381 = fadd float %380, %.089
>  %382 = mul i32 %41, 3
>  %383 = add i32 %382, 1
>  %384 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %385 = load <16 x i8>, <16 x i8> addrspace(2)* %384, align 16, !invariant.load !0
>  %386 = shl i32 %383, 4
>  %387 = add i32 %386, 80
>  %388 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %387)
>  %389 = shl i32 %383, 4
>  %390 = add i32 %389, 84
>  %391 = call float @llvm.SI.load.const(<16 x i8> %385, i32 %390)
>  %392 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %393 = load <16 x i8>, <16 x i8> addrspace(2)* %392, align 16, !invariant.load !0
>  %394 = shl i32 %383, 4
>  %395 = add i32 %394, 88
>  %396 = call float @llvm.SI.load.const(<16 x i8> %393, i32 %395)
>  %397 = shl i32 %383, 4
>  %398 = add i32 %397, 92
>  %399 = call float @llvm.SI.load.const(<16 x i8> %393, i32 %398)
>  %400 = fsub float %399, %53
>  %401 = fmul float %388, %30
>  %402 = fadd float %401, %.085
>  %403 = fmul float %391, %30
>  %404 = fadd float %403, %.081
>  %405 = fmul float %396, %30
>  %406 = fadd float %405, %.077
>  %407 = fmul float %400, %30
>  %408 = fadd float %407, %.073
>  %409 = mul i32 %41, 3
>  %410 = add i32 %409, 2
>  %411 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %412 = load <16 x i8>, <16 x i8> addrspace(2)* %411, align 16, !invariant.load !0
>  %413 = shl i32 %410, 4
>  %414 = add i32 %413, 80
>  %415 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %414)
>  %416 = shl i32 %410, 4
>  %417 = add i32 %416, 84
>  %418 = call float @llvm.SI.load.const(<16 x i8> %412, i32 %417)
>  %419 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %420 = load <16 x i8>, <16 x i8> addrspace(2)* %419, align 16, !invariant.load !0
>  %421 = shl i32 %410, 4
>  %422 = add i32 %421, 88
>  %423 = call float @llvm.SI.load.const(<16 x i8> %420, i32 %422)
>  %424 = shl i32 %410, 4
>  %425 = add i32 %424, 92
>  %426 = call float @llvm.SI.load.const(<16 x i8> %420, i32 %425)
>  %427 = fsub float %426, %54
>  %428 = fmul float %415, %30
>  %429 = fadd float %428, %.069
>  %430 = fmul float %418, %30
>  %431 = fadd float %430, %.065
>  %432 = fmul float %423, %30
>  %433 = fadd float %432, %.061
>  %434 = fmul float %427, %30
>  %435 = fadd float %434, %.0
>  br label %endif83
>
>endif83:                                          ; preds = %endif67, %if16, %if68, %if10
>  %.3104 = phi float [ %60, %if10 ], [ %88, %if16 ], [ %375, %if68 ], [ %.0101, %endif67 ]
>  %.3100 = phi float [ %63, %if10 ], [ %91, %if16 ], [ %377, %if68 ], [ %.097, %endif67 ]
>  %.396 = phi float [ %64, %if10 ], [ %96, %if16 ], [ %379, %if68 ], [ %.093, %endif67 ]
>  %.392 = phi float [ %66, %if10 ], [ %100, %if16 ], [ %381, %if68 ], [ %.089, %endif67 ]
>  %.388 = phi float [ %67, %if10 ], [ %107, %if16 ], [ %402, %if68 ], [ %.085, %endif67 ]
>  %.384 = phi float [ %70, %if10 ], [ %110, %if16 ], [ %404, %if68 ], [ %.081, %endif67 ]
>  %.380 = phi float [ %71, %if10 ], [ %115, %if16 ], [ %406, %if68 ], [ %.077, %endif67 ]
>  %.376 = phi float [ %73, %if10 ], [ %119, %if16 ], [ %408, %if68 ], [ %.073, %endif67 ]
>  %.372 = phi float [ %74, %if10 ], [ %126, %if16 ], [ %429, %if68 ], [ %.069, %endif67 ]
>  %.368 = phi float [ %77, %if10 ], [ %129, %if16 ], [ %431, %if68 ], [ %.065, %endif67 ]
>  %.364 = phi float [ %78, %if10 ], [ %134, %if16 ], [ %433, %if68 ], [ %.061, %endif67 ]
>  %.3 = phi float [ %80, %if10 ], [ %138, %if16 ], [ %435, %if68 ], [ %.0, %endif67 ]
>  %436 = fmul float %45, %.3104
>  %437 = fmul float %47, %.3100
>  %438 = fadd float %436, %437
>  %439 = fmul float %49, %.396
>  %440 = fadd float %438, %439
>  %441 = fmul float %23, %.392
>  %442 = fadd float %440, %441
>  %443 = fmul float %45, %.388
>  %444 = fmul float %47, %.384
>  %445 = fadd float %443, %444
>  %446 = fmul float %49, %.380
>  %447 = fadd float %445, %446
>  %448 = fmul float %23, %.376
>  %449 = fadd float %447, %448
>  %450 = fmul float %45, %.372
>  %451 = fmul float %47, %.368
>  %452 = fadd float %450, %451
>  %453 = fmul float %49, %.364
>  %454 = fadd float %452, %453
>  %455 = fmul float %23, %.3
>  %456 = fadd float %454, %455
>  %457 = fmul float %45, 0.000000e+00
>  %458 = fmul float %47, 0.000000e+00
>  %459 = fadd float %457, %458
>  %460 = fmul float %49, 0.000000e+00
>  %461 = fadd float %459, %460
>  %462 = fadd float %461, %23
>  %463 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %464 = load <16 x i8>, <16 x i8> addrspace(2)* %463, align 16, !invariant.load !0
>  %465 = call float @llvm.SI.load.const(<16 x i8> %464, i32 64)
>  %466 = fadd float %442, %465
>  %467 = call float @llvm.SI.load.const(<16 x i8> %464, i32 68)
>  %468 = fadd float %449, %467
>  %469 = call float @llvm.SI.load.const(<16 x i8> %464, i32 72)
>  %470 = fadd float %456, %469
>  %471 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %472 = load <16 x i8>, <16 x i8> addrspace(2)* %471, align 16, !invariant.load !0
>  %473 = call float @llvm.SI.load.const(<16 x i8> %472, i32 0)
>  %474 = fmul float %473, %466
>  %475 = call float @llvm.SI.load.const(<16 x i8> %472, i32 4)
>  %476 = fmul float %475, %466
>  %477 = call float @llvm.SI.load.const(<16 x i8> %472, i32 8)
>  %478 = fmul float %477, %466
>  %479 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %480 = load <16 x i8>, <16 x i8> addrspace(2)* %479, align 16, !invariant.load !0
>  %481 = call float @llvm.SI.load.const(<16 x i8> %480, i32 12)
>  %482 = fmul float %481, %466
>  %483 = call float @llvm.SI.load.const(<16 x i8> %480, i32 16)
>  %484 = fmul float %483, %468
>  %485 = fadd float %484, %474
>  %486 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %487 = load <16 x i8>, <16 x i8> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = call float @llvm.SI.load.const(<16 x i8> %487, i32 20)
>  %489 = fmul float %488, %468
>  %490 = fadd float %489, %476
>  %491 = call float @llvm.SI.load.const(<16 x i8> %487, i32 24)
>  %492 = fmul float %491, %468
>  %493 = fadd float %492, %478
>  %494 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %495 = load <16 x i8>, <16 x i8> addrspace(2)* %494, align 16, !invariant.load !0
>  %496 = call float @llvm.SI.load.const(<16 x i8> %495, i32 28)
>  %497 = fmul float %496, %468
>  %498 = fadd float %497, %482
>  %499 = call float @llvm.SI.load.const(<16 x i8> %495, i32 32)
>  %500 = fmul float %499, %470
>  %501 = fadd float %500, %485
>  %502 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %503 = load <16 x i8>, <16 x i8> addrspace(2)* %502, align 16, !invariant.load !0
>  %504 = call float @llvm.SI.load.const(<16 x i8> %503, i32 36)
>  %505 = fmul float %504, %470
>  %506 = fadd float %505, %490
>  %507 = call float @llvm.SI.load.const(<16 x i8> %503, i32 40)
>  %508 = fmul float %507, %470
>  %509 = fadd float %508, %493
>  %510 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %511 = load <16 x i8>, <16 x i8> addrspace(2)* %510, align 16, !invariant.load !0
>  %512 = call float @llvm.SI.load.const(<16 x i8> %511, i32 44)
>  %513 = fmul float %512, %470
>  %514 = fadd float %513, %498
>  %515 = call float @llvm.SI.load.const(<16 x i8> %511, i32 48)
>  %516 = fmul float %515, %462
>  %517 = fadd float %516, %501
>  %518 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %519 = load <16 x i8>, <16 x i8> addrspace(2)* %518, align 16, !invariant.load !0
>  %520 = call float @llvm.SI.load.const(<16 x i8> %519, i32 52)
>  %521 = fmul float %520, %462
>  %522 = fadd float %521, %506
>  %523 = call float @llvm.SI.load.const(<16 x i8> %519, i32 56)
>  %524 = fmul float %523, %462
>  %525 = fadd float %524, %509
>  %526 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %527 = load <16 x i8>, <16 x i8> addrspace(2)* %526, align 16, !invariant.load !0
>  %528 = call float @llvm.SI.load.const(<16 x i8> %527, i32 60)
>  %529 = fmul float %528, %462
>  %530 = fadd float %529, %514
>  %531 = bitcast i32 %12 to float
>  %532 = insertvalue <{ float, float, float }> undef, float %531, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %517, float %522, float %525, float %530)
>  ret <{ float, float, float }> %532
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	s_buffer_load_dword s5, s[0:3], 0x10                    ; C2028110
>	s_buffer_load_dword s6, s[0:3], 0x11                    ; C2030111
>	s_buffer_load_dword s7, s[0:3], 0x12                    ; C2038112
>	s_buffer_load_dword s8, s[0:3], 0x374                   ; C20400FF 00000374
>	s_buffer_load_dword s4, s[0:3], 0x386                   ; C20200FF 00000386
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s5                                    ; 7E000205
>	v_mov_b32_e32 v1, s6                                    ; 7E020206
>	v_mov_b32_e32 v3, s7                                    ; 7E060207
>	s_cmp_eq_u32 s8, -1                                     ; BF06C108
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s5, s[0:3], 0x14                    ; C2028114
>	s_buffer_load_dword s6, s[0:3], 0x15                    ; C2030115
>	s_buffer_load_dword s7, s[0:3], 0x16                    ; C2038116
>	s_buffer_load_dword s8, s[0:3], 0x17                    ; C2040117
>	s_buffer_load_dword s9, s[0:3], 0x18                    ; C2048118
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	v_mov_b32_e32 v12, s6                                   ; 7E180206
>	s_buffer_load_dword s5, s[0:3], 0x19                    ; C2028119
>	s_buffer_load_dword s6, s[0:3], 0x1a                    ; C203011A
>	v_mov_b32_e32 v4, s7                                    ; 7E080207
>	v_sub_f32_e32 v11, s8, v0                               ; 08160008
>	v_mov_b32_e32 v5, s9                                    ; 7E0A0209
>	s_buffer_load_dword s7, s[0:3], 0x1b                    ; C203811B
>	s_buffer_load_dword s8, s[0:3], 0x1c                    ; C204011C
>	s_buffer_load_dword s9, s[0:3], 0x1d                    ; C204811D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v14, s5                                   ; 7E1C0205
>	v_mov_b32_e32 v13, s6                                   ; 7E1A0206
>	s_buffer_load_dword s5, s[0:3], 0x1e                    ; C202811E
>	s_buffer_load_dword s6, s[0:3], 0x1f                    ; C203011F
>	v_sub_f32_e32 v15, s7, v1                               ; 081E0207
>	v_mov_b32_e32 v16, s8                                   ; 7E200208
>	v_mov_b32_e32 v17, s9                                   ; 7E220209
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v18, s5                                   ; 7E240205
>	v_sub_f32_e32 v19, s6, v3                               ; 08260606
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[12:15], s[10:11], 0x8                  ; C0860B08
>	s_movk_i32 s16, 0x5c                                    ; B010005C
>	s_buffer_load_dword s5, s[0:3], 0x378                   ; C20280FF 00000378
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[12:15], 0 idxen ; E00C2000 80031806
>	s_movk_i32 s13, 0x54                                    ; B00D0054
>	s_movk_i32 s15, 0x50                                    ; B00F0050
>	s_movk_i32 s14, 0x58                                    ; B00E0058
>	s_cmp_eq_u32 s5, -1                                     ; BF06C105
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                               ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                                ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s13, v15                        ; 4A161E0D
>	v_add_i32_e32 v14, vcc, s16, v15                        ; 4A1C1E10
>	v_add_i32_e32 v4, vcc, s15, v15                         ; 4A081E0F
>	buffer_load_dword v12, v11, s[0:3], 0 offen             ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen             ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s14, v15                        ; 4A1A1E0E
>	buffer_load_dword v6, v4, s[0:3], 0 offen               ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen              ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                           ; 0A161700
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                       ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                       ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                       ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                        ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                       ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                       ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen             ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen             ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                       ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                       ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen             ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen             ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen             ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                           ; 0A1E2701
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                           ; 0A262903
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                   ; C0840B04
>	s_movk_i32 s5, 0x7c                                     ; B005007C
>	s_movk_i32 s12, 0x6c                                    ; B00C006C
>	v_add_i32_e32 v17, vcc, s5, v15                         ; 4A221E05
>	s_movk_i32 s7, 0x74                                     ; B0070074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[8:11], 0 idxen  ; E00C2000 80021405
>	v_cvt_i32_f32_e32 v5, v25                               ; 7E0A1119
>	s_movk_i32 s11, 0x60                                    ; B00B0060
>	s_movk_i32 s10, 0x64                                    ; B00A0064
>	s_movk_i32 s9, 0x68                                     ; B0090068
>	v_mul_lo_i32 v24, v5, 48                                ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s12, v15                         ; 4A0A1E0C
>	s_movk_i32 s8, 0x70                                     ; B0080070
>	s_movk_i32 s6, 0x78                                     ; B0060078
>	v_add_i32_e32 v13, vcc, s11, v15                        ; 4A1A1E0B
>	v_add_i32_e32 v14, vcc, s10, v15                        ; 4A1C1E0A
>	v_add_i32_e32 v16, vcc, s9, v15                         ; 4A201E09
>	v_add_i32_e32 v19, vcc, s7, v15                         ; 4A261E07
>	buffer_load_dword v18, v5, s[0:3], 0 offen              ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s8, v15                          ; 4A0A1E08
>	v_add_i32_e32 v15, vcc, s6, v15                         ; 4A1E1E06
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen             ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen             ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen              ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen             ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                               ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                             ; 10181914
>	v_mul_f32_e32 v4, v20, v4                               ; 10080914
>	v_mul_f32_e32 v11, v20, v11                             ; 10161714
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                           ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                             ; 101E1F14
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                           ; 0A3A2303
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                             ; 101C1D14
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                             ; 10243914
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                              ; 100A1B14
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                             ; 101A2114
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                             ; 10222714
>	v_mul_f32_e32 v16, v20, v25                             ; 10203314
>	v_mul_f32_e32 v19, v20, v29                             ; 10263B14
>	v_add_i32_e32 v20, vcc, s16, v24                        ; 4A283010
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                           ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                             ; 3E162915
>	v_add_i32_e32 v20, vcc, s12, v24                        ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                           ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                             ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s15, v24                        ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                              ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s13, v24                        ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_buffer_load_dword s13, s[0:3], 0x37c                  ; C20680FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s13, 0                                     ; BF06800D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                             ; 3E182915
>	v_add_i32_e32 v20, vcc, s14, v24                        ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                              ; 3E082915
>	v_add_i32_e32 v20, vcc, s11, v24                        ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                              ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s10, v24                        ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                             ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s9, v24                         ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                             ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s8, v24                         ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                             ; 3E202915
>	v_add_i32_e32 v20, vcc, s7, v24                         ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                             ; 3E222915
>	v_add_i32_e32 v20, vcc, s6, v24                         ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                             ; 3E242915
>	v_add_i32_e32 v20, vcc, s5, v24                         ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                           ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                             ; 3E262915
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                              ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                               ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                       ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                              ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                       ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                           ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                             ; 3E162B16
>	v_add_i32_e32 v21, vcc, s12, v20                        ; 4A2A280C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                           ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                             ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                       ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                             ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                       ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                              ; 3E082B16
>	v_add_i32_e32 v21, vcc, s11, v20                        ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                              ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s10, v20                        ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                             ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s9, v20                         ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                             ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s8, v20                         ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                             ; 3E202B16
>	v_add_i32_e32 v21, vcc, s7, v20                         ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                             ; 3E222B16
>	v_add_i32_e32 v21, vcc, s6, v20                         ; 4A2A2806
>	v_add_i32_e32 v20, vcc, s5, v20                         ; 4A282805
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                           ; 0A282903
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                             ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                             ; 3E262916
>	s_buffer_load_dword s5, s[0:3], 0x380                   ; C20280FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s5, 0                                      ; BF068005
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                              ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                               ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                       ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                              ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                       ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                           ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                             ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                       ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                           ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                             ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                       ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                             ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                       ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                              ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                       ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                              ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                       ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                             ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                       ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                             ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                       ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                             ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                       ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                             ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                       ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                       ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                           ; 0A282903
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                             ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                             ; 3E262917
>	v_mul_f32_e32 v8, s4, v8                                ; 10101004
>	v_mul_f32_e32 v12, v12, v8                              ; 1018110C
>	v_mul_f32_e32 v7, s4, v7                                ; 100E0E04
>	v_mac_f32_e32 v12, v6, v7                               ; 3E180F06
>	v_mul_f32_e32 v6, s4, v9                                ; 100C1204
>	v_mac_f32_e32 v12, v4, v6                               ; 3E180D04
>	v_mul_f32_e32 v4, v14, v8                               ; 1008110E
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_mac_f32_e32 v4, v5, v7                                ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                               ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	v_mac_f32_e32 v5, v16, v7                               ; 3E0A0F10
>	v_mac_f32_e32 v4, v13, v6                               ; 3E080D0D
>	v_mac_f32_e32 v5, v18, v6                               ; 3E0A0D12
>	v_mac_f32_e32 v12, v11, v10                             ; 3E18150B
>	v_mac_f32_e32 v4, v15, v10                              ; 3E08150F
>	v_mac_f32_e32 v5, v19, v10                              ; 3E0A1513
>	v_add_f32_e32 v0, v0, v12                               ; 06001900
>	v_mul_f32_e32 v8, 0, v8                                 ; 10101080
>	v_add_f32_e32 v1, v1, v4                                ; 06020901
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                                ; 10080004
>	v_add_f32_e32 v3, v3, v5                                ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                                ; 100A0005
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	v_mac_f32_e32 v8, 0, v7                                 ; 3E100E80
>	v_mul_f32_e32 v7, s6, v0                                ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                                ; 10000007
>	v_mac_f32_e32 v4, s8, v1                                ; 3E080208
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                                ; 3E0A0204
>	v_mac_f32_e32 v7, s5, v1                                ; 3E0E0205
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mac_f32_e32 v0, s6, v1                                ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                                ; 3E080607
>	v_mac_f32_e32 v5, s8, v3                                ; 3E0A0608
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	s_buffer_load_dword s0, s[0:3], 0xf                     ; C200010F
>	v_mac_f32_e32 v8, 0, v6                                 ; 3E100C80
>	v_add_f32_e32 v6, v10, v8                               ; 060C110A
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                                ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                                ; 3E000605
>	v_mac_f32_e32 v4, s6, v6                                ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                                ; 3E0A0C07
>	v_mac_f32_e32 v7, s8, v6                                ; 3E0E0C08
>	v_mac_f32_e32 v0, s0, v6                                ; 3E000C00
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v0                     ; F80008CF 00070504
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1848 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	v_mov_b32_e32 v0, 0 ; 7E000280
>	v_mov_b32_e32 v1, 0 ; 7E020280
>	v_mov_b32_e32 v2, 0 ; 7E040280
>	v_mov_b32_e32 v3, 0 ; 7E060280
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0020
>*** SHADER STATS ***
>SGPRS: 16
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 36 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL IN[6]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3], GENERIC[2]
>DCL OUT[4].x, GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6], GENERIC[5]
>DCL OUT[7].xy, GENERIC[6]
>DCL CONST[0..231]
>DCL TEMP[0..9], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>IMM[2] FLT32 {    0.1000,     0.5000,     0.0000,     0.0000}
>  0: F2I TEMP[0], IN[4]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MAD TEMP[2], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  3: MOV TEMP[3].xyz, IMM[0].zzzz
>  4: MOV TEMP[3].w, CONST[4].xxxx
>  5: MOV TEMP[4].xyz, IMM[0].zzzz
>  6: MOV TEMP[4].w, CONST[4].yyyy
>  7: MOV TEMP[5].xyz, IMM[0].zzzz
>  8: MOV TEMP[5].w, CONST[4].zzzz
>  9: NOT TEMP[6].x, CONST[228].xxxx
> 10: UIF TEMP[6].xxxx :0
> 11:   ADD TEMP[6], CONST[12], -TEMP[3]
> 12:   ADD TEMP[7], CONST[13], -TEMP[4]
> 13:   ADD TEMP[8], CONST[14], -TEMP[5]
> 14: ELSE :0
> 15:   NOT TEMP[9].x, CONST[229].xxxx
> 16:   UIF TEMP[9].xxxx :0
> 17:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 18:     UARL ADDR[0].x, TEMP[9].xxxx
> 19:     UARL ADDR[0].x, TEMP[9].xxxx
> 20:     ADD TEMP[6], CONST[ADDR[0].x+12], -TEMP[3]
> 21:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 22:     UARL ADDR[0].x, TEMP[9].xxxx
> 23:     UARL ADDR[0].x, TEMP[9].xxxx
> 24:     ADD TEMP[7], CONST[ADDR[0].x+12], -TEMP[4]
> 25:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 26:     UARL ADDR[0].x, TEMP[9].xxxx
> 27:     UARL ADDR[0].x, TEMP[9].xxxx
> 28:     ADD TEMP[8], CONST[ADDR[0].x+12], -TEMP[5]
> 29:   ELSE :0
> 30:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 31:     UARL ADDR[0].x, TEMP[9].xxxx
> 32:     ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[3]
> 33:     MUL TEMP[6], TEMP[9], IN[3].xxxx
> 34:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 35:     UARL ADDR[0].x, TEMP[9].xxxx
> 36:     ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[4]
> 37:     MUL TEMP[7], TEMP[9], IN[3].xxxx
> 38:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 39:     UARL ADDR[0].x, TEMP[9].xxxx
> 40:     ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[5]
> 41:     MUL TEMP[8], TEMP[9], IN[3].xxxx
> 42:     UMUL TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx
> 43:     UARL ADDR[0].x, TEMP[9].xxxx
> 44:     ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[3]
> 45:     MAD TEMP[6], TEMP[9], IN[3].yyyy, TEMP[6]
> 46:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 47:     UARL ADDR[0].x, TEMP[9].xxxx
> 48:     ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[4]
> 49:     MAD TEMP[7], TEMP[9], IN[3].yyyy, TEMP[7]
> 50:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 51:     UARL ADDR[0].x, TEMP[9].xxxx
> 52:     ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[5]
> 53:     MAD TEMP[8], TEMP[9], IN[3].yyyy, TEMP[8]
> 54:     UIF CONST[230].xxxx :0
> 55:       UMUL TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx
> 56:       UARL ADDR[0].x, TEMP[9].xxxx
> 57:       ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[3]
> 58:       MAD TEMP[6], TEMP[9], IN[3].zzzz, TEMP[6]
> 59:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 60:       UARL ADDR[0].x, TEMP[9].xxxx
> 61:       ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[4]
> 62:       MAD TEMP[7], TEMP[9], IN[3].zzzz, TEMP[7]
> 63:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 64:       UARL ADDR[0].x, TEMP[9].xxxx
> 65:       ADD TEMP[9], CONST[ADDR[0].x+12], -TEMP[5]
> 66:       MAD TEMP[8], TEMP[9], IN[3].zzzz, TEMP[8]
> 67:     ENDIF
> 68:     UIF CONST[231].xxxx :0
> 69:       UMUL TEMP[9].x, TEMP[0].wwww, IMM[1].xxxx
> 70:       UARL ADDR[0].x, TEMP[9].xxxx
> 71:       ADD TEMP[3], CONST[ADDR[0].x+12], -TEMP[3]
> 72:       MAD TEMP[6], TEMP[3], IN[3].wwww, TEMP[6]
> 73:       UMAD TEMP[3].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 74:       UARL ADDR[0].x, TEMP[3].xxxx
> 75:       ADD TEMP[3], CONST[ADDR[0].x+12], -TEMP[4]
> 76:       MAD TEMP[7], TEMP[3], IN[3].wwww, TEMP[7]
> 77:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 78:       UARL ADDR[0].x, TEMP[0].xxxx
> 79:       ADD TEMP[0], CONST[ADDR[0].x+12], -TEMP[5]
> 80:       MAD TEMP[8], TEMP[0], IN[3].wwww, TEMP[8]
> 81:     ENDIF
> 82:   ENDIF
> 83: ENDIF
> 84: DP4 TEMP[0].x, IN[0], TEMP[6]
> 85: DP4 TEMP[3].x, IN[0], TEMP[7]
> 86: MOV TEMP[0].y, TEMP[3].xxxx
> 87: DP4 TEMP[3].x, IN[0], TEMP[8]
> 88: MOV TEMP[0].z, TEMP[3].xxxx
> 89: DP4 TEMP[3].x, IN[0], IMM[0].zzzw
> 90: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 91: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[6].xyzz
> 92: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[7].xyzz
> 93: MOV TEMP[4].y, TEMP[5].xxxx
> 94: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[8].xyzz
> 95: MOV TEMP[4].z, TEMP[1].xxxx
> 96: DP3 TEMP[1].x, TEMP[2].xyzz, TEMP[6].xyzz
> 97: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[7].xyzz
> 98: MOV TEMP[1].y, TEMP[5].xxxx
> 99: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[8].xyzz
>100: MOV TEMP[1].z, TEMP[5].xxxx
>101: MUL TEMP[5], CONST[0], TEMP[0].xxxx
>102: MAD TEMP[5], CONST[1], TEMP[0].yyyy, TEMP[5]
>103: MAD TEMP[5], CONST[2], TEMP[0].zzzz, TEMP[5]
>104: MAD TEMP[3], CONST[3], TEMP[3].xxxx, TEMP[5]
>105: MOV TEMP[5].xyz, TEMP[0].xyzx
>106: MUL TEMP[6].x, TEMP[3].wwww, CONST[7].wwww
>107: MOV TEMP[5].w, TEMP[6].xxxx
>108: MUL TEMP[6].x, CONST[5].yyyy, IMM[2].xxxx
>109: MOV TEMP[6].w, TEMP[6].xxxx
>110: MOV TEMP[6].xyz, TEMP[4].xyzx
>111: MOV TEMP[7].x, CONST[8].wwww
>112: MOV TEMP[7].y, CONST[9].wwww
>113: MOV TEMP[7].z, CONST[10].wwww
>114: ADD TEMP[0].xyz, TEMP[0].xyzz, -TEMP[7].xyzz
>115: MUL TEMP[7].xyz, CONST[8].xyzz, TEMP[0].xxxx
>116: MAD TEMP[7].xyz, CONST[9].xyzz, TEMP[0].yyyy, TEMP[7].xyzz
>117: MAD TEMP[0].xyz, CONST[10].xyzz, TEMP[0].zzzz, TEMP[7].xyzz
>118: MOV TEMP[7].w, TEMP[0].zzzz
>119: MUL TEMP[8].xy, TEMP[0].xyyy, CONST[11].xyyy
>120: MAD TEMP[7].xy, IMM[2].yyyy, TEMP[0].zzzz, TEMP[8].xyyy
>121: MAD TEMP[0].x, TEMP[0].zzzz, CONST[11].zzzz, CONST[11].wwww
>122: MOV TEMP[7].z, TEMP[0].xxxx
>123: MAD TEMP[0].x, TEMP[3].zzzz, CONST[6].yyyy, CONST[6].xxxx
>124: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>125: POW TEMP[0].x, TEMP[0].xxxx, CONST[6].zzzz
>126: ADD TEMP[8].x, IMM[0].wwww, -CONST[6].wwww
>127: MAD TEMP[0].x, CONST[6].wwww, TEMP[0].xxxx, TEMP[8].xxxx
>128: MUL TEMP[8].xyz, TEMP[4].zxyy, TEMP[1].yzxx
>129: MAD TEMP[4].xyz, TEMP[4].yzxx, TEMP[1].zxyy, -TEMP[8].xyzz
>130: MUL TEMP[2].xyz, TEMP[4].xyzz, TEMP[2].wwww
>131: MOV TEMP[1].xyz, TEMP[1].xyzx
>132: MOV TEMP[1].w, TEMP[2].xxxx
>133: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
>134: MOV TEMP[4].xy, IN[5].xyxx
>135: MOV TEMP[4].zw, IN[6].yyxy
>136: MOV OUT[7].xy, TEMP[2].yzyy
>137: MOV OUT[1], TEMP[5]
>138: MOV OUT[5], TEMP[6]
>139: MOV OUT[0], TEMP[3]
>140: MOV OUT[4].x, TEMP[0].xxxx
>141: MOV OUT[6], TEMP[1]
>142: MOV OUT[3], TEMP[4]
>143: MOV OUT[2], TEMP[7]
>144: END
>radeonsi: Compiling shader 116
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %14)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = extractelement <4 x float> %23, i32 2
>  %27 = extractelement <4 x float> %23, i32 3
>  %28 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %29 = load <16 x i8>, <16 x i8> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %29, i32 0, i32 %15)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %35, i32 0, i32 %16)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = extractelement <4 x float> %36, i32 1
>  %39 = extractelement <4 x float> %36, i32 2
>  %40 = extractelement <4 x float> %36, i32 3
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %42, i32 0, i32 %17)
>  %44 = extractelement <4 x float> %43, i32 0
>  %45 = extractelement <4 x float> %43, i32 1
>  %46 = extractelement <4 x float> %43, i32 2
>  %47 = extractelement <4 x float> %43, i32 3
>  %48 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %49 = load <16 x i8>, <16 x i8> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %49, i32 0, i32 %18)
>  %51 = extractelement <4 x float> %50, i32 0
>  %52 = extractelement <4 x float> %50, i32 1
>  %53 = extractelement <4 x float> %50, i32 2
>  %54 = extractelement <4 x float> %50, i32 3
>  %55 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 5, !amdgpu.uniform !0
>  %56 = load <16 x i8>, <16 x i8> addrspace(2)* %55, align 16, !invariant.load !0
>  %57 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %56, i32 0, i32 %19)
>  %58 = extractelement <4 x float> %57, i32 0
>  %59 = extractelement <4 x float> %57, i32 1
>  %60 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 6, !amdgpu.uniform !0
>  %61 = load <16 x i8>, <16 x i8> addrspace(2)* %60, align 16, !invariant.load !0
>  %62 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %61, i32 0, i32 %20)
>  %63 = extractelement <4 x float> %62, i32 0
>  %64 = extractelement <4 x float> %62, i32 1
>  %65 = fptosi float %51 to i32
>  %66 = fptosi float %52 to i32
>  %67 = fptosi float %53 to i32
>  %68 = fptosi float %54 to i32
>  %69 = fmul float %31, 2.000000e+00
>  %70 = fadd float %69, -1.000000e+00
>  %71 = fmul float %32, 2.000000e+00
>  %72 = fadd float %71, -1.000000e+00
>  %73 = fmul float %33, 2.000000e+00
>  %74 = fadd float %73, -1.000000e+00
>  %75 = fmul float %37, 2.000000e+00
>  %76 = fadd float %75, -1.000000e+00
>  %77 = fmul float %38, 2.000000e+00
>  %78 = fadd float %77, -1.000000e+00
>  %79 = fmul float %39, 2.000000e+00
>  %80 = fadd float %79, -1.000000e+00
>  %81 = fmul float %40, 2.000000e+00
>  %82 = fadd float %81, -1.000000e+00
>  %83 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %84 = load <16 x i8>, <16 x i8> addrspace(2)* %83, align 16, !invariant.load !0
>  %85 = call float @llvm.SI.load.const(<16 x i8> %84, i32 64)
>  %86 = call float @llvm.SI.load.const(<16 x i8> %84, i32 68)
>  %87 = call float @llvm.SI.load.const(<16 x i8> %84, i32 72)
>  %88 = call float @llvm.SI.load.const(<16 x i8> %84, i32 3648)
>  %89 = bitcast float %88 to i32
>  %90 = icmp eq i32 %89, -1
>  %91 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %92 = load <16 x i8>, <16 x i8> addrspace(2)* %91, align 16, !invariant.load !0
>  br i1 %90, label %else14, label %if10
>
>if10:                                             ; preds = %main_body
>  %93 = call float @llvm.SI.load.const(<16 x i8> %92, i32 192)
>  %94 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %95 = load <16 x i8>, <16 x i8> addrspace(2)* %94, align 16, !invariant.load !0
>  %96 = call float @llvm.SI.load.const(<16 x i8> %95, i32 196)
>  %97 = call float @llvm.SI.load.const(<16 x i8> %95, i32 200)
>  %98 = call float @llvm.SI.load.const(<16 x i8> %95, i32 204)
>  %99 = fsub float %98, %85
>  %100 = call float @llvm.SI.load.const(<16 x i8> %95, i32 208)
>  %101 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %102 = load <16 x i8>, <16 x i8> addrspace(2)* %101, align 16, !invariant.load !0
>  %103 = call float @llvm.SI.load.const(<16 x i8> %102, i32 212)
>  %104 = call float @llvm.SI.load.const(<16 x i8> %102, i32 216)
>  %105 = call float @llvm.SI.load.const(<16 x i8> %102, i32 220)
>  %106 = fsub float %105, %86
>  %107 = call float @llvm.SI.load.const(<16 x i8> %102, i32 224)
>  %108 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %109 = load <16 x i8>, <16 x i8> addrspace(2)* %108, align 16, !invariant.load !0
>  %110 = call float @llvm.SI.load.const(<16 x i8> %109, i32 228)
>  %111 = call float @llvm.SI.load.const(<16 x i8> %109, i32 232)
>  %112 = call float @llvm.SI.load.const(<16 x i8> %109, i32 236)
>  %113 = fsub float %112, %87
>  br label %endif83
>
>else14:                                           ; preds = %main_body
>  %114 = call float @llvm.SI.load.const(<16 x i8> %92, i32 3664)
>  %115 = bitcast float %114 to i32
>  %116 = icmp eq i32 %115, -1
>  %117 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %118 = load <16 x i8>, <16 x i8> addrspace(2)* %117, align 16, !invariant.load !0
>  %119 = mul i32 %65, 48
>  %120 = add i32 %119, 192
>  %121 = call float @llvm.SI.load.const(<16 x i8> %118, i32 %120)
>  %122 = mul i32 %65, 48
>  %123 = add i32 %122, 196
>  %124 = call float @llvm.SI.load.const(<16 x i8> %118, i32 %123)
>  %125 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %126 = load <16 x i8>, <16 x i8> addrspace(2)* %125, align 16, !invariant.load !0
>  %127 = mul i32 %65, 48
>  %128 = add i32 %127, 200
>  %129 = call float @llvm.SI.load.const(<16 x i8> %126, i32 %128)
>  %130 = mul i32 %65, 48
>  %131 = add i32 %130, 204
>  %132 = call float @llvm.SI.load.const(<16 x i8> %126, i32 %131)
>  %133 = fsub float %132, %85
>  br i1 %116, label %else29, label %if16
>
>if16:                                             ; preds = %else14
>  %134 = mul i32 %65, 3
>  %135 = add i32 %134, 1
>  %136 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %137 = load <16 x i8>, <16 x i8> addrspace(2)* %136, align 16, !invariant.load !0
>  %138 = shl i32 %135, 4
>  %139 = add i32 %138, 192
>  %140 = call float @llvm.SI.load.const(<16 x i8> %137, i32 %139)
>  %141 = shl i32 %135, 4
>  %142 = add i32 %141, 196
>  %143 = call float @llvm.SI.load.const(<16 x i8> %137, i32 %142)
>  %144 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %145 = load <16 x i8>, <16 x i8> addrspace(2)* %144, align 16, !invariant.load !0
>  %146 = shl i32 %135, 4
>  %147 = add i32 %146, 200
>  %148 = call float @llvm.SI.load.const(<16 x i8> %145, i32 %147)
>  %149 = shl i32 %135, 4
>  %150 = add i32 %149, 204
>  %151 = call float @llvm.SI.load.const(<16 x i8> %145, i32 %150)
>  %152 = fsub float %151, %86
>  %153 = mul i32 %65, 3
>  %154 = add i32 %153, 2
>  %155 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %156 = load <16 x i8>, <16 x i8> addrspace(2)* %155, align 16, !invariant.load !0
>  %157 = shl i32 %154, 4
>  %158 = add i32 %157, 192
>  %159 = call float @llvm.SI.load.const(<16 x i8> %156, i32 %158)
>  %160 = shl i32 %154, 4
>  %161 = add i32 %160, 196
>  %162 = call float @llvm.SI.load.const(<16 x i8> %156, i32 %161)
>  %163 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %164 = load <16 x i8>, <16 x i8> addrspace(2)* %163, align 16, !invariant.load !0
>  %165 = shl i32 %154, 4
>  %166 = add i32 %165, 200
>  %167 = call float @llvm.SI.load.const(<16 x i8> %164, i32 %166)
>  %168 = shl i32 %154, 4
>  %169 = add i32 %168, 204
>  %170 = call float @llvm.SI.load.const(<16 x i8> %164, i32 %169)
>  %171 = fsub float %170, %87
>  br label %endif83
>
>else29:                                           ; preds = %else14
>  %172 = fmul float %121, %44
>  %173 = fmul float %124, %44
>  %174 = fmul float %129, %44
>  %175 = fmul float %133, %44
>  %176 = mul i32 %65, 3
>  %177 = add i32 %176, 1
>  %178 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %179 = load <16 x i8>, <16 x i8> addrspace(2)* %178, align 16, !invariant.load !0
>  %180 = shl i32 %177, 4
>  %181 = add i32 %180, 192
>  %182 = call float @llvm.SI.load.const(<16 x i8> %179, i32 %181)
>  %183 = shl i32 %177, 4
>  %184 = add i32 %183, 196
>  %185 = call float @llvm.SI.load.const(<16 x i8> %179, i32 %184)
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = shl i32 %177, 4
>  %189 = add i32 %188, 200
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 %189)
>  %191 = shl i32 %177, 4
>  %192 = add i32 %191, 204
>  %193 = call float @llvm.SI.load.const(<16 x i8> %187, i32 %192)
>  %194 = fsub float %193, %86
>  %195 = fmul float %182, %44
>  %196 = fmul float %185, %44
>  %197 = fmul float %190, %44
>  %198 = fmul float %194, %44
>  %199 = mul i32 %65, 3
>  %200 = add i32 %199, 2
>  %201 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %202 = load <16 x i8>, <16 x i8> addrspace(2)* %201, align 16, !invariant.load !0
>  %203 = shl i32 %200, 4
>  %204 = add i32 %203, 192
>  %205 = call float @llvm.SI.load.const(<16 x i8> %202, i32 %204)
>  %206 = shl i32 %200, 4
>  %207 = add i32 %206, 196
>  %208 = call float @llvm.SI.load.const(<16 x i8> %202, i32 %207)
>  %209 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %210 = load <16 x i8>, <16 x i8> addrspace(2)* %209, align 16, !invariant.load !0
>  %211 = shl i32 %200, 4
>  %212 = add i32 %211, 200
>  %213 = call float @llvm.SI.load.const(<16 x i8> %210, i32 %212)
>  %214 = shl i32 %200, 4
>  %215 = add i32 %214, 204
>  %216 = call float @llvm.SI.load.const(<16 x i8> %210, i32 %215)
>  %217 = fsub float %216, %87
>  %218 = fmul float %205, %44
>  %219 = fmul float %208, %44
>  %220 = fmul float %213, %44
>  %221 = fmul float %217, %44
>  %222 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %223 = load <16 x i8>, <16 x i8> addrspace(2)* %222, align 16, !invariant.load !0
>  %224 = mul i32 %66, 48
>  %225 = add i32 %224, 192
>  %226 = call float @llvm.SI.load.const(<16 x i8> %223, i32 %225)
>  %227 = mul i32 %66, 48
>  %228 = add i32 %227, 196
>  %229 = call float @llvm.SI.load.const(<16 x i8> %223, i32 %228)
>  %230 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %231 = load <16 x i8>, <16 x i8> addrspace(2)* %230, align 16, !invariant.load !0
>  %232 = mul i32 %66, 48
>  %233 = add i32 %232, 200
>  %234 = call float @llvm.SI.load.const(<16 x i8> %231, i32 %233)
>  %235 = mul i32 %66, 48
>  %236 = add i32 %235, 204
>  %237 = call float @llvm.SI.load.const(<16 x i8> %231, i32 %236)
>  %238 = fsub float %237, %85
>  %239 = fmul float %226, %45
>  %240 = fadd float %239, %172
>  %241 = fmul float %229, %45
>  %242 = fadd float %241, %173
>  %243 = fmul float %234, %45
>  %244 = fadd float %243, %174
>  %245 = fmul float %238, %45
>  %246 = fadd float %245, %175
>  %247 = mul i32 %66, 3
>  %248 = add i32 %247, 1
>  %249 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %250 = load <16 x i8>, <16 x i8> addrspace(2)* %249, align 16, !invariant.load !0
>  %251 = shl i32 %248, 4
>  %252 = add i32 %251, 192
>  %253 = call float @llvm.SI.load.const(<16 x i8> %250, i32 %252)
>  %254 = shl i32 %248, 4
>  %255 = add i32 %254, 196
>  %256 = call float @llvm.SI.load.const(<16 x i8> %250, i32 %255)
>  %257 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %258 = load <16 x i8>, <16 x i8> addrspace(2)* %257, align 16, !invariant.load !0
>  %259 = shl i32 %248, 4
>  %260 = add i32 %259, 200
>  %261 = call float @llvm.SI.load.const(<16 x i8> %258, i32 %260)
>  %262 = shl i32 %248, 4
>  %263 = add i32 %262, 204
>  %264 = call float @llvm.SI.load.const(<16 x i8> %258, i32 %263)
>  %265 = fsub float %264, %86
>  %266 = fmul float %253, %45
>  %267 = fadd float %266, %195
>  %268 = fmul float %256, %45
>  %269 = fadd float %268, %196
>  %270 = fmul float %261, %45
>  %271 = fadd float %270, %197
>  %272 = fmul float %265, %45
>  %273 = fadd float %272, %198
>  %274 = mul i32 %66, 3
>  %275 = add i32 %274, 2
>  %276 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %277 = load <16 x i8>, <16 x i8> addrspace(2)* %276, align 16, !invariant.load !0
>  %278 = shl i32 %275, 4
>  %279 = add i32 %278, 192
>  %280 = call float @llvm.SI.load.const(<16 x i8> %277, i32 %279)
>  %281 = shl i32 %275, 4
>  %282 = add i32 %281, 196
>  %283 = call float @llvm.SI.load.const(<16 x i8> %277, i32 %282)
>  %284 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %285 = load <16 x i8>, <16 x i8> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = shl i32 %275, 4
>  %287 = add i32 %286, 200
>  %288 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %287)
>  %289 = shl i32 %275, 4
>  %290 = add i32 %289, 204
>  %291 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %290)
>  %292 = fsub float %291, %87
>  %293 = fmul float %280, %45
>  %294 = fadd float %293, %218
>  %295 = fmul float %283, %45
>  %296 = fadd float %295, %219
>  %297 = fmul float %288, %45
>  %298 = fadd float %297, %220
>  %299 = fmul float %292, %45
>  %300 = fadd float %299, %221
>  %301 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %302 = load <16 x i8>, <16 x i8> addrspace(2)* %301, align 16, !invariant.load !0
>  %303 = call float @llvm.SI.load.const(<16 x i8> %302, i32 3680)
>  %304 = bitcast float %303 to i32
>  %305 = icmp eq i32 %304, 0
>  br i1 %305, label %endif67, label %if54
>
>if54:                                             ; preds = %else29
>  %306 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %307 = load <16 x i8>, <16 x i8> addrspace(2)* %306, align 16, !invariant.load !0
>  %308 = mul i32 %67, 48
>  %309 = add i32 %308, 192
>  %310 = call float @llvm.SI.load.const(<16 x i8> %307, i32 %309)
>  %311 = mul i32 %67, 48
>  %312 = add i32 %311, 196
>  %313 = call float @llvm.SI.load.const(<16 x i8> %307, i32 %312)
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = mul i32 %67, 48
>  %317 = add i32 %316, 200
>  %318 = call float @llvm.SI.load.const(<16 x i8> %315, i32 %317)
>  %319 = mul i32 %67, 48
>  %320 = add i32 %319, 204
>  %321 = call float @llvm.SI.load.const(<16 x i8> %315, i32 %320)
>  %322 = fsub float %321, %85
>  %323 = fmul float %310, %46
>  %324 = fadd float %323, %240
>  %325 = fmul float %313, %46
>  %326 = fadd float %325, %242
>  %327 = fmul float %318, %46
>  %328 = fadd float %327, %244
>  %329 = fmul float %322, %46
>  %330 = fadd float %329, %246
>  %331 = mul i32 %67, 3
>  %332 = add i32 %331, 1
>  %333 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %334 = load <16 x i8>, <16 x i8> addrspace(2)* %333, align 16, !invariant.load !0
>  %335 = shl i32 %332, 4
>  %336 = add i32 %335, 192
>  %337 = call float @llvm.SI.load.const(<16 x i8> %334, i32 %336)
>  %338 = shl i32 %332, 4
>  %339 = add i32 %338, 196
>  %340 = call float @llvm.SI.load.const(<16 x i8> %334, i32 %339)
>  %341 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %342 = load <16 x i8>, <16 x i8> addrspace(2)* %341, align 16, !invariant.load !0
>  %343 = shl i32 %332, 4
>  %344 = add i32 %343, 200
>  %345 = call float @llvm.SI.load.const(<16 x i8> %342, i32 %344)
>  %346 = shl i32 %332, 4
>  %347 = add i32 %346, 204
>  %348 = call float @llvm.SI.load.const(<16 x i8> %342, i32 %347)
>  %349 = fsub float %348, %86
>  %350 = fmul float %337, %46
>  %351 = fadd float %350, %267
>  %352 = fmul float %340, %46
>  %353 = fadd float %352, %269
>  %354 = fmul float %345, %46
>  %355 = fadd float %354, %271
>  %356 = fmul float %349, %46
>  %357 = fadd float %356, %273
>  %358 = mul i32 %67, 3
>  %359 = add i32 %358, 2
>  %360 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %361 = load <16 x i8>, <16 x i8> addrspace(2)* %360, align 16, !invariant.load !0
>  %362 = shl i32 %359, 4
>  %363 = add i32 %362, 192
>  %364 = call float @llvm.SI.load.const(<16 x i8> %361, i32 %363)
>  %365 = shl i32 %359, 4
>  %366 = add i32 %365, 196
>  %367 = call float @llvm.SI.load.const(<16 x i8> %361, i32 %366)
>  %368 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %369 = load <16 x i8>, <16 x i8> addrspace(2)* %368, align 16, !invariant.load !0
>  %370 = shl i32 %359, 4
>  %371 = add i32 %370, 200
>  %372 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %371)
>  %373 = shl i32 %359, 4
>  %374 = add i32 %373, 204
>  %375 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %374)
>  %376 = fsub float %375, %87
>  %377 = fmul float %364, %46
>  %378 = fadd float %377, %294
>  %379 = fmul float %367, %46
>  %380 = fadd float %379, %296
>  %381 = fmul float %372, %46
>  %382 = fadd float %381, %298
>  %383 = fmul float %376, %46
>  %384 = fadd float %383, %300
>  br label %endif67
>
>endif67:                                          ; preds = %else29, %if54
>  %.0101 = phi float [ %324, %if54 ], [ %240, %else29 ]
>  %.097 = phi float [ %326, %if54 ], [ %242, %else29 ]
>  %.093 = phi float [ %328, %if54 ], [ %244, %else29 ]
>  %.089 = phi float [ %330, %if54 ], [ %246, %else29 ]
>  %.085 = phi float [ %351, %if54 ], [ %267, %else29 ]
>  %.081 = phi float [ %353, %if54 ], [ %269, %else29 ]
>  %.077 = phi float [ %355, %if54 ], [ %271, %else29 ]
>  %.073 = phi float [ %357, %if54 ], [ %273, %else29 ]
>  %.069 = phi float [ %378, %if54 ], [ %294, %else29 ]
>  %.065 = phi float [ %380, %if54 ], [ %296, %else29 ]
>  %.061 = phi float [ %382, %if54 ], [ %298, %else29 ]
>  %.0 = phi float [ %384, %if54 ], [ %300, %else29 ]
>  %385 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %386 = load <16 x i8>, <16 x i8> addrspace(2)* %385, align 16, !invariant.load !0
>  %387 = call float @llvm.SI.load.const(<16 x i8> %386, i32 3696)
>  %388 = bitcast float %387 to i32
>  %389 = icmp eq i32 %388, 0
>  br i1 %389, label %endif83, label %if68
>
>if68:                                             ; preds = %endif67
>  %390 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %391 = load <16 x i8>, <16 x i8> addrspace(2)* %390, align 16, !invariant.load !0
>  %392 = mul i32 %68, 48
>  %393 = add i32 %392, 192
>  %394 = call float @llvm.SI.load.const(<16 x i8> %391, i32 %393)
>  %395 = mul i32 %68, 48
>  %396 = add i32 %395, 196
>  %397 = call float @llvm.SI.load.const(<16 x i8> %391, i32 %396)
>  %398 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %399 = load <16 x i8>, <16 x i8> addrspace(2)* %398, align 16, !invariant.load !0
>  %400 = mul i32 %68, 48
>  %401 = add i32 %400, 200
>  %402 = call float @llvm.SI.load.const(<16 x i8> %399, i32 %401)
>  %403 = mul i32 %68, 48
>  %404 = add i32 %403, 204
>  %405 = call float @llvm.SI.load.const(<16 x i8> %399, i32 %404)
>  %406 = fsub float %405, %85
>  %407 = fmul float %394, %47
>  %408 = fadd float %407, %.0101
>  %409 = fmul float %397, %47
>  %410 = fadd float %409, %.097
>  %411 = fmul float %402, %47
>  %412 = fadd float %411, %.093
>  %413 = fmul float %406, %47
>  %414 = fadd float %413, %.089
>  %415 = mul i32 %68, 3
>  %416 = add i32 %415, 1
>  %417 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %418 = load <16 x i8>, <16 x i8> addrspace(2)* %417, align 16, !invariant.load !0
>  %419 = shl i32 %416, 4
>  %420 = add i32 %419, 192
>  %421 = call float @llvm.SI.load.const(<16 x i8> %418, i32 %420)
>  %422 = shl i32 %416, 4
>  %423 = add i32 %422, 196
>  %424 = call float @llvm.SI.load.const(<16 x i8> %418, i32 %423)
>  %425 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %426 = load <16 x i8>, <16 x i8> addrspace(2)* %425, align 16, !invariant.load !0
>  %427 = shl i32 %416, 4
>  %428 = add i32 %427, 200
>  %429 = call float @llvm.SI.load.const(<16 x i8> %426, i32 %428)
>  %430 = shl i32 %416, 4
>  %431 = add i32 %430, 204
>  %432 = call float @llvm.SI.load.const(<16 x i8> %426, i32 %431)
>  %433 = fsub float %432, %86
>  %434 = fmul float %421, %47
>  %435 = fadd float %434, %.085
>  %436 = fmul float %424, %47
>  %437 = fadd float %436, %.081
>  %438 = fmul float %429, %47
>  %439 = fadd float %438, %.077
>  %440 = fmul float %433, %47
>  %441 = fadd float %440, %.073
>  %442 = mul i32 %68, 3
>  %443 = add i32 %442, 2
>  %444 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %445 = load <16 x i8>, <16 x i8> addrspace(2)* %444, align 16, !invariant.load !0
>  %446 = shl i32 %443, 4
>  %447 = add i32 %446, 192
>  %448 = call float @llvm.SI.load.const(<16 x i8> %445, i32 %447)
>  %449 = shl i32 %443, 4
>  %450 = add i32 %449, 196
>  %451 = call float @llvm.SI.load.const(<16 x i8> %445, i32 %450)
>  %452 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %453 = load <16 x i8>, <16 x i8> addrspace(2)* %452, align 16, !invariant.load !0
>  %454 = shl i32 %443, 4
>  %455 = add i32 %454, 200
>  %456 = call float @llvm.SI.load.const(<16 x i8> %453, i32 %455)
>  %457 = shl i32 %443, 4
>  %458 = add i32 %457, 204
>  %459 = call float @llvm.SI.load.const(<16 x i8> %453, i32 %458)
>  %460 = fsub float %459, %87
>  %461 = fmul float %448, %47
>  %462 = fadd float %461, %.069
>  %463 = fmul float %451, %47
>  %464 = fadd float %463, %.065
>  %465 = fmul float %456, %47
>  %466 = fadd float %465, %.061
>  %467 = fmul float %460, %47
>  %468 = fadd float %467, %.0
>  br label %endif83
>
>endif83:                                          ; preds = %endif67, %if16, %if68, %if10
>  %.3104 = phi float [ %93, %if10 ], [ %121, %if16 ], [ %408, %if68 ], [ %.0101, %endif67 ]
>  %.3100 = phi float [ %96, %if10 ], [ %124, %if16 ], [ %410, %if68 ], [ %.097, %endif67 ]
>  %.396 = phi float [ %97, %if10 ], [ %129, %if16 ], [ %412, %if68 ], [ %.093, %endif67 ]
>  %.392 = phi float [ %99, %if10 ], [ %133, %if16 ], [ %414, %if68 ], [ %.089, %endif67 ]
>  %.388 = phi float [ %100, %if10 ], [ %140, %if16 ], [ %435, %if68 ], [ %.085, %endif67 ]
>  %.384 = phi float [ %103, %if10 ], [ %143, %if16 ], [ %437, %if68 ], [ %.081, %endif67 ]
>  %.380 = phi float [ %104, %if10 ], [ %148, %if16 ], [ %439, %if68 ], [ %.077, %endif67 ]
>  %.376 = phi float [ %106, %if10 ], [ %152, %if16 ], [ %441, %if68 ], [ %.073, %endif67 ]
>  %.372 = phi float [ %107, %if10 ], [ %159, %if16 ], [ %462, %if68 ], [ %.069, %endif67 ]
>  %.368 = phi float [ %110, %if10 ], [ %162, %if16 ], [ %464, %if68 ], [ %.065, %endif67 ]
>  %.364 = phi float [ %111, %if10 ], [ %167, %if16 ], [ %466, %if68 ], [ %.061, %endif67 ]
>  %.3 = phi float [ %113, %if10 ], [ %171, %if16 ], [ %468, %if68 ], [ %.0, %endif67 ]
>  %469 = fmul float %24, %.3104
>  %470 = fmul float %25, %.3100
>  %471 = fadd float %469, %470
>  %472 = fmul float %26, %.396
>  %473 = fadd float %471, %472
>  %474 = fmul float %27, %.392
>  %475 = fadd float %473, %474
>  %476 = fmul float %24, %.388
>  %477 = fmul float %25, %.384
>  %478 = fadd float %476, %477
>  %479 = fmul float %26, %.380
>  %480 = fadd float %478, %479
>  %481 = fmul float %27, %.376
>  %482 = fadd float %480, %481
>  %483 = fmul float %24, %.372
>  %484 = fmul float %25, %.368
>  %485 = fadd float %483, %484
>  %486 = fmul float %26, %.364
>  %487 = fadd float %485, %486
>  %488 = fmul float %27, %.3
>  %489 = fadd float %487, %488
>  %490 = fmul float %24, 0.000000e+00
>  %491 = fmul float %25, 0.000000e+00
>  %492 = fadd float %490, %491
>  %493 = fmul float %26, 0.000000e+00
>  %494 = fadd float %492, %493
>  %495 = fadd float %494, %27
>  %496 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %497 = load <16 x i8>, <16 x i8> addrspace(2)* %496, align 16, !invariant.load !0
>  %498 = call float @llvm.SI.load.const(<16 x i8> %497, i32 64)
>  %499 = fadd float %475, %498
>  %500 = call float @llvm.SI.load.const(<16 x i8> %497, i32 68)
>  %501 = fadd float %482, %500
>  %502 = call float @llvm.SI.load.const(<16 x i8> %497, i32 72)
>  %503 = fadd float %489, %502
>  %504 = fmul float %70, %.3104
>  %505 = fmul float %72, %.3100
>  %506 = fadd float %505, %504
>  %507 = fmul float %74, %.396
>  %508 = fadd float %506, %507
>  %509 = fmul float %70, %.388
>  %510 = fmul float %72, %.384
>  %511 = fadd float %510, %509
>  %512 = fmul float %74, %.380
>  %513 = fadd float %511, %512
>  %514 = fmul float %70, %.372
>  %515 = fmul float %72, %.368
>  %516 = fadd float %515, %514
>  %517 = fmul float %74, %.364
>  %518 = fadd float %516, %517
>  %519 = fmul float %76, %.3104
>  %520 = fmul float %78, %.3100
>  %521 = fadd float %520, %519
>  %522 = fmul float %80, %.396
>  %523 = fadd float %521, %522
>  %524 = fmul float %76, %.388
>  %525 = fmul float %78, %.384
>  %526 = fadd float %525, %524
>  %527 = fmul float %80, %.380
>  %528 = fadd float %526, %527
>  %529 = fmul float %76, %.372
>  %530 = fmul float %78, %.368
>  %531 = fadd float %530, %529
>  %532 = fmul float %80, %.364
>  %533 = fadd float %531, %532
>  %534 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %535 = load <16 x i8>, <16 x i8> addrspace(2)* %534, align 16, !invariant.load !0
>  %536 = call float @llvm.SI.load.const(<16 x i8> %535, i32 0)
>  %537 = fmul float %536, %499
>  %538 = call float @llvm.SI.load.const(<16 x i8> %535, i32 4)
>  %539 = fmul float %538, %499
>  %540 = call float @llvm.SI.load.const(<16 x i8> %535, i32 8)
>  %541 = fmul float %540, %499
>  %542 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %543 = load <16 x i8>, <16 x i8> addrspace(2)* %542, align 16, !invariant.load !0
>  %544 = call float @llvm.SI.load.const(<16 x i8> %543, i32 12)
>  %545 = fmul float %544, %499
>  %546 = call float @llvm.SI.load.const(<16 x i8> %543, i32 16)
>  %547 = fmul float %546, %501
>  %548 = fadd float %547, %537
>  %549 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %550 = load <16 x i8>, <16 x i8> addrspace(2)* %549, align 16, !invariant.load !0
>  %551 = call float @llvm.SI.load.const(<16 x i8> %550, i32 20)
>  %552 = fmul float %551, %501
>  %553 = fadd float %552, %539
>  %554 = call float @llvm.SI.load.const(<16 x i8> %550, i32 24)
>  %555 = fmul float %554, %501
>  %556 = fadd float %555, %541
>  %557 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %558 = load <16 x i8>, <16 x i8> addrspace(2)* %557, align 16, !invariant.load !0
>  %559 = call float @llvm.SI.load.const(<16 x i8> %558, i32 28)
>  %560 = fmul float %559, %501
>  %561 = fadd float %560, %545
>  %562 = call float @llvm.SI.load.const(<16 x i8> %558, i32 32)
>  %563 = fmul float %562, %503
>  %564 = fadd float %563, %548
>  %565 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %566 = load <16 x i8>, <16 x i8> addrspace(2)* %565, align 16, !invariant.load !0
>  %567 = call float @llvm.SI.load.const(<16 x i8> %566, i32 36)
>  %568 = fmul float %567, %503
>  %569 = fadd float %568, %553
>  %570 = call float @llvm.SI.load.const(<16 x i8> %566, i32 40)
>  %571 = fmul float %570, %503
>  %572 = fadd float %571, %556
>  %573 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %574 = load <16 x i8>, <16 x i8> addrspace(2)* %573, align 16, !invariant.load !0
>  %575 = call float @llvm.SI.load.const(<16 x i8> %574, i32 44)
>  %576 = fmul float %575, %503
>  %577 = fadd float %576, %561
>  %578 = call float @llvm.SI.load.const(<16 x i8> %574, i32 48)
>  %579 = fmul float %578, %495
>  %580 = fadd float %579, %564
>  %581 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %582 = load <16 x i8>, <16 x i8> addrspace(2)* %581, align 16, !invariant.load !0
>  %583 = call float @llvm.SI.load.const(<16 x i8> %582, i32 52)
>  %584 = fmul float %583, %495
>  %585 = fadd float %584, %569
>  %586 = call float @llvm.SI.load.const(<16 x i8> %582, i32 56)
>  %587 = fmul float %586, %495
>  %588 = fadd float %587, %572
>  %589 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %590 = load <16 x i8>, <16 x i8> addrspace(2)* %589, align 16, !invariant.load !0
>  %591 = call float @llvm.SI.load.const(<16 x i8> %590, i32 60)
>  %592 = fmul float %591, %495
>  %593 = fadd float %592, %577
>  %594 = call float @llvm.SI.load.const(<16 x i8> %590, i32 124)
>  %595 = fmul float %593, %594
>  %596 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %597 = load <16 x i8>, <16 x i8> addrspace(2)* %596, align 16, !invariant.load !0
>  %598 = call float @llvm.SI.load.const(<16 x i8> %597, i32 84)
>  %599 = fmul float %598, 0x3FB99999A0000000
>  %600 = call float @llvm.SI.load.const(<16 x i8> %597, i32 140)
>  %601 = call float @llvm.SI.load.const(<16 x i8> %597, i32 156)
>  %602 = call float @llvm.SI.load.const(<16 x i8> %597, i32 172)
>  %603 = fsub float %499, %600
>  %604 = fsub float %501, %601
>  %605 = fsub float %503, %602
>  %606 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %607 = load <16 x i8>, <16 x i8> addrspace(2)* %606, align 16, !invariant.load !0
>  %608 = call float @llvm.SI.load.const(<16 x i8> %607, i32 128)
>  %609 = fmul float %608, %603
>  %610 = call float @llvm.SI.load.const(<16 x i8> %607, i32 132)
>  %611 = fmul float %610, %603
>  %612 = call float @llvm.SI.load.const(<16 x i8> %607, i32 136)
>  %613 = fmul float %612, %603
>  %614 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %615 = load <16 x i8>, <16 x i8> addrspace(2)* %614, align 16, !invariant.load !0
>  %616 = call float @llvm.SI.load.const(<16 x i8> %615, i32 144)
>  %617 = fmul float %616, %604
>  %618 = fadd float %617, %609
>  %619 = call float @llvm.SI.load.const(<16 x i8> %615, i32 148)
>  %620 = fmul float %619, %604
>  %621 = fadd float %620, %611
>  %622 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %623 = load <16 x i8>, <16 x i8> addrspace(2)* %622, align 16, !invariant.load !0
>  %624 = call float @llvm.SI.load.const(<16 x i8> %623, i32 152)
>  %625 = fmul float %624, %604
>  %626 = fadd float %625, %613
>  %627 = call float @llvm.SI.load.const(<16 x i8> %623, i32 160)
>  %628 = fmul float %627, %605
>  %629 = fadd float %628, %618
>  %630 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %631 = load <16 x i8>, <16 x i8> addrspace(2)* %630, align 16, !invariant.load !0
>  %632 = call float @llvm.SI.load.const(<16 x i8> %631, i32 164)
>  %633 = fmul float %632, %605
>  %634 = fadd float %633, %621
>  %635 = call float @llvm.SI.load.const(<16 x i8> %631, i32 168)
>  %636 = fmul float %635, %605
>  %637 = fadd float %636, %626
>  %638 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %639 = load <16 x i8>, <16 x i8> addrspace(2)* %638, align 16, !invariant.load !0
>  %640 = call float @llvm.SI.load.const(<16 x i8> %639, i32 176)
>  %641 = fmul float %629, %640
>  %642 = call float @llvm.SI.load.const(<16 x i8> %639, i32 180)
>  %643 = fmul float %634, %642
>  %644 = fmul float %637, 5.000000e-01
>  %645 = fadd float %644, %641
>  %646 = fmul float %637, 5.000000e-01
>  %647 = fadd float %646, %643
>  %648 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %649 = load <16 x i8>, <16 x i8> addrspace(2)* %648, align 16, !invariant.load !0
>  %650 = call float @llvm.SI.load.const(<16 x i8> %649, i32 184)
>  %651 = call float @llvm.SI.load.const(<16 x i8> %649, i32 188)
>  %652 = fmul float %637, %650
>  %653 = fadd float %652, %651
>  %654 = call float @llvm.SI.load.const(<16 x i8> %649, i32 100)
>  %655 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %656 = load <16 x i8>, <16 x i8> addrspace(2)* %655, align 16, !invariant.load !0
>  %657 = call float @llvm.SI.load.const(<16 x i8> %656, i32 96)
>  %658 = fmul float %588, %654
>  %659 = fadd float %658, %657
>  %660 = call float @llvm.AMDGPU.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = call float @llvm.SI.load.const(<16 x i8> %656, i32 104)
>  %662 = call float @llvm.pow.f32(float %660, float %661)
>  %663 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %664 = load <16 x i8>, <16 x i8> addrspace(2)* %663, align 16, !invariant.load !0
>  %665 = call float @llvm.SI.load.const(<16 x i8> %664, i32 108)
>  %666 = fsub float 1.000000e+00, %665
>  %667 = call float @llvm.SI.load.const(<16 x i8> %664, i32 108)
>  %668 = fmul float %667, %662
>  %669 = fadd float %668, %666
>  %670 = fmul float %518, %528
>  %671 = fmul float %508, %533
>  %672 = fmul float %513, %523
>  %673 = fmul float %513, %533
>  %674 = fsub float %673, %670
>  %675 = fmul float %518, %523
>  %676 = fsub float %675, %671
>  %677 = fmul float %508, %528
>  %678 = fsub float %677, %672
>  %679 = fmul float %674, %82
>  %680 = fmul float %676, %82
>  %681 = fmul float %678, %82
>  %682 = fmul float %669, %669
>  %683 = bitcast i32 %12 to float
>  %684 = insertvalue <{ float, float, float }> undef, float %683, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %499, float %501, float %503, float %595)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %645, float %647, float %653, float %637)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %58, float %59, float %63, float %64)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %682, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %508, float %513, float %518, float %599)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %523, float %528, float %533, float %679)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 38, i32 0, float %680, float %681, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %580, float %585, float %588, float %593)
>  ret <{ float, float, float }> %684
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE
>DCL IN[3].x, GENERIC[3], PERSPECTIVE
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5], GENERIC[5], PERSPECTIVE, CENTROID
>DCL IN[6].xy, GENERIC[6], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SAMP[8]
>DCL SAMP[9]
>DCL SAMP[10]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL SVIEW[8], 2D, FLOAT
>DCL SVIEW[9], 2D, FLOAT
>DCL SVIEW[10], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..21]
>DCL CONST[30..43]
>DCL TEMP[0..71], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,    -1.0000,     1.0010}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.3333,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,     0.0000,    32.0000}
>IMM[5] INT32 {0, 3, 2, 1}
>IMM[6] FLT32 {    0.3000,     0.5900,     0.1100,     0.0010}
>IMM[7] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[5].wwww
>  1: MOV TEMP[0].yz, IN[6].yxyy
>  2: ADD TEMP[1].xyz, CONST[0].xyzz, -IN[0].xyzz
>  3: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>  4: RSQ TEMP[2].x, TEMP[2].xxxx
>  5: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
>  6: DP3 TEMP[2].x, IN[4].xyzz, IN[4].xyzz
>  7: RSQ TEMP[2].x, TEMP[2].xxxx
>  8: MUL TEMP[2].xyz, IN[4].xyzz, TEMP[2].xxxx
>  9: MOV TEMP[3].xy, IN[2].xyyy
> 10: TEX TEMP[3], TEMP[3], SAMP[4], 2D
> 11: MOV TEMP[4], TEMP[3]
> 12: MOV TEMP[4].w, TEMP[3].wwww
> 13: MOV TEMP[5].xy, IN[2].xyyy
> 14: TEX TEMP[5], TEMP[5], SAMP[9], 2D
> 15: MOV TEMP[6], TEMP[5]
> 16: MUL TEMP[6], CONST[31], TEMP[5].xxxx
> 17: MAD TEMP[6], CONST[34], TEMP[5].yyyy, TEMP[6]
> 18: MAD TEMP[6], CONST[37], TEMP[5].zzzz, TEMP[6]
> 19: MUL TEMP[7], CONST[33], TEMP[5].xxxx
> 20: MAD TEMP[7], CONST[36], TEMP[5].yyyy, TEMP[7]
> 21: MAD TEMP[7], CONST[39], TEMP[5].zzzz, TEMP[7]
> 22: MOV TEMP[8].xy, TEMP[7].xyxx
> 23: DP3 TEMP[9].x, TEMP[5].xyzz, IMM[0].xxxx
> 24: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 25: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[9].xxxx
> 26: ADD TEMP[10].xy, TEMP[7].zwww, TEMP[10].xxxx
> 27: MOV TEMP[8].zw, TEMP[10].yyxy
> 28: MUL TEMP[8].xyz, CONST[32].xyzz, TEMP[5].xxxx
> 29: MAD TEMP[8].xyz, CONST[35].xyzz, TEMP[5].yyyy, TEMP[8].xyzz
> 30: MAD TEMP[5].xyz, CONST[38].xyzz, TEMP[5].zzzz, TEMP[8].xyzz
> 31: LRP TEMP[4].xyz, TEMP[9].xxxx, TEMP[5].xyzz, TEMP[3].xyzz
> 32: MUL TEMP[5].xyz, TEMP[6].xyzz, TEMP[7].yyyy
> 33: RCP TEMP[8].x, TEMP[10].yyyy
> 34: POW TEMP[9].x, TEMP[5].xxxx, TEMP[8].xxxx
> 35: POW TEMP[9].y, TEMP[5].yyyy, TEMP[8].xxxx
> 36: POW TEMP[9].z, TEMP[5].zzzz, TEMP[8].xxxx
> 37: MOV TEMP[5].xyz, TEMP[9].xyzx
> 38: MOV TEMP[8].x, CONST[41].xxxx
> 39: MOV TEMP[8].x, CONST[41].yyyy
> 40: MUL TEMP[8].xy, IN[2].xyyy, CONST[30].xyyy
> 41: MUL TEMP[11].xy, CONST[42].xyyy, IN[4].wwww
> 42: MUL TEMP[12].xy, TEMP[8].xyyy, CONST[41].xxxx
> 43: MAD TEMP[11].xy, TEMP[11].xyyy, CONST[41].xxxx, TEMP[12].xyyy
> 44: MOV TEMP[11].xy, TEMP[11].xyyy
> 45: TEX TEMP[11], TEMP[11], SAMP[6], 2D
> 46: MOV TEMP[12], TEMP[11]
> 47: MUL TEMP[12].xy, CONST[42].zwww, IN[4].wwww
> 48: MUL TEMP[8].xy, TEMP[8].xyyy, CONST[41].yyyy
> 49: MAD TEMP[8].xy, TEMP[12].xyyy, CONST[41].yyyy, TEMP[8].xyyy
> 50: MOV TEMP[8].xy, TEMP[8].xyyy
> 51: TEX TEMP[8], TEMP[8], SAMP[6], 2D
> 52: MUL TEMP[8].x, TEMP[8].zzzz, CONST[41].wwww
> 53: MAD TEMP[8].x, TEMP[11].yyyy, CONST[41].zzzz, -TEMP[8].xxxx
> 54: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 55: MUL TEMP[12].x, TEMP[3].wwww, TEMP[8].xxxx
> 56: LRP TEMP[4].xyz, TEMP[12].xxxx, CONST[40].xyzz, TEMP[4].xyzz
> 57: MOV TEMP[12].xy, IN[2].xyyy
> 58: TEX TEMP[12], TEMP[12], SAMP[7], 2D
> 59: LRP TEMP[6].x, TEMP[7].xxxx, TEMP[6].wwww, TEMP[12].wwww
> 60: RCP TEMP[7].x, TEMP[10].xxxx
> 61: POW TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
> 62: MUL TEMP[7].x, TEMP[3].wwww, TEMP[8].xxxx
> 63: LRP TEMP[6].x, TEMP[7].xxxx, CONST[40].wwww, TEMP[6].xxxx
> 64: MOV TEMP[7].xy, IN[2].xyyy
> 65: TEX TEMP[7], TEMP[7], SAMP[5], 2D
> 66: MOV TEMP[8], TEMP[7]
> 67: MAD TEMP[10].xy, TEMP[7].wyyy, IMM[0].yyyy, IMM[0].zzzz
> 68: MOV TEMP[10].z, TEMP[7].xxxx
> 69: DP2 TEMP[12].x, TEMP[10].xyyy, TEMP[10].xyyy
> 70: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 71: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
> 72: SQRT TEMP[12].x, TEMP[12].xxxx
> 73: MAD TEMP[11].xy, TEMP[11].xwww, IMM[0].yyyy, IMM[0].zzzz
> 74: MAD TEMP[10].xy, TEMP[11].xyyy, TEMP[3].wwww, TEMP[10].xyyy
> 75: MOV TEMP[10].z, TEMP[12].xxxx
> 76: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 77: RSQ TEMP[11].x, TEMP[11].xxxx
> 78: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 79: MOV TEMP[3].xyz, TEMP[10].xyzx
> 80: MUL TEMP[3].xyz, IN[5].xyzz, TEMP[10].xxxx
> 81: MAD TEMP[3].xyz, TEMP[0].xyzz, TEMP[10].yyyy, TEMP[3].xyzz
> 82: MAD TEMP[3].xyz, TEMP[2].xyzz, TEMP[10].zzzz, TEMP[3].xyzz
> 83: DP3 TEMP[10].x, TEMP[3].xyzz, TEMP[1].xyzz
> 84: MUL TEMP[10].xyz, TEMP[10].xxxx, TEMP[3].xyzz
> 85: MAD TEMP[10].xyz, IMM[0].yyyy, TEMP[10].xyzz, -TEMP[1].xyzz
> 86: MOV TEMP[11].xy, IN[2].zwww
> 87: TEX TEMP[11], TEMP[11], SAMP[8], 2D
> 88: MOV TEMP[12], TEMP[11]
> 89: ADD TEMP[12].xyz, TEMP[11].zyyy, IMM[1].xxxx
> 90: MUL TEMP[12].xyz, TEMP[12].xyzz, IMM[0].yyyy
> 91: MUL TEMP[13].x, TEMP[11].wwww, IMM[0].yyyy
> 92: MOV TEMP[12].w, TEMP[13].xxxx
> 93: DP2 TEMP[14].x, TEMP[12].xyyy, TEMP[12].xyyy
> 94: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 95: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[14].xxxx
> 96: SQRT TEMP[14].x, TEMP[14].xxxx
> 97: MUL TEMP[15].xyz, IN[5].xyzz, TEMP[12].xxxx
> 98: MAD TEMP[15].xyz, TEMP[0].xyzz, TEMP[12].yyyy, TEMP[15].xyzz
> 99: MAD TEMP[14].xyz, TEMP[2].xyzz, TEMP[14].xxxx, TEMP[15].xyzz
>100: MOV TEMP[12].xyz, TEMP[14].xyzx
>101: DP3 TEMP[15].x, TEMP[10].xyzz, TEMP[14].xyzz
>102: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>103: ADD TEMP[15].x, TEMP[13].xxxx, -TEMP[15].xxxx
>104: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>105: POW TEMP[15].x, TEMP[15].xxxx, IMM[1].yyyy
>106: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>107: MUL TEMP[16].x, IMM[1].zzzz, TEMP[6].xxxx
>108: ADD TEMP[16].x, TEMP[15].xxxx, -TEMP[16].xxxx
>109: LRP TEMP[17].x, TEMP[6].xxxx, IMM[1].wwww, IMM[0].xxxx
>110: MUL TEMP[16].x, TEMP[16].xxxx, TEMP[17].xxxx
>111: MOV_SAT TEMP[16].x, TEMP[16].xxxx
>112: MUL TEMP[15].x, TEMP[15].xxxx, TEMP[16].xxxx
>113: MUL TEMP[13].x, TEMP[13].xxxx, IMM[2].xxxx
>114: MOV TEMP[12].w, TEMP[13].xxxx
>115: MUL TEMP[0].x, TEMP[11].xxxx, TEMP[7].xxxx
>116: DP3 TEMP[10].x, -TEMP[10].xyzz, TEMP[2].xyzz
>117: ADD TEMP[10].x, TEMP[10].xxxx, IMM[0].xxxx
>118: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[2].xyzz
>119: ADD TEMP[11].x, IMM[0].xxxx, -TEMP[11].xxxx
>120: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>121: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[11].xxxx
>122: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>123: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[10].xxxx
>124: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>125: MUL TEMP[10].x, TEMP[15].xxxx, TEMP[10].xxxx
>126: MOV TEMP[0].y, TEMP[10].xxxx
>127: MOV TEMP[11].w, IMM[0].xxxx
>128: MAD TEMP[11].xyz, IMM[2].yyyy, TEMP[2].xyzz, IN[0].xyzz
>129: MUL TEMP[2], CONST[4], TEMP[11].xxxx
>130: MAD TEMP[2], CONST[5], TEMP[11].yyyy, TEMP[2]
>131: MAD TEMP[2], CONST[6], TEMP[11].zzzz, TEMP[2]
>132: ADD TEMP[2], TEMP[2], CONST[7]
>133: MAD TEMP[11].x, IMM[2].zzzz, TEMP[6].xxxx, IMM[0].yyyy
>134: EX2 TEMP[11].x, TEMP[11].xxxx
>135: MOV TEMP[15].xyz, -CONST[1].xyzx
>136: ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[1].xyzz
>137: MUL TEMP[16].xyz, TEMP[16].xyzz, IMM[2].wwww
>138: DP3 TEMP[17].x, TEMP[16].xyzz, TEMP[16].xyzz
>139: RSQ TEMP[17].x, TEMP[17].xxxx
>140: MUL TEMP[16].xyz, TEMP[16].xyzz, TEMP[17].xxxx
>141: DP3 TEMP[17].x, TEMP[15].xyzz, TEMP[3].xyzz
>142: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>143: MOV TEMP[18].xy, TEMP[2].xyyy
>144: MOV TEMP[18].w, IMM[0].xxxx
>145: MOV TEMP[18].z, TEMP[2].zzzz
>146: TXP TEMP[2], TEMP[18], SAMP[0], SHADOW2D
>147: MOV TEMP[18].x, TEMP[2].xxxx
>148: DP3 TEMP[18].x, TEMP[15].xyzz, TEMP[14].xyzz
>149: MOV_SAT TEMP[18].x, TEMP[18].xxxx
>150: ADD TEMP[13].x, TEMP[13].xxxx, -TEMP[18].xxxx
>151: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>152: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>153: MUL TEMP[2].xyz, CONST[3].xyzz, TEMP[2].xxxx
>154: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[13].xxxx
>155: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>156: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>157: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[7].xxxx
>158: MUL TEMP[2].xyz, TEMP[17].xxxx, TEMP[2].xyzz
>159: MOV TEMP[7].xyz, TEMP[3].xyzz
>160: TEX TEMP[7], TEMP[7], SAMP[1], CUBE
>161: MOV TEMP[13], TEMP[7]
>162: DP3 TEMP[13].x, TEMP[3].xyzz, TEMP[1].xyzz
>163: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[3].xyzz
>164: MAD TEMP[13].xyz, IMM[0].yyyy, TEMP[13].xyzz, -TEMP[1].xyzz
>165: ADD TEMP[18].x, IMM[0].xxxx, -TEMP[6].xxxx
>166: MUL TEMP[18].x, TEMP[18].xxxx, IMM[3].xxxx
>167: MOV TEMP[13].w, TEMP[18].xxxx
>168: DP3 TEMP[19].x, TEMP[1].xyzz, TEMP[3].xyzz
>169: MOV_SAT TEMP[19].x, TEMP[19].xxxx
>170: ADD TEMP[19].x, IMM[0].xxxx, -TEMP[19].xxxx
>171: POW TEMP[19].x, TEMP[19].xxxx, IMM[3].yyyy
>172: MAX TEMP[6].xyz, TEMP[6].xxxx, TEMP[9].xyzz
>173: ADD TEMP[6].xyz, TEMP[6].xyzz, -TEMP[9].xyzz
>174: MAD TEMP[6].xyz, TEMP[19].xxxx, TEMP[6].xyzz, TEMP[9].xyzz
>175: MOV TEMP[13].xyz, TEMP[13].xyzz
>176: MOV TEMP[13].w, TEMP[18].xxxx
>177: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
>178: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[13].xyzz
>179: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>180: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>181: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>182: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[7].wwww
>183: MUL TEMP[7].xyz, TEMP[7].xyzz, IMM[3].wwww
>184: MUL TEMP[7].xyz, TEMP[13].xxxx, TEMP[7].xyzz
>185: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>186: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>187: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>188: MUL TEMP[13].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>189: MAD TEMP[7].xyz, TEMP[7].xyzz, TEMP[0].xxxx, TEMP[13].xyzz
>190: DP3 TEMP[13].x, TEMP[15].xyzz, TEMP[16].xyzz
>191: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>192: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>193: POW TEMP[13].x, TEMP[13].xxxx, IMM[3].yyyy
>194: ADD TEMP[15].xyz, IMM[0].xxxx, -TEMP[9].xyzz
>195: MAD TEMP[9].xyz, TEMP[13].xxxx, TEMP[15].xyzz, TEMP[9].xyzz
>196: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xyzz
>197: ADD TEMP[9].x, TEMP[11].xxxx, IMM[0].yyyy
>198: MUL TEMP[9].x, TEMP[9].xxxx, IMM[4].xxxx
>199: MUL TEMP[13].x, -TEMP[11].xxxx, IMM[2].wwww
>200: EX2 TEMP[13].x, TEMP[13].xxxx
>201: ADD TEMP[13].x, IMM[0].yyyy, -TEMP[13].xxxx
>202: RCP TEMP[13].x, TEMP[13].xxxx
>203: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[13].xxxx
>204: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>205: DP3 TEMP[9].x, TEMP[3].xyzz, TEMP[16].xyzz
>206: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>207: POW TEMP[9].x, TEMP[9].xxxx, TEMP[11].xxxx
>208: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>209: DP3 TEMP[9].x, TEMP[1].xyzz, TEMP[3].xyzz
>210: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>211: MAX TEMP[9].x, TEMP[17].xxxx, TEMP[9].xxxx
>212: ADD TEMP[9].x, TEMP[9].xxxx, IMM[4].yyyy
>213: RCP TEMP[9].x, TEMP[9].xxxx
>214: MAD TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx, TEMP[6].xyzz
>215: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[10].xxxx
>216: MOV TEMP[9].x, IMM[5].xxxx
>217: BGNLOOP :0
>218:   ISGE TEMP[10].x, TEMP[9].xxxx, IMM[5].yyyy
>219:   UIF TEMP[10].xxxx :0
>220:     BRK
>221:   ENDIF
>222:   UMUL TEMP[13].x, TEMP[9].xxxx, IMM[5].zzzz
>223:   UARL ADDR[0].x, TEMP[13].xxxx
>224:   UARL ADDR[0].x, TEMP[13].xxxx
>225:   ADD TEMP[15].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>226:   DP3 TEMP[16].x, TEMP[15].xyzz, TEMP[15].xyzz
>227:   RSQ TEMP[17].x, TEMP[16].xxxx
>228:   MUL TEMP[18].xyz, TEMP[15].xyzz, TEMP[17].xxxx
>229:   ADD TEMP[19].xyz, TEMP[18].xyzz, TEMP[1].xyzz
>230:   MUL TEMP[20].xyz, TEMP[19].xyzz, IMM[2].wwww
>231:   DP3 TEMP[21].x, TEMP[20].xyzz, TEMP[20].xyzz
>232:   RSQ TEMP[22].x, TEMP[21].xxxx
>233:   MUL TEMP[23].xyz, TEMP[20].xyzz, TEMP[22].xxxx
>234:   DP3 TEMP[24].x, TEMP[18].xyzz, TEMP[3].xyzz
>235:   MOV_SAT TEMP[25].x, TEMP[24].xxxx
>236:   DP3 TEMP[26].x, TEMP[18].xyzz, TEMP[14].xyzz
>237:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>238:   ADD TEMP[28].x, TEMP[12].wwww, -TEMP[27].xxxx
>239:   MOV_SAT TEMP[29].x, TEMP[28].xxxx
>240:   MUL TEMP[30].x, TEMP[29].xxxx, TEMP[29].xxxx
>241:   UMAD TEMP[31].x, TEMP[9].xxxx, IMM[5].zzzz, IMM[5].wwww
>242:   MUL TEMP[32].x, TEMP[16].xxxx, TEMP[17].xxxx
>243:   UMUL TEMP[33].x, TEMP[9].xxxx, IMM[5].zzzz
>244:   UARL ADDR[0].x, TEMP[33].xxxx
>245:   MUL TEMP[34].x, TEMP[32].xxxx, CONST[ADDR[0].x+11].wwww
>246:   MOV_SAT TEMP[35].x, TEMP[34].xxxx
>247:   ADD TEMP[36].x, IMM[0].xxxx, -TEMP[35].xxxx
>248:   UARL ADDR[0].x, TEMP[31].xxxx
>249:   MUL TEMP[37].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[36].xxxx
>250:   MUL TEMP[38].x, TEMP[30].xxxx, TEMP[30].xxxx
>251:   MOV_SAT TEMP[39].x, TEMP[38].xxxx
>252:   LRP TEMP[40].x, TEMP[17].xxxx, IMM[0].xxxx, TEMP[39].xxxx
>253:   MUL TEMP[41].xyz, TEMP[37].xyzz, TEMP[40].xxxx
>254:   MUL TEMP[42].xyz, TEMP[41].xyzz, TEMP[8].xxxx
>255:   MUL TEMP[43].xyz, TEMP[25].xxxx, TEMP[42].xyzz
>256:   DP3 TEMP[44].x, TEMP[5].xyzz, IMM[3].zzzz
>257:   ADD TEMP[45].x, IMM[0].xxxx, -TEMP[44].xxxx
>258:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>259:   MAD TEMP[7].xyz, TEMP[43].xyzz, TEMP[46].xxxx, TEMP[7].xyzz
>260:   DP3 TEMP[47].x, TEMP[18].xyzz, TEMP[23].xyzz
>261:   MOV_SAT TEMP[48].x, TEMP[47].xxxx
>262:   ADD TEMP[49].x, IMM[0].xxxx, -TEMP[48].xxxx
>263:   POW TEMP[50].x, TEMP[49].xxxx, IMM[3].yyyy
>264:   ADD TEMP[51].xyz, IMM[0].xxxx, -TEMP[5].xyzz
>265:   MAD TEMP[52].xyz, TEMP[50].xxxx, TEMP[51].xyzz, TEMP[5].xyzz
>266:   MUL TEMP[53].xyz, TEMP[43].xyzz, TEMP[52].xyzz
>267:   ADD TEMP[54].x, TEMP[11].xxxx, IMM[0].yyyy
>268:   MUL TEMP[55].x, TEMP[54].xxxx, IMM[4].xxxx
>269:   MUL TEMP[56].x, -TEMP[11].xxxx, IMM[2].wwww
>270:   EX2 TEMP[57].x, TEMP[56].xxxx
>271:   ADD TEMP[58].x, IMM[0].yyyy, -TEMP[57].xxxx
>272:   RCP TEMP[59].x, TEMP[58].xxxx
>273:   MUL TEMP[60].x, TEMP[55].xxxx, TEMP[59].xxxx
>274:   MUL TEMP[61].xyz, TEMP[53].xyzz, TEMP[60].xxxx
>275:   DP3 TEMP[62].x, TEMP[3].xyzz, TEMP[23].xyzz
>276:   MOV_SAT TEMP[63].x, TEMP[62].xxxx
>277:   POW TEMP[64].x, TEMP[63].xxxx, TEMP[11].xxxx
>278:   MUL TEMP[65].xyz, TEMP[61].xyzz, TEMP[64].xxxx
>279:   DP3 TEMP[66].x, TEMP[1].xyzz, TEMP[3].xyzz
>280:   MOV_SAT TEMP[67].x, TEMP[66].xxxx
>281:   MAX TEMP[68].x, TEMP[25].xxxx, TEMP[67].xxxx
>282:   ADD TEMP[69].x, TEMP[68].xxxx, IMM[4].yyyy
>283:   RCP TEMP[70].x, TEMP[69].xxxx
>284:   MUL TEMP[71].xyz, TEMP[65].xyzz, TEMP[70].xxxx
>285:   MAD TEMP[2].xyz, TEMP[71].xyzz, TEMP[0].yyyy, TEMP[2].xyzz
>286:   UADD TEMP[9].x, TEMP[9].xxxx, IMM[5].wwww
>287: ENDLOOP :0
>288: MOV TEMP[1].x, CONST[17].wwww
>289: MOV TEMP[1].y, CONST[18].wwww
>290: MOV TEMP[1].z, CONST[19].wwww
>291: ADD TEMP[1].xyz, TEMP[1].xyzz, -IN[0].xyzz
>292: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>293: SQRT TEMP[2].x, TEMP[2].xxxx
>294: RCP TEMP[9].x, TEMP[2].xxxx
>295: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>296: MOV TEMP[9].yz, IMM[4].zzzz
>297: MAD TEMP[9].x, TEMP[2].xxxx, CONST[20].zzzz, CONST[20].wwww
>298: MOV TEMP[2].yz, IMM[4].zzzz
>299: MOV TEMP[2].x, IN[1].zzzz
>300: MOV TEMP[10].yz, IMM[4].zzzz
>301: MOV TEMP[11].xy, IN[1].xyyy
>302: MOV TEMP[11].w, IN[1].wwww
>303: TXP TEMP[11].w, TEMP[11], SAMP[3], 2D
>304: MUL TEMP[10].x, TEMP[11].wwww, TEMP[11].wwww
>305: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[14].xyzz
>306: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>307: ADD TEMP[11].x, TEMP[12].wwww, -TEMP[11].xxxx
>308: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>309: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[3].xyzz
>310: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>311: ADD TEMP[3].xyz, TEMP[9].xyzz, IMM[1].xxxx
>312: MUL TEMP[3].xyz, TEMP[3].xyzz, IMM[0].yyyy
>313: ADD TEMP[3].xyz, IMM[0].xxxx, -TEMP[3].xyzz
>314: MOV_SAT TEMP[3].xyz, TEMP[3].xyzz
>315: MUL TEMP[3].xyz, TEMP[10].xyzz, TEMP[3].xyzz
>316: MOV_SAT TEMP[2].xyz, TEMP[2].xyzz
>317: MUL TEMP[2].x, TEMP[3].xyzz, TEMP[2].xyzz
>318: MUL TEMP[2].xyz, CONST[21].xyzz, TEMP[2].xxxx
>319: MUL TEMP[3].x, TEMP[11].xxxx, TEMP[11].xxxx
>320: MOV_SAT TEMP[3].x, TEMP[3].xxxx
>321: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[8].xxxx
>322: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>323: MUL TEMP[1].xyz, TEMP[1].xxxx, TEMP[2].xyzz
>324: DP3 TEMP[2].x, TEMP[5].xyzz, IMM[3].zzzz
>325: ADD TEMP[2].x, IMM[0].xxxx, -TEMP[2].xxxx
>326: MOV_SAT TEMP[2].x, TEMP[2].xxxx
>327: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx, TEMP[7].xyzz
>328: MUL TEMP[0].xyz, TEMP[6].xyzz, TEMP[0].yyyy
>329: MOV TEMP[2].xy, IN[2].xyyy
>330: TEX TEMP[2], TEMP[2], SAMP[10], 2D
>331: MOV TEMP[3].w, TEMP[2].wwww
>332: DP3 TEMP[5].x, TEMP[2].xyzz, IMM[6].xyzz
>333: MUL TEMP[5].x, TEMP[5].xxxx, CONST[43].xxxx
>334: MUL TEMP[3].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>335: MUL TEMP[2].xyz, TEMP[3], IMM[4].wwww
>336: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[4].xyzz, TEMP[0].xyzz
>337: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>338: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>339: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].zzzz
>340: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>341: ADD TEMP[2].x, TEMP[2].xxxx, IMM[6].wwww
>342: RCP TEMP[2].x, TEMP[2].xxxx
>343: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>344: FRC TEMP[2].x, CONST[1].wwww
>345: MUL TEMP[2].x, TEMP[2].xxxx, IMM[7].xxxx
>346: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>347: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>348: MUL TEMP[1].x, IN[3].xxxx, TEMP[1].xxxx
>349: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>350: MOV TEMP[0].w, IN[0].wwww
>351: MOV OUT[0], TEMP[0]
>352: END
>radeonsi: Compiling shader 117
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 5, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 6, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 6, i32 %6, <2 x i32> %9)
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 0)
>  %29 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = call float @llvm.SI.load.const(<16 x i8> %27, i32 4)
>  %32 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 8)
>  %37 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %38 = fsub float %36, %37
>  %39 = fmul float %30, %30
>  %40 = fmul float %33, %33
>  %41 = fadd float %40, %39
>  %42 = fmul float %38, %38
>  %43 = fadd float %41, %42
>  %44 = call float @llvm.sqrt.f32(float %43)
>  %45 = fdiv float 1.000000e+00, %44, !fpmath !1
>  %46 = fmul float %30, %45
>  %47 = fmul float %33, %45
>  %48 = fmul float %38, %45
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %55 = fmul float %49, %52
>  %56 = fmul float %50, %53
>  %57 = fadd float %56, %55
>  %58 = fmul float %51, %54
>  %59 = fadd float %57, %58
>  %60 = call float @llvm.sqrt.f32(float %59)
>  %61 = fdiv float 1.000000e+00, %60, !fpmath !1
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %63 = fmul float %62, %61
>  %64 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %65 = fmul float %64, %61
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %67 = fmul float %66, %61
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %70 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %71 = load <8 x i32>, <8 x i32> addrspace(2)* %70, align 32, !invariant.load !0
>  %72 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %73 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %72, i64 0, i64 19, !amdgpu.uniform !0
>  %74 = load <4 x i32>, <4 x i32> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = extractelement <8 x i32> %71, i32 7
>  %76 = extractelement <4 x i32> %74, i32 0
>  %77 = and i32 %76, %75
>  %78 = insertelement <4 x i32> %74, i32 %77, i32 0
>  %79 = bitcast float %68 to i32
>  %80 = bitcast float %69 to i32
>  %81 = insertelement <2 x i32> undef, i32 %79, i32 0
>  %82 = insertelement <2 x i32> %81, i32 %80, i32 1
>  %83 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %82, <8 x i32> %71, <4 x i32> %78, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %84 = extractelement <4 x float> %83, i32 0
>  %85 = extractelement <4 x float> %83, i32 1
>  %86 = extractelement <4 x float> %83, i32 2
>  %87 = extractelement <4 x float> %83, i32 3
>  %88 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %89 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %90 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 18, !amdgpu.uniform !0
>  %91 = load <8 x i32>, <8 x i32> addrspace(2)* %90, align 32, !invariant.load !0
>  %92 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %93 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %92, i64 0, i64 39, !amdgpu.uniform !0
>  %94 = load <4 x i32>, <4 x i32> addrspace(2)* %93, align 16, !invariant.load !0
>  %95 = extractelement <8 x i32> %91, i32 7
>  %96 = extractelement <4 x i32> %94, i32 0
>  %97 = and i32 %96, %95
>  %98 = insertelement <4 x i32> %94, i32 %97, i32 0
>  %99 = bitcast float %88 to i32
>  %100 = bitcast float %89 to i32
>  %101 = insertelement <2 x i32> undef, i32 %99, i32 0
>  %102 = insertelement <2 x i32> %101, i32 %100, i32 1
>  %103 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %102, <8 x i32> %91, <4 x i32> %98, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 496)
>  %110 = fmul float %109, %104
>  %111 = call float @llvm.SI.load.const(<16 x i8> %108, i32 500)
>  %112 = fmul float %111, %104
>  %113 = call float @llvm.SI.load.const(<16 x i8> %108, i32 504)
>  %114 = fmul float %113, %104
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = call float @llvm.SI.load.const(<16 x i8> %116, i32 508)
>  %118 = fmul float %117, %104
>  %119 = call float @llvm.SI.load.const(<16 x i8> %116, i32 544)
>  %120 = fmul float %119, %105
>  %121 = fadd float %120, %110
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = call float @llvm.SI.load.const(<16 x i8> %123, i32 548)
>  %125 = fmul float %124, %105
>  %126 = fadd float %125, %112
>  %127 = call float @llvm.SI.load.const(<16 x i8> %123, i32 552)
>  %128 = fmul float %127, %105
>  %129 = fadd float %128, %114
>  %130 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %131 = load <16 x i8>, <16 x i8> addrspace(2)* %130, align 16, !invariant.load !0
>  %132 = call float @llvm.SI.load.const(<16 x i8> %131, i32 556)
>  %133 = fmul float %132, %105
>  %134 = fadd float %133, %118
>  %135 = call float @llvm.SI.load.const(<16 x i8> %131, i32 592)
>  %136 = fmul float %135, %106
>  %137 = fadd float %136, %121
>  %138 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %139 = load <16 x i8>, <16 x i8> addrspace(2)* %138, align 16, !invariant.load !0
>  %140 = call float @llvm.SI.load.const(<16 x i8> %139, i32 596)
>  %141 = fmul float %140, %106
>  %142 = fadd float %141, %126
>  %143 = call float @llvm.SI.load.const(<16 x i8> %139, i32 600)
>  %144 = fmul float %143, %106
>  %145 = fadd float %144, %129
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = call float @llvm.SI.load.const(<16 x i8> %147, i32 604)
>  %149 = fmul float %148, %106
>  %150 = fadd float %149, %134
>  %151 = call float @llvm.SI.load.const(<16 x i8> %147, i32 528)
>  %152 = fmul float %151, %104
>  %153 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %154 = load <16 x i8>, <16 x i8> addrspace(2)* %153, align 16, !invariant.load !0
>  %155 = call float @llvm.SI.load.const(<16 x i8> %154, i32 532)
>  %156 = fmul float %155, %104
>  %157 = call float @llvm.SI.load.const(<16 x i8> %154, i32 536)
>  %158 = fmul float %157, %104
>  %159 = call float @llvm.SI.load.const(<16 x i8> %154, i32 540)
>  %160 = fmul float %159, %104
>  %161 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %162 = load <16 x i8>, <16 x i8> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = call float @llvm.SI.load.const(<16 x i8> %162, i32 576)
>  %164 = fmul float %163, %105
>  %165 = fadd float %164, %152
>  %166 = call float @llvm.SI.load.const(<16 x i8> %162, i32 580)
>  %167 = fmul float %166, %105
>  %168 = fadd float %167, %156
>  %169 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %170 = load <16 x i8>, <16 x i8> addrspace(2)* %169, align 16, !invariant.load !0
>  %171 = call float @llvm.SI.load.const(<16 x i8> %170, i32 584)
>  %172 = fmul float %171, %105
>  %173 = fadd float %172, %158
>  %174 = call float @llvm.SI.load.const(<16 x i8> %170, i32 588)
>  %175 = fmul float %174, %105
>  %176 = fadd float %175, %160
>  %177 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %178 = load <16 x i8>, <16 x i8> addrspace(2)* %177, align 16, !invariant.load !0
>  %179 = call float @llvm.SI.load.const(<16 x i8> %178, i32 624)
>  %180 = fmul float %179, %106
>  %181 = fadd float %180, %165
>  %182 = call float @llvm.SI.load.const(<16 x i8> %178, i32 628)
>  %183 = fmul float %182, %106
>  %184 = fadd float %183, %168
>  %185 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %186 = load <16 x i8>, <16 x i8> addrspace(2)* %185, align 16, !invariant.load !0
>  %187 = call float @llvm.SI.load.const(<16 x i8> %186, i32 632)
>  %188 = fmul float %187, %106
>  %189 = fadd float %188, %173
>  %190 = call float @llvm.SI.load.const(<16 x i8> %186, i32 636)
>  %191 = fmul float %190, %106
>  %192 = fadd float %191, %176
>  %193 = fadd float %105, %104
>  %194 = fadd float %193, %106
>  %195 = call float @llvm.AMDGPU.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %196 = fsub float 1.000000e+00, %195
>  %197 = fadd float %189, %196
>  %198 = fadd float %192, %196
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 512)
>  %202 = fmul float %201, %104
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 516)
>  %204 = fmul float %203, %104
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 520)
>  %206 = fmul float %205, %104
>  %207 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %208 = load <16 x i8>, <16 x i8> addrspace(2)* %207, align 16, !invariant.load !0
>  %209 = call float @llvm.SI.load.const(<16 x i8> %208, i32 560)
>  %210 = fmul float %209, %105
>  %211 = fadd float %210, %202
>  %212 = call float @llvm.SI.load.const(<16 x i8> %208, i32 564)
>  %213 = fmul float %212, %105
>  %214 = fadd float %213, %204
>  %215 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %216 = load <16 x i8>, <16 x i8> addrspace(2)* %215, align 16, !invariant.load !0
>  %217 = call float @llvm.SI.load.const(<16 x i8> %216, i32 568)
>  %218 = fmul float %217, %105
>  %219 = fadd float %218, %206
>  %220 = call float @llvm.SI.load.const(<16 x i8> %216, i32 608)
>  %221 = fmul float %220, %106
>  %222 = fadd float %221, %211
>  %223 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %224 = load <16 x i8>, <16 x i8> addrspace(2)* %223, align 16, !invariant.load !0
>  %225 = call float @llvm.SI.load.const(<16 x i8> %224, i32 612)
>  %226 = fmul float %225, %106
>  %227 = fadd float %226, %214
>  %228 = call float @llvm.SI.load.const(<16 x i8> %224, i32 616)
>  %229 = fmul float %228, %106
>  %230 = fadd float %229, %219
>  %231 = fsub float 1.000000e+00, %195
>  %232 = fmul float %222, %195
>  %233 = fmul float %84, %231
>  %234 = fadd float %232, %233
>  %235 = fsub float 1.000000e+00, %195
>  %236 = fmul float %227, %195
>  %237 = fmul float %85, %235
>  %238 = fadd float %236, %237
>  %239 = fsub float 1.000000e+00, %195
>  %240 = fmul float %230, %195
>  %241 = fmul float %86, %239
>  %242 = fadd float %240, %241
>  %243 = fmul float %137, %184
>  %244 = fmul float %142, %184
>  %245 = fmul float %145, %184
>  %246 = fdiv float 1.000000e+00, %198, !fpmath !1
>  %247 = call float @llvm.pow.f32(float %243, float %246)
>  %248 = call float @llvm.pow.f32(float %244, float %246)
>  %249 = call float @llvm.pow.f32(float %245, float %246)
>  %250 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = call float @llvm.SI.load.const(<16 x i8> %252, i32 480)
>  %254 = fmul float %250, %253
>  %255 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %256 = call float @llvm.SI.load.const(<16 x i8> %252, i32 484)
>  %257 = fmul float %255, %256
>  %258 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %259 = load <16 x i8>, <16 x i8> addrspace(2)* %258, align 16, !invariant.load !0
>  %260 = call float @llvm.SI.load.const(<16 x i8> %259, i32 672)
>  %261 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %262 = fmul float %260, %261
>  %263 = call float @llvm.SI.load.const(<16 x i8> %259, i32 676)
>  %264 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %265 = fmul float %263, %264
>  %266 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %267 = load <16 x i8>, <16 x i8> addrspace(2)* %266, align 16, !invariant.load !0
>  %268 = call float @llvm.SI.load.const(<16 x i8> %267, i32 656)
>  %269 = fmul float %254, %268
>  %270 = call float @llvm.SI.load.const(<16 x i8> %267, i32 656)
>  %271 = fmul float %257, %270
>  %272 = call float @llvm.SI.load.const(<16 x i8> %267, i32 656)
>  %273 = fmul float %262, %272
>  %274 = fadd float %273, %269
>  %275 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %276 = load <16 x i8>, <16 x i8> addrspace(2)* %275, align 16, !invariant.load !0
>  %277 = call float @llvm.SI.load.const(<16 x i8> %276, i32 656)
>  %278 = fmul float %265, %277
>  %279 = fadd float %278, %271
>  %280 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %281 = load <8 x i32>, <8 x i32> addrspace(2)* %280, align 32, !invariant.load !0
>  %282 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %283 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %282, i64 0, i64 27, !amdgpu.uniform !0
>  %284 = load <4 x i32>, <4 x i32> addrspace(2)* %283, align 16, !invariant.load !0
>  %285 = extractelement <8 x i32> %281, i32 7
>  %286 = extractelement <4 x i32> %284, i32 0
>  %287 = and i32 %286, %285
>  %288 = insertelement <4 x i32> %284, i32 %287, i32 0
>  %289 = bitcast float %274 to i32
>  %290 = bitcast float %279 to i32
>  %291 = insertelement <2 x i32> undef, i32 %289, i32 0
>  %292 = insertelement <2 x i32> %291, i32 %290, i32 1
>  %293 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %292, <8 x i32> %281, <4 x i32> %288, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %294 = extractelement <4 x float> %293, i32 0
>  %295 = extractelement <4 x float> %293, i32 1
>  %296 = extractelement <4 x float> %293, i32 3
>  %297 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %298 = load <16 x i8>, <16 x i8> addrspace(2)* %297, align 16, !invariant.load !0
>  %299 = call float @llvm.SI.load.const(<16 x i8> %298, i32 680)
>  %300 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %301 = fmul float %299, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %298, i32 684)
>  %303 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %304 = fmul float %302, %303
>  %305 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %306 = load <16 x i8>, <16 x i8> addrspace(2)* %305, align 16, !invariant.load !0
>  %307 = call float @llvm.SI.load.const(<16 x i8> %306, i32 660)
>  %308 = fmul float %254, %307
>  %309 = call float @llvm.SI.load.const(<16 x i8> %306, i32 660)
>  %310 = fmul float %257, %309
>  %311 = call float @llvm.SI.load.const(<16 x i8> %306, i32 660)
>  %312 = fmul float %301, %311
>  %313 = fadd float %312, %308
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = call float @llvm.SI.load.const(<16 x i8> %315, i32 660)
>  %317 = fmul float %304, %316
>  %318 = fadd float %317, %310
>  %319 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %320 = load <8 x i32>, <8 x i32> addrspace(2)* %319, align 32, !invariant.load !0
>  %321 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %322 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %321, i64 0, i64 27, !amdgpu.uniform !0
>  %323 = load <4 x i32>, <4 x i32> addrspace(2)* %322, align 16, !invariant.load !0
>  %324 = extractelement <8 x i32> %320, i32 7
>  %325 = extractelement <4 x i32> %323, i32 0
>  %326 = and i32 %325, %324
>  %327 = insertelement <4 x i32> %323, i32 %326, i32 0
>  %328 = bitcast float %313 to i32
>  %329 = bitcast float %318 to i32
>  %330 = insertelement <2 x i32> undef, i32 %328, i32 0
>  %331 = insertelement <2 x i32> %330, i32 %329, i32 1
>  %332 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %331, <8 x i32> %320, <4 x i32> %327, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %333 = extractelement <4 x float> %332, i32 2
>  %334 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %335 = load <16 x i8>, <16 x i8> addrspace(2)* %334, align 16, !invariant.load !0
>  %336 = call float @llvm.SI.load.const(<16 x i8> %335, i32 668)
>  %337 = fmul float %333, %336
>  %338 = call float @llvm.SI.load.const(<16 x i8> %335, i32 664)
>  %339 = fmul float %295, %338
>  %340 = fsub float %339, %337
>  %341 = call float @llvm.AMDGPU.clamp.(float %340, float 0.000000e+00, float 1.000000e+00)
>  %342 = fmul float %87, %341
>  %343 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %344 = load <16 x i8>, <16 x i8> addrspace(2)* %343, align 16, !invariant.load !0
>  %345 = call float @llvm.SI.load.const(<16 x i8> %344, i32 640)
>  %346 = fsub float 1.000000e+00, %342
>  %347 = fmul float %345, %342
>  %348 = fmul float %234, %346
>  %349 = fadd float %347, %348
>  %350 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %351 = load <16 x i8>, <16 x i8> addrspace(2)* %350, align 16, !invariant.load !0
>  %352 = call float @llvm.SI.load.const(<16 x i8> %351, i32 644)
>  %353 = fsub float 1.000000e+00, %342
>  %354 = fmul float %352, %342
>  %355 = fmul float %238, %353
>  %356 = fadd float %354, %355
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = call float @llvm.SI.load.const(<16 x i8> %358, i32 648)
>  %360 = fsub float 1.000000e+00, %342
>  %361 = fmul float %359, %342
>  %362 = fmul float %242, %360
>  %363 = fadd float %361, %362
>  %364 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %365 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %366 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %367 = load <8 x i32>, <8 x i32> addrspace(2)* %366, align 32, !invariant.load !0
>  %368 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %369 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %368, i64 0, i64 31, !amdgpu.uniform !0
>  %370 = load <4 x i32>, <4 x i32> addrspace(2)* %369, align 16, !invariant.load !0
>  %371 = extractelement <8 x i32> %367, i32 7
>  %372 = extractelement <4 x i32> %370, i32 0
>  %373 = and i32 %372, %371
>  %374 = insertelement <4 x i32> %370, i32 %373, i32 0
>  %375 = bitcast float %364 to i32
>  %376 = bitcast float %365 to i32
>  %377 = insertelement <2 x i32> undef, i32 %375, i32 0
>  %378 = insertelement <2 x i32> %377, i32 %376, i32 1
>  %379 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %378, <8 x i32> %367, <4 x i32> %374, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %380 = extractelement <4 x float> %379, i32 3
>  %381 = fsub float 1.000000e+00, %181
>  %382 = fmul float %150, %181
>  %383 = fmul float %380, %381
>  %384 = fadd float %382, %383
>  %385 = fdiv float 1.000000e+00, %197, !fpmath !1
>  %386 = call float @llvm.pow.f32(float %384, float %385)
>  %387 = fmul float %87, %341
>  %388 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %389 = load <16 x i8>, <16 x i8> addrspace(2)* %388, align 16, !invariant.load !0
>  %390 = call float @llvm.SI.load.const(<16 x i8> %389, i32 652)
>  %391 = fsub float 1.000000e+00, %387
>  %392 = fmul float %390, %387
>  %393 = fmul float %386, %391
>  %394 = fadd float %392, %393
>  %395 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %396 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %397 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %398 = load <8 x i32>, <8 x i32> addrspace(2)* %397, align 32, !invariant.load !0
>  %399 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %400 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %399, i64 0, i64 23, !amdgpu.uniform !0
>  %401 = load <4 x i32>, <4 x i32> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = extractelement <8 x i32> %398, i32 7
>  %403 = extractelement <4 x i32> %401, i32 0
>  %404 = and i32 %403, %402
>  %405 = insertelement <4 x i32> %401, i32 %404, i32 0
>  %406 = bitcast float %395 to i32
>  %407 = bitcast float %396 to i32
>  %408 = insertelement <2 x i32> undef, i32 %406, i32 0
>  %409 = insertelement <2 x i32> %408, i32 %407, i32 1
>  %410 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %409, <8 x i32> %398, <4 x i32> %405, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %411 = extractelement <4 x float> %410, i32 0
>  %412 = extractelement <4 x float> %410, i32 1
>  %413 = extractelement <4 x float> %410, i32 3
>  %414 = fmul float %413, 2.000000e+00
>  %415 = fadd float %414, -1.000000e+00
>  %416 = fmul float %412, 2.000000e+00
>  %417 = fadd float %416, -1.000000e+00
>  %418 = fmul float %415, %415
>  %419 = fmul float %417, %417
>  %420 = fadd float %418, %419
>  %421 = call float @llvm.AMDGPU.clamp.(float %420, float 0.000000e+00, float 1.000000e+00)
>  %422 = fsub float 0x3FF00418A0000000, %421
>  %423 = call float @llvm.sqrt.f32(float %422)
>  %424 = fmul float %294, 2.000000e+00
>  %425 = fadd float %424, -1.000000e+00
>  %426 = fmul float %296, 2.000000e+00
>  %427 = fadd float %426, -1.000000e+00
>  %428 = fmul float %425, %87
>  %429 = fadd float %428, %415
>  %430 = fmul float %427, %87
>  %431 = fadd float %430, %417
>  %432 = fmul float %429, %429
>  %433 = fmul float %431, %431
>  %434 = fadd float %433, %432
>  %435 = fmul float %423, %423
>  %436 = fadd float %434, %435
>  %437 = call float @llvm.sqrt.f32(float %436)
>  %438 = fdiv float 1.000000e+00, %437, !fpmath !1
>  %439 = fmul float %429, %438
>  %440 = fmul float %431, %438
>  %441 = fmul float %423, %438
>  %442 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %443 = fmul float %442, %439
>  %444 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %445 = fmul float %444, %439
>  %446 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %6, <2 x i32> %9)
>  %447 = fmul float %446, %439
>  %448 = fmul float %23, %440
>  %449 = fadd float %448, %443
>  %450 = fmul float %24, %440
>  %451 = fadd float %450, %445
>  %452 = fmul float %25, %440
>  %453 = fadd float %452, %447
>  %454 = fmul float %63, %441
>  %455 = fadd float %454, %449
>  %456 = fmul float %65, %441
>  %457 = fadd float %456, %451
>  %458 = fmul float %67, %441
>  %459 = fadd float %458, %453
>  %460 = fmul float %455, %46
>  %461 = fmul float %457, %47
>  %462 = fadd float %461, %460
>  %463 = fmul float %459, %48
>  %464 = fadd float %462, %463
>  %465 = fmul float %464, %455
>  %466 = fmul float %464, %457
>  %467 = fmul float %464, %459
>  %468 = fmul float %465, 2.000000e+00
>  %469 = fsub float %468, %46
>  %470 = fmul float %466, 2.000000e+00
>  %471 = fsub float %470, %47
>  %472 = fmul float %467, 2.000000e+00
>  %473 = fsub float %472, %48
>  %474 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %475 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %8)
>  %476 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 16, !amdgpu.uniform !0
>  %477 = load <8 x i32>, <8 x i32> addrspace(2)* %476, align 32, !invariant.load !0
>  %478 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %479 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %478, i64 0, i64 35, !amdgpu.uniform !0
>  %480 = load <4 x i32>, <4 x i32> addrspace(2)* %479, align 16, !invariant.load !0
>  %481 = extractelement <8 x i32> %477, i32 7
>  %482 = extractelement <4 x i32> %480, i32 0
>  %483 = and i32 %482, %481
>  %484 = insertelement <4 x i32> %480, i32 %483, i32 0
>  %485 = bitcast float %474 to i32
>  %486 = bitcast float %475 to i32
>  %487 = insertelement <2 x i32> undef, i32 %485, i32 0
>  %488 = insertelement <2 x i32> %487, i32 %486, i32 1
>  %489 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %488, <8 x i32> %477, <4 x i32> %484, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %490 = extractelement <4 x float> %489, i32 0
>  %491 = extractelement <4 x float> %489, i32 1
>  %492 = extractelement <4 x float> %489, i32 2
>  %493 = extractelement <4 x float> %489, i32 3
>  %494 = fadd float %492, -5.000000e-01
>  %495 = fadd float %491, -5.000000e-01
>  %496 = fmul float %494, 2.000000e+00
>  %497 = fmul float %495, 2.000000e+00
>  %498 = fmul float %493, 2.000000e+00
>  %499 = fmul float %496, %496
>  %500 = fmul float %497, %497
>  %501 = fadd float %499, %500
>  %502 = call float @llvm.AMDGPU.clamp.(float %501, float 0.000000e+00, float 1.000000e+00)
>  %503 = fsub float 1.000000e+00, %502
>  %504 = call float @llvm.sqrt.f32(float %503)
>  %505 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %506 = fmul float %505, %496
>  %507 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %508 = fmul float %507, %496
>  %509 = call float @llvm.SI.fs.interp(i32 2, i32 5, i32 %6, <2 x i32> %9)
>  %510 = fmul float %509, %496
>  %511 = fmul float %23, %497
>  %512 = fadd float %511, %506
>  %513 = fmul float %24, %497
>  %514 = fadd float %513, %508
>  %515 = fmul float %25, %497
>  %516 = fadd float %515, %510
>  %517 = fmul float %63, %504
>  %518 = fadd float %517, %512
>  %519 = fmul float %65, %504
>  %520 = fadd float %519, %514
>  %521 = fmul float %67, %504
>  %522 = fadd float %521, %516
>  %523 = fmul float %469, %518
>  %524 = fmul float %471, %520
>  %525 = fadd float %524, %523
>  %526 = fmul float %473, %522
>  %527 = fadd float %525, %526
>  %528 = call float @llvm.AMDGPU.clamp.(float %527, float 0.000000e+00, float 1.000000e+00)
>  %529 = fsub float %498, %528
>  %530 = call float @llvm.AMDGPU.clamp.(float %529, float 0.000000e+00, float 1.000000e+00)
>  %531 = call float @llvm.pow.f32(float %530, float 3.000000e+00)
>  %532 = call float @llvm.AMDGPU.clamp.(float %531, float 0.000000e+00, float 1.000000e+00)
>  %533 = fmul float %394, 0x3FD3333340000000
>  %534 = fsub float %532, %533
>  %535 = fsub float 1.000000e+00, %394
>  %536 = fmul float %394, 2.000000e+01
>  %537 = fadd float %536, %535
>  %538 = fmul float %534, %537
>  %539 = call float @llvm.AMDGPU.clamp.(float %538, float 0.000000e+00, float 1.000000e+00)
>  %540 = fmul float %532, %539
>  %541 = fmul float %498, 0x3FF19999A0000000
>  %542 = fmul float %490, %411
>  %543 = fmul float %469, %63
>  %544 = fsub float -0.000000e+00, %543
>  %545 = fmul float %471, %65
>  %546 = fsub float %544, %545
>  %547 = fmul float %473, %67
>  %548 = fsub float %546, %547
>  %549 = fadd float %548, 1.000000e+00
>  %550 = fmul float %46, %63
>  %551 = fmul float %47, %65
>  %552 = fadd float %551, %550
>  %553 = fmul float %48, %67
>  %554 = fadd float %552, %553
>  %555 = fsub float 1.000000e+00, %554
>  %556 = call float @llvm.AMDGPU.clamp.(float %555, float 0.000000e+00, float 1.000000e+00)
>  %557 = fsub float %549, %556
>  %558 = call float @llvm.AMDGPU.clamp.(float %557, float 0.000000e+00, float 1.000000e+00)
>  %559 = fsub float 1.000000e+00, %558
>  %560 = fmul float %559, %559
>  %561 = fmul float %540, %560
>  %562 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %563 = fmul float %63, 0x4007700140000000
>  %564 = fadd float %563, %562
>  %565 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %566 = fmul float %65, 0x4007700140000000
>  %567 = fadd float %566, %565
>  %568 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %569 = fmul float %67, 0x4007700140000000
>  %570 = fadd float %569, %568
>  %571 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %572 = load <16 x i8>, <16 x i8> addrspace(2)* %571, align 16, !invariant.load !0
>  %573 = call float @llvm.SI.load.const(<16 x i8> %572, i32 64)
>  %574 = fmul float %573, %564
>  %575 = call float @llvm.SI.load.const(<16 x i8> %572, i32 68)
>  %576 = fmul float %575, %564
>  %577 = call float @llvm.SI.load.const(<16 x i8> %572, i32 72)
>  %578 = fmul float %577, %564
>  %579 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %580 = load <16 x i8>, <16 x i8> addrspace(2)* %579, align 16, !invariant.load !0
>  %581 = call float @llvm.SI.load.const(<16 x i8> %580, i32 80)
>  %582 = fmul float %581, %567
>  %583 = fadd float %582, %574
>  %584 = call float @llvm.SI.load.const(<16 x i8> %580, i32 84)
>  %585 = fmul float %584, %567
>  %586 = fadd float %585, %576
>  %587 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %588 = load <16 x i8>, <16 x i8> addrspace(2)* %587, align 16, !invariant.load !0
>  %589 = call float @llvm.SI.load.const(<16 x i8> %588, i32 88)
>  %590 = fmul float %589, %567
>  %591 = fadd float %590, %578
>  %592 = call float @llvm.SI.load.const(<16 x i8> %588, i32 96)
>  %593 = fmul float %592, %570
>  %594 = fadd float %593, %583
>  %595 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %596 = load <16 x i8>, <16 x i8> addrspace(2)* %595, align 16, !invariant.load !0
>  %597 = call float @llvm.SI.load.const(<16 x i8> %596, i32 100)
>  %598 = fmul float %597, %570
>  %599 = fadd float %598, %586
>  %600 = call float @llvm.SI.load.const(<16 x i8> %596, i32 104)
>  %601 = fmul float %600, %570
>  %602 = fadd float %601, %591
>  %603 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %604 = load <16 x i8>, <16 x i8> addrspace(2)* %603, align 16, !invariant.load !0
>  %605 = call float @llvm.SI.load.const(<16 x i8> %604, i32 112)
>  %606 = fadd float %594, %605
>  %607 = call float @llvm.SI.load.const(<16 x i8> %604, i32 116)
>  %608 = fadd float %599, %607
>  %609 = call float @llvm.SI.load.const(<16 x i8> %604, i32 120)
>  %610 = fadd float %602, %609
>  %611 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %612 = load <16 x i8>, <16 x i8> addrspace(2)* %611, align 16, !invariant.load !0
>  %613 = call float @llvm.SI.load.const(<16 x i8> %612, i32 16)
>  %614 = fsub float -0.000000e+00, %613
>  %615 = call float @llvm.SI.load.const(<16 x i8> %612, i32 20)
>  %616 = fsub float -0.000000e+00, %615
>  %617 = call float @llvm.SI.load.const(<16 x i8> %612, i32 24)
>  %618 = fsub float -0.000000e+00, %617
>  %619 = fmul float %455, %614
>  %620 = fmul float %457, %616
>  %621 = fadd float %620, %619
>  %622 = fmul float %459, %618
>  %623 = fadd float %621, %622
>  %624 = call float @llvm.AMDGPU.clamp.(float %623, float 0.000000e+00, float 1.000000e+00)
>  %625 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %626 = load <8 x i32>, <8 x i32> addrspace(2)* %625, align 32, !invariant.load !0
>  %627 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %628 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %627, i64 0, i64 3, !amdgpu.uniform !0
>  %629 = load <4 x i32>, <4 x i32> addrspace(2)* %628, align 16, !invariant.load !0
>  %630 = extractelement <8 x i32> %626, i32 7
>  %631 = extractelement <4 x i32> %629, i32 0
>  %632 = and i32 %631, %630
>  %633 = insertelement <4 x i32> %629, i32 %632, i32 0
>  %634 = bitcast float %610 to i32
>  %635 = bitcast float %606 to i32
>  %636 = bitcast float %608 to i32
>  %637 = insertelement <4 x i32> undef, i32 %634, i32 0
>  %638 = insertelement <4 x i32> %637, i32 %635, i32 1
>  %639 = insertelement <4 x i32> %638, i32 %636, i32 2
>  %640 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %639, <8 x i32> %626, <4 x i32> %633, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %641 = extractelement <4 x float> %640, i32 0
>  %642 = fmul float %518, %614
>  %643 = fmul float %520, %616
>  %644 = fadd float %643, %642
>  %645 = fmul float %522, %618
>  %646 = fadd float %644, %645
>  %647 = call float @llvm.AMDGPU.clamp.(float %646, float 0.000000e+00, float 1.000000e+00)
>  %648 = fsub float %541, %647
>  %649 = call float @llvm.AMDGPU.clamp.(float %648, float 0.000000e+00, float 1.000000e+00)
>  %650 = fmul float %641, %641
>  %651 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %652 = load <16 x i8>, <16 x i8> addrspace(2)* %651, align 16, !invariant.load !0
>  %653 = call float @llvm.SI.load.const(<16 x i8> %652, i32 48)
>  %654 = fmul float %653, %650
>  %655 = call float @llvm.SI.load.const(<16 x i8> %652, i32 52)
>  %656 = fmul float %655, %650
>  %657 = call float @llvm.SI.load.const(<16 x i8> %652, i32 56)
>  %658 = fmul float %657, %650
>  %659 = fmul float %649, %649
>  %660 = call float @llvm.AMDGPU.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = fmul float %654, %660
>  %662 = fmul float %656, %660
>  %663 = fmul float %658, %660
>  %664 = fmul float %661, %411
>  %665 = fmul float %662, %411
>  %666 = fmul float %663, %411
>  %667 = fmul float %624, %664
>  %668 = fmul float %624, %665
>  %669 = fmul float %624, %666
>  %670 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %671 = load <8 x i32>, <8 x i32> addrspace(2)* %670, align 32, !invariant.load !0
>  %672 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %673 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %672, i64 0, i64 7, !amdgpu.uniform !0
>  %674 = load <4 x i32>, <4 x i32> addrspace(2)* %673, align 16, !invariant.load !0
>  %675 = extractelement <8 x i32> %671, i32 7
>  %676 = extractelement <4 x i32> %674, i32 0
>  %677 = and i32 %676, %675
>  %678 = insertelement <4 x i32> %674, i32 %677, i32 0
>  %679 = call float @llvm.amdgcn.cubetc(float %455, float %457, float %459)
>  %680 = call float @llvm.amdgcn.cubesc(float %455, float %457, float %459)
>  %681 = call float @llvm.amdgcn.cubema(float %455, float %457, float %459)
>  %682 = call float @llvm.amdgcn.cubeid(float %455, float %457, float %459)
>  %683 = call float @llvm.fabs.f32(float %681)
>  %684 = fdiv float 1.000000e+00, %683, !fpmath !1
>  %685 = fmul float %679, %684
>  %686 = fadd float %685, 1.500000e+00
>  %687 = fmul float %680, %684
>  %688 = fadd float %687, 1.500000e+00
>  %689 = bitcast float %688 to i32
>  %690 = bitcast float %686 to i32
>  %691 = bitcast float %682 to i32
>  %692 = insertelement <4 x i32> undef, i32 %689, i32 0
>  %693 = insertelement <4 x i32> %692, i32 %690, i32 1
>  %694 = insertelement <4 x i32> %693, i32 %691, i32 2
>  %695 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %694, <8 x i32> %671, <4 x i32> %678, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %696 = extractelement <4 x float> %695, i32 0
>  %697 = extractelement <4 x float> %695, i32 1
>  %698 = extractelement <4 x float> %695, i32 2
>  %699 = extractelement <4 x float> %695, i32 3
>  %700 = fmul float %455, %46
>  %701 = fmul float %457, %47
>  %702 = fadd float %701, %700
>  %703 = fmul float %459, %48
>  %704 = fadd float %702, %703
>  %705 = fmul float %704, %455
>  %706 = fmul float %704, %457
>  %707 = fmul float %704, %459
>  %708 = fmul float %705, 2.000000e+00
>  %709 = fsub float %708, %46
>  %710 = fmul float %706, 2.000000e+00
>  %711 = fsub float %710, %47
>  %712 = fmul float %707, 2.000000e+00
>  %713 = fsub float %712, %48
>  %714 = fsub float 1.000000e+00, %394
>  %715 = fmul float %714, 6.000000e+00
>  %716 = fmul float %46, %455
>  %717 = fmul float %47, %457
>  %718 = fadd float %717, %716
>  %719 = fmul float %48, %459
>  %720 = fadd float %718, %719
>  %721 = call float @llvm.AMDGPU.clamp.(float %720, float 0.000000e+00, float 1.000000e+00)
>  %722 = fsub float 1.000000e+00, %721
>  %723 = call float @llvm.pow.f32(float %722, float 5.000000e+00)
>  %724 = call float @llvm.maxnum.f32(float %394, float %247)
>  %725 = call float @llvm.maxnum.f32(float %394, float %248)
>  %726 = call float @llvm.maxnum.f32(float %394, float %249)
>  %727 = fsub float %724, %247
>  %728 = fsub float %725, %248
>  %729 = fsub float %726, %249
>  %730 = fmul float %723, %727
>  %731 = fadd float %730, %247
>  %732 = fmul float %723, %728
>  %733 = fadd float %732, %248
>  %734 = fmul float %723, %729
>  %735 = fadd float %734, %249
>  %736 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %737 = load <8 x i32>, <8 x i32> addrspace(2)* %736, align 32, !invariant.load !0
>  %738 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %739 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %738, i64 0, i64 11, !amdgpu.uniform !0
>  %740 = load <4 x i32>, <4 x i32> addrspace(2)* %739, align 16, !invariant.load !0
>  %741 = extractelement <8 x i32> %737, i32 7
>  %742 = extractelement <4 x i32> %740, i32 0
>  %743 = and i32 %742, %741
>  %744 = insertelement <4 x i32> %740, i32 %743, i32 0
>  %745 = call float @llvm.amdgcn.cubetc(float %709, float %711, float %713)
>  %746 = call float @llvm.amdgcn.cubesc(float %709, float %711, float %713)
>  %747 = call float @llvm.amdgcn.cubema(float %709, float %711, float %713)
>  %748 = call float @llvm.amdgcn.cubeid(float %709, float %711, float %713)
>  %749 = call float @llvm.fabs.f32(float %747)
>  %750 = fdiv float 1.000000e+00, %749, !fpmath !1
>  %751 = fmul float %745, %750
>  %752 = fadd float %751, 1.500000e+00
>  %753 = fmul float %746, %750
>  %754 = fadd float %753, 1.500000e+00
>  %755 = bitcast float %754 to i32
>  %756 = bitcast float %752 to i32
>  %757 = bitcast float %748 to i32
>  %758 = bitcast float %715 to i32
>  %759 = insertelement <4 x i32> undef, i32 %755, i32 0
>  %760 = insertelement <4 x i32> %759, i32 %756, i32 1
>  %761 = insertelement <4 x i32> %760, i32 %757, i32 2
>  %762 = insertelement <4 x i32> %761, i32 %758, i32 3
>  %763 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %762, <8 x i32> %737, <4 x i32> %744, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %764 = extractelement <4 x float> %763, i32 0
>  %765 = extractelement <4 x float> %763, i32 1
>  %766 = extractelement <4 x float> %763, i32 2
>  %767 = fmul float %731, %764
>  %768 = fmul float %733, %765
>  %769 = fmul float %735, %766
>  %770 = fmul float %247, 0x3FD55553E0000000
>  %771 = fmul float %248, 0x3FD55553E0000000
>  %772 = fadd float %771, %770
>  %773 = fmul float %249, 0x3FD55553E0000000
>  %774 = fadd float %772, %773
>  %775 = fsub float 1.000000e+00, %774
>  %776 = call float @llvm.AMDGPU.clamp.(float %775, float 0.000000e+00, float 1.000000e+00)
>  %777 = fmul float %696, %699
>  %778 = fmul float %697, %699
>  %779 = fmul float %698, %699
>  %780 = fmul float %777, 4.000000e+00
>  %781 = fmul float %778, 4.000000e+00
>  %782 = fmul float %779, 4.000000e+00
>  %783 = fmul float %776, %780
>  %784 = fmul float %776, %781
>  %785 = fmul float %776, %782
>  %786 = fmul float %247, 0x3FD55553E0000000
>  %787 = fmul float %248, 0x3FD55553E0000000
>  %788 = fadd float %787, %786
>  %789 = fmul float %249, 0x3FD55553E0000000
>  %790 = fadd float %788, %789
>  %791 = fsub float 1.000000e+00, %790
>  %792 = call float @llvm.AMDGPU.clamp.(float %791, float 0.000000e+00, float 1.000000e+00)
>  %793 = fmul float %667, %792
>  %794 = fmul float %668, %792
>  %795 = fmul float %669, %792
>  %796 = fmul float %783, %542
>  %797 = fadd float %796, %793
>  %798 = fmul float %784, %542
>  %799 = fadd float %798, %794
>  %800 = fmul float %785, %542
>  %801 = fadd float %800, %795
>  %802 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %803 = load <16 x i8>, <16 x i8> addrspace(2)* %802, align 16
>  %804 = fmul float %247, 0x3FD55553E0000000
>  %805 = fmul float %248, 0x3FD55553E0000000
>  %806 = fadd float %805, %804
>  %807 = fmul float %249, 0x3FD55553E0000000
>  %808 = fadd float %806, %807
>  %809 = fsub float 1.000000e+00, %808
>  br label %loop217
>
>loop217:                                          ; preds = %endif221, %main_body
>  %810 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %811 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %812 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %813 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %814 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %.011 = phi float [ %801, %main_body ], [ %897, %endif221 ]
>  %.010 = phi float [ %799, %main_body ], [ %895, %endif221 ]
>  %.09 = phi float [ %797, %main_body ], [ %893, %endif221 ]
>  %815 = icmp sgt i32 %810, 2
>  br i1 %815, label %endloop287, label %endif221
>
>endif221:                                         ; preds = %loop217
>  %816 = shl i32 %811, 5
>  %817 = shl i32 %811, 5
>  %818 = add i32 %817, 176
>  %819 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %818)
>  %820 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %821 = fsub float %819, %820
>  %822 = shl i32 %811, 5
>  %823 = add i32 %822, 180
>  %824 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %823)
>  %825 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %826 = fsub float %824, %825
>  %827 = add i32 %816, 184
>  %828 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %827)
>  %829 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %830 = fsub float %828, %829
>  %831 = fmul float %821, %821
>  %832 = fmul float %826, %826
>  %833 = fadd float %832, %831
>  %834 = fmul float %830, %830
>  %835 = fadd float %833, %834
>  %836 = call float @llvm.sqrt.f32(float %835)
>  %837 = fdiv float 1.000000e+00, %836, !fpmath !1
>  %838 = fmul float %821, %837
>  %839 = fmul float %826, %837
>  %840 = fmul float %830, %837
>  %841 = fmul float %838, %455
>  %842 = fmul float %839, %457
>  %843 = fadd float %842, %841
>  %844 = fmul float %840, %459
>  %845 = fadd float %843, %844
>  %846 = call float @llvm.AMDGPU.clamp.(float %845, float 0.000000e+00, float 1.000000e+00)
>  %847 = fmul float %838, %518
>  %848 = fmul float %839, %520
>  %849 = fadd float %848, %847
>  %850 = fmul float %840, %522
>  %851 = fadd float %849, %850
>  %852 = call float @llvm.AMDGPU.clamp.(float %851, float 0.000000e+00, float 1.000000e+00)
>  %853 = fsub float %541, %852
>  %854 = call float @llvm.AMDGPU.clamp.(float %853, float 0.000000e+00, float 1.000000e+00)
>  %855 = fmul float %854, %854
>  %856 = shl i32 %812, 1
>  %857 = or i32 %856, 1
>  %858 = fmul float %835, %837
>  %859 = shl i32 %813, 5
>  %860 = add i32 %859, 188
>  %861 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %860)
>  %862 = fmul float %858, %861
>  %863 = call float @llvm.AMDGPU.clamp.(float %862, float 0.000000e+00, float 1.000000e+00)
>  %864 = fsub float 1.000000e+00, %863
>  %865 = shl i32 %857, 4
>  %866 = add i32 %865, 176
>  %867 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %866)
>  %868 = fmul float %867, %864
>  %869 = shl i32 %857, 4
>  %870 = add i32 %869, 180
>  %871 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %870)
>  %872 = fmul float %871, %864
>  %873 = shl i32 %857, 4
>  %874 = add i32 %873, 184
>  %875 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %874)
>  %876 = fmul float %875, %864
>  %877 = fmul float %855, %855
>  %878 = call float @llvm.AMDGPU.clamp.(float %877, float 0.000000e+00, float 1.000000e+00)
>  %879 = fsub float 1.000000e+00, %837
>  %880 = fmul float %878, %879
>  %881 = fadd float %837, %880
>  %882 = fmul float %868, %881
>  %883 = fmul float %872, %881
>  %884 = fmul float %876, %881
>  %885 = fmul float %882, %411
>  %886 = fmul float %883, %411
>  %887 = fmul float %884, %411
>  %888 = fmul float %846, %885
>  %889 = fmul float %846, %886
>  %890 = fmul float %846, %887
>  %891 = call float @llvm.AMDGPU.clamp.(float %809, float 0.000000e+00, float 1.000000e+00)
>  %892 = fmul float %888, %891
>  %893 = fadd float %892, %.09
>  %894 = fmul float %889, %891
>  %895 = fadd float %894, %.010
>  %896 = fmul float %890, %891
>  %897 = fadd float %896, %.011
>  %898 = add i32 %814, 1
>  br label %loop217
>
>endloop287:                                       ; preds = %loop217
>  %899 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %900 = load <16 x i8>, <16 x i8> addrspace(2)* %899, align 16, !invariant.load !0
>  %901 = call float @llvm.SI.load.const(<16 x i8> %900, i32 284)
>  %902 = call float @llvm.SI.load.const(<16 x i8> %900, i32 300)
>  %903 = call float @llvm.SI.load.const(<16 x i8> %900, i32 316)
>  %904 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %905 = fsub float %901, %904
>  %906 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %907 = fsub float %902, %906
>  %908 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %909 = fsub float %903, %908
>  %910 = fmul float %905, %905
>  %911 = fmul float %907, %907
>  %912 = fadd float %911, %910
>  %913 = fmul float %909, %909
>  %914 = fadd float %912, %913
>  %915 = call float @llvm.sqrt.f32(float %914)
>  %916 = fdiv float 1.000000e+00, %915, !fpmath !1
>  %917 = fmul float %905, %916
>  %918 = fmul float %907, %916
>  %919 = fmul float %909, %916
>  %920 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %921 = load <16 x i8>, <16 x i8> addrspace(2)* %920, align 16, !invariant.load !0
>  %922 = call float @llvm.SI.load.const(<16 x i8> %921, i32 328)
>  %923 = call float @llvm.SI.load.const(<16 x i8> %921, i32 332)
>  %924 = fmul float %915, %922
>  %925 = fadd float %924, %923
>  %926 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %927 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %928 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %929 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %930 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %931 = load <8 x i32>, <8 x i32> addrspace(2)* %930, align 32, !invariant.load !0
>  %932 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %933 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %932, i64 0, i64 15, !amdgpu.uniform !0
>  %934 = load <4 x i32>, <4 x i32> addrspace(2)* %933, align 16, !invariant.load !0
>  %935 = extractelement <8 x i32> %931, i32 7
>  %936 = extractelement <4 x i32> %934, i32 0
>  %937 = and i32 %936, %935
>  %938 = insertelement <4 x i32> %934, i32 %937, i32 0
>  %939 = fdiv float %927, %929, !fpmath !1
>  %940 = fdiv float %928, %929, !fpmath !1
>  %941 = bitcast float %939 to i32
>  %942 = bitcast float %940 to i32
>  %943 = insertelement <2 x i32> undef, i32 %941, i32 0
>  %944 = insertelement <2 x i32> %943, i32 %942, i32 1
>  %945 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %944, <8 x i32> %931, <4 x i32> %938, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %946 = extractelement <4 x float> %945, i32 3
>  %947 = fmul float %946, %946
>  %948 = fmul float %917, %518
>  %949 = fmul float %918, %520
>  %950 = fadd float %949, %948
>  %951 = fmul float %919, %522
>  %952 = fadd float %950, %951
>  %953 = call float @llvm.AMDGPU.clamp.(float %952, float 0.000000e+00, float 1.000000e+00)
>  %954 = fsub float %541, %953
>  %955 = call float @llvm.AMDGPU.clamp.(float %954, float 0.000000e+00, float 1.000000e+00)
>  %956 = fmul float %917, %455
>  %957 = fmul float %918, %457
>  %958 = fadd float %957, %956
>  %959 = fmul float %919, %459
>  %960 = fadd float %958, %959
>  %961 = call float @llvm.AMDGPU.clamp.(float %960, float 0.000000e+00, float 1.000000e+00)
>  %962 = fadd float %925, -5.000000e-01
>  %963 = fmul float %962, 2.000000e+00
>  %964 = fsub float 1.000000e+00, %963
>  %965 = call float @llvm.AMDGPU.clamp.(float %964, float 0.000000e+00, float 1.000000e+00)
>  %966 = fmul float %947, %965
>  %967 = call float @llvm.AMDGPU.clamp.(float %926, float 0.000000e+00, float 1.000000e+00)
>  %968 = fmul float %966, %967
>  %969 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %970 = load <16 x i8>, <16 x i8> addrspace(2)* %969, align 16, !invariant.load !0
>  %971 = call float @llvm.SI.load.const(<16 x i8> %970, i32 336)
>  %972 = fmul float %971, %968
>  %973 = call float @llvm.SI.load.const(<16 x i8> %970, i32 340)
>  %974 = fmul float %973, %968
>  %975 = call float @llvm.SI.load.const(<16 x i8> %970, i32 344)
>  %976 = fmul float %975, %968
>  %977 = fmul float %955, %955
>  %978 = call float @llvm.AMDGPU.clamp.(float %977, float 0.000000e+00, float 1.000000e+00)
>  %979 = fmul float %978, %411
>  %980 = fmul float %972, %979
>  %981 = fmul float %974, %979
>  %982 = fmul float %976, %979
>  %983 = fmul float %961, %980
>  %984 = fmul float %961, %981
>  %985 = fmul float %961, %982
>  %986 = fmul float %247, 0x3FD55553E0000000
>  %987 = fmul float %248, 0x3FD55553E0000000
>  %988 = fadd float %987, %986
>  %989 = fmul float %249, 0x3FD55553E0000000
>  %990 = fadd float %988, %989
>  %991 = fsub float 1.000000e+00, %990
>  %992 = call float @llvm.AMDGPU.clamp.(float %991, float 0.000000e+00, float 1.000000e+00)
>  %993 = fmul float %983, %992
>  %994 = fadd float %993, %.09
>  %995 = fmul float %984, %992
>  %996 = fadd float %995, %.010
>  %997 = fmul float %985, %992
>  %998 = fadd float %997, %.011
>  %999 = fmul float %767, %561
>  %1000 = fmul float %768, %561
>  %1001 = fmul float %769, %561
>  %1002 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %1003 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %1004 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 20, !amdgpu.uniform !0
>  %1005 = load <8 x i32>, <8 x i32> addrspace(2)* %1004, align 32, !invariant.load !0
>  %1006 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %1007 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %1006, i64 0, i64 43, !amdgpu.uniform !0
>  %1008 = load <4 x i32>, <4 x i32> addrspace(2)* %1007, align 16, !invariant.load !0
>  %1009 = extractelement <8 x i32> %1005, i32 7
>  %1010 = extractelement <4 x i32> %1008, i32 0
>  %1011 = and i32 %1010, %1009
>  %1012 = insertelement <4 x i32> %1008, i32 %1011, i32 0
>  %1013 = bitcast float %1002 to i32
>  %1014 = bitcast float %1003 to i32
>  %1015 = insertelement <2 x i32> undef, i32 %1013, i32 0
>  %1016 = insertelement <2 x i32> %1015, i32 %1014, i32 1
>  %1017 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %1016, <8 x i32> %1005, <4 x i32> %1012, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %1018 = extractelement <4 x float> %1017, i32 0
>  %1019 = extractelement <4 x float> %1017, i32 1
>  %1020 = extractelement <4 x float> %1017, i32 2
>  %1021 = fmul float %1018, 0x3FD3333340000000
>  %1022 = fmul float %1019, 0x3FE2E147A0000000
>  %1023 = fadd float %1022, %1021
>  %1024 = fmul float %1020, 0x3FBC28F5C0000000
>  %1025 = fadd float %1023, %1024
>  %1026 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %1027 = load <16 x i8>, <16 x i8> addrspace(2)* %1026, align 16, !invariant.load !0
>  %1028 = call float @llvm.SI.load.const(<16 x i8> %1027, i32 688)
>  %1029 = fmul float %1025, %1028
>  %1030 = fmul float %1018, %1029
>  %1031 = fmul float %1019, %1029
>  %1032 = fmul float %1020, %1029
>  %1033 = fmul float %1030, 3.200000e+01
>  %1034 = fmul float %1031, 3.200000e+01
>  %1035 = fmul float %1032, 3.200000e+01
>  %1036 = fmul float %994, %349
>  %1037 = fadd float %1036, %999
>  %1038 = fmul float %996, %356
>  %1039 = fadd float %1038, %1000
>  %1040 = fmul float %998, %363
>  %1041 = fadd float %1040, %1001
>  %1042 = fadd float %1037, %1033
>  %1043 = fadd float %1039, %1034
>  %1044 = fadd float %1041, %1035
>  %1045 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %1046 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %1047 = load <16 x i8>, <16 x i8> addrspace(2)* %1046, align 16, !invariant.load !0
>  %1048 = call float @llvm.SI.load.const(<16 x i8> %1047, i32 12)
>  %1049 = fsub float %1045, %1048
>  %1050 = call float @llvm.maxnum.f32(float %1049, float 0.000000e+00)
>  %1051 = call float @llvm.SI.load.const(<16 x i8> %1047, i32 28)
>  %1052 = call float @llvm.SI.load.const(<16 x i8> %1047, i32 12)
>  %1053 = fsub float %1051, %1052
>  %1054 = fadd float %1053, 0x3F50624DE0000000
>  %1055 = fdiv float 1.000000e+00, %1054, !fpmath !1
>  %1056 = fmul float %1050, %1055
>  %1057 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %1058 = load <16 x i8>, <16 x i8> addrspace(2)* %1057, align 16, !invariant.load !0
>  %1059 = call float @llvm.SI.load.const(<16 x i8> %1058, i32 28)
>  %1060 = call float @llvm.floor.f32(float %1059)
>  %1061 = fsub float %1059, %1060
>  %1062 = fmul float %1061, 8.000000e+00
>  %1063 = call float @llvm.pow.f32(float %1056, float %1062)
>  %1064 = call float @llvm.AMDGPU.clamp.(float %1063, float 0.000000e+00, float 1.000000e+00)
>  %1065 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %8)
>  %1066 = fmul float %1065, %1064
>  %1067 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %1068 = load <16 x i8>, <16 x i8> addrspace(2)* %1067, align 16, !invariant.load !0
>  %1069 = call float @llvm.SI.load.const(<16 x i8> %1068, i32 32)
>  %1070 = fsub float 1.000000e+00, %1066
>  %1071 = fmul float %1042, %1066
>  %1072 = fmul float %1069, %1070
>  %1073 = fadd float %1071, %1072
>  %1074 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %1075 = load <16 x i8>, <16 x i8> addrspace(2)* %1074, align 16, !invariant.load !0
>  %1076 = call float @llvm.SI.load.const(<16 x i8> %1075, i32 36)
>  %1077 = fsub float 1.000000e+00, %1066
>  %1078 = fmul float %1043, %1066
>  %1079 = fmul float %1076, %1077
>  %1080 = fadd float %1078, %1079
>  %1081 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %1082 = load <16 x i8>, <16 x i8> addrspace(2)* %1081, align 16, !invariant.load !0
>  %1083 = call float @llvm.SI.load.const(<16 x i8> %1082, i32 40)
>  %1084 = fsub float 1.000000e+00, %1066
>  %1085 = fmul float %1044, %1066
>  %1086 = fmul float %1083, %1084
>  %1087 = fadd float %1085, %1086
>  %1088 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %1089 = bitcast float %5 to i32
>  %1090 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %1089, 10
>  %1091 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %1090, float %1073, 11
>  %1092 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %1091, float %1080, 12
>  %1093 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %1092, float %1087, 13
>  %1094 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %1093, float %1088, 14
>  %1095 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %1094, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %1095
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>radeonsi: Compiling shader 118
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %43, float %45, 20
>  %47 = add i32 %16, %12
>  %48 = bitcast i32 %47 to float
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %46, float %48, 21
>  %50 = add i32 %16, %12
>  %51 = bitcast i32 %50 to float
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %49, float %51, 22
>  %53 = add i32 %16, %12
>  %54 = bitcast i32 %53 to float
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %52, float %54, 23
>  %56 = add i32 %16, %12
>  %57 = bitcast i32 %56 to float
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %55, float %57, 24
>  %59 = add i32 %16, %12
>  %60 = bitcast i32 %59 to float
>  %61 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %58, float %60, 25
>  %62 = add i32 %16, %12
>  %63 = bitcast i32 %62 to float
>  %64 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %61, float %63, 26
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float }> %64
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>	v_mov_b32_e32 v10, v4          ; 7E140304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                     ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                   ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                   ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                  ; C08A0B14
>	s_load_dwordx4 s[24:27], s[10:11], 0x18                  ; C08C0B18
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[21:24], v4, s[4:7], 0 idxen    ; E00C2000 80011504
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen  ; E00C2000 80030B05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen    ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	buffer_load_format_xyzw v[14:17], v9, s[20:23], 0 idxen  ; E00C2000 80050E09
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	buffer_load_format_xyzw v[16:19], v10, s[24:27], 0 idxen ; E00C2000 8006100A
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                       ; C0800300
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x10                     ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                     ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                     ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x390                    ; C20380FF 00000390
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v27, s4                                    ; 7E360204
>	v_mov_b32_e32 v26, s5                                    ; 7E340205
>	v_mov_b32_e32 v25, s6                                    ; 7E320206
>	s_cmp_eq_u32 s7, -1                                      ; BF06C107
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                     ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x30                     ; C2020130
>	s_buffer_load_dword s5, s[0:3], 0x31                     ; C2028131
>	s_buffer_load_dword s6, s[0:3], 0x32                     ; C2030132
>	s_buffer_load_dword s7, s[0:3], 0x33                     ; C2038133
>	s_buffer_load_dword s8, s[0:3], 0x34                     ; C2040134
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v0, s4                                     ; 7E000204
>	v_mov_b32_e32 v1, s5                                     ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x35                     ; C2020135
>	s_buffer_load_dword s5, s[0:3], 0x36                     ; C2028136
>	v_mov_b32_e32 v8, s6                                     ; 7E100206
>	v_sub_f32_e32 v28, s7, v27                               ; 08383607
>	v_mov_b32_e32 v7, s8                                     ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x37                     ; C2030137
>	s_buffer_load_dword s7, s[0:3], 0x38                     ; C2038138
>	s_buffer_load_dword s8, s[0:3], 0x39                     ; C2040139
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v9, s4                                     ; 7E120204
>	v_mov_b32_e32 v10, s5                                    ; 7E140205
>	s_buffer_load_dword s4, s[0:3], 0x3a                     ; C202013A
>	s_buffer_load_dword s5, s[0:3], 0x3b                     ; C202813B
>	v_sub_f32_e32 v29, s6, v26                               ; 083A3406
>	v_mov_b32_e32 v18, s7                                    ; 7E240207
>	v_mov_b32_e32 v19, s8                                    ; 7E260208
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v20, s4                                    ; 7E280204
>	v_sub_f32_e32 v30, s5, v25                               ; 083C3205
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                    ; C0820B10
>	s_movk_i32 s15, 0xcc                                     ; B00F00CC
>	s_movk_i32 s14, 0xc0                                     ; B00E00C0
>	s_movk_i32 s12, 0xc4                                     ; B00C00C4
>	s_movk_i32 s13, 0xc8                                     ; B00D00C8
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[35:38], v8, s[4:7], 0 idxen    ; E00C2000 80012308
>	s_buffer_load_dword s4, s[0:3], 0x394                    ; C20200FF 00000394
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                      ; BF06C104
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v35                                ; 7E001123
>	v_mul_lo_i32 v20, v0, 48                                 ; D2D60014 00016100
>	v_add_i32_e32 v9, vcc, s15, v20                          ; 4A12280F
>	v_add_i32_e32 v0, vcc, s14, v20                          ; 4A00280E
>	v_add_i32_e32 v1, vcc, s12, v20                          ; 4A02280C
>	v_add_i32_e32 v8, vcc, s13, v20                          ; 4A10280D
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v0, v0, s[0:3], 0 offen                ; E0301000 80000000
>	buffer_load_dword v1, v1, s[0:3], 0 offen                ; E0301000 80000101
>	buffer_load_dword v8, v8, s[0:3], 0 offen                ; E0301000 80000808
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_subrev_f32_e32 v28, v27, v9                            ; 0A38131B
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                     ; BF850000
>	v_add_i32_e32 v9, vcc, 0xdc, v20                         ; 4A1228FF 000000DC
>	v_add_i32_e32 v29, vcc, 0xec, v20                        ; 4A3A28FF 000000EC
>	v_add_i32_e32 v10, vcc, 0xd4, v20                        ; 4A1428FF 000000D4
>	v_add_i32_e32 v18, vcc, 0xd8, v20                        ; 4A2428FF 000000D8
>	v_add_i32_e32 v7, vcc, 0xd0, v20                         ; 4A0E28FF 000000D0
>	v_add_i32_e32 v19, vcc, 0xe4, v20                        ; 4A2628FF 000000E4
>	buffer_load_dword v30, v9, s[0:3], 0 offen               ; E0301000 80001E09
>	buffer_load_dword v9, v10, s[0:3], 0 offen               ; E0301000 8000090A
>	buffer_load_dword v10, v18, s[0:3], 0 offen              ; E0301000 80000A12
>	v_add_i32_e32 v18, vcc, 0xe0, v20                        ; 4A2428FF 000000E0
>	v_add_i32_e32 v20, vcc, 0xe8, v20                        ; 4A2828FF 000000E8
>	buffer_load_dword v31, v29, s[0:3], 0 offen              ; E0301000 80001F1D
>	buffer_load_dword v7, v7, s[0:3], 0 offen                ; E0301000 80000707
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	s_waitcnt vmcnt(7)                                       ; BF8C0F77
>	v_subrev_f32_e32 v29, v26, v30                           ; 0A3A3D1A
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_subrev_f32_e32 v30, v25, v31                           ; 0A3C3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                     ; C0820B0C
>	s_movk_i32 s10, 0xd0                                     ; B00A00D0
>	s_movk_i32 s9, 0xd4                                      ; B00900D4
>	s_movk_i32 s8, 0xd8                                      ; B00800D8
>	s_movk_i32 s11, 0xdc                                     ; B00B00DC
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[31:34], v7, s[4:7], 0 idxen    ; E00C2000 80011F07
>	v_cvt_i32_f32_e32 v7, v36                                ; 7E0E1124
>	s_movk_i32 s4, 0xec                                      ; B00400EC
>	v_add_i32_e32 v9, vcc, s10, v20                          ; 4A12280A
>	v_add_i32_e32 v10, vcc, s9, v20                          ; 4A142809
>	v_add_i32_e32 v18, vcc, s8, v20                          ; 4A242808
>	v_add_i32_e32 v19, vcc, s4, v20                          ; 4A262804
>	v_mul_lo_i32 v35, v7, 48                                 ; D2D60023 00016107
>	v_add_i32_e32 v7, vcc, s11, v20                          ; 4A0E280B
>	s_movk_i32 s6, 0xe4                                      ; B00600E4
>	s_movk_i32 s7, 0xe0                                      ; B00700E0
>	s_movk_i32 s5, 0xe8                                      ; B00500E8
>	v_add_i32_e32 v30, vcc, s6, v20                          ; 4A3C2806
>	buffer_load_dword v29, v7, s[0:3], 0 offen               ; E0301000 80001D07
>	v_add_i32_e32 v7, vcc, s7, v20                           ; 4A0E2807
>	v_add_i32_e32 v20, vcc, s5, v20                          ; 4A282805
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v10, v10, s[0:3], 0 offen              ; E0301000 80000A0A
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	buffer_load_dword v36, v7, s[0:3], 0 offen               ; E0301000 80002407
>	buffer_load_dword v30, v30, s[0:3], 0 offen              ; E0301000 80001E1E
>	s_waitcnt vmcnt(8)                                       ; BF8C0F78
>	v_mul_f32_e32 v0, v31, v0                                ; 1000011F
>	v_mul_f32_e32 v1, v31, v1                                ; 1002031F
>	v_mul_f32_e32 v8, v31, v8                                ; 1010111F
>	v_mul_f32_e32 v28, v31, v28                              ; 1038391F
>	s_waitcnt vmcnt(6)                                       ; BF8C0F76
>	v_subrev_f32_e32 v39, v25, v19                           ; 0A4E2719
>	s_waitcnt vmcnt(5)                                       ; BF8C0F75
>	v_mul_f32_e32 v7, v31, v9                                ; 100E131F
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_mul_f32_e32 v9, v31, v10                               ; 1012151F
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_mul_f32_e32 v10, v31, v18                              ; 1014251F
>	v_subrev_f32_e32 v18, v26, v29                           ; 0A243B1A
>	v_mul_f32_e32 v29, v31, v18                              ; 103A251F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mul_f32_e32 v19, v31, v30                              ; 10263D1F
>	v_mul_f32_e32 v18, v31, v36                              ; 1024491F
>	v_mul_f32_e32 v20, v31, v20                              ; 1028291F
>	v_mul_f32_e32 v30, v31, v39                              ; 103C4F1F
>	v_add_i32_e32 v31, vcc, s15, v35                         ; 4A3E460F
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v27, v31                           ; 0A3E3F1B
>	v_mac_f32_e32 v28, v32, v31                              ; 3E383F20
>	v_add_i32_e32 v31, vcc, s11, v35                         ; 4A3E460B
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v26, v31                           ; 0A3E3F1A
>	v_mac_f32_e32 v29, v32, v31                              ; 3E3A3F20
>	v_add_i32_e32 v31, vcc, s14, v35                         ; 4A3E460E
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v32, v31                               ; 3E003F20
>	v_add_i32_e32 v31, vcc, s12, v35                         ; 4A3E460C
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_buffer_load_dword s12, s[0:3], 0x398                   ; C20600FF 00000398
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                      ; BF06800C
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v32, v31                               ; 3E023F20
>	v_add_i32_e32 v31, vcc, s13, v35                         ; 4A3E460D
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v31                               ; 3E103F20
>	v_add_i32_e32 v31, vcc, s10, v35                         ; 4A3E460A
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v31                               ; 3E0E3F20
>	v_add_i32_e32 v31, vcc, s9, v35                          ; 4A3E4609
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v31                               ; 3E123F20
>	v_add_i32_e32 v31, vcc, s8, v35                          ; 4A3E4608
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v32, v31                              ; 3E143F20
>	v_add_i32_e32 v31, vcc, s7, v35                          ; 4A3E4607
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v32, v31                              ; 3E243F20
>	v_add_i32_e32 v31, vcc, s6, v35                          ; 4A3E4606
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v32, v31                              ; 3E263F20
>	v_add_i32_e32 v31, vcc, s5, v35                          ; 4A3E4605
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v32, v31                              ; 3E283F20
>	v_add_i32_e32 v31, vcc, s4, v35                          ; 4A3E4604
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	v_mac_f32_e32 v30, v32, v31                              ; 3E3C3F20
>	s_cbranch_scc1 BB0_6                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v37                               ; 7E3E1125
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0xc0, v31                        ; 4A403EFF 000000C0
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v33, v32                               ; 3E004121
>	v_add_i32_e32 v32, vcc, 0xcc, v31                        ; 4A403EFF 000000CC
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v33, v32                              ; 3E384121
>	v_add_i32_e32 v32, vcc, s11, v31                         ; 4A403E0B
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v33, v32                              ; 3E3A4121
>	v_add_i32_e32 v32, vcc, 0xc4, v31                        ; 4A403EFF 000000C4
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v33, v32                               ; 3E024121
>	v_add_i32_e32 v32, vcc, 0xc8, v31                        ; 4A403EFF 000000C8
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v33, v32                               ; 3E104121
>	v_add_i32_e32 v32, vcc, s10, v31                         ; 4A403E0A
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v33, v32                               ; 3E0E4121
>	v_add_i32_e32 v32, vcc, s9, v31                          ; 4A403E09
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v33, v32                               ; 3E124121
>	v_add_i32_e32 v32, vcc, s8, v31                          ; 4A403E08
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v33, v32                              ; 3E144121
>	v_add_i32_e32 v32, vcc, s7, v31                          ; 4A403E07
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v33, v32                              ; 3E244121
>	v_add_i32_e32 v32, vcc, s6, v31                          ; 4A403E06
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v33, v32                              ; 3E264121
>	v_add_i32_e32 v32, vcc, s5, v31                          ; 4A403E05
>	v_add_i32_e32 v31, vcc, s4, v31                          ; 4A3E3E04
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v33, v32                              ; 3E284121
>	v_mac_f32_e32 v30, v33, v31                              ; 3E3C3F21
>	s_buffer_load_dword s4, s[0:3], 0x39c                    ; C20200FF 0000039C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                       ; BF068004
>	s_cbranch_scc1 BB0_8                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v38                               ; 7E3E1126
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0xc0, v31                        ; 4A403EFF 000000C0
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v34, v32                               ; 3E004122
>	v_add_i32_e32 v32, vcc, 0xcc, v31                        ; 4A403EFF 000000CC
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v34, v32                              ; 3E384122
>	v_add_i32_e32 v32, vcc, 0xdc, v31                        ; 4A403EFF 000000DC
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v34, v32                              ; 3E3A4122
>	v_add_i32_e32 v32, vcc, 0xc4, v31                        ; 4A403EFF 000000C4
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v34, v32                               ; 3E024122
>	v_add_i32_e32 v32, vcc, 0xc8, v31                        ; 4A403EFF 000000C8
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v34, v32                               ; 3E104122
>	v_add_i32_e32 v32, vcc, 0xd0, v31                        ; 4A403EFF 000000D0
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v34, v32                               ; 3E0E4122
>	v_add_i32_e32 v32, vcc, 0xd4, v31                        ; 4A403EFF 000000D4
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v34, v32                               ; 3E124122
>	v_add_i32_e32 v32, vcc, 0xd8, v31                        ; 4A403EFF 000000D8
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v34, v32                              ; 3E144122
>	v_add_i32_e32 v32, vcc, 0xe0, v31                        ; 4A403EFF 000000E0
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v34, v32                              ; 3E244122
>	v_add_i32_e32 v32, vcc, 0xe4, v31                        ; 4A403EFF 000000E4
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v34, v32                              ; 3E264122
>	v_add_i32_e32 v32, vcc, 0xe8, v31                        ; 4A403EFF 000000E8
>	v_add_i32_e32 v31, vcc, 0xec, v31                        ; 4A3E3EFF 000000EC
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v34, v32                              ; 3E284122
>	v_mac_f32_e32 v30, v34, v31                              ; 3E3C3F22
>	v_mul_f32_e32 v31, v1, v22                               ; 103E2D01
>	v_mac_f32_e32 v31, v0, v21                               ; 3E3E2B00
>	v_mac_f32_e32 v31, v8, v23                               ; 3E3E2F08
>	v_mac_f32_e32 v31, v28, v24                              ; 3E3E311C
>	v_mul_f32_e32 v28, v9, v22                               ; 10382D09
>	v_mac_f32_e32 v28, v7, v21                               ; 3E382B07
>	v_mac_f32_e32 v28, v10, v23                              ; 3E382F0A
>	s_buffer_load_dword s9, s[0:3], 0x23                     ; C2048123
>	v_mac_f32_e32 v28, v29, v24                              ; 3E38311D
>	v_mul_f32_e32 v29, v19, v22                              ; 103A2D13
>	v_mul_f32_e32 v22, 0, v22                                ; 102C2C80
>	s_buffer_load_dword s13, s[0:3], 0x27                    ; C2068127
>	s_buffer_load_dword s22, s[0:3], 0x20                    ; C20B0120
>	v_mac_f32_e32 v29, v18, v21                              ; 3E3A2B12
>	v_mac_f32_e32 v22, 0, v21                                ; 3E2C2A80
>	s_buffer_load_dword s10, s[0:3], 0x24                    ; C2050124
>	v_mac_f32_e32 v29, v20, v23                              ; 3E3A2F14
>	v_mac_f32_e32 v22, 0, v23                                ; 3E2C2E80
>	s_buffer_load_dword s23, s[0:3], 0x21                    ; C20B8121
>	s_buffer_load_dword s24, s[0:3], 0x22                    ; C20C0122
>	v_add_f32_e32 v21, v24, v22                              ; 062A2D18
>	v_mac_f32_e32 v29, v30, v24                              ; 3E3A311E
>	s_buffer_load_dword s11, s[0:3], 0x25                    ; C2058125
>	s_buffer_load_dword s12, s[0:3], 0x26                    ; C2060126
>	s_buffer_load_dword s17, s[0:3], 0x2b                    ; C208812B
>	v_add_f32_e32 v22, v27, v31                              ; 062C3F1B
>	v_add_f32_e32 v23, v26, v28                              ; 062E391A
>	v_add_f32_e32 v24, v25, v29                              ; 06303B19
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_subrev_f32_e32 v25, s9, v22                            ; 0A322C09
>	s_buffer_load_dword s16, s[0:3], 0x2a                    ; C208012A
>	v_subrev_f32_e32 v28, s13, v23                           ; 0A382E0D
>	v_mul_f32_e32 v26, s22, v25                              ; 10343216
>	s_buffer_load_dword s14, s[0:3], 0x28                    ; C2070128
>	s_buffer_load_dword s15, s[0:3], 0x29                    ; C2078129
>	v_mac_f32_e32 v26, s10, v28                              ; 3E34380A
>	s_buffer_load_dword s18, s[0:3], 0x2c                    ; C209012C
>	s_buffer_load_dword s19, s[0:3], 0x2d                    ; C209812D
>	s_buffer_load_dword s10, s[0:3], 0x3                     ; C2050103
>	v_mul_f32_e32 v27, s23, v25                              ; 10363217
>	v_mul_f32_e32 v25, s24, v25                              ; 10323218
>	v_mac_f32_e32 v27, s11, v28                              ; 3E36380B
>	v_mac_f32_e32 v25, s12, v28                              ; 3E32380C
>	v_subrev_f32_e32 v28, s17, v24                           ; 0A383011
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v25, s16, v28                              ; 3E323810
>	v_mac_f32_e32 v26, s14, v28                              ; 3E34380E
>	v_mac_f32_e32 v27, s15, v28                              ; 3E36380F
>	v_mul_f32_e32 v28, 0.5, v25                              ; 103832F0
>	s_buffer_load_dword s12, s[0:3], 0x7                     ; C2060107
>	v_mad_f32 v26, s18, v26, v28                             ; D282001A 04723412
>	v_mac_f32_e32 v28, s19, v27                              ; 3E383613
>	v_mul_f32_e32 v27, s10, v22                              ; 10362C0A
>	s_buffer_load_dword s10, s[0:3], 0xb                     ; C205010B
>	s_buffer_load_dword s4, s[0:3], 0xf                      ; C202010F
>	s_buffer_load_dword s9, s[0:3], 0x1f                     ; C204811F
>	s_buffer_load_dword s21, s[0:3], 0x2f                    ; C20A812F
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v27, s12, v23                              ; 3E362E0C
>	s_buffer_load_dword s20, s[0:3], 0x2e                    ; C20A012E
>	v_mac_f32_e32 v27, s10, v24                              ; 3E36300A
>	v_mac_f32_e32 v27, s4, v21                               ; 3E362A04
>	v_mul_f32_e32 v29, s9, v27                               ; 103A3609
>	s_buffer_load_dword s10, s[0:3], 0x2                     ; C2050102
>	exp 15, 32, 0, 0, 0, v22, v23, v24, v29                  ; F800020F 1D181716
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>	v_mov_b32_e32 v29, s21                                   ; 7E3A0215
>	s_buffer_load_dword s18, s[0:3], 0x6                     ; C2090106
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v29, s20, v25                              ; 3E3A3214
>	s_buffer_load_dword s19, s[0:3], 0xa                     ; C209810A
>	exp 15, 33, 0, 0, 0, v26, v28, v29, v25                  ; F800021F 191D1C1A
>	s_buffer_load_dword s6, s[0:3], 0x18                     ; C2030118
>	s_buffer_load_dword s16, s[0:3], 0xe                     ; C208010E
>	v_add_f32_e32 v11, v11, v11                              ; 0616170B
>	v_add_f32_e32 v3, v3, v3                                 ; 06060703
>	exp 15, 34, 0, 0, 0, v14, v15, v16, v17                  ; F800022F 11100F0E
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>	v_mad_f32 v14, v11, v0, -v0                              ; D282000E 8402010B
>	v_mad_f32 v12, 2.0, v12, -1.0                            ; D282000C 03CE18F4
>	s_buffer_load_dword s7, s[0:3], 0x19                     ; C2038119
>	v_mad_f32 v4, 2.0, v4, -1.0                              ; D2820004 03CE08F4
>	v_mad_f32 v0, v3, v0, -v0                                ; D2820000 84020103
>	v_mad_f32 v15, v11, v7, -v7                              ; D282000F 841E0F0B
>	v_mac_f32_e32 v14, v1, v12                               ; 3E1C1901
>	v_mac_f32_e32 v0, v1, v4                                 ; 3E000901
>	v_mad_f32 v1, v3, v7, -v7                                ; D2820001 841E0F03
>	v_mul_f32_e32 v7, s10, v22                               ; 100E2C0A
>	v_mac_f32_e32 v7, s18, v23                               ; 3E0E2E12
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v7, s19, v24                               ; 3E0E3013
>	v_mad_f32 v13, 2.0, v13, -1.0                            ; D282000D 03CE1AF4
>	v_mad_f32 v5, 2.0, v5, -1.0                              ; D2820005 03CE0AF4
>	v_mac_f32_e32 v14, v8, v13                               ; 3E1C1B08
>	v_mac_f32_e32 v0, v8, v5                                 ; 3E000B08
>	v_mac_f32_e32 v7, s16, v21                               ; 3E0E2A10
>	v_mov_b32_e32 v8, s6                                     ; 7E100206
>	v_mac_f32_e32 v8, s7, v7                                 ; 3E100E07
>	v_add_f32_e64 v8, v8, 0 clamp                            ; D2060808 00010108
>	s_buffer_load_dword s8, s[0:3], 0x1a                     ; C204011A
>	v_log_f32_e32 v8, v8                                     ; 7E104F08
>	s_buffer_load_dword s5, s[0:3], 0x15                     ; C2028115
>	s_buffer_load_dword s11, s[0:3], 0x4                     ; C2058104
>	s_buffer_load_dword s13, s[0:3], 0x8                     ; C2068108
>	s_buffer_load_dword s14, s[0:3], 0x9                     ; C2070109
>	s_buffer_load_dword s12, s[0:3], 0xc                     ; C206010C
>	s_buffer_load_dword s15, s[0:3], 0xd                     ; C207810D
>	s_buffer_load_dword s4, s[0:3], 0x0                      ; C2020100
>	s_buffer_load_dword s9, s[0:3], 0x1                      ; C2048101
>	s_buffer_load_dword s17, s[0:3], 0x5                     ; C2088105
>	s_buffer_load_dword s0, s[0:3], 0x1b                     ; C200011B
>	v_mac_f32_e32 v15, v9, v12                               ; 3E1E1909
>	v_mac_f32_e32 v1, v9, v4                                 ; 3E020909
>	v_mad_f32 v11, v11, v18, -v18                            ; D282000B 844A250B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_legacy_f32_e32 v8, s8, v8                          ; 0E101008
>	v_mac_f32_e32 v11, v19, v12                              ; 3E161913
>	v_mad_f32 v3, v3, v18, -v18                              ; D2820003 844A2503
>	v_mac_f32_e32 v15, v10, v13                              ; 3E1E1B0A
>	v_mac_f32_e32 v1, v10, v5                                ; 3E020B0A
>	v_exp_f32_e32 v8, v8                                     ; 7E104B08
>	v_sub_f32_e64 v10, 1.0, s0                               ; D208000A 000000F2
>	v_mac_f32_e32 v3, v19, v4                                ; 3E060913
>	v_mac_f32_e32 v10, s0, v8                                ; 3E141000
>	v_mac_f32_e32 v11, v20, v13                              ; 3E161B14
>	v_mac_f32_e32 v3, v20, v5                                ; 3E060B14
>	v_mov_b32_e32 v9, 0x3dcccccd                             ; 7E1202FF 3DCCCCCD
>	v_mul_f32_e32 v8, v1, v11                                ; 10101701
>	v_mul_f32_e32 v10, v10, v10                              ; 1014150A
>	v_mul_f32_e32 v4, s4, v22                                ; 10082C04
>	v_mul_f32_e32 v5, s9, v22                                ; 100A2C09
>	v_mul_f32_e32 v12, v3, v14                               ; 10181D03
>	v_mul_f32_e32 v13, v0, v15                               ; 101A1F00
>	v_add_f32_e32 v6, v6, v6                                 ; 060C0D06
>	v_mad_f32 v8, v15, v3, -v8                               ; D2820008 8422070F
>	v_mul_f32_e32 v9, s5, v9                                 ; 10121205
>	exp 15, 35, 0, 0, 0, v10, v0, v0, v0                     ; F800023F 0000000A
>	v_mac_f32_e32 v4, s11, v23                               ; 3E082E0B
>	v_mac_f32_e32 v5, s17, v23                               ; 3E0A2E11
>	v_mad_f32 v12, v11, v0, -v12                             ; D282000C 8432010B
>	v_mad_f32 v13, v14, v1, -v13                             ; D282000D 8436030E
>	v_mad_f32 v8, v6, v8, -v8                                ; D2820008 84221106
>	exp 15, 36, 0, 0, 0, v14, v15, v11, v9                   ; F800024F 090B0F0E
>	v_mac_f32_e32 v4, s13, v24                               ; 3E08300D
>	v_mac_f32_e32 v5, s14, v24                               ; 3E0A300E
>	v_mad_f32 v12, v6, v12, -v12                             ; D282000C 84321906
>	v_mad_f32 v6, v6, v13, -v13                              ; D2820006 84361B06
>	exp 15, 37, 0, 0, 0, v0, v1, v3, v8                      ; F800025F 08030100
>	v_mac_f32_e32 v4, s12, v21                               ; 3E082A0C
>	v_mac_f32_e32 v5, s15, v21                               ; 3E0A2A0F
>	exp 15, 38, 0, 0, 0, v12, v6, v0, v0                     ; F800026F 0000060C
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v27                     ; F80008CF 1B070504
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2396 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v24, v4, 3, 5, [m0]                             ; C8601704
>	v_interp_p2_f32 v24, [v24], v5, 3, 5, [m0]                      ; C8611705
>	v_interp_p1_f32 v25, v4, 0, 6, [m0]                             ; C8641804
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v25, [v25], v5, 0, 6, [m0]                      ; C8651805
>	v_interp_p1_f32 v26, v4, 1, 6, [m0]                             ; C8681904
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v26, [v26], v5, 1, 6, [m0]                      ; C8691905
>	v_interp_p1_f32 v7, v6, 0, 0, [m0]                              ; C81C0006
>	v_interp_p2_f32 v7, [v7], v3, 0, 0, [m0]                        ; C81D0003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v8, v6, 2, 0, [m0]                              ; C8200206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v27, s12, v7                                      ; 08360E0C
>	v_interp_p2_f32 v8, [v8], v3, 2, 0, [m0]                        ; C8210203
>	v_sub_f32_e32 v28, s13, v0                                      ; 0838000D
>	v_mul_f32_e32 v1, v27, v27                                      ; 1002371B
>	v_sub_f32_e32 v29, s14, v8                                      ; 083A100E
>	v_mac_f32_e32 v1, v28, v28                                      ; 3E02391C
>	v_mac_f32_e32 v1, v29, v29                                      ; 3E023B1D
>	v_rsq_f32_e32 v30, v1                                           ; 7E3C5D01
>	v_interp_p1_f32 v1, v4, 0, 4, [m0]                              ; C8041004
>	v_interp_p2_f32 v1, [v1], v5, 0, 4, [m0]                        ; C8051005
>	v_interp_p1_f32 v2, v4, 1, 4, [m0]                              ; C8081104
>	v_interp_p2_f32 v2, [v2], v5, 1, 4, [m0]                        ; C8091105
>	v_interp_p1_f32 v11, v4, 2, 4, [m0]                             ; C82C1204
>	v_mul_f32_e32 v12, v1, v1                                       ; 10180301
>	v_interp_p2_f32 v11, [v11], v5, 2, 4, [m0]                      ; C82D1205
>	v_mac_f32_e32 v12, v2, v2                                       ; 3E180502
>	v_mac_f32_e32 v12, v11, v11                                     ; 3E18170B
>	v_rsq_f32_e32 v12, v12                                          ; 7E185D0C
>	s_load_dwordx4 s[32:35], s[4:5], 0x4c                           ; C090054C
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                           ; C0CC0540
>	s_load_dwordx4 s[12:15], s[4:5], 0x9c                           ; C086059C
>	v_mul_f32_e32 v32, v12, v1                                      ; 1040030C
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v33, v12, v2                                      ; 1042050C
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_interp_p1_f32 v2, v6, 1, 2, [m0]                              ; C8080906
>	v_interp_p2_f32 v2, [v2], v3, 1, 2, [m0]                        ; C8090903
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s31                                         ; 87201F20
>	image_sample v[17:20], v[1:2], s[24:31], s[32:35] dmask:0xf     ; F0800F00 01061101
>	s_load_dwordx8 s[24:31], s[4:5], 0x90                           ; C0CC0590
>	s_buffer_load_dword s39, s[0:3], 0x81                           ; C2138181
>	s_buffer_load_dword s40, s[0:3], 0x82                           ; C2140182
>	s_buffer_load_dword s51, s[0:3], 0x84                           ; C2198184
>	s_buffer_load_dword s52, s[0:3], 0x85                           ; C21A0185
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s12, s12, s31                                         ; 870C1F0C
>	s_buffer_load_dword s53, s[0:3], 0x86                           ; C21A8186
>	image_sample v[14:16], v[1:2], s[24:31], s[12:15] dmask:0x7     ; F0800700 00660E01
>	s_buffer_load_dword s34, s[0:3], 0x87                           ; C2110187
>	s_buffer_load_dword s45, s[0:3], 0x8d                           ; C216818D
>	s_buffer_load_dword s24, s[0:3], 0x8e                           ; C20C018E
>	s_buffer_load_dword s12, s[0:3], 0x90                           ; C2060190
>	s_buffer_load_dword s13, s[0:3], 0x91                           ; C2068191
>	s_buffer_load_dword s14, s[0:3], 0x92                           ; C2070192
>	s_buffer_load_dword s15, s[0:3], 0x93                           ; C2078193
>	s_buffer_load_dword s25, s[0:3], 0x99                           ; C20C8199
>	s_buffer_load_dword s27, s[0:3], 0x9f                           ; C20D819F
>	s_buffer_load_dword s36, s[0:3], 0x7e                           ; C212017E
>	s_buffer_load_dword s37, s[0:3], 0x7f                           ; C212817F
>	s_buffer_load_dword s38, s[0:3], 0x80                           ; C2130180
>	s_buffer_load_dword s32, s[0:3], 0x7c                           ; C210017C
>	s_buffer_load_dword s33, s[0:3], 0x7d                           ; C210817D
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v38, s51, v14                                     ; 104C1C33
>	v_mul_f32_e32 v39, s52, v14                                     ; 104E1C34
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v40, s53, v14                                     ; 10501C35
>	v_mul_f32_e32 v44, s39, v14                                     ; 10581C27
>	v_mul_f32_e32 v45, s40, v14                                     ; 105A1C28
>	s_buffer_load_dword s41, s[0:3], 0x89                           ; C2148189
>	s_buffer_load_dword s42, s[0:3], 0x8a                           ; C215018A
>	s_buffer_load_dword s43, s[0:3], 0x8b                           ; C215818B
>	s_buffer_load_dword s44, s[0:3], 0x8c                           ; C216018C
>	s_buffer_load_dword s35, s[0:3], 0x88                           ; C2118188
>	v_mac_f32_e32 v44, s45, v15                                     ; 3E581E2D
>	v_mul_f32_e32 v41, s34, v14                                     ; 10521C22
>	v_mac_f32_e32 v38, s12, v15                                     ; 3E4C1E0C
>	v_mac_f32_e32 v39, s13, v15                                     ; 3E4E1E0D
>	v_mac_f32_e32 v40, s14, v15                                     ; 3E501E0E
>	s_buffer_load_dword s12, s[0:3], 0x9c                           ; C206019C
>	s_buffer_load_dword s13, s[0:3], 0x9d                           ; C206819D
>	s_buffer_load_dword s14, s[0:3], 0x9e                           ; C207019E
>	v_mac_f32_e32 v45, s24, v15                                     ; 3E5A1E18
>	s_buffer_load_dword s26, s[0:3], 0x9a                           ; C20D019A
>	s_buffer_load_dword s46, s[0:3], 0x94                           ; C2170194
>	s_buffer_load_dword s47, s[0:3], 0x95                           ; C2178195
>	s_buffer_load_dword s48, s[0:3], 0x96                           ; C2180196
>	s_buffer_load_dword s49, s[0:3], 0x97                           ; C2188197
>	s_buffer_load_dword s50, s[0:3], 0x98                           ; C2190198
>	s_buffer_load_dword s24, s[0:3], 0x78                           ; C20C0178
>	v_mac_f32_e32 v41, s15, v15                                     ; 3E521E0F
>	v_mac_f32_e32 v44, s25, v16                                     ; 3E582019
>	s_buffer_load_dword s25, s[0:3], 0x79                           ; C20C8179
>	v_mac_f32_e32 v41, s27, v16                                     ; 3E52201B
>	s_buffer_load_dword s27, s[0:3], 0xa8                           ; C20D81A8
>	v_mul_f32_e32 v34, s32, v14                                     ; 10441C20
>	v_mul_f32_e32 v35, s33, v14                                     ; 10461C21
>	v_mul_f32_e32 v36, s36, v14                                     ; 10481C24
>	v_mul_f32_e32 v37, s37, v14                                     ; 104A1C25
>	v_mul_f32_e32 v43, s38, v14                                     ; 10561C26
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v34, s35, v15                                     ; 3E441E23
>	v_mac_f32_e32 v43, s44, v15                                     ; 3E561E2C
>	v_mac_f32_e32 v35, s41, v15                                     ; 3E461E29
>	v_mac_f32_e32 v36, s42, v15                                     ; 3E481E2A
>	v_mac_f32_e32 v37, s43, v15                                     ; 3E4A1E2B
>	v_add_f32_e32 v21, v14, v15                                     ; 062A1F0E
>	v_add_f32_e32 v42, v16, v21                                     ; 06542B10
>	v_mac_f32_e32 v38, s12, v16                                     ; 3E4C200C
>	v_mac_f32_e32 v39, s13, v16                                     ; 3E4E200D
>	v_mac_f32_e32 v40, s14, v16                                     ; 3E50200E
>	v_mac_f32_e32 v45, s26, v16                                     ; 3E5A201A
>	v_mul_f32_e32 v14, s24, v1                                      ; 101C0218
>	v_mac_f32_e32 v34, s46, v16                                     ; 3E44202E
>	v_mac_f32_e32 v35, s47, v16                                     ; 3E46202F
>	v_mac_f32_e32 v36, s48, v16                                     ; 3E482030
>	v_mac_f32_e32 v37, s49, v16                                     ; 3E4A2031
>	v_mac_f32_e32 v43, s50, v16                                     ; 3E562032
>	v_interp_p1_f32 v16, v4, 3, 4, [m0]                             ; C8401304
>	s_buffer_load_dword s24, s[0:3], 0xa4                           ; C20C01A4
>	v_mul_f32_e32 v15, s25, v2                                      ; 101E0419
>	v_interp_p2_f32 v16, [v16], v5, 3, 4, [m0]                      ; C8411305
>	s_buffer_load_dword s25, s[0:3], 0xa9                           ; C20C81A9
>	v_mul_f32_e32 v46, v12, v11                                     ; 105C170C
>	v_mul_f32_e32 v12, s27, v16                                     ; 1018201B
>	s_buffer_load_dword s26, s[0:3], 0xa5                           ; C20D01A5
>	s_buffer_load_dword s27, s[0:3], 0xaa                           ; C20D81AA
>	s_buffer_load_dword s28, s[0:3], 0xab                           ; C20E01AB
>	s_load_dwordx8 s[32:39], s[4:5], 0x60                           ; C0D00560
>	s_load_dwordx4 s[40:43], s[4:5], 0x6c                           ; C094056C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v11, s24, v14                                     ; 10161C18
>	s_buffer_load_dword s45, s[0:3], 0xa7                           ; C21681A7
>	v_mac_f32_e32 v11, s24, v12                                     ; 3E161818
>	v_mul_f32_e32 v12, s24, v15                                     ; 10181E18
>	v_mul_f32_e32 v21, s25, v16                                     ; 102A2019
>	s_buffer_load_dword s44, s[0:3], 0xa6                           ; C21601A6
>	v_mac_f32_e32 v12, s24, v21                                     ; 3E182A18
>	v_mul_f32_e32 v21, s27, v16                                     ; 102A201B
>	v_mul_f32_e32 v14, s26, v14                                     ; 101C1C1A
>	v_mul_f32_e32 v15, s26, v15                                     ; 101E1E1A
>	v_mul_f32_e32 v16, s28, v16                                     ; 1020201C
>	v_mac_f32_e32 v14, s26, v21                                     ; 3E1C2A1A
>	v_mac_f32_e32 v15, s26, v16                                     ; 3E1E201A
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	image_sample v[21:23], v[11:12], s[32:39], s[40:43] dmask:0xb   ; F0800B00 0148150B
>	image_sample v11, v[14:15], s[32:39], s[40:43] dmask:0x4        ; F0800400 01480B0E
>	s_waitcnt vmcnt(0) lgkmcnt(0)                                   ; BF8C0070
>	v_mul_f32_e32 v11, s45, v11                                     ; 1016162D
>	v_mad_f32 v11, v22, s44, -v11                                   ; D282000B 842C5916
>	s_load_dwordx8 s[16:23], s[4:5], 0x50                           ; C0C80550
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                           ; C090055C
>	s_load_dwordx8 s[24:31], s[4:5], 0x70                           ; C0CC0570
>	s_load_dwordx4 s[44:47], s[4:5], 0x7c                           ; C096057C
>	v_add_f32_e64 v42, v42, 0 clamp                                 ; D206082A 0001012A
>	v_mad_f32 v47, -v42, v17, v17                                   ; D282002F 2446232A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s23                                         ; 87201720
>	v_mad_f32 v48, -v42, v18, v18                                   ; D2820030 244A252A
>	s_and_b32 s44, s44, s31                                         ; 872C1F2C
>	image_sample v12, v[1:2], s[24:31], s[44:47] dmask:0x8          ; F0800800 01660C01
>	image_sample v[14:16], v[1:2], s[16:23], s[32:35] dmask:0xb     ; F0800B00 01040E01
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v17, v15, v15                                     ; 06221F0F
>	v_mad_f32 v15, 2.0, v15, -1.0                                   ; D282000F 03CE1EF4
>	v_mad_f32 v16, 2.0, v16, -1.0                                   ; D2820010 03CE20F4
>	v_mad_f32 v17, v17, v15, -v15                                   ; D2820011 843E1F11
>	v_mac_f32_e32 v17, v16, v16                                     ; 3E222110
>	v_mad_f32 v18, 2.0, v21, -1.0                                   ; D2820012 03CE2AF4
>	v_mad_f32 v49, -v42, v19, v19                                   ; D2820031 244E272A
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_mac_f32_e32 v16, v20, v18                                     ; 3E202514
>	v_mad_f32 v19, 2.0, v23, -1.0                                   ; D2820013 03CE2EF4
>	v_sub_f32_e32 v17, 0x3f8020c5, v17                              ; 082222FF 3F8020C5
>	v_mac_f32_e32 v15, v20, v19                                     ; 3E1E2714
>	v_mul_f32_e32 v18, v16, v16                                     ; 10242110
>	v_sqrt_f32_e32 v17, v17                                         ; 7E226711
>	v_mac_f32_e32 v18, v15, v15                                     ; 3E241F0F
>	v_mac_f32_e32 v18, v17, v17                                     ; 3E242311
>	v_rsq_f32_e32 v18, v18                                          ; 7E245D12
>	v_interp_p1_f32 v22, v4, 0, 5, [m0]                             ; C8581404
>	v_add_f32_e64 v11, v11, 0 clamp                                 ; D206080B 0001010B
>	v_interp_p2_f32 v22, [v22], v5, 0, 5, [m0]                      ; C8591405
>	v_interp_p1_f32 v23, v4, 1, 5, [m0]                             ; C85C1504
>	v_mul_f32_e32 v16, v18, v16                                     ; 10202112
>	v_interp_p2_f32 v23, [v23], v5, 1, 5, [m0]                      ; C85D1505
>	v_interp_p1_f32 v52, v4, 2, 5, [m0]                             ; C8D01604
>	v_mul_f32_e32 v50, v11, v20                                     ; 1064290B
>	v_mad_f32 v51, -v20, v11, 1.0                                   ; D2820033 23CA1714
>	v_mul_f32_e32 v15, v18, v15                                     ; 101E1F12
>	v_mul_f32_e32 v11, v16, v22                                     ; 10162D10
>	v_mad_f32 v21, -v38, v12, v12                                   ; D2820015 24321926
>	v_mul_f32_e32 v12, v16, v23                                     ; 10182F10
>	v_interp_p2_f32 v52, [v52], v5, 2, 5, [m0]                      ; C8D11605
>	v_mul_f32_e32 v17, v18, v17                                     ; 10222312
>	v_mac_f32_e32 v11, v15, v24                                     ; 3E16310F
>	v_mul_f32_e32 v4, v16, v52                                      ; 10086910
>	v_mac_f32_e32 v12, v15, v25                                     ; 3E18330F
>	v_mul_f32_e32 v10, v30, v27                                     ; 1014371E
>	v_mac_f32_e32 v11, v17, v32                                     ; 3E164111
>	v_mac_f32_e32 v4, v15, v26                                      ; 3E08350F
>	v_mul_f32_e32 v9, v30, v28                                      ; 1012391E
>	v_mac_f32_e32 v12, v17, v33                                     ; 3E184311
>	v_mul_f32_e32 v53, v10, v11                                     ; 106A170A
>	v_mul_f32_e32 v31, v30, v29                                     ; 103E3B1E
>	v_mac_f32_e32 v4, v17, v46                                      ; 3E085D11
>	v_mac_f32_e32 v53, v9, v12                                      ; 3E6A1909
>	v_mac_f32_e32 v53, v31, v4                                      ; 3E6A091F
>	s_load_dwordx8 s[36:43], s[4:5], 0x80                           ; C0D20580
>	s_load_dwordx4 s[16:19], s[4:5], 0x8c                           ; C088058C
>	v_mul_f32_e32 v15, v12, v53                                     ; 101E6B0C
>	v_mul_f32_e32 v16, v4, v53                                      ; 10206B04
>	v_mac_f32_e32 v15, v12, v53                                     ; 3E1E6B0C
>	v_mad_f32 v28, -v28, v30, v15                                   ; D282001C 243E3D1C
>	v_interp_p1_f32 v15, v6, 2, 2, [m0]                             ; C83C0A06
>	v_mac_f32_e32 v16, v4, v53                                      ; 3E206B04
>	v_mad_f32 v29, -v29, v30, v16                                   ; D282001D 24423D1D
>	v_interp_p2_f32 v15, [v15], v3, 2, 2, [m0]                      ; C83D0A03
>	v_interp_p1_f32 v16, v6, 3, 2, [m0]                             ; C8400B06
>	v_interp_p2_f32 v16, [v16], v3, 3, 2, [m0]                      ; C8410B03
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s16, s16, s43                                         ; 87102B10
>	image_sample v[17:20], v[15:16], s[36:43], s[16:19] dmask:0xf   ; F0800F00 0089110F
>	v_mul_f32_e32 v5, v11, v53                                      ; 100A6B0B
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v15, -0.5, v18                                    ; 061E24F1
>	v_mac_f32_e32 v5, v11, v53                                      ; 3E0A6B0B
>	v_mad_f32 v54, -v27, v30, v5                                    ; D2820036 24163D1B
>	v_add_f32_e32 v5, -0.5, v19                                     ; 060A26F1
>	v_add_f32_e32 v18, v15, v15                                     ; 06241F0F
>	v_add_f32_e32 v5, v5, v5                                        ; 060A0B05
>	v_mul_f32_e32 v15, v18, v18                                     ; 101E2512
>	v_mac_f32_e32 v15, v5, v5                                       ; 3E1E0B05
>	v_add_f32_e64 v15, v15, 0 clamp                                 ; D206080F 0001010F
>	v_mul_f32_e32 v16, v5, v22                                      ; 10202D05
>	v_sub_f32_e32 v15, 1.0, v15                                     ; 081E1EF2
>	v_sqrt_f32_e32 v19, v15                                         ; 7E26670F
>	v_mul_f32_e32 v15, v5, v23                                      ; 101E2F05
>	v_mac_f32_e32 v16, v18, v24                                     ; 3E203112
>	v_mul_f32_e32 v5, v5, v52                                       ; 100A6905
>	v_mac_f32_e32 v15, v18, v25                                     ; 3E1E3312
>	v_mac_f32_e32 v16, v19, v32                                     ; 3E204113
>	v_mac_f32_e32 v5, v18, v26                                      ; 3E0A3512
>	v_mac_f32_e32 v15, v19, v33                                     ; 3E1E4313
>	v_mul_f32_e32 v18, v16, v54                                     ; 10246D10
>	s_buffer_load_dword s17, s[0:3], 0x10                           ; C2088110
>	v_mac_f32_e32 v5, v19, v46                                      ; 3E0A5D13
>	v_mac_f32_e32 v18, v15, v28                                     ; 3E24390F
>	v_mac_f32_e32 v18, v5, v29                                      ; 3E243B05
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v55, v14, v17                                     ; 106E230E
>	v_mov_b32_e32 v17, 0x403b800a                                   ; 7E2202FF 403B800A
>	v_mad_f32 v52, 2.0, v20, -v18                                   ; D2820034 844A28F4
>	v_mad_f32 v18, v17, v32, v7                                     ; D2820012 041E4111
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v23, s17, v18                                     ; 102E2411
>	s_buffer_load_dword s17, s[0:3], 0x11                           ; C2088111
>	s_buffer_load_dword s18, s[0:3], 0x12                           ; C2090112
>	s_buffer_load_dword s19, s[0:3], 0x14                           ; C2098114
>	s_buffer_load_dword s20, s[0:3], 0x15                           ; C20A0115
>	s_buffer_load_dword s21, s[0:3], 0x16                           ; C20A8116
>	v_mad_f32 v19, v17, v33, v0                                     ; D2820013 04024311
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v24, s17, v18                                     ; 10302411
>	v_mul_f32_e32 v25, s18, v18                                     ; 10322412
>	v_mac_f32_e32 v23, s19, v19                                     ; 3E2E2613
>	s_buffer_load_dword s17, s[0:3], 0x18                           ; C2088118
>	s_buffer_load_dword s18, s[0:3], 0x19                           ; C2090119
>	s_buffer_load_dword s19, s[0:3], 0x1a                           ; C209811A
>	v_mac_f32_e32 v24, s20, v19                                     ; 3E302614
>	v_mac_f32_e32 v25, s21, v19                                     ; 3E322615
>	s_buffer_load_dword s16, s[0:3], 0x1e                           ; C208011E
>	s_buffer_load_dword s20, s[0:3], 0x1c                           ; C20A011C
>	s_buffer_load_dword s21, s[0:3], 0x1d                           ; C20A811D
>	v_mad_f32 v17, v17, v46, v8                                     ; D2820011 04225D11
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v23, s17, v17                                     ; 3E2E2211
>	v_mac_f32_e32 v24, s18, v17                                     ; 3E302212
>	v_mac_f32_e32 v25, s19, v17                                     ; 3E322213
>	v_add_f32_e32 v18, s20, v23                                     ; 06242E14
>	v_add_f32_e32 v19, s21, v24                                     ; 06263015
>	v_add_f32_e32 v17, s16, v25                                     ; 06223210
>	s_load_dwordx8 s[16:23], s[4:5], 0x0                            ; C0C80500
>	s_load_dwordx4 s[24:27], s[4:5], 0xc                            ; C08C050C
>	v_add_f32_e32 v30, v20, v20                                     ; 063C2914
>	v_sub_f32_e32 v20, 1.0, v42                                     ; 082854F2
>	v_mac_f32_e32 v21, v38, v37                                     ; 3E2A4B26
>	v_add_f32_e32 v22, v20, v40                                     ; 062C5114
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s24, s24, s23                                         ; 87181718
>	image_sample_c v37, v[17:20], s[16:23], s[24:27] dmask:0x1      ; F0A00100 00C42511
>	v_add_f32_e32 v17, v20, v41                                     ; 06225314
>	v_mul_f32_e32 v18, v39, v34                                     ; 10244527
>	v_mul_f32_e32 v19, v39, v35                                     ; 10264727
>	v_mul_f32_e32 v20, v39, v36                                     ; 10284927
>	v_rcp_f32_e32 v17, v17                                          ; 7E225511
>	v_log_f32_e32 v18, v18                                          ; 7E244F12
>	v_log_f32_e32 v19, v19                                          ; 7E264F13
>	v_log_f32_e32 v20, v20                                          ; 7E284F14
>	v_log_f32_e32 v21, v21                                          ; 7E2A4F15
>	v_mul_legacy_f32_e32 v18, v17, v18                              ; 0E242511
>	v_mul_legacy_f32_e32 v19, v17, v19                              ; 0E262711
>	v_mul_legacy_f32_e32 v17, v17, v20                              ; 0E222911
>	v_rcp_f32_e32 v20, v22                                          ; 7E285516
>	v_exp_f32_e32 v36, v17                                          ; 7E484B11
>	v_exp_f32_e32 v34, v18                                          ; 7E444B12
>	s_load_dwordx8 s[28:35], s[4:5], 0x10                           ; C0CE0510
>	v_mul_legacy_f32_e32 v17, v20, v21                              ; 0E222B14
>	v_exp_f32_e32 v38, v17                                          ; 7E4C4B11
>	v_cubema_f32 v17, v11, v12, v4                                  ; D28E0011 0412190B
>	v_rcp_f32_e64 v17, |v17|                                        ; D3540111 00000111
>	s_load_dwordx4 s[36:39], s[4:5], 0x1c                           ; C092051C
>	v_cubetc_f32 v18, v11, v12, v4                                  ; D28C0012 0412190B
>	v_mov_b32_e32 v20, 0x3fc00000                                   ; 7E2802FF 3FC00000
>	v_cubesc_f32 v21, v11, v12, v4                                  ; D28A0015 0412190B
>	v_mad_f32 v18, v17, v18, v20                                    ; D2820012 04522511
>	v_mad_f32 v17, v17, v21, v20                                    ; D2820011 04522B11
>	v_add_f32_e64 v21, v53, 0 clamp                                 ; D2060815 00010135
>	s_buffer_load_dword s15, s[0:3], 0xa3                           ; C20781A3
>	v_sub_f32_e32 v21, 1.0, v21                                     ; 082A2AF2
>	v_log_f32_e32 v21, v21                                          ; 7E2A4F15
>	v_mad_f32 v39, -v50, v38, v38                                   ; D2820027 249A4D32
>	v_exp_f32_e32 v35, v19                                          ; 7E464B13
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	v_cubeid_f32 v19, v11, v12, v4                                  ; D2880013 0412190B
>	image_sample v[24:27], v[17:20], s[28:35], s[36:39] dmask:0xf   ; F0800F00 01271811
>	v_mac_f32_e32 v39, s15, v50                                     ; 3E4E640F
>	v_mov_b32_e32 v17, 0x40c00000                                   ; 7E2202FF 40C00000
>	v_max_f32_e32 v18, v34, v39                                     ; 20244F22
>	v_max_f32_e32 v19, v35, v39                                     ; 20264F23
>	v_mad_f32 v23, -v39, v17, v17                                   ; D2820017 24462327
>	v_mul_legacy_f32_e32 v17, 0x40a00000, v21                       ; 0E222AFF 40A00000
>	v_max_f32_e32 v21, v36, v39                                     ; 202A4F24
>	v_exp_f32_e32 v17, v17                                          ; 7E224B11
>	v_subrev_f32_e32 v18, v34, v18                                  ; 0A242522
>	v_subrev_f32_e32 v19, v35, v19                                  ; 0A262723
>	v_subrev_f32_e32 v21, v36, v21                                  ; 0A2A2B24
>	v_mad_f32 v40, v19, v17, v35                                    ; D2820028 048E2313
>	s_load_dwordx4 s[16:19], s[4:5], 0x2c                           ; C088052C
>	s_load_dwordx8 s[20:27], s[4:5], 0x20                           ; C0CA0520
>	v_mad_f32 v18, v18, v17, v34                                    ; D2820012 048A2312
>	v_mad_f32 v41, v21, v17, v36                                    ; D2820029 04922315
>	v_cubema_f32 v17, v54, v28, v29                                 ; D28E0011 04763936
>	v_rcp_f32_e64 v17, |v17|                                        ; D3540111 00000111
>	v_mac_f32_e32 v47, v42, v43                                     ; 3E5E572A
>	v_cubetc_f32 v19, v54, v28, v29                                 ; D28C0013 04763936
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	v_cubesc_f32 v43, v54, v28, v29                                 ; D28A002B 04763936
>	v_mad_f32 v21, v17, v19, v20                                    ; D2820015 04522711
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s16, s16, s27                                         ; 87101B10
>	v_cubeid_f32 v22, v54, v28, v29                                 ; D2880016 04763936
>	v_mac_f32_e32 v20, v17, v43                                     ; 3E285711
>	image_sample_l v[19:21], v[20:23], s[20:27], s[16:19] dmask:0x7 ; F0900700 00851314
>	s_buffer_load_dword s16, s[0:3], 0x6                            ; C2080106
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v17, v19, v18                                     ; 10222513
>	v_mul_f32_e32 v18, v20, v40                                     ; 10245114
>	v_mul_f32_e32 v20, v32, v54                                     ; 10286D20
>	v_mad_f32 v20, -v28, v33, -v20                                  ; D2820014 A452431C
>	v_mul_f32_e32 v28, v32, v10                                     ; 10381520
>	v_mac_f32_e32 v28, v33, v9                                      ; 3E381321
>	v_mul_f32_e32 v9, s9, v16                                       ; 10122009
>	v_mad_f32 v9, v15, -s8, -v9                                     ; D2820009 C424110F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v9, -v5, s16, v9                                      ; D2820009 24242105
>	s_buffer_load_dword s17, s[0:3], 0xc                            ; C208810C
>	s_buffer_load_dword s18, s[0:3], 0xd                            ; C209010D
>	s_buffer_load_dword s19, s[0:3], 0xe                            ; C209810E
>	v_mov_b32_e32 v32, 0x3f8ccccd                                   ; 7E4002FF 3F8CCCCD
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mad_f32 v9, v30, v32, -v9                                     ; D2820009 8426411E
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v9, v9, v9                                        ; 10121309
>	v_mul_f32_e32 v10, v37, v37                                     ; 10144B25
>	v_mul_f32_e32 v19, v21, v41                                     ; 10265315
>	v_mad_f32 v29, -v29, v46, v20                                   ; D282001D 24525D1D
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v20, s17, v10                                     ; 10281411
>	v_mul_f32_e32 v21, s18, v10                                     ; 102A1412
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v10, s19, v10                                     ; 10141413
>	v_mul_f32_e32 v20, v9, v20                                      ; 10282909
>	v_mul_f32_e32 v21, v9, v21                                      ; 102A2B09
>	v_mul_f32_e32 v9, v9, v10                                       ; 10121509
>	v_mul_f32_e32 v10, s9, v11                                      ; 10141609
>	v_mad_f32 v10, v12, -s8, -v10                                   ; D282000A C428110C
>	v_mad_f32 v10, -v4, s16, v10                                    ; D282000A 24282104
>	v_add_f32_e64 v10, v10, 0 clamp                                 ; D206080A 0001010A
>	v_mul_f32_e32 v9, v14, v9                                       ; 1012130E
>	v_mul_f32_e32 v20, v14, v20                                     ; 1028290E
>	v_mul_f32_e32 v21, v14, v21                                     ; 102A2B0E
>	v_mul_f32_e32 v22, v9, v10                                      ; 102C1509
>	v_mov_b32_e32 v9, 0x3eaaaa9f                                    ; 7E1202FF 3EAAAA9F
>	v_mul_f32_e32 v20, v20, v10                                     ; 10281514
>	v_mul_f32_e32 v21, v21, v10                                     ; 102A1515
>	v_mul_f32_e32 v10, v9, v34                                      ; 10144509
>	v_mac_f32_e32 v10, v9, v35                                      ; 3E144709
>	v_mac_f32_e32 v10, v9, v36                                      ; 3E144909
>	v_sub_f32_e32 v9, 1.0, v10                                      ; 081214F2
>	v_mul_f32_e32 v10, v27, v24                                     ; 1014311B
>	v_mul_f32_e32 v24, v27, v26                                     ; 1030351B
>	v_add_f32_e64 v26, v52, 0 clamp                                 ; D206081A 00010134
>	v_log_f32_e32 v26, v26                                          ; 7E344F1A
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v10, 4.0, v10                                     ; 101414F6
>	v_mul_f32_e32 v23, v27, v25                                     ; 102E331B
>	v_mul_legacy_f32_e32 v26, 0x40400000, v26                       ; 0E3434FF 40400000
>	v_exp_f32_e32 v26, v26                                          ; 7E344B1A
>	v_mul_f32_e32 v25, v10, v9                                      ; 1032130A
>	v_mul_f32_e32 v10, v9, v20                                      ; 10142909
>	v_mac_f32_e32 v10, v55, v25                                     ; 3E143337
>	v_mad_f32 v25, -v38, v51, 1.0                                   ; D2820019 23CA6726
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_mac_f32_e32 v28, v46, v31                                     ; 3E383F2E
>	v_mad_f32 v25, -s15, v50, v25                                   ; D2820019 2466640F
>	v_mov_b32_e32 v27, v26                                          ; 7E36031A
>	v_sub_f32_e32 v28, 1.0, v28                                     ; 083838F2
>	v_mac_f32_e32 v27, 0xbe99999a, v39                              ; 3E364EFF BE99999A
>	v_mac_f32_e32 v25, 0x41a00000, v39                              ; 3E324EFF 41A00000
>	v_mul_f32_e32 v25, v25, v27                                     ; 10323719
>	s_buffer_load_dword s12, s[0:3], 0xa0                           ; C20601A0
>	s_buffer_load_dword s13, s[0:3], 0xa1                           ; C20681A1
>	s_buffer_load_dword s14, s[0:3], 0xa2                           ; C20701A2
>	v_add_f32_e32 v27, 1.0, v29                                     ; 06363AF2
>	v_add_f32_e64 v28, v28, 0 clamp                                 ; D206081C 0001011C
>	v_mul_f32_e32 v20, 4.0, v23                                     ; 10282EF6
>	v_subrev_f32_e32 v27, v28, v27                                  ; 0A36371C
>	v_mul_f32_e32 v23, v20, v9                                      ; 102E1314
>	v_mul_f32_e32 v20, v9, v21                                      ; 10282B09
>	v_add_f32_e64 v27, v27, 0 clamp                                 ; D206081B 0001011B
>	v_mul_f32_e32 v21, 4.0, v24                                     ; 102A30F6
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	v_sub_f32_e32 v28, 1.0, v27                                     ; 083836F2
>	v_mac_f32_e32 v49, v42, v45                                     ; 3E625B2A
>	v_mac_f32_e32 v20, v55, v23                                     ; 3E282F37
>	v_mul_f32_e32 v23, v21, v9                                      ; 102E1315
>	v_mul_f32_e32 v21, v9, v22                                      ; 102A2D09
>	v_mac_f32_e32 v48, v42, v44                                     ; 3E60592A
>	v_mad_f32 v22, -v50, v47, v47                                   ; D2820016 24BE5F32
>	v_mad_f32 v24, -v50, v49, v49                                   ; D2820018 24C66332
>	v_mac_f32_e32 v21, v55, v23                                     ; 3E2A2F37
>	v_mad_f32 v23, -v50, v48, v48                                   ; D2820017 24C26132
>	v_mul_f32_e32 v25, v25, v26                                     ; 10323519
>	v_mad_f32 v27, -v27, v28, v28                                   ; D282001B 2472391B
>	v_mul_f32_e32 v25, v27, v25                                     ; 1032331B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v22, s12, v50                                     ; 3E2C640C
>	v_mac_f32_e32 v23, s13, v50                                     ; 3E2E640D
>	v_mac_f32_e32 v24, s14, v50                                     ; 3E30640E
>	v_mul_f32_e32 v26, v32, v30                                     ; 10343D20
>	v_mov_b32_e32 v27, 0xc8                                         ; 7E3602FF 000000C8
>	v_mov_b32_e32 v28, 0                                            ; 7E380280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v29, vcc, 0xffffffe8, v27                         ; 4A3A36FF FFFFFFE8
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, 0xffffffec, v27                         ; 4A3C36FF FFFFFFEC
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v31, vcc, -16, v27                                ; 4A3E36D0
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v28, vcc, 1, v28                                  ; 4A383881
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v29, v7, v29                                   ; 0A3A3B07
>	v_mul_f32_e32 v32, v29, v29                                     ; 10403B1D
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v30, v0, v30                                   ; 0A3C3D00
>	v_mac_f32_e32 v32, v30, v30                                     ; 3E403D1E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_subrev_f32_e32 v31, v8, v31                                   ; 0A3E3F08
>	v_mac_f32_e32 v32, v31, v31                                     ; 3E403F1F
>	v_rsq_f32_e32 v33, v32                                          ; 7E425D20
>	v_mul_f32_e32 v29, v33, v29                                     ; 103A3B21
>	v_mul_f32_e32 v34, v16, v29                                     ; 10443B10
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mac_f32_e32 v34, v15, v30                                     ; 3E443D0F
>	v_mac_f32_e32 v34, v5, v31                                      ; 3E443F05
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_subrev_f32_e32 v34, v34, v26                                  ; 0A443522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_sub_f32_e32 v35, 1.0, v33                                     ; 084642F2
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mac_f32_e32 v33, v35, v34                                     ; 3E424523
>	v_add_i32_e32 v34, vcc, -12, v27                                ; 4A4436CC
>	buffer_load_dword v34, v34, s[0:3], 0 offen                     ; E0301000 80002222
>	v_mul_f32_e32 v29, v11, v29                                     ; 103A3B0B
>	v_mac_f32_e32 v29, v12, v30                                     ; 3E3A3D0C
>	v_mac_f32_e32 v29, v4, v31                                      ; 3E3A3F04
>	v_add_i32_e32 v30, vcc, -8, v27                                 ; 4A3C36C8
>	v_add_i32_e32 v31, vcc, -4, v27                                 ; 4A3E36C4
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_f32_e64 v29, v29, 0 clamp                                 ; D206081D 0001011D
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mul_f32_e32 v32, v34, v32                                     ; 10404122
>	buffer_load_dword v34, v27, s[0:3], 0 offen                     ; E0301000 8000221B
>	v_add_f32_e64 v32, v32, 0 clamp                                 ; D2060820 00010120
>	v_add_i32_e32 v27, vcc, 32, v27                                 ; 4A3636A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v30, -v32, v30, v30                                   ; D282001E 247A3D20
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mad_f32 v31, -v32, v31, v31                                   ; D282001F 247E3F20
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mul_f32_e32 v30, v14, v30                                     ; 103C3D0E
>	v_mul_f32_e32 v31, v14, v31                                     ; 103E3F0E
>	v_mul_f32_e32 v30, v30, v29                                     ; 103C3B1E
>	v_mul_f32_e32 v31, v31, v29                                     ; 103E3B1F
>	v_mac_f32_e32 v10, v9, v30                                      ; 3E143D09
>	v_mac_f32_e32 v20, v9, v31                                      ; 3E283F09
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v32, -v32, v34, v34                                   ; D2820020 248A4520
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mul_f32_e32 v32, v14, v32                                     ; 1040410E
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v21, v9, v29                                      ; 3E2A3B09
>	v_cmp_lt_i32_e32 vcc, 2, v28                                    ; 7D023882
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s8, s[0:3], 0x47                            ; C2040147
>	s_buffer_load_dword s9, s[0:3], 0x4b                            ; C204814B
>	s_buffer_load_dword s12, s[0:3], 0x4f                           ; C206014F
>	s_buffer_load_dword s14, s[0:3], 0x53                           ; C2070153
>	s_buffer_load_dword s13, s[0:3], 0x52                           ; C2068152
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v7, s8, v7                                        ; 080E0E08
>	v_sub_f32_e32 v27, s9, v0                                       ; 08360009
>	v_mul_f32_e32 v28, v7, v7                                       ; 10380F07
>	v_sub_f32_e32 v8, s12, v8                                       ; 0810100C
>	v_mac_f32_e32 v28, v27, v27                                     ; 3E38371B
>	v_mac_f32_e32 v28, v8, v8                                       ; 3E381108
>	v_sqrt_f32_e32 v29, v28                                         ; 7E3A671C
>	v_rsq_f32_e32 v28, v28                                          ; 7E385D1C
>	v_mov_b32_e32 v31, s14                                          ; 7E3E020E
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_mac_f32_e32 v31, s13, v29                                     ; 3E3E3A0D
>	v_interp_p1_f32 v29, v6, 2, 1, [m0]                             ; C8740606
>	v_mul_f32_e32 v30, v28, v7                                      ; 103C0F1C
>	v_interp_p2_f32 v29, [v29], v3, 2, 1, [m0]                      ; C8750603
>	v_interp_p1_f32 v7, v6, 0, 1, [m0]                              ; C81C0406
>	v_mul_f32_e32 v27, v28, v27                                     ; 1036371C
>	v_mul_f32_e32 v28, v28, v8                                      ; 1038111C
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]                        ; C81D0403
>	v_interp_p1_f32 v8, v6, 1, 1, [m0]                              ; C8200506
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]                        ; C8210503
>	v_interp_p1_f32 v32, v6, 3, 1, [m0]                             ; C8800706
>	v_interp_p2_f32 v32, [v32], v3, 3, 1, [m0]                      ; C8810703
>	v_mov_b32_e32 v33, 0x6f800000                                   ; 7E4202FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v33, |v32|                                ; D002026A 00024121
>	v_mov_b32_e32 v33, 0x2f800000                                   ; 7E4202FF 2F800000
>	v_cndmask_b32_e32 v33, 1.0, v33, vcc                            ; 004242F2
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_rcp_f32_e32 v32, v32                                          ; 7E405520
>	s_load_dwordx8 s[12:19], s[4:5], 0x30                           ; C0C60530
>	s_load_dwordx4 s[20:23], s[4:5], 0x3c                           ; C08A053C
>	v_mul_f32_e32 v7, v32, v7                                       ; 100E0F20
>	v_mul_f32_e32 v8, v32, v8                                       ; 10101120
>	v_mul_f32_e32 v7, v7, v33                                       ; 100E4307
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_mul_f32_e32 v8, v8, v33                                       ; 10104308
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	image_sample v7, v[7:8], s[12:19], s[20:23] dmask:0x8           ; F0800800 00A30707
>	v_mul_f32_e32 v8, v16, v30                                      ; 10103D10
>	v_mac_f32_e32 v8, v15, v27                                      ; 3E10370F
>	v_mac_f32_e32 v8, v5, v28                                       ; 3E103905
>	v_mul_f32_e32 v5, v11, v30                                      ; 100A3D0B
>	v_mac_f32_e32 v5, v12, v27                                      ; 3E0A370C
>	s_load_dwordx8 s[12:19], s[4:5], 0xa0                           ; C0C605A0
>	s_load_dwordx4 s[4:7], s[4:5], 0xac                             ; C08205AC
>	v_mac_f32_e32 v5, v4, v28                                       ; 3E0A3904
>	v_add_f32_e64 v4, v8, 0 clamp                                   ; D2060804 00010108
>	v_subrev_f32_e32 v4, v4, v26                                    ; 0A083504
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	v_mul_f32_e32 v4, v4, v4                                        ; 10080904
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	v_mul_f32_e32 v4, v14, v4                                       ; 1008090E
>	image_sample v[14:16], v[1:2], s[12:19], s[4:7] dmask:0x7       ; F0800700 00230E01
>	s_buffer_load_dword s4, s[0:3], 0xac                            ; C20201AC
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v14                               ; 10021CFF 3E99999A
>	v_mac_f32_e32 v1, 0x3f170a3d, v15                               ; 3E021EFF 3F170A3D
>	v_mac_f32_e32 v1, 0x3de147ae, v16                               ; 3E0220FF 3DE147AE
>	v_add_f32_e32 v11, -0.5, v31                                    ; 06163EF1
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v1, s4, v1                                        ; 10020204
>	s_buffer_load_dword s4, s[0:3], 0x54                            ; C2020154
>	s_buffer_load_dword s5, s[0:3], 0x55                            ; C2028155
>	s_buffer_load_dword s6, s[0:3], 0x56                            ; C2030156
>	v_mad_f32 v11, v11, -2.0, 1.0                                   ; D282000B 03C9EB0B
>	v_mul_f32_e32 v7, v7, v7                                        ; 100E0F07
>	v_add_f32_e64 v11, v11, 0 clamp                                 ; D206080B 0001010B
>	v_mul_f32_e32 v7, v11, v7                                       ; 100E0F0B
>	v_add_f32_e64 v11, v29, 0 clamp                                 ; D206080B 0001011D
>	v_mul_f32_e32 v7, v11, v7                                       ; 100E0F0B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v11, s4, v7                                       ; 10160E04
>	v_mul_f32_e32 v12, s5, v7                                       ; 10180E05
>	v_mul_f32_e32 v7, s6, v7                                        ; 100E0E06
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mul_f32_e32 v11, v4, v11                                      ; 10161704
>	v_mul_f32_e32 v12, v4, v12                                      ; 10181904
>	v_mul_f32_e32 v4, v4, v7                                        ; 10080F04
>	v_add_f32_e64 v5, v5, 0 clamp                                   ; D2060805 00010105
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v7, v11, v5                                       ; 100E0B0B
>	v_mul_f32_e32 v4, v4, v5                                        ; 10080B04
>	v_mul_f32_e32 v11, v12, v5                                      ; 10160B0C
>	v_mac_f32_e32 v10, v9, v7                                       ; 3E140F09
>	v_mac_f32_e32 v21, v9, v4                                       ; 3E2A0909
>	v_mul_f32_e32 v4, v25, v17                                      ; 10082319
>	v_mac_f32_e32 v20, v9, v11                                      ; 3E281709
>	v_mul_f32_e32 v2, v1, v14                                       ; 10041D01
>	v_mac_f32_e32 v4, v22, v10                                      ; 3E081516
>	v_mov_b32_e32 v9, 0x42000000                                    ; 7E1202FF 42000000
>	v_mac_f32_e32 v4, v9, v2                                        ; 3E080509
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v7, v25, v19                                      ; 100E2719
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v8, v1, v15                                       ; 10101F01
>	v_mul_f32_e32 v1, v1, v16                                       ; 10022101
>	v_mac_f32_e32 v7, v24, v21                                      ; 3E0E2B18
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v7, v9, v1                                        ; 3E0E0309
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	v_interp_p1_f32 v1, v6, 0, 3, [m0]                              ; C8040C06
>	v_mul_f32_e32 v5, v25, v18                                      ; 100A2519
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mac_f32_e32 v5, v23, v20                                      ; 3E0A2917
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 3, [m0]                        ; C8050C03
>	v_mac_f32_e32 v5, v9, v8                                        ; 3E0A1109
>	v_mul_f32_e32 v8, v0, v1                                        ; 10100300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v8, s6, s6                                       ; D2820000 20180D08
>	v_mac_f32_e32 v0, v8, v4                                        ; 3E000908
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_mad_f32 v1, -v8, s7, s7                                       ; D2820001 201C0F08
>	v_mad_f32 v2, -v8, s0, s0                                       ; D2820002 20000108
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mac_f32_e32 v1, v8, v5                                        ; 3E020B08
>	v_mac_f32_e32 v2, v8, v7                                        ; 3E040F08
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 56
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 3244 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 4
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6].x, GENERIC[5]
>DCL CONST[0..231]
>DCL TEMP[0..10], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>IMM[2] FLT32 {    0.5000,     0.0000,     0.0000,     0.0000}
>  0: F2I TEMP[0], IN[4]
>  1: MOV TEMP[1].w, IN[0].wwww
>  2: MAD TEMP[2].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  3: MAD TEMP[3], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  4: MUL TEMP[1].xyz, IN[0].xyzz, CONST[231].zzzz
>  5: MOV TEMP[4].xyz, IMM[0].zzzz
>  6: MOV TEMP[4].w, CONST[4].xxxx
>  7: MOV TEMP[5].xyz, IMM[0].zzzz
>  8: MOV TEMP[5].w, CONST[4].yyyy
>  9: MOV TEMP[6].xyz, IMM[0].zzzz
> 10: MOV TEMP[6].w, CONST[4].zzzz
> 11: NOT TEMP[7].x, CONST[227].xxxx
> 12: UIF TEMP[7].xxxx :0
> 13:   ADD TEMP[7], CONST[11], -TEMP[4]
> 14:   ADD TEMP[8], CONST[12], -TEMP[5]
> 15:   ADD TEMP[9], CONST[13], -TEMP[6]
> 16: ELSE :0
> 17:   NOT TEMP[10].x, CONST[228].xxxx
> 18:   UIF TEMP[10].xxxx :0
> 19:     UMUL TEMP[10].x, TEMP[0].xxxx, IMM[1].xxxx
> 20:     UARL ADDR[0].x, TEMP[10].xxxx
> 21:     UARL ADDR[0].x, TEMP[10].xxxx
> 22:     ADD TEMP[7], CONST[ADDR[0].x+11], -TEMP[4]
> 23:     UMAD TEMP[10].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 24:     UARL ADDR[0].x, TEMP[10].xxxx
> 25:     UARL ADDR[0].x, TEMP[10].xxxx
> 26:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[5]
> 27:     UMAD TEMP[10].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 28:     UARL ADDR[0].x, TEMP[10].xxxx
> 29:     UARL ADDR[0].x, TEMP[10].xxxx
> 30:     ADD TEMP[9], CONST[ADDR[0].x+11], -TEMP[6]
> 31:   ELSE :0
> 32:     UMUL TEMP[10].x, TEMP[0].xxxx, IMM[1].xxxx
> 33:     UARL ADDR[0].x, TEMP[10].xxxx
> 34:     ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[4]
> 35:     MUL TEMP[7], TEMP[10], IN[3].xxxx
> 36:     UMAD TEMP[10].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 37:     UARL ADDR[0].x, TEMP[10].xxxx
> 38:     ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[5]
> 39:     MUL TEMP[8], TEMP[10], IN[3].xxxx
> 40:     UMAD TEMP[10].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 41:     UARL ADDR[0].x, TEMP[10].xxxx
> 42:     ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[6]
> 43:     MUL TEMP[9], TEMP[10], IN[3].xxxx
> 44:     UMUL TEMP[10].x, TEMP[0].yyyy, IMM[1].xxxx
> 45:     UARL ADDR[0].x, TEMP[10].xxxx
> 46:     ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[4]
> 47:     MAD TEMP[7], TEMP[10], IN[3].yyyy, TEMP[7]
> 48:     UMAD TEMP[10].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 49:     UARL ADDR[0].x, TEMP[10].xxxx
> 50:     ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[5]
> 51:     MAD TEMP[8], TEMP[10], IN[3].yyyy, TEMP[8]
> 52:     UMAD TEMP[10].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 53:     UARL ADDR[0].x, TEMP[10].xxxx
> 54:     ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[6]
> 55:     MAD TEMP[9], TEMP[10], IN[3].yyyy, TEMP[9]
> 56:     UIF CONST[229].xxxx :0
> 57:       UMUL TEMP[10].x, TEMP[0].zzzz, IMM[1].xxxx
> 58:       UARL ADDR[0].x, TEMP[10].xxxx
> 59:       ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[4]
> 60:       MAD TEMP[7], TEMP[10], IN[3].zzzz, TEMP[7]
> 61:       UMAD TEMP[10].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 62:       UARL ADDR[0].x, TEMP[10].xxxx
> 63:       ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[5]
> 64:       MAD TEMP[8], TEMP[10], IN[3].zzzz, TEMP[8]
> 65:       UMAD TEMP[10].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 66:       UARL ADDR[0].x, TEMP[10].xxxx
> 67:       ADD TEMP[10], CONST[ADDR[0].x+11], -TEMP[6]
> 68:       MAD TEMP[9], TEMP[10], IN[3].zzzz, TEMP[9]
> 69:     ENDIF
> 70:     UIF CONST[230].xxxx :0
> 71:       UMUL TEMP[10].x, TEMP[0].wwww, IMM[1].xxxx
> 72:       UARL ADDR[0].x, TEMP[10].xxxx
> 73:       ADD TEMP[4], CONST[ADDR[0].x+11], -TEMP[4]
> 74:       MAD TEMP[7], TEMP[4], IN[3].wwww, TEMP[7]
> 75:       UMAD TEMP[4].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 76:       UARL ADDR[0].x, TEMP[4].xxxx
> 77:       ADD TEMP[4], CONST[ADDR[0].x+11], -TEMP[5]
> 78:       MAD TEMP[8], TEMP[4], IN[3].wwww, TEMP[8]
> 79:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 80:       UARL ADDR[0].x, TEMP[0].xxxx
> 81:       ADD TEMP[0], CONST[ADDR[0].x+11], -TEMP[6]
> 82:       MAD TEMP[9], TEMP[0], IN[3].wwww, TEMP[9]
> 83:     ENDIF
> 84:   ENDIF
> 85: ENDIF
> 86: DP4 TEMP[0].x, TEMP[1], TEMP[7]
> 87: DP4 TEMP[4].x, TEMP[1], TEMP[8]
> 88: MOV TEMP[0].y, TEMP[4].xxxx
> 89: DP4 TEMP[4].x, TEMP[1], TEMP[9]
> 90: MOV TEMP[0].z, TEMP[4].xxxx
> 91: DP4 TEMP[1].x, TEMP[1], IMM[0].zzzw
> 92: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 93: DP3 TEMP[4].x, TEMP[2].xyzz, TEMP[7].xyzz
> 94: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[8].xyzz
> 95: MOV TEMP[4].y, TEMP[5].xxxx
> 96: DP3 TEMP[2].x, TEMP[2].xyzz, TEMP[9].xyzz
> 97: MOV TEMP[4].z, TEMP[2].xxxx
> 98: DP3 TEMP[5].x, TEMP[3].xyzz, TEMP[7].xyzz
> 99: DP3 TEMP[6].x, TEMP[3].xyzz, TEMP[8].xyzz
>100: MOV TEMP[5].y, TEMP[6].xxxx
>101: DP3 TEMP[6].x, TEMP[3].xyzz, TEMP[9].xyzz
>102: MOV TEMP[5].z, TEMP[6].xxxx
>103: MUL TEMP[6], CONST[0], TEMP[0].xxxx
>104: MAD TEMP[6], CONST[1], TEMP[0].yyyy, TEMP[6]
>105: MAD TEMP[6], CONST[2], TEMP[0].zzzz, TEMP[6]
>106: MAD TEMP[1], CONST[3], TEMP[1].xxxx, TEMP[6]
>107: MOV TEMP[6].xyz, TEMP[0].xyzx
>108: MUL TEMP[7].x, TEMP[1].wwww, CONST[6].wwww
>109: MOV TEMP[6].w, TEMP[7].xxxx
>110: MOV TEMP[7].x, CONST[7].wwww
>111: MOV TEMP[7].y, CONST[8].wwww
>112: MOV TEMP[7].z, CONST[9].wwww
>113: ADD TEMP[0].xyz, TEMP[0].xyzz, -TEMP[7].xyzz
>114: MUL TEMP[7].xyz, CONST[7].xyzz, TEMP[0].xxxx
>115: MAD TEMP[7].xyz, CONST[8].xyzz, TEMP[0].yyyy, TEMP[7].xyzz
>116: MAD TEMP[0].xyz, CONST[9].xyzz, TEMP[0].zzzz, TEMP[7].xyzz
>117: MOV TEMP[7].w, TEMP[0].zzzz
>118: MUL TEMP[8].xy, TEMP[0].xyyy, CONST[10].xyyy
>119: MAD TEMP[7].xy, IMM[2].xxxx, TEMP[0].zzzz, TEMP[8].xyyy
>120: MAD TEMP[0].x, TEMP[0].zzzz, CONST[10].zzzz, CONST[10].wwww
>121: MOV TEMP[7].z, TEMP[0].xxxx
>122: MAD TEMP[0].x, TEMP[1].zzzz, CONST[5].yyyy, CONST[5].xxxx
>123: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>124: POW TEMP[0].x, TEMP[0].xxxx, CONST[5].zzzz
>125: ADD TEMP[8].x, IMM[0].wwww, -CONST[5].wwww
>126: MAD TEMP[0].x, CONST[5].wwww, TEMP[0].xxxx, TEMP[8].xxxx
>127: MUL TEMP[8].xyz, TEMP[4].zxyy, TEMP[5].yzxx
>128: MAD TEMP[8].xyz, TEMP[4].yzxx, TEMP[5].zxyy, -TEMP[8].xyzz
>129: MUL TEMP[3].xyz, TEMP[8].xyzz, TEMP[3].wwww
>130: MOV TEMP[5].xyz, TEMP[5].xyzx
>131: MOV TEMP[5].w, TEMP[3].xxxx
>132: MOV TEMP[3].xy, TEMP[3].yzyy
>133: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
>134: MOV TEMP[0].z, TEMP[0].xxxx
>135: MOV TEMP[0].xy, IN[5].xyxx
>136: MOV TEMP[3].zw, TEMP[4].yyxy
>137: MOV OUT[1], TEMP[6]
>138: MOV OUT[5], TEMP[3]
>139: MOV OUT[0], TEMP[1]
>140: MOV OUT[4], TEMP[5]
>141: MOV OUT[3].xyz, TEMP[0].xyzx
>142: MOV OUT[6].x, TEMP[2].xxxx
>143: MOV OUT[2], TEMP[7]
>144: END
>radeonsi: Compiling shader 119
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %20 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, align 16, !invariant.load !0
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %21, i32 0, i32 %14)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = extractelement <4 x float> %22, i32 1
>  %25 = extractelement <4 x float> %22, i32 2
>  %26 = extractelement <4 x float> %22, i32 3
>  %27 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %28 = load <16 x i8>, <16 x i8> addrspace(2)* %27, align 16, !invariant.load !0
>  %29 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %28, i32 0, i32 %15)
>  %30 = extractelement <4 x float> %29, i32 0
>  %31 = extractelement <4 x float> %29, i32 1
>  %32 = extractelement <4 x float> %29, i32 2
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %34, i32 0, i32 %16)
>  %36 = extractelement <4 x float> %35, i32 0
>  %37 = extractelement <4 x float> %35, i32 1
>  %38 = extractelement <4 x float> %35, i32 2
>  %39 = extractelement <4 x float> %35, i32 3
>  %40 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %41 = load <16 x i8>, <16 x i8> addrspace(2)* %40, align 16, !invariant.load !0
>  %42 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %41, i32 0, i32 %17)
>  %43 = extractelement <4 x float> %42, i32 0
>  %44 = extractelement <4 x float> %42, i32 1
>  %45 = extractelement <4 x float> %42, i32 2
>  %46 = extractelement <4 x float> %42, i32 3
>  %47 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %48 = load <16 x i8>, <16 x i8> addrspace(2)* %47, align 16, !invariant.load !0
>  %49 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %48, i32 0, i32 %18)
>  %50 = extractelement <4 x float> %49, i32 0
>  %51 = extractelement <4 x float> %49, i32 1
>  %52 = extractelement <4 x float> %49, i32 2
>  %53 = extractelement <4 x float> %49, i32 3
>  %54 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 5, !amdgpu.uniform !0
>  %55 = load <16 x i8>, <16 x i8> addrspace(2)* %54, align 16, !invariant.load !0
>  %56 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %55, i32 0, i32 %19)
>  %57 = extractelement <4 x float> %56, i32 0
>  %58 = extractelement <4 x float> %56, i32 1
>  %59 = fptosi float %50 to i32
>  %60 = fptosi float %51 to i32
>  %61 = fptosi float %52 to i32
>  %62 = fptosi float %53 to i32
>  %63 = fmul float %30, 2.000000e+00
>  %64 = fadd float %63, -1.000000e+00
>  %65 = fmul float %31, 2.000000e+00
>  %66 = fadd float %65, -1.000000e+00
>  %67 = fmul float %32, 2.000000e+00
>  %68 = fadd float %67, -1.000000e+00
>  %69 = fmul float %36, 2.000000e+00
>  %70 = fadd float %69, -1.000000e+00
>  %71 = fmul float %37, 2.000000e+00
>  %72 = fadd float %71, -1.000000e+00
>  %73 = fmul float %38, 2.000000e+00
>  %74 = fadd float %73, -1.000000e+00
>  %75 = fmul float %39, 2.000000e+00
>  %76 = fadd float %75, -1.000000e+00
>  %77 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %78 = load <16 x i8>, <16 x i8> addrspace(2)* %77, align 16, !invariant.load !0
>  %79 = call float @llvm.SI.load.const(<16 x i8> %78, i32 3704)
>  %80 = fmul float %23, %79
>  %81 = call float @llvm.SI.load.const(<16 x i8> %78, i32 3704)
>  %82 = fmul float %24, %81
>  %83 = call float @llvm.SI.load.const(<16 x i8> %78, i32 3704)
>  %84 = fmul float %25, %83
>  %85 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %86 = load <16 x i8>, <16 x i8> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = call float @llvm.SI.load.const(<16 x i8> %86, i32 64)
>  %88 = call float @llvm.SI.load.const(<16 x i8> %86, i32 68)
>  %89 = call float @llvm.SI.load.const(<16 x i8> %86, i32 72)
>  %90 = call float @llvm.SI.load.const(<16 x i8> %86, i32 3632)
>  %91 = bitcast float %90 to i32
>  %92 = icmp eq i32 %91, -1
>  %93 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %94 = load <16 x i8>, <16 x i8> addrspace(2)* %93, align 16, !invariant.load !0
>  br i1 %92, label %else16, label %if12
>
>if12:                                             ; preds = %main_body
>  %95 = call float @llvm.SI.load.const(<16 x i8> %94, i32 176)
>  %96 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %97 = load <16 x i8>, <16 x i8> addrspace(2)* %96, align 16, !invariant.load !0
>  %98 = call float @llvm.SI.load.const(<16 x i8> %97, i32 180)
>  %99 = call float @llvm.SI.load.const(<16 x i8> %97, i32 184)
>  %100 = call float @llvm.SI.load.const(<16 x i8> %97, i32 188)
>  %101 = fsub float %100, %87
>  %102 = call float @llvm.SI.load.const(<16 x i8> %97, i32 192)
>  %103 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %104 = load <16 x i8>, <16 x i8> addrspace(2)* %103, align 16, !invariant.load !0
>  %105 = call float @llvm.SI.load.const(<16 x i8> %104, i32 196)
>  %106 = call float @llvm.SI.load.const(<16 x i8> %104, i32 200)
>  %107 = call float @llvm.SI.load.const(<16 x i8> %104, i32 204)
>  %108 = fsub float %107, %88
>  %109 = call float @llvm.SI.load.const(<16 x i8> %104, i32 208)
>  %110 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %111 = load <16 x i8>, <16 x i8> addrspace(2)* %110, align 16, !invariant.load !0
>  %112 = call float @llvm.SI.load.const(<16 x i8> %111, i32 212)
>  %113 = call float @llvm.SI.load.const(<16 x i8> %111, i32 216)
>  %114 = call float @llvm.SI.load.const(<16 x i8> %111, i32 220)
>  %115 = fsub float %114, %89
>  br label %endif85
>
>else16:                                           ; preds = %main_body
>  %116 = call float @llvm.SI.load.const(<16 x i8> %94, i32 3648)
>  %117 = bitcast float %116 to i32
>  %118 = icmp eq i32 %117, -1
>  %119 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %120 = load <16 x i8>, <16 x i8> addrspace(2)* %119, align 16, !invariant.load !0
>  %121 = mul i32 %59, 48
>  %122 = add i32 %121, 176
>  %123 = call float @llvm.SI.load.const(<16 x i8> %120, i32 %122)
>  %124 = mul i32 %59, 48
>  %125 = add i32 %124, 180
>  %126 = call float @llvm.SI.load.const(<16 x i8> %120, i32 %125)
>  %127 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %128 = load <16 x i8>, <16 x i8> addrspace(2)* %127, align 16, !invariant.load !0
>  %129 = mul i32 %59, 48
>  %130 = add i32 %129, 184
>  %131 = call float @llvm.SI.load.const(<16 x i8> %128, i32 %130)
>  %132 = mul i32 %59, 48
>  %133 = add i32 %132, 188
>  %134 = call float @llvm.SI.load.const(<16 x i8> %128, i32 %133)
>  %135 = fsub float %134, %87
>  br i1 %118, label %else31, label %if18
>
>if18:                                             ; preds = %else16
>  %136 = mul i32 %59, 3
>  %137 = add i32 %136, 1
>  %138 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %139 = load <16 x i8>, <16 x i8> addrspace(2)* %138, align 16, !invariant.load !0
>  %140 = shl i32 %137, 4
>  %141 = add i32 %140, 176
>  %142 = call float @llvm.SI.load.const(<16 x i8> %139, i32 %141)
>  %143 = shl i32 %137, 4
>  %144 = add i32 %143, 180
>  %145 = call float @llvm.SI.load.const(<16 x i8> %139, i32 %144)
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = shl i32 %137, 4
>  %149 = add i32 %148, 184
>  %150 = call float @llvm.SI.load.const(<16 x i8> %147, i32 %149)
>  %151 = shl i32 %137, 4
>  %152 = add i32 %151, 188
>  %153 = call float @llvm.SI.load.const(<16 x i8> %147, i32 %152)
>  %154 = fsub float %153, %88
>  %155 = mul i32 %59, 3
>  %156 = add i32 %155, 2
>  %157 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %158 = load <16 x i8>, <16 x i8> addrspace(2)* %157, align 16, !invariant.load !0
>  %159 = shl i32 %156, 4
>  %160 = add i32 %159, 176
>  %161 = call float @llvm.SI.load.const(<16 x i8> %158, i32 %160)
>  %162 = shl i32 %156, 4
>  %163 = add i32 %162, 180
>  %164 = call float @llvm.SI.load.const(<16 x i8> %158, i32 %163)
>  %165 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %166 = load <16 x i8>, <16 x i8> addrspace(2)* %165, align 16, !invariant.load !0
>  %167 = shl i32 %156, 4
>  %168 = add i32 %167, 184
>  %169 = call float @llvm.SI.load.const(<16 x i8> %166, i32 %168)
>  %170 = shl i32 %156, 4
>  %171 = add i32 %170, 188
>  %172 = call float @llvm.SI.load.const(<16 x i8> %166, i32 %171)
>  %173 = fsub float %172, %89
>  br label %endif85
>
>else31:                                           ; preds = %else16
>  %174 = fmul float %123, %43
>  %175 = fmul float %126, %43
>  %176 = fmul float %131, %43
>  %177 = fmul float %135, %43
>  %178 = mul i32 %59, 3
>  %179 = add i32 %178, 1
>  %180 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %181 = load <16 x i8>, <16 x i8> addrspace(2)* %180, align 16, !invariant.load !0
>  %182 = shl i32 %179, 4
>  %183 = add i32 %182, 176
>  %184 = call float @llvm.SI.load.const(<16 x i8> %181, i32 %183)
>  %185 = shl i32 %179, 4
>  %186 = add i32 %185, 180
>  %187 = call float @llvm.SI.load.const(<16 x i8> %181, i32 %186)
>  %188 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %189 = load <16 x i8>, <16 x i8> addrspace(2)* %188, align 16, !invariant.load !0
>  %190 = shl i32 %179, 4
>  %191 = add i32 %190, 184
>  %192 = call float @llvm.SI.load.const(<16 x i8> %189, i32 %191)
>  %193 = shl i32 %179, 4
>  %194 = add i32 %193, 188
>  %195 = call float @llvm.SI.load.const(<16 x i8> %189, i32 %194)
>  %196 = fsub float %195, %88
>  %197 = fmul float %184, %43
>  %198 = fmul float %187, %43
>  %199 = fmul float %192, %43
>  %200 = fmul float %196, %43
>  %201 = mul i32 %59, 3
>  %202 = add i32 %201, 2
>  %203 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %204 = load <16 x i8>, <16 x i8> addrspace(2)* %203, align 16, !invariant.load !0
>  %205 = shl i32 %202, 4
>  %206 = add i32 %205, 176
>  %207 = call float @llvm.SI.load.const(<16 x i8> %204, i32 %206)
>  %208 = shl i32 %202, 4
>  %209 = add i32 %208, 180
>  %210 = call float @llvm.SI.load.const(<16 x i8> %204, i32 %209)
>  %211 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %212 = load <16 x i8>, <16 x i8> addrspace(2)* %211, align 16, !invariant.load !0
>  %213 = shl i32 %202, 4
>  %214 = add i32 %213, 184
>  %215 = call float @llvm.SI.load.const(<16 x i8> %212, i32 %214)
>  %216 = shl i32 %202, 4
>  %217 = add i32 %216, 188
>  %218 = call float @llvm.SI.load.const(<16 x i8> %212, i32 %217)
>  %219 = fsub float %218, %89
>  %220 = fmul float %207, %43
>  %221 = fmul float %210, %43
>  %222 = fmul float %215, %43
>  %223 = fmul float %219, %43
>  %224 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %225 = load <16 x i8>, <16 x i8> addrspace(2)* %224, align 16, !invariant.load !0
>  %226 = mul i32 %60, 48
>  %227 = add i32 %226, 176
>  %228 = call float @llvm.SI.load.const(<16 x i8> %225, i32 %227)
>  %229 = mul i32 %60, 48
>  %230 = add i32 %229, 180
>  %231 = call float @llvm.SI.load.const(<16 x i8> %225, i32 %230)
>  %232 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %233 = load <16 x i8>, <16 x i8> addrspace(2)* %232, align 16, !invariant.load !0
>  %234 = mul i32 %60, 48
>  %235 = add i32 %234, 184
>  %236 = call float @llvm.SI.load.const(<16 x i8> %233, i32 %235)
>  %237 = mul i32 %60, 48
>  %238 = add i32 %237, 188
>  %239 = call float @llvm.SI.load.const(<16 x i8> %233, i32 %238)
>  %240 = fsub float %239, %87
>  %241 = fmul float %228, %44
>  %242 = fadd float %241, %174
>  %243 = fmul float %231, %44
>  %244 = fadd float %243, %175
>  %245 = fmul float %236, %44
>  %246 = fadd float %245, %176
>  %247 = fmul float %240, %44
>  %248 = fadd float %247, %177
>  %249 = mul i32 %60, 3
>  %250 = add i32 %249, 1
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = shl i32 %250, 4
>  %254 = add i32 %253, 176
>  %255 = call float @llvm.SI.load.const(<16 x i8> %252, i32 %254)
>  %256 = shl i32 %250, 4
>  %257 = add i32 %256, 180
>  %258 = call float @llvm.SI.load.const(<16 x i8> %252, i32 %257)
>  %259 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %260 = load <16 x i8>, <16 x i8> addrspace(2)* %259, align 16, !invariant.load !0
>  %261 = shl i32 %250, 4
>  %262 = add i32 %261, 184
>  %263 = call float @llvm.SI.load.const(<16 x i8> %260, i32 %262)
>  %264 = shl i32 %250, 4
>  %265 = add i32 %264, 188
>  %266 = call float @llvm.SI.load.const(<16 x i8> %260, i32 %265)
>  %267 = fsub float %266, %88
>  %268 = fmul float %255, %44
>  %269 = fadd float %268, %197
>  %270 = fmul float %258, %44
>  %271 = fadd float %270, %198
>  %272 = fmul float %263, %44
>  %273 = fadd float %272, %199
>  %274 = fmul float %267, %44
>  %275 = fadd float %274, %200
>  %276 = mul i32 %60, 3
>  %277 = add i32 %276, 2
>  %278 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %279 = load <16 x i8>, <16 x i8> addrspace(2)* %278, align 16, !invariant.load !0
>  %280 = shl i32 %277, 4
>  %281 = add i32 %280, 176
>  %282 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %281)
>  %283 = shl i32 %277, 4
>  %284 = add i32 %283, 180
>  %285 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %284)
>  %286 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %287 = load <16 x i8>, <16 x i8> addrspace(2)* %286, align 16, !invariant.load !0
>  %288 = shl i32 %277, 4
>  %289 = add i32 %288, 184
>  %290 = call float @llvm.SI.load.const(<16 x i8> %287, i32 %289)
>  %291 = shl i32 %277, 4
>  %292 = add i32 %291, 188
>  %293 = call float @llvm.SI.load.const(<16 x i8> %287, i32 %292)
>  %294 = fsub float %293, %89
>  %295 = fmul float %282, %44
>  %296 = fadd float %295, %220
>  %297 = fmul float %285, %44
>  %298 = fadd float %297, %221
>  %299 = fmul float %290, %44
>  %300 = fadd float %299, %222
>  %301 = fmul float %294, %44
>  %302 = fadd float %301, %223
>  %303 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %304 = load <16 x i8>, <16 x i8> addrspace(2)* %303, align 16, !invariant.load !0
>  %305 = call float @llvm.SI.load.const(<16 x i8> %304, i32 3664)
>  %306 = bitcast float %305 to i32
>  %307 = icmp eq i32 %306, 0
>  br i1 %307, label %endif69, label %if56
>
>if56:                                             ; preds = %else31
>  %308 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %309 = load <16 x i8>, <16 x i8> addrspace(2)* %308, align 16, !invariant.load !0
>  %310 = mul i32 %61, 48
>  %311 = add i32 %310, 176
>  %312 = call float @llvm.SI.load.const(<16 x i8> %309, i32 %311)
>  %313 = mul i32 %61, 48
>  %314 = add i32 %313, 180
>  %315 = call float @llvm.SI.load.const(<16 x i8> %309, i32 %314)
>  %316 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %317 = load <16 x i8>, <16 x i8> addrspace(2)* %316, align 16, !invariant.load !0
>  %318 = mul i32 %61, 48
>  %319 = add i32 %318, 184
>  %320 = call float @llvm.SI.load.const(<16 x i8> %317, i32 %319)
>  %321 = mul i32 %61, 48
>  %322 = add i32 %321, 188
>  %323 = call float @llvm.SI.load.const(<16 x i8> %317, i32 %322)
>  %324 = fsub float %323, %87
>  %325 = fmul float %312, %45
>  %326 = fadd float %325, %242
>  %327 = fmul float %315, %45
>  %328 = fadd float %327, %244
>  %329 = fmul float %320, %45
>  %330 = fadd float %329, %246
>  %331 = fmul float %324, %45
>  %332 = fadd float %331, %248
>  %333 = mul i32 %61, 3
>  %334 = add i32 %333, 1
>  %335 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %336 = load <16 x i8>, <16 x i8> addrspace(2)* %335, align 16, !invariant.load !0
>  %337 = shl i32 %334, 4
>  %338 = add i32 %337, 176
>  %339 = call float @llvm.SI.load.const(<16 x i8> %336, i32 %338)
>  %340 = shl i32 %334, 4
>  %341 = add i32 %340, 180
>  %342 = call float @llvm.SI.load.const(<16 x i8> %336, i32 %341)
>  %343 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %344 = load <16 x i8>, <16 x i8> addrspace(2)* %343, align 16, !invariant.load !0
>  %345 = shl i32 %334, 4
>  %346 = add i32 %345, 184
>  %347 = call float @llvm.SI.load.const(<16 x i8> %344, i32 %346)
>  %348 = shl i32 %334, 4
>  %349 = add i32 %348, 188
>  %350 = call float @llvm.SI.load.const(<16 x i8> %344, i32 %349)
>  %351 = fsub float %350, %88
>  %352 = fmul float %339, %45
>  %353 = fadd float %352, %269
>  %354 = fmul float %342, %45
>  %355 = fadd float %354, %271
>  %356 = fmul float %347, %45
>  %357 = fadd float %356, %273
>  %358 = fmul float %351, %45
>  %359 = fadd float %358, %275
>  %360 = mul i32 %61, 3
>  %361 = add i32 %360, 2
>  %362 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %363 = load <16 x i8>, <16 x i8> addrspace(2)* %362, align 16, !invariant.load !0
>  %364 = shl i32 %361, 4
>  %365 = add i32 %364, 176
>  %366 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %365)
>  %367 = shl i32 %361, 4
>  %368 = add i32 %367, 180
>  %369 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %368)
>  %370 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %371 = load <16 x i8>, <16 x i8> addrspace(2)* %370, align 16, !invariant.load !0
>  %372 = shl i32 %361, 4
>  %373 = add i32 %372, 184
>  %374 = call float @llvm.SI.load.const(<16 x i8> %371, i32 %373)
>  %375 = shl i32 %361, 4
>  %376 = add i32 %375, 188
>  %377 = call float @llvm.SI.load.const(<16 x i8> %371, i32 %376)
>  %378 = fsub float %377, %89
>  %379 = fmul float %366, %45
>  %380 = fadd float %379, %296
>  %381 = fmul float %369, %45
>  %382 = fadd float %381, %298
>  %383 = fmul float %374, %45
>  %384 = fadd float %383, %300
>  %385 = fmul float %378, %45
>  %386 = fadd float %385, %302
>  br label %endif69
>
>endif69:                                          ; preds = %else31, %if56
>  %.0101 = phi float [ %326, %if56 ], [ %242, %else31 ]
>  %.097 = phi float [ %328, %if56 ], [ %244, %else31 ]
>  %.093 = phi float [ %330, %if56 ], [ %246, %else31 ]
>  %.089 = phi float [ %332, %if56 ], [ %248, %else31 ]
>  %.085 = phi float [ %353, %if56 ], [ %269, %else31 ]
>  %.081 = phi float [ %355, %if56 ], [ %271, %else31 ]
>  %.077 = phi float [ %357, %if56 ], [ %273, %else31 ]
>  %.073 = phi float [ %359, %if56 ], [ %275, %else31 ]
>  %.069 = phi float [ %380, %if56 ], [ %296, %else31 ]
>  %.065 = phi float [ %382, %if56 ], [ %298, %else31 ]
>  %.061 = phi float [ %384, %if56 ], [ %300, %else31 ]
>  %.0 = phi float [ %386, %if56 ], [ %302, %else31 ]
>  %387 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %388 = load <16 x i8>, <16 x i8> addrspace(2)* %387, align 16, !invariant.load !0
>  %389 = call float @llvm.SI.load.const(<16 x i8> %388, i32 3680)
>  %390 = bitcast float %389 to i32
>  %391 = icmp eq i32 %390, 0
>  br i1 %391, label %endif85, label %if70
>
>if70:                                             ; preds = %endif69
>  %392 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %393 = load <16 x i8>, <16 x i8> addrspace(2)* %392, align 16, !invariant.load !0
>  %394 = mul i32 %62, 48
>  %395 = add i32 %394, 176
>  %396 = call float @llvm.SI.load.const(<16 x i8> %393, i32 %395)
>  %397 = mul i32 %62, 48
>  %398 = add i32 %397, 180
>  %399 = call float @llvm.SI.load.const(<16 x i8> %393, i32 %398)
>  %400 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %401 = load <16 x i8>, <16 x i8> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = mul i32 %62, 48
>  %403 = add i32 %402, 184
>  %404 = call float @llvm.SI.load.const(<16 x i8> %401, i32 %403)
>  %405 = mul i32 %62, 48
>  %406 = add i32 %405, 188
>  %407 = call float @llvm.SI.load.const(<16 x i8> %401, i32 %406)
>  %408 = fsub float %407, %87
>  %409 = fmul float %396, %46
>  %410 = fadd float %409, %.0101
>  %411 = fmul float %399, %46
>  %412 = fadd float %411, %.097
>  %413 = fmul float %404, %46
>  %414 = fadd float %413, %.093
>  %415 = fmul float %408, %46
>  %416 = fadd float %415, %.089
>  %417 = mul i32 %62, 3
>  %418 = add i32 %417, 1
>  %419 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %420 = load <16 x i8>, <16 x i8> addrspace(2)* %419, align 16, !invariant.load !0
>  %421 = shl i32 %418, 4
>  %422 = add i32 %421, 176
>  %423 = call float @llvm.SI.load.const(<16 x i8> %420, i32 %422)
>  %424 = shl i32 %418, 4
>  %425 = add i32 %424, 180
>  %426 = call float @llvm.SI.load.const(<16 x i8> %420, i32 %425)
>  %427 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %428 = load <16 x i8>, <16 x i8> addrspace(2)* %427, align 16, !invariant.load !0
>  %429 = shl i32 %418, 4
>  %430 = add i32 %429, 184
>  %431 = call float @llvm.SI.load.const(<16 x i8> %428, i32 %430)
>  %432 = shl i32 %418, 4
>  %433 = add i32 %432, 188
>  %434 = call float @llvm.SI.load.const(<16 x i8> %428, i32 %433)
>  %435 = fsub float %434, %88
>  %436 = fmul float %423, %46
>  %437 = fadd float %436, %.085
>  %438 = fmul float %426, %46
>  %439 = fadd float %438, %.081
>  %440 = fmul float %431, %46
>  %441 = fadd float %440, %.077
>  %442 = fmul float %435, %46
>  %443 = fadd float %442, %.073
>  %444 = mul i32 %62, 3
>  %445 = add i32 %444, 2
>  %446 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %447 = load <16 x i8>, <16 x i8> addrspace(2)* %446, align 16, !invariant.load !0
>  %448 = shl i32 %445, 4
>  %449 = add i32 %448, 176
>  %450 = call float @llvm.SI.load.const(<16 x i8> %447, i32 %449)
>  %451 = shl i32 %445, 4
>  %452 = add i32 %451, 180
>  %453 = call float @llvm.SI.load.const(<16 x i8> %447, i32 %452)
>  %454 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %455 = load <16 x i8>, <16 x i8> addrspace(2)* %454, align 16, !invariant.load !0
>  %456 = shl i32 %445, 4
>  %457 = add i32 %456, 184
>  %458 = call float @llvm.SI.load.const(<16 x i8> %455, i32 %457)
>  %459 = shl i32 %445, 4
>  %460 = add i32 %459, 188
>  %461 = call float @llvm.SI.load.const(<16 x i8> %455, i32 %460)
>  %462 = fsub float %461, %89
>  %463 = fmul float %450, %46
>  %464 = fadd float %463, %.069
>  %465 = fmul float %453, %46
>  %466 = fadd float %465, %.065
>  %467 = fmul float %458, %46
>  %468 = fadd float %467, %.061
>  %469 = fmul float %462, %46
>  %470 = fadd float %469, %.0
>  br label %endif85
>
>endif85:                                          ; preds = %endif69, %if18, %if70, %if12
>  %.3104 = phi float [ %95, %if12 ], [ %123, %if18 ], [ %410, %if70 ], [ %.0101, %endif69 ]
>  %.3100 = phi float [ %98, %if12 ], [ %126, %if18 ], [ %412, %if70 ], [ %.097, %endif69 ]
>  %.396 = phi float [ %99, %if12 ], [ %131, %if18 ], [ %414, %if70 ], [ %.093, %endif69 ]
>  %.392 = phi float [ %101, %if12 ], [ %135, %if18 ], [ %416, %if70 ], [ %.089, %endif69 ]
>  %.388 = phi float [ %102, %if12 ], [ %142, %if18 ], [ %437, %if70 ], [ %.085, %endif69 ]
>  %.384 = phi float [ %105, %if12 ], [ %145, %if18 ], [ %439, %if70 ], [ %.081, %endif69 ]
>  %.380 = phi float [ %106, %if12 ], [ %150, %if18 ], [ %441, %if70 ], [ %.077, %endif69 ]
>  %.376 = phi float [ %108, %if12 ], [ %154, %if18 ], [ %443, %if70 ], [ %.073, %endif69 ]
>  %.372 = phi float [ %109, %if12 ], [ %161, %if18 ], [ %464, %if70 ], [ %.069, %endif69 ]
>  %.368 = phi float [ %112, %if12 ], [ %164, %if18 ], [ %466, %if70 ], [ %.065, %endif69 ]
>  %.364 = phi float [ %113, %if12 ], [ %169, %if18 ], [ %468, %if70 ], [ %.061, %endif69 ]
>  %.3 = phi float [ %115, %if12 ], [ %173, %if18 ], [ %470, %if70 ], [ %.0, %endif69 ]
>  %471 = fmul float %80, %.3104
>  %472 = fmul float %82, %.3100
>  %473 = fadd float %471, %472
>  %474 = fmul float %84, %.396
>  %475 = fadd float %473, %474
>  %476 = fmul float %26, %.392
>  %477 = fadd float %475, %476
>  %478 = fmul float %80, %.388
>  %479 = fmul float %82, %.384
>  %480 = fadd float %478, %479
>  %481 = fmul float %84, %.380
>  %482 = fadd float %480, %481
>  %483 = fmul float %26, %.376
>  %484 = fadd float %482, %483
>  %485 = fmul float %80, %.372
>  %486 = fmul float %82, %.368
>  %487 = fadd float %485, %486
>  %488 = fmul float %84, %.364
>  %489 = fadd float %487, %488
>  %490 = fmul float %26, %.3
>  %491 = fadd float %489, %490
>  %492 = fmul float %80, 0.000000e+00
>  %493 = fmul float %82, 0.000000e+00
>  %494 = fadd float %492, %493
>  %495 = fmul float %84, 0.000000e+00
>  %496 = fadd float %494, %495
>  %497 = fadd float %496, %26
>  %498 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %499 = load <16 x i8>, <16 x i8> addrspace(2)* %498, align 16, !invariant.load !0
>  %500 = call float @llvm.SI.load.const(<16 x i8> %499, i32 64)
>  %501 = fadd float %477, %500
>  %502 = call float @llvm.SI.load.const(<16 x i8> %499, i32 68)
>  %503 = fadd float %484, %502
>  %504 = call float @llvm.SI.load.const(<16 x i8> %499, i32 72)
>  %505 = fadd float %491, %504
>  %506 = fmul float %64, %.3104
>  %507 = fmul float %66, %.3100
>  %508 = fadd float %507, %506
>  %509 = fmul float %68, %.396
>  %510 = fadd float %508, %509
>  %511 = fmul float %64, %.388
>  %512 = fmul float %66, %.384
>  %513 = fadd float %512, %511
>  %514 = fmul float %68, %.380
>  %515 = fadd float %513, %514
>  %516 = fmul float %64, %.372
>  %517 = fmul float %66, %.368
>  %518 = fadd float %517, %516
>  %519 = fmul float %68, %.364
>  %520 = fadd float %518, %519
>  %521 = fmul float %70, %.3104
>  %522 = fmul float %72, %.3100
>  %523 = fadd float %522, %521
>  %524 = fmul float %74, %.396
>  %525 = fadd float %523, %524
>  %526 = fmul float %70, %.388
>  %527 = fmul float %72, %.384
>  %528 = fadd float %527, %526
>  %529 = fmul float %74, %.380
>  %530 = fadd float %528, %529
>  %531 = fmul float %70, %.372
>  %532 = fmul float %72, %.368
>  %533 = fadd float %532, %531
>  %534 = fmul float %74, %.364
>  %535 = fadd float %533, %534
>  %536 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %537 = load <16 x i8>, <16 x i8> addrspace(2)* %536, align 16, !invariant.load !0
>  %538 = call float @llvm.SI.load.const(<16 x i8> %537, i32 0)
>  %539 = fmul float %538, %501
>  %540 = call float @llvm.SI.load.const(<16 x i8> %537, i32 4)
>  %541 = fmul float %540, %501
>  %542 = call float @llvm.SI.load.const(<16 x i8> %537, i32 8)
>  %543 = fmul float %542, %501
>  %544 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %545 = load <16 x i8>, <16 x i8> addrspace(2)* %544, align 16, !invariant.load !0
>  %546 = call float @llvm.SI.load.const(<16 x i8> %545, i32 12)
>  %547 = fmul float %546, %501
>  %548 = call float @llvm.SI.load.const(<16 x i8> %545, i32 16)
>  %549 = fmul float %548, %503
>  %550 = fadd float %549, %539
>  %551 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %552 = load <16 x i8>, <16 x i8> addrspace(2)* %551, align 16, !invariant.load !0
>  %553 = call float @llvm.SI.load.const(<16 x i8> %552, i32 20)
>  %554 = fmul float %553, %503
>  %555 = fadd float %554, %541
>  %556 = call float @llvm.SI.load.const(<16 x i8> %552, i32 24)
>  %557 = fmul float %556, %503
>  %558 = fadd float %557, %543
>  %559 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %560 = load <16 x i8>, <16 x i8> addrspace(2)* %559, align 16, !invariant.load !0
>  %561 = call float @llvm.SI.load.const(<16 x i8> %560, i32 28)
>  %562 = fmul float %561, %503
>  %563 = fadd float %562, %547
>  %564 = call float @llvm.SI.load.const(<16 x i8> %560, i32 32)
>  %565 = fmul float %564, %505
>  %566 = fadd float %565, %550
>  %567 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %568 = load <16 x i8>, <16 x i8> addrspace(2)* %567, align 16, !invariant.load !0
>  %569 = call float @llvm.SI.load.const(<16 x i8> %568, i32 36)
>  %570 = fmul float %569, %505
>  %571 = fadd float %570, %555
>  %572 = call float @llvm.SI.load.const(<16 x i8> %568, i32 40)
>  %573 = fmul float %572, %505
>  %574 = fadd float %573, %558
>  %575 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %576 = load <16 x i8>, <16 x i8> addrspace(2)* %575, align 16, !invariant.load !0
>  %577 = call float @llvm.SI.load.const(<16 x i8> %576, i32 44)
>  %578 = fmul float %577, %505
>  %579 = fadd float %578, %563
>  %580 = call float @llvm.SI.load.const(<16 x i8> %576, i32 48)
>  %581 = fmul float %580, %497
>  %582 = fadd float %581, %566
>  %583 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %584 = load <16 x i8>, <16 x i8> addrspace(2)* %583, align 16, !invariant.load !0
>  %585 = call float @llvm.SI.load.const(<16 x i8> %584, i32 52)
>  %586 = fmul float %585, %497
>  %587 = fadd float %586, %571
>  %588 = call float @llvm.SI.load.const(<16 x i8> %584, i32 56)
>  %589 = fmul float %588, %497
>  %590 = fadd float %589, %574
>  %591 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %592 = load <16 x i8>, <16 x i8> addrspace(2)* %591, align 16, !invariant.load !0
>  %593 = call float @llvm.SI.load.const(<16 x i8> %592, i32 60)
>  %594 = fmul float %593, %497
>  %595 = fadd float %594, %579
>  %596 = call float @llvm.SI.load.const(<16 x i8> %592, i32 108)
>  %597 = fmul float %595, %596
>  %598 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %599 = load <16 x i8>, <16 x i8> addrspace(2)* %598, align 16, !invariant.load !0
>  %600 = call float @llvm.SI.load.const(<16 x i8> %599, i32 124)
>  %601 = call float @llvm.SI.load.const(<16 x i8> %599, i32 140)
>  %602 = call float @llvm.SI.load.const(<16 x i8> %599, i32 156)
>  %603 = fsub float %501, %600
>  %604 = fsub float %503, %601
>  %605 = fsub float %505, %602
>  %606 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %607 = load <16 x i8>, <16 x i8> addrspace(2)* %606, align 16, !invariant.load !0
>  %608 = call float @llvm.SI.load.const(<16 x i8> %607, i32 112)
>  %609 = fmul float %608, %603
>  %610 = call float @llvm.SI.load.const(<16 x i8> %607, i32 116)
>  %611 = fmul float %610, %603
>  %612 = call float @llvm.SI.load.const(<16 x i8> %607, i32 120)
>  %613 = fmul float %612, %603
>  %614 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %615 = load <16 x i8>, <16 x i8> addrspace(2)* %614, align 16, !invariant.load !0
>  %616 = call float @llvm.SI.load.const(<16 x i8> %615, i32 128)
>  %617 = fmul float %616, %604
>  %618 = fadd float %617, %609
>  %619 = call float @llvm.SI.load.const(<16 x i8> %615, i32 132)
>  %620 = fmul float %619, %604
>  %621 = fadd float %620, %611
>  %622 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %623 = load <16 x i8>, <16 x i8> addrspace(2)* %622, align 16, !invariant.load !0
>  %624 = call float @llvm.SI.load.const(<16 x i8> %623, i32 136)
>  %625 = fmul float %624, %604
>  %626 = fadd float %625, %613
>  %627 = call float @llvm.SI.load.const(<16 x i8> %623, i32 144)
>  %628 = fmul float %627, %605
>  %629 = fadd float %628, %618
>  %630 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %631 = load <16 x i8>, <16 x i8> addrspace(2)* %630, align 16, !invariant.load !0
>  %632 = call float @llvm.SI.load.const(<16 x i8> %631, i32 148)
>  %633 = fmul float %632, %605
>  %634 = fadd float %633, %621
>  %635 = call float @llvm.SI.load.const(<16 x i8> %631, i32 152)
>  %636 = fmul float %635, %605
>  %637 = fadd float %636, %626
>  %638 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %639 = load <16 x i8>, <16 x i8> addrspace(2)* %638, align 16, !invariant.load !0
>  %640 = call float @llvm.SI.load.const(<16 x i8> %639, i32 160)
>  %641 = fmul float %629, %640
>  %642 = call float @llvm.SI.load.const(<16 x i8> %639, i32 164)
>  %643 = fmul float %634, %642
>  %644 = fmul float %637, 5.000000e-01
>  %645 = fadd float %644, %641
>  %646 = fmul float %637, 5.000000e-01
>  %647 = fadd float %646, %643
>  %648 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %649 = load <16 x i8>, <16 x i8> addrspace(2)* %648, align 16, !invariant.load !0
>  %650 = call float @llvm.SI.load.const(<16 x i8> %649, i32 168)
>  %651 = call float @llvm.SI.load.const(<16 x i8> %649, i32 172)
>  %652 = fmul float %637, %650
>  %653 = fadd float %652, %651
>  %654 = call float @llvm.SI.load.const(<16 x i8> %649, i32 84)
>  %655 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %656 = load <16 x i8>, <16 x i8> addrspace(2)* %655, align 16, !invariant.load !0
>  %657 = call float @llvm.SI.load.const(<16 x i8> %656, i32 80)
>  %658 = fmul float %590, %654
>  %659 = fadd float %658, %657
>  %660 = call float @llvm.AMDGPU.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = call float @llvm.SI.load.const(<16 x i8> %656, i32 88)
>  %662 = call float @llvm.pow.f32(float %660, float %661)
>  %663 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %664 = load <16 x i8>, <16 x i8> addrspace(2)* %663, align 16, !invariant.load !0
>  %665 = call float @llvm.SI.load.const(<16 x i8> %664, i32 92)
>  %666 = fsub float 1.000000e+00, %665
>  %667 = call float @llvm.SI.load.const(<16 x i8> %664, i32 92)
>  %668 = fmul float %667, %662
>  %669 = fadd float %668, %666
>  %670 = fmul float %520, %530
>  %671 = fmul float %510, %535
>  %672 = fmul float %515, %525
>  %673 = fmul float %515, %535
>  %674 = fsub float %673, %670
>  %675 = fmul float %520, %525
>  %676 = fsub float %675, %671
>  %677 = fmul float %510, %530
>  %678 = fsub float %677, %672
>  %679 = fmul float %674, %76
>  %680 = fmul float %676, %76
>  %681 = fmul float %678, %76
>  %682 = fmul float %669, %669
>  %683 = bitcast i32 %12 to float
>  %684 = insertvalue <{ float, float, float }> undef, float %683, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %501, float %503, float %505, float %597)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %645, float %647, float %653, float %637)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %57, float %58, float %682, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %525, float %530, float %535, float %679)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %680, float %681, float %510, float %515)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %520, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %582, float %587, float %590, float %595)
>  ret <{ float, float, float }> %684
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..19]
>DCL CONST[25..26]
>DCL TEMP[0..12], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     6.0000,     4.0000,     0.0000}
>IMM[2] FLT32 {   -0.5000,     0.3000,     0.5900,     0.1100}
>IMM[3] FLT32 {   32.0000,     5.0000,     0.0010,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[6], 2D
> 13: MOV TEMP[4].xy, IN[2].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[5], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
> 23: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, IMM[0].xxxx, TEMP[4].xyzz
> 26: ADD TEMP[4].xyz, TEMP[2].xyzz, -TEMP[4].xyzz
> 27: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 28: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].wwww
> 29: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[1].xyzz
> 30: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 31: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 32: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 33: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 34: ADD TEMP[4].x, IMM[0].wwww, -TEMP[4].xxxx
> 35: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 36: MUL TEMP[4].x, TEMP[3].yyyy, TEMP[4].xxxx
> 37: MAD TEMP[1].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 38: MUL TEMP[5], CONST[4], TEMP[1].xxxx
> 39: MAD TEMP[5], CONST[5], TEMP[1].yyyy, TEMP[5]
> 40: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[5]
> 41: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 42: MOV TEMP[5].xy, TEMP[1].xyyy
> 43: MOV TEMP[5].w, IMM[0].wwww
> 44: MOV TEMP[5].z, TEMP[1].zzzz
> 45: TXP TEMP[1].x, TEMP[5], SAMP[0], SHADOW2D
> 46: MOV TEMP[5].xyz, TEMP[0].xyzz
> 47: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 48: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[2].xyzz
> 49: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[0].xyzz
> 50: MAD TEMP[6].xyz, IMM[0].xxxx, TEMP[6].xyzz, -TEMP[2].xyzz
> 51: ADD TEMP[7].x, IMM[0].wwww, -TEMP[3].zzzz
> 52: MUL TEMP[7].x, TEMP[7].xxxx, IMM[1].yyyy
> 53: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 54: MUL TEMP[8].x, IMM[1].zzzz, TEMP[3].yyyy
> 55: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[0].xyzz
> 56: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 57: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 58: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 59: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 60: MUL TEMP[1].xyz, TEMP[9].xxxx, TEMP[1].xyzz
> 61: MAD TEMP[1].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[1].xyzz
> 62: ADD TEMP[5].xyz, CONST[11].xyzz, -IN[0].xyzz
> 63: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 64: RSQ TEMP[9].x, TEMP[8].xxxx
> 65: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 66: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[0].xyzz
> 67: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 68: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 69: MUL TEMP[8].x, TEMP[8].xxxx, CONST[11].wwww
> 70: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 71: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 72: MUL TEMP[8].xyz, CONST[12].xyzz, TEMP[8].xxxx
> 73: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[3].yyyy
> 74: MAD TEMP[1].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[1].xyzz
> 75: ADD TEMP[5].xyz, CONST[13].xyzz, -IN[0].xyzz
> 76: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 77: RSQ TEMP[9].x, TEMP[8].xxxx
> 78: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 79: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[0].xyzz
> 80: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 81: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 82: MUL TEMP[8].x, TEMP[8].xxxx, CONST[13].wwww
> 83: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 84: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 85: MUL TEMP[8].xyz, CONST[14].xyzz, TEMP[8].xxxx
> 86: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[3].yyyy
> 87: MAD TEMP[1].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[1].xyzz
> 88: MOV TEMP[5].x, CONST[15].wwww
> 89: MOV TEMP[5].y, CONST[16].wwww
> 90: MOV TEMP[5].z, CONST[17].wwww
> 91: ADD TEMP[5].xyz, TEMP[5].xyzz, -IN[0].xyzz
> 92: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 93: SQRT TEMP[8].x, TEMP[8].xxxx
> 94: MOV TEMP[9].yz, IMM[1].wwww
> 95: MAD TEMP[9].x, TEMP[8].xxxx, CONST[18].zzzz, CONST[18].wwww
> 96: MOV TEMP[10].yz, IMM[1].wwww
> 97: MOV TEMP[10].x, IN[1].zzzz
> 98: MOV TEMP[11].yz, IMM[1].wwww
> 99: MOV TEMP[12].xy, IN[1].xyyy
>100: MOV TEMP[12].w, IN[1].wwww
>101: TXP TEMP[12].w, TEMP[12], SAMP[3], 2D
>102: MUL TEMP[11].x, TEMP[12].wwww, TEMP[12].wwww
>103: RCP TEMP[8].x, TEMP[8].xxxx
>104: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[8].xxxx
>105: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[0].xyzz
>106: MOV_SAT TEMP[5].x, TEMP[5].xxxx
>107: ADD TEMP[8].xyz, TEMP[9].xyzz, IMM[2].xxxx
>108: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[0].xxxx
>109: ADD TEMP[8].xyz, IMM[0].wwww, -TEMP[8].xyzz
>110: MOV_SAT TEMP[8].xyz, TEMP[8].xyzz
>111: MUL TEMP[8].xyz, TEMP[11].xyzz, TEMP[8].xyzz
>112: MOV_SAT TEMP[9].xyz, TEMP[10].xyzz
>113: MUL TEMP[8].x, TEMP[8].xyzz, TEMP[9].xyzz
>114: MUL TEMP[8].xyz, CONST[19].xyzz, TEMP[8].xxxx
>115: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[3].yyyy
>116: MAD TEMP[1].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[1].xyzz
>117: MOV TEMP[5].xy, IN[2].xyyy
>118: TEX TEMP[5], TEMP[5], SAMP[7], 2D
>119: MOV TEMP[8].w, TEMP[5].wwww
>120: DP3 TEMP[9].x, TEMP[5].xyzz, IMM[2].yzww
>121: MUL TEMP[9].x, TEMP[9].xxxx, CONST[26].xxxx
>122: ADD TEMP[10].x, CONST[25].wwww, IMM[0].wwww
>123: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
>124: MUL TEMP[8].xyz, TEMP[5].xyzz, TEMP[9].xxxx
>125: MUL TEMP[5].xyz, TEMP[8], IMM[3].xxxx
>126: MOV TEMP[8].xy, IN[2].xyyy
>127: TEX TEMP[8].xyz, TEMP[8], SAMP[4], 2D
>128: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
>129: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>130: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
>131: POW TEMP[0].x, TEMP[0].xxxx, IMM[3].yyyy
>132: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[1].wwww
>133: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
>134: MOV TEMP[2].xyz, TEMP[6].xyzz
>135: MOV TEMP[2].w, TEMP[7].xxxx
>136: TXL TEMP[2].xyz, TEMP[2], SAMP[2], CUBE
>137: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>138: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].xxxx
>139: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xyzz, TEMP[0].xyzz
>140: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[5].xyzz
>141: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>142: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].wwww
>143: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>144: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>145: RCP TEMP[2].x, TEMP[2].xxxx
>146: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>147: FRC TEMP[2].x, CONST[1].wwww
>148: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].wwww
>149: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>150: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>151: MUL TEMP[1].x, IN[2].zzzz, TEMP[1].xxxx
>152: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>153: MOV TEMP[0].w, IN[0].wwww
>154: MOV OUT[0], TEMP[0]
>155: END
>radeonsi: Compiling shader 120
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 27, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 23, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fmul float %132, 2.000000e+00
>  %136 = fmul float %133, 2.000000e+00
>  %137 = fsub float %49, %134
>  %138 = fsub float %50, %135
>  %139 = fsub float %51, %136
>  %140 = fmul float %137, %59
>  %141 = fmul float %138, %60
>  %142 = fadd float %141, %140
>  %143 = fmul float %139, %61
>  %144 = fadd float %142, %143
>  %145 = fadd float %144, 1.000000e+00
>  %146 = fmul float %49, %59
>  %147 = fmul float %50, %60
>  %148 = fadd float %147, %146
>  %149 = fmul float %51, %61
>  %150 = fadd float %148, %149
>  %151 = fsub float 1.000000e+00, %150
>  %152 = call float @llvm.AMDGPU.clamp.(float %151, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float %145, %152
>  %154 = call float @llvm.AMDGPU.clamp.(float %153, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = fmul float %155, %155
>  %157 = fmul float %78, %156
>  %158 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %159 = fmul float %59, 0x4007700140000000
>  %160 = fadd float %159, %158
>  %161 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %162 = fmul float %60, 0x4007700140000000
>  %163 = fadd float %162, %161
>  %164 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %165 = fmul float %61, 0x4007700140000000
>  %166 = fadd float %165, %164
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 64)
>  %170 = fmul float %169, %160
>  %171 = call float @llvm.SI.load.const(<16 x i8> %168, i32 68)
>  %172 = fmul float %171, %160
>  %173 = call float @llvm.SI.load.const(<16 x i8> %168, i32 72)
>  %174 = fmul float %173, %160
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 80)
>  %178 = fmul float %177, %163
>  %179 = fadd float %178, %170
>  %180 = call float @llvm.SI.load.const(<16 x i8> %176, i32 84)
>  %181 = fmul float %180, %163
>  %182 = fadd float %181, %172
>  %183 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %184 = load <16 x i8>, <16 x i8> addrspace(2)* %183, align 16, !invariant.load !0
>  %185 = call float @llvm.SI.load.const(<16 x i8> %184, i32 88)
>  %186 = fmul float %185, %163
>  %187 = fadd float %186, %174
>  %188 = call float @llvm.SI.load.const(<16 x i8> %184, i32 96)
>  %189 = fmul float %188, %166
>  %190 = fadd float %189, %179
>  %191 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %192 = load <16 x i8>, <16 x i8> addrspace(2)* %191, align 16, !invariant.load !0
>  %193 = call float @llvm.SI.load.const(<16 x i8> %192, i32 100)
>  %194 = fmul float %193, %166
>  %195 = fadd float %194, %182
>  %196 = call float @llvm.SI.load.const(<16 x i8> %192, i32 104)
>  %197 = fmul float %196, %166
>  %198 = fadd float %197, %187
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 112)
>  %202 = fadd float %190, %201
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 116)
>  %204 = fadd float %195, %203
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 120)
>  %206 = fadd float %198, %205
>  %207 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %208 = load <8 x i32>, <8 x i32> addrspace(2)* %207, align 32, !invariant.load !0
>  %209 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %210 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %209, i64 0, i64 3, !amdgpu.uniform !0
>  %211 = load <4 x i32>, <4 x i32> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = extractelement <8 x i32> %208, i32 7
>  %213 = extractelement <4 x i32> %211, i32 0
>  %214 = and i32 %213, %212
>  %215 = insertelement <4 x i32> %211, i32 %214, i32 0
>  %216 = bitcast float %206 to i32
>  %217 = bitcast float %202 to i32
>  %218 = bitcast float %204 to i32
>  %219 = insertelement <4 x i32> undef, i32 %216, i32 0
>  %220 = insertelement <4 x i32> %219, i32 %217, i32 1
>  %221 = insertelement <4 x i32> %220, i32 %218, i32 2
>  %222 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %221, <8 x i32> %208, <4 x i32> %215, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %223 = extractelement <4 x float> %222, i32 0
>  %224 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %225 = load <8 x i32>, <8 x i32> addrspace(2)* %224, align 32, !invariant.load !0
>  %226 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %227 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %226, i64 0, i64 7, !amdgpu.uniform !0
>  %228 = load <4 x i32>, <4 x i32> addrspace(2)* %227, align 16, !invariant.load !0
>  %229 = extractelement <8 x i32> %225, i32 7
>  %230 = extractelement <4 x i32> %228, i32 0
>  %231 = and i32 %230, %229
>  %232 = insertelement <4 x i32> %228, i32 %231, i32 0
>  %233 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %234 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %235 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %236 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %237 = call float @llvm.fabs.f32(float %235)
>  %238 = fdiv float 1.000000e+00, %237, !fpmath !1
>  %239 = fmul float %233, %238
>  %240 = fadd float %239, 1.500000e+00
>  %241 = fmul float %234, %238
>  %242 = fadd float %241, 1.500000e+00
>  %243 = bitcast float %242 to i32
>  %244 = bitcast float %240 to i32
>  %245 = bitcast float %236 to i32
>  %246 = insertelement <4 x i32> undef, i32 %243, i32 0
>  %247 = insertelement <4 x i32> %246, i32 %244, i32 1
>  %248 = insertelement <4 x i32> %247, i32 %245, i32 2
>  %249 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %248, <8 x i32> %225, <4 x i32> %232, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %250 = extractelement <4 x float> %249, i32 0
>  %251 = extractelement <4 x float> %249, i32 1
>  %252 = extractelement <4 x float> %249, i32 2
>  %253 = extractelement <4 x float> %249, i32 3
>  %254 = fmul float %121, %49
>  %255 = fmul float %123, %50
>  %256 = fadd float %255, %254
>  %257 = fmul float %125, %51
>  %258 = fadd float %256, %257
>  %259 = fmul float %258, %121
>  %260 = fmul float %258, %123
>  %261 = fmul float %258, %125
>  %262 = fmul float %259, 2.000000e+00
>  %263 = fsub float %262, %49
>  %264 = fmul float %260, 2.000000e+00
>  %265 = fsub float %264, %50
>  %266 = fmul float %261, 2.000000e+00
>  %267 = fsub float %266, %51
>  %268 = fsub float 1.000000e+00, %79
>  %269 = fmul float %268, 6.000000e+00
>  %270 = fmul float %250, %253
>  %271 = fmul float %251, %253
>  %272 = fmul float %252, %253
>  %273 = fmul float %78, 4.000000e+00
>  %274 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %275 = load <16 x i8>, <16 x i8> addrspace(2)* %274, align 16, !invariant.load !0
>  %276 = call float @llvm.SI.load.const(<16 x i8> %275, i32 16)
>  %277 = call float @llvm.SI.load.const(<16 x i8> %275, i32 20)
>  %278 = call float @llvm.SI.load.const(<16 x i8> %275, i32 24)
>  %279 = fmul float %276, %121
>  %280 = fsub float -0.000000e+00, %279
>  %281 = fmul float %277, %123
>  %282 = fsub float %280, %281
>  %283 = fmul float %278, %125
>  %284 = fsub float %282, %283
>  %285 = call float @llvm.AMDGPU.clamp.(float %284, float 0.000000e+00, float 1.000000e+00)
>  %286 = fmul float %223, %223
>  %287 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %288 = load <16 x i8>, <16 x i8> addrspace(2)* %287, align 16, !invariant.load !0
>  %289 = call float @llvm.SI.load.const(<16 x i8> %288, i32 48)
>  %290 = fmul float %289, %286
>  %291 = call float @llvm.SI.load.const(<16 x i8> %288, i32 52)
>  %292 = fmul float %291, %286
>  %293 = call float @llvm.SI.load.const(<16 x i8> %288, i32 56)
>  %294 = fmul float %293, %286
>  %295 = fmul float %290, %78
>  %296 = fmul float %292, %78
>  %297 = fmul float %294, %78
>  %298 = fmul float %285, %295
>  %299 = fmul float %285, %296
>  %300 = fmul float %285, %297
>  %301 = fmul float %270, %273
>  %302 = fadd float %301, %298
>  %303 = fmul float %271, %273
>  %304 = fadd float %303, %299
>  %305 = fmul float %272, %273
>  %306 = fadd float %305, %300
>  %307 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %308 = load <16 x i8>, <16 x i8> addrspace(2)* %307, align 16, !invariant.load !0
>  %309 = call float @llvm.SI.load.const(<16 x i8> %308, i32 176)
>  %310 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %311 = fsub float %309, %310
>  %312 = call float @llvm.SI.load.const(<16 x i8> %308, i32 180)
>  %313 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %314 = fsub float %312, %313
>  %315 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %316 = load <16 x i8>, <16 x i8> addrspace(2)* %315, align 16, !invariant.load !0
>  %317 = call float @llvm.SI.load.const(<16 x i8> %316, i32 184)
>  %318 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %319 = fsub float %317, %318
>  %320 = fmul float %311, %311
>  %321 = fmul float %314, %314
>  %322 = fadd float %321, %320
>  %323 = fmul float %319, %319
>  %324 = fadd float %322, %323
>  %325 = call float @llvm.sqrt.f32(float %324)
>  %326 = fdiv float 1.000000e+00, %325, !fpmath !1
>  %327 = fmul float %311, %326
>  %328 = fmul float %314, %326
>  %329 = fmul float %319, %326
>  %330 = fmul float %327, %121
>  %331 = fmul float %328, %123
>  %332 = fadd float %331, %330
>  %333 = fmul float %329, %125
>  %334 = fadd float %332, %333
>  %335 = call float @llvm.AMDGPU.clamp.(float %334, float 0.000000e+00, float 1.000000e+00)
>  %336 = fmul float %324, %326
>  %337 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %338 = load <16 x i8>, <16 x i8> addrspace(2)* %337, align 16, !invariant.load !0
>  %339 = call float @llvm.SI.load.const(<16 x i8> %338, i32 188)
>  %340 = fmul float %336, %339
>  %341 = call float @llvm.AMDGPU.clamp.(float %340, float 0.000000e+00, float 1.000000e+00)
>  %342 = fsub float 1.000000e+00, %341
>  %343 = call float @llvm.SI.load.const(<16 x i8> %338, i32 192)
>  %344 = fmul float %343, %342
>  %345 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %346 = load <16 x i8>, <16 x i8> addrspace(2)* %345, align 16, !invariant.load !0
>  %347 = call float @llvm.SI.load.const(<16 x i8> %346, i32 196)
>  %348 = fmul float %347, %342
>  %349 = call float @llvm.SI.load.const(<16 x i8> %346, i32 200)
>  %350 = fmul float %349, %342
>  %351 = fmul float %344, %78
>  %352 = fmul float %348, %78
>  %353 = fmul float %350, %78
>  %354 = fmul float %335, %351
>  %355 = fadd float %354, %302
>  %356 = fmul float %335, %352
>  %357 = fadd float %356, %304
>  %358 = fmul float %335, %353
>  %359 = fadd float %358, %306
>  %360 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %361 = load <16 x i8>, <16 x i8> addrspace(2)* %360, align 16, !invariant.load !0
>  %362 = call float @llvm.SI.load.const(<16 x i8> %361, i32 208)
>  %363 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %364 = fsub float %362, %363
>  %365 = call float @llvm.SI.load.const(<16 x i8> %361, i32 212)
>  %366 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %367 = fsub float %365, %366
>  %368 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %369 = load <16 x i8>, <16 x i8> addrspace(2)* %368, align 16, !invariant.load !0
>  %370 = call float @llvm.SI.load.const(<16 x i8> %369, i32 216)
>  %371 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %372 = fsub float %370, %371
>  %373 = fmul float %364, %364
>  %374 = fmul float %367, %367
>  %375 = fadd float %374, %373
>  %376 = fmul float %372, %372
>  %377 = fadd float %375, %376
>  %378 = call float @llvm.sqrt.f32(float %377)
>  %379 = fdiv float 1.000000e+00, %378, !fpmath !1
>  %380 = fmul float %364, %379
>  %381 = fmul float %367, %379
>  %382 = fmul float %372, %379
>  %383 = fmul float %380, %121
>  %384 = fmul float %381, %123
>  %385 = fadd float %384, %383
>  %386 = fmul float %382, %125
>  %387 = fadd float %385, %386
>  %388 = call float @llvm.AMDGPU.clamp.(float %387, float 0.000000e+00, float 1.000000e+00)
>  %389 = fmul float %377, %379
>  %390 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %391 = load <16 x i8>, <16 x i8> addrspace(2)* %390, align 16, !invariant.load !0
>  %392 = call float @llvm.SI.load.const(<16 x i8> %391, i32 220)
>  %393 = fmul float %389, %392
>  %394 = call float @llvm.AMDGPU.clamp.(float %393, float 0.000000e+00, float 1.000000e+00)
>  %395 = fsub float 1.000000e+00, %394
>  %396 = call float @llvm.SI.load.const(<16 x i8> %391, i32 224)
>  %397 = fmul float %396, %395
>  %398 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %399 = load <16 x i8>, <16 x i8> addrspace(2)* %398, align 16, !invariant.load !0
>  %400 = call float @llvm.SI.load.const(<16 x i8> %399, i32 228)
>  %401 = fmul float %400, %395
>  %402 = call float @llvm.SI.load.const(<16 x i8> %399, i32 232)
>  %403 = fmul float %402, %395
>  %404 = fmul float %397, %78
>  %405 = fmul float %401, %78
>  %406 = fmul float %403, %78
>  %407 = fmul float %388, %404
>  %408 = fadd float %407, %355
>  %409 = fmul float %388, %405
>  %410 = fadd float %409, %357
>  %411 = fmul float %388, %406
>  %412 = fadd float %411, %359
>  %413 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %414 = load <16 x i8>, <16 x i8> addrspace(2)* %413, align 16, !invariant.load !0
>  %415 = call float @llvm.SI.load.const(<16 x i8> %414, i32 252)
>  %416 = call float @llvm.SI.load.const(<16 x i8> %414, i32 268)
>  %417 = call float @llvm.SI.load.const(<16 x i8> %414, i32 284)
>  %418 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %419 = fsub float %415, %418
>  %420 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %421 = fsub float %416, %420
>  %422 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %423 = fsub float %417, %422
>  %424 = fmul float %419, %419
>  %425 = fmul float %421, %421
>  %426 = fadd float %425, %424
>  %427 = fmul float %423, %423
>  %428 = fadd float %426, %427
>  %429 = call float @llvm.sqrt.f32(float %428)
>  %430 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %431 = load <16 x i8>, <16 x i8> addrspace(2)* %430, align 16, !invariant.load !0
>  %432 = call float @llvm.SI.load.const(<16 x i8> %431, i32 296)
>  %433 = call float @llvm.SI.load.const(<16 x i8> %431, i32 300)
>  %434 = fmul float %429, %432
>  %435 = fadd float %434, %433
>  %436 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %437 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %438 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %439 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %440 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %441 = load <8 x i32>, <8 x i32> addrspace(2)* %440, align 32, !invariant.load !0
>  %442 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %443 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %442, i64 0, i64 15, !amdgpu.uniform !0
>  %444 = load <4 x i32>, <4 x i32> addrspace(2)* %443, align 16, !invariant.load !0
>  %445 = extractelement <8 x i32> %441, i32 7
>  %446 = extractelement <4 x i32> %444, i32 0
>  %447 = and i32 %446, %445
>  %448 = insertelement <4 x i32> %444, i32 %447, i32 0
>  %449 = fdiv float %437, %439, !fpmath !1
>  %450 = fdiv float %438, %439, !fpmath !1
>  %451 = bitcast float %449 to i32
>  %452 = bitcast float %450 to i32
>  %453 = insertelement <2 x i32> undef, i32 %451, i32 0
>  %454 = insertelement <2 x i32> %453, i32 %452, i32 1
>  %455 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %454, <8 x i32> %441, <4 x i32> %448, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %456 = extractelement <4 x float> %455, i32 3
>  %457 = fmul float %456, %456
>  %458 = fdiv float 1.000000e+00, %429, !fpmath !1
>  %459 = fmul float %419, %458
>  %460 = fmul float %421, %458
>  %461 = fmul float %423, %458
>  %462 = fmul float %459, %121
>  %463 = fmul float %460, %123
>  %464 = fadd float %463, %462
>  %465 = fmul float %461, %125
>  %466 = fadd float %464, %465
>  %467 = call float @llvm.AMDGPU.clamp.(float %466, float 0.000000e+00, float 1.000000e+00)
>  %468 = fadd float %435, -5.000000e-01
>  %469 = fmul float %468, 2.000000e+00
>  %470 = fsub float 1.000000e+00, %469
>  %471 = call float @llvm.AMDGPU.clamp.(float %470, float 0.000000e+00, float 1.000000e+00)
>  %472 = fmul float %457, %471
>  %473 = call float @llvm.AMDGPU.clamp.(float %436, float 0.000000e+00, float 1.000000e+00)
>  %474 = fmul float %472, %473
>  %475 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %476 = load <16 x i8>, <16 x i8> addrspace(2)* %475, align 16, !invariant.load !0
>  %477 = call float @llvm.SI.load.const(<16 x i8> %476, i32 304)
>  %478 = fmul float %477, %474
>  %479 = call float @llvm.SI.load.const(<16 x i8> %476, i32 308)
>  %480 = fmul float %479, %474
>  %481 = call float @llvm.SI.load.const(<16 x i8> %476, i32 312)
>  %482 = fmul float %481, %474
>  %483 = fmul float %478, %78
>  %484 = fmul float %480, %78
>  %485 = fmul float %482, %78
>  %486 = fmul float %467, %483
>  %487 = fadd float %486, %408
>  %488 = fmul float %467, %484
>  %489 = fadd float %488, %410
>  %490 = fmul float %467, %485
>  %491 = fadd float %490, %412
>  %492 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %493 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %494 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %495 = load <8 x i32>, <8 x i32> addrspace(2)* %494, align 32, !invariant.load !0
>  %496 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %497 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %496, i64 0, i64 31, !amdgpu.uniform !0
>  %498 = load <4 x i32>, <4 x i32> addrspace(2)* %497, align 16, !invariant.load !0
>  %499 = extractelement <8 x i32> %495, i32 7
>  %500 = extractelement <4 x i32> %498, i32 0
>  %501 = and i32 %500, %499
>  %502 = insertelement <4 x i32> %498, i32 %501, i32 0
>  %503 = bitcast float %492 to i32
>  %504 = bitcast float %493 to i32
>  %505 = insertelement <2 x i32> undef, i32 %503, i32 0
>  %506 = insertelement <2 x i32> %505, i32 %504, i32 1
>  %507 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %506, <8 x i32> %495, <4 x i32> %502, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %508 = extractelement <4 x float> %507, i32 0
>  %509 = extractelement <4 x float> %507, i32 1
>  %510 = extractelement <4 x float> %507, i32 2
>  %511 = fmul float %508, 0x3FD3333340000000
>  %512 = fmul float %509, 0x3FE2E147A0000000
>  %513 = fadd float %512, %511
>  %514 = fmul float %510, 0x3FBC28F5C0000000
>  %515 = fadd float %513, %514
>  %516 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %517 = load <16 x i8>, <16 x i8> addrspace(2)* %516, align 16, !invariant.load !0
>  %518 = call float @llvm.SI.load.const(<16 x i8> %517, i32 416)
>  %519 = fmul float %515, %518
>  %520 = call float @llvm.SI.load.const(<16 x i8> %517, i32 412)
>  %521 = fadd float %520, 1.000000e+00
>  %522 = fmul float %519, %521
>  %523 = fmul float %508, %522
>  %524 = fmul float %509, %522
>  %525 = fmul float %510, %522
>  %526 = fmul float %523, 3.200000e+01
>  %527 = fmul float %524, 3.200000e+01
>  %528 = fmul float %525, 3.200000e+01
>  %529 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %530 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %531 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %532 = load <8 x i32>, <8 x i32> addrspace(2)* %531, align 32, !invariant.load !0
>  %533 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %534 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %533, i64 0, i64 19, !amdgpu.uniform !0
>  %535 = load <4 x i32>, <4 x i32> addrspace(2)* %534, align 16, !invariant.load !0
>  %536 = extractelement <8 x i32> %532, i32 7
>  %537 = extractelement <4 x i32> %535, i32 0
>  %538 = and i32 %537, %536
>  %539 = insertelement <4 x i32> %535, i32 %538, i32 0
>  %540 = bitcast float %529 to i32
>  %541 = bitcast float %530 to i32
>  %542 = insertelement <2 x i32> undef, i32 %540, i32 0
>  %543 = insertelement <2 x i32> %542, i32 %541, i32 1
>  %544 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %543, <8 x i32> %532, <4 x i32> %539, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %545 = extractelement <4 x float> %544, i32 0
>  %546 = extractelement <4 x float> %544, i32 1
>  %547 = extractelement <4 x float> %544, i32 2
>  %548 = fmul float %49, %121
>  %549 = fmul float %50, %123
>  %550 = fadd float %549, %548
>  %551 = fmul float %51, %125
>  %552 = fadd float %550, %551
>  %553 = call float @llvm.AMDGPU.clamp.(float %552, float 0.000000e+00, float 1.000000e+00)
>  %554 = fsub float 1.000000e+00, %553
>  %555 = call float @llvm.pow.f32(float %554, float 5.000000e+00)
>  %556 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %557 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %558 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %559 = fmul float %555, %556
>  %560 = fmul float %555, %557
>  %561 = fmul float %555, %558
>  %562 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %563 = load <8 x i32>, <8 x i32> addrspace(2)* %562, align 32, !invariant.load !0
>  %564 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %565 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %564, i64 0, i64 11, !amdgpu.uniform !0
>  %566 = load <4 x i32>, <4 x i32> addrspace(2)* %565, align 16, !invariant.load !0
>  %567 = extractelement <8 x i32> %563, i32 7
>  %568 = extractelement <4 x i32> %566, i32 0
>  %569 = and i32 %568, %567
>  %570 = insertelement <4 x i32> %566, i32 %569, i32 0
>  %571 = call float @llvm.amdgcn.cubetc(float %263, float %265, float %267)
>  %572 = call float @llvm.amdgcn.cubesc(float %263, float %265, float %267)
>  %573 = call float @llvm.amdgcn.cubema(float %263, float %265, float %267)
>  %574 = call float @llvm.amdgcn.cubeid(float %263, float %265, float %267)
>  %575 = call float @llvm.fabs.f32(float %573)
>  %576 = fdiv float 1.000000e+00, %575, !fpmath !1
>  %577 = fmul float %571, %576
>  %578 = fadd float %577, 1.500000e+00
>  %579 = fmul float %572, %576
>  %580 = fadd float %579, 1.500000e+00
>  %581 = bitcast float %580 to i32
>  %582 = bitcast float %578 to i32
>  %583 = bitcast float %574 to i32
>  %584 = bitcast float %269 to i32
>  %585 = insertelement <4 x i32> undef, i32 %581, i32 0
>  %586 = insertelement <4 x i32> %585, i32 %582, i32 1
>  %587 = insertelement <4 x i32> %586, i32 %583, i32 2
>  %588 = insertelement <4 x i32> %587, i32 %584, i32 3
>  %589 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %588, <8 x i32> %563, <4 x i32> %570, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %590 = extractelement <4 x float> %589, i32 0
>  %591 = extractelement <4 x float> %589, i32 1
>  %592 = extractelement <4 x float> %589, i32 2
>  %593 = fmul float %559, %590
>  %594 = fmul float %560, %591
>  %595 = fmul float %561, %592
>  %596 = fmul float %593, %157
>  %597 = fmul float %594, %157
>  %598 = fmul float %595, %157
>  %599 = fmul float %487, %545
>  %600 = fadd float %599, %596
>  %601 = fmul float %489, %546
>  %602 = fadd float %601, %597
>  %603 = fmul float %491, %547
>  %604 = fadd float %603, %598
>  %605 = fadd float %600, %526
>  %606 = fadd float %602, %527
>  %607 = fadd float %604, %528
>  %608 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %609 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %610 = load <16 x i8>, <16 x i8> addrspace(2)* %609, align 16, !invariant.load !0
>  %611 = call float @llvm.SI.load.const(<16 x i8> %610, i32 12)
>  %612 = fsub float %608, %611
>  %613 = call float @llvm.maxnum.f32(float %612, float 0.000000e+00)
>  %614 = call float @llvm.SI.load.const(<16 x i8> %610, i32 28)
>  %615 = call float @llvm.SI.load.const(<16 x i8> %610, i32 12)
>  %616 = fsub float %614, %615
>  %617 = fadd float %616, 0x3F50624DE0000000
>  %618 = fdiv float 1.000000e+00, %617, !fpmath !1
>  %619 = fmul float %613, %618
>  %620 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %621 = load <16 x i8>, <16 x i8> addrspace(2)* %620, align 16, !invariant.load !0
>  %622 = call float @llvm.SI.load.const(<16 x i8> %621, i32 28)
>  %623 = call float @llvm.floor.f32(float %622)
>  %624 = fsub float %622, %623
>  %625 = fmul float %624, 8.000000e+00
>  %626 = call float @llvm.pow.f32(float %619, float %625)
>  %627 = call float @llvm.AMDGPU.clamp.(float %626, float 0.000000e+00, float 1.000000e+00)
>  %628 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %629 = fmul float %628, %627
>  %630 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %631 = load <16 x i8>, <16 x i8> addrspace(2)* %630, align 16, !invariant.load !0
>  %632 = call float @llvm.SI.load.const(<16 x i8> %631, i32 32)
>  %633 = fsub float 1.000000e+00, %629
>  %634 = fmul float %605, %629
>  %635 = fmul float %632, %633
>  %636 = fadd float %634, %635
>  %637 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %638 = load <16 x i8>, <16 x i8> addrspace(2)* %637, align 16, !invariant.load !0
>  %639 = call float @llvm.SI.load.const(<16 x i8> %638, i32 36)
>  %640 = fsub float 1.000000e+00, %629
>  %641 = fmul float %606, %629
>  %642 = fmul float %639, %640
>  %643 = fadd float %641, %642
>  %644 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %645 = load <16 x i8>, <16 x i8> addrspace(2)* %644, align 16, !invariant.load !0
>  %646 = call float @llvm.SI.load.const(<16 x i8> %645, i32 40)
>  %647 = fsub float 1.000000e+00, %629
>  %648 = fmul float %607, %629
>  %649 = fmul float %646, %647
>  %650 = fadd float %648, %649
>  %651 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %652 = bitcast float %5 to i32
>  %653 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %652, 10
>  %654 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %653, float %636, 11
>  %655 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %654, float %643, 12
>  %656 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %655, float %650, 13
>  %657 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %656, float %651, 14
>  %658 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %657, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %658
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[19:22], v4, s[4:7], 0 idxen   ; E00C2000 80011304
>	buffer_load_format_xyzw v[14:17], v5, s[12:15], 0 idxen ; E00C2000 80030E05
>	buffer_load_format_xyzw v[10:13], v6, s[16:19], 0 idxen ; E00C2000 80040A06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s5, s[0:3], 0x10                    ; C2028110
>	s_buffer_load_dword s6, s[0:3], 0x11                    ; C2030111
>	s_buffer_load_dword s7, s[0:3], 0x12                    ; C2038112
>	s_buffer_load_dword s8, s[0:3], 0x38c                   ; C20400FF 0000038C
>	s_buffer_load_dword s4, s[0:3], 0x39e                   ; C20200FF 0000039E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v23, s5                                   ; 7E2E0205
>	v_mov_b32_e32 v24, s6                                   ; 7E300206
>	v_mov_b32_e32 v25, s7                                   ; 7E320207
>	s_cmp_eq_u32 s8, -1                                     ; BF06C108
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s5, s[0:3], 0x2c                    ; C202812C
>	s_buffer_load_dword s6, s[0:3], 0x2d                    ; C203012D
>	s_buffer_load_dword s7, s[0:3], 0x2e                    ; C203812E
>	s_buffer_load_dword s8, s[0:3], 0x2f                    ; C204012F
>	s_buffer_load_dword s9, s[0:3], 0x30                    ; C2048130
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	s_buffer_load_dword s5, s[0:3], 0x31                    ; C2028131
>	s_buffer_load_dword s6, s[0:3], 0x32                    ; C2030132
>	v_mov_b32_e32 v0, s7                                    ; 7E000207
>	v_sub_f32_e32 v26, s8, v23                              ; 08342E08
>	v_mov_b32_e32 v6, s9                                    ; 7E0C0209
>	s_buffer_load_dword s7, s[0:3], 0x33                    ; C2038133
>	s_buffer_load_dword s8, s[0:3], 0x34                    ; C2040134
>	s_buffer_load_dword s9, s[0:3], 0x35                    ; C2048135
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s5                                    ; 7E100205
>	v_mov_b32_e32 v7, s6                                    ; 7E0E0206
>	s_buffer_load_dword s5, s[0:3], 0x36                    ; C2028136
>	s_buffer_load_dword s6, s[0:3], 0x37                    ; C2030137
>	v_sub_f32_e32 v27, s7, v24                              ; 08363007
>	v_mov_b32_e32 v9, s8                                    ; 7E120208
>	v_mov_b32_e32 v17, s9                                   ; 7E220209
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v18, s5                                   ; 7E240205
>	v_sub_f32_e32 v28, s6, v25                              ; 08383206
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[12:15], s[10:11], 0x10                 ; C0860B10
>	s_movk_i32 s16, 0xbc                                    ; B01000BC
>	s_buffer_load_dword s5, s[0:3], 0x390                   ; C20280FF 00000390
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[12:15], 0 idxen ; E00C2000 80032108
>	s_movk_i32 s15, 0xb0                                    ; B00F00B0
>	s_movk_i32 s14, 0xb8                                    ; B00E00B8
>	s_movk_i32 s13, 0xb4                                    ; B00D00B4
>	s_cmp_eq_u32 s5, -1                                     ; BF06C105
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v33                               ; 7E001121
>	v_mul_lo_i32 v18, v0, 48                                ; D2D60012 00016100
>	v_add_i32_e32 v0, vcc, s15, v18                         ; 4A00240F
>	v_add_i32_e32 v6, vcc, s14, v18                         ; 4A0C240E
>	v_add_i32_e32 v8, vcc, s16, v18                         ; 4A102410
>	v_add_i32_e32 v5, vcc, s13, v18                         ; 4A0A240D
>	buffer_load_dword v1, v0, s[0:3], 0 offen               ; E0301000 80000100
>	buffer_load_dword v0, v6, s[0:3], 0 offen               ; E0301000 80000006
>	buffer_load_dword v6, v8, s[0:3], 0 offen               ; E0301000 80000608
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v26, v23, v6                           ; 0A340D17
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v7, vcc, 0xcc, v18                        ; 4A0E24FF 000000CC
>	v_add_i32_e32 v27, vcc, 0xdc, v18                       ; 4A3624FF 000000DC
>	v_add_i32_e32 v9, vcc, 0xc8, v18                        ; 4A1224FF 000000C8
>	v_add_i32_e32 v6, vcc, 0xc0, v18                        ; 4A0C24FF 000000C0
>	v_add_i32_e32 v8, vcc, 0xc4, v18                        ; 4A1024FF 000000C4
>	v_add_i32_e32 v17, vcc, 0xd4, v18                       ; 4A2224FF 000000D4
>	buffer_load_dword v28, v7, s[0:3], 0 offen              ; E0301000 80001C07
>	buffer_load_dword v7, v9, s[0:3], 0 offen               ; E0301000 80000709
>	v_add_i32_e32 v9, vcc, 0xd0, v18                        ; 4A1224FF 000000D0
>	v_add_i32_e32 v18, vcc, 0xd8, v18                       ; 4A2424FF 000000D8
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v24, v28                          ; 0A363918
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_subrev_f32_e32 v28, v25, v29                          ; 0A383B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	v_cvt_i32_f32_e32 v6, v34                               ; 7E0C1122
>	s_movk_i32 s5, 0xdc                                     ; B00500DC
>	s_movk_i32 s12, 0xcc                                    ; B00C00CC
>	v_add_i32_e32 v17, vcc, s5, v18                         ; 4A222405
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[8:11], 0 idxen  ; E00C2000 80021D07
>	s_movk_i32 s11, 0xc0                                    ; B00B00C0
>	s_movk_i32 s9, 0xc8                                     ; B00900C8
>	v_add_i32_e32 v7, vcc, s11, v18                         ; 4A0E240B
>	v_add_i32_e32 v9, vcc, s9, v18                          ; 4A122409
>	s_movk_i32 s10, 0xc4                                    ; B00A00C4
>	v_mul_lo_i32 v33, v6, 48                                ; D2D60021 00016106
>	v_add_i32_e32 v6, vcc, s12, v18                         ; 4A0C240C
>	s_movk_i32 s7, 0xd4                                     ; B00700D4
>	s_movk_i32 s8, 0xd0                                     ; B00800D0
>	s_movk_i32 s6, 0xd8                                     ; B00600D8
>	v_add_i32_e32 v8, vcc, s10, v18                         ; 4A10240A
>	v_add_i32_e32 v28, vcc, s7, v18                         ; 4A382407
>	buffer_load_dword v27, v6, s[0:3], 0 offen              ; E0301000 80001B06
>	v_add_i32_e32 v6, vcc, s8, v18                          ; 4A0C2408
>	v_add_i32_e32 v18, vcc, s6, v18                         ; 4A242406
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v34, v6, s[0:3], 0 offen              ; E0301000 80002206
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v1, v29, v1                               ; 1002031D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v0, v29, v0                               ; 1000011D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v25, v17                          ; 0A4A2319
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v6, v29, v7                               ; 100C0F1D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	v_subrev_f32_e32 v9, v24, v27                           ; 0A123718
>	v_mul_f32_e32 v27, v29, v9                              ; 1036131D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v17, v29, v28                             ; 1022391D
>	v_mul_f32_e32 v9, v29, v34                              ; 1012451D
>	v_mul_f32_e32 v18, v29, v18                             ; 1024251D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s16, v33                        ; 4A3A4210
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v23, v29                          ; 0A3A3B17
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v24, v29                          ; 0A3A3B18
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v30, v29                              ; 3E023B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s13, s[0:3], 0x394                  ; C20680FF 00000394
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s13, 0                                     ; BF06800D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v30, v29                              ; 3E003B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v30, v29                             ; 3E223B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v30, v29                             ; 3E243B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0xb0, v29                       ; 4A3C3AFF 000000B0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v31, v30                              ; 3E023D1F
>	v_add_i32_e32 v30, vcc, 0xbc, v29                       ; 4A3C3AFF 000000BC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v23, v30                          ; 0A3C3D17
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_add_i32_e32 v30, vcc, s12, v29                        ; 4A3C3A0C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v24, v30                          ; 0A3C3D18
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0xb4, v29                       ; 4A3C3AFF 000000B4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, 0xb8, v29                       ; 4A3C3AFF 000000B8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v31, v30                              ; 3E003D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v31, v30                             ; 3E223D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	v_add_i32_e32 v29, vcc, s5, v29                         ; 4A3A3A05
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v31, v30                             ; 3E243D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s5, s[0:3], 0x398                   ; C20280FF 00000398
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s5, 0                                      ; BF068005
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0xb0, v29                       ; 4A3C3AFF 000000B0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v32, v30                              ; 3E023D20
>	v_add_i32_e32 v30, vcc, 0xbc, v29                       ; 4A3C3AFF 000000BC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v23, v30                          ; 0A3C3D17
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_add_i32_e32 v30, vcc, 0xcc, v29                       ; 4A3C3AFF 000000CC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v24, v30                          ; 0A3C3D18
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0xb4, v29                       ; 4A3C3AFF 000000B4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0xb8, v29                       ; 4A3C3AFF 000000B8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v32, v30                              ; 3E003D20
>	v_add_i32_e32 v30, vcc, 0xc0, v29                       ; 4A3C3AFF 000000C0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0xc4, v29                       ; 4A3C3AFF 000000C4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0xc8, v29                       ; 4A3C3AFF 000000C8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0xd0, v29                       ; 4A3C3AFF 000000D0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0xd4, v29                       ; 4A3C3AFF 000000D4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v32, v30                             ; 3E223D20
>	v_add_i32_e32 v30, vcc, 0xd8, v29                       ; 4A3C3AFF 000000D8
>	v_add_i32_e32 v29, vcc, 0xdc, v29                       ; 4A3A3AFF 000000DC
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v32, v30                             ; 3E243D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v20, s4, v20                              ; 10282804
>	v_mul_f32_e32 v19, s4, v19                              ; 10262604
>	v_mul_f32_e32 v29, v5, v20                              ; 103A2905
>	v_mul_f32_e32 v21, s4, v21                              ; 102A2A04
>	v_mac_f32_e32 v29, v1, v19                              ; 3E3A2701
>	v_mac_f32_e32 v29, v0, v21                              ; 3E3A2B00
>	v_mac_f32_e32 v29, v26, v22                             ; 3E3A2D1A
>	v_mul_f32_e32 v26, v8, v20                              ; 10342908
>	v_mac_f32_e32 v26, v6, v19                              ; 3E342706
>	v_mac_f32_e32 v26, v7, v21                              ; 3E342B07
>	s_buffer_load_dword s14, s[0:3], 0x1f                   ; C207011F
>	v_mac_f32_e32 v26, v27, v22                             ; 3E342D1B
>	v_mul_f32_e32 v27, v17, v20                             ; 10362911
>	v_mul_f32_e32 v20, 0, v20                               ; 10282880
>	s_buffer_load_dword s11, s[0:3], 0x1c                   ; C205811C
>	s_buffer_load_dword s12, s[0:3], 0x1d                   ; C206011D
>	s_buffer_load_dword s13, s[0:3], 0x1e                   ; C206811E
>	s_buffer_load_dword s18, s[0:3], 0x23                   ; C2090123
>	v_mac_f32_e32 v20, 0, v19                               ; 3E282680
>	s_buffer_load_dword s15, s[0:3], 0x20                   ; C2078120
>	s_buffer_load_dword s16, s[0:3], 0x21                   ; C2080121
>	s_buffer_load_dword s17, s[0:3], 0x22                   ; C2088122
>	s_buffer_load_dword s22, s[0:3], 0x27                   ; C20B0127
>	v_mac_f32_e32 v27, v9, v19                              ; 3E362709
>	v_mac_f32_e32 v20, 0, v21                               ; 3E282A80
>	s_buffer_load_dword s21, s[0:3], 0x26                   ; C20A8126
>	v_mac_f32_e32 v27, v18, v21                             ; 3E362B12
>	v_add_f32_e32 v19, v22, v20                             ; 06262916
>	v_add_f32_e32 v20, v23, v29                             ; 06283B17
>	s_buffer_load_dword s19, s[0:3], 0x24                   ; C2098124
>	s_buffer_load_dword s20, s[0:3], 0x25                   ; C20A0125
>	v_mac_f32_e32 v27, v28, v22                             ; 3E362D1C
>	v_add_f32_e32 v21, v24, v26                             ; 062A3518
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_subrev_f32_e32 v23, s14, v20                          ; 0A2E280E
>	s_buffer_load_dword s23, s[0:3], 0x28                   ; C20B8128
>	s_buffer_load_dword s24, s[0:3], 0x29                   ; C20C0129
>	s_buffer_load_dword s25, s[0:3], 0x3                    ; C20C8103
>	v_add_f32_e32 v22, v25, v27                             ; 062C3719
>	v_mul_f32_e32 v24, s11, v23                             ; 10302E0B
>	v_mul_f32_e32 v25, s12, v23                             ; 10322E0C
>	v_subrev_f32_e32 v26, s18, v21                          ; 0A342A12
>	v_mul_f32_e32 v23, s13, v23                             ; 102E2E0D
>	s_buffer_load_dword s4, s[0:3], 0x7                     ; C2020107
>	v_mac_f32_e32 v24, s15, v26                             ; 3E30340F
>	v_mac_f32_e32 v25, s16, v26                             ; 3E323410
>	v_mac_f32_e32 v23, s17, v26                             ; 3E2E3411
>	v_subrev_f32_e32 v26, s22, v22                          ; 0A342C16
>	v_mac_f32_e32 v23, s21, v26                             ; 3E2E3415
>	v_mac_f32_e32 v24, s19, v26                             ; 3E303413
>	v_mac_f32_e32 v25, s20, v26                             ; 3E323414
>	v_mul_f32_e32 v26, 0.5, v23                             ; 10342EF0
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mad_f32 v24, s23, v24, v26                            ; D2820018 046A3017
>	v_mac_f32_e32 v26, s24, v25                             ; 3E343218
>	v_mul_f32_e32 v25, s25, v20                             ; 10322819
>	v_mac_f32_e32 v25, s4, v21                              ; 3E322A04
>	s_buffer_load_dword s4, s[0:3], 0xb                     ; C202010B
>	s_buffer_load_dword s5, s[0:3], 0xf                     ; C202810F
>	s_buffer_load_dword s10, s[0:3], 0x1b                   ; C205011B
>	s_buffer_load_dword s17, s[0:3], 0x6                    ; C2088106
>	s_buffer_load_dword s6, s[0:3], 0x14                    ; C2030114
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v25, s4, v22                              ; 3E322C04
>	v_mac_f32_e32 v25, s5, v19                              ; 3E322605
>	s_buffer_load_dword s5, s[0:3], 0x2b                    ; C202812B
>	s_buffer_load_dword s4, s[0:3], 0x2a                    ; C202012A
>	v_mul_f32_e32 v27, s10, v25                             ; 1036320A
>	s_buffer_load_dword s10, s[0:3], 0x2                    ; C2050102
>	exp 15, 32, 0, 0, 0, v20, v21, v22, v27                 ; F800020F 1B161514
>	s_waitcnt expcnt(0) lgkmcnt(0)                          ; BF8C000F
>	v_mov_b32_e32 v27, s5                                   ; 7E360205
>	v_mac_f32_e32 v27, s4, v23                              ; 3E362E04
>	s_buffer_load_dword s7, s[0:3], 0x15                    ; C2038115
>	s_buffer_load_dword s8, s[0:3], 0x16                    ; C2040116
>	s_buffer_load_dword s9, s[0:3], 0x17                    ; C2048117
>	s_buffer_load_dword s26, s[0:3], 0x4                    ; C20D0104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s13, s[0:3], 0xc                    ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                    ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                    ; C207810E
>	v_add_f32_e32 v14, v14, v14                             ; 061C1D0E
>	v_add_f32_e32 v10, v10, v10                             ; 0614150A
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s16, s[0:3], 0x5                    ; C2080105
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	exp 15, 33, 0, 0, 0, v24, v26, v27, v23                 ; F800021F 171B1A18
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v23, v14, v1, -v1                             ; D2820017 8406030E
>	v_mad_f32 v15, 2.0, v15, -1.0                           ; D282000F 03CE1EF4
>	v_mad_f32 v11, 2.0, v11, -1.0                           ; D282000B 03CE16F4
>	v_mad_f32 v1, v10, v1, -v1                              ; D2820001 8406030A
>	v_mad_f32 v24, v14, v6, -v6                             ; D2820018 841A0D0E
>	v_mac_f32_e32 v23, v5, v15                              ; 3E2E1F05
>	v_mac_f32_e32 v1, v5, v11                               ; 3E021705
>	v_mad_f32 v5, v10, v6, -v6                              ; D2820005 841A0D0A
>	v_mac_f32_e32 v24, v8, v15                              ; 3E301F08
>	v_mac_f32_e32 v5, v8, v11                               ; 3E0A1708
>	v_mul_f32_e32 v8, s10, v20                              ; 1010280A
>	v_mac_f32_e32 v8, s17, v21                              ; 3E102A11
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v8, s0, v22                               ; 3E102C00
>	v_mad_f32 v6, v10, v9, -v9                              ; D2820006 8426130A
>	v_mad_f32 v14, v14, v9, -v9                             ; D282000E 8426130E
>	v_mac_f32_e32 v8, s15, v19                              ; 3E10260F
>	v_mov_b32_e32 v9, s6                                    ; 7E120206
>	v_mac_f32_e32 v9, s7, v8                                ; 3E121007
>	v_add_f32_e64 v9, v9, 0 clamp                           ; D2060809 00010109
>	v_log_f32_e32 v9, v9                                    ; 7E124F09
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v12, 2.0, v12, -1.0                           ; D282000C 03CE18F4
>	v_mac_f32_e32 v14, v17, v15                             ; 3E1C1F11
>	v_mul_legacy_f32_e32 v9, s8, v9                         ; 0E121208
>	v_mac_f32_e32 v23, v0, v16                              ; 3E2E2100
>	v_mac_f32_e32 v1, v0, v12                               ; 3E021900
>	v_mul_f32_e32 v0, s4, v20                               ; 10002804
>	v_mac_f32_e32 v6, v17, v11                              ; 3E0C1711
>	v_mac_f32_e32 v0, s26, v21                              ; 3E002A1A
>	v_mac_f32_e32 v14, v18, v16                             ; 3E1C2112
>	v_mac_f32_e32 v5, v7, v12                               ; 3E0A1907
>	v_exp_f32_e32 v9, v9                                    ; 7E124B09
>	v_sub_f32_e64 v10, 1.0, s9                              ; D208000A 000012F2
>	v_mac_f32_e32 v10, s9, v9                               ; 3E141209
>	v_mac_f32_e32 v0, s11, v22                              ; 3E002C0B
>	v_mac_f32_e32 v24, v7, v16                              ; 3E302107
>	v_mac_f32_e32 v6, v18, v12                              ; 3E0C1912
>	v_mul_f32_e32 v9, v5, v14                               ; 10121D05
>	v_mul_f32_e32 v11, v6, v23                              ; 10162F06
>	v_mul_f32_e32 v12, v1, v24                              ; 10183101
>	v_add_f32_e32 v13, v13, v13                             ; 061A1B0D
>	v_mad_f32 v9, v24, v6, -v9                              ; D2820009 84260D18
>	v_mac_f32_e32 v0, s13, v19                              ; 3E00260D
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_mul_f32_e32 v7, s5, v20                               ; 100E2805
>	v_mad_f32 v11, v14, v1, -v11                            ; D282000B 842E030E
>	v_mad_f32 v12, v23, v5, -v12                            ; D282000C 84320B17
>	v_mad_f32 v9, v13, v9, -v9                              ; D2820009 8426130D
>	exp 15, 34, 0, 0, 0, v3, v4, v10, v0                    ; F800022F 000A0403
>	v_mac_f32_e32 v7, s16, v21                              ; 3E0E2A10
>	v_mad_f32 v11, v13, v11, -v11                           ; D282000B 842E170D
>	v_mad_f32 v12, v13, v12, -v12                           ; D282000C 8432190D
>	exp 15, 35, 0, 0, 0, v1, v5, v6, v9                     ; F800023F 09060501
>	v_mac_f32_e32 v7, s12, v22                              ; 3E0E2C0C
>	exp 15, 36, 0, 0, 0, v11, v12, v23, v24                 ; F800024F 18170C0B
>	v_mac_f32_e32 v7, s14, v19                              ; 3E0E260E
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v0, v7, v8, v25                    ; F80008CF 19080700
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2352 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v9, v4, 3, 3, [m0]                          ; C8240F04
>	v_interp_p2_f32 v9, [v9], v5, 3, 3, [m0]                    ; C8250F05
>	v_interp_p1_f32 v10, v4, 0, 4, [m0]                         ; C8281004
>	v_interp_p2_f32 v10, [v10], v5, 0, 4, [m0]                  ; C8291005
>	v_interp_p1_f32 v14, v4, 1, 4, [m0]                         ; C8381104
>	v_interp_p2_f32 v14, [v14], v5, 1, 4, [m0]                  ; C8391105
>	v_interp_p1_f32 v0, v4, 2, 4, [m0]                          ; C8001204
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 4, [m0]                    ; C8011205
>	v_interp_p1_f32 v1, v4, 3, 4, [m0]                          ; C8041304
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	v_interp_p2_f32 v1, [v1], v5, 3, 4, [m0]                    ; C8051305
>	v_interp_p1_f32 v6, v4, 0, 5, [m0]                          ; C8181404
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 5, [m0]                    ; C8191405
>	v_interp_p1_f32 v15, v2, 0, 0, [m0]                         ; C83C0002
>	v_interp_p2_f32 v15, [v15], v3, 0, 0, [m0]                  ; C83D0003
>	v_interp_p1_f32 v17, v2, 1, 0, [m0]                         ; C8440102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v16, s8, v15                                  ; 08201E08
>	v_interp_p2_f32 v17, [v17], v3, 1, 0, [m0]                  ; C8450103
>	v_interp_p1_f32 v19, v2, 2, 0, [m0]                         ; C84C0202
>	v_sub_f32_e32 v18, s9, v17                                  ; 08242209
>	v_mul_f32_e32 v7, v16, v16                                  ; 100E2110
>	v_interp_p2_f32 v19, [v19], v3, 2, 0, [m0]                  ; C84D0203
>	v_sub_f32_e32 v20, s11, v19                                 ; 0828260B
>	v_mac_f32_e32 v7, v18, v18                                  ; 3E0E2512
>	v_mac_f32_e32 v7, v20, v20                                  ; 3E0E2914
>	v_rsq_f32_e32 v21, v7                                       ; 7E2A5D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v22, v21, v16                                 ; 102C2115
>	v_mul_f32_e32 v23, v21, v18                                 ; 102E2515
>	s_load_dwordx4 s[20:23], s[4:5], 0x6c                       ; C08A056C
>	v_mul_f32_e32 v24, v7, v0                                   ; 10300107
>	v_mul_f32_e32 v25, v7, v1                                   ; 10320307
>	v_mul_f32_e32 v0, v24, v22                                  ; 10002D18
>	s_load_dwordx8 s[12:19], s[4:5], 0x60                       ; C0C60560
>	v_mul_f32_e32 v26, v7, v6                                   ; 10340D07
>	v_mul_f32_e32 v27, v21, v20                                 ; 10362915
>	v_mac_f32_e32 v0, v25, v23                                  ; 3E002F19
>	v_mac_f32_e32 v0, v26, v27                                  ; 3E00371A
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v28, v0, 0 clamp                              ; D206081C 00010100
>	v_interp_p1_f32 v0, v2, 0, 2, [m0]                          ; C8000802
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                    ; C8010803
>	v_interp_p1_f32 v1, v2, 1, 2, [m0]                          ; C8040902
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_interp_p2_f32 v1, [v1], v3, 1, 2, [m0]                    ; C8050903
>	image_sample v[11:12], v[0:1], s[12:19], s[20:23] dmask:0x6 ; F0800600 00A30B00
>	s_load_dwordx4 s[24:27], s[4:5], 0x5c                       ; C08C055C
>	s_load_dwordx8 s[12:19], s[4:5], 0x50                       ; C0C60550
>	s_buffer_load_dword s8, s[0:3], 0x11                        ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                        ; C2048112
>	s_buffer_load_dword s11, s[0:3], 0x14                       ; C2058114
>	s_buffer_load_dword s28, s[0:3], 0x15                       ; C20E0115
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s24, s24, s19                                     ; 87181318
>	image_sample v[7:8], v[0:1], s[12:19], s[24:27] dmask:0xa   ; F0800A00 00C30700
>	s_buffer_load_dword s12, s[0:3], 0x10                       ; C2060110
>	v_interp_p1_f32 v29, v4, 0, 3, [m0]                         ; C8740C04
>	v_interp_p2_f32 v29, [v29], v5, 0, 3, [m0]                  ; C8750C05
>	v_interp_p1_f32 v30, v4, 1, 3, [m0]                         ; C8780D04
>	s_buffer_load_dword s29, s[0:3], 0x16                       ; C20E8116
>	s_buffer_load_dword s30, s[0:3], 0x18                       ; C20F0118
>	s_buffer_load_dword s31, s[0:3], 0x19                       ; C20F8119
>	v_interp_p2_f32 v30, [v30], v5, 1, 3, [m0]                  ; C8790D05
>	v_interp_p1_f32 v31, v4, 2, 3, [m0]                         ; C87C0E04
>	v_mov_b32_e32 v4, 0x403b800a                                ; 7E0802FF 403B800A
>	v_interp_p2_f32 v31, [v31], v5, 2, 3, [m0]                  ; C87D0E05
>	v_mad_f32 v5, v4, v24, v15                                  ; D2820005 043E3104
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s12, v5                                   ; 100C0A0C
>	v_mul_f32_e32 v32, s8, v5                                   ; 10400A08
>	v_mul_f32_e32 v33, s9, v5                                   ; 10420A09
>	v_mad_f32 v5, v4, v25, v17                                  ; D2820005 04463304
>	v_mac_f32_e32 v6, s11, v5                                   ; 3E0C0A0B
>	v_mad_f32 v4, v4, v26, v19                                  ; D2820004 044E3504
>	v_mac_f32_e32 v32, s28, v5                                  ; 3E400A1C
>	s_buffer_load_dword s34, s[0:3], 0x1a                       ; C211011A
>	v_mac_f32_e32 v33, s29, v5                                  ; 3E420A1D
>	s_buffer_load_dword s35, s[0:3], 0x1c                       ; C211811C
>	v_mac_f32_e32 v6, s30, v4                                   ; 3E0C081E
>	v_mac_f32_e32 v32, s31, v4                                  ; 3E40081F
>	s_buffer_load_dword s36, s[0:3], 0x1d                       ; C212011D
>	s_buffer_load_dword s37, s[0:3], 0x1e                       ; C212811E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                        ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                        ; C08E050C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v33, s34, v4                                  ; 3E420822
>	v_add_f32_e32 v5, s35, v6                                   ; 060A0C23
>	v_add_f32_e32 v6, s36, v32                                  ; 060C4024
>	v_add_f32_e32 v4, s37, v33                                  ; 06084225
>	s_and_b32 s28, s28, s19                                     ; 871C131C
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	image_sample_c v32, v[4:7], s[12:19], s[28:31] dmask:0x1    ; F0A00100 00E32004
>	v_add_f32_e32 v4, v8, v8                                    ; 06081108
>	v_add_f32_e32 v6, v7, v7                                    ; 060C0F07
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v29, v4, v29, -v29                                ; D282001D 84763B04
>	v_mad_f32 v30, v4, v30, -v30                                ; D282001E 847A3D04
>	v_mad_f32 v31, v4, v31, -v31                                ; D282001F 847E3F04
>	v_mad_f32 v5, 2.0, v8, -1.0                                 ; D2820005 03CE10F4
>	v_mad_f32 v4, v6, v7, -v7                                   ; D2820004 841E0F06
>	v_mac_f32_e32 v4, v5, v5                                    ; 3E080B05
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v29, v7, v9                                   ; 3E3A1307
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v30, v7, v10                                  ; 3E3C1507
>	v_mac_f32_e32 v31, v7, v14                                  ; 3E3E1D07
>	v_mac_f32_e32 v29, v4, v24                                  ; 3E3A3104
>	v_mac_f32_e32 v30, v4, v25                                  ; 3E3C3304
>	v_mac_f32_e32 v31, v4, v26                                  ; 3E3E3504
>	v_cubema_f32 v4, v29, v30, v31                              ; D28E0004 047E3D1D
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                       ; C0CA0510
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                       ; C08E051C
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_mul_f32_e32 v14, v22, v29                                 ; 101C3B16
>	v_cubetc_f32 v6, v29, v30, v31                              ; D28C0006 047E3D1D
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v7, v29, v30, v31                              ; D28A0007 047E3D1D
>	v_mac_f32_e32 v14, v23, v30                                 ; 3E1C3D17
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v7, v4                                    ; D2820005 04120F05
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s28, s28, s27                                     ; 871C1B1C
>	v_cubeid_f32 v7, v29, v30, v31                              ; D2880007 047E3D1D
>	image_sample v[5:8], v[5:8], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E50505
>	v_mac_f32_e32 v14, v27, v31                                 ; 3E1C3F1B
>	s_buffer_load_dword s32, s[0:3], 0x4                        ; C2100104
>	s_buffer_load_dword s33, s[0:3], 0x5                        ; C2108105
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v8, v5                                    ; 100A0B08
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	v_mul_f32_e32 v8, v29, v14                                  ; 10101D1D
>	v_mul_f32_e32 v10, v30, v14                                 ; 10141D1E
>	v_mac_f32_e32 v8, v29, v14                                  ; 3E101D1D
>	s_buffer_load_dword s42, s[0:3], 0x6                        ; C2150106
>	s_buffer_load_dword s43, s[0:3], 0xc                        ; C215810C
>	s_buffer_load_dword s8, s[0:3], 0xd                         ; C204010D
>	s_buffer_load_dword s9, s[0:3], 0xe                         ; C204810E
>	v_mad_f32 v9, v16, v21, -v8                                 ; D2820009 84222B10
>	v_mac_f32_e32 v10, v30, v14                                 ; 3E141D1E
>	v_mul_f32_e32 v9, v24, v9                                   ; 10121318
>	v_mad_f32 v22, v18, v21, -v10                               ; D2820016 842A2B12
>	v_mac_f32_e32 v9, v25, v22                                  ; 3E122D19
>	v_mul_f32_e32 v22, v31, v14                                 ; 102C1D1F
>	v_mad_f32 v16, -v16, v21, v8                                ; D2820010 24222B10
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s32, v29                                  ; 10103A20
>	s_buffer_load_dword s38, s[0:3], 0x2c                       ; C213012C
>	v_mad_f32 v8, -s33, v30, -v8                                ; D2820008 A4223C21
>	v_mac_f32_e32 v22, v31, v14                                 ; 3E2C1D1F
>	v_mad_f32 v18, -v18, v21, v10                               ; D2820012 242A2B12
>	s_buffer_load_dword s39, s[0:3], 0x2d                       ; C213812D
>	v_mul_f32_e32 v10, v32, v32                                 ; 10144120
>	v_mad_f32 v23, v20, v21, -v22                               ; D2820017 845A2B14
>	v_mad_f32 v20, -v20, v21, v22                               ; D2820014 245A2B14
>	v_mul_f32_e32 v22, s8, v10                                  ; 102C1408
>	v_mul_f32_e32 v21, s43, v10                                 ; 102A142B
>	v_mul_f32_e32 v10, s9, v10                                  ; 10141409
>	v_mad_f32 v8, -s42, v31, v8                                 ; D2820008 24223E2A
>	s_buffer_load_dword s40, s[0:3], 0x2e                       ; C214012E
>	v_add_f32_e64 v8, v8, 0 clamp                               ; D2060808 00010108
>	v_mul_f32_e32 v21, v11, v21                                 ; 102A2B0B
>	v_mul_f32_e32 v22, v11, v22                                 ; 102C2D0B
>	v_mul_f32_e32 v10, v11, v10                                 ; 1014150B
>	v_mac_f32_e32 v9, v26, v23                                  ; 3E122F1A
>	v_mul_f32_e32 v21, v21, v8                                  ; 102A1115
>	v_mul_f32_e32 v22, v22, v8                                  ; 102C1116
>	v_mul_f32_e32 v23, v10, v8                                  ; 102E110A
>	v_mul_f32_e32 v8, 4.0, v11                                  ; 101016F6
>	v_mac_f32_e32 v21, v8, v5                                   ; 3E2A0B08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s38, v15                                  ; 080A1E26
>	v_mac_f32_e32 v22, v8, v6                                   ; 3E2C0D08
>	v_mac_f32_e32 v23, v8, v7                                   ; 3E2E0F08
>	v_sub_f32_e32 v6, s39, v17                                  ; 080C2227
>	v_mul_f32_e32 v7, v5, v5                                    ; 100E0B05
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_sub_f32_e32 v8, s40, v19                                  ; 08102628
>	v_mac_f32_e32 v7, v8, v8                                    ; 3E0E1108
>	v_rsq_f32_e32 v10, v7                                       ; 7E145D07
>	s_buffer_load_dword s41, s[0:3], 0x2f                       ; C214812F
>	s_buffer_load_dword s8, s[0:3], 0x30                        ; C2040130
>	s_buffer_load_dword s9, s[0:3], 0x31                        ; C2048131
>	v_mul_f32_e32 v5, v10, v5                                   ; 100A0B0A
>	v_mul_f32_e32 v6, v10, v6                                   ; 100C0D0A
>	v_mul_f32_e32 v5, v29, v5                                   ; 100A0B1D
>	v_mac_f32_e32 v5, v30, v6                                   ; 3E0A0D1E
>	v_mul_f32_e32 v6, v10, v8                                   ; 100C110A
>	v_mac_f32_e32 v5, v31, v6                                   ; 3E0A0D1F
>	v_mul_f32_e32 v6, v10, v7                                   ; 100C0F0A
>	s_buffer_load_dword s11, s[0:3], 0x32                       ; C2058132
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s41, v6                                   ; 100C0C29
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s20, s[0:3], 0x34                       ; C20A0134
>	v_mad_f32 v7, -v6, s8, s8                                   ; D2820007 20201106
>	s_buffer_load_dword s21, s[0:3], 0x35                       ; C20A8135
>	s_buffer_load_dword s8, s[0:3], 0x36                        ; C2040136
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v11, v7                                   ; 100E0F0B
>	v_mac_f32_e32 v21, v7, v5                                   ; 3E2A0B07
>	v_mad_f32 v7, -v6, s9, s9                                   ; D2820007 20241306
>	v_mad_f32 v6, -v6, s11, s11                                 ; D2820006 202C1706
>	v_mul_f32_e32 v7, v11, v7                                   ; 100E0F0B
>	v_mul_f32_e32 v6, v11, v6                                   ; 100C0D0B
>	v_mac_f32_e32 v23, v6, v5                                   ; 3E2E0B06
>	v_mac_f32_e32 v22, v7, v5                                   ; 3E2C0B07
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s20, v15                                  ; 080A1E14
>	v_sub_f32_e32 v6, s21, v17                                  ; 080C2215
>	v_mul_f32_e32 v7, v5, v5                                    ; 100E0B05
>	v_sub_f32_e32 v8, s8, v19                                   ; 08102608
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_mac_f32_e32 v7, v8, v8                                    ; 3E0E1108
>	v_rsq_f32_e32 v10, v7                                       ; 7E145D07
>	s_buffer_load_dword s9, s[0:3], 0x37                        ; C2048137
>	s_buffer_load_dword s11, s[0:3], 0x38                       ; C2058138
>	s_buffer_load_dword s20, s[0:3], 0x39                       ; C20A0139
>	v_mul_f32_e32 v5, v10, v5                                   ; 100A0B0A
>	v_mul_f32_e32 v6, v10, v6                                   ; 100C0D0A
>	v_mul_f32_e32 v5, v29, v5                                   ; 100A0B1D
>	v_mac_f32_e32 v5, v30, v6                                   ; 3E0A0D1E
>	v_mul_f32_e32 v6, v10, v8                                   ; 100C110A
>	v_mac_f32_e32 v5, v31, v6                                   ; 3E0A0D1F
>	v_mul_f32_e32 v6, v10, v7                                   ; 100C0F0A
>	s_buffer_load_dword s21, s[0:3], 0x3a                       ; C20A813A
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s9, v6                                    ; 100C0C09
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mad_f32 v7, -v6, s11, s11                                 ; D2820007 202C1706
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v11, v7                                   ; 100E0F0B
>	v_mac_f32_e32 v21, v7, v5                                   ; 3E2A0B07
>	v_mad_f32 v7, -v6, s20, s20                                 ; D2820007 20502906
>	v_mad_f32 v6, -v6, s21, s21                                 ; D2820006 20542B06
>	v_interp_p1_f32 v24, v2, 2, 1, [m0]                         ; C8600602
>	v_mul_f32_e32 v7, v11, v7                                   ; 100E0F0B
>	v_mul_f32_e32 v6, v11, v6                                   ; 100C0D0B
>	v_mac_f32_e32 v22, v7, v5                                   ; 3E2C0B07
>	v_mac_f32_e32 v23, v6, v5                                   ; 3E2E0B06
>	v_interp_p2_f32 v24, [v24], v3, 2, 1, [m0]                  ; C8610603
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                          ; C8140402
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                    ; C8150403
>	v_interp_p1_f32 v6, v2, 1, 1, [m0]                          ; C8180502
>	v_interp_p2_f32 v6, [v6], v3, 1, 1, [m0]                    ; C8190503
>	v_interp_p1_f32 v7, v2, 3, 1, [m0]                          ; C81C0702
>	s_buffer_load_dword s8, s[0:3], 0x3f                        ; C204013F
>	s_buffer_load_dword s9, s[0:3], 0x43                        ; C2048143
>	v_interp_p2_f32 v7, [v7], v3, 3, 1, [m0]                    ; C81D0703
>	v_mov_b32_e32 v8, 0x6f800000                                ; 7E1002FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v8, |v7|                              ; D002026A 00020F08
>	v_mov_b32_e32 v8, 0x2f800000                                ; 7E1002FF 2F800000
>	s_buffer_load_dword s11, s[0:3], 0x47                       ; C2058147
>	v_cndmask_b32_e32 v8, 1.0, v8, vcc                          ; 001010F2
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	s_buffer_load_dword s21, s[0:3], 0x4b                       ; C20A814B
>	v_rcp_f32_e32 v7, v7                                        ; 7E0E5507
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v15, s8, v15                                  ; 081E1E08
>	s_buffer_load_dword s20, s[0:3], 0x4a                       ; C20A014A
>	v_sub_f32_e32 v25, s9, v17                                  ; 08322209
>	v_mul_f32_e32 v26, v15, v15                                 ; 10341F0F
>	v_sub_f32_e32 v19, s11, v19                                 ; 0826260B
>	v_mac_f32_e32 v26, v25, v25                                 ; 3E343319
>	v_mac_f32_e32 v26, v19, v19                                 ; 3E342713
>	v_mul_f32_e32 v5, v7, v5                                    ; 100A0B07
>	v_mul_f32_e32 v6, v7, v6                                    ; 100C0D07
>	v_add_f32_e32 v7, 1.0, v9                                   ; 060E12F2
>	v_sqrt_f32_e32 v9, v26                                      ; 7E12671A
>	v_mov_b32_e32 v27, s21                                      ; 7E360215
>	s_load_dwordx4 s[32:35], s[4:5], 0x3c                       ; C090053C
>	s_load_dwordx8 s[24:31], s[4:5], 0x30                       ; C0CC0530
>	v_subrev_f32_e32 v7, v28, v7                                ; 0A0E0F1C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mac_f32_e32 v27, s20, v9                                  ; 3E361214
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mul_f32_e32 v5, v5, v8                                    ; 100A1105
>	v_mul_f32_e32 v6, v6, v8                                    ; 100C1106
>	v_sub_f32_e32 v8, 1.0, v7                                   ; 08100EF2
>	v_mad_f32 v8, -v7, v8, v8                                   ; D2820008 24221107
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_mad_f32 v7, -v12, v7, v7                                  ; D2820007 241E0F0C
>	v_mul_f32_e32 v28, v8, v11                                  ; 10381708
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	image_sample v5, v[5:6], s[24:31], s[32:35] dmask:0x8       ; F0800800 01060505
>	s_load_dwordx4 s[32:35], s[4:5], 0x7c                       ; C090057C
>	s_load_dwordx8 s[24:31], s[4:5], 0x70                       ; C0CC0570
>	s_buffer_load_dword s7, s[0:3], 0x68                        ; C2038168
>	s_buffer_load_dword s6, s[0:3], 0x67                        ; C2030167
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v5, v5                                    ; 100A0B05
>	s_buffer_load_dword s8, s[0:3], 0x4e                        ; C204014E
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	image_sample v[8:10], v[0:1], s[24:31], s[32:35] dmask:0x7  ; F0800700 01060800
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v6, 0x3e99999a, v8                            ; 100C10FF 3E99999A
>	v_mac_f32_e32 v6, 0x3f170a3d, v9                            ; 3E0C12FF 3F170A3D
>	v_mac_f32_e32 v6, 0x3de147ae, v10                           ; 3E0C14FF 3DE147AE
>	v_mul_f32_e32 v6, s7, v6                                    ; 100C0C07
>	v_mac_f32_e32 v6, s6, v6                                    ; 3E0C0C06
>	v_mul_f32_e32 v32, v6, v8                                   ; 10401106
>	v_mul_f32_e32 v33, v6, v9                                   ; 10421306
>	v_mul_f32_e32 v34, v6, v10                                  ; 10441506
>	v_rsq_f32_e32 v6, v26                                       ; 7E0C5D1A
>	s_buffer_load_dword s6, s[0:3], 0x4c                        ; C203014C
>	s_buffer_load_dword s7, s[0:3], 0x4d                        ; C203814D
>	s_load_dwordx4 s[32:35], s[4:5], 0x4c                       ; C090054C
>	v_mul_f32_e32 v8, v6, v15                                   ; 10101F06
>	v_mul_f32_e32 v9, v6, v25                                   ; 10123306
>	v_mul_f32_e32 v8, v29, v8                                   ; 1010111D
>	v_mac_f32_e32 v8, v30, v9                                   ; 3E10131E
>	v_mul_f32_e32 v6, v6, v19                                   ; 100C2706
>	v_mac_f32_e32 v8, v31, v6                                   ; 3E100D1F
>	v_add_f32_e32 v6, -0.5, v27                                 ; 060C36F1
>	v_mad_f32 v6, -2.0, v6, 1.0                                 ; D2820006 03CA0CF5
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	v_add_f32_e64 v6, v24, 0 clamp                              ; D2060806 00010118
>	v_mul_f32_e32 v5, v6, v5                                    ; 100A0B06
>	v_cubema_f32 v9, v16, v18, v20                              ; D28E0009 04522510
>	v_add_f32_e64 v6, v8, 0 clamp                               ; D2060806 00010108
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s6, v5                                    ; 10100A06
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_rcp_f32_e64 v9, |v9|                                      ; D3540109 00000109
>	v_mac_f32_e32 v21, v8, v6                                   ; 3E2A0D08
>	v_mul_f32_e32 v8, s7, v5                                    ; 10100A07
>	v_mul_f32_e32 v5, s8, v5                                    ; 100A0A08
>	v_mul_f32_e32 v8, v11, v8                                   ; 1010110B
>	v_mul_f32_e32 v5, v11, v5                                   ; 100A0B0B
>	v_mac_f32_e32 v22, v8, v6                                   ; 3E2C0D08
>	v_mac_f32_e32 v23, v5, v6                                   ; 3E2E0D05
>	v_cubetc_f32 v5, v16, v18, v20                              ; D28C0005 04522510
>	v_cubesc_f32 v8, v16, v18, v20                              ; D28A0008 04522510
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	v_mad_f32 v5, v9, v5, v4                                    ; D2820005 04120B09
>	v_mac_f32_e32 v4, v9, v8                                    ; 3E081109
>	v_add_f32_e64 v8, v14, 0 clamp                              ; D2060808 0001010E
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_log_f32_e32 v11, v8                                       ; 7E164F08
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s31                                     ; 87201F20
>	s_buffer_load_dword s5, s[0:3], 0x7                         ; C2028107
>	image_sample v[8:10], v[0:1], s[24:31], s[32:35] dmask:0x7  ; F0800700 01060800
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v11                    ; 0E0016FF 40A00000
>	v_cubeid_f32 v6, v16, v18, v20                              ; D2880006 04522510
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_max_f32_e32 v12, 0, v12                                   ; 20181880
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_mul_f32_e32 v0, v12, v0                                   ; 1000010C
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mov_b32_e32 v6, s4                                        ; 7E0C0204
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v6, s5, v6                                    ; 080C0C05
>	v_add_f32_e32 v6, 0x3a83126f, v6                            ; 060C0CFF 3A83126F
>	v_mul_f32_e32 v5, v28, v0                                   ; 100A011C
>	v_mul_f32_e32 v1, v28, v1                                   ; 1002031C
>	v_mul_f32_e32 v4, v28, v4                                   ; 1008091C
>	v_rcp_f32_e32 v6, v6                                        ; 7E0C5506
>	v_mac_f32_e32 v1, v8, v21                                   ; 3E022B08
>	v_mov_b32_e32 v0, 0x42000000                                ; 7E0002FF 42000000
>	v_mac_f32_e32 v4, v9, v22                                   ; 3E082D09
>	v_mac_f32_e32 v5, v10, v23                                  ; 3E0A2F0A
>	v_mac_f32_e32 v1, v0, v32                                   ; 3E024100
>	v_mac_f32_e32 v4, v0, v33                                   ; 3E084300
>	v_mac_f32_e32 v5, v0, v34                                   ; 3E0A4500
>	v_subrev_f32_e32 v0, s4, v17                                ; 0A002204
>	v_max_f32_e32 v0, 0, v0                                     ; 20000080
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s5                                      ; 7E0C4805
>	v_sub_f32_e32 v6, s5, v6                                    ; 080C0C05
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                         ; C2030108
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s7, s[0:3], 0x9                         ; C2038109
>	v_interp_p1_f32 v6, v2, 2, 2, [m0]                          ; C8180A02
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 2, [m0]                    ; C8190A03
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s6, s6                                   ; D2820000 20180D06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mad_f32 v1, -v6, s7, s7                                   ; D2820001 201C0F06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2016 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..21]
>DCL CONST[27..28]
>DCL TEMP[0..54], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[2] FLT32 {    5.0000,     0.0000,     4.0000,     0.2500}
>IMM[3] FLT32 {    0.0000,    -0.5000,    32.0000,     0.0010}
>IMM[4] INT32 {0, 3, 2, 1}
>IMM[5] FLT32 {    0.3000,     0.5900,     0.1100,     8.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[2].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[4], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[2].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[6], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[2].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[5], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[3].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[0].xyzz
> 31: MOV TEMP[6].x, TEMP[4].yyyy
> 32: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[2].xyzz
> 33: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[0].xyzz
> 34: MUL TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz
> 35: ADD TEMP[7].xyz, TEMP[2].xyzz, -TEMP[7].xyzz
> 36: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[1].xyzz
> 37: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 38: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 39: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 40: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 41: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 42: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 43: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 44: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 45: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[7].xxxx
> 46: MOV TEMP[6].y, TEMP[7].xxxx
> 47: MOV TEMP[8].w, IMM[0].wwww
> 48: MAD TEMP[8].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 49: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 50: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 51: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 52: ADD TEMP[1], TEMP[1], CONST[7]
> 53: MAD TEMP[8].x, IMM[1].yyyy, TEMP[4].zzzz, IMM[0].xxxx
> 54: EX2 TEMP[8].x, TEMP[8].xxxx
> 55: MOV TEMP[9].xyz, -CONST[1].xyzx
> 56: ADD TEMP[10].xyz, TEMP[9].xyzz, TEMP[2].xyzz
> 57: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[1].zzzz
> 58: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 59: RSQ TEMP[11].x, TEMP[11].xxxx
> 60: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 61: DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[0].xyzz
> 62: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 63: MOV TEMP[12].xy, TEMP[1].xyyy
> 64: MOV TEMP[12].w, IMM[0].wwww
> 65: MOV TEMP[12].z, TEMP[1].zzzz
> 66: TXP TEMP[1], TEMP[12], SAMP[0], SHADOW2D
> 67: MOV TEMP[12].x, TEMP[1].xxxx
> 68: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 69: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 70: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
> 71: MUL TEMP[1].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 72: MOV TEMP[12].xyz, TEMP[0].xyzz
> 73: TEX TEMP[12], TEMP[12], SAMP[1], CUBE
> 74: MOV TEMP[13], TEMP[12]
> 75: DP3 TEMP[13].x, TEMP[0].xyzz, TEMP[2].xyzz
> 76: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[0].xyzz
> 77: MAD TEMP[13].xyz, IMM[0].xxxx, TEMP[13].xyzz, -TEMP[2].xyzz
> 78: ADD TEMP[14].x, IMM[0].wwww, -TEMP[4].zzzz
> 79: MUL TEMP[14].x, TEMP[14].xxxx, IMM[1].wwww
> 80: MOV TEMP[13].w, TEMP[14].xxxx
> 81: DP3 TEMP[15].x, TEMP[2].xyzz, TEMP[0].xyzz
> 82: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 83: ADD TEMP[15].x, IMM[0].wwww, -TEMP[15].xxxx
> 84: POW TEMP[15].x, TEMP[15].xxxx, IMM[2].xxxx
> 85: MAX TEMP[16].xyz, TEMP[4].zzzz, IMM[2].yyyy
> 86: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[16].xyzz
> 87: MOV TEMP[13].xyz, TEMP[13].xyzz
> 88: MOV TEMP[13].w, TEMP[14].xxxx
> 89: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
> 90: MUL TEMP[13].xyz, TEMP[15].xyzz, TEMP[13].xyzz
> 91: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[12].wwww
> 92: MUL TEMP[4].x, IMM[2].zzzz, TEMP[4].yyyy
> 93: MAD TEMP[4].xyz, TEMP[12].xyzz, TEMP[4].xxxx, TEMP[1].xyzz
> 94: DP3 TEMP[9].x, TEMP[9].xyzz, TEMP[10].xyzz
> 95: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 96: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 97: POW TEMP[9].x, TEMP[9].xxxx, IMM[2].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 99: ADD TEMP[9].x, TEMP[8].xxxx, IMM[0].xxxx
>100: MUL TEMP[9].x, TEMP[9].xxxx, IMM[2].wwww
>101: MUL TEMP[12].x, -TEMP[8].xxxx, IMM[1].zzzz
>102: EX2 TEMP[12].x, TEMP[12].xxxx
>103: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
>104: RCP TEMP[12].x, TEMP[12].xxxx
>105: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[12].xxxx
>106: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>107: DP3 TEMP[9].x, TEMP[0].xyzz, TEMP[10].xyzz
>108: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>109: POW TEMP[9].x, TEMP[9].xxxx, TEMP[8].xxxx
>110: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>111: DP3 TEMP[9].x, TEMP[2].xyzz, TEMP[0].xyzz
>112: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>113: MAX TEMP[9].x, TEMP[11].xxxx, TEMP[9].xxxx
>114: ADD TEMP[9].x, TEMP[9].xxxx, IMM[3].xxxx
>115: RCP TEMP[9].x, TEMP[9].xxxx
>116: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[13].xyzz
>117: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>118: MOV TEMP[7].x, IMM[4].xxxx
>119: BGNLOOP :0
>120:   ISGE TEMP[9].x, TEMP[7].xxxx, IMM[4].yyyy
>121:   UIF TEMP[9].xxxx :0
>122:     BRK
>123:   ENDIF
>124:   UMUL TEMP[10].x, TEMP[7].xxxx, IMM[4].zzzz
>125:   UARL ADDR[0].x, TEMP[10].xxxx
>126:   UARL ADDR[0].x, TEMP[10].xxxx
>127:   ADD TEMP[11].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>128:   DP3 TEMP[12].x, TEMP[11].xyzz, TEMP[11].xyzz
>129:   RSQ TEMP[14].x, TEMP[12].xxxx
>130:   MUL TEMP[15].xyz, TEMP[11].xyzz, TEMP[14].xxxx
>131:   ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[2].xyzz
>132:   MUL TEMP[17].xyz, TEMP[16].xyzz, IMM[1].zzzz
>133:   DP3 TEMP[18].x, TEMP[17].xyzz, TEMP[17].xyzz
>134:   RSQ TEMP[19].x, TEMP[18].xxxx
>135:   MUL TEMP[20].xyz, TEMP[17].xyzz, TEMP[19].xxxx
>136:   DP3 TEMP[21].x, TEMP[15].xyzz, TEMP[0].xyzz
>137:   MOV_SAT TEMP[22].x, TEMP[21].xxxx
>138:   UMAD TEMP[23].x, TEMP[7].xxxx, IMM[4].zzzz, IMM[4].wwww
>139:   MUL TEMP[24].x, TEMP[12].xxxx, TEMP[14].xxxx
>140:   UMUL TEMP[25].x, TEMP[7].xxxx, IMM[4].zzzz
>141:   UARL ADDR[0].x, TEMP[25].xxxx
>142:   MUL TEMP[26].x, TEMP[24].xxxx, CONST[ADDR[0].x+11].wwww
>143:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>144:   ADD TEMP[28].x, IMM[0].wwww, -TEMP[27].xxxx
>145:   UARL ADDR[0].x, TEMP[23].xxxx
>146:   MUL TEMP[29].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[28].xxxx
>147:   MUL TEMP[30].xyz, TEMP[29].xyzz, TEMP[5].yyyy
>148:   MUL TEMP[31].xyz, TEMP[22].xxxx, TEMP[30].xyzz
>149:   ADD TEMP[4].xyz, TEMP[4].xyzz, TEMP[31].xyzz
>150:   DP3 TEMP[32].x, TEMP[15].xyzz, TEMP[20].xyzz
>151:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>152:   ADD TEMP[34].x, IMM[0].wwww, -TEMP[33].xxxx
>153:   POW TEMP[35].x, TEMP[34].xxxx, IMM[2].xxxx
>154:   MUL TEMP[36].xyz, TEMP[31].xyzz, TEMP[35].xxxx
>155:   ADD TEMP[37].x, TEMP[8].xxxx, IMM[0].xxxx
>156:   MUL TEMP[38].x, TEMP[37].xxxx, IMM[2].wwww
>157:   MUL TEMP[39].x, -TEMP[8].xxxx, IMM[1].zzzz
>158:   EX2 TEMP[40].x, TEMP[39].xxxx
>159:   ADD TEMP[41].x, IMM[0].xxxx, -TEMP[40].xxxx
>160:   RCP TEMP[42].x, TEMP[41].xxxx
>161:   MUL TEMP[43].x, TEMP[38].xxxx, TEMP[42].xxxx
>162:   MUL TEMP[44].xyz, TEMP[36].xyzz, TEMP[43].xxxx
>163:   DP3 TEMP[45].x, TEMP[0].xyzz, TEMP[20].xyzz
>164:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>165:   POW TEMP[47].x, TEMP[46].xxxx, TEMP[8].xxxx
>166:   MUL TEMP[48].xyz, TEMP[44].xyzz, TEMP[47].xxxx
>167:   DP3 TEMP[49].x, TEMP[2].xyzz, TEMP[0].xyzz
>168:   MOV_SAT TEMP[50].x, TEMP[49].xxxx
>169:   MAX TEMP[51].x, TEMP[22].xxxx, TEMP[50].xxxx
>170:   ADD TEMP[52].x, TEMP[51].xxxx, IMM[3].xxxx
>171:   RCP TEMP[53].x, TEMP[52].xxxx
>172:   MUL TEMP[54].xyz, TEMP[48].xyzz, TEMP[53].xxxx
>173:   MAD TEMP[1].xyz, TEMP[54].xyzz, TEMP[6].yyyy, TEMP[1].xyzz
>174:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[4].wwww
>175: ENDLOOP :0
>176: MOV TEMP[1].x, CONST[17].wwww
>177: MOV TEMP[1].y, CONST[18].wwww
>178: MOV TEMP[1].z, CONST[19].wwww
>179: ADD TEMP[1].xyz, TEMP[1].xyzz, -IN[0].xyzz
>180: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>181: SQRT TEMP[2].x, TEMP[2].xxxx
>182: MOV TEMP[7].yz, IMM[2].yyyy
>183: MAD TEMP[7].x, TEMP[2].xxxx, CONST[20].zzzz, CONST[20].wwww
>184: MOV TEMP[8].yz, IMM[2].yyyy
>185: MOV TEMP[8].x, IN[1].zzzz
>186: MOV TEMP[9].yz, IMM[2].yyyy
>187: MOV TEMP[10].xy, IN[1].xyyy
>188: MOV TEMP[10].w, IN[1].wwww
>189: TXP TEMP[10].w, TEMP[10], SAMP[3], 2D
>190: MUL TEMP[9].x, TEMP[10].wwww, TEMP[10].wwww
>191: RCP TEMP[2].x, TEMP[2].xxxx
>192: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
>193: DP3 TEMP[0].x, TEMP[1].xyzz, TEMP[0].xyzz
>194: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>195: ADD TEMP[1].xyz, TEMP[7].xyzz, IMM[3].yyyy
>196: MUL TEMP[1].xyz, TEMP[1].xyzz, IMM[0].xxxx
>197: ADD TEMP[1].xyz, IMM[0].wwww, -TEMP[1].xyzz
>198: MOV_SAT TEMP[1].xyz, TEMP[1].xyzz
>199: MUL TEMP[1].xyz, TEMP[9].xyzz, TEMP[1].xyzz
>200: MOV_SAT TEMP[2].xyz, TEMP[8].xyzz
>201: MUL TEMP[1].x, TEMP[1].xyzz, TEMP[2].xyzz
>202: MUL TEMP[1].xyz, CONST[21].xyzz, TEMP[1].xxxx
>203: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[5].yyyy
>204: MAD TEMP[0].xyz, TEMP[0].xxxx, TEMP[1].xyzz, TEMP[4].xyzz
>205: MUL TEMP[1].xyz, TEMP[13].xyzz, TEMP[6].yyyy
>206: MOV TEMP[2].xy, IN[2].xyyy
>207: TEX TEMP[2], TEMP[2], SAMP[7], 2D
>208: MOV TEMP[4].w, TEMP[2].wwww
>209: DP3 TEMP[5].x, TEMP[2].xyzz, IMM[5].xyzz
>210: MUL TEMP[5].x, TEMP[5].xxxx, CONST[28].xxxx
>211: ADD TEMP[6].x, CONST[27].wwww, IMM[0].wwww
>212: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[6].xxxx
>213: MUL TEMP[4].xyz, TEMP[2].xyzz, TEMP[5].xxxx
>214: MUL TEMP[2].xyz, TEMP[4], IMM[3].zzzz
>215: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xyzz, TEMP[1].xyzz
>216: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>217: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>218: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].yyyy
>219: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>220: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].wwww
>221: RCP TEMP[2].x, TEMP[2].xxxx
>222: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>223: FRC TEMP[2].x, CONST[1].wwww
>224: MUL TEMP[2].x, TEMP[2].xxxx, IMM[5].wwww
>225: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>226: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>227: MUL TEMP[1].x, IN[2].zzzz, TEMP[1].xxxx
>228: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>229: MOV TEMP[0].w, IN[0].wwww
>230: MOV OUT[0], TEMP[0]
>231: END
>radeonsi: Compiling shader 121
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 19, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 27, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 23, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fmul float %151, 2.000000e+00
>  %155 = fmul float %152, 2.000000e+00
>  %156 = fsub float %49, %153
>  %157 = fsub float %50, %154
>  %158 = fsub float %51, %155
>  %159 = fmul float %156, %59
>  %160 = fmul float %157, %60
>  %161 = fadd float %160, %159
>  %162 = fmul float %158, %61
>  %163 = fadd float %161, %162
>  %164 = fadd float %163, 1.000000e+00
>  %165 = fmul float %49, %59
>  %166 = fmul float %50, %60
>  %167 = fadd float %166, %165
>  %168 = fmul float %51, %61
>  %169 = fadd float %167, %168
>  %170 = fsub float 1.000000e+00, %169
>  %171 = call float @llvm.AMDGPU.clamp.(float %170, float 0.000000e+00, float 1.000000e+00)
>  %172 = fsub float %164, %171
>  %173 = call float @llvm.AMDGPU.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %174 = fsub float 1.000000e+00, %173
>  %175 = fmul float %174, %174
>  %176 = fmul float %97, %175
>  %177 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %178 = fmul float %59, 0x4007700140000000
>  %179 = fadd float %178, %177
>  %180 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %181 = fmul float %60, 0x4007700140000000
>  %182 = fadd float %181, %180
>  %183 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %184 = fmul float %61, 0x4007700140000000
>  %185 = fadd float %184, %183
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = call float @llvm.SI.load.const(<16 x i8> %187, i32 64)
>  %189 = fmul float %188, %179
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 68)
>  %191 = fmul float %190, %179
>  %192 = call float @llvm.SI.load.const(<16 x i8> %187, i32 72)
>  %193 = fmul float %192, %179
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = call float @llvm.SI.load.const(<16 x i8> %195, i32 80)
>  %197 = fmul float %196, %182
>  %198 = fadd float %197, %189
>  %199 = call float @llvm.SI.load.const(<16 x i8> %195, i32 84)
>  %200 = fmul float %199, %182
>  %201 = fadd float %200, %191
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = call float @llvm.SI.load.const(<16 x i8> %203, i32 88)
>  %205 = fmul float %204, %182
>  %206 = fadd float %205, %193
>  %207 = call float @llvm.SI.load.const(<16 x i8> %203, i32 96)
>  %208 = fmul float %207, %185
>  %209 = fadd float %208, %198
>  %210 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <16 x i8>, <16 x i8> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = call float @llvm.SI.load.const(<16 x i8> %211, i32 100)
>  %213 = fmul float %212, %185
>  %214 = fadd float %213, %201
>  %215 = call float @llvm.SI.load.const(<16 x i8> %211, i32 104)
>  %216 = fmul float %215, %185
>  %217 = fadd float %216, %206
>  %218 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %219 = load <16 x i8>, <16 x i8> addrspace(2)* %218, align 16, !invariant.load !0
>  %220 = call float @llvm.SI.load.const(<16 x i8> %219, i32 112)
>  %221 = fadd float %209, %220
>  %222 = call float @llvm.SI.load.const(<16 x i8> %219, i32 116)
>  %223 = fadd float %214, %222
>  %224 = call float @llvm.SI.load.const(<16 x i8> %219, i32 120)
>  %225 = fadd float %217, %224
>  %226 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %227 = load <16 x i8>, <16 x i8> addrspace(2)* %226, align 16, !invariant.load !0
>  %228 = call float @llvm.SI.load.const(<16 x i8> %227, i32 16)
>  %229 = call float @llvm.SI.load.const(<16 x i8> %227, i32 20)
>  %230 = call float @llvm.SI.load.const(<16 x i8> %227, i32 24)
>  %231 = fmul float %228, %140
>  %232 = fsub float -0.000000e+00, %231
>  %233 = fmul float %229, %142
>  %234 = fsub float %232, %233
>  %235 = fmul float %230, %144
>  %236 = fsub float %234, %235
>  %237 = call float @llvm.AMDGPU.clamp.(float %236, float 0.000000e+00, float 1.000000e+00)
>  %238 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %239 = load <8 x i32>, <8 x i32> addrspace(2)* %238, align 32, !invariant.load !0
>  %240 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %241 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %240, i64 0, i64 3, !amdgpu.uniform !0
>  %242 = load <4 x i32>, <4 x i32> addrspace(2)* %241, align 16, !invariant.load !0
>  %243 = extractelement <8 x i32> %239, i32 7
>  %244 = extractelement <4 x i32> %242, i32 0
>  %245 = and i32 %244, %243
>  %246 = insertelement <4 x i32> %242, i32 %245, i32 0
>  %247 = bitcast float %225 to i32
>  %248 = bitcast float %221 to i32
>  %249 = bitcast float %223 to i32
>  %250 = insertelement <4 x i32> undef, i32 %247, i32 0
>  %251 = insertelement <4 x i32> %250, i32 %248, i32 1
>  %252 = insertelement <4 x i32> %251, i32 %249, i32 2
>  %253 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %252, <8 x i32> %239, <4 x i32> %246, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %254 = extractelement <4 x float> %253, i32 0
>  %255 = fmul float %254, %254
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 48)
>  %259 = fmul float %258, %255
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 52)
>  %261 = fmul float %260, %255
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 56)
>  %263 = fmul float %262, %255
>  %264 = fmul float %259, %97
>  %265 = fmul float %261, %97
>  %266 = fmul float %263, %97
>  %267 = fmul float %237, %264
>  %268 = fmul float %237, %265
>  %269 = fmul float %237, %266
>  %270 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %271 = load <8 x i32>, <8 x i32> addrspace(2)* %270, align 32, !invariant.load !0
>  %272 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %273 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %272, i64 0, i64 7, !amdgpu.uniform !0
>  %274 = load <4 x i32>, <4 x i32> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = extractelement <8 x i32> %271, i32 7
>  %276 = extractelement <4 x i32> %274, i32 0
>  %277 = and i32 %276, %275
>  %278 = insertelement <4 x i32> %274, i32 %277, i32 0
>  %279 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %280 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %281 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %282 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %283 = call float @llvm.fabs.f32(float %281)
>  %284 = fdiv float 1.000000e+00, %283, !fpmath !1
>  %285 = fmul float %279, %284
>  %286 = fadd float %285, 1.500000e+00
>  %287 = fmul float %280, %284
>  %288 = fadd float %287, 1.500000e+00
>  %289 = bitcast float %288 to i32
>  %290 = bitcast float %286 to i32
>  %291 = bitcast float %282 to i32
>  %292 = insertelement <4 x i32> undef, i32 %289, i32 0
>  %293 = insertelement <4 x i32> %292, i32 %290, i32 1
>  %294 = insertelement <4 x i32> %293, i32 %291, i32 2
>  %295 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %294, <8 x i32> %271, <4 x i32> %278, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %296 = extractelement <4 x float> %295, i32 0
>  %297 = extractelement <4 x float> %295, i32 1
>  %298 = extractelement <4 x float> %295, i32 2
>  %299 = extractelement <4 x float> %295, i32 3
>  %300 = fmul float %140, %49
>  %301 = fmul float %142, %50
>  %302 = fadd float %301, %300
>  %303 = fmul float %144, %51
>  %304 = fadd float %302, %303
>  %305 = fmul float %304, %140
>  %306 = fmul float %304, %142
>  %307 = fmul float %304, %144
>  %308 = fmul float %305, 2.000000e+00
>  %309 = fsub float %308, %49
>  %310 = fmul float %306, 2.000000e+00
>  %311 = fsub float %310, %50
>  %312 = fmul float %307, 2.000000e+00
>  %313 = fsub float %312, %51
>  %314 = fsub float 1.000000e+00, %98
>  %315 = fmul float %314, 6.000000e+00
>  %316 = fmul float %49, %140
>  %317 = fmul float %50, %142
>  %318 = fadd float %317, %316
>  %319 = fmul float %51, %144
>  %320 = fadd float %318, %319
>  %321 = call float @llvm.AMDGPU.clamp.(float %320, float 0.000000e+00, float 1.000000e+00)
>  %322 = fsub float 1.000000e+00, %321
>  %323 = call float @llvm.pow.f32(float %322, float 5.000000e+00)
>  %324 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %325 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %326 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %327 = fmul float %323, %324
>  %328 = fmul float %323, %325
>  %329 = fmul float %323, %326
>  %330 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %331 = load <8 x i32>, <8 x i32> addrspace(2)* %330, align 32, !invariant.load !0
>  %332 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %333 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %332, i64 0, i64 11, !amdgpu.uniform !0
>  %334 = load <4 x i32>, <4 x i32> addrspace(2)* %333, align 16, !invariant.load !0
>  %335 = extractelement <8 x i32> %331, i32 7
>  %336 = extractelement <4 x i32> %334, i32 0
>  %337 = and i32 %336, %335
>  %338 = insertelement <4 x i32> %334, i32 %337, i32 0
>  %339 = call float @llvm.amdgcn.cubetc(float %309, float %311, float %313)
>  %340 = call float @llvm.amdgcn.cubesc(float %309, float %311, float %313)
>  %341 = call float @llvm.amdgcn.cubema(float %309, float %311, float %313)
>  %342 = call float @llvm.amdgcn.cubeid(float %309, float %311, float %313)
>  %343 = call float @llvm.fabs.f32(float %341)
>  %344 = fdiv float 1.000000e+00, %343, !fpmath !1
>  %345 = fmul float %339, %344
>  %346 = fadd float %345, 1.500000e+00
>  %347 = fmul float %340, %344
>  %348 = fadd float %347, 1.500000e+00
>  %349 = bitcast float %348 to i32
>  %350 = bitcast float %346 to i32
>  %351 = bitcast float %342 to i32
>  %352 = bitcast float %315 to i32
>  %353 = insertelement <4 x i32> undef, i32 %349, i32 0
>  %354 = insertelement <4 x i32> %353, i32 %350, i32 1
>  %355 = insertelement <4 x i32> %354, i32 %351, i32 2
>  %356 = insertelement <4 x i32> %355, i32 %352, i32 3
>  %357 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %356, <8 x i32> %331, <4 x i32> %338, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %358 = extractelement <4 x float> %357, i32 0
>  %359 = extractelement <4 x float> %357, i32 1
>  %360 = extractelement <4 x float> %357, i32 2
>  %361 = fmul float %327, %358
>  %362 = fmul float %328, %359
>  %363 = fmul float %329, %360
>  %364 = fmul float %296, %299
>  %365 = fmul float %297, %299
>  %366 = fmul float %298, %299
>  %367 = fmul float %97, 4.000000e+00
>  %368 = fmul float %364, %367
>  %369 = fadd float %368, %267
>  %370 = fmul float %365, %367
>  %371 = fadd float %370, %268
>  %372 = fmul float %366, %367
>  %373 = fadd float %372, %269
>  %374 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %375 = load <16 x i8>, <16 x i8> addrspace(2)* %374, align 16
>  br label %loop119
>
>loop119:                                          ; preds = %endif123, %main_body
>  %376 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %377 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %378 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %379 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %380 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %.011 = phi float [ %373, %main_body ], [ %442, %endif123 ]
>  %.010 = phi float [ %371, %main_body ], [ %441, %endif123 ]
>  %.09 = phi float [ %369, %main_body ], [ %440, %endif123 ]
>  %381 = icmp sgt i32 %376, 2
>  br i1 %381, label %endloop175, label %endif123
>
>endif123:                                         ; preds = %loop119
>  %382 = shl i32 %377, 5
>  %383 = shl i32 %377, 5
>  %384 = add i32 %383, 176
>  %385 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %384)
>  %386 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %387 = fsub float %385, %386
>  %388 = shl i32 %377, 5
>  %389 = add i32 %388, 180
>  %390 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %389)
>  %391 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %392 = fsub float %390, %391
>  %393 = add i32 %382, 184
>  %394 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %393)
>  %395 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %396 = fsub float %394, %395
>  %397 = fmul float %387, %387
>  %398 = fmul float %392, %392
>  %399 = fadd float %398, %397
>  %400 = fmul float %396, %396
>  %401 = fadd float %399, %400
>  %402 = call float @llvm.sqrt.f32(float %401)
>  %403 = fdiv float 1.000000e+00, %402, !fpmath !1
>  %404 = fmul float %387, %403
>  %405 = fmul float %392, %403
>  %406 = fmul float %396, %403
>  %407 = fmul float %404, %140
>  %408 = fmul float %405, %142
>  %409 = fadd float %408, %407
>  %410 = fmul float %406, %144
>  %411 = fadd float %409, %410
>  %412 = call float @llvm.AMDGPU.clamp.(float %411, float 0.000000e+00, float 1.000000e+00)
>  %413 = shl i32 %378, 1
>  %414 = or i32 %413, 1
>  %415 = fmul float %401, %403
>  %416 = shl i32 %379, 5
>  %417 = add i32 %416, 188
>  %418 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %417)
>  %419 = fmul float %415, %418
>  %420 = call float @llvm.AMDGPU.clamp.(float %419, float 0.000000e+00, float 1.000000e+00)
>  %421 = fsub float 1.000000e+00, %420
>  %422 = shl i32 %414, 4
>  %423 = add i32 %422, 176
>  %424 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %423)
>  %425 = fmul float %424, %421
>  %426 = shl i32 %414, 4
>  %427 = add i32 %426, 180
>  %428 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %427)
>  %429 = fmul float %428, %421
>  %430 = shl i32 %414, 4
>  %431 = add i32 %430, 184
>  %432 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %431)
>  %433 = fmul float %432, %421
>  %434 = fmul float %425, %97
>  %435 = fmul float %429, %97
>  %436 = fmul float %433, %97
>  %437 = fmul float %412, %434
>  %438 = fmul float %412, %435
>  %439 = fmul float %412, %436
>  %440 = fadd float %.09, %437
>  %441 = fadd float %.010, %438
>  %442 = fadd float %.011, %439
>  %443 = add i32 %380, 1
>  br label %loop119
>
>endloop175:                                       ; preds = %loop119
>  %444 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %445 = load <16 x i8>, <16 x i8> addrspace(2)* %444, align 16, !invariant.load !0
>  %446 = call float @llvm.SI.load.const(<16 x i8> %445, i32 284)
>  %447 = call float @llvm.SI.load.const(<16 x i8> %445, i32 300)
>  %448 = call float @llvm.SI.load.const(<16 x i8> %445, i32 316)
>  %449 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %450 = fsub float %446, %449
>  %451 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %452 = fsub float %447, %451
>  %453 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %454 = fsub float %448, %453
>  %455 = fmul float %450, %450
>  %456 = fmul float %452, %452
>  %457 = fadd float %456, %455
>  %458 = fmul float %454, %454
>  %459 = fadd float %457, %458
>  %460 = call float @llvm.sqrt.f32(float %459)
>  %461 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %462 = load <16 x i8>, <16 x i8> addrspace(2)* %461, align 16, !invariant.load !0
>  %463 = call float @llvm.SI.load.const(<16 x i8> %462, i32 328)
>  %464 = call float @llvm.SI.load.const(<16 x i8> %462, i32 332)
>  %465 = fmul float %460, %463
>  %466 = fadd float %465, %464
>  %467 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %468 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %469 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %470 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %471 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %472 = load <8 x i32>, <8 x i32> addrspace(2)* %471, align 32, !invariant.load !0
>  %473 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %474 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %473, i64 0, i64 15, !amdgpu.uniform !0
>  %475 = load <4 x i32>, <4 x i32> addrspace(2)* %474, align 16, !invariant.load !0
>  %476 = extractelement <8 x i32> %472, i32 7
>  %477 = extractelement <4 x i32> %475, i32 0
>  %478 = and i32 %477, %476
>  %479 = insertelement <4 x i32> %475, i32 %478, i32 0
>  %480 = fdiv float %468, %470, !fpmath !1
>  %481 = fdiv float %469, %470, !fpmath !1
>  %482 = bitcast float %480 to i32
>  %483 = bitcast float %481 to i32
>  %484 = insertelement <2 x i32> undef, i32 %482, i32 0
>  %485 = insertelement <2 x i32> %484, i32 %483, i32 1
>  %486 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %485, <8 x i32> %472, <4 x i32> %479, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %487 = extractelement <4 x float> %486, i32 3
>  %488 = fmul float %487, %487
>  %489 = fdiv float 1.000000e+00, %460, !fpmath !1
>  %490 = fmul float %450, %489
>  %491 = fmul float %452, %489
>  %492 = fmul float %454, %489
>  %493 = fmul float %490, %140
>  %494 = fmul float %491, %142
>  %495 = fadd float %494, %493
>  %496 = fmul float %492, %144
>  %497 = fadd float %495, %496
>  %498 = call float @llvm.AMDGPU.clamp.(float %497, float 0.000000e+00, float 1.000000e+00)
>  %499 = fadd float %466, -5.000000e-01
>  %500 = fmul float %499, 2.000000e+00
>  %501 = fsub float 1.000000e+00, %500
>  %502 = call float @llvm.AMDGPU.clamp.(float %501, float 0.000000e+00, float 1.000000e+00)
>  %503 = fmul float %488, %502
>  %504 = call float @llvm.AMDGPU.clamp.(float %467, float 0.000000e+00, float 1.000000e+00)
>  %505 = fmul float %503, %504
>  %506 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %507 = load <16 x i8>, <16 x i8> addrspace(2)* %506, align 16, !invariant.load !0
>  %508 = call float @llvm.SI.load.const(<16 x i8> %507, i32 336)
>  %509 = fmul float %508, %505
>  %510 = call float @llvm.SI.load.const(<16 x i8> %507, i32 340)
>  %511 = fmul float %510, %505
>  %512 = call float @llvm.SI.load.const(<16 x i8> %507, i32 344)
>  %513 = fmul float %512, %505
>  %514 = fmul float %509, %97
>  %515 = fmul float %511, %97
>  %516 = fmul float %513, %97
>  %517 = fmul float %498, %514
>  %518 = fadd float %517, %.09
>  %519 = fmul float %498, %515
>  %520 = fadd float %519, %.010
>  %521 = fmul float %498, %516
>  %522 = fadd float %521, %.011
>  %523 = fmul float %361, %176
>  %524 = fmul float %362, %176
>  %525 = fmul float %363, %176
>  %526 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %527 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %528 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %529 = load <8 x i32>, <8 x i32> addrspace(2)* %528, align 32, !invariant.load !0
>  %530 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %531 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %530, i64 0, i64 31, !amdgpu.uniform !0
>  %532 = load <4 x i32>, <4 x i32> addrspace(2)* %531, align 16, !invariant.load !0
>  %533 = extractelement <8 x i32> %529, i32 7
>  %534 = extractelement <4 x i32> %532, i32 0
>  %535 = and i32 %534, %533
>  %536 = insertelement <4 x i32> %532, i32 %535, i32 0
>  %537 = bitcast float %526 to i32
>  %538 = bitcast float %527 to i32
>  %539 = insertelement <2 x i32> undef, i32 %537, i32 0
>  %540 = insertelement <2 x i32> %539, i32 %538, i32 1
>  %541 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %540, <8 x i32> %529, <4 x i32> %536, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %542 = extractelement <4 x float> %541, i32 0
>  %543 = extractelement <4 x float> %541, i32 1
>  %544 = extractelement <4 x float> %541, i32 2
>  %545 = fmul float %542, 0x3FD3333340000000
>  %546 = fmul float %543, 0x3FE2E147A0000000
>  %547 = fadd float %546, %545
>  %548 = fmul float %544, 0x3FBC28F5C0000000
>  %549 = fadd float %547, %548
>  %550 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %551 = load <16 x i8>, <16 x i8> addrspace(2)* %550, align 16, !invariant.load !0
>  %552 = call float @llvm.SI.load.const(<16 x i8> %551, i32 448)
>  %553 = fmul float %549, %552
>  %554 = call float @llvm.SI.load.const(<16 x i8> %551, i32 444)
>  %555 = fadd float %554, 1.000000e+00
>  %556 = fmul float %553, %555
>  %557 = fmul float %542, %556
>  %558 = fmul float %543, %556
>  %559 = fmul float %544, %556
>  %560 = fmul float %557, 3.200000e+01
>  %561 = fmul float %558, 3.200000e+01
>  %562 = fmul float %559, 3.200000e+01
>  %563 = fmul float %518, %78
>  %564 = fadd float %563, %523
>  %565 = fmul float %520, %79
>  %566 = fadd float %565, %524
>  %567 = fmul float %522, %80
>  %568 = fadd float %567, %525
>  %569 = fadd float %564, %560
>  %570 = fadd float %566, %561
>  %571 = fadd float %568, %562
>  %572 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %573 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %574 = load <16 x i8>, <16 x i8> addrspace(2)* %573, align 16, !invariant.load !0
>  %575 = call float @llvm.SI.load.const(<16 x i8> %574, i32 12)
>  %576 = fsub float %572, %575
>  %577 = call float @llvm.maxnum.f32(float %576, float 0.000000e+00)
>  %578 = call float @llvm.SI.load.const(<16 x i8> %574, i32 28)
>  %579 = call float @llvm.SI.load.const(<16 x i8> %574, i32 12)
>  %580 = fsub float %578, %579
>  %581 = fadd float %580, 0x3F50624DE0000000
>  %582 = fdiv float 1.000000e+00, %581, !fpmath !1
>  %583 = fmul float %577, %582
>  %584 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %585 = load <16 x i8>, <16 x i8> addrspace(2)* %584, align 16, !invariant.load !0
>  %586 = call float @llvm.SI.load.const(<16 x i8> %585, i32 28)
>  %587 = call float @llvm.floor.f32(float %586)
>  %588 = fsub float %586, %587
>  %589 = fmul float %588, 8.000000e+00
>  %590 = call float @llvm.pow.f32(float %583, float %589)
>  %591 = call float @llvm.AMDGPU.clamp.(float %590, float 0.000000e+00, float 1.000000e+00)
>  %592 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %593 = fmul float %592, %591
>  %594 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %595 = load <16 x i8>, <16 x i8> addrspace(2)* %594, align 16, !invariant.load !0
>  %596 = call float @llvm.SI.load.const(<16 x i8> %595, i32 32)
>  %597 = fsub float 1.000000e+00, %593
>  %598 = fmul float %569, %593
>  %599 = fmul float %596, %597
>  %600 = fadd float %598, %599
>  %601 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %602 = load <16 x i8>, <16 x i8> addrspace(2)* %601, align 16, !invariant.load !0
>  %603 = call float @llvm.SI.load.const(<16 x i8> %602, i32 36)
>  %604 = fsub float 1.000000e+00, %593
>  %605 = fmul float %570, %593
>  %606 = fmul float %603, %604
>  %607 = fadd float %605, %606
>  %608 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %609 = load <16 x i8>, <16 x i8> addrspace(2)* %608, align 16, !invariant.load !0
>  %610 = call float @llvm.SI.load.const(<16 x i8> %609, i32 40)
>  %611 = fsub float 1.000000e+00, %593
>  %612 = fmul float %571, %593
>  %613 = fmul float %610, %611
>  %614 = fadd float %612, %613
>  %615 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %616 = bitcast float %5 to i32
>  %617 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %616, 10
>  %618 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %617, float %600, 11
>  %619 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %618, float %607, 12
>  %620 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %619, float %614, 13
>  %621 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %620, float %615, 14
>  %622 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %621, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %622
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[19:22], v4, s[4:7], 0 idxen   ; E00C2000 80011304
>	buffer_load_format_xyzw v[14:17], v5, s[12:15], 0 idxen ; E00C2000 80030E05
>	buffer_load_format_xyzw v[10:13], v6, s[16:19], 0 idxen ; E00C2000 80040A06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s5, s[0:3], 0x10                    ; C2028110
>	s_buffer_load_dword s6, s[0:3], 0x11                    ; C2030111
>	s_buffer_load_dword s7, s[0:3], 0x12                    ; C2038112
>	s_buffer_load_dword s8, s[0:3], 0x38c                   ; C20400FF 0000038C
>	s_buffer_load_dword s4, s[0:3], 0x39e                   ; C20200FF 0000039E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v23, s5                                   ; 7E2E0205
>	v_mov_b32_e32 v24, s6                                   ; 7E300206
>	v_mov_b32_e32 v25, s7                                   ; 7E320207
>	s_cmp_eq_u32 s8, -1                                     ; BF06C108
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s5, s[0:3], 0x2c                    ; C202812C
>	s_buffer_load_dword s6, s[0:3], 0x2d                    ; C203012D
>	s_buffer_load_dword s7, s[0:3], 0x2e                    ; C203812E
>	s_buffer_load_dword s8, s[0:3], 0x2f                    ; C204012F
>	s_buffer_load_dword s9, s[0:3], 0x30                    ; C2048130
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	s_buffer_load_dword s5, s[0:3], 0x31                    ; C2028131
>	s_buffer_load_dword s6, s[0:3], 0x32                    ; C2030132
>	v_mov_b32_e32 v0, s7                                    ; 7E000207
>	v_sub_f32_e32 v26, s8, v23                              ; 08342E08
>	v_mov_b32_e32 v6, s9                                    ; 7E0C0209
>	s_buffer_load_dword s7, s[0:3], 0x33                    ; C2038133
>	s_buffer_load_dword s8, s[0:3], 0x34                    ; C2040134
>	s_buffer_load_dword s9, s[0:3], 0x35                    ; C2048135
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s5                                    ; 7E100205
>	v_mov_b32_e32 v7, s6                                    ; 7E0E0206
>	s_buffer_load_dword s5, s[0:3], 0x36                    ; C2028136
>	s_buffer_load_dword s6, s[0:3], 0x37                    ; C2030137
>	v_sub_f32_e32 v27, s7, v24                              ; 08363007
>	v_mov_b32_e32 v9, s8                                    ; 7E120208
>	v_mov_b32_e32 v17, s9                                   ; 7E220209
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v18, s5                                   ; 7E240205
>	v_sub_f32_e32 v28, s6, v25                              ; 08383206
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[12:15], s[10:11], 0x10                 ; C0860B10
>	s_movk_i32 s16, 0xbc                                    ; B01000BC
>	s_buffer_load_dword s5, s[0:3], 0x390                   ; C20280FF 00000390
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[12:15], 0 idxen ; E00C2000 80032108
>	s_movk_i32 s15, 0xb0                                    ; B00F00B0
>	s_movk_i32 s14, 0xb8                                    ; B00E00B8
>	s_movk_i32 s13, 0xb4                                    ; B00D00B4
>	s_cmp_eq_u32 s5, -1                                     ; BF06C105
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v33                               ; 7E001121
>	v_mul_lo_i32 v18, v0, 48                                ; D2D60012 00016100
>	v_add_i32_e32 v0, vcc, s15, v18                         ; 4A00240F
>	v_add_i32_e32 v6, vcc, s14, v18                         ; 4A0C240E
>	v_add_i32_e32 v8, vcc, s16, v18                         ; 4A102410
>	v_add_i32_e32 v5, vcc, s13, v18                         ; 4A0A240D
>	buffer_load_dword v1, v0, s[0:3], 0 offen               ; E0301000 80000100
>	buffer_load_dword v0, v6, s[0:3], 0 offen               ; E0301000 80000006
>	buffer_load_dword v6, v8, s[0:3], 0 offen               ; E0301000 80000608
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v26, v23, v6                           ; 0A340D17
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v7, vcc, 0xcc, v18                        ; 4A0E24FF 000000CC
>	v_add_i32_e32 v27, vcc, 0xdc, v18                       ; 4A3624FF 000000DC
>	v_add_i32_e32 v9, vcc, 0xc8, v18                        ; 4A1224FF 000000C8
>	v_add_i32_e32 v6, vcc, 0xc0, v18                        ; 4A0C24FF 000000C0
>	v_add_i32_e32 v8, vcc, 0xc4, v18                        ; 4A1024FF 000000C4
>	v_add_i32_e32 v17, vcc, 0xd4, v18                       ; 4A2224FF 000000D4
>	buffer_load_dword v28, v7, s[0:3], 0 offen              ; E0301000 80001C07
>	buffer_load_dword v7, v9, s[0:3], 0 offen               ; E0301000 80000709
>	v_add_i32_e32 v9, vcc, 0xd0, v18                        ; 4A1224FF 000000D0
>	v_add_i32_e32 v18, vcc, 0xd8, v18                       ; 4A2424FF 000000D8
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v24, v28                          ; 0A363918
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_subrev_f32_e32 v28, v25, v29                          ; 0A383B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	v_cvt_i32_f32_e32 v6, v34                               ; 7E0C1122
>	s_movk_i32 s5, 0xdc                                     ; B00500DC
>	s_movk_i32 s12, 0xcc                                    ; B00C00CC
>	v_add_i32_e32 v17, vcc, s5, v18                         ; 4A222405
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[8:11], 0 idxen  ; E00C2000 80021D07
>	s_movk_i32 s11, 0xc0                                    ; B00B00C0
>	s_movk_i32 s9, 0xc8                                     ; B00900C8
>	v_add_i32_e32 v7, vcc, s11, v18                         ; 4A0E240B
>	v_add_i32_e32 v9, vcc, s9, v18                          ; 4A122409
>	s_movk_i32 s10, 0xc4                                    ; B00A00C4
>	v_mul_lo_i32 v33, v6, 48                                ; D2D60021 00016106
>	v_add_i32_e32 v6, vcc, s12, v18                         ; 4A0C240C
>	s_movk_i32 s7, 0xd4                                     ; B00700D4
>	s_movk_i32 s8, 0xd0                                     ; B00800D0
>	s_movk_i32 s6, 0xd8                                     ; B00600D8
>	v_add_i32_e32 v8, vcc, s10, v18                         ; 4A10240A
>	v_add_i32_e32 v28, vcc, s7, v18                         ; 4A382407
>	buffer_load_dword v27, v6, s[0:3], 0 offen              ; E0301000 80001B06
>	v_add_i32_e32 v6, vcc, s8, v18                          ; 4A0C2408
>	v_add_i32_e32 v18, vcc, s6, v18                         ; 4A242406
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v34, v6, s[0:3], 0 offen              ; E0301000 80002206
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v1, v29, v1                               ; 1002031D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v0, v29, v0                               ; 1000011D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v25, v17                          ; 0A4A2319
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v6, v29, v7                               ; 100C0F1D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	v_subrev_f32_e32 v9, v24, v27                           ; 0A123718
>	v_mul_f32_e32 v27, v29, v9                              ; 1036131D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v17, v29, v28                             ; 1022391D
>	v_mul_f32_e32 v9, v29, v34                              ; 1012451D
>	v_mul_f32_e32 v18, v29, v18                             ; 1024251D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s16, v33                        ; 4A3A4210
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v23, v29                          ; 0A3A3B17
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v24, v29                          ; 0A3A3B18
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v30, v29                              ; 3E023B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s13, s[0:3], 0x394                  ; C20680FF 00000394
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s13, 0                                     ; BF06800D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v30, v29                              ; 3E003B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v30, v29                             ; 3E223B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v30, v29                             ; 3E243B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0xb0, v29                       ; 4A3C3AFF 000000B0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v31, v30                              ; 3E023D1F
>	v_add_i32_e32 v30, vcc, 0xbc, v29                       ; 4A3C3AFF 000000BC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v23, v30                          ; 0A3C3D17
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_add_i32_e32 v30, vcc, s12, v29                        ; 4A3C3A0C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v24, v30                          ; 0A3C3D18
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0xb4, v29                       ; 4A3C3AFF 000000B4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, 0xb8, v29                       ; 4A3C3AFF 000000B8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v31, v30                              ; 3E003D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v31, v30                             ; 3E223D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	v_add_i32_e32 v29, vcc, s5, v29                         ; 4A3A3A05
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v31, v30                             ; 3E243D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s5, s[0:3], 0x398                   ; C20280FF 00000398
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s5, 0                                      ; BF068005
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0xb0, v29                       ; 4A3C3AFF 000000B0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v32, v30                              ; 3E023D20
>	v_add_i32_e32 v30, vcc, 0xbc, v29                       ; 4A3C3AFF 000000BC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v23, v30                          ; 0A3C3D17
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_add_i32_e32 v30, vcc, 0xcc, v29                       ; 4A3C3AFF 000000CC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v24, v30                          ; 0A3C3D18
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0xb4, v29                       ; 4A3C3AFF 000000B4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0xb8, v29                       ; 4A3C3AFF 000000B8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v32, v30                              ; 3E003D20
>	v_add_i32_e32 v30, vcc, 0xc0, v29                       ; 4A3C3AFF 000000C0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0xc4, v29                       ; 4A3C3AFF 000000C4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0xc8, v29                       ; 4A3C3AFF 000000C8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0xd0, v29                       ; 4A3C3AFF 000000D0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0xd4, v29                       ; 4A3C3AFF 000000D4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v32, v30                             ; 3E223D20
>	v_add_i32_e32 v30, vcc, 0xd8, v29                       ; 4A3C3AFF 000000D8
>	v_add_i32_e32 v29, vcc, 0xdc, v29                       ; 4A3A3AFF 000000DC
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v32, v30                             ; 3E243D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v20, s4, v20                              ; 10282804
>	v_mul_f32_e32 v19, s4, v19                              ; 10262604
>	v_mul_f32_e32 v29, v5, v20                              ; 103A2905
>	v_mul_f32_e32 v21, s4, v21                              ; 102A2A04
>	v_mac_f32_e32 v29, v1, v19                              ; 3E3A2701
>	v_mac_f32_e32 v29, v0, v21                              ; 3E3A2B00
>	v_mac_f32_e32 v29, v26, v22                             ; 3E3A2D1A
>	v_mul_f32_e32 v26, v8, v20                              ; 10342908
>	v_mac_f32_e32 v26, v6, v19                              ; 3E342706
>	v_mac_f32_e32 v26, v7, v21                              ; 3E342B07
>	s_buffer_load_dword s14, s[0:3], 0x1f                   ; C207011F
>	v_mac_f32_e32 v26, v27, v22                             ; 3E342D1B
>	v_mul_f32_e32 v27, v17, v20                             ; 10362911
>	v_mul_f32_e32 v20, 0, v20                               ; 10282880
>	s_buffer_load_dword s11, s[0:3], 0x1c                   ; C205811C
>	s_buffer_load_dword s12, s[0:3], 0x1d                   ; C206011D
>	s_buffer_load_dword s13, s[0:3], 0x1e                   ; C206811E
>	s_buffer_load_dword s18, s[0:3], 0x23                   ; C2090123
>	v_mac_f32_e32 v20, 0, v19                               ; 3E282680
>	s_buffer_load_dword s15, s[0:3], 0x20                   ; C2078120
>	s_buffer_load_dword s16, s[0:3], 0x21                   ; C2080121
>	s_buffer_load_dword s17, s[0:3], 0x22                   ; C2088122
>	s_buffer_load_dword s22, s[0:3], 0x27                   ; C20B0127
>	v_mac_f32_e32 v27, v9, v19                              ; 3E362709
>	v_mac_f32_e32 v20, 0, v21                               ; 3E282A80
>	s_buffer_load_dword s21, s[0:3], 0x26                   ; C20A8126
>	v_mac_f32_e32 v27, v18, v21                             ; 3E362B12
>	v_add_f32_e32 v19, v22, v20                             ; 06262916
>	v_add_f32_e32 v20, v23, v29                             ; 06283B17
>	s_buffer_load_dword s19, s[0:3], 0x24                   ; C2098124
>	s_buffer_load_dword s20, s[0:3], 0x25                   ; C20A0125
>	v_mac_f32_e32 v27, v28, v22                             ; 3E362D1C
>	v_add_f32_e32 v21, v24, v26                             ; 062A3518
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_subrev_f32_e32 v23, s14, v20                          ; 0A2E280E
>	s_buffer_load_dword s23, s[0:3], 0x28                   ; C20B8128
>	s_buffer_load_dword s24, s[0:3], 0x29                   ; C20C0129
>	s_buffer_load_dword s25, s[0:3], 0x3                    ; C20C8103
>	v_add_f32_e32 v22, v25, v27                             ; 062C3719
>	v_mul_f32_e32 v24, s11, v23                             ; 10302E0B
>	v_mul_f32_e32 v25, s12, v23                             ; 10322E0C
>	v_subrev_f32_e32 v26, s18, v21                          ; 0A342A12
>	v_mul_f32_e32 v23, s13, v23                             ; 102E2E0D
>	s_buffer_load_dword s4, s[0:3], 0x7                     ; C2020107
>	v_mac_f32_e32 v24, s15, v26                             ; 3E30340F
>	v_mac_f32_e32 v25, s16, v26                             ; 3E323410
>	v_mac_f32_e32 v23, s17, v26                             ; 3E2E3411
>	v_subrev_f32_e32 v26, s22, v22                          ; 0A342C16
>	v_mac_f32_e32 v23, s21, v26                             ; 3E2E3415
>	v_mac_f32_e32 v24, s19, v26                             ; 3E303413
>	v_mac_f32_e32 v25, s20, v26                             ; 3E323414
>	v_mul_f32_e32 v26, 0.5, v23                             ; 10342EF0
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mad_f32 v24, s23, v24, v26                            ; D2820018 046A3017
>	v_mac_f32_e32 v26, s24, v25                             ; 3E343218
>	v_mul_f32_e32 v25, s25, v20                             ; 10322819
>	v_mac_f32_e32 v25, s4, v21                              ; 3E322A04
>	s_buffer_load_dword s4, s[0:3], 0xb                     ; C202010B
>	s_buffer_load_dword s5, s[0:3], 0xf                     ; C202810F
>	s_buffer_load_dword s10, s[0:3], 0x1b                   ; C205011B
>	s_buffer_load_dword s17, s[0:3], 0x6                    ; C2088106
>	s_buffer_load_dword s6, s[0:3], 0x14                    ; C2030114
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v25, s4, v22                              ; 3E322C04
>	v_mac_f32_e32 v25, s5, v19                              ; 3E322605
>	s_buffer_load_dword s5, s[0:3], 0x2b                    ; C202812B
>	s_buffer_load_dword s4, s[0:3], 0x2a                    ; C202012A
>	v_mul_f32_e32 v27, s10, v25                             ; 1036320A
>	s_buffer_load_dword s10, s[0:3], 0x2                    ; C2050102
>	exp 15, 32, 0, 0, 0, v20, v21, v22, v27                 ; F800020F 1B161514
>	s_waitcnt expcnt(0) lgkmcnt(0)                          ; BF8C000F
>	v_mov_b32_e32 v27, s5                                   ; 7E360205
>	v_mac_f32_e32 v27, s4, v23                              ; 3E362E04
>	s_buffer_load_dword s7, s[0:3], 0x15                    ; C2038115
>	s_buffer_load_dword s8, s[0:3], 0x16                    ; C2040116
>	s_buffer_load_dword s9, s[0:3], 0x17                    ; C2048117
>	s_buffer_load_dword s26, s[0:3], 0x4                    ; C20D0104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s13, s[0:3], 0xc                    ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                    ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                    ; C207810E
>	v_add_f32_e32 v14, v14, v14                             ; 061C1D0E
>	v_add_f32_e32 v10, v10, v10                             ; 0614150A
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s16, s[0:3], 0x5                    ; C2080105
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	exp 15, 33, 0, 0, 0, v24, v26, v27, v23                 ; F800021F 171B1A18
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v23, v14, v1, -v1                             ; D2820017 8406030E
>	v_mad_f32 v15, 2.0, v15, -1.0                           ; D282000F 03CE1EF4
>	v_mad_f32 v11, 2.0, v11, -1.0                           ; D282000B 03CE16F4
>	v_mad_f32 v1, v10, v1, -v1                              ; D2820001 8406030A
>	v_mad_f32 v24, v14, v6, -v6                             ; D2820018 841A0D0E
>	v_mac_f32_e32 v23, v5, v15                              ; 3E2E1F05
>	v_mac_f32_e32 v1, v5, v11                               ; 3E021705
>	v_mad_f32 v5, v10, v6, -v6                              ; D2820005 841A0D0A
>	v_mac_f32_e32 v24, v8, v15                              ; 3E301F08
>	v_mac_f32_e32 v5, v8, v11                               ; 3E0A1708
>	v_mul_f32_e32 v8, s10, v20                              ; 1010280A
>	v_mac_f32_e32 v8, s17, v21                              ; 3E102A11
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v8, s0, v22                               ; 3E102C00
>	v_mad_f32 v6, v10, v9, -v9                              ; D2820006 8426130A
>	v_mad_f32 v14, v14, v9, -v9                             ; D282000E 8426130E
>	v_mac_f32_e32 v8, s15, v19                              ; 3E10260F
>	v_mov_b32_e32 v9, s6                                    ; 7E120206
>	v_mac_f32_e32 v9, s7, v8                                ; 3E121007
>	v_add_f32_e64 v9, v9, 0 clamp                           ; D2060809 00010109
>	v_log_f32_e32 v9, v9                                    ; 7E124F09
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v12, 2.0, v12, -1.0                           ; D282000C 03CE18F4
>	v_mac_f32_e32 v14, v17, v15                             ; 3E1C1F11
>	v_mul_legacy_f32_e32 v9, s8, v9                         ; 0E121208
>	v_mac_f32_e32 v23, v0, v16                              ; 3E2E2100
>	v_mac_f32_e32 v1, v0, v12                               ; 3E021900
>	v_mul_f32_e32 v0, s4, v20                               ; 10002804
>	v_mac_f32_e32 v6, v17, v11                              ; 3E0C1711
>	v_mac_f32_e32 v0, s26, v21                              ; 3E002A1A
>	v_mac_f32_e32 v14, v18, v16                             ; 3E1C2112
>	v_mac_f32_e32 v5, v7, v12                               ; 3E0A1907
>	v_exp_f32_e32 v9, v9                                    ; 7E124B09
>	v_sub_f32_e64 v10, 1.0, s9                              ; D208000A 000012F2
>	v_mac_f32_e32 v10, s9, v9                               ; 3E141209
>	v_mac_f32_e32 v0, s11, v22                              ; 3E002C0B
>	v_mac_f32_e32 v24, v7, v16                              ; 3E302107
>	v_mac_f32_e32 v6, v18, v12                              ; 3E0C1912
>	v_mul_f32_e32 v9, v5, v14                               ; 10121D05
>	v_mul_f32_e32 v11, v6, v23                              ; 10162F06
>	v_mul_f32_e32 v12, v1, v24                              ; 10183101
>	v_add_f32_e32 v13, v13, v13                             ; 061A1B0D
>	v_mad_f32 v9, v24, v6, -v9                              ; D2820009 84260D18
>	v_mac_f32_e32 v0, s13, v19                              ; 3E00260D
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_mul_f32_e32 v7, s5, v20                               ; 100E2805
>	v_mad_f32 v11, v14, v1, -v11                            ; D282000B 842E030E
>	v_mad_f32 v12, v23, v5, -v12                            ; D282000C 84320B17
>	v_mad_f32 v9, v13, v9, -v9                              ; D2820009 8426130D
>	exp 15, 34, 0, 0, 0, v3, v4, v10, v0                    ; F800022F 000A0403
>	v_mac_f32_e32 v7, s16, v21                              ; 3E0E2A10
>	v_mad_f32 v11, v13, v11, -v11                           ; D282000B 842E170D
>	v_mad_f32 v12, v13, v12, -v12                           ; D282000C 8432190D
>	exp 15, 35, 0, 0, 0, v1, v5, v6, v9                     ; F800023F 09060501
>	v_mac_f32_e32 v7, s12, v22                              ; 3E0E2C0C
>	exp 15, 36, 0, 0, 0, v11, v12, v23, v24                 ; F800024F 18170C0B
>	v_mac_f32_e32 v7, s14, v19                              ; 3E0E260E
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v0, v7, v8, v25                    ; F80008CF 19080700
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2352 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v20, v4, 3, 3, [m0]                             ; C8500F04
>	v_interp_p2_f32 v20, [v20], v5, 3, 3, [m0]                      ; C8510F05
>	v_interp_p1_f32 v21, v4, 0, 4, [m0]                             ; C8541004
>	v_interp_p2_f32 v21, [v21], v5, 0, 4, [m0]                      ; C8551005
>	v_interp_p1_f32 v22, v4, 1, 4, [m0]                             ; C8581104
>	v_interp_p2_f32 v22, [v22], v5, 1, 4, [m0]                      ; C8591105
>	v_interp_p1_f32 v1, v4, 2, 4, [m0]                              ; C8041204
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	v_interp_p2_f32 v1, [v1], v5, 2, 4, [m0]                        ; C8051205
>	v_interp_p1_f32 v2, v4, 3, 4, [m0]                              ; C8081304
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v2, [v2], v5, 3, 4, [m0]                        ; C8091305
>	v_interp_p1_f32 v7, v4, 0, 5, [m0]                              ; C81C1404
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v7, [v7], v5, 0, 5, [m0]                        ; C81D1405
>	v_interp_p1_f32 v12, v6, 0, 0, [m0]                             ; C8300006
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                      ; C8310003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v24, s8, v12                                      ; 08301808
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v14, v6, 2, 0, [m0]                             ; C8380206
>	v_sub_f32_e32 v25, s9, v0                                       ; 08320009
>	v_mul_f32_e32 v8, v24, v24                                      ; 10103118
>	v_interp_p2_f32 v14, [v14], v3, 2, 0, [m0]                      ; C8390203
>	v_sub_f32_e32 v26, s12, v14                                     ; 08341C0C
>	v_mac_f32_e32 v8, v25, v25                                      ; 3E103319
>	v_mac_f32_e32 v8, v26, v26                                      ; 3E10351A
>	v_rsq_f32_e32 v27, v8                                           ; 7E365D08
>	v_mul_f32_e32 v8, v1, v1                                        ; 10100301
>	v_mac_f32_e32 v8, v2, v2                                        ; 3E100502
>	v_mac_f32_e32 v8, v7, v7                                        ; 3E100F07
>	v_rsq_f32_e32 v8, v8                                            ; 7E105D08
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                           ; C092054C
>	s_load_dwordx8 s[28:35], s[4:5], 0x40                           ; C0CE0540
>	s_load_dwordx8 s[12:19], s[4:5], 0x50                           ; C0C60550
>	s_load_dwordx4 s[44:47], s[4:5], 0x5c                           ; C096055C
>	s_load_dwordx4 s[40:43], s[4:5], 0x6c                           ; C094056C
>	s_load_dwordx8 s[20:27], s[4:5], 0x60                           ; C0CA0560
>	v_mul_f32_e32 v28, v8, v1                                       ; 10380308
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v29, v8, v2                                       ; 103A0508
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_interp_p1_f32 v2, v6, 1, 2, [m0]                              ; C8080906
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s40, s40, s27                                         ; 87281B28
>	s_and_b32 s44, s44, s19                                         ; 872C132C
>	v_interp_p2_f32 v2, [v2], v3, 1, 2, [m0]                        ; C8090903
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	v_mul_f32_e32 v30, v8, v7                                       ; 103C0F08
>	image_sample v[7:9], v[1:2], s[28:35], s[36:39] dmask:0x7       ; F0800700 01270701
>	image_sample v[10:11], v[1:2], s[20:27], s[40:43] dmask:0x6     ; F0800600 01450A01
>	image_sample v[18:19], v[1:2], s[12:19], s[44:47] dmask:0xa     ; F0800A00 01631201
>	v_interp_p1_f32 v23, v4, 0, 3, [m0]                             ; C85C0C04
>	s_buffer_load_dword s8, s[0:3], 0x11                            ; C2040111
>	v_interp_p2_f32 v23, [v23], v5, 0, 3, [m0]                      ; C85D0C05
>	v_interp_p1_f32 v33, v4, 1, 3, [m0]                             ; C8840D04
>	v_interp_p2_f32 v33, [v33], v5, 1, 3, [m0]                      ; C8850D05
>	v_interp_p1_f32 v4, v4, 2, 3, [m0]                              ; C8100E04
>	v_interp_p2_f32 v4, [v4], v5, 2, 3, [m0]                        ; C8110E05
>	v_mov_b32_e32 v5, 0x403b800a                                    ; 7E0A02FF 403B800A
>	v_mad_f32 v15, v5, v28, v12                                     ; D282000F 04323905
>	s_buffer_load_dword s12, s[0:3], 0x10                           ; C2060110
>	s_buffer_load_dword s9, s[0:3], 0x12                            ; C2048112
>	s_buffer_load_dword s51, s[0:3], 0x15                           ; C2198115
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v17, s8, v15                                      ; 10221E08
>	s_buffer_load_dword s8, s[0:3], 0x19                            ; C2040119
>	v_mad_f32 v34, v5, v29, v0                                      ; D2820022 04023B05
>	s_buffer_load_dword s50, s[0:3], 0x14                           ; C2190114
>	s_buffer_load_dword s52, s[0:3], 0x16                           ; C21A0116
>	v_mul_f32_e32 v16, s12, v15                                     ; 10201E0C
>	v_mul_f32_e32 v15, s9, v15                                      ; 101E1E09
>	s_buffer_load_dword s53, s[0:3], 0x18                           ; C21A8118
>	v_mac_f32_e32 v17, s51, v34                                     ; 3E224433
>	v_mad_f32 v5, v5, v30, v14                                      ; D2820005 043A3D05
>	s_buffer_load_dword s9, s[0:3], 0x1a                            ; C204811A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v17, s8, v5                                       ; 3E220A08
>	s_buffer_load_dword s13, s[0:3], 0x1d                           ; C206811D
>	s_buffer_load_dword s12, s[0:3], 0x1c                           ; C206011C
>	s_buffer_load_dword s8, s[0:3], 0x1e                            ; C204011E
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                            ; C0CA0500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                            ; C08E050C
>	v_mac_f32_e32 v16, s50, v34                                     ; 3E204432
>	v_mac_f32_e32 v15, s52, v34                                     ; 3E1E4434
>	v_mac_f32_e32 v15, s9, v5                                       ; 3E1E0A09
>	v_mac_f32_e32 v16, s53, v5                                      ; 3E200A35
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v15, s8, v15                                      ; 061E1E08
>	v_add_f32_e32 v16, s12, v16                                     ; 0620200C
>	v_add_f32_e32 v17, s13, v17                                     ; 0622220D
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	image_sample_c v34, v[15:18], s[20:27], s[28:31] dmask:0x1      ; F0A00100 00E5220F
>	v_add_f32_e32 v16, v19, v19                                     ; 06202713
>	v_mad_f32 v17, 2.0, v19, -1.0                                   ; D2820011 03CE26F4
>	v_add_f32_e32 v19, v18, v18                                     ; 06262512
>	v_mad_f32 v18, 2.0, v18, -1.0                                   ; D2820012 03CE24F4
>	v_mad_f32 v5, v16, v33, -v33                                    ; D2820005 84864310
>	v_mad_f32 v15, v16, v23, -v23                                   ; D282000F 845E2F10
>	v_mad_f32 v4, v16, v4, -v4                                      ; D2820004 84120910
>	v_mad_f32 v16, v19, v18, -v18                                   ; D2820010 844A2513
>	v_mac_f32_e32 v16, v17, v17                                     ; 3E202311
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	v_sub_f32_e32 v16, 0x3f8020c5, v16                              ; 082020FF 3F8020C5
>	v_mac_f32_e32 v15, v18, v20                                     ; 3E1E2912
>	v_sqrt_f32_e32 v16, v16                                         ; 7E206710
>	v_mac_f32_e32 v5, v18, v21                                      ; 3E0A2B12
>	v_mac_f32_e32 v4, v18, v22                                      ; 3E082D12
>	v_mac_f32_e32 v15, v16, v28                                     ; 3E1E3910
>	v_mac_f32_e32 v5, v16, v29                                      ; 3E0A3B10
>	v_mac_f32_e32 v4, v16, v30                                      ; 3E083D10
>	v_cubema_f32 v16, v15, v5, v4                                   ; D28E0010 04120B0F
>	v_rcp_f32_e64 v17, |v16|                                        ; D3540111 00000110
>	v_mul_f32_e32 v31, v27, v24                                     ; 103E311B
>	v_cubetc_f32 v18, v15, v5, v4                                   ; D28C0012 04120B0F
>	v_mov_b32_e32 v16, 0x3fc00000                                   ; 7E2002FF 3FC00000
>	v_cubesc_f32 v19, v15, v5, v4                                   ; D28A0013 04120B0F
>	v_mul_f32_e32 v32, v27, v25                                     ; 1040331B
>	v_mad_f32 v21, v17, v18, v16                                    ; D2820015 04422511
>	v_mad_f32 v20, v17, v19, v16                                    ; D2820014 04422711
>	v_mul_f32_e32 v17, v31, v15                                     ; 10221F1F
>	v_mac_f32_e32 v17, v32, v5                                      ; 3E220B20
>	v_mul_f32_e32 v33, v27, v26                                     ; 1042351B
>	v_mac_f32_e32 v17, v33, v4                                      ; 3E220921
>	v_mul_f32_e32 v35, v15, v17                                     ; 1046230F
>	v_mul_f32_e32 v36, v5, v17                                      ; 10482305
>	v_mul_f32_e32 v37, v4, v17                                      ; 104A2304
>	v_mac_f32_e32 v35, v15, v17                                     ; 3E46230F
>	v_mac_f32_e32 v36, v5, v17                                      ; 3E482305
>	v_mac_f32_e32 v37, v4, v17                                      ; 3E4A2304
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_sub_f32_e32 v17, 1.0, v17                                     ; 082222F2
>	v_mad_f32 v19, -v24, v27, v35                                   ; D2820013 248E3718
>	v_mad_f32 v22, -v25, v27, v36                                   ; D2820016 24923719
>	v_mad_f32 v23, -v26, v27, v37                                   ; D2820017 2496371A
>	v_log_f32_e32 v17, v17                                          ; 7E224F11
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                           ; C0C60510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                           ; C090051C
>	v_cubetc_f32 v38, v19, v22, v23                                 ; D28C0026 045E2D13
>	v_cubeid_f32 v18, v19, v22, v23                                 ; D2880012 045E2D13
>	v_cubesc_f32 v39, v19, v22, v23                                 ; D28A0027 045E2D13
>	v_cubema_f32 v22, v19, v22, v23                                 ; D28E0016 045E2D13
>	v_rcp_f32_e64 v22, |v22|                                        ; D3540116 00000116
>	s_load_dwordx4 s[28:31], s[4:5], 0x2c                           ; C08E052C
>	s_load_dwordx8 s[20:27], s[4:5], 0x20                           ; C0CA0520
>	v_mov_b32_e32 v19, 0x40c00000                                   ; 7E2602FF 40C00000
>	v_mul_legacy_f32_e32 v17, 0x40a00000, v17                       ; 0E2222FF 40A00000
>	s_buffer_load_dword s48, s[0:3], 0x4                            ; C2180104
>	v_mad_f32 v19, -v11, v19, v19                                   ; D2820013 244E270B
>	v_exp_f32_e32 v23, v17                                          ; 7E2E4B11
>	v_mad_f32 v17, v22, v38, v16                                    ; D2820011 04424D16
>	v_max_f32_e32 v11, 0, v11                                       ; 20161680
>	v_mac_f32_e32 v16, v22, v39                                     ; 3E204F16
>	s_buffer_load_dword s49, s[0:3], 0x5                            ; C2188105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v22, v15, v5, v4                                   ; D2880016 04120B0F
>	v_mul_f32_e32 v38, v11, v23                                     ; 104C2F0B
>	image_sample v[20:23], v[20:23], s[12:19], s[32:35] dmask:0xf   ; F0800F00 01031414
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	s_buffer_load_dword s9, s[0:3], 0xc                             ; C204810C
>	s_buffer_load_dword s12, s[0:3], 0xd                            ; C206010D
>	s_buffer_load_dword s13, s[0:3], 0xe                            ; C206810E
>	image_sample_l v[17:19], v[16:19], s[20:27], s[28:31] dmask:0x7 ; F0900700 00E51110
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v16, v18, v38                                     ; 10204D12
>	v_mad_f32 v18, v24, v27, -v35                                   ; D2820012 848E3718
>	v_mul_f32_e32 v11, v17, v38                                     ; 10164D11
>	v_mul_f32_e32 v17, v19, v38                                     ; 10224D13
>	v_mul_f32_e32 v38, v23, v20                                     ; 104C2917
>	v_mul_f32_e32 v21, v23, v21                                     ; 102A2B17
>	v_mul_f32_e32 v22, v23, v22                                     ; 102C2D17
>	v_mul_f32_e32 v23, v28, v18                                     ; 102E251C
>	v_mul_f32_e32 v18, s48, v15                                     ; 10241E30
>	v_mad_f32 v19, v25, v27, -v36                                   ; D2820013 84923719
>	v_mad_f32 v18, -s49, v5, -v18                                   ; D2820012 A44A0A31
>	v_mac_f32_e32 v23, v29, v19                                     ; 3E2E271D
>	v_mad_f32 v20, v26, v27, -v37                                   ; D2820014 8496371A
>	v_mul_f32_e32 v19, v34, v34                                     ; 10264522
>	v_mul_f32_e32 v24, v28, v31                                     ; 10303F1C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v18, -s8, v4, v18                                     ; D2820012 244A0808
>	v_mul_f32_e32 v25, s12, v19                                     ; 1032260C
>	v_mac_f32_e32 v23, v30, v20                                     ; 3E2E291E
>	v_mul_f32_e32 v20, s9, v19                                      ; 10282609
>	v_mul_f32_e32 v19, s13, v19                                     ; 1026260D
>	v_mac_f32_e32 v24, v29, v32                                     ; 3E30411D
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v20, v10, v20                                     ; 1028290A
>	v_mul_f32_e32 v25, v10, v25                                     ; 1032330A
>	v_mul_f32_e32 v26, v10, v19                                     ; 1034270A
>	v_mul_f32_e32 v19, v25, v18                                     ; 10262519
>	v_mul_f32_e32 v20, v20, v18                                     ; 10282514
>	v_mul_f32_e32 v25, 4.0, v10                                     ; 103214F6
>	v_mul_f32_e32 v18, v26, v18                                     ; 1024251A
>	v_mac_f32_e32 v24, v30, v33                                     ; 3E30431E
>	v_mac_f32_e32 v18, v25, v22                                     ; 3E242D19
>	v_sub_f32_e32 v22, 1.0, v24                                     ; 082C30F2
>	v_mac_f32_e32 v19, v25, v21                                     ; 3E262B19
>	v_add_f32_e32 v21, 1.0, v23                                     ; 062A2EF2
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_subrev_f32_e32 v21, v22, v21                                  ; 0A2A2B16
>	v_add_f32_e64 v21, v21, 0 clamp                                 ; D2060815 00010115
>	v_sub_f32_e32 v22, 1.0, v21                                     ; 082C2AF2
>	v_mad_f32 v21, -v21, v22, v22                                   ; D2820015 245A2D15
>	v_mac_f32_e32 v20, v25, v38                                     ; 3E284D19
>	v_mul_f32_e32 v21, v21, v10                                     ; 102A1515
>	v_mov_b32_e32 v22, 0xc8                                         ; 7E2C02FF 000000C8
>	v_mov_b32_e32 v23, 0                                            ; 7E2E0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v24, vcc, 0xffffffe8, v22                         ; 4A302CFF FFFFFFE8
>	buffer_load_dword v24, v24, s[0:3], 0 offen                     ; E0301000 80001818
>	v_add_i32_e32 v25, vcc, 0xffffffec, v22                         ; 4A322CFF FFFFFFEC
>	buffer_load_dword v25, v25, s[0:3], 0 offen                     ; E0301000 80001919
>	v_add_i32_e32 v26, vcc, -16, v22                                ; 4A342CD0
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_add_i32_e32 v29, vcc, -12, v22                                ; 4A3A2CCC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -8, v22                                 ; 4A3C2CC8
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v23, vcc, 1, v23                                  ; 4A2E2E81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v24, v12, v24                                  ; 0A30310C
>	v_mul_f32_e32 v27, v24, v24                                     ; 10363118
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v25, v0, v25                                   ; 0A323300
>	v_mac_f32_e32 v27, v25, v25                                     ; 3E363319
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v26, v14, v26                                  ; 0A34350E
>	v_mac_f32_e32 v27, v26, v26                                     ; 3E36351A
>	v_rsq_f32_e32 v28, v27                                          ; 7E385D1B
>	v_mul_f32_e32 v24, v28, v24                                     ; 1030311C
>	v_mul_f32_e32 v27, v28, v27                                     ; 1036371C
>	v_mul_f32_e32 v25, v28, v25                                     ; 1032331C
>	v_mul_f32_e32 v26, v28, v26                                     ; 1034351C
>	v_add_i32_e32 v28, vcc, -4, v22                                 ; 4A382CC4
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v27, v29, v27                                     ; 1036371D
>	buffer_load_dword v29, v22, s[0:3], 0 offen                     ; E0301000 80001D16
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_mul_f32_e32 v24, v15, v24                                     ; 1030310F
>	v_mac_f32_e32 v24, v5, v25                                      ; 3E303305
>	v_add_f32_e64 v25, v27, 0 clamp                                 ; D2060819 0001011B
>	v_mac_f32_e32 v24, v4, v26                                      ; 3E303504
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v26, -v25, v30, v30                                   ; D282001A 247A3D19
>	v_add_f32_e64 v24, v24, 0 clamp                                 ; D2060818 00010118
>	v_mul_f32_e32 v26, v10, v26                                     ; 1034350A
>	v_mac_f32_e32 v20, v26, v24                                     ; 3E28311A
>	v_add_i32_e32 v22, vcc, 32, v22                                 ; 4A2C2CA0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v27, -v25, v28, v28                                   ; D282001B 24723919
>	v_mad_f32 v25, -v25, v29, v29                                   ; D2820019 24763B19
>	v_mul_f32_e32 v27, v10, v27                                     ; 1036370A
>	v_mul_f32_e32 v25, v10, v25                                     ; 1032330A
>	v_mac_f32_e32 v19, v27, v24                                     ; 3E26311B
>	v_mac_f32_e32 v18, v25, v24                                     ; 3E243119
>	v_cmp_lt_i32_e32 vcc, 2, v23                                    ; 7D022E82
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s8, s[0:3], 0x47                            ; C2040147
>	s_buffer_load_dword s9, s[0:3], 0x4b                            ; C204814B
>	s_buffer_load_dword s12, s[0:3], 0x4f                           ; C206014F
>	s_buffer_load_dword s14, s[0:3], 0x53                           ; C2070153
>	s_buffer_load_dword s13, s[0:3], 0x52                           ; C2068152
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v12, s8, v12                                      ; 08181808
>	v_sub_f32_e32 v24, s9, v0                                       ; 08300009
>	v_mul_f32_e32 v25, v12, v12                                     ; 1032190C
>	v_sub_f32_e32 v14, s12, v14                                     ; 081C1C0C
>	v_mac_f32_e32 v25, v24, v24                                     ; 3E323118
>	v_mac_f32_e32 v25, v14, v14                                     ; 3E321D0E
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v27, v6, 2, 1, [m0]                             ; C86C0606
>	v_sqrt_f32_e32 v22, v25                                         ; 7E2C6719
>	v_mov_b32_e32 v26, s14                                          ; 7E34020E
>	v_mac_f32_e32 v26, s13, v22                                     ; 3E342C0D
>	v_interp_p2_f32 v27, [v27], v3, 2, 1, [m0]                      ; C86D0603
>	v_interp_p1_f32 v22, v6, 0, 1, [m0]                             ; C8580406
>	v_interp_p2_f32 v22, [v22], v3, 0, 1, [m0]                      ; C8590403
>	v_interp_p1_f32 v23, v6, 1, 1, [m0]                             ; C85C0506
>	v_interp_p2_f32 v23, [v23], v3, 1, 1, [m0]                      ; C85D0503
>	v_interp_p1_f32 v28, v6, 3, 1, [m0]                             ; C8700706
>	v_interp_p2_f32 v28, [v28], v3, 3, 1, [m0]                      ; C8710703
>	v_mov_b32_e32 v29, 0x6f800000                                   ; 7E3A02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v29, |v28|                                ; D002026A 0002391D
>	v_mov_b32_e32 v29, 0x2f800000                                   ; 7E3A02FF 2F800000
>	v_cndmask_b32_e32 v29, 1.0, v29, vcc                            ; 003A3AF2
>	v_mul_f32_e32 v28, v29, v28                                     ; 1038391D
>	v_rcp_f32_e32 v28, v28                                          ; 7E38551C
>	s_load_dwordx8 s[12:19], s[4:5], 0x30                           ; C0C60530
>	s_load_dwordx4 s[20:23], s[4:5], 0x3c                           ; C08A053C
>	v_mul_f32_e32 v22, v28, v22                                     ; 102C2D1C
>	v_mul_f32_e32 v23, v28, v23                                     ; 102E2F1C
>	v_mul_f32_e32 v22, v22, v29                                     ; 102C3B16
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_mul_f32_e32 v23, v23, v29                                     ; 102E3B17
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	image_sample v22, v[22:23], s[12:19], s[20:23] dmask:0x8        ; F0800800 00A31616
>	v_rsq_f32_e32 v23, v25                                          ; 7E2E5D19
>	s_load_dwordx8 s[12:19], s[4:5], 0x70                           ; C0C60570
>	s_load_dwordx4 s[4:7], s[4:5], 0x7c                             ; C082057C
>	v_add_f32_e32 v25, -0.5, v26                                    ; 063234F1
>	v_mad_f32 v25, v25, -2.0, 1.0                                   ; D2820019 03C9EB19
>	v_mul_f32_e32 v12, v23, v12                                     ; 10181917
>	v_mul_f32_e32 v12, v15, v12                                     ; 1018190F
>	v_mul_f32_e32 v15, v23, v24                                     ; 101E3117
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v22, v22, v22                                     ; 102C2D16
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	v_mac_f32_e32 v12, v5, v15                                      ; 3E181F05
>	v_mul_f32_e32 v5, v23, v14                                      ; 100A1D17
>	v_mul_f32_e32 v25, v25, v22                                     ; 10322D19
>	image_sample v[22:24], v[1:2], s[12:19], s[4:7] dmask:0x7       ; F0800700 00231601
>	s_buffer_load_dword s5, s[0:3], 0x70                            ; C2028170
>	s_buffer_load_dword s4, s[0:3], 0x6f                            ; C202016F
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v22                               ; 10022CFF 3E99999A
>	v_mac_f32_e32 v1, 0x3f170a3d, v23                               ; 3E022EFF 3F170A3D
>	v_mac_f32_e32 v1, 0x3de147ae, v24                               ; 3E0230FF 3DE147AE
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v1, s5, v1                                        ; 10020205
>	v_mac_f32_e32 v1, s4, v1                                        ; 3E020204
>	s_buffer_load_dword s4, s[0:3], 0x54                            ; C2020154
>	s_buffer_load_dword s5, s[0:3], 0x55                            ; C2028155
>	s_buffer_load_dword s6, s[0:3], 0x56                            ; C2030156
>	v_mac_f32_e32 v12, v4, v5                                       ; 3E180B04
>	v_add_f32_e64 v4, v27, 0 clamp                                  ; D2060804 0001011B
>	v_mul_f32_e32 v4, v4, v25                                       ; 10083304
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s4, v4                                       ; 101C0804
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mul_f32_e32 v15, s5, v4                                       ; 101E0805
>	v_mul_f32_e32 v4, s6, v4                                        ; 10080806
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v14, v10, v14                                     ; 101C1D0A
>	v_mul_f32_e32 v15, v10, v15                                     ; 101E1F0A
>	v_mul_f32_e32 v4, v10, v4                                       ; 1008090A
>	v_add_f32_e64 v10, v12, 0 clamp                                 ; D206080A 0001010C
>	v_mac_f32_e32 v18, v4, v10                                      ; 3E241504
>	v_mul_f32_e32 v4, v21, v11                                      ; 10081715
>	v_mac_f32_e32 v20, v14, v10                                     ; 3E28150E
>	v_mac_f32_e32 v4, v7, v20                                       ; 3E082907
>	v_mul_f32_e32 v2, v1, v22                                       ; 10042D01
>	v_mov_b32_e32 v7, 0x42000000                                    ; 7E0E02FF 42000000
>	v_mac_f32_e32 v4, v7, v2                                        ; 3E080507
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v11, v21, v17                                     ; 10162315
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v5, v1, v23                                       ; 100A2F01
>	v_mul_f32_e32 v1, v1, v24                                       ; 10023101
>	v_mac_f32_e32 v11, v9, v18                                      ; 3E162509
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v11, v7, v1                                       ; 3E160307
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	v_interp_p1_f32 v1, v6, 2, 2, [m0]                              ; C8040A06
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v19, v15, v10                                     ; 3E26150F
>	v_mul_f32_e32 v10, v21, v16                                     ; 10142115
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mac_f32_e32 v10, v8, v19                                      ; 3E142708
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 2, 2, [m0]                        ; C8050A03
>	v_mac_f32_e32 v10, v7, v5                                       ; 3E140B07
>	v_mul_f32_e32 v5, v0, v1                                        ; 100A0300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v5, s6, s6                                       ; D2820000 20180D05
>	v_mac_f32_e32 v0, v5, v4                                        ; 3E000905
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_mad_f32 v1, -v5, s7, s7                                       ; D2820001 201C0F05
>	v_mad_f32 v2, -v5, s0, s0                                       ; D2820002 20000105
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mac_f32_e32 v1, v5, v10                                       ; 3E021505
>	v_mac_f32_e32 v2, v5, v11                                       ; 3E041705
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1968 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4].x, GENERIC[4], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..16]
>DCL CONST[21..22]
>DCL TEMP[0..54], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[2] FLT32 {    5.0000,     0.0000,     4.0000,     0.2500}
>IMM[3] FLT32 {    0.0000,     0.3000,     0.5900,     0.1100}
>IMM[4] INT32 {0, 3, 2, 1}
>IMM[5] FLT32 {   32.0000,     0.0010,     8.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwzz
>  3: MOV TEMP[1].z, IN[4].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 13: MOV TEMP[3], TEMP[3]
> 14: MOV TEMP[4].xy, IN[1].xyyy
> 15: TEX TEMP[4], TEMP[4], SAMP[5], 2D
> 16: MOV TEMP[5], TEMP[4]
> 17: MOV TEMP[6].xy, IN[1].xyyy
> 18: TEX TEMP[6], TEMP[6], SAMP[4], 2D
> 19: MOV TEMP[7], TEMP[6]
> 20: MAD TEMP[7].xy, TEMP[6].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 21: MOV TEMP[7].z, TEMP[6].xxxx
> 22: MOV TEMP[6].xy, TEMP[7].xyxx
> 23: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 24: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 25: ADD TEMP[8].x, IMM[0].zzzz, -TEMP[8].xxxx
> 26: SQRT TEMP[8].x, TEMP[8].xxxx
> 27: MOV TEMP[6].z, TEMP[8].xxxx
> 28: MUL TEMP[6].xyz, IN[2].xyzz, TEMP[7].xxxx
> 29: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[6].xyzz
> 30: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xxxx, TEMP[0].xyzz
> 31: MOV TEMP[6].x, TEMP[4].yyyy
> 32: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[2].xyzz
> 33: MUL TEMP[7].xyz, TEMP[7].xxxx, TEMP[0].xyzz
> 34: MUL TEMP[7].xyz, IMM[0].xxxx, TEMP[7].xyzz
> 35: ADD TEMP[7].xyz, TEMP[2].xyzz, -TEMP[7].xyzz
> 36: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[1].xyzz
> 37: ADD TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 38: DP3 TEMP[8].x, TEMP[2].xyzz, TEMP[1].xyzz
> 39: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 40: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 41: ADD TEMP[7].x, TEMP[7].xxxx, -TEMP[8].xxxx
> 42: MOV_SAT TEMP[7].x, TEMP[7].xxxx
> 43: ADD TEMP[7].x, IMM[0].wwww, -TEMP[7].xxxx
> 44: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
> 45: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[7].xxxx
> 46: MOV TEMP[6].y, TEMP[7].xxxx
> 47: MOV TEMP[8].w, IMM[0].wwww
> 48: MAD TEMP[8].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 49: MUL TEMP[1], CONST[4], TEMP[8].xxxx
> 50: MAD TEMP[1], CONST[5], TEMP[8].yyyy, TEMP[1]
> 51: MAD TEMP[1], CONST[6], TEMP[8].zzzz, TEMP[1]
> 52: ADD TEMP[1], TEMP[1], CONST[7]
> 53: MAD TEMP[8].x, IMM[1].yyyy, TEMP[4].zzzz, IMM[0].xxxx
> 54: EX2 TEMP[8].x, TEMP[8].xxxx
> 55: MOV TEMP[9].xyz, -CONST[1].xyzx
> 56: ADD TEMP[10].xyz, TEMP[9].xyzz, TEMP[2].xyzz
> 57: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[1].zzzz
> 58: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 59: RSQ TEMP[11].x, TEMP[11].xxxx
> 60: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 61: DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[0].xyzz
> 62: MOV_SAT TEMP[11].x, TEMP[11].xxxx
> 63: MOV TEMP[12].xy, TEMP[1].xyyy
> 64: MOV TEMP[12].w, IMM[0].wwww
> 65: MOV TEMP[12].z, TEMP[1].zzzz
> 66: TXP TEMP[1], TEMP[12], SAMP[0], SHADOW2D
> 67: MOV TEMP[12].x, TEMP[1].xxxx
> 68: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 69: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 70: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[4].yyyy
> 71: MUL TEMP[1].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 72: MOV TEMP[12].xyz, TEMP[0].xyzz
> 73: TEX TEMP[12], TEMP[12], SAMP[1], CUBE
> 74: MOV TEMP[13], TEMP[12]
> 75: DP3 TEMP[13].x, TEMP[0].xyzz, TEMP[2].xyzz
> 76: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[0].xyzz
> 77: MAD TEMP[13].xyz, IMM[0].xxxx, TEMP[13].xyzz, -TEMP[2].xyzz
> 78: ADD TEMP[14].x, IMM[0].wwww, -TEMP[4].zzzz
> 79: MUL TEMP[14].x, TEMP[14].xxxx, IMM[1].wwww
> 80: MOV TEMP[13].w, TEMP[14].xxxx
> 81: DP3 TEMP[15].x, TEMP[2].xyzz, TEMP[0].xyzz
> 82: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 83: ADD TEMP[15].x, IMM[0].wwww, -TEMP[15].xxxx
> 84: POW TEMP[15].x, TEMP[15].xxxx, IMM[2].xxxx
> 85: MAX TEMP[16].xyz, TEMP[4].zzzz, IMM[2].yyyy
> 86: MUL TEMP[15].xyz, TEMP[15].xxxx, TEMP[16].xyzz
> 87: MOV TEMP[13].xyz, TEMP[13].xyzz
> 88: MOV TEMP[13].w, TEMP[14].xxxx
> 89: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
> 90: MUL TEMP[13].xyz, TEMP[15].xyzz, TEMP[13].xyzz
> 91: MUL TEMP[12].xyz, TEMP[12].xyzz, TEMP[12].wwww
> 92: MUL TEMP[4].x, IMM[2].zzzz, TEMP[4].yyyy
> 93: MAD TEMP[4].xyz, TEMP[12].xyzz, TEMP[4].xxxx, TEMP[1].xyzz
> 94: DP3 TEMP[9].x, TEMP[9].xyzz, TEMP[10].xyzz
> 95: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 96: ADD TEMP[9].x, IMM[0].wwww, -TEMP[9].xxxx
> 97: POW TEMP[9].x, TEMP[9].xxxx, IMM[2].xxxx
> 98: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
> 99: ADD TEMP[9].x, TEMP[8].xxxx, IMM[0].xxxx
>100: MUL TEMP[9].x, TEMP[9].xxxx, IMM[2].wwww
>101: MUL TEMP[12].x, -TEMP[8].xxxx, IMM[1].zzzz
>102: EX2 TEMP[12].x, TEMP[12].xxxx
>103: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
>104: RCP TEMP[12].x, TEMP[12].xxxx
>105: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[12].xxxx
>106: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>107: DP3 TEMP[9].x, TEMP[0].xyzz, TEMP[10].xyzz
>108: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>109: POW TEMP[9].x, TEMP[9].xxxx, TEMP[8].xxxx
>110: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx
>111: DP3 TEMP[9].x, TEMP[2].xyzz, TEMP[0].xyzz
>112: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>113: MAX TEMP[9].x, TEMP[11].xxxx, TEMP[9].xxxx
>114: ADD TEMP[9].x, TEMP[9].xxxx, IMM[3].xxxx
>115: RCP TEMP[9].x, TEMP[9].xxxx
>116: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[13].xyzz
>117: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[7].xxxx
>118: MOV TEMP[7].x, IMM[4].xxxx
>119: BGNLOOP :0
>120:   ISGE TEMP[9].x, TEMP[7].xxxx, IMM[4].yyyy
>121:   UIF TEMP[9].xxxx :0
>122:     BRK
>123:   ENDIF
>124:   UMUL TEMP[10].x, TEMP[7].xxxx, IMM[4].zzzz
>125:   UARL ADDR[0].x, TEMP[10].xxxx
>126:   UARL ADDR[0].x, TEMP[10].xxxx
>127:   ADD TEMP[11].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>128:   DP3 TEMP[12].x, TEMP[11].xyzz, TEMP[11].xyzz
>129:   RSQ TEMP[14].x, TEMP[12].xxxx
>130:   MUL TEMP[15].xyz, TEMP[11].xyzz, TEMP[14].xxxx
>131:   ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[2].xyzz
>132:   MUL TEMP[17].xyz, TEMP[16].xyzz, IMM[1].zzzz
>133:   DP3 TEMP[18].x, TEMP[17].xyzz, TEMP[17].xyzz
>134:   RSQ TEMP[19].x, TEMP[18].xxxx
>135:   MUL TEMP[20].xyz, TEMP[17].xyzz, TEMP[19].xxxx
>136:   DP3 TEMP[21].x, TEMP[15].xyzz, TEMP[0].xyzz
>137:   MOV_SAT TEMP[22].x, TEMP[21].xxxx
>138:   UMAD TEMP[23].x, TEMP[7].xxxx, IMM[4].zzzz, IMM[4].wwww
>139:   MUL TEMP[24].x, TEMP[12].xxxx, TEMP[14].xxxx
>140:   UMUL TEMP[25].x, TEMP[7].xxxx, IMM[4].zzzz
>141:   UARL ADDR[0].x, TEMP[25].xxxx
>142:   MUL TEMP[26].x, TEMP[24].xxxx, CONST[ADDR[0].x+11].wwww
>143:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>144:   ADD TEMP[28].x, IMM[0].wwww, -TEMP[27].xxxx
>145:   UARL ADDR[0].x, TEMP[23].xxxx
>146:   MUL TEMP[29].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[28].xxxx
>147:   MUL TEMP[30].xyz, TEMP[29].xyzz, TEMP[5].yyyy
>148:   MUL TEMP[31].xyz, TEMP[22].xxxx, TEMP[30].xyzz
>149:   ADD TEMP[4].xyz, TEMP[4].xyzz, TEMP[31].xyzz
>150:   DP3 TEMP[32].x, TEMP[15].xyzz, TEMP[20].xyzz
>151:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>152:   ADD TEMP[34].x, IMM[0].wwww, -TEMP[33].xxxx
>153:   POW TEMP[35].x, TEMP[34].xxxx, IMM[2].xxxx
>154:   MUL TEMP[36].xyz, TEMP[31].xyzz, TEMP[35].xxxx
>155:   ADD TEMP[37].x, TEMP[8].xxxx, IMM[0].xxxx
>156:   MUL TEMP[38].x, TEMP[37].xxxx, IMM[2].wwww
>157:   MUL TEMP[39].x, -TEMP[8].xxxx, IMM[1].zzzz
>158:   EX2 TEMP[40].x, TEMP[39].xxxx
>159:   ADD TEMP[41].x, IMM[0].xxxx, -TEMP[40].xxxx
>160:   RCP TEMP[42].x, TEMP[41].xxxx
>161:   MUL TEMP[43].x, TEMP[38].xxxx, TEMP[42].xxxx
>162:   MUL TEMP[44].xyz, TEMP[36].xyzz, TEMP[43].xxxx
>163:   DP3 TEMP[45].x, TEMP[0].xyzz, TEMP[20].xyzz
>164:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>165:   POW TEMP[47].x, TEMP[46].xxxx, TEMP[8].xxxx
>166:   MUL TEMP[48].xyz, TEMP[44].xyzz, TEMP[47].xxxx
>167:   DP3 TEMP[49].x, TEMP[2].xyzz, TEMP[0].xyzz
>168:   MOV_SAT TEMP[50].x, TEMP[49].xxxx
>169:   MAX TEMP[51].x, TEMP[22].xxxx, TEMP[50].xxxx
>170:   ADD TEMP[52].x, TEMP[51].xxxx, IMM[3].xxxx
>171:   RCP TEMP[53].x, TEMP[52].xxxx
>172:   MUL TEMP[54].xyz, TEMP[48].xyzz, TEMP[53].xxxx
>173:   MAD TEMP[1].xyz, TEMP[54].xyzz, TEMP[6].yyyy, TEMP[1].xyzz
>174:   UADD TEMP[7].x, TEMP[7].xxxx, IMM[4].wwww
>175: ENDLOOP :0
>176: MUL TEMP[0].xyz, TEMP[13].xyzz, TEMP[6].yyyy
>177: MOV TEMP[1].xy, IN[1].xyyy
>178: TEX TEMP[1], TEMP[1], SAMP[6], 2D
>179: MOV TEMP[2].w, TEMP[1].wwww
>180: DP3 TEMP[5].x, TEMP[1].xyzz, IMM[3].yzww
>181: MUL TEMP[5].x, TEMP[5].xxxx, CONST[22].xxxx
>182: ADD TEMP[6].x, CONST[21].wwww, IMM[0].wwww
>183: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[6].xxxx
>184: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[5].xxxx
>185: MUL TEMP[1].xyz, TEMP[2], IMM[5].xxxx
>186: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[3].xyzz, TEMP[0].xyzz
>187: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>188: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>189: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].yyyy
>190: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>191: ADD TEMP[2].x, TEMP[2].xxxx, IMM[5].yyyy
>192: RCP TEMP[2].x, TEMP[2].xxxx
>193: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>194: FRC TEMP[2].x, CONST[1].wwww
>195: MUL TEMP[2].x, TEMP[2].xxxx, IMM[5].zzzz
>196: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>197: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>198: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
>199: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>200: MOV TEMP[0].w, IN[0].wwww
>201: MOV OUT[0], TEMP[0]
>202: END
>radeonsi: Compiling shader 122
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 15, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %82 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %83 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %84 = load <8 x i32>, <8 x i32> addrspace(2)* %83, align 32, !invariant.load !0
>  %85 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %86 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %85, i64 0, i64 23, !amdgpu.uniform !0
>  %87 = load <4 x i32>, <4 x i32> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = extractelement <8 x i32> %84, i32 7
>  %89 = extractelement <4 x i32> %87, i32 0
>  %90 = and i32 %89, %88
>  %91 = insertelement <4 x i32> %87, i32 %90, i32 0
>  %92 = bitcast float %81 to i32
>  %93 = bitcast float %82 to i32
>  %94 = insertelement <2 x i32> undef, i32 %92, i32 0
>  %95 = insertelement <2 x i32> %94, i32 %93, i32 1
>  %96 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %95, <8 x i32> %84, <4 x i32> %91, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %97 = extractelement <4 x float> %96, i32 1
>  %98 = extractelement <4 x float> %96, i32 2
>  %99 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %100 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %101 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %102 = load <8 x i32>, <8 x i32> addrspace(2)* %101, align 32, !invariant.load !0
>  %103 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %104 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %103, i64 0, i64 19, !amdgpu.uniform !0
>  %105 = load <4 x i32>, <4 x i32> addrspace(2)* %104, align 16, !invariant.load !0
>  %106 = extractelement <8 x i32> %102, i32 7
>  %107 = extractelement <4 x i32> %105, i32 0
>  %108 = and i32 %107, %106
>  %109 = insertelement <4 x i32> %105, i32 %108, i32 0
>  %110 = bitcast float %99 to i32
>  %111 = bitcast float %100 to i32
>  %112 = insertelement <2 x i32> undef, i32 %110, i32 0
>  %113 = insertelement <2 x i32> %112, i32 %111, i32 1
>  %114 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %113, <8 x i32> %102, <4 x i32> %109, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %115 = extractelement <4 x float> %114, i32 1
>  %116 = extractelement <4 x float> %114, i32 3
>  %117 = fmul float %116, 2.000000e+00
>  %118 = fadd float %117, -1.000000e+00
>  %119 = fmul float %115, 2.000000e+00
>  %120 = fadd float %119, -1.000000e+00
>  %121 = fmul float %118, %118
>  %122 = fmul float %120, %120
>  %123 = fadd float %121, %122
>  %124 = call float @llvm.AMDGPU.clamp.(float %123, float 0.000000e+00, float 1.000000e+00)
>  %125 = fsub float 0x3FF00418A0000000, %124
>  %126 = call float @llvm.sqrt.f32(float %125)
>  %127 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %128 = fmul float %127, %118
>  %129 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %130 = fmul float %129, %118
>  %131 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %132 = fmul float %131, %118
>  %133 = fmul float %23, %120
>  %134 = fadd float %133, %128
>  %135 = fmul float %24, %120
>  %136 = fadd float %135, %130
>  %137 = fmul float %25, %120
>  %138 = fadd float %137, %132
>  %139 = fmul float %59, %126
>  %140 = fadd float %139, %134
>  %141 = fmul float %60, %126
>  %142 = fadd float %141, %136
>  %143 = fmul float %61, %126
>  %144 = fadd float %143, %138
>  %145 = fmul float %140, %49
>  %146 = fmul float %142, %50
>  %147 = fadd float %146, %145
>  %148 = fmul float %144, %51
>  %149 = fadd float %147, %148
>  %150 = fmul float %149, %140
>  %151 = fmul float %149, %142
>  %152 = fmul float %149, %144
>  %153 = fmul float %150, 2.000000e+00
>  %154 = fmul float %151, 2.000000e+00
>  %155 = fmul float %152, 2.000000e+00
>  %156 = fsub float %49, %153
>  %157 = fsub float %50, %154
>  %158 = fsub float %51, %155
>  %159 = fmul float %156, %59
>  %160 = fmul float %157, %60
>  %161 = fadd float %160, %159
>  %162 = fmul float %158, %61
>  %163 = fadd float %161, %162
>  %164 = fadd float %163, 1.000000e+00
>  %165 = fmul float %49, %59
>  %166 = fmul float %50, %60
>  %167 = fadd float %166, %165
>  %168 = fmul float %51, %61
>  %169 = fadd float %167, %168
>  %170 = fsub float 1.000000e+00, %169
>  %171 = call float @llvm.AMDGPU.clamp.(float %170, float 0.000000e+00, float 1.000000e+00)
>  %172 = fsub float %164, %171
>  %173 = call float @llvm.AMDGPU.clamp.(float %172, float 0.000000e+00, float 1.000000e+00)
>  %174 = fsub float 1.000000e+00, %173
>  %175 = fmul float %174, %174
>  %176 = fmul float %97, %175
>  %177 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %178 = fmul float %59, 0x4007700140000000
>  %179 = fadd float %178, %177
>  %180 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %181 = fmul float %60, 0x4007700140000000
>  %182 = fadd float %181, %180
>  %183 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %184 = fmul float %61, 0x4007700140000000
>  %185 = fadd float %184, %183
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = call float @llvm.SI.load.const(<16 x i8> %187, i32 64)
>  %189 = fmul float %188, %179
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 68)
>  %191 = fmul float %190, %179
>  %192 = call float @llvm.SI.load.const(<16 x i8> %187, i32 72)
>  %193 = fmul float %192, %179
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = call float @llvm.SI.load.const(<16 x i8> %195, i32 80)
>  %197 = fmul float %196, %182
>  %198 = fadd float %197, %189
>  %199 = call float @llvm.SI.load.const(<16 x i8> %195, i32 84)
>  %200 = fmul float %199, %182
>  %201 = fadd float %200, %191
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = call float @llvm.SI.load.const(<16 x i8> %203, i32 88)
>  %205 = fmul float %204, %182
>  %206 = fadd float %205, %193
>  %207 = call float @llvm.SI.load.const(<16 x i8> %203, i32 96)
>  %208 = fmul float %207, %185
>  %209 = fadd float %208, %198
>  %210 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <16 x i8>, <16 x i8> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = call float @llvm.SI.load.const(<16 x i8> %211, i32 100)
>  %213 = fmul float %212, %185
>  %214 = fadd float %213, %201
>  %215 = call float @llvm.SI.load.const(<16 x i8> %211, i32 104)
>  %216 = fmul float %215, %185
>  %217 = fadd float %216, %206
>  %218 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %219 = load <16 x i8>, <16 x i8> addrspace(2)* %218, align 16, !invariant.load !0
>  %220 = call float @llvm.SI.load.const(<16 x i8> %219, i32 112)
>  %221 = fadd float %209, %220
>  %222 = call float @llvm.SI.load.const(<16 x i8> %219, i32 116)
>  %223 = fadd float %214, %222
>  %224 = call float @llvm.SI.load.const(<16 x i8> %219, i32 120)
>  %225 = fadd float %217, %224
>  %226 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %227 = load <16 x i8>, <16 x i8> addrspace(2)* %226, align 16, !invariant.load !0
>  %228 = call float @llvm.SI.load.const(<16 x i8> %227, i32 16)
>  %229 = call float @llvm.SI.load.const(<16 x i8> %227, i32 20)
>  %230 = call float @llvm.SI.load.const(<16 x i8> %227, i32 24)
>  %231 = fmul float %228, %140
>  %232 = fsub float -0.000000e+00, %231
>  %233 = fmul float %229, %142
>  %234 = fsub float %232, %233
>  %235 = fmul float %230, %144
>  %236 = fsub float %234, %235
>  %237 = call float @llvm.AMDGPU.clamp.(float %236, float 0.000000e+00, float 1.000000e+00)
>  %238 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %239 = load <8 x i32>, <8 x i32> addrspace(2)* %238, align 32, !invariant.load !0
>  %240 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %241 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %240, i64 0, i64 3, !amdgpu.uniform !0
>  %242 = load <4 x i32>, <4 x i32> addrspace(2)* %241, align 16, !invariant.load !0
>  %243 = extractelement <8 x i32> %239, i32 7
>  %244 = extractelement <4 x i32> %242, i32 0
>  %245 = and i32 %244, %243
>  %246 = insertelement <4 x i32> %242, i32 %245, i32 0
>  %247 = bitcast float %225 to i32
>  %248 = bitcast float %221 to i32
>  %249 = bitcast float %223 to i32
>  %250 = insertelement <4 x i32> undef, i32 %247, i32 0
>  %251 = insertelement <4 x i32> %250, i32 %248, i32 1
>  %252 = insertelement <4 x i32> %251, i32 %249, i32 2
>  %253 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %252, <8 x i32> %239, <4 x i32> %246, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %254 = extractelement <4 x float> %253, i32 0
>  %255 = fmul float %254, %254
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = call float @llvm.SI.load.const(<16 x i8> %257, i32 48)
>  %259 = fmul float %258, %255
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 52)
>  %261 = fmul float %260, %255
>  %262 = call float @llvm.SI.load.const(<16 x i8> %257, i32 56)
>  %263 = fmul float %262, %255
>  %264 = fmul float %259, %97
>  %265 = fmul float %261, %97
>  %266 = fmul float %263, %97
>  %267 = fmul float %237, %264
>  %268 = fmul float %237, %265
>  %269 = fmul float %237, %266
>  %270 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %271 = load <8 x i32>, <8 x i32> addrspace(2)* %270, align 32, !invariant.load !0
>  %272 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %273 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %272, i64 0, i64 7, !amdgpu.uniform !0
>  %274 = load <4 x i32>, <4 x i32> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = extractelement <8 x i32> %271, i32 7
>  %276 = extractelement <4 x i32> %274, i32 0
>  %277 = and i32 %276, %275
>  %278 = insertelement <4 x i32> %274, i32 %277, i32 0
>  %279 = call float @llvm.amdgcn.cubetc(float %140, float %142, float %144)
>  %280 = call float @llvm.amdgcn.cubesc(float %140, float %142, float %144)
>  %281 = call float @llvm.amdgcn.cubema(float %140, float %142, float %144)
>  %282 = call float @llvm.amdgcn.cubeid(float %140, float %142, float %144)
>  %283 = call float @llvm.fabs.f32(float %281)
>  %284 = fdiv float 1.000000e+00, %283, !fpmath !1
>  %285 = fmul float %279, %284
>  %286 = fadd float %285, 1.500000e+00
>  %287 = fmul float %280, %284
>  %288 = fadd float %287, 1.500000e+00
>  %289 = bitcast float %288 to i32
>  %290 = bitcast float %286 to i32
>  %291 = bitcast float %282 to i32
>  %292 = insertelement <4 x i32> undef, i32 %289, i32 0
>  %293 = insertelement <4 x i32> %292, i32 %290, i32 1
>  %294 = insertelement <4 x i32> %293, i32 %291, i32 2
>  %295 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %294, <8 x i32> %271, <4 x i32> %278, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %296 = extractelement <4 x float> %295, i32 0
>  %297 = extractelement <4 x float> %295, i32 1
>  %298 = extractelement <4 x float> %295, i32 2
>  %299 = extractelement <4 x float> %295, i32 3
>  %300 = fmul float %140, %49
>  %301 = fmul float %142, %50
>  %302 = fadd float %301, %300
>  %303 = fmul float %144, %51
>  %304 = fadd float %302, %303
>  %305 = fmul float %304, %140
>  %306 = fmul float %304, %142
>  %307 = fmul float %304, %144
>  %308 = fmul float %305, 2.000000e+00
>  %309 = fsub float %308, %49
>  %310 = fmul float %306, 2.000000e+00
>  %311 = fsub float %310, %50
>  %312 = fmul float %307, 2.000000e+00
>  %313 = fsub float %312, %51
>  %314 = fsub float 1.000000e+00, %98
>  %315 = fmul float %314, 6.000000e+00
>  %316 = fmul float %49, %140
>  %317 = fmul float %50, %142
>  %318 = fadd float %317, %316
>  %319 = fmul float %51, %144
>  %320 = fadd float %318, %319
>  %321 = call float @llvm.AMDGPU.clamp.(float %320, float 0.000000e+00, float 1.000000e+00)
>  %322 = fsub float 1.000000e+00, %321
>  %323 = call float @llvm.pow.f32(float %322, float 5.000000e+00)
>  %324 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %325 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %326 = call float @llvm.maxnum.f32(float %98, float 0.000000e+00)
>  %327 = fmul float %323, %324
>  %328 = fmul float %323, %325
>  %329 = fmul float %323, %326
>  %330 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %331 = load <8 x i32>, <8 x i32> addrspace(2)* %330, align 32, !invariant.load !0
>  %332 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %333 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %332, i64 0, i64 11, !amdgpu.uniform !0
>  %334 = load <4 x i32>, <4 x i32> addrspace(2)* %333, align 16, !invariant.load !0
>  %335 = extractelement <8 x i32> %331, i32 7
>  %336 = extractelement <4 x i32> %334, i32 0
>  %337 = and i32 %336, %335
>  %338 = insertelement <4 x i32> %334, i32 %337, i32 0
>  %339 = call float @llvm.amdgcn.cubetc(float %309, float %311, float %313)
>  %340 = call float @llvm.amdgcn.cubesc(float %309, float %311, float %313)
>  %341 = call float @llvm.amdgcn.cubema(float %309, float %311, float %313)
>  %342 = call float @llvm.amdgcn.cubeid(float %309, float %311, float %313)
>  %343 = call float @llvm.fabs.f32(float %341)
>  %344 = fdiv float 1.000000e+00, %343, !fpmath !1
>  %345 = fmul float %339, %344
>  %346 = fadd float %345, 1.500000e+00
>  %347 = fmul float %340, %344
>  %348 = fadd float %347, 1.500000e+00
>  %349 = bitcast float %348 to i32
>  %350 = bitcast float %346 to i32
>  %351 = bitcast float %342 to i32
>  %352 = bitcast float %315 to i32
>  %353 = insertelement <4 x i32> undef, i32 %349, i32 0
>  %354 = insertelement <4 x i32> %353, i32 %350, i32 1
>  %355 = insertelement <4 x i32> %354, i32 %351, i32 2
>  %356 = insertelement <4 x i32> %355, i32 %352, i32 3
>  %357 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %356, <8 x i32> %331, <4 x i32> %338, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %358 = extractelement <4 x float> %357, i32 0
>  %359 = extractelement <4 x float> %357, i32 1
>  %360 = extractelement <4 x float> %357, i32 2
>  %361 = fmul float %327, %358
>  %362 = fmul float %328, %359
>  %363 = fmul float %329, %360
>  %364 = fmul float %296, %299
>  %365 = fmul float %297, %299
>  %366 = fmul float %298, %299
>  %367 = fmul float %97, 4.000000e+00
>  %368 = fmul float %364, %367
>  %369 = fadd float %368, %267
>  %370 = fmul float %365, %367
>  %371 = fadd float %370, %268
>  %372 = fmul float %366, %367
>  %373 = fadd float %372, %269
>  %374 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %375 = load <16 x i8>, <16 x i8> addrspace(2)* %374, align 16
>  br label %loop119
>
>loop119:                                          ; preds = %endif123, %main_body
>  %376 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %377 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %378 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %379 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %380 = phi i32 [ 0, %main_body ], [ %443, %endif123 ]
>  %.011 = phi float [ %373, %main_body ], [ %442, %endif123 ]
>  %.010 = phi float [ %371, %main_body ], [ %441, %endif123 ]
>  %.09 = phi float [ %369, %main_body ], [ %440, %endif123 ]
>  %381 = icmp sgt i32 %376, 2
>  br i1 %381, label %endloop175, label %endif123
>
>endif123:                                         ; preds = %loop119
>  %382 = shl i32 %377, 5
>  %383 = shl i32 %377, 5
>  %384 = add i32 %383, 176
>  %385 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %384)
>  %386 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %387 = fsub float %385, %386
>  %388 = shl i32 %377, 5
>  %389 = add i32 %388, 180
>  %390 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %389)
>  %391 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %392 = fsub float %390, %391
>  %393 = add i32 %382, 184
>  %394 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %393)
>  %395 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %396 = fsub float %394, %395
>  %397 = fmul float %387, %387
>  %398 = fmul float %392, %392
>  %399 = fadd float %398, %397
>  %400 = fmul float %396, %396
>  %401 = fadd float %399, %400
>  %402 = call float @llvm.sqrt.f32(float %401)
>  %403 = fdiv float 1.000000e+00, %402, !fpmath !1
>  %404 = fmul float %387, %403
>  %405 = fmul float %392, %403
>  %406 = fmul float %396, %403
>  %407 = fmul float %404, %140
>  %408 = fmul float %405, %142
>  %409 = fadd float %408, %407
>  %410 = fmul float %406, %144
>  %411 = fadd float %409, %410
>  %412 = call float @llvm.AMDGPU.clamp.(float %411, float 0.000000e+00, float 1.000000e+00)
>  %413 = shl i32 %378, 1
>  %414 = or i32 %413, 1
>  %415 = fmul float %401, %403
>  %416 = shl i32 %379, 5
>  %417 = add i32 %416, 188
>  %418 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %417)
>  %419 = fmul float %415, %418
>  %420 = call float @llvm.AMDGPU.clamp.(float %419, float 0.000000e+00, float 1.000000e+00)
>  %421 = fsub float 1.000000e+00, %420
>  %422 = shl i32 %414, 4
>  %423 = add i32 %422, 176
>  %424 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %423)
>  %425 = fmul float %424, %421
>  %426 = shl i32 %414, 4
>  %427 = add i32 %426, 180
>  %428 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %427)
>  %429 = fmul float %428, %421
>  %430 = shl i32 %414, 4
>  %431 = add i32 %430, 184
>  %432 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %431)
>  %433 = fmul float %432, %421
>  %434 = fmul float %425, %97
>  %435 = fmul float %429, %97
>  %436 = fmul float %433, %97
>  %437 = fmul float %412, %434
>  %438 = fmul float %412, %435
>  %439 = fmul float %412, %436
>  %440 = fadd float %.09, %437
>  %441 = fadd float %.010, %438
>  %442 = fadd float %.011, %439
>  %443 = add i32 %380, 1
>  br label %loop119
>
>endloop175:                                       ; preds = %loop119
>  %444 = fmul float %361, %176
>  %445 = fmul float %362, %176
>  %446 = fmul float %363, %176
>  %447 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %448 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %449 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %450 = load <8 x i32>, <8 x i32> addrspace(2)* %449, align 32, !invariant.load !0
>  %451 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %452 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %451, i64 0, i64 27, !amdgpu.uniform !0
>  %453 = load <4 x i32>, <4 x i32> addrspace(2)* %452, align 16, !invariant.load !0
>  %454 = extractelement <8 x i32> %450, i32 7
>  %455 = extractelement <4 x i32> %453, i32 0
>  %456 = and i32 %455, %454
>  %457 = insertelement <4 x i32> %453, i32 %456, i32 0
>  %458 = bitcast float %447 to i32
>  %459 = bitcast float %448 to i32
>  %460 = insertelement <2 x i32> undef, i32 %458, i32 0
>  %461 = insertelement <2 x i32> %460, i32 %459, i32 1
>  %462 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %461, <8 x i32> %450, <4 x i32> %457, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %463 = extractelement <4 x float> %462, i32 0
>  %464 = extractelement <4 x float> %462, i32 1
>  %465 = extractelement <4 x float> %462, i32 2
>  %466 = fmul float %463, 0x3FD3333340000000
>  %467 = fmul float %464, 0x3FE2E147A0000000
>  %468 = fadd float %467, %466
>  %469 = fmul float %465, 0x3FBC28F5C0000000
>  %470 = fadd float %468, %469
>  %471 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %472 = load <16 x i8>, <16 x i8> addrspace(2)* %471, align 16, !invariant.load !0
>  %473 = call float @llvm.SI.load.const(<16 x i8> %472, i32 352)
>  %474 = fmul float %470, %473
>  %475 = call float @llvm.SI.load.const(<16 x i8> %472, i32 348)
>  %476 = fadd float %475, 1.000000e+00
>  %477 = fmul float %474, %476
>  %478 = fmul float %463, %477
>  %479 = fmul float %464, %477
>  %480 = fmul float %465, %477
>  %481 = fmul float %478, 3.200000e+01
>  %482 = fmul float %479, 3.200000e+01
>  %483 = fmul float %480, 3.200000e+01
>  %484 = fmul float %.09, %78
>  %485 = fadd float %484, %444
>  %486 = fmul float %.010, %79
>  %487 = fadd float %486, %445
>  %488 = fmul float %.011, %80
>  %489 = fadd float %488, %446
>  %490 = fadd float %485, %481
>  %491 = fadd float %487, %482
>  %492 = fadd float %489, %483
>  %493 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %494 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %495 = load <16 x i8>, <16 x i8> addrspace(2)* %494, align 16, !invariant.load !0
>  %496 = call float @llvm.SI.load.const(<16 x i8> %495, i32 12)
>  %497 = fsub float %493, %496
>  %498 = call float @llvm.maxnum.f32(float %497, float 0.000000e+00)
>  %499 = call float @llvm.SI.load.const(<16 x i8> %495, i32 28)
>  %500 = call float @llvm.SI.load.const(<16 x i8> %495, i32 12)
>  %501 = fsub float %499, %500
>  %502 = fadd float %501, 0x3F50624DE0000000
>  %503 = fdiv float 1.000000e+00, %502, !fpmath !1
>  %504 = fmul float %498, %503
>  %505 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %506 = load <16 x i8>, <16 x i8> addrspace(2)* %505, align 16, !invariant.load !0
>  %507 = call float @llvm.SI.load.const(<16 x i8> %506, i32 28)
>  %508 = call float @llvm.floor.f32(float %507)
>  %509 = fsub float %507, %508
>  %510 = fmul float %509, 8.000000e+00
>  %511 = call float @llvm.pow.f32(float %504, float %510)
>  %512 = call float @llvm.AMDGPU.clamp.(float %511, float 0.000000e+00, float 1.000000e+00)
>  %513 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %514 = fmul float %513, %512
>  %515 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %516 = load <16 x i8>, <16 x i8> addrspace(2)* %515, align 16, !invariant.load !0
>  %517 = call float @llvm.SI.load.const(<16 x i8> %516, i32 32)
>  %518 = fsub float 1.000000e+00, %514
>  %519 = fmul float %490, %514
>  %520 = fmul float %517, %518
>  %521 = fadd float %519, %520
>  %522 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %523 = load <16 x i8>, <16 x i8> addrspace(2)* %522, align 16, !invariant.load !0
>  %524 = call float @llvm.SI.load.const(<16 x i8> %523, i32 36)
>  %525 = fsub float 1.000000e+00, %514
>  %526 = fmul float %491, %514
>  %527 = fmul float %524, %525
>  %528 = fadd float %526, %527
>  %529 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %530 = load <16 x i8>, <16 x i8> addrspace(2)* %529, align 16, !invariant.load !0
>  %531 = call float @llvm.SI.load.const(<16 x i8> %530, i32 40)
>  %532 = fsub float 1.000000e+00, %514
>  %533 = fmul float %492, %514
>  %534 = fmul float %531, %532
>  %535 = fadd float %533, %534
>  %536 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %537 = bitcast float %5 to i32
>  %538 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %537, 10
>  %539 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %538, float %521, 11
>  %540 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %539, float %528, 12
>  %541 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %540, float %535, 13
>  %542 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %541, float %536, 14
>  %543 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %542, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %543
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[10:13], v4, s[4:7], 0 idxen   ; E00C2000 80010A04
>	buffer_load_format_xyzw v[19:22], v5, s[12:15], 0 idxen ; E00C2000 80031305
>	buffer_load_format_xyzw v[15:18], v6, s[16:19], 0 idxen ; E00C2000 80040F06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s4                                    ; 7E000204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s4                                    ; 7E100204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	v_sub_f32_e32 v23, s7, v0                               ; 082E0007
>	v_mov_b32_e32 v7, s8                                    ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s4                                    ; 7E120204
>	v_mov_b32_e32 v22, s5                                   ; 7E2C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v27, s6, v1                               ; 08360206
>	v_mov_b32_e32 v24, s7                                   ; 7E300207
>	v_mov_b32_e32 v25, s8                                   ; 7E320208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v26, s4                                   ; 7E340204
>	v_sub_f32_e32 v28, s5, v14                              ; 08381C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[4:7], 0 idxen   ; E00C2000 80012108
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v5, v33                               ; 7E0A1121
>	v_mul_lo_i32 v26, v5, 48                                ; D2D6001A 00016105
>	v_add_i32_e32 v5, vcc, s14, v26                         ; 4A0A340E
>	v_add_i32_e32 v9, vcc, s13, v26                         ; 4A12340D
>	v_add_i32_e32 v22, vcc, s15, v26                        ; 4A2C340F
>	v_add_i32_e32 v6, vcc, s12, v26                         ; 4A0C340C
>	buffer_load_dword v8, v5, s[0:3], 0 offen               ; E0301000 80000805
>	buffer_load_dword v5, v9, s[0:3], 0 offen               ; E0301000 80000509
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v0, v9                            ; 0A2E1300
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v9, vcc, 0x8c, v26                        ; 4A1234FF 0000008C
>	v_add_i32_e32 v27, vcc, 0x9c, v26                       ; 4A3634FF 0000009C
>	v_add_i32_e32 v22, vcc, 0x84, v26                       ; 4A2C34FF 00000084
>	v_add_i32_e32 v24, vcc, 0x88, v26                       ; 4A3034FF 00000088
>	v_add_i32_e32 v7, vcc, 0x80, v26                        ; 4A0E34FF 00000080
>	v_add_i32_e32 v25, vcc, 0x94, v26                       ; 4A3234FF 00000094
>	buffer_load_dword v28, v9, s[0:3], 0 offen              ; E0301000 80001C09
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v22, v24, s[0:3], 0 offen             ; E0301000 80001618
>	v_add_i32_e32 v24, vcc, 0x90, v26                       ; 4A3034FF 00000090
>	v_add_i32_e32 v26, vcc, 0x98, v26                       ; 4A3434FF 00000098
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v1, v28                           ; 0A363901
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v28, v14, v29                          ; 0A383B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	v_cvt_i32_f32_e32 v7, v34                               ; 7E0E1122
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v9, vcc, s10, v26                         ; 4A12340A
>	v_add_i32_e32 v22, vcc, s9, v26                         ; 4A2C3409
>	v_add_i32_e32 v24, vcc, s8, v26                         ; 4A303408
>	v_add_i32_e32 v25, vcc, s4, v26                         ; 4A323404
>	v_mul_lo_i32 v33, v7, 48                                ; D2D60021 00016107
>	v_add_i32_e32 v7, vcc, s11, v26                         ; 4A0E340B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v28, vcc, s6, v26                         ; 4A383406
>	buffer_load_dword v27, v7, s[0:3], 0 offen              ; E0301000 80001B07
>	v_add_i32_e32 v7, vcc, s7, v26                          ; 4A0E3407
>	v_add_i32_e32 v26, vcc, s5, v26                         ; 4A343405
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	buffer_load_dword v34, v7, s[0:3], 0 offen              ; E0301000 80002207
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	v_mul_f32_e32 v6, v29, v6                               ; 100C0D1D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v23, v29, v23                             ; 102E2F1D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v14, v25                          ; 0A4A330E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v9, v29, v22                              ; 10122D1D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v22, v29, v24                             ; 102C311D
>	v_subrev_f32_e32 v24, v1, v27                           ; 0A303701
>	v_mul_f32_e32 v27, v29, v24                             ; 1036311D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v25, v29, v28                             ; 1032391D
>	v_mul_f32_e32 v24, v29, v34                             ; 1030451D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v0, v29                           ; 0A3A3B00
>	v_mac_f32_e32 v23, v30, v29                             ; 3E2E3B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v1, v29                           ; 0A3A3B01
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v30, v29                             ; 3E2C3B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v30, v29                             ; 3E303B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v30, v29                             ; 3E323B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s4, v33                         ; 4A3A4204
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v31, v30                             ; 3E2E3D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v31, v30                             ; 3E2C3D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v31, v30                             ; 3E303D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v31, v30                             ; 3E323D1F
>	v_add_i32_e32 v30, vcc, s5, v29                         ; 4A3C3A05
>	v_add_i32_e32 v29, vcc, s4, v29                         ; 4A3A3A04
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v32, v30                             ; 3E2E3D20
>	v_add_i32_e32 v30, vcc, 0x8c, v29                       ; 4A3C3AFF 0000008C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0x80, v29                       ; 4A3C3AFF 00000080
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0x84, v29                       ; 4A3C3AFF 00000084
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0x88, v29                       ; 4A3C3AFF 00000088
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v32, v30                             ; 3E2C3D20
>	v_add_i32_e32 v30, vcc, 0x90, v29                       ; 4A3C3AFF 00000090
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v32, v30                             ; 3E303D20
>	v_add_i32_e32 v30, vcc, 0x94, v29                       ; 4A3C3AFF 00000094
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v32, v30                             ; 3E323D20
>	v_add_i32_e32 v30, vcc, 0x98, v29                       ; 4A3C3AFF 00000098
>	v_add_i32_e32 v29, vcc, 0x9c, v29                       ; 4A3A3AFF 0000009C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v29, v6, v11                              ; 103A1706
>	v_mac_f32_e32 v29, v8, v10                              ; 3E3A1508
>	v_mac_f32_e32 v29, v5, v12                              ; 3E3A1905
>	v_mac_f32_e32 v29, v23, v13                             ; 3E3A1B17
>	v_mul_f32_e32 v23, v9, v11                              ; 102E1709
>	v_mac_f32_e32 v23, v7, v10                              ; 3E2E1507
>	v_mac_f32_e32 v23, v22, v12                             ; 3E2E1916
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v23, v27, v13                             ; 3E2E1B1B
>	v_mul_f32_e32 v27, v25, v11                             ; 10361719
>	v_mul_f32_e32 v11, 0, v11                               ; 10161680
>	v_mac_f32_e32 v27, v24, v10                             ; 3E361518
>	v_mac_f32_e32 v11, 0, v10                               ; 3E161480
>	v_add_f32_e32 v19, v19, v19                             ; 06262713
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mac_f32_e32 v27, v26, v12                             ; 3E36191A
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_mad_f32 v12, v19, v8, -v8                             ; D282000C 84221113
>	v_mad_f32 v20, 2.0, v20, -1.0                           ; D2820014 03CE28F4
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v8, v15, v8, -v8                              ; D2820008 8422110F
>	v_mad_f32 v21, 2.0, v21, -1.0                           ; D2820015 03CE2AF4
>	v_mac_f32_e32 v12, v6, v20                              ; 3E182906
>	v_mac_f32_e32 v8, v6, v16                               ; 3E102106
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_add_f32_e32 v0, v0, v29                               ; 06003B00
>	v_mad_f32 v6, v15, v24, -v24                            ; D2820006 8462310F
>	v_mac_f32_e32 v12, v5, v21                              ; 3E182B05
>	v_mac_f32_e32 v8, v5, v17                               ; 3E102305
>	v_mad_f32 v5, v15, v7, -v7                              ; D2820005 841E0F0F
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v15, s7, v0                               ; 101E0007
>	s_buffer_load_dword s7, s[0:3], 0x7                     ; C2038107
>	s_buffer_load_dword s11, s[0:3], 0xb                    ; C205810B
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_add_f32_e32 v1, v1, v23                               ; 06022F01
>	v_mac_f32_e32 v27, v28, v13                             ; 3E361B1C
>	v_add_f32_e32 v10, v13, v11                             ; 0614170D
>	v_add_f32_e32 v11, v14, v27                             ; 0616370E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v1                               ; 3E1E0207
>	v_mad_f32 v13, v19, v7, -v7                             ; D282000D 841E0F13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	s_buffer_load_dword s11, s[0:3], 0xf                    ; C205810F
>	v_mac_f32_e32 v13, v9, v20                              ; 3E1A2909
>	v_mac_f32_e32 v5, v9, v16                               ; 3E0A2109
>	v_mul_f32_e32 v7, s4, v0                                ; 100E0004
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	v_mul_f32_e32 v9, s5, v0                                ; 10120005
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s9, s[0:3], 0x8                     ; C2048108
>	s_buffer_load_dword s10, s[0:3], 0x9                    ; C2050109
>	s_buffer_load_dword s7, s[0:3], 0xa                     ; C203810A
>	s_buffer_load_dword s12, s[0:3], 0xc                    ; C206010C
>	s_buffer_load_dword s13, s[0:3], 0xd                    ; C206810D
>	s_buffer_load_dword s14, s[0:3], 0xe                    ; C207010E
>	s_buffer_load_dword s15, s[0:3], 0x14                   ; C2078114
>	s_buffer_load_dword s16, s[0:3], 0x15                   ; C2080115
>	s_buffer_load_dword s17, s[0:3], 0x16                   ; C2088116
>	s_buffer_load_dword s18, s[0:3], 0x17                   ; C2090117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s11, v10                             ; 3E1E140B
>	v_mac_f32_e32 v6, v25, v16                              ; 3E0C2119
>	v_mac_f32_e32 v7, s8, v1                                ; 3E0E0208
>	v_mac_f32_e32 v9, s4, v1                                ; 3E120204
>	v_mul_f32_e32 v16, s0, v15                              ; 10201E00
>	exp 15, 32, 0, 0, 0, v0, v1, v11, v16                   ; F800020F 100B0100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v0, s6, v0                                ; 10000006
>	v_mac_f32_e32 v0, s5, v1                                ; 3E000205
>	v_mac_f32_e32 v0, s7, v11                               ; 3E001607
>	v_mac_f32_e32 v0, s14, v10                              ; 3E00140E
>	v_mov_b32_e32 v1, s15                                   ; 7E02020F
>	v_mac_f32_e32 v1, s16, v0                               ; 3E020010
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mad_f32 v14, v19, v24, -v24                           ; D282000E 84623113
>	v_mac_f32_e32 v14, v25, v20                             ; 3E1C2919
>	v_mac_f32_e32 v7, s9, v11                               ; 3E0E1609
>	v_mac_f32_e32 v9, s10, v11                              ; 3E12160A
>	v_mul_legacy_f32_e32 v1, s17, v1                        ; 0E020211
>	v_mac_f32_e32 v14, v26, v21                             ; 3E1C2B1A
>	v_mac_f32_e32 v5, v22, v17                              ; 3E0A2316
>	v_mac_f32_e32 v7, s12, v10                              ; 3E0E140C
>	v_mac_f32_e32 v9, s13, v10                              ; 3E12140D
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_sub_f32_e64 v10, 1.0, s18                             ; D208000A 000024F2
>	v_mac_f32_e32 v10, s18, v1                              ; 3E140212
>	v_mac_f32_e32 v13, v22, v21                             ; 3E1A2B16
>	v_mac_f32_e32 v6, v26, v17                              ; 3E0C231A
>	v_mul_f32_e32 v1, v5, v14                               ; 10021D05
>	v_mul_f32_e32 v11, v6, v12                              ; 10161906
>	v_mul_f32_e32 v16, v8, v13                              ; 10201B08
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_add_f32_e32 v18, v18, v18                             ; 06242512
>	v_mad_f32 v1, v13, v6, -v1                              ; D2820001 84060D0D
>	v_mad_f32 v11, v14, v8, -v11                            ; D282000B 842E110E
>	v_mad_f32 v16, v12, v5, -v16                            ; D2820010 84420B0C
>	v_mad_f32 v1, v18, v1, -v1                              ; D2820001 84060312
>	exp 15, 33, 0, 0, 0, v3, v4, v10, v0                    ; F800021F 000A0403
>	v_mad_f32 v11, v18, v11, -v11                           ; D282000B 842E1712
>	v_mad_f32 v16, v18, v16, -v16                           ; D2820010 84422112
>	exp 15, 34, 0, 0, 0, v8, v5, v6, v1                     ; F800022F 01060508
>	exp 15, 35, 0, 0, 0, v11, v16, v12, v13                 ; F800023F 0D0C100B
>	exp 15, 36, 0, 0, 0, v14, v0, v0, v0                    ; F800024F 0000000E
>	exp 15, 12, 0, 1, 0, v7, v9, v0, v15                    ; F80008CF 0F000907
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v21, v4, 3, 2, [m0]                             ; C8540B04
>	v_interp_p2_f32 v21, [v21], v5, 3, 2, [m0]                      ; C8550B05
>	v_interp_p1_f32 v22, v4, 0, 3, [m0]                             ; C8580C04
>	v_interp_p2_f32 v22, [v22], v5, 0, 3, [m0]                      ; C8590C05
>	v_interp_p1_f32 v23, v4, 1, 3, [m0]                             ; C85C0D04
>	v_interp_p2_f32 v23, [v23], v5, 1, 3, [m0]                      ; C85D0D05
>	v_interp_p1_f32 v7, v4, 2, 3, [m0]                              ; C81C0E04
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	v_interp_p2_f32 v7, [v7], v5, 2, 3, [m0]                        ; C81D0E05
>	v_interp_p1_f32 v8, v4, 3, 3, [m0]                              ; C8200F04
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v8, [v8], v5, 3, 3, [m0]                        ; C8210F05
>	v_interp_p1_f32 v9, v4, 0, 4, [m0]                              ; C8241004
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v9, [v9], v5, 0, 4, [m0]                        ; C8251005
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v24, s8, v1                                       ; 08300208
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	v_sub_f32_e32 v25, s9, v0                                       ; 08320009
>	v_mul_f32_e32 v10, v24, v24                                     ; 10143118
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_sub_f32_e32 v26, s12, v2                                      ; 0834040C
>	v_mac_f32_e32 v10, v25, v25                                     ; 3E143319
>	v_mac_f32_e32 v10, v26, v26                                     ; 3E14351A
>	v_rsq_f32_e32 v27, v10                                          ; 7E365D0A
>	v_mul_f32_e32 v10, v7, v7                                       ; 10140F07
>	v_mac_f32_e32 v10, v8, v8                                       ; 3E141108
>	v_mac_f32_e32 v10, v9, v9                                       ; 3E141309
>	v_rsq_f32_e32 v10, v10                                          ; 7E145D0A
>	s_load_dwordx8 s[44:51], s[4:5], 0x30                           ; C0D60530
>	s_load_dwordx4 s[60:63], s[4:5], 0x3c                           ; C09E053C
>	s_load_dwordx8 s[52:59], s[4:5], 0x40                           ; C0DA0540
>	v_mul_f32_e32 v28, v10, v7                                      ; 10380F0A
>	v_interp_p1_f32 v7, v6, 0, 1, [m0]                              ; C81C0406
>	v_mul_f32_e32 v29, v10, v8                                      ; 103A110A
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]                        ; C81D0403
>	v_interp_p1_f32 v8, v6, 1, 1, [m0]                              ; C8200506
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]                        ; C8210503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s60, s60, s51                                         ; 873C333C
>	v_mul_f32_e32 v30, v10, v9                                      ; 103C130A
>	image_sample v[9:11], v[7:8], s[44:51], s[60:63] dmask:0x7      ; F0800700 01EB0907
>	s_load_dwordx8 s[44:51], s[4:5], 0x50                           ; C0D60550
>	s_load_dwordx4 s[60:63], s[4:5], 0x5c                           ; C09E055C
>	s_buffer_load_dword s8, s[0:3], 0x11                            ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                            ; C2048112
>	s_load_dwordx8 s[32:39], s[4:5], 0x0                            ; C0D00500
>	s_load_dwordx4 s[40:43], s[4:5], 0xc                            ; C094050C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s60, s60, s51                                         ; 873C333C
>	image_sample v[14:15], v[7:8], s[44:51], s[60:63] dmask:0x6     ; F0800600 01EB0E07
>	s_load_dwordx4 s[44:47], s[4:5], 0x4c                           ; C096054C
>	v_mul_f32_e32 v31, v27, v24                                     ; 103E311B
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	v_mul_f32_e32 v32, v27, v25                                     ; 1040331B
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s44, s44, s59                                         ; 872C3B2C
>	image_sample v[19:20], v[7:8], s[52:59], s[44:47] dmask:0xa     ; F0800A00 016D1307
>	v_interp_p1_f32 v12, v4, 0, 2, [m0]                             ; C8300804
>	v_interp_p2_f32 v12, [v12], v5, 0, 2, [m0]                      ; C8310805
>	v_interp_p1_f32 v33, v4, 1, 2, [m0]                             ; C8840904
>	v_interp_p2_f32 v33, [v33], v5, 1, 2, [m0]                      ; C8850905
>	v_interp_p1_f32 v34, v4, 2, 2, [m0]                             ; C8880A04
>	v_mov_b32_e32 v4, 0x403b800a                                    ; 7E0802FF 403B800A
>	s_buffer_load_dword s44, s[0:3], 0x10                           ; C2160110
>	v_interp_p2_f32 v34, [v34], v5, 2, 2, [m0]                      ; C8890A05
>	v_mad_f32 v5, v4, v28, v1                                       ; D2820005 04063904
>	s_buffer_load_dword s45, s[0:3], 0x14                           ; C2168114
>	v_mul_f32_e32 v18, s8, v5                                       ; 10240A08
>	s_buffer_load_dword s46, s[0:3], 0x15                           ; C2170115
>	s_buffer_load_dword s8, s[0:3], 0x18                            ; C2040118
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v16, s44, v5                                      ; 10200A2C
>	v_mad_f32 v17, v4, v29, v0                                      ; D2820011 04023B04
>	s_buffer_load_dword s47, s[0:3], 0x16                           ; C2178116
>	v_mul_f32_e32 v5, s9, v5                                        ; 100A0A09
>	v_mac_f32_e32 v16, s45, v17                                     ; 3E20222D
>	v_mad_f32 v4, v4, v30, v2                                       ; D2820004 040A3D04
>	s_buffer_load_dword s9, s[0:3], 0x19                            ; C2048119
>	s_buffer_load_dword s44, s[0:3], 0x1a                           ; C216011A
>	v_mac_f32_e32 v18, s46, v17                                     ; 3E24222E
>	v_mac_f32_e32 v16, s8, v4                                       ; 3E200808
>	s_buffer_load_dword s45, s[0:3], 0x1c                           ; C216811C
>	s_buffer_load_dword s46, s[0:3], 0x1d                           ; C217011D
>	s_buffer_load_dword s8, s[0:3], 0x1e                            ; C204011E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v5, s47, v17                                      ; 3E0A222F
>	v_mac_f32_e32 v18, s9, v4                                       ; 3E240809
>	v_mac_f32_e32 v5, s44, v4                                       ; 3E0A082C
>	v_add_f32_e32 v17, s45, v16                                     ; 0622202D
>	v_add_f32_e32 v16, s8, v5                                       ; 06200A08
>	v_add_f32_e32 v18, s46, v18                                     ; 0624242E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	image_sample_c v35, v[16:19], s[32:39], s[40:43] dmask:0x1      ; F0A00100 01482310
>	v_add_f32_e32 v16, v20, v20                                     ; 06202914
>	v_add_f32_e32 v18, v19, v19                                     ; 06242713
>	v_mad_f32 v19, 2.0, v19, -1.0                                   ; D2820013 03CE26F4
>	v_mad_f32 v4, v16, v12, -v12                                    ; D2820004 84321910
>	v_mad_f32 v5, v16, v33, -v33                                    ; D2820005 84864310
>	v_mad_f32 v12, v16, v34, -v34                                   ; D282000C 848A4510
>	v_mad_f32 v17, 2.0, v20, -1.0                                   ; D2820011 03CE28F4
>	v_mad_f32 v16, v18, v19, -v19                                   ; D2820010 844E2712
>	v_mac_f32_e32 v16, v17, v17                                     ; 3E202311
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	v_sub_f32_e32 v16, 0x3f8020c5, v16                              ; 082020FF 3F8020C5
>	v_mac_f32_e32 v4, v19, v21                                      ; 3E082B13
>	v_sqrt_f32_e32 v16, v16                                         ; 7E206710
>	v_mac_f32_e32 v5, v19, v22                                      ; 3E0A2D13
>	v_mac_f32_e32 v12, v19, v23                                     ; 3E182F13
>	v_mac_f32_e32 v4, v16, v28                                      ; 3E083910
>	v_mac_f32_e32 v5, v16, v29                                      ; 3E0A3B10
>	v_mac_f32_e32 v12, v16, v30                                     ; 3E183D10
>	v_cubema_f32 v16, v4, v5, v12                                   ; D28E0010 04320B04
>	v_rcp_f32_e64 v17, |v16|                                        ; D3540111 00000110
>	v_cubetc_f32 v18, v4, v5, v12                                   ; D28C0012 04320B04
>	v_mov_b32_e32 v16, 0x3fc00000                                   ; 7E2002FF 3FC00000
>	v_cubesc_f32 v19, v4, v5, v12                                   ; D28A0013 04320B04
>	v_mad_f32 v21, v17, v18, v16                                    ; D2820015 04422511
>	v_mad_f32 v20, v17, v19, v16                                    ; D2820014 04422711
>	v_mul_f32_e32 v17, v31, v4                                      ; 1022091F
>	v_mac_f32_e32 v17, v32, v5                                      ; 3E220B20
>	v_mul_f32_e32 v33, v27, v26                                     ; 1042351B
>	v_mac_f32_e32 v17, v33, v12                                     ; 3E221921
>	v_mul_f32_e32 v34, v4, v17                                      ; 10442304
>	v_mul_f32_e32 v36, v5, v17                                      ; 10482305
>	v_mul_f32_e32 v37, v12, v17                                     ; 104A230C
>	v_mac_f32_e32 v34, v4, v17                                      ; 3E442304
>	v_mac_f32_e32 v36, v5, v17                                      ; 3E482305
>	v_mac_f32_e32 v37, v12, v17                                     ; 3E4A230C
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_sub_f32_e32 v17, 1.0, v17                                     ; 082222F2
>	v_mad_f32 v19, -v24, v27, v34                                   ; D2820013 248A3718
>	v_mad_f32 v22, -v25, v27, v36                                   ; D2820016 24923719
>	v_mad_f32 v23, -v26, v27, v37                                   ; D2820017 2496371A
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                           ; C08E051C
>	v_log_f32_e32 v17, v17                                          ; 7E224F11
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                           ; C090052C
>	v_cubetc_f32 v38, v19, v22, v23                                 ; D28C0026 045E2D13
>	v_cubeid_f32 v18, v19, v22, v23                                 ; D2880012 045E2D13
>	v_cubesc_f32 v39, v19, v22, v23                                 ; D28A0027 045E2D13
>	v_cubema_f32 v22, v19, v22, v23                                 ; D28E0016 045E2D13
>	v_rcp_f32_e64 v22, |v22|                                        ; D3540116 00000116
>	v_mov_b32_e32 v19, 0x40c00000                                   ; 7E2602FF 40C00000
>	v_mul_legacy_f32_e32 v17, 0x40a00000, v17                       ; 0E2222FF 40A00000
>	s_buffer_load_dword s64, s[0:3], 0x4                            ; C2200104
>	v_mad_f32 v19, -v15, v19, v19                                   ; D2820013 244E270F
>	v_exp_f32_e32 v23, v17                                          ; 7E2E4B11
>	v_mad_f32 v17, v22, v38, v16                                    ; D2820011 04424D16
>	v_max_f32_e32 v15, 0, v15                                       ; 201E1E80
>	v_mac_f32_e32 v16, v22, v39                                     ; 3E204F16
>	s_buffer_load_dword s65, s[0:3], 0x5                            ; C2208105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v22, v4, v5, v12                                   ; D2880016 04320B04
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_mul_f32_e32 v38, v15, v23                                     ; 104C2F0F
>	image_sample v[20:23], v[20:23], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E51414
>	image_sample_l v[17:19], v[16:19], s[12:19], s[32:35] dmask:0x7 ; F0900700 01031110
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	s_buffer_load_dword s9, s[0:3], 0xc                             ; C204810C
>	s_buffer_load_dword s12, s[0:3], 0xd                            ; C206010D
>	s_buffer_load_dword s13, s[0:3], 0xe                            ; C206810E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v16, v18, v38                                     ; 10204D12
>	v_mad_f32 v18, v24, v27, -v34                                   ; D2820012 848A3718
>	v_mul_f32_e32 v15, v17, v38                                     ; 101E4D11
>	v_mul_f32_e32 v17, v19, v38                                     ; 10224D13
>	v_mul_f32_e32 v38, v23, v20                                     ; 104C2917
>	v_mul_f32_e32 v21, v23, v21                                     ; 102A2B17
>	v_mul_f32_e32 v22, v23, v22                                     ; 102C2D17
>	v_mul_f32_e32 v23, v28, v18                                     ; 102E251C
>	v_mul_f32_e32 v18, s64, v4                                      ; 10240840
>	v_mad_f32 v19, v25, v27, -v36                                   ; D2820013 84923719
>	v_mad_f32 v18, -s65, v5, -v18                                   ; D2820012 A44A0A41
>	v_mac_f32_e32 v23, v29, v19                                     ; 3E2E271D
>	v_mad_f32 v20, v26, v27, -v37                                   ; D2820014 8496371A
>	v_mul_f32_e32 v19, v35, v35                                     ; 10264723
>	v_mul_f32_e32 v24, v28, v31                                     ; 10303F1C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v18, -s8, v12, v18                                    ; D2820012 244A1808
>	v_mul_f32_e32 v25, s12, v19                                     ; 1032260C
>	v_mac_f32_e32 v23, v30, v20                                     ; 3E2E291E
>	v_mul_f32_e32 v20, s9, v19                                      ; 10282609
>	v_mul_f32_e32 v19, s13, v19                                     ; 1026260D
>	v_mac_f32_e32 v24, v29, v32                                     ; 3E30411D
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v20, v14, v20                                     ; 1028290E
>	v_mul_f32_e32 v25, v14, v25                                     ; 1032330E
>	v_mul_f32_e32 v26, v14, v19                                     ; 1034270E
>	v_mul_f32_e32 v19, v25, v18                                     ; 10262519
>	v_mul_f32_e32 v20, v20, v18                                     ; 10282514
>	v_mul_f32_e32 v25, 4.0, v14                                     ; 10321CF6
>	v_mul_f32_e32 v18, v26, v18                                     ; 1024251A
>	v_mac_f32_e32 v24, v30, v33                                     ; 3E30431E
>	v_mac_f32_e32 v18, v25, v22                                     ; 3E242D19
>	v_sub_f32_e32 v22, 1.0, v24                                     ; 082C30F2
>	v_mac_f32_e32 v19, v25, v21                                     ; 3E262B19
>	v_add_f32_e32 v21, 1.0, v23                                     ; 062A2EF2
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_subrev_f32_e32 v21, v22, v21                                  ; 0A2A2B16
>	v_add_f32_e64 v21, v21, 0 clamp                                 ; D2060815 00010115
>	v_sub_f32_e32 v22, 1.0, v21                                     ; 082C2AF2
>	v_mad_f32 v21, -v21, v22, v22                                   ; D2820015 245A2D15
>	v_mac_f32_e32 v20, v25, v38                                     ; 3E284D19
>	v_mul_f32_e32 v21, v21, v14                                     ; 102A1D15
>	v_mov_b32_e32 v22, 0xc8                                         ; 7E2C02FF 000000C8
>	v_mov_b32_e32 v23, 0                                            ; 7E2E0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v24, vcc, 0xffffffe8, v22                         ; 4A302CFF FFFFFFE8
>	buffer_load_dword v24, v24, s[0:3], 0 offen                     ; E0301000 80001818
>	v_add_i32_e32 v25, vcc, 0xffffffec, v22                         ; 4A322CFF FFFFFFEC
>	buffer_load_dword v25, v25, s[0:3], 0 offen                     ; E0301000 80001919
>	v_add_i32_e32 v26, vcc, -16, v22                                ; 4A342CD0
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_add_i32_e32 v29, vcc, -12, v22                                ; 4A3A2CCC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -8, v22                                 ; 4A3C2CC8
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v23, vcc, 1, v23                                  ; 4A2E2E81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v24, v1, v24                                   ; 0A303101
>	v_mul_f32_e32 v27, v24, v24                                     ; 10363118
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v25, v0, v25                                   ; 0A323300
>	v_mac_f32_e32 v27, v25, v25                                     ; 3E363319
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v26, v2, v26                                   ; 0A343502
>	v_mac_f32_e32 v27, v26, v26                                     ; 3E36351A
>	v_rsq_f32_e32 v28, v27                                          ; 7E385D1B
>	v_mul_f32_e32 v24, v28, v24                                     ; 1030311C
>	v_mul_f32_e32 v27, v28, v27                                     ; 1036371C
>	v_mul_f32_e32 v25, v28, v25                                     ; 1032331C
>	v_mul_f32_e32 v26, v28, v26                                     ; 1034351C
>	v_add_i32_e32 v28, vcc, -4, v22                                 ; 4A382CC4
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v27, v29, v27                                     ; 1036371D
>	buffer_load_dword v29, v22, s[0:3], 0 offen                     ; E0301000 80001D16
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_mul_f32_e32 v24, v4, v24                                      ; 10303104
>	v_mac_f32_e32 v24, v5, v25                                      ; 3E303305
>	v_add_f32_e64 v25, v27, 0 clamp                                 ; D2060819 0001011B
>	v_mac_f32_e32 v24, v12, v26                                     ; 3E30350C
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v26, -v25, v30, v30                                   ; D282001A 247A3D19
>	v_add_f32_e64 v24, v24, 0 clamp                                 ; D2060818 00010118
>	v_mul_f32_e32 v26, v14, v26                                     ; 1034350E
>	v_mac_f32_e32 v20, v26, v24                                     ; 3E28311A
>	v_add_i32_e32 v22, vcc, 32, v22                                 ; 4A2C2CA0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v27, -v25, v28, v28                                   ; D282001B 24723919
>	v_mad_f32 v25, -v25, v29, v29                                   ; D2820019 24763B19
>	v_mul_f32_e32 v27, v14, v27                                     ; 1036370E
>	v_mul_f32_e32 v25, v14, v25                                     ; 1032330E
>	v_mac_f32_e32 v19, v27, v24                                     ; 3E26311B
>	v_mac_f32_e32 v18, v25, v24                                     ; 3E243119
>	v_cmp_lt_i32_e32 vcc, 2, v23                                    ; 7D022E82
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	s_load_dwordx8 s[12:19], s[4:5], 0x60                           ; C0C60560
>	s_load_dwordx4 s[4:7], s[4:5], 0x6c                             ; C082056C
>	s_buffer_load_dword s9, s[0:3], 0x58                            ; C2048158
>	s_buffer_load_dword s8, s[0:3], 0x57                            ; C2040157
>	v_mul_f32_e32 v5, v21, v15                                      ; 100A1F15
>	v_mac_f32_e32 v5, v9, v20                                       ; 3E0A2909
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	image_sample v[22:24], v[7:8], s[12:19], s[4:7] dmask:0x7       ; F0800700 00231607
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v22                               ; 10022CFF 3E99999A
>	v_mac_f32_e32 v1, 0x3f170a3d, v23                               ; 3E022EFF 3F170A3D
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v1, 0x3de147ae, v24                               ; 3E0230FF 3DE147AE
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v1, s9, v1                                        ; 10020209
>	v_mac_f32_e32 v1, s8, v1                                        ; 3E020208
>	v_mul_f32_e32 v2, v1, v22                                       ; 10042D01
>	v_mov_b32_e32 v9, 0x42000000                                    ; 7E1202FF 42000000
>	v_mac_f32_e32 v5, v9, v2                                        ; 3E0A0509
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v8, v21, v17                                      ; 10102315
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v4, v1, v23                                       ; 10082F01
>	v_mul_f32_e32 v1, v1, v24                                       ; 10023101
>	v_mac_f32_e32 v8, v11, v18                                      ; 3E10250B
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v8, v9, v1                                        ; 3E100309
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v6, 2, 1, [m0]                              ; C8040606
>	v_mul_f32_e32 v7, v21, v16                                      ; 100E2115
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v7, v10, v19                                      ; 3E0E270A
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 2, 1, [m0]                        ; C8050603
>	v_mac_f32_e32 v7, v9, v4                                        ; 3E0E0909
>	v_mul_f32_e32 v4, v0, v1                                        ; 10080300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v4, s6, s6                                       ; D2820000 20180D04
>	v_mad_f32 v1, -v4, s7, s7                                       ; D2820001 201C0F04
>	v_mad_f32 v2, -v4, s0, s0                                       ; D2820002 20000104
>	v_mac_f32_e32 v0, v4, v5                                        ; 3E000B04
>	v_mac_f32_e32 v1, v4, v7                                        ; 3E020F04
>	v_mac_f32_e32 v2, v4, v8                                        ; 3E041104
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 72
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1668 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].x, GENERIC[2]
>DCL OUT[4].xyz, GENERIC[3]
>DCL CONST[0..230]
>DCL TEMP[0..8], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>IMM[2] FLT32 {    0.5000,     0.0000,     0.0000,     0.0000}
>  0: F2I TEMP[0], IN[3]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MOV TEMP[2].xyz, IMM[0].zzzz
>  3: MOV TEMP[2].w, CONST[4].xxxx
>  4: MOV TEMP[3].xyz, IMM[0].zzzz
>  5: MOV TEMP[3].w, CONST[4].yyyy
>  6: MOV TEMP[4].xyz, IMM[0].zzzz
>  7: MOV TEMP[4].w, CONST[4].zzzz
>  8: NOT TEMP[5].x, CONST[227].xxxx
>  9: UIF TEMP[5].xxxx :0
> 10:   ADD TEMP[5], CONST[11], -TEMP[2]
> 11:   ADD TEMP[6], CONST[12], -TEMP[3]
> 12:   ADD TEMP[7], CONST[13], -TEMP[4]
> 13: ELSE :0
> 14:   NOT TEMP[8].x, CONST[228].xxxx
> 15:   UIF TEMP[8].xxxx :0
> 16:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 17:     UARL ADDR[0].x, TEMP[8].xxxx
> 18:     UARL ADDR[0].x, TEMP[8].xxxx
> 19:     ADD TEMP[5], CONST[ADDR[0].x+11], -TEMP[2]
> 20:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 21:     UARL ADDR[0].x, TEMP[8].xxxx
> 22:     UARL ADDR[0].x, TEMP[8].xxxx
> 23:     ADD TEMP[6], CONST[ADDR[0].x+11], -TEMP[3]
> 24:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 25:     UARL ADDR[0].x, TEMP[8].xxxx
> 26:     UARL ADDR[0].x, TEMP[8].xxxx
> 27:     ADD TEMP[7], CONST[ADDR[0].x+11], -TEMP[4]
> 28:   ELSE :0
> 29:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 30:     UARL ADDR[0].x, TEMP[8].xxxx
> 31:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[2]
> 32:     MUL TEMP[5], TEMP[8], IN[2].xxxx
> 33:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 34:     UARL ADDR[0].x, TEMP[8].xxxx
> 35:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[3]
> 36:     MUL TEMP[6], TEMP[8], IN[2].xxxx
> 37:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 38:     UARL ADDR[0].x, TEMP[8].xxxx
> 39:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[4]
> 40:     MUL TEMP[7], TEMP[8], IN[2].xxxx
> 41:     UMUL TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx
> 42:     UARL ADDR[0].x, TEMP[8].xxxx
> 43:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[2]
> 44:     MAD TEMP[5], TEMP[8], IN[2].yyyy, TEMP[5]
> 45:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 46:     UARL ADDR[0].x, TEMP[8].xxxx
> 47:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[3]
> 48:     MAD TEMP[6], TEMP[8], IN[2].yyyy, TEMP[6]
> 49:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 50:     UARL ADDR[0].x, TEMP[8].xxxx
> 51:     ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[4]
> 52:     MAD TEMP[7], TEMP[8], IN[2].yyyy, TEMP[7]
> 53:     UIF CONST[229].xxxx :0
> 54:       UMUL TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx
> 55:       UARL ADDR[0].x, TEMP[8].xxxx
> 56:       ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[2]
> 57:       MAD TEMP[5], TEMP[8], IN[2].zzzz, TEMP[5]
> 58:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 59:       UARL ADDR[0].x, TEMP[8].xxxx
> 60:       ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[3]
> 61:       MAD TEMP[6], TEMP[8], IN[2].zzzz, TEMP[6]
> 62:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 63:       UARL ADDR[0].x, TEMP[8].xxxx
> 64:       ADD TEMP[8], CONST[ADDR[0].x+11], -TEMP[4]
> 65:       MAD TEMP[7], TEMP[8], IN[2].zzzz, TEMP[7]
> 66:     ENDIF
> 67:     UIF CONST[230].xxxx :0
> 68:       UMUL TEMP[8].x, TEMP[0].wwww, IMM[1].xxxx
> 69:       UARL ADDR[0].x, TEMP[8].xxxx
> 70:       ADD TEMP[2], CONST[ADDR[0].x+11], -TEMP[2]
> 71:       MAD TEMP[5], TEMP[2], IN[2].wwww, TEMP[5]
> 72:       UMAD TEMP[2].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 73:       UARL ADDR[0].x, TEMP[2].xxxx
> 74:       ADD TEMP[2], CONST[ADDR[0].x+11], -TEMP[3]
> 75:       MAD TEMP[6], TEMP[2], IN[2].wwww, TEMP[6]
> 76:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 77:       UARL ADDR[0].x, TEMP[0].xxxx
> 78:       ADD TEMP[0], CONST[ADDR[0].x+11], -TEMP[4]
> 79:       MAD TEMP[7], TEMP[0], IN[2].wwww, TEMP[7]
> 80:     ENDIF
> 81:   ENDIF
> 82: ENDIF
> 83: DP4 TEMP[0].x, IN[0], TEMP[5]
> 84: DP4 TEMP[2].x, IN[0], TEMP[6]
> 85: MOV TEMP[0].y, TEMP[2].xxxx
> 86: DP4 TEMP[2].x, IN[0], TEMP[7]
> 87: MOV TEMP[0].z, TEMP[2].xxxx
> 88: DP4 TEMP[2].x, IN[0], IMM[0].zzzw
> 89: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 90: MUL TEMP[3], CONST[0], TEMP[0].xxxx
> 91: MAD TEMP[3], CONST[1], TEMP[0].yyyy, TEMP[3]
> 92: MAD TEMP[3], CONST[2], TEMP[0].zzzz, TEMP[3]
> 93: MAD TEMP[2], CONST[3], TEMP[2].xxxx, TEMP[3]
> 94: MOV TEMP[3].xyz, TEMP[0].xyzx
> 95: MUL TEMP[4].x, TEMP[2].wwww, CONST[6].wwww
> 96: MOV TEMP[3].w, TEMP[4].xxxx
> 97: MOV TEMP[4].x, CONST[7].wwww
> 98: MOV TEMP[4].y, CONST[8].wwww
> 99: MOV TEMP[4].z, CONST[9].wwww
>100: ADD TEMP[0].xyz, TEMP[0].xyzz, -TEMP[4].xyzz
>101: MUL TEMP[4].xyz, CONST[7].xyzz, TEMP[0].xxxx
>102: MAD TEMP[4].xyz, CONST[8].xyzz, TEMP[0].yyyy, TEMP[4].xyzz
>103: MAD TEMP[0].xyz, CONST[9].xyzz, TEMP[0].zzzz, TEMP[4].xyzz
>104: MOV TEMP[4].w, TEMP[0].zzzz
>105: MUL TEMP[8].xy, TEMP[0].xyyy, CONST[10].xyyy
>106: MAD TEMP[4].xy, IMM[2].xxxx, TEMP[0].zzzz, TEMP[8].xyyy
>107: MAD TEMP[0].x, TEMP[0].zzzz, CONST[10].zzzz, CONST[10].wwww
>108: MOV TEMP[4].z, TEMP[0].xxxx
>109: MAD TEMP[0].x, TEMP[2].zzzz, CONST[5].yyyy, CONST[5].xxxx
>110: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>111: POW TEMP[0].x, TEMP[0].xxxx, CONST[5].zzzz
>112: ADD TEMP[8].x, IMM[0].wwww, -CONST[5].wwww
>113: MAD TEMP[0].x, CONST[5].wwww, TEMP[0].xxxx, TEMP[8].xxxx
>114: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[5].xyzz
>115: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[6].xyzz
>116: MOV TEMP[5].y, TEMP[6].xxxx
>117: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[7].xyzz
>118: MOV TEMP[5].z, TEMP[1].xxxx
>119: MUL TEMP[0].x, TEMP[0].xxxx, TEMP[0].xxxx
>120: MOV OUT[1], TEMP[3]
>121: MOV OUT[3].x, TEMP[0].xxxx
>122: MOV OUT[0], TEMP[2]
>123: MOV OUT[4].xyz, TEMP[5].xyzx
>124: MOV OUT[2], TEMP[4]
>125: END
>radeonsi: Compiling shader 123
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %18 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %19 = load <16 x i8>, <16 x i8> addrspace(2)* %18, align 16, !invariant.load !0
>  %20 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %19, i32 0, i32 %14)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = extractelement <4 x float> %20, i32 1
>  %23 = extractelement <4 x float> %20, i32 2
>  %24 = extractelement <4 x float> %20, i32 3
>  %25 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, align 16, !invariant.load !0
>  %27 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %26, i32 0, i32 %15)
>  %28 = extractelement <4 x float> %27, i32 0
>  %29 = extractelement <4 x float> %27, i32 1
>  %30 = extractelement <4 x float> %27, i32 2
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %39, i32 0, i32 %17)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fptosi float %41 to i32
>  %46 = fptosi float %42 to i32
>  %47 = fptosi float %43 to i32
>  %48 = fptosi float %44 to i32
>  %49 = fmul float %28, 2.000000e+00
>  %50 = fadd float %49, -1.000000e+00
>  %51 = fmul float %29, 2.000000e+00
>  %52 = fadd float %51, -1.000000e+00
>  %53 = fmul float %30, 2.000000e+00
>  %54 = fadd float %53, -1.000000e+00
>  %55 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %56 = load <16 x i8>, <16 x i8> addrspace(2)* %55, align 16, !invariant.load !0
>  %57 = call float @llvm.SI.load.const(<16 x i8> %56, i32 64)
>  %58 = call float @llvm.SI.load.const(<16 x i8> %56, i32 68)
>  %59 = call float @llvm.SI.load.const(<16 x i8> %56, i32 72)
>  %60 = call float @llvm.SI.load.const(<16 x i8> %56, i32 3632)
>  %61 = bitcast float %60 to i32
>  %62 = icmp eq i32 %61, -1
>  %63 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %64 = load <16 x i8>, <16 x i8> addrspace(2)* %63, align 16, !invariant.load !0
>  br i1 %62, label %else13, label %if9
>
>if9:                                              ; preds = %main_body
>  %65 = call float @llvm.SI.load.const(<16 x i8> %64, i32 176)
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 180)
>  %69 = call float @llvm.SI.load.const(<16 x i8> %67, i32 184)
>  %70 = call float @llvm.SI.load.const(<16 x i8> %67, i32 188)
>  %71 = fsub float %70, %57
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 192)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 196)
>  %76 = call float @llvm.SI.load.const(<16 x i8> %74, i32 200)
>  %77 = call float @llvm.SI.load.const(<16 x i8> %74, i32 204)
>  %78 = fsub float %77, %58
>  %79 = call float @llvm.SI.load.const(<16 x i8> %74, i32 208)
>  %80 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !invariant.load !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 212)
>  %83 = call float @llvm.SI.load.const(<16 x i8> %81, i32 216)
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 220)
>  %85 = fsub float %84, %59
>  br label %endif82
>
>else13:                                           ; preds = %main_body
>  %86 = call float @llvm.SI.load.const(<16 x i8> %64, i32 3648)
>  %87 = bitcast float %86 to i32
>  %88 = icmp eq i32 %87, -1
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = mul i32 %45, 48
>  %92 = add i32 %91, 176
>  %93 = call float @llvm.SI.load.const(<16 x i8> %90, i32 %92)
>  %94 = mul i32 %45, 48
>  %95 = add i32 %94, 180
>  %96 = call float @llvm.SI.load.const(<16 x i8> %90, i32 %95)
>  %97 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %98 = load <16 x i8>, <16 x i8> addrspace(2)* %97, align 16, !invariant.load !0
>  %99 = mul i32 %45, 48
>  %100 = add i32 %99, 184
>  %101 = call float @llvm.SI.load.const(<16 x i8> %98, i32 %100)
>  %102 = mul i32 %45, 48
>  %103 = add i32 %102, 188
>  %104 = call float @llvm.SI.load.const(<16 x i8> %98, i32 %103)
>  %105 = fsub float %104, %57
>  br i1 %88, label %else28, label %if15
>
>if15:                                             ; preds = %else13
>  %106 = mul i32 %45, 3
>  %107 = add i32 %106, 1
>  %108 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %109 = load <16 x i8>, <16 x i8> addrspace(2)* %108, align 16, !invariant.load !0
>  %110 = shl i32 %107, 4
>  %111 = add i32 %110, 176
>  %112 = call float @llvm.SI.load.const(<16 x i8> %109, i32 %111)
>  %113 = shl i32 %107, 4
>  %114 = add i32 %113, 180
>  %115 = call float @llvm.SI.load.const(<16 x i8> %109, i32 %114)
>  %116 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %117 = load <16 x i8>, <16 x i8> addrspace(2)* %116, align 16, !invariant.load !0
>  %118 = shl i32 %107, 4
>  %119 = add i32 %118, 184
>  %120 = call float @llvm.SI.load.const(<16 x i8> %117, i32 %119)
>  %121 = shl i32 %107, 4
>  %122 = add i32 %121, 188
>  %123 = call float @llvm.SI.load.const(<16 x i8> %117, i32 %122)
>  %124 = fsub float %123, %58
>  %125 = mul i32 %45, 3
>  %126 = add i32 %125, 2
>  %127 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %128 = load <16 x i8>, <16 x i8> addrspace(2)* %127, align 16, !invariant.load !0
>  %129 = shl i32 %126, 4
>  %130 = add i32 %129, 176
>  %131 = call float @llvm.SI.load.const(<16 x i8> %128, i32 %130)
>  %132 = shl i32 %126, 4
>  %133 = add i32 %132, 180
>  %134 = call float @llvm.SI.load.const(<16 x i8> %128, i32 %133)
>  %135 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %136 = load <16 x i8>, <16 x i8> addrspace(2)* %135, align 16, !invariant.load !0
>  %137 = shl i32 %126, 4
>  %138 = add i32 %137, 184
>  %139 = call float @llvm.SI.load.const(<16 x i8> %136, i32 %138)
>  %140 = shl i32 %126, 4
>  %141 = add i32 %140, 188
>  %142 = call float @llvm.SI.load.const(<16 x i8> %136, i32 %141)
>  %143 = fsub float %142, %59
>  br label %endif82
>
>else28:                                           ; preds = %else13
>  %144 = fmul float %93, %34
>  %145 = fmul float %96, %34
>  %146 = fmul float %101, %34
>  %147 = fmul float %105, %34
>  %148 = mul i32 %45, 3
>  %149 = add i32 %148, 1
>  %150 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %151 = load <16 x i8>, <16 x i8> addrspace(2)* %150, align 16, !invariant.load !0
>  %152 = shl i32 %149, 4
>  %153 = add i32 %152, 176
>  %154 = call float @llvm.SI.load.const(<16 x i8> %151, i32 %153)
>  %155 = shl i32 %149, 4
>  %156 = add i32 %155, 180
>  %157 = call float @llvm.SI.load.const(<16 x i8> %151, i32 %156)
>  %158 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %159 = load <16 x i8>, <16 x i8> addrspace(2)* %158, align 16, !invariant.load !0
>  %160 = shl i32 %149, 4
>  %161 = add i32 %160, 184
>  %162 = call float @llvm.SI.load.const(<16 x i8> %159, i32 %161)
>  %163 = shl i32 %149, 4
>  %164 = add i32 %163, 188
>  %165 = call float @llvm.SI.load.const(<16 x i8> %159, i32 %164)
>  %166 = fsub float %165, %58
>  %167 = fmul float %154, %34
>  %168 = fmul float %157, %34
>  %169 = fmul float %162, %34
>  %170 = fmul float %166, %34
>  %171 = mul i32 %45, 3
>  %172 = add i32 %171, 2
>  %173 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %174 = load <16 x i8>, <16 x i8> addrspace(2)* %173, align 16, !invariant.load !0
>  %175 = shl i32 %172, 4
>  %176 = add i32 %175, 176
>  %177 = call float @llvm.SI.load.const(<16 x i8> %174, i32 %176)
>  %178 = shl i32 %172, 4
>  %179 = add i32 %178, 180
>  %180 = call float @llvm.SI.load.const(<16 x i8> %174, i32 %179)
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = shl i32 %172, 4
>  %184 = add i32 %183, 184
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %184)
>  %186 = shl i32 %172, 4
>  %187 = add i32 %186, 188
>  %188 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %187)
>  %189 = fsub float %188, %59
>  %190 = fmul float %177, %34
>  %191 = fmul float %180, %34
>  %192 = fmul float %185, %34
>  %193 = fmul float %189, %34
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = mul i32 %46, 48
>  %197 = add i32 %196, 176
>  %198 = call float @llvm.SI.load.const(<16 x i8> %195, i32 %197)
>  %199 = mul i32 %46, 48
>  %200 = add i32 %199, 180
>  %201 = call float @llvm.SI.load.const(<16 x i8> %195, i32 %200)
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = mul i32 %46, 48
>  %205 = add i32 %204, 184
>  %206 = call float @llvm.SI.load.const(<16 x i8> %203, i32 %205)
>  %207 = mul i32 %46, 48
>  %208 = add i32 %207, 188
>  %209 = call float @llvm.SI.load.const(<16 x i8> %203, i32 %208)
>  %210 = fsub float %209, %57
>  %211 = fmul float %198, %35
>  %212 = fadd float %211, %144
>  %213 = fmul float %201, %35
>  %214 = fadd float %213, %145
>  %215 = fmul float %206, %35
>  %216 = fadd float %215, %146
>  %217 = fmul float %210, %35
>  %218 = fadd float %217, %147
>  %219 = mul i32 %46, 3
>  %220 = add i32 %219, 1
>  %221 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %222 = load <16 x i8>, <16 x i8> addrspace(2)* %221, align 16, !invariant.load !0
>  %223 = shl i32 %220, 4
>  %224 = add i32 %223, 176
>  %225 = call float @llvm.SI.load.const(<16 x i8> %222, i32 %224)
>  %226 = shl i32 %220, 4
>  %227 = add i32 %226, 180
>  %228 = call float @llvm.SI.load.const(<16 x i8> %222, i32 %227)
>  %229 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %230 = load <16 x i8>, <16 x i8> addrspace(2)* %229, align 16, !invariant.load !0
>  %231 = shl i32 %220, 4
>  %232 = add i32 %231, 184
>  %233 = call float @llvm.SI.load.const(<16 x i8> %230, i32 %232)
>  %234 = shl i32 %220, 4
>  %235 = add i32 %234, 188
>  %236 = call float @llvm.SI.load.const(<16 x i8> %230, i32 %235)
>  %237 = fsub float %236, %58
>  %238 = fmul float %225, %35
>  %239 = fadd float %238, %167
>  %240 = fmul float %228, %35
>  %241 = fadd float %240, %168
>  %242 = fmul float %233, %35
>  %243 = fadd float %242, %169
>  %244 = fmul float %237, %35
>  %245 = fadd float %244, %170
>  %246 = mul i32 %46, 3
>  %247 = add i32 %246, 2
>  %248 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %249 = load <16 x i8>, <16 x i8> addrspace(2)* %248, align 16, !invariant.load !0
>  %250 = shl i32 %247, 4
>  %251 = add i32 %250, 176
>  %252 = call float @llvm.SI.load.const(<16 x i8> %249, i32 %251)
>  %253 = shl i32 %247, 4
>  %254 = add i32 %253, 180
>  %255 = call float @llvm.SI.load.const(<16 x i8> %249, i32 %254)
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = shl i32 %247, 4
>  %259 = add i32 %258, 184
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 %259)
>  %261 = shl i32 %247, 4
>  %262 = add i32 %261, 188
>  %263 = call float @llvm.SI.load.const(<16 x i8> %257, i32 %262)
>  %264 = fsub float %263, %59
>  %265 = fmul float %252, %35
>  %266 = fadd float %265, %190
>  %267 = fmul float %255, %35
>  %268 = fadd float %267, %191
>  %269 = fmul float %260, %35
>  %270 = fadd float %269, %192
>  %271 = fmul float %264, %35
>  %272 = fadd float %271, %193
>  %273 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %274 = load <16 x i8>, <16 x i8> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = call float @llvm.SI.load.const(<16 x i8> %274, i32 3664)
>  %276 = bitcast float %275 to i32
>  %277 = icmp eq i32 %276, 0
>  br i1 %277, label %endif66, label %if53
>
>if53:                                             ; preds = %else28
>  %278 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %279 = load <16 x i8>, <16 x i8> addrspace(2)* %278, align 16, !invariant.load !0
>  %280 = mul i32 %47, 48
>  %281 = add i32 %280, 176
>  %282 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %281)
>  %283 = mul i32 %47, 48
>  %284 = add i32 %283, 180
>  %285 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %284)
>  %286 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %287 = load <16 x i8>, <16 x i8> addrspace(2)* %286, align 16, !invariant.load !0
>  %288 = mul i32 %47, 48
>  %289 = add i32 %288, 184
>  %290 = call float @llvm.SI.load.const(<16 x i8> %287, i32 %289)
>  %291 = mul i32 %47, 48
>  %292 = add i32 %291, 188
>  %293 = call float @llvm.SI.load.const(<16 x i8> %287, i32 %292)
>  %294 = fsub float %293, %57
>  %295 = fmul float %282, %36
>  %296 = fadd float %295, %212
>  %297 = fmul float %285, %36
>  %298 = fadd float %297, %214
>  %299 = fmul float %290, %36
>  %300 = fadd float %299, %216
>  %301 = fmul float %294, %36
>  %302 = fadd float %301, %218
>  %303 = mul i32 %47, 3
>  %304 = add i32 %303, 1
>  %305 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %306 = load <16 x i8>, <16 x i8> addrspace(2)* %305, align 16, !invariant.load !0
>  %307 = shl i32 %304, 4
>  %308 = add i32 %307, 176
>  %309 = call float @llvm.SI.load.const(<16 x i8> %306, i32 %308)
>  %310 = shl i32 %304, 4
>  %311 = add i32 %310, 180
>  %312 = call float @llvm.SI.load.const(<16 x i8> %306, i32 %311)
>  %313 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %314 = load <16 x i8>, <16 x i8> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = shl i32 %304, 4
>  %316 = add i32 %315, 184
>  %317 = call float @llvm.SI.load.const(<16 x i8> %314, i32 %316)
>  %318 = shl i32 %304, 4
>  %319 = add i32 %318, 188
>  %320 = call float @llvm.SI.load.const(<16 x i8> %314, i32 %319)
>  %321 = fsub float %320, %58
>  %322 = fmul float %309, %36
>  %323 = fadd float %322, %239
>  %324 = fmul float %312, %36
>  %325 = fadd float %324, %241
>  %326 = fmul float %317, %36
>  %327 = fadd float %326, %243
>  %328 = fmul float %321, %36
>  %329 = fadd float %328, %245
>  %330 = mul i32 %47, 3
>  %331 = add i32 %330, 2
>  %332 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %333 = load <16 x i8>, <16 x i8> addrspace(2)* %332, align 16, !invariant.load !0
>  %334 = shl i32 %331, 4
>  %335 = add i32 %334, 176
>  %336 = call float @llvm.SI.load.const(<16 x i8> %333, i32 %335)
>  %337 = shl i32 %331, 4
>  %338 = add i32 %337, 180
>  %339 = call float @llvm.SI.load.const(<16 x i8> %333, i32 %338)
>  %340 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %341 = load <16 x i8>, <16 x i8> addrspace(2)* %340, align 16, !invariant.load !0
>  %342 = shl i32 %331, 4
>  %343 = add i32 %342, 184
>  %344 = call float @llvm.SI.load.const(<16 x i8> %341, i32 %343)
>  %345 = shl i32 %331, 4
>  %346 = add i32 %345, 188
>  %347 = call float @llvm.SI.load.const(<16 x i8> %341, i32 %346)
>  %348 = fsub float %347, %59
>  %349 = fmul float %336, %36
>  %350 = fadd float %349, %266
>  %351 = fmul float %339, %36
>  %352 = fadd float %351, %268
>  %353 = fmul float %344, %36
>  %354 = fadd float %353, %270
>  %355 = fmul float %348, %36
>  %356 = fadd float %355, %272
>  br label %endif66
>
>endif66:                                          ; preds = %else28, %if53
>  %.0101 = phi float [ %296, %if53 ], [ %212, %else28 ]
>  %.097 = phi float [ %298, %if53 ], [ %214, %else28 ]
>  %.093 = phi float [ %300, %if53 ], [ %216, %else28 ]
>  %.089 = phi float [ %302, %if53 ], [ %218, %else28 ]
>  %.085 = phi float [ %323, %if53 ], [ %239, %else28 ]
>  %.081 = phi float [ %325, %if53 ], [ %241, %else28 ]
>  %.077 = phi float [ %327, %if53 ], [ %243, %else28 ]
>  %.073 = phi float [ %329, %if53 ], [ %245, %else28 ]
>  %.069 = phi float [ %350, %if53 ], [ %266, %else28 ]
>  %.065 = phi float [ %352, %if53 ], [ %268, %else28 ]
>  %.061 = phi float [ %354, %if53 ], [ %270, %else28 ]
>  %.0 = phi float [ %356, %if53 ], [ %272, %else28 ]
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = call float @llvm.SI.load.const(<16 x i8> %358, i32 3680)
>  %360 = bitcast float %359 to i32
>  %361 = icmp eq i32 %360, 0
>  br i1 %361, label %endif82, label %if67
>
>if67:                                             ; preds = %endif66
>  %362 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %363 = load <16 x i8>, <16 x i8> addrspace(2)* %362, align 16, !invariant.load !0
>  %364 = mul i32 %48, 48
>  %365 = add i32 %364, 176
>  %366 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %365)
>  %367 = mul i32 %48, 48
>  %368 = add i32 %367, 180
>  %369 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %368)
>  %370 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %371 = load <16 x i8>, <16 x i8> addrspace(2)* %370, align 16, !invariant.load !0
>  %372 = mul i32 %48, 48
>  %373 = add i32 %372, 184
>  %374 = call float @llvm.SI.load.const(<16 x i8> %371, i32 %373)
>  %375 = mul i32 %48, 48
>  %376 = add i32 %375, 188
>  %377 = call float @llvm.SI.load.const(<16 x i8> %371, i32 %376)
>  %378 = fsub float %377, %57
>  %379 = fmul float %366, %37
>  %380 = fadd float %379, %.0101
>  %381 = fmul float %369, %37
>  %382 = fadd float %381, %.097
>  %383 = fmul float %374, %37
>  %384 = fadd float %383, %.093
>  %385 = fmul float %378, %37
>  %386 = fadd float %385, %.089
>  %387 = mul i32 %48, 3
>  %388 = add i32 %387, 1
>  %389 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %390 = load <16 x i8>, <16 x i8> addrspace(2)* %389, align 16, !invariant.load !0
>  %391 = shl i32 %388, 4
>  %392 = add i32 %391, 176
>  %393 = call float @llvm.SI.load.const(<16 x i8> %390, i32 %392)
>  %394 = shl i32 %388, 4
>  %395 = add i32 %394, 180
>  %396 = call float @llvm.SI.load.const(<16 x i8> %390, i32 %395)
>  %397 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %398 = load <16 x i8>, <16 x i8> addrspace(2)* %397, align 16, !invariant.load !0
>  %399 = shl i32 %388, 4
>  %400 = add i32 %399, 184
>  %401 = call float @llvm.SI.load.const(<16 x i8> %398, i32 %400)
>  %402 = shl i32 %388, 4
>  %403 = add i32 %402, 188
>  %404 = call float @llvm.SI.load.const(<16 x i8> %398, i32 %403)
>  %405 = fsub float %404, %58
>  %406 = fmul float %393, %37
>  %407 = fadd float %406, %.085
>  %408 = fmul float %396, %37
>  %409 = fadd float %408, %.081
>  %410 = fmul float %401, %37
>  %411 = fadd float %410, %.077
>  %412 = fmul float %405, %37
>  %413 = fadd float %412, %.073
>  %414 = mul i32 %48, 3
>  %415 = add i32 %414, 2
>  %416 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %417 = load <16 x i8>, <16 x i8> addrspace(2)* %416, align 16, !invariant.load !0
>  %418 = shl i32 %415, 4
>  %419 = add i32 %418, 176
>  %420 = call float @llvm.SI.load.const(<16 x i8> %417, i32 %419)
>  %421 = shl i32 %415, 4
>  %422 = add i32 %421, 180
>  %423 = call float @llvm.SI.load.const(<16 x i8> %417, i32 %422)
>  %424 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %425 = load <16 x i8>, <16 x i8> addrspace(2)* %424, align 16, !invariant.load !0
>  %426 = shl i32 %415, 4
>  %427 = add i32 %426, 184
>  %428 = call float @llvm.SI.load.const(<16 x i8> %425, i32 %427)
>  %429 = shl i32 %415, 4
>  %430 = add i32 %429, 188
>  %431 = call float @llvm.SI.load.const(<16 x i8> %425, i32 %430)
>  %432 = fsub float %431, %59
>  %433 = fmul float %420, %37
>  %434 = fadd float %433, %.069
>  %435 = fmul float %423, %37
>  %436 = fadd float %435, %.065
>  %437 = fmul float %428, %37
>  %438 = fadd float %437, %.061
>  %439 = fmul float %432, %37
>  %440 = fadd float %439, %.0
>  br label %endif82
>
>endif82:                                          ; preds = %endif66, %if15, %if67, %if9
>  %.3104 = phi float [ %65, %if9 ], [ %93, %if15 ], [ %380, %if67 ], [ %.0101, %endif66 ]
>  %.3100 = phi float [ %68, %if9 ], [ %96, %if15 ], [ %382, %if67 ], [ %.097, %endif66 ]
>  %.396 = phi float [ %69, %if9 ], [ %101, %if15 ], [ %384, %if67 ], [ %.093, %endif66 ]
>  %.392 = phi float [ %71, %if9 ], [ %105, %if15 ], [ %386, %if67 ], [ %.089, %endif66 ]
>  %.388 = phi float [ %72, %if9 ], [ %112, %if15 ], [ %407, %if67 ], [ %.085, %endif66 ]
>  %.384 = phi float [ %75, %if9 ], [ %115, %if15 ], [ %409, %if67 ], [ %.081, %endif66 ]
>  %.380 = phi float [ %76, %if9 ], [ %120, %if15 ], [ %411, %if67 ], [ %.077, %endif66 ]
>  %.376 = phi float [ %78, %if9 ], [ %124, %if15 ], [ %413, %if67 ], [ %.073, %endif66 ]
>  %.372 = phi float [ %79, %if9 ], [ %131, %if15 ], [ %434, %if67 ], [ %.069, %endif66 ]
>  %.368 = phi float [ %82, %if9 ], [ %134, %if15 ], [ %436, %if67 ], [ %.065, %endif66 ]
>  %.364 = phi float [ %83, %if9 ], [ %139, %if15 ], [ %438, %if67 ], [ %.061, %endif66 ]
>  %.3 = phi float [ %85, %if9 ], [ %143, %if15 ], [ %440, %if67 ], [ %.0, %endif66 ]
>  %441 = fmul float %21, %.3104
>  %442 = fmul float %22, %.3100
>  %443 = fadd float %441, %442
>  %444 = fmul float %23, %.396
>  %445 = fadd float %443, %444
>  %446 = fmul float %24, %.392
>  %447 = fadd float %445, %446
>  %448 = fmul float %21, %.388
>  %449 = fmul float %22, %.384
>  %450 = fadd float %448, %449
>  %451 = fmul float %23, %.380
>  %452 = fadd float %450, %451
>  %453 = fmul float %24, %.376
>  %454 = fadd float %452, %453
>  %455 = fmul float %21, %.372
>  %456 = fmul float %22, %.368
>  %457 = fadd float %455, %456
>  %458 = fmul float %23, %.364
>  %459 = fadd float %457, %458
>  %460 = fmul float %24, %.3
>  %461 = fadd float %459, %460
>  %462 = fmul float %21, 0.000000e+00
>  %463 = fmul float %22, 0.000000e+00
>  %464 = fadd float %462, %463
>  %465 = fmul float %23, 0.000000e+00
>  %466 = fadd float %464, %465
>  %467 = fadd float %466, %24
>  %468 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %469 = load <16 x i8>, <16 x i8> addrspace(2)* %468, align 16, !invariant.load !0
>  %470 = call float @llvm.SI.load.const(<16 x i8> %469, i32 64)
>  %471 = fadd float %447, %470
>  %472 = call float @llvm.SI.load.const(<16 x i8> %469, i32 68)
>  %473 = fadd float %454, %472
>  %474 = call float @llvm.SI.load.const(<16 x i8> %469, i32 72)
>  %475 = fadd float %461, %474
>  %476 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %477 = load <16 x i8>, <16 x i8> addrspace(2)* %476, align 16, !invariant.load !0
>  %478 = call float @llvm.SI.load.const(<16 x i8> %477, i32 0)
>  %479 = fmul float %478, %471
>  %480 = call float @llvm.SI.load.const(<16 x i8> %477, i32 4)
>  %481 = fmul float %480, %471
>  %482 = call float @llvm.SI.load.const(<16 x i8> %477, i32 8)
>  %483 = fmul float %482, %471
>  %484 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %485 = load <16 x i8>, <16 x i8> addrspace(2)* %484, align 16, !invariant.load !0
>  %486 = call float @llvm.SI.load.const(<16 x i8> %485, i32 12)
>  %487 = fmul float %486, %471
>  %488 = call float @llvm.SI.load.const(<16 x i8> %485, i32 16)
>  %489 = fmul float %488, %473
>  %490 = fadd float %489, %479
>  %491 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %492 = load <16 x i8>, <16 x i8> addrspace(2)* %491, align 16, !invariant.load !0
>  %493 = call float @llvm.SI.load.const(<16 x i8> %492, i32 20)
>  %494 = fmul float %493, %473
>  %495 = fadd float %494, %481
>  %496 = call float @llvm.SI.load.const(<16 x i8> %492, i32 24)
>  %497 = fmul float %496, %473
>  %498 = fadd float %497, %483
>  %499 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %500 = load <16 x i8>, <16 x i8> addrspace(2)* %499, align 16, !invariant.load !0
>  %501 = call float @llvm.SI.load.const(<16 x i8> %500, i32 28)
>  %502 = fmul float %501, %473
>  %503 = fadd float %502, %487
>  %504 = call float @llvm.SI.load.const(<16 x i8> %500, i32 32)
>  %505 = fmul float %504, %475
>  %506 = fadd float %505, %490
>  %507 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %508 = load <16 x i8>, <16 x i8> addrspace(2)* %507, align 16, !invariant.load !0
>  %509 = call float @llvm.SI.load.const(<16 x i8> %508, i32 36)
>  %510 = fmul float %509, %475
>  %511 = fadd float %510, %495
>  %512 = call float @llvm.SI.load.const(<16 x i8> %508, i32 40)
>  %513 = fmul float %512, %475
>  %514 = fadd float %513, %498
>  %515 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %516 = load <16 x i8>, <16 x i8> addrspace(2)* %515, align 16, !invariant.load !0
>  %517 = call float @llvm.SI.load.const(<16 x i8> %516, i32 44)
>  %518 = fmul float %517, %475
>  %519 = fadd float %518, %503
>  %520 = call float @llvm.SI.load.const(<16 x i8> %516, i32 48)
>  %521 = fmul float %520, %467
>  %522 = fadd float %521, %506
>  %523 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %524 = load <16 x i8>, <16 x i8> addrspace(2)* %523, align 16, !invariant.load !0
>  %525 = call float @llvm.SI.load.const(<16 x i8> %524, i32 52)
>  %526 = fmul float %525, %467
>  %527 = fadd float %526, %511
>  %528 = call float @llvm.SI.load.const(<16 x i8> %524, i32 56)
>  %529 = fmul float %528, %467
>  %530 = fadd float %529, %514
>  %531 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %532 = load <16 x i8>, <16 x i8> addrspace(2)* %531, align 16, !invariant.load !0
>  %533 = call float @llvm.SI.load.const(<16 x i8> %532, i32 60)
>  %534 = fmul float %533, %467
>  %535 = fadd float %534, %519
>  %536 = call float @llvm.SI.load.const(<16 x i8> %532, i32 108)
>  %537 = fmul float %535, %536
>  %538 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %539 = load <16 x i8>, <16 x i8> addrspace(2)* %538, align 16, !invariant.load !0
>  %540 = call float @llvm.SI.load.const(<16 x i8> %539, i32 124)
>  %541 = call float @llvm.SI.load.const(<16 x i8> %539, i32 140)
>  %542 = call float @llvm.SI.load.const(<16 x i8> %539, i32 156)
>  %543 = fsub float %471, %540
>  %544 = fsub float %473, %541
>  %545 = fsub float %475, %542
>  %546 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %547 = load <16 x i8>, <16 x i8> addrspace(2)* %546, align 16, !invariant.load !0
>  %548 = call float @llvm.SI.load.const(<16 x i8> %547, i32 112)
>  %549 = fmul float %548, %543
>  %550 = call float @llvm.SI.load.const(<16 x i8> %547, i32 116)
>  %551 = fmul float %550, %543
>  %552 = call float @llvm.SI.load.const(<16 x i8> %547, i32 120)
>  %553 = fmul float %552, %543
>  %554 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %555 = load <16 x i8>, <16 x i8> addrspace(2)* %554, align 16, !invariant.load !0
>  %556 = call float @llvm.SI.load.const(<16 x i8> %555, i32 128)
>  %557 = fmul float %556, %544
>  %558 = fadd float %557, %549
>  %559 = call float @llvm.SI.load.const(<16 x i8> %555, i32 132)
>  %560 = fmul float %559, %544
>  %561 = fadd float %560, %551
>  %562 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %563 = load <16 x i8>, <16 x i8> addrspace(2)* %562, align 16, !invariant.load !0
>  %564 = call float @llvm.SI.load.const(<16 x i8> %563, i32 136)
>  %565 = fmul float %564, %544
>  %566 = fadd float %565, %553
>  %567 = call float @llvm.SI.load.const(<16 x i8> %563, i32 144)
>  %568 = fmul float %567, %545
>  %569 = fadd float %568, %558
>  %570 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %571 = load <16 x i8>, <16 x i8> addrspace(2)* %570, align 16, !invariant.load !0
>  %572 = call float @llvm.SI.load.const(<16 x i8> %571, i32 148)
>  %573 = fmul float %572, %545
>  %574 = fadd float %573, %561
>  %575 = call float @llvm.SI.load.const(<16 x i8> %571, i32 152)
>  %576 = fmul float %575, %545
>  %577 = fadd float %576, %566
>  %578 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %579 = load <16 x i8>, <16 x i8> addrspace(2)* %578, align 16, !invariant.load !0
>  %580 = call float @llvm.SI.load.const(<16 x i8> %579, i32 160)
>  %581 = fmul float %569, %580
>  %582 = call float @llvm.SI.load.const(<16 x i8> %579, i32 164)
>  %583 = fmul float %574, %582
>  %584 = fmul float %577, 5.000000e-01
>  %585 = fadd float %584, %581
>  %586 = fmul float %577, 5.000000e-01
>  %587 = fadd float %586, %583
>  %588 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %589 = load <16 x i8>, <16 x i8> addrspace(2)* %588, align 16, !invariant.load !0
>  %590 = call float @llvm.SI.load.const(<16 x i8> %589, i32 168)
>  %591 = call float @llvm.SI.load.const(<16 x i8> %589, i32 172)
>  %592 = fmul float %577, %590
>  %593 = fadd float %592, %591
>  %594 = call float @llvm.SI.load.const(<16 x i8> %589, i32 84)
>  %595 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %596 = load <16 x i8>, <16 x i8> addrspace(2)* %595, align 16, !invariant.load !0
>  %597 = call float @llvm.SI.load.const(<16 x i8> %596, i32 80)
>  %598 = fmul float %530, %594
>  %599 = fadd float %598, %597
>  %600 = call float @llvm.AMDGPU.clamp.(float %599, float 0.000000e+00, float 1.000000e+00)
>  %601 = call float @llvm.SI.load.const(<16 x i8> %596, i32 88)
>  %602 = call float @llvm.pow.f32(float %600, float %601)
>  %603 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %604 = load <16 x i8>, <16 x i8> addrspace(2)* %603, align 16, !invariant.load !0
>  %605 = call float @llvm.SI.load.const(<16 x i8> %604, i32 92)
>  %606 = fsub float 1.000000e+00, %605
>  %607 = call float @llvm.SI.load.const(<16 x i8> %604, i32 92)
>  %608 = fmul float %607, %602
>  %609 = fadd float %608, %606
>  %610 = fmul float %50, %.3104
>  %611 = fmul float %52, %.3100
>  %612 = fadd float %611, %610
>  %613 = fmul float %54, %.396
>  %614 = fadd float %612, %613
>  %615 = fmul float %50, %.388
>  %616 = fmul float %52, %.384
>  %617 = fadd float %616, %615
>  %618 = fmul float %54, %.380
>  %619 = fadd float %617, %618
>  %620 = fmul float %50, %.372
>  %621 = fmul float %52, %.368
>  %622 = fadd float %621, %620
>  %623 = fmul float %54, %.364
>  %624 = fadd float %622, %623
>  %625 = fmul float %609, %609
>  %626 = bitcast i32 %12 to float
>  %627 = insertvalue <{ float, float, float }> undef, float %626, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %471, float %473, float %475, float %537)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %585, float %587, float %593, float %577)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %625, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %614, float %619, float %624, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %522, float %527, float %530, float %535)
>  ret <{ float, float, float }> %627
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3].xyz, GENERIC[3], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..21]
>DCL CONST[23..28]
>DCL TEMP[0..56], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,     1.3000,     1.8500}
>IMM[1] FLT32 {   -0.0000,    -0.3000,     0.8000,     1.0000}
>IMM[2] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[3] FLT32 {    0.3333,     4.0000,     5.0000,     0.2500}
>IMM[4] FLT32 {    0.0000,     0.0000,    -0.5000,     0.0010}
>IMM[5] INT32 {0, 3, 2, 1}
>IMM[6] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[3].xyzz, IN[3].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[3].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xyz, CONST[27].xyzx
>  8: MOV TEMP[2].w, CONST[28].xxxx
>  9: MOV TEMP[3].x, IMM[0].xxxx
> 10: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[0].xyzz
> 11: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[1].xyzz
> 12: MUL TEMP[4].xyz, IMM[0].yyyy, TEMP[4].xyzz
> 13: ADD TEMP[4].xyz, TEMP[0].xyzz, -TEMP[4].xyzz
> 14: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 15: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].xxxx
> 16: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[1].xyzz
> 17: ADD TEMP[5].x, IMM[0].xxxx, -TEMP[5].xxxx
> 18: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 19: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 20: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 21: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 22: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 23: MOV TEMP[3].y, TEMP[4].xxxx
> 24: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[1].xyzz
> 26: MAD TEMP[4].xyz, IMM[0].yyyy, TEMP[4].xyzz, -TEMP[0].xyzz
> 27: MOV TEMP[5].xyz, TEMP[1].xyzx
> 28: MUL TEMP[6].x, TEMP[1].yyyy, TEMP[1].yyyy
> 29: MAD TEMP[6].x, TEMP[1].xxxx, TEMP[1].xxxx, -TEMP[6].xxxx
> 30: MOV TEMP[5].w, TEMP[6].xxxx
> 31: MOV TEMP[6].xyz, TEMP[4].xyzx
> 32: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[4].yyyy
> 33: MAD TEMP[7].x, TEMP[4].xxxx, TEMP[4].xxxx, -TEMP[7].xxxx
> 34: MOV TEMP[6].w, TEMP[7].xxxx
> 35: DP4 TEMP[5].x, CONST[23], TEMP[5]
> 36: DP4 TEMP[6].x, CONST[23], TEMP[6]
> 37: MOV TEMP[5].y, TEMP[6].xxxx
> 38: MUL TEMP[6], TEMP[1].xyzz, TEMP[1].yzxz
> 39: DP4 TEMP[6].x, CONST[24], TEMP[6]
> 40: MUL TEMP[4], TEMP[4].xyzz, TEMP[4].yzxz
> 41: DP4 TEMP[4].x, CONST[24], TEMP[4]
> 42: MOV TEMP[6].y, TEMP[4].xxxx
> 43: ADD TEMP[4].xy, TEMP[5].xyyy, TEMP[6].xyyy
> 44: ADD TEMP[4].xy, TEMP[4].xyyy, CONST[25].xxxx
> 45: MAD TEMP[4].xy, TEMP[4].xyyy, IMM[0].zwww, IMM[1].xyyy
> 46: MOV_SAT TEMP[4].xy, TEMP[4].xyyy
> 47: MUL TEMP[4].xy, TEMP[4].xyyy, IMM[1].zwww
> 48: ADD TEMP[4].xy, IMM[0].xxxx, -TEMP[4].xyyy
> 49: MUL TEMP[4].xy, TEMP[3].xyyy, TEMP[4].xyyy
> 50: MOV TEMP[5].w, IMM[0].xxxx
> 51: MAD TEMP[5].xyz, IMM[2].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 52: MUL TEMP[6], CONST[4], TEMP[5].xxxx
> 53: MAD TEMP[6], CONST[5], TEMP[5].yyyy, TEMP[6]
> 54: MAD TEMP[5], CONST[6], TEMP[5].zzzz, TEMP[6]
> 55: ADD TEMP[5], TEMP[5], CONST[7]
> 56: MAD TEMP[6].x, IMM[2].yyyy, CONST[28].yyyy, IMM[0].yyyy
> 57: EX2 TEMP[6].x, TEMP[6].xxxx
> 58: MOV TEMP[7].xyz, -CONST[1].xyzx
> 59: ADD TEMP[8].xyz, TEMP[7].xyzz, TEMP[0].xyzz
> 60: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[2].zzzz
> 61: DP3 TEMP[9].x, TEMP[8].xyzz, TEMP[8].xyzz
> 62: RSQ TEMP[9].x, TEMP[9].xxxx
> 63: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[9].xxxx
> 64: DP3 TEMP[9].x, TEMP[7].xyzz, TEMP[1].xyzz
> 65: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 66: MOV TEMP[10].xy, TEMP[5].xyyy
> 67: MOV TEMP[10].w, IMM[0].xxxx
> 68: MOV TEMP[10].z, TEMP[5].zzzz
> 69: TXP TEMP[5], TEMP[10], SAMP[0], SHADOW2D
> 70: MOV TEMP[10].x, TEMP[5].xxxx
> 71: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 72: MUL TEMP[5].xyz, CONST[3].xyzz, TEMP[5].xxxx
> 73: MUL TEMP[5].xyz, TEMP[9].xxxx, TEMP[5].xyzz
> 74: MOV TEMP[10].xyz, TEMP[1].xyzz
> 75: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
> 76: MOV TEMP[11], TEMP[10]
> 77: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[0].xyzz
> 78: MUL TEMP[11].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 79: MAD TEMP[11].xyz, IMM[0].yyyy, TEMP[11].xyzz, -TEMP[0].xyzz
> 80: ADD TEMP[12].x, IMM[0].xxxx, -CONST[28].yyyy
> 81: MUL TEMP[12].x, TEMP[12].xxxx, IMM[2].wwww
> 82: MOV TEMP[11].w, TEMP[12].xxxx
> 83: DP3 TEMP[13].x, CONST[26].xyzz, IMM[3].xxxx
> 84: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[13].xxxx
> 85: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 86: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
> 87: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[3].yyyy
> 88: MUL TEMP[10].xyz, TEMP[14].xxxx, TEMP[10].xyzz
> 89: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
> 90: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 91: MUL TEMP[13].xyz, TEMP[5].xyzz, TEMP[13].xxxx
> 92: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[4].xxxx, TEMP[13].xyzz
> 93: DP3 TEMP[13].x, TEMP[0].xyzz, TEMP[1].xyzz
> 94: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 95: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
> 96: POW TEMP[13].x, TEMP[13].xxxx, IMM[3].zzzz
> 97: MAX TEMP[14].xyz, CONST[28].yyyy, CONST[26].xyzz
> 98: ADD TEMP[14].xyz, TEMP[14].xyzz, -CONST[26].xyzz
> 99: MAD TEMP[13].xyz, TEMP[13].xxxx, TEMP[14].xyzz, CONST[26].xyzz
>100: MOV TEMP[11].xyz, TEMP[11].xyzz
>101: MOV TEMP[11].w, TEMP[12].xxxx
>102: TXL TEMP[11], TEMP[11], SAMP[2], CUBE
>103: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[8].xyzz
>104: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>105: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[7].xxxx
>106: POW TEMP[7].x, TEMP[7].xxxx, IMM[3].zzzz
>107: ADD TEMP[12].xyz, IMM[0].xxxx, -CONST[26].xyzz
>108: MAD TEMP[7].xyz, TEMP[7].xxxx, TEMP[12].xyzz, CONST[26].xyzz
>109: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xyzz
>110: ADD TEMP[7].x, TEMP[6].xxxx, IMM[0].yyyy
>111: MUL TEMP[7].x, TEMP[7].xxxx, IMM[3].wwww
>112: MUL TEMP[12].x, -TEMP[6].xxxx, IMM[2].zzzz
>113: EX2 TEMP[12].x, TEMP[12].xxxx
>114: ADD TEMP[12].x, IMM[0].yyyy, -TEMP[12].xxxx
>115: RCP TEMP[12].x, TEMP[12].xxxx
>116: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[12].xxxx
>117: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>118: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[8].xyzz
>119: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>120: POW TEMP[7].x, TEMP[7].xxxx, TEMP[6].xxxx
>121: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>122: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[1].xyzz
>123: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>124: MAX TEMP[7].x, TEMP[9].xxxx, TEMP[7].xxxx
>125: ADD TEMP[7].x, TEMP[7].xxxx, IMM[4].xxxx
>126: RCP TEMP[7].x, TEMP[7].xxxx
>127: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>128: MAD TEMP[5].xyz, TEMP[13].xyzz, TEMP[11].xyzz, TEMP[5].xyzz
>129: MUL TEMP[4].xyz, TEMP[5].xyzz, TEMP[4].yyyy
>130: MOV TEMP[5].x, IMM[5].xxxx
>131: BGNLOOP :0
>132:   ISGE TEMP[7].x, TEMP[5].xxxx, IMM[5].yyyy
>133:   UIF TEMP[7].xxxx :0
>134:     BRK
>135:   ENDIF
>136:   UMUL TEMP[8].x, TEMP[5].xxxx, IMM[5].zzzz
>137:   UARL ADDR[0].x, TEMP[8].xxxx
>138:   UARL ADDR[0].x, TEMP[8].xxxx
>139:   ADD TEMP[9].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>140:   DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[9].xyzz
>141:   RSQ TEMP[12].x, TEMP[11].xxxx
>142:   MUL TEMP[13].xyz, TEMP[9].xyzz, TEMP[12].xxxx
>143:   ADD TEMP[14].xyz, TEMP[13].xyzz, TEMP[0].xyzz
>144:   MUL TEMP[15].xyz, TEMP[14].xyzz, IMM[2].zzzz
>145:   DP3 TEMP[16].x, TEMP[15].xyzz, TEMP[15].xyzz
>146:   RSQ TEMP[17].x, TEMP[16].xxxx
>147:   MUL TEMP[18].xyz, TEMP[15].xyzz, TEMP[17].xxxx
>148:   DP3 TEMP[19].x, TEMP[13].xyzz, TEMP[1].xyzz
>149:   MOV_SAT TEMP[20].x, TEMP[19].xxxx
>150:   UMAD TEMP[21].x, TEMP[5].xxxx, IMM[5].zzzz, IMM[5].wwww
>151:   MUL TEMP[22].x, TEMP[11].xxxx, TEMP[12].xxxx
>152:   UMUL TEMP[23].x, TEMP[5].xxxx, IMM[5].zzzz
>153:   UARL ADDR[0].x, TEMP[23].xxxx
>154:   MUL TEMP[24].x, TEMP[22].xxxx, CONST[ADDR[0].x+11].wwww
>155:   MOV_SAT TEMP[25].x, TEMP[24].xxxx
>156:   ADD TEMP[26].x, IMM[0].xxxx, -TEMP[25].xxxx
>157:   UARL ADDR[0].x, TEMP[21].xxxx
>158:   MUL TEMP[27].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[26].xxxx
>159:   MUL TEMP[28].xyz, TEMP[20].xxxx, TEMP[27].xyzz
>160:   DP3 TEMP[29].x, CONST[26].xyzz, IMM[3].xxxx
>161:   ADD TEMP[30].x, IMM[0].xxxx, -TEMP[29].xxxx
>162:   MOV_SAT TEMP[31].x, TEMP[30].xxxx
>163:   MAD TEMP[10].xyz, TEMP[28].xyzz, TEMP[31].xxxx, TEMP[10].xyzz
>164:   DP3 TEMP[32].x, TEMP[13].xyzz, TEMP[18].xyzz
>165:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>166:   ADD TEMP[34].x, IMM[0].xxxx, -TEMP[33].xxxx
>167:   POW TEMP[35].x, TEMP[34].xxxx, IMM[3].zzzz
>168:   ADD TEMP[36].xyz, IMM[0].xxxx, -CONST[26].xyzz
>169:   MAD TEMP[37].xyz, TEMP[35].xxxx, TEMP[36].xyzz, CONST[26].xyzz
>170:   MUL TEMP[38].xyz, TEMP[28].xyzz, TEMP[37].xyzz
>171:   ADD TEMP[39].x, TEMP[6].xxxx, IMM[0].yyyy
>172:   MUL TEMP[40].x, TEMP[39].xxxx, IMM[3].wwww
>173:   MUL TEMP[41].x, -TEMP[6].xxxx, IMM[2].zzzz
>174:   EX2 TEMP[42].x, TEMP[41].xxxx
>175:   ADD TEMP[43].x, IMM[0].yyyy, -TEMP[42].xxxx
>176:   RCP TEMP[44].x, TEMP[43].xxxx
>177:   MUL TEMP[45].x, TEMP[40].xxxx, TEMP[44].xxxx
>178:   MUL TEMP[46].xyz, TEMP[38].xyzz, TEMP[45].xxxx
>179:   DP3 TEMP[47].x, TEMP[1].xyzz, TEMP[18].xyzz
>180:   MOV_SAT TEMP[48].x, TEMP[47].xxxx
>181:   POW TEMP[49].x, TEMP[48].xxxx, TEMP[6].xxxx
>182:   MUL TEMP[50].xyz, TEMP[46].xyzz, TEMP[49].xxxx
>183:   DP3 TEMP[51].x, TEMP[0].xyzz, TEMP[1].xyzz
>184:   MOV_SAT TEMP[52].x, TEMP[51].xxxx
>185:   MAX TEMP[53].x, TEMP[20].xxxx, TEMP[52].xxxx
>186:   ADD TEMP[54].x, TEMP[53].xxxx, IMM[4].xxxx
>187:   RCP TEMP[55].x, TEMP[54].xxxx
>188:   MUL TEMP[56].xyz, TEMP[50].xyzz, TEMP[55].xxxx
>189:   MAD TEMP[4].xyz, TEMP[56].xyzz, TEMP[3].yyyy, TEMP[4].xyzz
>190:   UADD TEMP[5].x, TEMP[5].xxxx, IMM[5].wwww
>191: ENDLOOP :0
>192: MOV TEMP[5].x, CONST[17].wwww
>193: MOV TEMP[5].y, CONST[18].wwww
>194: MOV TEMP[5].z, CONST[19].wwww
>195: ADD TEMP[5].xyz, TEMP[5].xyzz, -IN[0].xyzz
>196: DP3 TEMP[7].x, TEMP[5].xyzz, TEMP[5].xyzz
>197: SQRT TEMP[7].x, TEMP[7].xxxx
>198: RCP TEMP[8].x, TEMP[7].xxxx
>199: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[8].xxxx
>200: MOV TEMP[8].yz, IMM[4].yyyy
>201: MAD TEMP[8].x, TEMP[7].xxxx, CONST[20].zzzz, CONST[20].wwww
>202: MOV TEMP[7].yz, IMM[4].yyyy
>203: MOV TEMP[7].x, IN[1].zzzz
>204: MOV TEMP[9].yz, IMM[4].yyyy
>205: MOV TEMP[11].xy, IN[1].xyyy
>206: MOV TEMP[11].w, IN[1].wwww
>207: TXP TEMP[11].w, TEMP[11], SAMP[3], 2D
>208: MUL TEMP[9].x, TEMP[11].wwww, TEMP[11].wwww
>209: ADD TEMP[11].xyz, TEMP[5].xyzz, TEMP[0].xyzz
>210: MUL TEMP[11].xyz, TEMP[11].xyzz, IMM[2].zzzz
>211: DP3 TEMP[12].x, TEMP[11].xyzz, TEMP[11].xyzz
>212: RSQ TEMP[12].x, TEMP[12].xxxx
>213: MUL TEMP[11].xyz, TEMP[11].xyzz, TEMP[12].xxxx
>214: DP3 TEMP[12].x, TEMP[5].xyzz, TEMP[1].xyzz
>215: MOV_SAT TEMP[12].x, TEMP[12].xxxx
>216: ADD TEMP[8].xyz, TEMP[8].xyzz, IMM[4].zzzz
>217: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[0].yyyy
>218: ADD TEMP[8].xyz, IMM[0].xxxx, -TEMP[8].xyzz
>219: MOV_SAT TEMP[8].xyz, TEMP[8].xyzz
>220: MUL TEMP[8].xyz, TEMP[9].xyzz, TEMP[8].xyzz
>221: MOV_SAT TEMP[7].xyz, TEMP[7].xyzz
>222: MUL TEMP[7].x, TEMP[8].xyzz, TEMP[7].xyzz
>223: MUL TEMP[7].xyz, CONST[21].xyzz, TEMP[7].xxxx
>224: MUL TEMP[7].xyz, TEMP[12].xxxx, TEMP[7].xyzz
>225: DP3 TEMP[8].x, CONST[26].xyzz, IMM[3].xxxx
>226: ADD TEMP[8].x, IMM[0].xxxx, -TEMP[8].xxxx
>227: MOV_SAT TEMP[8].x, TEMP[8].xxxx
>228: MAD TEMP[8].xyz, TEMP[7].xyzz, TEMP[8].xxxx, TEMP[10].xyzz
>229: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[11].xyzz
>230: MOV_SAT TEMP[5].x, TEMP[5].xxxx
>231: ADD TEMP[5].x, IMM[0].xxxx, -TEMP[5].xxxx
>232: POW TEMP[5].x, TEMP[5].xxxx, IMM[3].zzzz
>233: ADD TEMP[9].xyz, IMM[0].xxxx, -CONST[26].xyzz
>234: MAD TEMP[5].xyz, TEMP[5].xxxx, TEMP[9].xyzz, CONST[26].xyzz
>235: MUL TEMP[5].xyz, TEMP[7].xyzz, TEMP[5].xyzz
>236: ADD TEMP[7].x, TEMP[6].xxxx, IMM[0].yyyy
>237: MUL TEMP[7].x, TEMP[7].xxxx, IMM[3].wwww
>238: MUL TEMP[9].x, -TEMP[6].xxxx, IMM[2].zzzz
>239: EX2 TEMP[9].x, TEMP[9].xxxx
>240: ADD TEMP[9].x, IMM[0].yyyy, -TEMP[9].xxxx
>241: RCP TEMP[9].x, TEMP[9].xxxx
>242: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[9].xxxx
>243: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>244: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[11].xyzz
>245: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>246: POW TEMP[6].x, TEMP[7].xxxx, TEMP[6].xxxx
>247: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[6].xxxx
>248: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[1].xyzz
>249: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>250: MAX TEMP[0].x, TEMP[12].xxxx, TEMP[0].xxxx
>251: ADD TEMP[0].x, TEMP[0].xxxx, IMM[4].xxxx
>252: RCP TEMP[0].x, TEMP[0].xxxx
>253: MUL TEMP[0].xyz, TEMP[5].xyzz, TEMP[0].xxxx
>254: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].yyyy, TEMP[4].xyzz
>255: MAD TEMP[0].xyz, TEMP[8].xyzz, CONST[27].xyzz, TEMP[0].xyzz
>256: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>257: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].yyyy
>258: ADD TEMP[3].x, CONST[1].wwww, -CONST[0].wwww
>259: ADD TEMP[3].x, TEMP[3].xxxx, IMM[4].wwww
>260: RCP TEMP[3].x, TEMP[3].xxxx
>261: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
>262: FRC TEMP[3].x, CONST[1].wwww
>263: MUL TEMP[3].x, TEMP[3].xxxx, IMM[6].xxxx
>264: POW TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
>265: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>266: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>267: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>268: MOV TEMP[0].w, TEMP[2].wwww
>269: MOV OUT[0], TEMP[0]
>270: END
>radeonsi: Compiling shader 124
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !invariant.load !0
>  %67 = call float @llvm.SI.load.const(<16 x i8> %66, i32 448)
>  %68 = fmul float %60, %43
>  %69 = fmul float %62, %44
>  %70 = fadd float %69, %68
>  %71 = fmul float %64, %45
>  %72 = fadd float %70, %71
>  %73 = fmul float %72, %60
>  %74 = fmul float %72, %62
>  %75 = fmul float %72, %64
>  %76 = fmul float %73, 2.000000e+00
>  %77 = fmul float %74, 2.000000e+00
>  %78 = fmul float %75, 2.000000e+00
>  %79 = fsub float %43, %76
>  %80 = fsub float %44, %77
>  %81 = fsub float %45, %78
>  %82 = fmul float %79, %60
>  %83 = fmul float %80, %62
>  %84 = fadd float %83, %82
>  %85 = fmul float %81, %64
>  %86 = fadd float %84, %85
>  %87 = fadd float %86, 1.000000e+00
>  %88 = fmul float %43, %60
>  %89 = fmul float %44, %62
>  %90 = fadd float %89, %88
>  %91 = fmul float %45, %64
>  %92 = fadd float %90, %91
>  %93 = fsub float 1.000000e+00, %92
>  %94 = call float @llvm.AMDGPU.clamp.(float %93, float 0.000000e+00, float 1.000000e+00)
>  %95 = fsub float %87, %94
>  %96 = call float @llvm.AMDGPU.clamp.(float %95, float 0.000000e+00, float 1.000000e+00)
>  %97 = fsub float 1.000000e+00, %96
>  %98 = fmul float %97, %97
>  %99 = fmul float %60, %43
>  %100 = fmul float %62, %44
>  %101 = fadd float %100, %99
>  %102 = fmul float %64, %45
>  %103 = fadd float %101, %102
>  %104 = fmul float %103, %60
>  %105 = fmul float %103, %62
>  %106 = fmul float %103, %64
>  %107 = fmul float %104, 2.000000e+00
>  %108 = fsub float %107, %43
>  %109 = fmul float %105, 2.000000e+00
>  %110 = fsub float %109, %44
>  %111 = fmul float %106, 2.000000e+00
>  %112 = fsub float %111, %45
>  %113 = fmul float %62, %62
>  %114 = fmul float %60, %60
>  %115 = fsub float %114, %113
>  %116 = fmul float %110, %110
>  %117 = fmul float %108, %108
>  %118 = fsub float %117, %116
>  %119 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %120 = load <16 x i8>, <16 x i8> addrspace(2)* %119, align 16, !invariant.load !0
>  %121 = call float @llvm.SI.load.const(<16 x i8> %120, i32 368)
>  %122 = call float @llvm.SI.load.const(<16 x i8> %120, i32 372)
>  %123 = call float @llvm.SI.load.const(<16 x i8> %120, i32 376)
>  %124 = call float @llvm.SI.load.const(<16 x i8> %120, i32 380)
>  %125 = fmul float %121, %60
>  %126 = fmul float %122, %62
>  %127 = fadd float %125, %126
>  %128 = fmul float %123, %64
>  %129 = fadd float %127, %128
>  %130 = fmul float %124, %115
>  %131 = fadd float %129, %130
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 368)
>  %135 = call float @llvm.SI.load.const(<16 x i8> %133, i32 372)
>  %136 = call float @llvm.SI.load.const(<16 x i8> %133, i32 376)
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 380)
>  %138 = fmul float %134, %108
>  %139 = fmul float %135, %110
>  %140 = fadd float %138, %139
>  %141 = fmul float %136, %112
>  %142 = fadd float %140, %141
>  %143 = fmul float %137, %118
>  %144 = fadd float %142, %143
>  %145 = fmul float %60, %62
>  %146 = fmul float %62, %64
>  %147 = fmul float %64, %60
>  %148 = fmul float %64, %64
>  %149 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %150 = load <16 x i8>, <16 x i8> addrspace(2)* %149, align 16, !invariant.load !0
>  %151 = call float @llvm.SI.load.const(<16 x i8> %150, i32 384)
>  %152 = call float @llvm.SI.load.const(<16 x i8> %150, i32 388)
>  %153 = call float @llvm.SI.load.const(<16 x i8> %150, i32 392)
>  %154 = call float @llvm.SI.load.const(<16 x i8> %150, i32 396)
>  %155 = fmul float %151, %145
>  %156 = fmul float %152, %146
>  %157 = fadd float %155, %156
>  %158 = fmul float %153, %147
>  %159 = fadd float %157, %158
>  %160 = fmul float %154, %148
>  %161 = fadd float %159, %160
>  %162 = fmul float %108, %110
>  %163 = fmul float %110, %112
>  %164 = fmul float %112, %108
>  %165 = fmul float %112, %112
>  %166 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %167 = load <16 x i8>, <16 x i8> addrspace(2)* %166, align 16, !invariant.load !0
>  %168 = call float @llvm.SI.load.const(<16 x i8> %167, i32 384)
>  %169 = call float @llvm.SI.load.const(<16 x i8> %167, i32 388)
>  %170 = call float @llvm.SI.load.const(<16 x i8> %167, i32 392)
>  %171 = call float @llvm.SI.load.const(<16 x i8> %167, i32 396)
>  %172 = fmul float %168, %162
>  %173 = fmul float %169, %163
>  %174 = fadd float %172, %173
>  %175 = fmul float %170, %164
>  %176 = fadd float %174, %175
>  %177 = fmul float %171, %165
>  %178 = fadd float %176, %177
>  %179 = fadd float %131, %161
>  %180 = fadd float %144, %178
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = call float @llvm.SI.load.const(<16 x i8> %182, i32 400)
>  %184 = fadd float %179, %183
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 400)
>  %186 = fadd float %180, %185
>  %187 = fmul float %184, 0x3FF4CCCCC0000000
>  %188 = fmul float %186, 0x3FFD9999A0000000
>  %189 = fadd float %188, 0xBFD3333340000000
>  %190 = call float @llvm.AMDGPU.clamp.(float %187, float 0.000000e+00, float 1.000000e+00)
>  %191 = call float @llvm.AMDGPU.clamp.(float %189, float 0.000000e+00, float 1.000000e+00)
>  %192 = fmul float %190, 0x3FE99999A0000000
>  %193 = fsub float 1.000000e+00, %192
>  %194 = fsub float 1.000000e+00, %191
>  %195 = fmul float %98, %194
>  %196 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %197 = fmul float %60, 0x4007700140000000
>  %198 = fadd float %197, %196
>  %199 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %200 = fmul float %62, 0x4007700140000000
>  %201 = fadd float %200, %199
>  %202 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %203 = fmul float %64, 0x4007700140000000
>  %204 = fadd float %203, %202
>  %205 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %206 = load <16 x i8>, <16 x i8> addrspace(2)* %205, align 16, !invariant.load !0
>  %207 = call float @llvm.SI.load.const(<16 x i8> %206, i32 64)
>  %208 = fmul float %207, %198
>  %209 = call float @llvm.SI.load.const(<16 x i8> %206, i32 68)
>  %210 = fmul float %209, %198
>  %211 = call float @llvm.SI.load.const(<16 x i8> %206, i32 72)
>  %212 = fmul float %211, %198
>  %213 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %214 = load <16 x i8>, <16 x i8> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = call float @llvm.SI.load.const(<16 x i8> %214, i32 80)
>  %216 = fmul float %215, %201
>  %217 = fadd float %216, %208
>  %218 = call float @llvm.SI.load.const(<16 x i8> %214, i32 84)
>  %219 = fmul float %218, %201
>  %220 = fadd float %219, %210
>  %221 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %222 = load <16 x i8>, <16 x i8> addrspace(2)* %221, align 16, !invariant.load !0
>  %223 = call float @llvm.SI.load.const(<16 x i8> %222, i32 88)
>  %224 = fmul float %223, %201
>  %225 = fadd float %224, %212
>  %226 = call float @llvm.SI.load.const(<16 x i8> %222, i32 96)
>  %227 = fmul float %226, %204
>  %228 = fadd float %227, %217
>  %229 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %230 = load <16 x i8>, <16 x i8> addrspace(2)* %229, align 16, !invariant.load !0
>  %231 = call float @llvm.SI.load.const(<16 x i8> %230, i32 100)
>  %232 = fmul float %231, %204
>  %233 = fadd float %232, %220
>  %234 = call float @llvm.SI.load.const(<16 x i8> %230, i32 104)
>  %235 = fmul float %234, %204
>  %236 = fadd float %235, %225
>  %237 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %238 = load <16 x i8>, <16 x i8> addrspace(2)* %237, align 16, !invariant.load !0
>  %239 = call float @llvm.SI.load.const(<16 x i8> %238, i32 112)
>  %240 = fadd float %228, %239
>  %241 = call float @llvm.SI.load.const(<16 x i8> %238, i32 116)
>  %242 = fadd float %233, %241
>  %243 = call float @llvm.SI.load.const(<16 x i8> %238, i32 120)
>  %244 = fadd float %236, %243
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 452)
>  %248 = fmul float %247, 9.000000e+00
>  %249 = fadd float %248, 2.000000e+00
>  %250 = call float @llvm.exp2.f32(float %249)
>  %251 = call float @llvm.SI.load.const(<16 x i8> %246, i32 16)
>  %252 = fsub float -0.000000e+00, %251
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 20)
>  %256 = fsub float -0.000000e+00, %255
>  %257 = call float @llvm.SI.load.const(<16 x i8> %254, i32 24)
>  %258 = fsub float -0.000000e+00, %257
>  %259 = fsub float %43, %251
>  %260 = fsub float %44, %255
>  %261 = fsub float %45, %257
>  %262 = fmul float %259, 5.000000e-01
>  %263 = fmul float %260, 5.000000e-01
>  %264 = fmul float %261, 5.000000e-01
>  %265 = fmul float %262, %262
>  %266 = fmul float %263, %263
>  %267 = fadd float %266, %265
>  %268 = fmul float %264, %264
>  %269 = fadd float %267, %268
>  %270 = call float @llvm.sqrt.f32(float %269)
>  %271 = fdiv float 1.000000e+00, %270, !fpmath !1
>  %272 = fmul float %262, %271
>  %273 = fmul float %263, %271
>  %274 = fmul float %264, %271
>  %275 = fmul float %60, %252
>  %276 = fmul float %62, %256
>  %277 = fadd float %276, %275
>  %278 = fmul float %64, %258
>  %279 = fadd float %277, %278
>  %280 = call float @llvm.AMDGPU.clamp.(float %279, float 0.000000e+00, float 1.000000e+00)
>  %281 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %282 = load <8 x i32>, <8 x i32> addrspace(2)* %281, align 32, !invariant.load !0
>  %283 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %284 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %283, i64 0, i64 3, !amdgpu.uniform !0
>  %285 = load <4 x i32>, <4 x i32> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = extractelement <8 x i32> %282, i32 7
>  %287 = extractelement <4 x i32> %285, i32 0
>  %288 = and i32 %287, %286
>  %289 = insertelement <4 x i32> %285, i32 %288, i32 0
>  %290 = bitcast float %244 to i32
>  %291 = bitcast float %240 to i32
>  %292 = bitcast float %242 to i32
>  %293 = insertelement <4 x i32> undef, i32 %290, i32 0
>  %294 = insertelement <4 x i32> %293, i32 %291, i32 1
>  %295 = insertelement <4 x i32> %294, i32 %292, i32 2
>  %296 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %295, <8 x i32> %282, <4 x i32> %289, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %297 = extractelement <4 x float> %296, i32 0
>  %298 = fmul float %297, %297
>  %299 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %300 = load <16 x i8>, <16 x i8> addrspace(2)* %299, align 16, !invariant.load !0
>  %301 = call float @llvm.SI.load.const(<16 x i8> %300, i32 48)
>  %302 = fmul float %301, %298
>  %303 = call float @llvm.SI.load.const(<16 x i8> %300, i32 52)
>  %304 = fmul float %303, %298
>  %305 = call float @llvm.SI.load.const(<16 x i8> %300, i32 56)
>  %306 = fmul float %305, %298
>  %307 = fmul float %280, %302
>  %308 = fmul float %280, %304
>  %309 = fmul float %280, %306
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 7, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %320 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %321 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %322 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %323 = call float @llvm.fabs.f32(float %321)
>  %324 = fdiv float 1.000000e+00, %323, !fpmath !1
>  %325 = fmul float %319, %324
>  %326 = fadd float %325, 1.500000e+00
>  %327 = fmul float %320, %324
>  %328 = fadd float %327, 1.500000e+00
>  %329 = bitcast float %328 to i32
>  %330 = bitcast float %326 to i32
>  %331 = bitcast float %322 to i32
>  %332 = insertelement <4 x i32> undef, i32 %329, i32 0
>  %333 = insertelement <4 x i32> %332, i32 %330, i32 1
>  %334 = insertelement <4 x i32> %333, i32 %331, i32 2
>  %335 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %334, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %336 = extractelement <4 x float> %335, i32 0
>  %337 = extractelement <4 x float> %335, i32 1
>  %338 = extractelement <4 x float> %335, i32 2
>  %339 = extractelement <4 x float> %335, i32 3
>  %340 = fmul float %60, %43
>  %341 = fmul float %62, %44
>  %342 = fadd float %341, %340
>  %343 = fmul float %64, %45
>  %344 = fadd float %342, %343
>  %345 = fmul float %344, %60
>  %346 = fmul float %344, %62
>  %347 = fmul float %344, %64
>  %348 = fmul float %345, 2.000000e+00
>  %349 = fsub float %348, %43
>  %350 = fmul float %346, 2.000000e+00
>  %351 = fsub float %350, %44
>  %352 = fmul float %347, 2.000000e+00
>  %353 = fsub float %352, %45
>  %354 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %355 = load <16 x i8>, <16 x i8> addrspace(2)* %354, align 16, !invariant.load !0
>  %356 = call float @llvm.SI.load.const(<16 x i8> %355, i32 452)
>  %357 = fsub float 1.000000e+00, %356
>  %358 = fmul float %357, 6.000000e+00
>  %359 = call float @llvm.SI.load.const(<16 x i8> %355, i32 416)
>  %360 = call float @llvm.SI.load.const(<16 x i8> %355, i32 420)
>  %361 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %362 = load <16 x i8>, <16 x i8> addrspace(2)* %361, align 16, !invariant.load !0
>  %363 = call float @llvm.SI.load.const(<16 x i8> %362, i32 424)
>  %364 = fmul float %359, 0x3FD55553E0000000
>  %365 = fmul float %360, 0x3FD55553E0000000
>  %366 = fadd float %365, %364
>  %367 = fmul float %363, 0x3FD55553E0000000
>  %368 = fadd float %366, %367
>  %369 = fsub float 1.000000e+00, %368
>  %370 = call float @llvm.AMDGPU.clamp.(float %369, float 0.000000e+00, float 1.000000e+00)
>  %371 = fmul float %336, %339
>  %372 = fmul float %337, %339
>  %373 = fmul float %338, %339
>  %374 = fmul float %371, 4.000000e+00
>  %375 = fmul float %372, 4.000000e+00
>  %376 = fmul float %373, 4.000000e+00
>  %377 = fmul float %370, %374
>  %378 = fmul float %370, %375
>  %379 = fmul float %370, %376
>  %380 = fsub float 1.000000e+00, %368
>  %381 = call float @llvm.AMDGPU.clamp.(float %380, float 0.000000e+00, float 1.000000e+00)
>  %382 = fmul float %307, %381
>  %383 = fmul float %308, %381
>  %384 = fmul float %309, %381
>  %385 = fmul float %377, %193
>  %386 = fadd float %385, %382
>  %387 = fmul float %378, %193
>  %388 = fadd float %387, %383
>  %389 = fmul float %379, %193
>  %390 = fadd float %389, %384
>  %391 = fmul float %43, %60
>  %392 = fmul float %44, %62
>  %393 = fadd float %392, %391
>  %394 = fmul float %45, %64
>  %395 = fadd float %393, %394
>  %396 = call float @llvm.AMDGPU.clamp.(float %395, float 0.000000e+00, float 1.000000e+00)
>  %397 = fsub float 1.000000e+00, %396
>  %398 = call float @llvm.pow.f32(float %397, float 5.000000e+00)
>  %399 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %400 = load <16 x i8>, <16 x i8> addrspace(2)* %399, align 16, !invariant.load !0
>  %401 = call float @llvm.SI.load.const(<16 x i8> %400, i32 452)
>  %402 = call float @llvm.SI.load.const(<16 x i8> %400, i32 416)
>  %403 = call float @llvm.maxnum.f32(float %401, float %402)
>  %404 = call float @llvm.SI.load.const(<16 x i8> %400, i32 452)
>  %405 = call float @llvm.SI.load.const(<16 x i8> %400, i32 420)
>  %406 = call float @llvm.maxnum.f32(float %404, float %405)
>  %407 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %408 = load <16 x i8>, <16 x i8> addrspace(2)* %407, align 16, !invariant.load !0
>  %409 = call float @llvm.SI.load.const(<16 x i8> %408, i32 452)
>  %410 = call float @llvm.SI.load.const(<16 x i8> %408, i32 424)
>  %411 = call float @llvm.maxnum.f32(float %409, float %410)
>  %412 = call float @llvm.SI.load.const(<16 x i8> %408, i32 416)
>  %413 = fsub float %403, %412
>  %414 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %415 = load <16 x i8>, <16 x i8> addrspace(2)* %414, align 16, !invariant.load !0
>  %416 = call float @llvm.SI.load.const(<16 x i8> %415, i32 420)
>  %417 = fsub float %406, %416
>  %418 = call float @llvm.SI.load.const(<16 x i8> %415, i32 424)
>  %419 = fsub float %411, %418
>  %420 = call float @llvm.SI.load.const(<16 x i8> %415, i32 416)
>  %421 = fmul float %398, %413
>  %422 = fadd float %421, %420
>  %423 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %424 = load <16 x i8>, <16 x i8> addrspace(2)* %423, align 16, !invariant.load !0
>  %425 = call float @llvm.SI.load.const(<16 x i8> %424, i32 420)
>  %426 = fmul float %398, %417
>  %427 = fadd float %426, %425
>  %428 = call float @llvm.SI.load.const(<16 x i8> %424, i32 424)
>  %429 = fmul float %398, %419
>  %430 = fadd float %429, %428
>  %431 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %432 = load <8 x i32>, <8 x i32> addrspace(2)* %431, align 32, !invariant.load !0
>  %433 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %434 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %433, i64 0, i64 11, !amdgpu.uniform !0
>  %435 = load <4 x i32>, <4 x i32> addrspace(2)* %434, align 16, !invariant.load !0
>  %436 = extractelement <8 x i32> %432, i32 7
>  %437 = extractelement <4 x i32> %435, i32 0
>  %438 = and i32 %437, %436
>  %439 = insertelement <4 x i32> %435, i32 %438, i32 0
>  %440 = call float @llvm.amdgcn.cubetc(float %349, float %351, float %353)
>  %441 = call float @llvm.amdgcn.cubesc(float %349, float %351, float %353)
>  %442 = call float @llvm.amdgcn.cubema(float %349, float %351, float %353)
>  %443 = call float @llvm.amdgcn.cubeid(float %349, float %351, float %353)
>  %444 = call float @llvm.fabs.f32(float %442)
>  %445 = fdiv float 1.000000e+00, %444, !fpmath !1
>  %446 = fmul float %440, %445
>  %447 = fadd float %446, 1.500000e+00
>  %448 = fmul float %441, %445
>  %449 = fadd float %448, 1.500000e+00
>  %450 = bitcast float %449 to i32
>  %451 = bitcast float %447 to i32
>  %452 = bitcast float %443 to i32
>  %453 = bitcast float %358 to i32
>  %454 = insertelement <4 x i32> undef, i32 %450, i32 0
>  %455 = insertelement <4 x i32> %454, i32 %451, i32 1
>  %456 = insertelement <4 x i32> %455, i32 %452, i32 2
>  %457 = insertelement <4 x i32> %456, i32 %453, i32 3
>  %458 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %457, <8 x i32> %432, <4 x i32> %439, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %459 = extractelement <4 x float> %458, i32 0
>  %460 = extractelement <4 x float> %458, i32 1
>  %461 = extractelement <4 x float> %458, i32 2
>  %462 = fmul float %272, %252
>  %463 = fmul float %273, %256
>  %464 = fadd float %463, %462
>  %465 = fmul float %274, %258
>  %466 = fadd float %464, %465
>  %467 = call float @llvm.AMDGPU.clamp.(float %466, float 0.000000e+00, float 1.000000e+00)
>  %468 = fsub float 1.000000e+00, %467
>  %469 = call float @llvm.pow.f32(float %468, float 5.000000e+00)
>  %470 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %471 = load <16 x i8>, <16 x i8> addrspace(2)* %470, align 16, !invariant.load !0
>  %472 = call float @llvm.SI.load.const(<16 x i8> %471, i32 416)
>  %473 = fsub float 1.000000e+00, %472
>  %474 = call float @llvm.SI.load.const(<16 x i8> %471, i32 420)
>  %475 = fsub float 1.000000e+00, %474
>  %476 = call float @llvm.SI.load.const(<16 x i8> %471, i32 424)
>  %477 = fsub float 1.000000e+00, %476
>  %478 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %479 = load <16 x i8>, <16 x i8> addrspace(2)* %478, align 16, !invariant.load !0
>  %480 = call float @llvm.SI.load.const(<16 x i8> %479, i32 416)
>  %481 = fmul float %469, %473
>  %482 = fadd float %481, %480
>  %483 = call float @llvm.SI.load.const(<16 x i8> %479, i32 420)
>  %484 = fmul float %469, %475
>  %485 = fadd float %484, %483
>  %486 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %487 = load <16 x i8>, <16 x i8> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = call float @llvm.SI.load.const(<16 x i8> %487, i32 424)
>  %489 = fmul float %469, %477
>  %490 = fadd float %489, %488
>  %491 = fmul float %307, %482
>  %492 = fmul float %308, %485
>  %493 = fmul float %309, %490
>  %494 = fadd float %250, 2.000000e+00
>  %495 = fmul float %494, 2.500000e-01
>  %496 = fmul float %250, -5.000000e-01
>  %497 = call float @llvm.exp2.f32(float %496)
>  %498 = fsub float 2.000000e+00, %497
>  %499 = fdiv float 1.000000e+00, %498, !fpmath !1
>  %500 = fmul float %495, %499
>  %501 = fmul float %491, %500
>  %502 = fmul float %492, %500
>  %503 = fmul float %493, %500
>  %504 = fmul float %60, %272
>  %505 = fmul float %62, %273
>  %506 = fadd float %505, %504
>  %507 = fmul float %64, %274
>  %508 = fadd float %506, %507
>  %509 = call float @llvm.AMDGPU.clamp.(float %508, float 0.000000e+00, float 1.000000e+00)
>  %510 = call float @llvm.pow.f32(float %509, float %250)
>  %511 = fmul float %501, %510
>  %512 = fmul float %502, %510
>  %513 = fmul float %503, %510
>  %514 = fmul float %43, %60
>  %515 = fmul float %44, %62
>  %516 = fadd float %515, %514
>  %517 = fmul float %45, %64
>  %518 = fadd float %516, %517
>  %519 = call float @llvm.AMDGPU.clamp.(float %518, float 0.000000e+00, float 1.000000e+00)
>  %520 = call float @llvm.maxnum.f32(float %280, float %519)
>  %521 = fadd float %520, 0x3EE4F8B580000000
>  %522 = fdiv float 1.000000e+00, %521, !fpmath !1
>  %523 = fmul float %511, %522
>  %524 = fmul float %512, %522
>  %525 = fmul float %513, %522
>  %526 = fmul float %422, %459
>  %527 = fadd float %526, %523
>  %528 = fmul float %427, %460
>  %529 = fadd float %528, %524
>  %530 = fmul float %430, %461
>  %531 = fadd float %530, %525
>  %532 = fmul float %527, %195
>  %533 = fmul float %529, %195
>  %534 = fmul float %531, %195
>  %535 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %536 = load <16 x i8>, <16 x i8> addrspace(2)* %535, align 16
>  %537 = fadd float %250, 2.000000e+00
>  %538 = fmul float %537, 2.500000e-01
>  %539 = fmul float %250, -5.000000e-01
>  %540 = fmul float %43, %60
>  %541 = fmul float %44, %62
>  %542 = fadd float %541, %540
>  %543 = fmul float %45, %64
>  %544 = fadd float %542, %543
>  br label %loop131
>
>loop131:                                          ; preds = %endif135, %main_body
>  %.012 = phi float [ %390, %main_body ], [ %637, %endif135 ]
>  %.011 = phi float [ %388, %main_body ], [ %635, %endif135 ]
>  %.010 = phi float [ %386, %main_body ], [ %633, %endif135 ]
>  %545 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %546 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %547 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %548 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %549 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %.08 = phi float [ %534, %main_body ], [ %693, %endif135 ]
>  %.07 = phi float [ %533, %main_body ], [ %691, %endif135 ]
>  %.0 = phi float [ %532, %main_body ], [ %689, %endif135 ]
>  %550 = icmp sgt i32 %545, 2
>  br i1 %550, label %endloop191, label %endif135
>
>endif135:                                         ; preds = %loop131
>  %551 = shl i32 %546, 5
>  %552 = shl i32 %546, 5
>  %553 = add i32 %552, 176
>  %554 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %553)
>  %555 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %556 = fsub float %554, %555
>  %557 = shl i32 %546, 5
>  %558 = add i32 %557, 180
>  %559 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %558)
>  %560 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %561 = fsub float %559, %560
>  %562 = add i32 %551, 184
>  %563 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %562)
>  %564 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %565 = fsub float %563, %564
>  %566 = fmul float %556, %556
>  %567 = fmul float %561, %561
>  %568 = fadd float %567, %566
>  %569 = fmul float %565, %565
>  %570 = fadd float %568, %569
>  %571 = call float @llvm.sqrt.f32(float %570)
>  %572 = fdiv float 1.000000e+00, %571, !fpmath !1
>  %573 = fmul float %556, %572
>  %574 = fmul float %561, %572
>  %575 = fmul float %565, %572
>  %576 = fadd float %573, %43
>  %577 = fadd float %574, %44
>  %578 = fadd float %575, %45
>  %579 = fmul float %576, 5.000000e-01
>  %580 = fmul float %577, 5.000000e-01
>  %581 = fmul float %578, 5.000000e-01
>  %582 = fmul float %579, %579
>  %583 = fmul float %580, %580
>  %584 = fadd float %583, %582
>  %585 = fmul float %581, %581
>  %586 = fadd float %584, %585
>  %587 = call float @llvm.sqrt.f32(float %586)
>  %588 = fdiv float 1.000000e+00, %587, !fpmath !1
>  %589 = fmul float %579, %588
>  %590 = fmul float %580, %588
>  %591 = fmul float %581, %588
>  %592 = fmul float %573, %60
>  %593 = fmul float %574, %62
>  %594 = fadd float %593, %592
>  %595 = fmul float %575, %64
>  %596 = fadd float %594, %595
>  %597 = call float @llvm.AMDGPU.clamp.(float %596, float 0.000000e+00, float 1.000000e+00)
>  %598 = shl i32 %547, 1
>  %599 = or i32 %598, 1
>  %600 = fmul float %570, %572
>  %601 = shl i32 %548, 5
>  %602 = add i32 %601, 188
>  %603 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %602)
>  %604 = fmul float %600, %603
>  %605 = call float @llvm.AMDGPU.clamp.(float %604, float 0.000000e+00, float 1.000000e+00)
>  %606 = fsub float 1.000000e+00, %605
>  %607 = shl i32 %599, 4
>  %608 = add i32 %607, 176
>  %609 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %608)
>  %610 = fmul float %609, %606
>  %611 = shl i32 %599, 4
>  %612 = add i32 %611, 180
>  %613 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %612)
>  %614 = fmul float %613, %606
>  %615 = shl i32 %599, 4
>  %616 = add i32 %615, 184
>  %617 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %616)
>  %618 = fmul float %617, %606
>  %619 = fmul float %597, %610
>  %620 = fmul float %597, %614
>  %621 = fmul float %597, %618
>  %622 = call float @llvm.SI.load.const(<16 x i8> %536, i32 416)
>  %623 = call float @llvm.SI.load.const(<16 x i8> %536, i32 420)
>  %624 = call float @llvm.SI.load.const(<16 x i8> %536, i32 424)
>  %625 = fmul float %622, 0x3FD55553E0000000
>  %626 = fmul float %623, 0x3FD55553E0000000
>  %627 = fadd float %626, %625
>  %628 = fmul float %624, 0x3FD55553E0000000
>  %629 = fadd float %627, %628
>  %630 = fsub float 1.000000e+00, %629
>  %631 = call float @llvm.AMDGPU.clamp.(float %630, float 0.000000e+00, float 1.000000e+00)
>  %632 = fmul float %619, %631
>  %633 = fadd float %632, %.010
>  %634 = fmul float %620, %631
>  %635 = fadd float %634, %.011
>  %636 = fmul float %621, %631
>  %637 = fadd float %636, %.012
>  %638 = fmul float %573, %589
>  %639 = fmul float %574, %590
>  %640 = fadd float %639, %638
>  %641 = fmul float %575, %591
>  %642 = fadd float %640, %641
>  %643 = call float @llvm.AMDGPU.clamp.(float %642, float 0.000000e+00, float 1.000000e+00)
>  %644 = fsub float 1.000000e+00, %643
>  %645 = call float @llvm.pow.f32(float %644, float 5.000000e+00)
>  %646 = call float @llvm.SI.load.const(<16 x i8> %536, i32 416)
>  %647 = fsub float 1.000000e+00, %646
>  %648 = call float @llvm.SI.load.const(<16 x i8> %536, i32 420)
>  %649 = fsub float 1.000000e+00, %648
>  %650 = call float @llvm.SI.load.const(<16 x i8> %536, i32 424)
>  %651 = fsub float 1.000000e+00, %650
>  %652 = call float @llvm.SI.load.const(<16 x i8> %536, i32 416)
>  %653 = fmul float %645, %647
>  %654 = fadd float %653, %652
>  %655 = call float @llvm.SI.load.const(<16 x i8> %536, i32 420)
>  %656 = fmul float %645, %649
>  %657 = fadd float %656, %655
>  %658 = call float @llvm.SI.load.const(<16 x i8> %536, i32 424)
>  %659 = fmul float %645, %651
>  %660 = fadd float %659, %658
>  %661 = fmul float %619, %654
>  %662 = fmul float %620, %657
>  %663 = fmul float %621, %660
>  %664 = call float @llvm.exp2.f32(float %539)
>  %665 = fsub float 2.000000e+00, %664
>  %666 = fdiv float 1.000000e+00, %665, !fpmath !1
>  %667 = fmul float %538, %666
>  %668 = fmul float %661, %667
>  %669 = fmul float %662, %667
>  %670 = fmul float %663, %667
>  %671 = fmul float %60, %589
>  %672 = fmul float %62, %590
>  %673 = fadd float %672, %671
>  %674 = fmul float %64, %591
>  %675 = fadd float %673, %674
>  %676 = call float @llvm.AMDGPU.clamp.(float %675, float 0.000000e+00, float 1.000000e+00)
>  %677 = call float @llvm.pow.f32(float %676, float %250)
>  %678 = fmul float %668, %677
>  %679 = fmul float %669, %677
>  %680 = fmul float %670, %677
>  %681 = call float @llvm.AMDGPU.clamp.(float %544, float 0.000000e+00, float 1.000000e+00)
>  %682 = call float @llvm.maxnum.f32(float %597, float %681)
>  %683 = fadd float %682, 0x3EE4F8B580000000
>  %684 = fdiv float 1.000000e+00, %683, !fpmath !1
>  %685 = fmul float %678, %684
>  %686 = fmul float %679, %684
>  %687 = fmul float %680, %684
>  %688 = fmul float %685, %98
>  %689 = fadd float %688, %.0
>  %690 = fmul float %686, %98
>  %691 = fadd float %690, %.07
>  %692 = fmul float %687, %98
>  %693 = fadd float %692, %.08
>  %694 = add i32 %549, 1
>  br label %loop131
>
>endloop191:                                       ; preds = %loop131
>  %695 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %696 = load <16 x i8>, <16 x i8> addrspace(2)* %695, align 16, !invariant.load !0
>  %697 = call float @llvm.SI.load.const(<16 x i8> %696, i32 284)
>  %698 = call float @llvm.SI.load.const(<16 x i8> %696, i32 300)
>  %699 = call float @llvm.SI.load.const(<16 x i8> %696, i32 316)
>  %700 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %701 = fsub float %697, %700
>  %702 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %703 = fsub float %698, %702
>  %704 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %705 = fsub float %699, %704
>  %706 = fmul float %701, %701
>  %707 = fmul float %703, %703
>  %708 = fadd float %707, %706
>  %709 = fmul float %705, %705
>  %710 = fadd float %708, %709
>  %711 = call float @llvm.sqrt.f32(float %710)
>  %712 = fdiv float 1.000000e+00, %711, !fpmath !1
>  %713 = fmul float %701, %712
>  %714 = fmul float %703, %712
>  %715 = fmul float %705, %712
>  %716 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %717 = load <16 x i8>, <16 x i8> addrspace(2)* %716, align 16, !invariant.load !0
>  %718 = call float @llvm.SI.load.const(<16 x i8> %717, i32 328)
>  %719 = call float @llvm.SI.load.const(<16 x i8> %717, i32 332)
>  %720 = fmul float %711, %718
>  %721 = fadd float %720, %719
>  %722 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %723 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %724 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %725 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %726 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %727 = load <8 x i32>, <8 x i32> addrspace(2)* %726, align 32, !invariant.load !0
>  %728 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %729 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %728, i64 0, i64 15, !amdgpu.uniform !0
>  %730 = load <4 x i32>, <4 x i32> addrspace(2)* %729, align 16, !invariant.load !0
>  %731 = extractelement <8 x i32> %727, i32 7
>  %732 = extractelement <4 x i32> %730, i32 0
>  %733 = and i32 %732, %731
>  %734 = insertelement <4 x i32> %730, i32 %733, i32 0
>  %735 = fdiv float %723, %725, !fpmath !1
>  %736 = fdiv float %724, %725, !fpmath !1
>  %737 = bitcast float %735 to i32
>  %738 = bitcast float %736 to i32
>  %739 = insertelement <2 x i32> undef, i32 %737, i32 0
>  %740 = insertelement <2 x i32> %739, i32 %738, i32 1
>  %741 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %740, <8 x i32> %727, <4 x i32> %734, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %742 = extractelement <4 x float> %741, i32 3
>  %743 = fmul float %742, %742
>  %744 = fadd float %713, %43
>  %745 = fadd float %714, %44
>  %746 = fadd float %715, %45
>  %747 = fmul float %744, 5.000000e-01
>  %748 = fmul float %745, 5.000000e-01
>  %749 = fmul float %746, 5.000000e-01
>  %750 = fmul float %747, %747
>  %751 = fmul float %748, %748
>  %752 = fadd float %751, %750
>  %753 = fmul float %749, %749
>  %754 = fadd float %752, %753
>  %755 = call float @llvm.sqrt.f32(float %754)
>  %756 = fdiv float 1.000000e+00, %755, !fpmath !1
>  %757 = fmul float %747, %756
>  %758 = fmul float %748, %756
>  %759 = fmul float %749, %756
>  %760 = fmul float %713, %60
>  %761 = fmul float %714, %62
>  %762 = fadd float %761, %760
>  %763 = fmul float %715, %64
>  %764 = fadd float %762, %763
>  %765 = call float @llvm.AMDGPU.clamp.(float %764, float 0.000000e+00, float 1.000000e+00)
>  %766 = fadd float %721, -5.000000e-01
>  %767 = fmul float %766, 2.000000e+00
>  %768 = fsub float 1.000000e+00, %767
>  %769 = call float @llvm.AMDGPU.clamp.(float %768, float 0.000000e+00, float 1.000000e+00)
>  %770 = fmul float %743, %769
>  %771 = call float @llvm.AMDGPU.clamp.(float %722, float 0.000000e+00, float 1.000000e+00)
>  %772 = fmul float %770, %771
>  %773 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %774 = load <16 x i8>, <16 x i8> addrspace(2)* %773, align 16, !invariant.load !0
>  %775 = call float @llvm.SI.load.const(<16 x i8> %774, i32 336)
>  %776 = fmul float %775, %772
>  %777 = call float @llvm.SI.load.const(<16 x i8> %774, i32 340)
>  %778 = fmul float %777, %772
>  %779 = call float @llvm.SI.load.const(<16 x i8> %774, i32 344)
>  %780 = fmul float %779, %772
>  %781 = fmul float %765, %776
>  %782 = fmul float %765, %778
>  %783 = fmul float %765, %780
>  %784 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %785 = load <16 x i8>, <16 x i8> addrspace(2)* %784, align 16, !invariant.load !0
>  %786 = call float @llvm.SI.load.const(<16 x i8> %785, i32 416)
>  %787 = call float @llvm.SI.load.const(<16 x i8> %785, i32 420)
>  %788 = call float @llvm.SI.load.const(<16 x i8> %785, i32 424)
>  %789 = fmul float %786, 0x3FD55553E0000000
>  %790 = fmul float %787, 0x3FD55553E0000000
>  %791 = fadd float %790, %789
>  %792 = fmul float %788, 0x3FD55553E0000000
>  %793 = fadd float %791, %792
>  %794 = fsub float 1.000000e+00, %793
>  %795 = call float @llvm.AMDGPU.clamp.(float %794, float 0.000000e+00, float 1.000000e+00)
>  %796 = fmul float %781, %795
>  %797 = fadd float %796, %.010
>  %798 = fmul float %782, %795
>  %799 = fadd float %798, %.011
>  %800 = fmul float %783, %795
>  %801 = fadd float %800, %.012
>  %802 = fmul float %713, %757
>  %803 = fmul float %714, %758
>  %804 = fadd float %803, %802
>  %805 = fmul float %715, %759
>  %806 = fadd float %804, %805
>  %807 = call float @llvm.AMDGPU.clamp.(float %806, float 0.000000e+00, float 1.000000e+00)
>  %808 = fsub float 1.000000e+00, %807
>  %809 = call float @llvm.pow.f32(float %808, float 5.000000e+00)
>  %810 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %811 = load <16 x i8>, <16 x i8> addrspace(2)* %810, align 16, !invariant.load !0
>  %812 = call float @llvm.SI.load.const(<16 x i8> %811, i32 416)
>  %813 = fsub float 1.000000e+00, %812
>  %814 = call float @llvm.SI.load.const(<16 x i8> %811, i32 420)
>  %815 = fsub float 1.000000e+00, %814
>  %816 = call float @llvm.SI.load.const(<16 x i8> %811, i32 424)
>  %817 = fsub float 1.000000e+00, %816
>  %818 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %819 = load <16 x i8>, <16 x i8> addrspace(2)* %818, align 16, !invariant.load !0
>  %820 = call float @llvm.SI.load.const(<16 x i8> %819, i32 416)
>  %821 = fmul float %809, %813
>  %822 = fadd float %821, %820
>  %823 = call float @llvm.SI.load.const(<16 x i8> %819, i32 420)
>  %824 = fmul float %809, %815
>  %825 = fadd float %824, %823
>  %826 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %827 = load <16 x i8>, <16 x i8> addrspace(2)* %826, align 16, !invariant.load !0
>  %828 = call float @llvm.SI.load.const(<16 x i8> %827, i32 424)
>  %829 = fmul float %809, %817
>  %830 = fadd float %829, %828
>  %831 = fmul float %781, %822
>  %832 = fmul float %782, %825
>  %833 = fmul float %783, %830
>  %834 = fadd float %250, 2.000000e+00
>  %835 = fmul float %834, 2.500000e-01
>  %836 = fmul float %250, -5.000000e-01
>  %837 = call float @llvm.exp2.f32(float %836)
>  %838 = fsub float 2.000000e+00, %837
>  %839 = fdiv float 1.000000e+00, %838, !fpmath !1
>  %840 = fmul float %835, %839
>  %841 = fmul float %831, %840
>  %842 = fmul float %832, %840
>  %843 = fmul float %833, %840
>  %844 = fmul float %60, %757
>  %845 = fmul float %62, %758
>  %846 = fadd float %845, %844
>  %847 = fmul float %64, %759
>  %848 = fadd float %846, %847
>  %849 = call float @llvm.AMDGPU.clamp.(float %848, float 0.000000e+00, float 1.000000e+00)
>  %850 = call float @llvm.pow.f32(float %849, float %250)
>  %851 = fmul float %841, %850
>  %852 = fmul float %842, %850
>  %853 = fmul float %843, %850
>  %854 = fmul float %43, %60
>  %855 = fmul float %44, %62
>  %856 = fadd float %855, %854
>  %857 = fmul float %45, %64
>  %858 = fadd float %856, %857
>  %859 = call float @llvm.AMDGPU.clamp.(float %858, float 0.000000e+00, float 1.000000e+00)
>  %860 = call float @llvm.maxnum.f32(float %765, float %859)
>  %861 = fadd float %860, 0x3EE4F8B580000000
>  %862 = fdiv float 1.000000e+00, %861, !fpmath !1
>  %863 = fmul float %851, %862
>  %864 = fmul float %852, %862
>  %865 = fmul float %853, %862
>  %866 = fmul float %863, %98
>  %867 = fadd float %866, %.0
>  %868 = fmul float %864, %98
>  %869 = fadd float %868, %.07
>  %870 = fmul float %865, %98
>  %871 = fadd float %870, %.08
>  %872 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %873 = load <16 x i8>, <16 x i8> addrspace(2)* %872, align 16, !invariant.load !0
>  %874 = call float @llvm.SI.load.const(<16 x i8> %873, i32 432)
>  %875 = fmul float %797, %874
>  %876 = fadd float %875, %867
>  %877 = call float @llvm.SI.load.const(<16 x i8> %873, i32 436)
>  %878 = fmul float %799, %877
>  %879 = fadd float %878, %869
>  %880 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %881 = load <16 x i8>, <16 x i8> addrspace(2)* %880, align 16, !invariant.load !0
>  %882 = call float @llvm.SI.load.const(<16 x i8> %881, i32 440)
>  %883 = fmul float %801, %882
>  %884 = fadd float %883, %871
>  %885 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %886 = call float @llvm.SI.load.const(<16 x i8> %881, i32 12)
>  %887 = fsub float %885, %886
>  %888 = call float @llvm.maxnum.f32(float %887, float 0.000000e+00)
>  %889 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %890 = load <16 x i8>, <16 x i8> addrspace(2)* %889, align 16, !invariant.load !0
>  %891 = call float @llvm.SI.load.const(<16 x i8> %890, i32 28)
>  %892 = call float @llvm.SI.load.const(<16 x i8> %890, i32 12)
>  %893 = fsub float %891, %892
>  %894 = fadd float %893, 0x3F50624DE0000000
>  %895 = fdiv float 1.000000e+00, %894, !fpmath !1
>  %896 = fmul float %888, %895
>  %897 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %898 = load <16 x i8>, <16 x i8> addrspace(2)* %897, align 16, !invariant.load !0
>  %899 = call float @llvm.SI.load.const(<16 x i8> %898, i32 28)
>  %900 = call float @llvm.floor.f32(float %899)
>  %901 = fsub float %899, %900
>  %902 = fmul float %901, 8.000000e+00
>  %903 = call float @llvm.pow.f32(float %896, float %902)
>  %904 = call float @llvm.AMDGPU.clamp.(float %903, float 0.000000e+00, float 1.000000e+00)
>  %905 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %906 = fmul float %905, %904
>  %907 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %908 = load <16 x i8>, <16 x i8> addrspace(2)* %907, align 16, !invariant.load !0
>  %909 = call float @llvm.SI.load.const(<16 x i8> %908, i32 32)
>  %910 = fsub float 1.000000e+00, %906
>  %911 = fmul float %876, %906
>  %912 = fmul float %909, %910
>  %913 = fadd float %911, %912
>  %914 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %915 = load <16 x i8>, <16 x i8> addrspace(2)* %914, align 16, !invariant.load !0
>  %916 = call float @llvm.SI.load.const(<16 x i8> %915, i32 36)
>  %917 = fsub float 1.000000e+00, %906
>  %918 = fmul float %879, %906
>  %919 = fmul float %916, %917
>  %920 = fadd float %918, %919
>  %921 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %922 = load <16 x i8>, <16 x i8> addrspace(2)* %921, align 16, !invariant.load !0
>  %923 = call float @llvm.SI.load.const(<16 x i8> %922, i32 40)
>  %924 = fsub float 1.000000e+00, %906
>  %925 = fmul float %884, %906
>  %926 = fmul float %923, %924
>  %927 = fadd float %925, %926
>  %928 = bitcast float %5 to i32
>  %929 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %928, 10
>  %930 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %929, float %913, 11
>  %931 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %930, float %920, 12
>  %932 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %931, float %927, 13
>  %933 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %932, float %67, 14
>  %934 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %933, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %934
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[10:13], v4, s[4:7], 0 idxen   ; E00C2000 80010A04
>	buffer_load_format_xyzw v[14:17], v5, s[12:15], 0 idxen ; E00C2000 80030E05
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x38c                   ; C20380FF 0000038C
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v17, s4                                   ; 7E220204
>	v_mov_b32_e32 v18, s5                                   ; 7E240205
>	v_mov_b32_e32 v19, s6                                   ; 7E260206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x2c                    ; C202012C
>	s_buffer_load_dword s5, s[0:3], 0x2d                    ; C202812D
>	s_buffer_load_dword s6, s[0:3], 0x2e                    ; C203012E
>	s_buffer_load_dword s7, s[0:3], 0x2f                    ; C203812F
>	s_buffer_load_dword s8, s[0:3], 0x30                    ; C2040130
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v3, s4                                    ; 7E060204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x31                    ; C2020131
>	s_buffer_load_dword s5, s[0:3], 0x32                    ; C2028132
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v20, s7, v17                              ; 08282207
>	v_mov_b32_e32 v5, s8                                    ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x33                    ; C2030133
>	s_buffer_load_dword s7, s[0:3], 0x34                    ; C2038134
>	s_buffer_load_dword s8, s[0:3], 0x35                    ; C2040135
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v6, s4                                    ; 7E0C0204
>	v_mov_b32_e32 v4, s5                                    ; 7E080205
>	s_buffer_load_dword s4, s[0:3], 0x36                    ; C2020136
>	s_buffer_load_dword s5, s[0:3], 0x37                    ; C2028137
>	v_sub_f32_e32 v21, s6, v18                              ; 082A2406
>	v_mov_b32_e32 v8, s7                                    ; 7E100207
>	v_mov_b32_e32 v9, s8                                    ; 7E120208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v7, s4                                    ; 7E0E0204
>	v_sub_f32_e32 v22, s5, v19                              ; 082C2605
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s14, 0xb0                                    ; B00E00B0
>	s_movk_i32 s13, 0xb8                                    ; B00D00B8
>	s_movk_i32 s15, 0xbc                                    ; B00F00BC
>	s_movk_i32 s12, 0xb4                                    ; B00C00B4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[27:30], v7, s[4:7], 0 idxen   ; E00C2000 80011B07
>	s_buffer_load_dword s4, s[0:3], 0x390                   ; C20200FF 00000390
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v27                               ; 7E00111B
>	v_mul_lo_i32 v7, v0, 48                                 ; D2D60007 00016100
>	v_add_i32_e32 v0, vcc, s14, v7                          ; 4A000E0E
>	v_add_i32_e32 v4, vcc, s13, v7                          ; 4A080E0D
>	v_add_i32_e32 v5, vcc, s15, v7                          ; 4A0A0E0F
>	v_add_i32_e32 v1, vcc, s12, v7                          ; 4A020E0C
>	buffer_load_dword v3, v0, s[0:3], 0 offen               ; E0301000 80000300
>	buffer_load_dword v0, v4, s[0:3], 0 offen               ; E0301000 80000004
>	buffer_load_dword v4, v5, s[0:3], 0 offen               ; E0301000 80000405
>	buffer_load_dword v1, v1, s[0:3], 0 offen               ; E0301000 80000101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v17, v4                           ; 0A280911
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0xcc, v7                         ; 4A0A0EFF 000000CC
>	v_add_i32_e32 v21, vcc, 0xdc, v7                        ; 4A2A0EFF 000000DC
>	v_add_i32_e32 v4, vcc, 0xc0, v7                         ; 4A080EFF 000000C0
>	v_add_i32_e32 v8, vcc, 0xc8, v7                         ; 4A100EFF 000000C8
>	v_add_i32_e32 v6, vcc, 0xc4, v7                         ; 4A0C0EFF 000000C4
>	v_add_i32_e32 v9, vcc, 0xd4, v7                         ; 4A120EFF 000000D4
>	buffer_load_dword v22, v5, s[0:3], 0 offen              ; E0301000 80001605
>	buffer_load_dword v5, v4, s[0:3], 0 offen               ; E0301000 80000504
>	buffer_load_dword v4, v8, s[0:3], 0 offen               ; E0301000 80000408
>	v_add_i32_e32 v8, vcc, 0xd0, v7                         ; 4A100EFF 000000D0
>	v_add_i32_e32 v7, vcc, 0xd8, v7                         ; 4A0E0EFF 000000D8
>	buffer_load_dword v23, v21, s[0:3], 0 offen             ; E0301000 80001715
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v21, v18, v22                          ; 0A2A2D12
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v22, v19, v23                          ; 0A2C2F13
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v4, v28                               ; 7E08111C
>	s_movk_i32 s8, 0xc8                                     ; B00800C8
>	s_movk_i32 s11, 0xcc                                    ; B00B00CC
>	v_add_i32_e32 v8, vcc, s8, v7                           ; 4A100E08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[23:26], v6, s[4:7], 0 idxen   ; E00C2000 80011706
>	s_movk_i32 s4, 0xdc                                     ; B00400DC
>	v_add_i32_e32 v9, vcc, s4, v7                           ; 4A120E04
>	s_movk_i32 s10, 0xc0                                    ; B00A00C0
>	s_movk_i32 s9, 0xc4                                     ; B00900C4
>	v_mul_lo_i32 v27, v4, 48                                ; D2D6001B 00016104
>	v_add_i32_e32 v4, vcc, s11, v7                          ; 4A080E0B
>	s_movk_i32 s6, 0xd4                                     ; B00600D4
>	s_movk_i32 s7, 0xd0                                     ; B00700D0
>	s_movk_i32 s5, 0xd8                                     ; B00500D8
>	v_add_i32_e32 v5, vcc, s10, v7                          ; 4A0A0E0A
>	v_add_i32_e32 v6, vcc, s9, v7                           ; 4A0C0E09
>	v_add_i32_e32 v22, vcc, s6, v7                          ; 4A2C0E06
>	buffer_load_dword v21, v4, s[0:3], 0 offen              ; E0301000 80001504
>	v_add_i32_e32 v4, vcc, s7, v7                           ; 4A080E07
>	v_add_i32_e32 v7, vcc, s5, v7                           ; 4A0E0E05
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v28, v4, s[0:3], 0 offen              ; E0301000 80001C04
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v3, v23, v3                               ; 10060717
>	v_mul_f32_e32 v1, v23, v1                               ; 10020317
>	v_mul_f32_e32 v0, v23, v0                               ; 10000117
>	v_mul_f32_e32 v20, v23, v20                             ; 10282917
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v31, v19, v9                           ; 0A3E1313
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v4, v23, v8                               ; 10081117
>	v_subrev_f32_e32 v8, v18, v21                           ; 0A102B12
>	v_mul_f32_e32 v21, v23, v8                              ; 102A1117
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v5, v23, v5                               ; 100A0B17
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v6, v23, v6                               ; 100C0D17
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v9, v23, v22                              ; 10122D17
>	v_mul_f32_e32 v8, v23, v28                              ; 10103917
>	v_mul_f32_e32 v7, v23, v7                               ; 100E0F17
>	v_mul_f32_e32 v22, v23, v31                             ; 102C3F17
>	v_add_i32_e32 v23, vcc, s15, v27                        ; 4A2E360F
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v17, v23                          ; 0A2E2F11
>	v_mac_f32_e32 v20, v24, v23                             ; 3E282F18
>	v_add_i32_e32 v23, vcc, s11, v27                        ; 4A2E360B
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v18, v23                          ; 0A2E2F12
>	v_mac_f32_e32 v21, v24, v23                             ; 3E2A2F18
>	v_add_i32_e32 v23, vcc, s14, v27                        ; 4A2E360E
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v24, v23                              ; 3E062F18
>	v_add_i32_e32 v23, vcc, s12, v27                        ; 4A2E360C
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_buffer_load_dword s12, s[0:3], 0x394                  ; C20600FF 00000394
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v24, v23                              ; 3E022F18
>	v_add_i32_e32 v23, vcc, s13, v27                        ; 4A2E360D
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v24, v23                              ; 3E002F18
>	v_add_i32_e32 v23, vcc, s10, v27                        ; 4A2E360A
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v24, v23                              ; 3E0A2F18
>	v_add_i32_e32 v23, vcc, s9, v27                         ; 4A2E3609
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v24, v23                              ; 3E0C2F18
>	v_add_i32_e32 v23, vcc, s8, v27                         ; 4A2E3608
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v24, v23                              ; 3E082F18
>	v_add_i32_e32 v23, vcc, s7, v27                         ; 4A2E3607
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v24, v23                              ; 3E102F18
>	v_add_i32_e32 v23, vcc, s6, v27                         ; 4A2E3606
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v24, v23                              ; 3E122F18
>	v_add_i32_e32 v23, vcc, s5, v27                         ; 4A2E3605
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v24, v23                              ; 3E0E2F18
>	v_add_i32_e32 v23, vcc, s4, v27                         ; 4A2E3604
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v19, v23                          ; 0A2E2F13
>	v_mac_f32_e32 v22, v24, v23                             ; 3E2C2F18
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v29                              ; 7E2E111D
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0xb0, v23                       ; 4A302EFF 000000B0
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v25, v24                              ; 3E063119
>	v_add_i32_e32 v24, vcc, 0xbc, v23                       ; 4A302EFF 000000BC
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v17, v24                          ; 0A303111
>	v_mac_f32_e32 v20, v25, v24                             ; 3E283119
>	v_add_i32_e32 v24, vcc, s11, v23                        ; 4A302E0B
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v18, v24                          ; 0A303112
>	v_mac_f32_e32 v21, v25, v24                             ; 3E2A3119
>	v_add_i32_e32 v24, vcc, 0xb4, v23                       ; 4A302EFF 000000B4
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v25, v24                              ; 3E023119
>	v_add_i32_e32 v24, vcc, 0xb8, v23                       ; 4A302EFF 000000B8
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v25, v24                              ; 3E003119
>	v_add_i32_e32 v24, vcc, s10, v23                        ; 4A302E0A
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v25, v24                              ; 3E0A3119
>	v_add_i32_e32 v24, vcc, s9, v23                         ; 4A302E09
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v25, v24                              ; 3E0C3119
>	v_add_i32_e32 v24, vcc, s8, v23                         ; 4A302E08
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v25, v24                              ; 3E083119
>	v_add_i32_e32 v24, vcc, s7, v23                         ; 4A302E07
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v25, v24                              ; 3E103119
>	v_add_i32_e32 v24, vcc, s6, v23                         ; 4A302E06
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v25, v24                              ; 3E123119
>	v_add_i32_e32 v24, vcc, s5, v23                         ; 4A302E05
>	v_add_i32_e32 v23, vcc, s4, v23                         ; 4A2E2E04
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v19, v23                          ; 0A2E2F13
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v25, v24                              ; 3E0E3119
>	v_mac_f32_e32 v22, v25, v23                             ; 3E2C2F19
>	s_buffer_load_dword s4, s[0:3], 0x398                   ; C20200FF 00000398
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v30                              ; 7E2E111E
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0xb0, v23                       ; 4A302EFF 000000B0
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v24                              ; 3E06311A
>	v_add_i32_e32 v24, vcc, 0xbc, v23                       ; 4A302EFF 000000BC
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v17, v24                          ; 0A303111
>	v_mac_f32_e32 v20, v26, v24                             ; 3E28311A
>	v_add_i32_e32 v24, vcc, 0xcc, v23                       ; 4A302EFF 000000CC
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v18, v24                          ; 0A303112
>	v_mac_f32_e32 v21, v26, v24                             ; 3E2A311A
>	v_add_i32_e32 v24, vcc, 0xb4, v23                       ; 4A302EFF 000000B4
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v24                              ; 3E02311A
>	v_add_i32_e32 v24, vcc, 0xb8, v23                       ; 4A302EFF 000000B8
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v24                              ; 3E00311A
>	v_add_i32_e32 v24, vcc, 0xc0, v23                       ; 4A302EFF 000000C0
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v24                              ; 3E0A311A
>	v_add_i32_e32 v24, vcc, 0xc4, v23                       ; 4A302EFF 000000C4
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v24                              ; 3E0C311A
>	v_add_i32_e32 v24, vcc, 0xc8, v23                       ; 4A302EFF 000000C8
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v24                              ; 3E08311A
>	v_add_i32_e32 v24, vcc, 0xd0, v23                       ; 4A302EFF 000000D0
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v26, v24                              ; 3E10311A
>	v_add_i32_e32 v24, vcc, 0xd4, v23                       ; 4A302EFF 000000D4
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v26, v24                              ; 3E12311A
>	v_add_i32_e32 v24, vcc, 0xd8, v23                       ; 4A302EFF 000000D8
>	v_add_i32_e32 v23, vcc, 0xdc, v23                       ; 4A2E2EFF 000000DC
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v19, v23                          ; 0A2E2F13
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v24                              ; 3E0E311A
>	v_mac_f32_e32 v22, v26, v23                             ; 3E2C2F1A
>	v_mul_f32_e32 v23, v1, v11                              ; 102E1701
>	v_mac_f32_e32 v23, v3, v10                              ; 3E2E1503
>	v_mac_f32_e32 v23, v0, v12                              ; 3E2E1900
>	v_mac_f32_e32 v23, v20, v13                             ; 3E2E1B14
>	v_mul_f32_e32 v20, v6, v11                              ; 10281706
>	v_mac_f32_e32 v20, v5, v10                              ; 3E281505
>	v_mac_f32_e32 v20, v4, v12                              ; 3E281904
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mac_f32_e32 v20, v21, v13                             ; 3E281B15
>	v_mul_f32_e32 v21, v9, v11                              ; 102A1709
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	v_mac_f32_e32 v21, v8, v10                              ; 3E2A1508
>	v_mul_f32_e32 v11, 0, v11                               ; 10161680
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	v_mac_f32_e32 v21, v7, v12                              ; 3E2A1907
>	v_mac_f32_e32 v11, 0, v10                               ; 3E161480
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s20, s[0:3], 0x14                   ; C20A0114
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_add_f32_e32 v12, v17, v23                             ; 06182F11
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	s_buffer_load_dword s21, s[0:3], 0x15                   ; C20A8115
>	v_mac_f32_e32 v21, v22, v13                             ; 3E2A1B16
>	v_add_f32_e32 v10, v13, v11                             ; 0614170D
>	v_add_f32_e32 v13, v18, v20                             ; 061A2912
>	v_add_f32_e32 v14, v14, v14                             ; 061C1D0E
>	v_mad_f32 v11, 2.0, v16, -1.0                           ; D282000B 03CE20F4
>	v_add_f32_e32 v16, v19, v21                             ; 06202B13
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v19, s6, v12                              ; 10261806
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	v_mul_f32_e32 v20, s7, v12                              ; 10281807
>	v_mac_f32_e32 v19, s10, v13                             ; 3E261A0A
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	v_mad_f32 v15, 2.0, v15, -1.0                           ; D282000F 03CE1EF4
>	v_mad_f32 v3, v14, v3, -v3                              ; D2820003 840E070E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	v_mul_f32_e32 v17, s4, v12                              ; 10221804
>	v_mac_f32_e32 v3, v1, v15                               ; 3E061F01
>	v_mad_f32 v1, v14, v5, -v5                              ; D2820001 84160B0E
>	v_mac_f32_e32 v19, s14, v16                             ; 3E26200E
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	v_mul_f32_e32 v18, s5, v12                              ; 10241805
>	v_mac_f32_e32 v1, v6, v15                               ; 3E021F06
>	v_mac_f32_e32 v19, s18, v10                             ; 3E261412
>	v_mov_b32_e32 v6, s20                                   ; 7E0C0214
>	v_mac_f32_e32 v17, s8, v13                              ; 3E221A08
>	v_mac_f32_e32 v18, s9, v13                              ; 3E241A09
>	v_mac_f32_e32 v20, s11, v13                             ; 3E281A0B
>	v_mac_f32_e32 v6, s21, v19                              ; 3E0C2615
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v17, s12, v16                             ; 3E22200C
>	v_mac_f32_e32 v18, s13, v16                             ; 3E24200D
>	v_mac_f32_e32 v20, s15, v16                             ; 3E28200F
>	v_add_f32_e64 v6, v6, 0 clamp                           ; D2060806 00010106
>	s_buffer_load_dword s22, s[0:3], 0x16                   ; C20B0116
>	v_log_f32_e32 v6, v6                                    ; 7E0C4F06
>	s_buffer_load_dword s23, s[0:3], 0x17                   ; C20B8117
>	v_mac_f32_e32 v17, s16, v10                             ; 3E221410
>	v_mac_f32_e32 v18, s17, v10                             ; 3E241411
>	v_mac_f32_e32 v20, s19, v10                             ; 3E281413
>	v_subrev_f32_e32 v10, s7, v12                           ; 0A141807
>	v_mul_f32_e32 v21, s4, v10                              ; 102A1404
>	s_buffer_load_dword s4, s[0:3], 0x1b                    ; C202011B
>	s_buffer_load_dword s27, s[0:3], 0x23                   ; C20D8123
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v6, s22, v6                        ; 0E0C0C16
>	s_buffer_load_dword s24, s[0:3], 0x20                   ; C20C0120
>	s_buffer_load_dword s25, s[0:3], 0x21                   ; C20C8121
>	s_buffer_load_dword s26, s[0:3], 0x22                   ; C20D0122
>	s_buffer_load_dword s31, s[0:3], 0x27                   ; C20F8127
>	v_mad_f32 v5, v14, v8, -v8                              ; D2820005 8422110E
>	s_buffer_load_dword s30, s[0:3], 0x26                   ; C20F0126
>	v_exp_f32_e32 v6, v6                                    ; 7E0C4B06
>	v_sub_f32_e64 v14, 1.0, s23                             ; D208000E 00002EF2
>	v_mac_f32_e32 v14, s23, v6                              ; 3E1C0C17
>	v_mul_f32_e32 v6, s4, v20                               ; 100C2804
>	s_buffer_load_dword s28, s[0:3], 0x24                   ; C20E0124
>	s_buffer_load_dword s29, s[0:3], 0x25                   ; C20E8125
>	s_buffer_load_dword s32, s[0:3], 0x28                   ; C2100128
>	s_buffer_load_dword s33, s[0:3], 0x29                   ; C2108129
>	s_buffer_load_dword s4, s[0:3], 0x2a                    ; C202012A
>	s_buffer_load_dword s0, s[0:3], 0x2b                    ; C200012B
>	v_mul_f32_e32 v22, s5, v10                              ; 102C1405
>	v_subrev_f32_e32 v23, s27, v13                          ; 0A2E1A1B
>	v_mul_f32_e32 v10, s6, v10                              ; 10141406
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v21, s24, v23                             ; 3E2A2E18
>	v_mac_f32_e32 v22, s25, v23                             ; 3E2C2E19
>	v_mac_f32_e32 v10, s26, v23                             ; 3E142E1A
>	v_subrev_f32_e32 v23, s31, v16                          ; 0A2E201F
>	v_mac_f32_e32 v10, s30, v23                             ; 3E142E1E
>	v_mac_f32_e32 v3, v0, v11                               ; 3E061700
>	v_mov_b32_e32 v0, s0                                    ; 7E000200
>	v_mac_f32_e32 v21, s28, v23                             ; 3E2A2E1C
>	v_mac_f32_e32 v22, s29, v23                             ; 3E2C2E1D
>	v_mul_f32_e32 v8, 0.5, v10                              ; 101014F0
>	v_mac_f32_e32 v5, v9, v15                               ; 3E0A1F09
>	v_mad_f32 v9, s32, v21, v8                              ; D2820009 04222A20
>	v_mac_f32_e32 v8, s33, v22                              ; 3E102C21
>	v_mac_f32_e32 v0, s4, v10                               ; 3E001404
>	exp 15, 32, 0, 0, 0, v12, v13, v16, v6                  ; F800020F 06100D0C
>	v_mac_f32_e32 v1, v4, v11                               ; 3E021704
>	v_mul_f32_e32 v4, v14, v14                              ; 10081D0E
>	exp 15, 33, 0, 0, 0, v9, v8, v0, v10                    ; F800021F 0A000809
>	v_mac_f32_e32 v5, v7, v11                               ; 3E0A1707
>	exp 15, 34, 0, 0, 0, v4, v0, v0, v0                     ; F800022F 00000004
>	exp 15, 35, 0, 0, 0, v3, v1, v5, v0                     ; F800023F 00050103
>	exp 15, 12, 0, 1, 0, v17, v18, v19, v20                 ; F80008CF 14131211
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2144 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[12:13], exec                                        ; BE8C047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	v_mov_b32_e32 v0, v2                                            ; 7E000302
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v10, v0, 0, 0, [m0]                             ; C8280000
>	v_interp_p2_f32 v10, [v10], v3, 0, 0, [m0]                      ; C8290003
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s6, s[0:3], 0x0                             ; C2030100
>	s_buffer_load_dword s7, s[0:3], 0x1                             ; C2038101
>	s_buffer_load_dword s8, s[0:3], 0x2                             ; C2040102
>	v_interp_p1_f32 v1, v0, 1, 0, [m0]                              ; C8040100
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                        ; C8050103
>	v_interp_p1_f32 v11, v0, 2, 0, [m0]                             ; C82C0200
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v12, s6, v10                                      ; 08181406
>	v_sub_f32_e32 v26, s7, v1                                       ; 08340207
>	v_mul_f32_e32 v2, v12, v12                                      ; 1004190C
>	v_interp_p2_f32 v11, [v11], v3, 2, 0, [m0]                      ; C82D0203
>	v_sub_f32_e32 v29, s8, v11                                      ; 083A1608
>	v_mac_f32_e32 v2, v26, v26                                      ; 3E04351A
>	v_mac_f32_e32 v2, v29, v29                                      ; 3E043B1D
>	v_rsq_f32_e32 v30, v2                                           ; 7E3C5D02
>	v_interp_p1_f32 v2, v4, 0, 3, [m0]                              ; C8080C04
>	v_interp_p2_f32 v2, [v2], v5, 0, 3, [m0]                        ; C8090C05
>	v_interp_p1_f32 v14, v4, 1, 3, [m0]                             ; C8380D04
>	v_interp_p2_f32 v14, [v14], v5, 1, 3, [m0]                      ; C8390D05
>	v_interp_p1_f32 v4, v4, 2, 3, [m0]                              ; C8100E04
>	v_interp_p2_f32 v4, [v4], v5, 2, 3, [m0]                        ; C8110E05
>	v_mul_f32_e32 v5, v2, v2                                        ; 100A0502
>	v_mac_f32_e32 v5, v14, v14                                      ; 3E0A1D0E
>	v_mac_f32_e32 v5, v4, v4                                        ; 3E0A0904
>	v_rsq_f32_e32 v15, v5                                           ; 7E1E5D05
>	s_buffer_load_dword s36, s[0:3], 0x11                           ; C2120111
>	s_buffer_load_dword s37, s[0:3], 0x12                           ; C2128112
>	s_buffer_load_dword s47, s[0:3], 0x10                           ; C2178110
>	s_buffer_load_dword s38, s[0:3], 0x14                           ; C2130114
>	s_buffer_load_dword s39, s[0:3], 0x15                           ; C2138115
>	s_buffer_load_dword s40, s[0:3], 0x16                           ; C2140116
>	s_buffer_load_dword s41, s[0:3], 0x18                           ; C2148118
>	s_buffer_load_dword s42, s[0:3], 0x19                           ; C2150119
>	s_buffer_load_dword s43, s[0:3], 0x1a                           ; C215811A
>	v_mul_f32_e32 v6, v15, v2                                       ; 100C050F
>	v_mul_f32_e32 v5, v15, v14                                      ; 100A1D0F
>	v_mov_b32_e32 v14, 0x403b800a                                   ; 7E1C02FF 403B800A
>	s_buffer_load_dword s44, s[0:3], 0x1c                           ; C216011C
>	s_buffer_load_dword s45, s[0:3], 0x1d                           ; C216811D
>	s_buffer_load_dword s46, s[0:3], 0x1e                           ; C217011E
>	v_mul_f32_e32 v2, v15, v4                                       ; 1004090F
>	v_mad_f32 v15, v14, v6, v10                                     ; D282000F 042A0D0E
>	v_mad_f32 v16, v14, v5, v1                                      ; D2820010 04060B0E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v18, s47, v15                                     ; 10241E2F
>	v_mul_f32_e32 v19, s36, v15                                     ; 10261E24
>	v_mul_f32_e32 v20, s37, v15                                     ; 10281E25
>	v_mac_f32_e32 v18, s38, v16                                     ; 3E242026
>	v_mad_f32 v14, v14, v2, v11                                     ; D282000E 042E050E
>	v_mac_f32_e32 v19, s39, v16                                     ; 3E262027
>	v_mac_f32_e32 v20, s40, v16                                     ; 3E282028
>	v_mac_f32_e32 v18, s41, v14                                     ; 3E241C29
>	v_mac_f32_e32 v19, s42, v14                                     ; 3E261C2A
>	v_mac_f32_e32 v20, s43, v14                                     ; 3E281C2B
>	v_mul_f32_e32 v9, v30, v12                                      ; 1012191E
>	v_add_f32_e32 v15, s44, v18                                     ; 061E242C
>	v_add_f32_e32 v14, s46, v20                                     ; 061C282E
>	v_add_f32_e32 v16, s45, v19                                     ; 0620262D
>	s_load_dwordx8 s[28:35], s[4:5], 0x0                            ; C0CE0500
>	s_load_dwordx4 s[44:47], s[4:5], 0xc                            ; C096050C
>	v_mul_f32_e32 v7, v30, v26                                      ; 100E351E
>	v_mul_f32_e32 v4, v9, v6                                        ; 10080D09
>	v_mul_f32_e32 v8, v30, v29                                      ; 10103B1E
>	v_mac_f32_e32 v4, v7, v5                                        ; 3E080B07
>	v_mac_f32_e32 v4, v8, v2                                        ; 3E080508
>	v_mul_f32_e32 v17, v6, v4                                       ; 10220906
>	v_mac_f32_e32 v17, v6, v4                                       ; 3E220906
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s44, s44, s35                                         ; 872C232C
>	s_buffer_load_dword s19, s[0:3], 0x4                            ; C2098104
>	image_sample_c v28, v[14:17], s[28:35], s[44:47] dmask:0x1      ; F0A00100 01671C0E
>	v_cubema_f32 v14, v6, v5, v2                                    ; D28E000E 040A0B06
>	s_buffer_load_dword s20, s[0:3], 0x5                            ; C20A0105
>	v_rcp_f32_e64 v15, |v14|                                        ; D354010F 0000010E
>	s_buffer_load_dword s27, s[0:3], 0x6                            ; C20D8106
>	v_mad_f32 v33, v12, v30, -v17                                   ; D2820021 84463D0C
>	v_mad_f32 v34, -v12, v30, v17                                   ; D2820022 24463D0C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v12, v12, v30, -s19                                   ; D282000C 804E3D0C
>	v_cubetc_f32 v16, v6, v5, v2                                    ; D28C0010 040A0B06
>	v_mov_b32_e32 v14, 0x3fc00000                                   ; 7E1C02FF 3FC00000
>	v_cubesc_f32 v18, v6, v5, v2                                    ; D28A0012 040A0B06
>	v_mad_f32 v19, v15, v16, v14                                    ; D2820013 043A210F
>	v_mad_f32 v18, v15, v18, v14                                    ; D2820012 043A250F
>	v_mad_f32 v15, v26, v30, -s20                                   ; D282000F 80523D1A
>	v_mul_f32_e32 v12, 0.5, v12                                     ; 101818F0
>	v_mad_f32 v16, v29, v30, -s27                                   ; D2820010 806E3D1D
>	v_mul_f32_e32 v15, 0.5, v15                                     ; 101E1EF0
>	v_mul_f32_e32 v17, v12, v12                                     ; 1022190C
>	v_mul_f32_e32 v16, 0.5, v16                                     ; 102020F0
>	v_mac_f32_e32 v17, v15, v15                                     ; 3E221F0F
>	v_mac_f32_e32 v17, v16, v16                                     ; 3E222110
>	v_rsq_f32_e32 v17, v17                                          ; 7E225D11
>	s_buffer_load_dword s52, s[0:3], 0x71                           ; C21A0171
>	v_mul_f32_e32 v31, v5, v4                                       ; 103E0905
>	v_mul_f32_e32 v32, v2, v4                                       ; 10400902
>	v_mul_f32_e32 v35, v17, v12                                     ; 10461911
>	v_mov_b32_e32 v12, 0x40c00000                                   ; 7E1802FF 40C00000
>	v_mul_f32_e32 v36, v17, v15                                     ; 10481F11
>	v_mul_f32_e32 v37, v17, v16                                     ; 104A2111
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v17, -s52, v12, v12                                   ; D2820011 24321834
>	v_add_f32_e64 v12, v4, 0 clamp                                  ; D206080C 00010104
>	v_sub_f32_e32 v15, 1.0, v12                                     ; 081E18F2
>	v_mac_f32_e32 v31, v5, v4                                       ; 3E3E0905
>	v_mac_f32_e32 v32, v2, v4                                       ; 3E400902
>	s_buffer_load_dword s7, s[0:3], 0x69                            ; C2038169
>	s_load_dwordx8 s[36:43], s[4:5], 0x10                           ; C0D20510
>	s_load_dwordx4 s[44:47], s[4:5], 0x1c                           ; C096051C
>	v_log_f32_e32 v15, v15                                          ; 7E1E4F0F
>	v_mad_f32 v38, -v26, v30, v31                                   ; D2820026 247E3D1A
>	v_mad_f32 v39, -v29, v30, v32                                   ; D2820027 24823D1D
>	v_cubema_f32 v16, v34, v38, v39                                 ; D28E0010 049E4D22
>	s_buffer_load_dword s6, s[0:3], 0x68                            ; C2030168
>	s_load_dwordx8 s[28:35], s[4:5], 0x20                           ; C0CE0520
>	s_load_dwordx4 s[48:51], s[4:5], 0x2c                           ; C098052C
>	v_rcp_f32_e64 v16, |v16|                                        ; D3540110 00000110
>	v_mov_b32_e32 v27, 0x40a00000                                   ; 7E3602FF 40A00000
>	v_mul_legacy_f32_e32 v15, v27, v15                              ; 0E1E1F1B
>	v_exp_f32_e32 v42, v15                                          ; 7E544B0F
>	v_cubetc_f32 v15, v34, v38, v39                                 ; D28C000F 049E4D22
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s44, s44, s43                                         ; 872C2B2C
>	v_cubeid_f32 v20, v6, v5, v2                                    ; D2880014 040A0B06
>	v_mov_b32_e32 v40, s7                                           ; 7E500207
>	v_cubesc_f32 v24, v34, v38, v39                                 ; D28A0018 049E4D22
>	image_sample v[19:22], v[18:21], s[36:43], s[44:47] dmask:0xf   ; F0800F00 01691312
>	v_mov_b32_e32 v18, s6                                           ; 7E240206
>	v_mad_f32 v15, v16, v15, v14                                    ; D282000F 043A1F10
>	v_mac_f32_e32 v14, v16, v24                                     ; 3E1C3110
>	v_max_f32_e32 v16, s52, v40                                     ; 20205034
>	v_max_f32_e32 v23, s52, v18                                     ; 202E2434
>	v_subrev_f32_e32 v45, s7, v16                                   ; 0A5A2007
>	s_and_b32 s48, s48, s35                                         ; 87302330
>	v_cubeid_f32 v16, v34, v38, v39                                 ; D2880010 049E4D22
>	v_subrev_f32_e32 v44, s6, v23                                   ; 0A582E06
>	image_sample_l v[23:25], v[14:17], s[28:35], s[48:51] dmask:0x7 ; F0900700 0187170E
>	v_mul_f32_e32 v14, s19, v35                                     ; 101C4613
>	v_mad_f32 v14, v36, -s20, -v14                                  ; D282000E C4382924
>	v_mad_f32 v14, -v37, s27, v14                                   ; D282000E 24383725
>	s_buffer_load_dword s8, s[0:3], 0x6a                            ; C204016A
>	v_add_f32_e64 v14, v14, 0 clamp                                 ; D206080E 0001010E
>	v_sub_f32_e32 v14, 1.0, v14                                     ; 081C1CF2
>	v_log_f32_e32 v14, v14                                          ; 7E1C4F0E
>	v_sub_f32_e32 v16, 1.0, v40                                     ; 082050F2
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v41, s8                                           ; 7E520208
>	v_max_f32_e32 v43, s52, v41                                     ; 20565234
>	v_mul_legacy_f32_e32 v14, v27, v14                              ; 0E1C1D1B
>	v_subrev_f32_e32 v15, s8, v43                                   ; 0A1E5608
>	v_mad_f32 v43, v44, v42, v18                                    ; D282002B 044A552C
>	v_mad_f32 v44, v45, v42, v40                                    ; D282002C 04A2552D
>	v_exp_f32_e32 v14, v14                                          ; 7E1C4B0E
>	v_mad_f32 v42, v15, v42, v41                                    ; D282002A 04A6550F
>	v_sub_f32_e32 v17, 1.0, v41                                     ; 082252F2
>	v_sub_f32_e32 v15, 1.0, v18                                     ; 081E24F2
>	v_mad_f32 v45, v15, v14, v18                                    ; D282002D 044A1D0F
>	v_mad_f32 v40, v16, v14, v40                                    ; D2820028 04A21D10
>	v_mad_f32 v41, v17, v14, v41                                    ; D2820029 04A61D11
>	v_mov_b32_e32 v14, 0x41100000                                   ; 7E1C02FF 41100000
>	v_mad_f32 v14, v14, s52, 2.0                                    ; D282000E 03D0690E
>	v_exp_f32_e32 v14, v14                                          ; 7E1C4B0E
>	v_mul_f32_e32 v18, -0.5, v14                                    ; 10241CF1
>	v_mul_f32_e32 v35, v35, v6                                      ; 10460D23
>	v_mac_f32_e32 v35, v36, v5                                      ; 3E460B24
>	v_exp_f32_e32 v18, v18                                          ; 7E244B12
>	s_buffer_load_dword s26, s[0:3], 0xc                            ; C20D010C
>	v_sub_f32_e32 v18, 2.0, v18                                     ; 082424F4
>	v_mac_f32_e32 v35, v37, v2                                      ; 3E460525
>	s_buffer_load_dword s24, s[0:3], 0xd                            ; C20C010D
>	s_buffer_load_dword s25, s[0:3], 0xe                            ; C20C810E
>	v_mul_f32_e32 v36, s19, v6                                      ; 10480C13
>	v_add_f32_e64 v35, v35, 0 clamp                                 ; D2060823 00010123
>	v_rcp_f32_e32 v18, v18                                          ; 7E245512
>	v_mad_f32 v36, v5, -s20, -v36                                   ; D2820024 C4902905
>	v_log_f32_e32 v35, v35                                          ; 7E464F23
>	v_add_f32_e32 v46, 2.0, v14                                     ; 065C1CF4
>	v_mad_f32 v36, -v2, s27, v36                                    ; D2820024 24903702
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mul_f32_e32 v28, v28, v28                                     ; 1038391C
>	v_mul_f32_e32 v46, 0x3e800000, v46                              ; 105C5CFF 3E800000
>	v_add_f32_e64 v36, v36, 0 clamp                                 ; D2060824 00010124
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v37, s26, v28                                     ; 104A381A
>	v_mul_f32_e32 v18, v18, v46                                     ; 10245D12
>	v_mul_f32_e32 v46, s24, v28                                     ; 105C3818
>	v_mul_f32_e32 v28, s25, v28                                     ; 10383819
>	v_mul_f32_e32 v37, v37, v36                                     ; 104A4925
>	v_mul_f32_e32 v47, v28, v36                                     ; 105E491C
>	v_mul_f32_e32 v28, v45, v37                                     ; 10384B2D
>	v_mul_legacy_f32_e32 v35, v14, v35                              ; 0E46470E
>	v_mul_f32_e32 v28, v18, v28                                     ; 10383912
>	v_exp_f32_e32 v35, v35                                          ; 7E464B23
>	v_mul_f32_e32 v46, v46, v36                                     ; 105C492E
>	v_mul_f32_e32 v45, v35, v28                                     ; 105A3923
>	v_max_f32_e32 v36, v12, v36                                     ; 2048490C
>	v_mov_b32_e32 v28, 0x3727c5ac                                   ; 7E3802FF 3727C5AC
>	v_add_f32_e32 v36, v28, v36                                     ; 0648491C
>	s_buffer_load_dword s23, s[0:3], 0x5d                           ; C20B815D
>	v_rcp_f32_e32 v36, v36                                          ; 7E485524
>	v_mul_f32_e32 v40, v40, v46                                     ; 10505D28
>	s_buffer_load_dword s18, s[0:3], 0x5c                           ; C209015C
>	v_mul_f32_e32 v40, v18, v40                                     ; 10505112
>	s_buffer_load_dword s21, s[0:3], 0x5e                           ; C20A815E
>	v_mul_f32_e32 v41, v41, v47                                     ; 10525F29
>	v_mul_f32_e32 v40, v35, v40                                     ; 10505123
>	s_buffer_load_dword s22, s[0:3], 0x5f                           ; C20B015F
>	v_mul_f32_e32 v40, v36, v40                                     ; 10505124
>	v_mul_f32_e32 v41, v18, v41                                     ; 10525312
>	s_buffer_load_dword s17, s[0:3], 0x61                           ; C2088161
>	v_mul_f32_e32 v35, v35, v41                                     ; 10465323
>	v_mul_f32_e32 v41, v36, v45                                     ; 10525B24
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mac_f32_e32 v40, v24, v44                                     ; 3E505918
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v24, s23, v5                                      ; 10300A17
>	s_buffer_load_dword s16, s[0:3], 0x60                           ; C2080160
>	v_mac_f32_e32 v24, s18, v6                                      ; 3E300C12
>	v_mac_f32_e32 v41, v23, v43                                     ; 3E525717
>	v_mul_f32_e32 v23, v5, v5                                       ; 102E0B05
>	s_buffer_load_dword s15, s[0:3], 0x62                           ; C2078162
>	s_buffer_load_dword s14, s[0:3], 0x63                           ; C2070163
>	v_mad_f32 v23, v6, v6, -v23                                     ; D2820017 845E0D06
>	v_mac_f32_e32 v24, s21, v2                                      ; 3E300415
>	v_mac_f32_e32 v24, s22, v23                                     ; 3E302E16
>	v_mul_f32_e32 v23, v2, v5                                       ; 102E0B02
>	v_mul_f32_e32 v19, v22, v19                                     ; 10262716
>	s_buffer_load_dword s9, s[0:3], 0x64                            ; C2048164
>	v_mul_f32_e32 v20, v22, v20                                     ; 10282916
>	v_mul_f32_e32 v21, v22, v21                                     ; 102A2B16
>	v_mad_f32 v22, v26, v30, -v31                                   ; D2820016 847E3D1A
>	v_mul_f32_e32 v23, s17, v23                                     ; 102E2E11
>	v_mul_f32_e32 v26, v5, v6                                       ; 10340D05
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v23, s16, v26                                     ; 3E2E3410
>	v_mul_f32_e32 v26, v6, v2                                       ; 10340506
>	v_mac_f32_e32 v23, s15, v26                                     ; 3E2E340F
>	v_mul_f32_e32 v26, v2, v2                                       ; 10340502
>	v_mac_f32_e32 v23, s14, v26                                     ; 3E2E340E
>	v_add_f32_e32 v23, v23, v24                                     ; 062E3117
>	v_add_f32_e32 v23, s9, v23                                      ; 062E2E09
>	v_mul_f32_e32 v23, 0x3fa66666, v23                              ; 102E2EFF 3FA66666
>	v_mul_f32_e32 v35, v36, v35                                     ; 10464724
>	v_add_f32_e64 v23, v23, 0 clamp                                 ; D2060817 00010117
>	v_mov_b32_e32 v24, 0xbf4ccccd                                   ; 7E3002FF BF4CCCCD
>	v_mac_f32_e32 v35, v25, v42                                     ; 3E465519
>	v_mad_f32 v25, v29, v30, -v32                                   ; D2820019 84823D1D
>	v_mad_f32 v29, v24, v23, 1.0                                    ; D282001D 03CA2F18
>	v_mov_b32_e32 v23, 0x3eaaaa9f                                   ; 7E2E02FF 3EAAAA9F
>	v_mul_f32_e32 v24, s6, v23                                      ; 10302E06
>	v_mac_f32_e32 v24, s7, v23                                      ; 3E302E07
>	v_mac_f32_e32 v24, s8, v23                                      ; 3E302E08
>	v_sub_f32_e32 v23, 1.0, v24                                     ; 082E30F2
>	v_add_f32_e64 v26, v23, 0 clamp                                 ; D206081A 00010117
>	v_mul_f32_e32 v19, 4.0, v19                                     ; 102626F6
>	v_mul_f32_e32 v19, v19, v26                                     ; 10263513
>	v_mul_f32_e32 v23, v26, v37                                     ; 102E4B1A
>	v_mac_f32_e32 v23, v29, v19                                     ; 3E2E271D
>	v_mul_f32_e32 v19, 4.0, v20                                     ; 102628F6
>	v_mul_f32_e32 v19, v19, v26                                     ; 10263513
>	v_mul_f32_e32 v24, v26, v46                                     ; 10305D1A
>	v_mac_f32_e32 v24, v29, v19                                     ; 3E30271D
>	v_mul_f32_e32 v19, 4.0, v21                                     ; 10262AF6
>	v_mul_f32_e32 v20, v19, v26                                     ; 10283513
>	v_mul_f32_e32 v19, v26, v47                                     ; 10265F1A
>	v_mac_f32_e32 v19, v29, v20                                     ; 3E26291D
>	v_mul_f32_e32 v20, v6, v33                                      ; 10284306
>	v_mac_f32_e32 v20, v5, v22                                      ; 3E282D05
>	v_mac_f32_e32 v20, v2, v25                                      ; 3E283302
>	v_sub_f32_e32 v4, 1.0, v4                                       ; 080808F2
>	v_add_f32_e32 v20, 1.0, v20                                     ; 062828F2
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	v_subrev_f32_e32 v4, v4, v20                                    ; 0A082904
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	v_sub_f32_e32 v20, 1.0, v4                                      ; 082808F2
>	v_mad_f32 v25, -v4, v20, v20                                    ; D2820019 24522904
>	v_mul_f32_e32 v20, s23, v38                                     ; 10284C17
>	v_mul_f32_e32 v4, v38, v38                                      ; 10084D26
>	v_mac_f32_e32 v20, s18, v34                                     ; 3E284412
>	v_mul_f32_e32 v21, v39, v38                                     ; 102A4D27
>	v_mad_f32 v4, v34, v34, -v4                                     ; D2820004 84124522
>	v_mac_f32_e32 v20, s21, v39                                     ; 3E284E15
>	v_mac_f32_e32 v20, s22, v4                                      ; 3E280816
>	v_mul_f32_e32 v4, v38, v34                                      ; 10084526
>	v_mul_f32_e32 v21, s17, v21                                     ; 102A2A11
>	v_mac_f32_e32 v21, s16, v4                                      ; 3E2A0810
>	v_mul_f32_e32 v4, v34, v39                                      ; 10084F22
>	v_mac_f32_e32 v21, s15, v4                                      ; 3E2A080F
>	v_mul_f32_e32 v4, v39, v39                                      ; 10084F27
>	v_mac_f32_e32 v21, s14, v4                                      ; 3E2A080E
>	v_add_f32_e32 v4, v21, v20                                      ; 06082915
>	s_buffer_load_dword s53, s[0:3], 0x70                           ; C21A8170
>	v_add_f32_e32 v4, s9, v4                                        ; 06080809
>	v_mov_b32_e32 v20, 0x3feccccd                                   ; 7E2802FF 3FECCCCD
>	v_madak_f32_e32 v4, v20, v4, 0xbe99999a                         ; 42080914 BE99999A
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	v_mad_f32 v4, -v4, v25, v25                                     ; D2820004 24663304
>	v_mul_f32_e32 v22, v4, v41                                      ; 102C5304
>	v_mul_f32_e32 v21, v4, v40                                      ; 102A5104
>	v_mul_f32_e32 v20, v4, v35                                      ; 10284704
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v4, s53                                           ; 7E080235
>	v_mov_b32_e32 v29, 0xc8                                         ; 7E3A02FF 000000C8
>	v_mov_b32_e32 v30, 0                                            ; 7E3C0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v31, vcc, 0xffffffe8, v29                         ; 4A3E3AFF FFFFFFE8
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v32, vcc, 0xffffffec, v29                         ; 4A403AFF FFFFFFEC
>	buffer_load_dword v32, v32, s[0:3], 0 offen                     ; E0301000 80002020
>	v_add_i32_e32 v33, vcc, -16, v29                                ; 4A423AD0
>	buffer_load_dword v33, v33, s[0:3], 0 offen                     ; E0301000 80002121
>	v_add_i32_e32 v39, vcc, -4, v29                                 ; 4A4E3AC4
>	buffer_load_dword v39, v39, s[0:3], 0 offen                     ; E0301000 80002727
>	buffer_load_dword v40, v29, s[0:3], 0 offen                     ; E0301000 8000281D
>	v_add_i32_e32 v30, vcc, 1, v30                                  ; 4A3C3C81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v31, v10, v31                                  ; 0A3E3F0A
>	v_mul_f32_e32 v34, v31, v31                                     ; 10443F1F
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v32, v1, v32                                   ; 0A404101
>	v_mac_f32_e32 v34, v32, v32                                     ; 3E444120
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v33, v11, v33                                  ; 0A42430B
>	v_mac_f32_e32 v34, v33, v33                                     ; 3E444321
>	v_rsq_f32_e32 v35, v34                                          ; 7E465D22
>	v_mul_f32_e32 v36, v35, v31                                     ; 10483F23
>	v_mad_f32 v31, v35, v31, v9                                     ; D282001F 04263F23
>	v_mul_f32_e32 v37, v35, v32                                     ; 104A4123
>	v_mad_f32 v32, v35, v32, v7                                     ; D2820020 041E4123
>	v_mul_f32_e32 v38, v35, v33                                     ; 104C4323
>	v_mad_f32 v33, v35, v33, v8                                     ; D2820021 04224323
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_add_i32_e32 v35, vcc, -12, v29                                ; 4A463ACC
>	buffer_load_dword v35, v35, s[0:3], 0 offen                     ; E0301000 80002323
>	v_mul_f32_e32 v31, 0.5, v31                                     ; 103E3EF0
>	v_mul_f32_e32 v32, 0.5, v32                                     ; 104040F0
>	v_mul_f32_e32 v33, 0.5, v33                                     ; 104242F0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_add_i32_e32 v35, vcc, -8, v29                                 ; 4A463AC8
>	buffer_load_dword v35, v35, s[0:3], 0 offen                     ; E0301000 80002323
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_mad_f32 v39, -v34, v39, v39                                   ; D2820027 249E4F22
>	v_add_i32_e32 v29, vcc, 32, v29                                 ; 4A3A3AA0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v35, -v34, v35, v35                                   ; D2820023 248E4722
>	v_mad_f32 v34, -v34, v40, v40                                   ; D2820022 24A25122
>	v_mul_f32_e32 v40, v31, v31                                     ; 10503F1F
>	v_mac_f32_e32 v40, v32, v32                                     ; 3E504120
>	v_mac_f32_e32 v40, v33, v33                                     ; 3E504321
>	v_rsq_f32_e32 v40, v40                                          ; 7E505D28
>	v_mul_f32_e32 v31, v40, v31                                     ; 103E3F28
>	v_mul_f32_e32 v32, v40, v32                                     ; 10404128
>	v_mul_f32_e32 v33, v40, v33                                     ; 10424328
>	v_mul_f32_e32 v40, v6, v36                                      ; 10504906
>	v_mul_f32_e32 v36, v31, v36                                     ; 1048491F
>	v_mac_f32_e32 v36, v32, v37                                     ; 3E484B20
>	v_mul_f32_e32 v31, v31, v6                                      ; 103E0D1F
>	v_mac_f32_e32 v36, v33, v38                                     ; 3E484D21
>	v_mac_f32_e32 v31, v32, v5                                      ; 3E3E0B20
>	v_add_f32_e64 v32, v36, 0 clamp                                 ; D2060820 00010124
>	v_sub_f32_e32 v32, 1.0, v32                                     ; 084040F2
>	v_log_f32_e32 v32, v32                                          ; 7E404F20
>	v_mac_f32_e32 v31, v33, v2                                      ; 3E3E0521
>	v_mac_f32_e32 v40, v5, v37                                      ; 3E504B05
>	v_add_f32_e64 v31, v31, 0 clamp                                 ; D206081F 0001011F
>	v_mul_legacy_f32_e32 v32, v27, v32                              ; 0E40411B
>	v_log_f32_e32 v31, v31                                          ; 7E3E4F1F
>	v_mac_f32_e32 v40, v2, v38                                      ; 3E504D02
>	v_add_f32_e64 v33, v40, 0 clamp                                 ; D2060821 00010128
>	v_exp_f32_e32 v32, v32                                          ; 7E404B20
>	v_mul_f32_e32 v35, v35, v33                                     ; 10464323
>	v_mad_f32 v36, v32, v15, s6                                     ; D2820024 001A1F20
>	v_mac_f32_e32 v23, v26, v35                                     ; 3E2E471A
>	v_mul_f32_e32 v35, v36, v35                                     ; 10464724
>	v_mul_f32_e32 v36, v39, v33                                     ; 10484327
>	v_mad_f32 v37, v32, v16, s7                                     ; D2820025 001E2120
>	v_mul_f32_e32 v34, v34, v33                                     ; 10444322
>	v_mad_f32 v32, v32, v17, s8                                     ; D2820020 00222320
>	v_mul_f32_e32 v32, v32, v34                                     ; 10404520
>	v_mul_legacy_f32_e32 v31, v14, v31                              ; 0E3E3F0E
>	v_mac_f32_e32 v24, v26, v36                                     ; 3E30491A
>	v_mul_f32_e32 v36, v37, v36                                     ; 10484925
>	v_mac_f32_e32 v19, v26, v34                                     ; 3E26451A
>	v_mul_f32_e32 v34, v18, v35                                     ; 10444712
>	v_exp_f32_e32 v31, v31                                          ; 7E3E4B1F
>	v_mul_f32_e32 v35, v18, v36                                     ; 10464912
>	v_mul_f32_e32 v32, v18, v32                                     ; 10404112
>	v_mul_f32_e32 v34, v31, v34                                     ; 1044451F
>	v_mul_f32_e32 v35, v31, v35                                     ; 1046471F
>	v_mul_f32_e32 v31, v31, v32                                     ; 103E411F
>	v_max_f32_e32 v32, v12, v33                                     ; 2040430C
>	v_add_f32_e32 v32, v28, v32                                     ; 0640411C
>	v_rcp_f32_e32 v32, v32                                          ; 7E405520
>	v_mul_f32_e32 v33, v32, v34                                     ; 10424520
>	v_mul_f32_e32 v34, v32, v35                                     ; 10444720
>	v_mul_f32_e32 v31, v32, v31                                     ; 103E3F20
>	v_mac_f32_e32 v22, v25, v33                                     ; 3E2C4319
>	v_mac_f32_e32 v21, v25, v34                                     ; 3E2A4519
>	v_mac_f32_e32 v20, v25, v31                                     ; 3E283F19
>	v_cmp_lt_i32_e32 vcc, 2, v30                                    ; 7D023C82
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s9, s[0:3], 0x47                            ; C2048147
>	s_buffer_load_dword s14, s[0:3], 0x4b                           ; C207014B
>	s_buffer_load_dword s15, s[0:3], 0x4f                           ; C207814F
>	s_buffer_load_dword s17, s[0:3], 0x53                           ; C2088153
>	s_buffer_load_dword s16, s[0:3], 0x52                           ; C2080152
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v27, s9, v10                                      ; 08361409
>	v_sub_f32_e32 v28, s14, v1                                      ; 0838020E
>	v_mul_f32_e32 v10, v27, v27                                     ; 1014371B
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_sub_f32_e32 v29, s15, v11                                     ; 083A160F
>	v_mac_f32_e32 v10, v28, v28                                     ; 3E14391C
>	v_interp_p1_f32 v35, v0, 2, 1, [m0]                             ; C88C0600
>	v_mac_f32_e32 v10, v29, v29                                     ; 3E143B1D
>	v_rsq_f32_e32 v30, v10                                          ; 7E3C5D0A
>	v_sqrt_f32_e32 v11, v10                                         ; 7E16670A
>	v_mov_b32_e32 v34, s17                                          ; 7E440211
>	v_interp_p2_f32 v35, [v35], v3, 2, 1, [m0]                      ; C88D0603
>	v_interp_p1_f32 v10, v0, 0, 1, [m0]                             ; C8280400
>	v_mac_f32_e32 v34, s16, v11                                     ; 3E441610
>	v_interp_p2_f32 v10, [v10], v3, 0, 1, [m0]                      ; C8290403
>	v_interp_p1_f32 v11, v0, 1, 1, [m0]                             ; C82C0500
>	v_interp_p2_f32 v11, [v11], v3, 1, 1, [m0]                      ; C82D0503
>	v_interp_p1_f32 v36, v0, 3, 1, [m0]                             ; C8900700
>	v_interp_p2_f32 v36, [v36], v3, 3, 1, [m0]                      ; C8910703
>	v_mov_b32_e32 v37, 0x6f800000                                   ; 7E4A02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v37, |v36|                                ; D002026A 00024925
>	v_mov_b32_e32 v37, 0x2f800000                                   ; 7E4A02FF 2F800000
>	v_cndmask_b32_e32 v37, 1.0, v37, vcc                            ; 004A4AF2
>	v_mul_f32_e32 v36, v37, v36                                     ; 10484925
>	v_rcp_f32_e32 v36, v36                                          ; 7E485524
>	s_load_dwordx8 s[16:23], s[4:5], 0x30                           ; C0C80530
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                           ; C08C053C
>	v_mul_f32_e32 v31, v30, v27                                     ; 103E371E
>	v_mul_f32_e32 v10, v36, v10                                     ; 10141524
>	v_mul_f32_e32 v11, v36, v11                                     ; 10161724
>	v_mul_f32_e32 v32, v30, v28                                     ; 1040391E
>	v_mul_f32_e32 v33, v30, v29                                     ; 10423B1E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s24, s24, s23                                         ; 87181718
>	v_mul_f32_e32 v10, v10, v37                                     ; 10144B0A
>	v_mul_f32_e32 v11, v11, v37                                     ; 10164B0B
>	s_and_b64 exec, exec, s[12:13]                                  ; 87FE0C7E
>	v_mac_f32_e32 v9, v30, v27                                      ; 3E12371E
>	v_mac_f32_e32 v7, v30, v28                                      ; 3E0E391E
>	v_mul_f32_e32 v9, 0.5, v9                                       ; 101212F0
>	image_sample v10, v[10:11], s[16:23], s[24:27] dmask:0x8        ; F0800800 00C40A0A
>	v_mac_f32_e32 v8, v30, v29                                      ; 3E103B1E
>	v_mul_f32_e32 v7, 0.5, v7                                       ; 100E0EF0
>	v_mul_f32_e32 v11, v9, v9                                       ; 10161309
>	v_mul_f32_e32 v8, 0.5, v8                                       ; 101010F0
>	v_mac_f32_e32 v11, v7, v7                                       ; 3E160F07
>	v_mac_f32_e32 v11, v8, v8                                       ; 3E161108
>	v_rsq_f32_e32 v11, v11                                          ; 7E165D0B
>	v_mul_f32_e32 v27, v6, v31                                      ; 10363F06
>	v_mac_f32_e32 v27, v5, v32                                      ; 3E364105
>	s_buffer_load_dword s4, s[0:3], 0x54                            ; C2020154
>	v_mul_f32_e32 v9, v11, v9                                       ; 1012130B
>	v_mul_f32_e32 v7, v11, v7                                       ; 100E0F0B
>	v_mul_f32_e32 v28, v9, v31                                      ; 10383F09
>	v_mul_f32_e32 v6, v9, v6                                        ; 100C0D09
>	v_mac_f32_e32 v6, v7, v5                                        ; 3E0C0B07
>	v_mul_f32_e32 v5, v11, v8                                       ; 100A110B
>	v_mac_f32_e32 v28, v7, v32                                      ; 3E384107
>	v_mac_f32_e32 v28, v5, v33                                      ; 3E384305
>	v_mac_f32_e32 v6, v5, v2                                        ; 3E0C0505
>	v_add_f32_e32 v5, -0.5, v34                                     ; 060A44F1
>	v_add_f32_e64 v9, v28, 0 clamp                                  ; D2060809 0001011C
>	s_buffer_load_dword s5, s[0:3], 0x55                            ; C2028155
>	s_buffer_load_dword s9, s[0:3], 0x56                            ; C2048156
>	v_mad_f32 v5, v5, -2.0, 1.0                                     ; D2820005 03C9EB05
>	v_sub_f32_e32 v9, 1.0, v9                                       ; 081212F2
>	v_log_f32_e32 v9, v9                                            ; 7E124F09
>	v_mac_f32_e32 v27, v2, v33                                      ; 3E364302
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v2, v10, v10                                      ; 1004150A
>	v_add_f32_e64 v5, v5, 0 clamp                                   ; D2060805 00010105
>	v_mul_f32_e32 v2, v5, v2                                        ; 10040505
>	v_add_f32_e64 v5, v35, 0 clamp                                  ; D2060805 00010123
>	v_mul_f32_e32 v2, v5, v2                                        ; 10040505
>	v_add_f32_e64 v6, v6, 0 clamp                                   ; D2060806 00010106
>	v_log_f32_e32 v6, v6                                            ; 7E0C4F06
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v7, s4, v2                                        ; 100E0404
>	v_mul_f32_e32 v8, s5, v2                                        ; 10100405
>	v_add_f32_e64 v5, v27, 0 clamp                                  ; D2060805 0001011B
>	v_mul_f32_e32 v2, s9, v2                                        ; 10040409
>	v_mul_legacy_f32_e32 v9, 0x40a00000, v9                         ; 0E1212FF 40A00000
>	v_mul_f32_e32 v7, v7, v5                                        ; 100E0B07
>	v_mul_f32_e32 v8, v8, v5                                        ; 10100B08
>	v_mul_f32_e32 v2, v2, v5                                        ; 10040B02
>	v_max_f32_e32 v5, v12, v5                                       ; 200A0B0C
>	v_exp_f32_e32 v9, v9                                            ; 7E124B09
>	v_add_f32_e32 v5, 0x3727c5ac, v5                                ; 060A0AFF 3727C5AC
>	v_mad_f32 v10, v9, v15, s6                                      ; D282000A 001A1F09
>	v_mad_f32 v11, v9, v16, s7                                      ; D282000B 001E2109
>	v_mad_f32 v9, v9, v17, s8                                       ; D2820009 00222309
>	s_buffer_load_dword s5, s[0:3], 0x3                             ; C2028103
>	v_rcp_f32_e32 v5, v5                                            ; 7E0A5505
>	v_mul_legacy_f32_e32 v6, v14, v6                                ; 0E0C0D0E
>	v_mac_f32_e32 v19, v26, v2                                      ; 3E26051A
>	v_mul_f32_e32 v2, v9, v2                                        ; 10040509
>	s_buffer_load_dword s6, s[0:3], 0x7                             ; C2030107
>	v_mul_f32_e32 v2, v18, v2                                       ; 10040512
>	v_exp_f32_e32 v6, v6                                            ; 7E0C4B06
>	v_mul_f32_e32 v2, v6, v2                                        ; 10040506
>	v_mul_f32_e32 v2, v5, v2                                        ; 10040505
>	v_mac_f32_e32 v20, v25, v2                                      ; 3E280519
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s5                                            ; 7E040205
>	v_sub_f32_e32 v2, s6, v2                                        ; 08040406
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v1, s5, v1                                     ; 0A020205
>	v_max_f32_e32 v1, 0, v1                                         ; 20020280
>	v_mac_f32_e32 v23, v26, v7                                      ; 3E2E0F1A
>	v_mul_f32_e32 v1, v2, v1                                        ; 10020302
>	v_log_f32_e32 v1, v1                                            ; 7E024F01
>	v_floor_f32_e32 v2, s6                                          ; 7E044806
>	v_sub_f32_e32 v2, s6, v2                                        ; 08040406
>	v_mul_f32_e32 v7, v10, v7                                       ; 100E0F0A
>	v_mac_f32_e32 v24, v26, v8                                      ; 3E30111A
>	v_mul_f32_e32 v8, v11, v8                                       ; 1010110B
>	s_buffer_load_dword s4, s[0:3], 0x6e                            ; C202016E
>	v_mul_f32_e32 v2, 0x41000000, v2                                ; 100404FF 41000000
>	s_buffer_load_dword s11, s[0:3], 0x6c                           ; C205816C
>	s_buffer_load_dword s12, s[0:3], 0x6d                           ; C206016D
>	s_buffer_load_dword s7, s[0:3], 0x8                             ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                             ; C2040109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_f32_e32 v7, v18, v7                                       ; 100E0F12
>	v_mul_f32_e32 v8, v18, v8                                       ; 10101112
>	v_mul_legacy_f32_e32 v1, v2, v1                                 ; 0E020302
>	v_interp_p1_f32 v0, v0, 0, 2, [m0]                              ; C8000800
>	v_exp_f32_e32 v1, v1                                            ; 7E024B01
>	v_mul_f32_e32 v7, v6, v7                                        ; 100E0F06
>	v_mul_f32_e32 v8, v6, v8                                        ; 10101106
>	v_mul_f32_e32 v6, v5, v7                                        ; 100C0F05
>	v_mul_f32_e32 v7, v5, v8                                        ; 100E1105
>	v_add_f32_e64 v1, v1, 0 clamp                                   ; D2060801 00010101
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                        ; C8010803
>	v_mul_f32_e32 v3, v1, v0                                        ; 10060101
>	v_mac_f32_e32 v22, v25, v6                                      ; 3E2C0D19
>	v_mac_f32_e32 v21, v25, v7                                      ; 3E2A0F19
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v22, s11, v23                                     ; 3E2C2E0B
>	v_mad_f32 v0, -v3, s7, s7                                       ; D2820000 201C0F03
>	v_mac_f32_e32 v21, s12, v24                                     ; 3E2A300C
>	v_mad_f32 v1, -v3, s8, s8                                       ; D2820001 20201103
>	v_mac_f32_e32 v20, s4, v19                                      ; 3E282604
>	v_mad_f32 v2, -v3, s0, s0                                       ; D2820002 20000103
>	v_mac_f32_e32 v0, v3, v22                                       ; 3E002D03
>	v_mac_f32_e32 v1, v3, v21                                       ; 3E022B03
>	v_mac_f32_e32 v2, v3, v20                                       ; 3E042903
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 48
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2752 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL IN[6]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].x, GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6].xy, GENERIC[5]
>DCL CONST[0..227]
>DCL TEMP[0..9], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>IMM[2] FLT32 {    0.1000,     0.0000,     0.0000,     0.0000}
>  0: F2I TEMP[0], IN[4]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MAD TEMP[2], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  3: MOV TEMP[3].xyz, IMM[0].zzzz
>  4: MOV TEMP[3].w, CONST[4].xxxx
>  5: MOV TEMP[4].xyz, IMM[0].zzzz
>  6: MOV TEMP[4].w, CONST[4].yyyy
>  7: MOV TEMP[5].xyz, IMM[0].zzzz
>  8: MOV TEMP[5].w, CONST[4].zzzz
>  9: NOT TEMP[6].x, CONST[224].xxxx
> 10: UIF TEMP[6].xxxx :0
> 11:   ADD TEMP[6], CONST[8], -TEMP[3]
> 12:   ADD TEMP[7], CONST[9], -TEMP[4]
> 13:   ADD TEMP[8], CONST[10], -TEMP[5]
> 14: ELSE :0
> 15:   NOT TEMP[9].x, CONST[225].xxxx
> 16:   UIF TEMP[9].xxxx :0
> 17:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 18:     UARL ADDR[0].x, TEMP[9].xxxx
> 19:     UARL ADDR[0].x, TEMP[9].xxxx
> 20:     ADD TEMP[6], CONST[ADDR[0].x+8], -TEMP[3]
> 21:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 22:     UARL ADDR[0].x, TEMP[9].xxxx
> 23:     UARL ADDR[0].x, TEMP[9].xxxx
> 24:     ADD TEMP[7], CONST[ADDR[0].x+8], -TEMP[4]
> 25:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 26:     UARL ADDR[0].x, TEMP[9].xxxx
> 27:     UARL ADDR[0].x, TEMP[9].xxxx
> 28:     ADD TEMP[8], CONST[ADDR[0].x+8], -TEMP[5]
> 29:   ELSE :0
> 30:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 31:     UARL ADDR[0].x, TEMP[9].xxxx
> 32:     ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[3]
> 33:     MUL TEMP[6], TEMP[9], IN[3].xxxx
> 34:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 35:     UARL ADDR[0].x, TEMP[9].xxxx
> 36:     ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[4]
> 37:     MUL TEMP[7], TEMP[9], IN[3].xxxx
> 38:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 39:     UARL ADDR[0].x, TEMP[9].xxxx
> 40:     ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[5]
> 41:     MUL TEMP[8], TEMP[9], IN[3].xxxx
> 42:     UMUL TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx
> 43:     UARL ADDR[0].x, TEMP[9].xxxx
> 44:     ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[3]
> 45:     MAD TEMP[6], TEMP[9], IN[3].yyyy, TEMP[6]
> 46:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 47:     UARL ADDR[0].x, TEMP[9].xxxx
> 48:     ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[4]
> 49:     MAD TEMP[7], TEMP[9], IN[3].yyyy, TEMP[7]
> 50:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 51:     UARL ADDR[0].x, TEMP[9].xxxx
> 52:     ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[5]
> 53:     MAD TEMP[8], TEMP[9], IN[3].yyyy, TEMP[8]
> 54:     UIF CONST[226].xxxx :0
> 55:       UMUL TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx
> 56:       UARL ADDR[0].x, TEMP[9].xxxx
> 57:       ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[3]
> 58:       MAD TEMP[6], TEMP[9], IN[3].zzzz, TEMP[6]
> 59:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 60:       UARL ADDR[0].x, TEMP[9].xxxx
> 61:       ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[4]
> 62:       MAD TEMP[7], TEMP[9], IN[3].zzzz, TEMP[7]
> 63:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 64:       UARL ADDR[0].x, TEMP[9].xxxx
> 65:       ADD TEMP[9], CONST[ADDR[0].x+8], -TEMP[5]
> 66:       MAD TEMP[8], TEMP[9], IN[3].zzzz, TEMP[8]
> 67:     ENDIF
> 68:     UIF CONST[227].xxxx :0
> 69:       UMUL TEMP[9].x, TEMP[0].wwww, IMM[1].xxxx
> 70:       UARL ADDR[0].x, TEMP[9].xxxx
> 71:       ADD TEMP[3], CONST[ADDR[0].x+8], -TEMP[3]
> 72:       MAD TEMP[6], TEMP[3], IN[3].wwww, TEMP[6]
> 73:       UMAD TEMP[3].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 74:       UARL ADDR[0].x, TEMP[3].xxxx
> 75:       ADD TEMP[3], CONST[ADDR[0].x+8], -TEMP[4]
> 76:       MAD TEMP[7], TEMP[3], IN[3].wwww, TEMP[7]
> 77:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 78:       UARL ADDR[0].x, TEMP[0].xxxx
> 79:       ADD TEMP[0], CONST[ADDR[0].x+8], -TEMP[5]
> 80:       MAD TEMP[8], TEMP[0], IN[3].wwww, TEMP[8]
> 81:     ENDIF
> 82:   ENDIF
> 83: ENDIF
> 84: DP4 TEMP[0].x, IN[0], TEMP[6]
> 85: DP4 TEMP[3].x, IN[0], TEMP[7]
> 86: MOV TEMP[0].y, TEMP[3].xxxx
> 87: DP4 TEMP[3].x, IN[0], TEMP[8]
> 88: MOV TEMP[0].z, TEMP[3].xxxx
> 89: DP4 TEMP[3].x, IN[0], IMM[0].zzzw
> 90: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 91: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[6].xyzz
> 92: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[7].xyzz
> 93: MOV TEMP[4].y, TEMP[5].xxxx
> 94: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[8].xyzz
> 95: MOV TEMP[4].z, TEMP[1].xxxx
> 96: DP3 TEMP[1].x, TEMP[2].xyzz, TEMP[6].xyzz
> 97: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[7].xyzz
> 98: MOV TEMP[1].y, TEMP[5].xxxx
> 99: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[8].xyzz
>100: MOV TEMP[1].z, TEMP[5].xxxx
>101: MUL TEMP[5], CONST[0], TEMP[0].xxxx
>102: MAD TEMP[5], CONST[1], TEMP[0].yyyy, TEMP[5]
>103: MAD TEMP[5], CONST[2], TEMP[0].zzzz, TEMP[5]
>104: MAD TEMP[3], CONST[3], TEMP[3].xxxx, TEMP[5]
>105: MOV TEMP[0].xyz, TEMP[0].xyzx
>106: MUL TEMP[5].x, TEMP[3].wwww, CONST[7].wwww
>107: MOV TEMP[0].w, TEMP[5].xxxx
>108: MUL TEMP[5].x, CONST[5].yyyy, IMM[2].xxxx
>109: MOV TEMP[5].w, TEMP[5].xxxx
>110: MOV TEMP[5].xyz, TEMP[4].xyzx
>111: MAD TEMP[6].x, TEMP[3].zzzz, CONST[6].yyyy, CONST[6].xxxx
>112: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>113: POW TEMP[6].x, TEMP[6].xxxx, CONST[6].zzzz
>114: ADD TEMP[7].x, IMM[0].wwww, -CONST[6].wwww
>115: MAD TEMP[6].x, CONST[6].wwww, TEMP[6].xxxx, TEMP[7].xxxx
>116: MUL TEMP[7].xyz, TEMP[4].zxyy, TEMP[1].yzxx
>117: MAD TEMP[4].xyz, TEMP[4].yzxx, TEMP[1].zxyy, -TEMP[7].xyzz
>118: MUL TEMP[2].xyz, TEMP[4].xyzz, TEMP[2].wwww
>119: MOV TEMP[1].xyz, TEMP[1].xyzx
>120: MOV TEMP[1].w, TEMP[2].xxxx
>121: MUL TEMP[4].x, TEMP[6].xxxx, TEMP[6].xxxx
>122: MOV TEMP[6].xy, IN[5].xyxx
>123: MOV TEMP[6].zw, IN[6].yyxy
>124: MOV OUT[6].xy, TEMP[2].yzyy
>125: MOV OUT[1], TEMP[0]
>126: MOV OUT[4], TEMP[5]
>127: MOV OUT[0], TEMP[3]
>128: MOV OUT[3].x, TEMP[4].xxxx
>129: MOV OUT[5], TEMP[1]
>130: MOV OUT[2], TEMP[6]
>131: END
>radeonsi: Compiling shader 125
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %21 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %22 = load <16 x i8>, <16 x i8> addrspace(2)* %21, align 16, !invariant.load !0
>  %23 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %22, i32 0, i32 %14)
>  %24 = extractelement <4 x float> %23, i32 0
>  %25 = extractelement <4 x float> %23, i32 1
>  %26 = extractelement <4 x float> %23, i32 2
>  %27 = extractelement <4 x float> %23, i32 3
>  %28 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %29 = load <16 x i8>, <16 x i8> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %29, i32 0, i32 %15)
>  %31 = extractelement <4 x float> %30, i32 0
>  %32 = extractelement <4 x float> %30, i32 1
>  %33 = extractelement <4 x float> %30, i32 2
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %35, i32 0, i32 %16)
>  %37 = extractelement <4 x float> %36, i32 0
>  %38 = extractelement <4 x float> %36, i32 1
>  %39 = extractelement <4 x float> %36, i32 2
>  %40 = extractelement <4 x float> %36, i32 3
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %42, i32 0, i32 %17)
>  %44 = extractelement <4 x float> %43, i32 0
>  %45 = extractelement <4 x float> %43, i32 1
>  %46 = extractelement <4 x float> %43, i32 2
>  %47 = extractelement <4 x float> %43, i32 3
>  %48 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %49 = load <16 x i8>, <16 x i8> addrspace(2)* %48, align 16, !invariant.load !0
>  %50 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %49, i32 0, i32 %18)
>  %51 = extractelement <4 x float> %50, i32 0
>  %52 = extractelement <4 x float> %50, i32 1
>  %53 = extractelement <4 x float> %50, i32 2
>  %54 = extractelement <4 x float> %50, i32 3
>  %55 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 5, !amdgpu.uniform !0
>  %56 = load <16 x i8>, <16 x i8> addrspace(2)* %55, align 16, !invariant.load !0
>  %57 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %56, i32 0, i32 %19)
>  %58 = extractelement <4 x float> %57, i32 0
>  %59 = extractelement <4 x float> %57, i32 1
>  %60 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 6, !amdgpu.uniform !0
>  %61 = load <16 x i8>, <16 x i8> addrspace(2)* %60, align 16, !invariant.load !0
>  %62 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %61, i32 0, i32 %20)
>  %63 = extractelement <4 x float> %62, i32 0
>  %64 = extractelement <4 x float> %62, i32 1
>  %65 = fptosi float %51 to i32
>  %66 = fptosi float %52 to i32
>  %67 = fptosi float %53 to i32
>  %68 = fptosi float %54 to i32
>  %69 = fmul float %31, 2.000000e+00
>  %70 = fadd float %69, -1.000000e+00
>  %71 = fmul float %32, 2.000000e+00
>  %72 = fadd float %71, -1.000000e+00
>  %73 = fmul float %33, 2.000000e+00
>  %74 = fadd float %73, -1.000000e+00
>  %75 = fmul float %37, 2.000000e+00
>  %76 = fadd float %75, -1.000000e+00
>  %77 = fmul float %38, 2.000000e+00
>  %78 = fadd float %77, -1.000000e+00
>  %79 = fmul float %39, 2.000000e+00
>  %80 = fadd float %79, -1.000000e+00
>  %81 = fmul float %40, 2.000000e+00
>  %82 = fadd float %81, -1.000000e+00
>  %83 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %84 = load <16 x i8>, <16 x i8> addrspace(2)* %83, align 16, !invariant.load !0
>  %85 = call float @llvm.SI.load.const(<16 x i8> %84, i32 64)
>  %86 = call float @llvm.SI.load.const(<16 x i8> %84, i32 68)
>  %87 = call float @llvm.SI.load.const(<16 x i8> %84, i32 72)
>  %88 = call float @llvm.SI.load.const(<16 x i8> %84, i32 3584)
>  %89 = bitcast float %88 to i32
>  %90 = icmp eq i32 %89, -1
>  %91 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %92 = load <16 x i8>, <16 x i8> addrspace(2)* %91, align 16, !invariant.load !0
>  br i1 %90, label %else14, label %if10
>
>if10:                                             ; preds = %main_body
>  %93 = call float @llvm.SI.load.const(<16 x i8> %92, i32 128)
>  %94 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %95 = load <16 x i8>, <16 x i8> addrspace(2)* %94, align 16, !invariant.load !0
>  %96 = call float @llvm.SI.load.const(<16 x i8> %95, i32 132)
>  %97 = call float @llvm.SI.load.const(<16 x i8> %95, i32 136)
>  %98 = call float @llvm.SI.load.const(<16 x i8> %95, i32 140)
>  %99 = fsub float %98, %85
>  %100 = call float @llvm.SI.load.const(<16 x i8> %95, i32 144)
>  %101 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %102 = load <16 x i8>, <16 x i8> addrspace(2)* %101, align 16, !invariant.load !0
>  %103 = call float @llvm.SI.load.const(<16 x i8> %102, i32 148)
>  %104 = call float @llvm.SI.load.const(<16 x i8> %102, i32 152)
>  %105 = call float @llvm.SI.load.const(<16 x i8> %102, i32 156)
>  %106 = fsub float %105, %86
>  %107 = call float @llvm.SI.load.const(<16 x i8> %102, i32 160)
>  %108 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %109 = load <16 x i8>, <16 x i8> addrspace(2)* %108, align 16, !invariant.load !0
>  %110 = call float @llvm.SI.load.const(<16 x i8> %109, i32 164)
>  %111 = call float @llvm.SI.load.const(<16 x i8> %109, i32 168)
>  %112 = call float @llvm.SI.load.const(<16 x i8> %109, i32 172)
>  %113 = fsub float %112, %87
>  br label %endif83
>
>else14:                                           ; preds = %main_body
>  %114 = call float @llvm.SI.load.const(<16 x i8> %92, i32 3600)
>  %115 = bitcast float %114 to i32
>  %116 = icmp eq i32 %115, -1
>  %117 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %118 = load <16 x i8>, <16 x i8> addrspace(2)* %117, align 16, !invariant.load !0
>  %119 = mul i32 %65, 48
>  %120 = add i32 %119, 128
>  %121 = call float @llvm.SI.load.const(<16 x i8> %118, i32 %120)
>  %122 = mul i32 %65, 48
>  %123 = add i32 %122, 132
>  %124 = call float @llvm.SI.load.const(<16 x i8> %118, i32 %123)
>  %125 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %126 = load <16 x i8>, <16 x i8> addrspace(2)* %125, align 16, !invariant.load !0
>  %127 = mul i32 %65, 48
>  %128 = add i32 %127, 136
>  %129 = call float @llvm.SI.load.const(<16 x i8> %126, i32 %128)
>  %130 = mul i32 %65, 48
>  %131 = add i32 %130, 140
>  %132 = call float @llvm.SI.load.const(<16 x i8> %126, i32 %131)
>  %133 = fsub float %132, %85
>  br i1 %116, label %else29, label %if16
>
>if16:                                             ; preds = %else14
>  %134 = mul i32 %65, 3
>  %135 = add i32 %134, 1
>  %136 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %137 = load <16 x i8>, <16 x i8> addrspace(2)* %136, align 16, !invariant.load !0
>  %138 = shl i32 %135, 4
>  %139 = add i32 %138, 128
>  %140 = call float @llvm.SI.load.const(<16 x i8> %137, i32 %139)
>  %141 = shl i32 %135, 4
>  %142 = add i32 %141, 132
>  %143 = call float @llvm.SI.load.const(<16 x i8> %137, i32 %142)
>  %144 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %145 = load <16 x i8>, <16 x i8> addrspace(2)* %144, align 16, !invariant.load !0
>  %146 = shl i32 %135, 4
>  %147 = add i32 %146, 136
>  %148 = call float @llvm.SI.load.const(<16 x i8> %145, i32 %147)
>  %149 = shl i32 %135, 4
>  %150 = add i32 %149, 140
>  %151 = call float @llvm.SI.load.const(<16 x i8> %145, i32 %150)
>  %152 = fsub float %151, %86
>  %153 = mul i32 %65, 3
>  %154 = add i32 %153, 2
>  %155 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %156 = load <16 x i8>, <16 x i8> addrspace(2)* %155, align 16, !invariant.load !0
>  %157 = shl i32 %154, 4
>  %158 = add i32 %157, 128
>  %159 = call float @llvm.SI.load.const(<16 x i8> %156, i32 %158)
>  %160 = shl i32 %154, 4
>  %161 = add i32 %160, 132
>  %162 = call float @llvm.SI.load.const(<16 x i8> %156, i32 %161)
>  %163 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %164 = load <16 x i8>, <16 x i8> addrspace(2)* %163, align 16, !invariant.load !0
>  %165 = shl i32 %154, 4
>  %166 = add i32 %165, 136
>  %167 = call float @llvm.SI.load.const(<16 x i8> %164, i32 %166)
>  %168 = shl i32 %154, 4
>  %169 = add i32 %168, 140
>  %170 = call float @llvm.SI.load.const(<16 x i8> %164, i32 %169)
>  %171 = fsub float %170, %87
>  br label %endif83
>
>else29:                                           ; preds = %else14
>  %172 = fmul float %121, %44
>  %173 = fmul float %124, %44
>  %174 = fmul float %129, %44
>  %175 = fmul float %133, %44
>  %176 = mul i32 %65, 3
>  %177 = add i32 %176, 1
>  %178 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %179 = load <16 x i8>, <16 x i8> addrspace(2)* %178, align 16, !invariant.load !0
>  %180 = shl i32 %177, 4
>  %181 = add i32 %180, 128
>  %182 = call float @llvm.SI.load.const(<16 x i8> %179, i32 %181)
>  %183 = shl i32 %177, 4
>  %184 = add i32 %183, 132
>  %185 = call float @llvm.SI.load.const(<16 x i8> %179, i32 %184)
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = shl i32 %177, 4
>  %189 = add i32 %188, 136
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 %189)
>  %191 = shl i32 %177, 4
>  %192 = add i32 %191, 140
>  %193 = call float @llvm.SI.load.const(<16 x i8> %187, i32 %192)
>  %194 = fsub float %193, %86
>  %195 = fmul float %182, %44
>  %196 = fmul float %185, %44
>  %197 = fmul float %190, %44
>  %198 = fmul float %194, %44
>  %199 = mul i32 %65, 3
>  %200 = add i32 %199, 2
>  %201 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %202 = load <16 x i8>, <16 x i8> addrspace(2)* %201, align 16, !invariant.load !0
>  %203 = shl i32 %200, 4
>  %204 = add i32 %203, 128
>  %205 = call float @llvm.SI.load.const(<16 x i8> %202, i32 %204)
>  %206 = shl i32 %200, 4
>  %207 = add i32 %206, 132
>  %208 = call float @llvm.SI.load.const(<16 x i8> %202, i32 %207)
>  %209 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %210 = load <16 x i8>, <16 x i8> addrspace(2)* %209, align 16, !invariant.load !0
>  %211 = shl i32 %200, 4
>  %212 = add i32 %211, 136
>  %213 = call float @llvm.SI.load.const(<16 x i8> %210, i32 %212)
>  %214 = shl i32 %200, 4
>  %215 = add i32 %214, 140
>  %216 = call float @llvm.SI.load.const(<16 x i8> %210, i32 %215)
>  %217 = fsub float %216, %87
>  %218 = fmul float %205, %44
>  %219 = fmul float %208, %44
>  %220 = fmul float %213, %44
>  %221 = fmul float %217, %44
>  %222 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %223 = load <16 x i8>, <16 x i8> addrspace(2)* %222, align 16, !invariant.load !0
>  %224 = mul i32 %66, 48
>  %225 = add i32 %224, 128
>  %226 = call float @llvm.SI.load.const(<16 x i8> %223, i32 %225)
>  %227 = mul i32 %66, 48
>  %228 = add i32 %227, 132
>  %229 = call float @llvm.SI.load.const(<16 x i8> %223, i32 %228)
>  %230 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %231 = load <16 x i8>, <16 x i8> addrspace(2)* %230, align 16, !invariant.load !0
>  %232 = mul i32 %66, 48
>  %233 = add i32 %232, 136
>  %234 = call float @llvm.SI.load.const(<16 x i8> %231, i32 %233)
>  %235 = mul i32 %66, 48
>  %236 = add i32 %235, 140
>  %237 = call float @llvm.SI.load.const(<16 x i8> %231, i32 %236)
>  %238 = fsub float %237, %85
>  %239 = fmul float %226, %45
>  %240 = fadd float %239, %172
>  %241 = fmul float %229, %45
>  %242 = fadd float %241, %173
>  %243 = fmul float %234, %45
>  %244 = fadd float %243, %174
>  %245 = fmul float %238, %45
>  %246 = fadd float %245, %175
>  %247 = mul i32 %66, 3
>  %248 = add i32 %247, 1
>  %249 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %250 = load <16 x i8>, <16 x i8> addrspace(2)* %249, align 16, !invariant.load !0
>  %251 = shl i32 %248, 4
>  %252 = add i32 %251, 128
>  %253 = call float @llvm.SI.load.const(<16 x i8> %250, i32 %252)
>  %254 = shl i32 %248, 4
>  %255 = add i32 %254, 132
>  %256 = call float @llvm.SI.load.const(<16 x i8> %250, i32 %255)
>  %257 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %258 = load <16 x i8>, <16 x i8> addrspace(2)* %257, align 16, !invariant.load !0
>  %259 = shl i32 %248, 4
>  %260 = add i32 %259, 136
>  %261 = call float @llvm.SI.load.const(<16 x i8> %258, i32 %260)
>  %262 = shl i32 %248, 4
>  %263 = add i32 %262, 140
>  %264 = call float @llvm.SI.load.const(<16 x i8> %258, i32 %263)
>  %265 = fsub float %264, %86
>  %266 = fmul float %253, %45
>  %267 = fadd float %266, %195
>  %268 = fmul float %256, %45
>  %269 = fadd float %268, %196
>  %270 = fmul float %261, %45
>  %271 = fadd float %270, %197
>  %272 = fmul float %265, %45
>  %273 = fadd float %272, %198
>  %274 = mul i32 %66, 3
>  %275 = add i32 %274, 2
>  %276 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %277 = load <16 x i8>, <16 x i8> addrspace(2)* %276, align 16, !invariant.load !0
>  %278 = shl i32 %275, 4
>  %279 = add i32 %278, 128
>  %280 = call float @llvm.SI.load.const(<16 x i8> %277, i32 %279)
>  %281 = shl i32 %275, 4
>  %282 = add i32 %281, 132
>  %283 = call float @llvm.SI.load.const(<16 x i8> %277, i32 %282)
>  %284 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %285 = load <16 x i8>, <16 x i8> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = shl i32 %275, 4
>  %287 = add i32 %286, 136
>  %288 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %287)
>  %289 = shl i32 %275, 4
>  %290 = add i32 %289, 140
>  %291 = call float @llvm.SI.load.const(<16 x i8> %285, i32 %290)
>  %292 = fsub float %291, %87
>  %293 = fmul float %280, %45
>  %294 = fadd float %293, %218
>  %295 = fmul float %283, %45
>  %296 = fadd float %295, %219
>  %297 = fmul float %288, %45
>  %298 = fadd float %297, %220
>  %299 = fmul float %292, %45
>  %300 = fadd float %299, %221
>  %301 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %302 = load <16 x i8>, <16 x i8> addrspace(2)* %301, align 16, !invariant.load !0
>  %303 = call float @llvm.SI.load.const(<16 x i8> %302, i32 3616)
>  %304 = bitcast float %303 to i32
>  %305 = icmp eq i32 %304, 0
>  br i1 %305, label %endif67, label %if54
>
>if54:                                             ; preds = %else29
>  %306 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %307 = load <16 x i8>, <16 x i8> addrspace(2)* %306, align 16, !invariant.load !0
>  %308 = mul i32 %67, 48
>  %309 = add i32 %308, 128
>  %310 = call float @llvm.SI.load.const(<16 x i8> %307, i32 %309)
>  %311 = mul i32 %67, 48
>  %312 = add i32 %311, 132
>  %313 = call float @llvm.SI.load.const(<16 x i8> %307, i32 %312)
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = mul i32 %67, 48
>  %317 = add i32 %316, 136
>  %318 = call float @llvm.SI.load.const(<16 x i8> %315, i32 %317)
>  %319 = mul i32 %67, 48
>  %320 = add i32 %319, 140
>  %321 = call float @llvm.SI.load.const(<16 x i8> %315, i32 %320)
>  %322 = fsub float %321, %85
>  %323 = fmul float %310, %46
>  %324 = fadd float %323, %240
>  %325 = fmul float %313, %46
>  %326 = fadd float %325, %242
>  %327 = fmul float %318, %46
>  %328 = fadd float %327, %244
>  %329 = fmul float %322, %46
>  %330 = fadd float %329, %246
>  %331 = mul i32 %67, 3
>  %332 = add i32 %331, 1
>  %333 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %334 = load <16 x i8>, <16 x i8> addrspace(2)* %333, align 16, !invariant.load !0
>  %335 = shl i32 %332, 4
>  %336 = add i32 %335, 128
>  %337 = call float @llvm.SI.load.const(<16 x i8> %334, i32 %336)
>  %338 = shl i32 %332, 4
>  %339 = add i32 %338, 132
>  %340 = call float @llvm.SI.load.const(<16 x i8> %334, i32 %339)
>  %341 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %342 = load <16 x i8>, <16 x i8> addrspace(2)* %341, align 16, !invariant.load !0
>  %343 = shl i32 %332, 4
>  %344 = add i32 %343, 136
>  %345 = call float @llvm.SI.load.const(<16 x i8> %342, i32 %344)
>  %346 = shl i32 %332, 4
>  %347 = add i32 %346, 140
>  %348 = call float @llvm.SI.load.const(<16 x i8> %342, i32 %347)
>  %349 = fsub float %348, %86
>  %350 = fmul float %337, %46
>  %351 = fadd float %350, %267
>  %352 = fmul float %340, %46
>  %353 = fadd float %352, %269
>  %354 = fmul float %345, %46
>  %355 = fadd float %354, %271
>  %356 = fmul float %349, %46
>  %357 = fadd float %356, %273
>  %358 = mul i32 %67, 3
>  %359 = add i32 %358, 2
>  %360 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %361 = load <16 x i8>, <16 x i8> addrspace(2)* %360, align 16, !invariant.load !0
>  %362 = shl i32 %359, 4
>  %363 = add i32 %362, 128
>  %364 = call float @llvm.SI.load.const(<16 x i8> %361, i32 %363)
>  %365 = shl i32 %359, 4
>  %366 = add i32 %365, 132
>  %367 = call float @llvm.SI.load.const(<16 x i8> %361, i32 %366)
>  %368 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %369 = load <16 x i8>, <16 x i8> addrspace(2)* %368, align 16, !invariant.load !0
>  %370 = shl i32 %359, 4
>  %371 = add i32 %370, 136
>  %372 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %371)
>  %373 = shl i32 %359, 4
>  %374 = add i32 %373, 140
>  %375 = call float @llvm.SI.load.const(<16 x i8> %369, i32 %374)
>  %376 = fsub float %375, %87
>  %377 = fmul float %364, %46
>  %378 = fadd float %377, %294
>  %379 = fmul float %367, %46
>  %380 = fadd float %379, %296
>  %381 = fmul float %372, %46
>  %382 = fadd float %381, %298
>  %383 = fmul float %376, %46
>  %384 = fadd float %383, %300
>  br label %endif67
>
>endif67:                                          ; preds = %else29, %if54
>  %.0101 = phi float [ %324, %if54 ], [ %240, %else29 ]
>  %.097 = phi float [ %326, %if54 ], [ %242, %else29 ]
>  %.093 = phi float [ %328, %if54 ], [ %244, %else29 ]
>  %.089 = phi float [ %330, %if54 ], [ %246, %else29 ]
>  %.085 = phi float [ %351, %if54 ], [ %267, %else29 ]
>  %.081 = phi float [ %353, %if54 ], [ %269, %else29 ]
>  %.077 = phi float [ %355, %if54 ], [ %271, %else29 ]
>  %.073 = phi float [ %357, %if54 ], [ %273, %else29 ]
>  %.069 = phi float [ %378, %if54 ], [ %294, %else29 ]
>  %.065 = phi float [ %380, %if54 ], [ %296, %else29 ]
>  %.061 = phi float [ %382, %if54 ], [ %298, %else29 ]
>  %.0 = phi float [ %384, %if54 ], [ %300, %else29 ]
>  %385 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %386 = load <16 x i8>, <16 x i8> addrspace(2)* %385, align 16, !invariant.load !0
>  %387 = call float @llvm.SI.load.const(<16 x i8> %386, i32 3632)
>  %388 = bitcast float %387 to i32
>  %389 = icmp eq i32 %388, 0
>  br i1 %389, label %endif83, label %if68
>
>if68:                                             ; preds = %endif67
>  %390 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %391 = load <16 x i8>, <16 x i8> addrspace(2)* %390, align 16, !invariant.load !0
>  %392 = mul i32 %68, 48
>  %393 = add i32 %392, 128
>  %394 = call float @llvm.SI.load.const(<16 x i8> %391, i32 %393)
>  %395 = mul i32 %68, 48
>  %396 = add i32 %395, 132
>  %397 = call float @llvm.SI.load.const(<16 x i8> %391, i32 %396)
>  %398 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %399 = load <16 x i8>, <16 x i8> addrspace(2)* %398, align 16, !invariant.load !0
>  %400 = mul i32 %68, 48
>  %401 = add i32 %400, 136
>  %402 = call float @llvm.SI.load.const(<16 x i8> %399, i32 %401)
>  %403 = mul i32 %68, 48
>  %404 = add i32 %403, 140
>  %405 = call float @llvm.SI.load.const(<16 x i8> %399, i32 %404)
>  %406 = fsub float %405, %85
>  %407 = fmul float %394, %47
>  %408 = fadd float %407, %.0101
>  %409 = fmul float %397, %47
>  %410 = fadd float %409, %.097
>  %411 = fmul float %402, %47
>  %412 = fadd float %411, %.093
>  %413 = fmul float %406, %47
>  %414 = fadd float %413, %.089
>  %415 = mul i32 %68, 3
>  %416 = add i32 %415, 1
>  %417 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %418 = load <16 x i8>, <16 x i8> addrspace(2)* %417, align 16, !invariant.load !0
>  %419 = shl i32 %416, 4
>  %420 = add i32 %419, 128
>  %421 = call float @llvm.SI.load.const(<16 x i8> %418, i32 %420)
>  %422 = shl i32 %416, 4
>  %423 = add i32 %422, 132
>  %424 = call float @llvm.SI.load.const(<16 x i8> %418, i32 %423)
>  %425 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %426 = load <16 x i8>, <16 x i8> addrspace(2)* %425, align 16, !invariant.load !0
>  %427 = shl i32 %416, 4
>  %428 = add i32 %427, 136
>  %429 = call float @llvm.SI.load.const(<16 x i8> %426, i32 %428)
>  %430 = shl i32 %416, 4
>  %431 = add i32 %430, 140
>  %432 = call float @llvm.SI.load.const(<16 x i8> %426, i32 %431)
>  %433 = fsub float %432, %86
>  %434 = fmul float %421, %47
>  %435 = fadd float %434, %.085
>  %436 = fmul float %424, %47
>  %437 = fadd float %436, %.081
>  %438 = fmul float %429, %47
>  %439 = fadd float %438, %.077
>  %440 = fmul float %433, %47
>  %441 = fadd float %440, %.073
>  %442 = mul i32 %68, 3
>  %443 = add i32 %442, 2
>  %444 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %445 = load <16 x i8>, <16 x i8> addrspace(2)* %444, align 16, !invariant.load !0
>  %446 = shl i32 %443, 4
>  %447 = add i32 %446, 128
>  %448 = call float @llvm.SI.load.const(<16 x i8> %445, i32 %447)
>  %449 = shl i32 %443, 4
>  %450 = add i32 %449, 132
>  %451 = call float @llvm.SI.load.const(<16 x i8> %445, i32 %450)
>  %452 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %453 = load <16 x i8>, <16 x i8> addrspace(2)* %452, align 16, !invariant.load !0
>  %454 = shl i32 %443, 4
>  %455 = add i32 %454, 136
>  %456 = call float @llvm.SI.load.const(<16 x i8> %453, i32 %455)
>  %457 = shl i32 %443, 4
>  %458 = add i32 %457, 140
>  %459 = call float @llvm.SI.load.const(<16 x i8> %453, i32 %458)
>  %460 = fsub float %459, %87
>  %461 = fmul float %448, %47
>  %462 = fadd float %461, %.069
>  %463 = fmul float %451, %47
>  %464 = fadd float %463, %.065
>  %465 = fmul float %456, %47
>  %466 = fadd float %465, %.061
>  %467 = fmul float %460, %47
>  %468 = fadd float %467, %.0
>  br label %endif83
>
>endif83:                                          ; preds = %endif67, %if16, %if68, %if10
>  %.3104 = phi float [ %93, %if10 ], [ %121, %if16 ], [ %408, %if68 ], [ %.0101, %endif67 ]
>  %.3100 = phi float [ %96, %if10 ], [ %124, %if16 ], [ %410, %if68 ], [ %.097, %endif67 ]
>  %.396 = phi float [ %97, %if10 ], [ %129, %if16 ], [ %412, %if68 ], [ %.093, %endif67 ]
>  %.392 = phi float [ %99, %if10 ], [ %133, %if16 ], [ %414, %if68 ], [ %.089, %endif67 ]
>  %.388 = phi float [ %100, %if10 ], [ %140, %if16 ], [ %435, %if68 ], [ %.085, %endif67 ]
>  %.384 = phi float [ %103, %if10 ], [ %143, %if16 ], [ %437, %if68 ], [ %.081, %endif67 ]
>  %.380 = phi float [ %104, %if10 ], [ %148, %if16 ], [ %439, %if68 ], [ %.077, %endif67 ]
>  %.376 = phi float [ %106, %if10 ], [ %152, %if16 ], [ %441, %if68 ], [ %.073, %endif67 ]
>  %.372 = phi float [ %107, %if10 ], [ %159, %if16 ], [ %462, %if68 ], [ %.069, %endif67 ]
>  %.368 = phi float [ %110, %if10 ], [ %162, %if16 ], [ %464, %if68 ], [ %.065, %endif67 ]
>  %.364 = phi float [ %111, %if10 ], [ %167, %if16 ], [ %466, %if68 ], [ %.061, %endif67 ]
>  %.3 = phi float [ %113, %if10 ], [ %171, %if16 ], [ %468, %if68 ], [ %.0, %endif67 ]
>  %469 = fmul float %24, %.3104
>  %470 = fmul float %25, %.3100
>  %471 = fadd float %469, %470
>  %472 = fmul float %26, %.396
>  %473 = fadd float %471, %472
>  %474 = fmul float %27, %.392
>  %475 = fadd float %473, %474
>  %476 = fmul float %24, %.388
>  %477 = fmul float %25, %.384
>  %478 = fadd float %476, %477
>  %479 = fmul float %26, %.380
>  %480 = fadd float %478, %479
>  %481 = fmul float %27, %.376
>  %482 = fadd float %480, %481
>  %483 = fmul float %24, %.372
>  %484 = fmul float %25, %.368
>  %485 = fadd float %483, %484
>  %486 = fmul float %26, %.364
>  %487 = fadd float %485, %486
>  %488 = fmul float %27, %.3
>  %489 = fadd float %487, %488
>  %490 = fmul float %24, 0.000000e+00
>  %491 = fmul float %25, 0.000000e+00
>  %492 = fadd float %490, %491
>  %493 = fmul float %26, 0.000000e+00
>  %494 = fadd float %492, %493
>  %495 = fadd float %494, %27
>  %496 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %497 = load <16 x i8>, <16 x i8> addrspace(2)* %496, align 16, !invariant.load !0
>  %498 = call float @llvm.SI.load.const(<16 x i8> %497, i32 64)
>  %499 = fadd float %475, %498
>  %500 = call float @llvm.SI.load.const(<16 x i8> %497, i32 68)
>  %501 = fadd float %482, %500
>  %502 = call float @llvm.SI.load.const(<16 x i8> %497, i32 72)
>  %503 = fadd float %489, %502
>  %504 = fmul float %70, %.3104
>  %505 = fmul float %72, %.3100
>  %506 = fadd float %505, %504
>  %507 = fmul float %74, %.396
>  %508 = fadd float %506, %507
>  %509 = fmul float %70, %.388
>  %510 = fmul float %72, %.384
>  %511 = fadd float %510, %509
>  %512 = fmul float %74, %.380
>  %513 = fadd float %511, %512
>  %514 = fmul float %70, %.372
>  %515 = fmul float %72, %.368
>  %516 = fadd float %515, %514
>  %517 = fmul float %74, %.364
>  %518 = fadd float %516, %517
>  %519 = fmul float %76, %.3104
>  %520 = fmul float %78, %.3100
>  %521 = fadd float %520, %519
>  %522 = fmul float %80, %.396
>  %523 = fadd float %521, %522
>  %524 = fmul float %76, %.388
>  %525 = fmul float %78, %.384
>  %526 = fadd float %525, %524
>  %527 = fmul float %80, %.380
>  %528 = fadd float %526, %527
>  %529 = fmul float %76, %.372
>  %530 = fmul float %78, %.368
>  %531 = fadd float %530, %529
>  %532 = fmul float %80, %.364
>  %533 = fadd float %531, %532
>  %534 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %535 = load <16 x i8>, <16 x i8> addrspace(2)* %534, align 16, !invariant.load !0
>  %536 = call float @llvm.SI.load.const(<16 x i8> %535, i32 0)
>  %537 = fmul float %536, %499
>  %538 = call float @llvm.SI.load.const(<16 x i8> %535, i32 4)
>  %539 = fmul float %538, %499
>  %540 = call float @llvm.SI.load.const(<16 x i8> %535, i32 8)
>  %541 = fmul float %540, %499
>  %542 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %543 = load <16 x i8>, <16 x i8> addrspace(2)* %542, align 16, !invariant.load !0
>  %544 = call float @llvm.SI.load.const(<16 x i8> %543, i32 12)
>  %545 = fmul float %544, %499
>  %546 = call float @llvm.SI.load.const(<16 x i8> %543, i32 16)
>  %547 = fmul float %546, %501
>  %548 = fadd float %547, %537
>  %549 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %550 = load <16 x i8>, <16 x i8> addrspace(2)* %549, align 16, !invariant.load !0
>  %551 = call float @llvm.SI.load.const(<16 x i8> %550, i32 20)
>  %552 = fmul float %551, %501
>  %553 = fadd float %552, %539
>  %554 = call float @llvm.SI.load.const(<16 x i8> %550, i32 24)
>  %555 = fmul float %554, %501
>  %556 = fadd float %555, %541
>  %557 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %558 = load <16 x i8>, <16 x i8> addrspace(2)* %557, align 16, !invariant.load !0
>  %559 = call float @llvm.SI.load.const(<16 x i8> %558, i32 28)
>  %560 = fmul float %559, %501
>  %561 = fadd float %560, %545
>  %562 = call float @llvm.SI.load.const(<16 x i8> %558, i32 32)
>  %563 = fmul float %562, %503
>  %564 = fadd float %563, %548
>  %565 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %566 = load <16 x i8>, <16 x i8> addrspace(2)* %565, align 16, !invariant.load !0
>  %567 = call float @llvm.SI.load.const(<16 x i8> %566, i32 36)
>  %568 = fmul float %567, %503
>  %569 = fadd float %568, %553
>  %570 = call float @llvm.SI.load.const(<16 x i8> %566, i32 40)
>  %571 = fmul float %570, %503
>  %572 = fadd float %571, %556
>  %573 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %574 = load <16 x i8>, <16 x i8> addrspace(2)* %573, align 16, !invariant.load !0
>  %575 = call float @llvm.SI.load.const(<16 x i8> %574, i32 44)
>  %576 = fmul float %575, %503
>  %577 = fadd float %576, %561
>  %578 = call float @llvm.SI.load.const(<16 x i8> %574, i32 48)
>  %579 = fmul float %578, %495
>  %580 = fadd float %579, %564
>  %581 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %582 = load <16 x i8>, <16 x i8> addrspace(2)* %581, align 16, !invariant.load !0
>  %583 = call float @llvm.SI.load.const(<16 x i8> %582, i32 52)
>  %584 = fmul float %583, %495
>  %585 = fadd float %584, %569
>  %586 = call float @llvm.SI.load.const(<16 x i8> %582, i32 56)
>  %587 = fmul float %586, %495
>  %588 = fadd float %587, %572
>  %589 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %590 = load <16 x i8>, <16 x i8> addrspace(2)* %589, align 16, !invariant.load !0
>  %591 = call float @llvm.SI.load.const(<16 x i8> %590, i32 60)
>  %592 = fmul float %591, %495
>  %593 = fadd float %592, %577
>  %594 = call float @llvm.SI.load.const(<16 x i8> %590, i32 124)
>  %595 = fmul float %593, %594
>  %596 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %597 = load <16 x i8>, <16 x i8> addrspace(2)* %596, align 16, !invariant.load !0
>  %598 = call float @llvm.SI.load.const(<16 x i8> %597, i32 84)
>  %599 = fmul float %598, 0x3FB99999A0000000
>  %600 = call float @llvm.SI.load.const(<16 x i8> %597, i32 100)
>  %601 = call float @llvm.SI.load.const(<16 x i8> %597, i32 96)
>  %602 = fmul float %588, %600
>  %603 = fadd float %602, %601
>  %604 = call float @llvm.AMDGPU.clamp.(float %603, float 0.000000e+00, float 1.000000e+00)
>  %605 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %606 = load <16 x i8>, <16 x i8> addrspace(2)* %605, align 16, !invariant.load !0
>  %607 = call float @llvm.SI.load.const(<16 x i8> %606, i32 104)
>  %608 = call float @llvm.pow.f32(float %604, float %607)
>  %609 = call float @llvm.SI.load.const(<16 x i8> %606, i32 108)
>  %610 = fsub float 1.000000e+00, %609
>  %611 = call float @llvm.SI.load.const(<16 x i8> %606, i32 108)
>  %612 = fmul float %611, %608
>  %613 = fadd float %612, %610
>  %614 = fmul float %518, %528
>  %615 = fmul float %508, %533
>  %616 = fmul float %513, %523
>  %617 = fmul float %513, %533
>  %618 = fsub float %617, %614
>  %619 = fmul float %518, %523
>  %620 = fsub float %619, %615
>  %621 = fmul float %508, %528
>  %622 = fsub float %621, %616
>  %623 = fmul float %618, %82
>  %624 = fmul float %620, %82
>  %625 = fmul float %622, %82
>  %626 = fmul float %613, %613
>  %627 = bitcast i32 %12 to float
>  %628 = insertvalue <{ float, float, float }> undef, float %627, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %499, float %501, float %503, float %595)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %58, float %59, float %63, float %64)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %626, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %508, float %513, float %518, float %599)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %523, float %528, float %533, float %623)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %624, float %625, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %580, float %585, float %588, float %593)
>  ret <{ float, float, float }> %628
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].xy, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SAMP[8]
>DCL SAMP[9]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL SVIEW[8], 2D, FLOAT
>DCL SVIEW[9], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..16]
>DCL CONST[24..37]
>DCL TEMP[0..71], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,    -1.0000,     1.0010}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.3333,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,    32.0000,     0.0000}
>IMM[5] INT32 {0, 3, 2, 1}
>IMM[6] FLT32 {    0.3000,     0.5900,     0.1100,     0.0010}
>IMM[7] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[4].wwww
>  1: MOV TEMP[0].yz, IN[5].yxyy
>  2: ADD TEMP[1].xyz, CONST[0].xyzz, -IN[0].xyzz
>  3: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>  4: RSQ TEMP[2].x, TEMP[2].xxxx
>  5: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
>  6: DP3 TEMP[2].x, IN[3].xyzz, IN[3].xyzz
>  7: RSQ TEMP[2].x, TEMP[2].xxxx
>  8: MUL TEMP[2].xyz, IN[3].xyzz, TEMP[2].xxxx
>  9: MOV TEMP[3].xy, IN[1].xyyy
> 10: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 11: MOV TEMP[4], TEMP[3]
> 12: MOV TEMP[4].w, TEMP[3].wwww
> 13: MOV TEMP[5].xy, IN[1].xyyy
> 14: TEX TEMP[5], TEMP[5], SAMP[8], 2D
> 15: MOV TEMP[6], TEMP[5]
> 16: MUL TEMP[6], CONST[25], TEMP[5].xxxx
> 17: MAD TEMP[6], CONST[28], TEMP[5].yyyy, TEMP[6]
> 18: MAD TEMP[6], CONST[31], TEMP[5].zzzz, TEMP[6]
> 19: MUL TEMP[7], CONST[27], TEMP[5].xxxx
> 20: MAD TEMP[7], CONST[30], TEMP[5].yyyy, TEMP[7]
> 21: MAD TEMP[7], CONST[33], TEMP[5].zzzz, TEMP[7]
> 22: MOV TEMP[8].xy, TEMP[7].xyxx
> 23: DP3 TEMP[9].x, TEMP[5].xyzz, IMM[0].xxxx
> 24: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 25: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[9].xxxx
> 26: ADD TEMP[10].xy, TEMP[7].zwww, TEMP[10].xxxx
> 27: MOV TEMP[8].zw, TEMP[10].yyxy
> 28: MUL TEMP[8].xyz, CONST[26].xyzz, TEMP[5].xxxx
> 29: MAD TEMP[8].xyz, CONST[29].xyzz, TEMP[5].yyyy, TEMP[8].xyzz
> 30: MAD TEMP[5].xyz, CONST[32].xyzz, TEMP[5].zzzz, TEMP[8].xyzz
> 31: LRP TEMP[4].xyz, TEMP[9].xxxx, TEMP[5].xyzz, TEMP[3].xyzz
> 32: MUL TEMP[5].xyz, TEMP[6].xyzz, TEMP[7].yyyy
> 33: RCP TEMP[8].x, TEMP[10].yyyy
> 34: POW TEMP[9].x, TEMP[5].xxxx, TEMP[8].xxxx
> 35: POW TEMP[9].y, TEMP[5].yyyy, TEMP[8].xxxx
> 36: POW TEMP[9].z, TEMP[5].zzzz, TEMP[8].xxxx
> 37: MOV TEMP[5].xyz, TEMP[9].xyzx
> 38: MOV TEMP[8].x, CONST[35].xxxx
> 39: MOV TEMP[8].x, CONST[35].yyyy
> 40: MUL TEMP[8].xy, IN[1].xyyy, CONST[24].xyyy
> 41: MUL TEMP[11].xy, CONST[36].xyyy, IN[3].wwww
> 42: MUL TEMP[12].xy, TEMP[8].xyyy, CONST[35].xxxx
> 43: MAD TEMP[11].xy, TEMP[11].xyyy, CONST[35].xxxx, TEMP[12].xyyy
> 44: MOV TEMP[11].xy, TEMP[11].xyyy
> 45: TEX TEMP[11], TEMP[11], SAMP[5], 2D
> 46: MOV TEMP[12], TEMP[11]
> 47: MUL TEMP[12].xy, CONST[36].zwww, IN[3].wwww
> 48: MUL TEMP[8].xy, TEMP[8].xyyy, CONST[35].yyyy
> 49: MAD TEMP[8].xy, TEMP[12].xyyy, CONST[35].yyyy, TEMP[8].xyyy
> 50: MOV TEMP[8].xy, TEMP[8].xyyy
> 51: TEX TEMP[8], TEMP[8], SAMP[5], 2D
> 52: MUL TEMP[8].x, TEMP[8].zzzz, CONST[35].wwww
> 53: MAD TEMP[8].x, TEMP[11].yyyy, CONST[35].zzzz, -TEMP[8].xxxx
> 54: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 55: MUL TEMP[12].x, TEMP[3].wwww, TEMP[8].xxxx
> 56: LRP TEMP[4].xyz, TEMP[12].xxxx, CONST[34].xyzz, TEMP[4].xyzz
> 57: MOV TEMP[12].xy, IN[1].xyyy
> 58: TEX TEMP[12], TEMP[12], SAMP[6], 2D
> 59: LRP TEMP[6].x, TEMP[7].xxxx, TEMP[6].wwww, TEMP[12].wwww
> 60: RCP TEMP[7].x, TEMP[10].xxxx
> 61: POW TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
> 62: MUL TEMP[7].x, TEMP[3].wwww, TEMP[8].xxxx
> 63: LRP TEMP[6].x, TEMP[7].xxxx, CONST[34].wwww, TEMP[6].xxxx
> 64: MOV TEMP[7].xy, IN[1].xyyy
> 65: TEX TEMP[7], TEMP[7], SAMP[4], 2D
> 66: MOV TEMP[8], TEMP[7]
> 67: MAD TEMP[10].xy, TEMP[7].wyyy, IMM[0].yyyy, IMM[0].zzzz
> 68: MOV TEMP[10].z, TEMP[7].xxxx
> 69: DP2 TEMP[12].x, TEMP[10].xyyy, TEMP[10].xyyy
> 70: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 71: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
> 72: SQRT TEMP[12].x, TEMP[12].xxxx
> 73: MAD TEMP[11].xy, TEMP[11].xwww, IMM[0].yyyy, IMM[0].zzzz
> 74: MAD TEMP[10].xy, TEMP[11].xyyy, TEMP[3].wwww, TEMP[10].xyyy
> 75: MOV TEMP[10].z, TEMP[12].xxxx
> 76: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 77: RSQ TEMP[11].x, TEMP[11].xxxx
> 78: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 79: MOV TEMP[3].xyz, TEMP[10].xyzx
> 80: MUL TEMP[3].xyz, IN[4].xyzz, TEMP[10].xxxx
> 81: MAD TEMP[3].xyz, TEMP[0].xyzz, TEMP[10].yyyy, TEMP[3].xyzz
> 82: MAD TEMP[3].xyz, TEMP[2].xyzz, TEMP[10].zzzz, TEMP[3].xyzz
> 83: DP3 TEMP[10].x, TEMP[3].xyzz, TEMP[1].xyzz
> 84: MUL TEMP[10].xyz, TEMP[10].xxxx, TEMP[3].xyzz
> 85: MAD TEMP[10].xyz, IMM[0].yyyy, TEMP[10].xyzz, -TEMP[1].xyzz
> 86: MOV TEMP[11].xy, IN[1].zwww
> 87: TEX TEMP[11], TEMP[11], SAMP[7], 2D
> 88: MOV TEMP[12], TEMP[11]
> 89: ADD TEMP[12].xyz, TEMP[11].zyyy, IMM[1].xxxx
> 90: MUL TEMP[12].xyz, TEMP[12].xyzz, IMM[0].yyyy
> 91: MUL TEMP[13].x, TEMP[11].wwww, IMM[0].yyyy
> 92: MOV TEMP[12].w, TEMP[13].xxxx
> 93: DP2 TEMP[14].x, TEMP[12].xyyy, TEMP[12].xyyy
> 94: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 95: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[14].xxxx
> 96: SQRT TEMP[14].x, TEMP[14].xxxx
> 97: MUL TEMP[15].xyz, IN[4].xyzz, TEMP[12].xxxx
> 98: MAD TEMP[15].xyz, TEMP[0].xyzz, TEMP[12].yyyy, TEMP[15].xyzz
> 99: MAD TEMP[14].xyz, TEMP[2].xyzz, TEMP[14].xxxx, TEMP[15].xyzz
>100: MOV TEMP[12].xyz, TEMP[14].xyzx
>101: DP3 TEMP[15].x, TEMP[10].xyzz, TEMP[14].xyzz
>102: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>103: ADD TEMP[15].x, TEMP[13].xxxx, -TEMP[15].xxxx
>104: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>105: POW TEMP[15].x, TEMP[15].xxxx, IMM[1].yyyy
>106: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>107: MUL TEMP[16].x, IMM[1].zzzz, TEMP[6].xxxx
>108: ADD TEMP[16].x, TEMP[15].xxxx, -TEMP[16].xxxx
>109: LRP TEMP[17].x, TEMP[6].xxxx, IMM[1].wwww, IMM[0].xxxx
>110: MUL TEMP[16].x, TEMP[16].xxxx, TEMP[17].xxxx
>111: MOV_SAT TEMP[16].x, TEMP[16].xxxx
>112: MUL TEMP[15].x, TEMP[15].xxxx, TEMP[16].xxxx
>113: MUL TEMP[13].x, TEMP[13].xxxx, IMM[2].xxxx
>114: MOV TEMP[12].w, TEMP[13].xxxx
>115: MUL TEMP[0].x, TEMP[11].xxxx, TEMP[7].xxxx
>116: DP3 TEMP[10].x, -TEMP[10].xyzz, TEMP[2].xyzz
>117: ADD TEMP[10].x, TEMP[10].xxxx, IMM[0].xxxx
>118: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[2].xyzz
>119: ADD TEMP[11].x, IMM[0].xxxx, -TEMP[11].xxxx
>120: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>121: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[11].xxxx
>122: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>123: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[10].xxxx
>124: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>125: MUL TEMP[10].x, TEMP[15].xxxx, TEMP[10].xxxx
>126: MOV TEMP[0].y, TEMP[10].xxxx
>127: MOV TEMP[11].w, IMM[0].xxxx
>128: MAD TEMP[11].xyz, IMM[2].yyyy, TEMP[2].xyzz, IN[0].xyzz
>129: MUL TEMP[2], CONST[4], TEMP[11].xxxx
>130: MAD TEMP[2], CONST[5], TEMP[11].yyyy, TEMP[2]
>131: MAD TEMP[2], CONST[6], TEMP[11].zzzz, TEMP[2]
>132: ADD TEMP[2], TEMP[2], CONST[7]
>133: MAD TEMP[11].x, IMM[2].zzzz, TEMP[6].xxxx, IMM[0].yyyy
>134: EX2 TEMP[11].x, TEMP[11].xxxx
>135: MOV TEMP[15].xyz, -CONST[1].xyzx
>136: ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[1].xyzz
>137: MUL TEMP[16].xyz, TEMP[16].xyzz, IMM[2].wwww
>138: DP3 TEMP[17].x, TEMP[16].xyzz, TEMP[16].xyzz
>139: RSQ TEMP[17].x, TEMP[17].xxxx
>140: MUL TEMP[16].xyz, TEMP[16].xyzz, TEMP[17].xxxx
>141: DP3 TEMP[17].x, TEMP[15].xyzz, TEMP[3].xyzz
>142: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>143: MOV TEMP[18].xy, TEMP[2].xyyy
>144: MOV TEMP[18].w, IMM[0].xxxx
>145: MOV TEMP[18].z, TEMP[2].zzzz
>146: TXP TEMP[2], TEMP[18], SAMP[0], SHADOW2D
>147: MOV TEMP[18].x, TEMP[2].xxxx
>148: DP3 TEMP[18].x, TEMP[15].xyzz, TEMP[14].xyzz
>149: MOV_SAT TEMP[18].x, TEMP[18].xxxx
>150: ADD TEMP[13].x, TEMP[13].xxxx, -TEMP[18].xxxx
>151: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>152: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>153: MUL TEMP[2].xyz, CONST[3].xyzz, TEMP[2].xxxx
>154: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[13].xxxx
>155: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>156: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>157: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[7].xxxx
>158: MUL TEMP[2].xyz, TEMP[17].xxxx, TEMP[2].xyzz
>159: MOV TEMP[7].xyz, TEMP[3].xyzz
>160: TEX TEMP[7], TEMP[7], SAMP[1], CUBE
>161: MOV TEMP[13], TEMP[7]
>162: DP3 TEMP[13].x, TEMP[3].xyzz, TEMP[1].xyzz
>163: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[3].xyzz
>164: MAD TEMP[13].xyz, IMM[0].yyyy, TEMP[13].xyzz, -TEMP[1].xyzz
>165: ADD TEMP[18].x, IMM[0].xxxx, -TEMP[6].xxxx
>166: MUL TEMP[18].x, TEMP[18].xxxx, IMM[3].xxxx
>167: MOV TEMP[13].w, TEMP[18].xxxx
>168: DP3 TEMP[19].x, TEMP[1].xyzz, TEMP[3].xyzz
>169: MOV_SAT TEMP[19].x, TEMP[19].xxxx
>170: ADD TEMP[19].x, IMM[0].xxxx, -TEMP[19].xxxx
>171: POW TEMP[19].x, TEMP[19].xxxx, IMM[3].yyyy
>172: MAX TEMP[6].xyz, TEMP[6].xxxx, TEMP[9].xyzz
>173: ADD TEMP[6].xyz, TEMP[6].xyzz, -TEMP[9].xyzz
>174: MAD TEMP[6].xyz, TEMP[19].xxxx, TEMP[6].xyzz, TEMP[9].xyzz
>175: MOV TEMP[13].xyz, TEMP[13].xyzz
>176: MOV TEMP[13].w, TEMP[18].xxxx
>177: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
>178: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[13].xyzz
>179: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>180: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>181: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>182: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[7].wwww
>183: MUL TEMP[7].xyz, TEMP[7].xyzz, IMM[3].wwww
>184: MUL TEMP[7].xyz, TEMP[13].xxxx, TEMP[7].xyzz
>185: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>186: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>187: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>188: MUL TEMP[13].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>189: MAD TEMP[7].xyz, TEMP[7].xyzz, TEMP[0].xxxx, TEMP[13].xyzz
>190: DP3 TEMP[13].x, TEMP[15].xyzz, TEMP[16].xyzz
>191: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>192: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>193: POW TEMP[13].x, TEMP[13].xxxx, IMM[3].yyyy
>194: ADD TEMP[15].xyz, IMM[0].xxxx, -TEMP[9].xyzz
>195: MAD TEMP[9].xyz, TEMP[13].xxxx, TEMP[15].xyzz, TEMP[9].xyzz
>196: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xyzz
>197: ADD TEMP[9].x, TEMP[11].xxxx, IMM[0].yyyy
>198: MUL TEMP[9].x, TEMP[9].xxxx, IMM[4].xxxx
>199: MUL TEMP[13].x, -TEMP[11].xxxx, IMM[2].wwww
>200: EX2 TEMP[13].x, TEMP[13].xxxx
>201: ADD TEMP[13].x, IMM[0].yyyy, -TEMP[13].xxxx
>202: RCP TEMP[13].x, TEMP[13].xxxx
>203: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[13].xxxx
>204: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>205: DP3 TEMP[9].x, TEMP[3].xyzz, TEMP[16].xyzz
>206: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>207: POW TEMP[9].x, TEMP[9].xxxx, TEMP[11].xxxx
>208: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>209: DP3 TEMP[9].x, TEMP[1].xyzz, TEMP[3].xyzz
>210: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>211: MAX TEMP[9].x, TEMP[17].xxxx, TEMP[9].xxxx
>212: ADD TEMP[9].x, TEMP[9].xxxx, IMM[4].yyyy
>213: RCP TEMP[9].x, TEMP[9].xxxx
>214: MAD TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx, TEMP[6].xyzz
>215: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[10].xxxx
>216: MOV TEMP[9].x, IMM[5].xxxx
>217: BGNLOOP :0
>218:   ISGE TEMP[10].x, TEMP[9].xxxx, IMM[5].yyyy
>219:   UIF TEMP[10].xxxx :0
>220:     BRK
>221:   ENDIF
>222:   UMUL TEMP[13].x, TEMP[9].xxxx, IMM[5].zzzz
>223:   UARL ADDR[0].x, TEMP[13].xxxx
>224:   UARL ADDR[0].x, TEMP[13].xxxx
>225:   ADD TEMP[15].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>226:   DP3 TEMP[16].x, TEMP[15].xyzz, TEMP[15].xyzz
>227:   RSQ TEMP[17].x, TEMP[16].xxxx
>228:   MUL TEMP[18].xyz, TEMP[15].xyzz, TEMP[17].xxxx
>229:   ADD TEMP[19].xyz, TEMP[18].xyzz, TEMP[1].xyzz
>230:   MUL TEMP[20].xyz, TEMP[19].xyzz, IMM[2].wwww
>231:   DP3 TEMP[21].x, TEMP[20].xyzz, TEMP[20].xyzz
>232:   RSQ TEMP[22].x, TEMP[21].xxxx
>233:   MUL TEMP[23].xyz, TEMP[20].xyzz, TEMP[22].xxxx
>234:   DP3 TEMP[24].x, TEMP[18].xyzz, TEMP[3].xyzz
>235:   MOV_SAT TEMP[25].x, TEMP[24].xxxx
>236:   DP3 TEMP[26].x, TEMP[18].xyzz, TEMP[14].xyzz
>237:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>238:   ADD TEMP[28].x, TEMP[12].wwww, -TEMP[27].xxxx
>239:   MOV_SAT TEMP[29].x, TEMP[28].xxxx
>240:   MUL TEMP[30].x, TEMP[29].xxxx, TEMP[29].xxxx
>241:   UMAD TEMP[31].x, TEMP[9].xxxx, IMM[5].zzzz, IMM[5].wwww
>242:   MUL TEMP[32].x, TEMP[16].xxxx, TEMP[17].xxxx
>243:   UMUL TEMP[33].x, TEMP[9].xxxx, IMM[5].zzzz
>244:   UARL ADDR[0].x, TEMP[33].xxxx
>245:   MUL TEMP[34].x, TEMP[32].xxxx, CONST[ADDR[0].x+11].wwww
>246:   MOV_SAT TEMP[35].x, TEMP[34].xxxx
>247:   ADD TEMP[36].x, IMM[0].xxxx, -TEMP[35].xxxx
>248:   UARL ADDR[0].x, TEMP[31].xxxx
>249:   MUL TEMP[37].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[36].xxxx
>250:   MUL TEMP[38].x, TEMP[30].xxxx, TEMP[30].xxxx
>251:   MOV_SAT TEMP[39].x, TEMP[38].xxxx
>252:   LRP TEMP[40].x, TEMP[17].xxxx, IMM[0].xxxx, TEMP[39].xxxx
>253:   MUL TEMP[41].xyz, TEMP[37].xyzz, TEMP[40].xxxx
>254:   MUL TEMP[42].xyz, TEMP[41].xyzz, TEMP[8].xxxx
>255:   MUL TEMP[43].xyz, TEMP[25].xxxx, TEMP[42].xyzz
>256:   DP3 TEMP[44].x, TEMP[5].xyzz, IMM[3].zzzz
>257:   ADD TEMP[45].x, IMM[0].xxxx, -TEMP[44].xxxx
>258:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>259:   MAD TEMP[7].xyz, TEMP[43].xyzz, TEMP[46].xxxx, TEMP[7].xyzz
>260:   DP3 TEMP[47].x, TEMP[18].xyzz, TEMP[23].xyzz
>261:   MOV_SAT TEMP[48].x, TEMP[47].xxxx
>262:   ADD TEMP[49].x, IMM[0].xxxx, -TEMP[48].xxxx
>263:   POW TEMP[50].x, TEMP[49].xxxx, IMM[3].yyyy
>264:   ADD TEMP[51].xyz, IMM[0].xxxx, -TEMP[5].xyzz
>265:   MAD TEMP[52].xyz, TEMP[50].xxxx, TEMP[51].xyzz, TEMP[5].xyzz
>266:   MUL TEMP[53].xyz, TEMP[43].xyzz, TEMP[52].xyzz
>267:   ADD TEMP[54].x, TEMP[11].xxxx, IMM[0].yyyy
>268:   MUL TEMP[55].x, TEMP[54].xxxx, IMM[4].xxxx
>269:   MUL TEMP[56].x, -TEMP[11].xxxx, IMM[2].wwww
>270:   EX2 TEMP[57].x, TEMP[56].xxxx
>271:   ADD TEMP[58].x, IMM[0].yyyy, -TEMP[57].xxxx
>272:   RCP TEMP[59].x, TEMP[58].xxxx
>273:   MUL TEMP[60].x, TEMP[55].xxxx, TEMP[59].xxxx
>274:   MUL TEMP[61].xyz, TEMP[53].xyzz, TEMP[60].xxxx
>275:   DP3 TEMP[62].x, TEMP[3].xyzz, TEMP[23].xyzz
>276:   MOV_SAT TEMP[63].x, TEMP[62].xxxx
>277:   POW TEMP[64].x, TEMP[63].xxxx, TEMP[11].xxxx
>278:   MUL TEMP[65].xyz, TEMP[61].xyzz, TEMP[64].xxxx
>279:   DP3 TEMP[66].x, TEMP[1].xyzz, TEMP[3].xyzz
>280:   MOV_SAT TEMP[67].x, TEMP[66].xxxx
>281:   MAX TEMP[68].x, TEMP[25].xxxx, TEMP[67].xxxx
>282:   ADD TEMP[69].x, TEMP[68].xxxx, IMM[4].yyyy
>283:   RCP TEMP[70].x, TEMP[69].xxxx
>284:   MUL TEMP[71].xyz, TEMP[65].xyzz, TEMP[70].xxxx
>285:   MAD TEMP[2].xyz, TEMP[71].xyzz, TEMP[0].yyyy, TEMP[2].xyzz
>286:   UADD TEMP[9].x, TEMP[9].xxxx, IMM[5].wwww
>287: ENDLOOP :0
>288: MUL TEMP[0].xyz, TEMP[6].xyzz, TEMP[0].yyyy
>289: MOV TEMP[1].xy, IN[1].xyyy
>290: TEX TEMP[1], TEMP[1], SAMP[9], 2D
>291: MOV TEMP[2].w, TEMP[1].wwww
>292: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[6].xyzz
>293: MUL TEMP[3].x, TEMP[3].xxxx, CONST[37].xxxx
>294: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[3].xxxx
>295: MUL TEMP[1].xyz, TEMP[2], IMM[4].zzzz
>296: MAD TEMP[0].xyz, TEMP[7].xyzz, TEMP[4].xyzz, TEMP[0].xyzz
>297: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>298: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>299: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].wwww
>300: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>301: ADD TEMP[2].x, TEMP[2].xxxx, IMM[6].wwww
>302: RCP TEMP[2].x, TEMP[2].xxxx
>303: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>304: FRC TEMP[2].x, CONST[1].wwww
>305: MUL TEMP[2].x, TEMP[2].xxxx, IMM[7].xxxx
>306: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>307: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>308: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>309: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>310: MOV TEMP[0].w, IN[0].wwww
>311: MOV OUT[0], TEMP[0]
>312: END
>radeonsi: Compiling shader 126
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 0)
>  %29 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = call float @llvm.SI.load.const(<16 x i8> %27, i32 4)
>  %32 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 8)
>  %37 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %38 = fsub float %36, %37
>  %39 = fmul float %30, %30
>  %40 = fmul float %33, %33
>  %41 = fadd float %40, %39
>  %42 = fmul float %38, %38
>  %43 = fadd float %41, %42
>  %44 = call float @llvm.sqrt.f32(float %43)
>  %45 = fdiv float 1.000000e+00, %44, !fpmath !1
>  %46 = fmul float %30, %45
>  %47 = fmul float %33, %45
>  %48 = fmul float %38, %45
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %55 = fmul float %49, %52
>  %56 = fmul float %50, %53
>  %57 = fadd float %56, %55
>  %58 = fmul float %51, %54
>  %59 = fadd float %57, %58
>  %60 = call float @llvm.sqrt.f32(float %59)
>  %61 = fdiv float 1.000000e+00, %60, !fpmath !1
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %63 = fmul float %62, %61
>  %64 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %65 = fmul float %64, %61
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %67 = fmul float %66, %61
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %70 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %71 = load <8 x i32>, <8 x i32> addrspace(2)* %70, align 32, !invariant.load !0
>  %72 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %73 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %72, i64 0, i64 15, !amdgpu.uniform !0
>  %74 = load <4 x i32>, <4 x i32> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = extractelement <8 x i32> %71, i32 7
>  %76 = extractelement <4 x i32> %74, i32 0
>  %77 = and i32 %76, %75
>  %78 = insertelement <4 x i32> %74, i32 %77, i32 0
>  %79 = bitcast float %68 to i32
>  %80 = bitcast float %69 to i32
>  %81 = insertelement <2 x i32> undef, i32 %79, i32 0
>  %82 = insertelement <2 x i32> %81, i32 %80, i32 1
>  %83 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %82, <8 x i32> %71, <4 x i32> %78, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %84 = extractelement <4 x float> %83, i32 0
>  %85 = extractelement <4 x float> %83, i32 1
>  %86 = extractelement <4 x float> %83, i32 2
>  %87 = extractelement <4 x float> %83, i32 3
>  %88 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %89 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %90 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 16, !amdgpu.uniform !0
>  %91 = load <8 x i32>, <8 x i32> addrspace(2)* %90, align 32, !invariant.load !0
>  %92 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %93 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %92, i64 0, i64 35, !amdgpu.uniform !0
>  %94 = load <4 x i32>, <4 x i32> addrspace(2)* %93, align 16, !invariant.load !0
>  %95 = extractelement <8 x i32> %91, i32 7
>  %96 = extractelement <4 x i32> %94, i32 0
>  %97 = and i32 %96, %95
>  %98 = insertelement <4 x i32> %94, i32 %97, i32 0
>  %99 = bitcast float %88 to i32
>  %100 = bitcast float %89 to i32
>  %101 = insertelement <2 x i32> undef, i32 %99, i32 0
>  %102 = insertelement <2 x i32> %101, i32 %100, i32 1
>  %103 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %102, <8 x i32> %91, <4 x i32> %98, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 400)
>  %110 = fmul float %109, %104
>  %111 = call float @llvm.SI.load.const(<16 x i8> %108, i32 404)
>  %112 = fmul float %111, %104
>  %113 = call float @llvm.SI.load.const(<16 x i8> %108, i32 408)
>  %114 = fmul float %113, %104
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = call float @llvm.SI.load.const(<16 x i8> %116, i32 412)
>  %118 = fmul float %117, %104
>  %119 = call float @llvm.SI.load.const(<16 x i8> %116, i32 448)
>  %120 = fmul float %119, %105
>  %121 = fadd float %120, %110
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = call float @llvm.SI.load.const(<16 x i8> %123, i32 452)
>  %125 = fmul float %124, %105
>  %126 = fadd float %125, %112
>  %127 = call float @llvm.SI.load.const(<16 x i8> %123, i32 456)
>  %128 = fmul float %127, %105
>  %129 = fadd float %128, %114
>  %130 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %131 = load <16 x i8>, <16 x i8> addrspace(2)* %130, align 16, !invariant.load !0
>  %132 = call float @llvm.SI.load.const(<16 x i8> %131, i32 460)
>  %133 = fmul float %132, %105
>  %134 = fadd float %133, %118
>  %135 = call float @llvm.SI.load.const(<16 x i8> %131, i32 496)
>  %136 = fmul float %135, %106
>  %137 = fadd float %136, %121
>  %138 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %139 = load <16 x i8>, <16 x i8> addrspace(2)* %138, align 16, !invariant.load !0
>  %140 = call float @llvm.SI.load.const(<16 x i8> %139, i32 500)
>  %141 = fmul float %140, %106
>  %142 = fadd float %141, %126
>  %143 = call float @llvm.SI.load.const(<16 x i8> %139, i32 504)
>  %144 = fmul float %143, %106
>  %145 = fadd float %144, %129
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = call float @llvm.SI.load.const(<16 x i8> %147, i32 508)
>  %149 = fmul float %148, %106
>  %150 = fadd float %149, %134
>  %151 = call float @llvm.SI.load.const(<16 x i8> %147, i32 432)
>  %152 = fmul float %151, %104
>  %153 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %154 = load <16 x i8>, <16 x i8> addrspace(2)* %153, align 16, !invariant.load !0
>  %155 = call float @llvm.SI.load.const(<16 x i8> %154, i32 436)
>  %156 = fmul float %155, %104
>  %157 = call float @llvm.SI.load.const(<16 x i8> %154, i32 440)
>  %158 = fmul float %157, %104
>  %159 = call float @llvm.SI.load.const(<16 x i8> %154, i32 444)
>  %160 = fmul float %159, %104
>  %161 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %162 = load <16 x i8>, <16 x i8> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = call float @llvm.SI.load.const(<16 x i8> %162, i32 480)
>  %164 = fmul float %163, %105
>  %165 = fadd float %164, %152
>  %166 = call float @llvm.SI.load.const(<16 x i8> %162, i32 484)
>  %167 = fmul float %166, %105
>  %168 = fadd float %167, %156
>  %169 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %170 = load <16 x i8>, <16 x i8> addrspace(2)* %169, align 16, !invariant.load !0
>  %171 = call float @llvm.SI.load.const(<16 x i8> %170, i32 488)
>  %172 = fmul float %171, %105
>  %173 = fadd float %172, %158
>  %174 = call float @llvm.SI.load.const(<16 x i8> %170, i32 492)
>  %175 = fmul float %174, %105
>  %176 = fadd float %175, %160
>  %177 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %178 = load <16 x i8>, <16 x i8> addrspace(2)* %177, align 16, !invariant.load !0
>  %179 = call float @llvm.SI.load.const(<16 x i8> %178, i32 528)
>  %180 = fmul float %179, %106
>  %181 = fadd float %180, %165
>  %182 = call float @llvm.SI.load.const(<16 x i8> %178, i32 532)
>  %183 = fmul float %182, %106
>  %184 = fadd float %183, %168
>  %185 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %186 = load <16 x i8>, <16 x i8> addrspace(2)* %185, align 16, !invariant.load !0
>  %187 = call float @llvm.SI.load.const(<16 x i8> %186, i32 536)
>  %188 = fmul float %187, %106
>  %189 = fadd float %188, %173
>  %190 = call float @llvm.SI.load.const(<16 x i8> %186, i32 540)
>  %191 = fmul float %190, %106
>  %192 = fadd float %191, %176
>  %193 = fadd float %105, %104
>  %194 = fadd float %193, %106
>  %195 = call float @llvm.AMDGPU.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %196 = fsub float 1.000000e+00, %195
>  %197 = fadd float %189, %196
>  %198 = fadd float %192, %196
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 416)
>  %202 = fmul float %201, %104
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 420)
>  %204 = fmul float %203, %104
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 424)
>  %206 = fmul float %205, %104
>  %207 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %208 = load <16 x i8>, <16 x i8> addrspace(2)* %207, align 16, !invariant.load !0
>  %209 = call float @llvm.SI.load.const(<16 x i8> %208, i32 464)
>  %210 = fmul float %209, %105
>  %211 = fadd float %210, %202
>  %212 = call float @llvm.SI.load.const(<16 x i8> %208, i32 468)
>  %213 = fmul float %212, %105
>  %214 = fadd float %213, %204
>  %215 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %216 = load <16 x i8>, <16 x i8> addrspace(2)* %215, align 16, !invariant.load !0
>  %217 = call float @llvm.SI.load.const(<16 x i8> %216, i32 472)
>  %218 = fmul float %217, %105
>  %219 = fadd float %218, %206
>  %220 = call float @llvm.SI.load.const(<16 x i8> %216, i32 512)
>  %221 = fmul float %220, %106
>  %222 = fadd float %221, %211
>  %223 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %224 = load <16 x i8>, <16 x i8> addrspace(2)* %223, align 16, !invariant.load !0
>  %225 = call float @llvm.SI.load.const(<16 x i8> %224, i32 516)
>  %226 = fmul float %225, %106
>  %227 = fadd float %226, %214
>  %228 = call float @llvm.SI.load.const(<16 x i8> %224, i32 520)
>  %229 = fmul float %228, %106
>  %230 = fadd float %229, %219
>  %231 = fsub float 1.000000e+00, %195
>  %232 = fmul float %222, %195
>  %233 = fmul float %84, %231
>  %234 = fadd float %232, %233
>  %235 = fsub float 1.000000e+00, %195
>  %236 = fmul float %227, %195
>  %237 = fmul float %85, %235
>  %238 = fadd float %236, %237
>  %239 = fsub float 1.000000e+00, %195
>  %240 = fmul float %230, %195
>  %241 = fmul float %86, %239
>  %242 = fadd float %240, %241
>  %243 = fmul float %137, %184
>  %244 = fmul float %142, %184
>  %245 = fmul float %145, %184
>  %246 = fdiv float 1.000000e+00, %198, !fpmath !1
>  %247 = call float @llvm.pow.f32(float %243, float %246)
>  %248 = call float @llvm.pow.f32(float %244, float %246)
>  %249 = call float @llvm.pow.f32(float %245, float %246)
>  %250 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = call float @llvm.SI.load.const(<16 x i8> %252, i32 384)
>  %254 = fmul float %250, %253
>  %255 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %256 = call float @llvm.SI.load.const(<16 x i8> %252, i32 388)
>  %257 = fmul float %255, %256
>  %258 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %259 = load <16 x i8>, <16 x i8> addrspace(2)* %258, align 16, !invariant.load !0
>  %260 = call float @llvm.SI.load.const(<16 x i8> %259, i32 576)
>  %261 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %262 = fmul float %260, %261
>  %263 = call float @llvm.SI.load.const(<16 x i8> %259, i32 580)
>  %264 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %265 = fmul float %263, %264
>  %266 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %267 = load <16 x i8>, <16 x i8> addrspace(2)* %266, align 16, !invariant.load !0
>  %268 = call float @llvm.SI.load.const(<16 x i8> %267, i32 560)
>  %269 = fmul float %254, %268
>  %270 = call float @llvm.SI.load.const(<16 x i8> %267, i32 560)
>  %271 = fmul float %257, %270
>  %272 = call float @llvm.SI.load.const(<16 x i8> %267, i32 560)
>  %273 = fmul float %262, %272
>  %274 = fadd float %273, %269
>  %275 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %276 = load <16 x i8>, <16 x i8> addrspace(2)* %275, align 16, !invariant.load !0
>  %277 = call float @llvm.SI.load.const(<16 x i8> %276, i32 560)
>  %278 = fmul float %265, %277
>  %279 = fadd float %278, %271
>  %280 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %281 = load <8 x i32>, <8 x i32> addrspace(2)* %280, align 32, !invariant.load !0
>  %282 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %283 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %282, i64 0, i64 23, !amdgpu.uniform !0
>  %284 = load <4 x i32>, <4 x i32> addrspace(2)* %283, align 16, !invariant.load !0
>  %285 = extractelement <8 x i32> %281, i32 7
>  %286 = extractelement <4 x i32> %284, i32 0
>  %287 = and i32 %286, %285
>  %288 = insertelement <4 x i32> %284, i32 %287, i32 0
>  %289 = bitcast float %274 to i32
>  %290 = bitcast float %279 to i32
>  %291 = insertelement <2 x i32> undef, i32 %289, i32 0
>  %292 = insertelement <2 x i32> %291, i32 %290, i32 1
>  %293 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %292, <8 x i32> %281, <4 x i32> %288, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %294 = extractelement <4 x float> %293, i32 0
>  %295 = extractelement <4 x float> %293, i32 1
>  %296 = extractelement <4 x float> %293, i32 3
>  %297 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %298 = load <16 x i8>, <16 x i8> addrspace(2)* %297, align 16, !invariant.load !0
>  %299 = call float @llvm.SI.load.const(<16 x i8> %298, i32 584)
>  %300 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %301 = fmul float %299, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %298, i32 588)
>  %303 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %304 = fmul float %302, %303
>  %305 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %306 = load <16 x i8>, <16 x i8> addrspace(2)* %305, align 16, !invariant.load !0
>  %307 = call float @llvm.SI.load.const(<16 x i8> %306, i32 564)
>  %308 = fmul float %254, %307
>  %309 = call float @llvm.SI.load.const(<16 x i8> %306, i32 564)
>  %310 = fmul float %257, %309
>  %311 = call float @llvm.SI.load.const(<16 x i8> %306, i32 564)
>  %312 = fmul float %301, %311
>  %313 = fadd float %312, %308
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = call float @llvm.SI.load.const(<16 x i8> %315, i32 564)
>  %317 = fmul float %304, %316
>  %318 = fadd float %317, %310
>  %319 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %320 = load <8 x i32>, <8 x i32> addrspace(2)* %319, align 32, !invariant.load !0
>  %321 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %322 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %321, i64 0, i64 23, !amdgpu.uniform !0
>  %323 = load <4 x i32>, <4 x i32> addrspace(2)* %322, align 16, !invariant.load !0
>  %324 = extractelement <8 x i32> %320, i32 7
>  %325 = extractelement <4 x i32> %323, i32 0
>  %326 = and i32 %325, %324
>  %327 = insertelement <4 x i32> %323, i32 %326, i32 0
>  %328 = bitcast float %313 to i32
>  %329 = bitcast float %318 to i32
>  %330 = insertelement <2 x i32> undef, i32 %328, i32 0
>  %331 = insertelement <2 x i32> %330, i32 %329, i32 1
>  %332 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %331, <8 x i32> %320, <4 x i32> %327, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %333 = extractelement <4 x float> %332, i32 2
>  %334 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %335 = load <16 x i8>, <16 x i8> addrspace(2)* %334, align 16, !invariant.load !0
>  %336 = call float @llvm.SI.load.const(<16 x i8> %335, i32 572)
>  %337 = fmul float %333, %336
>  %338 = call float @llvm.SI.load.const(<16 x i8> %335, i32 568)
>  %339 = fmul float %295, %338
>  %340 = fsub float %339, %337
>  %341 = call float @llvm.AMDGPU.clamp.(float %340, float 0.000000e+00, float 1.000000e+00)
>  %342 = fmul float %87, %341
>  %343 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %344 = load <16 x i8>, <16 x i8> addrspace(2)* %343, align 16, !invariant.load !0
>  %345 = call float @llvm.SI.load.const(<16 x i8> %344, i32 544)
>  %346 = fsub float 1.000000e+00, %342
>  %347 = fmul float %345, %342
>  %348 = fmul float %234, %346
>  %349 = fadd float %347, %348
>  %350 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %351 = load <16 x i8>, <16 x i8> addrspace(2)* %350, align 16, !invariant.load !0
>  %352 = call float @llvm.SI.load.const(<16 x i8> %351, i32 548)
>  %353 = fsub float 1.000000e+00, %342
>  %354 = fmul float %352, %342
>  %355 = fmul float %238, %353
>  %356 = fadd float %354, %355
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = call float @llvm.SI.load.const(<16 x i8> %358, i32 552)
>  %360 = fsub float 1.000000e+00, %342
>  %361 = fmul float %359, %342
>  %362 = fmul float %242, %360
>  %363 = fadd float %361, %362
>  %364 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %365 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %366 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %367 = load <8 x i32>, <8 x i32> addrspace(2)* %366, align 32, !invariant.load !0
>  %368 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %369 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %368, i64 0, i64 27, !amdgpu.uniform !0
>  %370 = load <4 x i32>, <4 x i32> addrspace(2)* %369, align 16, !invariant.load !0
>  %371 = extractelement <8 x i32> %367, i32 7
>  %372 = extractelement <4 x i32> %370, i32 0
>  %373 = and i32 %372, %371
>  %374 = insertelement <4 x i32> %370, i32 %373, i32 0
>  %375 = bitcast float %364 to i32
>  %376 = bitcast float %365 to i32
>  %377 = insertelement <2 x i32> undef, i32 %375, i32 0
>  %378 = insertelement <2 x i32> %377, i32 %376, i32 1
>  %379 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %378, <8 x i32> %367, <4 x i32> %374, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %380 = extractelement <4 x float> %379, i32 3
>  %381 = fsub float 1.000000e+00, %181
>  %382 = fmul float %150, %181
>  %383 = fmul float %380, %381
>  %384 = fadd float %382, %383
>  %385 = fdiv float 1.000000e+00, %197, !fpmath !1
>  %386 = call float @llvm.pow.f32(float %384, float %385)
>  %387 = fmul float %87, %341
>  %388 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %389 = load <16 x i8>, <16 x i8> addrspace(2)* %388, align 16, !invariant.load !0
>  %390 = call float @llvm.SI.load.const(<16 x i8> %389, i32 556)
>  %391 = fsub float 1.000000e+00, %387
>  %392 = fmul float %390, %387
>  %393 = fmul float %386, %391
>  %394 = fadd float %392, %393
>  %395 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %396 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %397 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %398 = load <8 x i32>, <8 x i32> addrspace(2)* %397, align 32, !invariant.load !0
>  %399 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %400 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %399, i64 0, i64 19, !amdgpu.uniform !0
>  %401 = load <4 x i32>, <4 x i32> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = extractelement <8 x i32> %398, i32 7
>  %403 = extractelement <4 x i32> %401, i32 0
>  %404 = and i32 %403, %402
>  %405 = insertelement <4 x i32> %401, i32 %404, i32 0
>  %406 = bitcast float %395 to i32
>  %407 = bitcast float %396 to i32
>  %408 = insertelement <2 x i32> undef, i32 %406, i32 0
>  %409 = insertelement <2 x i32> %408, i32 %407, i32 1
>  %410 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %409, <8 x i32> %398, <4 x i32> %405, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %411 = extractelement <4 x float> %410, i32 0
>  %412 = extractelement <4 x float> %410, i32 1
>  %413 = extractelement <4 x float> %410, i32 3
>  %414 = fmul float %413, 2.000000e+00
>  %415 = fadd float %414, -1.000000e+00
>  %416 = fmul float %412, 2.000000e+00
>  %417 = fadd float %416, -1.000000e+00
>  %418 = fmul float %415, %415
>  %419 = fmul float %417, %417
>  %420 = fadd float %418, %419
>  %421 = call float @llvm.AMDGPU.clamp.(float %420, float 0.000000e+00, float 1.000000e+00)
>  %422 = fsub float 0x3FF00418A0000000, %421
>  %423 = call float @llvm.sqrt.f32(float %422)
>  %424 = fmul float %294, 2.000000e+00
>  %425 = fadd float %424, -1.000000e+00
>  %426 = fmul float %296, 2.000000e+00
>  %427 = fadd float %426, -1.000000e+00
>  %428 = fmul float %425, %87
>  %429 = fadd float %428, %415
>  %430 = fmul float %427, %87
>  %431 = fadd float %430, %417
>  %432 = fmul float %429, %429
>  %433 = fmul float %431, %431
>  %434 = fadd float %433, %432
>  %435 = fmul float %423, %423
>  %436 = fadd float %434, %435
>  %437 = call float @llvm.sqrt.f32(float %436)
>  %438 = fdiv float 1.000000e+00, %437, !fpmath !1
>  %439 = fmul float %429, %438
>  %440 = fmul float %431, %438
>  %441 = fmul float %423, %438
>  %442 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %443 = fmul float %442, %439
>  %444 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %445 = fmul float %444, %439
>  %446 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %447 = fmul float %446, %439
>  %448 = fmul float %23, %440
>  %449 = fadd float %448, %443
>  %450 = fmul float %24, %440
>  %451 = fadd float %450, %445
>  %452 = fmul float %25, %440
>  %453 = fadd float %452, %447
>  %454 = fmul float %63, %441
>  %455 = fadd float %454, %449
>  %456 = fmul float %65, %441
>  %457 = fadd float %456, %451
>  %458 = fmul float %67, %441
>  %459 = fadd float %458, %453
>  %460 = fmul float %455, %46
>  %461 = fmul float %457, %47
>  %462 = fadd float %461, %460
>  %463 = fmul float %459, %48
>  %464 = fadd float %462, %463
>  %465 = fmul float %464, %455
>  %466 = fmul float %464, %457
>  %467 = fmul float %464, %459
>  %468 = fmul float %465, 2.000000e+00
>  %469 = fsub float %468, %46
>  %470 = fmul float %466, 2.000000e+00
>  %471 = fsub float %470, %47
>  %472 = fmul float %467, 2.000000e+00
>  %473 = fsub float %472, %48
>  %474 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %475 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %476 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %477 = load <8 x i32>, <8 x i32> addrspace(2)* %476, align 32, !invariant.load !0
>  %478 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %479 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %478, i64 0, i64 31, !amdgpu.uniform !0
>  %480 = load <4 x i32>, <4 x i32> addrspace(2)* %479, align 16, !invariant.load !0
>  %481 = extractelement <8 x i32> %477, i32 7
>  %482 = extractelement <4 x i32> %480, i32 0
>  %483 = and i32 %482, %481
>  %484 = insertelement <4 x i32> %480, i32 %483, i32 0
>  %485 = bitcast float %474 to i32
>  %486 = bitcast float %475 to i32
>  %487 = insertelement <2 x i32> undef, i32 %485, i32 0
>  %488 = insertelement <2 x i32> %487, i32 %486, i32 1
>  %489 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %488, <8 x i32> %477, <4 x i32> %484, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %490 = extractelement <4 x float> %489, i32 0
>  %491 = extractelement <4 x float> %489, i32 1
>  %492 = extractelement <4 x float> %489, i32 2
>  %493 = extractelement <4 x float> %489, i32 3
>  %494 = fadd float %492, -5.000000e-01
>  %495 = fadd float %491, -5.000000e-01
>  %496 = fmul float %494, 2.000000e+00
>  %497 = fmul float %495, 2.000000e+00
>  %498 = fmul float %493, 2.000000e+00
>  %499 = fmul float %496, %496
>  %500 = fmul float %497, %497
>  %501 = fadd float %499, %500
>  %502 = call float @llvm.AMDGPU.clamp.(float %501, float 0.000000e+00, float 1.000000e+00)
>  %503 = fsub float 1.000000e+00, %502
>  %504 = call float @llvm.sqrt.f32(float %503)
>  %505 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %506 = fmul float %505, %496
>  %507 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %508 = fmul float %507, %496
>  %509 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %510 = fmul float %509, %496
>  %511 = fmul float %23, %497
>  %512 = fadd float %511, %506
>  %513 = fmul float %24, %497
>  %514 = fadd float %513, %508
>  %515 = fmul float %25, %497
>  %516 = fadd float %515, %510
>  %517 = fmul float %63, %504
>  %518 = fadd float %517, %512
>  %519 = fmul float %65, %504
>  %520 = fadd float %519, %514
>  %521 = fmul float %67, %504
>  %522 = fadd float %521, %516
>  %523 = fmul float %469, %518
>  %524 = fmul float %471, %520
>  %525 = fadd float %524, %523
>  %526 = fmul float %473, %522
>  %527 = fadd float %525, %526
>  %528 = call float @llvm.AMDGPU.clamp.(float %527, float 0.000000e+00, float 1.000000e+00)
>  %529 = fsub float %498, %528
>  %530 = call float @llvm.AMDGPU.clamp.(float %529, float 0.000000e+00, float 1.000000e+00)
>  %531 = call float @llvm.pow.f32(float %530, float 3.000000e+00)
>  %532 = call float @llvm.AMDGPU.clamp.(float %531, float 0.000000e+00, float 1.000000e+00)
>  %533 = fmul float %394, 0x3FD3333340000000
>  %534 = fsub float %532, %533
>  %535 = fsub float 1.000000e+00, %394
>  %536 = fmul float %394, 2.000000e+01
>  %537 = fadd float %536, %535
>  %538 = fmul float %534, %537
>  %539 = call float @llvm.AMDGPU.clamp.(float %538, float 0.000000e+00, float 1.000000e+00)
>  %540 = fmul float %532, %539
>  %541 = fmul float %498, 0x3FF19999A0000000
>  %542 = fmul float %490, %411
>  %543 = fmul float %469, %63
>  %544 = fsub float -0.000000e+00, %543
>  %545 = fmul float %471, %65
>  %546 = fsub float %544, %545
>  %547 = fmul float %473, %67
>  %548 = fsub float %546, %547
>  %549 = fadd float %548, 1.000000e+00
>  %550 = fmul float %46, %63
>  %551 = fmul float %47, %65
>  %552 = fadd float %551, %550
>  %553 = fmul float %48, %67
>  %554 = fadd float %552, %553
>  %555 = fsub float 1.000000e+00, %554
>  %556 = call float @llvm.AMDGPU.clamp.(float %555, float 0.000000e+00, float 1.000000e+00)
>  %557 = fsub float %549, %556
>  %558 = call float @llvm.AMDGPU.clamp.(float %557, float 0.000000e+00, float 1.000000e+00)
>  %559 = fsub float 1.000000e+00, %558
>  %560 = fmul float %559, %559
>  %561 = fmul float %540, %560
>  %562 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %563 = fmul float %63, 0x4007700140000000
>  %564 = fadd float %563, %562
>  %565 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %566 = fmul float %65, 0x4007700140000000
>  %567 = fadd float %566, %565
>  %568 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %569 = fmul float %67, 0x4007700140000000
>  %570 = fadd float %569, %568
>  %571 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %572 = load <16 x i8>, <16 x i8> addrspace(2)* %571, align 16, !invariant.load !0
>  %573 = call float @llvm.SI.load.const(<16 x i8> %572, i32 64)
>  %574 = fmul float %573, %564
>  %575 = call float @llvm.SI.load.const(<16 x i8> %572, i32 68)
>  %576 = fmul float %575, %564
>  %577 = call float @llvm.SI.load.const(<16 x i8> %572, i32 72)
>  %578 = fmul float %577, %564
>  %579 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %580 = load <16 x i8>, <16 x i8> addrspace(2)* %579, align 16, !invariant.load !0
>  %581 = call float @llvm.SI.load.const(<16 x i8> %580, i32 80)
>  %582 = fmul float %581, %567
>  %583 = fadd float %582, %574
>  %584 = call float @llvm.SI.load.const(<16 x i8> %580, i32 84)
>  %585 = fmul float %584, %567
>  %586 = fadd float %585, %576
>  %587 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %588 = load <16 x i8>, <16 x i8> addrspace(2)* %587, align 16, !invariant.load !0
>  %589 = call float @llvm.SI.load.const(<16 x i8> %588, i32 88)
>  %590 = fmul float %589, %567
>  %591 = fadd float %590, %578
>  %592 = call float @llvm.SI.load.const(<16 x i8> %588, i32 96)
>  %593 = fmul float %592, %570
>  %594 = fadd float %593, %583
>  %595 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %596 = load <16 x i8>, <16 x i8> addrspace(2)* %595, align 16, !invariant.load !0
>  %597 = call float @llvm.SI.load.const(<16 x i8> %596, i32 100)
>  %598 = fmul float %597, %570
>  %599 = fadd float %598, %586
>  %600 = call float @llvm.SI.load.const(<16 x i8> %596, i32 104)
>  %601 = fmul float %600, %570
>  %602 = fadd float %601, %591
>  %603 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %604 = load <16 x i8>, <16 x i8> addrspace(2)* %603, align 16, !invariant.load !0
>  %605 = call float @llvm.SI.load.const(<16 x i8> %604, i32 112)
>  %606 = fadd float %594, %605
>  %607 = call float @llvm.SI.load.const(<16 x i8> %604, i32 116)
>  %608 = fadd float %599, %607
>  %609 = call float @llvm.SI.load.const(<16 x i8> %604, i32 120)
>  %610 = fadd float %602, %609
>  %611 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %612 = load <16 x i8>, <16 x i8> addrspace(2)* %611, align 16, !invariant.load !0
>  %613 = call float @llvm.SI.load.const(<16 x i8> %612, i32 16)
>  %614 = fsub float -0.000000e+00, %613
>  %615 = call float @llvm.SI.load.const(<16 x i8> %612, i32 20)
>  %616 = fsub float -0.000000e+00, %615
>  %617 = call float @llvm.SI.load.const(<16 x i8> %612, i32 24)
>  %618 = fsub float -0.000000e+00, %617
>  %619 = fmul float %455, %614
>  %620 = fmul float %457, %616
>  %621 = fadd float %620, %619
>  %622 = fmul float %459, %618
>  %623 = fadd float %621, %622
>  %624 = call float @llvm.AMDGPU.clamp.(float %623, float 0.000000e+00, float 1.000000e+00)
>  %625 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %626 = load <8 x i32>, <8 x i32> addrspace(2)* %625, align 32, !invariant.load !0
>  %627 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %628 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %627, i64 0, i64 3, !amdgpu.uniform !0
>  %629 = load <4 x i32>, <4 x i32> addrspace(2)* %628, align 16, !invariant.load !0
>  %630 = extractelement <8 x i32> %626, i32 7
>  %631 = extractelement <4 x i32> %629, i32 0
>  %632 = and i32 %631, %630
>  %633 = insertelement <4 x i32> %629, i32 %632, i32 0
>  %634 = bitcast float %610 to i32
>  %635 = bitcast float %606 to i32
>  %636 = bitcast float %608 to i32
>  %637 = insertelement <4 x i32> undef, i32 %634, i32 0
>  %638 = insertelement <4 x i32> %637, i32 %635, i32 1
>  %639 = insertelement <4 x i32> %638, i32 %636, i32 2
>  %640 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %639, <8 x i32> %626, <4 x i32> %633, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %641 = extractelement <4 x float> %640, i32 0
>  %642 = fmul float %518, %614
>  %643 = fmul float %520, %616
>  %644 = fadd float %643, %642
>  %645 = fmul float %522, %618
>  %646 = fadd float %644, %645
>  %647 = call float @llvm.AMDGPU.clamp.(float %646, float 0.000000e+00, float 1.000000e+00)
>  %648 = fsub float %541, %647
>  %649 = call float @llvm.AMDGPU.clamp.(float %648, float 0.000000e+00, float 1.000000e+00)
>  %650 = fmul float %641, %641
>  %651 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %652 = load <16 x i8>, <16 x i8> addrspace(2)* %651, align 16, !invariant.load !0
>  %653 = call float @llvm.SI.load.const(<16 x i8> %652, i32 48)
>  %654 = fmul float %653, %650
>  %655 = call float @llvm.SI.load.const(<16 x i8> %652, i32 52)
>  %656 = fmul float %655, %650
>  %657 = call float @llvm.SI.load.const(<16 x i8> %652, i32 56)
>  %658 = fmul float %657, %650
>  %659 = fmul float %649, %649
>  %660 = call float @llvm.AMDGPU.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = fmul float %654, %660
>  %662 = fmul float %656, %660
>  %663 = fmul float %658, %660
>  %664 = fmul float %661, %411
>  %665 = fmul float %662, %411
>  %666 = fmul float %663, %411
>  %667 = fmul float %624, %664
>  %668 = fmul float %624, %665
>  %669 = fmul float %624, %666
>  %670 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %671 = load <8 x i32>, <8 x i32> addrspace(2)* %670, align 32, !invariant.load !0
>  %672 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %673 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %672, i64 0, i64 7, !amdgpu.uniform !0
>  %674 = load <4 x i32>, <4 x i32> addrspace(2)* %673, align 16, !invariant.load !0
>  %675 = extractelement <8 x i32> %671, i32 7
>  %676 = extractelement <4 x i32> %674, i32 0
>  %677 = and i32 %676, %675
>  %678 = insertelement <4 x i32> %674, i32 %677, i32 0
>  %679 = call float @llvm.amdgcn.cubetc(float %455, float %457, float %459)
>  %680 = call float @llvm.amdgcn.cubesc(float %455, float %457, float %459)
>  %681 = call float @llvm.amdgcn.cubema(float %455, float %457, float %459)
>  %682 = call float @llvm.amdgcn.cubeid(float %455, float %457, float %459)
>  %683 = call float @llvm.fabs.f32(float %681)
>  %684 = fdiv float 1.000000e+00, %683, !fpmath !1
>  %685 = fmul float %679, %684
>  %686 = fadd float %685, 1.500000e+00
>  %687 = fmul float %680, %684
>  %688 = fadd float %687, 1.500000e+00
>  %689 = bitcast float %688 to i32
>  %690 = bitcast float %686 to i32
>  %691 = bitcast float %682 to i32
>  %692 = insertelement <4 x i32> undef, i32 %689, i32 0
>  %693 = insertelement <4 x i32> %692, i32 %690, i32 1
>  %694 = insertelement <4 x i32> %693, i32 %691, i32 2
>  %695 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %694, <8 x i32> %671, <4 x i32> %678, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %696 = extractelement <4 x float> %695, i32 0
>  %697 = extractelement <4 x float> %695, i32 1
>  %698 = extractelement <4 x float> %695, i32 2
>  %699 = extractelement <4 x float> %695, i32 3
>  %700 = fmul float %455, %46
>  %701 = fmul float %457, %47
>  %702 = fadd float %701, %700
>  %703 = fmul float %459, %48
>  %704 = fadd float %702, %703
>  %705 = fmul float %704, %455
>  %706 = fmul float %704, %457
>  %707 = fmul float %704, %459
>  %708 = fmul float %705, 2.000000e+00
>  %709 = fsub float %708, %46
>  %710 = fmul float %706, 2.000000e+00
>  %711 = fsub float %710, %47
>  %712 = fmul float %707, 2.000000e+00
>  %713 = fsub float %712, %48
>  %714 = fsub float 1.000000e+00, %394
>  %715 = fmul float %714, 6.000000e+00
>  %716 = fmul float %46, %455
>  %717 = fmul float %47, %457
>  %718 = fadd float %717, %716
>  %719 = fmul float %48, %459
>  %720 = fadd float %718, %719
>  %721 = call float @llvm.AMDGPU.clamp.(float %720, float 0.000000e+00, float 1.000000e+00)
>  %722 = fsub float 1.000000e+00, %721
>  %723 = call float @llvm.pow.f32(float %722, float 5.000000e+00)
>  %724 = call float @llvm.maxnum.f32(float %394, float %247)
>  %725 = call float @llvm.maxnum.f32(float %394, float %248)
>  %726 = call float @llvm.maxnum.f32(float %394, float %249)
>  %727 = fsub float %724, %247
>  %728 = fsub float %725, %248
>  %729 = fsub float %726, %249
>  %730 = fmul float %723, %727
>  %731 = fadd float %730, %247
>  %732 = fmul float %723, %728
>  %733 = fadd float %732, %248
>  %734 = fmul float %723, %729
>  %735 = fadd float %734, %249
>  %736 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %737 = load <8 x i32>, <8 x i32> addrspace(2)* %736, align 32, !invariant.load !0
>  %738 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %739 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %738, i64 0, i64 11, !amdgpu.uniform !0
>  %740 = load <4 x i32>, <4 x i32> addrspace(2)* %739, align 16, !invariant.load !0
>  %741 = extractelement <8 x i32> %737, i32 7
>  %742 = extractelement <4 x i32> %740, i32 0
>  %743 = and i32 %742, %741
>  %744 = insertelement <4 x i32> %740, i32 %743, i32 0
>  %745 = call float @llvm.amdgcn.cubetc(float %709, float %711, float %713)
>  %746 = call float @llvm.amdgcn.cubesc(float %709, float %711, float %713)
>  %747 = call float @llvm.amdgcn.cubema(float %709, float %711, float %713)
>  %748 = call float @llvm.amdgcn.cubeid(float %709, float %711, float %713)
>  %749 = call float @llvm.fabs.f32(float %747)
>  %750 = fdiv float 1.000000e+00, %749, !fpmath !1
>  %751 = fmul float %745, %750
>  %752 = fadd float %751, 1.500000e+00
>  %753 = fmul float %746, %750
>  %754 = fadd float %753, 1.500000e+00
>  %755 = bitcast float %754 to i32
>  %756 = bitcast float %752 to i32
>  %757 = bitcast float %748 to i32
>  %758 = bitcast float %715 to i32
>  %759 = insertelement <4 x i32> undef, i32 %755, i32 0
>  %760 = insertelement <4 x i32> %759, i32 %756, i32 1
>  %761 = insertelement <4 x i32> %760, i32 %757, i32 2
>  %762 = insertelement <4 x i32> %761, i32 %758, i32 3
>  %763 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %762, <8 x i32> %737, <4 x i32> %744, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %764 = extractelement <4 x float> %763, i32 0
>  %765 = extractelement <4 x float> %763, i32 1
>  %766 = extractelement <4 x float> %763, i32 2
>  %767 = fmul float %731, %764
>  %768 = fmul float %733, %765
>  %769 = fmul float %735, %766
>  %770 = fmul float %247, 0x3FD55553E0000000
>  %771 = fmul float %248, 0x3FD55553E0000000
>  %772 = fadd float %771, %770
>  %773 = fmul float %249, 0x3FD55553E0000000
>  %774 = fadd float %772, %773
>  %775 = fsub float 1.000000e+00, %774
>  %776 = call float @llvm.AMDGPU.clamp.(float %775, float 0.000000e+00, float 1.000000e+00)
>  %777 = fmul float %696, %699
>  %778 = fmul float %697, %699
>  %779 = fmul float %698, %699
>  %780 = fmul float %777, 4.000000e+00
>  %781 = fmul float %778, 4.000000e+00
>  %782 = fmul float %779, 4.000000e+00
>  %783 = fmul float %776, %780
>  %784 = fmul float %776, %781
>  %785 = fmul float %776, %782
>  %786 = fmul float %247, 0x3FD55553E0000000
>  %787 = fmul float %248, 0x3FD55553E0000000
>  %788 = fadd float %787, %786
>  %789 = fmul float %249, 0x3FD55553E0000000
>  %790 = fadd float %788, %789
>  %791 = fsub float 1.000000e+00, %790
>  %792 = call float @llvm.AMDGPU.clamp.(float %791, float 0.000000e+00, float 1.000000e+00)
>  %793 = fmul float %667, %792
>  %794 = fmul float %668, %792
>  %795 = fmul float %669, %792
>  %796 = fmul float %783, %542
>  %797 = fadd float %796, %793
>  %798 = fmul float %784, %542
>  %799 = fadd float %798, %794
>  %800 = fmul float %785, %542
>  %801 = fadd float %800, %795
>  %802 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %803 = load <16 x i8>, <16 x i8> addrspace(2)* %802, align 16
>  %804 = fmul float %247, 0x3FD55553E0000000
>  %805 = fmul float %248, 0x3FD55553E0000000
>  %806 = fadd float %805, %804
>  %807 = fmul float %249, 0x3FD55553E0000000
>  %808 = fadd float %806, %807
>  %809 = fsub float 1.000000e+00, %808
>  br label %loop217
>
>loop217:                                          ; preds = %endif221, %main_body
>  %810 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %811 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %812 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %813 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %814 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %.011 = phi float [ %801, %main_body ], [ %897, %endif221 ]
>  %.010 = phi float [ %799, %main_body ], [ %895, %endif221 ]
>  %.09 = phi float [ %797, %main_body ], [ %893, %endif221 ]
>  %815 = icmp sgt i32 %810, 2
>  br i1 %815, label %endloop287, label %endif221
>
>endif221:                                         ; preds = %loop217
>  %816 = shl i32 %811, 5
>  %817 = shl i32 %811, 5
>  %818 = add i32 %817, 176
>  %819 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %818)
>  %820 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %821 = fsub float %819, %820
>  %822 = shl i32 %811, 5
>  %823 = add i32 %822, 180
>  %824 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %823)
>  %825 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %826 = fsub float %824, %825
>  %827 = add i32 %816, 184
>  %828 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %827)
>  %829 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %830 = fsub float %828, %829
>  %831 = fmul float %821, %821
>  %832 = fmul float %826, %826
>  %833 = fadd float %832, %831
>  %834 = fmul float %830, %830
>  %835 = fadd float %833, %834
>  %836 = call float @llvm.sqrt.f32(float %835)
>  %837 = fdiv float 1.000000e+00, %836, !fpmath !1
>  %838 = fmul float %821, %837
>  %839 = fmul float %826, %837
>  %840 = fmul float %830, %837
>  %841 = fmul float %838, %455
>  %842 = fmul float %839, %457
>  %843 = fadd float %842, %841
>  %844 = fmul float %840, %459
>  %845 = fadd float %843, %844
>  %846 = call float @llvm.AMDGPU.clamp.(float %845, float 0.000000e+00, float 1.000000e+00)
>  %847 = fmul float %838, %518
>  %848 = fmul float %839, %520
>  %849 = fadd float %848, %847
>  %850 = fmul float %840, %522
>  %851 = fadd float %849, %850
>  %852 = call float @llvm.AMDGPU.clamp.(float %851, float 0.000000e+00, float 1.000000e+00)
>  %853 = fsub float %541, %852
>  %854 = call float @llvm.AMDGPU.clamp.(float %853, float 0.000000e+00, float 1.000000e+00)
>  %855 = fmul float %854, %854
>  %856 = shl i32 %812, 1
>  %857 = or i32 %856, 1
>  %858 = fmul float %835, %837
>  %859 = shl i32 %813, 5
>  %860 = add i32 %859, 188
>  %861 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %860)
>  %862 = fmul float %858, %861
>  %863 = call float @llvm.AMDGPU.clamp.(float %862, float 0.000000e+00, float 1.000000e+00)
>  %864 = fsub float 1.000000e+00, %863
>  %865 = shl i32 %857, 4
>  %866 = add i32 %865, 176
>  %867 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %866)
>  %868 = fmul float %867, %864
>  %869 = shl i32 %857, 4
>  %870 = add i32 %869, 180
>  %871 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %870)
>  %872 = fmul float %871, %864
>  %873 = shl i32 %857, 4
>  %874 = add i32 %873, 184
>  %875 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %874)
>  %876 = fmul float %875, %864
>  %877 = fmul float %855, %855
>  %878 = call float @llvm.AMDGPU.clamp.(float %877, float 0.000000e+00, float 1.000000e+00)
>  %879 = fsub float 1.000000e+00, %837
>  %880 = fmul float %878, %879
>  %881 = fadd float %837, %880
>  %882 = fmul float %868, %881
>  %883 = fmul float %872, %881
>  %884 = fmul float %876, %881
>  %885 = fmul float %882, %411
>  %886 = fmul float %883, %411
>  %887 = fmul float %884, %411
>  %888 = fmul float %846, %885
>  %889 = fmul float %846, %886
>  %890 = fmul float %846, %887
>  %891 = call float @llvm.AMDGPU.clamp.(float %809, float 0.000000e+00, float 1.000000e+00)
>  %892 = fmul float %888, %891
>  %893 = fadd float %892, %.09
>  %894 = fmul float %889, %891
>  %895 = fadd float %894, %.010
>  %896 = fmul float %890, %891
>  %897 = fadd float %896, %.011
>  %898 = add i32 %814, 1
>  br label %loop217
>
>endloop287:                                       ; preds = %loop217
>  %899 = fmul float %767, %561
>  %900 = fmul float %768, %561
>  %901 = fmul float %769, %561
>  %902 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %903 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %904 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 18, !amdgpu.uniform !0
>  %905 = load <8 x i32>, <8 x i32> addrspace(2)* %904, align 32, !invariant.load !0
>  %906 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %907 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %906, i64 0, i64 39, !amdgpu.uniform !0
>  %908 = load <4 x i32>, <4 x i32> addrspace(2)* %907, align 16, !invariant.load !0
>  %909 = extractelement <8 x i32> %905, i32 7
>  %910 = extractelement <4 x i32> %908, i32 0
>  %911 = and i32 %910, %909
>  %912 = insertelement <4 x i32> %908, i32 %911, i32 0
>  %913 = bitcast float %902 to i32
>  %914 = bitcast float %903 to i32
>  %915 = insertelement <2 x i32> undef, i32 %913, i32 0
>  %916 = insertelement <2 x i32> %915, i32 %914, i32 1
>  %917 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %916, <8 x i32> %905, <4 x i32> %912, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %918 = extractelement <4 x float> %917, i32 0
>  %919 = extractelement <4 x float> %917, i32 1
>  %920 = extractelement <4 x float> %917, i32 2
>  %921 = fmul float %918, 0x3FD3333340000000
>  %922 = fmul float %919, 0x3FE2E147A0000000
>  %923 = fadd float %922, %921
>  %924 = fmul float %920, 0x3FBC28F5C0000000
>  %925 = fadd float %923, %924
>  %926 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %927 = load <16 x i8>, <16 x i8> addrspace(2)* %926, align 16, !invariant.load !0
>  %928 = call float @llvm.SI.load.const(<16 x i8> %927, i32 592)
>  %929 = fmul float %925, %928
>  %930 = fmul float %918, %929
>  %931 = fmul float %919, %929
>  %932 = fmul float %920, %929
>  %933 = fmul float %930, 3.200000e+01
>  %934 = fmul float %931, 3.200000e+01
>  %935 = fmul float %932, 3.200000e+01
>  %936 = fmul float %.09, %349
>  %937 = fadd float %936, %899
>  %938 = fmul float %.010, %356
>  %939 = fadd float %938, %900
>  %940 = fmul float %.011, %363
>  %941 = fadd float %940, %901
>  %942 = fadd float %937, %933
>  %943 = fadd float %939, %934
>  %944 = fadd float %941, %935
>  %945 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %946 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %947 = load <16 x i8>, <16 x i8> addrspace(2)* %946, align 16, !invariant.load !0
>  %948 = call float @llvm.SI.load.const(<16 x i8> %947, i32 12)
>  %949 = fsub float %945, %948
>  %950 = call float @llvm.maxnum.f32(float %949, float 0.000000e+00)
>  %951 = call float @llvm.SI.load.const(<16 x i8> %947, i32 28)
>  %952 = call float @llvm.SI.load.const(<16 x i8> %947, i32 12)
>  %953 = fsub float %951, %952
>  %954 = fadd float %953, 0x3F50624DE0000000
>  %955 = fdiv float 1.000000e+00, %954, !fpmath !1
>  %956 = fmul float %950, %955
>  %957 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %958 = load <16 x i8>, <16 x i8> addrspace(2)* %957, align 16, !invariant.load !0
>  %959 = call float @llvm.SI.load.const(<16 x i8> %958, i32 28)
>  %960 = call float @llvm.floor.f32(float %959)
>  %961 = fsub float %959, %960
>  %962 = fmul float %961, 8.000000e+00
>  %963 = call float @llvm.pow.f32(float %956, float %962)
>  %964 = call float @llvm.AMDGPU.clamp.(float %963, float 0.000000e+00, float 1.000000e+00)
>  %965 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %966 = fmul float %965, %964
>  %967 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %968 = load <16 x i8>, <16 x i8> addrspace(2)* %967, align 16, !invariant.load !0
>  %969 = call float @llvm.SI.load.const(<16 x i8> %968, i32 32)
>  %970 = fsub float 1.000000e+00, %966
>  %971 = fmul float %942, %966
>  %972 = fmul float %969, %970
>  %973 = fadd float %971, %972
>  %974 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %975 = load <16 x i8>, <16 x i8> addrspace(2)* %974, align 16, !invariant.load !0
>  %976 = call float @llvm.SI.load.const(<16 x i8> %975, i32 36)
>  %977 = fsub float 1.000000e+00, %966
>  %978 = fmul float %943, %966
>  %979 = fmul float %976, %977
>  %980 = fadd float %978, %979
>  %981 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %982 = load <16 x i8>, <16 x i8> addrspace(2)* %981, align 16, !invariant.load !0
>  %983 = call float @llvm.SI.load.const(<16 x i8> %982, i32 40)
>  %984 = fsub float 1.000000e+00, %966
>  %985 = fmul float %944, %966
>  %986 = fmul float %983, %984
>  %987 = fadd float %985, %986
>  %988 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %989 = bitcast float %5 to i32
>  %990 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %989, 10
>  %991 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %990, float %973, 11
>  %992 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %991, float %980, 12
>  %993 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %992, float %987, 13
>  %994 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %993, float %988, 14
>  %995 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %994, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %995
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>	v_mov_b32_e32 v10, v4          ; 7E140304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                     ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                   ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                   ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                  ; C08A0B14
>	s_load_dwordx4 s[24:27], s[10:11], 0x18                  ; C08C0B18
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[21:24], v4, s[4:7], 0 idxen    ; E00C2000 80011504
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen  ; E00C2000 80030B05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen    ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	buffer_load_format_xyzw v[14:17], v9, s[20:23], 0 idxen  ; E00C2000 80050E09
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	buffer_load_format_xyzw v[16:19], v10, s[24:27], 0 idxen ; E00C2000 8006100A
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                       ; C0800300
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x10                     ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                     ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                     ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x380                    ; C20380FF 00000380
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v27, s4                                    ; 7E360204
>	v_mov_b32_e32 v26, s5                                    ; 7E340205
>	v_mov_b32_e32 v25, s6                                    ; 7E320206
>	s_cmp_eq_u32 s7, -1                                      ; BF06C107
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                     ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x20                     ; C2020120
>	s_buffer_load_dword s5, s[0:3], 0x21                     ; C2028121
>	s_buffer_load_dword s6, s[0:3], 0x22                     ; C2030122
>	s_buffer_load_dword s7, s[0:3], 0x23                     ; C2038123
>	s_buffer_load_dword s8, s[0:3], 0x24                     ; C2040124
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v0, s4                                     ; 7E000204
>	v_mov_b32_e32 v1, s5                                     ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x25                     ; C2020125
>	s_buffer_load_dword s5, s[0:3], 0x26                     ; C2028126
>	v_mov_b32_e32 v8, s6                                     ; 7E100206
>	v_sub_f32_e32 v28, s7, v27                               ; 08383607
>	v_mov_b32_e32 v7, s8                                     ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x27                     ; C2030127
>	s_buffer_load_dword s7, s[0:3], 0x28                     ; C2038128
>	s_buffer_load_dword s8, s[0:3], 0x29                     ; C2040129
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v9, s4                                     ; 7E120204
>	v_mov_b32_e32 v10, s5                                    ; 7E140205
>	s_buffer_load_dword s4, s[0:3], 0x2a                     ; C202012A
>	s_buffer_load_dword s5, s[0:3], 0x2b                     ; C202812B
>	v_sub_f32_e32 v29, s6, v26                               ; 083A3406
>	v_mov_b32_e32 v18, s7                                    ; 7E240207
>	v_mov_b32_e32 v19, s8                                    ; 7E260208
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v20, s4                                    ; 7E280204
>	v_sub_f32_e32 v30, s5, v25                               ; 083C3205
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                    ; C0820B10
>	s_movk_i32 s15, 0x8c                                     ; B00F008C
>	s_movk_i32 s14, 0x80                                     ; B00E0080
>	s_movk_i32 s12, 0x84                                     ; B00C0084
>	s_movk_i32 s13, 0x88                                     ; B00D0088
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[35:38], v8, s[4:7], 0 idxen    ; E00C2000 80012308
>	s_buffer_load_dword s4, s[0:3], 0x384                    ; C20200FF 00000384
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                      ; BF06C104
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v35                                ; 7E001123
>	v_mul_lo_i32 v20, v0, 48                                 ; D2D60014 00016100
>	v_add_i32_e32 v9, vcc, s15, v20                          ; 4A12280F
>	v_add_i32_e32 v0, vcc, s14, v20                          ; 4A00280E
>	v_add_i32_e32 v1, vcc, s12, v20                          ; 4A02280C
>	v_add_i32_e32 v8, vcc, s13, v20                          ; 4A10280D
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v0, v0, s[0:3], 0 offen                ; E0301000 80000000
>	buffer_load_dword v1, v1, s[0:3], 0 offen                ; E0301000 80000101
>	buffer_load_dword v8, v8, s[0:3], 0 offen                ; E0301000 80000808
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_subrev_f32_e32 v28, v27, v9                            ; 0A38131B
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                     ; BF850000
>	v_add_i32_e32 v9, vcc, 0x9c, v20                         ; 4A1228FF 0000009C
>	v_add_i32_e32 v29, vcc, 0xac, v20                        ; 4A3A28FF 000000AC
>	v_add_i32_e32 v10, vcc, 0x94, v20                        ; 4A1428FF 00000094
>	v_add_i32_e32 v18, vcc, 0x98, v20                        ; 4A2428FF 00000098
>	v_add_i32_e32 v7, vcc, 0x90, v20                         ; 4A0E28FF 00000090
>	v_add_i32_e32 v19, vcc, 0xa4, v20                        ; 4A2628FF 000000A4
>	buffer_load_dword v30, v9, s[0:3], 0 offen               ; E0301000 80001E09
>	buffer_load_dword v9, v10, s[0:3], 0 offen               ; E0301000 8000090A
>	buffer_load_dword v10, v18, s[0:3], 0 offen              ; E0301000 80000A12
>	v_add_i32_e32 v18, vcc, 0xa0, v20                        ; 4A2428FF 000000A0
>	v_add_i32_e32 v20, vcc, 0xa8, v20                        ; 4A2828FF 000000A8
>	buffer_load_dword v31, v29, s[0:3], 0 offen              ; E0301000 80001F1D
>	buffer_load_dword v7, v7, s[0:3], 0 offen                ; E0301000 80000707
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	s_waitcnt vmcnt(7)                                       ; BF8C0F77
>	v_subrev_f32_e32 v29, v26, v30                           ; 0A3A3D1A
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_subrev_f32_e32 v30, v25, v31                           ; 0A3C3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                     ; C0820B0C
>	s_movk_i32 s10, 0x90                                     ; B00A0090
>	s_movk_i32 s9, 0x94                                      ; B0090094
>	s_movk_i32 s8, 0x98                                      ; B0080098
>	s_movk_i32 s11, 0x9c                                     ; B00B009C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[31:34], v7, s[4:7], 0 idxen    ; E00C2000 80011F07
>	v_cvt_i32_f32_e32 v7, v36                                ; 7E0E1124
>	s_movk_i32 s4, 0xac                                      ; B00400AC
>	v_add_i32_e32 v9, vcc, s10, v20                          ; 4A12280A
>	v_add_i32_e32 v10, vcc, s9, v20                          ; 4A142809
>	v_add_i32_e32 v18, vcc, s8, v20                          ; 4A242808
>	v_add_i32_e32 v19, vcc, s4, v20                          ; 4A262804
>	v_mul_lo_i32 v35, v7, 48                                 ; D2D60023 00016107
>	v_add_i32_e32 v7, vcc, s11, v20                          ; 4A0E280B
>	s_movk_i32 s6, 0xa4                                      ; B00600A4
>	s_movk_i32 s7, 0xa0                                      ; B00700A0
>	s_movk_i32 s5, 0xa8                                      ; B00500A8
>	v_add_i32_e32 v30, vcc, s6, v20                          ; 4A3C2806
>	buffer_load_dword v29, v7, s[0:3], 0 offen               ; E0301000 80001D07
>	v_add_i32_e32 v7, vcc, s7, v20                           ; 4A0E2807
>	v_add_i32_e32 v20, vcc, s5, v20                          ; 4A282805
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v10, v10, s[0:3], 0 offen              ; E0301000 80000A0A
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	buffer_load_dword v36, v7, s[0:3], 0 offen               ; E0301000 80002407
>	buffer_load_dword v30, v30, s[0:3], 0 offen              ; E0301000 80001E1E
>	s_waitcnt vmcnt(8)                                       ; BF8C0F78
>	v_mul_f32_e32 v0, v31, v0                                ; 1000011F
>	v_mul_f32_e32 v1, v31, v1                                ; 1002031F
>	v_mul_f32_e32 v8, v31, v8                                ; 1010111F
>	v_mul_f32_e32 v28, v31, v28                              ; 1038391F
>	s_waitcnt vmcnt(6)                                       ; BF8C0F76
>	v_subrev_f32_e32 v39, v25, v19                           ; 0A4E2719
>	s_waitcnt vmcnt(5)                                       ; BF8C0F75
>	v_mul_f32_e32 v7, v31, v9                                ; 100E131F
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_mul_f32_e32 v9, v31, v10                               ; 1012151F
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_mul_f32_e32 v10, v31, v18                              ; 1014251F
>	v_subrev_f32_e32 v18, v26, v29                           ; 0A243B1A
>	v_mul_f32_e32 v29, v31, v18                              ; 103A251F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mul_f32_e32 v19, v31, v30                              ; 10263D1F
>	v_mul_f32_e32 v18, v31, v36                              ; 1024491F
>	v_mul_f32_e32 v20, v31, v20                              ; 1028291F
>	v_mul_f32_e32 v30, v31, v39                              ; 103C4F1F
>	v_add_i32_e32 v31, vcc, s15, v35                         ; 4A3E460F
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v27, v31                           ; 0A3E3F1B
>	v_mac_f32_e32 v28, v32, v31                              ; 3E383F20
>	v_add_i32_e32 v31, vcc, s11, v35                         ; 4A3E460B
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v26, v31                           ; 0A3E3F1A
>	v_mac_f32_e32 v29, v32, v31                              ; 3E3A3F20
>	v_add_i32_e32 v31, vcc, s14, v35                         ; 4A3E460E
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v32, v31                               ; 3E003F20
>	v_add_i32_e32 v31, vcc, s12, v35                         ; 4A3E460C
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_buffer_load_dword s12, s[0:3], 0x388                   ; C20600FF 00000388
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                      ; BF06800C
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v32, v31                               ; 3E023F20
>	v_add_i32_e32 v31, vcc, s13, v35                         ; 4A3E460D
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v31                               ; 3E103F20
>	v_add_i32_e32 v31, vcc, s10, v35                         ; 4A3E460A
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v31                               ; 3E0E3F20
>	v_add_i32_e32 v31, vcc, s9, v35                          ; 4A3E4609
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v31                               ; 3E123F20
>	v_add_i32_e32 v31, vcc, s8, v35                          ; 4A3E4608
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v32, v31                              ; 3E143F20
>	v_add_i32_e32 v31, vcc, s7, v35                          ; 4A3E4607
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v32, v31                              ; 3E243F20
>	v_add_i32_e32 v31, vcc, s6, v35                          ; 4A3E4606
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v32, v31                              ; 3E263F20
>	v_add_i32_e32 v31, vcc, s5, v35                          ; 4A3E4605
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v32, v31                              ; 3E283F20
>	v_add_i32_e32 v31, vcc, s4, v35                          ; 4A3E4604
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	v_mac_f32_e32 v30, v32, v31                              ; 3E3C3F20
>	s_cbranch_scc1 BB0_6                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v37                               ; 7E3E1125
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0x80, v31                        ; 4A403EFF 00000080
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v33, v32                               ; 3E004121
>	v_add_i32_e32 v32, vcc, 0x8c, v31                        ; 4A403EFF 0000008C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v33, v32                              ; 3E384121
>	v_add_i32_e32 v32, vcc, s11, v31                         ; 4A403E0B
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v33, v32                              ; 3E3A4121
>	v_add_i32_e32 v32, vcc, 0x84, v31                        ; 4A403EFF 00000084
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v33, v32                               ; 3E024121
>	v_add_i32_e32 v32, vcc, 0x88, v31                        ; 4A403EFF 00000088
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v33, v32                               ; 3E104121
>	v_add_i32_e32 v32, vcc, s10, v31                         ; 4A403E0A
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v33, v32                               ; 3E0E4121
>	v_add_i32_e32 v32, vcc, s9, v31                          ; 4A403E09
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v33, v32                               ; 3E124121
>	v_add_i32_e32 v32, vcc, s8, v31                          ; 4A403E08
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v33, v32                              ; 3E144121
>	v_add_i32_e32 v32, vcc, s7, v31                          ; 4A403E07
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v33, v32                              ; 3E244121
>	v_add_i32_e32 v32, vcc, s6, v31                          ; 4A403E06
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v33, v32                              ; 3E264121
>	v_add_i32_e32 v32, vcc, s5, v31                          ; 4A403E05
>	v_add_i32_e32 v31, vcc, s4, v31                          ; 4A3E3E04
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v33, v32                              ; 3E284121
>	v_mac_f32_e32 v30, v33, v31                              ; 3E3C3F21
>	s_buffer_load_dword s4, s[0:3], 0x38c                    ; C20200FF 0000038C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                       ; BF068004
>	s_cbranch_scc1 BB0_8                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v38                               ; 7E3E1126
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0x80, v31                        ; 4A403EFF 00000080
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v34, v32                               ; 3E004122
>	v_add_i32_e32 v32, vcc, 0x8c, v31                        ; 4A403EFF 0000008C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v34, v32                              ; 3E384122
>	v_add_i32_e32 v32, vcc, 0x9c, v31                        ; 4A403EFF 0000009C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v34, v32                              ; 3E3A4122
>	v_add_i32_e32 v32, vcc, 0x84, v31                        ; 4A403EFF 00000084
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v34, v32                               ; 3E024122
>	v_add_i32_e32 v32, vcc, 0x88, v31                        ; 4A403EFF 00000088
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v34, v32                               ; 3E104122
>	v_add_i32_e32 v32, vcc, 0x90, v31                        ; 4A403EFF 00000090
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v34, v32                               ; 3E0E4122
>	v_add_i32_e32 v32, vcc, 0x94, v31                        ; 4A403EFF 00000094
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v34, v32                               ; 3E124122
>	v_add_i32_e32 v32, vcc, 0x98, v31                        ; 4A403EFF 00000098
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v34, v32                              ; 3E144122
>	v_add_i32_e32 v32, vcc, 0xa0, v31                        ; 4A403EFF 000000A0
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v34, v32                              ; 3E244122
>	v_add_i32_e32 v32, vcc, 0xa4, v31                        ; 4A403EFF 000000A4
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v34, v32                              ; 3E264122
>	v_add_i32_e32 v32, vcc, 0xa8, v31                        ; 4A403EFF 000000A8
>	v_add_i32_e32 v31, vcc, 0xac, v31                        ; 4A3E3EFF 000000AC
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v34, v32                              ; 3E284122
>	v_mac_f32_e32 v30, v34, v31                              ; 3E3C3F22
>	v_mul_f32_e32 v31, v1, v22                               ; 103E2D01
>	v_mac_f32_e32 v31, v0, v21                               ; 3E3E2B00
>	v_mac_f32_e32 v31, v8, v23                               ; 3E3E2F08
>	v_mac_f32_e32 v31, v28, v24                              ; 3E3E311C
>	v_mul_f32_e32 v28, v9, v22                               ; 10382D09
>	v_mac_f32_e32 v28, v7, v21                               ; 3E382B07
>	v_mac_f32_e32 v28, v10, v23                              ; 3E382F0A
>	s_buffer_load_dword s4, s[0:3], 0x3                      ; C2020103
>	v_mac_f32_e32 v28, v29, v24                              ; 3E38311D
>	v_mul_f32_e32 v29, v19, v22                              ; 103A2D13
>	v_mul_f32_e32 v22, 0, v22                                ; 102C2C80
>	v_mac_f32_e32 v29, v18, v21                              ; 3E3A2B12
>	v_mac_f32_e32 v22, 0, v21                                ; 3E2C2A80
>	v_mac_f32_e32 v29, v20, v23                              ; 3E3A2F14
>	v_mac_f32_e32 v22, 0, v23                                ; 3E2C2E80
>	v_add_f32_e32 v21, v24, v22                              ; 062A2D18
>	v_mac_f32_e32 v29, v30, v24                              ; 3E3A311E
>	v_add_f32_e32 v22, v27, v31                              ; 062C3F1B
>	s_buffer_load_dword s6, s[0:3], 0x7                      ; C2030107
>	v_add_f32_e32 v24, v25, v29                              ; 06303B19
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v25, s4, v22                               ; 10322C04
>	s_buffer_load_dword s4, s[0:3], 0xb                      ; C202010B
>	v_add_f32_e32 v23, v26, v28                              ; 062E391A
>	v_mac_f32_e32 v25, s6, v23                               ; 3E322E06
>	s_buffer_load_dword s16, s[0:3], 0x2                     ; C2080102
>	s_buffer_load_dword s18, s[0:3], 0x6                     ; C2090106
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v25, s4, v24                               ; 3E323004
>	s_buffer_load_dword s4, s[0:3], 0xf                      ; C202010F
>	s_buffer_load_dword s19, s[0:3], 0xa                     ; C209810A
>	s_buffer_load_dword s10, s[0:3], 0xe                     ; C205010E
>	s_buffer_load_dword s12, s[0:3], 0x18                    ; C2060118
>	v_add_f32_e32 v11, v11, v11                              ; 0616170B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v25, s4, v21                               ; 3E322A04
>	s_buffer_load_dword s4, s[0:3], 0x1f                     ; C202011F
>	v_add_f32_e32 v3, v3, v3                                 ; 06060703
>	s_buffer_load_dword s13, s[0:3], 0x19                    ; C2068119
>	v_mad_f32 v12, 2.0, v12, -1.0                            ; D282000C 03CE18F4
>	v_mad_f32 v4, 2.0, v4, -1.0                              ; D2820004 03CE08F4
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v26, s4, v25                               ; 10343204
>	exp 15, 32, 0, 0, 0, v22, v23, v24, v26                  ; F800020F 1A181716
>	exp 15, 33, 0, 0, 0, v14, v15, v16, v17                  ; F800021F 11100F0E
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>	v_mad_f32 v14, v11, v0, -v0                              ; D282000E 8402010B
>	v_mad_f32 v0, v3, v0, -v0                                ; D2820000 84020103
>	v_mad_f32 v15, v11, v7, -v7                              ; D282000F 841E0F0B
>	v_mac_f32_e32 v14, v1, v12                               ; 3E1C1901
>	v_mac_f32_e32 v0, v1, v4                                 ; 3E000901
>	v_mad_f32 v1, v3, v7, -v7                                ; D2820001 841E0F03
>	v_mul_f32_e32 v7, s16, v22                               ; 100E2C10
>	v_mac_f32_e32 v7, s18, v23                               ; 3E0E2E12
>	v_mac_f32_e32 v7, s19, v24                               ; 3E0E3013
>	v_mad_f32 v13, 2.0, v13, -1.0                            ; D282000D 03CE1AF4
>	v_mad_f32 v5, 2.0, v5, -1.0                              ; D2820005 03CE0AF4
>	v_mac_f32_e32 v14, v8, v13                               ; 3E1C1B08
>	v_mac_f32_e32 v0, v8, v5                                 ; 3E000B08
>	v_mac_f32_e32 v7, s10, v21                               ; 3E0E2A0A
>	v_mov_b32_e32 v8, s12                                    ; 7E10020C
>	v_mac_f32_e32 v8, s13, v7                                ; 3E100E0D
>	v_add_f32_e64 v8, v8, 0 clamp                            ; D2060808 00010108
>	s_buffer_load_dword s14, s[0:3], 0x1a                    ; C207011A
>	v_log_f32_e32 v8, v8                                     ; 7E104F08
>	s_buffer_load_dword s5, s[0:3], 0x4                      ; C2028104
>	s_buffer_load_dword s7, s[0:3], 0x8                      ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                      ; C2040109
>	s_buffer_load_dword s6, s[0:3], 0xc                      ; C203010C
>	s_buffer_load_dword s9, s[0:3], 0xd                      ; C204810D
>	s_buffer_load_dword s11, s[0:3], 0x15                    ; C2058115
>	s_buffer_load_dword s4, s[0:3], 0x0                      ; C2020100
>	s_buffer_load_dword s15, s[0:3], 0x1                     ; C2078101
>	s_buffer_load_dword s17, s[0:3], 0x5                     ; C2088105
>	s_buffer_load_dword s0, s[0:3], 0x1b                     ; C200011B
>	v_mac_f32_e32 v15, v9, v12                               ; 3E1E1909
>	v_mac_f32_e32 v1, v9, v4                                 ; 3E020909
>	v_mad_f32 v11, v11, v18, -v18                            ; D282000B 844A250B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_legacy_f32_e32 v8, s14, v8                         ; 0E10100E
>	v_mac_f32_e32 v11, v19, v12                              ; 3E161913
>	v_mad_f32 v3, v3, v18, -v18                              ; D2820003 844A2503
>	v_mac_f32_e32 v15, v10, v13                              ; 3E1E1B0A
>	v_mac_f32_e32 v1, v10, v5                                ; 3E020B0A
>	v_exp_f32_e32 v8, v8                                     ; 7E104B08
>	v_sub_f32_e64 v10, 1.0, s0                               ; D208000A 000000F2
>	v_mac_f32_e32 v3, v19, v4                                ; 3E060913
>	v_mac_f32_e32 v10, s0, v8                                ; 3E141000
>	v_mac_f32_e32 v11, v20, v13                              ; 3E161B14
>	v_mac_f32_e32 v3, v20, v5                                ; 3E060B14
>	v_mov_b32_e32 v9, 0x3dcccccd                             ; 7E1202FF 3DCCCCCD
>	v_mul_f32_e32 v8, v1, v11                                ; 10101701
>	v_mul_f32_e32 v10, v10, v10                              ; 1014150A
>	v_mul_f32_e32 v4, s4, v22                                ; 10082C04
>	v_mul_f32_e32 v5, s15, v22                               ; 100A2C0F
>	v_mul_f32_e32 v12, v3, v14                               ; 10181D03
>	v_mul_f32_e32 v13, v0, v15                               ; 101A1F00
>	v_add_f32_e32 v6, v6, v6                                 ; 060C0D06
>	v_mad_f32 v8, v15, v3, -v8                               ; D2820008 8422070F
>	v_mul_f32_e32 v9, s11, v9                                ; 1012120B
>	exp 15, 34, 0, 0, 0, v10, v0, v0, v0                     ; F800022F 0000000A
>	v_mac_f32_e32 v4, s5, v23                                ; 3E082E05
>	v_mac_f32_e32 v5, s17, v23                               ; 3E0A2E11
>	v_mad_f32 v12, v11, v0, -v12                             ; D282000C 8432010B
>	v_mad_f32 v13, v14, v1, -v13                             ; D282000D 8436030E
>	v_mad_f32 v8, v6, v8, -v8                                ; D2820008 84221106
>	exp 15, 35, 0, 0, 0, v14, v15, v11, v9                   ; F800023F 090B0F0E
>	v_mac_f32_e32 v4, s7, v24                                ; 3E083007
>	v_mac_f32_e32 v5, s8, v24                                ; 3E0A3008
>	v_mad_f32 v12, v6, v12, -v12                             ; D282000C 84321906
>	v_mad_f32 v6, v6, v13, -v13                              ; D2820006 84361B06
>	exp 15, 36, 0, 0, 0, v0, v1, v3, v8                      ; F800024F 08030100
>	v_mac_f32_e32 v4, s6, v21                                ; 3E082A06
>	v_mac_f32_e32 v5, s9, v21                                ; 3E0A2A09
>	exp 15, 37, 0, 0, 0, v12, v6, v0, v0                     ; F800025F 0000060C
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v25                     ; F80008CF 19070504
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2244 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v26, v4, 3, 4, [m0]                             ; C8681304
>	v_interp_p2_f32 v26, [v26], v5, 3, 4, [m0]                      ; C8691305
>	v_interp_p1_f32 v27, v4, 0, 5, [m0]                             ; C86C1404
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v27, [v27], v5, 0, 5, [m0]                      ; C86D1405
>	v_interp_p1_f32 v28, v4, 1, 5, [m0]                             ; C8701504
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v28, [v28], v5, 1, 5, [m0]                      ; C8711505
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v29, s12, v1                                      ; 083A020C
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_interp_p1_f32 v12, v4, 0, 3, [m0]                             ; C8300C04
>	v_sub_f32_e32 v30, s13, v0                                      ; 083C000D
>	v_mul_f32_e32 v7, v29, v29                                      ; 100E3B1D
>	s_load_dwordx8 s[44:51], s[4:5], 0x30                           ; C0D60530
>	s_load_dwordx4 s[52:55], s[4:5], 0x3c                           ; C09A053C
>	v_interp_p2_f32 v12, [v12], v5, 0, 3, [m0]                      ; C8310C05
>	v_interp_p1_f32 v21, v4, 1, 3, [m0]                             ; C8540D04
>	v_sub_f32_e32 v31, s14, v2                                      ; 083E040E
>	v_mac_f32_e32 v7, v30, v30                                      ; 3E0E3D1E
>	v_mac_f32_e32 v7, v31, v31                                      ; 3E0E3F1F
>	v_interp_p2_f32 v21, [v21], v5, 1, 3, [m0]                      ; C8550D05
>	v_interp_p1_f32 v22, v4, 2, 3, [m0]                             ; C8580E04
>	v_rsq_f32_e32 v32, v7                                           ; 7E405D07
>	v_interp_p2_f32 v22, [v22], v5, 2, 3, [m0]                      ; C8590E05
>	v_interp_p1_f32 v7, v6, 0, 1, [m0]                              ; C81C0406
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]                        ; C81D0403
>	v_interp_p1_f32 v8, v6, 1, 1, [m0]                              ; C8200506
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]                        ; C8210503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[17:20], v[7:8], s[44:51], s[52:55] dmask:0xf     ; F0800F00 01AB1107
>	s_load_dwordx8 s[44:51], s[4:5], 0x80                           ; C0D60580
>	s_load_dwordx4 s[52:55], s[4:5], 0x8c                           ; C09A058C
>	s_buffer_load_dword s65, s[0:3], 0x67                           ; C2208167
>	s_buffer_load_dword s64, s[0:3], 0x66                           ; C2200166
>	s_buffer_load_dword s66, s[0:3], 0x6a                           ; C221016A
>	v_mul_f32_e32 v23, v12, v12                                     ; 102E190C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[14:16], v[7:8], s[44:51], s[52:55] dmask:0x7     ; F0800700 01AB0E07
>	s_buffer_load_dword s44, s[0:3], 0x64                           ; C2160164
>	s_buffer_load_dword s50, s[0:3], 0x70                           ; C2190170
>	s_buffer_load_dword s51, s[0:3], 0x73                           ; C2198173
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v38, s65, v14                                     ; 104C1C41
>	s_buffer_load_dword s45, s[0:3], 0x65                           ; C2168165
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v35, s44, v14                                     ; 10461C2C
>	v_mac_f32_e32 v35, s50, v15                                     ; 3E461E32
>	v_mac_f32_e32 v38, s51, v15                                     ; 3E4C1E33
>	s_buffer_load_dword s51, s[0:3], 0x7f                           ; C219817F
>	s_buffer_load_dword s44, s[0:3], 0x71                           ; C2160171
>	s_buffer_load_dword s50, s[0:3], 0x72                           ; C2190172
>	v_mul_f32_e32 v36, s45, v14                                     ; 10481C2D
>	v_mul_f32_e32 v37, s64, v14                                     ; 104A1C40
>	s_buffer_load_dword s48, s[0:3], 0x6e                           ; C218016E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v36, s44, v15                                     ; 3E481E2C
>	v_mac_f32_e32 v37, s50, v15                                     ; 3E4A1E32
>	s_buffer_load_dword s44, s[0:3], 0x7c                           ; C216017C
>	s_buffer_load_dword s45, s[0:3], 0x7d                           ; C216817D
>	s_buffer_load_dword s50, s[0:3], 0x7e                           ; C219017E
>	v_mac_f32_e32 v38, s51, v16                                     ; 3E4C2033
>	s_buffer_load_dword s51, s[0:3], 0x7a                           ; C219817A
>	s_buffer_load_dword s49, s[0:3], 0x6f                           ; C218816F
>	s_buffer_load_dword s55, s[0:3], 0x69                           ; C21B8169
>	v_mul_f32_e32 v41, s48, v14                                     ; 10521C30
>	s_buffer_load_dword s46, s[0:3], 0x6c                           ; C217016C
>	s_buffer_load_dword s47, s[0:3], 0x6d                           ; C217816D
>	s_buffer_load_dword s53, s[0:3], 0x75                           ; C21A8175
>	s_buffer_load_dword s65, s[0:3], 0x7b                           ; C220817B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v35, s44, v16                                     ; 3E46202C
>	v_mac_f32_e32 v36, s45, v16                                     ; 3E48202D
>	v_mac_f32_e32 v37, s50, v16                                     ; 3E4A2032
>	v_mac_f32_e32 v41, s51, v15                                     ; 3E521E33
>	s_buffer_load_dword s50, s[0:3], 0x76                           ; C2190176
>	s_buffer_load_dword s44, s[0:3], 0x78                           ; C2160178
>	s_buffer_load_dword s45, s[0:3], 0x79                           ; C2168179
>	s_buffer_load_dword s48, s[0:3], 0x81                           ; C2180181
>	s_buffer_load_dword s51, s[0:3], 0x87                           ; C2198187
>	v_mul_f32_e32 v42, s49, v14                                     ; 10541C31
>	s_buffer_load_dword s49, s[0:3], 0x82                           ; C2188182
>	v_mac_f32_e32 v23, v21, v21                                     ; 3E2E2B15
>	v_mac_f32_e32 v23, v22, v22                                     ; 3E2E2D16
>	v_mul_f32_e32 v44, s55, v14                                     ; 10581C37
>	s_buffer_load_dword s54, s[0:3], 0x68                           ; C21B0168
>	v_rsq_f32_e32 v23, v23                                          ; 7E2E5D17
>	v_mul_f32_e32 v39, s46, v14                                     ; 104E1C2E
>	v_mul_f32_e32 v40, s47, v14                                     ; 10501C2F
>	v_mac_f32_e32 v42, s65, v15                                     ; 3E541E41
>	v_mul_f32_e32 v45, s66, v14                                     ; 105A1C42
>	v_mac_f32_e32 v44, s53, v15                                     ; 3E581E35
>	s_buffer_load_dword s52, s[0:3], 0x74                           ; C21A0174
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v45, s50, v15                                     ; 3E5A1E32
>	v_mac_f32_e32 v39, s44, v15                                     ; 3E4E1E2C
>	v_mac_f32_e32 v40, s45, v15                                     ; 3E501E2D
>	s_buffer_load_dword s44, s[0:3], 0x84                           ; C2160184
>	s_buffer_load_dword s45, s[0:3], 0x85                           ; C2168185
>	s_buffer_load_dword s46, s[0:3], 0x86                           ; C2170186
>	v_mac_f32_e32 v42, s51, v16                                     ; 3E542033
>	v_mac_f32_e32 v44, s48, v16                                     ; 3E582030
>	s_buffer_load_dword s64, s[0:3], 0x80                           ; C2200180
>	s_buffer_load_dword s48, s[0:3], 0x60                           ; C2180160
>	s_buffer_load_dword s51, s[0:3], 0x90                           ; C2198190
>	v_mac_f32_e32 v45, s49, v16                                     ; 3E5A2031
>	s_buffer_load_dword s49, s[0:3], 0x61                           ; C2188161
>	v_mul_f32_e32 v43, s54, v14                                     ; 10561C36
>	v_mul_f32_e32 v34, v23, v21                                     ; 10442B17
>	v_interp_p1_f32 v21, v4, 3, 3, [m0]                             ; C8540F04
>	v_mac_f32_e32 v43, s52, v15                                     ; 3E561E34
>	v_mul_f32_e32 v33, v23, v12                                     ; 10421917
>	v_add_f32_e32 v12, v14, v15                                     ; 06181F0E
>	v_interp_p2_f32 v21, [v21], v5, 3, 3, [m0]                      ; C8550F05
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v39, s44, v16                                     ; 3E4E202C
>	v_mac_f32_e32 v40, s45, v16                                     ; 3E50202D
>	v_mac_f32_e32 v41, s46, v16                                     ; 3E52202E
>	v_add_f32_e32 v12, v16, v12                                     ; 06181910
>	v_mac_f32_e32 v43, s64, v16                                     ; 3E562040
>	v_mul_f32_e32 v16, s48, v7                                      ; 10200E30
>	s_buffer_load_dword s48, s[0:3], 0x8c                           ; C218018C
>	s_buffer_load_dword s50, s[0:3], 0x8d                           ; C219018D
>	v_mul_f32_e32 v15, s51, v21                                     ; 101E2A33
>	s_buffer_load_dword s51, s[0:3], 0x92                           ; C2198192
>	v_mul_f32_e32 v46, v23, v22                                     ; 105C2D17
>	v_mul_f32_e32 v22, s49, v8                                      ; 102C1031
>	s_buffer_load_dword s49, s[0:3], 0x91                           ; C2188191
>	s_buffer_load_dword s52, s[0:3], 0x93                           ; C21A0193
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s48, v16                                     ; 101C2030
>	v_mul_f32_e32 v24, s50, v16                                     ; 10302032
>	v_mul_f32_e32 v16, s51, v21                                     ; 10202A33
>	v_mac_f32_e32 v14, s48, v15                                     ; 3E1C1E30
>	v_mac_f32_e32 v24, s50, v16                                     ; 3E302032
>	v_mul_f32_e32 v15, s48, v22                                     ; 101E2C30
>	v_mul_f32_e32 v23, s49, v21                                     ; 102E2A31
>	v_mul_f32_e32 v25, s50, v22                                     ; 10322C32
>	v_mul_f32_e32 v16, s52, v21                                     ; 10202A34
>	v_mac_f32_e32 v15, s48, v23                                     ; 3E1E2E30
>	v_mac_f32_e32 v25, s50, v16                                     ; 3E322032
>	s_load_dwordx8 s[48:55], s[4:5], 0x50                           ; C0D80550
>	s_load_dwordx4 s[72:75], s[4:5], 0x5c                           ; C0A4055C
>	s_buffer_load_dword s77, s[0:3], 0x8f                           ; C226818F
>	s_buffer_load_dword s76, s[0:3], 0x8e                           ; C226018E
>	v_add_f32_e64 v47, v12, 0 clamp                                 ; D206082F 0001010C
>	s_load_dwordx8 s[56:63], s[4:5], 0x40                           ; C0DC0540
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s72, s72, s55                                         ; 87483748
>	image_sample v[21:23], v[14:15], s[48:55], s[72:75] dmask:0xb   ; F0800B00 024C150E
>	image_sample v14, v[24:25], s[48:55], s[72:75] dmask:0x4        ; F0800400 024C0E18
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v12, s77, v14                                     ; 10181C4D
>	v_mad_f32 v12, v22, s76, -v12                                   ; D282000C 84309916
>	s_load_dwordx4 s[72:75], s[4:5], 0x4c                           ; C0A4054C
>	s_load_dwordx8 s[64:71], s[4:5], 0x60                           ; C0E00560
>	s_load_dwordx4 s[76:79], s[4:5], 0x6c                           ; C0A6056C
>	v_mad_f32 v48, -v47, v17, v17                                   ; D2820030 2446232F
>	v_mad_f32 v49, -v47, v18, v18                                   ; D2820031 244A252F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s72, s72, s63                                         ; 87483F48
>	v_mad_f32 v50, -v47, v19, v19                                   ; D2820032 244E272F
>	s_and_b32 s76, s76, s71                                         ; 874C474C
>	image_sample v17, v[7:8], s[64:71], s[76:79] dmask:0x8          ; F0800800 02701107
>	image_sample v[14:16], v[7:8], s[56:63], s[72:75] dmask:0xb     ; F0800B00 024E0E07
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v18, v15, v15                                     ; 06241F0F
>	v_mad_f32 v15, 2.0, v15, -1.0                                   ; D282000F 03CE1EF4
>	v_mad_f32 v16, 2.0, v16, -1.0                                   ; D2820010 03CE20F4
>	v_mad_f32 v18, v18, v15, -v15                                   ; D2820012 843E1F12
>	v_mac_f32_e32 v18, v16, v16                                     ; 3E242110
>	v_mad_f32 v19, 2.0, v21, -1.0                                   ; D2820013 03CE2AF4
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mad_f32 v21, 2.0, v23, -1.0                                   ; D2820015 03CE2EF4
>	v_mac_f32_e32 v16, v20, v19                                     ; 3E202714
>	v_sub_f32_e32 v18, 0x3f8020c5, v18                              ; 082424FF 3F8020C5
>	v_mac_f32_e32 v15, v20, v21                                     ; 3E1E2B14
>	v_mul_f32_e32 v19, v16, v16                                     ; 10262110
>	v_sqrt_f32_e32 v18, v18                                         ; 7E246712
>	v_mac_f32_e32 v19, v15, v15                                     ; 3E261F0F
>	v_mac_f32_e32 v19, v18, v18                                     ; 3E262512
>	v_rsq_f32_e32 v19, v19                                          ; 7E265D13
>	v_interp_p1_f32 v23, v4, 0, 4, [m0]                             ; C85C1004
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	v_interp_p2_f32 v23, [v23], v5, 0, 4, [m0]                      ; C85D1005
>	v_interp_p1_f32 v24, v4, 1, 4, [m0]                             ; C8601104
>	v_mul_f32_e32 v16, v19, v16                                     ; 10202113
>	v_interp_p2_f32 v24, [v24], v5, 1, 4, [m0]                      ; C8611105
>	v_interp_p1_f32 v25, v4, 2, 4, [m0]                             ; C8641204
>	v_mul_f32_e32 v51, v12, v20                                     ; 1066290C
>	v_mad_f32 v52, -v20, v12, 1.0                                   ; D2820034 23CA1914
>	v_mul_f32_e32 v20, v19, v15                                     ; 10281F13
>	v_mul_f32_e32 v12, v16, v23                                     ; 10182F10
>	v_mul_f32_e32 v15, v16, v24                                     ; 101E3110
>	v_interp_p2_f32 v25, [v25], v5, 2, 4, [m0]                      ; C8651205
>	v_mul_f32_e32 v18, v19, v18                                     ; 10242513
>	v_mac_f32_e32 v12, v20, v26                                     ; 3E183514
>	v_mul_f32_e32 v4, v16, v25                                      ; 10083310
>	v_mac_f32_e32 v15, v20, v27                                     ; 3E1E3714
>	v_mul_f32_e32 v10, v32, v29                                     ; 10143B20
>	v_mac_f32_e32 v12, v18, v33                                     ; 3E184312
>	v_mac_f32_e32 v4, v20, v28                                      ; 3E083914
>	v_mul_f32_e32 v9, v32, v30                                      ; 10123D20
>	v_mac_f32_e32 v15, v18, v34                                     ; 3E1E4512
>	v_mul_f32_e32 v53, v10, v12                                     ; 106A190A
>	v_mul_f32_e32 v11, v32, v31                                     ; 10163F20
>	v_mac_f32_e32 v4, v18, v46                                      ; 3E085D12
>	v_mac_f32_e32 v53, v9, v15                                      ; 3E6A1F09
>	v_mac_f32_e32 v53, v11, v4                                      ; 3E6A090B
>	s_load_dwordx8 s[48:55], s[4:5], 0x70                           ; C0D80570
>	s_load_dwordx4 s[56:59], s[4:5], 0x7c                           ; C09C057C
>	v_mul_f32_e32 v16, v15, v53                                     ; 10206B0F
>	v_mad_f32 v22, -v39, v17, v17                                   ; D2820016 24462327
>	v_mul_f32_e32 v17, v4, v53                                      ; 10226B04
>	v_mac_f32_e32 v16, v15, v53                                     ; 3E206B0F
>	v_mad_f32 v30, -v30, v32, v16                                   ; D282001E 2442411E
>	v_interp_p1_f32 v16, v6, 2, 1, [m0]                             ; C8400606
>	v_mac_f32_e32 v17, v4, v53                                      ; 3E226B04
>	v_mad_f32 v31, -v31, v32, v17                                   ; D282001F 2446411F
>	v_interp_p2_f32 v16, [v16], v3, 2, 1, [m0]                      ; C8410603
>	v_interp_p1_f32 v17, v6, 3, 1, [m0]                             ; C8440706
>	v_interp_p2_f32 v17, [v17], v3, 3, 1, [m0]                      ; C8450703
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s56, s56, s55                                         ; 87383738
>	image_sample v[18:21], v[16:17], s[48:55], s[56:59] dmask:0xf   ; F0800F00 01CC1210
>	v_mul_f32_e32 v5, v12, v53                                      ; 100A6B0C
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v16, -0.5, v19                                    ; 062026F1
>	v_mac_f32_e32 v5, v12, v53                                      ; 3E0A6B0C
>	v_mad_f32 v29, -v29, v32, v5                                    ; D282001D 2416411D
>	v_add_f32_e32 v5, -0.5, v20                                     ; 060A28F1
>	v_add_f32_e32 v19, v16, v16                                     ; 06262110
>	v_add_f32_e32 v17, v5, v5                                       ; 06220B05
>	v_mul_f32_e32 v5, v19, v19                                      ; 100A2713
>	v_mac_f32_e32 v5, v17, v17                                      ; 3E0A2311
>	v_add_f32_e64 v5, v5, 0 clamp                                   ; D2060805 00010105
>	v_sub_f32_e32 v5, 1.0, v5                                       ; 080A0AF2
>	v_sqrt_f32_e32 v20, v5                                          ; 7E286705
>	v_mul_f32_e32 v5, v17, v23                                      ; 100A2F11
>	v_mul_f32_e32 v16, v17, v24                                     ; 10203111
>	v_mac_f32_e32 v5, v19, v26                                      ; 3E0A3513
>	v_mul_f32_e32 v17, v17, v25                                     ; 10223311
>	v_mac_f32_e32 v16, v19, v27                                     ; 3E203713
>	v_mac_f32_e32 v5, v20, v33                                      ; 3E0A4314
>	v_mac_f32_e32 v17, v19, v28                                     ; 3E223913
>	v_mac_f32_e32 v16, v20, v34                                     ; 3E204514
>	v_mul_f32_e32 v19, v5, v29                                      ; 10263B05
>	s_buffer_load_dword s49, s[0:3], 0x10                           ; C2188110
>	v_mac_f32_e32 v17, v20, v46                                     ; 3E225D14
>	v_mac_f32_e32 v19, v16, v30                                     ; 3E263D10
>	v_mac_f32_e32 v19, v17, v31                                     ; 3E263F11
>	v_add_f32_e64 v19, v19, 0 clamp                                 ; D2060813 00010113
>	v_mul_f32_e32 v55, v14, v18                                     ; 106E250E
>	v_mov_b32_e32 v18, 0x403b800a                                   ; 7E2402FF 403B800A
>	v_mad_f32 v54, 2.0, v21, -v19                                   ; D2820036 844E2AF4
>	v_mad_f32 v19, v18, v33, v1                                     ; D2820013 04064312
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v24, s49, v19                                     ; 10302631
>	s_buffer_load_dword s49, s[0:3], 0x11                           ; C2188111
>	s_buffer_load_dword s50, s[0:3], 0x12                           ; C2190112
>	s_buffer_load_dword s51, s[0:3], 0x14                           ; C2198114
>	s_buffer_load_dword s52, s[0:3], 0x15                           ; C21A0115
>	s_buffer_load_dword s53, s[0:3], 0x16                           ; C21A8116
>	v_mad_f32 v20, v18, v34, v0                                     ; D2820014 04024512
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v25, s49, v19                                     ; 10322631
>	v_mul_f32_e32 v26, s50, v19                                     ; 10342632
>	v_mac_f32_e32 v24, s51, v20                                     ; 3E302833
>	s_buffer_load_dword s49, s[0:3], 0x18                           ; C2188118
>	s_buffer_load_dword s50, s[0:3], 0x19                           ; C2190119
>	s_buffer_load_dword s51, s[0:3], 0x1a                           ; C219811A
>	v_mac_f32_e32 v25, s52, v20                                     ; 3E322834
>	v_mac_f32_e32 v26, s53, v20                                     ; 3E342835
>	s_load_dwordx8 s[32:39], s[4:5], 0x0                            ; C0D00500
>	s_load_dwordx4 s[40:43], s[4:5], 0xc                            ; C094050C
>	s_buffer_load_dword s48, s[0:3], 0x1e                           ; C218011E
>	s_buffer_load_dword s52, s[0:3], 0x1c                           ; C21A011C
>	s_buffer_load_dword s53, s[0:3], 0x1d                           ; C21A811D
>	v_mad_f32 v18, v18, v46, v2                                     ; D2820012 040A5D12
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v24, s49, v18                                     ; 3E302431
>	v_mac_f32_e32 v25, s50, v18                                     ; 3E322432
>	v_mac_f32_e32 v26, s51, v18                                     ; 3E342433
>	v_add_f32_e32 v32, v21, v21                                     ; 06402B15
>	v_sub_f32_e32 v21, 1.0, v47                                     ; 082A5EF2
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	v_add_f32_e32 v19, s52, v24                                     ; 06263034
>	v_add_f32_e32 v20, s53, v25                                     ; 06283235
>	v_add_f32_e32 v18, s48, v26                                     ; 06243430
>	v_mac_f32_e32 v22, v39, v38                                     ; 3E2C4D27
>	image_sample_c v38, v[18:21], s[32:39], s[40:43] dmask:0x1      ; F0A00100 01482612
>	v_add_f32_e32 v18, v21, v42                                     ; 06245515
>	v_mul_f32_e32 v19, v40, v35                                     ; 10264728
>	v_mul_f32_e32 v20, v40, v36                                     ; 10284928
>	v_add_f32_e32 v23, v21, v41                                     ; 062E5315
>	v_mul_f32_e32 v21, v40, v37                                     ; 102A4B28
>	v_rcp_f32_e32 v18, v18                                          ; 7E245512
>	v_log_f32_e32 v19, v19                                          ; 7E264F13
>	v_log_f32_e32 v20, v20                                          ; 7E284F14
>	v_log_f32_e32 v21, v21                                          ; 7E2A4F15
>	v_log_f32_e32 v22, v22                                          ; 7E2C4F16
>	v_mul_legacy_f32_e32 v19, v18, v19                              ; 0E262712
>	v_mul_legacy_f32_e32 v20, v18, v20                              ; 0E282912
>	v_mul_legacy_f32_e32 v18, v18, v21                              ; 0E242B12
>	v_rcp_f32_e32 v21, v23                                          ; 7E2A5517
>	v_exp_f32_e32 v37, v18                                          ; 7E4A4B12
>	v_exp_f32_e32 v35, v19                                          ; 7E464B13
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	v_mul_legacy_f32_e32 v18, v21, v22                              ; 0E242D15
>	v_exp_f32_e32 v39, v18                                          ; 7E4E4B12
>	v_cubema_f32 v18, v12, v15, v4                                  ; D28E0012 04121F0C
>	v_rcp_f32_e64 v18, |v18|                                        ; D3540112 00000112
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                           ; C08E051C
>	v_cubetc_f32 v19, v12, v15, v4                                  ; D28C0013 04121F0C
>	v_mov_b32_e32 v21, 0x3fc00000                                   ; 7E2A02FF 3FC00000
>	v_cubesc_f32 v22, v12, v15, v4                                  ; D28A0016 04121F0C
>	v_mad_f32 v19, v18, v19, v21                                    ; D2820013 04562712
>	v_mad_f32 v18, v18, v22, v21                                    ; D2820012 04562D12
>	v_add_f32_e64 v22, v53, 0 clamp                                 ; D2060816 00010135
>	s_buffer_load_dword s45, s[0:3], 0x8b                           ; C216818B
>	v_sub_f32_e32 v22, 1.0, v22                                     ; 082C2CF2
>	v_log_f32_e32 v22, v22                                          ; 7E2C4F16
>	v_mad_f32 v40, -v51, v39, v39                                   ; D2820028 249E4F33
>	v_exp_f32_e32 v36, v20                                          ; 7E484B14
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v20, v12, v15, v4                                  ; D2880014 04121F0C
>	image_sample v[25:28], v[18:21], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E51912
>	v_mac_f32_e32 v40, s45, v51                                     ; 3E50662D
>	v_mov_b32_e32 v18, 0x40c00000                                   ; 7E2402FF 40C00000
>	v_max_f32_e32 v19, v35, v40                                     ; 20265123
>	v_max_f32_e32 v20, v36, v40                                     ; 20285124
>	v_mad_f32 v24, -v40, v18, v18                                   ; D2820018 244A2528
>	v_mul_legacy_f32_e32 v18, 0x40a00000, v22                       ; 0E242CFF 40A00000
>	v_max_f32_e32 v22, v37, v40                                     ; 202C5125
>	v_exp_f32_e32 v18, v18                                          ; 7E244B12
>	v_subrev_f32_e32 v19, v35, v19                                  ; 0A262723
>	v_subrev_f32_e32 v20, v36, v20                                  ; 0A282924
>	v_subrev_f32_e32 v22, v37, v22                                  ; 0A2C2D25
>	v_mad_f32 v41, v20, v18, v36                                    ; D2820029 04922514
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                           ; C090052C
>	v_mad_f32 v19, v19, v18, v35                                    ; D2820013 048E2513
>	v_mad_f32 v42, v22, v18, v37                                    ; D282002A 04962516
>	v_cubema_f32 v18, v29, v30, v31                                 ; D28E0012 047E3D1D
>	v_rcp_f32_e64 v18, |v18|                                        ; D3540112 00000112
>	v_mac_f32_e32 v48, v47, v43                                     ; 3E60572F
>	v_cubetc_f32 v20, v29, v30, v31                                 ; D28C0014 047E3D1D
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	v_cubesc_f32 v43, v29, v30, v31                                 ; D28A002B 047E3D1D
>	v_mad_f32 v22, v18, v20, v21                                    ; D2820016 04562912
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v23, v29, v30, v31                                 ; D2880017 047E3D1D
>	v_mac_f32_e32 v21, v18, v43                                     ; 3E2A5712
>	image_sample_l v[20:22], v[21:24], s[12:19], s[32:35] dmask:0x7 ; F0900700 01031415
>	s_buffer_load_dword s12, s[0:3], 0x6                            ; C2060106
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v18, v20, v19                                     ; 10242714
>	v_mul_f32_e32 v19, v21, v41                                     ; 10265315
>	v_mul_f32_e32 v21, v33, v29                                     ; 102A3B21
>	v_mul_f32_e32 v29, v33, v10                                     ; 103A1521
>	v_mac_f32_e32 v29, v34, v9                                      ; 3E3A1322
>	v_mul_f32_e32 v9, s9, v5                                        ; 10120A09
>	v_mad_f32 v9, v16, -s8, -v9                                     ; D2820009 C4241110
>	v_mad_f32 v21, -v30, v34, -v21                                  ; D2820015 A456451E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v9, -v17, s12, v9                                     ; D2820009 24241911
>	s_buffer_load_dword s13, s[0:3], 0xc                            ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                            ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                            ; C207810E
>	v_mad_f32 v30, -v31, v46, v21                                   ; D282001E 24565D1F
>	v_mov_b32_e32 v31, 0x3f8ccccd                                   ; 7E3E02FF 3F8CCCCD
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mad_f32 v9, v32, v31, -v9                                     ; D2820009 84263F20
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v9, v9, v9                                        ; 10121309
>	v_mul_f32_e32 v10, v38, v38                                     ; 10144D26
>	v_mac_f32_e32 v29, v46, v11                                     ; 3E3A172E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v11, s13, v10                                     ; 1016140D
>	v_mul_f32_e32 v21, s14, v10                                     ; 102A140E
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v10, s15, v10                                     ; 1014140F
>	v_mul_f32_e32 v11, v9, v11                                      ; 10161709
>	v_mul_f32_e32 v21, v9, v21                                      ; 102A2B09
>	v_mul_f32_e32 v9, v9, v10                                       ; 10121509
>	v_mul_f32_e32 v10, s9, v12                                      ; 10141809
>	v_mad_f32 v10, v15, -s8, -v10                                   ; D282000A C428110F
>	v_mad_f32 v10, -v4, s12, v10                                    ; D282000A 24281904
>	v_add_f32_e64 v10, v10, 0 clamp                                 ; D206080A 0001010A
>	v_mul_f32_e32 v9, v14, v9                                       ; 1012130E
>	v_mul_f32_e32 v11, v14, v11                                     ; 1016170E
>	v_mul_f32_e32 v21, v14, v21                                     ; 102A2B0E
>	v_mul_f32_e32 v20, v22, v42                                     ; 10285516
>	v_mul_f32_e32 v22, v9, v10                                      ; 102C1509
>	v_mov_b32_e32 v9, 0x3eaaaa9f                                    ; 7E1202FF 3EAAAA9F
>	v_mul_f32_e32 v11, v11, v10                                     ; 1016150B
>	v_mul_f32_e32 v21, v21, v10                                     ; 102A1515
>	v_mul_f32_e32 v10, v9, v35                                      ; 10144709
>	v_mac_f32_e32 v10, v9, v36                                      ; 3E144909
>	v_mac_f32_e32 v10, v9, v37                                      ; 3E144B09
>	v_sub_f32_e32 v9, 1.0, v10                                      ; 081214F2
>	v_mul_f32_e32 v10, v28, v26                                     ; 1014351C
>	v_add_f32_e64 v26, v54, 0 clamp                                 ; D206081A 00010136
>	v_log_f32_e32 v26, v26                                          ; 7E344F1A
>	v_add_f32_e64 v24, v9, 0 clamp                                  ; D2060818 00010109
>	v_mul_f32_e32 v9, v28, v25                                      ; 1012331C
>	v_mul_f32_e32 v9, 4.0, v9                                       ; 101212F6
>	v_mul_legacy_f32_e32 v26, 0x40400000, v26                       ; 0E3434FF 40400000
>	v_exp_f32_e32 v26, v26                                          ; 7E344B1A
>	v_mul_f32_e32 v25, v9, v24                                      ; 10323109
>	v_mul_f32_e32 v9, v24, v11                                      ; 10121718
>	v_mac_f32_e32 v9, v55, v25                                      ; 3E123337
>	v_mad_f32 v25, -v39, v52, 1.0                                   ; D2820019 23CA6927
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_mul_f32_e32 v23, v28, v27                                     ; 102E371C
>	v_mad_f32 v25, -s45, v51, v25                                   ; D2820019 2466662D
>	v_mov_b32_e32 v27, v26                                          ; 7E36031A
>	v_sub_f32_e32 v28, 1.0, v29                                     ; 08383AF2
>	v_mac_f32_e32 v27, 0xbe99999a, v40                              ; 3E3650FF BE99999A
>	v_mac_f32_e32 v25, 0x41a00000, v40                              ; 3E3250FF 41A00000
>	v_mul_f32_e32 v25, v25, v27                                     ; 10323719
>	v_mul_f32_e32 v10, 4.0, v10                                     ; 101414F6
>	s_buffer_load_dword s47, s[0:3], 0x88                           ; C2178188
>	s_buffer_load_dword s46, s[0:3], 0x89                           ; C2170189
>	s_buffer_load_dword s44, s[0:3], 0x8a                           ; C216018A
>	v_add_f32_e32 v27, 1.0, v30                                     ; 06363CF2
>	v_add_f32_e64 v28, v28, 0 clamp                                 ; D206081C 0001011C
>	v_subrev_f32_e32 v27, v28, v27                                  ; 0A36371C
>	v_mul_f32_e32 v11, v10, v24                                     ; 1016310A
>	v_mul_f32_e32 v10, v24, v21                                     ; 10142B18
>	v_mac_f32_e32 v10, v55, v11                                     ; 3E141737
>	v_mul_f32_e32 v11, 4.0, v23                                     ; 10162EF6
>	v_add_f32_e64 v27, v27, 0 clamp                                 ; D206081B 0001011B
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	v_sub_f32_e32 v28, 1.0, v27                                     ; 083836F2
>	v_mac_f32_e32 v49, v47, v44                                     ; 3E62592F
>	v_mul_f32_e32 v21, v11, v24                                     ; 102A310B
>	v_mul_f32_e32 v11, v24, v22                                     ; 10162D18
>	v_mac_f32_e32 v50, v47, v45                                     ; 3E645B2F
>	v_mad_f32 v22, -v51, v48, v48                                   ; D2820016 24C26133
>	v_mad_f32 v23, -v51, v49, v49                                   ; D2820017 24C66333
>	v_mac_f32_e32 v11, v55, v21                                     ; 3E162B37
>	v_mad_f32 v21, -v51, v50, v50                                   ; D2820015 24CA6533
>	v_mul_f32_e32 v25, v25, v26                                     ; 10323519
>	v_mad_f32 v27, -v27, v28, v28                                   ; D282001B 2472391B
>	v_mul_f32_e32 v25, v27, v25                                     ; 1032331B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v22, s47, v51                                     ; 3E2C662F
>	v_mac_f32_e32 v23, s46, v51                                     ; 3E2E662E
>	v_mac_f32_e32 v21, s44, v51                                     ; 3E2A662C
>	v_mul_f32_e32 v26, v31, v32                                     ; 1034411F
>	v_mov_b32_e32 v27, 0xc8                                         ; 7E3602FF 000000C8
>	v_mov_b32_e32 v28, 0                                            ; 7E380280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v29, vcc, 0xffffffe8, v27                         ; 4A3A36FF FFFFFFE8
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, 0xffffffec, v27                         ; 4A3C36FF FFFFFFEC
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v31, vcc, -16, v27                                ; 4A3E36D0
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v28, vcc, 1, v28                                  ; 4A383881
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v29, v1, v29                                   ; 0A3A3B01
>	v_mul_f32_e32 v32, v29, v29                                     ; 10403B1D
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v30, v0, v30                                   ; 0A3C3D00
>	v_mac_f32_e32 v32, v30, v30                                     ; 3E403D1E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_subrev_f32_e32 v31, v2, v31                                   ; 0A3E3F02
>	v_mac_f32_e32 v32, v31, v31                                     ; 3E403F1F
>	v_rsq_f32_e32 v33, v32                                          ; 7E425D20
>	v_mul_f32_e32 v29, v33, v29                                     ; 103A3B21
>	v_mul_f32_e32 v34, v5, v29                                      ; 10443B05
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mac_f32_e32 v34, v16, v30                                     ; 3E443D10
>	v_mac_f32_e32 v34, v17, v31                                     ; 3E443F11
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_subrev_f32_e32 v34, v34, v26                                  ; 0A443522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_sub_f32_e32 v35, 1.0, v33                                     ; 084642F2
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mac_f32_e32 v33, v35, v34                                     ; 3E424523
>	v_add_i32_e32 v34, vcc, -12, v27                                ; 4A4436CC
>	buffer_load_dword v34, v34, s[0:3], 0 offen                     ; E0301000 80002222
>	v_mul_f32_e32 v29, v12, v29                                     ; 103A3B0C
>	v_mac_f32_e32 v29, v15, v30                                     ; 3E3A3D0F
>	v_mac_f32_e32 v29, v4, v31                                      ; 3E3A3F04
>	v_add_i32_e32 v30, vcc, -8, v27                                 ; 4A3C36C8
>	v_add_i32_e32 v31, vcc, -4, v27                                 ; 4A3E36C4
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_f32_e64 v29, v29, 0 clamp                                 ; D206081D 0001011D
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mul_f32_e32 v32, v34, v32                                     ; 10404122
>	buffer_load_dword v34, v27, s[0:3], 0 offen                     ; E0301000 8000221B
>	v_add_f32_e64 v32, v32, 0 clamp                                 ; D2060820 00010120
>	v_add_i32_e32 v27, vcc, 32, v27                                 ; 4A3636A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v30, -v32, v30, v30                                   ; D282001E 247A3D20
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mad_f32 v31, -v32, v31, v31                                   ; D282001F 247E3F20
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mul_f32_e32 v30, v14, v30                                     ; 103C3D0E
>	v_mul_f32_e32 v31, v14, v31                                     ; 103E3F0E
>	v_mul_f32_e32 v30, v30, v29                                     ; 103C3B1E
>	v_mul_f32_e32 v31, v31, v29                                     ; 103E3B1F
>	v_mac_f32_e32 v9, v24, v30                                      ; 3E123D18
>	v_mac_f32_e32 v10, v24, v31                                     ; 3E143F18
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v32, -v32, v34, v34                                   ; D2820020 248A4520
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mul_f32_e32 v32, v14, v32                                     ; 1040410E
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v11, v24, v29                                     ; 3E163B18
>	v_cmp_lt_i32_e32 vcc, 2, v28                                    ; 7D023882
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	s_load_dwordx8 s[12:19], s[4:5], 0x90                           ; C0C60590
>	s_load_dwordx4 s[4:7], s[4:5], 0x9c                             ; C082059C
>	s_buffer_load_dword s8, s[0:3], 0x94                            ; C2040194
>	v_mul_f32_e32 v5, v25, v18                                      ; 100A2519
>	v_mac_f32_e32 v5, v22, v9                                       ; 3E0A1316
>	v_mov_b32_e32 v9, 0x42000000                                    ; 7E1202FF 42000000
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	image_sample v[14:16], v[7:8], s[12:19], s[4:7] dmask:0x7       ; F0800700 00230E07
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v14                               ; 10021CFF 3E99999A
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v1, 0x3f170a3d, v15                               ; 3E021EFF 3F170A3D
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mac_f32_e32 v1, 0x3de147ae, v16                               ; 3E0220FF 3DE147AE
>	v_mul_f32_e32 v1, s8, v1                                        ; 10020208
>	v_mul_f32_e32 v2, v1, v14                                       ; 10041D01
>	v_mac_f32_e32 v5, v9, v2                                        ; 3E0A0509
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v8, v25, v20                                      ; 10102919
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v4, v1, v15                                       ; 10081F01
>	v_mul_f32_e32 v1, v1, v16                                       ; 10022101
>	v_mac_f32_e32 v8, v21, v11                                      ; 3E101715
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v8, v9, v1                                        ; 3E100309
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v7, v25, v19                                      ; 100E2719
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v7, v23, v10                                      ; 3E0E1517
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_mac_f32_e32 v7, v9, v4                                        ; 3E0E0909
>	v_mul_f32_e32 v4, v0, v1                                        ; 10080300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v4, s6, s6                                       ; D2820000 20180D04
>	v_mad_f32 v1, -v4, s7, s7                                       ; D2820001 201C0F04
>	v_mad_f32 v2, -v4, s0, s0                                       ; D2820002 20000104
>	v_mac_f32_e32 v0, v4, v5                                        ; 3E000B04
>	v_mac_f32_e32 v1, v4, v7                                        ; 3E020F04
>	v_mac_f32_e32 v2, v4, v8                                        ; 3E041104
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 88
>VGPRS: 56
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2896 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 4
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2].x, GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL CONST[0..226]
>DCL TEMP[0..8], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>  0: F2I TEMP[0], IN[3]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MOV TEMP[2].xyz, IMM[0].zzzz
>  3: MOV TEMP[2].w, CONST[4].xxxx
>  4: MOV TEMP[3].xyz, IMM[0].zzzz
>  5: MOV TEMP[3].w, CONST[4].yyyy
>  6: MOV TEMP[4].xyz, IMM[0].zzzz
>  7: MOV TEMP[4].w, CONST[4].zzzz
>  8: NOT TEMP[5].x, CONST[223].xxxx
>  9: UIF TEMP[5].xxxx :0
> 10:   ADD TEMP[5], CONST[7], -TEMP[2]
> 11:   ADD TEMP[6], CONST[8], -TEMP[3]
> 12:   ADD TEMP[7], CONST[9], -TEMP[4]
> 13: ELSE :0
> 14:   NOT TEMP[8].x, CONST[224].xxxx
> 15:   UIF TEMP[8].xxxx :0
> 16:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 17:     UARL ADDR[0].x, TEMP[8].xxxx
> 18:     UARL ADDR[0].x, TEMP[8].xxxx
> 19:     ADD TEMP[5], CONST[ADDR[0].x+7], -TEMP[2]
> 20:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 21:     UARL ADDR[0].x, TEMP[8].xxxx
> 22:     UARL ADDR[0].x, TEMP[8].xxxx
> 23:     ADD TEMP[6], CONST[ADDR[0].x+7], -TEMP[3]
> 24:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 25:     UARL ADDR[0].x, TEMP[8].xxxx
> 26:     UARL ADDR[0].x, TEMP[8].xxxx
> 27:     ADD TEMP[7], CONST[ADDR[0].x+7], -TEMP[4]
> 28:   ELSE :0
> 29:     UMUL TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx
> 30:     UARL ADDR[0].x, TEMP[8].xxxx
> 31:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 32:     MUL TEMP[5], TEMP[8], IN[2].xxxx
> 33:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 34:     UARL ADDR[0].x, TEMP[8].xxxx
> 35:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 36:     MUL TEMP[6], TEMP[8], IN[2].xxxx
> 37:     UMAD TEMP[8].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 38:     UARL ADDR[0].x, TEMP[8].xxxx
> 39:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 40:     MUL TEMP[7], TEMP[8], IN[2].xxxx
> 41:     UMUL TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx
> 42:     UARL ADDR[0].x, TEMP[8].xxxx
> 43:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 44:     MAD TEMP[5], TEMP[8], IN[2].yyyy, TEMP[5]
> 45:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 46:     UARL ADDR[0].x, TEMP[8].xxxx
> 47:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 48:     MAD TEMP[6], TEMP[8], IN[2].yyyy, TEMP[6]
> 49:     UMAD TEMP[8].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 50:     UARL ADDR[0].x, TEMP[8].xxxx
> 51:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 52:     MAD TEMP[7], TEMP[8], IN[2].yyyy, TEMP[7]
> 53:     UIF CONST[225].xxxx :0
> 54:       UMUL TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx
> 55:       UARL ADDR[0].x, TEMP[8].xxxx
> 56:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[2]
> 57:       MAD TEMP[5], TEMP[8], IN[2].zzzz, TEMP[5]
> 58:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 59:       UARL ADDR[0].x, TEMP[8].xxxx
> 60:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[3]
> 61:       MAD TEMP[6], TEMP[8], IN[2].zzzz, TEMP[6]
> 62:       UMAD TEMP[8].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 63:       UARL ADDR[0].x, TEMP[8].xxxx
> 64:       ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[4]
> 65:       MAD TEMP[7], TEMP[8], IN[2].zzzz, TEMP[7]
> 66:     ENDIF
> 67:     UIF CONST[226].xxxx :0
> 68:       UMUL TEMP[8].x, TEMP[0].wwww, IMM[1].xxxx
> 69:       UARL ADDR[0].x, TEMP[8].xxxx
> 70:       ADD TEMP[2], CONST[ADDR[0].x+7], -TEMP[2]
> 71:       MAD TEMP[5], TEMP[2], IN[2].wwww, TEMP[5]
> 72:       UMAD TEMP[2].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 73:       UARL ADDR[0].x, TEMP[2].xxxx
> 74:       ADD TEMP[2], CONST[ADDR[0].x+7], -TEMP[3]
> 75:       MAD TEMP[6], TEMP[2], IN[2].wwww, TEMP[6]
> 76:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 77:       UARL ADDR[0].x, TEMP[0].xxxx
> 78:       ADD TEMP[0], CONST[ADDR[0].x+7], -TEMP[4]
> 79:       MAD TEMP[7], TEMP[0], IN[2].wwww, TEMP[7]
> 80:     ENDIF
> 81:   ENDIF
> 82: ENDIF
> 83: DP4 TEMP[0].x, IN[0], TEMP[5]
> 84: DP4 TEMP[2].x, IN[0], TEMP[6]
> 85: MOV TEMP[0].y, TEMP[2].xxxx
> 86: DP4 TEMP[2].x, IN[0], TEMP[7]
> 87: MOV TEMP[0].z, TEMP[2].xxxx
> 88: DP4 TEMP[2].x, IN[0], IMM[0].zzzw
> 89: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 90: MUL TEMP[3], CONST[0], TEMP[0].xxxx
> 91: MAD TEMP[3], CONST[1], TEMP[0].yyyy, TEMP[3]
> 92: MAD TEMP[3], CONST[2], TEMP[0].zzzz, TEMP[3]
> 93: MAD TEMP[2], CONST[3], TEMP[2].xxxx, TEMP[3]
> 94: MOV TEMP[0].xyz, TEMP[0].xyzx
> 95: MUL TEMP[3].x, TEMP[2].wwww, CONST[6].wwww
> 96: MOV TEMP[0].w, TEMP[3].xxxx
> 97: MAD TEMP[3].x, TEMP[2].zzzz, CONST[5].yyyy, CONST[5].xxxx
> 98: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 99: POW TEMP[3].x, TEMP[3].xxxx, CONST[5].zzzz
>100: ADD TEMP[4].x, IMM[0].wwww, -CONST[5].wwww
>101: MAD TEMP[3].x, CONST[5].wwww, TEMP[3].xxxx, TEMP[4].xxxx
>102: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[5].xyzz
>103: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[6].xyzz
>104: MOV TEMP[4].y, TEMP[5].xxxx
>105: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[7].xyzz
>106: MOV TEMP[4].z, TEMP[1].xxxx
>107: MUL TEMP[1].x, TEMP[3].xxxx, TEMP[3].xxxx
>108: MOV OUT[2].x, TEMP[1].xxxx
>109: MOV OUT[0], TEMP[2]
>110: MOV OUT[1], TEMP[0]
>111: MOV OUT[3].xyz, TEMP[4].xyzx
>112: END
>radeonsi: Compiling shader 127
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %18 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %19 = load <16 x i8>, <16 x i8> addrspace(2)* %18, align 16, !invariant.load !0
>  %20 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %19, i32 0, i32 %14)
>  %21 = extractelement <4 x float> %20, i32 0
>  %22 = extractelement <4 x float> %20, i32 1
>  %23 = extractelement <4 x float> %20, i32 2
>  %24 = extractelement <4 x float> %20, i32 3
>  %25 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, align 16, !invariant.load !0
>  %27 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %26, i32 0, i32 %15)
>  %28 = extractelement <4 x float> %27, i32 0
>  %29 = extractelement <4 x float> %27, i32 1
>  %30 = extractelement <4 x float> %27, i32 2
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %32, i32 0, i32 %16)
>  %34 = extractelement <4 x float> %33, i32 0
>  %35 = extractelement <4 x float> %33, i32 1
>  %36 = extractelement <4 x float> %33, i32 2
>  %37 = extractelement <4 x float> %33, i32 3
>  %38 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %39 = load <16 x i8>, <16 x i8> addrspace(2)* %38, align 16, !invariant.load !0
>  %40 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %39, i32 0, i32 %17)
>  %41 = extractelement <4 x float> %40, i32 0
>  %42 = extractelement <4 x float> %40, i32 1
>  %43 = extractelement <4 x float> %40, i32 2
>  %44 = extractelement <4 x float> %40, i32 3
>  %45 = fptosi float %41 to i32
>  %46 = fptosi float %42 to i32
>  %47 = fptosi float %43 to i32
>  %48 = fptosi float %44 to i32
>  %49 = fmul float %28, 2.000000e+00
>  %50 = fadd float %49, -1.000000e+00
>  %51 = fmul float %29, 2.000000e+00
>  %52 = fadd float %51, -1.000000e+00
>  %53 = fmul float %30, 2.000000e+00
>  %54 = fadd float %53, -1.000000e+00
>  %55 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %56 = load <16 x i8>, <16 x i8> addrspace(2)* %55, align 16, !invariant.load !0
>  %57 = call float @llvm.SI.load.const(<16 x i8> %56, i32 64)
>  %58 = call float @llvm.SI.load.const(<16 x i8> %56, i32 68)
>  %59 = call float @llvm.SI.load.const(<16 x i8> %56, i32 72)
>  %60 = call float @llvm.SI.load.const(<16 x i8> %56, i32 3568)
>  %61 = bitcast float %60 to i32
>  %62 = icmp eq i32 %61, -1
>  %63 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %64 = load <16 x i8>, <16 x i8> addrspace(2)* %63, align 16, !invariant.load !0
>  br i1 %62, label %else13, label %if9
>
>if9:                                              ; preds = %main_body
>  %65 = call float @llvm.SI.load.const(<16 x i8> %64, i32 112)
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call float @llvm.SI.load.const(<16 x i8> %67, i32 116)
>  %69 = call float @llvm.SI.load.const(<16 x i8> %67, i32 120)
>  %70 = call float @llvm.SI.load.const(<16 x i8> %67, i32 124)
>  %71 = fsub float %70, %57
>  %72 = call float @llvm.SI.load.const(<16 x i8> %67, i32 128)
>  %73 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %74 = load <16 x i8>, <16 x i8> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = call float @llvm.SI.load.const(<16 x i8> %74, i32 132)
>  %76 = call float @llvm.SI.load.const(<16 x i8> %74, i32 136)
>  %77 = call float @llvm.SI.load.const(<16 x i8> %74, i32 140)
>  %78 = fsub float %77, %58
>  %79 = call float @llvm.SI.load.const(<16 x i8> %74, i32 144)
>  %80 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %81 = load <16 x i8>, <16 x i8> addrspace(2)* %80, align 16, !invariant.load !0
>  %82 = call float @llvm.SI.load.const(<16 x i8> %81, i32 148)
>  %83 = call float @llvm.SI.load.const(<16 x i8> %81, i32 152)
>  %84 = call float @llvm.SI.load.const(<16 x i8> %81, i32 156)
>  %85 = fsub float %84, %59
>  br label %endif82
>
>else13:                                           ; preds = %main_body
>  %86 = call float @llvm.SI.load.const(<16 x i8> %64, i32 3584)
>  %87 = bitcast float %86 to i32
>  %88 = icmp eq i32 %87, -1
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = mul i32 %45, 48
>  %92 = add i32 %91, 112
>  %93 = call float @llvm.SI.load.const(<16 x i8> %90, i32 %92)
>  %94 = mul i32 %45, 48
>  %95 = add i32 %94, 116
>  %96 = call float @llvm.SI.load.const(<16 x i8> %90, i32 %95)
>  %97 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %98 = load <16 x i8>, <16 x i8> addrspace(2)* %97, align 16, !invariant.load !0
>  %99 = mul i32 %45, 48
>  %100 = add i32 %99, 120
>  %101 = call float @llvm.SI.load.const(<16 x i8> %98, i32 %100)
>  %102 = mul i32 %45, 48
>  %103 = add i32 %102, 124
>  %104 = call float @llvm.SI.load.const(<16 x i8> %98, i32 %103)
>  %105 = fsub float %104, %57
>  br i1 %88, label %else28, label %if15
>
>if15:                                             ; preds = %else13
>  %106 = mul i32 %45, 3
>  %107 = add i32 %106, 1
>  %108 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %109 = load <16 x i8>, <16 x i8> addrspace(2)* %108, align 16, !invariant.load !0
>  %110 = shl i32 %107, 4
>  %111 = add i32 %110, 112
>  %112 = call float @llvm.SI.load.const(<16 x i8> %109, i32 %111)
>  %113 = shl i32 %107, 4
>  %114 = add i32 %113, 116
>  %115 = call float @llvm.SI.load.const(<16 x i8> %109, i32 %114)
>  %116 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %117 = load <16 x i8>, <16 x i8> addrspace(2)* %116, align 16, !invariant.load !0
>  %118 = shl i32 %107, 4
>  %119 = add i32 %118, 120
>  %120 = call float @llvm.SI.load.const(<16 x i8> %117, i32 %119)
>  %121 = shl i32 %107, 4
>  %122 = add i32 %121, 124
>  %123 = call float @llvm.SI.load.const(<16 x i8> %117, i32 %122)
>  %124 = fsub float %123, %58
>  %125 = mul i32 %45, 3
>  %126 = add i32 %125, 2
>  %127 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %128 = load <16 x i8>, <16 x i8> addrspace(2)* %127, align 16, !invariant.load !0
>  %129 = shl i32 %126, 4
>  %130 = add i32 %129, 112
>  %131 = call float @llvm.SI.load.const(<16 x i8> %128, i32 %130)
>  %132 = shl i32 %126, 4
>  %133 = add i32 %132, 116
>  %134 = call float @llvm.SI.load.const(<16 x i8> %128, i32 %133)
>  %135 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %136 = load <16 x i8>, <16 x i8> addrspace(2)* %135, align 16, !invariant.load !0
>  %137 = shl i32 %126, 4
>  %138 = add i32 %137, 120
>  %139 = call float @llvm.SI.load.const(<16 x i8> %136, i32 %138)
>  %140 = shl i32 %126, 4
>  %141 = add i32 %140, 124
>  %142 = call float @llvm.SI.load.const(<16 x i8> %136, i32 %141)
>  %143 = fsub float %142, %59
>  br label %endif82
>
>else28:                                           ; preds = %else13
>  %144 = fmul float %93, %34
>  %145 = fmul float %96, %34
>  %146 = fmul float %101, %34
>  %147 = fmul float %105, %34
>  %148 = mul i32 %45, 3
>  %149 = add i32 %148, 1
>  %150 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %151 = load <16 x i8>, <16 x i8> addrspace(2)* %150, align 16, !invariant.load !0
>  %152 = shl i32 %149, 4
>  %153 = add i32 %152, 112
>  %154 = call float @llvm.SI.load.const(<16 x i8> %151, i32 %153)
>  %155 = shl i32 %149, 4
>  %156 = add i32 %155, 116
>  %157 = call float @llvm.SI.load.const(<16 x i8> %151, i32 %156)
>  %158 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %159 = load <16 x i8>, <16 x i8> addrspace(2)* %158, align 16, !invariant.load !0
>  %160 = shl i32 %149, 4
>  %161 = add i32 %160, 120
>  %162 = call float @llvm.SI.load.const(<16 x i8> %159, i32 %161)
>  %163 = shl i32 %149, 4
>  %164 = add i32 %163, 124
>  %165 = call float @llvm.SI.load.const(<16 x i8> %159, i32 %164)
>  %166 = fsub float %165, %58
>  %167 = fmul float %154, %34
>  %168 = fmul float %157, %34
>  %169 = fmul float %162, %34
>  %170 = fmul float %166, %34
>  %171 = mul i32 %45, 3
>  %172 = add i32 %171, 2
>  %173 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %174 = load <16 x i8>, <16 x i8> addrspace(2)* %173, align 16, !invariant.load !0
>  %175 = shl i32 %172, 4
>  %176 = add i32 %175, 112
>  %177 = call float @llvm.SI.load.const(<16 x i8> %174, i32 %176)
>  %178 = shl i32 %172, 4
>  %179 = add i32 %178, 116
>  %180 = call float @llvm.SI.load.const(<16 x i8> %174, i32 %179)
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = shl i32 %172, 4
>  %184 = add i32 %183, 120
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %184)
>  %186 = shl i32 %172, 4
>  %187 = add i32 %186, 124
>  %188 = call float @llvm.SI.load.const(<16 x i8> %182, i32 %187)
>  %189 = fsub float %188, %59
>  %190 = fmul float %177, %34
>  %191 = fmul float %180, %34
>  %192 = fmul float %185, %34
>  %193 = fmul float %189, %34
>  %194 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %195 = load <16 x i8>, <16 x i8> addrspace(2)* %194, align 16, !invariant.load !0
>  %196 = mul i32 %46, 48
>  %197 = add i32 %196, 112
>  %198 = call float @llvm.SI.load.const(<16 x i8> %195, i32 %197)
>  %199 = mul i32 %46, 48
>  %200 = add i32 %199, 116
>  %201 = call float @llvm.SI.load.const(<16 x i8> %195, i32 %200)
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = mul i32 %46, 48
>  %205 = add i32 %204, 120
>  %206 = call float @llvm.SI.load.const(<16 x i8> %203, i32 %205)
>  %207 = mul i32 %46, 48
>  %208 = add i32 %207, 124
>  %209 = call float @llvm.SI.load.const(<16 x i8> %203, i32 %208)
>  %210 = fsub float %209, %57
>  %211 = fmul float %198, %35
>  %212 = fadd float %211, %144
>  %213 = fmul float %201, %35
>  %214 = fadd float %213, %145
>  %215 = fmul float %206, %35
>  %216 = fadd float %215, %146
>  %217 = fmul float %210, %35
>  %218 = fadd float %217, %147
>  %219 = mul i32 %46, 3
>  %220 = add i32 %219, 1
>  %221 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %222 = load <16 x i8>, <16 x i8> addrspace(2)* %221, align 16, !invariant.load !0
>  %223 = shl i32 %220, 4
>  %224 = add i32 %223, 112
>  %225 = call float @llvm.SI.load.const(<16 x i8> %222, i32 %224)
>  %226 = shl i32 %220, 4
>  %227 = add i32 %226, 116
>  %228 = call float @llvm.SI.load.const(<16 x i8> %222, i32 %227)
>  %229 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %230 = load <16 x i8>, <16 x i8> addrspace(2)* %229, align 16, !invariant.load !0
>  %231 = shl i32 %220, 4
>  %232 = add i32 %231, 120
>  %233 = call float @llvm.SI.load.const(<16 x i8> %230, i32 %232)
>  %234 = shl i32 %220, 4
>  %235 = add i32 %234, 124
>  %236 = call float @llvm.SI.load.const(<16 x i8> %230, i32 %235)
>  %237 = fsub float %236, %58
>  %238 = fmul float %225, %35
>  %239 = fadd float %238, %167
>  %240 = fmul float %228, %35
>  %241 = fadd float %240, %168
>  %242 = fmul float %233, %35
>  %243 = fadd float %242, %169
>  %244 = fmul float %237, %35
>  %245 = fadd float %244, %170
>  %246 = mul i32 %46, 3
>  %247 = add i32 %246, 2
>  %248 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %249 = load <16 x i8>, <16 x i8> addrspace(2)* %248, align 16, !invariant.load !0
>  %250 = shl i32 %247, 4
>  %251 = add i32 %250, 112
>  %252 = call float @llvm.SI.load.const(<16 x i8> %249, i32 %251)
>  %253 = shl i32 %247, 4
>  %254 = add i32 %253, 116
>  %255 = call float @llvm.SI.load.const(<16 x i8> %249, i32 %254)
>  %256 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %257 = load <16 x i8>, <16 x i8> addrspace(2)* %256, align 16, !invariant.load !0
>  %258 = shl i32 %247, 4
>  %259 = add i32 %258, 120
>  %260 = call float @llvm.SI.load.const(<16 x i8> %257, i32 %259)
>  %261 = shl i32 %247, 4
>  %262 = add i32 %261, 124
>  %263 = call float @llvm.SI.load.const(<16 x i8> %257, i32 %262)
>  %264 = fsub float %263, %59
>  %265 = fmul float %252, %35
>  %266 = fadd float %265, %190
>  %267 = fmul float %255, %35
>  %268 = fadd float %267, %191
>  %269 = fmul float %260, %35
>  %270 = fadd float %269, %192
>  %271 = fmul float %264, %35
>  %272 = fadd float %271, %193
>  %273 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %274 = load <16 x i8>, <16 x i8> addrspace(2)* %273, align 16, !invariant.load !0
>  %275 = call float @llvm.SI.load.const(<16 x i8> %274, i32 3600)
>  %276 = bitcast float %275 to i32
>  %277 = icmp eq i32 %276, 0
>  br i1 %277, label %endif66, label %if53
>
>if53:                                             ; preds = %else28
>  %278 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %279 = load <16 x i8>, <16 x i8> addrspace(2)* %278, align 16, !invariant.load !0
>  %280 = mul i32 %47, 48
>  %281 = add i32 %280, 112
>  %282 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %281)
>  %283 = mul i32 %47, 48
>  %284 = add i32 %283, 116
>  %285 = call float @llvm.SI.load.const(<16 x i8> %279, i32 %284)
>  %286 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %287 = load <16 x i8>, <16 x i8> addrspace(2)* %286, align 16, !invariant.load !0
>  %288 = mul i32 %47, 48
>  %289 = add i32 %288, 120
>  %290 = call float @llvm.SI.load.const(<16 x i8> %287, i32 %289)
>  %291 = mul i32 %47, 48
>  %292 = add i32 %291, 124
>  %293 = call float @llvm.SI.load.const(<16 x i8> %287, i32 %292)
>  %294 = fsub float %293, %57
>  %295 = fmul float %282, %36
>  %296 = fadd float %295, %212
>  %297 = fmul float %285, %36
>  %298 = fadd float %297, %214
>  %299 = fmul float %290, %36
>  %300 = fadd float %299, %216
>  %301 = fmul float %294, %36
>  %302 = fadd float %301, %218
>  %303 = mul i32 %47, 3
>  %304 = add i32 %303, 1
>  %305 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %306 = load <16 x i8>, <16 x i8> addrspace(2)* %305, align 16, !invariant.load !0
>  %307 = shl i32 %304, 4
>  %308 = add i32 %307, 112
>  %309 = call float @llvm.SI.load.const(<16 x i8> %306, i32 %308)
>  %310 = shl i32 %304, 4
>  %311 = add i32 %310, 116
>  %312 = call float @llvm.SI.load.const(<16 x i8> %306, i32 %311)
>  %313 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %314 = load <16 x i8>, <16 x i8> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = shl i32 %304, 4
>  %316 = add i32 %315, 120
>  %317 = call float @llvm.SI.load.const(<16 x i8> %314, i32 %316)
>  %318 = shl i32 %304, 4
>  %319 = add i32 %318, 124
>  %320 = call float @llvm.SI.load.const(<16 x i8> %314, i32 %319)
>  %321 = fsub float %320, %58
>  %322 = fmul float %309, %36
>  %323 = fadd float %322, %239
>  %324 = fmul float %312, %36
>  %325 = fadd float %324, %241
>  %326 = fmul float %317, %36
>  %327 = fadd float %326, %243
>  %328 = fmul float %321, %36
>  %329 = fadd float %328, %245
>  %330 = mul i32 %47, 3
>  %331 = add i32 %330, 2
>  %332 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %333 = load <16 x i8>, <16 x i8> addrspace(2)* %332, align 16, !invariant.load !0
>  %334 = shl i32 %331, 4
>  %335 = add i32 %334, 112
>  %336 = call float @llvm.SI.load.const(<16 x i8> %333, i32 %335)
>  %337 = shl i32 %331, 4
>  %338 = add i32 %337, 116
>  %339 = call float @llvm.SI.load.const(<16 x i8> %333, i32 %338)
>  %340 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %341 = load <16 x i8>, <16 x i8> addrspace(2)* %340, align 16, !invariant.load !0
>  %342 = shl i32 %331, 4
>  %343 = add i32 %342, 120
>  %344 = call float @llvm.SI.load.const(<16 x i8> %341, i32 %343)
>  %345 = shl i32 %331, 4
>  %346 = add i32 %345, 124
>  %347 = call float @llvm.SI.load.const(<16 x i8> %341, i32 %346)
>  %348 = fsub float %347, %59
>  %349 = fmul float %336, %36
>  %350 = fadd float %349, %266
>  %351 = fmul float %339, %36
>  %352 = fadd float %351, %268
>  %353 = fmul float %344, %36
>  %354 = fadd float %353, %270
>  %355 = fmul float %348, %36
>  %356 = fadd float %355, %272
>  br label %endif66
>
>endif66:                                          ; preds = %else28, %if53
>  %.0101 = phi float [ %296, %if53 ], [ %212, %else28 ]
>  %.097 = phi float [ %298, %if53 ], [ %214, %else28 ]
>  %.093 = phi float [ %300, %if53 ], [ %216, %else28 ]
>  %.089 = phi float [ %302, %if53 ], [ %218, %else28 ]
>  %.085 = phi float [ %323, %if53 ], [ %239, %else28 ]
>  %.081 = phi float [ %325, %if53 ], [ %241, %else28 ]
>  %.077 = phi float [ %327, %if53 ], [ %243, %else28 ]
>  %.073 = phi float [ %329, %if53 ], [ %245, %else28 ]
>  %.069 = phi float [ %350, %if53 ], [ %266, %else28 ]
>  %.065 = phi float [ %352, %if53 ], [ %268, %else28 ]
>  %.061 = phi float [ %354, %if53 ], [ %270, %else28 ]
>  %.0 = phi float [ %356, %if53 ], [ %272, %else28 ]
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = call float @llvm.SI.load.const(<16 x i8> %358, i32 3616)
>  %360 = bitcast float %359 to i32
>  %361 = icmp eq i32 %360, 0
>  br i1 %361, label %endif82, label %if67
>
>if67:                                             ; preds = %endif66
>  %362 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %363 = load <16 x i8>, <16 x i8> addrspace(2)* %362, align 16, !invariant.load !0
>  %364 = mul i32 %48, 48
>  %365 = add i32 %364, 112
>  %366 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %365)
>  %367 = mul i32 %48, 48
>  %368 = add i32 %367, 116
>  %369 = call float @llvm.SI.load.const(<16 x i8> %363, i32 %368)
>  %370 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %371 = load <16 x i8>, <16 x i8> addrspace(2)* %370, align 16, !invariant.load !0
>  %372 = mul i32 %48, 48
>  %373 = add i32 %372, 120
>  %374 = call float @llvm.SI.load.const(<16 x i8> %371, i32 %373)
>  %375 = mul i32 %48, 48
>  %376 = add i32 %375, 124
>  %377 = call float @llvm.SI.load.const(<16 x i8> %371, i32 %376)
>  %378 = fsub float %377, %57
>  %379 = fmul float %366, %37
>  %380 = fadd float %379, %.0101
>  %381 = fmul float %369, %37
>  %382 = fadd float %381, %.097
>  %383 = fmul float %374, %37
>  %384 = fadd float %383, %.093
>  %385 = fmul float %378, %37
>  %386 = fadd float %385, %.089
>  %387 = mul i32 %48, 3
>  %388 = add i32 %387, 1
>  %389 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %390 = load <16 x i8>, <16 x i8> addrspace(2)* %389, align 16, !invariant.load !0
>  %391 = shl i32 %388, 4
>  %392 = add i32 %391, 112
>  %393 = call float @llvm.SI.load.const(<16 x i8> %390, i32 %392)
>  %394 = shl i32 %388, 4
>  %395 = add i32 %394, 116
>  %396 = call float @llvm.SI.load.const(<16 x i8> %390, i32 %395)
>  %397 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %398 = load <16 x i8>, <16 x i8> addrspace(2)* %397, align 16, !invariant.load !0
>  %399 = shl i32 %388, 4
>  %400 = add i32 %399, 120
>  %401 = call float @llvm.SI.load.const(<16 x i8> %398, i32 %400)
>  %402 = shl i32 %388, 4
>  %403 = add i32 %402, 124
>  %404 = call float @llvm.SI.load.const(<16 x i8> %398, i32 %403)
>  %405 = fsub float %404, %58
>  %406 = fmul float %393, %37
>  %407 = fadd float %406, %.085
>  %408 = fmul float %396, %37
>  %409 = fadd float %408, %.081
>  %410 = fmul float %401, %37
>  %411 = fadd float %410, %.077
>  %412 = fmul float %405, %37
>  %413 = fadd float %412, %.073
>  %414 = mul i32 %48, 3
>  %415 = add i32 %414, 2
>  %416 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %417 = load <16 x i8>, <16 x i8> addrspace(2)* %416, align 16, !invariant.load !0
>  %418 = shl i32 %415, 4
>  %419 = add i32 %418, 112
>  %420 = call float @llvm.SI.load.const(<16 x i8> %417, i32 %419)
>  %421 = shl i32 %415, 4
>  %422 = add i32 %421, 116
>  %423 = call float @llvm.SI.load.const(<16 x i8> %417, i32 %422)
>  %424 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %425 = load <16 x i8>, <16 x i8> addrspace(2)* %424, align 16, !invariant.load !0
>  %426 = shl i32 %415, 4
>  %427 = add i32 %426, 120
>  %428 = call float @llvm.SI.load.const(<16 x i8> %425, i32 %427)
>  %429 = shl i32 %415, 4
>  %430 = add i32 %429, 124
>  %431 = call float @llvm.SI.load.const(<16 x i8> %425, i32 %430)
>  %432 = fsub float %431, %59
>  %433 = fmul float %420, %37
>  %434 = fadd float %433, %.069
>  %435 = fmul float %423, %37
>  %436 = fadd float %435, %.065
>  %437 = fmul float %428, %37
>  %438 = fadd float %437, %.061
>  %439 = fmul float %432, %37
>  %440 = fadd float %439, %.0
>  br label %endif82
>
>endif82:                                          ; preds = %endif66, %if15, %if67, %if9
>  %.3104 = phi float [ %65, %if9 ], [ %93, %if15 ], [ %380, %if67 ], [ %.0101, %endif66 ]
>  %.3100 = phi float [ %68, %if9 ], [ %96, %if15 ], [ %382, %if67 ], [ %.097, %endif66 ]
>  %.396 = phi float [ %69, %if9 ], [ %101, %if15 ], [ %384, %if67 ], [ %.093, %endif66 ]
>  %.392 = phi float [ %71, %if9 ], [ %105, %if15 ], [ %386, %if67 ], [ %.089, %endif66 ]
>  %.388 = phi float [ %72, %if9 ], [ %112, %if15 ], [ %407, %if67 ], [ %.085, %endif66 ]
>  %.384 = phi float [ %75, %if9 ], [ %115, %if15 ], [ %409, %if67 ], [ %.081, %endif66 ]
>  %.380 = phi float [ %76, %if9 ], [ %120, %if15 ], [ %411, %if67 ], [ %.077, %endif66 ]
>  %.376 = phi float [ %78, %if9 ], [ %124, %if15 ], [ %413, %if67 ], [ %.073, %endif66 ]
>  %.372 = phi float [ %79, %if9 ], [ %131, %if15 ], [ %434, %if67 ], [ %.069, %endif66 ]
>  %.368 = phi float [ %82, %if9 ], [ %134, %if15 ], [ %436, %if67 ], [ %.065, %endif66 ]
>  %.364 = phi float [ %83, %if9 ], [ %139, %if15 ], [ %438, %if67 ], [ %.061, %endif66 ]
>  %.3 = phi float [ %85, %if9 ], [ %143, %if15 ], [ %440, %if67 ], [ %.0, %endif66 ]
>  %441 = fmul float %21, %.3104
>  %442 = fmul float %22, %.3100
>  %443 = fadd float %441, %442
>  %444 = fmul float %23, %.396
>  %445 = fadd float %443, %444
>  %446 = fmul float %24, %.392
>  %447 = fadd float %445, %446
>  %448 = fmul float %21, %.388
>  %449 = fmul float %22, %.384
>  %450 = fadd float %448, %449
>  %451 = fmul float %23, %.380
>  %452 = fadd float %450, %451
>  %453 = fmul float %24, %.376
>  %454 = fadd float %452, %453
>  %455 = fmul float %21, %.372
>  %456 = fmul float %22, %.368
>  %457 = fadd float %455, %456
>  %458 = fmul float %23, %.364
>  %459 = fadd float %457, %458
>  %460 = fmul float %24, %.3
>  %461 = fadd float %459, %460
>  %462 = fmul float %21, 0.000000e+00
>  %463 = fmul float %22, 0.000000e+00
>  %464 = fadd float %462, %463
>  %465 = fmul float %23, 0.000000e+00
>  %466 = fadd float %464, %465
>  %467 = fadd float %466, %24
>  %468 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %469 = load <16 x i8>, <16 x i8> addrspace(2)* %468, align 16, !invariant.load !0
>  %470 = call float @llvm.SI.load.const(<16 x i8> %469, i32 64)
>  %471 = fadd float %447, %470
>  %472 = call float @llvm.SI.load.const(<16 x i8> %469, i32 68)
>  %473 = fadd float %454, %472
>  %474 = call float @llvm.SI.load.const(<16 x i8> %469, i32 72)
>  %475 = fadd float %461, %474
>  %476 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %477 = load <16 x i8>, <16 x i8> addrspace(2)* %476, align 16, !invariant.load !0
>  %478 = call float @llvm.SI.load.const(<16 x i8> %477, i32 0)
>  %479 = fmul float %478, %471
>  %480 = call float @llvm.SI.load.const(<16 x i8> %477, i32 4)
>  %481 = fmul float %480, %471
>  %482 = call float @llvm.SI.load.const(<16 x i8> %477, i32 8)
>  %483 = fmul float %482, %471
>  %484 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %485 = load <16 x i8>, <16 x i8> addrspace(2)* %484, align 16, !invariant.load !0
>  %486 = call float @llvm.SI.load.const(<16 x i8> %485, i32 12)
>  %487 = fmul float %486, %471
>  %488 = call float @llvm.SI.load.const(<16 x i8> %485, i32 16)
>  %489 = fmul float %488, %473
>  %490 = fadd float %489, %479
>  %491 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %492 = load <16 x i8>, <16 x i8> addrspace(2)* %491, align 16, !invariant.load !0
>  %493 = call float @llvm.SI.load.const(<16 x i8> %492, i32 20)
>  %494 = fmul float %493, %473
>  %495 = fadd float %494, %481
>  %496 = call float @llvm.SI.load.const(<16 x i8> %492, i32 24)
>  %497 = fmul float %496, %473
>  %498 = fadd float %497, %483
>  %499 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %500 = load <16 x i8>, <16 x i8> addrspace(2)* %499, align 16, !invariant.load !0
>  %501 = call float @llvm.SI.load.const(<16 x i8> %500, i32 28)
>  %502 = fmul float %501, %473
>  %503 = fadd float %502, %487
>  %504 = call float @llvm.SI.load.const(<16 x i8> %500, i32 32)
>  %505 = fmul float %504, %475
>  %506 = fadd float %505, %490
>  %507 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %508 = load <16 x i8>, <16 x i8> addrspace(2)* %507, align 16, !invariant.load !0
>  %509 = call float @llvm.SI.load.const(<16 x i8> %508, i32 36)
>  %510 = fmul float %509, %475
>  %511 = fadd float %510, %495
>  %512 = call float @llvm.SI.load.const(<16 x i8> %508, i32 40)
>  %513 = fmul float %512, %475
>  %514 = fadd float %513, %498
>  %515 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %516 = load <16 x i8>, <16 x i8> addrspace(2)* %515, align 16, !invariant.load !0
>  %517 = call float @llvm.SI.load.const(<16 x i8> %516, i32 44)
>  %518 = fmul float %517, %475
>  %519 = fadd float %518, %503
>  %520 = call float @llvm.SI.load.const(<16 x i8> %516, i32 48)
>  %521 = fmul float %520, %467
>  %522 = fadd float %521, %506
>  %523 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %524 = load <16 x i8>, <16 x i8> addrspace(2)* %523, align 16, !invariant.load !0
>  %525 = call float @llvm.SI.load.const(<16 x i8> %524, i32 52)
>  %526 = fmul float %525, %467
>  %527 = fadd float %526, %511
>  %528 = call float @llvm.SI.load.const(<16 x i8> %524, i32 56)
>  %529 = fmul float %528, %467
>  %530 = fadd float %529, %514
>  %531 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %532 = load <16 x i8>, <16 x i8> addrspace(2)* %531, align 16, !invariant.load !0
>  %533 = call float @llvm.SI.load.const(<16 x i8> %532, i32 60)
>  %534 = fmul float %533, %467
>  %535 = fadd float %534, %519
>  %536 = call float @llvm.SI.load.const(<16 x i8> %532, i32 108)
>  %537 = fmul float %535, %536
>  %538 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %539 = load <16 x i8>, <16 x i8> addrspace(2)* %538, align 16, !invariant.load !0
>  %540 = call float @llvm.SI.load.const(<16 x i8> %539, i32 84)
>  %541 = call float @llvm.SI.load.const(<16 x i8> %539, i32 80)
>  %542 = fmul float %530, %540
>  %543 = fadd float %542, %541
>  %544 = call float @llvm.AMDGPU.clamp.(float %543, float 0.000000e+00, float 1.000000e+00)
>  %545 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %546 = load <16 x i8>, <16 x i8> addrspace(2)* %545, align 16, !invariant.load !0
>  %547 = call float @llvm.SI.load.const(<16 x i8> %546, i32 88)
>  %548 = call float @llvm.pow.f32(float %544, float %547)
>  %549 = call float @llvm.SI.load.const(<16 x i8> %546, i32 92)
>  %550 = fsub float 1.000000e+00, %549
>  %551 = call float @llvm.SI.load.const(<16 x i8> %546, i32 92)
>  %552 = fmul float %551, %548
>  %553 = fadd float %552, %550
>  %554 = fmul float %50, %.3104
>  %555 = fmul float %52, %.3100
>  %556 = fadd float %555, %554
>  %557 = fmul float %54, %.396
>  %558 = fadd float %556, %557
>  %559 = fmul float %50, %.388
>  %560 = fmul float %52, %.384
>  %561 = fadd float %560, %559
>  %562 = fmul float %54, %.380
>  %563 = fadd float %561, %562
>  %564 = fmul float %50, %.372
>  %565 = fmul float %52, %.368
>  %566 = fadd float %565, %564
>  %567 = fmul float %54, %.364
>  %568 = fadd float %566, %567
>  %569 = fmul float %553, %553
>  %570 = bitcast i32 %12 to float
>  %571 = insertvalue <{ float, float, float }> undef, float %570, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %471, float %473, float %475, float %537)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %569, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %558, float %563, float %568, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %522, float %527, float %530, float %535)
>  ret <{ float, float, float }> %571
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].x, GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..22]
>DCL TEMP[0..56], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,     1.3000,     1.8500}
>IMM[1] FLT32 {   -0.0000,    -0.3000,     0.8000,     1.0000}
>IMM[2] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[3] FLT32 {    0.3333,     4.0000,     5.0000,     0.2500}
>IMM[4] FLT32 {    0.0000,     0.0000,     0.0010,     8.0000}
>IMM[5] INT32 {0, 3, 2, 1}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[2].xyzz, IN[2].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[2].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xyz, CONST[21].xyzx
>  8: MOV TEMP[2].w, CONST[22].xxxx
>  9: MOV TEMP[3].x, IMM[0].xxxx
> 10: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[0].xyzz
> 11: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[1].xyzz
> 12: MUL TEMP[4].xyz, IMM[0].yyyy, TEMP[4].xyzz
> 13: ADD TEMP[4].xyz, TEMP[0].xyzz, -TEMP[4].xyzz
> 14: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 15: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].xxxx
> 16: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[1].xyzz
> 17: ADD TEMP[5].x, IMM[0].xxxx, -TEMP[5].xxxx
> 18: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 19: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 20: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 21: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 22: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 23: MOV TEMP[3].y, TEMP[4].xxxx
> 24: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[1].xyzz
> 26: MAD TEMP[4].xyz, IMM[0].yyyy, TEMP[4].xyzz, -TEMP[0].xyzz
> 27: MOV TEMP[5].xyz, TEMP[1].xyzx
> 28: MUL TEMP[6].x, TEMP[1].yyyy, TEMP[1].yyyy
> 29: MAD TEMP[6].x, TEMP[1].xxxx, TEMP[1].xxxx, -TEMP[6].xxxx
> 30: MOV TEMP[5].w, TEMP[6].xxxx
> 31: MOV TEMP[6].xyz, TEMP[4].xyzx
> 32: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[4].yyyy
> 33: MAD TEMP[7].x, TEMP[4].xxxx, TEMP[4].xxxx, -TEMP[7].xxxx
> 34: MOV TEMP[6].w, TEMP[7].xxxx
> 35: DP4 TEMP[5].x, CONST[17], TEMP[5]
> 36: DP4 TEMP[6].x, CONST[17], TEMP[6]
> 37: MOV TEMP[5].y, TEMP[6].xxxx
> 38: MUL TEMP[6], TEMP[1].xyzz, TEMP[1].yzxz
> 39: DP4 TEMP[6].x, CONST[18], TEMP[6]
> 40: MUL TEMP[4], TEMP[4].xyzz, TEMP[4].yzxz
> 41: DP4 TEMP[4].x, CONST[18], TEMP[4]
> 42: MOV TEMP[6].y, TEMP[4].xxxx
> 43: ADD TEMP[4].xy, TEMP[5].xyyy, TEMP[6].xyyy
> 44: ADD TEMP[4].xy, TEMP[4].xyyy, CONST[19].xxxx
> 45: MAD TEMP[4].xy, TEMP[4].xyyy, IMM[0].zwww, IMM[1].xyyy
> 46: MOV_SAT TEMP[4].xy, TEMP[4].xyyy
> 47: MUL TEMP[4].xy, TEMP[4].xyyy, IMM[1].zwww
> 48: ADD TEMP[4].xy, IMM[0].xxxx, -TEMP[4].xyyy
> 49: MUL TEMP[4].xy, TEMP[3].xyyy, TEMP[4].xyyy
> 50: MOV TEMP[5].w, IMM[0].xxxx
> 51: MAD TEMP[5].xyz, IMM[2].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 52: MUL TEMP[6], CONST[4], TEMP[5].xxxx
> 53: MAD TEMP[6], CONST[5], TEMP[5].yyyy, TEMP[6]
> 54: MAD TEMP[5], CONST[6], TEMP[5].zzzz, TEMP[6]
> 55: ADD TEMP[5], TEMP[5], CONST[7]
> 56: MAD TEMP[6].x, IMM[2].yyyy, CONST[22].yyyy, IMM[0].yyyy
> 57: EX2 TEMP[6].x, TEMP[6].xxxx
> 58: MOV TEMP[7].xyz, -CONST[1].xyzx
> 59: ADD TEMP[8].xyz, TEMP[7].xyzz, TEMP[0].xyzz
> 60: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[2].zzzz
> 61: DP3 TEMP[9].x, TEMP[8].xyzz, TEMP[8].xyzz
> 62: RSQ TEMP[9].x, TEMP[9].xxxx
> 63: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[9].xxxx
> 64: DP3 TEMP[9].x, TEMP[7].xyzz, TEMP[1].xyzz
> 65: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 66: MOV TEMP[10].xy, TEMP[5].xyyy
> 67: MOV TEMP[10].w, IMM[0].xxxx
> 68: MOV TEMP[10].z, TEMP[5].zzzz
> 69: TXP TEMP[5], TEMP[10], SAMP[0], SHADOW2D
> 70: MOV TEMP[10].x, TEMP[5].xxxx
> 71: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 72: MUL TEMP[5].xyz, CONST[3].xyzz, TEMP[5].xxxx
> 73: MUL TEMP[5].xyz, TEMP[9].xxxx, TEMP[5].xyzz
> 74: MOV TEMP[10].xyz, TEMP[1].xyzz
> 75: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
> 76: MOV TEMP[11], TEMP[10]
> 77: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[0].xyzz
> 78: MUL TEMP[11].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 79: MAD TEMP[11].xyz, IMM[0].yyyy, TEMP[11].xyzz, -TEMP[0].xyzz
> 80: ADD TEMP[12].x, IMM[0].xxxx, -CONST[22].yyyy
> 81: MUL TEMP[12].x, TEMP[12].xxxx, IMM[2].wwww
> 82: MOV TEMP[11].w, TEMP[12].xxxx
> 83: DP3 TEMP[13].x, CONST[20].xyzz, IMM[3].xxxx
> 84: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[13].xxxx
> 85: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 86: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
> 87: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[3].yyyy
> 88: MUL TEMP[10].xyz, TEMP[14].xxxx, TEMP[10].xyzz
> 89: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
> 90: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 91: MUL TEMP[13].xyz, TEMP[5].xyzz, TEMP[13].xxxx
> 92: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[4].xxxx, TEMP[13].xyzz
> 93: DP3 TEMP[13].x, TEMP[0].xyzz, TEMP[1].xyzz
> 94: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 95: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
> 96: POW TEMP[13].x, TEMP[13].xxxx, IMM[3].zzzz
> 97: MAX TEMP[14].xyz, CONST[22].yyyy, CONST[20].xyzz
> 98: ADD TEMP[14].xyz, TEMP[14].xyzz, -CONST[20].xyzz
> 99: MAD TEMP[13].xyz, TEMP[13].xxxx, TEMP[14].xyzz, CONST[20].xyzz
>100: MOV TEMP[11].xyz, TEMP[11].xyzz
>101: MOV TEMP[11].w, TEMP[12].xxxx
>102: TXL TEMP[11], TEMP[11], SAMP[2], CUBE
>103: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[8].xyzz
>104: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>105: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[7].xxxx
>106: POW TEMP[7].x, TEMP[7].xxxx, IMM[3].zzzz
>107: ADD TEMP[12].xyz, IMM[0].xxxx, -CONST[20].xyzz
>108: MAD TEMP[7].xyz, TEMP[7].xxxx, TEMP[12].xyzz, CONST[20].xyzz
>109: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xyzz
>110: ADD TEMP[7].x, TEMP[6].xxxx, IMM[0].yyyy
>111: MUL TEMP[7].x, TEMP[7].xxxx, IMM[3].wwww
>112: MUL TEMP[12].x, -TEMP[6].xxxx, IMM[2].zzzz
>113: EX2 TEMP[12].x, TEMP[12].xxxx
>114: ADD TEMP[12].x, IMM[0].yyyy, -TEMP[12].xxxx
>115: RCP TEMP[12].x, TEMP[12].xxxx
>116: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[12].xxxx
>117: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>118: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[8].xyzz
>119: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>120: POW TEMP[7].x, TEMP[7].xxxx, TEMP[6].xxxx
>121: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>122: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[1].xyzz
>123: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>124: MAX TEMP[7].x, TEMP[9].xxxx, TEMP[7].xxxx
>125: ADD TEMP[7].x, TEMP[7].xxxx, IMM[4].xxxx
>126: RCP TEMP[7].x, TEMP[7].xxxx
>127: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>128: MAD TEMP[5].xyz, TEMP[13].xyzz, TEMP[11].xyzz, TEMP[5].xyzz
>129: MUL TEMP[4].xyz, TEMP[5].xyzz, TEMP[4].yyyy
>130: MOV TEMP[5].x, IMM[5].xxxx
>131: BGNLOOP :0
>132:   ISGE TEMP[7].x, TEMP[5].xxxx, IMM[5].yyyy
>133:   UIF TEMP[7].xxxx :0
>134:     BRK
>135:   ENDIF
>136:   UMUL TEMP[8].x, TEMP[5].xxxx, IMM[5].zzzz
>137:   UARL ADDR[0].x, TEMP[8].xxxx
>138:   UARL ADDR[0].x, TEMP[8].xxxx
>139:   ADD TEMP[9].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>140:   DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[9].xyzz
>141:   RSQ TEMP[12].x, TEMP[11].xxxx
>142:   MUL TEMP[13].xyz, TEMP[9].xyzz, TEMP[12].xxxx
>143:   ADD TEMP[14].xyz, TEMP[13].xyzz, TEMP[0].xyzz
>144:   MUL TEMP[15].xyz, TEMP[14].xyzz, IMM[2].zzzz
>145:   DP3 TEMP[16].x, TEMP[15].xyzz, TEMP[15].xyzz
>146:   RSQ TEMP[17].x, TEMP[16].xxxx
>147:   MUL TEMP[18].xyz, TEMP[15].xyzz, TEMP[17].xxxx
>148:   DP3 TEMP[19].x, TEMP[13].xyzz, TEMP[1].xyzz
>149:   MOV_SAT TEMP[20].x, TEMP[19].xxxx
>150:   UMAD TEMP[21].x, TEMP[5].xxxx, IMM[5].zzzz, IMM[5].wwww
>151:   MUL TEMP[22].x, TEMP[11].xxxx, TEMP[12].xxxx
>152:   UMUL TEMP[23].x, TEMP[5].xxxx, IMM[5].zzzz
>153:   UARL ADDR[0].x, TEMP[23].xxxx
>154:   MUL TEMP[24].x, TEMP[22].xxxx, CONST[ADDR[0].x+11].wwww
>155:   MOV_SAT TEMP[25].x, TEMP[24].xxxx
>156:   ADD TEMP[26].x, IMM[0].xxxx, -TEMP[25].xxxx
>157:   UARL ADDR[0].x, TEMP[21].xxxx
>158:   MUL TEMP[27].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[26].xxxx
>159:   MUL TEMP[28].xyz, TEMP[20].xxxx, TEMP[27].xyzz
>160:   DP3 TEMP[29].x, CONST[20].xyzz, IMM[3].xxxx
>161:   ADD TEMP[30].x, IMM[0].xxxx, -TEMP[29].xxxx
>162:   MOV_SAT TEMP[31].x, TEMP[30].xxxx
>163:   MAD TEMP[10].xyz, TEMP[28].xyzz, TEMP[31].xxxx, TEMP[10].xyzz
>164:   DP3 TEMP[32].x, TEMP[13].xyzz, TEMP[18].xyzz
>165:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>166:   ADD TEMP[34].x, IMM[0].xxxx, -TEMP[33].xxxx
>167:   POW TEMP[35].x, TEMP[34].xxxx, IMM[3].zzzz
>168:   ADD TEMP[36].xyz, IMM[0].xxxx, -CONST[20].xyzz
>169:   MAD TEMP[37].xyz, TEMP[35].xxxx, TEMP[36].xyzz, CONST[20].xyzz
>170:   MUL TEMP[38].xyz, TEMP[28].xyzz, TEMP[37].xyzz
>171:   ADD TEMP[39].x, TEMP[6].xxxx, IMM[0].yyyy
>172:   MUL TEMP[40].x, TEMP[39].xxxx, IMM[3].wwww
>173:   MUL TEMP[41].x, -TEMP[6].xxxx, IMM[2].zzzz
>174:   EX2 TEMP[42].x, TEMP[41].xxxx
>175:   ADD TEMP[43].x, IMM[0].yyyy, -TEMP[42].xxxx
>176:   RCP TEMP[44].x, TEMP[43].xxxx
>177:   MUL TEMP[45].x, TEMP[40].xxxx, TEMP[44].xxxx
>178:   MUL TEMP[46].xyz, TEMP[38].xyzz, TEMP[45].xxxx
>179:   DP3 TEMP[47].x, TEMP[1].xyzz, TEMP[18].xyzz
>180:   MOV_SAT TEMP[48].x, TEMP[47].xxxx
>181:   POW TEMP[49].x, TEMP[48].xxxx, TEMP[6].xxxx
>182:   MUL TEMP[50].xyz, TEMP[46].xyzz, TEMP[49].xxxx
>183:   DP3 TEMP[51].x, TEMP[0].xyzz, TEMP[1].xyzz
>184:   MOV_SAT TEMP[52].x, TEMP[51].xxxx
>185:   MAX TEMP[53].x, TEMP[20].xxxx, TEMP[52].xxxx
>186:   ADD TEMP[54].x, TEMP[53].xxxx, IMM[4].xxxx
>187:   RCP TEMP[55].x, TEMP[54].xxxx
>188:   MUL TEMP[56].xyz, TEMP[50].xyzz, TEMP[55].xxxx
>189:   MAD TEMP[4].xyz, TEMP[56].xyzz, TEMP[3].yyyy, TEMP[4].xyzz
>190:   UADD TEMP[5].x, TEMP[5].xxxx, IMM[5].wwww
>191: ENDLOOP :0
>192: MAD TEMP[0].xyz, TEMP[10].xyzz, CONST[21].xyzz, TEMP[4].xyzz
>193: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>194: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].yyyy
>195: ADD TEMP[3].x, CONST[1].wwww, -CONST[0].wwww
>196: ADD TEMP[3].x, TEMP[3].xxxx, IMM[4].zzzz
>197: RCP TEMP[3].x, TEMP[3].xxxx
>198: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
>199: FRC TEMP[3].x, CONST[1].wwww
>200: MUL TEMP[3].x, TEMP[3].xxxx, IMM[4].wwww
>201: POW TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
>202: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>203: MUL TEMP[1].x, IN[1].xxxx, TEMP[1].xxxx
>204: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>205: MOV TEMP[0].w, TEMP[2].wwww
>206: MOV OUT[0], TEMP[0]
>207: END
>radeonsi: Compiling shader 128
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !invariant.load !0
>  %67 = call float @llvm.SI.load.const(<16 x i8> %66, i32 352)
>  %68 = fmul float %60, %43
>  %69 = fmul float %62, %44
>  %70 = fadd float %69, %68
>  %71 = fmul float %64, %45
>  %72 = fadd float %70, %71
>  %73 = fmul float %72, %60
>  %74 = fmul float %72, %62
>  %75 = fmul float %72, %64
>  %76 = fmul float %73, 2.000000e+00
>  %77 = fmul float %74, 2.000000e+00
>  %78 = fmul float %75, 2.000000e+00
>  %79 = fsub float %43, %76
>  %80 = fsub float %44, %77
>  %81 = fsub float %45, %78
>  %82 = fmul float %79, %60
>  %83 = fmul float %80, %62
>  %84 = fadd float %83, %82
>  %85 = fmul float %81, %64
>  %86 = fadd float %84, %85
>  %87 = fadd float %86, 1.000000e+00
>  %88 = fmul float %43, %60
>  %89 = fmul float %44, %62
>  %90 = fadd float %89, %88
>  %91 = fmul float %45, %64
>  %92 = fadd float %90, %91
>  %93 = fsub float 1.000000e+00, %92
>  %94 = call float @llvm.AMDGPU.clamp.(float %93, float 0.000000e+00, float 1.000000e+00)
>  %95 = fsub float %87, %94
>  %96 = call float @llvm.AMDGPU.clamp.(float %95, float 0.000000e+00, float 1.000000e+00)
>  %97 = fsub float 1.000000e+00, %96
>  %98 = fmul float %97, %97
>  %99 = fmul float %60, %43
>  %100 = fmul float %62, %44
>  %101 = fadd float %100, %99
>  %102 = fmul float %64, %45
>  %103 = fadd float %101, %102
>  %104 = fmul float %103, %60
>  %105 = fmul float %103, %62
>  %106 = fmul float %103, %64
>  %107 = fmul float %104, 2.000000e+00
>  %108 = fsub float %107, %43
>  %109 = fmul float %105, 2.000000e+00
>  %110 = fsub float %109, %44
>  %111 = fmul float %106, 2.000000e+00
>  %112 = fsub float %111, %45
>  %113 = fmul float %62, %62
>  %114 = fmul float %60, %60
>  %115 = fsub float %114, %113
>  %116 = fmul float %110, %110
>  %117 = fmul float %108, %108
>  %118 = fsub float %117, %116
>  %119 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %120 = load <16 x i8>, <16 x i8> addrspace(2)* %119, align 16, !invariant.load !0
>  %121 = call float @llvm.SI.load.const(<16 x i8> %120, i32 272)
>  %122 = call float @llvm.SI.load.const(<16 x i8> %120, i32 276)
>  %123 = call float @llvm.SI.load.const(<16 x i8> %120, i32 280)
>  %124 = call float @llvm.SI.load.const(<16 x i8> %120, i32 284)
>  %125 = fmul float %121, %60
>  %126 = fmul float %122, %62
>  %127 = fadd float %125, %126
>  %128 = fmul float %123, %64
>  %129 = fadd float %127, %128
>  %130 = fmul float %124, %115
>  %131 = fadd float %129, %130
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 272)
>  %135 = call float @llvm.SI.load.const(<16 x i8> %133, i32 276)
>  %136 = call float @llvm.SI.load.const(<16 x i8> %133, i32 280)
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 284)
>  %138 = fmul float %134, %108
>  %139 = fmul float %135, %110
>  %140 = fadd float %138, %139
>  %141 = fmul float %136, %112
>  %142 = fadd float %140, %141
>  %143 = fmul float %137, %118
>  %144 = fadd float %142, %143
>  %145 = fmul float %60, %62
>  %146 = fmul float %62, %64
>  %147 = fmul float %64, %60
>  %148 = fmul float %64, %64
>  %149 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %150 = load <16 x i8>, <16 x i8> addrspace(2)* %149, align 16, !invariant.load !0
>  %151 = call float @llvm.SI.load.const(<16 x i8> %150, i32 288)
>  %152 = call float @llvm.SI.load.const(<16 x i8> %150, i32 292)
>  %153 = call float @llvm.SI.load.const(<16 x i8> %150, i32 296)
>  %154 = call float @llvm.SI.load.const(<16 x i8> %150, i32 300)
>  %155 = fmul float %151, %145
>  %156 = fmul float %152, %146
>  %157 = fadd float %155, %156
>  %158 = fmul float %153, %147
>  %159 = fadd float %157, %158
>  %160 = fmul float %154, %148
>  %161 = fadd float %159, %160
>  %162 = fmul float %108, %110
>  %163 = fmul float %110, %112
>  %164 = fmul float %112, %108
>  %165 = fmul float %112, %112
>  %166 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %167 = load <16 x i8>, <16 x i8> addrspace(2)* %166, align 16, !invariant.load !0
>  %168 = call float @llvm.SI.load.const(<16 x i8> %167, i32 288)
>  %169 = call float @llvm.SI.load.const(<16 x i8> %167, i32 292)
>  %170 = call float @llvm.SI.load.const(<16 x i8> %167, i32 296)
>  %171 = call float @llvm.SI.load.const(<16 x i8> %167, i32 300)
>  %172 = fmul float %168, %162
>  %173 = fmul float %169, %163
>  %174 = fadd float %172, %173
>  %175 = fmul float %170, %164
>  %176 = fadd float %174, %175
>  %177 = fmul float %171, %165
>  %178 = fadd float %176, %177
>  %179 = fadd float %131, %161
>  %180 = fadd float %144, %178
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = call float @llvm.SI.load.const(<16 x i8> %182, i32 304)
>  %184 = fadd float %179, %183
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 304)
>  %186 = fadd float %180, %185
>  %187 = fmul float %184, 0x3FF4CCCCC0000000
>  %188 = fmul float %186, 0x3FFD9999A0000000
>  %189 = fadd float %188, 0xBFD3333340000000
>  %190 = call float @llvm.AMDGPU.clamp.(float %187, float 0.000000e+00, float 1.000000e+00)
>  %191 = call float @llvm.AMDGPU.clamp.(float %189, float 0.000000e+00, float 1.000000e+00)
>  %192 = fmul float %190, 0x3FE99999A0000000
>  %193 = fsub float 1.000000e+00, %192
>  %194 = fsub float 1.000000e+00, %191
>  %195 = fmul float %98, %194
>  %196 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %197 = fmul float %60, 0x4007700140000000
>  %198 = fadd float %197, %196
>  %199 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %200 = fmul float %62, 0x4007700140000000
>  %201 = fadd float %200, %199
>  %202 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %203 = fmul float %64, 0x4007700140000000
>  %204 = fadd float %203, %202
>  %205 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %206 = load <16 x i8>, <16 x i8> addrspace(2)* %205, align 16, !invariant.load !0
>  %207 = call float @llvm.SI.load.const(<16 x i8> %206, i32 64)
>  %208 = fmul float %207, %198
>  %209 = call float @llvm.SI.load.const(<16 x i8> %206, i32 68)
>  %210 = fmul float %209, %198
>  %211 = call float @llvm.SI.load.const(<16 x i8> %206, i32 72)
>  %212 = fmul float %211, %198
>  %213 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %214 = load <16 x i8>, <16 x i8> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = call float @llvm.SI.load.const(<16 x i8> %214, i32 80)
>  %216 = fmul float %215, %201
>  %217 = fadd float %216, %208
>  %218 = call float @llvm.SI.load.const(<16 x i8> %214, i32 84)
>  %219 = fmul float %218, %201
>  %220 = fadd float %219, %210
>  %221 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %222 = load <16 x i8>, <16 x i8> addrspace(2)* %221, align 16, !invariant.load !0
>  %223 = call float @llvm.SI.load.const(<16 x i8> %222, i32 88)
>  %224 = fmul float %223, %201
>  %225 = fadd float %224, %212
>  %226 = call float @llvm.SI.load.const(<16 x i8> %222, i32 96)
>  %227 = fmul float %226, %204
>  %228 = fadd float %227, %217
>  %229 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %230 = load <16 x i8>, <16 x i8> addrspace(2)* %229, align 16, !invariant.load !0
>  %231 = call float @llvm.SI.load.const(<16 x i8> %230, i32 100)
>  %232 = fmul float %231, %204
>  %233 = fadd float %232, %220
>  %234 = call float @llvm.SI.load.const(<16 x i8> %230, i32 104)
>  %235 = fmul float %234, %204
>  %236 = fadd float %235, %225
>  %237 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %238 = load <16 x i8>, <16 x i8> addrspace(2)* %237, align 16, !invariant.load !0
>  %239 = call float @llvm.SI.load.const(<16 x i8> %238, i32 112)
>  %240 = fadd float %228, %239
>  %241 = call float @llvm.SI.load.const(<16 x i8> %238, i32 116)
>  %242 = fadd float %233, %241
>  %243 = call float @llvm.SI.load.const(<16 x i8> %238, i32 120)
>  %244 = fadd float %236, %243
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 356)
>  %248 = fmul float %247, 9.000000e+00
>  %249 = fadd float %248, 2.000000e+00
>  %250 = call float @llvm.exp2.f32(float %249)
>  %251 = call float @llvm.SI.load.const(<16 x i8> %246, i32 16)
>  %252 = fsub float -0.000000e+00, %251
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 20)
>  %256 = fsub float -0.000000e+00, %255
>  %257 = call float @llvm.SI.load.const(<16 x i8> %254, i32 24)
>  %258 = fsub float -0.000000e+00, %257
>  %259 = fsub float %43, %251
>  %260 = fsub float %44, %255
>  %261 = fsub float %45, %257
>  %262 = fmul float %259, 5.000000e-01
>  %263 = fmul float %260, 5.000000e-01
>  %264 = fmul float %261, 5.000000e-01
>  %265 = fmul float %262, %262
>  %266 = fmul float %263, %263
>  %267 = fadd float %266, %265
>  %268 = fmul float %264, %264
>  %269 = fadd float %267, %268
>  %270 = call float @llvm.sqrt.f32(float %269)
>  %271 = fdiv float 1.000000e+00, %270, !fpmath !1
>  %272 = fmul float %262, %271
>  %273 = fmul float %263, %271
>  %274 = fmul float %264, %271
>  %275 = fmul float %60, %252
>  %276 = fmul float %62, %256
>  %277 = fadd float %276, %275
>  %278 = fmul float %64, %258
>  %279 = fadd float %277, %278
>  %280 = call float @llvm.AMDGPU.clamp.(float %279, float 0.000000e+00, float 1.000000e+00)
>  %281 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %282 = load <8 x i32>, <8 x i32> addrspace(2)* %281, align 32, !invariant.load !0
>  %283 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %284 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %283, i64 0, i64 3, !amdgpu.uniform !0
>  %285 = load <4 x i32>, <4 x i32> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = extractelement <8 x i32> %282, i32 7
>  %287 = extractelement <4 x i32> %285, i32 0
>  %288 = and i32 %287, %286
>  %289 = insertelement <4 x i32> %285, i32 %288, i32 0
>  %290 = bitcast float %244 to i32
>  %291 = bitcast float %240 to i32
>  %292 = bitcast float %242 to i32
>  %293 = insertelement <4 x i32> undef, i32 %290, i32 0
>  %294 = insertelement <4 x i32> %293, i32 %291, i32 1
>  %295 = insertelement <4 x i32> %294, i32 %292, i32 2
>  %296 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %295, <8 x i32> %282, <4 x i32> %289, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %297 = extractelement <4 x float> %296, i32 0
>  %298 = fmul float %297, %297
>  %299 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %300 = load <16 x i8>, <16 x i8> addrspace(2)* %299, align 16, !invariant.load !0
>  %301 = call float @llvm.SI.load.const(<16 x i8> %300, i32 48)
>  %302 = fmul float %301, %298
>  %303 = call float @llvm.SI.load.const(<16 x i8> %300, i32 52)
>  %304 = fmul float %303, %298
>  %305 = call float @llvm.SI.load.const(<16 x i8> %300, i32 56)
>  %306 = fmul float %305, %298
>  %307 = fmul float %280, %302
>  %308 = fmul float %280, %304
>  %309 = fmul float %280, %306
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 7, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %320 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %321 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %322 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %323 = call float @llvm.fabs.f32(float %321)
>  %324 = fdiv float 1.000000e+00, %323, !fpmath !1
>  %325 = fmul float %319, %324
>  %326 = fadd float %325, 1.500000e+00
>  %327 = fmul float %320, %324
>  %328 = fadd float %327, 1.500000e+00
>  %329 = bitcast float %328 to i32
>  %330 = bitcast float %326 to i32
>  %331 = bitcast float %322 to i32
>  %332 = insertelement <4 x i32> undef, i32 %329, i32 0
>  %333 = insertelement <4 x i32> %332, i32 %330, i32 1
>  %334 = insertelement <4 x i32> %333, i32 %331, i32 2
>  %335 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %334, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %336 = extractelement <4 x float> %335, i32 0
>  %337 = extractelement <4 x float> %335, i32 1
>  %338 = extractelement <4 x float> %335, i32 2
>  %339 = extractelement <4 x float> %335, i32 3
>  %340 = fmul float %60, %43
>  %341 = fmul float %62, %44
>  %342 = fadd float %341, %340
>  %343 = fmul float %64, %45
>  %344 = fadd float %342, %343
>  %345 = fmul float %344, %60
>  %346 = fmul float %344, %62
>  %347 = fmul float %344, %64
>  %348 = fmul float %345, 2.000000e+00
>  %349 = fsub float %348, %43
>  %350 = fmul float %346, 2.000000e+00
>  %351 = fsub float %350, %44
>  %352 = fmul float %347, 2.000000e+00
>  %353 = fsub float %352, %45
>  %354 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %355 = load <16 x i8>, <16 x i8> addrspace(2)* %354, align 16, !invariant.load !0
>  %356 = call float @llvm.SI.load.const(<16 x i8> %355, i32 356)
>  %357 = fsub float 1.000000e+00, %356
>  %358 = fmul float %357, 6.000000e+00
>  %359 = call float @llvm.SI.load.const(<16 x i8> %355, i32 320)
>  %360 = call float @llvm.SI.load.const(<16 x i8> %355, i32 324)
>  %361 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %362 = load <16 x i8>, <16 x i8> addrspace(2)* %361, align 16, !invariant.load !0
>  %363 = call float @llvm.SI.load.const(<16 x i8> %362, i32 328)
>  %364 = fmul float %359, 0x3FD55553E0000000
>  %365 = fmul float %360, 0x3FD55553E0000000
>  %366 = fadd float %365, %364
>  %367 = fmul float %363, 0x3FD55553E0000000
>  %368 = fadd float %366, %367
>  %369 = fsub float 1.000000e+00, %368
>  %370 = call float @llvm.AMDGPU.clamp.(float %369, float 0.000000e+00, float 1.000000e+00)
>  %371 = fmul float %336, %339
>  %372 = fmul float %337, %339
>  %373 = fmul float %338, %339
>  %374 = fmul float %371, 4.000000e+00
>  %375 = fmul float %372, 4.000000e+00
>  %376 = fmul float %373, 4.000000e+00
>  %377 = fmul float %370, %374
>  %378 = fmul float %370, %375
>  %379 = fmul float %370, %376
>  %380 = fsub float 1.000000e+00, %368
>  %381 = call float @llvm.AMDGPU.clamp.(float %380, float 0.000000e+00, float 1.000000e+00)
>  %382 = fmul float %307, %381
>  %383 = fmul float %308, %381
>  %384 = fmul float %309, %381
>  %385 = fmul float %377, %193
>  %386 = fadd float %385, %382
>  %387 = fmul float %378, %193
>  %388 = fadd float %387, %383
>  %389 = fmul float %379, %193
>  %390 = fadd float %389, %384
>  %391 = fmul float %43, %60
>  %392 = fmul float %44, %62
>  %393 = fadd float %392, %391
>  %394 = fmul float %45, %64
>  %395 = fadd float %393, %394
>  %396 = call float @llvm.AMDGPU.clamp.(float %395, float 0.000000e+00, float 1.000000e+00)
>  %397 = fsub float 1.000000e+00, %396
>  %398 = call float @llvm.pow.f32(float %397, float 5.000000e+00)
>  %399 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %400 = load <16 x i8>, <16 x i8> addrspace(2)* %399, align 16, !invariant.load !0
>  %401 = call float @llvm.SI.load.const(<16 x i8> %400, i32 356)
>  %402 = call float @llvm.SI.load.const(<16 x i8> %400, i32 320)
>  %403 = call float @llvm.maxnum.f32(float %401, float %402)
>  %404 = call float @llvm.SI.load.const(<16 x i8> %400, i32 356)
>  %405 = call float @llvm.SI.load.const(<16 x i8> %400, i32 324)
>  %406 = call float @llvm.maxnum.f32(float %404, float %405)
>  %407 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %408 = load <16 x i8>, <16 x i8> addrspace(2)* %407, align 16, !invariant.load !0
>  %409 = call float @llvm.SI.load.const(<16 x i8> %408, i32 356)
>  %410 = call float @llvm.SI.load.const(<16 x i8> %408, i32 328)
>  %411 = call float @llvm.maxnum.f32(float %409, float %410)
>  %412 = call float @llvm.SI.load.const(<16 x i8> %408, i32 320)
>  %413 = fsub float %403, %412
>  %414 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %415 = load <16 x i8>, <16 x i8> addrspace(2)* %414, align 16, !invariant.load !0
>  %416 = call float @llvm.SI.load.const(<16 x i8> %415, i32 324)
>  %417 = fsub float %406, %416
>  %418 = call float @llvm.SI.load.const(<16 x i8> %415, i32 328)
>  %419 = fsub float %411, %418
>  %420 = call float @llvm.SI.load.const(<16 x i8> %415, i32 320)
>  %421 = fmul float %398, %413
>  %422 = fadd float %421, %420
>  %423 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %424 = load <16 x i8>, <16 x i8> addrspace(2)* %423, align 16, !invariant.load !0
>  %425 = call float @llvm.SI.load.const(<16 x i8> %424, i32 324)
>  %426 = fmul float %398, %417
>  %427 = fadd float %426, %425
>  %428 = call float @llvm.SI.load.const(<16 x i8> %424, i32 328)
>  %429 = fmul float %398, %419
>  %430 = fadd float %429, %428
>  %431 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %432 = load <8 x i32>, <8 x i32> addrspace(2)* %431, align 32, !invariant.load !0
>  %433 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %434 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %433, i64 0, i64 11, !amdgpu.uniform !0
>  %435 = load <4 x i32>, <4 x i32> addrspace(2)* %434, align 16, !invariant.load !0
>  %436 = extractelement <8 x i32> %432, i32 7
>  %437 = extractelement <4 x i32> %435, i32 0
>  %438 = and i32 %437, %436
>  %439 = insertelement <4 x i32> %435, i32 %438, i32 0
>  %440 = call float @llvm.amdgcn.cubetc(float %349, float %351, float %353)
>  %441 = call float @llvm.amdgcn.cubesc(float %349, float %351, float %353)
>  %442 = call float @llvm.amdgcn.cubema(float %349, float %351, float %353)
>  %443 = call float @llvm.amdgcn.cubeid(float %349, float %351, float %353)
>  %444 = call float @llvm.fabs.f32(float %442)
>  %445 = fdiv float 1.000000e+00, %444, !fpmath !1
>  %446 = fmul float %440, %445
>  %447 = fadd float %446, 1.500000e+00
>  %448 = fmul float %441, %445
>  %449 = fadd float %448, 1.500000e+00
>  %450 = bitcast float %449 to i32
>  %451 = bitcast float %447 to i32
>  %452 = bitcast float %443 to i32
>  %453 = bitcast float %358 to i32
>  %454 = insertelement <4 x i32> undef, i32 %450, i32 0
>  %455 = insertelement <4 x i32> %454, i32 %451, i32 1
>  %456 = insertelement <4 x i32> %455, i32 %452, i32 2
>  %457 = insertelement <4 x i32> %456, i32 %453, i32 3
>  %458 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %457, <8 x i32> %432, <4 x i32> %439, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %459 = extractelement <4 x float> %458, i32 0
>  %460 = extractelement <4 x float> %458, i32 1
>  %461 = extractelement <4 x float> %458, i32 2
>  %462 = fmul float %272, %252
>  %463 = fmul float %273, %256
>  %464 = fadd float %463, %462
>  %465 = fmul float %274, %258
>  %466 = fadd float %464, %465
>  %467 = call float @llvm.AMDGPU.clamp.(float %466, float 0.000000e+00, float 1.000000e+00)
>  %468 = fsub float 1.000000e+00, %467
>  %469 = call float @llvm.pow.f32(float %468, float 5.000000e+00)
>  %470 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %471 = load <16 x i8>, <16 x i8> addrspace(2)* %470, align 16, !invariant.load !0
>  %472 = call float @llvm.SI.load.const(<16 x i8> %471, i32 320)
>  %473 = fsub float 1.000000e+00, %472
>  %474 = call float @llvm.SI.load.const(<16 x i8> %471, i32 324)
>  %475 = fsub float 1.000000e+00, %474
>  %476 = call float @llvm.SI.load.const(<16 x i8> %471, i32 328)
>  %477 = fsub float 1.000000e+00, %476
>  %478 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %479 = load <16 x i8>, <16 x i8> addrspace(2)* %478, align 16, !invariant.load !0
>  %480 = call float @llvm.SI.load.const(<16 x i8> %479, i32 320)
>  %481 = fmul float %469, %473
>  %482 = fadd float %481, %480
>  %483 = call float @llvm.SI.load.const(<16 x i8> %479, i32 324)
>  %484 = fmul float %469, %475
>  %485 = fadd float %484, %483
>  %486 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %487 = load <16 x i8>, <16 x i8> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = call float @llvm.SI.load.const(<16 x i8> %487, i32 328)
>  %489 = fmul float %469, %477
>  %490 = fadd float %489, %488
>  %491 = fmul float %307, %482
>  %492 = fmul float %308, %485
>  %493 = fmul float %309, %490
>  %494 = fadd float %250, 2.000000e+00
>  %495 = fmul float %494, 2.500000e-01
>  %496 = fmul float %250, -5.000000e-01
>  %497 = call float @llvm.exp2.f32(float %496)
>  %498 = fsub float 2.000000e+00, %497
>  %499 = fdiv float 1.000000e+00, %498, !fpmath !1
>  %500 = fmul float %495, %499
>  %501 = fmul float %491, %500
>  %502 = fmul float %492, %500
>  %503 = fmul float %493, %500
>  %504 = fmul float %60, %272
>  %505 = fmul float %62, %273
>  %506 = fadd float %505, %504
>  %507 = fmul float %64, %274
>  %508 = fadd float %506, %507
>  %509 = call float @llvm.AMDGPU.clamp.(float %508, float 0.000000e+00, float 1.000000e+00)
>  %510 = call float @llvm.pow.f32(float %509, float %250)
>  %511 = fmul float %501, %510
>  %512 = fmul float %502, %510
>  %513 = fmul float %503, %510
>  %514 = fmul float %43, %60
>  %515 = fmul float %44, %62
>  %516 = fadd float %515, %514
>  %517 = fmul float %45, %64
>  %518 = fadd float %516, %517
>  %519 = call float @llvm.AMDGPU.clamp.(float %518, float 0.000000e+00, float 1.000000e+00)
>  %520 = call float @llvm.maxnum.f32(float %280, float %519)
>  %521 = fadd float %520, 0x3EE4F8B580000000
>  %522 = fdiv float 1.000000e+00, %521, !fpmath !1
>  %523 = fmul float %511, %522
>  %524 = fmul float %512, %522
>  %525 = fmul float %513, %522
>  %526 = fmul float %422, %459
>  %527 = fadd float %526, %523
>  %528 = fmul float %427, %460
>  %529 = fadd float %528, %524
>  %530 = fmul float %430, %461
>  %531 = fadd float %530, %525
>  %532 = fmul float %527, %195
>  %533 = fmul float %529, %195
>  %534 = fmul float %531, %195
>  %535 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %536 = load <16 x i8>, <16 x i8> addrspace(2)* %535, align 16
>  %537 = fadd float %250, 2.000000e+00
>  %538 = fmul float %537, 2.500000e-01
>  %539 = fmul float %250, -5.000000e-01
>  %540 = fmul float %43, %60
>  %541 = fmul float %44, %62
>  %542 = fadd float %541, %540
>  %543 = fmul float %45, %64
>  %544 = fadd float %542, %543
>  br label %loop131
>
>loop131:                                          ; preds = %endif135, %main_body
>  %.012 = phi float [ %390, %main_body ], [ %637, %endif135 ]
>  %.011 = phi float [ %388, %main_body ], [ %635, %endif135 ]
>  %.010 = phi float [ %386, %main_body ], [ %633, %endif135 ]
>  %545 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %546 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %547 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %548 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %549 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %.08 = phi float [ %534, %main_body ], [ %693, %endif135 ]
>  %.07 = phi float [ %533, %main_body ], [ %691, %endif135 ]
>  %.0 = phi float [ %532, %main_body ], [ %689, %endif135 ]
>  %550 = icmp sgt i32 %545, 2
>  br i1 %550, label %endloop191, label %endif135
>
>endif135:                                         ; preds = %loop131
>  %551 = shl i32 %546, 5
>  %552 = shl i32 %546, 5
>  %553 = add i32 %552, 176
>  %554 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %553)
>  %555 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %556 = fsub float %554, %555
>  %557 = shl i32 %546, 5
>  %558 = add i32 %557, 180
>  %559 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %558)
>  %560 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %561 = fsub float %559, %560
>  %562 = add i32 %551, 184
>  %563 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %562)
>  %564 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %565 = fsub float %563, %564
>  %566 = fmul float %556, %556
>  %567 = fmul float %561, %561
>  %568 = fadd float %567, %566
>  %569 = fmul float %565, %565
>  %570 = fadd float %568, %569
>  %571 = call float @llvm.sqrt.f32(float %570)
>  %572 = fdiv float 1.000000e+00, %571, !fpmath !1
>  %573 = fmul float %556, %572
>  %574 = fmul float %561, %572
>  %575 = fmul float %565, %572
>  %576 = fadd float %573, %43
>  %577 = fadd float %574, %44
>  %578 = fadd float %575, %45
>  %579 = fmul float %576, 5.000000e-01
>  %580 = fmul float %577, 5.000000e-01
>  %581 = fmul float %578, 5.000000e-01
>  %582 = fmul float %579, %579
>  %583 = fmul float %580, %580
>  %584 = fadd float %583, %582
>  %585 = fmul float %581, %581
>  %586 = fadd float %584, %585
>  %587 = call float @llvm.sqrt.f32(float %586)
>  %588 = fdiv float 1.000000e+00, %587, !fpmath !1
>  %589 = fmul float %579, %588
>  %590 = fmul float %580, %588
>  %591 = fmul float %581, %588
>  %592 = fmul float %573, %60
>  %593 = fmul float %574, %62
>  %594 = fadd float %593, %592
>  %595 = fmul float %575, %64
>  %596 = fadd float %594, %595
>  %597 = call float @llvm.AMDGPU.clamp.(float %596, float 0.000000e+00, float 1.000000e+00)
>  %598 = shl i32 %547, 1
>  %599 = or i32 %598, 1
>  %600 = fmul float %570, %572
>  %601 = shl i32 %548, 5
>  %602 = add i32 %601, 188
>  %603 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %602)
>  %604 = fmul float %600, %603
>  %605 = call float @llvm.AMDGPU.clamp.(float %604, float 0.000000e+00, float 1.000000e+00)
>  %606 = fsub float 1.000000e+00, %605
>  %607 = shl i32 %599, 4
>  %608 = add i32 %607, 176
>  %609 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %608)
>  %610 = fmul float %609, %606
>  %611 = shl i32 %599, 4
>  %612 = add i32 %611, 180
>  %613 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %612)
>  %614 = fmul float %613, %606
>  %615 = shl i32 %599, 4
>  %616 = add i32 %615, 184
>  %617 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %616)
>  %618 = fmul float %617, %606
>  %619 = fmul float %597, %610
>  %620 = fmul float %597, %614
>  %621 = fmul float %597, %618
>  %622 = call float @llvm.SI.load.const(<16 x i8> %536, i32 320)
>  %623 = call float @llvm.SI.load.const(<16 x i8> %536, i32 324)
>  %624 = call float @llvm.SI.load.const(<16 x i8> %536, i32 328)
>  %625 = fmul float %622, 0x3FD55553E0000000
>  %626 = fmul float %623, 0x3FD55553E0000000
>  %627 = fadd float %626, %625
>  %628 = fmul float %624, 0x3FD55553E0000000
>  %629 = fadd float %627, %628
>  %630 = fsub float 1.000000e+00, %629
>  %631 = call float @llvm.AMDGPU.clamp.(float %630, float 0.000000e+00, float 1.000000e+00)
>  %632 = fmul float %619, %631
>  %633 = fadd float %632, %.010
>  %634 = fmul float %620, %631
>  %635 = fadd float %634, %.011
>  %636 = fmul float %621, %631
>  %637 = fadd float %636, %.012
>  %638 = fmul float %573, %589
>  %639 = fmul float %574, %590
>  %640 = fadd float %639, %638
>  %641 = fmul float %575, %591
>  %642 = fadd float %640, %641
>  %643 = call float @llvm.AMDGPU.clamp.(float %642, float 0.000000e+00, float 1.000000e+00)
>  %644 = fsub float 1.000000e+00, %643
>  %645 = call float @llvm.pow.f32(float %644, float 5.000000e+00)
>  %646 = call float @llvm.SI.load.const(<16 x i8> %536, i32 320)
>  %647 = fsub float 1.000000e+00, %646
>  %648 = call float @llvm.SI.load.const(<16 x i8> %536, i32 324)
>  %649 = fsub float 1.000000e+00, %648
>  %650 = call float @llvm.SI.load.const(<16 x i8> %536, i32 328)
>  %651 = fsub float 1.000000e+00, %650
>  %652 = call float @llvm.SI.load.const(<16 x i8> %536, i32 320)
>  %653 = fmul float %645, %647
>  %654 = fadd float %653, %652
>  %655 = call float @llvm.SI.load.const(<16 x i8> %536, i32 324)
>  %656 = fmul float %645, %649
>  %657 = fadd float %656, %655
>  %658 = call float @llvm.SI.load.const(<16 x i8> %536, i32 328)
>  %659 = fmul float %645, %651
>  %660 = fadd float %659, %658
>  %661 = fmul float %619, %654
>  %662 = fmul float %620, %657
>  %663 = fmul float %621, %660
>  %664 = call float @llvm.exp2.f32(float %539)
>  %665 = fsub float 2.000000e+00, %664
>  %666 = fdiv float 1.000000e+00, %665, !fpmath !1
>  %667 = fmul float %538, %666
>  %668 = fmul float %661, %667
>  %669 = fmul float %662, %667
>  %670 = fmul float %663, %667
>  %671 = fmul float %60, %589
>  %672 = fmul float %62, %590
>  %673 = fadd float %672, %671
>  %674 = fmul float %64, %591
>  %675 = fadd float %673, %674
>  %676 = call float @llvm.AMDGPU.clamp.(float %675, float 0.000000e+00, float 1.000000e+00)
>  %677 = call float @llvm.pow.f32(float %676, float %250)
>  %678 = fmul float %668, %677
>  %679 = fmul float %669, %677
>  %680 = fmul float %670, %677
>  %681 = call float @llvm.AMDGPU.clamp.(float %544, float 0.000000e+00, float 1.000000e+00)
>  %682 = call float @llvm.maxnum.f32(float %597, float %681)
>  %683 = fadd float %682, 0x3EE4F8B580000000
>  %684 = fdiv float 1.000000e+00, %683, !fpmath !1
>  %685 = fmul float %678, %684
>  %686 = fmul float %679, %684
>  %687 = fmul float %680, %684
>  %688 = fmul float %685, %98
>  %689 = fadd float %688, %.0
>  %690 = fmul float %686, %98
>  %691 = fadd float %690, %.07
>  %692 = fmul float %687, %98
>  %693 = fadd float %692, %.08
>  %694 = add i32 %549, 1
>  br label %loop131
>
>endloop191:                                       ; preds = %loop131
>  %695 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %696 = load <16 x i8>, <16 x i8> addrspace(2)* %695, align 16, !invariant.load !0
>  %697 = call float @llvm.SI.load.const(<16 x i8> %696, i32 336)
>  %698 = fmul float %.010, %697
>  %699 = fadd float %698, %.0
>  %700 = call float @llvm.SI.load.const(<16 x i8> %696, i32 340)
>  %701 = fmul float %.011, %700
>  %702 = fadd float %701, %.07
>  %703 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %704 = load <16 x i8>, <16 x i8> addrspace(2)* %703, align 16, !invariant.load !0
>  %705 = call float @llvm.SI.load.const(<16 x i8> %704, i32 344)
>  %706 = fmul float %.012, %705
>  %707 = fadd float %706, %.08
>  %708 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %709 = call float @llvm.SI.load.const(<16 x i8> %704, i32 12)
>  %710 = fsub float %708, %709
>  %711 = call float @llvm.maxnum.f32(float %710, float 0.000000e+00)
>  %712 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %713 = load <16 x i8>, <16 x i8> addrspace(2)* %712, align 16, !invariant.load !0
>  %714 = call float @llvm.SI.load.const(<16 x i8> %713, i32 28)
>  %715 = call float @llvm.SI.load.const(<16 x i8> %713, i32 12)
>  %716 = fsub float %714, %715
>  %717 = fadd float %716, 0x3F50624DE0000000
>  %718 = fdiv float 1.000000e+00, %717, !fpmath !1
>  %719 = fmul float %711, %718
>  %720 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %721 = load <16 x i8>, <16 x i8> addrspace(2)* %720, align 16, !invariant.load !0
>  %722 = call float @llvm.SI.load.const(<16 x i8> %721, i32 28)
>  %723 = call float @llvm.floor.f32(float %722)
>  %724 = fsub float %722, %723
>  %725 = fmul float %724, 8.000000e+00
>  %726 = call float @llvm.pow.f32(float %719, float %725)
>  %727 = call float @llvm.AMDGPU.clamp.(float %726, float 0.000000e+00, float 1.000000e+00)
>  %728 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %729 = fmul float %728, %727
>  %730 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %731 = load <16 x i8>, <16 x i8> addrspace(2)* %730, align 16, !invariant.load !0
>  %732 = call float @llvm.SI.load.const(<16 x i8> %731, i32 32)
>  %733 = fsub float 1.000000e+00, %729
>  %734 = fmul float %699, %729
>  %735 = fmul float %732, %733
>  %736 = fadd float %734, %735
>  %737 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %738 = load <16 x i8>, <16 x i8> addrspace(2)* %737, align 16, !invariant.load !0
>  %739 = call float @llvm.SI.load.const(<16 x i8> %738, i32 36)
>  %740 = fsub float 1.000000e+00, %729
>  %741 = fmul float %702, %729
>  %742 = fmul float %739, %740
>  %743 = fadd float %741, %742
>  %744 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %745 = load <16 x i8>, <16 x i8> addrspace(2)* %744, align 16, !invariant.load !0
>  %746 = call float @llvm.SI.load.const(<16 x i8> %745, i32 40)
>  %747 = fsub float 1.000000e+00, %729
>  %748 = fmul float %707, %729
>  %749 = fmul float %746, %747
>  %750 = fadd float %748, %749
>  %751 = bitcast float %5 to i32
>  %752 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %751, 10
>  %753 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %752, float %736, 11
>  %754 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %753, float %743, 12
>  %755 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %754, float %750, 13
>  %756 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %755, float %67, 14
>  %757 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %756, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %757
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[15:18], v5, s[12:15], 0 idxen ; E00C2000 80030F05
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v12, s4                                   ; 7E180204
>	v_mov_b32_e32 v13, s5                                   ; 7E1A0205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v3, s4                                    ; 7E060204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v20, s7, v12                              ; 08281807
>	v_mov_b32_e32 v4, s8                                    ; 7E080208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v5, s4                                    ; 7E0A0204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v21, s6, v13                              ; 082A1A06
>	v_mov_b32_e32 v7, s7                                    ; 7E0E0207
>	v_mov_b32_e32 v18, s8                                   ; 7E240208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v19, s4                                   ; 7E260204
>	v_sub_f32_e32 v22, s5, v14                              ; 082C1C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[27:30], v7, s[4:7], 0 idxen   ; E00C2000 80011B07
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v27                               ; 7E00111B
>	v_mul_lo_i32 v19, v0, 48                                ; D2D60013 00016100
>	v_add_i32_e32 v0, vcc, s14, v19                         ; 4A00260E
>	v_add_i32_e32 v4, vcc, s13, v19                         ; 4A08260D
>	v_add_i32_e32 v5, vcc, s15, v19                         ; 4A0A260F
>	v_add_i32_e32 v1, vcc, s12, v19                         ; 4A02260C
>	buffer_load_dword v3, v0, s[0:3], 0 offen               ; E0301000 80000300
>	buffer_load_dword v0, v4, s[0:3], 0 offen               ; E0301000 80000004
>	buffer_load_dword v4, v5, s[0:3], 0 offen               ; E0301000 80000405
>	buffer_load_dword v1, v1, s[0:3], 0 offen               ; E0301000 80000101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v12, v4                           ; 0A28090C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0x8c, v19                        ; 4A0A26FF 0000008C
>	v_add_i32_e32 v21, vcc, 0x9c, v19                       ; 4A2A26FF 0000009C
>	v_add_i32_e32 v6, vcc, 0x84, v19                        ; 4A0C26FF 00000084
>	v_add_i32_e32 v7, vcc, 0x88, v19                        ; 4A0E26FF 00000088
>	v_add_i32_e32 v4, vcc, 0x80, v19                        ; 4A0826FF 00000080
>	v_add_i32_e32 v18, vcc, 0x94, v19                       ; 4A2426FF 00000094
>	buffer_load_dword v22, v5, s[0:3], 0 offen              ; E0301000 80001605
>	buffer_load_dword v5, v6, s[0:3], 0 offen               ; E0301000 80000506
>	buffer_load_dword v6, v7, s[0:3], 0 offen               ; E0301000 80000607
>	v_add_i32_e32 v7, vcc, 0x90, v19                        ; 4A0E26FF 00000090
>	v_add_i32_e32 v19, vcc, 0x98, v19                       ; 4A2626FF 00000098
>	buffer_load_dword v23, v21, s[0:3], 0 offen             ; E0301000 80001715
>	buffer_load_dword v4, v4, s[0:3], 0 offen               ; E0301000 80000404
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v21, v13, v22                          ; 0A2A2D0D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v22, v14, v23                          ; 0A2C2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v4, v28                               ; 7E08111C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[23:26], v6, s[4:7], 0 idxen   ; E00C2000 80011706
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	v_add_i32_e32 v5, vcc, s10, v19                         ; 4A0A260A
>	v_add_i32_e32 v6, vcc, s9, v19                          ; 4A0C2609
>	v_add_i32_e32 v7, vcc, s8, v19                          ; 4A0E2608
>	v_add_i32_e32 v18, vcc, s4, v19                         ; 4A242604
>	v_mul_lo_i32 v27, v4, 48                                ; D2D6001B 00016104
>	v_add_i32_e32 v4, vcc, s11, v19                         ; 4A08260B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v22, vcc, s6, v19                         ; 4A2C2606
>	buffer_load_dword v21, v4, s[0:3], 0 offen              ; E0301000 80001504
>	v_add_i32_e32 v4, vcc, s7, v19                          ; 4A082607
>	v_add_i32_e32 v19, vcc, s5, v19                         ; 4A262605
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	buffer_load_dword v28, v4, s[0:3], 0 offen              ; E0301000 80001C04
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v3, v23, v3                               ; 10060717
>	v_mul_f32_e32 v1, v23, v1                               ; 10020317
>	v_mul_f32_e32 v0, v23, v0                               ; 10000117
>	v_mul_f32_e32 v20, v23, v20                             ; 10282917
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v31, v14, v18                          ; 0A3E250E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v4, v23, v5                               ; 10080B17
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v5, v23, v6                               ; 100A0D17
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v6, v23, v7                               ; 100C0F17
>	v_subrev_f32_e32 v7, v13, v21                           ; 0A0E2B0D
>	v_mul_f32_e32 v21, v23, v7                              ; 102A0F17
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v18, v23, v22                             ; 10242D17
>	v_mul_f32_e32 v7, v23, v28                              ; 100E3917
>	v_mul_f32_e32 v19, v23, v19                             ; 10262717
>	v_mul_f32_e32 v22, v23, v31                             ; 102C3F17
>	v_add_i32_e32 v23, vcc, s15, v27                        ; 4A2E360F
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v12, v23                          ; 0A2E2F0C
>	v_mac_f32_e32 v20, v24, v23                             ; 3E282F18
>	v_add_i32_e32 v23, vcc, s11, v27                        ; 4A2E360B
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v13, v23                          ; 0A2E2F0D
>	v_mac_f32_e32 v21, v24, v23                             ; 3E2A2F18
>	v_add_i32_e32 v23, vcc, s14, v27                        ; 4A2E360E
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v24, v23                              ; 3E062F18
>	v_add_i32_e32 v23, vcc, s12, v27                        ; 4A2E360C
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v24, v23                              ; 3E022F18
>	v_add_i32_e32 v23, vcc, s13, v27                        ; 4A2E360D
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v24, v23                              ; 3E002F18
>	v_add_i32_e32 v23, vcc, s10, v27                        ; 4A2E360A
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v24, v23                              ; 3E082F18
>	v_add_i32_e32 v23, vcc, s9, v27                         ; 4A2E3609
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v24, v23                              ; 3E0A2F18
>	v_add_i32_e32 v23, vcc, s8, v27                         ; 4A2E3608
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v24, v23                              ; 3E0C2F18
>	v_add_i32_e32 v23, vcc, s7, v27                         ; 4A2E3607
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v24, v23                              ; 3E0E2F18
>	v_add_i32_e32 v23, vcc, s6, v27                         ; 4A2E3606
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v24, v23                             ; 3E242F18
>	v_add_i32_e32 v23, vcc, s5, v27                         ; 4A2E3605
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v24, v23                             ; 3E262F18
>	v_add_i32_e32 v23, vcc, s4, v27                         ; 4A2E3604
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	v_mac_f32_e32 v22, v24, v23                             ; 3E2C2F18
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v29                              ; 7E2E111D
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0x70, v23                       ; 4A302EFF 00000070
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v25, v24                              ; 3E063119
>	v_add_i32_e32 v24, vcc, 0x7c, v23                       ; 4A302EFF 0000007C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v12, v24                          ; 0A30310C
>	v_mac_f32_e32 v20, v25, v24                             ; 3E283119
>	v_add_i32_e32 v24, vcc, s11, v23                        ; 4A302E0B
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v13, v24                          ; 0A30310D
>	v_mac_f32_e32 v21, v25, v24                             ; 3E2A3119
>	v_add_i32_e32 v24, vcc, 0x74, v23                       ; 4A302EFF 00000074
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v25, v24                              ; 3E023119
>	v_add_i32_e32 v24, vcc, 0x78, v23                       ; 4A302EFF 00000078
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v25, v24                              ; 3E003119
>	v_add_i32_e32 v24, vcc, s10, v23                        ; 4A302E0A
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v25, v24                              ; 3E083119
>	v_add_i32_e32 v24, vcc, s9, v23                         ; 4A302E09
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v25, v24                              ; 3E0A3119
>	v_add_i32_e32 v24, vcc, s8, v23                         ; 4A302E08
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v25, v24                              ; 3E0C3119
>	v_add_i32_e32 v24, vcc, s7, v23                         ; 4A302E07
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v25, v24                              ; 3E0E3119
>	v_add_i32_e32 v24, vcc, s6, v23                         ; 4A302E06
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v25, v24                             ; 3E243119
>	v_add_i32_e32 v24, vcc, s5, v23                         ; 4A302E05
>	v_add_i32_e32 v23, vcc, s4, v23                         ; 4A2E2E04
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v25, v24                             ; 3E263119
>	v_mac_f32_e32 v22, v25, v23                             ; 3E2C2F19
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v30                              ; 7E2E111E
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0x70, v23                       ; 4A302EFF 00000070
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v24                              ; 3E06311A
>	v_add_i32_e32 v24, vcc, 0x7c, v23                       ; 4A302EFF 0000007C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v12, v24                          ; 0A30310C
>	v_mac_f32_e32 v20, v26, v24                             ; 3E28311A
>	v_add_i32_e32 v24, vcc, 0x8c, v23                       ; 4A302EFF 0000008C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v13, v24                          ; 0A30310D
>	v_mac_f32_e32 v21, v26, v24                             ; 3E2A311A
>	v_add_i32_e32 v24, vcc, 0x74, v23                       ; 4A302EFF 00000074
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v24                              ; 3E02311A
>	v_add_i32_e32 v24, vcc, 0x78, v23                       ; 4A302EFF 00000078
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v24                              ; 3E00311A
>	v_add_i32_e32 v24, vcc, 0x80, v23                       ; 4A302EFF 00000080
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v24                              ; 3E08311A
>	v_add_i32_e32 v24, vcc, 0x84, v23                       ; 4A302EFF 00000084
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v24                              ; 3E0A311A
>	v_add_i32_e32 v24, vcc, 0x88, v23                       ; 4A302EFF 00000088
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v24                              ; 3E0C311A
>	v_add_i32_e32 v24, vcc, 0x90, v23                       ; 4A302EFF 00000090
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v24                              ; 3E0E311A
>	v_add_i32_e32 v24, vcc, 0x94, v23                       ; 4A302EFF 00000094
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v26, v24                             ; 3E24311A
>	v_add_i32_e32 v24, vcc, 0x98, v23                       ; 4A302EFF 00000098
>	v_add_i32_e32 v23, vcc, 0x9c, v23                       ; 4A2E2EFF 0000009C
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v26, v24                             ; 3E26311A
>	v_mac_f32_e32 v22, v26, v23                             ; 3E2C2F1A
>	v_mul_f32_e32 v23, v1, v9                               ; 102E1301
>	v_mac_f32_e32 v23, v3, v8                               ; 3E2E1103
>	v_mac_f32_e32 v23, v0, v10                              ; 3E2E1500
>	v_mac_f32_e32 v23, v20, v11                             ; 3E2E1714
>	v_mul_f32_e32 v20, v5, v9                               ; 10281305
>	v_mac_f32_e32 v20, v4, v8                               ; 3E281104
>	v_mac_f32_e32 v20, v6, v10                              ; 3E281506
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v20, v21, v11                             ; 3E281715
>	v_mul_f32_e32 v21, v18, v9                              ; 102A1312
>	v_mul_f32_e32 v9, 0, v9                                 ; 10121280
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	v_mac_f32_e32 v21, v7, v8                               ; 3E2A1107
>	v_mac_f32_e32 v9, 0, v8                                 ; 3E121080
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	v_mac_f32_e32 v21, v19, v10                             ; 3E2A1513
>	v_mac_f32_e32 v9, 0, v10                                ; 3E121480
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	s_buffer_load_dword s20, s[0:3], 0x14                   ; C20A0114
>	v_add_f32_e32 v8, v11, v9                               ; 0610130B
>	v_mac_f32_e32 v21, v22, v11                             ; 3E2A1716
>	v_add_f32_e32 v9, v12, v23                              ; 06122F0C
>	s_buffer_load_dword s21, s[0:3], 0x15                   ; C20A8115
>	v_add_f32_e32 v10, v13, v20                             ; 0614290D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v12, s4, v9                               ; 10181204
>	v_mul_f32_e32 v13, s5, v9                               ; 101A1205
>	v_mul_f32_e32 v20, s7, v9                               ; 10281207
>	v_add_f32_e32 v11, v14, v21                             ; 06162B0E
>	v_mul_f32_e32 v14, s6, v9                               ; 101C1206
>	v_mac_f32_e32 v12, s8, v10                              ; 3E181408
>	v_mac_f32_e32 v13, s9, v10                              ; 3E1A1409
>	v_mac_f32_e32 v14, s10, v10                             ; 3E1C140A
>	v_mac_f32_e32 v20, s11, v10                             ; 3E28140B
>	v_mac_f32_e32 v12, s12, v11                             ; 3E18160C
>	v_mac_f32_e32 v13, s13, v11                             ; 3E1A160D
>	v_mac_f32_e32 v14, s14, v11                             ; 3E1C160E
>	v_mac_f32_e32 v20, s15, v11                             ; 3E28160F
>	v_mac_f32_e32 v12, s16, v8                              ; 3E181010
>	v_mac_f32_e32 v13, s17, v8                              ; 3E1A1011
>	v_mac_f32_e32 v14, s18, v8                              ; 3E1C1012
>	v_mac_f32_e32 v20, s19, v8                              ; 3E281013
>	v_mov_b32_e32 v8, s20                                   ; 7E100214
>	v_mac_f32_e32 v8, s21, v14                              ; 3E101C15
>	v_add_f32_e64 v8, v8, 0 clamp                           ; D2060808 00010108
>	s_buffer_load_dword s22, s[0:3], 0x16                   ; C20B0116
>	s_buffer_load_dword s23, s[0:3], 0x17                   ; C20B8117
>	v_log_f32_e32 v8, v8                                    ; 7E104F08
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v8, s22, v8                        ; 0E101016
>	v_mad_f32 v3, v15, v3, -v3                              ; D2820003 840E070F
>	v_mac_f32_e32 v3, v1, v16                               ; 3E062101
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_exp_f32_e32 v8, v8                                    ; 7E104B08
>	v_sub_f32_e64 v21, 1.0, s23                             ; D2080015 00002EF2
>	v_mad_f32 v1, v15, v4, -v4                              ; D2820001 8412090F
>	v_mad_f32 v4, v15, v7, -v7                              ; D2820004 841E0F0F
>	v_mac_f32_e32 v3, v0, v17                               ; 3E062300
>	v_mul_f32_e32 v0, s0, v20                               ; 10002800
>	v_mac_f32_e32 v21, s23, v8                              ; 3E2A1017
>	v_mac_f32_e32 v1, v5, v16                               ; 3E022105
>	v_mac_f32_e32 v4, v18, v16                              ; 3E082112
>	v_mul_f32_e32 v5, v21, v21                              ; 100A2B15
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v0                   ; F800020F 000B0A09
>	v_mac_f32_e32 v1, v6, v17                               ; 3E022306
>	v_mac_f32_e32 v4, v19, v17                              ; 3E082313
>	exp 15, 33, 0, 0, 0, v5, v0, v0, v0                     ; F800021F 00000005
>	exp 15, 34, 0, 0, 0, v3, v1, v4, v0                     ; F800022F 00040103
>	exp 15, 12, 0, 1, 0, v12, v13, v14, v20                 ; F80008CF 140E0D0C
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1996 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                          ; BE88047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	v_mov_b32_e32 v0, v2                                            ; 7E000302
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v2, v0, 0, 0, [m0]                              ; C8080000
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	v_interp_p2_f32 v2, [v2], v3, 0, 0, [m0]                        ; C8090003
>	v_interp_p1_f32 v1, v0, 1, 0, [m0]                              ; C8040100
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                        ; C8050103
>	v_interp_p1_f32 v6, v0, 2, 0, [m0]                              ; C8180200
>	v_interp_p2_f32 v6, [v6], v3, 2, 0, [m0]                        ; C8190203
>	v_interp_p1_f32 v10, v4, 0, 2, [m0]                             ; C8280804
>	v_interp_p2_f32 v10, [v10], v5, 0, 2, [m0]                      ; C8290805
>	v_interp_p1_f32 v11, v4, 1, 2, [m0]                             ; C82C0904
>	v_interp_p2_f32 v11, [v11], v5, 1, 2, [m0]                      ; C82D0905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                              ; C8100A04
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                        ; C8110A05
>	v_mul_f32_e32 v5, v10, v10                                      ; 100A150A
>	v_mac_f32_e32 v5, v11, v11                                      ; 3E0A170B
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_mac_f32_e32 v5, v4, v4                                        ; 3E0A0904
>	v_rsq_f32_e32 v12, v5                                           ; 7E185D05
>	s_buffer_load_dword s20, s[0:3], 0x11                           ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                           ; C20A8112
>	s_buffer_load_dword s31, s[0:3], 0x10                           ; C20F8110
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v20, s12, v2                                      ; 0828040C
>	s_buffer_load_dword s22, s[0:3], 0x14                           ; C20B0114
>	s_buffer_load_dword s23, s[0:3], 0x15                           ; C20B8115
>	s_buffer_load_dword s24, s[0:3], 0x16                           ; C20C0116
>	v_sub_f32_e32 v21, s13, v1                                      ; 082A020D
>	v_mul_f32_e32 v7, v20, v20                                      ; 100E2914
>	s_buffer_load_dword s25, s[0:3], 0x18                           ; C20C8118
>	s_buffer_load_dword s26, s[0:3], 0x19                           ; C20D0119
>	s_buffer_load_dword s27, s[0:3], 0x1a                           ; C20D811A
>	v_sub_f32_e32 v22, s14, v6                                      ; 082C0C0E
>	v_mac_f32_e32 v7, v21, v21                                      ; 3E0E2B15
>	v_mul_f32_e32 v5, v12, v10                                      ; 100A150C
>	v_mul_f32_e32 v10, v12, v11                                     ; 1014170C
>	v_mul_f32_e32 v11, v12, v4                                      ; 1016090C
>	v_mov_b32_e32 v12, 0x403b800a                                   ; 7E1802FF 403B800A
>	s_buffer_load_dword s28, s[0:3], 0x1c                           ; C20E011C
>	s_buffer_load_dword s29, s[0:3], 0x1d                           ; C20E811D
>	s_buffer_load_dword s30, s[0:3], 0x1e                           ; C20F011E
>	v_mad_f32 v14, v12, v5, v2                                      ; D282000E 040A0B0C
>	v_mac_f32_e32 v7, v22, v22                                      ; 3E0E2D16
>	v_rsq_f32_e32 v23, v7                                           ; 7E2E5D07
>	v_mad_f32 v15, v12, v10, v1                                     ; D282000F 0406150C
>	v_mul_f32_e32 v16, s31, v14                                     ; 10201C1F
>	v_mul_f32_e32 v17, s20, v14                                     ; 10221C14
>	v_mul_f32_e32 v14, s21, v14                                     ; 101C1C15
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v16, s22, v15                                     ; 3E201E16
>	v_mad_f32 v12, v12, v11, v6                                     ; D282000C 041A170C
>	v_mac_f32_e32 v17, s23, v15                                     ; 3E221E17
>	v_mac_f32_e32 v14, s24, v15                                     ; 3E1C1E18
>	v_mac_f32_e32 v14, s27, v12                                     ; 3E1C181B
>	v_mac_f32_e32 v16, s25, v12                                     ; 3E201819
>	v_mac_f32_e32 v17, s26, v12                                     ; 3E22181A
>	v_add_f32_e32 v15, s28, v16                                     ; 061E201C
>	s_load_dwordx4 s[16:19], s[4:5], 0xc                            ; C088050C
>	v_add_f32_e32 v16, s29, v17                                     ; 0620221D
>	v_add_f32_e32 v14, s30, v14                                     ; 061C1C1E
>	s_load_dwordx8 s[28:35], s[4:5], 0x0                            ; C0CE0500
>	v_mul_f32_e32 v7, v23, v20                                      ; 100E2917
>	v_cubema_f32 v12, v5, v10, v11                                  ; D28E000C 042E1505
>	v_mul_f32_e32 v8, v23, v21                                      ; 10102B17
>	v_mul_f32_e32 v24, v7, v5                                       ; 10300B07
>	v_mul_f32_e32 v9, v23, v22                                      ; 10122D17
>	v_mac_f32_e32 v24, v8, v10                                      ; 3E301508
>	v_rcp_f32_e64 v12, |v12|                                        ; D354010C 0000010C
>	v_mac_f32_e32 v24, v9, v11                                      ; 3E301709
>	v_mul_f32_e32 v25, v5, v24                                      ; 10323105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s16, s16, s35                                         ; 87102310
>	image_sample_c v15, v[14:17], s[28:35], s[16:19] dmask:0x1      ; F0A00100 00870F0E
>	v_mul_f32_e32 v26, v10, v24                                     ; 1034310A
>	v_mac_f32_e32 v25, v5, v24                                      ; 3E323105
>	v_cubetc_f32 v14, v5, v10, v11                                  ; D28C000E 042E1505
>	v_mov_b32_e32 v17, 0x3fc00000                                   ; 7E2202FF 3FC00000
>	v_cubesc_f32 v16, v5, v10, v11                                  ; D28A0010 042E1505
>	v_mul_f32_e32 v27, v11, v24                                     ; 1036310B
>	v_mac_f32_e32 v26, v10, v24                                     ; 3E34310A
>	v_mad_f32 v19, v12, v14, v17                                    ; D2820013 04461D0C
>	v_mad_f32 v18, v12, v16, v17                                    ; D2820012 0446210C
>	v_mad_f32 v12, v20, v23, -v25                                   ; D282000C 84662F14
>	v_mac_f32_e32 v27, v11, v24                                     ; 3E36310B
>	v_mul_f32_e32 v12, v5, v12                                      ; 10181905
>	v_mad_f32 v14, v21, v23, -v26                                   ; D282000E 846A2F15
>	s_buffer_load_dword s40, s[0:3], 0x45                           ; C2140145
>	v_mac_f32_e32 v12, v10, v14                                     ; 3E181D0A
>	v_mad_f32 v14, v22, v23, -v27                                   ; D282000E 846E2F16
>	v_mac_f32_e32 v12, v11, v14                                     ; 3E181D0B
>	v_sub_f32_e32 v14, 1.0, v24                                     ; 081C30F2
>	s_buffer_load_dword s39, s[0:3], 0x44                           ; C2138144
>	s_buffer_load_dword s41, s[0:3], 0x46                           ; C2148146
>	v_add_f32_e32 v12, 1.0, v12                                     ; 061818F2
>	v_add_f32_e64 v14, v14, 0 clamp                                 ; D206080E 0001010E
>	v_subrev_f32_e32 v12, v14, v12                                  ; 0A18190E
>	s_buffer_load_dword s42, s[0:3], 0x47                           ; C2150147
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	v_sub_f32_e32 v14, 1.0, v12                                     ; 081C18F2
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v16, s40, v10                                     ; 10201428
>	v_mac_f32_e32 v16, s39, v5                                      ; 3E200A27
>	v_mad_f32 v30, -v21, v23, v26                                   ; D282001E 246A2F15
>	v_mad_f32 v12, -v12, v14, v14                                   ; D282000C 243A1D0C
>	v_mul_f32_e32 v14, v10, v10                                     ; 101C150A
>	s_buffer_load_dword s15, s[0:3], 0x49                           ; C2078149
>	v_mad_f32 v25, -v20, v23, v25                                   ; D2820019 24662F14
>	v_mul_f32_e32 v26, s40, v30                                     ; 10343C28
>	s_buffer_load_dword s14, s[0:3], 0x48                           ; C2070148
>	v_mad_f32 v14, v5, v5, -v14                                     ; D282000E 843A0B05
>	v_mac_f32_e32 v16, s41, v11                                     ; 3E201629
>	v_mac_f32_e32 v16, s42, v14                                     ; 3E201C2A
>	v_mul_f32_e32 v14, v30, v30                                     ; 101C3D1E
>	v_mad_f32 v31, -v22, v23, v27                                   ; D282001F 246E2F16
>	v_mac_f32_e32 v26, s39, v25                                     ; 3E343227
>	s_buffer_load_dword s36, s[0:3], 0x4a                           ; C212014A
>	s_buffer_load_dword s37, s[0:3], 0x4b                           ; C212814B
>	v_mad_f32 v14, v25, v25, -v14                                   ; D282000E 843A3319
>	v_mac_f32_e32 v26, s41, v31                                     ; 3E343E29
>	v_mac_f32_e32 v26, s42, v14                                     ; 3E341C2A
>	v_mul_f32_e32 v14, v11, v10                                     ; 101C150B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s15, v14                                     ; 101C1C0F
>	v_mul_f32_e32 v27, v10, v5                                      ; 10360B0A
>	v_mac_f32_e32 v14, s14, v27                                     ; 3E1C360E
>	v_mul_f32_e32 v27, v5, v11                                      ; 10361705
>	v_mac_f32_e32 v14, s36, v27                                     ; 3E1C3624
>	v_mul_f32_e32 v27, v11, v11                                     ; 1036170B
>	v_mac_f32_e32 v14, s37, v27                                     ; 3E1C3625
>	v_mul_f32_e32 v27, v31, v30                                     ; 10363D1F
>	s_buffer_load_dword s13, s[0:3], 0x58                           ; C2068158
>	s_buffer_load_dword s38, s[0:3], 0x4c                           ; C213014C
>	v_mul_f32_e32 v27, s15, v27                                     ; 1036360F
>	v_mul_f32_e32 v28, v30, v25                                     ; 1038331E
>	v_mac_f32_e32 v27, s14, v28                                     ; 3E36380E
>	v_mul_f32_e32 v28, v25, v31                                     ; 10383F19
>	v_mac_f32_e32 v27, s36, v28                                     ; 3E363824
>	v_mul_f32_e32 v28, v31, v31                                     ; 10383F1F
>	s_buffer_load_dword s7, s[0:3], 0x4                             ; C2038104
>	v_add_f32_e32 v14, v14, v16                                     ; 061C210E
>	v_mac_f32_e32 v27, s37, v28                                     ; 3E363825
>	s_buffer_load_dword s6, s[0:3], 0x5                             ; C2030105
>	v_add_f32_e32 v16, v27, v26                                     ; 0620351B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v14, s38, v14                                     ; 061C1C26
>	v_mov_b32_e32 v4, s13                                           ; 7E08020D
>	s_buffer_load_dword s13, s[0:3], 0x6                            ; C2068106
>	v_mul_f32_e32 v14, 0x3fa66666, v14                              ; 101C1CFF 3FA66666
>	v_add_f32_e32 v16, s38, v16                                     ; 06202026
>	v_mov_b32_e32 v26, 0x3feccccd                                   ; 7E3402FF 3FECCCCD
>	v_madak_f32_e32 v16, v26, v16, 0xbe99999a                       ; 4220211A BE99999A
>	v_add_f32_e64 v14, v14, 0 clamp                                 ; D206080E 0001010E
>	v_mov_b32_e32 v26, 0xbf4ccccd                                   ; 7E3402FF BF4CCCCD
>	v_mad_f32 v32, v26, v14, 1.0                                    ; D2820020 03CA1D1A
>	v_mad_f32 v14, v20, v23, -s7                                    ; D282000E 801E2F14
>	v_mad_f32 v20, v21, v23, -s6                                    ; D2820014 801A2F15
>	v_mul_f32_e32 v14, 0.5, v14                                     ; 101C1CF0
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v21, v22, v23, -s13                                   ; D2820015 80362F16
>	v_mul_f32_e32 v20, 0.5, v20                                     ; 102828F0
>	v_mul_f32_e32 v22, v14, v14                                     ; 102C1D0E
>	v_mul_f32_e32 v21, 0.5, v21                                     ; 102A2AF0
>	v_mac_f32_e32 v22, v20, v20                                     ; 3E2C2914
>	v_mac_f32_e32 v22, v21, v21                                     ; 3E2C2B15
>	v_rsq_f32_e32 v22, v22                                          ; 7E2C5D16
>	s_buffer_load_dword s12, s[0:3], 0x59                           ; C2060159
>	s_buffer_load_dword s43, s[0:3], 0xc                            ; C215810C
>	s_buffer_load_dword s44, s[0:3], 0xd                            ; C216010D
>	s_buffer_load_dword s45, s[0:3], 0xe                            ; C216810E
>	v_mul_f32_e32 v33, v22, v14                                     ; 10421D16
>	v_add_f32_e64 v14, v16, 0 clamp                                 ; D206080E 00010110
>	v_mul_f32_e32 v16, s7, v5                                       ; 10200A07
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	s_load_dwordx4 s[16:19], s[4:5], 0x1c                           ; C088051C
>	v_mad_f32 v16, v10, -s6, -v16                                   ; D2820010 C4400D0A
>	s_load_dwordx8 s[28:35], s[4:5], 0x20                           ; C0CE0520
>	s_load_dwordx4 s[36:39], s[4:5], 0x2c                           ; C092052C
>	v_mad_f32 v16, -v11, s13, v16                                   ; D2820010 24401B0B
>	v_mad_f32 v36, -v14, v12, v12                                   ; D2820024 2432190E
>	v_mov_b32_e32 v14, 0x41100000                                   ; 7E1C02FF 41100000
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v15, v15, v15                                     ; 101E1F0F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v14, v14, s12, 2.0                                    ; D282000E 03D0190E
>	v_mul_f32_e32 v34, v22, v20                                     ; 10442916
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	v_mul_f32_e32 v20, s43, v15                                     ; 10281E2B
>	v_mul_f32_e32 v35, v22, v21                                     ; 10462B16
>	v_mul_f32_e32 v21, s44, v15                                     ; 102A1E2C
>	v_mul_f32_e32 v15, s45, v15                                     ; 101E1E2D
>	v_mul_f32_e32 v37, v20, v16                                     ; 104A2114
>	v_exp_f32_e32 v14, v14                                          ; 7E1C4B0E
>	v_cubeid_f32 v20, v5, v10, v11                                  ; D2880014 042E1505
>	v_mul_f32_e32 v38, v21, v16                                     ; 104C2115
>	v_mul_f32_e32 v39, v15, v16                                     ; 104E210F
>	s_and_b32 s16, s16, s27                                         ; 87101B10
>	s_and_b64 exec, exec, s[8:9]                                    ; 87FE087E
>	v_add_f32_e64 v15, v24, 0 clamp                                 ; D206080F 00010118
>	image_sample v[26:29], v[18:21], s[20:27], s[16:19] dmask:0xf   ; F0800F00 00851A12
>	s_buffer_load_dword s4, s[0:3], 0x50                            ; C2020150
>	v_max_f32_e32 v40, v15, v16                                     ; 2050210F
>	v_mov_b32_e32 v16, 0x40c00000                                   ; 7E2002FF 40C00000
>	v_cubeid_f32 v19, v25, v30, v31                                 ; D2880013 047E3D19
>	v_cubetc_f32 v18, v25, v30, v31                                 ; D28C0012 047E3D19
>	v_cubesc_f32 v43, v25, v30, v31                                 ; D28A002B 047E3D19
>	v_cubema_f32 v25, v25, v30, v31                                 ; D28E0019 047E3D19
>	v_mad_f32 v20, -s12, v16, v16                                   ; D2820014 2442200C
>	v_sub_f32_e32 v16, 1.0, v15                                     ; 08201EF2
>	v_rcp_f32_e64 v25, |v25|                                        ; D3540119 00000119
>	v_log_f32_e32 v21, v16                                          ; 7E2A4F10
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v22, s4                                           ; 7E2C0204
>	v_mad_f32 v18, v25, v18, v17                                    ; D2820012 04462519
>	v_mac_f32_e32 v17, v25, v43                                     ; 3E225719
>	v_mov_b32_e32 v16, 0x40a00000                                   ; 7E2002FF 40A00000
>	image_sample_l v[17:19], v[17:20], s[28:35], s[36:39] dmask:0x7 ; F0900700 01271111
>	v_mul_legacy_f32_e32 v20, v16, v21                              ; 0E282B10
>	v_max_f32_e32 v21, s12, v22                                     ; 202A2C0C
>	v_exp_f32_e32 v20, v20                                          ; 7E284B14
>	v_subrev_f32_e32 v21, s4, v21                                   ; 0A2A2A04
>	v_mad_f32 v31, v21, v20, v22                                    ; D282001F 045A2915
>	v_mul_f32_e32 v21, s7, v33                                      ; 102A4207
>	v_mad_f32 v21, v34, -s6, -v21                                   ; D2820015 C4540D22
>	v_mad_f32 v21, -v35, s13, v21                                   ; D2820015 24541B23
>	s_buffer_load_dword s5, s[0:3], 0x51                            ; C2028151
>	v_add_f32_e64 v21, v21, 0 clamp                                 ; D2060815 00010115
>	s_buffer_load_dword s8, s[0:3], 0x52                            ; C2040152
>	v_sub_f32_e32 v21, 1.0, v21                                     ; 082A2AF2
>	v_log_f32_e32 v21, v21                                          ; 7E2A4F15
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v23, s5                                           ; 7E2E0205
>	v_max_f32_e32 v25, s12, v23                                     ; 20322E0C
>	v_mov_b32_e32 v24, s8                                           ; 7E300208
>	v_max_f32_e32 v30, s12, v24                                     ; 203C300C
>	v_subrev_f32_e32 v25, s5, v25                                   ; 0A323205
>	v_mul_legacy_f32_e32 v21, v16, v21                              ; 0E2A2B10
>	v_mad_f32 v43, v25, v20, v23                                    ; D282002B 045E2919
>	v_subrev_f32_e32 v30, s8, v30                                   ; 0A3C3C08
>	v_exp_f32_e32 v25, v21                                          ; 7E324B15
>	v_sub_f32_e32 v21, 1.0, v22                                     ; 082A2CF2
>	v_mad_f32 v20, v30, v20, v24                                    ; D2820014 0462291E
>	v_mad_f32 v30, v21, v25, v22                                    ; D282001E 045A3315
>	v_sub_f32_e32 v22, 1.0, v23                                     ; 082C2EF2
>	v_mul_f32_e32 v33, v33, v5                                      ; 10420B21
>	v_mad_f32 v44, v22, v25, v23                                    ; D282002C 045E3316
>	v_sub_f32_e32 v23, 1.0, v24                                     ; 082E30F2
>	v_mad_f32 v25, v23, v25, v24                                    ; D2820019 04623317
>	v_mac_f32_e32 v33, v34, v10                                     ; 3E421522
>	v_mul_f32_e32 v24, -0.5, v14                                    ; 10301CF1
>	v_exp_f32_e32 v24, v24                                          ; 7E304B18
>	v_mac_f32_e32 v33, v35, v11                                     ; 3E421723
>	v_sub_f32_e32 v24, 2.0, v24                                     ; 083030F4
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_log_f32_e32 v33, v33                                          ; 7E424F21
>	v_rcp_f32_e32 v24, v24                                          ; 7E305518
>	v_add_f32_e32 v45, 2.0, v14                                     ; 065A1CF4
>	v_mul_f32_e32 v45, 0x3e800000, v45                              ; 105A5AFF 3E800000
>	v_mul_legacy_f32_e32 v33, v14, v33                              ; 0E42430E
>	v_mul_f32_e32 v24, v24, v45                                     ; 10305B18
>	v_mul_f32_e32 v30, v30, v37                                     ; 103C4B1E
>	v_mul_f32_e32 v34, v44, v38                                     ; 10444D2C
>	v_mul_f32_e32 v25, v25, v39                                     ; 10324F19
>	v_mul_f32_e32 v30, v24, v30                                     ; 103C3D18
>	v_exp_f32_e32 v33, v33                                          ; 7E424B21
>	v_mul_f32_e32 v34, v24, v34                                     ; 10444518
>	v_mul_f32_e32 v25, v24, v25                                     ; 10323318
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v34, v33, v34                                     ; 10444521
>	v_mul_f32_e32 v33, v33, v25                                     ; 10423321
>	v_mov_b32_e32 v25, 0x3727c5ac                                   ; 7E3202FF 3727C5AC
>	v_add_f32_e32 v35, v25, v40                                     ; 06465119
>	v_rcp_f32_e32 v35, v35                                          ; 7E465523
>	v_mov_b32_e32 v41, 0x3eaaaa9f                                   ; 7E5202FF 3EAAAA9F
>	v_mul_f32_e32 v42, s4, v41                                      ; 10545204
>	v_mac_f32_e32 v42, s5, v41                                      ; 3E545205
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_mac_f32_e32 v42, s8, v41                                      ; 3E545208
>	v_mul_f32_e32 v30, v35, v30                                     ; 103C3D23
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mac_f32_e32 v34, v18, v43                                     ; 3E445712
>	v_mul_f32_e32 v26, v29, v26                                     ; 1034351D
>	v_sub_f32_e32 v18, 1.0, v42                                     ; 082454F2
>	v_mac_f32_e32 v30, v17, v31                                     ; 3E3C3F11
>	v_mul_f32_e32 v17, v29, v28                                     ; 1022391D
>	v_add_f32_e64 v28, v18, 0 clamp                                 ; D206081C 00010112
>	v_mul_f32_e32 v18, 4.0, v26                                     ; 102434F6
>	v_mul_f32_e32 v27, v29, v27                                     ; 1036371D
>	v_mul_f32_e32 v18, v18, v28                                     ; 10243912
>	v_mul_f32_e32 v26, v28, v37                                     ; 10344B1C
>	v_mul_f32_e32 v33, v35, v33                                     ; 10424323
>	v_mul_f32_e32 v17, 4.0, v17                                     ; 102222F6
>	v_mac_f32_e32 v26, v32, v18                                     ; 3E342520
>	v_mul_f32_e32 v18, 4.0, v27                                     ; 102436F6
>	v_mac_f32_e32 v33, v19, v20                                     ; 3E422913
>	v_mul_f32_e32 v18, v18, v28                                     ; 10243912
>	v_mul_f32_e32 v27, v28, v38                                     ; 10364D1C
>	v_mul_f32_e32 v17, v17, v28                                     ; 10223911
>	v_mul_f32_e32 v20, v28, v39                                     ; 10284F1C
>	v_mac_f32_e32 v27, v32, v18                                     ; 3E362520
>	v_mac_f32_e32 v20, v32, v17                                     ; 3E282320
>	v_mul_f32_e32 v19, v36, v30                                     ; 10263D24
>	v_mul_f32_e32 v18, v36, v34                                     ; 10244524
>	v_mul_f32_e32 v17, v36, v33                                     ; 10224324
>	v_mov_b32_e32 v29, 0xc8                                         ; 7E3A02FF 000000C8
>	v_mov_b32_e32 v30, 0                                            ; 7E3C0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v31, vcc, 0xffffffe8, v29                         ; 4A3E3AFF FFFFFFE8
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v32, vcc, 0xffffffec, v29                         ; 4A403AFF FFFFFFEC
>	buffer_load_dword v32, v32, s[0:3], 0 offen                     ; E0301000 80002020
>	v_add_i32_e32 v33, vcc, -16, v29                                ; 4A423AD0
>	buffer_load_dword v33, v33, s[0:3], 0 offen                     ; E0301000 80002121
>	v_add_i32_e32 v39, vcc, -4, v29                                 ; 4A4E3AC4
>	buffer_load_dword v39, v39, s[0:3], 0 offen                     ; E0301000 80002727
>	buffer_load_dword v40, v29, s[0:3], 0 offen                     ; E0301000 8000281D
>	v_add_i32_e32 v30, vcc, 1, v30                                  ; 4A3C3C81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v31, v2, v31                                   ; 0A3E3F02
>	v_mul_f32_e32 v34, v31, v31                                     ; 10443F1F
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v32, v1, v32                                   ; 0A404101
>	v_mac_f32_e32 v34, v32, v32                                     ; 3E444120
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v33, v6, v33                                   ; 0A424306
>	v_mac_f32_e32 v34, v33, v33                                     ; 3E444321
>	v_rsq_f32_e32 v35, v34                                          ; 7E465D22
>	v_mul_f32_e32 v36, v35, v31                                     ; 10483F23
>	v_mad_f32 v31, v35, v31, v7                                     ; D282001F 041E3F23
>	v_mul_f32_e32 v37, v35, v32                                     ; 104A4123
>	v_mad_f32 v32, v35, v32, v8                                     ; D2820020 04224123
>	v_mul_f32_e32 v38, v35, v33                                     ; 104C4323
>	v_mad_f32 v33, v35, v33, v9                                     ; D2820021 04264323
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_add_i32_e32 v35, vcc, -12, v29                                ; 4A463ACC
>	buffer_load_dword v35, v35, s[0:3], 0 offen                     ; E0301000 80002323
>	v_mul_f32_e32 v31, 0.5, v31                                     ; 103E3EF0
>	v_mul_f32_e32 v32, 0.5, v32                                     ; 104040F0
>	v_mul_f32_e32 v33, 0.5, v33                                     ; 104242F0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_add_i32_e32 v35, vcc, -8, v29                                 ; 4A463AC8
>	buffer_load_dword v35, v35, s[0:3], 0 offen                     ; E0301000 80002323
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_mad_f32 v39, -v34, v39, v39                                   ; D2820027 249E4F22
>	v_add_i32_e32 v29, vcc, 32, v29                                 ; 4A3A3AA0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v35, -v34, v35, v35                                   ; D2820023 248E4722
>	v_mad_f32 v34, -v34, v40, v40                                   ; D2820022 24A25122
>	v_mul_f32_e32 v40, v31, v31                                     ; 10503F1F
>	v_mac_f32_e32 v40, v32, v32                                     ; 3E504120
>	v_mac_f32_e32 v40, v33, v33                                     ; 3E504321
>	v_rsq_f32_e32 v40, v40                                          ; 7E505D28
>	v_mul_f32_e32 v31, v40, v31                                     ; 103E3F28
>	v_mul_f32_e32 v32, v40, v32                                     ; 10404128
>	v_mul_f32_e32 v33, v40, v33                                     ; 10424328
>	v_mul_f32_e32 v40, v5, v36                                      ; 10504905
>	v_mul_f32_e32 v36, v31, v36                                     ; 1048491F
>	v_mac_f32_e32 v36, v32, v37                                     ; 3E484B20
>	v_mul_f32_e32 v31, v31, v5                                      ; 103E0B1F
>	v_mac_f32_e32 v36, v33, v38                                     ; 3E484D21
>	v_mac_f32_e32 v31, v32, v10                                     ; 3E3E1520
>	v_add_f32_e64 v32, v36, 0 clamp                                 ; D2060820 00010124
>	v_sub_f32_e32 v32, 1.0, v32                                     ; 084040F2
>	v_log_f32_e32 v32, v32                                          ; 7E404F20
>	v_mac_f32_e32 v31, v33, v11                                     ; 3E3E1721
>	v_mac_f32_e32 v40, v10, v37                                     ; 3E504B0A
>	v_add_f32_e64 v31, v31, 0 clamp                                 ; D206081F 0001011F
>	v_mul_legacy_f32_e32 v32, v16, v32                              ; 0E404110
>	v_log_f32_e32 v31, v31                                          ; 7E3E4F1F
>	v_mac_f32_e32 v40, v11, v38                                     ; 3E504D0B
>	v_add_f32_e64 v33, v40, 0 clamp                                 ; D2060821 00010128
>	v_exp_f32_e32 v32, v32                                          ; 7E404B20
>	v_mul_f32_e32 v35, v35, v33                                     ; 10464323
>	v_mad_f32 v36, v32, v21, s4                                     ; D2820024 00122B20
>	v_mac_f32_e32 v26, v28, v35                                     ; 3E34471C
>	v_mul_f32_e32 v35, v36, v35                                     ; 10464724
>	v_mul_f32_e32 v36, v39, v33                                     ; 10484327
>	v_mad_f32 v37, v32, v22, s5                                     ; D2820025 00162D20
>	v_mul_f32_e32 v34, v34, v33                                     ; 10444322
>	v_mad_f32 v32, v32, v23, s8                                     ; D2820020 00222F20
>	v_mul_f32_e32 v32, v32, v34                                     ; 10404520
>	v_mul_legacy_f32_e32 v31, v14, v31                              ; 0E3E3F0E
>	v_mac_f32_e32 v27, v28, v36                                     ; 3E36491C
>	v_mul_f32_e32 v36, v37, v36                                     ; 10484925
>	v_mac_f32_e32 v20, v28, v34                                     ; 3E28451C
>	v_mul_f32_e32 v34, v24, v35                                     ; 10444718
>	v_exp_f32_e32 v31, v31                                          ; 7E3E4B1F
>	v_mul_f32_e32 v35, v24, v36                                     ; 10464918
>	v_mul_f32_e32 v32, v24, v32                                     ; 10404118
>	v_mul_f32_e32 v34, v31, v34                                     ; 1044451F
>	v_mul_f32_e32 v35, v31, v35                                     ; 1046471F
>	v_mul_f32_e32 v31, v31, v32                                     ; 103E411F
>	v_max_f32_e32 v32, v15, v33                                     ; 2040430F
>	v_add_f32_e32 v32, v25, v32                                     ; 06404119
>	v_rcp_f32_e32 v32, v32                                          ; 7E405520
>	v_mul_f32_e32 v33, v32, v34                                     ; 10424520
>	v_mul_f32_e32 v34, v32, v35                                     ; 10444720
>	v_mul_f32_e32 v31, v32, v31                                     ; 103E3F20
>	v_mac_f32_e32 v19, v12, v33                                     ; 3E26430C
>	v_mac_f32_e32 v18, v12, v34                                     ; 3E24450C
>	v_mac_f32_e32 v17, v12, v31                                     ; 3E223F0C
>	v_cmp_lt_i32_e32 vcc, 2, v30                                    ; 7D023C82
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s4, s[0:3], 0x54                            ; C2020154
>	s_buffer_load_dword s5, s[0:3], 0x55                            ; C2028155
>	s_buffer_load_dword s6, s[0:3], 0x56                            ; C2030156
>	s_buffer_load_dword s7, s[0:3], 0x8                             ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                             ; C2040109
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v19, s4, v26                                      ; 3E263404
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v18, s5, v27                                      ; 3E243605
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_subrev_f32_e32 v1, s4, v1                                     ; 0A020204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_max_f32_e32 v1, 0, v1                                         ; 20020280
>	v_interp_p1_f32 v0, v0, 0, 1, [m0]                              ; C8000400
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                        ; C8010403
>	v_mul_f32_e32 v1, v2, v1                                        ; 10020302
>	v_log_f32_e32 v1, v1                                            ; 7E024F01
>	v_floor_f32_e32 v2, s5                                          ; 7E044805
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_mul_f32_e32 v2, 0x41000000, v2                                ; 100404FF 41000000
>	v_mul_legacy_f32_e32 v1, v2, v1                                 ; 0E020302
>	v_exp_f32_e32 v1, v1                                            ; 7E024B01
>	v_add_f32_e64 v1, v1, 0 clamp                                   ; D2060801 00010101
>	v_mul_f32_e32 v3, v1, v0                                        ; 10060101
>	v_mad_f32 v0, -v3, s7, s7                                       ; D2820000 201C0F03
>	v_mad_f32 v1, -v3, s8, s8                                       ; D2820001 20201103
>	v_mac_f32_e32 v17, s6, v20                                      ; 3E222806
>	v_mad_f32 v2, -v3, s0, s0                                       ; D2820002 20000103
>	v_mac_f32_e32 v0, v3, v19                                       ; 3E002703
>	v_mac_f32_e32 v1, v3, v18                                       ; 3E022503
>	v_mac_f32_e32 v2, v3, v17                                       ; 3E042303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 48
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2224 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].xy, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SAMP[8]
>DCL SAMP[9]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL SVIEW[8], 2D, FLOAT
>DCL SVIEW[9], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..18]
>DCL CONST[26..39]
>DCL TEMP[0..71], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,    -1.0000,     1.0010}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.3333,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,    32.0000,     0.0000}
>IMM[5] INT32 {0, 4, 2, 1}
>IMM[6] FLT32 {    0.3000,     0.5900,     0.1100,     0.0010}
>IMM[7] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[4].wwww
>  1: MOV TEMP[0].yz, IN[5].yxyy
>  2: ADD TEMP[1].xyz, CONST[0].xyzz, -IN[0].xyzz
>  3: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>  4: RSQ TEMP[2].x, TEMP[2].xxxx
>  5: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
>  6: DP3 TEMP[2].x, IN[3].xyzz, IN[3].xyzz
>  7: RSQ TEMP[2].x, TEMP[2].xxxx
>  8: MUL TEMP[2].xyz, IN[3].xyzz, TEMP[2].xxxx
>  9: MOV TEMP[3].xy, IN[1].xyyy
> 10: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 11: MOV TEMP[4], TEMP[3]
> 12: MOV TEMP[4].w, TEMP[3].wwww
> 13: MOV TEMP[5].xy, IN[1].xyyy
> 14: TEX TEMP[5], TEMP[5], SAMP[8], 2D
> 15: MOV TEMP[6], TEMP[5]
> 16: MUL TEMP[6], CONST[27], TEMP[5].xxxx
> 17: MAD TEMP[6], CONST[30], TEMP[5].yyyy, TEMP[6]
> 18: MAD TEMP[6], CONST[33], TEMP[5].zzzz, TEMP[6]
> 19: MUL TEMP[7], CONST[29], TEMP[5].xxxx
> 20: MAD TEMP[7], CONST[32], TEMP[5].yyyy, TEMP[7]
> 21: MAD TEMP[7], CONST[35], TEMP[5].zzzz, TEMP[7]
> 22: MOV TEMP[8].xy, TEMP[7].xyxx
> 23: DP3 TEMP[9].x, TEMP[5].xyzz, IMM[0].xxxx
> 24: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 25: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[9].xxxx
> 26: ADD TEMP[10].xy, TEMP[7].zwww, TEMP[10].xxxx
> 27: MOV TEMP[8].zw, TEMP[10].yyxy
> 28: MUL TEMP[8].xyz, CONST[28].xyzz, TEMP[5].xxxx
> 29: MAD TEMP[8].xyz, CONST[31].xyzz, TEMP[5].yyyy, TEMP[8].xyzz
> 30: MAD TEMP[5].xyz, CONST[34].xyzz, TEMP[5].zzzz, TEMP[8].xyzz
> 31: LRP TEMP[4].xyz, TEMP[9].xxxx, TEMP[5].xyzz, TEMP[3].xyzz
> 32: MUL TEMP[5].xyz, TEMP[6].xyzz, TEMP[7].yyyy
> 33: RCP TEMP[8].x, TEMP[10].yyyy
> 34: POW TEMP[9].x, TEMP[5].xxxx, TEMP[8].xxxx
> 35: POW TEMP[9].y, TEMP[5].yyyy, TEMP[8].xxxx
> 36: POW TEMP[9].z, TEMP[5].zzzz, TEMP[8].xxxx
> 37: MOV TEMP[5].xyz, TEMP[9].xyzx
> 38: MOV TEMP[8].x, CONST[37].xxxx
> 39: MOV TEMP[8].x, CONST[37].yyyy
> 40: MUL TEMP[8].xy, IN[1].xyyy, CONST[26].xyyy
> 41: MUL TEMP[11].xy, CONST[38].xyyy, IN[3].wwww
> 42: MUL TEMP[12].xy, TEMP[8].xyyy, CONST[37].xxxx
> 43: MAD TEMP[11].xy, TEMP[11].xyyy, CONST[37].xxxx, TEMP[12].xyyy
> 44: MOV TEMP[11].xy, TEMP[11].xyyy
> 45: TEX TEMP[11], TEMP[11], SAMP[5], 2D
> 46: MOV TEMP[12], TEMP[11]
> 47: MUL TEMP[12].xy, CONST[38].zwww, IN[3].wwww
> 48: MUL TEMP[8].xy, TEMP[8].xyyy, CONST[37].yyyy
> 49: MAD TEMP[8].xy, TEMP[12].xyyy, CONST[37].yyyy, TEMP[8].xyyy
> 50: MOV TEMP[8].xy, TEMP[8].xyyy
> 51: TEX TEMP[8], TEMP[8], SAMP[5], 2D
> 52: MUL TEMP[8].x, TEMP[8].zzzz, CONST[37].wwww
> 53: MAD TEMP[8].x, TEMP[11].yyyy, CONST[37].zzzz, -TEMP[8].xxxx
> 54: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 55: MUL TEMP[12].x, TEMP[3].wwww, TEMP[8].xxxx
> 56: LRP TEMP[4].xyz, TEMP[12].xxxx, CONST[36].xyzz, TEMP[4].xyzz
> 57: MOV TEMP[12].xy, IN[1].xyyy
> 58: TEX TEMP[12], TEMP[12], SAMP[6], 2D
> 59: LRP TEMP[6].x, TEMP[7].xxxx, TEMP[6].wwww, TEMP[12].wwww
> 60: RCP TEMP[7].x, TEMP[10].xxxx
> 61: POW TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
> 62: MUL TEMP[7].x, TEMP[3].wwww, TEMP[8].xxxx
> 63: LRP TEMP[6].x, TEMP[7].xxxx, CONST[36].wwww, TEMP[6].xxxx
> 64: MOV TEMP[7].xy, IN[1].xyyy
> 65: TEX TEMP[7], TEMP[7], SAMP[4], 2D
> 66: MOV TEMP[8], TEMP[7]
> 67: MAD TEMP[10].xy, TEMP[7].wyyy, IMM[0].yyyy, IMM[0].zzzz
> 68: MOV TEMP[10].z, TEMP[7].xxxx
> 69: DP2 TEMP[12].x, TEMP[10].xyyy, TEMP[10].xyyy
> 70: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 71: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
> 72: SQRT TEMP[12].x, TEMP[12].xxxx
> 73: MAD TEMP[11].xy, TEMP[11].xwww, IMM[0].yyyy, IMM[0].zzzz
> 74: MAD TEMP[10].xy, TEMP[11].xyyy, TEMP[3].wwww, TEMP[10].xyyy
> 75: MOV TEMP[10].z, TEMP[12].xxxx
> 76: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 77: RSQ TEMP[11].x, TEMP[11].xxxx
> 78: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 79: MOV TEMP[3].xyz, TEMP[10].xyzx
> 80: MUL TEMP[3].xyz, IN[4].xyzz, TEMP[10].xxxx
> 81: MAD TEMP[3].xyz, TEMP[0].xyzz, TEMP[10].yyyy, TEMP[3].xyzz
> 82: MAD TEMP[3].xyz, TEMP[2].xyzz, TEMP[10].zzzz, TEMP[3].xyzz
> 83: DP3 TEMP[10].x, TEMP[3].xyzz, TEMP[1].xyzz
> 84: MUL TEMP[10].xyz, TEMP[10].xxxx, TEMP[3].xyzz
> 85: MAD TEMP[10].xyz, IMM[0].yyyy, TEMP[10].xyzz, -TEMP[1].xyzz
> 86: MOV TEMP[11].xy, IN[1].zwww
> 87: TEX TEMP[11], TEMP[11], SAMP[7], 2D
> 88: MOV TEMP[12], TEMP[11]
> 89: ADD TEMP[12].xyz, TEMP[11].zyyy, IMM[1].xxxx
> 90: MUL TEMP[12].xyz, TEMP[12].xyzz, IMM[0].yyyy
> 91: MUL TEMP[13].x, TEMP[11].wwww, IMM[0].yyyy
> 92: MOV TEMP[12].w, TEMP[13].xxxx
> 93: DP2 TEMP[14].x, TEMP[12].xyyy, TEMP[12].xyyy
> 94: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 95: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[14].xxxx
> 96: SQRT TEMP[14].x, TEMP[14].xxxx
> 97: MUL TEMP[15].xyz, IN[4].xyzz, TEMP[12].xxxx
> 98: MAD TEMP[15].xyz, TEMP[0].xyzz, TEMP[12].yyyy, TEMP[15].xyzz
> 99: MAD TEMP[14].xyz, TEMP[2].xyzz, TEMP[14].xxxx, TEMP[15].xyzz
>100: MOV TEMP[12].xyz, TEMP[14].xyzx
>101: DP3 TEMP[15].x, TEMP[10].xyzz, TEMP[14].xyzz
>102: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>103: ADD TEMP[15].x, TEMP[13].xxxx, -TEMP[15].xxxx
>104: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>105: POW TEMP[15].x, TEMP[15].xxxx, IMM[1].yyyy
>106: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>107: MUL TEMP[16].x, IMM[1].zzzz, TEMP[6].xxxx
>108: ADD TEMP[16].x, TEMP[15].xxxx, -TEMP[16].xxxx
>109: LRP TEMP[17].x, TEMP[6].xxxx, IMM[1].wwww, IMM[0].xxxx
>110: MUL TEMP[16].x, TEMP[16].xxxx, TEMP[17].xxxx
>111: MOV_SAT TEMP[16].x, TEMP[16].xxxx
>112: MUL TEMP[15].x, TEMP[15].xxxx, TEMP[16].xxxx
>113: MUL TEMP[13].x, TEMP[13].xxxx, IMM[2].xxxx
>114: MOV TEMP[12].w, TEMP[13].xxxx
>115: MUL TEMP[0].x, TEMP[11].xxxx, TEMP[7].xxxx
>116: DP3 TEMP[10].x, -TEMP[10].xyzz, TEMP[2].xyzz
>117: ADD TEMP[10].x, TEMP[10].xxxx, IMM[0].xxxx
>118: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[2].xyzz
>119: ADD TEMP[11].x, IMM[0].xxxx, -TEMP[11].xxxx
>120: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>121: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[11].xxxx
>122: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>123: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[10].xxxx
>124: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>125: MUL TEMP[10].x, TEMP[15].xxxx, TEMP[10].xxxx
>126: MOV TEMP[0].y, TEMP[10].xxxx
>127: MOV TEMP[11].w, IMM[0].xxxx
>128: MAD TEMP[11].xyz, IMM[2].yyyy, TEMP[2].xyzz, IN[0].xyzz
>129: MUL TEMP[2], CONST[4], TEMP[11].xxxx
>130: MAD TEMP[2], CONST[5], TEMP[11].yyyy, TEMP[2]
>131: MAD TEMP[2], CONST[6], TEMP[11].zzzz, TEMP[2]
>132: ADD TEMP[2], TEMP[2], CONST[7]
>133: MAD TEMP[11].x, IMM[2].zzzz, TEMP[6].xxxx, IMM[0].yyyy
>134: EX2 TEMP[11].x, TEMP[11].xxxx
>135: MOV TEMP[15].xyz, -CONST[1].xyzx
>136: ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[1].xyzz
>137: MUL TEMP[16].xyz, TEMP[16].xyzz, IMM[2].wwww
>138: DP3 TEMP[17].x, TEMP[16].xyzz, TEMP[16].xyzz
>139: RSQ TEMP[17].x, TEMP[17].xxxx
>140: MUL TEMP[16].xyz, TEMP[16].xyzz, TEMP[17].xxxx
>141: DP3 TEMP[17].x, TEMP[15].xyzz, TEMP[3].xyzz
>142: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>143: MOV TEMP[18].xy, TEMP[2].xyyy
>144: MOV TEMP[18].w, IMM[0].xxxx
>145: MOV TEMP[18].z, TEMP[2].zzzz
>146: TXP TEMP[2], TEMP[18], SAMP[0], SHADOW2D
>147: MOV TEMP[18].x, TEMP[2].xxxx
>148: DP3 TEMP[18].x, TEMP[15].xyzz, TEMP[14].xyzz
>149: MOV_SAT TEMP[18].x, TEMP[18].xxxx
>150: ADD TEMP[13].x, TEMP[13].xxxx, -TEMP[18].xxxx
>151: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>152: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>153: MUL TEMP[2].xyz, CONST[3].xyzz, TEMP[2].xxxx
>154: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[13].xxxx
>155: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>156: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>157: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[7].xxxx
>158: MUL TEMP[2].xyz, TEMP[17].xxxx, TEMP[2].xyzz
>159: MOV TEMP[7].xyz, TEMP[3].xyzz
>160: TEX TEMP[7], TEMP[7], SAMP[1], CUBE
>161: MOV TEMP[13], TEMP[7]
>162: DP3 TEMP[13].x, TEMP[3].xyzz, TEMP[1].xyzz
>163: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[3].xyzz
>164: MAD TEMP[13].xyz, IMM[0].yyyy, TEMP[13].xyzz, -TEMP[1].xyzz
>165: ADD TEMP[18].x, IMM[0].xxxx, -TEMP[6].xxxx
>166: MUL TEMP[18].x, TEMP[18].xxxx, IMM[3].xxxx
>167: MOV TEMP[13].w, TEMP[18].xxxx
>168: DP3 TEMP[19].x, TEMP[1].xyzz, TEMP[3].xyzz
>169: MOV_SAT TEMP[19].x, TEMP[19].xxxx
>170: ADD TEMP[19].x, IMM[0].xxxx, -TEMP[19].xxxx
>171: POW TEMP[19].x, TEMP[19].xxxx, IMM[3].yyyy
>172: MAX TEMP[6].xyz, TEMP[6].xxxx, TEMP[9].xyzz
>173: ADD TEMP[6].xyz, TEMP[6].xyzz, -TEMP[9].xyzz
>174: MAD TEMP[6].xyz, TEMP[19].xxxx, TEMP[6].xyzz, TEMP[9].xyzz
>175: MOV TEMP[13].xyz, TEMP[13].xyzz
>176: MOV TEMP[13].w, TEMP[18].xxxx
>177: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
>178: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[13].xyzz
>179: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>180: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>181: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>182: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[7].wwww
>183: MUL TEMP[7].xyz, TEMP[7].xyzz, IMM[3].wwww
>184: MUL TEMP[7].xyz, TEMP[13].xxxx, TEMP[7].xyzz
>185: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>186: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>187: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>188: MUL TEMP[13].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>189: MAD TEMP[7].xyz, TEMP[7].xyzz, TEMP[0].xxxx, TEMP[13].xyzz
>190: DP3 TEMP[13].x, TEMP[15].xyzz, TEMP[16].xyzz
>191: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>192: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>193: POW TEMP[13].x, TEMP[13].xxxx, IMM[3].yyyy
>194: ADD TEMP[15].xyz, IMM[0].xxxx, -TEMP[9].xyzz
>195: MAD TEMP[9].xyz, TEMP[13].xxxx, TEMP[15].xyzz, TEMP[9].xyzz
>196: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xyzz
>197: ADD TEMP[9].x, TEMP[11].xxxx, IMM[0].yyyy
>198: MUL TEMP[9].x, TEMP[9].xxxx, IMM[4].xxxx
>199: MUL TEMP[13].x, -TEMP[11].xxxx, IMM[2].wwww
>200: EX2 TEMP[13].x, TEMP[13].xxxx
>201: ADD TEMP[13].x, IMM[0].yyyy, -TEMP[13].xxxx
>202: RCP TEMP[13].x, TEMP[13].xxxx
>203: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[13].xxxx
>204: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>205: DP3 TEMP[9].x, TEMP[3].xyzz, TEMP[16].xyzz
>206: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>207: POW TEMP[9].x, TEMP[9].xxxx, TEMP[11].xxxx
>208: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>209: DP3 TEMP[9].x, TEMP[1].xyzz, TEMP[3].xyzz
>210: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>211: MAX TEMP[9].x, TEMP[17].xxxx, TEMP[9].xxxx
>212: ADD TEMP[9].x, TEMP[9].xxxx, IMM[4].yyyy
>213: RCP TEMP[9].x, TEMP[9].xxxx
>214: MAD TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx, TEMP[6].xyzz
>215: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[10].xxxx
>216: MOV TEMP[9].x, IMM[5].xxxx
>217: BGNLOOP :0
>218:   ISGE TEMP[10].x, TEMP[9].xxxx, IMM[5].yyyy
>219:   UIF TEMP[10].xxxx :0
>220:     BRK
>221:   ENDIF
>222:   UMUL TEMP[13].x, TEMP[9].xxxx, IMM[5].zzzz
>223:   UARL ADDR[0].x, TEMP[13].xxxx
>224:   UARL ADDR[0].x, TEMP[13].xxxx
>225:   ADD TEMP[15].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>226:   DP3 TEMP[16].x, TEMP[15].xyzz, TEMP[15].xyzz
>227:   RSQ TEMP[17].x, TEMP[16].xxxx
>228:   MUL TEMP[18].xyz, TEMP[15].xyzz, TEMP[17].xxxx
>229:   ADD TEMP[19].xyz, TEMP[18].xyzz, TEMP[1].xyzz
>230:   MUL TEMP[20].xyz, TEMP[19].xyzz, IMM[2].wwww
>231:   DP3 TEMP[21].x, TEMP[20].xyzz, TEMP[20].xyzz
>232:   RSQ TEMP[22].x, TEMP[21].xxxx
>233:   MUL TEMP[23].xyz, TEMP[20].xyzz, TEMP[22].xxxx
>234:   DP3 TEMP[24].x, TEMP[18].xyzz, TEMP[3].xyzz
>235:   MOV_SAT TEMP[25].x, TEMP[24].xxxx
>236:   DP3 TEMP[26].x, TEMP[18].xyzz, TEMP[14].xyzz
>237:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>238:   ADD TEMP[28].x, TEMP[12].wwww, -TEMP[27].xxxx
>239:   MOV_SAT TEMP[29].x, TEMP[28].xxxx
>240:   MUL TEMP[30].x, TEMP[29].xxxx, TEMP[29].xxxx
>241:   UMAD TEMP[31].x, TEMP[9].xxxx, IMM[5].zzzz, IMM[5].wwww
>242:   MUL TEMP[32].x, TEMP[16].xxxx, TEMP[17].xxxx
>243:   UMUL TEMP[33].x, TEMP[9].xxxx, IMM[5].zzzz
>244:   UARL ADDR[0].x, TEMP[33].xxxx
>245:   MUL TEMP[34].x, TEMP[32].xxxx, CONST[ADDR[0].x+11].wwww
>246:   MOV_SAT TEMP[35].x, TEMP[34].xxxx
>247:   ADD TEMP[36].x, IMM[0].xxxx, -TEMP[35].xxxx
>248:   UARL ADDR[0].x, TEMP[31].xxxx
>249:   MUL TEMP[37].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[36].xxxx
>250:   MUL TEMP[38].x, TEMP[30].xxxx, TEMP[30].xxxx
>251:   MOV_SAT TEMP[39].x, TEMP[38].xxxx
>252:   LRP TEMP[40].x, TEMP[17].xxxx, IMM[0].xxxx, TEMP[39].xxxx
>253:   MUL TEMP[41].xyz, TEMP[37].xyzz, TEMP[40].xxxx
>254:   MUL TEMP[42].xyz, TEMP[41].xyzz, TEMP[8].xxxx
>255:   MUL TEMP[43].xyz, TEMP[25].xxxx, TEMP[42].xyzz
>256:   DP3 TEMP[44].x, TEMP[5].xyzz, IMM[3].zzzz
>257:   ADD TEMP[45].x, IMM[0].xxxx, -TEMP[44].xxxx
>258:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>259:   MAD TEMP[7].xyz, TEMP[43].xyzz, TEMP[46].xxxx, TEMP[7].xyzz
>260:   DP3 TEMP[47].x, TEMP[18].xyzz, TEMP[23].xyzz
>261:   MOV_SAT TEMP[48].x, TEMP[47].xxxx
>262:   ADD TEMP[49].x, IMM[0].xxxx, -TEMP[48].xxxx
>263:   POW TEMP[50].x, TEMP[49].xxxx, IMM[3].yyyy
>264:   ADD TEMP[51].xyz, IMM[0].xxxx, -TEMP[5].xyzz
>265:   MAD TEMP[52].xyz, TEMP[50].xxxx, TEMP[51].xyzz, TEMP[5].xyzz
>266:   MUL TEMP[53].xyz, TEMP[43].xyzz, TEMP[52].xyzz
>267:   ADD TEMP[54].x, TEMP[11].xxxx, IMM[0].yyyy
>268:   MUL TEMP[55].x, TEMP[54].xxxx, IMM[4].xxxx
>269:   MUL TEMP[56].x, -TEMP[11].xxxx, IMM[2].wwww
>270:   EX2 TEMP[57].x, TEMP[56].xxxx
>271:   ADD TEMP[58].x, IMM[0].yyyy, -TEMP[57].xxxx
>272:   RCP TEMP[59].x, TEMP[58].xxxx
>273:   MUL TEMP[60].x, TEMP[55].xxxx, TEMP[59].xxxx
>274:   MUL TEMP[61].xyz, TEMP[53].xyzz, TEMP[60].xxxx
>275:   DP3 TEMP[62].x, TEMP[3].xyzz, TEMP[23].xyzz
>276:   MOV_SAT TEMP[63].x, TEMP[62].xxxx
>277:   POW TEMP[64].x, TEMP[63].xxxx, TEMP[11].xxxx
>278:   MUL TEMP[65].xyz, TEMP[61].xyzz, TEMP[64].xxxx
>279:   DP3 TEMP[66].x, TEMP[1].xyzz, TEMP[3].xyzz
>280:   MOV_SAT TEMP[67].x, TEMP[66].xxxx
>281:   MAX TEMP[68].x, TEMP[25].xxxx, TEMP[67].xxxx
>282:   ADD TEMP[69].x, TEMP[68].xxxx, IMM[4].yyyy
>283:   RCP TEMP[70].x, TEMP[69].xxxx
>284:   MUL TEMP[71].xyz, TEMP[65].xyzz, TEMP[70].xxxx
>285:   MAD TEMP[2].xyz, TEMP[71].xyzz, TEMP[0].yyyy, TEMP[2].xyzz
>286:   UADD TEMP[9].x, TEMP[9].xxxx, IMM[5].wwww
>287: ENDLOOP :0
>288: MUL TEMP[0].xyz, TEMP[6].xyzz, TEMP[0].yyyy
>289: MOV TEMP[1].xy, IN[1].xyyy
>290: TEX TEMP[1], TEMP[1], SAMP[9], 2D
>291: MOV TEMP[2].w, TEMP[1].wwww
>292: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[6].xyzz
>293: MUL TEMP[3].x, TEMP[3].xxxx, CONST[39].xxxx
>294: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[3].xxxx
>295: MUL TEMP[1].xyz, TEMP[2], IMM[4].zzzz
>296: MAD TEMP[0].xyz, TEMP[7].xyzz, TEMP[4].xyzz, TEMP[0].xyzz
>297: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>298: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>299: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].wwww
>300: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>301: ADD TEMP[2].x, TEMP[2].xxxx, IMM[6].wwww
>302: RCP TEMP[2].x, TEMP[2].xxxx
>303: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>304: FRC TEMP[2].x, CONST[1].wwww
>305: MUL TEMP[2].x, TEMP[2].xxxx, IMM[7].xxxx
>306: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>307: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>308: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>309: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>310: MOV TEMP[0].w, IN[0].wwww
>311: MOV OUT[0], TEMP[0]
>312: END
>radeonsi: Compiling shader 129
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 0)
>  %29 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = call float @llvm.SI.load.const(<16 x i8> %27, i32 4)
>  %32 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 8)
>  %37 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %38 = fsub float %36, %37
>  %39 = fmul float %30, %30
>  %40 = fmul float %33, %33
>  %41 = fadd float %40, %39
>  %42 = fmul float %38, %38
>  %43 = fadd float %41, %42
>  %44 = call float @llvm.sqrt.f32(float %43)
>  %45 = fdiv float 1.000000e+00, %44, !fpmath !1
>  %46 = fmul float %30, %45
>  %47 = fmul float %33, %45
>  %48 = fmul float %38, %45
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %55 = fmul float %49, %52
>  %56 = fmul float %50, %53
>  %57 = fadd float %56, %55
>  %58 = fmul float %51, %54
>  %59 = fadd float %57, %58
>  %60 = call float @llvm.sqrt.f32(float %59)
>  %61 = fdiv float 1.000000e+00, %60, !fpmath !1
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %63 = fmul float %62, %61
>  %64 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %65 = fmul float %64, %61
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %67 = fmul float %66, %61
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %70 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %71 = load <8 x i32>, <8 x i32> addrspace(2)* %70, align 32, !invariant.load !0
>  %72 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %73 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %72, i64 0, i64 15, !amdgpu.uniform !0
>  %74 = load <4 x i32>, <4 x i32> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = extractelement <8 x i32> %71, i32 7
>  %76 = extractelement <4 x i32> %74, i32 0
>  %77 = and i32 %76, %75
>  %78 = insertelement <4 x i32> %74, i32 %77, i32 0
>  %79 = bitcast float %68 to i32
>  %80 = bitcast float %69 to i32
>  %81 = insertelement <2 x i32> undef, i32 %79, i32 0
>  %82 = insertelement <2 x i32> %81, i32 %80, i32 1
>  %83 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %82, <8 x i32> %71, <4 x i32> %78, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %84 = extractelement <4 x float> %83, i32 0
>  %85 = extractelement <4 x float> %83, i32 1
>  %86 = extractelement <4 x float> %83, i32 2
>  %87 = extractelement <4 x float> %83, i32 3
>  %88 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %89 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %90 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 16, !amdgpu.uniform !0
>  %91 = load <8 x i32>, <8 x i32> addrspace(2)* %90, align 32, !invariant.load !0
>  %92 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %93 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %92, i64 0, i64 35, !amdgpu.uniform !0
>  %94 = load <4 x i32>, <4 x i32> addrspace(2)* %93, align 16, !invariant.load !0
>  %95 = extractelement <8 x i32> %91, i32 7
>  %96 = extractelement <4 x i32> %94, i32 0
>  %97 = and i32 %96, %95
>  %98 = insertelement <4 x i32> %94, i32 %97, i32 0
>  %99 = bitcast float %88 to i32
>  %100 = bitcast float %89 to i32
>  %101 = insertelement <2 x i32> undef, i32 %99, i32 0
>  %102 = insertelement <2 x i32> %101, i32 %100, i32 1
>  %103 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %102, <8 x i32> %91, <4 x i32> %98, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 432)
>  %110 = fmul float %109, %104
>  %111 = call float @llvm.SI.load.const(<16 x i8> %108, i32 436)
>  %112 = fmul float %111, %104
>  %113 = call float @llvm.SI.load.const(<16 x i8> %108, i32 440)
>  %114 = fmul float %113, %104
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = call float @llvm.SI.load.const(<16 x i8> %116, i32 444)
>  %118 = fmul float %117, %104
>  %119 = call float @llvm.SI.load.const(<16 x i8> %116, i32 480)
>  %120 = fmul float %119, %105
>  %121 = fadd float %120, %110
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = call float @llvm.SI.load.const(<16 x i8> %123, i32 484)
>  %125 = fmul float %124, %105
>  %126 = fadd float %125, %112
>  %127 = call float @llvm.SI.load.const(<16 x i8> %123, i32 488)
>  %128 = fmul float %127, %105
>  %129 = fadd float %128, %114
>  %130 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %131 = load <16 x i8>, <16 x i8> addrspace(2)* %130, align 16, !invariant.load !0
>  %132 = call float @llvm.SI.load.const(<16 x i8> %131, i32 492)
>  %133 = fmul float %132, %105
>  %134 = fadd float %133, %118
>  %135 = call float @llvm.SI.load.const(<16 x i8> %131, i32 528)
>  %136 = fmul float %135, %106
>  %137 = fadd float %136, %121
>  %138 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %139 = load <16 x i8>, <16 x i8> addrspace(2)* %138, align 16, !invariant.load !0
>  %140 = call float @llvm.SI.load.const(<16 x i8> %139, i32 532)
>  %141 = fmul float %140, %106
>  %142 = fadd float %141, %126
>  %143 = call float @llvm.SI.load.const(<16 x i8> %139, i32 536)
>  %144 = fmul float %143, %106
>  %145 = fadd float %144, %129
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = call float @llvm.SI.load.const(<16 x i8> %147, i32 540)
>  %149 = fmul float %148, %106
>  %150 = fadd float %149, %134
>  %151 = call float @llvm.SI.load.const(<16 x i8> %147, i32 464)
>  %152 = fmul float %151, %104
>  %153 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %154 = load <16 x i8>, <16 x i8> addrspace(2)* %153, align 16, !invariant.load !0
>  %155 = call float @llvm.SI.load.const(<16 x i8> %154, i32 468)
>  %156 = fmul float %155, %104
>  %157 = call float @llvm.SI.load.const(<16 x i8> %154, i32 472)
>  %158 = fmul float %157, %104
>  %159 = call float @llvm.SI.load.const(<16 x i8> %154, i32 476)
>  %160 = fmul float %159, %104
>  %161 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %162 = load <16 x i8>, <16 x i8> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = call float @llvm.SI.load.const(<16 x i8> %162, i32 512)
>  %164 = fmul float %163, %105
>  %165 = fadd float %164, %152
>  %166 = call float @llvm.SI.load.const(<16 x i8> %162, i32 516)
>  %167 = fmul float %166, %105
>  %168 = fadd float %167, %156
>  %169 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %170 = load <16 x i8>, <16 x i8> addrspace(2)* %169, align 16, !invariant.load !0
>  %171 = call float @llvm.SI.load.const(<16 x i8> %170, i32 520)
>  %172 = fmul float %171, %105
>  %173 = fadd float %172, %158
>  %174 = call float @llvm.SI.load.const(<16 x i8> %170, i32 524)
>  %175 = fmul float %174, %105
>  %176 = fadd float %175, %160
>  %177 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %178 = load <16 x i8>, <16 x i8> addrspace(2)* %177, align 16, !invariant.load !0
>  %179 = call float @llvm.SI.load.const(<16 x i8> %178, i32 560)
>  %180 = fmul float %179, %106
>  %181 = fadd float %180, %165
>  %182 = call float @llvm.SI.load.const(<16 x i8> %178, i32 564)
>  %183 = fmul float %182, %106
>  %184 = fadd float %183, %168
>  %185 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %186 = load <16 x i8>, <16 x i8> addrspace(2)* %185, align 16, !invariant.load !0
>  %187 = call float @llvm.SI.load.const(<16 x i8> %186, i32 568)
>  %188 = fmul float %187, %106
>  %189 = fadd float %188, %173
>  %190 = call float @llvm.SI.load.const(<16 x i8> %186, i32 572)
>  %191 = fmul float %190, %106
>  %192 = fadd float %191, %176
>  %193 = fadd float %105, %104
>  %194 = fadd float %193, %106
>  %195 = call float @llvm.AMDGPU.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %196 = fsub float 1.000000e+00, %195
>  %197 = fadd float %189, %196
>  %198 = fadd float %192, %196
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 448)
>  %202 = fmul float %201, %104
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 452)
>  %204 = fmul float %203, %104
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 456)
>  %206 = fmul float %205, %104
>  %207 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %208 = load <16 x i8>, <16 x i8> addrspace(2)* %207, align 16, !invariant.load !0
>  %209 = call float @llvm.SI.load.const(<16 x i8> %208, i32 496)
>  %210 = fmul float %209, %105
>  %211 = fadd float %210, %202
>  %212 = call float @llvm.SI.load.const(<16 x i8> %208, i32 500)
>  %213 = fmul float %212, %105
>  %214 = fadd float %213, %204
>  %215 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %216 = load <16 x i8>, <16 x i8> addrspace(2)* %215, align 16, !invariant.load !0
>  %217 = call float @llvm.SI.load.const(<16 x i8> %216, i32 504)
>  %218 = fmul float %217, %105
>  %219 = fadd float %218, %206
>  %220 = call float @llvm.SI.load.const(<16 x i8> %216, i32 544)
>  %221 = fmul float %220, %106
>  %222 = fadd float %221, %211
>  %223 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %224 = load <16 x i8>, <16 x i8> addrspace(2)* %223, align 16, !invariant.load !0
>  %225 = call float @llvm.SI.load.const(<16 x i8> %224, i32 548)
>  %226 = fmul float %225, %106
>  %227 = fadd float %226, %214
>  %228 = call float @llvm.SI.load.const(<16 x i8> %224, i32 552)
>  %229 = fmul float %228, %106
>  %230 = fadd float %229, %219
>  %231 = fsub float 1.000000e+00, %195
>  %232 = fmul float %222, %195
>  %233 = fmul float %84, %231
>  %234 = fadd float %232, %233
>  %235 = fsub float 1.000000e+00, %195
>  %236 = fmul float %227, %195
>  %237 = fmul float %85, %235
>  %238 = fadd float %236, %237
>  %239 = fsub float 1.000000e+00, %195
>  %240 = fmul float %230, %195
>  %241 = fmul float %86, %239
>  %242 = fadd float %240, %241
>  %243 = fmul float %137, %184
>  %244 = fmul float %142, %184
>  %245 = fmul float %145, %184
>  %246 = fdiv float 1.000000e+00, %198, !fpmath !1
>  %247 = call float @llvm.pow.f32(float %243, float %246)
>  %248 = call float @llvm.pow.f32(float %244, float %246)
>  %249 = call float @llvm.pow.f32(float %245, float %246)
>  %250 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = call float @llvm.SI.load.const(<16 x i8> %252, i32 416)
>  %254 = fmul float %250, %253
>  %255 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %256 = call float @llvm.SI.load.const(<16 x i8> %252, i32 420)
>  %257 = fmul float %255, %256
>  %258 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %259 = load <16 x i8>, <16 x i8> addrspace(2)* %258, align 16, !invariant.load !0
>  %260 = call float @llvm.SI.load.const(<16 x i8> %259, i32 608)
>  %261 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %262 = fmul float %260, %261
>  %263 = call float @llvm.SI.load.const(<16 x i8> %259, i32 612)
>  %264 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %265 = fmul float %263, %264
>  %266 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %267 = load <16 x i8>, <16 x i8> addrspace(2)* %266, align 16, !invariant.load !0
>  %268 = call float @llvm.SI.load.const(<16 x i8> %267, i32 592)
>  %269 = fmul float %254, %268
>  %270 = call float @llvm.SI.load.const(<16 x i8> %267, i32 592)
>  %271 = fmul float %257, %270
>  %272 = call float @llvm.SI.load.const(<16 x i8> %267, i32 592)
>  %273 = fmul float %262, %272
>  %274 = fadd float %273, %269
>  %275 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %276 = load <16 x i8>, <16 x i8> addrspace(2)* %275, align 16, !invariant.load !0
>  %277 = call float @llvm.SI.load.const(<16 x i8> %276, i32 592)
>  %278 = fmul float %265, %277
>  %279 = fadd float %278, %271
>  %280 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %281 = load <8 x i32>, <8 x i32> addrspace(2)* %280, align 32, !invariant.load !0
>  %282 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %283 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %282, i64 0, i64 23, !amdgpu.uniform !0
>  %284 = load <4 x i32>, <4 x i32> addrspace(2)* %283, align 16, !invariant.load !0
>  %285 = extractelement <8 x i32> %281, i32 7
>  %286 = extractelement <4 x i32> %284, i32 0
>  %287 = and i32 %286, %285
>  %288 = insertelement <4 x i32> %284, i32 %287, i32 0
>  %289 = bitcast float %274 to i32
>  %290 = bitcast float %279 to i32
>  %291 = insertelement <2 x i32> undef, i32 %289, i32 0
>  %292 = insertelement <2 x i32> %291, i32 %290, i32 1
>  %293 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %292, <8 x i32> %281, <4 x i32> %288, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %294 = extractelement <4 x float> %293, i32 0
>  %295 = extractelement <4 x float> %293, i32 1
>  %296 = extractelement <4 x float> %293, i32 3
>  %297 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %298 = load <16 x i8>, <16 x i8> addrspace(2)* %297, align 16, !invariant.load !0
>  %299 = call float @llvm.SI.load.const(<16 x i8> %298, i32 616)
>  %300 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %301 = fmul float %299, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %298, i32 620)
>  %303 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %304 = fmul float %302, %303
>  %305 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %306 = load <16 x i8>, <16 x i8> addrspace(2)* %305, align 16, !invariant.load !0
>  %307 = call float @llvm.SI.load.const(<16 x i8> %306, i32 596)
>  %308 = fmul float %254, %307
>  %309 = call float @llvm.SI.load.const(<16 x i8> %306, i32 596)
>  %310 = fmul float %257, %309
>  %311 = call float @llvm.SI.load.const(<16 x i8> %306, i32 596)
>  %312 = fmul float %301, %311
>  %313 = fadd float %312, %308
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = call float @llvm.SI.load.const(<16 x i8> %315, i32 596)
>  %317 = fmul float %304, %316
>  %318 = fadd float %317, %310
>  %319 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %320 = load <8 x i32>, <8 x i32> addrspace(2)* %319, align 32, !invariant.load !0
>  %321 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %322 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %321, i64 0, i64 23, !amdgpu.uniform !0
>  %323 = load <4 x i32>, <4 x i32> addrspace(2)* %322, align 16, !invariant.load !0
>  %324 = extractelement <8 x i32> %320, i32 7
>  %325 = extractelement <4 x i32> %323, i32 0
>  %326 = and i32 %325, %324
>  %327 = insertelement <4 x i32> %323, i32 %326, i32 0
>  %328 = bitcast float %313 to i32
>  %329 = bitcast float %318 to i32
>  %330 = insertelement <2 x i32> undef, i32 %328, i32 0
>  %331 = insertelement <2 x i32> %330, i32 %329, i32 1
>  %332 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %331, <8 x i32> %320, <4 x i32> %327, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %333 = extractelement <4 x float> %332, i32 2
>  %334 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %335 = load <16 x i8>, <16 x i8> addrspace(2)* %334, align 16, !invariant.load !0
>  %336 = call float @llvm.SI.load.const(<16 x i8> %335, i32 604)
>  %337 = fmul float %333, %336
>  %338 = call float @llvm.SI.load.const(<16 x i8> %335, i32 600)
>  %339 = fmul float %295, %338
>  %340 = fsub float %339, %337
>  %341 = call float @llvm.AMDGPU.clamp.(float %340, float 0.000000e+00, float 1.000000e+00)
>  %342 = fmul float %87, %341
>  %343 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %344 = load <16 x i8>, <16 x i8> addrspace(2)* %343, align 16, !invariant.load !0
>  %345 = call float @llvm.SI.load.const(<16 x i8> %344, i32 576)
>  %346 = fsub float 1.000000e+00, %342
>  %347 = fmul float %345, %342
>  %348 = fmul float %234, %346
>  %349 = fadd float %347, %348
>  %350 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %351 = load <16 x i8>, <16 x i8> addrspace(2)* %350, align 16, !invariant.load !0
>  %352 = call float @llvm.SI.load.const(<16 x i8> %351, i32 580)
>  %353 = fsub float 1.000000e+00, %342
>  %354 = fmul float %352, %342
>  %355 = fmul float %238, %353
>  %356 = fadd float %354, %355
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = call float @llvm.SI.load.const(<16 x i8> %358, i32 584)
>  %360 = fsub float 1.000000e+00, %342
>  %361 = fmul float %359, %342
>  %362 = fmul float %242, %360
>  %363 = fadd float %361, %362
>  %364 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %365 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %366 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %367 = load <8 x i32>, <8 x i32> addrspace(2)* %366, align 32, !invariant.load !0
>  %368 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %369 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %368, i64 0, i64 27, !amdgpu.uniform !0
>  %370 = load <4 x i32>, <4 x i32> addrspace(2)* %369, align 16, !invariant.load !0
>  %371 = extractelement <8 x i32> %367, i32 7
>  %372 = extractelement <4 x i32> %370, i32 0
>  %373 = and i32 %372, %371
>  %374 = insertelement <4 x i32> %370, i32 %373, i32 0
>  %375 = bitcast float %364 to i32
>  %376 = bitcast float %365 to i32
>  %377 = insertelement <2 x i32> undef, i32 %375, i32 0
>  %378 = insertelement <2 x i32> %377, i32 %376, i32 1
>  %379 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %378, <8 x i32> %367, <4 x i32> %374, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %380 = extractelement <4 x float> %379, i32 3
>  %381 = fsub float 1.000000e+00, %181
>  %382 = fmul float %150, %181
>  %383 = fmul float %380, %381
>  %384 = fadd float %382, %383
>  %385 = fdiv float 1.000000e+00, %197, !fpmath !1
>  %386 = call float @llvm.pow.f32(float %384, float %385)
>  %387 = fmul float %87, %341
>  %388 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %389 = load <16 x i8>, <16 x i8> addrspace(2)* %388, align 16, !invariant.load !0
>  %390 = call float @llvm.SI.load.const(<16 x i8> %389, i32 588)
>  %391 = fsub float 1.000000e+00, %387
>  %392 = fmul float %390, %387
>  %393 = fmul float %386, %391
>  %394 = fadd float %392, %393
>  %395 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %396 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %397 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %398 = load <8 x i32>, <8 x i32> addrspace(2)* %397, align 32, !invariant.load !0
>  %399 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %400 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %399, i64 0, i64 19, !amdgpu.uniform !0
>  %401 = load <4 x i32>, <4 x i32> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = extractelement <8 x i32> %398, i32 7
>  %403 = extractelement <4 x i32> %401, i32 0
>  %404 = and i32 %403, %402
>  %405 = insertelement <4 x i32> %401, i32 %404, i32 0
>  %406 = bitcast float %395 to i32
>  %407 = bitcast float %396 to i32
>  %408 = insertelement <2 x i32> undef, i32 %406, i32 0
>  %409 = insertelement <2 x i32> %408, i32 %407, i32 1
>  %410 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %409, <8 x i32> %398, <4 x i32> %405, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %411 = extractelement <4 x float> %410, i32 0
>  %412 = extractelement <4 x float> %410, i32 1
>  %413 = extractelement <4 x float> %410, i32 3
>  %414 = fmul float %413, 2.000000e+00
>  %415 = fadd float %414, -1.000000e+00
>  %416 = fmul float %412, 2.000000e+00
>  %417 = fadd float %416, -1.000000e+00
>  %418 = fmul float %415, %415
>  %419 = fmul float %417, %417
>  %420 = fadd float %418, %419
>  %421 = call float @llvm.AMDGPU.clamp.(float %420, float 0.000000e+00, float 1.000000e+00)
>  %422 = fsub float 0x3FF00418A0000000, %421
>  %423 = call float @llvm.sqrt.f32(float %422)
>  %424 = fmul float %294, 2.000000e+00
>  %425 = fadd float %424, -1.000000e+00
>  %426 = fmul float %296, 2.000000e+00
>  %427 = fadd float %426, -1.000000e+00
>  %428 = fmul float %425, %87
>  %429 = fadd float %428, %415
>  %430 = fmul float %427, %87
>  %431 = fadd float %430, %417
>  %432 = fmul float %429, %429
>  %433 = fmul float %431, %431
>  %434 = fadd float %433, %432
>  %435 = fmul float %423, %423
>  %436 = fadd float %434, %435
>  %437 = call float @llvm.sqrt.f32(float %436)
>  %438 = fdiv float 1.000000e+00, %437, !fpmath !1
>  %439 = fmul float %429, %438
>  %440 = fmul float %431, %438
>  %441 = fmul float %423, %438
>  %442 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %443 = fmul float %442, %439
>  %444 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %445 = fmul float %444, %439
>  %446 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %447 = fmul float %446, %439
>  %448 = fmul float %23, %440
>  %449 = fadd float %448, %443
>  %450 = fmul float %24, %440
>  %451 = fadd float %450, %445
>  %452 = fmul float %25, %440
>  %453 = fadd float %452, %447
>  %454 = fmul float %63, %441
>  %455 = fadd float %454, %449
>  %456 = fmul float %65, %441
>  %457 = fadd float %456, %451
>  %458 = fmul float %67, %441
>  %459 = fadd float %458, %453
>  %460 = fmul float %455, %46
>  %461 = fmul float %457, %47
>  %462 = fadd float %461, %460
>  %463 = fmul float %459, %48
>  %464 = fadd float %462, %463
>  %465 = fmul float %464, %455
>  %466 = fmul float %464, %457
>  %467 = fmul float %464, %459
>  %468 = fmul float %465, 2.000000e+00
>  %469 = fsub float %468, %46
>  %470 = fmul float %466, 2.000000e+00
>  %471 = fsub float %470, %47
>  %472 = fmul float %467, 2.000000e+00
>  %473 = fsub float %472, %48
>  %474 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %475 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %476 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %477 = load <8 x i32>, <8 x i32> addrspace(2)* %476, align 32, !invariant.load !0
>  %478 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %479 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %478, i64 0, i64 31, !amdgpu.uniform !0
>  %480 = load <4 x i32>, <4 x i32> addrspace(2)* %479, align 16, !invariant.load !0
>  %481 = extractelement <8 x i32> %477, i32 7
>  %482 = extractelement <4 x i32> %480, i32 0
>  %483 = and i32 %482, %481
>  %484 = insertelement <4 x i32> %480, i32 %483, i32 0
>  %485 = bitcast float %474 to i32
>  %486 = bitcast float %475 to i32
>  %487 = insertelement <2 x i32> undef, i32 %485, i32 0
>  %488 = insertelement <2 x i32> %487, i32 %486, i32 1
>  %489 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %488, <8 x i32> %477, <4 x i32> %484, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %490 = extractelement <4 x float> %489, i32 0
>  %491 = extractelement <4 x float> %489, i32 1
>  %492 = extractelement <4 x float> %489, i32 2
>  %493 = extractelement <4 x float> %489, i32 3
>  %494 = fadd float %492, -5.000000e-01
>  %495 = fadd float %491, -5.000000e-01
>  %496 = fmul float %494, 2.000000e+00
>  %497 = fmul float %495, 2.000000e+00
>  %498 = fmul float %493, 2.000000e+00
>  %499 = fmul float %496, %496
>  %500 = fmul float %497, %497
>  %501 = fadd float %499, %500
>  %502 = call float @llvm.AMDGPU.clamp.(float %501, float 0.000000e+00, float 1.000000e+00)
>  %503 = fsub float 1.000000e+00, %502
>  %504 = call float @llvm.sqrt.f32(float %503)
>  %505 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %506 = fmul float %505, %496
>  %507 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %508 = fmul float %507, %496
>  %509 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %510 = fmul float %509, %496
>  %511 = fmul float %23, %497
>  %512 = fadd float %511, %506
>  %513 = fmul float %24, %497
>  %514 = fadd float %513, %508
>  %515 = fmul float %25, %497
>  %516 = fadd float %515, %510
>  %517 = fmul float %63, %504
>  %518 = fadd float %517, %512
>  %519 = fmul float %65, %504
>  %520 = fadd float %519, %514
>  %521 = fmul float %67, %504
>  %522 = fadd float %521, %516
>  %523 = fmul float %469, %518
>  %524 = fmul float %471, %520
>  %525 = fadd float %524, %523
>  %526 = fmul float %473, %522
>  %527 = fadd float %525, %526
>  %528 = call float @llvm.AMDGPU.clamp.(float %527, float 0.000000e+00, float 1.000000e+00)
>  %529 = fsub float %498, %528
>  %530 = call float @llvm.AMDGPU.clamp.(float %529, float 0.000000e+00, float 1.000000e+00)
>  %531 = call float @llvm.pow.f32(float %530, float 3.000000e+00)
>  %532 = call float @llvm.AMDGPU.clamp.(float %531, float 0.000000e+00, float 1.000000e+00)
>  %533 = fmul float %394, 0x3FD3333340000000
>  %534 = fsub float %532, %533
>  %535 = fsub float 1.000000e+00, %394
>  %536 = fmul float %394, 2.000000e+01
>  %537 = fadd float %536, %535
>  %538 = fmul float %534, %537
>  %539 = call float @llvm.AMDGPU.clamp.(float %538, float 0.000000e+00, float 1.000000e+00)
>  %540 = fmul float %532, %539
>  %541 = fmul float %498, 0x3FF19999A0000000
>  %542 = fmul float %490, %411
>  %543 = fmul float %469, %63
>  %544 = fsub float -0.000000e+00, %543
>  %545 = fmul float %471, %65
>  %546 = fsub float %544, %545
>  %547 = fmul float %473, %67
>  %548 = fsub float %546, %547
>  %549 = fadd float %548, 1.000000e+00
>  %550 = fmul float %46, %63
>  %551 = fmul float %47, %65
>  %552 = fadd float %551, %550
>  %553 = fmul float %48, %67
>  %554 = fadd float %552, %553
>  %555 = fsub float 1.000000e+00, %554
>  %556 = call float @llvm.AMDGPU.clamp.(float %555, float 0.000000e+00, float 1.000000e+00)
>  %557 = fsub float %549, %556
>  %558 = call float @llvm.AMDGPU.clamp.(float %557, float 0.000000e+00, float 1.000000e+00)
>  %559 = fsub float 1.000000e+00, %558
>  %560 = fmul float %559, %559
>  %561 = fmul float %540, %560
>  %562 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %563 = fmul float %63, 0x4007700140000000
>  %564 = fadd float %563, %562
>  %565 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %566 = fmul float %65, 0x4007700140000000
>  %567 = fadd float %566, %565
>  %568 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %569 = fmul float %67, 0x4007700140000000
>  %570 = fadd float %569, %568
>  %571 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %572 = load <16 x i8>, <16 x i8> addrspace(2)* %571, align 16, !invariant.load !0
>  %573 = call float @llvm.SI.load.const(<16 x i8> %572, i32 64)
>  %574 = fmul float %573, %564
>  %575 = call float @llvm.SI.load.const(<16 x i8> %572, i32 68)
>  %576 = fmul float %575, %564
>  %577 = call float @llvm.SI.load.const(<16 x i8> %572, i32 72)
>  %578 = fmul float %577, %564
>  %579 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %580 = load <16 x i8>, <16 x i8> addrspace(2)* %579, align 16, !invariant.load !0
>  %581 = call float @llvm.SI.load.const(<16 x i8> %580, i32 80)
>  %582 = fmul float %581, %567
>  %583 = fadd float %582, %574
>  %584 = call float @llvm.SI.load.const(<16 x i8> %580, i32 84)
>  %585 = fmul float %584, %567
>  %586 = fadd float %585, %576
>  %587 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %588 = load <16 x i8>, <16 x i8> addrspace(2)* %587, align 16, !invariant.load !0
>  %589 = call float @llvm.SI.load.const(<16 x i8> %588, i32 88)
>  %590 = fmul float %589, %567
>  %591 = fadd float %590, %578
>  %592 = call float @llvm.SI.load.const(<16 x i8> %588, i32 96)
>  %593 = fmul float %592, %570
>  %594 = fadd float %593, %583
>  %595 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %596 = load <16 x i8>, <16 x i8> addrspace(2)* %595, align 16, !invariant.load !0
>  %597 = call float @llvm.SI.load.const(<16 x i8> %596, i32 100)
>  %598 = fmul float %597, %570
>  %599 = fadd float %598, %586
>  %600 = call float @llvm.SI.load.const(<16 x i8> %596, i32 104)
>  %601 = fmul float %600, %570
>  %602 = fadd float %601, %591
>  %603 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %604 = load <16 x i8>, <16 x i8> addrspace(2)* %603, align 16, !invariant.load !0
>  %605 = call float @llvm.SI.load.const(<16 x i8> %604, i32 112)
>  %606 = fadd float %594, %605
>  %607 = call float @llvm.SI.load.const(<16 x i8> %604, i32 116)
>  %608 = fadd float %599, %607
>  %609 = call float @llvm.SI.load.const(<16 x i8> %604, i32 120)
>  %610 = fadd float %602, %609
>  %611 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %612 = load <16 x i8>, <16 x i8> addrspace(2)* %611, align 16, !invariant.load !0
>  %613 = call float @llvm.SI.load.const(<16 x i8> %612, i32 16)
>  %614 = fsub float -0.000000e+00, %613
>  %615 = call float @llvm.SI.load.const(<16 x i8> %612, i32 20)
>  %616 = fsub float -0.000000e+00, %615
>  %617 = call float @llvm.SI.load.const(<16 x i8> %612, i32 24)
>  %618 = fsub float -0.000000e+00, %617
>  %619 = fmul float %455, %614
>  %620 = fmul float %457, %616
>  %621 = fadd float %620, %619
>  %622 = fmul float %459, %618
>  %623 = fadd float %621, %622
>  %624 = call float @llvm.AMDGPU.clamp.(float %623, float 0.000000e+00, float 1.000000e+00)
>  %625 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %626 = load <8 x i32>, <8 x i32> addrspace(2)* %625, align 32, !invariant.load !0
>  %627 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %628 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %627, i64 0, i64 3, !amdgpu.uniform !0
>  %629 = load <4 x i32>, <4 x i32> addrspace(2)* %628, align 16, !invariant.load !0
>  %630 = extractelement <8 x i32> %626, i32 7
>  %631 = extractelement <4 x i32> %629, i32 0
>  %632 = and i32 %631, %630
>  %633 = insertelement <4 x i32> %629, i32 %632, i32 0
>  %634 = bitcast float %610 to i32
>  %635 = bitcast float %606 to i32
>  %636 = bitcast float %608 to i32
>  %637 = insertelement <4 x i32> undef, i32 %634, i32 0
>  %638 = insertelement <4 x i32> %637, i32 %635, i32 1
>  %639 = insertelement <4 x i32> %638, i32 %636, i32 2
>  %640 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %639, <8 x i32> %626, <4 x i32> %633, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %641 = extractelement <4 x float> %640, i32 0
>  %642 = fmul float %518, %614
>  %643 = fmul float %520, %616
>  %644 = fadd float %643, %642
>  %645 = fmul float %522, %618
>  %646 = fadd float %644, %645
>  %647 = call float @llvm.AMDGPU.clamp.(float %646, float 0.000000e+00, float 1.000000e+00)
>  %648 = fsub float %541, %647
>  %649 = call float @llvm.AMDGPU.clamp.(float %648, float 0.000000e+00, float 1.000000e+00)
>  %650 = fmul float %641, %641
>  %651 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %652 = load <16 x i8>, <16 x i8> addrspace(2)* %651, align 16, !invariant.load !0
>  %653 = call float @llvm.SI.load.const(<16 x i8> %652, i32 48)
>  %654 = fmul float %653, %650
>  %655 = call float @llvm.SI.load.const(<16 x i8> %652, i32 52)
>  %656 = fmul float %655, %650
>  %657 = call float @llvm.SI.load.const(<16 x i8> %652, i32 56)
>  %658 = fmul float %657, %650
>  %659 = fmul float %649, %649
>  %660 = call float @llvm.AMDGPU.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = fmul float %654, %660
>  %662 = fmul float %656, %660
>  %663 = fmul float %658, %660
>  %664 = fmul float %661, %411
>  %665 = fmul float %662, %411
>  %666 = fmul float %663, %411
>  %667 = fmul float %624, %664
>  %668 = fmul float %624, %665
>  %669 = fmul float %624, %666
>  %670 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %671 = load <8 x i32>, <8 x i32> addrspace(2)* %670, align 32, !invariant.load !0
>  %672 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %673 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %672, i64 0, i64 7, !amdgpu.uniform !0
>  %674 = load <4 x i32>, <4 x i32> addrspace(2)* %673, align 16, !invariant.load !0
>  %675 = extractelement <8 x i32> %671, i32 7
>  %676 = extractelement <4 x i32> %674, i32 0
>  %677 = and i32 %676, %675
>  %678 = insertelement <4 x i32> %674, i32 %677, i32 0
>  %679 = call float @llvm.amdgcn.cubetc(float %455, float %457, float %459)
>  %680 = call float @llvm.amdgcn.cubesc(float %455, float %457, float %459)
>  %681 = call float @llvm.amdgcn.cubema(float %455, float %457, float %459)
>  %682 = call float @llvm.amdgcn.cubeid(float %455, float %457, float %459)
>  %683 = call float @llvm.fabs.f32(float %681)
>  %684 = fdiv float 1.000000e+00, %683, !fpmath !1
>  %685 = fmul float %679, %684
>  %686 = fadd float %685, 1.500000e+00
>  %687 = fmul float %680, %684
>  %688 = fadd float %687, 1.500000e+00
>  %689 = bitcast float %688 to i32
>  %690 = bitcast float %686 to i32
>  %691 = bitcast float %682 to i32
>  %692 = insertelement <4 x i32> undef, i32 %689, i32 0
>  %693 = insertelement <4 x i32> %692, i32 %690, i32 1
>  %694 = insertelement <4 x i32> %693, i32 %691, i32 2
>  %695 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %694, <8 x i32> %671, <4 x i32> %678, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %696 = extractelement <4 x float> %695, i32 0
>  %697 = extractelement <4 x float> %695, i32 1
>  %698 = extractelement <4 x float> %695, i32 2
>  %699 = extractelement <4 x float> %695, i32 3
>  %700 = fmul float %455, %46
>  %701 = fmul float %457, %47
>  %702 = fadd float %701, %700
>  %703 = fmul float %459, %48
>  %704 = fadd float %702, %703
>  %705 = fmul float %704, %455
>  %706 = fmul float %704, %457
>  %707 = fmul float %704, %459
>  %708 = fmul float %705, 2.000000e+00
>  %709 = fsub float %708, %46
>  %710 = fmul float %706, 2.000000e+00
>  %711 = fsub float %710, %47
>  %712 = fmul float %707, 2.000000e+00
>  %713 = fsub float %712, %48
>  %714 = fsub float 1.000000e+00, %394
>  %715 = fmul float %714, 6.000000e+00
>  %716 = fmul float %46, %455
>  %717 = fmul float %47, %457
>  %718 = fadd float %717, %716
>  %719 = fmul float %48, %459
>  %720 = fadd float %718, %719
>  %721 = call float @llvm.AMDGPU.clamp.(float %720, float 0.000000e+00, float 1.000000e+00)
>  %722 = fsub float 1.000000e+00, %721
>  %723 = call float @llvm.pow.f32(float %722, float 5.000000e+00)
>  %724 = call float @llvm.maxnum.f32(float %394, float %247)
>  %725 = call float @llvm.maxnum.f32(float %394, float %248)
>  %726 = call float @llvm.maxnum.f32(float %394, float %249)
>  %727 = fsub float %724, %247
>  %728 = fsub float %725, %248
>  %729 = fsub float %726, %249
>  %730 = fmul float %723, %727
>  %731 = fadd float %730, %247
>  %732 = fmul float %723, %728
>  %733 = fadd float %732, %248
>  %734 = fmul float %723, %729
>  %735 = fadd float %734, %249
>  %736 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %737 = load <8 x i32>, <8 x i32> addrspace(2)* %736, align 32, !invariant.load !0
>  %738 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %739 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %738, i64 0, i64 11, !amdgpu.uniform !0
>  %740 = load <4 x i32>, <4 x i32> addrspace(2)* %739, align 16, !invariant.load !0
>  %741 = extractelement <8 x i32> %737, i32 7
>  %742 = extractelement <4 x i32> %740, i32 0
>  %743 = and i32 %742, %741
>  %744 = insertelement <4 x i32> %740, i32 %743, i32 0
>  %745 = call float @llvm.amdgcn.cubetc(float %709, float %711, float %713)
>  %746 = call float @llvm.amdgcn.cubesc(float %709, float %711, float %713)
>  %747 = call float @llvm.amdgcn.cubema(float %709, float %711, float %713)
>  %748 = call float @llvm.amdgcn.cubeid(float %709, float %711, float %713)
>  %749 = call float @llvm.fabs.f32(float %747)
>  %750 = fdiv float 1.000000e+00, %749, !fpmath !1
>  %751 = fmul float %745, %750
>  %752 = fadd float %751, 1.500000e+00
>  %753 = fmul float %746, %750
>  %754 = fadd float %753, 1.500000e+00
>  %755 = bitcast float %754 to i32
>  %756 = bitcast float %752 to i32
>  %757 = bitcast float %748 to i32
>  %758 = bitcast float %715 to i32
>  %759 = insertelement <4 x i32> undef, i32 %755, i32 0
>  %760 = insertelement <4 x i32> %759, i32 %756, i32 1
>  %761 = insertelement <4 x i32> %760, i32 %757, i32 2
>  %762 = insertelement <4 x i32> %761, i32 %758, i32 3
>  %763 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %762, <8 x i32> %737, <4 x i32> %744, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %764 = extractelement <4 x float> %763, i32 0
>  %765 = extractelement <4 x float> %763, i32 1
>  %766 = extractelement <4 x float> %763, i32 2
>  %767 = fmul float %731, %764
>  %768 = fmul float %733, %765
>  %769 = fmul float %735, %766
>  %770 = fmul float %247, 0x3FD55553E0000000
>  %771 = fmul float %248, 0x3FD55553E0000000
>  %772 = fadd float %771, %770
>  %773 = fmul float %249, 0x3FD55553E0000000
>  %774 = fadd float %772, %773
>  %775 = fsub float 1.000000e+00, %774
>  %776 = call float @llvm.AMDGPU.clamp.(float %775, float 0.000000e+00, float 1.000000e+00)
>  %777 = fmul float %696, %699
>  %778 = fmul float %697, %699
>  %779 = fmul float %698, %699
>  %780 = fmul float %777, 4.000000e+00
>  %781 = fmul float %778, 4.000000e+00
>  %782 = fmul float %779, 4.000000e+00
>  %783 = fmul float %776, %780
>  %784 = fmul float %776, %781
>  %785 = fmul float %776, %782
>  %786 = fmul float %247, 0x3FD55553E0000000
>  %787 = fmul float %248, 0x3FD55553E0000000
>  %788 = fadd float %787, %786
>  %789 = fmul float %249, 0x3FD55553E0000000
>  %790 = fadd float %788, %789
>  %791 = fsub float 1.000000e+00, %790
>  %792 = call float @llvm.AMDGPU.clamp.(float %791, float 0.000000e+00, float 1.000000e+00)
>  %793 = fmul float %667, %792
>  %794 = fmul float %668, %792
>  %795 = fmul float %669, %792
>  %796 = fmul float %783, %542
>  %797 = fadd float %796, %793
>  %798 = fmul float %784, %542
>  %799 = fadd float %798, %794
>  %800 = fmul float %785, %542
>  %801 = fadd float %800, %795
>  %802 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %803 = load <16 x i8>, <16 x i8> addrspace(2)* %802, align 16
>  %804 = fmul float %247, 0x3FD55553E0000000
>  %805 = fmul float %248, 0x3FD55553E0000000
>  %806 = fadd float %805, %804
>  %807 = fmul float %249, 0x3FD55553E0000000
>  %808 = fadd float %806, %807
>  %809 = fsub float 1.000000e+00, %808
>  br label %loop217
>
>loop217:                                          ; preds = %endif221, %main_body
>  %810 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %811 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %812 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %813 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %814 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %.011 = phi float [ %801, %main_body ], [ %897, %endif221 ]
>  %.010 = phi float [ %799, %main_body ], [ %895, %endif221 ]
>  %.09 = phi float [ %797, %main_body ], [ %893, %endif221 ]
>  %815 = icmp sgt i32 %810, 3
>  br i1 %815, label %endloop287, label %endif221
>
>endif221:                                         ; preds = %loop217
>  %816 = shl i32 %811, 5
>  %817 = shl i32 %811, 5
>  %818 = add i32 %817, 176
>  %819 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %818)
>  %820 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %821 = fsub float %819, %820
>  %822 = shl i32 %811, 5
>  %823 = add i32 %822, 180
>  %824 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %823)
>  %825 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %826 = fsub float %824, %825
>  %827 = add i32 %816, 184
>  %828 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %827)
>  %829 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %830 = fsub float %828, %829
>  %831 = fmul float %821, %821
>  %832 = fmul float %826, %826
>  %833 = fadd float %832, %831
>  %834 = fmul float %830, %830
>  %835 = fadd float %833, %834
>  %836 = call float @llvm.sqrt.f32(float %835)
>  %837 = fdiv float 1.000000e+00, %836, !fpmath !1
>  %838 = fmul float %821, %837
>  %839 = fmul float %826, %837
>  %840 = fmul float %830, %837
>  %841 = fmul float %838, %455
>  %842 = fmul float %839, %457
>  %843 = fadd float %842, %841
>  %844 = fmul float %840, %459
>  %845 = fadd float %843, %844
>  %846 = call float @llvm.AMDGPU.clamp.(float %845, float 0.000000e+00, float 1.000000e+00)
>  %847 = fmul float %838, %518
>  %848 = fmul float %839, %520
>  %849 = fadd float %848, %847
>  %850 = fmul float %840, %522
>  %851 = fadd float %849, %850
>  %852 = call float @llvm.AMDGPU.clamp.(float %851, float 0.000000e+00, float 1.000000e+00)
>  %853 = fsub float %541, %852
>  %854 = call float @llvm.AMDGPU.clamp.(float %853, float 0.000000e+00, float 1.000000e+00)
>  %855 = fmul float %854, %854
>  %856 = shl i32 %812, 1
>  %857 = or i32 %856, 1
>  %858 = fmul float %835, %837
>  %859 = shl i32 %813, 5
>  %860 = add i32 %859, 188
>  %861 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %860)
>  %862 = fmul float %858, %861
>  %863 = call float @llvm.AMDGPU.clamp.(float %862, float 0.000000e+00, float 1.000000e+00)
>  %864 = fsub float 1.000000e+00, %863
>  %865 = shl i32 %857, 4
>  %866 = add i32 %865, 176
>  %867 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %866)
>  %868 = fmul float %867, %864
>  %869 = shl i32 %857, 4
>  %870 = add i32 %869, 180
>  %871 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %870)
>  %872 = fmul float %871, %864
>  %873 = shl i32 %857, 4
>  %874 = add i32 %873, 184
>  %875 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %874)
>  %876 = fmul float %875, %864
>  %877 = fmul float %855, %855
>  %878 = call float @llvm.AMDGPU.clamp.(float %877, float 0.000000e+00, float 1.000000e+00)
>  %879 = fsub float 1.000000e+00, %837
>  %880 = fmul float %878, %879
>  %881 = fadd float %837, %880
>  %882 = fmul float %868, %881
>  %883 = fmul float %872, %881
>  %884 = fmul float %876, %881
>  %885 = fmul float %882, %411
>  %886 = fmul float %883, %411
>  %887 = fmul float %884, %411
>  %888 = fmul float %846, %885
>  %889 = fmul float %846, %886
>  %890 = fmul float %846, %887
>  %891 = call float @llvm.AMDGPU.clamp.(float %809, float 0.000000e+00, float 1.000000e+00)
>  %892 = fmul float %888, %891
>  %893 = fadd float %892, %.09
>  %894 = fmul float %889, %891
>  %895 = fadd float %894, %.010
>  %896 = fmul float %890, %891
>  %897 = fadd float %896, %.011
>  %898 = add i32 %814, 1
>  br label %loop217
>
>endloop287:                                       ; preds = %loop217
>  %899 = fmul float %767, %561
>  %900 = fmul float %768, %561
>  %901 = fmul float %769, %561
>  %902 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %903 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %904 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 18, !amdgpu.uniform !0
>  %905 = load <8 x i32>, <8 x i32> addrspace(2)* %904, align 32, !invariant.load !0
>  %906 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %907 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %906, i64 0, i64 39, !amdgpu.uniform !0
>  %908 = load <4 x i32>, <4 x i32> addrspace(2)* %907, align 16, !invariant.load !0
>  %909 = extractelement <8 x i32> %905, i32 7
>  %910 = extractelement <4 x i32> %908, i32 0
>  %911 = and i32 %910, %909
>  %912 = insertelement <4 x i32> %908, i32 %911, i32 0
>  %913 = bitcast float %902 to i32
>  %914 = bitcast float %903 to i32
>  %915 = insertelement <2 x i32> undef, i32 %913, i32 0
>  %916 = insertelement <2 x i32> %915, i32 %914, i32 1
>  %917 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %916, <8 x i32> %905, <4 x i32> %912, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %918 = extractelement <4 x float> %917, i32 0
>  %919 = extractelement <4 x float> %917, i32 1
>  %920 = extractelement <4 x float> %917, i32 2
>  %921 = fmul float %918, 0x3FD3333340000000
>  %922 = fmul float %919, 0x3FE2E147A0000000
>  %923 = fadd float %922, %921
>  %924 = fmul float %920, 0x3FBC28F5C0000000
>  %925 = fadd float %923, %924
>  %926 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %927 = load <16 x i8>, <16 x i8> addrspace(2)* %926, align 16, !invariant.load !0
>  %928 = call float @llvm.SI.load.const(<16 x i8> %927, i32 624)
>  %929 = fmul float %925, %928
>  %930 = fmul float %918, %929
>  %931 = fmul float %919, %929
>  %932 = fmul float %920, %929
>  %933 = fmul float %930, 3.200000e+01
>  %934 = fmul float %931, 3.200000e+01
>  %935 = fmul float %932, 3.200000e+01
>  %936 = fmul float %.09, %349
>  %937 = fadd float %936, %899
>  %938 = fmul float %.010, %356
>  %939 = fadd float %938, %900
>  %940 = fmul float %.011, %363
>  %941 = fadd float %940, %901
>  %942 = fadd float %937, %933
>  %943 = fadd float %939, %934
>  %944 = fadd float %941, %935
>  %945 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %946 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %947 = load <16 x i8>, <16 x i8> addrspace(2)* %946, align 16, !invariant.load !0
>  %948 = call float @llvm.SI.load.const(<16 x i8> %947, i32 12)
>  %949 = fsub float %945, %948
>  %950 = call float @llvm.maxnum.f32(float %949, float 0.000000e+00)
>  %951 = call float @llvm.SI.load.const(<16 x i8> %947, i32 28)
>  %952 = call float @llvm.SI.load.const(<16 x i8> %947, i32 12)
>  %953 = fsub float %951, %952
>  %954 = fadd float %953, 0x3F50624DE0000000
>  %955 = fdiv float 1.000000e+00, %954, !fpmath !1
>  %956 = fmul float %950, %955
>  %957 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %958 = load <16 x i8>, <16 x i8> addrspace(2)* %957, align 16, !invariant.load !0
>  %959 = call float @llvm.SI.load.const(<16 x i8> %958, i32 28)
>  %960 = call float @llvm.floor.f32(float %959)
>  %961 = fsub float %959, %960
>  %962 = fmul float %961, 8.000000e+00
>  %963 = call float @llvm.pow.f32(float %956, float %962)
>  %964 = call float @llvm.AMDGPU.clamp.(float %963, float 0.000000e+00, float 1.000000e+00)
>  %965 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %966 = fmul float %965, %964
>  %967 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %968 = load <16 x i8>, <16 x i8> addrspace(2)* %967, align 16, !invariant.load !0
>  %969 = call float @llvm.SI.load.const(<16 x i8> %968, i32 32)
>  %970 = fsub float 1.000000e+00, %966
>  %971 = fmul float %942, %966
>  %972 = fmul float %969, %970
>  %973 = fadd float %971, %972
>  %974 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %975 = load <16 x i8>, <16 x i8> addrspace(2)* %974, align 16, !invariant.load !0
>  %976 = call float @llvm.SI.load.const(<16 x i8> %975, i32 36)
>  %977 = fsub float 1.000000e+00, %966
>  %978 = fmul float %943, %966
>  %979 = fmul float %976, %977
>  %980 = fadd float %978, %979
>  %981 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %982 = load <16 x i8>, <16 x i8> addrspace(2)* %981, align 16, !invariant.load !0
>  %983 = call float @llvm.SI.load.const(<16 x i8> %982, i32 40)
>  %984 = fsub float 1.000000e+00, %966
>  %985 = fmul float %944, %966
>  %986 = fmul float %983, %984
>  %987 = fadd float %985, %986
>  %988 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %989 = bitcast float %5 to i32
>  %990 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %989, 10
>  %991 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %990, float %973, 11
>  %992 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %991, float %980, 12
>  %993 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %992, float %987, 13
>  %994 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %993, float %988, 14
>  %995 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %994, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %995
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>	v_mov_b32_e32 v10, v4          ; 7E140304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                     ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                   ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                   ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                  ; C08A0B14
>	s_load_dwordx4 s[24:27], s[10:11], 0x18                  ; C08C0B18
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[21:24], v4, s[4:7], 0 idxen    ; E00C2000 80011504
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen  ; E00C2000 80030B05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen    ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	buffer_load_format_xyzw v[14:17], v9, s[20:23], 0 idxen  ; E00C2000 80050E09
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	buffer_load_format_xyzw v[16:19], v10, s[24:27], 0 idxen ; E00C2000 8006100A
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                       ; C0800300
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x10                     ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                     ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                     ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x380                    ; C20380FF 00000380
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v27, s4                                    ; 7E360204
>	v_mov_b32_e32 v26, s5                                    ; 7E340205
>	v_mov_b32_e32 v25, s6                                    ; 7E320206
>	s_cmp_eq_u32 s7, -1                                      ; BF06C107
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                     ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x20                     ; C2020120
>	s_buffer_load_dword s5, s[0:3], 0x21                     ; C2028121
>	s_buffer_load_dword s6, s[0:3], 0x22                     ; C2030122
>	s_buffer_load_dword s7, s[0:3], 0x23                     ; C2038123
>	s_buffer_load_dword s8, s[0:3], 0x24                     ; C2040124
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v0, s4                                     ; 7E000204
>	v_mov_b32_e32 v1, s5                                     ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x25                     ; C2020125
>	s_buffer_load_dword s5, s[0:3], 0x26                     ; C2028126
>	v_mov_b32_e32 v8, s6                                     ; 7E100206
>	v_sub_f32_e32 v28, s7, v27                               ; 08383607
>	v_mov_b32_e32 v7, s8                                     ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x27                     ; C2030127
>	s_buffer_load_dword s7, s[0:3], 0x28                     ; C2038128
>	s_buffer_load_dword s8, s[0:3], 0x29                     ; C2040129
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v9, s4                                     ; 7E120204
>	v_mov_b32_e32 v10, s5                                    ; 7E140205
>	s_buffer_load_dword s4, s[0:3], 0x2a                     ; C202012A
>	s_buffer_load_dword s5, s[0:3], 0x2b                     ; C202812B
>	v_sub_f32_e32 v29, s6, v26                               ; 083A3406
>	v_mov_b32_e32 v18, s7                                    ; 7E240207
>	v_mov_b32_e32 v19, s8                                    ; 7E260208
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v20, s4                                    ; 7E280204
>	v_sub_f32_e32 v30, s5, v25                               ; 083C3205
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                    ; C0820B10
>	s_movk_i32 s15, 0x8c                                     ; B00F008C
>	s_movk_i32 s14, 0x80                                     ; B00E0080
>	s_movk_i32 s12, 0x84                                     ; B00C0084
>	s_movk_i32 s13, 0x88                                     ; B00D0088
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[35:38], v8, s[4:7], 0 idxen    ; E00C2000 80012308
>	s_buffer_load_dword s4, s[0:3], 0x384                    ; C20200FF 00000384
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                      ; BF06C104
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v35                                ; 7E001123
>	v_mul_lo_i32 v20, v0, 48                                 ; D2D60014 00016100
>	v_add_i32_e32 v9, vcc, s15, v20                          ; 4A12280F
>	v_add_i32_e32 v0, vcc, s14, v20                          ; 4A00280E
>	v_add_i32_e32 v1, vcc, s12, v20                          ; 4A02280C
>	v_add_i32_e32 v8, vcc, s13, v20                          ; 4A10280D
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v0, v0, s[0:3], 0 offen                ; E0301000 80000000
>	buffer_load_dword v1, v1, s[0:3], 0 offen                ; E0301000 80000101
>	buffer_load_dword v8, v8, s[0:3], 0 offen                ; E0301000 80000808
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_subrev_f32_e32 v28, v27, v9                            ; 0A38131B
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                     ; BF850000
>	v_add_i32_e32 v9, vcc, 0x9c, v20                         ; 4A1228FF 0000009C
>	v_add_i32_e32 v29, vcc, 0xac, v20                        ; 4A3A28FF 000000AC
>	v_add_i32_e32 v10, vcc, 0x94, v20                        ; 4A1428FF 00000094
>	v_add_i32_e32 v18, vcc, 0x98, v20                        ; 4A2428FF 00000098
>	v_add_i32_e32 v7, vcc, 0x90, v20                         ; 4A0E28FF 00000090
>	v_add_i32_e32 v19, vcc, 0xa4, v20                        ; 4A2628FF 000000A4
>	buffer_load_dword v30, v9, s[0:3], 0 offen               ; E0301000 80001E09
>	buffer_load_dword v9, v10, s[0:3], 0 offen               ; E0301000 8000090A
>	buffer_load_dword v10, v18, s[0:3], 0 offen              ; E0301000 80000A12
>	v_add_i32_e32 v18, vcc, 0xa0, v20                        ; 4A2428FF 000000A0
>	v_add_i32_e32 v20, vcc, 0xa8, v20                        ; 4A2828FF 000000A8
>	buffer_load_dword v31, v29, s[0:3], 0 offen              ; E0301000 80001F1D
>	buffer_load_dword v7, v7, s[0:3], 0 offen                ; E0301000 80000707
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	s_waitcnt vmcnt(7)                                       ; BF8C0F77
>	v_subrev_f32_e32 v29, v26, v30                           ; 0A3A3D1A
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_subrev_f32_e32 v30, v25, v31                           ; 0A3C3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                     ; C0820B0C
>	s_movk_i32 s10, 0x90                                     ; B00A0090
>	s_movk_i32 s9, 0x94                                      ; B0090094
>	s_movk_i32 s8, 0x98                                      ; B0080098
>	s_movk_i32 s11, 0x9c                                     ; B00B009C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[31:34], v7, s[4:7], 0 idxen    ; E00C2000 80011F07
>	v_cvt_i32_f32_e32 v7, v36                                ; 7E0E1124
>	s_movk_i32 s4, 0xac                                      ; B00400AC
>	v_add_i32_e32 v9, vcc, s10, v20                          ; 4A12280A
>	v_add_i32_e32 v10, vcc, s9, v20                          ; 4A142809
>	v_add_i32_e32 v18, vcc, s8, v20                          ; 4A242808
>	v_add_i32_e32 v19, vcc, s4, v20                          ; 4A262804
>	v_mul_lo_i32 v35, v7, 48                                 ; D2D60023 00016107
>	v_add_i32_e32 v7, vcc, s11, v20                          ; 4A0E280B
>	s_movk_i32 s6, 0xa4                                      ; B00600A4
>	s_movk_i32 s7, 0xa0                                      ; B00700A0
>	s_movk_i32 s5, 0xa8                                      ; B00500A8
>	v_add_i32_e32 v30, vcc, s6, v20                          ; 4A3C2806
>	buffer_load_dword v29, v7, s[0:3], 0 offen               ; E0301000 80001D07
>	v_add_i32_e32 v7, vcc, s7, v20                           ; 4A0E2807
>	v_add_i32_e32 v20, vcc, s5, v20                          ; 4A282805
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v10, v10, s[0:3], 0 offen              ; E0301000 80000A0A
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	buffer_load_dword v36, v7, s[0:3], 0 offen               ; E0301000 80002407
>	buffer_load_dword v30, v30, s[0:3], 0 offen              ; E0301000 80001E1E
>	s_waitcnt vmcnt(8)                                       ; BF8C0F78
>	v_mul_f32_e32 v0, v31, v0                                ; 1000011F
>	v_mul_f32_e32 v1, v31, v1                                ; 1002031F
>	v_mul_f32_e32 v8, v31, v8                                ; 1010111F
>	v_mul_f32_e32 v28, v31, v28                              ; 1038391F
>	s_waitcnt vmcnt(6)                                       ; BF8C0F76
>	v_subrev_f32_e32 v39, v25, v19                           ; 0A4E2719
>	s_waitcnt vmcnt(5)                                       ; BF8C0F75
>	v_mul_f32_e32 v7, v31, v9                                ; 100E131F
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_mul_f32_e32 v9, v31, v10                               ; 1012151F
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_mul_f32_e32 v10, v31, v18                              ; 1014251F
>	v_subrev_f32_e32 v18, v26, v29                           ; 0A243B1A
>	v_mul_f32_e32 v29, v31, v18                              ; 103A251F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mul_f32_e32 v19, v31, v30                              ; 10263D1F
>	v_mul_f32_e32 v18, v31, v36                              ; 1024491F
>	v_mul_f32_e32 v20, v31, v20                              ; 1028291F
>	v_mul_f32_e32 v30, v31, v39                              ; 103C4F1F
>	v_add_i32_e32 v31, vcc, s15, v35                         ; 4A3E460F
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v27, v31                           ; 0A3E3F1B
>	v_mac_f32_e32 v28, v32, v31                              ; 3E383F20
>	v_add_i32_e32 v31, vcc, s11, v35                         ; 4A3E460B
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v26, v31                           ; 0A3E3F1A
>	v_mac_f32_e32 v29, v32, v31                              ; 3E3A3F20
>	v_add_i32_e32 v31, vcc, s14, v35                         ; 4A3E460E
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v32, v31                               ; 3E003F20
>	v_add_i32_e32 v31, vcc, s12, v35                         ; 4A3E460C
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_buffer_load_dword s12, s[0:3], 0x388                   ; C20600FF 00000388
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                      ; BF06800C
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v32, v31                               ; 3E023F20
>	v_add_i32_e32 v31, vcc, s13, v35                         ; 4A3E460D
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v31                               ; 3E103F20
>	v_add_i32_e32 v31, vcc, s10, v35                         ; 4A3E460A
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v31                               ; 3E0E3F20
>	v_add_i32_e32 v31, vcc, s9, v35                          ; 4A3E4609
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v31                               ; 3E123F20
>	v_add_i32_e32 v31, vcc, s8, v35                          ; 4A3E4608
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v32, v31                              ; 3E143F20
>	v_add_i32_e32 v31, vcc, s7, v35                          ; 4A3E4607
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v32, v31                              ; 3E243F20
>	v_add_i32_e32 v31, vcc, s6, v35                          ; 4A3E4606
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v32, v31                              ; 3E263F20
>	v_add_i32_e32 v31, vcc, s5, v35                          ; 4A3E4605
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v32, v31                              ; 3E283F20
>	v_add_i32_e32 v31, vcc, s4, v35                          ; 4A3E4604
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	v_mac_f32_e32 v30, v32, v31                              ; 3E3C3F20
>	s_cbranch_scc1 BB0_6                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v37                               ; 7E3E1125
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0x80, v31                        ; 4A403EFF 00000080
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v33, v32                               ; 3E004121
>	v_add_i32_e32 v32, vcc, 0x8c, v31                        ; 4A403EFF 0000008C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v33, v32                              ; 3E384121
>	v_add_i32_e32 v32, vcc, s11, v31                         ; 4A403E0B
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v33, v32                              ; 3E3A4121
>	v_add_i32_e32 v32, vcc, 0x84, v31                        ; 4A403EFF 00000084
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v33, v32                               ; 3E024121
>	v_add_i32_e32 v32, vcc, 0x88, v31                        ; 4A403EFF 00000088
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v33, v32                               ; 3E104121
>	v_add_i32_e32 v32, vcc, s10, v31                         ; 4A403E0A
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v33, v32                               ; 3E0E4121
>	v_add_i32_e32 v32, vcc, s9, v31                          ; 4A403E09
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v33, v32                               ; 3E124121
>	v_add_i32_e32 v32, vcc, s8, v31                          ; 4A403E08
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v33, v32                              ; 3E144121
>	v_add_i32_e32 v32, vcc, s7, v31                          ; 4A403E07
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v33, v32                              ; 3E244121
>	v_add_i32_e32 v32, vcc, s6, v31                          ; 4A403E06
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v33, v32                              ; 3E264121
>	v_add_i32_e32 v32, vcc, s5, v31                          ; 4A403E05
>	v_add_i32_e32 v31, vcc, s4, v31                          ; 4A3E3E04
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v33, v32                              ; 3E284121
>	v_mac_f32_e32 v30, v33, v31                              ; 3E3C3F21
>	s_buffer_load_dword s4, s[0:3], 0x38c                    ; C20200FF 0000038C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                       ; BF068004
>	s_cbranch_scc1 BB0_8                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v38                               ; 7E3E1126
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0x80, v31                        ; 4A403EFF 00000080
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v34, v32                               ; 3E004122
>	v_add_i32_e32 v32, vcc, 0x8c, v31                        ; 4A403EFF 0000008C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v34, v32                              ; 3E384122
>	v_add_i32_e32 v32, vcc, 0x9c, v31                        ; 4A403EFF 0000009C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v34, v32                              ; 3E3A4122
>	v_add_i32_e32 v32, vcc, 0x84, v31                        ; 4A403EFF 00000084
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v34, v32                               ; 3E024122
>	v_add_i32_e32 v32, vcc, 0x88, v31                        ; 4A403EFF 00000088
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v34, v32                               ; 3E104122
>	v_add_i32_e32 v32, vcc, 0x90, v31                        ; 4A403EFF 00000090
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v34, v32                               ; 3E0E4122
>	v_add_i32_e32 v32, vcc, 0x94, v31                        ; 4A403EFF 00000094
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v34, v32                               ; 3E124122
>	v_add_i32_e32 v32, vcc, 0x98, v31                        ; 4A403EFF 00000098
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v34, v32                              ; 3E144122
>	v_add_i32_e32 v32, vcc, 0xa0, v31                        ; 4A403EFF 000000A0
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v34, v32                              ; 3E244122
>	v_add_i32_e32 v32, vcc, 0xa4, v31                        ; 4A403EFF 000000A4
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v34, v32                              ; 3E264122
>	v_add_i32_e32 v32, vcc, 0xa8, v31                        ; 4A403EFF 000000A8
>	v_add_i32_e32 v31, vcc, 0xac, v31                        ; 4A3E3EFF 000000AC
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v34, v32                              ; 3E284122
>	v_mac_f32_e32 v30, v34, v31                              ; 3E3C3F22
>	v_mul_f32_e32 v31, v1, v22                               ; 103E2D01
>	v_mac_f32_e32 v31, v0, v21                               ; 3E3E2B00
>	v_mac_f32_e32 v31, v8, v23                               ; 3E3E2F08
>	v_mac_f32_e32 v31, v28, v24                              ; 3E3E311C
>	v_mul_f32_e32 v28, v9, v22                               ; 10382D09
>	v_mac_f32_e32 v28, v7, v21                               ; 3E382B07
>	v_mac_f32_e32 v28, v10, v23                              ; 3E382F0A
>	s_buffer_load_dword s4, s[0:3], 0x3                      ; C2020103
>	v_mac_f32_e32 v28, v29, v24                              ; 3E38311D
>	v_mul_f32_e32 v29, v19, v22                              ; 103A2D13
>	v_mul_f32_e32 v22, 0, v22                                ; 102C2C80
>	v_mac_f32_e32 v29, v18, v21                              ; 3E3A2B12
>	v_mac_f32_e32 v22, 0, v21                                ; 3E2C2A80
>	v_mac_f32_e32 v29, v20, v23                              ; 3E3A2F14
>	v_mac_f32_e32 v22, 0, v23                                ; 3E2C2E80
>	v_add_f32_e32 v21, v24, v22                              ; 062A2D18
>	v_mac_f32_e32 v29, v30, v24                              ; 3E3A311E
>	v_add_f32_e32 v22, v27, v31                              ; 062C3F1B
>	s_buffer_load_dword s6, s[0:3], 0x7                      ; C2030107
>	v_add_f32_e32 v24, v25, v29                              ; 06303B19
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v25, s4, v22                               ; 10322C04
>	s_buffer_load_dword s4, s[0:3], 0xb                      ; C202010B
>	v_add_f32_e32 v23, v26, v28                              ; 062E391A
>	v_mac_f32_e32 v25, s6, v23                               ; 3E322E06
>	s_buffer_load_dword s16, s[0:3], 0x2                     ; C2080102
>	s_buffer_load_dword s18, s[0:3], 0x6                     ; C2090106
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v25, s4, v24                               ; 3E323004
>	s_buffer_load_dword s4, s[0:3], 0xf                      ; C202010F
>	s_buffer_load_dword s19, s[0:3], 0xa                     ; C209810A
>	s_buffer_load_dword s10, s[0:3], 0xe                     ; C205010E
>	s_buffer_load_dword s12, s[0:3], 0x18                    ; C2060118
>	v_add_f32_e32 v11, v11, v11                              ; 0616170B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v25, s4, v21                               ; 3E322A04
>	s_buffer_load_dword s4, s[0:3], 0x1f                     ; C202011F
>	v_add_f32_e32 v3, v3, v3                                 ; 06060703
>	s_buffer_load_dword s13, s[0:3], 0x19                    ; C2068119
>	v_mad_f32 v12, 2.0, v12, -1.0                            ; D282000C 03CE18F4
>	v_mad_f32 v4, 2.0, v4, -1.0                              ; D2820004 03CE08F4
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v26, s4, v25                               ; 10343204
>	exp 15, 32, 0, 0, 0, v22, v23, v24, v26                  ; F800020F 1A181716
>	exp 15, 33, 0, 0, 0, v14, v15, v16, v17                  ; F800021F 11100F0E
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>	v_mad_f32 v14, v11, v0, -v0                              ; D282000E 8402010B
>	v_mad_f32 v0, v3, v0, -v0                                ; D2820000 84020103
>	v_mad_f32 v15, v11, v7, -v7                              ; D282000F 841E0F0B
>	v_mac_f32_e32 v14, v1, v12                               ; 3E1C1901
>	v_mac_f32_e32 v0, v1, v4                                 ; 3E000901
>	v_mad_f32 v1, v3, v7, -v7                                ; D2820001 841E0F03
>	v_mul_f32_e32 v7, s16, v22                               ; 100E2C10
>	v_mac_f32_e32 v7, s18, v23                               ; 3E0E2E12
>	v_mac_f32_e32 v7, s19, v24                               ; 3E0E3013
>	v_mad_f32 v13, 2.0, v13, -1.0                            ; D282000D 03CE1AF4
>	v_mad_f32 v5, 2.0, v5, -1.0                              ; D2820005 03CE0AF4
>	v_mac_f32_e32 v14, v8, v13                               ; 3E1C1B08
>	v_mac_f32_e32 v0, v8, v5                                 ; 3E000B08
>	v_mac_f32_e32 v7, s10, v21                               ; 3E0E2A0A
>	v_mov_b32_e32 v8, s12                                    ; 7E10020C
>	v_mac_f32_e32 v8, s13, v7                                ; 3E100E0D
>	v_add_f32_e64 v8, v8, 0 clamp                            ; D2060808 00010108
>	s_buffer_load_dword s14, s[0:3], 0x1a                    ; C207011A
>	v_log_f32_e32 v8, v8                                     ; 7E104F08
>	s_buffer_load_dword s5, s[0:3], 0x4                      ; C2028104
>	s_buffer_load_dword s7, s[0:3], 0x8                      ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                      ; C2040109
>	s_buffer_load_dword s6, s[0:3], 0xc                      ; C203010C
>	s_buffer_load_dword s9, s[0:3], 0xd                      ; C204810D
>	s_buffer_load_dword s11, s[0:3], 0x15                    ; C2058115
>	s_buffer_load_dword s4, s[0:3], 0x0                      ; C2020100
>	s_buffer_load_dword s15, s[0:3], 0x1                     ; C2078101
>	s_buffer_load_dword s17, s[0:3], 0x5                     ; C2088105
>	s_buffer_load_dword s0, s[0:3], 0x1b                     ; C200011B
>	v_mac_f32_e32 v15, v9, v12                               ; 3E1E1909
>	v_mac_f32_e32 v1, v9, v4                                 ; 3E020909
>	v_mad_f32 v11, v11, v18, -v18                            ; D282000B 844A250B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_legacy_f32_e32 v8, s14, v8                         ; 0E10100E
>	v_mac_f32_e32 v11, v19, v12                              ; 3E161913
>	v_mad_f32 v3, v3, v18, -v18                              ; D2820003 844A2503
>	v_mac_f32_e32 v15, v10, v13                              ; 3E1E1B0A
>	v_mac_f32_e32 v1, v10, v5                                ; 3E020B0A
>	v_exp_f32_e32 v8, v8                                     ; 7E104B08
>	v_sub_f32_e64 v10, 1.0, s0                               ; D208000A 000000F2
>	v_mac_f32_e32 v3, v19, v4                                ; 3E060913
>	v_mac_f32_e32 v10, s0, v8                                ; 3E141000
>	v_mac_f32_e32 v11, v20, v13                              ; 3E161B14
>	v_mac_f32_e32 v3, v20, v5                                ; 3E060B14
>	v_mov_b32_e32 v9, 0x3dcccccd                             ; 7E1202FF 3DCCCCCD
>	v_mul_f32_e32 v8, v1, v11                                ; 10101701
>	v_mul_f32_e32 v10, v10, v10                              ; 1014150A
>	v_mul_f32_e32 v4, s4, v22                                ; 10082C04
>	v_mul_f32_e32 v5, s15, v22                               ; 100A2C0F
>	v_mul_f32_e32 v12, v3, v14                               ; 10181D03
>	v_mul_f32_e32 v13, v0, v15                               ; 101A1F00
>	v_add_f32_e32 v6, v6, v6                                 ; 060C0D06
>	v_mad_f32 v8, v15, v3, -v8                               ; D2820008 8422070F
>	v_mul_f32_e32 v9, s11, v9                                ; 1012120B
>	exp 15, 34, 0, 0, 0, v10, v0, v0, v0                     ; F800022F 0000000A
>	v_mac_f32_e32 v4, s5, v23                                ; 3E082E05
>	v_mac_f32_e32 v5, s17, v23                               ; 3E0A2E11
>	v_mad_f32 v12, v11, v0, -v12                             ; D282000C 8432010B
>	v_mad_f32 v13, v14, v1, -v13                             ; D282000D 8436030E
>	v_mad_f32 v8, v6, v8, -v8                                ; D2820008 84221106
>	exp 15, 35, 0, 0, 0, v14, v15, v11, v9                   ; F800023F 090B0F0E
>	v_mac_f32_e32 v4, s7, v24                                ; 3E083007
>	v_mac_f32_e32 v5, s8, v24                                ; 3E0A3008
>	v_mad_f32 v12, v6, v12, -v12                             ; D282000C 84321906
>	v_mad_f32 v6, v6, v13, -v13                              ; D2820006 84361B06
>	exp 15, 36, 0, 0, 0, v0, v1, v3, v8                      ; F800024F 08030100
>	v_mac_f32_e32 v4, s6, v21                                ; 3E082A06
>	v_mac_f32_e32 v5, s9, v21                                ; 3E0A2A09
>	exp 15, 37, 0, 0, 0, v12, v6, v0, v0                     ; F800025F 0000060C
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v25                     ; F80008CF 19070504
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2244 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v26, v4, 3, 4, [m0]                             ; C8681304
>	v_interp_p2_f32 v26, [v26], v5, 3, 4, [m0]                      ; C8691305
>	v_interp_p1_f32 v27, v4, 0, 5, [m0]                             ; C86C1404
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v27, [v27], v5, 0, 5, [m0]                      ; C86D1405
>	v_interp_p1_f32 v28, v4, 1, 5, [m0]                             ; C8701504
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v28, [v28], v5, 1, 5, [m0]                      ; C8711505
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v29, s12, v1                                      ; 083A020C
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_interp_p1_f32 v12, v4, 0, 3, [m0]                             ; C8300C04
>	v_sub_f32_e32 v30, s13, v0                                      ; 083C000D
>	v_mul_f32_e32 v7, v29, v29                                      ; 100E3B1D
>	s_load_dwordx8 s[44:51], s[4:5], 0x30                           ; C0D60530
>	s_load_dwordx4 s[52:55], s[4:5], 0x3c                           ; C09A053C
>	v_interp_p2_f32 v12, [v12], v5, 0, 3, [m0]                      ; C8310C05
>	v_interp_p1_f32 v21, v4, 1, 3, [m0]                             ; C8540D04
>	v_sub_f32_e32 v31, s14, v2                                      ; 083E040E
>	v_mac_f32_e32 v7, v30, v30                                      ; 3E0E3D1E
>	v_mac_f32_e32 v7, v31, v31                                      ; 3E0E3F1F
>	v_interp_p2_f32 v21, [v21], v5, 1, 3, [m0]                      ; C8550D05
>	v_interp_p1_f32 v22, v4, 2, 3, [m0]                             ; C8580E04
>	v_rsq_f32_e32 v32, v7                                           ; 7E405D07
>	v_interp_p2_f32 v22, [v22], v5, 2, 3, [m0]                      ; C8590E05
>	v_interp_p1_f32 v7, v6, 0, 1, [m0]                              ; C81C0406
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]                        ; C81D0403
>	v_interp_p1_f32 v8, v6, 1, 1, [m0]                              ; C8200506
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]                        ; C8210503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[17:20], v[7:8], s[44:51], s[52:55] dmask:0xf     ; F0800F00 01AB1107
>	s_load_dwordx8 s[44:51], s[4:5], 0x80                           ; C0D60580
>	s_load_dwordx4 s[52:55], s[4:5], 0x8c                           ; C09A058C
>	s_buffer_load_dword s65, s[0:3], 0x6f                           ; C220816F
>	s_buffer_load_dword s64, s[0:3], 0x6e                           ; C220016E
>	s_buffer_load_dword s66, s[0:3], 0x72                           ; C2210172
>	v_mul_f32_e32 v23, v12, v12                                     ; 102E190C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[14:16], v[7:8], s[44:51], s[52:55] dmask:0x7     ; F0800700 01AB0E07
>	s_buffer_load_dword s44, s[0:3], 0x6c                           ; C216016C
>	s_buffer_load_dword s50, s[0:3], 0x78                           ; C2190178
>	s_buffer_load_dword s51, s[0:3], 0x7b                           ; C219817B
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v38, s65, v14                                     ; 104C1C41
>	s_buffer_load_dword s45, s[0:3], 0x6d                           ; C216816D
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v35, s44, v14                                     ; 10461C2C
>	v_mac_f32_e32 v35, s50, v15                                     ; 3E461E32
>	v_mac_f32_e32 v38, s51, v15                                     ; 3E4C1E33
>	s_buffer_load_dword s51, s[0:3], 0x87                           ; C2198187
>	s_buffer_load_dword s44, s[0:3], 0x79                           ; C2160179
>	s_buffer_load_dword s50, s[0:3], 0x7a                           ; C219017A
>	v_mul_f32_e32 v36, s45, v14                                     ; 10481C2D
>	v_mul_f32_e32 v37, s64, v14                                     ; 104A1C40
>	s_buffer_load_dword s48, s[0:3], 0x76                           ; C2180176
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v36, s44, v15                                     ; 3E481E2C
>	v_mac_f32_e32 v37, s50, v15                                     ; 3E4A1E32
>	s_buffer_load_dword s44, s[0:3], 0x84                           ; C2160184
>	s_buffer_load_dword s45, s[0:3], 0x85                           ; C2168185
>	s_buffer_load_dword s50, s[0:3], 0x86                           ; C2190186
>	v_mac_f32_e32 v38, s51, v16                                     ; 3E4C2033
>	s_buffer_load_dword s51, s[0:3], 0x82                           ; C2198182
>	s_buffer_load_dword s49, s[0:3], 0x77                           ; C2188177
>	s_buffer_load_dword s55, s[0:3], 0x71                           ; C21B8171
>	v_mul_f32_e32 v41, s48, v14                                     ; 10521C30
>	s_buffer_load_dword s46, s[0:3], 0x74                           ; C2170174
>	s_buffer_load_dword s47, s[0:3], 0x75                           ; C2178175
>	s_buffer_load_dword s53, s[0:3], 0x7d                           ; C21A817D
>	s_buffer_load_dword s65, s[0:3], 0x83                           ; C2208183
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v35, s44, v16                                     ; 3E46202C
>	v_mac_f32_e32 v36, s45, v16                                     ; 3E48202D
>	v_mac_f32_e32 v37, s50, v16                                     ; 3E4A2032
>	v_mac_f32_e32 v41, s51, v15                                     ; 3E521E33
>	s_buffer_load_dword s50, s[0:3], 0x7e                           ; C219017E
>	s_buffer_load_dword s44, s[0:3], 0x80                           ; C2160180
>	s_buffer_load_dword s45, s[0:3], 0x81                           ; C2168181
>	s_buffer_load_dword s48, s[0:3], 0x89                           ; C2180189
>	s_buffer_load_dword s51, s[0:3], 0x8f                           ; C219818F
>	v_mul_f32_e32 v42, s49, v14                                     ; 10541C31
>	s_buffer_load_dword s49, s[0:3], 0x8a                           ; C218818A
>	v_mac_f32_e32 v23, v21, v21                                     ; 3E2E2B15
>	v_mac_f32_e32 v23, v22, v22                                     ; 3E2E2D16
>	v_mul_f32_e32 v44, s55, v14                                     ; 10581C37
>	s_buffer_load_dword s54, s[0:3], 0x70                           ; C21B0170
>	v_rsq_f32_e32 v23, v23                                          ; 7E2E5D17
>	v_mul_f32_e32 v39, s46, v14                                     ; 104E1C2E
>	v_mul_f32_e32 v40, s47, v14                                     ; 10501C2F
>	v_mac_f32_e32 v42, s65, v15                                     ; 3E541E41
>	v_mul_f32_e32 v45, s66, v14                                     ; 105A1C42
>	v_mac_f32_e32 v44, s53, v15                                     ; 3E581E35
>	s_buffer_load_dword s52, s[0:3], 0x7c                           ; C21A017C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v45, s50, v15                                     ; 3E5A1E32
>	v_mac_f32_e32 v39, s44, v15                                     ; 3E4E1E2C
>	v_mac_f32_e32 v40, s45, v15                                     ; 3E501E2D
>	s_buffer_load_dword s44, s[0:3], 0x8c                           ; C216018C
>	s_buffer_load_dword s45, s[0:3], 0x8d                           ; C216818D
>	s_buffer_load_dword s46, s[0:3], 0x8e                           ; C217018E
>	v_mac_f32_e32 v42, s51, v16                                     ; 3E542033
>	v_mac_f32_e32 v44, s48, v16                                     ; 3E582030
>	s_buffer_load_dword s64, s[0:3], 0x88                           ; C2200188
>	s_buffer_load_dword s48, s[0:3], 0x68                           ; C2180168
>	s_buffer_load_dword s51, s[0:3], 0x98                           ; C2198198
>	v_mac_f32_e32 v45, s49, v16                                     ; 3E5A2031
>	s_buffer_load_dword s49, s[0:3], 0x69                           ; C2188169
>	v_mul_f32_e32 v43, s54, v14                                     ; 10561C36
>	v_mul_f32_e32 v34, v23, v21                                     ; 10442B17
>	v_interp_p1_f32 v21, v4, 3, 3, [m0]                             ; C8540F04
>	v_mac_f32_e32 v43, s52, v15                                     ; 3E561E34
>	v_mul_f32_e32 v33, v23, v12                                     ; 10421917
>	v_add_f32_e32 v12, v14, v15                                     ; 06181F0E
>	v_interp_p2_f32 v21, [v21], v5, 3, 3, [m0]                      ; C8550F05
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v39, s44, v16                                     ; 3E4E202C
>	v_mac_f32_e32 v40, s45, v16                                     ; 3E50202D
>	v_mac_f32_e32 v41, s46, v16                                     ; 3E52202E
>	v_add_f32_e32 v12, v16, v12                                     ; 06181910
>	v_mac_f32_e32 v43, s64, v16                                     ; 3E562040
>	v_mul_f32_e32 v16, s48, v7                                      ; 10200E30
>	s_buffer_load_dword s48, s[0:3], 0x94                           ; C2180194
>	s_buffer_load_dword s50, s[0:3], 0x95                           ; C2190195
>	v_mul_f32_e32 v15, s51, v21                                     ; 101E2A33
>	s_buffer_load_dword s51, s[0:3], 0x9a                           ; C219819A
>	v_mul_f32_e32 v46, v23, v22                                     ; 105C2D17
>	v_mul_f32_e32 v22, s49, v8                                      ; 102C1031
>	s_buffer_load_dword s49, s[0:3], 0x99                           ; C2188199
>	s_buffer_load_dword s52, s[0:3], 0x9b                           ; C21A019B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s48, v16                                     ; 101C2030
>	v_mul_f32_e32 v24, s50, v16                                     ; 10302032
>	v_mul_f32_e32 v16, s51, v21                                     ; 10202A33
>	v_mac_f32_e32 v14, s48, v15                                     ; 3E1C1E30
>	v_mac_f32_e32 v24, s50, v16                                     ; 3E302032
>	v_mul_f32_e32 v15, s48, v22                                     ; 101E2C30
>	v_mul_f32_e32 v23, s49, v21                                     ; 102E2A31
>	v_mul_f32_e32 v25, s50, v22                                     ; 10322C32
>	v_mul_f32_e32 v16, s52, v21                                     ; 10202A34
>	v_mac_f32_e32 v15, s48, v23                                     ; 3E1E2E30
>	v_mac_f32_e32 v25, s50, v16                                     ; 3E322032
>	s_load_dwordx8 s[48:55], s[4:5], 0x50                           ; C0D80550
>	s_load_dwordx4 s[72:75], s[4:5], 0x5c                           ; C0A4055C
>	s_buffer_load_dword s77, s[0:3], 0x97                           ; C2268197
>	s_buffer_load_dword s76, s[0:3], 0x96                           ; C2260196
>	v_add_f32_e64 v47, v12, 0 clamp                                 ; D206082F 0001010C
>	s_load_dwordx8 s[56:63], s[4:5], 0x40                           ; C0DC0540
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s72, s72, s55                                         ; 87483748
>	image_sample v[21:23], v[14:15], s[48:55], s[72:75] dmask:0xb   ; F0800B00 024C150E
>	image_sample v14, v[24:25], s[48:55], s[72:75] dmask:0x4        ; F0800400 024C0E18
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v12, s77, v14                                     ; 10181C4D
>	v_mad_f32 v12, v22, s76, -v12                                   ; D282000C 84309916
>	s_load_dwordx4 s[72:75], s[4:5], 0x4c                           ; C0A4054C
>	s_load_dwordx8 s[64:71], s[4:5], 0x60                           ; C0E00560
>	s_load_dwordx4 s[76:79], s[4:5], 0x6c                           ; C0A6056C
>	v_mad_f32 v48, -v47, v17, v17                                   ; D2820030 2446232F
>	v_mad_f32 v49, -v47, v18, v18                                   ; D2820031 244A252F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s72, s72, s63                                         ; 87483F48
>	v_mad_f32 v50, -v47, v19, v19                                   ; D2820032 244E272F
>	s_and_b32 s76, s76, s71                                         ; 874C474C
>	image_sample v17, v[7:8], s[64:71], s[76:79] dmask:0x8          ; F0800800 02701107
>	image_sample v[14:16], v[7:8], s[56:63], s[72:75] dmask:0xb     ; F0800B00 024E0E07
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v18, v15, v15                                     ; 06241F0F
>	v_mad_f32 v15, 2.0, v15, -1.0                                   ; D282000F 03CE1EF4
>	v_mad_f32 v16, 2.0, v16, -1.0                                   ; D2820010 03CE20F4
>	v_mad_f32 v18, v18, v15, -v15                                   ; D2820012 843E1F12
>	v_mac_f32_e32 v18, v16, v16                                     ; 3E242110
>	v_mad_f32 v19, 2.0, v21, -1.0                                   ; D2820013 03CE2AF4
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mad_f32 v21, 2.0, v23, -1.0                                   ; D2820015 03CE2EF4
>	v_mac_f32_e32 v16, v20, v19                                     ; 3E202714
>	v_sub_f32_e32 v18, 0x3f8020c5, v18                              ; 082424FF 3F8020C5
>	v_mac_f32_e32 v15, v20, v21                                     ; 3E1E2B14
>	v_mul_f32_e32 v19, v16, v16                                     ; 10262110
>	v_sqrt_f32_e32 v18, v18                                         ; 7E246712
>	v_mac_f32_e32 v19, v15, v15                                     ; 3E261F0F
>	v_mac_f32_e32 v19, v18, v18                                     ; 3E262512
>	v_rsq_f32_e32 v19, v19                                          ; 7E265D13
>	v_interp_p1_f32 v23, v4, 0, 4, [m0]                             ; C85C1004
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	v_interp_p2_f32 v23, [v23], v5, 0, 4, [m0]                      ; C85D1005
>	v_interp_p1_f32 v24, v4, 1, 4, [m0]                             ; C8601104
>	v_mul_f32_e32 v16, v19, v16                                     ; 10202113
>	v_interp_p2_f32 v24, [v24], v5, 1, 4, [m0]                      ; C8611105
>	v_interp_p1_f32 v25, v4, 2, 4, [m0]                             ; C8641204
>	v_mul_f32_e32 v51, v12, v20                                     ; 1066290C
>	v_mad_f32 v52, -v20, v12, 1.0                                   ; D2820034 23CA1914
>	v_mul_f32_e32 v20, v19, v15                                     ; 10281F13
>	v_mul_f32_e32 v12, v16, v23                                     ; 10182F10
>	v_mul_f32_e32 v15, v16, v24                                     ; 101E3110
>	v_interp_p2_f32 v25, [v25], v5, 2, 4, [m0]                      ; C8651205
>	v_mul_f32_e32 v18, v19, v18                                     ; 10242513
>	v_mac_f32_e32 v12, v20, v26                                     ; 3E183514
>	v_mul_f32_e32 v4, v16, v25                                      ; 10083310
>	v_mac_f32_e32 v15, v20, v27                                     ; 3E1E3714
>	v_mul_f32_e32 v10, v32, v29                                     ; 10143B20
>	v_mac_f32_e32 v12, v18, v33                                     ; 3E184312
>	v_mac_f32_e32 v4, v20, v28                                      ; 3E083914
>	v_mul_f32_e32 v9, v32, v30                                      ; 10123D20
>	v_mac_f32_e32 v15, v18, v34                                     ; 3E1E4512
>	v_mul_f32_e32 v53, v10, v12                                     ; 106A190A
>	v_mul_f32_e32 v11, v32, v31                                     ; 10163F20
>	v_mac_f32_e32 v4, v18, v46                                      ; 3E085D12
>	v_mac_f32_e32 v53, v9, v15                                      ; 3E6A1F09
>	v_mac_f32_e32 v53, v11, v4                                      ; 3E6A090B
>	s_load_dwordx8 s[48:55], s[4:5], 0x70                           ; C0D80570
>	s_load_dwordx4 s[56:59], s[4:5], 0x7c                           ; C09C057C
>	v_mul_f32_e32 v16, v15, v53                                     ; 10206B0F
>	v_mad_f32 v22, -v39, v17, v17                                   ; D2820016 24462327
>	v_mul_f32_e32 v17, v4, v53                                      ; 10226B04
>	v_mac_f32_e32 v16, v15, v53                                     ; 3E206B0F
>	v_mad_f32 v30, -v30, v32, v16                                   ; D282001E 2442411E
>	v_interp_p1_f32 v16, v6, 2, 1, [m0]                             ; C8400606
>	v_mac_f32_e32 v17, v4, v53                                      ; 3E226B04
>	v_mad_f32 v31, -v31, v32, v17                                   ; D282001F 2446411F
>	v_interp_p2_f32 v16, [v16], v3, 2, 1, [m0]                      ; C8410603
>	v_interp_p1_f32 v17, v6, 3, 1, [m0]                             ; C8440706
>	v_interp_p2_f32 v17, [v17], v3, 3, 1, [m0]                      ; C8450703
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s56, s56, s55                                         ; 87383738
>	image_sample v[18:21], v[16:17], s[48:55], s[56:59] dmask:0xf   ; F0800F00 01CC1210
>	v_mul_f32_e32 v5, v12, v53                                      ; 100A6B0C
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v16, -0.5, v19                                    ; 062026F1
>	v_mac_f32_e32 v5, v12, v53                                      ; 3E0A6B0C
>	v_mad_f32 v29, -v29, v32, v5                                    ; D282001D 2416411D
>	v_add_f32_e32 v5, -0.5, v20                                     ; 060A28F1
>	v_add_f32_e32 v19, v16, v16                                     ; 06262110
>	v_add_f32_e32 v17, v5, v5                                       ; 06220B05
>	v_mul_f32_e32 v5, v19, v19                                      ; 100A2713
>	v_mac_f32_e32 v5, v17, v17                                      ; 3E0A2311
>	v_add_f32_e64 v5, v5, 0 clamp                                   ; D2060805 00010105
>	v_sub_f32_e32 v5, 1.0, v5                                       ; 080A0AF2
>	v_sqrt_f32_e32 v20, v5                                          ; 7E286705
>	v_mul_f32_e32 v5, v17, v23                                      ; 100A2F11
>	v_mul_f32_e32 v16, v17, v24                                     ; 10203111
>	v_mac_f32_e32 v5, v19, v26                                      ; 3E0A3513
>	v_mul_f32_e32 v17, v17, v25                                     ; 10223311
>	v_mac_f32_e32 v16, v19, v27                                     ; 3E203713
>	v_mac_f32_e32 v5, v20, v33                                      ; 3E0A4314
>	v_mac_f32_e32 v17, v19, v28                                     ; 3E223913
>	v_mac_f32_e32 v16, v20, v34                                     ; 3E204514
>	v_mul_f32_e32 v19, v5, v29                                      ; 10263B05
>	s_buffer_load_dword s49, s[0:3], 0x10                           ; C2188110
>	v_mac_f32_e32 v17, v20, v46                                     ; 3E225D14
>	v_mac_f32_e32 v19, v16, v30                                     ; 3E263D10
>	v_mac_f32_e32 v19, v17, v31                                     ; 3E263F11
>	v_add_f32_e64 v19, v19, 0 clamp                                 ; D2060813 00010113
>	v_mul_f32_e32 v55, v14, v18                                     ; 106E250E
>	v_mov_b32_e32 v18, 0x403b800a                                   ; 7E2402FF 403B800A
>	v_mad_f32 v54, 2.0, v21, -v19                                   ; D2820036 844E2AF4
>	v_mad_f32 v19, v18, v33, v1                                     ; D2820013 04064312
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v24, s49, v19                                     ; 10302631
>	s_buffer_load_dword s49, s[0:3], 0x11                           ; C2188111
>	s_buffer_load_dword s50, s[0:3], 0x12                           ; C2190112
>	s_buffer_load_dword s51, s[0:3], 0x14                           ; C2198114
>	s_buffer_load_dword s52, s[0:3], 0x15                           ; C21A0115
>	s_buffer_load_dword s53, s[0:3], 0x16                           ; C21A8116
>	v_mad_f32 v20, v18, v34, v0                                     ; D2820014 04024512
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v25, s49, v19                                     ; 10322631
>	v_mul_f32_e32 v26, s50, v19                                     ; 10342632
>	v_mac_f32_e32 v24, s51, v20                                     ; 3E302833
>	s_buffer_load_dword s49, s[0:3], 0x18                           ; C2188118
>	s_buffer_load_dword s50, s[0:3], 0x19                           ; C2190119
>	s_buffer_load_dword s51, s[0:3], 0x1a                           ; C219811A
>	v_mac_f32_e32 v25, s52, v20                                     ; 3E322834
>	v_mac_f32_e32 v26, s53, v20                                     ; 3E342835
>	s_load_dwordx8 s[32:39], s[4:5], 0x0                            ; C0D00500
>	s_load_dwordx4 s[40:43], s[4:5], 0xc                            ; C094050C
>	s_buffer_load_dword s48, s[0:3], 0x1e                           ; C218011E
>	s_buffer_load_dword s52, s[0:3], 0x1c                           ; C21A011C
>	s_buffer_load_dword s53, s[0:3], 0x1d                           ; C21A811D
>	v_mad_f32 v18, v18, v46, v2                                     ; D2820012 040A5D12
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v24, s49, v18                                     ; 3E302431
>	v_mac_f32_e32 v25, s50, v18                                     ; 3E322432
>	v_mac_f32_e32 v26, s51, v18                                     ; 3E342433
>	v_add_f32_e32 v32, v21, v21                                     ; 06402B15
>	v_sub_f32_e32 v21, 1.0, v47                                     ; 082A5EF2
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	v_add_f32_e32 v19, s52, v24                                     ; 06263034
>	v_add_f32_e32 v20, s53, v25                                     ; 06283235
>	v_add_f32_e32 v18, s48, v26                                     ; 06243430
>	v_mac_f32_e32 v22, v39, v38                                     ; 3E2C4D27
>	image_sample_c v38, v[18:21], s[32:39], s[40:43] dmask:0x1      ; F0A00100 01482612
>	v_add_f32_e32 v18, v21, v42                                     ; 06245515
>	v_mul_f32_e32 v19, v40, v35                                     ; 10264728
>	v_mul_f32_e32 v20, v40, v36                                     ; 10284928
>	v_add_f32_e32 v23, v21, v41                                     ; 062E5315
>	v_mul_f32_e32 v21, v40, v37                                     ; 102A4B28
>	v_rcp_f32_e32 v18, v18                                          ; 7E245512
>	v_log_f32_e32 v19, v19                                          ; 7E264F13
>	v_log_f32_e32 v20, v20                                          ; 7E284F14
>	v_log_f32_e32 v21, v21                                          ; 7E2A4F15
>	v_log_f32_e32 v22, v22                                          ; 7E2C4F16
>	v_mul_legacy_f32_e32 v19, v18, v19                              ; 0E262712
>	v_mul_legacy_f32_e32 v20, v18, v20                              ; 0E282912
>	v_mul_legacy_f32_e32 v18, v18, v21                              ; 0E242B12
>	v_rcp_f32_e32 v21, v23                                          ; 7E2A5517
>	v_exp_f32_e32 v37, v18                                          ; 7E4A4B12
>	v_exp_f32_e32 v35, v19                                          ; 7E464B13
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	v_mul_legacy_f32_e32 v18, v21, v22                              ; 0E242D15
>	v_exp_f32_e32 v39, v18                                          ; 7E4E4B12
>	v_cubema_f32 v18, v12, v15, v4                                  ; D28E0012 04121F0C
>	v_rcp_f32_e64 v18, |v18|                                        ; D3540112 00000112
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                           ; C08E051C
>	v_cubetc_f32 v19, v12, v15, v4                                  ; D28C0013 04121F0C
>	v_mov_b32_e32 v21, 0x3fc00000                                   ; 7E2A02FF 3FC00000
>	v_cubesc_f32 v22, v12, v15, v4                                  ; D28A0016 04121F0C
>	v_mad_f32 v19, v18, v19, v21                                    ; D2820013 04562712
>	v_mad_f32 v18, v18, v22, v21                                    ; D2820012 04562D12
>	v_add_f32_e64 v22, v53, 0 clamp                                 ; D2060816 00010135
>	s_buffer_load_dword s45, s[0:3], 0x93                           ; C2168193
>	v_sub_f32_e32 v22, 1.0, v22                                     ; 082C2CF2
>	v_log_f32_e32 v22, v22                                          ; 7E2C4F16
>	v_mad_f32 v40, -v51, v39, v39                                   ; D2820028 249E4F33
>	v_exp_f32_e32 v36, v20                                          ; 7E484B14
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v20, v12, v15, v4                                  ; D2880014 04121F0C
>	image_sample v[25:28], v[18:21], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E51912
>	v_mac_f32_e32 v40, s45, v51                                     ; 3E50662D
>	v_mov_b32_e32 v18, 0x40c00000                                   ; 7E2402FF 40C00000
>	v_max_f32_e32 v19, v35, v40                                     ; 20265123
>	v_max_f32_e32 v20, v36, v40                                     ; 20285124
>	v_mad_f32 v24, -v40, v18, v18                                   ; D2820018 244A2528
>	v_mul_legacy_f32_e32 v18, 0x40a00000, v22                       ; 0E242CFF 40A00000
>	v_max_f32_e32 v22, v37, v40                                     ; 202C5125
>	v_exp_f32_e32 v18, v18                                          ; 7E244B12
>	v_subrev_f32_e32 v19, v35, v19                                  ; 0A262723
>	v_subrev_f32_e32 v20, v36, v20                                  ; 0A282924
>	v_subrev_f32_e32 v22, v37, v22                                  ; 0A2C2D25
>	v_mad_f32 v41, v20, v18, v36                                    ; D2820029 04922514
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                           ; C090052C
>	v_mad_f32 v19, v19, v18, v35                                    ; D2820013 048E2513
>	v_mad_f32 v42, v22, v18, v37                                    ; D282002A 04962516
>	v_cubema_f32 v18, v29, v30, v31                                 ; D28E0012 047E3D1D
>	v_rcp_f32_e64 v18, |v18|                                        ; D3540112 00000112
>	v_mac_f32_e32 v48, v47, v43                                     ; 3E60572F
>	v_cubetc_f32 v20, v29, v30, v31                                 ; D28C0014 047E3D1D
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	v_cubesc_f32 v43, v29, v30, v31                                 ; D28A002B 047E3D1D
>	v_mad_f32 v22, v18, v20, v21                                    ; D2820016 04562912
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v23, v29, v30, v31                                 ; D2880017 047E3D1D
>	v_mac_f32_e32 v21, v18, v43                                     ; 3E2A5712
>	image_sample_l v[20:22], v[21:24], s[12:19], s[32:35] dmask:0x7 ; F0900700 01031415
>	s_buffer_load_dword s12, s[0:3], 0x6                            ; C2060106
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v18, v20, v19                                     ; 10242714
>	v_mul_f32_e32 v19, v21, v41                                     ; 10265315
>	v_mul_f32_e32 v21, v33, v29                                     ; 102A3B21
>	v_mul_f32_e32 v29, v33, v10                                     ; 103A1521
>	v_mac_f32_e32 v29, v34, v9                                      ; 3E3A1322
>	v_mul_f32_e32 v9, s9, v5                                        ; 10120A09
>	v_mad_f32 v9, v16, -s8, -v9                                     ; D2820009 C4241110
>	v_mad_f32 v21, -v30, v34, -v21                                  ; D2820015 A456451E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v9, -v17, s12, v9                                     ; D2820009 24241911
>	s_buffer_load_dword s13, s[0:3], 0xc                            ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                            ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                            ; C207810E
>	v_mad_f32 v30, -v31, v46, v21                                   ; D282001E 24565D1F
>	v_mov_b32_e32 v31, 0x3f8ccccd                                   ; 7E3E02FF 3F8CCCCD
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mad_f32 v9, v32, v31, -v9                                     ; D2820009 84263F20
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v9, v9, v9                                        ; 10121309
>	v_mul_f32_e32 v10, v38, v38                                     ; 10144D26
>	v_mac_f32_e32 v29, v46, v11                                     ; 3E3A172E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v11, s13, v10                                     ; 1016140D
>	v_mul_f32_e32 v21, s14, v10                                     ; 102A140E
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v10, s15, v10                                     ; 1014140F
>	v_mul_f32_e32 v11, v9, v11                                      ; 10161709
>	v_mul_f32_e32 v21, v9, v21                                      ; 102A2B09
>	v_mul_f32_e32 v9, v9, v10                                       ; 10121509
>	v_mul_f32_e32 v10, s9, v12                                      ; 10141809
>	v_mad_f32 v10, v15, -s8, -v10                                   ; D282000A C428110F
>	v_mad_f32 v10, -v4, s12, v10                                    ; D282000A 24281904
>	v_add_f32_e64 v10, v10, 0 clamp                                 ; D206080A 0001010A
>	v_mul_f32_e32 v9, v14, v9                                       ; 1012130E
>	v_mul_f32_e32 v11, v14, v11                                     ; 1016170E
>	v_mul_f32_e32 v21, v14, v21                                     ; 102A2B0E
>	v_mul_f32_e32 v20, v22, v42                                     ; 10285516
>	v_mul_f32_e32 v22, v9, v10                                      ; 102C1509
>	v_mov_b32_e32 v9, 0x3eaaaa9f                                    ; 7E1202FF 3EAAAA9F
>	v_mul_f32_e32 v11, v11, v10                                     ; 1016150B
>	v_mul_f32_e32 v21, v21, v10                                     ; 102A1515
>	v_mul_f32_e32 v10, v9, v35                                      ; 10144709
>	v_mac_f32_e32 v10, v9, v36                                      ; 3E144909
>	v_mac_f32_e32 v10, v9, v37                                      ; 3E144B09
>	v_sub_f32_e32 v9, 1.0, v10                                      ; 081214F2
>	v_mul_f32_e32 v10, v28, v26                                     ; 1014351C
>	v_add_f32_e64 v26, v54, 0 clamp                                 ; D206081A 00010136
>	v_log_f32_e32 v26, v26                                          ; 7E344F1A
>	v_add_f32_e64 v24, v9, 0 clamp                                  ; D2060818 00010109
>	v_mul_f32_e32 v9, v28, v25                                      ; 1012331C
>	v_mul_f32_e32 v9, 4.0, v9                                       ; 101212F6
>	v_mul_legacy_f32_e32 v26, 0x40400000, v26                       ; 0E3434FF 40400000
>	v_exp_f32_e32 v26, v26                                          ; 7E344B1A
>	v_mul_f32_e32 v25, v9, v24                                      ; 10323109
>	v_mul_f32_e32 v9, v24, v11                                      ; 10121718
>	v_mac_f32_e32 v9, v55, v25                                      ; 3E123337
>	v_mad_f32 v25, -v39, v52, 1.0                                   ; D2820019 23CA6927
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_mul_f32_e32 v23, v28, v27                                     ; 102E371C
>	v_mad_f32 v25, -s45, v51, v25                                   ; D2820019 2466662D
>	v_mov_b32_e32 v27, v26                                          ; 7E36031A
>	v_sub_f32_e32 v28, 1.0, v29                                     ; 08383AF2
>	v_mac_f32_e32 v27, 0xbe99999a, v40                              ; 3E3650FF BE99999A
>	v_mac_f32_e32 v25, 0x41a00000, v40                              ; 3E3250FF 41A00000
>	v_mul_f32_e32 v25, v25, v27                                     ; 10323719
>	v_mul_f32_e32 v10, 4.0, v10                                     ; 101414F6
>	s_buffer_load_dword s47, s[0:3], 0x90                           ; C2178190
>	s_buffer_load_dword s46, s[0:3], 0x91                           ; C2170191
>	s_buffer_load_dword s44, s[0:3], 0x92                           ; C2160192
>	v_add_f32_e32 v27, 1.0, v30                                     ; 06363CF2
>	v_add_f32_e64 v28, v28, 0 clamp                                 ; D206081C 0001011C
>	v_subrev_f32_e32 v27, v28, v27                                  ; 0A36371C
>	v_mul_f32_e32 v11, v10, v24                                     ; 1016310A
>	v_mul_f32_e32 v10, v24, v21                                     ; 10142B18
>	v_mac_f32_e32 v10, v55, v11                                     ; 3E141737
>	v_mul_f32_e32 v11, 4.0, v23                                     ; 10162EF6
>	v_add_f32_e64 v27, v27, 0 clamp                                 ; D206081B 0001011B
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	v_sub_f32_e32 v28, 1.0, v27                                     ; 083836F2
>	v_mac_f32_e32 v49, v47, v44                                     ; 3E62592F
>	v_mul_f32_e32 v21, v11, v24                                     ; 102A310B
>	v_mul_f32_e32 v11, v24, v22                                     ; 10162D18
>	v_mac_f32_e32 v50, v47, v45                                     ; 3E645B2F
>	v_mad_f32 v22, -v51, v48, v48                                   ; D2820016 24C26133
>	v_mad_f32 v23, -v51, v49, v49                                   ; D2820017 24C66333
>	v_mac_f32_e32 v11, v55, v21                                     ; 3E162B37
>	v_mad_f32 v21, -v51, v50, v50                                   ; D2820015 24CA6533
>	v_mul_f32_e32 v25, v25, v26                                     ; 10323519
>	v_mad_f32 v27, -v27, v28, v28                                   ; D282001B 2472391B
>	v_mul_f32_e32 v25, v27, v25                                     ; 1032331B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v22, s47, v51                                     ; 3E2C662F
>	v_mac_f32_e32 v23, s46, v51                                     ; 3E2E662E
>	v_mac_f32_e32 v21, s44, v51                                     ; 3E2A662C
>	v_mul_f32_e32 v26, v31, v32                                     ; 1034411F
>	v_mov_b32_e32 v27, 0xc8                                         ; 7E3602FF 000000C8
>	v_mov_b32_e32 v28, 0                                            ; 7E380280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v29, vcc, 0xffffffe8, v27                         ; 4A3A36FF FFFFFFE8
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, 0xffffffec, v27                         ; 4A3C36FF FFFFFFEC
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v31, vcc, -16, v27                                ; 4A3E36D0
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v28, vcc, 1, v28                                  ; 4A383881
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v29, v1, v29                                   ; 0A3A3B01
>	v_mul_f32_e32 v32, v29, v29                                     ; 10403B1D
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v30, v0, v30                                   ; 0A3C3D00
>	v_mac_f32_e32 v32, v30, v30                                     ; 3E403D1E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_subrev_f32_e32 v31, v2, v31                                   ; 0A3E3F02
>	v_mac_f32_e32 v32, v31, v31                                     ; 3E403F1F
>	v_rsq_f32_e32 v33, v32                                          ; 7E425D20
>	v_mul_f32_e32 v29, v33, v29                                     ; 103A3B21
>	v_mul_f32_e32 v34, v5, v29                                      ; 10443B05
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mac_f32_e32 v34, v16, v30                                     ; 3E443D10
>	v_mac_f32_e32 v34, v17, v31                                     ; 3E443F11
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_subrev_f32_e32 v34, v34, v26                                  ; 0A443522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_sub_f32_e32 v35, 1.0, v33                                     ; 084642F2
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mac_f32_e32 v33, v35, v34                                     ; 3E424523
>	v_add_i32_e32 v34, vcc, -12, v27                                ; 4A4436CC
>	buffer_load_dword v34, v34, s[0:3], 0 offen                     ; E0301000 80002222
>	v_mul_f32_e32 v29, v12, v29                                     ; 103A3B0C
>	v_mac_f32_e32 v29, v15, v30                                     ; 3E3A3D0F
>	v_mac_f32_e32 v29, v4, v31                                      ; 3E3A3F04
>	v_add_i32_e32 v30, vcc, -8, v27                                 ; 4A3C36C8
>	v_add_i32_e32 v31, vcc, -4, v27                                 ; 4A3E36C4
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_f32_e64 v29, v29, 0 clamp                                 ; D206081D 0001011D
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mul_f32_e32 v32, v34, v32                                     ; 10404122
>	buffer_load_dword v34, v27, s[0:3], 0 offen                     ; E0301000 8000221B
>	v_add_f32_e64 v32, v32, 0 clamp                                 ; D2060820 00010120
>	v_add_i32_e32 v27, vcc, 32, v27                                 ; 4A3636A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v30, -v32, v30, v30                                   ; D282001E 247A3D20
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mad_f32 v31, -v32, v31, v31                                   ; D282001F 247E3F20
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mul_f32_e32 v30, v14, v30                                     ; 103C3D0E
>	v_mul_f32_e32 v31, v14, v31                                     ; 103E3F0E
>	v_mul_f32_e32 v30, v30, v29                                     ; 103C3B1E
>	v_mul_f32_e32 v31, v31, v29                                     ; 103E3B1F
>	v_mac_f32_e32 v9, v24, v30                                      ; 3E123D18
>	v_mac_f32_e32 v10, v24, v31                                     ; 3E143F18
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v32, -v32, v34, v34                                   ; D2820020 248A4520
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mul_f32_e32 v32, v14, v32                                     ; 1040410E
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v11, v24, v29                                     ; 3E163B18
>	v_cmp_lt_i32_e32 vcc, 3, v28                                    ; 7D023883
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	s_load_dwordx8 s[12:19], s[4:5], 0x90                           ; C0C60590
>	s_load_dwordx4 s[4:7], s[4:5], 0x9c                             ; C082059C
>	s_buffer_load_dword s8, s[0:3], 0x9c                            ; C204019C
>	v_mul_f32_e32 v5, v25, v18                                      ; 100A2519
>	v_mac_f32_e32 v5, v22, v9                                       ; 3E0A1316
>	v_mov_b32_e32 v9, 0x42000000                                    ; 7E1202FF 42000000
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	image_sample v[14:16], v[7:8], s[12:19], s[4:7] dmask:0x7       ; F0800700 00230E07
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v14                               ; 10021CFF 3E99999A
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v1, 0x3f170a3d, v15                               ; 3E021EFF 3F170A3D
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mac_f32_e32 v1, 0x3de147ae, v16                               ; 3E0220FF 3DE147AE
>	v_mul_f32_e32 v1, s8, v1                                        ; 10020208
>	v_mul_f32_e32 v2, v1, v14                                       ; 10041D01
>	v_mac_f32_e32 v5, v9, v2                                        ; 3E0A0509
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v8, v25, v20                                      ; 10102919
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v4, v1, v15                                       ; 10081F01
>	v_mul_f32_e32 v1, v1, v16                                       ; 10022101
>	v_mac_f32_e32 v8, v21, v11                                      ; 3E101715
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v8, v9, v1                                        ; 3E100309
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v7, v25, v19                                      ; 100E2719
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v7, v23, v10                                      ; 3E0E1517
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_mac_f32_e32 v7, v9, v4                                        ; 3E0E0909
>	v_mul_f32_e32 v4, v0, v1                                        ; 10080300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v4, s6, s6                                       ; D2820000 20180D04
>	v_mad_f32 v1, -v4, s7, s7                                       ; D2820001 201C0F04
>	v_mad_f32 v2, -v4, s0, s0                                       ; D2820002 20000104
>	v_mac_f32_e32 v0, v4, v5                                        ; 3E000B04
>	v_mac_f32_e32 v1, v4, v7                                        ; 3E020F04
>	v_mac_f32_e32 v2, v4, v8                                        ; 3E041104
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 88
>VGPRS: 56
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2896 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 4
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2], GENERIC[2], PERSPECTIVE, CENTROID
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4].x, GENERIC[4], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..14]
>DCL CONST[19..20]
>DCL TEMP[0..10], LOCAL
>IMM[0] FLT32 {    2.0000,    -1.0000,     1.0010,     1.0000}
>IMM[1] FLT32 {    2.9297,     6.0000,     4.0000,    32.0000}
>IMM[2] FLT32 {    0.3000,     0.5900,     0.1100,     5.0000}
>IMM[3] FLT32 {    0.0000,     0.0010,     8.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[2].wwww
>  1: MOV TEMP[0].yz, IN[3].yxyy
>  2: MOV TEMP[1].xy, IN[3].zwzz
>  3: MOV TEMP[1].z, IN[4].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[0].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[1].xyyy
> 12: TEX TEMP[3].yz, TEMP[3], SAMP[5], 2D
> 13: MOV TEMP[4].xy, IN[1].xyyy
> 14: TEX TEMP[4].yw, TEMP[4], SAMP[4], 2D
> 15: MAD TEMP[4].xy, TEMP[4].wyyy, IMM[0].xxxx, IMM[0].yyyy
> 16: DP2 TEMP[5].x, TEMP[4].xyyy, TEMP[4].xyyy
> 17: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 18: ADD TEMP[5].x, IMM[0].zzzz, -TEMP[5].xxxx
> 19: SQRT TEMP[5].x, TEMP[5].xxxx
> 20: MUL TEMP[6].xyz, IN[2].xyzz, TEMP[4].xxxx
> 21: MAD TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].yyyy, TEMP[6].xyzz
> 22: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[5].xxxx, TEMP[0].xyzz
> 23: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[2].xyzz
> 24: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, IMM[0].xxxx, TEMP[4].xyzz
> 26: ADD TEMP[4].xyz, TEMP[2].xyzz, -TEMP[4].xyzz
> 27: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 28: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].wwww
> 29: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[1].xyzz
> 30: ADD TEMP[5].x, IMM[0].wwww, -TEMP[5].xxxx
> 31: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 32: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 33: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 34: ADD TEMP[4].x, IMM[0].wwww, -TEMP[4].xxxx
> 35: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 36: MUL TEMP[4].x, TEMP[3].yyyy, TEMP[4].xxxx
> 37: MAD TEMP[1].xyz, IMM[1].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 38: MUL TEMP[5], CONST[4], TEMP[1].xxxx
> 39: MAD TEMP[5], CONST[5], TEMP[1].yyyy, TEMP[5]
> 40: MAD TEMP[1], CONST[6], TEMP[1].zzzz, TEMP[5]
> 41: ADD TEMP[1].xyz, TEMP[1], CONST[7]
> 42: MOV TEMP[5].xy, TEMP[1].xyyy
> 43: MOV TEMP[5].w, IMM[0].wwww
> 44: MOV TEMP[5].z, TEMP[1].zzzz
> 45: TXP TEMP[1].x, TEMP[5], SAMP[0], SHADOW2D
> 46: MOV TEMP[5].xyz, TEMP[0].xyzz
> 47: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 48: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[2].xyzz
> 49: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[0].xyzz
> 50: MAD TEMP[6].xyz, IMM[0].xxxx, TEMP[6].xyzz, -TEMP[2].xyzz
> 51: ADD TEMP[7].x, IMM[0].wwww, -TEMP[3].zzzz
> 52: MUL TEMP[7].x, TEMP[7].xxxx, IMM[1].yyyy
> 53: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 54: MUL TEMP[8].x, IMM[1].zzzz, TEMP[3].yyyy
> 55: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[0].xyzz
> 56: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 57: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
> 58: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
> 59: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].yyyy
> 60: MUL TEMP[1].xyz, TEMP[9].xxxx, TEMP[1].xyzz
> 61: MAD TEMP[1].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[1].xyzz
> 62: ADD TEMP[5].xyz, CONST[11].xyzz, -IN[0].xyzz
> 63: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 64: RSQ TEMP[9].x, TEMP[8].xxxx
> 65: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 66: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[0].xyzz
> 67: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 68: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 69: MUL TEMP[8].x, TEMP[8].xxxx, CONST[11].wwww
> 70: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 71: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 72: MUL TEMP[8].xyz, CONST[12].xyzz, TEMP[8].xxxx
> 73: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[3].yyyy
> 74: MAD TEMP[1].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[1].xyzz
> 75: ADD TEMP[5].xyz, CONST[13].xyzz, -IN[0].xyzz
> 76: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 77: RSQ TEMP[9].x, TEMP[8].xxxx
> 78: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 79: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[0].xyzz
> 80: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 81: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 82: MUL TEMP[8].x, TEMP[8].xxxx, CONST[13].wwww
> 83: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 84: ADD TEMP[8].x, IMM[0].wwww, -TEMP[8].xxxx
> 85: MUL TEMP[8].xyz, CONST[14].xyzz, TEMP[8].xxxx
> 86: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[3].yyyy
> 87: MAD TEMP[1].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[1].xyzz
> 88: MOV TEMP[5].xy, IN[1].xyyy
> 89: TEX TEMP[5], TEMP[5], SAMP[6], 2D
> 90: MOV TEMP[8].w, TEMP[5].wwww
> 91: DP3 TEMP[9].x, TEMP[5].xyzz, IMM[2].xyzz
> 92: MUL TEMP[9].x, TEMP[9].xxxx, CONST[20].xxxx
> 93: ADD TEMP[10].x, CONST[19].wwww, IMM[0].wwww
> 94: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[10].xxxx
> 95: MUL TEMP[8].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 96: MUL TEMP[5].xyz, TEMP[8], IMM[1].wwww
> 97: MOV TEMP[8].xy, IN[1].xyyy
> 98: TEX TEMP[8].xyz, TEMP[8], SAMP[3], 2D
> 99: DP3 TEMP[0].x, TEMP[2].xyzz, TEMP[0].xyzz
>100: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>101: ADD TEMP[0].x, IMM[0].wwww, -TEMP[0].xxxx
>102: POW TEMP[0].x, TEMP[0].xxxx, IMM[2].wwww
>103: MAX TEMP[2].xyz, TEMP[3].zzzz, IMM[3].xxxx
>104: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[2].xyzz
>105: MOV TEMP[2].xyz, TEMP[6].xyzz
>106: MOV TEMP[2].w, TEMP[7].xxxx
>107: TXL TEMP[2].xyz, TEMP[2], SAMP[2], CUBE
>108: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[2].xyzz
>109: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[4].xxxx
>110: MAD TEMP[0].xyz, TEMP[1].xyzz, TEMP[8].xyzz, TEMP[0].xyzz
>111: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[5].xyzz
>112: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>113: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].xxxx
>114: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>115: ADD TEMP[2].x, TEMP[2].xxxx, IMM[3].yyyy
>116: RCP TEMP[2].x, TEMP[2].xxxx
>117: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>118: FRC TEMP[2].x, CONST[1].wwww
>119: MUL TEMP[2].x, TEMP[2].xxxx, IMM[3].zzzz
>120: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>121: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>122: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
>123: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>124: MOV TEMP[0].w, IN[0].wwww
>125: MOV OUT[0], TEMP[0]
>126: END
>radeonsi: Compiling shader 130
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 2, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 23, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 1
>  %79 = extractelement <4 x float> %77, i32 2
>  %80 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %81 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %82 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %83 = load <8 x i32>, <8 x i32> addrspace(2)* %82, align 32, !invariant.load !0
>  %84 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %85 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %84, i64 0, i64 19, !amdgpu.uniform !0
>  %86 = load <4 x i32>, <4 x i32> addrspace(2)* %85, align 16, !invariant.load !0
>  %87 = extractelement <8 x i32> %83, i32 7
>  %88 = extractelement <4 x i32> %86, i32 0
>  %89 = and i32 %88, %87
>  %90 = insertelement <4 x i32> %86, i32 %89, i32 0
>  %91 = bitcast float %80 to i32
>  %92 = bitcast float %81 to i32
>  %93 = insertelement <2 x i32> undef, i32 %91, i32 0
>  %94 = insertelement <2 x i32> %93, i32 %92, i32 1
>  %95 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %94, <8 x i32> %83, <4 x i32> %90, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %96 = extractelement <4 x float> %95, i32 1
>  %97 = extractelement <4 x float> %95, i32 3
>  %98 = fmul float %97, 2.000000e+00
>  %99 = fadd float %98, -1.000000e+00
>  %100 = fmul float %96, 2.000000e+00
>  %101 = fadd float %100, -1.000000e+00
>  %102 = fmul float %99, %99
>  %103 = fmul float %101, %101
>  %104 = fadd float %102, %103
>  %105 = call float @llvm.AMDGPU.clamp.(float %104, float 0.000000e+00, float 1.000000e+00)
>  %106 = fsub float 0x3FF00418A0000000, %105
>  %107 = call float @llvm.sqrt.f32(float %106)
>  %108 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %109 = fmul float %108, %99
>  %110 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %111 = fmul float %110, %99
>  %112 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %113 = fmul float %112, %99
>  %114 = fmul float %23, %101
>  %115 = fadd float %114, %109
>  %116 = fmul float %24, %101
>  %117 = fadd float %116, %111
>  %118 = fmul float %25, %101
>  %119 = fadd float %118, %113
>  %120 = fmul float %59, %107
>  %121 = fadd float %120, %115
>  %122 = fmul float %60, %107
>  %123 = fadd float %122, %117
>  %124 = fmul float %61, %107
>  %125 = fadd float %124, %119
>  %126 = fmul float %121, %49
>  %127 = fmul float %123, %50
>  %128 = fadd float %127, %126
>  %129 = fmul float %125, %51
>  %130 = fadd float %128, %129
>  %131 = fmul float %130, %121
>  %132 = fmul float %130, %123
>  %133 = fmul float %130, %125
>  %134 = fmul float %131, 2.000000e+00
>  %135 = fmul float %132, 2.000000e+00
>  %136 = fmul float %133, 2.000000e+00
>  %137 = fsub float %49, %134
>  %138 = fsub float %50, %135
>  %139 = fsub float %51, %136
>  %140 = fmul float %137, %59
>  %141 = fmul float %138, %60
>  %142 = fadd float %141, %140
>  %143 = fmul float %139, %61
>  %144 = fadd float %142, %143
>  %145 = fadd float %144, 1.000000e+00
>  %146 = fmul float %49, %59
>  %147 = fmul float %50, %60
>  %148 = fadd float %147, %146
>  %149 = fmul float %51, %61
>  %150 = fadd float %148, %149
>  %151 = fsub float 1.000000e+00, %150
>  %152 = call float @llvm.AMDGPU.clamp.(float %151, float 0.000000e+00, float 1.000000e+00)
>  %153 = fsub float %145, %152
>  %154 = call float @llvm.AMDGPU.clamp.(float %153, float 0.000000e+00, float 1.000000e+00)
>  %155 = fsub float 1.000000e+00, %154
>  %156 = fmul float %155, %155
>  %157 = fmul float %78, %156
>  %158 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %159 = fmul float %59, 0x4007700140000000
>  %160 = fadd float %159, %158
>  %161 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %162 = fmul float %60, 0x4007700140000000
>  %163 = fadd float %162, %161
>  %164 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %165 = fmul float %61, 0x4007700140000000
>  %166 = fadd float %165, %164
>  %167 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %168 = load <16 x i8>, <16 x i8> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = call float @llvm.SI.load.const(<16 x i8> %168, i32 64)
>  %170 = fmul float %169, %160
>  %171 = call float @llvm.SI.load.const(<16 x i8> %168, i32 68)
>  %172 = fmul float %171, %160
>  %173 = call float @llvm.SI.load.const(<16 x i8> %168, i32 72)
>  %174 = fmul float %173, %160
>  %175 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %176 = load <16 x i8>, <16 x i8> addrspace(2)* %175, align 16, !invariant.load !0
>  %177 = call float @llvm.SI.load.const(<16 x i8> %176, i32 80)
>  %178 = fmul float %177, %163
>  %179 = fadd float %178, %170
>  %180 = call float @llvm.SI.load.const(<16 x i8> %176, i32 84)
>  %181 = fmul float %180, %163
>  %182 = fadd float %181, %172
>  %183 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %184 = load <16 x i8>, <16 x i8> addrspace(2)* %183, align 16, !invariant.load !0
>  %185 = call float @llvm.SI.load.const(<16 x i8> %184, i32 88)
>  %186 = fmul float %185, %163
>  %187 = fadd float %186, %174
>  %188 = call float @llvm.SI.load.const(<16 x i8> %184, i32 96)
>  %189 = fmul float %188, %166
>  %190 = fadd float %189, %179
>  %191 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %192 = load <16 x i8>, <16 x i8> addrspace(2)* %191, align 16, !invariant.load !0
>  %193 = call float @llvm.SI.load.const(<16 x i8> %192, i32 100)
>  %194 = fmul float %193, %166
>  %195 = fadd float %194, %182
>  %196 = call float @llvm.SI.load.const(<16 x i8> %192, i32 104)
>  %197 = fmul float %196, %166
>  %198 = fadd float %197, %187
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 112)
>  %202 = fadd float %190, %201
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 116)
>  %204 = fadd float %195, %203
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 120)
>  %206 = fadd float %198, %205
>  %207 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %208 = load <8 x i32>, <8 x i32> addrspace(2)* %207, align 32, !invariant.load !0
>  %209 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %210 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %209, i64 0, i64 3, !amdgpu.uniform !0
>  %211 = load <4 x i32>, <4 x i32> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = extractelement <8 x i32> %208, i32 7
>  %213 = extractelement <4 x i32> %211, i32 0
>  %214 = and i32 %213, %212
>  %215 = insertelement <4 x i32> %211, i32 %214, i32 0
>  %216 = bitcast float %206 to i32
>  %217 = bitcast float %202 to i32
>  %218 = bitcast float %204 to i32
>  %219 = insertelement <4 x i32> undef, i32 %216, i32 0
>  %220 = insertelement <4 x i32> %219, i32 %217, i32 1
>  %221 = insertelement <4 x i32> %220, i32 %218, i32 2
>  %222 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %221, <8 x i32> %208, <4 x i32> %215, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %223 = extractelement <4 x float> %222, i32 0
>  %224 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %225 = load <8 x i32>, <8 x i32> addrspace(2)* %224, align 32, !invariant.load !0
>  %226 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %227 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %226, i64 0, i64 7, !amdgpu.uniform !0
>  %228 = load <4 x i32>, <4 x i32> addrspace(2)* %227, align 16, !invariant.load !0
>  %229 = extractelement <8 x i32> %225, i32 7
>  %230 = extractelement <4 x i32> %228, i32 0
>  %231 = and i32 %230, %229
>  %232 = insertelement <4 x i32> %228, i32 %231, i32 0
>  %233 = call float @llvm.amdgcn.cubetc(float %121, float %123, float %125)
>  %234 = call float @llvm.amdgcn.cubesc(float %121, float %123, float %125)
>  %235 = call float @llvm.amdgcn.cubema(float %121, float %123, float %125)
>  %236 = call float @llvm.amdgcn.cubeid(float %121, float %123, float %125)
>  %237 = call float @llvm.fabs.f32(float %235)
>  %238 = fdiv float 1.000000e+00, %237, !fpmath !1
>  %239 = fmul float %233, %238
>  %240 = fadd float %239, 1.500000e+00
>  %241 = fmul float %234, %238
>  %242 = fadd float %241, 1.500000e+00
>  %243 = bitcast float %242 to i32
>  %244 = bitcast float %240 to i32
>  %245 = bitcast float %236 to i32
>  %246 = insertelement <4 x i32> undef, i32 %243, i32 0
>  %247 = insertelement <4 x i32> %246, i32 %244, i32 1
>  %248 = insertelement <4 x i32> %247, i32 %245, i32 2
>  %249 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %248, <8 x i32> %225, <4 x i32> %232, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %250 = extractelement <4 x float> %249, i32 0
>  %251 = extractelement <4 x float> %249, i32 1
>  %252 = extractelement <4 x float> %249, i32 2
>  %253 = extractelement <4 x float> %249, i32 3
>  %254 = fmul float %121, %49
>  %255 = fmul float %123, %50
>  %256 = fadd float %255, %254
>  %257 = fmul float %125, %51
>  %258 = fadd float %256, %257
>  %259 = fmul float %258, %121
>  %260 = fmul float %258, %123
>  %261 = fmul float %258, %125
>  %262 = fmul float %259, 2.000000e+00
>  %263 = fsub float %262, %49
>  %264 = fmul float %260, 2.000000e+00
>  %265 = fsub float %264, %50
>  %266 = fmul float %261, 2.000000e+00
>  %267 = fsub float %266, %51
>  %268 = fsub float 1.000000e+00, %79
>  %269 = fmul float %268, 6.000000e+00
>  %270 = fmul float %250, %253
>  %271 = fmul float %251, %253
>  %272 = fmul float %252, %253
>  %273 = fmul float %78, 4.000000e+00
>  %274 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %275 = load <16 x i8>, <16 x i8> addrspace(2)* %274, align 16, !invariant.load !0
>  %276 = call float @llvm.SI.load.const(<16 x i8> %275, i32 16)
>  %277 = call float @llvm.SI.load.const(<16 x i8> %275, i32 20)
>  %278 = call float @llvm.SI.load.const(<16 x i8> %275, i32 24)
>  %279 = fmul float %276, %121
>  %280 = fsub float -0.000000e+00, %279
>  %281 = fmul float %277, %123
>  %282 = fsub float %280, %281
>  %283 = fmul float %278, %125
>  %284 = fsub float %282, %283
>  %285 = call float @llvm.AMDGPU.clamp.(float %284, float 0.000000e+00, float 1.000000e+00)
>  %286 = fmul float %223, %223
>  %287 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %288 = load <16 x i8>, <16 x i8> addrspace(2)* %287, align 16, !invariant.load !0
>  %289 = call float @llvm.SI.load.const(<16 x i8> %288, i32 48)
>  %290 = fmul float %289, %286
>  %291 = call float @llvm.SI.load.const(<16 x i8> %288, i32 52)
>  %292 = fmul float %291, %286
>  %293 = call float @llvm.SI.load.const(<16 x i8> %288, i32 56)
>  %294 = fmul float %293, %286
>  %295 = fmul float %290, %78
>  %296 = fmul float %292, %78
>  %297 = fmul float %294, %78
>  %298 = fmul float %285, %295
>  %299 = fmul float %285, %296
>  %300 = fmul float %285, %297
>  %301 = fmul float %270, %273
>  %302 = fadd float %301, %298
>  %303 = fmul float %271, %273
>  %304 = fadd float %303, %299
>  %305 = fmul float %272, %273
>  %306 = fadd float %305, %300
>  %307 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %308 = load <16 x i8>, <16 x i8> addrspace(2)* %307, align 16, !invariant.load !0
>  %309 = call float @llvm.SI.load.const(<16 x i8> %308, i32 176)
>  %310 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %311 = fsub float %309, %310
>  %312 = call float @llvm.SI.load.const(<16 x i8> %308, i32 180)
>  %313 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %314 = fsub float %312, %313
>  %315 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %316 = load <16 x i8>, <16 x i8> addrspace(2)* %315, align 16, !invariant.load !0
>  %317 = call float @llvm.SI.load.const(<16 x i8> %316, i32 184)
>  %318 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %319 = fsub float %317, %318
>  %320 = fmul float %311, %311
>  %321 = fmul float %314, %314
>  %322 = fadd float %321, %320
>  %323 = fmul float %319, %319
>  %324 = fadd float %322, %323
>  %325 = call float @llvm.sqrt.f32(float %324)
>  %326 = fdiv float 1.000000e+00, %325, !fpmath !1
>  %327 = fmul float %311, %326
>  %328 = fmul float %314, %326
>  %329 = fmul float %319, %326
>  %330 = fmul float %327, %121
>  %331 = fmul float %328, %123
>  %332 = fadd float %331, %330
>  %333 = fmul float %329, %125
>  %334 = fadd float %332, %333
>  %335 = call float @llvm.AMDGPU.clamp.(float %334, float 0.000000e+00, float 1.000000e+00)
>  %336 = fmul float %324, %326
>  %337 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %338 = load <16 x i8>, <16 x i8> addrspace(2)* %337, align 16, !invariant.load !0
>  %339 = call float @llvm.SI.load.const(<16 x i8> %338, i32 188)
>  %340 = fmul float %336, %339
>  %341 = call float @llvm.AMDGPU.clamp.(float %340, float 0.000000e+00, float 1.000000e+00)
>  %342 = fsub float 1.000000e+00, %341
>  %343 = call float @llvm.SI.load.const(<16 x i8> %338, i32 192)
>  %344 = fmul float %343, %342
>  %345 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %346 = load <16 x i8>, <16 x i8> addrspace(2)* %345, align 16, !invariant.load !0
>  %347 = call float @llvm.SI.load.const(<16 x i8> %346, i32 196)
>  %348 = fmul float %347, %342
>  %349 = call float @llvm.SI.load.const(<16 x i8> %346, i32 200)
>  %350 = fmul float %349, %342
>  %351 = fmul float %344, %78
>  %352 = fmul float %348, %78
>  %353 = fmul float %350, %78
>  %354 = fmul float %335, %351
>  %355 = fadd float %354, %302
>  %356 = fmul float %335, %352
>  %357 = fadd float %356, %304
>  %358 = fmul float %335, %353
>  %359 = fadd float %358, %306
>  %360 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %361 = load <16 x i8>, <16 x i8> addrspace(2)* %360, align 16, !invariant.load !0
>  %362 = call float @llvm.SI.load.const(<16 x i8> %361, i32 208)
>  %363 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %364 = fsub float %362, %363
>  %365 = call float @llvm.SI.load.const(<16 x i8> %361, i32 212)
>  %366 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %367 = fsub float %365, %366
>  %368 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %369 = load <16 x i8>, <16 x i8> addrspace(2)* %368, align 16, !invariant.load !0
>  %370 = call float @llvm.SI.load.const(<16 x i8> %369, i32 216)
>  %371 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %372 = fsub float %370, %371
>  %373 = fmul float %364, %364
>  %374 = fmul float %367, %367
>  %375 = fadd float %374, %373
>  %376 = fmul float %372, %372
>  %377 = fadd float %375, %376
>  %378 = call float @llvm.sqrt.f32(float %377)
>  %379 = fdiv float 1.000000e+00, %378, !fpmath !1
>  %380 = fmul float %364, %379
>  %381 = fmul float %367, %379
>  %382 = fmul float %372, %379
>  %383 = fmul float %380, %121
>  %384 = fmul float %381, %123
>  %385 = fadd float %384, %383
>  %386 = fmul float %382, %125
>  %387 = fadd float %385, %386
>  %388 = call float @llvm.AMDGPU.clamp.(float %387, float 0.000000e+00, float 1.000000e+00)
>  %389 = fmul float %377, %379
>  %390 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %391 = load <16 x i8>, <16 x i8> addrspace(2)* %390, align 16, !invariant.load !0
>  %392 = call float @llvm.SI.load.const(<16 x i8> %391, i32 220)
>  %393 = fmul float %389, %392
>  %394 = call float @llvm.AMDGPU.clamp.(float %393, float 0.000000e+00, float 1.000000e+00)
>  %395 = fsub float 1.000000e+00, %394
>  %396 = call float @llvm.SI.load.const(<16 x i8> %391, i32 224)
>  %397 = fmul float %396, %395
>  %398 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %399 = load <16 x i8>, <16 x i8> addrspace(2)* %398, align 16, !invariant.load !0
>  %400 = call float @llvm.SI.load.const(<16 x i8> %399, i32 228)
>  %401 = fmul float %400, %395
>  %402 = call float @llvm.SI.load.const(<16 x i8> %399, i32 232)
>  %403 = fmul float %402, %395
>  %404 = fmul float %397, %78
>  %405 = fmul float %401, %78
>  %406 = fmul float %403, %78
>  %407 = fmul float %388, %404
>  %408 = fadd float %407, %355
>  %409 = fmul float %388, %405
>  %410 = fadd float %409, %357
>  %411 = fmul float %388, %406
>  %412 = fadd float %411, %359
>  %413 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %414 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %415 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %416 = load <8 x i32>, <8 x i32> addrspace(2)* %415, align 32, !invariant.load !0
>  %417 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %418 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %417, i64 0, i64 27, !amdgpu.uniform !0
>  %419 = load <4 x i32>, <4 x i32> addrspace(2)* %418, align 16, !invariant.load !0
>  %420 = extractelement <8 x i32> %416, i32 7
>  %421 = extractelement <4 x i32> %419, i32 0
>  %422 = and i32 %421, %420
>  %423 = insertelement <4 x i32> %419, i32 %422, i32 0
>  %424 = bitcast float %413 to i32
>  %425 = bitcast float %414 to i32
>  %426 = insertelement <2 x i32> undef, i32 %424, i32 0
>  %427 = insertelement <2 x i32> %426, i32 %425, i32 1
>  %428 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %427, <8 x i32> %416, <4 x i32> %423, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %429 = extractelement <4 x float> %428, i32 0
>  %430 = extractelement <4 x float> %428, i32 1
>  %431 = extractelement <4 x float> %428, i32 2
>  %432 = fmul float %429, 0x3FD3333340000000
>  %433 = fmul float %430, 0x3FE2E147A0000000
>  %434 = fadd float %433, %432
>  %435 = fmul float %431, 0x3FBC28F5C0000000
>  %436 = fadd float %434, %435
>  %437 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %438 = load <16 x i8>, <16 x i8> addrspace(2)* %437, align 16, !invariant.load !0
>  %439 = call float @llvm.SI.load.const(<16 x i8> %438, i32 320)
>  %440 = fmul float %436, %439
>  %441 = call float @llvm.SI.load.const(<16 x i8> %438, i32 316)
>  %442 = fadd float %441, 1.000000e+00
>  %443 = fmul float %440, %442
>  %444 = fmul float %429, %443
>  %445 = fmul float %430, %443
>  %446 = fmul float %431, %443
>  %447 = fmul float %444, 3.200000e+01
>  %448 = fmul float %445, 3.200000e+01
>  %449 = fmul float %446, 3.200000e+01
>  %450 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %451 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %452 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %453 = load <8 x i32>, <8 x i32> addrspace(2)* %452, align 32, !invariant.load !0
>  %454 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %455 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %454, i64 0, i64 15, !amdgpu.uniform !0
>  %456 = load <4 x i32>, <4 x i32> addrspace(2)* %455, align 16, !invariant.load !0
>  %457 = extractelement <8 x i32> %453, i32 7
>  %458 = extractelement <4 x i32> %456, i32 0
>  %459 = and i32 %458, %457
>  %460 = insertelement <4 x i32> %456, i32 %459, i32 0
>  %461 = bitcast float %450 to i32
>  %462 = bitcast float %451 to i32
>  %463 = insertelement <2 x i32> undef, i32 %461, i32 0
>  %464 = insertelement <2 x i32> %463, i32 %462, i32 1
>  %465 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %464, <8 x i32> %453, <4 x i32> %460, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %466 = extractelement <4 x float> %465, i32 0
>  %467 = extractelement <4 x float> %465, i32 1
>  %468 = extractelement <4 x float> %465, i32 2
>  %469 = fmul float %49, %121
>  %470 = fmul float %50, %123
>  %471 = fadd float %470, %469
>  %472 = fmul float %51, %125
>  %473 = fadd float %471, %472
>  %474 = call float @llvm.AMDGPU.clamp.(float %473, float 0.000000e+00, float 1.000000e+00)
>  %475 = fsub float 1.000000e+00, %474
>  %476 = call float @llvm.pow.f32(float %475, float 5.000000e+00)
>  %477 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %478 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %479 = call float @llvm.maxnum.f32(float %79, float 0.000000e+00)
>  %480 = fmul float %476, %477
>  %481 = fmul float %476, %478
>  %482 = fmul float %476, %479
>  %483 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %484 = load <8 x i32>, <8 x i32> addrspace(2)* %483, align 32, !invariant.load !0
>  %485 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %486 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %485, i64 0, i64 11, !amdgpu.uniform !0
>  %487 = load <4 x i32>, <4 x i32> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = extractelement <8 x i32> %484, i32 7
>  %489 = extractelement <4 x i32> %487, i32 0
>  %490 = and i32 %489, %488
>  %491 = insertelement <4 x i32> %487, i32 %490, i32 0
>  %492 = call float @llvm.amdgcn.cubetc(float %263, float %265, float %267)
>  %493 = call float @llvm.amdgcn.cubesc(float %263, float %265, float %267)
>  %494 = call float @llvm.amdgcn.cubema(float %263, float %265, float %267)
>  %495 = call float @llvm.amdgcn.cubeid(float %263, float %265, float %267)
>  %496 = call float @llvm.fabs.f32(float %494)
>  %497 = fdiv float 1.000000e+00, %496, !fpmath !1
>  %498 = fmul float %492, %497
>  %499 = fadd float %498, 1.500000e+00
>  %500 = fmul float %493, %497
>  %501 = fadd float %500, 1.500000e+00
>  %502 = bitcast float %501 to i32
>  %503 = bitcast float %499 to i32
>  %504 = bitcast float %495 to i32
>  %505 = bitcast float %269 to i32
>  %506 = insertelement <4 x i32> undef, i32 %502, i32 0
>  %507 = insertelement <4 x i32> %506, i32 %503, i32 1
>  %508 = insertelement <4 x i32> %507, i32 %504, i32 2
>  %509 = insertelement <4 x i32> %508, i32 %505, i32 3
>  %510 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %509, <8 x i32> %484, <4 x i32> %491, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %511 = extractelement <4 x float> %510, i32 0
>  %512 = extractelement <4 x float> %510, i32 1
>  %513 = extractelement <4 x float> %510, i32 2
>  %514 = fmul float %480, %511
>  %515 = fmul float %481, %512
>  %516 = fmul float %482, %513
>  %517 = fmul float %514, %157
>  %518 = fmul float %515, %157
>  %519 = fmul float %516, %157
>  %520 = fmul float %408, %466
>  %521 = fadd float %520, %517
>  %522 = fmul float %410, %467
>  %523 = fadd float %522, %518
>  %524 = fmul float %412, %468
>  %525 = fadd float %524, %519
>  %526 = fadd float %521, %447
>  %527 = fadd float %523, %448
>  %528 = fadd float %525, %449
>  %529 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %530 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %531 = load <16 x i8>, <16 x i8> addrspace(2)* %530, align 16, !invariant.load !0
>  %532 = call float @llvm.SI.load.const(<16 x i8> %531, i32 12)
>  %533 = fsub float %529, %532
>  %534 = call float @llvm.maxnum.f32(float %533, float 0.000000e+00)
>  %535 = call float @llvm.SI.load.const(<16 x i8> %531, i32 28)
>  %536 = call float @llvm.SI.load.const(<16 x i8> %531, i32 12)
>  %537 = fsub float %535, %536
>  %538 = fadd float %537, 0x3F50624DE0000000
>  %539 = fdiv float 1.000000e+00, %538, !fpmath !1
>  %540 = fmul float %534, %539
>  %541 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %542 = load <16 x i8>, <16 x i8> addrspace(2)* %541, align 16, !invariant.load !0
>  %543 = call float @llvm.SI.load.const(<16 x i8> %542, i32 28)
>  %544 = call float @llvm.floor.f32(float %543)
>  %545 = fsub float %543, %544
>  %546 = fmul float %545, 8.000000e+00
>  %547 = call float @llvm.pow.f32(float %540, float %546)
>  %548 = call float @llvm.AMDGPU.clamp.(float %547, float 0.000000e+00, float 1.000000e+00)
>  %549 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %550 = fmul float %549, %548
>  %551 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %552 = load <16 x i8>, <16 x i8> addrspace(2)* %551, align 16, !invariant.load !0
>  %553 = call float @llvm.SI.load.const(<16 x i8> %552, i32 32)
>  %554 = fsub float 1.000000e+00, %550
>  %555 = fmul float %526, %550
>  %556 = fmul float %553, %554
>  %557 = fadd float %555, %556
>  %558 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %559 = load <16 x i8>, <16 x i8> addrspace(2)* %558, align 16, !invariant.load !0
>  %560 = call float @llvm.SI.load.const(<16 x i8> %559, i32 36)
>  %561 = fsub float 1.000000e+00, %550
>  %562 = fmul float %527, %550
>  %563 = fmul float %560, %561
>  %564 = fadd float %562, %563
>  %565 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %566 = load <16 x i8>, <16 x i8> addrspace(2)* %565, align 16, !invariant.load !0
>  %567 = call float @llvm.SI.load.const(<16 x i8> %566, i32 40)
>  %568 = fsub float 1.000000e+00, %550
>  %569 = fmul float %528, %550
>  %570 = fmul float %567, %568
>  %571 = fadd float %569, %570
>  %572 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %573 = bitcast float %5 to i32
>  %574 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %573, 10
>  %575 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %574, float %557, 11
>  %576 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %575, float %564, 12
>  %577 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %576, float %571, 13
>  %578 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %577, float %572, 14
>  %579 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %578, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %579
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[10:13], v4, s[4:7], 0 idxen   ; E00C2000 80010A04
>	buffer_load_format_xyzw v[19:22], v5, s[12:15], 0 idxen ; E00C2000 80031305
>	buffer_load_format_xyzw v[15:18], v6, s[16:19], 0 idxen ; E00C2000 80040F06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s4                                    ; 7E000204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s4                                    ; 7E100204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	v_sub_f32_e32 v23, s7, v0                               ; 082E0007
>	v_mov_b32_e32 v7, s8                                    ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s4                                    ; 7E120204
>	v_mov_b32_e32 v22, s5                                   ; 7E2C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v27, s6, v1                               ; 08360206
>	v_mov_b32_e32 v24, s7                                   ; 7E300207
>	v_mov_b32_e32 v25, s8                                   ; 7E320208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v26, s4                                   ; 7E340204
>	v_sub_f32_e32 v28, s5, v14                              ; 08381C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[4:7], 0 idxen   ; E00C2000 80012108
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v5, v33                               ; 7E0A1121
>	v_mul_lo_i32 v26, v5, 48                                ; D2D6001A 00016105
>	v_add_i32_e32 v5, vcc, s14, v26                         ; 4A0A340E
>	v_add_i32_e32 v9, vcc, s13, v26                         ; 4A12340D
>	v_add_i32_e32 v22, vcc, s15, v26                        ; 4A2C340F
>	v_add_i32_e32 v6, vcc, s12, v26                         ; 4A0C340C
>	buffer_load_dword v8, v5, s[0:3], 0 offen               ; E0301000 80000805
>	buffer_load_dword v5, v9, s[0:3], 0 offen               ; E0301000 80000509
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v0, v9                            ; 0A2E1300
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v9, vcc, 0x8c, v26                        ; 4A1234FF 0000008C
>	v_add_i32_e32 v27, vcc, 0x9c, v26                       ; 4A3634FF 0000009C
>	v_add_i32_e32 v22, vcc, 0x84, v26                       ; 4A2C34FF 00000084
>	v_add_i32_e32 v24, vcc, 0x88, v26                       ; 4A3034FF 00000088
>	v_add_i32_e32 v7, vcc, 0x80, v26                        ; 4A0E34FF 00000080
>	v_add_i32_e32 v25, vcc, 0x94, v26                       ; 4A3234FF 00000094
>	buffer_load_dword v28, v9, s[0:3], 0 offen              ; E0301000 80001C09
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v22, v24, s[0:3], 0 offen             ; E0301000 80001618
>	v_add_i32_e32 v24, vcc, 0x90, v26                       ; 4A3034FF 00000090
>	v_add_i32_e32 v26, vcc, 0x98, v26                       ; 4A3434FF 00000098
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v1, v28                           ; 0A363901
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v28, v14, v29                          ; 0A383B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	v_cvt_i32_f32_e32 v7, v34                               ; 7E0E1122
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v9, vcc, s10, v26                         ; 4A12340A
>	v_add_i32_e32 v22, vcc, s9, v26                         ; 4A2C3409
>	v_add_i32_e32 v24, vcc, s8, v26                         ; 4A303408
>	v_add_i32_e32 v25, vcc, s4, v26                         ; 4A323404
>	v_mul_lo_i32 v33, v7, 48                                ; D2D60021 00016107
>	v_add_i32_e32 v7, vcc, s11, v26                         ; 4A0E340B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v28, vcc, s6, v26                         ; 4A383406
>	buffer_load_dword v27, v7, s[0:3], 0 offen              ; E0301000 80001B07
>	v_add_i32_e32 v7, vcc, s7, v26                          ; 4A0E3407
>	v_add_i32_e32 v26, vcc, s5, v26                         ; 4A343405
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	buffer_load_dword v34, v7, s[0:3], 0 offen              ; E0301000 80002207
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	v_mul_f32_e32 v6, v29, v6                               ; 100C0D1D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v23, v29, v23                             ; 102E2F1D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v14, v25                          ; 0A4A330E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v9, v29, v22                              ; 10122D1D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v22, v29, v24                             ; 102C311D
>	v_subrev_f32_e32 v24, v1, v27                           ; 0A303701
>	v_mul_f32_e32 v27, v29, v24                             ; 1036311D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v25, v29, v28                             ; 1032391D
>	v_mul_f32_e32 v24, v29, v34                             ; 1030451D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v0, v29                           ; 0A3A3B00
>	v_mac_f32_e32 v23, v30, v29                             ; 3E2E3B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v1, v29                           ; 0A3A3B01
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v30, v29                             ; 3E2C3B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v30, v29                             ; 3E303B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v30, v29                             ; 3E323B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s4, v33                         ; 4A3A4204
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v31, v30                             ; 3E2E3D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v31, v30                             ; 3E2C3D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v31, v30                             ; 3E303D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v31, v30                             ; 3E323D1F
>	v_add_i32_e32 v30, vcc, s5, v29                         ; 4A3C3A05
>	v_add_i32_e32 v29, vcc, s4, v29                         ; 4A3A3A04
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v32, v30                             ; 3E2E3D20
>	v_add_i32_e32 v30, vcc, 0x8c, v29                       ; 4A3C3AFF 0000008C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0x80, v29                       ; 4A3C3AFF 00000080
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0x84, v29                       ; 4A3C3AFF 00000084
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0x88, v29                       ; 4A3C3AFF 00000088
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v32, v30                             ; 3E2C3D20
>	v_add_i32_e32 v30, vcc, 0x90, v29                       ; 4A3C3AFF 00000090
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v32, v30                             ; 3E303D20
>	v_add_i32_e32 v30, vcc, 0x94, v29                       ; 4A3C3AFF 00000094
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v32, v30                             ; 3E323D20
>	v_add_i32_e32 v30, vcc, 0x98, v29                       ; 4A3C3AFF 00000098
>	v_add_i32_e32 v29, vcc, 0x9c, v29                       ; 4A3A3AFF 0000009C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v29, v6, v11                              ; 103A1706
>	v_mac_f32_e32 v29, v8, v10                              ; 3E3A1508
>	v_mac_f32_e32 v29, v5, v12                              ; 3E3A1905
>	v_mac_f32_e32 v29, v23, v13                             ; 3E3A1B17
>	v_mul_f32_e32 v23, v9, v11                              ; 102E1709
>	v_mac_f32_e32 v23, v7, v10                              ; 3E2E1507
>	v_mac_f32_e32 v23, v22, v12                             ; 3E2E1916
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v23, v27, v13                             ; 3E2E1B1B
>	v_mul_f32_e32 v27, v25, v11                             ; 10361719
>	v_mul_f32_e32 v11, 0, v11                               ; 10161680
>	v_mac_f32_e32 v27, v24, v10                             ; 3E361518
>	v_mac_f32_e32 v11, 0, v10                               ; 3E161480
>	v_add_f32_e32 v19, v19, v19                             ; 06262713
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mac_f32_e32 v27, v26, v12                             ; 3E36191A
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_mad_f32 v12, v19, v8, -v8                             ; D282000C 84221113
>	v_mad_f32 v20, 2.0, v20, -1.0                           ; D2820014 03CE28F4
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v8, v15, v8, -v8                              ; D2820008 8422110F
>	v_mad_f32 v21, 2.0, v21, -1.0                           ; D2820015 03CE2AF4
>	v_mac_f32_e32 v12, v6, v20                              ; 3E182906
>	v_mac_f32_e32 v8, v6, v16                               ; 3E102106
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_add_f32_e32 v0, v0, v29                               ; 06003B00
>	v_mad_f32 v6, v15, v24, -v24                            ; D2820006 8462310F
>	v_mac_f32_e32 v12, v5, v21                              ; 3E182B05
>	v_mac_f32_e32 v8, v5, v17                               ; 3E102305
>	v_mad_f32 v5, v15, v7, -v7                              ; D2820005 841E0F0F
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v15, s7, v0                               ; 101E0007
>	s_buffer_load_dword s7, s[0:3], 0x7                     ; C2038107
>	s_buffer_load_dword s11, s[0:3], 0xb                    ; C205810B
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_add_f32_e32 v1, v1, v23                               ; 06022F01
>	v_mac_f32_e32 v27, v28, v13                             ; 3E361B1C
>	v_add_f32_e32 v10, v13, v11                             ; 0614170D
>	v_add_f32_e32 v11, v14, v27                             ; 0616370E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v1                               ; 3E1E0207
>	v_mad_f32 v13, v19, v7, -v7                             ; D282000D 841E0F13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	s_buffer_load_dword s11, s[0:3], 0xf                    ; C205810F
>	v_mac_f32_e32 v13, v9, v20                              ; 3E1A2909
>	v_mac_f32_e32 v5, v9, v16                               ; 3E0A2109
>	v_mul_f32_e32 v7, s4, v0                                ; 100E0004
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	v_mul_f32_e32 v9, s5, v0                                ; 10120005
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s9, s[0:3], 0x8                     ; C2048108
>	s_buffer_load_dword s10, s[0:3], 0x9                    ; C2050109
>	s_buffer_load_dword s7, s[0:3], 0xa                     ; C203810A
>	s_buffer_load_dword s12, s[0:3], 0xc                    ; C206010C
>	s_buffer_load_dword s13, s[0:3], 0xd                    ; C206810D
>	s_buffer_load_dword s14, s[0:3], 0xe                    ; C207010E
>	s_buffer_load_dword s15, s[0:3], 0x14                   ; C2078114
>	s_buffer_load_dword s16, s[0:3], 0x15                   ; C2080115
>	s_buffer_load_dword s17, s[0:3], 0x16                   ; C2088116
>	s_buffer_load_dword s18, s[0:3], 0x17                   ; C2090117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s11, v10                             ; 3E1E140B
>	v_mac_f32_e32 v6, v25, v16                              ; 3E0C2119
>	v_mac_f32_e32 v7, s8, v1                                ; 3E0E0208
>	v_mac_f32_e32 v9, s4, v1                                ; 3E120204
>	v_mul_f32_e32 v16, s0, v15                              ; 10201E00
>	exp 15, 32, 0, 0, 0, v0, v1, v11, v16                   ; F800020F 100B0100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v0, s6, v0                                ; 10000006
>	v_mac_f32_e32 v0, s5, v1                                ; 3E000205
>	v_mac_f32_e32 v0, s7, v11                               ; 3E001607
>	v_mac_f32_e32 v0, s14, v10                              ; 3E00140E
>	v_mov_b32_e32 v1, s15                                   ; 7E02020F
>	v_mac_f32_e32 v1, s16, v0                               ; 3E020010
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mad_f32 v14, v19, v24, -v24                           ; D282000E 84623113
>	v_mac_f32_e32 v14, v25, v20                             ; 3E1C2919
>	v_mac_f32_e32 v7, s9, v11                               ; 3E0E1609
>	v_mac_f32_e32 v9, s10, v11                              ; 3E12160A
>	v_mul_legacy_f32_e32 v1, s17, v1                        ; 0E020211
>	v_mac_f32_e32 v14, v26, v21                             ; 3E1C2B1A
>	v_mac_f32_e32 v5, v22, v17                              ; 3E0A2316
>	v_mac_f32_e32 v7, s12, v10                              ; 3E0E140C
>	v_mac_f32_e32 v9, s13, v10                              ; 3E12140D
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_sub_f32_e64 v10, 1.0, s18                             ; D208000A 000024F2
>	v_mac_f32_e32 v10, s18, v1                              ; 3E140212
>	v_mac_f32_e32 v13, v22, v21                             ; 3E1A2B16
>	v_mac_f32_e32 v6, v26, v17                              ; 3E0C231A
>	v_mul_f32_e32 v1, v5, v14                               ; 10021D05
>	v_mul_f32_e32 v11, v6, v12                              ; 10161906
>	v_mul_f32_e32 v16, v8, v13                              ; 10201B08
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_add_f32_e32 v18, v18, v18                             ; 06242512
>	v_mad_f32 v1, v13, v6, -v1                              ; D2820001 84060D0D
>	v_mad_f32 v11, v14, v8, -v11                            ; D282000B 842E110E
>	v_mad_f32 v16, v12, v5, -v16                            ; D2820010 84420B0C
>	v_mad_f32 v1, v18, v1, -v1                              ; D2820001 84060312
>	exp 15, 33, 0, 0, 0, v3, v4, v10, v0                    ; F800021F 000A0403
>	v_mad_f32 v11, v18, v11, -v11                           ; D282000B 842E1712
>	v_mad_f32 v16, v18, v16, -v16                           ; D2820010 84422112
>	exp 15, 34, 0, 0, 0, v8, v5, v6, v1                     ; F800022F 01060508
>	exp 15, 35, 0, 0, 0, v11, v16, v12, v13                 ; F800023F 0D0C100B
>	exp 15, 36, 0, 0, 0, v14, v0, v0, v0                    ; F800024F 0000000E
>	exp 15, 12, 0, 1, 0, v7, v9, v0, v15                    ; F80008CF 0F000907
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v11, v4, 3, 2, [m0]                         ; C82C0B04
>	v_interp_p2_f32 v11, [v11], v5, 3, 2, [m0]                  ; C82D0B05
>	v_interp_p1_f32 v12, v4, 0, 3, [m0]                         ; C8300C04
>	v_interp_p2_f32 v12, [v12], v5, 0, 3, [m0]                  ; C8310C05
>	v_interp_p1_f32 v14, v4, 1, 3, [m0]                         ; C8380D04
>	v_interp_p2_f32 v14, [v14], v5, 1, 3, [m0]                  ; C8390D05
>	v_interp_p1_f32 v0, v4, 2, 3, [m0]                          ; C8000E04
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	v_interp_p2_f32 v0, [v0], v5, 2, 3, [m0]                    ; C8010E05
>	v_interp_p1_f32 v1, v4, 3, 3, [m0]                          ; C8040F04
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	v_interp_p2_f32 v1, [v1], v5, 3, 3, [m0]                    ; C8050F05
>	v_interp_p1_f32 v6, v4, 0, 4, [m0]                          ; C8181004
>	s_buffer_load_dword s11, s[0:3], 0x2                        ; C2058102
>	v_interp_p2_f32 v6, [v6], v5, 0, 4, [m0]                    ; C8191005
>	v_interp_p1_f32 v15, v2, 0, 0, [m0]                         ; C83C0002
>	v_interp_p2_f32 v15, [v15], v3, 0, 0, [m0]                  ; C83D0003
>	v_interp_p1_f32 v17, v2, 1, 0, [m0]                         ; C8440102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v16, s8, v15                                  ; 08201E08
>	v_interp_p2_f32 v17, [v17], v3, 1, 0, [m0]                  ; C8450103
>	v_interp_p1_f32 v19, v2, 2, 0, [m0]                         ; C84C0202
>	v_sub_f32_e32 v18, s9, v17                                  ; 08242209
>	v_mul_f32_e32 v7, v16, v16                                  ; 100E2110
>	v_interp_p2_f32 v19, [v19], v3, 2, 0, [m0]                  ; C84D0203
>	v_sub_f32_e32 v20, s11, v19                                 ; 0828260B
>	v_mac_f32_e32 v7, v18, v18                                  ; 3E0E2512
>	v_mac_f32_e32 v7, v20, v20                                  ; 3E0E2914
>	v_rsq_f32_e32 v21, v7                                       ; 7E2A5D07
>	v_mul_f32_e32 v7, v0, v0                                    ; 100E0100
>	v_mac_f32_e32 v7, v1, v1                                    ; 3E0E0301
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_rsq_f32_e32 v7, v7                                        ; 7E0E5D07
>	v_mul_f32_e32 v22, v21, v16                                 ; 102C2115
>	v_mul_f32_e32 v23, v21, v18                                 ; 102E2515
>	s_load_dwordx4 s[32:35], s[4:5], 0x5c                       ; C090055C
>	v_mul_f32_e32 v24, v7, v0                                   ; 10300107
>	v_mul_f32_e32 v25, v7, v1                                   ; 10320307
>	v_mul_f32_e32 v0, v24, v22                                  ; 10002D18
>	s_load_dwordx8 s[16:23], s[4:5], 0x50                       ; C0C80550
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                       ; C092054C
>	s_load_dwordx8 s[24:31], s[4:5], 0x40                       ; C0CC0540
>	v_mul_f32_e32 v26, v7, v6                                   ; 10340D07
>	v_mul_f32_e32 v27, v21, v20                                 ; 10362915
>	v_mac_f32_e32 v0, v25, v23                                  ; 3E002F19
>	v_mac_f32_e32 v0, v26, v27                                  ; 3E00371A
>	v_sub_f32_e32 v0, 1.0, v0                                   ; 080000F2
>	v_add_f32_e64 v28, v0, 0 clamp                              ; D206081C 00010100
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_buffer_load_dword s40, s[0:3], 0x10                       ; C2140110
>	s_buffer_load_dword s41, s[0:3], 0x11                       ; C2148111
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s32, s32, s23                                     ; 87201720
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	s_and_b32 s36, s36, s31                                     ; 87241F24
>	image_sample v[9:10], v[0:1], s[16:23], s[32:35] dmask:0x6  ; F0800600 01040900
>	image_sample v[7:8], v[0:1], s[24:31], s[36:39] dmask:0xa   ; F0800A00 01260700
>	v_interp_p1_f32 v29, v4, 0, 2, [m0]                         ; C8740804
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	s_buffer_load_dword s42, s[0:3], 0x16                       ; C2150116
>	v_interp_p2_f32 v29, [v29], v5, 0, 2, [m0]                  ; C8750805
>	v_interp_p1_f32 v30, v4, 1, 2, [m0]                         ; C8780904
>	s_buffer_load_dword s43, s[0:3], 0x18                       ; C2158118
>	s_buffer_load_dword s44, s[0:3], 0x19                       ; C2160119
>	s_buffer_load_dword s45, s[0:3], 0x1a                       ; C216811A
>	v_interp_p2_f32 v30, [v30], v5, 1, 2, [m0]                  ; C8790905
>	v_interp_p1_f32 v31, v4, 2, 2, [m0]                         ; C87C0A04
>	s_buffer_load_dword s46, s[0:3], 0x1c                       ; C217011C
>	s_buffer_load_dword s47, s[0:3], 0x1d                       ; C217811D
>	s_buffer_load_dword s48, s[0:3], 0x1e                       ; C218011E
>	s_load_dwordx4 s[12:15], s[4:5], 0xc                        ; C086050C
>	s_load_dwordx8 s[16:23], s[4:5], 0x0                        ; C0C80500
>	v_mov_b32_e32 v4, 0x403b800a                                ; 7E0802FF 403B800A
>	v_interp_p2_f32 v31, [v31], v5, 2, 2, [m0]                  ; C87D0A05
>	v_mad_f32 v5, v4, v24, v15                                  ; D2820005 043E3104
>	v_mul_f32_e32 v6, s40, v5                                   ; 100C0A28
>	v_mul_f32_e32 v32, s41, v5                                  ; 10400A29
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v33, s8, v5                                   ; 10420A08
>	v_mad_f32 v5, v4, v25, v17                                  ; D2820005 04463304
>	v_mac_f32_e32 v6, s9, v5                                    ; 3E0C0A09
>	v_mad_f32 v4, v4, v26, v19                                  ; D2820004 044E3504
>	v_mac_f32_e32 v32, s11, v5                                  ; 3E400A0B
>	v_mac_f32_e32 v33, s42, v5                                  ; 3E420A2A
>	v_mac_f32_e32 v6, s43, v4                                   ; 3E0C082B
>	v_mac_f32_e32 v32, s44, v4                                  ; 3E40082C
>	v_mac_f32_e32 v33, s45, v4                                  ; 3E42082D
>	v_add_f32_e32 v5, s46, v6                                   ; 060A0C2E
>	v_add_f32_e32 v6, s47, v32                                  ; 060C402F
>	v_add_f32_e32 v4, s48, v33                                  ; 06084230
>	s_and_b32 s12, s12, s23                                     ; 870C170C
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	image_sample_c v32, v[4:7], s[16:23], s[12:15] dmask:0x1    ; F0A00100 00642004
>	v_add_f32_e32 v4, v8, v8                                    ; 06081108
>	v_add_f32_e32 v6, v7, v7                                    ; 060C0F07
>	v_mad_f32 v7, 2.0, v7, -1.0                                 ; D2820007 03CE0EF4
>	v_mad_f32 v29, v4, v29, -v29                                ; D282001D 84763B04
>	v_mad_f32 v30, v4, v30, -v30                                ; D282001E 847A3D04
>	v_mad_f32 v31, v4, v31, -v31                                ; D282001F 847E3F04
>	v_mad_f32 v5, 2.0, v8, -1.0                                 ; D2820005 03CE10F4
>	v_mad_f32 v4, v6, v7, -v7                                   ; D2820004 841E0F06
>	v_mac_f32_e32 v4, v5, v5                                    ; 3E080B05
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	v_sub_f32_e32 v4, 0x3f8020c5, v4                            ; 080808FF 3F8020C5
>	v_mac_f32_e32 v29, v7, v11                                  ; 3E3A1707
>	v_sqrt_f32_e32 v4, v4                                       ; 7E086704
>	v_mac_f32_e32 v30, v7, v12                                  ; 3E3C1907
>	v_mac_f32_e32 v29, v4, v24                                  ; 3E3A3104
>	v_mac_f32_e32 v31, v7, v14                                  ; 3E3E1D07
>	v_mac_f32_e32 v30, v4, v25                                  ; 3E3C3304
>	v_mul_f32_e32 v11, v22, v29                                 ; 10163B16
>	v_mac_f32_e32 v31, v4, v26                                  ; 3E3E3504
>	v_mac_f32_e32 v11, v23, v30                                 ; 3E163D17
>	v_mac_f32_e32 v11, v27, v31                                 ; 3E163F1B
>	v_mul_f32_e32 v8, v29, v11                                  ; 1010171D
>	v_mul_f32_e32 v12, v30, v11                                 ; 1018171E
>	v_mac_f32_e32 v8, v29, v11                                  ; 3E10171D
>	v_mul_f32_e32 v14, v31, v11                                 ; 101C171F
>	v_mad_f32 v4, v16, v21, -v8                                 ; D2820004 84222B10
>	v_mac_f32_e32 v12, v30, v11                                 ; 3E18171E
>	v_mul_f32_e32 v7, v24, v4                                   ; 100E0918
>	v_mad_f32 v4, v18, v21, -v12                                ; D2820004 84322B12
>	v_mac_f32_e32 v14, v31, v11                                 ; 3E1C171F
>	v_mac_f32_e32 v7, v25, v4                                   ; 3E0E0919
>	v_mad_f32 v4, v20, v21, -v14                                ; D2820004 843A2B14
>	v_mac_f32_e32 v7, v26, v4                                   ; 3E0E091A
>	v_cubema_f32 v4, v29, v30, v31                              ; D28E0004 047E3D1D
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	v_add_f32_e32 v7, 1.0, v7                                   ; 060E0EF2
>	s_load_dwordx8 s[36:43], s[4:5], 0x10                       ; C0D20510
>	s_load_dwordx4 s[44:47], s[4:5], 0x1c                       ; C096051C
>	v_subrev_f32_e32 v7, v28, v7                                ; 0A0E0F1C
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                       ; C08C053C
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	v_cubetc_f32 v6, v29, v30, v31                              ; D28C0006 047E3D1D
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v22, v29, v30, v31                             ; D28A0016 047E3D1D
>	v_add_f32_e64 v7, v7, 0 clamp                               ; D2060807 00010107
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v22, v4                                   ; D2820005 04122D05
>	v_sub_f32_e32 v22, 1.0, v7                                  ; 082C0EF2
>	v_mad_f32 v7, -v7, v22, v22                                 ; D2820007 245A2D07
>	v_mul_f32_e32 v22, v7, v9                                   ; 102C1307
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s44, s44, s43                                     ; 872C2B2C
>	v_cubeid_f32 v7, v29, v30, v31                              ; D2880007 047E3D1D
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	v_mad_f32 v16, -v16, v21, v8                                ; D2820010 24222B10
>	image_sample v[5:8], v[5:8], s[36:43], s[44:47] dmask:0xf   ; F0800F00 01690505
>	s_load_dwordx8 s[36:43], s[4:5], 0x60                       ; C0D20560
>	s_load_dwordx4 s[4:7], s[4:5], 0x6c                         ; C082056C
>	v_mad_f32 v12, -v18, v21, v12                               ; D282000C 24322B12
>	v_mad_f32 v14, -v20, v21, v14                               ; D282000E 243A2B14
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v18, v8, v5                                   ; 10240B08
>	v_mul_f32_e32 v20, v8, v6                                   ; 10280D08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s4, s4, s43                                       ; 87042B04
>	v_mul_f32_e32 v8, v8, v7                                    ; 10100F08
>	image_sample v[5:7], v[0:1], s[36:43], s[4:7] dmask:0x7     ; F0800700 00290500
>	s_buffer_load_dword s5, s[0:3], 0x50                        ; C2028150
>	s_buffer_load_dword s4, s[0:3], 0x4f                        ; C202014F
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v21, 0x3e99999a, v5                           ; 102A0AFF 3E99999A
>	v_mac_f32_e32 v21, 0x3f170a3d, v6                           ; 3E2A0CFF 3F170A3D
>	v_mac_f32_e32 v21, 0x3de147ae, v7                           ; 3E2A0EFF 3DE147AE
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v21, s5, v21                                  ; 102A2A05
>	v_mac_f32_e32 v21, s4, v21                                  ; 3E2A2A04
>	s_buffer_load_dword s4, s[0:3], 0x4                         ; C2020104
>	s_buffer_load_dword s5, s[0:3], 0x5                         ; C2028105
>	s_buffer_load_dword s6, s[0:3], 0x6                         ; C2030106
>	v_mul_f32_e32 v23, v21, v5                                  ; 102E0B15
>	s_buffer_load_dword s8, s[0:3], 0x2c                        ; C204012C
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v5, s4, v29                                   ; 100A3A04
>	v_mad_f32 v5, -s5, v30, -v5                                 ; D2820005 A4163C05
>	v_mad_f32 v5, -s6, v31, v5                                  ; D2820005 24163E06
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	v_mul_f32_e32 v24, v21, v6                                  ; 10300D15
>	v_mul_f32_e32 v6, v32, v32                                  ; 100C4120
>	s_buffer_load_dword s9, s[0:3], 0x2d                        ; C204812D
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v25, s5, v6                                   ; 10320C05
>	v_mul_f32_e32 v21, v21, v7                                  ; 102A0F15
>	v_mul_f32_e32 v7, s4, v6                                    ; 100E0C04
>	v_mul_f32_e32 v6, s6, v6                                    ; 100C0C06
>	s_buffer_load_dword s11, s[0:3], 0x2e                       ; C205812E
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v25, v9, v25                                  ; 10323309
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_mul_f32_e32 v27, v6, v5                                   ; 10360B06
>	v_mul_f32_e32 v26, v7, v5                                   ; 10340B07
>	v_mul_f32_e32 v25, v25, v5                                  ; 10320B19
>	v_mul_f32_e32 v5, 4.0, v9                                   ; 100A12F6
>	v_mac_f32_e32 v27, v5, v8                                   ; 3E361105
>	v_mac_f32_e32 v26, v5, v18                                  ; 3E342505
>	v_mac_f32_e32 v25, v5, v20                                  ; 3E322905
>	v_sub_f32_e32 v5, s8, v15                                   ; 080A1E08
>	v_sub_f32_e32 v6, s9, v17                                   ; 080C2209
>	v_mul_f32_e32 v7, v5, v5                                    ; 100E0B05
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v8, s11, v19                                  ; 0810260B
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_mac_f32_e32 v7, v8, v8                                    ; 3E0E1108
>	v_rsq_f32_e32 v18, v7                                       ; 7E245D07
>	s_buffer_load_dword s36, s[0:3], 0x2f                       ; C212012F
>	s_buffer_load_dword s4, s[0:3], 0x30                        ; C2020130
>	s_buffer_load_dword s5, s[0:3], 0x31                        ; C2028131
>	v_mul_f32_e32 v5, v18, v5                                   ; 100A0B12
>	v_mul_f32_e32 v6, v18, v6                                   ; 100C0D12
>	v_mul_f32_e32 v5, v29, v5                                   ; 100A0B1D
>	v_mac_f32_e32 v5, v30, v6                                   ; 3E0A0D1E
>	v_mul_f32_e32 v6, v18, v8                                   ; 100C1112
>	v_mac_f32_e32 v5, v31, v6                                   ; 3E0A0D1F
>	v_mul_f32_e32 v6, v18, v7                                   ; 100C0F12
>	s_buffer_load_dword s6, s[0:3], 0x32                        ; C2030132
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s36, v6                                   ; 100C0C24
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s8, s[0:3], 0x34                        ; C2040134
>	v_mad_f32 v7, -v6, s4, s4                                   ; D2820007 20100906
>	s_buffer_load_dword s9, s[0:3], 0x35                        ; C2048135
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	s_buffer_load_dword s4, s[0:3], 0x36                        ; C2020136
>	v_mac_f32_e32 v26, v7, v5                                   ; 3E340B07
>	v_mad_f32 v7, -v6, s5, s5                                   ; D2820007 20140B06
>	v_mad_f32 v6, -v6, s6, s6                                   ; D2820006 20180D06
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_mac_f32_e32 v25, v7, v5                                   ; 3E320B07
>	v_mac_f32_e32 v27, v6, v5                                   ; 3E360B06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s8, v15                                   ; 080A1E08
>	v_sub_f32_e32 v7, s9, v17                                   ; 080E2209
>	v_mul_f32_e32 v8, v5, v5                                    ; 10100B05
>	v_sub_f32_e32 v6, s4, v19                                   ; 080C2604
>	v_mac_f32_e32 v8, v7, v7                                    ; 3E100F07
>	v_mac_f32_e32 v8, v6, v6                                    ; 3E100D06
>	v_rsq_f32_e32 v15, v8                                       ; 7E1E5D08
>	s_buffer_load_dword s5, s[0:3], 0x37                        ; C2028137
>	s_buffer_load_dword s6, s[0:3], 0x38                        ; C2030138
>	s_buffer_load_dword s8, s[0:3], 0x39                        ; C2040139
>	v_mul_f32_e32 v5, v15, v5                                   ; 100A0B0F
>	v_mul_f32_e32 v5, v29, v5                                   ; 100A0B1D
>	v_mul_f32_e32 v7, v15, v7                                   ; 100E0F0F
>	v_mac_f32_e32 v5, v30, v7                                   ; 3E0A0F1E
>	v_mul_f32_e32 v6, v15, v6                                   ; 100C0D0F
>	v_mac_f32_e32 v5, v31, v6                                   ; 3E0A0D1F
>	v_mul_f32_e32 v6, v15, v8                                   ; 100C110F
>	s_buffer_load_dword s11, s[0:3], 0x3a                       ; C205813A
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s5, v6                                    ; 100C0C05
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mad_f32 v7, -v6, s6, s6                                   ; D2820007 20180D06
>	v_cubema_f32 v8, v16, v12, v14                              ; D28E0008 043A1910
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_rcp_f32_e64 v8, |v8|                                      ; D3540108 00000108
>	v_mac_f32_e32 v26, v7, v5                                   ; 3E340B07
>	v_mad_f32 v7, -v6, s8, s8                                   ; D2820007 20201106
>	v_mad_f32 v6, -v6, s11, s11                                 ; D2820006 202C1706
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_mac_f32_e32 v25, v7, v5                                   ; 3E320B07
>	v_mac_f32_e32 v27, v6, v5                                   ; 3E360B06
>	v_cubetc_f32 v5, v16, v12, v14                              ; D28C0005 043A1910
>	v_cubesc_f32 v7, v16, v12, v14                              ; D28A0007 043A1910
>	v_mad_f32 v5, v8, v5, v4                                    ; D2820005 04120B08
>	v_mac_f32_e32 v4, v8, v7                                    ; 3E080F08
>	v_add_f32_e64 v8, v11, 0 clamp                              ; D2060808 0001010B
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_log_f32_e32 v11, v8                                       ; 7E164F08
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	s_buffer_load_dword s7, s[0:3], 0x7                         ; C2038107
>	s_and_b32 s24, s24, s35                                     ; 87182318
>	v_cubeid_f32 v6, v16, v12, v14                              ; D2880006 043A1910
>	v_mad_f32 v7, -v10, v7, v7                                  ; D2820007 241E0F0A
>	v_max_f32_e32 v12, 0, v10                                   ; 20181480
>	image_sample v[8:10], v[0:1], s[28:35], s[24:27] dmask:0x7  ; F0800700 00C70800
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v11                    ; 0E0016FF 40A00000
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_mul_f32_e32 v0, v12, v0                                   ; 1000010C
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v6, s4                                        ; 7E0C0204
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_add_f32_e32 v6, 0x3a83126f, v6                            ; 060C0CFF 3A83126F
>	v_mul_f32_e32 v5, v22, v0                                   ; 100A0116
>	v_mul_f32_e32 v1, v22, v1                                   ; 10020316
>	v_mul_f32_e32 v4, v22, v4                                   ; 10080916
>	v_rcp_f32_e32 v6, v6                                        ; 7E0C5506
>	v_mac_f32_e32 v1, v8, v26                                   ; 3E023508
>	v_mov_b32_e32 v0, 0x42000000                                ; 7E0002FF 42000000
>	v_mac_f32_e32 v4, v9, v25                                   ; 3E083309
>	v_mac_f32_e32 v5, v10, v27                                  ; 3E0A370A
>	v_mac_f32_e32 v1, v0, v23                                   ; 3E022F00
>	v_mac_f32_e32 v4, v0, v24                                   ; 3E083100
>	v_mac_f32_e32 v5, v0, v21                                   ; 3E0A2B00
>	v_subrev_f32_e32 v0, s4, v17                                ; 0A002204
>	v_max_f32_e32 v0, 0, v0                                     ; 20000080
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s7                                      ; 7E0C4807
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1712 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].xy, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SAMP[7]
>DCL SAMP[8]
>DCL SAMP[9]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL SVIEW[7], 2D, FLOAT
>DCL SVIEW[8], 2D, FLOAT
>DCL SVIEW[9], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..14]
>DCL CONST[22..35]
>DCL TEMP[0..71], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,    -1.0000,     1.0010}
>IMM[1] FLT32 {   -0.5000,     3.0000,     0.3000,    20.0000}
>IMM[2] FLT32 {    1.1000,     2.9297,     9.0000,     0.5000}
>IMM[3] FLT32 {    6.0000,     5.0000,     0.3333,     4.0000}
>IMM[4] FLT32 {    0.2500,     0.0000,    32.0000,     0.0000}
>IMM[5] INT32 {0, 2, 1, 0}
>IMM[6] FLT32 {    0.3000,     0.5900,     0.1100,     0.0010}
>IMM[7] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[4].wwww
>  1: MOV TEMP[0].yz, IN[5].yxyy
>  2: ADD TEMP[1].xyz, CONST[0].xyzz, -IN[0].xyzz
>  3: DP3 TEMP[2].x, TEMP[1].xyzz, TEMP[1].xyzz
>  4: RSQ TEMP[2].x, TEMP[2].xxxx
>  5: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xxxx
>  6: DP3 TEMP[2].x, IN[3].xyzz, IN[3].xyzz
>  7: RSQ TEMP[2].x, TEMP[2].xxxx
>  8: MUL TEMP[2].xyz, IN[3].xyzz, TEMP[2].xxxx
>  9: MOV TEMP[3].xy, IN[1].xyyy
> 10: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 11: MOV TEMP[4], TEMP[3]
> 12: MOV TEMP[4].w, TEMP[3].wwww
> 13: MOV TEMP[5].xy, IN[1].xyyy
> 14: TEX TEMP[5], TEMP[5], SAMP[8], 2D
> 15: MOV TEMP[6], TEMP[5]
> 16: MUL TEMP[6], CONST[23], TEMP[5].xxxx
> 17: MAD TEMP[6], CONST[26], TEMP[5].yyyy, TEMP[6]
> 18: MAD TEMP[6], CONST[29], TEMP[5].zzzz, TEMP[6]
> 19: MUL TEMP[7], CONST[25], TEMP[5].xxxx
> 20: MAD TEMP[7], CONST[28], TEMP[5].yyyy, TEMP[7]
> 21: MAD TEMP[7], CONST[31], TEMP[5].zzzz, TEMP[7]
> 22: MOV TEMP[8].xy, TEMP[7].xyxx
> 23: DP3 TEMP[9].x, TEMP[5].xyzz, IMM[0].xxxx
> 24: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 25: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[9].xxxx
> 26: ADD TEMP[10].xy, TEMP[7].zwww, TEMP[10].xxxx
> 27: MOV TEMP[8].zw, TEMP[10].yyxy
> 28: MUL TEMP[8].xyz, CONST[24].xyzz, TEMP[5].xxxx
> 29: MAD TEMP[8].xyz, CONST[27].xyzz, TEMP[5].yyyy, TEMP[8].xyzz
> 30: MAD TEMP[5].xyz, CONST[30].xyzz, TEMP[5].zzzz, TEMP[8].xyzz
> 31: LRP TEMP[4].xyz, TEMP[9].xxxx, TEMP[5].xyzz, TEMP[3].xyzz
> 32: MUL TEMP[5].xyz, TEMP[6].xyzz, TEMP[7].yyyy
> 33: RCP TEMP[8].x, TEMP[10].yyyy
> 34: POW TEMP[9].x, TEMP[5].xxxx, TEMP[8].xxxx
> 35: POW TEMP[9].y, TEMP[5].yyyy, TEMP[8].xxxx
> 36: POW TEMP[9].z, TEMP[5].zzzz, TEMP[8].xxxx
> 37: MOV TEMP[5].xyz, TEMP[9].xyzx
> 38: MOV TEMP[8].x, CONST[33].xxxx
> 39: MOV TEMP[8].x, CONST[33].yyyy
> 40: MUL TEMP[8].xy, IN[1].xyyy, CONST[22].xyyy
> 41: MUL TEMP[11].xy, CONST[34].xyyy, IN[3].wwww
> 42: MUL TEMP[12].xy, TEMP[8].xyyy, CONST[33].xxxx
> 43: MAD TEMP[11].xy, TEMP[11].xyyy, CONST[33].xxxx, TEMP[12].xyyy
> 44: MOV TEMP[11].xy, TEMP[11].xyyy
> 45: TEX TEMP[11], TEMP[11], SAMP[5], 2D
> 46: MOV TEMP[12], TEMP[11]
> 47: MUL TEMP[12].xy, CONST[34].zwww, IN[3].wwww
> 48: MUL TEMP[8].xy, TEMP[8].xyyy, CONST[33].yyyy
> 49: MAD TEMP[8].xy, TEMP[12].xyyy, CONST[33].yyyy, TEMP[8].xyyy
> 50: MOV TEMP[8].xy, TEMP[8].xyyy
> 51: TEX TEMP[8], TEMP[8], SAMP[5], 2D
> 52: MUL TEMP[8].x, TEMP[8].zzzz, CONST[33].wwww
> 53: MAD TEMP[8].x, TEMP[11].yyyy, CONST[33].zzzz, -TEMP[8].xxxx
> 54: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 55: MUL TEMP[12].x, TEMP[3].wwww, TEMP[8].xxxx
> 56: LRP TEMP[4].xyz, TEMP[12].xxxx, CONST[32].xyzz, TEMP[4].xyzz
> 57: MOV TEMP[12].xy, IN[1].xyyy
> 58: TEX TEMP[12], TEMP[12], SAMP[6], 2D
> 59: LRP TEMP[6].x, TEMP[7].xxxx, TEMP[6].wwww, TEMP[12].wwww
> 60: RCP TEMP[7].x, TEMP[10].xxxx
> 61: POW TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
> 62: MUL TEMP[7].x, TEMP[3].wwww, TEMP[8].xxxx
> 63: LRP TEMP[6].x, TEMP[7].xxxx, CONST[32].wwww, TEMP[6].xxxx
> 64: MOV TEMP[7].xy, IN[1].xyyy
> 65: TEX TEMP[7], TEMP[7], SAMP[4], 2D
> 66: MOV TEMP[8], TEMP[7]
> 67: MAD TEMP[10].xy, TEMP[7].wyyy, IMM[0].yyyy, IMM[0].zzzz
> 68: MOV TEMP[10].z, TEMP[7].xxxx
> 69: DP2 TEMP[12].x, TEMP[10].xyyy, TEMP[10].xyyy
> 70: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 71: ADD TEMP[12].x, IMM[0].wwww, -TEMP[12].xxxx
> 72: SQRT TEMP[12].x, TEMP[12].xxxx
> 73: MAD TEMP[11].xy, TEMP[11].xwww, IMM[0].yyyy, IMM[0].zzzz
> 74: MAD TEMP[10].xy, TEMP[11].xyyy, TEMP[3].wwww, TEMP[10].xyyy
> 75: MOV TEMP[10].z, TEMP[12].xxxx
> 76: DP3 TEMP[11].x, TEMP[10].xyzz, TEMP[10].xyzz
> 77: RSQ TEMP[11].x, TEMP[11].xxxx
> 78: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[11].xxxx
> 79: MOV TEMP[3].xyz, TEMP[10].xyzx
> 80: MUL TEMP[3].xyz, IN[4].xyzz, TEMP[10].xxxx
> 81: MAD TEMP[3].xyz, TEMP[0].xyzz, TEMP[10].yyyy, TEMP[3].xyzz
> 82: MAD TEMP[3].xyz, TEMP[2].xyzz, TEMP[10].zzzz, TEMP[3].xyzz
> 83: DP3 TEMP[10].x, TEMP[3].xyzz, TEMP[1].xyzz
> 84: MUL TEMP[10].xyz, TEMP[10].xxxx, TEMP[3].xyzz
> 85: MAD TEMP[10].xyz, IMM[0].yyyy, TEMP[10].xyzz, -TEMP[1].xyzz
> 86: MOV TEMP[11].xy, IN[1].zwww
> 87: TEX TEMP[11], TEMP[11], SAMP[7], 2D
> 88: MOV TEMP[12], TEMP[11]
> 89: ADD TEMP[12].xyz, TEMP[11].zyyy, IMM[1].xxxx
> 90: MUL TEMP[12].xyz, TEMP[12].xyzz, IMM[0].yyyy
> 91: MUL TEMP[13].x, TEMP[11].wwww, IMM[0].yyyy
> 92: MOV TEMP[12].w, TEMP[13].xxxx
> 93: DP2 TEMP[14].x, TEMP[12].xyyy, TEMP[12].xyyy
> 94: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 95: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[14].xxxx
> 96: SQRT TEMP[14].x, TEMP[14].xxxx
> 97: MUL TEMP[15].xyz, IN[4].xyzz, TEMP[12].xxxx
> 98: MAD TEMP[15].xyz, TEMP[0].xyzz, TEMP[12].yyyy, TEMP[15].xyzz
> 99: MAD TEMP[14].xyz, TEMP[2].xyzz, TEMP[14].xxxx, TEMP[15].xyzz
>100: MOV TEMP[12].xyz, TEMP[14].xyzx
>101: DP3 TEMP[15].x, TEMP[10].xyzz, TEMP[14].xyzz
>102: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>103: ADD TEMP[15].x, TEMP[13].xxxx, -TEMP[15].xxxx
>104: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>105: POW TEMP[15].x, TEMP[15].xxxx, IMM[1].yyyy
>106: MOV_SAT TEMP[15].x, TEMP[15].xxxx
>107: MUL TEMP[16].x, IMM[1].zzzz, TEMP[6].xxxx
>108: ADD TEMP[16].x, TEMP[15].xxxx, -TEMP[16].xxxx
>109: LRP TEMP[17].x, TEMP[6].xxxx, IMM[1].wwww, IMM[0].xxxx
>110: MUL TEMP[16].x, TEMP[16].xxxx, TEMP[17].xxxx
>111: MOV_SAT TEMP[16].x, TEMP[16].xxxx
>112: MUL TEMP[15].x, TEMP[15].xxxx, TEMP[16].xxxx
>113: MUL TEMP[13].x, TEMP[13].xxxx, IMM[2].xxxx
>114: MOV TEMP[12].w, TEMP[13].xxxx
>115: MUL TEMP[0].x, TEMP[11].xxxx, TEMP[7].xxxx
>116: DP3 TEMP[10].x, -TEMP[10].xyzz, TEMP[2].xyzz
>117: ADD TEMP[10].x, TEMP[10].xxxx, IMM[0].xxxx
>118: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[2].xyzz
>119: ADD TEMP[11].x, IMM[0].xxxx, -TEMP[11].xxxx
>120: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>121: ADD TEMP[10].x, TEMP[10].xxxx, -TEMP[11].xxxx
>122: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>123: ADD TEMP[10].x, IMM[0].xxxx, -TEMP[10].xxxx
>124: MUL TEMP[10].x, TEMP[10].xxxx, TEMP[10].xxxx
>125: MUL TEMP[10].x, TEMP[15].xxxx, TEMP[10].xxxx
>126: MOV TEMP[0].y, TEMP[10].xxxx
>127: MOV TEMP[11].w, IMM[0].xxxx
>128: MAD TEMP[11].xyz, IMM[2].yyyy, TEMP[2].xyzz, IN[0].xyzz
>129: MUL TEMP[2], CONST[4], TEMP[11].xxxx
>130: MAD TEMP[2], CONST[5], TEMP[11].yyyy, TEMP[2]
>131: MAD TEMP[2], CONST[6], TEMP[11].zzzz, TEMP[2]
>132: ADD TEMP[2], TEMP[2], CONST[7]
>133: MAD TEMP[11].x, IMM[2].zzzz, TEMP[6].xxxx, IMM[0].yyyy
>134: EX2 TEMP[11].x, TEMP[11].xxxx
>135: MOV TEMP[15].xyz, -CONST[1].xyzx
>136: ADD TEMP[16].xyz, TEMP[15].xyzz, TEMP[1].xyzz
>137: MUL TEMP[16].xyz, TEMP[16].xyzz, IMM[2].wwww
>138: DP3 TEMP[17].x, TEMP[16].xyzz, TEMP[16].xyzz
>139: RSQ TEMP[17].x, TEMP[17].xxxx
>140: MUL TEMP[16].xyz, TEMP[16].xyzz, TEMP[17].xxxx
>141: DP3 TEMP[17].x, TEMP[15].xyzz, TEMP[3].xyzz
>142: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>143: MOV TEMP[18].xy, TEMP[2].xyyy
>144: MOV TEMP[18].w, IMM[0].xxxx
>145: MOV TEMP[18].z, TEMP[2].zzzz
>146: TXP TEMP[2], TEMP[18], SAMP[0], SHADOW2D
>147: MOV TEMP[18].x, TEMP[2].xxxx
>148: DP3 TEMP[18].x, TEMP[15].xyzz, TEMP[14].xyzz
>149: MOV_SAT TEMP[18].x, TEMP[18].xxxx
>150: ADD TEMP[13].x, TEMP[13].xxxx, -TEMP[18].xxxx
>151: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>152: MUL TEMP[2].x, TEMP[2].xxxx, TEMP[2].xxxx
>153: MUL TEMP[2].xyz, CONST[3].xyzz, TEMP[2].xxxx
>154: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[13].xxxx
>155: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>156: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>157: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[7].xxxx
>158: MUL TEMP[2].xyz, TEMP[17].xxxx, TEMP[2].xyzz
>159: MOV TEMP[7].xyz, TEMP[3].xyzz
>160: TEX TEMP[7], TEMP[7], SAMP[1], CUBE
>161: MOV TEMP[13], TEMP[7]
>162: DP3 TEMP[13].x, TEMP[3].xyzz, TEMP[1].xyzz
>163: MUL TEMP[13].xyz, TEMP[13].xxxx, TEMP[3].xyzz
>164: MAD TEMP[13].xyz, IMM[0].yyyy, TEMP[13].xyzz, -TEMP[1].xyzz
>165: ADD TEMP[18].x, IMM[0].xxxx, -TEMP[6].xxxx
>166: MUL TEMP[18].x, TEMP[18].xxxx, IMM[3].xxxx
>167: MOV TEMP[13].w, TEMP[18].xxxx
>168: DP3 TEMP[19].x, TEMP[1].xyzz, TEMP[3].xyzz
>169: MOV_SAT TEMP[19].x, TEMP[19].xxxx
>170: ADD TEMP[19].x, IMM[0].xxxx, -TEMP[19].xxxx
>171: POW TEMP[19].x, TEMP[19].xxxx, IMM[3].yyyy
>172: MAX TEMP[6].xyz, TEMP[6].xxxx, TEMP[9].xyzz
>173: ADD TEMP[6].xyz, TEMP[6].xyzz, -TEMP[9].xyzz
>174: MAD TEMP[6].xyz, TEMP[19].xxxx, TEMP[6].xyzz, TEMP[9].xyzz
>175: MOV TEMP[13].xyz, TEMP[13].xyzz
>176: MOV TEMP[13].w, TEMP[18].xxxx
>177: TXL TEMP[13], TEMP[13], SAMP[2], CUBE
>178: MUL TEMP[6].xyz, TEMP[6].xyzz, TEMP[13].xyzz
>179: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>180: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>181: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>182: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[7].wwww
>183: MUL TEMP[7].xyz, TEMP[7].xyzz, IMM[3].wwww
>184: MUL TEMP[7].xyz, TEMP[13].xxxx, TEMP[7].xyzz
>185: DP3 TEMP[13].x, TEMP[9].xyzz, IMM[3].zzzz
>186: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>187: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>188: MUL TEMP[13].xyz, TEMP[2].xyzz, TEMP[13].xxxx
>189: MAD TEMP[7].xyz, TEMP[7].xyzz, TEMP[0].xxxx, TEMP[13].xyzz
>190: DP3 TEMP[13].x, TEMP[15].xyzz, TEMP[16].xyzz
>191: MOV_SAT TEMP[13].x, TEMP[13].xxxx
>192: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
>193: POW TEMP[13].x, TEMP[13].xxxx, IMM[3].yyyy
>194: ADD TEMP[15].xyz, IMM[0].xxxx, -TEMP[9].xyzz
>195: MAD TEMP[9].xyz, TEMP[13].xxxx, TEMP[15].xyzz, TEMP[9].xyzz
>196: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xyzz
>197: ADD TEMP[9].x, TEMP[11].xxxx, IMM[0].yyyy
>198: MUL TEMP[9].x, TEMP[9].xxxx, IMM[4].xxxx
>199: MUL TEMP[13].x, -TEMP[11].xxxx, IMM[2].wwww
>200: EX2 TEMP[13].x, TEMP[13].xxxx
>201: ADD TEMP[13].x, IMM[0].yyyy, -TEMP[13].xxxx
>202: RCP TEMP[13].x, TEMP[13].xxxx
>203: MUL TEMP[9].x, TEMP[9].xxxx, TEMP[13].xxxx
>204: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>205: DP3 TEMP[9].x, TEMP[3].xyzz, TEMP[16].xyzz
>206: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>207: POW TEMP[9].x, TEMP[9].xxxx, TEMP[11].xxxx
>208: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx
>209: DP3 TEMP[9].x, TEMP[1].xyzz, TEMP[3].xyzz
>210: MOV_SAT TEMP[9].x, TEMP[9].xxxx
>211: MAX TEMP[9].x, TEMP[17].xxxx, TEMP[9].xxxx
>212: ADD TEMP[9].x, TEMP[9].xxxx, IMM[4].yyyy
>213: RCP TEMP[9].x, TEMP[9].xxxx
>214: MAD TEMP[2].xyz, TEMP[2].xyzz, TEMP[9].xxxx, TEMP[6].xyzz
>215: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[10].xxxx
>216: MOV TEMP[9].x, IMM[5].xxxx
>217: BGNLOOP :0
>218:   ISGE TEMP[10].x, TEMP[9].xxxx, IMM[5].yyyy
>219:   UIF TEMP[10].xxxx :0
>220:     BRK
>221:   ENDIF
>222:   UMUL TEMP[13].x, TEMP[9].xxxx, IMM[5].yyyy
>223:   UARL ADDR[0].x, TEMP[13].xxxx
>224:   UARL ADDR[0].x, TEMP[13].xxxx
>225:   ADD TEMP[15].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>226:   DP3 TEMP[16].x, TEMP[15].xyzz, TEMP[15].xyzz
>227:   RSQ TEMP[17].x, TEMP[16].xxxx
>228:   MUL TEMP[18].xyz, TEMP[15].xyzz, TEMP[17].xxxx
>229:   ADD TEMP[19].xyz, TEMP[18].xyzz, TEMP[1].xyzz
>230:   MUL TEMP[20].xyz, TEMP[19].xyzz, IMM[2].wwww
>231:   DP3 TEMP[21].x, TEMP[20].xyzz, TEMP[20].xyzz
>232:   RSQ TEMP[22].x, TEMP[21].xxxx
>233:   MUL TEMP[23].xyz, TEMP[20].xyzz, TEMP[22].xxxx
>234:   DP3 TEMP[24].x, TEMP[18].xyzz, TEMP[3].xyzz
>235:   MOV_SAT TEMP[25].x, TEMP[24].xxxx
>236:   DP3 TEMP[26].x, TEMP[18].xyzz, TEMP[14].xyzz
>237:   MOV_SAT TEMP[27].x, TEMP[26].xxxx
>238:   ADD TEMP[28].x, TEMP[12].wwww, -TEMP[27].xxxx
>239:   MOV_SAT TEMP[29].x, TEMP[28].xxxx
>240:   MUL TEMP[30].x, TEMP[29].xxxx, TEMP[29].xxxx
>241:   UMAD TEMP[31].x, TEMP[9].xxxx, IMM[5].yyyy, IMM[5].zzzz
>242:   MUL TEMP[32].x, TEMP[16].xxxx, TEMP[17].xxxx
>243:   UMUL TEMP[33].x, TEMP[9].xxxx, IMM[5].yyyy
>244:   UARL ADDR[0].x, TEMP[33].xxxx
>245:   MUL TEMP[34].x, TEMP[32].xxxx, CONST[ADDR[0].x+11].wwww
>246:   MOV_SAT TEMP[35].x, TEMP[34].xxxx
>247:   ADD TEMP[36].x, IMM[0].xxxx, -TEMP[35].xxxx
>248:   UARL ADDR[0].x, TEMP[31].xxxx
>249:   MUL TEMP[37].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[36].xxxx
>250:   MUL TEMP[38].x, TEMP[30].xxxx, TEMP[30].xxxx
>251:   MOV_SAT TEMP[39].x, TEMP[38].xxxx
>252:   LRP TEMP[40].x, TEMP[17].xxxx, IMM[0].xxxx, TEMP[39].xxxx
>253:   MUL TEMP[41].xyz, TEMP[37].xyzz, TEMP[40].xxxx
>254:   MUL TEMP[42].xyz, TEMP[41].xyzz, TEMP[8].xxxx
>255:   MUL TEMP[43].xyz, TEMP[25].xxxx, TEMP[42].xyzz
>256:   DP3 TEMP[44].x, TEMP[5].xyzz, IMM[3].zzzz
>257:   ADD TEMP[45].x, IMM[0].xxxx, -TEMP[44].xxxx
>258:   MOV_SAT TEMP[46].x, TEMP[45].xxxx
>259:   MAD TEMP[7].xyz, TEMP[43].xyzz, TEMP[46].xxxx, TEMP[7].xyzz
>260:   DP3 TEMP[47].x, TEMP[18].xyzz, TEMP[23].xyzz
>261:   MOV_SAT TEMP[48].x, TEMP[47].xxxx
>262:   ADD TEMP[49].x, IMM[0].xxxx, -TEMP[48].xxxx
>263:   POW TEMP[50].x, TEMP[49].xxxx, IMM[3].yyyy
>264:   ADD TEMP[51].xyz, IMM[0].xxxx, -TEMP[5].xyzz
>265:   MAD TEMP[52].xyz, TEMP[50].xxxx, TEMP[51].xyzz, TEMP[5].xyzz
>266:   MUL TEMP[53].xyz, TEMP[43].xyzz, TEMP[52].xyzz
>267:   ADD TEMP[54].x, TEMP[11].xxxx, IMM[0].yyyy
>268:   MUL TEMP[55].x, TEMP[54].xxxx, IMM[4].xxxx
>269:   MUL TEMP[56].x, -TEMP[11].xxxx, IMM[2].wwww
>270:   EX2 TEMP[57].x, TEMP[56].xxxx
>271:   ADD TEMP[58].x, IMM[0].yyyy, -TEMP[57].xxxx
>272:   RCP TEMP[59].x, TEMP[58].xxxx
>273:   MUL TEMP[60].x, TEMP[55].xxxx, TEMP[59].xxxx
>274:   MUL TEMP[61].xyz, TEMP[53].xyzz, TEMP[60].xxxx
>275:   DP3 TEMP[62].x, TEMP[3].xyzz, TEMP[23].xyzz
>276:   MOV_SAT TEMP[63].x, TEMP[62].xxxx
>277:   POW TEMP[64].x, TEMP[63].xxxx, TEMP[11].xxxx
>278:   MUL TEMP[65].xyz, TEMP[61].xyzz, TEMP[64].xxxx
>279:   DP3 TEMP[66].x, TEMP[1].xyzz, TEMP[3].xyzz
>280:   MOV_SAT TEMP[67].x, TEMP[66].xxxx
>281:   MAX TEMP[68].x, TEMP[25].xxxx, TEMP[67].xxxx
>282:   ADD TEMP[69].x, TEMP[68].xxxx, IMM[4].yyyy
>283:   RCP TEMP[70].x, TEMP[69].xxxx
>284:   MUL TEMP[71].xyz, TEMP[65].xyzz, TEMP[70].xxxx
>285:   MAD TEMP[2].xyz, TEMP[71].xyzz, TEMP[0].yyyy, TEMP[2].xyzz
>286:   UADD TEMP[9].x, TEMP[9].xxxx, IMM[5].zzzz
>287: ENDLOOP :0
>288: MUL TEMP[0].xyz, TEMP[6].xyzz, TEMP[0].yyyy
>289: MOV TEMP[1].xy, IN[1].xyyy
>290: TEX TEMP[1], TEMP[1], SAMP[9], 2D
>291: MOV TEMP[2].w, TEMP[1].wwww
>292: DP3 TEMP[3].x, TEMP[1].xyzz, IMM[6].xyzz
>293: MUL TEMP[3].x, TEMP[3].xxxx, CONST[35].xxxx
>294: MUL TEMP[2].xyz, TEMP[1].xyzz, TEMP[3].xxxx
>295: MUL TEMP[1].xyz, TEMP[2], IMM[4].zzzz
>296: MAD TEMP[0].xyz, TEMP[7].xyzz, TEMP[4].xyzz, TEMP[0].xyzz
>297: ADD TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>298: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>299: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].wwww
>300: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>301: ADD TEMP[2].x, TEMP[2].xxxx, IMM[6].wwww
>302: RCP TEMP[2].x, TEMP[2].xxxx
>303: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>304: FRC TEMP[2].x, CONST[1].wwww
>305: MUL TEMP[2].x, TEMP[2].xxxx, IMM[7].xxxx
>306: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>307: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>308: MUL TEMP[1].x, IN[2].xxxx, TEMP[1].xxxx
>309: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>310: MOV TEMP[0].w, IN[0].wwww
>311: MOV OUT[0], TEMP[0]
>312: END
>radeonsi: Compiling shader 131
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 5, i32 %6, <2 x i32> %9)
>  %26 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %27 = load <16 x i8>, <16 x i8> addrspace(2)* %26, align 16, !invariant.load !0
>  %28 = call float @llvm.SI.load.const(<16 x i8> %27, i32 0)
>  %29 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = call float @llvm.SI.load.const(<16 x i8> %27, i32 4)
>  %32 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %35 = load <16 x i8>, <16 x i8> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = call float @llvm.SI.load.const(<16 x i8> %35, i32 8)
>  %37 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %38 = fsub float %36, %37
>  %39 = fmul float %30, %30
>  %40 = fmul float %33, %33
>  %41 = fadd float %40, %39
>  %42 = fmul float %38, %38
>  %43 = fadd float %41, %42
>  %44 = call float @llvm.sqrt.f32(float %43)
>  %45 = fdiv float 1.000000e+00, %44, !fpmath !1
>  %46 = fmul float %30, %45
>  %47 = fmul float %33, %45
>  %48 = fmul float %38, %45
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %52 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %53 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %54 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %55 = fmul float %49, %52
>  %56 = fmul float %50, %53
>  %57 = fadd float %56, %55
>  %58 = fmul float %51, %54
>  %59 = fadd float %57, %58
>  %60 = call float @llvm.sqrt.f32(float %59)
>  %61 = fdiv float 1.000000e+00, %60, !fpmath !1
>  %62 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %63 = fmul float %62, %61
>  %64 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %65 = fmul float %64, %61
>  %66 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %67 = fmul float %66, %61
>  %68 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %69 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %70 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %71 = load <8 x i32>, <8 x i32> addrspace(2)* %70, align 32, !invariant.load !0
>  %72 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %73 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %72, i64 0, i64 15, !amdgpu.uniform !0
>  %74 = load <4 x i32>, <4 x i32> addrspace(2)* %73, align 16, !invariant.load !0
>  %75 = extractelement <8 x i32> %71, i32 7
>  %76 = extractelement <4 x i32> %74, i32 0
>  %77 = and i32 %76, %75
>  %78 = insertelement <4 x i32> %74, i32 %77, i32 0
>  %79 = bitcast float %68 to i32
>  %80 = bitcast float %69 to i32
>  %81 = insertelement <2 x i32> undef, i32 %79, i32 0
>  %82 = insertelement <2 x i32> %81, i32 %80, i32 1
>  %83 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %82, <8 x i32> %71, <4 x i32> %78, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %84 = extractelement <4 x float> %83, i32 0
>  %85 = extractelement <4 x float> %83, i32 1
>  %86 = extractelement <4 x float> %83, i32 2
>  %87 = extractelement <4 x float> %83, i32 3
>  %88 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %89 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %90 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 16, !amdgpu.uniform !0
>  %91 = load <8 x i32>, <8 x i32> addrspace(2)* %90, align 32, !invariant.load !0
>  %92 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %93 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %92, i64 0, i64 35, !amdgpu.uniform !0
>  %94 = load <4 x i32>, <4 x i32> addrspace(2)* %93, align 16, !invariant.load !0
>  %95 = extractelement <8 x i32> %91, i32 7
>  %96 = extractelement <4 x i32> %94, i32 0
>  %97 = and i32 %96, %95
>  %98 = insertelement <4 x i32> %94, i32 %97, i32 0
>  %99 = bitcast float %88 to i32
>  %100 = bitcast float %89 to i32
>  %101 = insertelement <2 x i32> undef, i32 %99, i32 0
>  %102 = insertelement <2 x i32> %101, i32 %100, i32 1
>  %103 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %102, <8 x i32> %91, <4 x i32> %98, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %104 = extractelement <4 x float> %103, i32 0
>  %105 = extractelement <4 x float> %103, i32 1
>  %106 = extractelement <4 x float> %103, i32 2
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 368)
>  %110 = fmul float %109, %104
>  %111 = call float @llvm.SI.load.const(<16 x i8> %108, i32 372)
>  %112 = fmul float %111, %104
>  %113 = call float @llvm.SI.load.const(<16 x i8> %108, i32 376)
>  %114 = fmul float %113, %104
>  %115 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %116 = load <16 x i8>, <16 x i8> addrspace(2)* %115, align 16, !invariant.load !0
>  %117 = call float @llvm.SI.load.const(<16 x i8> %116, i32 380)
>  %118 = fmul float %117, %104
>  %119 = call float @llvm.SI.load.const(<16 x i8> %116, i32 416)
>  %120 = fmul float %119, %105
>  %121 = fadd float %120, %110
>  %122 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %123 = load <16 x i8>, <16 x i8> addrspace(2)* %122, align 16, !invariant.load !0
>  %124 = call float @llvm.SI.load.const(<16 x i8> %123, i32 420)
>  %125 = fmul float %124, %105
>  %126 = fadd float %125, %112
>  %127 = call float @llvm.SI.load.const(<16 x i8> %123, i32 424)
>  %128 = fmul float %127, %105
>  %129 = fadd float %128, %114
>  %130 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %131 = load <16 x i8>, <16 x i8> addrspace(2)* %130, align 16, !invariant.load !0
>  %132 = call float @llvm.SI.load.const(<16 x i8> %131, i32 428)
>  %133 = fmul float %132, %105
>  %134 = fadd float %133, %118
>  %135 = call float @llvm.SI.load.const(<16 x i8> %131, i32 464)
>  %136 = fmul float %135, %106
>  %137 = fadd float %136, %121
>  %138 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %139 = load <16 x i8>, <16 x i8> addrspace(2)* %138, align 16, !invariant.load !0
>  %140 = call float @llvm.SI.load.const(<16 x i8> %139, i32 468)
>  %141 = fmul float %140, %106
>  %142 = fadd float %141, %126
>  %143 = call float @llvm.SI.load.const(<16 x i8> %139, i32 472)
>  %144 = fmul float %143, %106
>  %145 = fadd float %144, %129
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = call float @llvm.SI.load.const(<16 x i8> %147, i32 476)
>  %149 = fmul float %148, %106
>  %150 = fadd float %149, %134
>  %151 = call float @llvm.SI.load.const(<16 x i8> %147, i32 400)
>  %152 = fmul float %151, %104
>  %153 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %154 = load <16 x i8>, <16 x i8> addrspace(2)* %153, align 16, !invariant.load !0
>  %155 = call float @llvm.SI.load.const(<16 x i8> %154, i32 404)
>  %156 = fmul float %155, %104
>  %157 = call float @llvm.SI.load.const(<16 x i8> %154, i32 408)
>  %158 = fmul float %157, %104
>  %159 = call float @llvm.SI.load.const(<16 x i8> %154, i32 412)
>  %160 = fmul float %159, %104
>  %161 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %162 = load <16 x i8>, <16 x i8> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = call float @llvm.SI.load.const(<16 x i8> %162, i32 448)
>  %164 = fmul float %163, %105
>  %165 = fadd float %164, %152
>  %166 = call float @llvm.SI.load.const(<16 x i8> %162, i32 452)
>  %167 = fmul float %166, %105
>  %168 = fadd float %167, %156
>  %169 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %170 = load <16 x i8>, <16 x i8> addrspace(2)* %169, align 16, !invariant.load !0
>  %171 = call float @llvm.SI.load.const(<16 x i8> %170, i32 456)
>  %172 = fmul float %171, %105
>  %173 = fadd float %172, %158
>  %174 = call float @llvm.SI.load.const(<16 x i8> %170, i32 460)
>  %175 = fmul float %174, %105
>  %176 = fadd float %175, %160
>  %177 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %178 = load <16 x i8>, <16 x i8> addrspace(2)* %177, align 16, !invariant.load !0
>  %179 = call float @llvm.SI.load.const(<16 x i8> %178, i32 496)
>  %180 = fmul float %179, %106
>  %181 = fadd float %180, %165
>  %182 = call float @llvm.SI.load.const(<16 x i8> %178, i32 500)
>  %183 = fmul float %182, %106
>  %184 = fadd float %183, %168
>  %185 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %186 = load <16 x i8>, <16 x i8> addrspace(2)* %185, align 16, !invariant.load !0
>  %187 = call float @llvm.SI.load.const(<16 x i8> %186, i32 504)
>  %188 = fmul float %187, %106
>  %189 = fadd float %188, %173
>  %190 = call float @llvm.SI.load.const(<16 x i8> %186, i32 508)
>  %191 = fmul float %190, %106
>  %192 = fadd float %191, %176
>  %193 = fadd float %105, %104
>  %194 = fadd float %193, %106
>  %195 = call float @llvm.AMDGPU.clamp.(float %194, float 0.000000e+00, float 1.000000e+00)
>  %196 = fsub float 1.000000e+00, %195
>  %197 = fadd float %189, %196
>  %198 = fadd float %192, %196
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 384)
>  %202 = fmul float %201, %104
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 388)
>  %204 = fmul float %203, %104
>  %205 = call float @llvm.SI.load.const(<16 x i8> %200, i32 392)
>  %206 = fmul float %205, %104
>  %207 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %208 = load <16 x i8>, <16 x i8> addrspace(2)* %207, align 16, !invariant.load !0
>  %209 = call float @llvm.SI.load.const(<16 x i8> %208, i32 432)
>  %210 = fmul float %209, %105
>  %211 = fadd float %210, %202
>  %212 = call float @llvm.SI.load.const(<16 x i8> %208, i32 436)
>  %213 = fmul float %212, %105
>  %214 = fadd float %213, %204
>  %215 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %216 = load <16 x i8>, <16 x i8> addrspace(2)* %215, align 16, !invariant.load !0
>  %217 = call float @llvm.SI.load.const(<16 x i8> %216, i32 440)
>  %218 = fmul float %217, %105
>  %219 = fadd float %218, %206
>  %220 = call float @llvm.SI.load.const(<16 x i8> %216, i32 480)
>  %221 = fmul float %220, %106
>  %222 = fadd float %221, %211
>  %223 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %224 = load <16 x i8>, <16 x i8> addrspace(2)* %223, align 16, !invariant.load !0
>  %225 = call float @llvm.SI.load.const(<16 x i8> %224, i32 484)
>  %226 = fmul float %225, %106
>  %227 = fadd float %226, %214
>  %228 = call float @llvm.SI.load.const(<16 x i8> %224, i32 488)
>  %229 = fmul float %228, %106
>  %230 = fadd float %229, %219
>  %231 = fsub float 1.000000e+00, %195
>  %232 = fmul float %222, %195
>  %233 = fmul float %84, %231
>  %234 = fadd float %232, %233
>  %235 = fsub float 1.000000e+00, %195
>  %236 = fmul float %227, %195
>  %237 = fmul float %85, %235
>  %238 = fadd float %236, %237
>  %239 = fsub float 1.000000e+00, %195
>  %240 = fmul float %230, %195
>  %241 = fmul float %86, %239
>  %242 = fadd float %240, %241
>  %243 = fmul float %137, %184
>  %244 = fmul float %142, %184
>  %245 = fmul float %145, %184
>  %246 = fdiv float 1.000000e+00, %198, !fpmath !1
>  %247 = call float @llvm.pow.f32(float %243, float %246)
>  %248 = call float @llvm.pow.f32(float %244, float %246)
>  %249 = call float @llvm.pow.f32(float %245, float %246)
>  %250 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = call float @llvm.SI.load.const(<16 x i8> %252, i32 352)
>  %254 = fmul float %250, %253
>  %255 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %256 = call float @llvm.SI.load.const(<16 x i8> %252, i32 356)
>  %257 = fmul float %255, %256
>  %258 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %259 = load <16 x i8>, <16 x i8> addrspace(2)* %258, align 16, !invariant.load !0
>  %260 = call float @llvm.SI.load.const(<16 x i8> %259, i32 544)
>  %261 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %262 = fmul float %260, %261
>  %263 = call float @llvm.SI.load.const(<16 x i8> %259, i32 548)
>  %264 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %265 = fmul float %263, %264
>  %266 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %267 = load <16 x i8>, <16 x i8> addrspace(2)* %266, align 16, !invariant.load !0
>  %268 = call float @llvm.SI.load.const(<16 x i8> %267, i32 528)
>  %269 = fmul float %254, %268
>  %270 = call float @llvm.SI.load.const(<16 x i8> %267, i32 528)
>  %271 = fmul float %257, %270
>  %272 = call float @llvm.SI.load.const(<16 x i8> %267, i32 528)
>  %273 = fmul float %262, %272
>  %274 = fadd float %273, %269
>  %275 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %276 = load <16 x i8>, <16 x i8> addrspace(2)* %275, align 16, !invariant.load !0
>  %277 = call float @llvm.SI.load.const(<16 x i8> %276, i32 528)
>  %278 = fmul float %265, %277
>  %279 = fadd float %278, %271
>  %280 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %281 = load <8 x i32>, <8 x i32> addrspace(2)* %280, align 32, !invariant.load !0
>  %282 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %283 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %282, i64 0, i64 23, !amdgpu.uniform !0
>  %284 = load <4 x i32>, <4 x i32> addrspace(2)* %283, align 16, !invariant.load !0
>  %285 = extractelement <8 x i32> %281, i32 7
>  %286 = extractelement <4 x i32> %284, i32 0
>  %287 = and i32 %286, %285
>  %288 = insertelement <4 x i32> %284, i32 %287, i32 0
>  %289 = bitcast float %274 to i32
>  %290 = bitcast float %279 to i32
>  %291 = insertelement <2 x i32> undef, i32 %289, i32 0
>  %292 = insertelement <2 x i32> %291, i32 %290, i32 1
>  %293 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %292, <8 x i32> %281, <4 x i32> %288, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %294 = extractelement <4 x float> %293, i32 0
>  %295 = extractelement <4 x float> %293, i32 1
>  %296 = extractelement <4 x float> %293, i32 3
>  %297 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %298 = load <16 x i8>, <16 x i8> addrspace(2)* %297, align 16, !invariant.load !0
>  %299 = call float @llvm.SI.load.const(<16 x i8> %298, i32 552)
>  %300 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %301 = fmul float %299, %300
>  %302 = call float @llvm.SI.load.const(<16 x i8> %298, i32 556)
>  %303 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %304 = fmul float %302, %303
>  %305 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %306 = load <16 x i8>, <16 x i8> addrspace(2)* %305, align 16, !invariant.load !0
>  %307 = call float @llvm.SI.load.const(<16 x i8> %306, i32 532)
>  %308 = fmul float %254, %307
>  %309 = call float @llvm.SI.load.const(<16 x i8> %306, i32 532)
>  %310 = fmul float %257, %309
>  %311 = call float @llvm.SI.load.const(<16 x i8> %306, i32 532)
>  %312 = fmul float %301, %311
>  %313 = fadd float %312, %308
>  %314 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %315 = load <16 x i8>, <16 x i8> addrspace(2)* %314, align 16, !invariant.load !0
>  %316 = call float @llvm.SI.load.const(<16 x i8> %315, i32 532)
>  %317 = fmul float %304, %316
>  %318 = fadd float %317, %310
>  %319 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %320 = load <8 x i32>, <8 x i32> addrspace(2)* %319, align 32, !invariant.load !0
>  %321 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %322 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %321, i64 0, i64 23, !amdgpu.uniform !0
>  %323 = load <4 x i32>, <4 x i32> addrspace(2)* %322, align 16, !invariant.load !0
>  %324 = extractelement <8 x i32> %320, i32 7
>  %325 = extractelement <4 x i32> %323, i32 0
>  %326 = and i32 %325, %324
>  %327 = insertelement <4 x i32> %323, i32 %326, i32 0
>  %328 = bitcast float %313 to i32
>  %329 = bitcast float %318 to i32
>  %330 = insertelement <2 x i32> undef, i32 %328, i32 0
>  %331 = insertelement <2 x i32> %330, i32 %329, i32 1
>  %332 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %331, <8 x i32> %320, <4 x i32> %327, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %333 = extractelement <4 x float> %332, i32 2
>  %334 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %335 = load <16 x i8>, <16 x i8> addrspace(2)* %334, align 16, !invariant.load !0
>  %336 = call float @llvm.SI.load.const(<16 x i8> %335, i32 540)
>  %337 = fmul float %333, %336
>  %338 = call float @llvm.SI.load.const(<16 x i8> %335, i32 536)
>  %339 = fmul float %295, %338
>  %340 = fsub float %339, %337
>  %341 = call float @llvm.AMDGPU.clamp.(float %340, float 0.000000e+00, float 1.000000e+00)
>  %342 = fmul float %87, %341
>  %343 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %344 = load <16 x i8>, <16 x i8> addrspace(2)* %343, align 16, !invariant.load !0
>  %345 = call float @llvm.SI.load.const(<16 x i8> %344, i32 512)
>  %346 = fsub float 1.000000e+00, %342
>  %347 = fmul float %345, %342
>  %348 = fmul float %234, %346
>  %349 = fadd float %347, %348
>  %350 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %351 = load <16 x i8>, <16 x i8> addrspace(2)* %350, align 16, !invariant.load !0
>  %352 = call float @llvm.SI.load.const(<16 x i8> %351, i32 516)
>  %353 = fsub float 1.000000e+00, %342
>  %354 = fmul float %352, %342
>  %355 = fmul float %238, %353
>  %356 = fadd float %354, %355
>  %357 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %358 = load <16 x i8>, <16 x i8> addrspace(2)* %357, align 16, !invariant.load !0
>  %359 = call float @llvm.SI.load.const(<16 x i8> %358, i32 520)
>  %360 = fsub float 1.000000e+00, %342
>  %361 = fmul float %359, %342
>  %362 = fmul float %242, %360
>  %363 = fadd float %361, %362
>  %364 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %365 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %366 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %367 = load <8 x i32>, <8 x i32> addrspace(2)* %366, align 32, !invariant.load !0
>  %368 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %369 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %368, i64 0, i64 27, !amdgpu.uniform !0
>  %370 = load <4 x i32>, <4 x i32> addrspace(2)* %369, align 16, !invariant.load !0
>  %371 = extractelement <8 x i32> %367, i32 7
>  %372 = extractelement <4 x i32> %370, i32 0
>  %373 = and i32 %372, %371
>  %374 = insertelement <4 x i32> %370, i32 %373, i32 0
>  %375 = bitcast float %364 to i32
>  %376 = bitcast float %365 to i32
>  %377 = insertelement <2 x i32> undef, i32 %375, i32 0
>  %378 = insertelement <2 x i32> %377, i32 %376, i32 1
>  %379 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %378, <8 x i32> %367, <4 x i32> %374, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %380 = extractelement <4 x float> %379, i32 3
>  %381 = fsub float 1.000000e+00, %181
>  %382 = fmul float %150, %181
>  %383 = fmul float %380, %381
>  %384 = fadd float %382, %383
>  %385 = fdiv float 1.000000e+00, %197, !fpmath !1
>  %386 = call float @llvm.pow.f32(float %384, float %385)
>  %387 = fmul float %87, %341
>  %388 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %389 = load <16 x i8>, <16 x i8> addrspace(2)* %388, align 16, !invariant.load !0
>  %390 = call float @llvm.SI.load.const(<16 x i8> %389, i32 524)
>  %391 = fsub float 1.000000e+00, %387
>  %392 = fmul float %390, %387
>  %393 = fmul float %386, %391
>  %394 = fadd float %392, %393
>  %395 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %396 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %397 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %398 = load <8 x i32>, <8 x i32> addrspace(2)* %397, align 32, !invariant.load !0
>  %399 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %400 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %399, i64 0, i64 19, !amdgpu.uniform !0
>  %401 = load <4 x i32>, <4 x i32> addrspace(2)* %400, align 16, !invariant.load !0
>  %402 = extractelement <8 x i32> %398, i32 7
>  %403 = extractelement <4 x i32> %401, i32 0
>  %404 = and i32 %403, %402
>  %405 = insertelement <4 x i32> %401, i32 %404, i32 0
>  %406 = bitcast float %395 to i32
>  %407 = bitcast float %396 to i32
>  %408 = insertelement <2 x i32> undef, i32 %406, i32 0
>  %409 = insertelement <2 x i32> %408, i32 %407, i32 1
>  %410 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %409, <8 x i32> %398, <4 x i32> %405, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %411 = extractelement <4 x float> %410, i32 0
>  %412 = extractelement <4 x float> %410, i32 1
>  %413 = extractelement <4 x float> %410, i32 3
>  %414 = fmul float %413, 2.000000e+00
>  %415 = fadd float %414, -1.000000e+00
>  %416 = fmul float %412, 2.000000e+00
>  %417 = fadd float %416, -1.000000e+00
>  %418 = fmul float %415, %415
>  %419 = fmul float %417, %417
>  %420 = fadd float %418, %419
>  %421 = call float @llvm.AMDGPU.clamp.(float %420, float 0.000000e+00, float 1.000000e+00)
>  %422 = fsub float 0x3FF00418A0000000, %421
>  %423 = call float @llvm.sqrt.f32(float %422)
>  %424 = fmul float %294, 2.000000e+00
>  %425 = fadd float %424, -1.000000e+00
>  %426 = fmul float %296, 2.000000e+00
>  %427 = fadd float %426, -1.000000e+00
>  %428 = fmul float %425, %87
>  %429 = fadd float %428, %415
>  %430 = fmul float %427, %87
>  %431 = fadd float %430, %417
>  %432 = fmul float %429, %429
>  %433 = fmul float %431, %431
>  %434 = fadd float %433, %432
>  %435 = fmul float %423, %423
>  %436 = fadd float %434, %435
>  %437 = call float @llvm.sqrt.f32(float %436)
>  %438 = fdiv float 1.000000e+00, %437, !fpmath !1
>  %439 = fmul float %429, %438
>  %440 = fmul float %431, %438
>  %441 = fmul float %423, %438
>  %442 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %443 = fmul float %442, %439
>  %444 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %445 = fmul float %444, %439
>  %446 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %447 = fmul float %446, %439
>  %448 = fmul float %23, %440
>  %449 = fadd float %448, %443
>  %450 = fmul float %24, %440
>  %451 = fadd float %450, %445
>  %452 = fmul float %25, %440
>  %453 = fadd float %452, %447
>  %454 = fmul float %63, %441
>  %455 = fadd float %454, %449
>  %456 = fmul float %65, %441
>  %457 = fadd float %456, %451
>  %458 = fmul float %67, %441
>  %459 = fadd float %458, %453
>  %460 = fmul float %455, %46
>  %461 = fmul float %457, %47
>  %462 = fadd float %461, %460
>  %463 = fmul float %459, %48
>  %464 = fadd float %462, %463
>  %465 = fmul float %464, %455
>  %466 = fmul float %464, %457
>  %467 = fmul float %464, %459
>  %468 = fmul float %465, 2.000000e+00
>  %469 = fsub float %468, %46
>  %470 = fmul float %466, 2.000000e+00
>  %471 = fsub float %470, %47
>  %472 = fmul float %467, 2.000000e+00
>  %473 = fsub float %472, %48
>  %474 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %475 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %476 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 14, !amdgpu.uniform !0
>  %477 = load <8 x i32>, <8 x i32> addrspace(2)* %476, align 32, !invariant.load !0
>  %478 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %479 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %478, i64 0, i64 31, !amdgpu.uniform !0
>  %480 = load <4 x i32>, <4 x i32> addrspace(2)* %479, align 16, !invariant.load !0
>  %481 = extractelement <8 x i32> %477, i32 7
>  %482 = extractelement <4 x i32> %480, i32 0
>  %483 = and i32 %482, %481
>  %484 = insertelement <4 x i32> %480, i32 %483, i32 0
>  %485 = bitcast float %474 to i32
>  %486 = bitcast float %475 to i32
>  %487 = insertelement <2 x i32> undef, i32 %485, i32 0
>  %488 = insertelement <2 x i32> %487, i32 %486, i32 1
>  %489 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %488, <8 x i32> %477, <4 x i32> %484, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %490 = extractelement <4 x float> %489, i32 0
>  %491 = extractelement <4 x float> %489, i32 1
>  %492 = extractelement <4 x float> %489, i32 2
>  %493 = extractelement <4 x float> %489, i32 3
>  %494 = fadd float %492, -5.000000e-01
>  %495 = fadd float %491, -5.000000e-01
>  %496 = fmul float %494, 2.000000e+00
>  %497 = fmul float %495, 2.000000e+00
>  %498 = fmul float %493, 2.000000e+00
>  %499 = fmul float %496, %496
>  %500 = fmul float %497, %497
>  %501 = fadd float %499, %500
>  %502 = call float @llvm.AMDGPU.clamp.(float %501, float 0.000000e+00, float 1.000000e+00)
>  %503 = fsub float 1.000000e+00, %502
>  %504 = call float @llvm.sqrt.f32(float %503)
>  %505 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %506 = fmul float %505, %496
>  %507 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %508 = fmul float %507, %496
>  %509 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %510 = fmul float %509, %496
>  %511 = fmul float %23, %497
>  %512 = fadd float %511, %506
>  %513 = fmul float %24, %497
>  %514 = fadd float %513, %508
>  %515 = fmul float %25, %497
>  %516 = fadd float %515, %510
>  %517 = fmul float %63, %504
>  %518 = fadd float %517, %512
>  %519 = fmul float %65, %504
>  %520 = fadd float %519, %514
>  %521 = fmul float %67, %504
>  %522 = fadd float %521, %516
>  %523 = fmul float %469, %518
>  %524 = fmul float %471, %520
>  %525 = fadd float %524, %523
>  %526 = fmul float %473, %522
>  %527 = fadd float %525, %526
>  %528 = call float @llvm.AMDGPU.clamp.(float %527, float 0.000000e+00, float 1.000000e+00)
>  %529 = fsub float %498, %528
>  %530 = call float @llvm.AMDGPU.clamp.(float %529, float 0.000000e+00, float 1.000000e+00)
>  %531 = call float @llvm.pow.f32(float %530, float 3.000000e+00)
>  %532 = call float @llvm.AMDGPU.clamp.(float %531, float 0.000000e+00, float 1.000000e+00)
>  %533 = fmul float %394, 0x3FD3333340000000
>  %534 = fsub float %532, %533
>  %535 = fsub float 1.000000e+00, %394
>  %536 = fmul float %394, 2.000000e+01
>  %537 = fadd float %536, %535
>  %538 = fmul float %534, %537
>  %539 = call float @llvm.AMDGPU.clamp.(float %538, float 0.000000e+00, float 1.000000e+00)
>  %540 = fmul float %532, %539
>  %541 = fmul float %498, 0x3FF19999A0000000
>  %542 = fmul float %490, %411
>  %543 = fmul float %469, %63
>  %544 = fsub float -0.000000e+00, %543
>  %545 = fmul float %471, %65
>  %546 = fsub float %544, %545
>  %547 = fmul float %473, %67
>  %548 = fsub float %546, %547
>  %549 = fadd float %548, 1.000000e+00
>  %550 = fmul float %46, %63
>  %551 = fmul float %47, %65
>  %552 = fadd float %551, %550
>  %553 = fmul float %48, %67
>  %554 = fadd float %552, %553
>  %555 = fsub float 1.000000e+00, %554
>  %556 = call float @llvm.AMDGPU.clamp.(float %555, float 0.000000e+00, float 1.000000e+00)
>  %557 = fsub float %549, %556
>  %558 = call float @llvm.AMDGPU.clamp.(float %557, float 0.000000e+00, float 1.000000e+00)
>  %559 = fsub float 1.000000e+00, %558
>  %560 = fmul float %559, %559
>  %561 = fmul float %540, %560
>  %562 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %563 = fmul float %63, 0x4007700140000000
>  %564 = fadd float %563, %562
>  %565 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %566 = fmul float %65, 0x4007700140000000
>  %567 = fadd float %566, %565
>  %568 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %569 = fmul float %67, 0x4007700140000000
>  %570 = fadd float %569, %568
>  %571 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %572 = load <16 x i8>, <16 x i8> addrspace(2)* %571, align 16, !invariant.load !0
>  %573 = call float @llvm.SI.load.const(<16 x i8> %572, i32 64)
>  %574 = fmul float %573, %564
>  %575 = call float @llvm.SI.load.const(<16 x i8> %572, i32 68)
>  %576 = fmul float %575, %564
>  %577 = call float @llvm.SI.load.const(<16 x i8> %572, i32 72)
>  %578 = fmul float %577, %564
>  %579 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %580 = load <16 x i8>, <16 x i8> addrspace(2)* %579, align 16, !invariant.load !0
>  %581 = call float @llvm.SI.load.const(<16 x i8> %580, i32 80)
>  %582 = fmul float %581, %567
>  %583 = fadd float %582, %574
>  %584 = call float @llvm.SI.load.const(<16 x i8> %580, i32 84)
>  %585 = fmul float %584, %567
>  %586 = fadd float %585, %576
>  %587 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %588 = load <16 x i8>, <16 x i8> addrspace(2)* %587, align 16, !invariant.load !0
>  %589 = call float @llvm.SI.load.const(<16 x i8> %588, i32 88)
>  %590 = fmul float %589, %567
>  %591 = fadd float %590, %578
>  %592 = call float @llvm.SI.load.const(<16 x i8> %588, i32 96)
>  %593 = fmul float %592, %570
>  %594 = fadd float %593, %583
>  %595 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %596 = load <16 x i8>, <16 x i8> addrspace(2)* %595, align 16, !invariant.load !0
>  %597 = call float @llvm.SI.load.const(<16 x i8> %596, i32 100)
>  %598 = fmul float %597, %570
>  %599 = fadd float %598, %586
>  %600 = call float @llvm.SI.load.const(<16 x i8> %596, i32 104)
>  %601 = fmul float %600, %570
>  %602 = fadd float %601, %591
>  %603 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %604 = load <16 x i8>, <16 x i8> addrspace(2)* %603, align 16, !invariant.load !0
>  %605 = call float @llvm.SI.load.const(<16 x i8> %604, i32 112)
>  %606 = fadd float %594, %605
>  %607 = call float @llvm.SI.load.const(<16 x i8> %604, i32 116)
>  %608 = fadd float %599, %607
>  %609 = call float @llvm.SI.load.const(<16 x i8> %604, i32 120)
>  %610 = fadd float %602, %609
>  %611 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %612 = load <16 x i8>, <16 x i8> addrspace(2)* %611, align 16, !invariant.load !0
>  %613 = call float @llvm.SI.load.const(<16 x i8> %612, i32 16)
>  %614 = fsub float -0.000000e+00, %613
>  %615 = call float @llvm.SI.load.const(<16 x i8> %612, i32 20)
>  %616 = fsub float -0.000000e+00, %615
>  %617 = call float @llvm.SI.load.const(<16 x i8> %612, i32 24)
>  %618 = fsub float -0.000000e+00, %617
>  %619 = fmul float %455, %614
>  %620 = fmul float %457, %616
>  %621 = fadd float %620, %619
>  %622 = fmul float %459, %618
>  %623 = fadd float %621, %622
>  %624 = call float @llvm.AMDGPU.clamp.(float %623, float 0.000000e+00, float 1.000000e+00)
>  %625 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %626 = load <8 x i32>, <8 x i32> addrspace(2)* %625, align 32, !invariant.load !0
>  %627 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %628 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %627, i64 0, i64 3, !amdgpu.uniform !0
>  %629 = load <4 x i32>, <4 x i32> addrspace(2)* %628, align 16, !invariant.load !0
>  %630 = extractelement <8 x i32> %626, i32 7
>  %631 = extractelement <4 x i32> %629, i32 0
>  %632 = and i32 %631, %630
>  %633 = insertelement <4 x i32> %629, i32 %632, i32 0
>  %634 = bitcast float %610 to i32
>  %635 = bitcast float %606 to i32
>  %636 = bitcast float %608 to i32
>  %637 = insertelement <4 x i32> undef, i32 %634, i32 0
>  %638 = insertelement <4 x i32> %637, i32 %635, i32 1
>  %639 = insertelement <4 x i32> %638, i32 %636, i32 2
>  %640 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %639, <8 x i32> %626, <4 x i32> %633, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %641 = extractelement <4 x float> %640, i32 0
>  %642 = fmul float %518, %614
>  %643 = fmul float %520, %616
>  %644 = fadd float %643, %642
>  %645 = fmul float %522, %618
>  %646 = fadd float %644, %645
>  %647 = call float @llvm.AMDGPU.clamp.(float %646, float 0.000000e+00, float 1.000000e+00)
>  %648 = fsub float %541, %647
>  %649 = call float @llvm.AMDGPU.clamp.(float %648, float 0.000000e+00, float 1.000000e+00)
>  %650 = fmul float %641, %641
>  %651 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %652 = load <16 x i8>, <16 x i8> addrspace(2)* %651, align 16, !invariant.load !0
>  %653 = call float @llvm.SI.load.const(<16 x i8> %652, i32 48)
>  %654 = fmul float %653, %650
>  %655 = call float @llvm.SI.load.const(<16 x i8> %652, i32 52)
>  %656 = fmul float %655, %650
>  %657 = call float @llvm.SI.load.const(<16 x i8> %652, i32 56)
>  %658 = fmul float %657, %650
>  %659 = fmul float %649, %649
>  %660 = call float @llvm.AMDGPU.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = fmul float %654, %660
>  %662 = fmul float %656, %660
>  %663 = fmul float %658, %660
>  %664 = fmul float %661, %411
>  %665 = fmul float %662, %411
>  %666 = fmul float %663, %411
>  %667 = fmul float %624, %664
>  %668 = fmul float %624, %665
>  %669 = fmul float %624, %666
>  %670 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %671 = load <8 x i32>, <8 x i32> addrspace(2)* %670, align 32, !invariant.load !0
>  %672 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %673 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %672, i64 0, i64 7, !amdgpu.uniform !0
>  %674 = load <4 x i32>, <4 x i32> addrspace(2)* %673, align 16, !invariant.load !0
>  %675 = extractelement <8 x i32> %671, i32 7
>  %676 = extractelement <4 x i32> %674, i32 0
>  %677 = and i32 %676, %675
>  %678 = insertelement <4 x i32> %674, i32 %677, i32 0
>  %679 = call float @llvm.amdgcn.cubetc(float %455, float %457, float %459)
>  %680 = call float @llvm.amdgcn.cubesc(float %455, float %457, float %459)
>  %681 = call float @llvm.amdgcn.cubema(float %455, float %457, float %459)
>  %682 = call float @llvm.amdgcn.cubeid(float %455, float %457, float %459)
>  %683 = call float @llvm.fabs.f32(float %681)
>  %684 = fdiv float 1.000000e+00, %683, !fpmath !1
>  %685 = fmul float %679, %684
>  %686 = fadd float %685, 1.500000e+00
>  %687 = fmul float %680, %684
>  %688 = fadd float %687, 1.500000e+00
>  %689 = bitcast float %688 to i32
>  %690 = bitcast float %686 to i32
>  %691 = bitcast float %682 to i32
>  %692 = insertelement <4 x i32> undef, i32 %689, i32 0
>  %693 = insertelement <4 x i32> %692, i32 %690, i32 1
>  %694 = insertelement <4 x i32> %693, i32 %691, i32 2
>  %695 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %694, <8 x i32> %671, <4 x i32> %678, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %696 = extractelement <4 x float> %695, i32 0
>  %697 = extractelement <4 x float> %695, i32 1
>  %698 = extractelement <4 x float> %695, i32 2
>  %699 = extractelement <4 x float> %695, i32 3
>  %700 = fmul float %455, %46
>  %701 = fmul float %457, %47
>  %702 = fadd float %701, %700
>  %703 = fmul float %459, %48
>  %704 = fadd float %702, %703
>  %705 = fmul float %704, %455
>  %706 = fmul float %704, %457
>  %707 = fmul float %704, %459
>  %708 = fmul float %705, 2.000000e+00
>  %709 = fsub float %708, %46
>  %710 = fmul float %706, 2.000000e+00
>  %711 = fsub float %710, %47
>  %712 = fmul float %707, 2.000000e+00
>  %713 = fsub float %712, %48
>  %714 = fsub float 1.000000e+00, %394
>  %715 = fmul float %714, 6.000000e+00
>  %716 = fmul float %46, %455
>  %717 = fmul float %47, %457
>  %718 = fadd float %717, %716
>  %719 = fmul float %48, %459
>  %720 = fadd float %718, %719
>  %721 = call float @llvm.AMDGPU.clamp.(float %720, float 0.000000e+00, float 1.000000e+00)
>  %722 = fsub float 1.000000e+00, %721
>  %723 = call float @llvm.pow.f32(float %722, float 5.000000e+00)
>  %724 = call float @llvm.maxnum.f32(float %394, float %247)
>  %725 = call float @llvm.maxnum.f32(float %394, float %248)
>  %726 = call float @llvm.maxnum.f32(float %394, float %249)
>  %727 = fsub float %724, %247
>  %728 = fsub float %725, %248
>  %729 = fsub float %726, %249
>  %730 = fmul float %723, %727
>  %731 = fadd float %730, %247
>  %732 = fmul float %723, %728
>  %733 = fadd float %732, %248
>  %734 = fmul float %723, %729
>  %735 = fadd float %734, %249
>  %736 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %737 = load <8 x i32>, <8 x i32> addrspace(2)* %736, align 32, !invariant.load !0
>  %738 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %739 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %738, i64 0, i64 11, !amdgpu.uniform !0
>  %740 = load <4 x i32>, <4 x i32> addrspace(2)* %739, align 16, !invariant.load !0
>  %741 = extractelement <8 x i32> %737, i32 7
>  %742 = extractelement <4 x i32> %740, i32 0
>  %743 = and i32 %742, %741
>  %744 = insertelement <4 x i32> %740, i32 %743, i32 0
>  %745 = call float @llvm.amdgcn.cubetc(float %709, float %711, float %713)
>  %746 = call float @llvm.amdgcn.cubesc(float %709, float %711, float %713)
>  %747 = call float @llvm.amdgcn.cubema(float %709, float %711, float %713)
>  %748 = call float @llvm.amdgcn.cubeid(float %709, float %711, float %713)
>  %749 = call float @llvm.fabs.f32(float %747)
>  %750 = fdiv float 1.000000e+00, %749, !fpmath !1
>  %751 = fmul float %745, %750
>  %752 = fadd float %751, 1.500000e+00
>  %753 = fmul float %746, %750
>  %754 = fadd float %753, 1.500000e+00
>  %755 = bitcast float %754 to i32
>  %756 = bitcast float %752 to i32
>  %757 = bitcast float %748 to i32
>  %758 = bitcast float %715 to i32
>  %759 = insertelement <4 x i32> undef, i32 %755, i32 0
>  %760 = insertelement <4 x i32> %759, i32 %756, i32 1
>  %761 = insertelement <4 x i32> %760, i32 %757, i32 2
>  %762 = insertelement <4 x i32> %761, i32 %758, i32 3
>  %763 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %762, <8 x i32> %737, <4 x i32> %744, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %764 = extractelement <4 x float> %763, i32 0
>  %765 = extractelement <4 x float> %763, i32 1
>  %766 = extractelement <4 x float> %763, i32 2
>  %767 = fmul float %731, %764
>  %768 = fmul float %733, %765
>  %769 = fmul float %735, %766
>  %770 = fmul float %247, 0x3FD55553E0000000
>  %771 = fmul float %248, 0x3FD55553E0000000
>  %772 = fadd float %771, %770
>  %773 = fmul float %249, 0x3FD55553E0000000
>  %774 = fadd float %772, %773
>  %775 = fsub float 1.000000e+00, %774
>  %776 = call float @llvm.AMDGPU.clamp.(float %775, float 0.000000e+00, float 1.000000e+00)
>  %777 = fmul float %696, %699
>  %778 = fmul float %697, %699
>  %779 = fmul float %698, %699
>  %780 = fmul float %777, 4.000000e+00
>  %781 = fmul float %778, 4.000000e+00
>  %782 = fmul float %779, 4.000000e+00
>  %783 = fmul float %776, %780
>  %784 = fmul float %776, %781
>  %785 = fmul float %776, %782
>  %786 = fmul float %247, 0x3FD55553E0000000
>  %787 = fmul float %248, 0x3FD55553E0000000
>  %788 = fadd float %787, %786
>  %789 = fmul float %249, 0x3FD55553E0000000
>  %790 = fadd float %788, %789
>  %791 = fsub float 1.000000e+00, %790
>  %792 = call float @llvm.AMDGPU.clamp.(float %791, float 0.000000e+00, float 1.000000e+00)
>  %793 = fmul float %667, %792
>  %794 = fmul float %668, %792
>  %795 = fmul float %669, %792
>  %796 = fmul float %783, %542
>  %797 = fadd float %796, %793
>  %798 = fmul float %784, %542
>  %799 = fadd float %798, %794
>  %800 = fmul float %785, %542
>  %801 = fadd float %800, %795
>  %802 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %803 = load <16 x i8>, <16 x i8> addrspace(2)* %802, align 16
>  %804 = fmul float %247, 0x3FD55553E0000000
>  %805 = fmul float %248, 0x3FD55553E0000000
>  %806 = fadd float %805, %804
>  %807 = fmul float %249, 0x3FD55553E0000000
>  %808 = fadd float %806, %807
>  %809 = fsub float 1.000000e+00, %808
>  br label %loop217
>
>loop217:                                          ; preds = %endif221, %main_body
>  %810 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %811 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %812 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %813 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %814 = phi i32 [ 0, %main_body ], [ %898, %endif221 ]
>  %.011 = phi float [ %801, %main_body ], [ %897, %endif221 ]
>  %.010 = phi float [ %799, %main_body ], [ %895, %endif221 ]
>  %.09 = phi float [ %797, %main_body ], [ %893, %endif221 ]
>  %815 = icmp sgt i32 %810, 1
>  br i1 %815, label %endloop287, label %endif221
>
>endif221:                                         ; preds = %loop217
>  %816 = shl i32 %811, 5
>  %817 = shl i32 %811, 5
>  %818 = add i32 %817, 176
>  %819 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %818)
>  %820 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %821 = fsub float %819, %820
>  %822 = shl i32 %811, 5
>  %823 = add i32 %822, 180
>  %824 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %823)
>  %825 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %826 = fsub float %824, %825
>  %827 = add i32 %816, 184
>  %828 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %827)
>  %829 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %830 = fsub float %828, %829
>  %831 = fmul float %821, %821
>  %832 = fmul float %826, %826
>  %833 = fadd float %832, %831
>  %834 = fmul float %830, %830
>  %835 = fadd float %833, %834
>  %836 = call float @llvm.sqrt.f32(float %835)
>  %837 = fdiv float 1.000000e+00, %836, !fpmath !1
>  %838 = fmul float %821, %837
>  %839 = fmul float %826, %837
>  %840 = fmul float %830, %837
>  %841 = fmul float %838, %455
>  %842 = fmul float %839, %457
>  %843 = fadd float %842, %841
>  %844 = fmul float %840, %459
>  %845 = fadd float %843, %844
>  %846 = call float @llvm.AMDGPU.clamp.(float %845, float 0.000000e+00, float 1.000000e+00)
>  %847 = fmul float %838, %518
>  %848 = fmul float %839, %520
>  %849 = fadd float %848, %847
>  %850 = fmul float %840, %522
>  %851 = fadd float %849, %850
>  %852 = call float @llvm.AMDGPU.clamp.(float %851, float 0.000000e+00, float 1.000000e+00)
>  %853 = fsub float %541, %852
>  %854 = call float @llvm.AMDGPU.clamp.(float %853, float 0.000000e+00, float 1.000000e+00)
>  %855 = fmul float %854, %854
>  %856 = shl i32 %812, 1
>  %857 = or i32 %856, 1
>  %858 = fmul float %835, %837
>  %859 = shl i32 %813, 5
>  %860 = add i32 %859, 188
>  %861 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %860)
>  %862 = fmul float %858, %861
>  %863 = call float @llvm.AMDGPU.clamp.(float %862, float 0.000000e+00, float 1.000000e+00)
>  %864 = fsub float 1.000000e+00, %863
>  %865 = shl i32 %857, 4
>  %866 = add i32 %865, 176
>  %867 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %866)
>  %868 = fmul float %867, %864
>  %869 = shl i32 %857, 4
>  %870 = add i32 %869, 180
>  %871 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %870)
>  %872 = fmul float %871, %864
>  %873 = shl i32 %857, 4
>  %874 = add i32 %873, 184
>  %875 = call float @llvm.SI.load.const(<16 x i8> %803, i32 %874)
>  %876 = fmul float %875, %864
>  %877 = fmul float %855, %855
>  %878 = call float @llvm.AMDGPU.clamp.(float %877, float 0.000000e+00, float 1.000000e+00)
>  %879 = fsub float 1.000000e+00, %837
>  %880 = fmul float %878, %879
>  %881 = fadd float %837, %880
>  %882 = fmul float %868, %881
>  %883 = fmul float %872, %881
>  %884 = fmul float %876, %881
>  %885 = fmul float %882, %411
>  %886 = fmul float %883, %411
>  %887 = fmul float %884, %411
>  %888 = fmul float %846, %885
>  %889 = fmul float %846, %886
>  %890 = fmul float %846, %887
>  %891 = call float @llvm.AMDGPU.clamp.(float %809, float 0.000000e+00, float 1.000000e+00)
>  %892 = fmul float %888, %891
>  %893 = fadd float %892, %.09
>  %894 = fmul float %889, %891
>  %895 = fadd float %894, %.010
>  %896 = fmul float %890, %891
>  %897 = fadd float %896, %.011
>  %898 = add i32 %814, 1
>  br label %loop217
>
>endloop287:                                       ; preds = %loop217
>  %899 = fmul float %767, %561
>  %900 = fmul float %768, %561
>  %901 = fmul float %769, %561
>  %902 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %903 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %904 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 18, !amdgpu.uniform !0
>  %905 = load <8 x i32>, <8 x i32> addrspace(2)* %904, align 32, !invariant.load !0
>  %906 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %907 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %906, i64 0, i64 39, !amdgpu.uniform !0
>  %908 = load <4 x i32>, <4 x i32> addrspace(2)* %907, align 16, !invariant.load !0
>  %909 = extractelement <8 x i32> %905, i32 7
>  %910 = extractelement <4 x i32> %908, i32 0
>  %911 = and i32 %910, %909
>  %912 = insertelement <4 x i32> %908, i32 %911, i32 0
>  %913 = bitcast float %902 to i32
>  %914 = bitcast float %903 to i32
>  %915 = insertelement <2 x i32> undef, i32 %913, i32 0
>  %916 = insertelement <2 x i32> %915, i32 %914, i32 1
>  %917 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %916, <8 x i32> %905, <4 x i32> %912, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %918 = extractelement <4 x float> %917, i32 0
>  %919 = extractelement <4 x float> %917, i32 1
>  %920 = extractelement <4 x float> %917, i32 2
>  %921 = fmul float %918, 0x3FD3333340000000
>  %922 = fmul float %919, 0x3FE2E147A0000000
>  %923 = fadd float %922, %921
>  %924 = fmul float %920, 0x3FBC28F5C0000000
>  %925 = fadd float %923, %924
>  %926 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %927 = load <16 x i8>, <16 x i8> addrspace(2)* %926, align 16, !invariant.load !0
>  %928 = call float @llvm.SI.load.const(<16 x i8> %927, i32 560)
>  %929 = fmul float %925, %928
>  %930 = fmul float %918, %929
>  %931 = fmul float %919, %929
>  %932 = fmul float %920, %929
>  %933 = fmul float %930, 3.200000e+01
>  %934 = fmul float %931, 3.200000e+01
>  %935 = fmul float %932, 3.200000e+01
>  %936 = fmul float %.09, %349
>  %937 = fadd float %936, %899
>  %938 = fmul float %.010, %356
>  %939 = fadd float %938, %900
>  %940 = fmul float %.011, %363
>  %941 = fadd float %940, %901
>  %942 = fadd float %937, %933
>  %943 = fadd float %939, %934
>  %944 = fadd float %941, %935
>  %945 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %946 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %947 = load <16 x i8>, <16 x i8> addrspace(2)* %946, align 16, !invariant.load !0
>  %948 = call float @llvm.SI.load.const(<16 x i8> %947, i32 12)
>  %949 = fsub float %945, %948
>  %950 = call float @llvm.maxnum.f32(float %949, float 0.000000e+00)
>  %951 = call float @llvm.SI.load.const(<16 x i8> %947, i32 28)
>  %952 = call float @llvm.SI.load.const(<16 x i8> %947, i32 12)
>  %953 = fsub float %951, %952
>  %954 = fadd float %953, 0x3F50624DE0000000
>  %955 = fdiv float 1.000000e+00, %954, !fpmath !1
>  %956 = fmul float %950, %955
>  %957 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %958 = load <16 x i8>, <16 x i8> addrspace(2)* %957, align 16, !invariant.load !0
>  %959 = call float @llvm.SI.load.const(<16 x i8> %958, i32 28)
>  %960 = call float @llvm.floor.f32(float %959)
>  %961 = fsub float %959, %960
>  %962 = fmul float %961, 8.000000e+00
>  %963 = call float @llvm.pow.f32(float %956, float %962)
>  %964 = call float @llvm.AMDGPU.clamp.(float %963, float 0.000000e+00, float 1.000000e+00)
>  %965 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %966 = fmul float %965, %964
>  %967 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %968 = load <16 x i8>, <16 x i8> addrspace(2)* %967, align 16, !invariant.load !0
>  %969 = call float @llvm.SI.load.const(<16 x i8> %968, i32 32)
>  %970 = fsub float 1.000000e+00, %966
>  %971 = fmul float %942, %966
>  %972 = fmul float %969, %970
>  %973 = fadd float %971, %972
>  %974 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %975 = load <16 x i8>, <16 x i8> addrspace(2)* %974, align 16, !invariant.load !0
>  %976 = call float @llvm.SI.load.const(<16 x i8> %975, i32 36)
>  %977 = fsub float 1.000000e+00, %966
>  %978 = fmul float %943, %966
>  %979 = fmul float %976, %977
>  %980 = fadd float %978, %979
>  %981 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %982 = load <16 x i8>, <16 x i8> addrspace(2)* %981, align 16, !invariant.load !0
>  %983 = call float @llvm.SI.load.const(<16 x i8> %982, i32 40)
>  %984 = fsub float 1.000000e+00, %966
>  %985 = fmul float %944, %966
>  %986 = fmul float %983, %984
>  %987 = fadd float %985, %986
>  %988 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %989 = bitcast float %5 to i32
>  %990 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %989, 10
>  %991 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %990, float %973, 11
>  %992 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %991, float %980, 12
>  %993 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %992, float %987, 13
>  %994 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %993, float %988, 14
>  %995 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %994, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %995
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>	v_mov_b32_e32 v10, v4          ; 7E140304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                     ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                   ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                   ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                  ; C08A0B14
>	s_load_dwordx4 s[24:27], s[10:11], 0x18                  ; C08C0B18
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[21:24], v4, s[4:7], 0 idxen    ; E00C2000 80011504
>	buffer_load_format_xyzw v[11:14], v5, s[12:15], 0 idxen  ; E00C2000 80030B05
>	buffer_load_format_xyzw v[3:6], v6, s[16:19], 0 idxen    ; E00C2000 80040306
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	buffer_load_format_xyzw v[14:17], v9, s[20:23], 0 idxen  ; E00C2000 80050E09
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	buffer_load_format_xyzw v[16:19], v10, s[24:27], 0 idxen ; E00C2000 8006100A
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                       ; C0800300
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x10                     ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                     ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                     ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x380                    ; C20380FF 00000380
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v27, s4                                    ; 7E360204
>	v_mov_b32_e32 v26, s5                                    ; 7E340205
>	v_mov_b32_e32 v25, s6                                    ; 7E320206
>	s_cmp_eq_u32 s7, -1                                      ; BF06C107
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                     ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x20                     ; C2020120
>	s_buffer_load_dword s5, s[0:3], 0x21                     ; C2028121
>	s_buffer_load_dword s6, s[0:3], 0x22                     ; C2030122
>	s_buffer_load_dword s7, s[0:3], 0x23                     ; C2038123
>	s_buffer_load_dword s8, s[0:3], 0x24                     ; C2040124
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v0, s4                                     ; 7E000204
>	v_mov_b32_e32 v1, s5                                     ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x25                     ; C2020125
>	s_buffer_load_dword s5, s[0:3], 0x26                     ; C2028126
>	v_mov_b32_e32 v8, s6                                     ; 7E100206
>	v_sub_f32_e32 v28, s7, v27                               ; 08383607
>	v_mov_b32_e32 v7, s8                                     ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x27                     ; C2030127
>	s_buffer_load_dword s7, s[0:3], 0x28                     ; C2038128
>	s_buffer_load_dword s8, s[0:3], 0x29                     ; C2040129
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v9, s4                                     ; 7E120204
>	v_mov_b32_e32 v10, s5                                    ; 7E140205
>	s_buffer_load_dword s4, s[0:3], 0x2a                     ; C202012A
>	s_buffer_load_dword s5, s[0:3], 0x2b                     ; C202812B
>	v_sub_f32_e32 v29, s6, v26                               ; 083A3406
>	v_mov_b32_e32 v18, s7                                    ; 7E240207
>	v_mov_b32_e32 v19, s8                                    ; 7E260208
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v20, s4                                    ; 7E280204
>	v_sub_f32_e32 v30, s5, v25                               ; 083C3205
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                    ; C0820B10
>	s_movk_i32 s15, 0x8c                                     ; B00F008C
>	s_movk_i32 s14, 0x80                                     ; B00E0080
>	s_movk_i32 s12, 0x84                                     ; B00C0084
>	s_movk_i32 s13, 0x88                                     ; B00D0088
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[35:38], v8, s[4:7], 0 idxen    ; E00C2000 80012308
>	s_buffer_load_dword s4, s[0:3], 0x384                    ; C20200FF 00000384
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                      ; BF06C104
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v35                                ; 7E001123
>	v_mul_lo_i32 v20, v0, 48                                 ; D2D60014 00016100
>	v_add_i32_e32 v9, vcc, s15, v20                          ; 4A12280F
>	v_add_i32_e32 v0, vcc, s14, v20                          ; 4A00280E
>	v_add_i32_e32 v1, vcc, s12, v20                          ; 4A02280C
>	v_add_i32_e32 v8, vcc, s13, v20                          ; 4A10280D
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v0, v0, s[0:3], 0 offen                ; E0301000 80000000
>	buffer_load_dword v1, v1, s[0:3], 0 offen                ; E0301000 80000101
>	buffer_load_dword v8, v8, s[0:3], 0 offen                ; E0301000 80000808
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_subrev_f32_e32 v28, v27, v9                            ; 0A38131B
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                     ; BF850000
>	v_add_i32_e32 v9, vcc, 0x9c, v20                         ; 4A1228FF 0000009C
>	v_add_i32_e32 v29, vcc, 0xac, v20                        ; 4A3A28FF 000000AC
>	v_add_i32_e32 v10, vcc, 0x94, v20                        ; 4A1428FF 00000094
>	v_add_i32_e32 v18, vcc, 0x98, v20                        ; 4A2428FF 00000098
>	v_add_i32_e32 v7, vcc, 0x90, v20                         ; 4A0E28FF 00000090
>	v_add_i32_e32 v19, vcc, 0xa4, v20                        ; 4A2628FF 000000A4
>	buffer_load_dword v30, v9, s[0:3], 0 offen               ; E0301000 80001E09
>	buffer_load_dword v9, v10, s[0:3], 0 offen               ; E0301000 8000090A
>	buffer_load_dword v10, v18, s[0:3], 0 offen              ; E0301000 80000A12
>	v_add_i32_e32 v18, vcc, 0xa0, v20                        ; 4A2428FF 000000A0
>	v_add_i32_e32 v20, vcc, 0xa8, v20                        ; 4A2828FF 000000A8
>	buffer_load_dword v31, v29, s[0:3], 0 offen              ; E0301000 80001F1D
>	buffer_load_dword v7, v7, s[0:3], 0 offen                ; E0301000 80000707
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	s_waitcnt vmcnt(7)                                       ; BF8C0F77
>	v_subrev_f32_e32 v29, v26, v30                           ; 0A3A3D1A
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_subrev_f32_e32 v30, v25, v31                           ; 0A3C3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                     ; C0820B0C
>	s_movk_i32 s10, 0x90                                     ; B00A0090
>	s_movk_i32 s9, 0x94                                      ; B0090094
>	s_movk_i32 s8, 0x98                                      ; B0080098
>	s_movk_i32 s11, 0x9c                                     ; B00B009C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[31:34], v7, s[4:7], 0 idxen    ; E00C2000 80011F07
>	v_cvt_i32_f32_e32 v7, v36                                ; 7E0E1124
>	s_movk_i32 s4, 0xac                                      ; B00400AC
>	v_add_i32_e32 v9, vcc, s10, v20                          ; 4A12280A
>	v_add_i32_e32 v10, vcc, s9, v20                          ; 4A142809
>	v_add_i32_e32 v18, vcc, s8, v20                          ; 4A242808
>	v_add_i32_e32 v19, vcc, s4, v20                          ; 4A262804
>	v_mul_lo_i32 v35, v7, 48                                 ; D2D60023 00016107
>	v_add_i32_e32 v7, vcc, s11, v20                          ; 4A0E280B
>	s_movk_i32 s6, 0xa4                                      ; B00600A4
>	s_movk_i32 s7, 0xa0                                      ; B00700A0
>	s_movk_i32 s5, 0xa8                                      ; B00500A8
>	v_add_i32_e32 v30, vcc, s6, v20                          ; 4A3C2806
>	buffer_load_dword v29, v7, s[0:3], 0 offen               ; E0301000 80001D07
>	v_add_i32_e32 v7, vcc, s7, v20                           ; 4A0E2807
>	v_add_i32_e32 v20, vcc, s5, v20                          ; 4A282805
>	buffer_load_dword v19, v19, s[0:3], 0 offen              ; E0301000 80001313
>	buffer_load_dword v9, v9, s[0:3], 0 offen                ; E0301000 80000909
>	buffer_load_dword v10, v10, s[0:3], 0 offen              ; E0301000 80000A0A
>	buffer_load_dword v18, v18, s[0:3], 0 offen              ; E0301000 80001212
>	buffer_load_dword v20, v20, s[0:3], 0 offen              ; E0301000 80001414
>	buffer_load_dword v36, v7, s[0:3], 0 offen               ; E0301000 80002407
>	buffer_load_dword v30, v30, s[0:3], 0 offen              ; E0301000 80001E1E
>	s_waitcnt vmcnt(8)                                       ; BF8C0F78
>	v_mul_f32_e32 v0, v31, v0                                ; 1000011F
>	v_mul_f32_e32 v1, v31, v1                                ; 1002031F
>	v_mul_f32_e32 v8, v31, v8                                ; 1010111F
>	v_mul_f32_e32 v28, v31, v28                              ; 1038391F
>	s_waitcnt vmcnt(6)                                       ; BF8C0F76
>	v_subrev_f32_e32 v39, v25, v19                           ; 0A4E2719
>	s_waitcnt vmcnt(5)                                       ; BF8C0F75
>	v_mul_f32_e32 v7, v31, v9                                ; 100E131F
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_mul_f32_e32 v9, v31, v10                               ; 1012151F
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_mul_f32_e32 v10, v31, v18                              ; 1014251F
>	v_subrev_f32_e32 v18, v26, v29                           ; 0A243B1A
>	v_mul_f32_e32 v29, v31, v18                              ; 103A251F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mul_f32_e32 v19, v31, v30                              ; 10263D1F
>	v_mul_f32_e32 v18, v31, v36                              ; 1024491F
>	v_mul_f32_e32 v20, v31, v20                              ; 1028291F
>	v_mul_f32_e32 v30, v31, v39                              ; 103C4F1F
>	v_add_i32_e32 v31, vcc, s15, v35                         ; 4A3E460F
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v27, v31                           ; 0A3E3F1B
>	v_mac_f32_e32 v28, v32, v31                              ; 3E383F20
>	v_add_i32_e32 v31, vcc, s11, v35                         ; 4A3E460B
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v26, v31                           ; 0A3E3F1A
>	v_mac_f32_e32 v29, v32, v31                              ; 3E3A3F20
>	v_add_i32_e32 v31, vcc, s14, v35                         ; 4A3E460E
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v32, v31                               ; 3E003F20
>	v_add_i32_e32 v31, vcc, s12, v35                         ; 4A3E460C
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_buffer_load_dword s12, s[0:3], 0x388                   ; C20600FF 00000388
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                      ; BF06800C
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v32, v31                               ; 3E023F20
>	v_add_i32_e32 v31, vcc, s13, v35                         ; 4A3E460D
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v31                               ; 3E103F20
>	v_add_i32_e32 v31, vcc, s10, v35                         ; 4A3E460A
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v31                               ; 3E0E3F20
>	v_add_i32_e32 v31, vcc, s9, v35                          ; 4A3E4609
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v31                               ; 3E123F20
>	v_add_i32_e32 v31, vcc, s8, v35                          ; 4A3E4608
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v32, v31                              ; 3E143F20
>	v_add_i32_e32 v31, vcc, s7, v35                          ; 4A3E4607
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v32, v31                              ; 3E243F20
>	v_add_i32_e32 v31, vcc, s6, v35                          ; 4A3E4606
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v32, v31                              ; 3E263F20
>	v_add_i32_e32 v31, vcc, s5, v35                          ; 4A3E4605
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v32, v31                              ; 3E283F20
>	v_add_i32_e32 v31, vcc, s4, v35                          ; 4A3E4604
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	v_mac_f32_e32 v30, v32, v31                              ; 3E3C3F20
>	s_cbranch_scc1 BB0_6                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v37                               ; 7E3E1125
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0x80, v31                        ; 4A403EFF 00000080
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v33, v32                               ; 3E004121
>	v_add_i32_e32 v32, vcc, 0x8c, v31                        ; 4A403EFF 0000008C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v33, v32                              ; 3E384121
>	v_add_i32_e32 v32, vcc, s11, v31                         ; 4A403E0B
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v33, v32                              ; 3E3A4121
>	v_add_i32_e32 v32, vcc, 0x84, v31                        ; 4A403EFF 00000084
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v33, v32                               ; 3E024121
>	v_add_i32_e32 v32, vcc, 0x88, v31                        ; 4A403EFF 00000088
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v33, v32                               ; 3E104121
>	v_add_i32_e32 v32, vcc, s10, v31                         ; 4A403E0A
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v33, v32                               ; 3E0E4121
>	v_add_i32_e32 v32, vcc, s9, v31                          ; 4A403E09
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v33, v32                               ; 3E124121
>	v_add_i32_e32 v32, vcc, s8, v31                          ; 4A403E08
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v33, v32                              ; 3E144121
>	v_add_i32_e32 v32, vcc, s7, v31                          ; 4A403E07
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v33, v32                              ; 3E244121
>	v_add_i32_e32 v32, vcc, s6, v31                          ; 4A403E06
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v33, v32                              ; 3E264121
>	v_add_i32_e32 v32, vcc, s5, v31                          ; 4A403E05
>	v_add_i32_e32 v31, vcc, s4, v31                          ; 4A3E3E04
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v33, v32                              ; 3E284121
>	v_mac_f32_e32 v30, v33, v31                              ; 3E3C3F21
>	s_buffer_load_dword s4, s[0:3], 0x38c                    ; C20200FF 0000038C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                       ; BF068004
>	s_cbranch_scc1 BB0_8                                     ; BF850000
>	v_cvt_i32_f32_e32 v31, v38                               ; 7E3E1126
>	v_mul_lo_i32 v31, v31, 48                                ; D2D6001F 0001611F
>	v_add_i32_e32 v32, vcc, 0x80, v31                        ; 4A403EFF 00000080
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v0, v34, v32                               ; 3E004122
>	v_add_i32_e32 v32, vcc, 0x8c, v31                        ; 4A403EFF 0000008C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v27, v32                           ; 0A40411B
>	v_mac_f32_e32 v28, v34, v32                              ; 3E384122
>	v_add_i32_e32 v32, vcc, 0x9c, v31                        ; 4A403EFF 0000009C
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v32, v26, v32                           ; 0A40411A
>	v_mac_f32_e32 v29, v34, v32                              ; 3E3A4122
>	v_add_i32_e32 v32, vcc, 0x84, v31                        ; 4A403EFF 00000084
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v1, v34, v32                               ; 3E024122
>	v_add_i32_e32 v32, vcc, 0x88, v31                        ; 4A403EFF 00000088
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v34, v32                               ; 3E104122
>	v_add_i32_e32 v32, vcc, 0x90, v31                        ; 4A403EFF 00000090
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v34, v32                               ; 3E0E4122
>	v_add_i32_e32 v32, vcc, 0x94, v31                        ; 4A403EFF 00000094
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v34, v32                               ; 3E124122
>	v_add_i32_e32 v32, vcc, 0x98, v31                        ; 4A403EFF 00000098
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v34, v32                              ; 3E144122
>	v_add_i32_e32 v32, vcc, 0xa0, v31                        ; 4A403EFF 000000A0
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v18, v34, v32                              ; 3E244122
>	v_add_i32_e32 v32, vcc, 0xa4, v31                        ; 4A403EFF 000000A4
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v19, v34, v32                              ; 3E264122
>	v_add_i32_e32 v32, vcc, 0xa8, v31                        ; 4A403EFF 000000A8
>	v_add_i32_e32 v31, vcc, 0xac, v31                        ; 4A3E3EFF 000000AC
>	buffer_load_dword v31, v31, s[0:3], 0 offen              ; E0301000 80001F1F
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v31, v25, v31                           ; 0A3E3F19
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v20, v34, v32                              ; 3E284122
>	v_mac_f32_e32 v30, v34, v31                              ; 3E3C3F22
>	v_mul_f32_e32 v31, v1, v22                               ; 103E2D01
>	v_mac_f32_e32 v31, v0, v21                               ; 3E3E2B00
>	v_mac_f32_e32 v31, v8, v23                               ; 3E3E2F08
>	v_mac_f32_e32 v31, v28, v24                              ; 3E3E311C
>	v_mul_f32_e32 v28, v9, v22                               ; 10382D09
>	v_mac_f32_e32 v28, v7, v21                               ; 3E382B07
>	v_mac_f32_e32 v28, v10, v23                              ; 3E382F0A
>	s_buffer_load_dword s4, s[0:3], 0x3                      ; C2020103
>	v_mac_f32_e32 v28, v29, v24                              ; 3E38311D
>	v_mul_f32_e32 v29, v19, v22                              ; 103A2D13
>	v_mul_f32_e32 v22, 0, v22                                ; 102C2C80
>	v_mac_f32_e32 v29, v18, v21                              ; 3E3A2B12
>	v_mac_f32_e32 v22, 0, v21                                ; 3E2C2A80
>	v_mac_f32_e32 v29, v20, v23                              ; 3E3A2F14
>	v_mac_f32_e32 v22, 0, v23                                ; 3E2C2E80
>	v_add_f32_e32 v21, v24, v22                              ; 062A2D18
>	v_mac_f32_e32 v29, v30, v24                              ; 3E3A311E
>	v_add_f32_e32 v22, v27, v31                              ; 062C3F1B
>	s_buffer_load_dword s6, s[0:3], 0x7                      ; C2030107
>	v_add_f32_e32 v24, v25, v29                              ; 06303B19
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v25, s4, v22                               ; 10322C04
>	s_buffer_load_dword s4, s[0:3], 0xb                      ; C202010B
>	v_add_f32_e32 v23, v26, v28                              ; 062E391A
>	v_mac_f32_e32 v25, s6, v23                               ; 3E322E06
>	s_buffer_load_dword s16, s[0:3], 0x2                     ; C2080102
>	s_buffer_load_dword s18, s[0:3], 0x6                     ; C2090106
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v25, s4, v24                               ; 3E323004
>	s_buffer_load_dword s4, s[0:3], 0xf                      ; C202010F
>	s_buffer_load_dword s19, s[0:3], 0xa                     ; C209810A
>	s_buffer_load_dword s10, s[0:3], 0xe                     ; C205010E
>	s_buffer_load_dword s12, s[0:3], 0x18                    ; C2060118
>	v_add_f32_e32 v11, v11, v11                              ; 0616170B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v25, s4, v21                               ; 3E322A04
>	s_buffer_load_dword s4, s[0:3], 0x1f                     ; C202011F
>	v_add_f32_e32 v3, v3, v3                                 ; 06060703
>	s_buffer_load_dword s13, s[0:3], 0x19                    ; C2068119
>	v_mad_f32 v12, 2.0, v12, -1.0                            ; D282000C 03CE18F4
>	v_mad_f32 v4, 2.0, v4, -1.0                              ; D2820004 03CE08F4
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v26, s4, v25                               ; 10343204
>	exp 15, 32, 0, 0, 0, v22, v23, v24, v26                  ; F800020F 1A181716
>	exp 15, 33, 0, 0, 0, v14, v15, v16, v17                  ; F800021F 11100F0E
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>	v_mad_f32 v14, v11, v0, -v0                              ; D282000E 8402010B
>	v_mad_f32 v0, v3, v0, -v0                                ; D2820000 84020103
>	v_mad_f32 v15, v11, v7, -v7                              ; D282000F 841E0F0B
>	v_mac_f32_e32 v14, v1, v12                               ; 3E1C1901
>	v_mac_f32_e32 v0, v1, v4                                 ; 3E000901
>	v_mad_f32 v1, v3, v7, -v7                                ; D2820001 841E0F03
>	v_mul_f32_e32 v7, s16, v22                               ; 100E2C10
>	v_mac_f32_e32 v7, s18, v23                               ; 3E0E2E12
>	v_mac_f32_e32 v7, s19, v24                               ; 3E0E3013
>	v_mad_f32 v13, 2.0, v13, -1.0                            ; D282000D 03CE1AF4
>	v_mad_f32 v5, 2.0, v5, -1.0                              ; D2820005 03CE0AF4
>	v_mac_f32_e32 v14, v8, v13                               ; 3E1C1B08
>	v_mac_f32_e32 v0, v8, v5                                 ; 3E000B08
>	v_mac_f32_e32 v7, s10, v21                               ; 3E0E2A0A
>	v_mov_b32_e32 v8, s12                                    ; 7E10020C
>	v_mac_f32_e32 v8, s13, v7                                ; 3E100E0D
>	v_add_f32_e64 v8, v8, 0 clamp                            ; D2060808 00010108
>	s_buffer_load_dword s14, s[0:3], 0x1a                    ; C207011A
>	v_log_f32_e32 v8, v8                                     ; 7E104F08
>	s_buffer_load_dword s5, s[0:3], 0x4                      ; C2028104
>	s_buffer_load_dword s7, s[0:3], 0x8                      ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                      ; C2040109
>	s_buffer_load_dword s6, s[0:3], 0xc                      ; C203010C
>	s_buffer_load_dword s9, s[0:3], 0xd                      ; C204810D
>	s_buffer_load_dword s11, s[0:3], 0x15                    ; C2058115
>	s_buffer_load_dword s4, s[0:3], 0x0                      ; C2020100
>	s_buffer_load_dword s15, s[0:3], 0x1                     ; C2078101
>	s_buffer_load_dword s17, s[0:3], 0x5                     ; C2088105
>	s_buffer_load_dword s0, s[0:3], 0x1b                     ; C200011B
>	v_mac_f32_e32 v15, v9, v12                               ; 3E1E1909
>	v_mac_f32_e32 v1, v9, v4                                 ; 3E020909
>	v_mad_f32 v11, v11, v18, -v18                            ; D282000B 844A250B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_legacy_f32_e32 v8, s14, v8                         ; 0E10100E
>	v_mac_f32_e32 v11, v19, v12                              ; 3E161913
>	v_mad_f32 v3, v3, v18, -v18                              ; D2820003 844A2503
>	v_mac_f32_e32 v15, v10, v13                              ; 3E1E1B0A
>	v_mac_f32_e32 v1, v10, v5                                ; 3E020B0A
>	v_exp_f32_e32 v8, v8                                     ; 7E104B08
>	v_sub_f32_e64 v10, 1.0, s0                               ; D208000A 000000F2
>	v_mac_f32_e32 v3, v19, v4                                ; 3E060913
>	v_mac_f32_e32 v10, s0, v8                                ; 3E141000
>	v_mac_f32_e32 v11, v20, v13                              ; 3E161B14
>	v_mac_f32_e32 v3, v20, v5                                ; 3E060B14
>	v_mov_b32_e32 v9, 0x3dcccccd                             ; 7E1202FF 3DCCCCCD
>	v_mul_f32_e32 v8, v1, v11                                ; 10101701
>	v_mul_f32_e32 v10, v10, v10                              ; 1014150A
>	v_mul_f32_e32 v4, s4, v22                                ; 10082C04
>	v_mul_f32_e32 v5, s15, v22                               ; 100A2C0F
>	v_mul_f32_e32 v12, v3, v14                               ; 10181D03
>	v_mul_f32_e32 v13, v0, v15                               ; 101A1F00
>	v_add_f32_e32 v6, v6, v6                                 ; 060C0D06
>	v_mad_f32 v8, v15, v3, -v8                               ; D2820008 8422070F
>	v_mul_f32_e32 v9, s11, v9                                ; 1012120B
>	exp 15, 34, 0, 0, 0, v10, v0, v0, v0                     ; F800022F 0000000A
>	v_mac_f32_e32 v4, s5, v23                                ; 3E082E05
>	v_mac_f32_e32 v5, s17, v23                               ; 3E0A2E11
>	v_mad_f32 v12, v11, v0, -v12                             ; D282000C 8432010B
>	v_mad_f32 v13, v14, v1, -v13                             ; D282000D 8436030E
>	v_mad_f32 v8, v6, v8, -v8                                ; D2820008 84221106
>	exp 15, 35, 0, 0, 0, v14, v15, v11, v9                   ; F800023F 090B0F0E
>	v_mac_f32_e32 v4, s7, v24                                ; 3E083007
>	v_mac_f32_e32 v5, s8, v24                                ; 3E0A3008
>	v_mad_f32 v12, v6, v12, -v12                             ; D282000C 84321906
>	v_mad_f32 v6, v6, v13, -v13                              ; D2820006 84361B06
>	exp 15, 36, 0, 0, 0, v0, v1, v3, v8                      ; F800024F 08030100
>	v_mac_f32_e32 v4, s6, v21                                ; 3E082A06
>	v_mac_f32_e32 v5, s9, v21                                ; 3E0A2A09
>	exp 15, 37, 0, 0, 0, v12, v6, v0, v0                     ; F800025F 0000060C
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v25                     ; F80008CF 19070504
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2244 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v26, v4, 3, 4, [m0]                             ; C8681304
>	v_interp_p2_f32 v26, [v26], v5, 3, 4, [m0]                      ; C8691305
>	v_interp_p1_f32 v27, v4, 0, 5, [m0]                             ; C86C1404
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	v_interp_p2_f32 v27, [v27], v5, 0, 5, [m0]                      ; C86D1405
>	v_interp_p1_f32 v28, v4, 1, 5, [m0]                             ; C8701504
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_interp_p2_f32 v28, [v28], v5, 1, 5, [m0]                      ; C8711505
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v29, s12, v1                                      ; 083A020C
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_interp_p1_f32 v12, v4, 0, 3, [m0]                             ; C8300C04
>	v_sub_f32_e32 v30, s13, v0                                      ; 083C000D
>	v_mul_f32_e32 v7, v29, v29                                      ; 100E3B1D
>	s_load_dwordx8 s[44:51], s[4:5], 0x30                           ; C0D60530
>	s_load_dwordx4 s[52:55], s[4:5], 0x3c                           ; C09A053C
>	v_interp_p2_f32 v12, [v12], v5, 0, 3, [m0]                      ; C8310C05
>	v_interp_p1_f32 v21, v4, 1, 3, [m0]                             ; C8540D04
>	v_sub_f32_e32 v31, s14, v2                                      ; 083E040E
>	v_mac_f32_e32 v7, v30, v30                                      ; 3E0E3D1E
>	v_mac_f32_e32 v7, v31, v31                                      ; 3E0E3F1F
>	v_interp_p2_f32 v21, [v21], v5, 1, 3, [m0]                      ; C8550D05
>	v_interp_p1_f32 v22, v4, 2, 3, [m0]                             ; C8580E04
>	v_rsq_f32_e32 v32, v7                                           ; 7E405D07
>	v_interp_p2_f32 v22, [v22], v5, 2, 3, [m0]                      ; C8590E05
>	v_interp_p1_f32 v7, v6, 0, 1, [m0]                              ; C81C0406
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]                        ; C81D0403
>	v_interp_p1_f32 v8, v6, 1, 1, [m0]                              ; C8200506
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]                        ; C8210503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[17:20], v[7:8], s[44:51], s[52:55] dmask:0xf     ; F0800F00 01AB1107
>	s_load_dwordx8 s[44:51], s[4:5], 0x80                           ; C0D60580
>	s_load_dwordx4 s[52:55], s[4:5], 0x8c                           ; C09A058C
>	s_buffer_load_dword s65, s[0:3], 0x5f                           ; C220815F
>	s_buffer_load_dword s64, s[0:3], 0x5e                           ; C220015E
>	s_buffer_load_dword s66, s[0:3], 0x62                           ; C2210162
>	v_mul_f32_e32 v23, v12, v12                                     ; 102E190C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s52, s52, s51                                         ; 87343334
>	image_sample v[14:16], v[7:8], s[44:51], s[52:55] dmask:0x7     ; F0800700 01AB0E07
>	s_buffer_load_dword s44, s[0:3], 0x5c                           ; C216015C
>	s_buffer_load_dword s50, s[0:3], 0x68                           ; C2190168
>	s_buffer_load_dword s51, s[0:3], 0x6b                           ; C219816B
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v38, s65, v14                                     ; 104C1C41
>	s_buffer_load_dword s45, s[0:3], 0x5d                           ; C216815D
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v35, s44, v14                                     ; 10461C2C
>	v_mac_f32_e32 v35, s50, v15                                     ; 3E461E32
>	v_mac_f32_e32 v38, s51, v15                                     ; 3E4C1E33
>	s_buffer_load_dword s51, s[0:3], 0x77                           ; C2198177
>	s_buffer_load_dword s44, s[0:3], 0x69                           ; C2160169
>	s_buffer_load_dword s50, s[0:3], 0x6a                           ; C219016A
>	v_mul_f32_e32 v36, s45, v14                                     ; 10481C2D
>	v_mul_f32_e32 v37, s64, v14                                     ; 104A1C40
>	s_buffer_load_dword s48, s[0:3], 0x66                           ; C2180166
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v36, s44, v15                                     ; 3E481E2C
>	v_mac_f32_e32 v37, s50, v15                                     ; 3E4A1E32
>	s_buffer_load_dword s44, s[0:3], 0x74                           ; C2160174
>	s_buffer_load_dword s45, s[0:3], 0x75                           ; C2168175
>	s_buffer_load_dword s50, s[0:3], 0x76                           ; C2190176
>	v_mac_f32_e32 v38, s51, v16                                     ; 3E4C2033
>	s_buffer_load_dword s51, s[0:3], 0x72                           ; C2198172
>	s_buffer_load_dword s49, s[0:3], 0x67                           ; C2188167
>	s_buffer_load_dword s55, s[0:3], 0x61                           ; C21B8161
>	v_mul_f32_e32 v41, s48, v14                                     ; 10521C30
>	s_buffer_load_dword s46, s[0:3], 0x64                           ; C2170164
>	s_buffer_load_dword s47, s[0:3], 0x65                           ; C2178165
>	s_buffer_load_dword s53, s[0:3], 0x6d                           ; C21A816D
>	s_buffer_load_dword s65, s[0:3], 0x73                           ; C2208173
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v35, s44, v16                                     ; 3E46202C
>	v_mac_f32_e32 v36, s45, v16                                     ; 3E48202D
>	v_mac_f32_e32 v37, s50, v16                                     ; 3E4A2032
>	v_mac_f32_e32 v41, s51, v15                                     ; 3E521E33
>	s_buffer_load_dword s50, s[0:3], 0x6e                           ; C219016E
>	s_buffer_load_dword s44, s[0:3], 0x70                           ; C2160170
>	s_buffer_load_dword s45, s[0:3], 0x71                           ; C2168171
>	s_buffer_load_dword s48, s[0:3], 0x79                           ; C2180179
>	s_buffer_load_dword s51, s[0:3], 0x7f                           ; C219817F
>	v_mul_f32_e32 v42, s49, v14                                     ; 10541C31
>	s_buffer_load_dword s49, s[0:3], 0x7a                           ; C218817A
>	v_mac_f32_e32 v23, v21, v21                                     ; 3E2E2B15
>	v_mac_f32_e32 v23, v22, v22                                     ; 3E2E2D16
>	v_mul_f32_e32 v44, s55, v14                                     ; 10581C37
>	s_buffer_load_dword s54, s[0:3], 0x60                           ; C21B0160
>	v_rsq_f32_e32 v23, v23                                          ; 7E2E5D17
>	v_mul_f32_e32 v39, s46, v14                                     ; 104E1C2E
>	v_mul_f32_e32 v40, s47, v14                                     ; 10501C2F
>	v_mac_f32_e32 v42, s65, v15                                     ; 3E541E41
>	v_mul_f32_e32 v45, s66, v14                                     ; 105A1C42
>	v_mac_f32_e32 v44, s53, v15                                     ; 3E581E35
>	s_buffer_load_dword s52, s[0:3], 0x6c                           ; C21A016C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v45, s50, v15                                     ; 3E5A1E32
>	v_mac_f32_e32 v39, s44, v15                                     ; 3E4E1E2C
>	v_mac_f32_e32 v40, s45, v15                                     ; 3E501E2D
>	s_buffer_load_dword s44, s[0:3], 0x7c                           ; C216017C
>	s_buffer_load_dword s45, s[0:3], 0x7d                           ; C216817D
>	s_buffer_load_dword s46, s[0:3], 0x7e                           ; C217017E
>	v_mac_f32_e32 v42, s51, v16                                     ; 3E542033
>	v_mac_f32_e32 v44, s48, v16                                     ; 3E582030
>	s_buffer_load_dword s64, s[0:3], 0x78                           ; C2200178
>	s_buffer_load_dword s48, s[0:3], 0x58                           ; C2180158
>	s_buffer_load_dword s51, s[0:3], 0x88                           ; C2198188
>	v_mac_f32_e32 v45, s49, v16                                     ; 3E5A2031
>	s_buffer_load_dword s49, s[0:3], 0x59                           ; C2188159
>	v_mul_f32_e32 v43, s54, v14                                     ; 10561C36
>	v_mul_f32_e32 v34, v23, v21                                     ; 10442B17
>	v_interp_p1_f32 v21, v4, 3, 3, [m0]                             ; C8540F04
>	v_mac_f32_e32 v43, s52, v15                                     ; 3E561E34
>	v_mul_f32_e32 v33, v23, v12                                     ; 10421917
>	v_add_f32_e32 v12, v14, v15                                     ; 06181F0E
>	v_interp_p2_f32 v21, [v21], v5, 3, 3, [m0]                      ; C8550F05
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v39, s44, v16                                     ; 3E4E202C
>	v_mac_f32_e32 v40, s45, v16                                     ; 3E50202D
>	v_mac_f32_e32 v41, s46, v16                                     ; 3E52202E
>	v_add_f32_e32 v12, v16, v12                                     ; 06181910
>	v_mac_f32_e32 v43, s64, v16                                     ; 3E562040
>	v_mul_f32_e32 v16, s48, v7                                      ; 10200E30
>	s_buffer_load_dword s48, s[0:3], 0x84                           ; C2180184
>	s_buffer_load_dword s50, s[0:3], 0x85                           ; C2190185
>	v_mul_f32_e32 v15, s51, v21                                     ; 101E2A33
>	s_buffer_load_dword s51, s[0:3], 0x8a                           ; C219818A
>	v_mul_f32_e32 v46, v23, v22                                     ; 105C2D17
>	v_mul_f32_e32 v22, s49, v8                                      ; 102C1031
>	s_buffer_load_dword s49, s[0:3], 0x89                           ; C2188189
>	s_buffer_load_dword s52, s[0:3], 0x8b                           ; C21A018B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s48, v16                                     ; 101C2030
>	v_mul_f32_e32 v24, s50, v16                                     ; 10302032
>	v_mul_f32_e32 v16, s51, v21                                     ; 10202A33
>	v_mac_f32_e32 v14, s48, v15                                     ; 3E1C1E30
>	v_mac_f32_e32 v24, s50, v16                                     ; 3E302032
>	v_mul_f32_e32 v15, s48, v22                                     ; 101E2C30
>	v_mul_f32_e32 v23, s49, v21                                     ; 102E2A31
>	v_mul_f32_e32 v25, s50, v22                                     ; 10322C32
>	v_mul_f32_e32 v16, s52, v21                                     ; 10202A34
>	v_mac_f32_e32 v15, s48, v23                                     ; 3E1E2E30
>	v_mac_f32_e32 v25, s50, v16                                     ; 3E322032
>	s_load_dwordx8 s[48:55], s[4:5], 0x50                           ; C0D80550
>	s_load_dwordx4 s[72:75], s[4:5], 0x5c                           ; C0A4055C
>	s_buffer_load_dword s77, s[0:3], 0x87                           ; C2268187
>	s_buffer_load_dword s76, s[0:3], 0x86                           ; C2260186
>	v_add_f32_e64 v47, v12, 0 clamp                                 ; D206082F 0001010C
>	s_load_dwordx8 s[56:63], s[4:5], 0x40                           ; C0DC0540
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s72, s72, s55                                         ; 87483748
>	image_sample v[21:23], v[14:15], s[48:55], s[72:75] dmask:0xb   ; F0800B00 024C150E
>	image_sample v14, v[24:25], s[48:55], s[72:75] dmask:0x4        ; F0800400 024C0E18
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v12, s77, v14                                     ; 10181C4D
>	v_mad_f32 v12, v22, s76, -v12                                   ; D282000C 84309916
>	s_load_dwordx4 s[72:75], s[4:5], 0x4c                           ; C0A4054C
>	s_load_dwordx8 s[64:71], s[4:5], 0x60                           ; C0E00560
>	s_load_dwordx4 s[76:79], s[4:5], 0x6c                           ; C0A6056C
>	v_mad_f32 v48, -v47, v17, v17                                   ; D2820030 2446232F
>	v_mad_f32 v49, -v47, v18, v18                                   ; D2820031 244A252F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s72, s72, s63                                         ; 87483F48
>	v_mad_f32 v50, -v47, v19, v19                                   ; D2820032 244E272F
>	s_and_b32 s76, s76, s71                                         ; 874C474C
>	image_sample v17, v[7:8], s[64:71], s[76:79] dmask:0x8          ; F0800800 02701107
>	image_sample v[14:16], v[7:8], s[56:63], s[72:75] dmask:0xb     ; F0800B00 024E0E07
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v18, v15, v15                                     ; 06241F0F
>	v_mad_f32 v15, 2.0, v15, -1.0                                   ; D282000F 03CE1EF4
>	v_mad_f32 v16, 2.0, v16, -1.0                                   ; D2820010 03CE20F4
>	v_mad_f32 v18, v18, v15, -v15                                   ; D2820012 843E1F12
>	v_mac_f32_e32 v18, v16, v16                                     ; 3E242110
>	v_mad_f32 v19, 2.0, v21, -1.0                                   ; D2820013 03CE2AF4
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mad_f32 v21, 2.0, v23, -1.0                                   ; D2820015 03CE2EF4
>	v_mac_f32_e32 v16, v20, v19                                     ; 3E202714
>	v_sub_f32_e32 v18, 0x3f8020c5, v18                              ; 082424FF 3F8020C5
>	v_mac_f32_e32 v15, v20, v21                                     ; 3E1E2B14
>	v_mul_f32_e32 v19, v16, v16                                     ; 10262110
>	v_sqrt_f32_e32 v18, v18                                         ; 7E246712
>	v_mac_f32_e32 v19, v15, v15                                     ; 3E261F0F
>	v_mac_f32_e32 v19, v18, v18                                     ; 3E262512
>	v_rsq_f32_e32 v19, v19                                          ; 7E265D13
>	v_interp_p1_f32 v23, v4, 0, 4, [m0]                             ; C85C1004
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	v_interp_p2_f32 v23, [v23], v5, 0, 4, [m0]                      ; C85D1005
>	v_interp_p1_f32 v24, v4, 1, 4, [m0]                             ; C8601104
>	v_mul_f32_e32 v16, v19, v16                                     ; 10202113
>	v_interp_p2_f32 v24, [v24], v5, 1, 4, [m0]                      ; C8611105
>	v_interp_p1_f32 v25, v4, 2, 4, [m0]                             ; C8641204
>	v_mul_f32_e32 v51, v12, v20                                     ; 1066290C
>	v_mad_f32 v52, -v20, v12, 1.0                                   ; D2820034 23CA1914
>	v_mul_f32_e32 v20, v19, v15                                     ; 10281F13
>	v_mul_f32_e32 v12, v16, v23                                     ; 10182F10
>	v_mul_f32_e32 v15, v16, v24                                     ; 101E3110
>	v_interp_p2_f32 v25, [v25], v5, 2, 4, [m0]                      ; C8651205
>	v_mul_f32_e32 v18, v19, v18                                     ; 10242513
>	v_mac_f32_e32 v12, v20, v26                                     ; 3E183514
>	v_mul_f32_e32 v4, v16, v25                                      ; 10083310
>	v_mac_f32_e32 v15, v20, v27                                     ; 3E1E3714
>	v_mul_f32_e32 v10, v32, v29                                     ; 10143B20
>	v_mac_f32_e32 v12, v18, v33                                     ; 3E184312
>	v_mac_f32_e32 v4, v20, v28                                      ; 3E083914
>	v_mul_f32_e32 v9, v32, v30                                      ; 10123D20
>	v_mac_f32_e32 v15, v18, v34                                     ; 3E1E4512
>	v_mul_f32_e32 v53, v10, v12                                     ; 106A190A
>	v_mul_f32_e32 v11, v32, v31                                     ; 10163F20
>	v_mac_f32_e32 v4, v18, v46                                      ; 3E085D12
>	v_mac_f32_e32 v53, v9, v15                                      ; 3E6A1F09
>	v_mac_f32_e32 v53, v11, v4                                      ; 3E6A090B
>	s_load_dwordx8 s[48:55], s[4:5], 0x70                           ; C0D80570
>	s_load_dwordx4 s[56:59], s[4:5], 0x7c                           ; C09C057C
>	v_mul_f32_e32 v16, v15, v53                                     ; 10206B0F
>	v_mad_f32 v22, -v39, v17, v17                                   ; D2820016 24462327
>	v_mul_f32_e32 v17, v4, v53                                      ; 10226B04
>	v_mac_f32_e32 v16, v15, v53                                     ; 3E206B0F
>	v_mad_f32 v30, -v30, v32, v16                                   ; D282001E 2442411E
>	v_interp_p1_f32 v16, v6, 2, 1, [m0]                             ; C8400606
>	v_mac_f32_e32 v17, v4, v53                                      ; 3E226B04
>	v_mad_f32 v31, -v31, v32, v17                                   ; D282001F 2446411F
>	v_interp_p2_f32 v16, [v16], v3, 2, 1, [m0]                      ; C8410603
>	v_interp_p1_f32 v17, v6, 3, 1, [m0]                             ; C8440706
>	v_interp_p2_f32 v17, [v17], v3, 3, 1, [m0]                      ; C8450703
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s56, s56, s55                                         ; 87383738
>	image_sample v[18:21], v[16:17], s[48:55], s[56:59] dmask:0xf   ; F0800F00 01CC1210
>	v_mul_f32_e32 v5, v12, v53                                      ; 100A6B0C
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v16, -0.5, v19                                    ; 062026F1
>	v_mac_f32_e32 v5, v12, v53                                      ; 3E0A6B0C
>	v_mad_f32 v29, -v29, v32, v5                                    ; D282001D 2416411D
>	v_add_f32_e32 v5, -0.5, v20                                     ; 060A28F1
>	v_add_f32_e32 v19, v16, v16                                     ; 06262110
>	v_add_f32_e32 v17, v5, v5                                       ; 06220B05
>	v_mul_f32_e32 v5, v19, v19                                      ; 100A2713
>	v_mac_f32_e32 v5, v17, v17                                      ; 3E0A2311
>	v_add_f32_e64 v5, v5, 0 clamp                                   ; D2060805 00010105
>	v_sub_f32_e32 v5, 1.0, v5                                       ; 080A0AF2
>	v_sqrt_f32_e32 v20, v5                                          ; 7E286705
>	v_mul_f32_e32 v5, v17, v23                                      ; 100A2F11
>	v_mul_f32_e32 v16, v17, v24                                     ; 10203111
>	v_mac_f32_e32 v5, v19, v26                                      ; 3E0A3513
>	v_mul_f32_e32 v17, v17, v25                                     ; 10223311
>	v_mac_f32_e32 v16, v19, v27                                     ; 3E203713
>	v_mac_f32_e32 v5, v20, v33                                      ; 3E0A4314
>	v_mac_f32_e32 v17, v19, v28                                     ; 3E223913
>	v_mac_f32_e32 v16, v20, v34                                     ; 3E204514
>	v_mul_f32_e32 v19, v5, v29                                      ; 10263B05
>	s_buffer_load_dword s49, s[0:3], 0x10                           ; C2188110
>	v_mac_f32_e32 v17, v20, v46                                     ; 3E225D14
>	v_mac_f32_e32 v19, v16, v30                                     ; 3E263D10
>	v_mac_f32_e32 v19, v17, v31                                     ; 3E263F11
>	v_add_f32_e64 v19, v19, 0 clamp                                 ; D2060813 00010113
>	v_mul_f32_e32 v55, v14, v18                                     ; 106E250E
>	v_mov_b32_e32 v18, 0x403b800a                                   ; 7E2402FF 403B800A
>	v_mad_f32 v54, 2.0, v21, -v19                                   ; D2820036 844E2AF4
>	v_mad_f32 v19, v18, v33, v1                                     ; D2820013 04064312
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v24, s49, v19                                     ; 10302631
>	s_buffer_load_dword s49, s[0:3], 0x11                           ; C2188111
>	s_buffer_load_dword s50, s[0:3], 0x12                           ; C2190112
>	s_buffer_load_dword s51, s[0:3], 0x14                           ; C2198114
>	s_buffer_load_dword s52, s[0:3], 0x15                           ; C21A0115
>	s_buffer_load_dword s53, s[0:3], 0x16                           ; C21A8116
>	v_mad_f32 v20, v18, v34, v0                                     ; D2820014 04024512
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v25, s49, v19                                     ; 10322631
>	v_mul_f32_e32 v26, s50, v19                                     ; 10342632
>	v_mac_f32_e32 v24, s51, v20                                     ; 3E302833
>	s_buffer_load_dword s49, s[0:3], 0x18                           ; C2188118
>	s_buffer_load_dword s50, s[0:3], 0x19                           ; C2190119
>	s_buffer_load_dword s51, s[0:3], 0x1a                           ; C219811A
>	v_mac_f32_e32 v25, s52, v20                                     ; 3E322834
>	v_mac_f32_e32 v26, s53, v20                                     ; 3E342835
>	s_load_dwordx8 s[32:39], s[4:5], 0x0                            ; C0D00500
>	s_load_dwordx4 s[40:43], s[4:5], 0xc                            ; C094050C
>	s_buffer_load_dword s48, s[0:3], 0x1e                           ; C218011E
>	s_buffer_load_dword s52, s[0:3], 0x1c                           ; C21A011C
>	s_buffer_load_dword s53, s[0:3], 0x1d                           ; C21A811D
>	v_mad_f32 v18, v18, v46, v2                                     ; D2820012 040A5D12
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v24, s49, v18                                     ; 3E302431
>	v_mac_f32_e32 v25, s50, v18                                     ; 3E322432
>	v_mac_f32_e32 v26, s51, v18                                     ; 3E342433
>	v_add_f32_e32 v32, v21, v21                                     ; 06402B15
>	v_sub_f32_e32 v21, 1.0, v47                                     ; 082A5EF2
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	v_add_f32_e32 v19, s52, v24                                     ; 06263034
>	v_add_f32_e32 v20, s53, v25                                     ; 06283235
>	v_add_f32_e32 v18, s48, v26                                     ; 06243430
>	v_mac_f32_e32 v22, v39, v38                                     ; 3E2C4D27
>	image_sample_c v38, v[18:21], s[32:39], s[40:43] dmask:0x1      ; F0A00100 01482612
>	v_add_f32_e32 v18, v21, v42                                     ; 06245515
>	v_mul_f32_e32 v19, v40, v35                                     ; 10264728
>	v_mul_f32_e32 v20, v40, v36                                     ; 10284928
>	v_add_f32_e32 v23, v21, v41                                     ; 062E5315
>	v_mul_f32_e32 v21, v40, v37                                     ; 102A4B28
>	v_rcp_f32_e32 v18, v18                                          ; 7E245512
>	v_log_f32_e32 v19, v19                                          ; 7E264F13
>	v_log_f32_e32 v20, v20                                          ; 7E284F14
>	v_log_f32_e32 v21, v21                                          ; 7E2A4F15
>	v_log_f32_e32 v22, v22                                          ; 7E2C4F16
>	v_mul_legacy_f32_e32 v19, v18, v19                              ; 0E262712
>	v_mul_legacy_f32_e32 v20, v18, v20                              ; 0E282912
>	v_mul_legacy_f32_e32 v18, v18, v21                              ; 0E242B12
>	v_rcp_f32_e32 v21, v23                                          ; 7E2A5517
>	v_exp_f32_e32 v37, v18                                          ; 7E4A4B12
>	v_exp_f32_e32 v35, v19                                          ; 7E464B13
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	v_mul_legacy_f32_e32 v18, v21, v22                              ; 0E242D15
>	v_exp_f32_e32 v39, v18                                          ; 7E4E4B12
>	v_cubema_f32 v18, v12, v15, v4                                  ; D28E0012 04121F0C
>	v_rcp_f32_e64 v18, |v18|                                        ; D3540112 00000112
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                           ; C08E051C
>	v_cubetc_f32 v19, v12, v15, v4                                  ; D28C0013 04121F0C
>	v_mov_b32_e32 v21, 0x3fc00000                                   ; 7E2A02FF 3FC00000
>	v_cubesc_f32 v22, v12, v15, v4                                  ; D28A0016 04121F0C
>	v_mad_f32 v19, v18, v19, v21                                    ; D2820013 04562712
>	v_mad_f32 v18, v18, v22, v21                                    ; D2820012 04562D12
>	v_add_f32_e64 v22, v53, 0 clamp                                 ; D2060816 00010135
>	s_buffer_load_dword s45, s[0:3], 0x83                           ; C2168183
>	v_sub_f32_e32 v22, 1.0, v22                                     ; 082C2CF2
>	v_log_f32_e32 v22, v22                                          ; 7E2C4F16
>	v_mad_f32 v40, -v51, v39, v39                                   ; D2820028 249E4F33
>	v_exp_f32_e32 v36, v20                                          ; 7E484B14
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v20, v12, v15, v4                                  ; D2880014 04121F0C
>	image_sample v[25:28], v[18:21], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E51912
>	v_mac_f32_e32 v40, s45, v51                                     ; 3E50662D
>	v_mov_b32_e32 v18, 0x40c00000                                   ; 7E2402FF 40C00000
>	v_max_f32_e32 v19, v35, v40                                     ; 20265123
>	v_max_f32_e32 v20, v36, v40                                     ; 20285124
>	v_mad_f32 v24, -v40, v18, v18                                   ; D2820018 244A2528
>	v_mul_legacy_f32_e32 v18, 0x40a00000, v22                       ; 0E242CFF 40A00000
>	v_max_f32_e32 v22, v37, v40                                     ; 202C5125
>	v_exp_f32_e32 v18, v18                                          ; 7E244B12
>	v_subrev_f32_e32 v19, v35, v19                                  ; 0A262723
>	v_subrev_f32_e32 v20, v36, v20                                  ; 0A282924
>	v_subrev_f32_e32 v22, v37, v22                                  ; 0A2C2D25
>	v_mad_f32 v41, v20, v18, v36                                    ; D2820029 04922514
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                           ; C090052C
>	v_mad_f32 v19, v19, v18, v35                                    ; D2820013 048E2513
>	v_mad_f32 v42, v22, v18, v37                                    ; D282002A 04962516
>	v_cubema_f32 v18, v29, v30, v31                                 ; D28E0012 047E3D1D
>	v_rcp_f32_e64 v18, |v18|                                        ; D3540112 00000112
>	v_mac_f32_e32 v48, v47, v43                                     ; 3E60572F
>	v_cubetc_f32 v20, v29, v30, v31                                 ; D28C0014 047E3D1D
>	s_buffer_load_dword s9, s[0:3], 0x4                             ; C2048104
>	v_cubesc_f32 v43, v29, v30, v31                                 ; D28A002B 047E3D1D
>	v_mad_f32 v22, v18, v20, v21                                    ; D2820016 04562912
>	s_buffer_load_dword s8, s[0:3], 0x5                             ; C2040105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v23, v29, v30, v31                                 ; D2880017 047E3D1D
>	v_mac_f32_e32 v21, v18, v43                                     ; 3E2A5712
>	image_sample_l v[20:22], v[21:24], s[12:19], s[32:35] dmask:0x7 ; F0900700 01031415
>	s_buffer_load_dword s12, s[0:3], 0x6                            ; C2060106
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v18, v20, v19                                     ; 10242714
>	v_mul_f32_e32 v19, v21, v41                                     ; 10265315
>	v_mul_f32_e32 v21, v33, v29                                     ; 102A3B21
>	v_mul_f32_e32 v29, v33, v10                                     ; 103A1521
>	v_mac_f32_e32 v29, v34, v9                                      ; 3E3A1322
>	v_mul_f32_e32 v9, s9, v5                                        ; 10120A09
>	v_mad_f32 v9, v16, -s8, -v9                                     ; D2820009 C4241110
>	v_mad_f32 v21, -v30, v34, -v21                                  ; D2820015 A456451E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v9, -v17, s12, v9                                     ; D2820009 24241911
>	s_buffer_load_dword s13, s[0:3], 0xc                            ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                            ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                            ; C207810E
>	v_mad_f32 v30, -v31, v46, v21                                   ; D282001E 24565D1F
>	v_mov_b32_e32 v31, 0x3f8ccccd                                   ; 7E3E02FF 3F8CCCCD
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mad_f32 v9, v32, v31, -v9                                     ; D2820009 84263F20
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v9, v9, v9                                        ; 10121309
>	v_mul_f32_e32 v10, v38, v38                                     ; 10144D26
>	v_mac_f32_e32 v29, v46, v11                                     ; 3E3A172E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v11, s13, v10                                     ; 1016140D
>	v_mul_f32_e32 v21, s14, v10                                     ; 102A140E
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mul_f32_e32 v10, s15, v10                                     ; 1014140F
>	v_mul_f32_e32 v11, v9, v11                                      ; 10161709
>	v_mul_f32_e32 v21, v9, v21                                      ; 102A2B09
>	v_mul_f32_e32 v9, v9, v10                                       ; 10121509
>	v_mul_f32_e32 v10, s9, v12                                      ; 10141809
>	v_mad_f32 v10, v15, -s8, -v10                                   ; D282000A C428110F
>	v_mad_f32 v10, -v4, s12, v10                                    ; D282000A 24281904
>	v_add_f32_e64 v10, v10, 0 clamp                                 ; D206080A 0001010A
>	v_mul_f32_e32 v9, v14, v9                                       ; 1012130E
>	v_mul_f32_e32 v11, v14, v11                                     ; 1016170E
>	v_mul_f32_e32 v21, v14, v21                                     ; 102A2B0E
>	v_mul_f32_e32 v20, v22, v42                                     ; 10285516
>	v_mul_f32_e32 v22, v9, v10                                      ; 102C1509
>	v_mov_b32_e32 v9, 0x3eaaaa9f                                    ; 7E1202FF 3EAAAA9F
>	v_mul_f32_e32 v11, v11, v10                                     ; 1016150B
>	v_mul_f32_e32 v21, v21, v10                                     ; 102A1515
>	v_mul_f32_e32 v10, v9, v35                                      ; 10144709
>	v_mac_f32_e32 v10, v9, v36                                      ; 3E144909
>	v_mac_f32_e32 v10, v9, v37                                      ; 3E144B09
>	v_sub_f32_e32 v9, 1.0, v10                                      ; 081214F2
>	v_mul_f32_e32 v10, v28, v26                                     ; 1014351C
>	v_add_f32_e64 v26, v54, 0 clamp                                 ; D206081A 00010136
>	v_log_f32_e32 v26, v26                                          ; 7E344F1A
>	v_add_f32_e64 v24, v9, 0 clamp                                  ; D2060818 00010109
>	v_mul_f32_e32 v9, v28, v25                                      ; 1012331C
>	v_mul_f32_e32 v9, 4.0, v9                                       ; 101212F6
>	v_mul_legacy_f32_e32 v26, 0x40400000, v26                       ; 0E3434FF 40400000
>	v_exp_f32_e32 v26, v26                                          ; 7E344B1A
>	v_mul_f32_e32 v25, v9, v24                                      ; 10323109
>	v_mul_f32_e32 v9, v24, v11                                      ; 10121718
>	v_mac_f32_e32 v9, v55, v25                                      ; 3E123337
>	v_mad_f32 v25, -v39, v52, 1.0                                   ; D2820019 23CA6927
>	v_add_f32_e64 v26, v26, 0 clamp                                 ; D206081A 0001011A
>	v_mul_f32_e32 v23, v28, v27                                     ; 102E371C
>	v_mad_f32 v25, -s45, v51, v25                                   ; D2820019 2466662D
>	v_mov_b32_e32 v27, v26                                          ; 7E36031A
>	v_sub_f32_e32 v28, 1.0, v29                                     ; 08383AF2
>	v_mac_f32_e32 v27, 0xbe99999a, v40                              ; 3E3650FF BE99999A
>	v_mac_f32_e32 v25, 0x41a00000, v40                              ; 3E3250FF 41A00000
>	v_mul_f32_e32 v25, v25, v27                                     ; 10323719
>	v_mul_f32_e32 v10, 4.0, v10                                     ; 101414F6
>	s_buffer_load_dword s47, s[0:3], 0x80                           ; C2178180
>	s_buffer_load_dword s46, s[0:3], 0x81                           ; C2170181
>	s_buffer_load_dword s44, s[0:3], 0x82                           ; C2160182
>	v_add_f32_e32 v27, 1.0, v30                                     ; 06363CF2
>	v_add_f32_e64 v28, v28, 0 clamp                                 ; D206081C 0001011C
>	v_subrev_f32_e32 v27, v28, v27                                  ; 0A36371C
>	v_mul_f32_e32 v11, v10, v24                                     ; 1016310A
>	v_mul_f32_e32 v10, v24, v21                                     ; 10142B18
>	v_mac_f32_e32 v10, v55, v11                                     ; 3E141737
>	v_mul_f32_e32 v11, 4.0, v23                                     ; 10162EF6
>	v_add_f32_e64 v27, v27, 0 clamp                                 ; D206081B 0001011B
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	v_sub_f32_e32 v28, 1.0, v27                                     ; 083836F2
>	v_mac_f32_e32 v49, v47, v44                                     ; 3E62592F
>	v_mul_f32_e32 v21, v11, v24                                     ; 102A310B
>	v_mul_f32_e32 v11, v24, v22                                     ; 10162D18
>	v_mac_f32_e32 v50, v47, v45                                     ; 3E645B2F
>	v_mad_f32 v22, -v51, v48, v48                                   ; D2820016 24C26133
>	v_mad_f32 v23, -v51, v49, v49                                   ; D2820017 24C66333
>	v_mac_f32_e32 v11, v55, v21                                     ; 3E162B37
>	v_mad_f32 v21, -v51, v50, v50                                   ; D2820015 24CA6533
>	v_mul_f32_e32 v25, v25, v26                                     ; 10323519
>	v_mad_f32 v27, -v27, v28, v28                                   ; D282001B 2472391B
>	v_mul_f32_e32 v25, v27, v25                                     ; 1032331B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v22, s47, v51                                     ; 3E2C662F
>	v_mac_f32_e32 v23, s46, v51                                     ; 3E2E662E
>	v_mac_f32_e32 v21, s44, v51                                     ; 3E2A662C
>	v_mul_f32_e32 v26, v31, v32                                     ; 1034411F
>	v_mov_b32_e32 v27, 0xc8                                         ; 7E3602FF 000000C8
>	v_mov_b32_e32 v28, 0                                            ; 7E380280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v29, vcc, 0xffffffe8, v27                         ; 4A3A36FF FFFFFFE8
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, 0xffffffec, v27                         ; 4A3C36FF FFFFFFEC
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v31, vcc, -16, v27                                ; 4A3E36D0
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v28, vcc, 1, v28                                  ; 4A383881
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v29, v1, v29                                   ; 0A3A3B01
>	v_mul_f32_e32 v32, v29, v29                                     ; 10403B1D
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v30, v0, v30                                   ; 0A3C3D00
>	v_mac_f32_e32 v32, v30, v30                                     ; 3E403D1E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_subrev_f32_e32 v31, v2, v31                                   ; 0A3E3F02
>	v_mac_f32_e32 v32, v31, v31                                     ; 3E403F1F
>	v_rsq_f32_e32 v33, v32                                          ; 7E425D20
>	v_mul_f32_e32 v29, v33, v29                                     ; 103A3B21
>	v_mul_f32_e32 v34, v5, v29                                      ; 10443B05
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mac_f32_e32 v34, v16, v30                                     ; 3E443D10
>	v_mac_f32_e32 v34, v17, v31                                     ; 3E443F11
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_subrev_f32_e32 v34, v34, v26                                  ; 0A443522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_mul_f32_e32 v34, v34, v34                                     ; 10444522
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_sub_f32_e32 v35, 1.0, v33                                     ; 084642F2
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mac_f32_e32 v33, v35, v34                                     ; 3E424523
>	v_add_i32_e32 v34, vcc, -12, v27                                ; 4A4436CC
>	buffer_load_dword v34, v34, s[0:3], 0 offen                     ; E0301000 80002222
>	v_mul_f32_e32 v29, v12, v29                                     ; 103A3B0C
>	v_mac_f32_e32 v29, v15, v30                                     ; 3E3A3D0F
>	v_mac_f32_e32 v29, v4, v31                                      ; 3E3A3F04
>	v_add_i32_e32 v30, vcc, -8, v27                                 ; 4A3C36C8
>	v_add_i32_e32 v31, vcc, -4, v27                                 ; 4A3E36C4
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_f32_e64 v29, v29, 0 clamp                                 ; D206081D 0001011D
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mul_f32_e32 v32, v34, v32                                     ; 10404122
>	buffer_load_dword v34, v27, s[0:3], 0 offen                     ; E0301000 8000221B
>	v_add_f32_e64 v32, v32, 0 clamp                                 ; D2060820 00010120
>	v_add_i32_e32 v27, vcc, 32, v27                                 ; 4A3636A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v30, -v32, v30, v30                                   ; D282001E 247A3D20
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mad_f32 v31, -v32, v31, v31                                   ; D282001F 247E3F20
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v31, v33, v31                                     ; 103E3F21
>	v_mul_f32_e32 v30, v14, v30                                     ; 103C3D0E
>	v_mul_f32_e32 v31, v14, v31                                     ; 103E3F0E
>	v_mul_f32_e32 v30, v30, v29                                     ; 103C3B1E
>	v_mul_f32_e32 v31, v31, v29                                     ; 103E3B1F
>	v_mac_f32_e32 v9, v24, v30                                      ; 3E123D18
>	v_mac_f32_e32 v10, v24, v31                                     ; 3E143F18
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v32, -v32, v34, v34                                   ; D2820020 248A4520
>	v_mul_f32_e32 v32, v33, v32                                     ; 10404121
>	v_mul_f32_e32 v32, v14, v32                                     ; 1040410E
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v11, v24, v29                                     ; 3E163B18
>	v_cmp_lt_i32_e32 vcc, 1, v28                                    ; 7D023881
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	s_load_dwordx8 s[12:19], s[4:5], 0x90                           ; C0C60590
>	s_load_dwordx4 s[4:7], s[4:5], 0x9c                             ; C082059C
>	s_buffer_load_dword s8, s[0:3], 0x8c                            ; C204018C
>	v_mul_f32_e32 v5, v25, v18                                      ; 100A2519
>	v_mac_f32_e32 v5, v22, v9                                       ; 3E0A1316
>	v_mov_b32_e32 v9, 0x42000000                                    ; 7E1202FF 42000000
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	image_sample v[14:16], v[7:8], s[12:19], s[4:7] dmask:0x7       ; F0800700 00230E07
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v14                               ; 10021CFF 3E99999A
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v1, 0x3f170a3d, v15                               ; 3E021EFF 3F170A3D
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mac_f32_e32 v1, 0x3de147ae, v16                               ; 3E0220FF 3DE147AE
>	v_mul_f32_e32 v1, s8, v1                                        ; 10020208
>	v_mul_f32_e32 v2, v1, v14                                       ; 10041D01
>	v_mac_f32_e32 v5, v9, v2                                        ; 3E0A0509
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v8, v25, v20                                      ; 10102919
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v4, v1, v15                                       ; 10081F01
>	v_mul_f32_e32 v1, v1, v16                                       ; 10022101
>	v_mac_f32_e32 v8, v21, v11                                      ; 3E101715
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v8, v9, v1                                        ; 3E100309
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v7, v25, v19                                      ; 100E2719
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v7, v23, v10                                      ; 3E0E1517
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_mac_f32_e32 v7, v9, v4                                        ; 3E0E0909
>	v_mul_f32_e32 v4, v0, v1                                        ; 10080300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v4, s6, s6                                       ; D2820000 20180D04
>	v_mad_f32 v1, -v4, s7, s7                                       ; D2820001 201C0F04
>	v_mad_f32 v2, -v4, s0, s0                                       ; D2820002 20000104
>	v_mac_f32_e32 v0, v4, v5                                        ; 3E000B04
>	v_mac_f32_e32 v1, v4, v7                                        ; 3E020F04
>	v_mac_f32_e32 v2, v4, v8                                        ; 3E041104
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 88
>VGPRS: 56
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2896 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 4
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL IN[2]
>DCL IN[3]
>DCL IN[4]
>DCL IN[5]
>DCL IN[6]
>DCL IN[7]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].xyz, GENERIC[2]
>DCL OUT[4], GENERIC[3]
>DCL OUT[5], GENERIC[4]
>DCL OUT[6].x, GENERIC[5]
>DCL CONST[0..226]
>DCL TEMP[0..9], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    2.0000,    -1.0000,     0.0000,     1.0000}
>IMM[1] INT32 {3, 1, 2, 0}
>IMM[2] FLT32 {   -0.0010,     0.0000,     0.0000,     0.0000}
>  0: F2I TEMP[0], IN[4]
>  1: MAD TEMP[1].xyz, IN[1].xyzz, IMM[0].xxxx, IMM[0].yyyy
>  2: MAD TEMP[2], IN[2], IMM[0].xxxx, IMM[0].yyyy
>  3: MOV TEMP[3].xyz, IMM[0].zzzz
>  4: MOV TEMP[3].w, CONST[4].xxxx
>  5: MOV TEMP[4].xyz, IMM[0].zzzz
>  6: MOV TEMP[4].w, CONST[4].yyyy
>  7: MOV TEMP[5].xyz, IMM[0].zzzz
>  8: MOV TEMP[5].w, CONST[4].zzzz
>  9: NOT TEMP[6].x, CONST[223].xxxx
> 10: UIF TEMP[6].xxxx :0
> 11:   ADD TEMP[6], CONST[7], -TEMP[3]
> 12:   ADD TEMP[7], CONST[8], -TEMP[4]
> 13:   ADD TEMP[8], CONST[9], -TEMP[5]
> 14: ELSE :0
> 15:   NOT TEMP[9].x, CONST[224].xxxx
> 16:   UIF TEMP[9].xxxx :0
> 17:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 18:     UARL ADDR[0].x, TEMP[9].xxxx
> 19:     UARL ADDR[0].x, TEMP[9].xxxx
> 20:     ADD TEMP[6], CONST[ADDR[0].x+7], -TEMP[3]
> 21:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 22:     UARL ADDR[0].x, TEMP[9].xxxx
> 23:     UARL ADDR[0].x, TEMP[9].xxxx
> 24:     ADD TEMP[7], CONST[ADDR[0].x+7], -TEMP[4]
> 25:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 26:     UARL ADDR[0].x, TEMP[9].xxxx
> 27:     UARL ADDR[0].x, TEMP[9].xxxx
> 28:     ADD TEMP[8], CONST[ADDR[0].x+7], -TEMP[5]
> 29:   ELSE :0
> 30:     UMUL TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx
> 31:     UARL ADDR[0].x, TEMP[9].xxxx
> 32:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[3]
> 33:     MUL TEMP[6], TEMP[9], IN[3].xxxx
> 34:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].yyyy
> 35:     UARL ADDR[0].x, TEMP[9].xxxx
> 36:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[4]
> 37:     MUL TEMP[7], TEMP[9], IN[3].xxxx
> 38:     UMAD TEMP[9].x, TEMP[0].xxxx, IMM[1].xxxx, IMM[1].zzzz
> 39:     UARL ADDR[0].x, TEMP[9].xxxx
> 40:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[5]
> 41:     MUL TEMP[8], TEMP[9], IN[3].xxxx
> 42:     UMUL TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx
> 43:     UARL ADDR[0].x, TEMP[9].xxxx
> 44:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[3]
> 45:     MAD TEMP[6], TEMP[9], IN[3].yyyy, TEMP[6]
> 46:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].yyyy
> 47:     UARL ADDR[0].x, TEMP[9].xxxx
> 48:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[4]
> 49:     MAD TEMP[7], TEMP[9], IN[3].yyyy, TEMP[7]
> 50:     UMAD TEMP[9].x, TEMP[0].yyyy, IMM[1].xxxx, IMM[1].zzzz
> 51:     UARL ADDR[0].x, TEMP[9].xxxx
> 52:     ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[5]
> 53:     MAD TEMP[8], TEMP[9], IN[3].yyyy, TEMP[8]
> 54:     UIF CONST[225].xxxx :0
> 55:       UMUL TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx
> 56:       UARL ADDR[0].x, TEMP[9].xxxx
> 57:       ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[3]
> 58:       MAD TEMP[6], TEMP[9], IN[3].zzzz, TEMP[6]
> 59:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].yyyy
> 60:       UARL ADDR[0].x, TEMP[9].xxxx
> 61:       ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[4]
> 62:       MAD TEMP[7], TEMP[9], IN[3].zzzz, TEMP[7]
> 63:       UMAD TEMP[9].x, TEMP[0].zzzz, IMM[1].xxxx, IMM[1].zzzz
> 64:       UARL ADDR[0].x, TEMP[9].xxxx
> 65:       ADD TEMP[9], CONST[ADDR[0].x+7], -TEMP[5]
> 66:       MAD TEMP[8], TEMP[9], IN[3].zzzz, TEMP[8]
> 67:     ENDIF
> 68:     UIF CONST[226].xxxx :0
> 69:       UMUL TEMP[9].x, TEMP[0].wwww, IMM[1].xxxx
> 70:       UARL ADDR[0].x, TEMP[9].xxxx
> 71:       ADD TEMP[3], CONST[ADDR[0].x+7], -TEMP[3]
> 72:       MAD TEMP[6], TEMP[3], IN[3].wwww, TEMP[6]
> 73:       UMAD TEMP[3].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].yyyy
> 74:       UARL ADDR[0].x, TEMP[3].xxxx
> 75:       ADD TEMP[3], CONST[ADDR[0].x+7], -TEMP[4]
> 76:       MAD TEMP[7], TEMP[3], IN[3].wwww, TEMP[7]
> 77:       UMAD TEMP[0].x, TEMP[0].wwww, IMM[1].xxxx, IMM[1].zzzz
> 78:       UARL ADDR[0].x, TEMP[0].xxxx
> 79:       ADD TEMP[0], CONST[ADDR[0].x+7], -TEMP[5]
> 80:       MAD TEMP[8], TEMP[0], IN[3].wwww, TEMP[8]
> 81:     ENDIF
> 82:   ENDIF
> 83: ENDIF
> 84: DP4 TEMP[0].x, IN[0], TEMP[6]
> 85: DP4 TEMP[3].x, IN[0], TEMP[7]
> 86: MOV TEMP[0].y, TEMP[3].xxxx
> 87: DP4 TEMP[3].x, IN[0], TEMP[8]
> 88: MOV TEMP[0].z, TEMP[3].xxxx
> 89: DP4 TEMP[3].x, IN[0], IMM[0].zzzw
> 90: ADD TEMP[0].xyz, TEMP[0].xyzz, CONST[4].xyzz
> 91: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[6].xyzz
> 92: DP3 TEMP[5].x, TEMP[1].xyzz, TEMP[7].xyzz
> 93: MOV TEMP[4].y, TEMP[5].xxxx
> 94: DP3 TEMP[1].x, TEMP[1].xyzz, TEMP[8].xyzz
> 95: MOV TEMP[4].z, TEMP[1].xxxx
> 96: DP3 TEMP[5].x, TEMP[2].xyzz, TEMP[6].xyzz
> 97: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[7].xyzz
> 98: MOV TEMP[5].y, TEMP[6].xxxx
> 99: DP3 TEMP[6].x, TEMP[2].xyzz, TEMP[8].xyzz
>100: MOV TEMP[5].z, TEMP[6].xxxx
>101: MUL TEMP[6], CONST[0], TEMP[0].xxxx
>102: MAD TEMP[6], CONST[1], TEMP[0].yyyy, TEMP[6]
>103: MAD TEMP[6], CONST[2], TEMP[0].zzzz, TEMP[6]
>104: MAD TEMP[3], CONST[3], TEMP[3].xxxx, TEMP[6]
>105: MOV TEMP[6].xyw, TEMP[3].xyxw
>106: MOV TEMP[0].xyz, TEMP[0].xyzx
>107: ADD TEMP[7].x, TEMP[3].zzzz, IMM[2].xxxx
>108: MOV TEMP[6].z, TEMP[7].xxxx
>109: MUL TEMP[3].x, TEMP[3].wwww, CONST[6].wwww
>110: MOV TEMP[0].w, TEMP[3].xxxx
>111: MOV TEMP[3].xy, IN[6].xyxx
>112: MOV TEMP[3].zw, IN[7].yyxy
>113: MAD TEMP[7].x, TEMP[7].xxxx, CONST[5].yyyy, CONST[5].xxxx
>114: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>115: POW TEMP[7].x, TEMP[7].xxxx, CONST[5].zzzz
>116: ADD TEMP[8].x, IMM[0].wwww, -CONST[5].wwww
>117: MAD TEMP[7].x, CONST[5].wwww, TEMP[7].xxxx, TEMP[8].xxxx
>118: MUL TEMP[8].xyz, TEMP[4].zxyy, TEMP[5].yzxx
>119: MAD TEMP[8].xyz, TEMP[4].yzxx, TEMP[5].zxyy, -TEMP[8].xyzz
>120: MUL TEMP[2].xyz, TEMP[8].xyzz, TEMP[2].wwww
>121: MOV TEMP[5].xyz, TEMP[5].xyzx
>122: MOV TEMP[5].w, TEMP[2].xxxx
>123: MOV TEMP[2].xy, TEMP[2].yzyy
>124: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[7].xxxx
>125: MOV TEMP[7].z, TEMP[7].xxxx
>126: MOV TEMP[7].xy, IN[5].xyxx
>127: MOV TEMP[2].zw, TEMP[4].yyxy
>128: MOV OUT[1], TEMP[3]
>129: MOV OUT[2], TEMP[0]
>130: MOV OUT[5], TEMP[2]
>131: MOV OUT[0], TEMP[6]
>132: MOV OUT[4], TEMP[5]
>133: MOV OUT[3].xyz, TEMP[7].xyzx
>134: MOV OUT[6].x, TEMP[1].xxxx
>135: END
>radeonsi: Compiling shader 132
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %22 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %23 = load <16 x i8>, <16 x i8> addrspace(2)* %22, align 16, !invariant.load !0
>  %24 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %23, i32 0, i32 %14)
>  %25 = extractelement <4 x float> %24, i32 0
>  %26 = extractelement <4 x float> %24, i32 1
>  %27 = extractelement <4 x float> %24, i32 2
>  %28 = extractelement <4 x float> %24, i32 3
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %30, i32 0, i32 %15)
>  %32 = extractelement <4 x float> %31, i32 0
>  %33 = extractelement <4 x float> %31, i32 1
>  %34 = extractelement <4 x float> %31, i32 2
>  %35 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 2, !amdgpu.uniform !0
>  %36 = load <16 x i8>, <16 x i8> addrspace(2)* %35, align 16, !invariant.load !0
>  %37 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %36, i32 0, i32 %16)
>  %38 = extractelement <4 x float> %37, i32 0
>  %39 = extractelement <4 x float> %37, i32 1
>  %40 = extractelement <4 x float> %37, i32 2
>  %41 = extractelement <4 x float> %37, i32 3
>  %42 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 3, !amdgpu.uniform !0
>  %43 = load <16 x i8>, <16 x i8> addrspace(2)* %42, align 16, !invariant.load !0
>  %44 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %43, i32 0, i32 %17)
>  %45 = extractelement <4 x float> %44, i32 0
>  %46 = extractelement <4 x float> %44, i32 1
>  %47 = extractelement <4 x float> %44, i32 2
>  %48 = extractelement <4 x float> %44, i32 3
>  %49 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 4, !amdgpu.uniform !0
>  %50 = load <16 x i8>, <16 x i8> addrspace(2)* %49, align 16, !invariant.load !0
>  %51 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %50, i32 0, i32 %18)
>  %52 = extractelement <4 x float> %51, i32 0
>  %53 = extractelement <4 x float> %51, i32 1
>  %54 = extractelement <4 x float> %51, i32 2
>  %55 = extractelement <4 x float> %51, i32 3
>  %56 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 5, !amdgpu.uniform !0
>  %57 = load <16 x i8>, <16 x i8> addrspace(2)* %56, align 16, !invariant.load !0
>  %58 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %57, i32 0, i32 %19)
>  %59 = extractelement <4 x float> %58, i32 0
>  %60 = extractelement <4 x float> %58, i32 1
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 6, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %62, i32 0, i32 %20)
>  %64 = extractelement <4 x float> %63, i32 0
>  %65 = extractelement <4 x float> %63, i32 1
>  %66 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 7, !amdgpu.uniform !0
>  %67 = load <16 x i8>, <16 x i8> addrspace(2)* %66, align 16, !invariant.load !0
>  %68 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %67, i32 0, i32 %21)
>  %69 = extractelement <4 x float> %68, i32 0
>  %70 = extractelement <4 x float> %68, i32 1
>  %71 = fptosi float %52 to i32
>  %72 = fptosi float %53 to i32
>  %73 = fptosi float %54 to i32
>  %74 = fptosi float %55 to i32
>  %75 = fmul float %32, 2.000000e+00
>  %76 = fadd float %75, -1.000000e+00
>  %77 = fmul float %33, 2.000000e+00
>  %78 = fadd float %77, -1.000000e+00
>  %79 = fmul float %34, 2.000000e+00
>  %80 = fadd float %79, -1.000000e+00
>  %81 = fmul float %38, 2.000000e+00
>  %82 = fadd float %81, -1.000000e+00
>  %83 = fmul float %39, 2.000000e+00
>  %84 = fadd float %83, -1.000000e+00
>  %85 = fmul float %40, 2.000000e+00
>  %86 = fadd float %85, -1.000000e+00
>  %87 = fmul float %41, 2.000000e+00
>  %88 = fadd float %87, -1.000000e+00
>  %89 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %90 = load <16 x i8>, <16 x i8> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = call float @llvm.SI.load.const(<16 x i8> %90, i32 64)
>  %92 = call float @llvm.SI.load.const(<16 x i8> %90, i32 68)
>  %93 = call float @llvm.SI.load.const(<16 x i8> %90, i32 72)
>  %94 = call float @llvm.SI.load.const(<16 x i8> %90, i32 3568)
>  %95 = bitcast float %94 to i32
>  %96 = icmp eq i32 %95, -1
>  %97 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %98 = load <16 x i8>, <16 x i8> addrspace(2)* %97, align 16, !invariant.load !0
>  br i1 %96, label %else14, label %if10
>
>if10:                                             ; preds = %main_body
>  %99 = call float @llvm.SI.load.const(<16 x i8> %98, i32 112)
>  %100 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %101 = load <16 x i8>, <16 x i8> addrspace(2)* %100, align 16, !invariant.load !0
>  %102 = call float @llvm.SI.load.const(<16 x i8> %101, i32 116)
>  %103 = call float @llvm.SI.load.const(<16 x i8> %101, i32 120)
>  %104 = call float @llvm.SI.load.const(<16 x i8> %101, i32 124)
>  %105 = fsub float %104, %91
>  %106 = call float @llvm.SI.load.const(<16 x i8> %101, i32 128)
>  %107 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %108 = load <16 x i8>, <16 x i8> addrspace(2)* %107, align 16, !invariant.load !0
>  %109 = call float @llvm.SI.load.const(<16 x i8> %108, i32 132)
>  %110 = call float @llvm.SI.load.const(<16 x i8> %108, i32 136)
>  %111 = call float @llvm.SI.load.const(<16 x i8> %108, i32 140)
>  %112 = fsub float %111, %92
>  %113 = call float @llvm.SI.load.const(<16 x i8> %108, i32 144)
>  %114 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %115 = load <16 x i8>, <16 x i8> addrspace(2)* %114, align 16, !invariant.load !0
>  %116 = call float @llvm.SI.load.const(<16 x i8> %115, i32 148)
>  %117 = call float @llvm.SI.load.const(<16 x i8> %115, i32 152)
>  %118 = call float @llvm.SI.load.const(<16 x i8> %115, i32 156)
>  %119 = fsub float %118, %93
>  br label %endif83
>
>else14:                                           ; preds = %main_body
>  %120 = call float @llvm.SI.load.const(<16 x i8> %98, i32 3584)
>  %121 = bitcast float %120 to i32
>  %122 = icmp eq i32 %121, -1
>  %123 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %124 = load <16 x i8>, <16 x i8> addrspace(2)* %123, align 16, !invariant.load !0
>  %125 = mul i32 %71, 48
>  %126 = add i32 %125, 112
>  %127 = call float @llvm.SI.load.const(<16 x i8> %124, i32 %126)
>  %128 = mul i32 %71, 48
>  %129 = add i32 %128, 116
>  %130 = call float @llvm.SI.load.const(<16 x i8> %124, i32 %129)
>  %131 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %132 = load <16 x i8>, <16 x i8> addrspace(2)* %131, align 16, !invariant.load !0
>  %133 = mul i32 %71, 48
>  %134 = add i32 %133, 120
>  %135 = call float @llvm.SI.load.const(<16 x i8> %132, i32 %134)
>  %136 = mul i32 %71, 48
>  %137 = add i32 %136, 124
>  %138 = call float @llvm.SI.load.const(<16 x i8> %132, i32 %137)
>  %139 = fsub float %138, %91
>  br i1 %122, label %else29, label %if16
>
>if16:                                             ; preds = %else14
>  %140 = mul i32 %71, 3
>  %141 = add i32 %140, 1
>  %142 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %143 = load <16 x i8>, <16 x i8> addrspace(2)* %142, align 16, !invariant.load !0
>  %144 = shl i32 %141, 4
>  %145 = add i32 %144, 112
>  %146 = call float @llvm.SI.load.const(<16 x i8> %143, i32 %145)
>  %147 = shl i32 %141, 4
>  %148 = add i32 %147, 116
>  %149 = call float @llvm.SI.load.const(<16 x i8> %143, i32 %148)
>  %150 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %151 = load <16 x i8>, <16 x i8> addrspace(2)* %150, align 16, !invariant.load !0
>  %152 = shl i32 %141, 4
>  %153 = add i32 %152, 120
>  %154 = call float @llvm.SI.load.const(<16 x i8> %151, i32 %153)
>  %155 = shl i32 %141, 4
>  %156 = add i32 %155, 124
>  %157 = call float @llvm.SI.load.const(<16 x i8> %151, i32 %156)
>  %158 = fsub float %157, %92
>  %159 = mul i32 %71, 3
>  %160 = add i32 %159, 2
>  %161 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %162 = load <16 x i8>, <16 x i8> addrspace(2)* %161, align 16, !invariant.load !0
>  %163 = shl i32 %160, 4
>  %164 = add i32 %163, 112
>  %165 = call float @llvm.SI.load.const(<16 x i8> %162, i32 %164)
>  %166 = shl i32 %160, 4
>  %167 = add i32 %166, 116
>  %168 = call float @llvm.SI.load.const(<16 x i8> %162, i32 %167)
>  %169 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %170 = load <16 x i8>, <16 x i8> addrspace(2)* %169, align 16, !invariant.load !0
>  %171 = shl i32 %160, 4
>  %172 = add i32 %171, 120
>  %173 = call float @llvm.SI.load.const(<16 x i8> %170, i32 %172)
>  %174 = shl i32 %160, 4
>  %175 = add i32 %174, 124
>  %176 = call float @llvm.SI.load.const(<16 x i8> %170, i32 %175)
>  %177 = fsub float %176, %93
>  br label %endif83
>
>else29:                                           ; preds = %else14
>  %178 = fmul float %127, %45
>  %179 = fmul float %130, %45
>  %180 = fmul float %135, %45
>  %181 = fmul float %139, %45
>  %182 = mul i32 %71, 3
>  %183 = add i32 %182, 1
>  %184 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %185 = load <16 x i8>, <16 x i8> addrspace(2)* %184, align 16, !invariant.load !0
>  %186 = shl i32 %183, 4
>  %187 = add i32 %186, 112
>  %188 = call float @llvm.SI.load.const(<16 x i8> %185, i32 %187)
>  %189 = shl i32 %183, 4
>  %190 = add i32 %189, 116
>  %191 = call float @llvm.SI.load.const(<16 x i8> %185, i32 %190)
>  %192 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %193 = load <16 x i8>, <16 x i8> addrspace(2)* %192, align 16, !invariant.load !0
>  %194 = shl i32 %183, 4
>  %195 = add i32 %194, 120
>  %196 = call float @llvm.SI.load.const(<16 x i8> %193, i32 %195)
>  %197 = shl i32 %183, 4
>  %198 = add i32 %197, 124
>  %199 = call float @llvm.SI.load.const(<16 x i8> %193, i32 %198)
>  %200 = fsub float %199, %92
>  %201 = fmul float %188, %45
>  %202 = fmul float %191, %45
>  %203 = fmul float %196, %45
>  %204 = fmul float %200, %45
>  %205 = mul i32 %71, 3
>  %206 = add i32 %205, 2
>  %207 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %208 = load <16 x i8>, <16 x i8> addrspace(2)* %207, align 16, !invariant.load !0
>  %209 = shl i32 %206, 4
>  %210 = add i32 %209, 112
>  %211 = call float @llvm.SI.load.const(<16 x i8> %208, i32 %210)
>  %212 = shl i32 %206, 4
>  %213 = add i32 %212, 116
>  %214 = call float @llvm.SI.load.const(<16 x i8> %208, i32 %213)
>  %215 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %216 = load <16 x i8>, <16 x i8> addrspace(2)* %215, align 16, !invariant.load !0
>  %217 = shl i32 %206, 4
>  %218 = add i32 %217, 120
>  %219 = call float @llvm.SI.load.const(<16 x i8> %216, i32 %218)
>  %220 = shl i32 %206, 4
>  %221 = add i32 %220, 124
>  %222 = call float @llvm.SI.load.const(<16 x i8> %216, i32 %221)
>  %223 = fsub float %222, %93
>  %224 = fmul float %211, %45
>  %225 = fmul float %214, %45
>  %226 = fmul float %219, %45
>  %227 = fmul float %223, %45
>  %228 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %229 = load <16 x i8>, <16 x i8> addrspace(2)* %228, align 16, !invariant.load !0
>  %230 = mul i32 %72, 48
>  %231 = add i32 %230, 112
>  %232 = call float @llvm.SI.load.const(<16 x i8> %229, i32 %231)
>  %233 = mul i32 %72, 48
>  %234 = add i32 %233, 116
>  %235 = call float @llvm.SI.load.const(<16 x i8> %229, i32 %234)
>  %236 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %237 = load <16 x i8>, <16 x i8> addrspace(2)* %236, align 16, !invariant.load !0
>  %238 = mul i32 %72, 48
>  %239 = add i32 %238, 120
>  %240 = call float @llvm.SI.load.const(<16 x i8> %237, i32 %239)
>  %241 = mul i32 %72, 48
>  %242 = add i32 %241, 124
>  %243 = call float @llvm.SI.load.const(<16 x i8> %237, i32 %242)
>  %244 = fsub float %243, %91
>  %245 = fmul float %232, %46
>  %246 = fadd float %245, %178
>  %247 = fmul float %235, %46
>  %248 = fadd float %247, %179
>  %249 = fmul float %240, %46
>  %250 = fadd float %249, %180
>  %251 = fmul float %244, %46
>  %252 = fadd float %251, %181
>  %253 = mul i32 %72, 3
>  %254 = add i32 %253, 1
>  %255 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %256 = load <16 x i8>, <16 x i8> addrspace(2)* %255, align 16, !invariant.load !0
>  %257 = shl i32 %254, 4
>  %258 = add i32 %257, 112
>  %259 = call float @llvm.SI.load.const(<16 x i8> %256, i32 %258)
>  %260 = shl i32 %254, 4
>  %261 = add i32 %260, 116
>  %262 = call float @llvm.SI.load.const(<16 x i8> %256, i32 %261)
>  %263 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %264 = load <16 x i8>, <16 x i8> addrspace(2)* %263, align 16, !invariant.load !0
>  %265 = shl i32 %254, 4
>  %266 = add i32 %265, 120
>  %267 = call float @llvm.SI.load.const(<16 x i8> %264, i32 %266)
>  %268 = shl i32 %254, 4
>  %269 = add i32 %268, 124
>  %270 = call float @llvm.SI.load.const(<16 x i8> %264, i32 %269)
>  %271 = fsub float %270, %92
>  %272 = fmul float %259, %46
>  %273 = fadd float %272, %201
>  %274 = fmul float %262, %46
>  %275 = fadd float %274, %202
>  %276 = fmul float %267, %46
>  %277 = fadd float %276, %203
>  %278 = fmul float %271, %46
>  %279 = fadd float %278, %204
>  %280 = mul i32 %72, 3
>  %281 = add i32 %280, 2
>  %282 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %283 = load <16 x i8>, <16 x i8> addrspace(2)* %282, align 16, !invariant.load !0
>  %284 = shl i32 %281, 4
>  %285 = add i32 %284, 112
>  %286 = call float @llvm.SI.load.const(<16 x i8> %283, i32 %285)
>  %287 = shl i32 %281, 4
>  %288 = add i32 %287, 116
>  %289 = call float @llvm.SI.load.const(<16 x i8> %283, i32 %288)
>  %290 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %291 = load <16 x i8>, <16 x i8> addrspace(2)* %290, align 16, !invariant.load !0
>  %292 = shl i32 %281, 4
>  %293 = add i32 %292, 120
>  %294 = call float @llvm.SI.load.const(<16 x i8> %291, i32 %293)
>  %295 = shl i32 %281, 4
>  %296 = add i32 %295, 124
>  %297 = call float @llvm.SI.load.const(<16 x i8> %291, i32 %296)
>  %298 = fsub float %297, %93
>  %299 = fmul float %286, %46
>  %300 = fadd float %299, %224
>  %301 = fmul float %289, %46
>  %302 = fadd float %301, %225
>  %303 = fmul float %294, %46
>  %304 = fadd float %303, %226
>  %305 = fmul float %298, %46
>  %306 = fadd float %305, %227
>  %307 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %308 = load <16 x i8>, <16 x i8> addrspace(2)* %307, align 16, !invariant.load !0
>  %309 = call float @llvm.SI.load.const(<16 x i8> %308, i32 3600)
>  %310 = bitcast float %309 to i32
>  %311 = icmp eq i32 %310, 0
>  br i1 %311, label %endif67, label %if54
>
>if54:                                             ; preds = %else29
>  %312 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %313 = load <16 x i8>, <16 x i8> addrspace(2)* %312, align 16, !invariant.load !0
>  %314 = mul i32 %73, 48
>  %315 = add i32 %314, 112
>  %316 = call float @llvm.SI.load.const(<16 x i8> %313, i32 %315)
>  %317 = mul i32 %73, 48
>  %318 = add i32 %317, 116
>  %319 = call float @llvm.SI.load.const(<16 x i8> %313, i32 %318)
>  %320 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %321 = load <16 x i8>, <16 x i8> addrspace(2)* %320, align 16, !invariant.load !0
>  %322 = mul i32 %73, 48
>  %323 = add i32 %322, 120
>  %324 = call float @llvm.SI.load.const(<16 x i8> %321, i32 %323)
>  %325 = mul i32 %73, 48
>  %326 = add i32 %325, 124
>  %327 = call float @llvm.SI.load.const(<16 x i8> %321, i32 %326)
>  %328 = fsub float %327, %91
>  %329 = fmul float %316, %47
>  %330 = fadd float %329, %246
>  %331 = fmul float %319, %47
>  %332 = fadd float %331, %248
>  %333 = fmul float %324, %47
>  %334 = fadd float %333, %250
>  %335 = fmul float %328, %47
>  %336 = fadd float %335, %252
>  %337 = mul i32 %73, 3
>  %338 = add i32 %337, 1
>  %339 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %340 = load <16 x i8>, <16 x i8> addrspace(2)* %339, align 16, !invariant.load !0
>  %341 = shl i32 %338, 4
>  %342 = add i32 %341, 112
>  %343 = call float @llvm.SI.load.const(<16 x i8> %340, i32 %342)
>  %344 = shl i32 %338, 4
>  %345 = add i32 %344, 116
>  %346 = call float @llvm.SI.load.const(<16 x i8> %340, i32 %345)
>  %347 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %348 = load <16 x i8>, <16 x i8> addrspace(2)* %347, align 16, !invariant.load !0
>  %349 = shl i32 %338, 4
>  %350 = add i32 %349, 120
>  %351 = call float @llvm.SI.load.const(<16 x i8> %348, i32 %350)
>  %352 = shl i32 %338, 4
>  %353 = add i32 %352, 124
>  %354 = call float @llvm.SI.load.const(<16 x i8> %348, i32 %353)
>  %355 = fsub float %354, %92
>  %356 = fmul float %343, %47
>  %357 = fadd float %356, %273
>  %358 = fmul float %346, %47
>  %359 = fadd float %358, %275
>  %360 = fmul float %351, %47
>  %361 = fadd float %360, %277
>  %362 = fmul float %355, %47
>  %363 = fadd float %362, %279
>  %364 = mul i32 %73, 3
>  %365 = add i32 %364, 2
>  %366 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %367 = load <16 x i8>, <16 x i8> addrspace(2)* %366, align 16, !invariant.load !0
>  %368 = shl i32 %365, 4
>  %369 = add i32 %368, 112
>  %370 = call float @llvm.SI.load.const(<16 x i8> %367, i32 %369)
>  %371 = shl i32 %365, 4
>  %372 = add i32 %371, 116
>  %373 = call float @llvm.SI.load.const(<16 x i8> %367, i32 %372)
>  %374 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %375 = load <16 x i8>, <16 x i8> addrspace(2)* %374, align 16, !invariant.load !0
>  %376 = shl i32 %365, 4
>  %377 = add i32 %376, 120
>  %378 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %377)
>  %379 = shl i32 %365, 4
>  %380 = add i32 %379, 124
>  %381 = call float @llvm.SI.load.const(<16 x i8> %375, i32 %380)
>  %382 = fsub float %381, %93
>  %383 = fmul float %370, %47
>  %384 = fadd float %383, %300
>  %385 = fmul float %373, %47
>  %386 = fadd float %385, %302
>  %387 = fmul float %378, %47
>  %388 = fadd float %387, %304
>  %389 = fmul float %382, %47
>  %390 = fadd float %389, %306
>  br label %endif67
>
>endif67:                                          ; preds = %else29, %if54
>  %.0101 = phi float [ %330, %if54 ], [ %246, %else29 ]
>  %.097 = phi float [ %332, %if54 ], [ %248, %else29 ]
>  %.093 = phi float [ %334, %if54 ], [ %250, %else29 ]
>  %.089 = phi float [ %336, %if54 ], [ %252, %else29 ]
>  %.085 = phi float [ %357, %if54 ], [ %273, %else29 ]
>  %.081 = phi float [ %359, %if54 ], [ %275, %else29 ]
>  %.077 = phi float [ %361, %if54 ], [ %277, %else29 ]
>  %.073 = phi float [ %363, %if54 ], [ %279, %else29 ]
>  %.069 = phi float [ %384, %if54 ], [ %300, %else29 ]
>  %.065 = phi float [ %386, %if54 ], [ %302, %else29 ]
>  %.061 = phi float [ %388, %if54 ], [ %304, %else29 ]
>  %.0 = phi float [ %390, %if54 ], [ %306, %else29 ]
>  %391 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %392 = load <16 x i8>, <16 x i8> addrspace(2)* %391, align 16, !invariant.load !0
>  %393 = call float @llvm.SI.load.const(<16 x i8> %392, i32 3616)
>  %394 = bitcast float %393 to i32
>  %395 = icmp eq i32 %394, 0
>  br i1 %395, label %endif83, label %if68
>
>if68:                                             ; preds = %endif67
>  %396 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %397 = load <16 x i8>, <16 x i8> addrspace(2)* %396, align 16, !invariant.load !0
>  %398 = mul i32 %74, 48
>  %399 = add i32 %398, 112
>  %400 = call float @llvm.SI.load.const(<16 x i8> %397, i32 %399)
>  %401 = mul i32 %74, 48
>  %402 = add i32 %401, 116
>  %403 = call float @llvm.SI.load.const(<16 x i8> %397, i32 %402)
>  %404 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %405 = load <16 x i8>, <16 x i8> addrspace(2)* %404, align 16, !invariant.load !0
>  %406 = mul i32 %74, 48
>  %407 = add i32 %406, 120
>  %408 = call float @llvm.SI.load.const(<16 x i8> %405, i32 %407)
>  %409 = mul i32 %74, 48
>  %410 = add i32 %409, 124
>  %411 = call float @llvm.SI.load.const(<16 x i8> %405, i32 %410)
>  %412 = fsub float %411, %91
>  %413 = fmul float %400, %48
>  %414 = fadd float %413, %.0101
>  %415 = fmul float %403, %48
>  %416 = fadd float %415, %.097
>  %417 = fmul float %408, %48
>  %418 = fadd float %417, %.093
>  %419 = fmul float %412, %48
>  %420 = fadd float %419, %.089
>  %421 = mul i32 %74, 3
>  %422 = add i32 %421, 1
>  %423 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %424 = load <16 x i8>, <16 x i8> addrspace(2)* %423, align 16, !invariant.load !0
>  %425 = shl i32 %422, 4
>  %426 = add i32 %425, 112
>  %427 = call float @llvm.SI.load.const(<16 x i8> %424, i32 %426)
>  %428 = shl i32 %422, 4
>  %429 = add i32 %428, 116
>  %430 = call float @llvm.SI.load.const(<16 x i8> %424, i32 %429)
>  %431 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %432 = load <16 x i8>, <16 x i8> addrspace(2)* %431, align 16, !invariant.load !0
>  %433 = shl i32 %422, 4
>  %434 = add i32 %433, 120
>  %435 = call float @llvm.SI.load.const(<16 x i8> %432, i32 %434)
>  %436 = shl i32 %422, 4
>  %437 = add i32 %436, 124
>  %438 = call float @llvm.SI.load.const(<16 x i8> %432, i32 %437)
>  %439 = fsub float %438, %92
>  %440 = fmul float %427, %48
>  %441 = fadd float %440, %.085
>  %442 = fmul float %430, %48
>  %443 = fadd float %442, %.081
>  %444 = fmul float %435, %48
>  %445 = fadd float %444, %.077
>  %446 = fmul float %439, %48
>  %447 = fadd float %446, %.073
>  %448 = mul i32 %74, 3
>  %449 = add i32 %448, 2
>  %450 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %451 = load <16 x i8>, <16 x i8> addrspace(2)* %450, align 16, !invariant.load !0
>  %452 = shl i32 %449, 4
>  %453 = add i32 %452, 112
>  %454 = call float @llvm.SI.load.const(<16 x i8> %451, i32 %453)
>  %455 = shl i32 %449, 4
>  %456 = add i32 %455, 116
>  %457 = call float @llvm.SI.load.const(<16 x i8> %451, i32 %456)
>  %458 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %459 = load <16 x i8>, <16 x i8> addrspace(2)* %458, align 16, !invariant.load !0
>  %460 = shl i32 %449, 4
>  %461 = add i32 %460, 120
>  %462 = call float @llvm.SI.load.const(<16 x i8> %459, i32 %461)
>  %463 = shl i32 %449, 4
>  %464 = add i32 %463, 124
>  %465 = call float @llvm.SI.load.const(<16 x i8> %459, i32 %464)
>  %466 = fsub float %465, %93
>  %467 = fmul float %454, %48
>  %468 = fadd float %467, %.069
>  %469 = fmul float %457, %48
>  %470 = fadd float %469, %.065
>  %471 = fmul float %462, %48
>  %472 = fadd float %471, %.061
>  %473 = fmul float %466, %48
>  %474 = fadd float %473, %.0
>  br label %endif83
>
>endif83:                                          ; preds = %endif67, %if16, %if68, %if10
>  %.3104 = phi float [ %99, %if10 ], [ %127, %if16 ], [ %414, %if68 ], [ %.0101, %endif67 ]
>  %.3100 = phi float [ %102, %if10 ], [ %130, %if16 ], [ %416, %if68 ], [ %.097, %endif67 ]
>  %.396 = phi float [ %103, %if10 ], [ %135, %if16 ], [ %418, %if68 ], [ %.093, %endif67 ]
>  %.392 = phi float [ %105, %if10 ], [ %139, %if16 ], [ %420, %if68 ], [ %.089, %endif67 ]
>  %.388 = phi float [ %106, %if10 ], [ %146, %if16 ], [ %441, %if68 ], [ %.085, %endif67 ]
>  %.384 = phi float [ %109, %if10 ], [ %149, %if16 ], [ %443, %if68 ], [ %.081, %endif67 ]
>  %.380 = phi float [ %110, %if10 ], [ %154, %if16 ], [ %445, %if68 ], [ %.077, %endif67 ]
>  %.376 = phi float [ %112, %if10 ], [ %158, %if16 ], [ %447, %if68 ], [ %.073, %endif67 ]
>  %.372 = phi float [ %113, %if10 ], [ %165, %if16 ], [ %468, %if68 ], [ %.069, %endif67 ]
>  %.368 = phi float [ %116, %if10 ], [ %168, %if16 ], [ %470, %if68 ], [ %.065, %endif67 ]
>  %.364 = phi float [ %117, %if10 ], [ %173, %if16 ], [ %472, %if68 ], [ %.061, %endif67 ]
>  %.3 = phi float [ %119, %if10 ], [ %177, %if16 ], [ %474, %if68 ], [ %.0, %endif67 ]
>  %475 = fmul float %25, %.3104
>  %476 = fmul float %26, %.3100
>  %477 = fadd float %475, %476
>  %478 = fmul float %27, %.396
>  %479 = fadd float %477, %478
>  %480 = fmul float %28, %.392
>  %481 = fadd float %479, %480
>  %482 = fmul float %25, %.388
>  %483 = fmul float %26, %.384
>  %484 = fadd float %482, %483
>  %485 = fmul float %27, %.380
>  %486 = fadd float %484, %485
>  %487 = fmul float %28, %.376
>  %488 = fadd float %486, %487
>  %489 = fmul float %25, %.372
>  %490 = fmul float %26, %.368
>  %491 = fadd float %489, %490
>  %492 = fmul float %27, %.364
>  %493 = fadd float %491, %492
>  %494 = fmul float %28, %.3
>  %495 = fadd float %493, %494
>  %496 = fmul float %25, 0.000000e+00
>  %497 = fmul float %26, 0.000000e+00
>  %498 = fadd float %496, %497
>  %499 = fmul float %27, 0.000000e+00
>  %500 = fadd float %498, %499
>  %501 = fadd float %500, %28
>  %502 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %503 = load <16 x i8>, <16 x i8> addrspace(2)* %502, align 16, !invariant.load !0
>  %504 = call float @llvm.SI.load.const(<16 x i8> %503, i32 64)
>  %505 = fadd float %481, %504
>  %506 = call float @llvm.SI.load.const(<16 x i8> %503, i32 68)
>  %507 = fadd float %488, %506
>  %508 = call float @llvm.SI.load.const(<16 x i8> %503, i32 72)
>  %509 = fadd float %495, %508
>  %510 = fmul float %76, %.3104
>  %511 = fmul float %78, %.3100
>  %512 = fadd float %511, %510
>  %513 = fmul float %80, %.396
>  %514 = fadd float %512, %513
>  %515 = fmul float %76, %.388
>  %516 = fmul float %78, %.384
>  %517 = fadd float %516, %515
>  %518 = fmul float %80, %.380
>  %519 = fadd float %517, %518
>  %520 = fmul float %76, %.372
>  %521 = fmul float %78, %.368
>  %522 = fadd float %521, %520
>  %523 = fmul float %80, %.364
>  %524 = fadd float %522, %523
>  %525 = fmul float %82, %.3104
>  %526 = fmul float %84, %.3100
>  %527 = fadd float %526, %525
>  %528 = fmul float %86, %.396
>  %529 = fadd float %527, %528
>  %530 = fmul float %82, %.388
>  %531 = fmul float %84, %.384
>  %532 = fadd float %531, %530
>  %533 = fmul float %86, %.380
>  %534 = fadd float %532, %533
>  %535 = fmul float %82, %.372
>  %536 = fmul float %84, %.368
>  %537 = fadd float %536, %535
>  %538 = fmul float %86, %.364
>  %539 = fadd float %537, %538
>  %540 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %541 = load <16 x i8>, <16 x i8> addrspace(2)* %540, align 16, !invariant.load !0
>  %542 = call float @llvm.SI.load.const(<16 x i8> %541, i32 0)
>  %543 = fmul float %542, %505
>  %544 = call float @llvm.SI.load.const(<16 x i8> %541, i32 4)
>  %545 = fmul float %544, %505
>  %546 = call float @llvm.SI.load.const(<16 x i8> %541, i32 8)
>  %547 = fmul float %546, %505
>  %548 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %549 = load <16 x i8>, <16 x i8> addrspace(2)* %548, align 16, !invariant.load !0
>  %550 = call float @llvm.SI.load.const(<16 x i8> %549, i32 12)
>  %551 = fmul float %550, %505
>  %552 = call float @llvm.SI.load.const(<16 x i8> %549, i32 16)
>  %553 = fmul float %552, %507
>  %554 = fadd float %553, %543
>  %555 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %556 = load <16 x i8>, <16 x i8> addrspace(2)* %555, align 16, !invariant.load !0
>  %557 = call float @llvm.SI.load.const(<16 x i8> %556, i32 20)
>  %558 = fmul float %557, %507
>  %559 = fadd float %558, %545
>  %560 = call float @llvm.SI.load.const(<16 x i8> %556, i32 24)
>  %561 = fmul float %560, %507
>  %562 = fadd float %561, %547
>  %563 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %564 = load <16 x i8>, <16 x i8> addrspace(2)* %563, align 16, !invariant.load !0
>  %565 = call float @llvm.SI.load.const(<16 x i8> %564, i32 28)
>  %566 = fmul float %565, %507
>  %567 = fadd float %566, %551
>  %568 = call float @llvm.SI.load.const(<16 x i8> %564, i32 32)
>  %569 = fmul float %568, %509
>  %570 = fadd float %569, %554
>  %571 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %572 = load <16 x i8>, <16 x i8> addrspace(2)* %571, align 16, !invariant.load !0
>  %573 = call float @llvm.SI.load.const(<16 x i8> %572, i32 36)
>  %574 = fmul float %573, %509
>  %575 = fadd float %574, %559
>  %576 = call float @llvm.SI.load.const(<16 x i8> %572, i32 40)
>  %577 = fmul float %576, %509
>  %578 = fadd float %577, %562
>  %579 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %580 = load <16 x i8>, <16 x i8> addrspace(2)* %579, align 16, !invariant.load !0
>  %581 = call float @llvm.SI.load.const(<16 x i8> %580, i32 44)
>  %582 = fmul float %581, %509
>  %583 = fadd float %582, %567
>  %584 = call float @llvm.SI.load.const(<16 x i8> %580, i32 48)
>  %585 = fmul float %584, %501
>  %586 = fadd float %585, %570
>  %587 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %588 = load <16 x i8>, <16 x i8> addrspace(2)* %587, align 16, !invariant.load !0
>  %589 = call float @llvm.SI.load.const(<16 x i8> %588, i32 52)
>  %590 = fmul float %589, %501
>  %591 = fadd float %590, %575
>  %592 = call float @llvm.SI.load.const(<16 x i8> %588, i32 56)
>  %593 = fmul float %592, %501
>  %594 = fadd float %593, %578
>  %595 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %596 = load <16 x i8>, <16 x i8> addrspace(2)* %595, align 16, !invariant.load !0
>  %597 = call float @llvm.SI.load.const(<16 x i8> %596, i32 60)
>  %598 = fmul float %597, %501
>  %599 = fadd float %598, %583
>  %600 = fadd float %594, 0xBF50624DE0000000
>  %601 = call float @llvm.SI.load.const(<16 x i8> %596, i32 108)
>  %602 = fmul float %599, %601
>  %603 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %604 = load <16 x i8>, <16 x i8> addrspace(2)* %603, align 16, !invariant.load !0
>  %605 = call float @llvm.SI.load.const(<16 x i8> %604, i32 84)
>  %606 = call float @llvm.SI.load.const(<16 x i8> %604, i32 80)
>  %607 = fmul float %600, %605
>  %608 = fadd float %607, %606
>  %609 = call float @llvm.AMDGPU.clamp.(float %608, float 0.000000e+00, float 1.000000e+00)
>  %610 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %611 = load <16 x i8>, <16 x i8> addrspace(2)* %610, align 16, !invariant.load !0
>  %612 = call float @llvm.SI.load.const(<16 x i8> %611, i32 88)
>  %613 = call float @llvm.pow.f32(float %609, float %612)
>  %614 = call float @llvm.SI.load.const(<16 x i8> %611, i32 92)
>  %615 = fsub float 1.000000e+00, %614
>  %616 = call float @llvm.SI.load.const(<16 x i8> %611, i32 92)
>  %617 = fmul float %616, %613
>  %618 = fadd float %617, %615
>  %619 = fmul float %524, %534
>  %620 = fmul float %514, %539
>  %621 = fmul float %519, %529
>  %622 = fmul float %519, %539
>  %623 = fsub float %622, %619
>  %624 = fmul float %524, %529
>  %625 = fsub float %624, %620
>  %626 = fmul float %514, %534
>  %627 = fsub float %626, %621
>  %628 = fmul float %623, %88
>  %629 = fmul float %625, %88
>  %630 = fmul float %627, %88
>  %631 = fmul float %618, %618
>  %632 = bitcast i32 %12 to float
>  %633 = insertvalue <{ float, float, float }> undef, float %632, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %64, float %65, float %69, float %70)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %505, float %507, float %509, float %602)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %59, float %60, float %631, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 35, i32 0, float %529, float %534, float %539, float %628)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 36, i32 0, float %629, float %630, float %514, float %519)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 37, i32 0, float %524, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %586, float %591, float %600, float %599)
>  ret <{ float, float, float }> %633
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE
>DCL IN[3], GENERIC[3], PERSPECTIVE, CENTROID
>DCL IN[4], GENERIC[4], PERSPECTIVE, CENTROID
>DCL IN[5].x, GENERIC[5], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SAMP[5]
>DCL SAMP[6]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL SVIEW[5], 2D, FLOAT
>DCL SVIEW[6], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..16]
>DCL TEMP[0..65], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    0.0039,     1.0000,     2.0000,    -1.0000}
>IMM[1] FLT32 {    1.0010,    -0.5000,     3.0000,     0.3000}
>IMM[2] FLT32 {   20.0000,     1.1000,     2.9297,     9.0000}
>IMM[3] FLT32 {    0.5000,     6.0000,     5.0000,     0.0000}
>IMM[4] FLT32 {    4.0000,     0.2500,     0.0000,     0.0010}
>IMM[5] INT32 {0, 3, 2, 1}
>IMM[6] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: MOV TEMP[0].x, IN[3].wwww
>  1: MOV TEMP[0].yz, IN[4].yxyy
>  2: MOV TEMP[1].xy, IN[4].zwzz
>  3: MOV TEMP[1].z, IN[5].xxxx
>  4: ADD TEMP[2].xyz, CONST[0].xyzz, -IN[1].xyzz
>  5: DP3 TEMP[3].x, TEMP[2].xyzz, TEMP[2].xyzz
>  6: RSQ TEMP[3].x, TEMP[3].xxxx
>  7: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[3].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz
>  9: RSQ TEMP[3].x, TEMP[3].xxxx
> 10: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx
> 11: MOV TEMP[3].xy, IN[0].zwww
> 12: TEX TEMP[3], TEMP[3], SAMP[3], 2D
> 13: MOV TEMP[4], TEMP[3]
> 14: FSLT TEMP[3].x, TEMP[3].wwww, IMM[0].xxxx
> 15: AND TEMP[3], TEMP[3].xxxx, IMM[0].yyyy
> 16: KILL_IF -TEMP[3].xxxx
> 17: MOV TEMP[3].xy, IN[0].zwww
> 18: TEX TEMP[3], TEMP[3], SAMP[5], 2D
> 19: MOV TEMP[5], TEMP[3]
> 20: MOV TEMP[5].xy, IN[2].xyyy
> 21: TEX TEMP[5], TEMP[5], SAMP[4], 2D
> 22: MOV TEMP[6], TEMP[5]
> 23: MAD TEMP[7].xy, TEMP[5].wyyy, IMM[0].zzzz, IMM[0].wwww
> 24: MOV TEMP[7].z, TEMP[5].xxxx
> 25: MOV TEMP[8].xy, TEMP[7].xyxx
> 26: DP2 TEMP[9].x, TEMP[7].xyyy, TEMP[7].xyyy
> 27: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 28: ADD TEMP[9].x, IMM[1].xxxx, -TEMP[9].xxxx
> 29: SQRT TEMP[9].x, TEMP[9].xxxx
> 30: MOV TEMP[8].z, TEMP[9].xxxx
> 31: MUL TEMP[8].xyz, IN[3].xyzz, TEMP[7].xxxx
> 32: MAD TEMP[7].xyz, TEMP[0].xyzz, TEMP[7].yyyy, TEMP[8].xyzz
> 33: MAD TEMP[7].xyz, TEMP[1].xyzz, TEMP[9].xxxx, TEMP[7].xyzz
> 34: DP3 TEMP[8].x, TEMP[7].xyzz, TEMP[2].xyzz
> 35: MUL TEMP[8].xyz, TEMP[8].xxxx, TEMP[7].xyzz
> 36: MAD TEMP[8].xyz, IMM[0].zzzz, TEMP[8].xyzz, -TEMP[2].xyzz
> 37: MOV TEMP[9].xy, IN[0].xyyy
> 38: TEX TEMP[9], TEMP[9], SAMP[6], 2D
> 39: MOV TEMP[10], TEMP[9]
> 40: ADD TEMP[10].xyz, TEMP[9].zyyy, IMM[1].yyyy
> 41: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[0].zzzz
> 42: MUL TEMP[11].x, TEMP[9].wwww, IMM[0].zzzz
> 43: MOV TEMP[10].w, TEMP[11].xxxx
> 44: DP2 TEMP[12].x, TEMP[10].xyyy, TEMP[10].xyyy
> 45: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 46: ADD TEMP[12].x, IMM[0].yyyy, -TEMP[12].xxxx
> 47: SQRT TEMP[12].x, TEMP[12].xxxx
> 48: MUL TEMP[13].xyz, IN[3].xyzz, TEMP[10].xxxx
> 49: MAD TEMP[13].xyz, TEMP[0].xyzz, TEMP[10].yyyy, TEMP[13].xyzz
> 50: MAD TEMP[12].xyz, TEMP[1].xyzz, TEMP[12].xxxx, TEMP[13].xyzz
> 51: MOV TEMP[10].xyz, TEMP[12].xyzx
> 52: DP3 TEMP[13].x, TEMP[8].xyzz, TEMP[12].xyzz
> 53: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 54: ADD TEMP[13].x, TEMP[11].xxxx, -TEMP[13].xxxx
> 55: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 56: POW TEMP[13].x, TEMP[13].xxxx, IMM[1].zzzz
> 57: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 58: MUL TEMP[14].x, IMM[1].wwww, TEMP[3].wwww
> 59: ADD TEMP[14].x, TEMP[13].xxxx, -TEMP[14].xxxx
> 60: LRP TEMP[15].x, TEMP[3].wwww, IMM[2].xxxx, IMM[0].yyyy
> 61: MUL TEMP[14].x, TEMP[14].xxxx, TEMP[15].xxxx
> 62: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 63: MUL TEMP[13].x, TEMP[13].xxxx, TEMP[14].xxxx
> 64: MUL TEMP[11].x, TEMP[11].xxxx, IMM[2].yyyy
> 65: MOV TEMP[10].w, TEMP[11].xxxx
> 66: MUL TEMP[0].x, TEMP[9].xxxx, TEMP[5].xxxx
> 67: DP3 TEMP[8].x, -TEMP[8].xyzz, TEMP[1].xyzz
> 68: ADD TEMP[8].x, TEMP[8].xxxx, IMM[0].yyyy
> 69: DP3 TEMP[9].x, TEMP[2].xyzz, TEMP[1].xyzz
> 70: ADD TEMP[9].x, IMM[0].yyyy, -TEMP[9].xxxx
> 71: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 72: ADD TEMP[8].x, TEMP[8].xxxx, -TEMP[9].xxxx
> 73: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 74: ADD TEMP[8].x, IMM[0].yyyy, -TEMP[8].xxxx
> 75: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[8].xxxx
> 76: MUL TEMP[8].x, TEMP[13].xxxx, TEMP[8].xxxx
> 77: MOV TEMP[0].y, TEMP[8].xxxx
> 78: MOV TEMP[9].w, IMM[0].yyyy
> 79: MAD TEMP[9].xyz, IMM[2].zzzz, TEMP[1].xyzz, IN[1].xyzz
> 80: MUL TEMP[1], CONST[4], TEMP[9].xxxx
> 81: MAD TEMP[1], CONST[5], TEMP[9].yyyy, TEMP[1]
> 82: MAD TEMP[1], CONST[6], TEMP[9].zzzz, TEMP[1]
> 83: ADD TEMP[1], TEMP[1], CONST[7]
> 84: MAD TEMP[9].x, IMM[2].wwww, TEMP[3].wwww, IMM[0].zzzz
> 85: EX2 TEMP[9].x, TEMP[9].xxxx
> 86: MOV TEMP[13].xyz, -CONST[1].xyzx
> 87: ADD TEMP[14].xyz, TEMP[13].xyzz, TEMP[2].xyzz
> 88: MUL TEMP[14].xyz, TEMP[14].xyzz, IMM[3].xxxx
> 89: DP3 TEMP[15].x, TEMP[14].xyzz, TEMP[14].xyzz
> 90: RSQ TEMP[15].x, TEMP[15].xxxx
> 91: MUL TEMP[14].xyz, TEMP[14].xyzz, TEMP[15].xxxx
> 92: DP3 TEMP[15].x, TEMP[13].xyzz, TEMP[7].xyzz
> 93: MOV_SAT TEMP[15].x, TEMP[15].xxxx
> 94: MOV TEMP[16].xy, TEMP[1].xyyy
> 95: MOV TEMP[16].w, IMM[0].yyyy
> 96: MOV TEMP[16].z, TEMP[1].zzzz
> 97: TXP TEMP[1], TEMP[16], SAMP[0], SHADOW2D
> 98: MOV TEMP[16].x, TEMP[1].xxxx
> 99: DP3 TEMP[16].x, TEMP[13].xyzz, TEMP[12].xyzz
>100: MOV_SAT TEMP[16].x, TEMP[16].xxxx
>101: ADD TEMP[11].x, TEMP[11].xxxx, -TEMP[16].xxxx
>102: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>103: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[1].xxxx
>104: MUL TEMP[1].xyz, CONST[3].xyzz, TEMP[1].xxxx
>105: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[11].xxxx
>106: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>107: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[11].xxxx
>108: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[5].xxxx
>109: MUL TEMP[1].xyz, TEMP[15].xxxx, TEMP[1].xyzz
>110: MOV TEMP[5].xyz, TEMP[7].xyzz
>111: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
>112: MOV TEMP[11], TEMP[5]
>113: DP3 TEMP[11].x, TEMP[7].xyzz, TEMP[2].xyzz
>114: MUL TEMP[11].xyz, TEMP[11].xxxx, TEMP[7].xyzz
>115: MAD TEMP[11].xyz, IMM[0].zzzz, TEMP[11].xyzz, -TEMP[2].xyzz
>116: ADD TEMP[16].x, IMM[0].yyyy, -TEMP[3].wwww
>117: MUL TEMP[16].x, TEMP[16].xxxx, IMM[3].yyyy
>118: MOV TEMP[11].w, TEMP[16].xxxx
>119: DP3 TEMP[17].x, TEMP[2].xyzz, TEMP[7].xyzz
>120: MOV_SAT TEMP[17].x, TEMP[17].xxxx
>121: ADD TEMP[17].x, IMM[0].yyyy, -TEMP[17].xxxx
>122: POW TEMP[17].x, TEMP[17].xxxx, IMM[3].zzzz
>123: MAX TEMP[3].xyz, TEMP[3].wwww, IMM[3].wwww
>124: MUL TEMP[3].xyz, TEMP[17].xxxx, TEMP[3].xyzz
>125: MOV TEMP[11].xyz, TEMP[11].xyzz
>126: MOV TEMP[11].w, TEMP[16].xxxx
>127: TXL TEMP[11], TEMP[11], SAMP[2], CUBE
>128: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[11].xyzz
>129: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
>130: MUL TEMP[11].x, IMM[4].xxxx, TEMP[0].xxxx
>131: MAD TEMP[5].xyz, TEMP[5].xyzz, TEMP[11].xxxx, TEMP[1].xyzz
>132: DP3 TEMP[11].x, TEMP[13].xyzz, TEMP[14].xyzz
>133: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>134: ADD TEMP[11].x, IMM[0].yyyy, -TEMP[11].xxxx
>135: POW TEMP[11].x, TEMP[11].xxxx, IMM[3].zzzz
>136: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[11].xxxx
>137: ADD TEMP[11].x, TEMP[9].xxxx, IMM[0].zzzz
>138: MUL TEMP[11].x, TEMP[11].xxxx, IMM[4].yyyy
>139: MUL TEMP[13].x, -TEMP[9].xxxx, IMM[3].xxxx
>140: EX2 TEMP[13].x, TEMP[13].xxxx
>141: ADD TEMP[13].x, IMM[0].zzzz, -TEMP[13].xxxx
>142: RCP TEMP[13].x, TEMP[13].xxxx
>143: MUL TEMP[11].x, TEMP[11].xxxx, TEMP[13].xxxx
>144: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[11].xxxx
>145: DP3 TEMP[11].x, TEMP[7].xyzz, TEMP[14].xyzz
>146: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>147: POW TEMP[11].x, TEMP[11].xxxx, TEMP[9].xxxx
>148: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[11].xxxx
>149: DP3 TEMP[11].x, TEMP[2].xyzz, TEMP[7].xyzz
>150: MOV_SAT TEMP[11].x, TEMP[11].xxxx
>151: MAX TEMP[11].x, TEMP[15].xxxx, TEMP[11].xxxx
>152: ADD TEMP[11].x, TEMP[11].xxxx, IMM[4].zzzz
>153: RCP TEMP[11].x, TEMP[11].xxxx
>154: MAD TEMP[1].xyz, TEMP[1].xyzz, TEMP[11].xxxx, TEMP[3].xyzz
>155: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[8].xxxx
>156: MOV TEMP[8].x, IMM[5].xxxx
>157: BGNLOOP :0
>158:   ISGE TEMP[11].x, TEMP[8].xxxx, IMM[5].yyyy
>159:   UIF TEMP[11].xxxx :0
>160:     BRK
>161:   ENDIF
>162:   UMUL TEMP[13].x, TEMP[8].xxxx, IMM[5].zzzz
>163:   UARL ADDR[0].x, TEMP[13].xxxx
>164:   UARL ADDR[0].x, TEMP[13].xxxx
>165:   ADD TEMP[14].xyz, CONST[ADDR[0].x+11].xyzz, -IN[1].xyzz
>166:   DP3 TEMP[15].x, TEMP[14].xyzz, TEMP[14].xyzz
>167:   RSQ TEMP[16].x, TEMP[15].xxxx
>168:   MUL TEMP[17].xyz, TEMP[14].xyzz, TEMP[16].xxxx
>169:   ADD TEMP[18].xyz, TEMP[17].xyzz, TEMP[2].xyzz
>170:   MUL TEMP[19].xyz, TEMP[18].xyzz, IMM[3].xxxx
>171:   DP3 TEMP[20].x, TEMP[19].xyzz, TEMP[19].xyzz
>172:   RSQ TEMP[21].x, TEMP[20].xxxx
>173:   MUL TEMP[22].xyz, TEMP[19].xyzz, TEMP[21].xxxx
>174:   DP3 TEMP[23].x, TEMP[17].xyzz, TEMP[7].xyzz
>175:   MOV_SAT TEMP[24].x, TEMP[23].xxxx
>176:   DP3 TEMP[25].x, TEMP[17].xyzz, TEMP[12].xyzz
>177:   MOV_SAT TEMP[26].x, TEMP[25].xxxx
>178:   ADD TEMP[27].x, TEMP[10].wwww, -TEMP[26].xxxx
>179:   MOV_SAT TEMP[28].x, TEMP[27].xxxx
>180:   MUL TEMP[29].x, TEMP[28].xxxx, TEMP[28].xxxx
>181:   UMAD TEMP[30].x, TEMP[8].xxxx, IMM[5].zzzz, IMM[5].wwww
>182:   MUL TEMP[31].x, TEMP[15].xxxx, TEMP[16].xxxx
>183:   UMUL TEMP[32].x, TEMP[8].xxxx, IMM[5].zzzz
>184:   UARL ADDR[0].x, TEMP[32].xxxx
>185:   MUL TEMP[33].x, TEMP[31].xxxx, CONST[ADDR[0].x+11].wwww
>186:   MOV_SAT TEMP[34].x, TEMP[33].xxxx
>187:   ADD TEMP[35].x, IMM[0].yyyy, -TEMP[34].xxxx
>188:   UARL ADDR[0].x, TEMP[30].xxxx
>189:   MUL TEMP[36].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[35].xxxx
>190:   MUL TEMP[37].x, TEMP[29].xxxx, TEMP[29].xxxx
>191:   MOV_SAT TEMP[38].x, TEMP[37].xxxx
>192:   LRP TEMP[39].x, TEMP[16].xxxx, IMM[0].yyyy, TEMP[38].xxxx
>193:   MUL TEMP[40].xyz, TEMP[36].xyzz, TEMP[39].xxxx
>194:   MUL TEMP[41].xyz, TEMP[40].xyzz, TEMP[6].xxxx
>195:   MUL TEMP[42].xyz, TEMP[24].xxxx, TEMP[41].xyzz
>196:   ADD TEMP[5].xyz, TEMP[5].xyzz, TEMP[42].xyzz
>197:   DP3 TEMP[43].x, TEMP[17].xyzz, TEMP[22].xyzz
>198:   MOV_SAT TEMP[44].x, TEMP[43].xxxx
>199:   ADD TEMP[45].x, IMM[0].yyyy, -TEMP[44].xxxx
>200:   POW TEMP[46].x, TEMP[45].xxxx, IMM[3].zzzz
>201:   MUL TEMP[47].xyz, TEMP[42].xyzz, TEMP[46].xxxx
>202:   ADD TEMP[48].x, TEMP[9].xxxx, IMM[0].zzzz
>203:   MUL TEMP[49].x, TEMP[48].xxxx, IMM[4].yyyy
>204:   MUL TEMP[50].x, -TEMP[9].xxxx, IMM[3].xxxx
>205:   EX2 TEMP[51].x, TEMP[50].xxxx
>206:   ADD TEMP[52].x, IMM[0].zzzz, -TEMP[51].xxxx
>207:   RCP TEMP[53].x, TEMP[52].xxxx
>208:   MUL TEMP[54].x, TEMP[49].xxxx, TEMP[53].xxxx
>209:   MUL TEMP[55].xyz, TEMP[47].xyzz, TEMP[54].xxxx
>210:   DP3 TEMP[56].x, TEMP[7].xyzz, TEMP[22].xyzz
>211:   MOV_SAT TEMP[57].x, TEMP[56].xxxx
>212:   POW TEMP[58].x, TEMP[57].xxxx, TEMP[9].xxxx
>213:   MUL TEMP[59].xyz, TEMP[55].xyzz, TEMP[58].xxxx
>214:   DP3 TEMP[60].x, TEMP[2].xyzz, TEMP[7].xyzz
>215:   MOV_SAT TEMP[61].x, TEMP[60].xxxx
>216:   MAX TEMP[62].x, TEMP[24].xxxx, TEMP[61].xxxx
>217:   ADD TEMP[63].x, TEMP[62].xxxx, IMM[4].zzzz
>218:   RCP TEMP[64].x, TEMP[63].xxxx
>219:   MUL TEMP[65].xyz, TEMP[59].xyzz, TEMP[64].xxxx
>220:   MAD TEMP[1].xyz, TEMP[65].xyzz, TEMP[0].yyyy, TEMP[1].xyzz
>221:   UADD TEMP[8].x, TEMP[8].xxxx, IMM[5].wwww
>222: ENDLOOP :0
>223: MUL TEMP[0].xyz, TEMP[3].xyzz, TEMP[0].yyyy
>224: MAD TEMP[0].xyz, TEMP[5].xyzz, TEMP[4].xyzz, TEMP[0].xyzz
>225: ADD TEMP[1].x, IN[1].yyyy, -CONST[0].wwww
>226: MAX TEMP[1].x, TEMP[1].xxxx, IMM[3].wwww
>227: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>228: ADD TEMP[2].x, TEMP[2].xxxx, IMM[4].wwww
>229: RCP TEMP[2].x, TEMP[2].xxxx
>230: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>231: FRC TEMP[2].x, CONST[1].wwww
>232: MUL TEMP[2].x, TEMP[2].xxxx, IMM[6].xxxx
>233: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>234: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>235: MUL TEMP[1].x, IN[2].zzzz, TEMP[1].xxxx
>236: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>237: MOV TEMP[0].w, TEMP[4].wwww
>238: MOV OUT[0], TEMP[0]
>239: END
>radeonsi: Compiling shader 133
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 3, i32 3, i32 %6, <2 x i32> %9)
>  %24 = call float @llvm.SI.fs.interp(i32 0, i32 4, i32 %6, <2 x i32> %9)
>  %25 = call float @llvm.SI.fs.interp(i32 1, i32 4, i32 %6, <2 x i32> %9)
>  %26 = call float @llvm.SI.fs.interp(i32 2, i32 4, i32 %6, <2 x i32> %9)
>  %27 = call float @llvm.SI.fs.interp(i32 3, i32 4, i32 %6, <2 x i32> %9)
>  %28 = call float @llvm.SI.fs.interp(i32 0, i32 5, i32 %6, <2 x i32> %9)
>  %29 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %30 = load <16 x i8>, <16 x i8> addrspace(2)* %29, align 16, !invariant.load !0
>  %31 = call float @llvm.SI.load.const(<16 x i8> %30, i32 0)
>  %32 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %33 = fsub float %31, %32
>  %34 = call float @llvm.SI.load.const(<16 x i8> %30, i32 4)
>  %35 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %36 = fsub float %34, %35
>  %37 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %38 = load <16 x i8>, <16 x i8> addrspace(2)* %37, align 16, !invariant.load !0
>  %39 = call float @llvm.SI.load.const(<16 x i8> %38, i32 8)
>  %40 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %41 = fsub float %39, %40
>  %42 = fmul float %33, %33
>  %43 = fmul float %36, %36
>  %44 = fadd float %43, %42
>  %45 = fmul float %41, %41
>  %46 = fadd float %44, %45
>  %47 = call float @llvm.sqrt.f32(float %46)
>  %48 = fdiv float 1.000000e+00, %47, !fpmath !1
>  %49 = fmul float %33, %48
>  %50 = fmul float %36, %48
>  %51 = fmul float %41, %48
>  %52 = fmul float %26, %26
>  %53 = fmul float %27, %27
>  %54 = fadd float %53, %52
>  %55 = fmul float %28, %28
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = fmul float %26, %58
>  %60 = fmul float %27, %58
>  %61 = fmul float %28, %58
>  %62 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %63 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %64 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %65 = load <8 x i32>, <8 x i32> addrspace(2)* %64, align 32, !invariant.load !0
>  %66 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %67 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %66, i64 0, i64 15, !amdgpu.uniform !0
>  %68 = load <4 x i32>, <4 x i32> addrspace(2)* %67, align 16, !invariant.load !0
>  %69 = extractelement <8 x i32> %65, i32 7
>  %70 = extractelement <4 x i32> %68, i32 0
>  %71 = and i32 %70, %69
>  %72 = insertelement <4 x i32> %68, i32 %71, i32 0
>  %73 = bitcast float %62 to i32
>  %74 = bitcast float %63 to i32
>  %75 = insertelement <2 x i32> undef, i32 %73, i32 0
>  %76 = insertelement <2 x i32> %75, i32 %74, i32 1
>  %77 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %76, <8 x i32> %65, <4 x i32> %72, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %78 = extractelement <4 x float> %77, i32 0
>  %79 = extractelement <4 x float> %77, i32 1
>  %80 = extractelement <4 x float> %77, i32 2
>  %81 = extractelement <4 x float> %77, i32 3
>  %82 = fcmp olt float %81, 0x3F70101060000000
>  %83 = select i1 %82, float -1.000000e+00, float 0.000000e+00
>  call void @llvm.AMDGPU.kill(float %83)
>  %84 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %85 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %86 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 10, !amdgpu.uniform !0
>  %87 = load <8 x i32>, <8 x i32> addrspace(2)* %86, align 32, !invariant.load !0
>  %88 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %89 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %88, i64 0, i64 23, !amdgpu.uniform !0
>  %90 = load <4 x i32>, <4 x i32> addrspace(2)* %89, align 16, !invariant.load !0
>  %91 = extractelement <8 x i32> %87, i32 7
>  %92 = extractelement <4 x i32> %90, i32 0
>  %93 = and i32 %92, %91
>  %94 = insertelement <4 x i32> %90, i32 %93, i32 0
>  %95 = bitcast float %84 to i32
>  %96 = bitcast float %85 to i32
>  %97 = insertelement <2 x i32> undef, i32 %95, i32 0
>  %98 = insertelement <2 x i32> %97, i32 %96, i32 1
>  %99 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %98, <8 x i32> %87, <4 x i32> %94, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %100 = extractelement <4 x float> %99, i32 3
>  %101 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %102 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %8)
>  %103 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %104 = load <8 x i32>, <8 x i32> addrspace(2)* %103, align 32, !invariant.load !0
>  %105 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %106 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %105, i64 0, i64 19, !amdgpu.uniform !0
>  %107 = load <4 x i32>, <4 x i32> addrspace(2)* %106, align 16, !invariant.load !0
>  %108 = extractelement <8 x i32> %104, i32 7
>  %109 = extractelement <4 x i32> %107, i32 0
>  %110 = and i32 %109, %108
>  %111 = insertelement <4 x i32> %107, i32 %110, i32 0
>  %112 = bitcast float %101 to i32
>  %113 = bitcast float %102 to i32
>  %114 = insertelement <2 x i32> undef, i32 %112, i32 0
>  %115 = insertelement <2 x i32> %114, i32 %113, i32 1
>  %116 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %115, <8 x i32> %104, <4 x i32> %111, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %117 = extractelement <4 x float> %116, i32 0
>  %118 = extractelement <4 x float> %116, i32 1
>  %119 = extractelement <4 x float> %116, i32 3
>  %120 = fmul float %119, 2.000000e+00
>  %121 = fadd float %120, -1.000000e+00
>  %122 = fmul float %118, 2.000000e+00
>  %123 = fadd float %122, -1.000000e+00
>  %124 = fmul float %121, %121
>  %125 = fmul float %123, %123
>  %126 = fadd float %124, %125
>  %127 = call float @llvm.AMDGPU.clamp.(float %126, float 0.000000e+00, float 1.000000e+00)
>  %128 = fsub float 0x3FF00418A0000000, %127
>  %129 = call float @llvm.sqrt.f32(float %128)
>  %130 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %131 = fmul float %130, %121
>  %132 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %133 = fmul float %132, %121
>  %134 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %135 = fmul float %134, %121
>  %136 = fmul float %23, %123
>  %137 = fadd float %136, %131
>  %138 = fmul float %24, %123
>  %139 = fadd float %138, %133
>  %140 = fmul float %25, %123
>  %141 = fadd float %140, %135
>  %142 = fmul float %59, %129
>  %143 = fadd float %142, %137
>  %144 = fmul float %60, %129
>  %145 = fadd float %144, %139
>  %146 = fmul float %61, %129
>  %147 = fadd float %146, %141
>  %148 = fmul float %143, %49
>  %149 = fmul float %145, %50
>  %150 = fadd float %149, %148
>  %151 = fmul float %147, %51
>  %152 = fadd float %150, %151
>  %153 = fmul float %152, %143
>  %154 = fmul float %152, %145
>  %155 = fmul float %152, %147
>  %156 = fmul float %153, 2.000000e+00
>  %157 = fsub float %156, %49
>  %158 = fmul float %154, 2.000000e+00
>  %159 = fsub float %158, %50
>  %160 = fmul float %155, 2.000000e+00
>  %161 = fsub float %160, %51
>  %162 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %163 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %164 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 12, !amdgpu.uniform !0
>  %165 = load <8 x i32>, <8 x i32> addrspace(2)* %164, align 32, !invariant.load !0
>  %166 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %167 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %166, i64 0, i64 27, !amdgpu.uniform !0
>  %168 = load <4 x i32>, <4 x i32> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = extractelement <8 x i32> %165, i32 7
>  %170 = extractelement <4 x i32> %168, i32 0
>  %171 = and i32 %170, %169
>  %172 = insertelement <4 x i32> %168, i32 %171, i32 0
>  %173 = bitcast float %162 to i32
>  %174 = bitcast float %163 to i32
>  %175 = insertelement <2 x i32> undef, i32 %173, i32 0
>  %176 = insertelement <2 x i32> %175, i32 %174, i32 1
>  %177 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %176, <8 x i32> %165, <4 x i32> %172, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %178 = extractelement <4 x float> %177, i32 0
>  %179 = extractelement <4 x float> %177, i32 1
>  %180 = extractelement <4 x float> %177, i32 2
>  %181 = extractelement <4 x float> %177, i32 3
>  %182 = fadd float %180, -5.000000e-01
>  %183 = fadd float %179, -5.000000e-01
>  %184 = fmul float %182, 2.000000e+00
>  %185 = fmul float %183, 2.000000e+00
>  %186 = fmul float %181, 2.000000e+00
>  %187 = fmul float %184, %184
>  %188 = fmul float %185, %185
>  %189 = fadd float %187, %188
>  %190 = call float @llvm.AMDGPU.clamp.(float %189, float 0.000000e+00, float 1.000000e+00)
>  %191 = fsub float 1.000000e+00, %190
>  %192 = call float @llvm.sqrt.f32(float %191)
>  %193 = call float @llvm.SI.fs.interp(i32 0, i32 3, i32 %6, <2 x i32> %9)
>  %194 = fmul float %193, %184
>  %195 = call float @llvm.SI.fs.interp(i32 1, i32 3, i32 %6, <2 x i32> %9)
>  %196 = fmul float %195, %184
>  %197 = call float @llvm.SI.fs.interp(i32 2, i32 3, i32 %6, <2 x i32> %9)
>  %198 = fmul float %197, %184
>  %199 = fmul float %23, %185
>  %200 = fadd float %199, %194
>  %201 = fmul float %24, %185
>  %202 = fadd float %201, %196
>  %203 = fmul float %25, %185
>  %204 = fadd float %203, %198
>  %205 = fmul float %59, %192
>  %206 = fadd float %205, %200
>  %207 = fmul float %60, %192
>  %208 = fadd float %207, %202
>  %209 = fmul float %61, %192
>  %210 = fadd float %209, %204
>  %211 = fmul float %157, %206
>  %212 = fmul float %159, %208
>  %213 = fadd float %212, %211
>  %214 = fmul float %161, %210
>  %215 = fadd float %213, %214
>  %216 = call float @llvm.AMDGPU.clamp.(float %215, float 0.000000e+00, float 1.000000e+00)
>  %217 = fsub float %186, %216
>  %218 = call float @llvm.AMDGPU.clamp.(float %217, float 0.000000e+00, float 1.000000e+00)
>  %219 = call float @llvm.pow.f32(float %218, float 3.000000e+00)
>  %220 = call float @llvm.AMDGPU.clamp.(float %219, float 0.000000e+00, float 1.000000e+00)
>  %221 = fmul float %100, 0x3FD3333340000000
>  %222 = fsub float %220, %221
>  %223 = fsub float 1.000000e+00, %100
>  %224 = fmul float %100, 2.000000e+01
>  %225 = fadd float %224, %223
>  %226 = fmul float %222, %225
>  %227 = call float @llvm.AMDGPU.clamp.(float %226, float 0.000000e+00, float 1.000000e+00)
>  %228 = fmul float %220, %227
>  %229 = fmul float %186, 0x3FF19999A0000000
>  %230 = fmul float %178, %117
>  %231 = fmul float %157, %59
>  %232 = fsub float -0.000000e+00, %231
>  %233 = fmul float %159, %60
>  %234 = fsub float %232, %233
>  %235 = fmul float %161, %61
>  %236 = fsub float %234, %235
>  %237 = fadd float %236, 1.000000e+00
>  %238 = fmul float %49, %59
>  %239 = fmul float %50, %60
>  %240 = fadd float %239, %238
>  %241 = fmul float %51, %61
>  %242 = fadd float %240, %241
>  %243 = fsub float 1.000000e+00, %242
>  %244 = call float @llvm.AMDGPU.clamp.(float %243, float 0.000000e+00, float 1.000000e+00)
>  %245 = fsub float %237, %244
>  %246 = call float @llvm.AMDGPU.clamp.(float %245, float 0.000000e+00, float 1.000000e+00)
>  %247 = fsub float 1.000000e+00, %246
>  %248 = fmul float %247, %247
>  %249 = fmul float %228, %248
>  %250 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %251 = fmul float %59, 0x4007700140000000
>  %252 = fadd float %251, %250
>  %253 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %254 = fmul float %60, 0x4007700140000000
>  %255 = fadd float %254, %253
>  %256 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %257 = fmul float %61, 0x4007700140000000
>  %258 = fadd float %257, %256
>  %259 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %260 = load <16 x i8>, <16 x i8> addrspace(2)* %259, align 16, !invariant.load !0
>  %261 = call float @llvm.SI.load.const(<16 x i8> %260, i32 64)
>  %262 = fmul float %261, %252
>  %263 = call float @llvm.SI.load.const(<16 x i8> %260, i32 68)
>  %264 = fmul float %263, %252
>  %265 = call float @llvm.SI.load.const(<16 x i8> %260, i32 72)
>  %266 = fmul float %265, %252
>  %267 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %268 = load <16 x i8>, <16 x i8> addrspace(2)* %267, align 16, !invariant.load !0
>  %269 = call float @llvm.SI.load.const(<16 x i8> %268, i32 80)
>  %270 = fmul float %269, %255
>  %271 = fadd float %270, %262
>  %272 = call float @llvm.SI.load.const(<16 x i8> %268, i32 84)
>  %273 = fmul float %272, %255
>  %274 = fadd float %273, %264
>  %275 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %276 = load <16 x i8>, <16 x i8> addrspace(2)* %275, align 16, !invariant.load !0
>  %277 = call float @llvm.SI.load.const(<16 x i8> %276, i32 88)
>  %278 = fmul float %277, %255
>  %279 = fadd float %278, %266
>  %280 = call float @llvm.SI.load.const(<16 x i8> %276, i32 96)
>  %281 = fmul float %280, %258
>  %282 = fadd float %281, %271
>  %283 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %284 = load <16 x i8>, <16 x i8> addrspace(2)* %283, align 16, !invariant.load !0
>  %285 = call float @llvm.SI.load.const(<16 x i8> %284, i32 100)
>  %286 = fmul float %285, %258
>  %287 = fadd float %286, %274
>  %288 = call float @llvm.SI.load.const(<16 x i8> %284, i32 104)
>  %289 = fmul float %288, %258
>  %290 = fadd float %289, %279
>  %291 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %292 = load <16 x i8>, <16 x i8> addrspace(2)* %291, align 16, !invariant.load !0
>  %293 = call float @llvm.SI.load.const(<16 x i8> %292, i32 112)
>  %294 = fadd float %282, %293
>  %295 = call float @llvm.SI.load.const(<16 x i8> %292, i32 116)
>  %296 = fadd float %287, %295
>  %297 = call float @llvm.SI.load.const(<16 x i8> %292, i32 120)
>  %298 = fadd float %290, %297
>  %299 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %300 = load <16 x i8>, <16 x i8> addrspace(2)* %299, align 16, !invariant.load !0
>  %301 = call float @llvm.SI.load.const(<16 x i8> %300, i32 16)
>  %302 = fsub float -0.000000e+00, %301
>  %303 = call float @llvm.SI.load.const(<16 x i8> %300, i32 20)
>  %304 = fsub float -0.000000e+00, %303
>  %305 = call float @llvm.SI.load.const(<16 x i8> %300, i32 24)
>  %306 = fsub float -0.000000e+00, %305
>  %307 = fmul float %143, %302
>  %308 = fmul float %145, %304
>  %309 = fadd float %308, %307
>  %310 = fmul float %147, %306
>  %311 = fadd float %309, %310
>  %312 = call float @llvm.AMDGPU.clamp.(float %311, float 0.000000e+00, float 1.000000e+00)
>  %313 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %314 = load <8 x i32>, <8 x i32> addrspace(2)* %313, align 32, !invariant.load !0
>  %315 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %316 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %315, i64 0, i64 3, !amdgpu.uniform !0
>  %317 = load <4 x i32>, <4 x i32> addrspace(2)* %316, align 16, !invariant.load !0
>  %318 = extractelement <8 x i32> %314, i32 7
>  %319 = extractelement <4 x i32> %317, i32 0
>  %320 = and i32 %319, %318
>  %321 = insertelement <4 x i32> %317, i32 %320, i32 0
>  %322 = bitcast float %298 to i32
>  %323 = bitcast float %294 to i32
>  %324 = bitcast float %296 to i32
>  %325 = insertelement <4 x i32> undef, i32 %322, i32 0
>  %326 = insertelement <4 x i32> %325, i32 %323, i32 1
>  %327 = insertelement <4 x i32> %326, i32 %324, i32 2
>  %328 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %327, <8 x i32> %314, <4 x i32> %321, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %329 = extractelement <4 x float> %328, i32 0
>  %330 = fmul float %206, %302
>  %331 = fmul float %208, %304
>  %332 = fadd float %331, %330
>  %333 = fmul float %210, %306
>  %334 = fadd float %332, %333
>  %335 = call float @llvm.AMDGPU.clamp.(float %334, float 0.000000e+00, float 1.000000e+00)
>  %336 = fsub float %229, %335
>  %337 = call float @llvm.AMDGPU.clamp.(float %336, float 0.000000e+00, float 1.000000e+00)
>  %338 = fmul float %329, %329
>  %339 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %340 = load <16 x i8>, <16 x i8> addrspace(2)* %339, align 16, !invariant.load !0
>  %341 = call float @llvm.SI.load.const(<16 x i8> %340, i32 48)
>  %342 = fmul float %341, %338
>  %343 = call float @llvm.SI.load.const(<16 x i8> %340, i32 52)
>  %344 = fmul float %343, %338
>  %345 = call float @llvm.SI.load.const(<16 x i8> %340, i32 56)
>  %346 = fmul float %345, %338
>  %347 = fmul float %337, %337
>  %348 = call float @llvm.AMDGPU.clamp.(float %347, float 0.000000e+00, float 1.000000e+00)
>  %349 = fmul float %342, %348
>  %350 = fmul float %344, %348
>  %351 = fmul float %346, %348
>  %352 = fmul float %349, %117
>  %353 = fmul float %350, %117
>  %354 = fmul float %351, %117
>  %355 = fmul float %312, %352
>  %356 = fmul float %312, %353
>  %357 = fmul float %312, %354
>  %358 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %359 = load <8 x i32>, <8 x i32> addrspace(2)* %358, align 32, !invariant.load !0
>  %360 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %361 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %360, i64 0, i64 7, !amdgpu.uniform !0
>  %362 = load <4 x i32>, <4 x i32> addrspace(2)* %361, align 16, !invariant.load !0
>  %363 = extractelement <8 x i32> %359, i32 7
>  %364 = extractelement <4 x i32> %362, i32 0
>  %365 = and i32 %364, %363
>  %366 = insertelement <4 x i32> %362, i32 %365, i32 0
>  %367 = call float @llvm.amdgcn.cubetc(float %143, float %145, float %147)
>  %368 = call float @llvm.amdgcn.cubesc(float %143, float %145, float %147)
>  %369 = call float @llvm.amdgcn.cubema(float %143, float %145, float %147)
>  %370 = call float @llvm.amdgcn.cubeid(float %143, float %145, float %147)
>  %371 = call float @llvm.fabs.f32(float %369)
>  %372 = fdiv float 1.000000e+00, %371, !fpmath !1
>  %373 = fmul float %367, %372
>  %374 = fadd float %373, 1.500000e+00
>  %375 = fmul float %368, %372
>  %376 = fadd float %375, 1.500000e+00
>  %377 = bitcast float %376 to i32
>  %378 = bitcast float %374 to i32
>  %379 = bitcast float %370 to i32
>  %380 = insertelement <4 x i32> undef, i32 %377, i32 0
>  %381 = insertelement <4 x i32> %380, i32 %378, i32 1
>  %382 = insertelement <4 x i32> %381, i32 %379, i32 2
>  %383 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %382, <8 x i32> %359, <4 x i32> %366, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %384 = extractelement <4 x float> %383, i32 0
>  %385 = extractelement <4 x float> %383, i32 1
>  %386 = extractelement <4 x float> %383, i32 2
>  %387 = extractelement <4 x float> %383, i32 3
>  %388 = fmul float %143, %49
>  %389 = fmul float %145, %50
>  %390 = fadd float %389, %388
>  %391 = fmul float %147, %51
>  %392 = fadd float %390, %391
>  %393 = fmul float %392, %143
>  %394 = fmul float %392, %145
>  %395 = fmul float %392, %147
>  %396 = fmul float %393, 2.000000e+00
>  %397 = fsub float %396, %49
>  %398 = fmul float %394, 2.000000e+00
>  %399 = fsub float %398, %50
>  %400 = fmul float %395, 2.000000e+00
>  %401 = fsub float %400, %51
>  %402 = fsub float 1.000000e+00, %100
>  %403 = fmul float %402, 6.000000e+00
>  %404 = fmul float %49, %143
>  %405 = fmul float %50, %145
>  %406 = fadd float %405, %404
>  %407 = fmul float %51, %147
>  %408 = fadd float %406, %407
>  %409 = call float @llvm.AMDGPU.clamp.(float %408, float 0.000000e+00, float 1.000000e+00)
>  %410 = fsub float 1.000000e+00, %409
>  %411 = call float @llvm.pow.f32(float %410, float 5.000000e+00)
>  %412 = call float @llvm.maxnum.f32(float %100, float 0.000000e+00)
>  %413 = call float @llvm.maxnum.f32(float %100, float 0.000000e+00)
>  %414 = call float @llvm.maxnum.f32(float %100, float 0.000000e+00)
>  %415 = fmul float %411, %412
>  %416 = fmul float %411, %413
>  %417 = fmul float %411, %414
>  %418 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %419 = load <8 x i32>, <8 x i32> addrspace(2)* %418, align 32, !invariant.load !0
>  %420 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %421 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %420, i64 0, i64 11, !amdgpu.uniform !0
>  %422 = load <4 x i32>, <4 x i32> addrspace(2)* %421, align 16, !invariant.load !0
>  %423 = extractelement <8 x i32> %419, i32 7
>  %424 = extractelement <4 x i32> %422, i32 0
>  %425 = and i32 %424, %423
>  %426 = insertelement <4 x i32> %422, i32 %425, i32 0
>  %427 = call float @llvm.amdgcn.cubetc(float %397, float %399, float %401)
>  %428 = call float @llvm.amdgcn.cubesc(float %397, float %399, float %401)
>  %429 = call float @llvm.amdgcn.cubema(float %397, float %399, float %401)
>  %430 = call float @llvm.amdgcn.cubeid(float %397, float %399, float %401)
>  %431 = call float @llvm.fabs.f32(float %429)
>  %432 = fdiv float 1.000000e+00, %431, !fpmath !1
>  %433 = fmul float %427, %432
>  %434 = fadd float %433, 1.500000e+00
>  %435 = fmul float %428, %432
>  %436 = fadd float %435, 1.500000e+00
>  %437 = bitcast float %436 to i32
>  %438 = bitcast float %434 to i32
>  %439 = bitcast float %430 to i32
>  %440 = bitcast float %403 to i32
>  %441 = insertelement <4 x i32> undef, i32 %437, i32 0
>  %442 = insertelement <4 x i32> %441, i32 %438, i32 1
>  %443 = insertelement <4 x i32> %442, i32 %439, i32 2
>  %444 = insertelement <4 x i32> %443, i32 %440, i32 3
>  %445 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %444, <8 x i32> %419, <4 x i32> %426, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %446 = extractelement <4 x float> %445, i32 0
>  %447 = extractelement <4 x float> %445, i32 1
>  %448 = extractelement <4 x float> %445, i32 2
>  %449 = fmul float %415, %446
>  %450 = fmul float %416, %447
>  %451 = fmul float %417, %448
>  %452 = fmul float %384, %387
>  %453 = fmul float %385, %387
>  %454 = fmul float %386, %387
>  %455 = fmul float %230, 4.000000e+00
>  %456 = fmul float %452, %455
>  %457 = fadd float %456, %355
>  %458 = fmul float %453, %455
>  %459 = fadd float %458, %356
>  %460 = fmul float %454, %455
>  %461 = fadd float %460, %357
>  %462 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %463 = load <16 x i8>, <16 x i8> addrspace(2)* %462, align 16
>  br label %loop157
>
>loop157:                                          ; preds = %endif161, %main_body
>  %464 = phi i32 [ 0, %main_body ], [ %548, %endif161 ]
>  %465 = phi i32 [ 0, %main_body ], [ %548, %endif161 ]
>  %466 = phi i32 [ 0, %main_body ], [ %548, %endif161 ]
>  %467 = phi i32 [ 0, %main_body ], [ %548, %endif161 ]
>  %468 = phi i32 [ 0, %main_body ], [ %548, %endif161 ]
>  %.011 = phi float [ %461, %main_body ], [ %547, %endif161 ]
>  %.010 = phi float [ %459, %main_body ], [ %546, %endif161 ]
>  %.09 = phi float [ %457, %main_body ], [ %545, %endif161 ]
>  %469 = icmp sgt i32 %464, 2
>  br i1 %469, label %endloop222, label %endif161
>
>endif161:                                         ; preds = %loop157
>  %470 = shl i32 %465, 5
>  %471 = shl i32 %465, 5
>  %472 = add i32 %471, 176
>  %473 = call float @llvm.SI.load.const(<16 x i8> %463, i32 %472)
>  %474 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %475 = fsub float %473, %474
>  %476 = shl i32 %465, 5
>  %477 = add i32 %476, 180
>  %478 = call float @llvm.SI.load.const(<16 x i8> %463, i32 %477)
>  %479 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %480 = fsub float %478, %479
>  %481 = add i32 %470, 184
>  %482 = call float @llvm.SI.load.const(<16 x i8> %463, i32 %481)
>  %483 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %484 = fsub float %482, %483
>  %485 = fmul float %475, %475
>  %486 = fmul float %480, %480
>  %487 = fadd float %486, %485
>  %488 = fmul float %484, %484
>  %489 = fadd float %487, %488
>  %490 = call float @llvm.sqrt.f32(float %489)
>  %491 = fdiv float 1.000000e+00, %490, !fpmath !1
>  %492 = fmul float %475, %491
>  %493 = fmul float %480, %491
>  %494 = fmul float %484, %491
>  %495 = fmul float %492, %143
>  %496 = fmul float %493, %145
>  %497 = fadd float %496, %495
>  %498 = fmul float %494, %147
>  %499 = fadd float %497, %498
>  %500 = call float @llvm.AMDGPU.clamp.(float %499, float 0.000000e+00, float 1.000000e+00)
>  %501 = fmul float %492, %206
>  %502 = fmul float %493, %208
>  %503 = fadd float %502, %501
>  %504 = fmul float %494, %210
>  %505 = fadd float %503, %504
>  %506 = call float @llvm.AMDGPU.clamp.(float %505, float 0.000000e+00, float 1.000000e+00)
>  %507 = fsub float %229, %506
>  %508 = call float @llvm.AMDGPU.clamp.(float %507, float 0.000000e+00, float 1.000000e+00)
>  %509 = fmul float %508, %508
>  %510 = shl i32 %466, 1
>  %511 = or i32 %510, 1
>  %512 = fmul float %489, %491
>  %513 = shl i32 %467, 5
>  %514 = add i32 %513, 188
>  %515 = call float @llvm.SI.load.const(<16 x i8> %463, i32 %514)
>  %516 = fmul float %512, %515
>  %517 = call float @llvm.AMDGPU.clamp.(float %516, float 0.000000e+00, float 1.000000e+00)
>  %518 = fsub float 1.000000e+00, %517
>  %519 = shl i32 %511, 4
>  %520 = add i32 %519, 176
>  %521 = call float @llvm.SI.load.const(<16 x i8> %463, i32 %520)
>  %522 = fmul float %521, %518
>  %523 = shl i32 %511, 4
>  %524 = add i32 %523, 180
>  %525 = call float @llvm.SI.load.const(<16 x i8> %463, i32 %524)
>  %526 = fmul float %525, %518
>  %527 = shl i32 %511, 4
>  %528 = add i32 %527, 184
>  %529 = call float @llvm.SI.load.const(<16 x i8> %463, i32 %528)
>  %530 = fmul float %529, %518
>  %531 = fmul float %509, %509
>  %532 = call float @llvm.AMDGPU.clamp.(float %531, float 0.000000e+00, float 1.000000e+00)
>  %533 = fsub float 1.000000e+00, %491
>  %534 = fmul float %532, %533
>  %535 = fadd float %491, %534
>  %536 = fmul float %522, %535
>  %537 = fmul float %526, %535
>  %538 = fmul float %530, %535
>  %539 = fmul float %536, %117
>  %540 = fmul float %537, %117
>  %541 = fmul float %538, %117
>  %542 = fmul float %500, %539
>  %543 = fmul float %500, %540
>  %544 = fmul float %500, %541
>  %545 = fadd float %.09, %542
>  %546 = fadd float %.010, %543
>  %547 = fadd float %.011, %544
>  %548 = add i32 %468, 1
>  br label %loop157
>
>endloop222:                                       ; preds = %loop157
>  %549 = fmul float %449, %249
>  %550 = fmul float %450, %249
>  %551 = fmul float %451, %249
>  %552 = fmul float %.09, %78
>  %553 = fadd float %552, %549
>  %554 = fmul float %.010, %79
>  %555 = fadd float %554, %550
>  %556 = fmul float %.011, %80
>  %557 = fadd float %556, %551
>  %558 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %559 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %560 = load <16 x i8>, <16 x i8> addrspace(2)* %559, align 16, !invariant.load !0
>  %561 = call float @llvm.SI.load.const(<16 x i8> %560, i32 12)
>  %562 = fsub float %558, %561
>  %563 = call float @llvm.maxnum.f32(float %562, float 0.000000e+00)
>  %564 = call float @llvm.SI.load.const(<16 x i8> %560, i32 28)
>  %565 = call float @llvm.SI.load.const(<16 x i8> %560, i32 12)
>  %566 = fsub float %564, %565
>  %567 = fadd float %566, 0x3F50624DE0000000
>  %568 = fdiv float 1.000000e+00, %567, !fpmath !1
>  %569 = fmul float %563, %568
>  %570 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %571 = load <16 x i8>, <16 x i8> addrspace(2)* %570, align 16, !invariant.load !0
>  %572 = call float @llvm.SI.load.const(<16 x i8> %571, i32 28)
>  %573 = call float @llvm.floor.f32(float %572)
>  %574 = fsub float %572, %573
>  %575 = fmul float %574, 8.000000e+00
>  %576 = call float @llvm.pow.f32(float %569, float %575)
>  %577 = call float @llvm.AMDGPU.clamp.(float %576, float 0.000000e+00, float 1.000000e+00)
>  %578 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %8)
>  %579 = fmul float %578, %577
>  %580 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %581 = load <16 x i8>, <16 x i8> addrspace(2)* %580, align 16, !invariant.load !0
>  %582 = call float @llvm.SI.load.const(<16 x i8> %581, i32 32)
>  %583 = fsub float 1.000000e+00, %579
>  %584 = fmul float %553, %579
>  %585 = fmul float %582, %583
>  %586 = fadd float %584, %585
>  %587 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %588 = load <16 x i8>, <16 x i8> addrspace(2)* %587, align 16, !invariant.load !0
>  %589 = call float @llvm.SI.load.const(<16 x i8> %588, i32 36)
>  %590 = fsub float 1.000000e+00, %579
>  %591 = fmul float %555, %579
>  %592 = fmul float %589, %590
>  %593 = fadd float %591, %592
>  %594 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %595 = load <16 x i8>, <16 x i8> addrspace(2)* %594, align 16, !invariant.load !0
>  %596 = call float @llvm.SI.load.const(<16 x i8> %595, i32 40)
>  %597 = fsub float 1.000000e+00, %579
>  %598 = fmul float %557, %579
>  %599 = fmul float %596, %597
>  %600 = fadd float %598, %599
>  %601 = bitcast float %5 to i32
>  %602 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %601, 10
>  %603 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %602, float %586, 11
>  %604 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %603, float %593, 12
>  %605 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %604, float %600, 13
>  %606 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %605, float %81, 14
>  %607 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %606, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %607
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind
>declare void @llvm.AMDGPU.kill(float) #2
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>radeonsi: Compiling shader 134
>Vertex Shader Prolog LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> @vs_prolog(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32) {
>main_body:
>  %20 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %0, 0
>  %21 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %20, i32 %1, 1
>  %22 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %21, i32 %2, 2
>  %23 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %22, i32 %3, 3
>  %24 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %23, i32 %4, 4
>  %25 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %24, i32 %5, 5
>  %26 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %25, i32 %6, 6
>  %27 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %26, i32 %7, 7
>  %28 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %27, i32 %8, 8
>  %29 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %28, i32 %9, 9
>  %30 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %29, i32 %10, 10
>  %31 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %30, i32 %11, 11
>  %32 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %31, i32 %12, 12
>  %33 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %32, i32 %13, 13
>  %34 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %33, i32 %14, 14
>  %35 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %34, i32 %15, 15
>  %36 = bitcast i32 %16 to float
>  %37 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %35, float %36, 16
>  %38 = bitcast i32 %17 to float
>  %39 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %37, float %38, 17
>  %40 = bitcast i32 %18 to float
>  %41 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %39, float %40, 18
>  %42 = bitcast i32 %19 to float
>  %43 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %41, float %42, 19
>  %44 = add i32 %16, %12
>  %45 = bitcast i32 %44 to float
>  %46 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %43, float %45, 20
>  %47 = add i32 %16, %12
>  %48 = bitcast i32 %47 to float
>  %49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %46, float %48, 21
>  %50 = add i32 %16, %12
>  %51 = bitcast i32 %50 to float
>  %52 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %49, float %51, 22
>  %53 = add i32 %16, %12
>  %54 = bitcast i32 %53 to float
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %52, float %54, 23
>  %56 = add i32 %16, %12
>  %57 = bitcast i32 %56 to float
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %55, float %57, 24
>  %59 = add i32 %16, %12
>  %60 = bitcast i32 %59 to float
>  %61 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %58, float %60, 25
>  %62 = add i32 %16, %12
>  %63 = bitcast i32 %62 to float
>  %64 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %61, float %63, 26
>  %65 = add i32 %16, %12
>  %66 = bitcast i32 %65 to float
>  %67 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %64, float %66, 27
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float }> %67
>}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>	v_mov_b32_e32 v10, v4          ; 7E140304
>	v_mov_b32_e32 v11, v4          ; 7E160304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                     ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                   ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                   ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                  ; C08A0B14
>	s_load_dwordx4 s[24:27], s[10:11], 0x18                  ; C08C0B18
>	s_load_dwordx4 s[28:31], s[10:11], 0x1c                  ; C08E0B1C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[12:15], v4, s[4:7], 0 idxen    ; E00C2000 80010C04
>	buffer_load_format_xyzw v[21:24], v5, s[12:15], 0 idxen  ; E00C2000 80031505
>	buffer_load_format_xyzw v[17:20], v6, s[16:19], 0 idxen  ; E00C2000 80041106
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen    ; E00C2000 80050309
>	s_waitcnt vmcnt(2)                                       ; BF8C0F72
>	buffer_load_format_xyzw v[24:27], v10, s[24:27], 0 idxen ; E00C2000 8006180A
>	buffer_load_format_xyzw v[28:31], v11, s[28:31], 0 idxen ; E00C2000 80071C0B
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                       ; C0800300
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_buffer_load_dword s4, s[0:3], 0x10                     ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                     ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                     ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                    ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v16, s4                                    ; 7E200204
>	v_mov_b32_e32 v1, s5                                     ; 7E020205
>	v_mov_b32_e32 v0, s6                                     ; 7E000206
>	s_cmp_eq_u32 s7, -1                                      ; BF06C107
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                     ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                     ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                     ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                     ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                     ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                     ; C2040120
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v10, s4                                    ; 7E140204
>	v_mov_b32_e32 v9, s5                                     ; 7E120205
>	s_buffer_load_dword s4, s[0:3], 0x21                     ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                     ; C2028122
>	v_mov_b32_e32 v8, s6                                     ; 7E100206
>	v_sub_f32_e32 v30, s7, v16                               ; 083C2007
>	v_mov_b32_e32 v11, s8                                    ; 7E160208
>	s_buffer_load_dword s6, s[0:3], 0x23                     ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                     ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                     ; C2040125
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v26, s4                                    ; 7E340204
>	v_mov_b32_e32 v27, s5                                    ; 7E360205
>	s_buffer_load_dword s4, s[0:3], 0x26                     ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                     ; C2028127
>	v_sub_f32_e32 v31, s6, v1                                ; 083E0206
>	v_mov_b32_e32 v5, s7                                     ; 7E0A0207
>	v_mov_b32_e32 v6, s8                                     ; 7E0C0208
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mov_b32_e32 v7, s4                                     ; 7E0E0204
>	v_sub_f32_e32 v32, s5, v0                                ; 08400005
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                    ; C0820B10
>	s_movk_i32 s14, 0x70                                     ; B00E0070
>	s_movk_i32 s15, 0x7c                                     ; B00F007C
>	s_movk_i32 s12, 0x74                                     ; B00C0074
>	s_movk_i32 s13, 0x78                                     ; B00D0078
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[37:40], v8, s[4:7], 0 idxen    ; E00C2000 80012508
>	s_buffer_load_dword s4, s[0:3], 0x380                    ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                      ; BF06C104
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_cvt_i32_f32_e32 v5, v37                                ; 7E0A1125
>	v_mul_lo_i32 v31, v5, 48                                 ; D2D6001F 00016105
>	v_add_i32_e32 v5, vcc, s14, v31                          ; 4A0A3E0E
>	v_add_i32_e32 v11, vcc, s15, v31                         ; 4A163E0F
>	v_add_i32_e32 v8, vcc, s13, v31                          ; 4A103E0D
>	v_add_i32_e32 v6, vcc, s12, v31                          ; 4A0C3E0C
>	buffer_load_dword v10, v5, s[0:3], 0 offen               ; E0301000 80000A05
>	buffer_load_dword v5, v11, s[0:3], 0 offen               ; E0301000 8000050B
>	buffer_load_dword v9, v6, s[0:3], 0 offen                ; E0301000 80000906
>	buffer_load_dword v8, v8, s[0:3], 0 offen                ; E0301000 80000808
>	s_waitcnt vmcnt(2)                                       ; BF8C0F72
>	v_subrev_f32_e32 v30, v16, v5                            ; 0A3C0B10
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                     ; BF850000
>	v_add_i32_e32 v5, vcc, 0x80, v31                         ; 4A0A3EFF 00000080
>	v_add_i32_e32 v6, vcc, 0x8c, v31                         ; 4A0C3EFF 0000008C
>	v_add_i32_e32 v7, vcc, 0x9c, v31                         ; 4A0E3EFF 0000009C
>	v_add_i32_e32 v26, vcc, 0x84, v31                        ; 4A343EFF 00000084
>	v_add_i32_e32 v27, vcc, 0x88, v31                        ; 4A363EFF 00000088
>	buffer_load_dword v32, v6, s[0:3], 0 offen               ; E0301000 80002006
>	v_add_i32_e32 v6, vcc, 0x94, v31                         ; 4A0C3EFF 00000094
>	buffer_load_dword v11, v5, s[0:3], 0 offen               ; E0301000 80000B05
>	v_add_i32_e32 v5, vcc, 0x90, v31                         ; 4A0A3EFF 00000090
>	v_add_i32_e32 v31, vcc, 0x98, v31                        ; 4A3E3EFF 00000098
>	buffer_load_dword v33, v7, s[0:3], 0 offen               ; E0301000 80002107
>	buffer_load_dword v7, v31, s[0:3], 0 offen               ; E0301000 8000071F
>	buffer_load_dword v26, v26, s[0:3], 0 offen              ; E0301000 80001A1A
>	buffer_load_dword v27, v27, s[0:3], 0 offen              ; E0301000 80001B1B
>	buffer_load_dword v5, v5, s[0:3], 0 offen                ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen                ; E0301000 80000606
>	s_waitcnt vmcnt(7)                                       ; BF8C0F77
>	v_subrev_f32_e32 v31, v1, v32                            ; 0A3E4101
>	s_waitcnt vmcnt(5)                                       ; BF8C0F75
>	v_subrev_f32_e32 v32, v0, v33                            ; 0A404300
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	s_branch BB0_8                                           ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                     ; C0820B0C
>	v_cvt_i32_f32_e32 v5, v38                                ; 7E0A1126
>	s_movk_i32 s8, 0x88                                      ; B0080088
>	v_add_i32_e32 v11, vcc, s8, v31                          ; 4A163E08
>	s_movk_i32 s11, 0x8c                                     ; B00B008C
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v7, s[4:7], 0 idxen    ; E00C2000 80012107
>	s_movk_i32 s4, 0x9c                                      ; B004009C
>	buffer_load_dword v27, v11, s[0:3], 0 offen              ; E0301000 80001B0B
>	s_movk_i32 s10, 0x80                                     ; B00A0080
>	s_movk_i32 s9, 0x84                                      ; B0090084
>	v_mul_lo_i32 v37, v5, 48                                 ; D2D60025 00016105
>	v_add_i32_e32 v5, vcc, s11, v31                          ; 4A0A3E0B
>	s_movk_i32 s7, 0x90                                      ; B0070090
>	s_movk_i32 s6, 0x94                                      ; B0060094
>	v_add_i32_e32 v11, vcc, s4, v31                          ; 4A163E04
>	s_movk_i32 s5, 0x98                                      ; B0050098
>	v_add_i32_e32 v6, vcc, s10, v31                          ; 4A0C3E0A
>	v_add_i32_e32 v7, vcc, s9, v31                           ; 4A0E3E09
>	buffer_load_dword v5, v5, s[0:3], 0 offen                ; E0301000 80000505
>	v_add_i32_e32 v32, vcc, s6, v31                          ; 4A403E06
>	v_add_i32_e32 v26, vcc, s7, v31                          ; 4A343E07
>	buffer_load_dword v38, v11, s[0:3], 0 offen              ; E0301000 8000260B
>	v_add_i32_e32 v31, vcc, s5, v31                          ; 4A3E3E05
>	buffer_load_dword v6, v6, s[0:3], 0 offen                ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen                ; E0301000 80000707
>	buffer_load_dword v41, v26, s[0:3], 0 offen              ; E0301000 8000291A
>	buffer_load_dword v32, v32, s[0:3], 0 offen              ; E0301000 80002020
>	buffer_load_dword v42, v31, s[0:3], 0 offen              ; E0301000 80002A1F
>	s_waitcnt vmcnt(8)                                       ; BF8C0F78
>	v_mul_f32_e32 v10, v33, v10                              ; 10141521
>	v_mul_f32_e32 v9, v33, v9                                ; 10121321
>	v_mul_f32_e32 v8, v33, v8                                ; 10101121
>	v_mul_f32_e32 v30, v33, v30                              ; 103C3D21
>	s_waitcnt vmcnt(7)                                       ; BF8C0F77
>	v_mul_f32_e32 v27, v33, v27                              ; 10363721
>	s_waitcnt vmcnt(6)                                       ; BF8C0F76
>	v_subrev_f32_e32 v5, v1, v5                              ; 0A0A0B01
>	v_mul_f32_e32 v31, v33, v5                               ; 103E0B21
>	s_waitcnt vmcnt(5)                                       ; BF8C0F75
>	v_subrev_f32_e32 v38, v0, v38                            ; 0A4C4D00
>	s_waitcnt vmcnt(4)                                       ; BF8C0F74
>	v_mul_f32_e32 v11, v33, v6                               ; 10160D21
>	s_waitcnt vmcnt(3)                                       ; BF8C0F73
>	v_mul_f32_e32 v26, v33, v7                               ; 10340F21
>	s_waitcnt vmcnt(2)                                       ; BF8C0F72
>	v_mul_f32_e32 v5, v33, v41                               ; 100A5321
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_mul_f32_e32 v6, v33, v32                               ; 100C4121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mul_f32_e32 v7, v33, v42                               ; 100E5521
>	v_mul_f32_e32 v32, v33, v38                              ; 10404D21
>	v_add_i32_e32 v33, vcc, s15, v37                         ; 4A424A0F
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v33, v16, v33                           ; 0A424310
>	v_mac_f32_e32 v30, v34, v33                              ; 3E3C4322
>	v_add_i32_e32 v33, vcc, s11, v37                         ; 4A424A0B
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v33, v1, v33                            ; 0A424301
>	v_mac_f32_e32 v31, v34, v33                              ; 3E3E4322
>	v_add_i32_e32 v33, vcc, s14, v37                         ; 4A424A0E
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v34, v33                              ; 3E144322
>	v_add_i32_e32 v33, vcc, s12, v37                         ; 4A424A0C
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_buffer_load_dword s12, s[0:3], 0x384                   ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                      ; BF06800C
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v34, v33                               ; 3E124322
>	v_add_i32_e32 v33, vcc, s13, v37                         ; 4A424A0D
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v34, v33                               ; 3E104322
>	v_add_i32_e32 v33, vcc, s10, v37                         ; 4A424A0A
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v11, v34, v33                              ; 3E164322
>	v_add_i32_e32 v33, vcc, s9, v37                          ; 4A424A09
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v26, v34, v33                              ; 3E344322
>	v_add_i32_e32 v33, vcc, s8, v37                          ; 4A424A08
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v27, v34, v33                              ; 3E364322
>	v_add_i32_e32 v33, vcc, s7, v37                          ; 4A424A07
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v5, v34, v33                               ; 3E0A4322
>	v_add_i32_e32 v33, vcc, s6, v37                          ; 4A424A06
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v6, v34, v33                               ; 3E0C4322
>	v_add_i32_e32 v33, vcc, s5, v37                          ; 4A424A05
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v34, v33                               ; 3E0E4322
>	v_add_i32_e32 v33, vcc, s4, v37                          ; 4A424A04
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v33, v0, v33                            ; 0A424300
>	v_mac_f32_e32 v32, v34, v33                              ; 3E404322
>	s_cbranch_scc1 BB0_6                                     ; BF850000
>	v_cvt_i32_f32_e32 v33, v39                               ; 7E421127
>	v_mul_lo_i32 v33, v33, 48                                ; D2D60021 00016121
>	v_add_i32_e32 v34, vcc, 0x70, v33                        ; 4A4442FF 00000070
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v35, v34                              ; 3E144523
>	v_add_i32_e32 v34, vcc, 0x7c, v33                        ; 4A4442FF 0000007C
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v34, v16, v34                           ; 0A444510
>	v_mac_f32_e32 v30, v35, v34                              ; 3E3C4523
>	v_add_i32_e32 v34, vcc, s11, v33                         ; 4A44420B
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v34, v1, v34                            ; 0A444501
>	v_mac_f32_e32 v31, v35, v34                              ; 3E3E4523
>	v_add_i32_e32 v34, vcc, 0x74, v33                        ; 4A4442FF 00000074
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v35, v34                               ; 3E124523
>	v_add_i32_e32 v34, vcc, 0x78, v33                        ; 4A4442FF 00000078
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v35, v34                               ; 3E104523
>	v_add_i32_e32 v34, vcc, s10, v33                         ; 4A44420A
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v11, v35, v34                              ; 3E164523
>	v_add_i32_e32 v34, vcc, s9, v33                          ; 4A444209
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v26, v35, v34                              ; 3E344523
>	v_add_i32_e32 v34, vcc, s8, v33                          ; 4A444208
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v27, v35, v34                              ; 3E364523
>	v_add_i32_e32 v34, vcc, s7, v33                          ; 4A444207
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v5, v35, v34                               ; 3E0A4523
>	v_add_i32_e32 v34, vcc, s6, v33                          ; 4A444206
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v6, v35, v34                               ; 3E0C4523
>	v_add_i32_e32 v34, vcc, s5, v33                          ; 4A444205
>	v_add_i32_e32 v33, vcc, s4, v33                          ; 4A424204
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v33, v0, v33                            ; 0A424300
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v35, v34                               ; 3E0E4523
>	v_mac_f32_e32 v32, v35, v33                              ; 3E404323
>	s_buffer_load_dword s4, s[0:3], 0x388                    ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                       ; BF068004
>	s_cbranch_scc1 BB0_8                                     ; BF850000
>	v_cvt_i32_f32_e32 v33, v40                               ; 7E421128
>	v_mul_lo_i32 v33, v33, 48                                ; D2D60021 00016121
>	v_add_i32_e32 v34, vcc, 0x70, v33                        ; 4A4442FF 00000070
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v10, v36, v34                              ; 3E144524
>	v_add_i32_e32 v34, vcc, 0x7c, v33                        ; 4A4442FF 0000007C
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v34, v16, v34                           ; 0A444510
>	v_mac_f32_e32 v30, v36, v34                              ; 3E3C4524
>	v_add_i32_e32 v34, vcc, 0x8c, v33                        ; 4A4442FF 0000008C
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_subrev_f32_e32 v34, v1, v34                            ; 0A444501
>	v_mac_f32_e32 v31, v36, v34                              ; 3E3E4524
>	v_add_i32_e32 v34, vcc, 0x74, v33                        ; 4A4442FF 00000074
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v9, v36, v34                               ; 3E124524
>	v_add_i32_e32 v34, vcc, 0x78, v33                        ; 4A4442FF 00000078
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v8, v36, v34                               ; 3E104524
>	v_add_i32_e32 v34, vcc, 0x80, v33                        ; 4A4442FF 00000080
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v11, v36, v34                              ; 3E164524
>	v_add_i32_e32 v34, vcc, 0x84, v33                        ; 4A4442FF 00000084
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v26, v36, v34                              ; 3E344524
>	v_add_i32_e32 v34, vcc, 0x88, v33                        ; 4A4442FF 00000088
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v27, v36, v34                              ; 3E364524
>	v_add_i32_e32 v34, vcc, 0x90, v33                        ; 4A4442FF 00000090
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v5, v36, v34                               ; 3E0A4524
>	v_add_i32_e32 v34, vcc, 0x94, v33                        ; 4A4442FF 00000094
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v6, v36, v34                               ; 3E0C4524
>	v_add_i32_e32 v34, vcc, 0x98, v33                        ; 4A4442FF 00000098
>	v_add_i32_e32 v33, vcc, 0x9c, v33                        ; 4A4242FF 0000009C
>	buffer_load_dword v33, v33, s[0:3], 0 offen              ; E0301000 80002121
>	buffer_load_dword v34, v34, s[0:3], 0 offen              ; E0301000 80002222
>	s_waitcnt vmcnt(1)                                       ; BF8C0F71
>	v_subrev_f32_e32 v33, v0, v33                            ; 0A424300
>	s_waitcnt vmcnt(0)                                       ; BF8C0F70
>	v_mac_f32_e32 v7, v36, v34                               ; 3E0E4524
>	v_mac_f32_e32 v32, v36, v33                              ; 3E404324
>	exp 15, 32, 0, 0, 0, v24, v25, v28, v29                  ; F800020F 1D1C1918
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>	v_mul_f32_e32 v24, v9, v13                               ; 10301B09
>	s_buffer_load_dword s7, s[0:3], 0x3                      ; C2038103
>	v_mac_f32_e32 v24, v10, v12                              ; 3E30190A
>	v_mul_f32_e32 v25, v26, v13                              ; 10321B1A
>	v_mul_f32_e32 v28, v6, v13                               ; 10381B06
>	v_mul_f32_e32 v13, 0, v13                                ; 101A1A80
>	v_mac_f32_e32 v24, v8, v14                               ; 3E301D08
>	v_mac_f32_e32 v13, 0, v12                                ; 3E1A1880
>	v_mac_f32_e32 v25, v11, v12                              ; 3E32190B
>	v_mac_f32_e32 v28, v5, v12                               ; 3E381905
>	v_mac_f32_e32 v13, 0, v14                                ; 3E1A1C80
>	v_add_f32_e32 v21, v21, v21                              ; 062A2B15
>	v_add_f32_e32 v17, v17, v17                              ; 06222311
>	v_mac_f32_e32 v24, v30, v15                              ; 3E301F1E
>	v_mac_f32_e32 v25, v27, v14                              ; 3E321D1B
>	v_mac_f32_e32 v28, v7, v14                               ; 3E381D07
>	v_add_f32_e32 v12, v15, v13                              ; 06181B0F
>	v_add_f32_e32 v13, v16, v24                              ; 061A3110
>	v_mad_f32 v14, v21, v10, -v10                            ; D282000E 842A1515
>	v_mad_f32 v22, 2.0, v22, -1.0                            ; D2820016 03CE2CF4
>	v_mad_f32 v18, 2.0, v18, -1.0                            ; D2820012 03CE24F4
>	v_mad_f32 v10, v17, v10, -v10                            ; D282000A 842A1511
>	v_mac_f32_e32 v14, v9, v22                               ; 3E1C2D09
>	v_mac_f32_e32 v10, v9, v18                               ; 3E142509
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mul_f32_e32 v9, s7, v13                                ; 10121A07
>	s_buffer_load_dword s7, s[0:3], 0x7                      ; C2038107
>	s_buffer_load_dword s11, s[0:3], 0xb                     ; C205810B
>	s_buffer_load_dword s4, s[0:3], 0x0                      ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                      ; C2028101
>	v_mac_f32_e32 v25, v31, v15                              ; 3E321F1F
>	v_mac_f32_e32 v28, v32, v15                              ; 3E381F20
>	v_add_f32_e32 v1, v1, v25                                ; 06023301
>	v_mad_f32 v16, v21, v5, -v5                              ; D2820010 84160B15
>	v_mad_f32 v5, v17, v5, -v5                               ; D2820005 84160B11
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v9, s7, v1                                 ; 3E120207
>	v_add_f32_e32 v0, v0, v28                                ; 06003900
>	v_mad_f32 v23, 2.0, v23, -1.0                            ; D2820017 03CE2EF4
>	v_mac_f32_e32 v16, v6, v22                               ; 3E202D06
>	v_mad_f32 v19, 2.0, v19, -1.0                            ; D2820013 03CE26F4
>	v_mac_f32_e32 v5, v6, v18                                ; 3E0A2506
>	v_mac_f32_e32 v9, s11, v0                                ; 3E12000B
>	s_buffer_load_dword s11, s[0:3], 0xf                     ; C205810F
>	v_mul_f32_e32 v6, s4, v13                                ; 100C1A04
>	s_buffer_load_dword s8, s[0:3], 0x4                      ; C2040104
>	v_mac_f32_e32 v16, v7, v23                               ; 3E202F07
>	v_mac_f32_e32 v5, v7, v19                                ; 3E0A2707
>	v_mul_f32_e32 v7, s5, v13                                ; 100E1A05
>	s_buffer_load_dword s4, s[0:3], 0x5                      ; C2020105
>	s_buffer_load_dword s6, s[0:3], 0x2                      ; C2030102
>	s_buffer_load_dword s5, s[0:3], 0x6                      ; C2028106
>	s_buffer_load_dword s9, s[0:3], 0x8                      ; C2048108
>	s_buffer_load_dword s10, s[0:3], 0x9                     ; C2050109
>	s_buffer_load_dword s7, s[0:3], 0xa                      ; C203810A
>	s_buffer_load_dword s12, s[0:3], 0xc                     ; C206010C
>	s_buffer_load_dword s13, s[0:3], 0xd                     ; C206810D
>	s_buffer_load_dword s14, s[0:3], 0xe                     ; C207010E
>	s_buffer_load_dword s15, s[0:3], 0x14                    ; C2078114
>	s_buffer_load_dword s16, s[0:3], 0x15                    ; C2080115
>	s_buffer_load_dword s17, s[0:3], 0x16                    ; C2088116
>	s_buffer_load_dword s18, s[0:3], 0x17                    ; C2090117
>	s_buffer_load_dword s0, s[0:3], 0x1b                     ; C200011B
>	s_waitcnt lgkmcnt(0)                                     ; BF8C007F
>	v_mac_f32_e32 v9, s11, v12                               ; 3E12180B
>	v_mad_f32 v15, v21, v11, -v11                            ; D282000F 842E1715
>	v_mac_f32_e32 v14, v8, v23                               ; 3E1C2F08
>	v_mac_f32_e32 v10, v8, v19                               ; 3E142708
>	v_mad_f32 v8, v17, v11, -v11                             ; D2820008 842E1711
>	v_mul_f32_e32 v11, s0, v9                                ; 10161200
>	exp 15, 33, 0, 0, 0, v13, v1, v0, v11                    ; F800021F 0B00010D
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>	v_mul_f32_e32 v11, s6, v13                               ; 10161A06
>	v_mac_f32_e32 v11, s5, v1                                ; 3E160205
>	v_mac_f32_e32 v11, s7, v0                                ; 3E160007
>	v_mac_f32_e32 v11, s14, v12                              ; 3E16180E
>	v_mac_f32_e32 v6, s8, v1                                 ; 3E0C0208
>	v_mac_f32_e32 v7, s4, v1                                 ; 3E0E0204
>	v_add_f32_e32 v1, 0xba83126f, v11                        ; 060216FF BA83126F
>	v_mov_b32_e32 v11, s15                                   ; 7E16020F
>	v_mac_f32_e32 v11, s16, v1                               ; 3E160210
>	v_add_f32_e64 v11, v11, 0 clamp                          ; D206080B 0001010B
>	v_log_f32_e32 v11, v11                                   ; 7E164F0B
>	v_mac_f32_e32 v8, v26, v18                               ; 3E10251A
>	v_mac_f32_e32 v6, s9, v0                                 ; 3E0C0009
>	v_mac_f32_e32 v7, s10, v0                                ; 3E0E000A
>	v_mul_legacy_f32_e32 v0, s17, v11                        ; 0E001611
>	v_mac_f32_e32 v15, v26, v22                              ; 3E1E2D1A
>	v_mac_f32_e32 v8, v27, v19                               ; 3E10271B
>	v_exp_f32_e32 v0, v0                                     ; 7E004B00
>	v_sub_f32_e64 v11, 1.0, s18                              ; D208000B 000024F2
>	v_mac_f32_e32 v11, s18, v0                               ; 3E160012
>	v_mac_f32_e32 v15, v27, v23                              ; 3E1E2F1B
>	v_mul_f32_e32 v0, v8, v16                                ; 10002108
>	v_add_f32_e32 v20, v20, v20                              ; 06282914
>	v_mad_f32 v0, v15, v5, -v0                               ; D2820000 84020B0F
>	v_mul_f32_e32 v13, v10, v15                              ; 101A1F0A
>	v_mac_f32_e32 v6, s12, v12                               ; 3E0C180C
>	v_mac_f32_e32 v7, s13, v12                               ; 3E0E180D
>	v_mul_f32_e32 v12, v5, v14                               ; 10181D05
>	v_mad_f32 v0, v20, v0, -v0                               ; D2820000 84020114
>	v_mul_f32_e32 v11, v11, v11                              ; 1016170B
>	v_mad_f32 v12, v16, v10, -v12                            ; D282000C 84321510
>	v_mad_f32 v13, v14, v8, -v13                             ; D282000D 8436110E
>	exp 15, 34, 0, 0, 0, v3, v4, v11, v0                     ; F800022F 000B0403
>	v_mad_f32 v12, v20, v12, -v12                            ; D282000C 84321914
>	v_mad_f32 v13, v20, v13, -v13                            ; D282000D 84361B14
>	exp 15, 35, 0, 0, 0, v10, v8, v5, v0                     ; F800023F 0005080A
>	exp 15, 36, 0, 0, 0, v12, v13, v14, v15                  ; F800024F 0F0E0D0C
>	exp 15, 37, 0, 0, 0, v16, v0, v0, v0                     ; F800025F 00000010
>	exp 15, 12, 0, 1, 0, v6, v7, v1, v9                      ; F80008CF 09010706
>	s_waitcnt expcnt(0)                                      ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 44
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2256 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v22, v4, 3, 3, [m0]                             ; C8580F04
>	v_interp_p2_f32 v22, [v22], v5, 3, 3, [m0]                      ; C8590F05
>	v_interp_p1_f32 v23, v4, 0, 4, [m0]                             ; C85C1004
>	v_interp_p2_f32 v23, [v23], v5, 0, 4, [m0]                      ; C85D1005
>	v_interp_p1_f32 v24, v4, 1, 4, [m0]                             ; C8601104
>	v_interp_p2_f32 v24, [v24], v5, 1, 4, [m0]                      ; C8611105
>	v_interp_p1_f32 v6, v4, 2, 4, [m0]                              ; C8181204
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	v_interp_p2_f32 v6, [v6], v5, 2, 4, [m0]                        ; C8191205
>	v_interp_p1_f32 v7, v4, 3, 4, [m0]                              ; C81C1304
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v7, [v7], v5, 3, 4, [m0]                        ; C81D1305
>	v_interp_p1_f32 v8, v4, 0, 5, [m0]                              ; C8201404
>	v_mov_b32_e32 v0, v2                                            ; 7E000302
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v8, [v8], v5, 0, 5, [m0]                        ; C8211405
>	v_interp_p1_f32 v2, v0, 0, 1, [m0]                              ; C8080400
>	v_interp_p2_f32 v2, [v2], v3, 0, 1, [m0]                        ; C8090403
>	v_interp_p1_f32 v1, v0, 1, 1, [m0]                              ; C8040500
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                        ; C8050503
>	v_interp_p1_f32 v10, v0, 2, 1, [m0]                             ; C8280600
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v25, s8, v2                                       ; 08320408
>	v_interp_p2_f32 v10, [v10], v3, 2, 1, [m0]                      ; C8290603
>	v_sub_f32_e32 v26, s9, v1                                       ; 08340209
>	v_mul_f32_e32 v9, v25, v25                                      ; 10123319
>	v_sub_f32_e32 v27, s12, v10                                     ; 0836140C
>	v_mac_f32_e32 v9, v26, v26                                      ; 3E12351A
>	v_mac_f32_e32 v9, v27, v27                                      ; 3E12371B
>	v_rsq_f32_e32 v28, v9                                           ; 7E385D09
>	v_mul_f32_e32 v9, v6, v6                                        ; 10120D06
>	v_mac_f32_e32 v9, v7, v7                                        ; 3E120F07
>	s_load_dwordx8 s[12:19], s[4:5], 0x30                           ; C0C60530
>	s_load_dwordx4 s[20:23], s[4:5], 0x3c                           ; C08A053C
>	v_mac_f32_e32 v9, v8, v8                                        ; 3E121108
>	v_rsq_f32_e32 v9, v9                                            ; 7E125D09
>	v_interp_p1_f32 v14, v0, 2, 0, [m0]                             ; C8380200
>	v_interp_p2_f32 v14, [v14], v3, 2, 0, [m0]                      ; C8390203
>	v_interp_p1_f32 v15, v0, 3, 0, [m0]                             ; C83C0300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_interp_p2_f32 v15, [v15], v3, 3, 0, [m0]                      ; C83D0303
>	v_mul_f32_e32 v18, v9, v6                                       ; 10240D09
>	v_mul_f32_e32 v17, v9, v7                                       ; 10220F09
>	v_mul_f32_e32 v12, v9, v8                                       ; 10181109
>	image_sample v[6:9], v[14:15], s[12:19], s[20:23] dmask:0xf     ; F0800F00 00A3060E
>	v_mov_b32_e32 v11, 0x3b808083                                   ; 7E1602FF 3B808083
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_cmp_gt_f32_e32 vcc, v11, v9                                   ; 7C08130B
>	v_mul_f32_e32 v20, v28, v25                                     ; 1028331C
>	v_mul_f32_e32 v21, v28, v26                                     ; 102A351C
>	v_mul_f32_e32 v19, v28, v27                                     ; 1026371C
>	v_cndmask_b32_e64 v11, 0, -1.0, vcc                             ; D200000B 01A9E680
>	v_cmpx_le_f32_e32 vcc, 0, v11                                   ; 7C261680
>	s_cbranch_execnz BB0_2                                          ; BF890000
>	exp 0, 9, 0, 1, 1, v0, v0, v0, v0                               ; F8001890 00000000
>	s_endpgm                                                        ; BF810000
>	s_load_dwordx8 s[12:19], s[4:5], 0x50                           ; C0C60550
>	s_load_dwordx4 s[20:23], s[4:5], 0x5c                           ; C08A055C
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	s_load_dwordx8 s[24:31], s[4:5], 0x60                           ; C0CC0560
>	s_buffer_load_dword s8, s[0:3], 0x10                            ; C2040110
>	s_buffer_load_dword s9, s[0:3], 0x11                            ; C2048111
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	image_sample v32, v[14:15], s[12:19], s[20:23] dmask:0x8        ; F0800800 00A3200E
>	s_load_dwordx4 s[20:23], s[4:5], 0x4c                           ; C08A054C
>	s_load_dwordx8 s[12:19], s[4:5], 0x40                           ; C0C60540
>	v_interp_p1_f32 v14, v0, 0, 2, [m0]                             ; C8380800
>	v_interp_p2_f32 v14, [v14], v3, 0, 2, [m0]                      ; C8390803
>	v_interp_p1_f32 v15, v0, 1, 2, [m0]                             ; C83C0900
>	v_interp_p2_f32 v15, [v15], v3, 1, 2, [m0]                      ; C83D0903
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	image_sample v[14:16], v[14:15], s[12:19], s[20:23] dmask:0xb   ; F0800B00 00A30E0E
>	v_interp_p1_f32 v30, v4, 0, 3, [m0]                             ; C8780C04
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v11, v15, v15                                     ; 06161F0F
>	v_mad_f32 v15, 2.0, v15, -1.0                                   ; D282000F 03CE1EF4
>	v_interp_p2_f32 v30, [v30], v5, 0, 3, [m0]                      ; C8790C05
>	v_interp_p1_f32 v31, v4, 1, 3, [m0]                             ; C87C0D04
>	v_mad_f32 v29, v11, v15, -v15                                   ; D282001D 843E1F0B
>	v_mad_f32 v11, 2.0, v16, -1.0                                   ; D282000B 03CE20F4
>	v_interp_p2_f32 v31, [v31], v5, 1, 3, [m0]                      ; C87D0D05
>	v_interp_p1_f32 v33, v4, 2, 3, [m0]                             ; C8840E04
>	v_mac_f32_e32 v29, v11, v11                                     ; 3E3A170B
>	v_add_f32_e32 v11, v16, v16                                     ; 06162110
>	v_interp_p2_f32 v33, [v33], v5, 2, 3, [m0]                      ; C8850E05
>	v_mad_f32 v4, v11, v30, -v30                                    ; D2820004 847A3D0B
>	v_mad_f32 v5, v11, v31, -v31                                    ; D2820005 847E3F0B
>	v_mad_f32 v11, v11, v33, -v33                                   ; D282000B 8486430B
>	v_mac_f32_e32 v4, v15, v22                                      ; 3E082D0F
>	v_mac_f32_e32 v5, v15, v23                                      ; 3E0A2F0F
>	v_mac_f32_e32 v11, v15, v24                                     ; 3E16310F
>	v_add_f32_e64 v15, v29, 0 clamp                                 ; D206080F 0001011D
>	v_sub_f32_e32 v15, 0x3f8020c5, v15                              ; 081E1EFF 3F8020C5
>	v_sqrt_f32_e32 v15, v15                                         ; 7E1E670F
>	v_mac_f32_e32 v4, v15, v18                                      ; 3E08250F
>	v_mul_f32_e32 v34, v20, v4                                      ; 10440914
>	v_mac_f32_e32 v5, v15, v17                                      ; 3E0A230F
>	v_mac_f32_e32 v11, v15, v12                                     ; 3E16190F
>	v_mac_f32_e32 v34, v21, v5                                      ; 3E440B15
>	v_mac_f32_e32 v34, v19, v11                                     ; 3E441713
>	v_mul_f32_e32 v15, v4, v34                                      ; 101E4504
>	v_mac_f32_e32 v15, v4, v34                                      ; 3E1E4504
>	v_mad_f32 v35, -v25, v28, v15                                   ; D2820023 243E3919
>	v_mul_f32_e32 v15, v5, v34                                      ; 101E4505
>	s_load_dwordx4 s[12:15], s[4:5], 0x6c                           ; C086056C
>	v_mac_f32_e32 v15, v5, v34                                      ; 3E1E4505
>	v_mad_f32 v36, -v26, v28, v15                                   ; D2820024 243E391A
>	v_mul_f32_e32 v15, v11, v34                                     ; 101E450B
>	v_mac_f32_e32 v15, v11, v34                                     ; 3E1E450B
>	v_mad_f32 v37, -v27, v28, v15                                   ; D2820025 243E391B
>	v_interp_p1_f32 v15, v0, 0, 0, [m0]                             ; C83C0000
>	v_interp_p2_f32 v15, [v15], v3, 0, 0, [m0]                      ; C83D0003
>	v_interp_p1_f32 v16, v0, 1, 0, [m0]                             ; C8400100
>	v_interp_p2_f32 v16, [v16], v3, 1, 0, [m0]                      ; C8410103
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s12, s12, s31                                         ; 870C1F0C
>	image_sample v[25:28], v[15:16], s[24:31], s[12:15] dmask:0xf   ; F0800F00 0066190F
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_add_f32_e32 v15, -0.5, v27                                    ; 061E36F1
>	v_add_f32_e32 v27, v15, v15                                     ; 06361F0F
>	v_add_f32_e32 v15, -0.5, v26                                    ; 061E34F1
>	v_add_f32_e32 v26, v15, v15                                     ; 06341F0F
>	v_mul_f32_e32 v16, v27, v31                                     ; 10203F1B
>	v_mac_f32_e32 v16, v26, v23                                     ; 3E202F1A
>	v_mul_f32_e32 v23, v26, v26                                     ; 102E351A
>	v_mac_f32_e32 v23, v27, v27                                     ; 3E2E371B
>	v_add_f32_e64 v23, v23, 0 clamp                                 ; D2060817 00010117
>	v_mul_f32_e32 v15, v27, v30                                     ; 101E3D1B
>	v_sub_f32_e32 v23, 1.0, v23                                     ; 082E2EF2
>	v_mac_f32_e32 v15, v26, v22                                     ; 3E1E2D1A
>	v_mul_f32_e32 v22, v27, v33                                     ; 102C431B
>	v_sqrt_f32_e32 v23, v23                                         ; 7E2E6717
>	v_mac_f32_e32 v22, v26, v24                                     ; 3E2C311A
>	v_mac_f32_e32 v15, v23, v18                                     ; 3E1E2517
>	v_mac_f32_e32 v16, v23, v17                                     ; 3E202317
>	v_mac_f32_e32 v22, v23, v12                                     ; 3E2C1917
>	v_mul_f32_e32 v23, v15, v35                                     ; 102E470F
>	v_mac_f32_e32 v23, v16, v36                                     ; 3E2E4910
>	s_buffer_load_dword s12, s[0:3], 0x12                           ; C2060112
>	v_mac_f32_e32 v23, v22, v37                                     ; 3E2E4B16
>	v_add_f32_e64 v23, v23, 0 clamp                                 ; D2060817 00010117
>	v_mad_f32 v26, 2.0, v28, -v23                                   ; D282001A 845E38F4
>	v_mov_b32_e32 v23, 0x403b800a                                   ; 7E2E02FF 403B800A
>	v_mad_f32 v24, v23, v18, v2                                     ; D2820018 040A2517
>	s_buffer_load_dword s13, s[0:3], 0x14                           ; C2068114
>	v_add_f32_e32 v27, v28, v28                                     ; 0636391C
>	v_mul_f32_e32 v33, v14, v25                                     ; 1042330E
>	v_mul_f32_e32 v25, s8, v24                                      ; 10323008
>	v_mul_f32_e32 v28, s9, v24                                      ; 10383009
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v29, s12, v24                                     ; 103A300C
>	s_buffer_load_dword s8, s[0:3], 0x15                            ; C2040115
>	s_buffer_load_dword s9, s[0:3], 0x16                            ; C2048116
>	s_buffer_load_dword s12, s[0:3], 0x18                           ; C2060118
>	v_mad_f32 v24, v23, v17, v1                                     ; D2820018 04062317
>	v_mac_f32_e32 v25, s13, v24                                     ; 3E32300D
>	v_mad_f32 v23, v23, v12, v10                                    ; D2820017 042A1917
>	s_buffer_load_dword s13, s[0:3], 0x19                           ; C2068119
>	s_buffer_load_dword s14, s[0:3], 0x1a                           ; C207011A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v28, s8, v24                                      ; 3E383008
>	v_mac_f32_e32 v29, s9, v24                                      ; 3E3A3009
>	v_mac_f32_e32 v25, s12, v23                                     ; 3E322E0C
>	s_buffer_load_dword s8, s[0:3], 0x1c                            ; C204011C
>	s_buffer_load_dword s9, s[0:3], 0x1d                            ; C204811D
>	s_buffer_load_dword s12, s[0:3], 0x1e                           ; C206011E
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                            ; C0CA0500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                            ; C08E050C
>	v_mac_f32_e32 v28, s13, v23                                     ; 3E382E0D
>	v_mac_f32_e32 v29, s14, v23                                     ; 3E3A2E0E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v24, s8, v25                                      ; 06303208
>	v_add_f32_e32 v25, s9, v28                                      ; 06323809
>	v_add_f32_e32 v23, s12, v29                                     ; 062E3A0C
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	image_sample_c v28, v[23:26], s[20:27], s[28:31] dmask:0x1      ; F0A00100 00E51C17
>	v_add_f32_e64 v23, v26, 0 clamp                                 ; D2060817 0001011A
>	v_log_f32_e32 v23, v23                                          ; 7E2E4F17
>	s_buffer_load_dword s8, s[0:3], 0x4                             ; C2040104
>	v_mul_f32_e32 v20, v18, v20                                     ; 10282912
>	v_sub_f32_e32 v25, 1.0, v32                                     ; 083240F2
>	v_mul_legacy_f32_e32 v23, 0x40400000, v23                       ; 0E2E2EFF 40400000
>	v_exp_f32_e32 v23, v23                                          ; 7E2E4B17
>	v_add_f32_e64 v23, v23, 0 clamp                                 ; D2060817 00010117
>	v_mov_b32_e32 v24, v23                                          ; 7E300317
>	s_buffer_load_dword s9, s[0:3], 0x5                             ; C2048105
>	v_mac_f32_e32 v20, v17, v21                                     ; 3E282B11
>	v_mul_f32_e32 v18, v18, v35                                     ; 10244712
>	v_mac_f32_e32 v24, 0xbe99999a, v32                              ; 3E3040FF BE99999A
>	v_mac_f32_e32 v25, 0x41a00000, v32                              ; 3E3240FF 41A00000
>	s_buffer_load_dword s20, s[0:3], 0x6                            ; C20A0106
>	v_mul_f32_e32 v24, v25, v24                                     ; 10303119
>	v_mad_f32 v17, -v36, v17, -v18                                  ; D2820011 A44A2324
>	v_mac_f32_e32 v20, v12, v19                                     ; 3E28270C
>	v_mad_f32 v12, -v37, v12, v17                                   ; D282000C 24461925
>	v_sub_f32_e32 v17, 1.0, v20                                     ; 082228F2
>	v_add_f32_e64 v24, v24, 0 clamp                                 ; D2060818 00010118
>	v_mul_f32_e32 v29, v24, v23                                     ; 103A2F18
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v23, s8, v15                                      ; 102E1E08
>	v_add_f32_e32 v12, 1.0, v12                                     ; 061818F2
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_mad_f32 v23, v16, -s9, -v23                                   ; D2820017 C45C1310
>	v_subrev_f32_e32 v12, v17, v12                                  ; 0A181911
>	v_mad_f32 v23, -v22, s20, v23                                   ; D2820017 245C2916
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	s_buffer_load_dword s21, s[0:3], 0xc                            ; C20A810C
>	s_buffer_load_dword s22, s[0:3], 0xd                            ; C20B010D
>	s_buffer_load_dword s23, s[0:3], 0xe                            ; C20B810E
>	v_sub_f32_e32 v17, 1.0, v12                                     ; 082218F2
>	v_add_f32_e64 v23, v23, 0 clamp                                 ; D2060817 00010117
>	v_mov_b32_e32 v30, 0x3f8ccccd                                   ; 7E3C02FF 3F8CCCCD
>	v_mad_f32 v12, -v12, v17, v17                                   ; D282000C 2446230C
>	v_mad_f32 v31, v27, v30, -v23                                   ; D282001F 845E3D1B
>	v_mul_f32_e32 v17, v12, v29                                     ; 10223B0C
>	v_add_f32_e64 v12, v31, 0 clamp                                 ; D206080C 0001011F
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v18, v28, v28                                     ; 1024391C
>	v_mul_f32_e32 v12, v12, v12                                     ; 1018190C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v19, s21, v18                                     ; 10262415
>	v_mul_f32_e32 v20, s22, v18                                     ; 10282416
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	v_mul_f32_e32 v18, s23, v18                                     ; 10242417
>	v_cubema_f32 v23, v4, v5, v11                                   ; D28E0017 042E0B04
>	v_mul_f32_e32 v20, v12, v20                                     ; 1028290C
>	v_mul_f32_e32 v19, v12, v19                                     ; 1026270C
>	v_mul_f32_e32 v12, v12, v18                                     ; 1018250C
>	v_mul_f32_e32 v18, s8, v4                                       ; 10240808
>	v_mad_f32 v18, v5, -s9, -v18                                    ; D2820012 C4481305
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                           ; C0C60510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                           ; C090051C
>	v_rcp_f32_e64 v23, |v23|                                        ; D3540117 00000117
>	v_mad_f32 v18, -v11, s20, v18                                   ; D2820012 2448290B
>	s_load_dwordx4 s[28:31], s[4:5], 0x2c                           ; C08E052C
>	s_load_dwordx8 s[20:27], s[4:5], 0x20                           ; C0CA0520
>	v_add_f32_e64 v21, v18, 0 clamp                                 ; D2060815 00010112
>	v_mul_f32_e32 v18, v14, v19                                     ; 1024270E
>	v_mul_f32_e32 v12, v14, v12                                     ; 1018190E
>	v_cubetc_f32 v25, v4, v5, v11                                   ; D28C0019 042E0B04
>	v_mov_b32_e32 v24, 0x3fc00000                                   ; 7E3002FF 3FC00000
>	v_cubesc_f32 v38, v4, v5, v11                                   ; D28A0026 042E0B04
>	v_mul_f32_e32 v20, v14, v20                                     ; 1028290E
>	v_mad_f32 v26, v23, v25, v24                                    ; D282001A 04623317
>	v_mad_f32 v25, v23, v38, v24                                    ; D2820019 04624D17
>	v_mul_f32_e32 v23, v30, v27                                     ; 102E371E
>	v_mul_f32_e32 v19, v18, v21                                     ; 10262B12
>	v_mul_f32_e32 v18, v20, v21                                     ; 10242B14
>	v_mul_f32_e32 v12, v12, v21                                     ; 10182B0C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v27, v4, v5, v11                                   ; D288001B 042E0B04
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	v_mov_b32_e32 v20, 0x40c00000                                   ; 7E2802FF 40C00000
>	image_sample v[28:31], v[25:28], s[12:19], s[32:35] dmask:0xf   ; F0800F00 01031C19
>	v_mad_f32 v27, -v32, v20, v20                                   ; D282001B 24522920
>	v_add_f32_e64 v20, v34, 0 clamp                                 ; D2060814 00010122
>	v_sub_f32_e32 v20, 1.0, v20                                     ; 082828F2
>	v_log_f32_e32 v20, v20                                          ; 7E284F14
>	v_max_f32_e32 v21, 0, v32                                       ; 202A4080
>	v_cubetc_f32 v25, v35, v36, v37                                 ; D28C0019 04964923
>	v_cubesc_f32 v32, v35, v36, v37                                 ; D28A0020 04964923
>	v_mul_legacy_f32_e32 v20, 0x40a00000, v20                       ; 0E2828FF 40A00000
>	v_exp_f32_e32 v20, v20                                          ; 7E284B14
>	v_mul_f32_e32 v20, v21, v20                                     ; 10282915
>	v_cubema_f32 v21, v35, v36, v37                                 ; D28E0015 04964923
>	v_rcp_f32_e64 v21, |v21|                                        ; D3540115 00000115
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v26, v35, v36, v37                                 ; D288001A 04964923
>	v_mad_f32 v25, v21, v25, v24                                    ; D2820019 04623315
>	v_mac_f32_e32 v24, v21, v32                                     ; 3E304115
>	image_sample_l v[25:27], v[24:27], s[20:27], s[28:31] dmask:0x7 ; F0900700 00E51918
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v24, v25, v20                                     ; 10302919
>	v_mul_f32_e32 v21, v26, v20                                     ; 102A291A
>	v_mul_f32_e32 v20, v27, v20                                     ; 1028291B
>	v_mul_f32_e32 v25, v31, v28                                     ; 1032391F
>	v_mul_f32_e32 v28, 4.0, v33                                     ; 103842F6
>	v_mul_f32_e32 v26, v31, v29                                     ; 10343B1F
>	v_mul_f32_e32 v27, v31, v30                                     ; 10363D1F
>	v_mac_f32_e32 v19, v28, v25                                     ; 3E26331C
>	v_mac_f32_e32 v18, v28, v26                                     ; 3E24351C
>	v_mac_f32_e32 v12, v28, v27                                     ; 3E18371C
>	v_mov_b32_e32 v25, 0xc8                                         ; 7E3202FF 000000C8
>	v_mov_b32_e32 v26, 0                                            ; 7E340280
>	s_branch BB0_4                                                  ; BF820000
>	v_add_i32_e32 v27, vcc, 0xffffffe8, v25                         ; 4A3632FF FFFFFFE8
>	buffer_load_dword v27, v27, s[0:3], 0 offen                     ; E0301000 80001B1B
>	v_add_i32_e32 v28, vcc, 0xffffffec, v25                         ; 4A3832FF FFFFFFEC
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_add_i32_e32 v29, vcc, -16, v25                                ; 4A3A32D0
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -12, v25                                ; 4A3C32CC
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v26, vcc, 1, v26                                  ; 4A343481
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v27, v2, v27                                   ; 0A363702
>	v_mul_f32_e32 v31, v27, v27                                     ; 103E371B
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v28, v1, v28                                   ; 0A383901
>	v_mac_f32_e32 v31, v28, v28                                     ; 3E3E391C
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_subrev_f32_e32 v29, v10, v29                                  ; 0A3A3B0A
>	v_mac_f32_e32 v31, v29, v29                                     ; 3E3E3B1D
>	v_rsq_f32_e32 v32, v31                                          ; 7E405D1F
>	v_mul_f32_e32 v27, v32, v27                                     ; 10363720
>	v_mul_f32_e32 v33, v15, v27                                     ; 1042370F
>	v_mul_f32_e32 v28, v32, v28                                     ; 10383920
>	v_mul_f32_e32 v27, v4, v27                                      ; 10363704
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v33, v16, v28                                     ; 3E423910
>	v_mac_f32_e32 v27, v5, v28                                      ; 3E363905
>	v_add_i32_e32 v28, vcc, -8, v25                                 ; 4A3832C8
>	v_mac_f32_e32 v33, v22, v29                                     ; 3E423B16
>	v_mac_f32_e32 v27, v11, v29                                     ; 3E363B0B
>	v_add_i32_e32 v29, vcc, -4, v25                                 ; 4A3A32C4
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_mul_f32_e32 v31, v32, v31                                     ; 103E3F20
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mul_f32_e32 v30, v30, v31                                     ; 103C3F1E
>	buffer_load_dword v31, v25, s[0:3], 0 offen                     ; E0301000 80001F19
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_subrev_f32_e32 v33, v33, v23                                  ; 0A422F21
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_mul_f32_e32 v33, v33, v33                                     ; 10424321
>	v_mul_f32_e32 v33, v33, v33                                     ; 10424321
>	v_add_f32_e64 v30, v30, 0 clamp                                 ; D206081E 0001011E
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_sub_f32_e32 v34, 1.0, v32                                     ; 084440F2
>	v_mac_f32_e32 v32, v34, v33                                     ; 3E404322
>	v_add_f32_e64 v27, v27, 0 clamp                                 ; D206081B 0001011B
>	v_add_i32_e32 v25, vcc, 32, v25                                 ; 4A3232A0
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v28, -v30, v28, v28                                   ; D282001C 2472391E
>	v_mul_f32_e32 v28, v32, v28                                     ; 10383920
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mad_f32 v29, -v30, v29, v29                                   ; D282001D 24763B1E
>	v_mul_f32_e32 v28, v14, v28                                     ; 1038390E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v30, -v30, v31, v31                                   ; D282001E 247E3F1E
>	v_mul_f32_e32 v29, v32, v29                                     ; 103A3B20
>	v_mac_f32_e32 v19, v28, v27                                     ; 3E26371C
>	v_mul_f32_e32 v28, v14, v29                                     ; 10383B0E
>	v_mul_f32_e32 v30, v32, v30                                     ; 103C3D20
>	v_mac_f32_e32 v18, v28, v27                                     ; 3E24371C
>	v_mul_f32_e32 v28, v14, v30                                     ; 10383D0E
>	v_mac_f32_e32 v12, v28, v27                                     ; 3E18371C
>	v_cmp_lt_i32_e32 vcc, 2, v26                                    ; 7D023482
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_3                                            ; BF860000
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v2, v17, v24                                      ; 10043111
>	v_mac_f32_e32 v2, v6, v19                                       ; 3E042706
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v6, s4                                            ; 7E0C0204
>	v_sub_f32_e32 v6, s5, v6                                        ; 080C0C05
>	v_add_f32_e32 v6, 0x3a83126f, v6                                ; 060C0CFF 3A83126F
>	v_rcp_f32_e32 v6, v6                                            ; 7E0C5506
>	v_subrev_f32_e32 v1, s4, v1                                     ; 0A020204
>	v_max_f32_e32 v1, 0, v1                                         ; 20020280
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	v_mul_f32_e32 v1, v6, v1                                        ; 10020306
>	v_log_f32_e32 v1, v1                                            ; 7E024F01
>	v_floor_f32_e32 v6, s5                                          ; 7E0C4805
>	v_sub_f32_e32 v6, s5, v6                                        ; 080C0C05
>	v_mul_f32_e32 v6, 0x41000000, v6                                ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v1, v6, v1                                 ; 0E020306
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_interp_p1_f32 v0, v0, 2, 2, [m0]                              ; C8000A00
>	v_exp_f32_e32 v1, v1                                            ; 7E024B01
>	v_add_f32_e64 v1, v1, 0 clamp                                   ; D2060801 00010101
>	v_interp_p2_f32 v0, [v0], v3, 2, 2, [m0]                        ; C8010A03
>	v_mul_f32_e32 v3, v1, v0                                        ; 10060101
>	v_mul_f32_e32 v4, v17, v21                                      ; 10082B11
>	v_mul_f32_e32 v5, v17, v20                                      ; 100A2911
>	v_mad_f32 v0, -v3, s6, s6                                       ; D2820000 20180D03
>	v_mac_f32_e32 v0, v3, v2                                        ; 3E000503
>	v_mac_f32_e32 v4, v7, v18                                       ; 3E082507
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v1, -v3, s7, s7                                       ; D2820001 201C0F03
>	v_mac_f32_e32 v5, v8, v12                                       ; 3E0A1908
>	v_mad_f32 v2, -v3, s0, s0                                       ; D2820002 20000103
>	v_mac_f32_e32 v1, v3, v4                                        ; 3E020903
>	v_mac_f32_e32 v2, v3, v5                                        ; 3E040B03
>	v_mov_b32_e32 v3, v9                                            ; 7E060309
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2000 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].x, GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..24]
>DCL TEMP[0..56], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000,     2.0000,     1.3000,     1.8500}
>IMM[1] FLT32 {   -0.0000,    -0.3000,     0.8000,     1.0000}
>IMM[2] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[3] FLT32 {    0.3333,     4.0000,     5.0000,     0.2500}
>IMM[4] FLT32 {    0.0000,     0.0000,     0.0010,     8.0000}
>IMM[5] INT32 {0, 4, 2, 1}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[2].xyzz, IN[2].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[2].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xyz, CONST[23].xyzx
>  8: MOV TEMP[2].w, CONST[24].xxxx
>  9: MOV TEMP[3].x, IMM[0].xxxx
> 10: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[0].xyzz
> 11: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[1].xyzz
> 12: MUL TEMP[4].xyz, IMM[0].yyyy, TEMP[4].xyzz
> 13: ADD TEMP[4].xyz, TEMP[0].xyzz, -TEMP[4].xyzz
> 14: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[1].xyzz
> 15: ADD TEMP[4].x, TEMP[4].xxxx, IMM[0].xxxx
> 16: DP3 TEMP[5].x, TEMP[0].xyzz, TEMP[1].xyzz
> 17: ADD TEMP[5].x, IMM[0].xxxx, -TEMP[5].xxxx
> 18: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 19: ADD TEMP[4].x, TEMP[4].xxxx, -TEMP[5].xxxx
> 20: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 21: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 22: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 23: MOV TEMP[3].y, TEMP[4].xxxx
> 24: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[0].xyzz
> 25: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[1].xyzz
> 26: MAD TEMP[4].xyz, IMM[0].yyyy, TEMP[4].xyzz, -TEMP[0].xyzz
> 27: MOV TEMP[5].xyz, TEMP[1].xyzx
> 28: MUL TEMP[6].x, TEMP[1].yyyy, TEMP[1].yyyy
> 29: MAD TEMP[6].x, TEMP[1].xxxx, TEMP[1].xxxx, -TEMP[6].xxxx
> 30: MOV TEMP[5].w, TEMP[6].xxxx
> 31: MOV TEMP[6].xyz, TEMP[4].xyzx
> 32: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[4].yyyy
> 33: MAD TEMP[7].x, TEMP[4].xxxx, TEMP[4].xxxx, -TEMP[7].xxxx
> 34: MOV TEMP[6].w, TEMP[7].xxxx
> 35: DP4 TEMP[5].x, CONST[19], TEMP[5]
> 36: DP4 TEMP[6].x, CONST[19], TEMP[6]
> 37: MOV TEMP[5].y, TEMP[6].xxxx
> 38: MUL TEMP[6], TEMP[1].xyzz, TEMP[1].yzxz
> 39: DP4 TEMP[6].x, CONST[20], TEMP[6]
> 40: MUL TEMP[4], TEMP[4].xyzz, TEMP[4].yzxz
> 41: DP4 TEMP[4].x, CONST[20], TEMP[4]
> 42: MOV TEMP[6].y, TEMP[4].xxxx
> 43: ADD TEMP[4].xy, TEMP[5].xyyy, TEMP[6].xyyy
> 44: ADD TEMP[4].xy, TEMP[4].xyyy, CONST[21].xxxx
> 45: MAD TEMP[4].xy, TEMP[4].xyyy, IMM[0].zwww, IMM[1].xyyy
> 46: MOV_SAT TEMP[4].xy, TEMP[4].xyyy
> 47: MUL TEMP[4].xy, TEMP[4].xyyy, IMM[1].zwww
> 48: ADD TEMP[4].xy, IMM[0].xxxx, -TEMP[4].xyyy
> 49: MUL TEMP[4].xy, TEMP[3].xyyy, TEMP[4].xyyy
> 50: MOV TEMP[5].w, IMM[0].xxxx
> 51: MAD TEMP[5].xyz, IMM[2].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 52: MUL TEMP[6], CONST[4], TEMP[5].xxxx
> 53: MAD TEMP[6], CONST[5], TEMP[5].yyyy, TEMP[6]
> 54: MAD TEMP[5], CONST[6], TEMP[5].zzzz, TEMP[6]
> 55: ADD TEMP[5], TEMP[5], CONST[7]
> 56: MAD TEMP[6].x, IMM[2].yyyy, CONST[24].yyyy, IMM[0].yyyy
> 57: EX2 TEMP[6].x, TEMP[6].xxxx
> 58: MOV TEMP[7].xyz, -CONST[1].xyzx
> 59: ADD TEMP[8].xyz, TEMP[7].xyzz, TEMP[0].xyzz
> 60: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[2].zzzz
> 61: DP3 TEMP[9].x, TEMP[8].xyzz, TEMP[8].xyzz
> 62: RSQ TEMP[9].x, TEMP[9].xxxx
> 63: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[9].xxxx
> 64: DP3 TEMP[9].x, TEMP[7].xyzz, TEMP[1].xyzz
> 65: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 66: MOV TEMP[10].xy, TEMP[5].xyyy
> 67: MOV TEMP[10].w, IMM[0].xxxx
> 68: MOV TEMP[10].z, TEMP[5].zzzz
> 69: TXP TEMP[5], TEMP[10], SAMP[0], SHADOW2D
> 70: MOV TEMP[10].x, TEMP[5].xxxx
> 71: MUL TEMP[5].x, TEMP[5].xxxx, TEMP[5].xxxx
> 72: MUL TEMP[5].xyz, CONST[3].xyzz, TEMP[5].xxxx
> 73: MUL TEMP[5].xyz, TEMP[9].xxxx, TEMP[5].xyzz
> 74: MOV TEMP[10].xyz, TEMP[1].xyzz
> 75: TEX TEMP[10], TEMP[10], SAMP[1], CUBE
> 76: MOV TEMP[11], TEMP[10]
> 77: DP3 TEMP[11].x, TEMP[1].xyzz, TEMP[0].xyzz
> 78: MUL TEMP[11].xyz, TEMP[11].xxxx, TEMP[1].xyzz
> 79: MAD TEMP[11].xyz, IMM[0].yyyy, TEMP[11].xyzz, -TEMP[0].xyzz
> 80: ADD TEMP[12].x, IMM[0].xxxx, -CONST[24].yyyy
> 81: MUL TEMP[12].x, TEMP[12].xxxx, IMM[2].wwww
> 82: MOV TEMP[11].w, TEMP[12].xxxx
> 83: DP3 TEMP[13].x, CONST[22].xyzz, IMM[3].xxxx
> 84: ADD TEMP[14].x, IMM[0].xxxx, -TEMP[13].xxxx
> 85: MOV_SAT TEMP[14].x, TEMP[14].xxxx
> 86: MUL TEMP[10].xyz, TEMP[10].xyzz, TEMP[10].wwww
> 87: MUL TEMP[10].xyz, TEMP[10].xyzz, IMM[3].yyyy
> 88: MUL TEMP[10].xyz, TEMP[14].xxxx, TEMP[10].xyzz
> 89: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
> 90: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 91: MUL TEMP[13].xyz, TEMP[5].xyzz, TEMP[13].xxxx
> 92: MAD TEMP[10].xyz, TEMP[10].xyzz, TEMP[4].xxxx, TEMP[13].xyzz
> 93: DP3 TEMP[13].x, TEMP[0].xyzz, TEMP[1].xyzz
> 94: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 95: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[13].xxxx
> 96: POW TEMP[13].x, TEMP[13].xxxx, IMM[3].zzzz
> 97: MAX TEMP[14].xyz, CONST[24].yyyy, CONST[22].xyzz
> 98: ADD TEMP[14].xyz, TEMP[14].xyzz, -CONST[22].xyzz
> 99: MAD TEMP[13].xyz, TEMP[13].xxxx, TEMP[14].xyzz, CONST[22].xyzz
>100: MOV TEMP[11].xyz, TEMP[11].xyzz
>101: MOV TEMP[11].w, TEMP[12].xxxx
>102: TXL TEMP[11], TEMP[11], SAMP[2], CUBE
>103: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[8].xyzz
>104: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>105: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[7].xxxx
>106: POW TEMP[7].x, TEMP[7].xxxx, IMM[3].zzzz
>107: ADD TEMP[12].xyz, IMM[0].xxxx, -CONST[22].xyzz
>108: MAD TEMP[7].xyz, TEMP[7].xxxx, TEMP[12].xyzz, CONST[22].xyzz
>109: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xyzz
>110: ADD TEMP[7].x, TEMP[6].xxxx, IMM[0].yyyy
>111: MUL TEMP[7].x, TEMP[7].xxxx, IMM[3].wwww
>112: MUL TEMP[12].x, -TEMP[6].xxxx, IMM[2].zzzz
>113: EX2 TEMP[12].x, TEMP[12].xxxx
>114: ADD TEMP[12].x, IMM[0].yyyy, -TEMP[12].xxxx
>115: RCP TEMP[12].x, TEMP[12].xxxx
>116: MUL TEMP[7].x, TEMP[7].xxxx, TEMP[12].xxxx
>117: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>118: DP3 TEMP[7].x, TEMP[1].xyzz, TEMP[8].xyzz
>119: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>120: POW TEMP[7].x, TEMP[7].xxxx, TEMP[6].xxxx
>121: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>122: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[1].xyzz
>123: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>124: MAX TEMP[7].x, TEMP[9].xxxx, TEMP[7].xxxx
>125: ADD TEMP[7].x, TEMP[7].xxxx, IMM[4].xxxx
>126: RCP TEMP[7].x, TEMP[7].xxxx
>127: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[7].xxxx
>128: MAD TEMP[5].xyz, TEMP[13].xyzz, TEMP[11].xyzz, TEMP[5].xyzz
>129: MUL TEMP[4].xyz, TEMP[5].xyzz, TEMP[4].yyyy
>130: MOV TEMP[5].x, IMM[5].xxxx
>131: BGNLOOP :0
>132:   ISGE TEMP[7].x, TEMP[5].xxxx, IMM[5].yyyy
>133:   UIF TEMP[7].xxxx :0
>134:     BRK
>135:   ENDIF
>136:   UMUL TEMP[8].x, TEMP[5].xxxx, IMM[5].zzzz
>137:   UARL ADDR[0].x, TEMP[8].xxxx
>138:   UARL ADDR[0].x, TEMP[8].xxxx
>139:   ADD TEMP[9].xyz, CONST[ADDR[0].x+11].xyzz, -IN[0].xyzz
>140:   DP3 TEMP[11].x, TEMP[9].xyzz, TEMP[9].xyzz
>141:   RSQ TEMP[12].x, TEMP[11].xxxx
>142:   MUL TEMP[13].xyz, TEMP[9].xyzz, TEMP[12].xxxx
>143:   ADD TEMP[14].xyz, TEMP[13].xyzz, TEMP[0].xyzz
>144:   MUL TEMP[15].xyz, TEMP[14].xyzz, IMM[2].zzzz
>145:   DP3 TEMP[16].x, TEMP[15].xyzz, TEMP[15].xyzz
>146:   RSQ TEMP[17].x, TEMP[16].xxxx
>147:   MUL TEMP[18].xyz, TEMP[15].xyzz, TEMP[17].xxxx
>148:   DP3 TEMP[19].x, TEMP[13].xyzz, TEMP[1].xyzz
>149:   MOV_SAT TEMP[20].x, TEMP[19].xxxx
>150:   UMAD TEMP[21].x, TEMP[5].xxxx, IMM[5].zzzz, IMM[5].wwww
>151:   MUL TEMP[22].x, TEMP[11].xxxx, TEMP[12].xxxx
>152:   UMUL TEMP[23].x, TEMP[5].xxxx, IMM[5].zzzz
>153:   UARL ADDR[0].x, TEMP[23].xxxx
>154:   MUL TEMP[24].x, TEMP[22].xxxx, CONST[ADDR[0].x+11].wwww
>155:   MOV_SAT TEMP[25].x, TEMP[24].xxxx
>156:   ADD TEMP[26].x, IMM[0].xxxx, -TEMP[25].xxxx
>157:   UARL ADDR[0].x, TEMP[21].xxxx
>158:   MUL TEMP[27].xyz, CONST[ADDR[0].x+11].xyzz, TEMP[26].xxxx
>159:   MUL TEMP[28].xyz, TEMP[20].xxxx, TEMP[27].xyzz
>160:   DP3 TEMP[29].x, CONST[22].xyzz, IMM[3].xxxx
>161:   ADD TEMP[30].x, IMM[0].xxxx, -TEMP[29].xxxx
>162:   MOV_SAT TEMP[31].x, TEMP[30].xxxx
>163:   MAD TEMP[10].xyz, TEMP[28].xyzz, TEMP[31].xxxx, TEMP[10].xyzz
>164:   DP3 TEMP[32].x, TEMP[13].xyzz, TEMP[18].xyzz
>165:   MOV_SAT TEMP[33].x, TEMP[32].xxxx
>166:   ADD TEMP[34].x, IMM[0].xxxx, -TEMP[33].xxxx
>167:   POW TEMP[35].x, TEMP[34].xxxx, IMM[3].zzzz
>168:   ADD TEMP[36].xyz, IMM[0].xxxx, -CONST[22].xyzz
>169:   MAD TEMP[37].xyz, TEMP[35].xxxx, TEMP[36].xyzz, CONST[22].xyzz
>170:   MUL TEMP[38].xyz, TEMP[28].xyzz, TEMP[37].xyzz
>171:   ADD TEMP[39].x, TEMP[6].xxxx, IMM[0].yyyy
>172:   MUL TEMP[40].x, TEMP[39].xxxx, IMM[3].wwww
>173:   MUL TEMP[41].x, -TEMP[6].xxxx, IMM[2].zzzz
>174:   EX2 TEMP[42].x, TEMP[41].xxxx
>175:   ADD TEMP[43].x, IMM[0].yyyy, -TEMP[42].xxxx
>176:   RCP TEMP[44].x, TEMP[43].xxxx
>177:   MUL TEMP[45].x, TEMP[40].xxxx, TEMP[44].xxxx
>178:   MUL TEMP[46].xyz, TEMP[38].xyzz, TEMP[45].xxxx
>179:   DP3 TEMP[47].x, TEMP[1].xyzz, TEMP[18].xyzz
>180:   MOV_SAT TEMP[48].x, TEMP[47].xxxx
>181:   POW TEMP[49].x, TEMP[48].xxxx, TEMP[6].xxxx
>182:   MUL TEMP[50].xyz, TEMP[46].xyzz, TEMP[49].xxxx
>183:   DP3 TEMP[51].x, TEMP[0].xyzz, TEMP[1].xyzz
>184:   MOV_SAT TEMP[52].x, TEMP[51].xxxx
>185:   MAX TEMP[53].x, TEMP[20].xxxx, TEMP[52].xxxx
>186:   ADD TEMP[54].x, TEMP[53].xxxx, IMM[4].xxxx
>187:   RCP TEMP[55].x, TEMP[54].xxxx
>188:   MUL TEMP[56].xyz, TEMP[50].xyzz, TEMP[55].xxxx
>189:   MAD TEMP[4].xyz, TEMP[56].xyzz, TEMP[3].yyyy, TEMP[4].xyzz
>190:   UADD TEMP[5].x, TEMP[5].xxxx, IMM[5].wwww
>191: ENDLOOP :0
>192: MAD TEMP[0].xyz, TEMP[10].xyzz, CONST[23].xyzz, TEMP[4].xyzz
>193: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>194: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].yyyy
>195: ADD TEMP[3].x, CONST[1].wwww, -CONST[0].wwww
>196: ADD TEMP[3].x, TEMP[3].xxxx, IMM[4].zzzz
>197: RCP TEMP[3].x, TEMP[3].xxxx
>198: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
>199: FRC TEMP[3].x, CONST[1].wwww
>200: MUL TEMP[3].x, TEMP[3].xxxx, IMM[4].wwww
>201: POW TEMP[1].x, TEMP[1].xxxx, TEMP[3].xxxx
>202: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>203: MUL TEMP[1].x, IN[1].xxxx, TEMP[1].xxxx
>204: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>205: MOV TEMP[0].w, TEMP[2].wwww
>206: MOV OUT[0], TEMP[0]
>207: END
>radeonsi: Compiling shader 135
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %66 = load <16 x i8>, <16 x i8> addrspace(2)* %65, align 16, !invariant.load !0
>  %67 = call float @llvm.SI.load.const(<16 x i8> %66, i32 384)
>  %68 = fmul float %60, %43
>  %69 = fmul float %62, %44
>  %70 = fadd float %69, %68
>  %71 = fmul float %64, %45
>  %72 = fadd float %70, %71
>  %73 = fmul float %72, %60
>  %74 = fmul float %72, %62
>  %75 = fmul float %72, %64
>  %76 = fmul float %73, 2.000000e+00
>  %77 = fmul float %74, 2.000000e+00
>  %78 = fmul float %75, 2.000000e+00
>  %79 = fsub float %43, %76
>  %80 = fsub float %44, %77
>  %81 = fsub float %45, %78
>  %82 = fmul float %79, %60
>  %83 = fmul float %80, %62
>  %84 = fadd float %83, %82
>  %85 = fmul float %81, %64
>  %86 = fadd float %84, %85
>  %87 = fadd float %86, 1.000000e+00
>  %88 = fmul float %43, %60
>  %89 = fmul float %44, %62
>  %90 = fadd float %89, %88
>  %91 = fmul float %45, %64
>  %92 = fadd float %90, %91
>  %93 = fsub float 1.000000e+00, %92
>  %94 = call float @llvm.AMDGPU.clamp.(float %93, float 0.000000e+00, float 1.000000e+00)
>  %95 = fsub float %87, %94
>  %96 = call float @llvm.AMDGPU.clamp.(float %95, float 0.000000e+00, float 1.000000e+00)
>  %97 = fsub float 1.000000e+00, %96
>  %98 = fmul float %97, %97
>  %99 = fmul float %60, %43
>  %100 = fmul float %62, %44
>  %101 = fadd float %100, %99
>  %102 = fmul float %64, %45
>  %103 = fadd float %101, %102
>  %104 = fmul float %103, %60
>  %105 = fmul float %103, %62
>  %106 = fmul float %103, %64
>  %107 = fmul float %104, 2.000000e+00
>  %108 = fsub float %107, %43
>  %109 = fmul float %105, 2.000000e+00
>  %110 = fsub float %109, %44
>  %111 = fmul float %106, 2.000000e+00
>  %112 = fsub float %111, %45
>  %113 = fmul float %62, %62
>  %114 = fmul float %60, %60
>  %115 = fsub float %114, %113
>  %116 = fmul float %110, %110
>  %117 = fmul float %108, %108
>  %118 = fsub float %117, %116
>  %119 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %120 = load <16 x i8>, <16 x i8> addrspace(2)* %119, align 16, !invariant.load !0
>  %121 = call float @llvm.SI.load.const(<16 x i8> %120, i32 304)
>  %122 = call float @llvm.SI.load.const(<16 x i8> %120, i32 308)
>  %123 = call float @llvm.SI.load.const(<16 x i8> %120, i32 312)
>  %124 = call float @llvm.SI.load.const(<16 x i8> %120, i32 316)
>  %125 = fmul float %121, %60
>  %126 = fmul float %122, %62
>  %127 = fadd float %125, %126
>  %128 = fmul float %123, %64
>  %129 = fadd float %127, %128
>  %130 = fmul float %124, %115
>  %131 = fadd float %129, %130
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 304)
>  %135 = call float @llvm.SI.load.const(<16 x i8> %133, i32 308)
>  %136 = call float @llvm.SI.load.const(<16 x i8> %133, i32 312)
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 316)
>  %138 = fmul float %134, %108
>  %139 = fmul float %135, %110
>  %140 = fadd float %138, %139
>  %141 = fmul float %136, %112
>  %142 = fadd float %140, %141
>  %143 = fmul float %137, %118
>  %144 = fadd float %142, %143
>  %145 = fmul float %60, %62
>  %146 = fmul float %62, %64
>  %147 = fmul float %64, %60
>  %148 = fmul float %64, %64
>  %149 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %150 = load <16 x i8>, <16 x i8> addrspace(2)* %149, align 16, !invariant.load !0
>  %151 = call float @llvm.SI.load.const(<16 x i8> %150, i32 320)
>  %152 = call float @llvm.SI.load.const(<16 x i8> %150, i32 324)
>  %153 = call float @llvm.SI.load.const(<16 x i8> %150, i32 328)
>  %154 = call float @llvm.SI.load.const(<16 x i8> %150, i32 332)
>  %155 = fmul float %151, %145
>  %156 = fmul float %152, %146
>  %157 = fadd float %155, %156
>  %158 = fmul float %153, %147
>  %159 = fadd float %157, %158
>  %160 = fmul float %154, %148
>  %161 = fadd float %159, %160
>  %162 = fmul float %108, %110
>  %163 = fmul float %110, %112
>  %164 = fmul float %112, %108
>  %165 = fmul float %112, %112
>  %166 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %167 = load <16 x i8>, <16 x i8> addrspace(2)* %166, align 16, !invariant.load !0
>  %168 = call float @llvm.SI.load.const(<16 x i8> %167, i32 320)
>  %169 = call float @llvm.SI.load.const(<16 x i8> %167, i32 324)
>  %170 = call float @llvm.SI.load.const(<16 x i8> %167, i32 328)
>  %171 = call float @llvm.SI.load.const(<16 x i8> %167, i32 332)
>  %172 = fmul float %168, %162
>  %173 = fmul float %169, %163
>  %174 = fadd float %172, %173
>  %175 = fmul float %170, %164
>  %176 = fadd float %174, %175
>  %177 = fmul float %171, %165
>  %178 = fadd float %176, %177
>  %179 = fadd float %131, %161
>  %180 = fadd float %144, %178
>  %181 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %182 = load <16 x i8>, <16 x i8> addrspace(2)* %181, align 16, !invariant.load !0
>  %183 = call float @llvm.SI.load.const(<16 x i8> %182, i32 336)
>  %184 = fadd float %179, %183
>  %185 = call float @llvm.SI.load.const(<16 x i8> %182, i32 336)
>  %186 = fadd float %180, %185
>  %187 = fmul float %184, 0x3FF4CCCCC0000000
>  %188 = fmul float %186, 0x3FFD9999A0000000
>  %189 = fadd float %188, 0xBFD3333340000000
>  %190 = call float @llvm.AMDGPU.clamp.(float %187, float 0.000000e+00, float 1.000000e+00)
>  %191 = call float @llvm.AMDGPU.clamp.(float %189, float 0.000000e+00, float 1.000000e+00)
>  %192 = fmul float %190, 0x3FE99999A0000000
>  %193 = fsub float 1.000000e+00, %192
>  %194 = fsub float 1.000000e+00, %191
>  %195 = fmul float %98, %194
>  %196 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %197 = fmul float %60, 0x4007700140000000
>  %198 = fadd float %197, %196
>  %199 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %200 = fmul float %62, 0x4007700140000000
>  %201 = fadd float %200, %199
>  %202 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %203 = fmul float %64, 0x4007700140000000
>  %204 = fadd float %203, %202
>  %205 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %206 = load <16 x i8>, <16 x i8> addrspace(2)* %205, align 16, !invariant.load !0
>  %207 = call float @llvm.SI.load.const(<16 x i8> %206, i32 64)
>  %208 = fmul float %207, %198
>  %209 = call float @llvm.SI.load.const(<16 x i8> %206, i32 68)
>  %210 = fmul float %209, %198
>  %211 = call float @llvm.SI.load.const(<16 x i8> %206, i32 72)
>  %212 = fmul float %211, %198
>  %213 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %214 = load <16 x i8>, <16 x i8> addrspace(2)* %213, align 16, !invariant.load !0
>  %215 = call float @llvm.SI.load.const(<16 x i8> %214, i32 80)
>  %216 = fmul float %215, %201
>  %217 = fadd float %216, %208
>  %218 = call float @llvm.SI.load.const(<16 x i8> %214, i32 84)
>  %219 = fmul float %218, %201
>  %220 = fadd float %219, %210
>  %221 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %222 = load <16 x i8>, <16 x i8> addrspace(2)* %221, align 16, !invariant.load !0
>  %223 = call float @llvm.SI.load.const(<16 x i8> %222, i32 88)
>  %224 = fmul float %223, %201
>  %225 = fadd float %224, %212
>  %226 = call float @llvm.SI.load.const(<16 x i8> %222, i32 96)
>  %227 = fmul float %226, %204
>  %228 = fadd float %227, %217
>  %229 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %230 = load <16 x i8>, <16 x i8> addrspace(2)* %229, align 16, !invariant.load !0
>  %231 = call float @llvm.SI.load.const(<16 x i8> %230, i32 100)
>  %232 = fmul float %231, %204
>  %233 = fadd float %232, %220
>  %234 = call float @llvm.SI.load.const(<16 x i8> %230, i32 104)
>  %235 = fmul float %234, %204
>  %236 = fadd float %235, %225
>  %237 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %238 = load <16 x i8>, <16 x i8> addrspace(2)* %237, align 16, !invariant.load !0
>  %239 = call float @llvm.SI.load.const(<16 x i8> %238, i32 112)
>  %240 = fadd float %228, %239
>  %241 = call float @llvm.SI.load.const(<16 x i8> %238, i32 116)
>  %242 = fadd float %233, %241
>  %243 = call float @llvm.SI.load.const(<16 x i8> %238, i32 120)
>  %244 = fadd float %236, %243
>  %245 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %246 = load <16 x i8>, <16 x i8> addrspace(2)* %245, align 16, !invariant.load !0
>  %247 = call float @llvm.SI.load.const(<16 x i8> %246, i32 388)
>  %248 = fmul float %247, 9.000000e+00
>  %249 = fadd float %248, 2.000000e+00
>  %250 = call float @llvm.exp2.f32(float %249)
>  %251 = call float @llvm.SI.load.const(<16 x i8> %246, i32 16)
>  %252 = fsub float -0.000000e+00, %251
>  %253 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %254 = load <16 x i8>, <16 x i8> addrspace(2)* %253, align 16, !invariant.load !0
>  %255 = call float @llvm.SI.load.const(<16 x i8> %254, i32 20)
>  %256 = fsub float -0.000000e+00, %255
>  %257 = call float @llvm.SI.load.const(<16 x i8> %254, i32 24)
>  %258 = fsub float -0.000000e+00, %257
>  %259 = fsub float %43, %251
>  %260 = fsub float %44, %255
>  %261 = fsub float %45, %257
>  %262 = fmul float %259, 5.000000e-01
>  %263 = fmul float %260, 5.000000e-01
>  %264 = fmul float %261, 5.000000e-01
>  %265 = fmul float %262, %262
>  %266 = fmul float %263, %263
>  %267 = fadd float %266, %265
>  %268 = fmul float %264, %264
>  %269 = fadd float %267, %268
>  %270 = call float @llvm.sqrt.f32(float %269)
>  %271 = fdiv float 1.000000e+00, %270, !fpmath !1
>  %272 = fmul float %262, %271
>  %273 = fmul float %263, %271
>  %274 = fmul float %264, %271
>  %275 = fmul float %60, %252
>  %276 = fmul float %62, %256
>  %277 = fadd float %276, %275
>  %278 = fmul float %64, %258
>  %279 = fadd float %277, %278
>  %280 = call float @llvm.AMDGPU.clamp.(float %279, float 0.000000e+00, float 1.000000e+00)
>  %281 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %282 = load <8 x i32>, <8 x i32> addrspace(2)* %281, align 32, !invariant.load !0
>  %283 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %284 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %283, i64 0, i64 3, !amdgpu.uniform !0
>  %285 = load <4 x i32>, <4 x i32> addrspace(2)* %284, align 16, !invariant.load !0
>  %286 = extractelement <8 x i32> %282, i32 7
>  %287 = extractelement <4 x i32> %285, i32 0
>  %288 = and i32 %287, %286
>  %289 = insertelement <4 x i32> %285, i32 %288, i32 0
>  %290 = bitcast float %244 to i32
>  %291 = bitcast float %240 to i32
>  %292 = bitcast float %242 to i32
>  %293 = insertelement <4 x i32> undef, i32 %290, i32 0
>  %294 = insertelement <4 x i32> %293, i32 %291, i32 1
>  %295 = insertelement <4 x i32> %294, i32 %292, i32 2
>  %296 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %295, <8 x i32> %282, <4 x i32> %289, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %297 = extractelement <4 x float> %296, i32 0
>  %298 = fmul float %297, %297
>  %299 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %300 = load <16 x i8>, <16 x i8> addrspace(2)* %299, align 16, !invariant.load !0
>  %301 = call float @llvm.SI.load.const(<16 x i8> %300, i32 48)
>  %302 = fmul float %301, %298
>  %303 = call float @llvm.SI.load.const(<16 x i8> %300, i32 52)
>  %304 = fmul float %303, %298
>  %305 = call float @llvm.SI.load.const(<16 x i8> %300, i32 56)
>  %306 = fmul float %305, %298
>  %307 = fmul float %280, %302
>  %308 = fmul float %280, %304
>  %309 = fmul float %280, %306
>  %310 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %311 = load <8 x i32>, <8 x i32> addrspace(2)* %310, align 32, !invariant.load !0
>  %312 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %313 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %312, i64 0, i64 7, !amdgpu.uniform !0
>  %314 = load <4 x i32>, <4 x i32> addrspace(2)* %313, align 16, !invariant.load !0
>  %315 = extractelement <8 x i32> %311, i32 7
>  %316 = extractelement <4 x i32> %314, i32 0
>  %317 = and i32 %316, %315
>  %318 = insertelement <4 x i32> %314, i32 %317, i32 0
>  %319 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %320 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %321 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %322 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %323 = call float @llvm.fabs.f32(float %321)
>  %324 = fdiv float 1.000000e+00, %323, !fpmath !1
>  %325 = fmul float %319, %324
>  %326 = fadd float %325, 1.500000e+00
>  %327 = fmul float %320, %324
>  %328 = fadd float %327, 1.500000e+00
>  %329 = bitcast float %328 to i32
>  %330 = bitcast float %326 to i32
>  %331 = bitcast float %322 to i32
>  %332 = insertelement <4 x i32> undef, i32 %329, i32 0
>  %333 = insertelement <4 x i32> %332, i32 %330, i32 1
>  %334 = insertelement <4 x i32> %333, i32 %331, i32 2
>  %335 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %334, <8 x i32> %311, <4 x i32> %318, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %336 = extractelement <4 x float> %335, i32 0
>  %337 = extractelement <4 x float> %335, i32 1
>  %338 = extractelement <4 x float> %335, i32 2
>  %339 = extractelement <4 x float> %335, i32 3
>  %340 = fmul float %60, %43
>  %341 = fmul float %62, %44
>  %342 = fadd float %341, %340
>  %343 = fmul float %64, %45
>  %344 = fadd float %342, %343
>  %345 = fmul float %344, %60
>  %346 = fmul float %344, %62
>  %347 = fmul float %344, %64
>  %348 = fmul float %345, 2.000000e+00
>  %349 = fsub float %348, %43
>  %350 = fmul float %346, 2.000000e+00
>  %351 = fsub float %350, %44
>  %352 = fmul float %347, 2.000000e+00
>  %353 = fsub float %352, %45
>  %354 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %355 = load <16 x i8>, <16 x i8> addrspace(2)* %354, align 16, !invariant.load !0
>  %356 = call float @llvm.SI.load.const(<16 x i8> %355, i32 388)
>  %357 = fsub float 1.000000e+00, %356
>  %358 = fmul float %357, 6.000000e+00
>  %359 = call float @llvm.SI.load.const(<16 x i8> %355, i32 352)
>  %360 = call float @llvm.SI.load.const(<16 x i8> %355, i32 356)
>  %361 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %362 = load <16 x i8>, <16 x i8> addrspace(2)* %361, align 16, !invariant.load !0
>  %363 = call float @llvm.SI.load.const(<16 x i8> %362, i32 360)
>  %364 = fmul float %359, 0x3FD55553E0000000
>  %365 = fmul float %360, 0x3FD55553E0000000
>  %366 = fadd float %365, %364
>  %367 = fmul float %363, 0x3FD55553E0000000
>  %368 = fadd float %366, %367
>  %369 = fsub float 1.000000e+00, %368
>  %370 = call float @llvm.AMDGPU.clamp.(float %369, float 0.000000e+00, float 1.000000e+00)
>  %371 = fmul float %336, %339
>  %372 = fmul float %337, %339
>  %373 = fmul float %338, %339
>  %374 = fmul float %371, 4.000000e+00
>  %375 = fmul float %372, 4.000000e+00
>  %376 = fmul float %373, 4.000000e+00
>  %377 = fmul float %370, %374
>  %378 = fmul float %370, %375
>  %379 = fmul float %370, %376
>  %380 = fsub float 1.000000e+00, %368
>  %381 = call float @llvm.AMDGPU.clamp.(float %380, float 0.000000e+00, float 1.000000e+00)
>  %382 = fmul float %307, %381
>  %383 = fmul float %308, %381
>  %384 = fmul float %309, %381
>  %385 = fmul float %377, %193
>  %386 = fadd float %385, %382
>  %387 = fmul float %378, %193
>  %388 = fadd float %387, %383
>  %389 = fmul float %379, %193
>  %390 = fadd float %389, %384
>  %391 = fmul float %43, %60
>  %392 = fmul float %44, %62
>  %393 = fadd float %392, %391
>  %394 = fmul float %45, %64
>  %395 = fadd float %393, %394
>  %396 = call float @llvm.AMDGPU.clamp.(float %395, float 0.000000e+00, float 1.000000e+00)
>  %397 = fsub float 1.000000e+00, %396
>  %398 = call float @llvm.pow.f32(float %397, float 5.000000e+00)
>  %399 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %400 = load <16 x i8>, <16 x i8> addrspace(2)* %399, align 16, !invariant.load !0
>  %401 = call float @llvm.SI.load.const(<16 x i8> %400, i32 388)
>  %402 = call float @llvm.SI.load.const(<16 x i8> %400, i32 352)
>  %403 = call float @llvm.maxnum.f32(float %401, float %402)
>  %404 = call float @llvm.SI.load.const(<16 x i8> %400, i32 388)
>  %405 = call float @llvm.SI.load.const(<16 x i8> %400, i32 356)
>  %406 = call float @llvm.maxnum.f32(float %404, float %405)
>  %407 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %408 = load <16 x i8>, <16 x i8> addrspace(2)* %407, align 16, !invariant.load !0
>  %409 = call float @llvm.SI.load.const(<16 x i8> %408, i32 388)
>  %410 = call float @llvm.SI.load.const(<16 x i8> %408, i32 360)
>  %411 = call float @llvm.maxnum.f32(float %409, float %410)
>  %412 = call float @llvm.SI.load.const(<16 x i8> %408, i32 352)
>  %413 = fsub float %403, %412
>  %414 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %415 = load <16 x i8>, <16 x i8> addrspace(2)* %414, align 16, !invariant.load !0
>  %416 = call float @llvm.SI.load.const(<16 x i8> %415, i32 356)
>  %417 = fsub float %406, %416
>  %418 = call float @llvm.SI.load.const(<16 x i8> %415, i32 360)
>  %419 = fsub float %411, %418
>  %420 = call float @llvm.SI.load.const(<16 x i8> %415, i32 352)
>  %421 = fmul float %398, %413
>  %422 = fadd float %421, %420
>  %423 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %424 = load <16 x i8>, <16 x i8> addrspace(2)* %423, align 16, !invariant.load !0
>  %425 = call float @llvm.SI.load.const(<16 x i8> %424, i32 356)
>  %426 = fmul float %398, %417
>  %427 = fadd float %426, %425
>  %428 = call float @llvm.SI.load.const(<16 x i8> %424, i32 360)
>  %429 = fmul float %398, %419
>  %430 = fadd float %429, %428
>  %431 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %432 = load <8 x i32>, <8 x i32> addrspace(2)* %431, align 32, !invariant.load !0
>  %433 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %434 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %433, i64 0, i64 11, !amdgpu.uniform !0
>  %435 = load <4 x i32>, <4 x i32> addrspace(2)* %434, align 16, !invariant.load !0
>  %436 = extractelement <8 x i32> %432, i32 7
>  %437 = extractelement <4 x i32> %435, i32 0
>  %438 = and i32 %437, %436
>  %439 = insertelement <4 x i32> %435, i32 %438, i32 0
>  %440 = call float @llvm.amdgcn.cubetc(float %349, float %351, float %353)
>  %441 = call float @llvm.amdgcn.cubesc(float %349, float %351, float %353)
>  %442 = call float @llvm.amdgcn.cubema(float %349, float %351, float %353)
>  %443 = call float @llvm.amdgcn.cubeid(float %349, float %351, float %353)
>  %444 = call float @llvm.fabs.f32(float %442)
>  %445 = fdiv float 1.000000e+00, %444, !fpmath !1
>  %446 = fmul float %440, %445
>  %447 = fadd float %446, 1.500000e+00
>  %448 = fmul float %441, %445
>  %449 = fadd float %448, 1.500000e+00
>  %450 = bitcast float %449 to i32
>  %451 = bitcast float %447 to i32
>  %452 = bitcast float %443 to i32
>  %453 = bitcast float %358 to i32
>  %454 = insertelement <4 x i32> undef, i32 %450, i32 0
>  %455 = insertelement <4 x i32> %454, i32 %451, i32 1
>  %456 = insertelement <4 x i32> %455, i32 %452, i32 2
>  %457 = insertelement <4 x i32> %456, i32 %453, i32 3
>  %458 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %457, <8 x i32> %432, <4 x i32> %439, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %459 = extractelement <4 x float> %458, i32 0
>  %460 = extractelement <4 x float> %458, i32 1
>  %461 = extractelement <4 x float> %458, i32 2
>  %462 = fmul float %272, %252
>  %463 = fmul float %273, %256
>  %464 = fadd float %463, %462
>  %465 = fmul float %274, %258
>  %466 = fadd float %464, %465
>  %467 = call float @llvm.AMDGPU.clamp.(float %466, float 0.000000e+00, float 1.000000e+00)
>  %468 = fsub float 1.000000e+00, %467
>  %469 = call float @llvm.pow.f32(float %468, float 5.000000e+00)
>  %470 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %471 = load <16 x i8>, <16 x i8> addrspace(2)* %470, align 16, !invariant.load !0
>  %472 = call float @llvm.SI.load.const(<16 x i8> %471, i32 352)
>  %473 = fsub float 1.000000e+00, %472
>  %474 = call float @llvm.SI.load.const(<16 x i8> %471, i32 356)
>  %475 = fsub float 1.000000e+00, %474
>  %476 = call float @llvm.SI.load.const(<16 x i8> %471, i32 360)
>  %477 = fsub float 1.000000e+00, %476
>  %478 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %479 = load <16 x i8>, <16 x i8> addrspace(2)* %478, align 16, !invariant.load !0
>  %480 = call float @llvm.SI.load.const(<16 x i8> %479, i32 352)
>  %481 = fmul float %469, %473
>  %482 = fadd float %481, %480
>  %483 = call float @llvm.SI.load.const(<16 x i8> %479, i32 356)
>  %484 = fmul float %469, %475
>  %485 = fadd float %484, %483
>  %486 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %487 = load <16 x i8>, <16 x i8> addrspace(2)* %486, align 16, !invariant.load !0
>  %488 = call float @llvm.SI.load.const(<16 x i8> %487, i32 360)
>  %489 = fmul float %469, %477
>  %490 = fadd float %489, %488
>  %491 = fmul float %307, %482
>  %492 = fmul float %308, %485
>  %493 = fmul float %309, %490
>  %494 = fadd float %250, 2.000000e+00
>  %495 = fmul float %494, 2.500000e-01
>  %496 = fmul float %250, -5.000000e-01
>  %497 = call float @llvm.exp2.f32(float %496)
>  %498 = fsub float 2.000000e+00, %497
>  %499 = fdiv float 1.000000e+00, %498, !fpmath !1
>  %500 = fmul float %495, %499
>  %501 = fmul float %491, %500
>  %502 = fmul float %492, %500
>  %503 = fmul float %493, %500
>  %504 = fmul float %60, %272
>  %505 = fmul float %62, %273
>  %506 = fadd float %505, %504
>  %507 = fmul float %64, %274
>  %508 = fadd float %506, %507
>  %509 = call float @llvm.AMDGPU.clamp.(float %508, float 0.000000e+00, float 1.000000e+00)
>  %510 = call float @llvm.pow.f32(float %509, float %250)
>  %511 = fmul float %501, %510
>  %512 = fmul float %502, %510
>  %513 = fmul float %503, %510
>  %514 = fmul float %43, %60
>  %515 = fmul float %44, %62
>  %516 = fadd float %515, %514
>  %517 = fmul float %45, %64
>  %518 = fadd float %516, %517
>  %519 = call float @llvm.AMDGPU.clamp.(float %518, float 0.000000e+00, float 1.000000e+00)
>  %520 = call float @llvm.maxnum.f32(float %280, float %519)
>  %521 = fadd float %520, 0x3EE4F8B580000000
>  %522 = fdiv float 1.000000e+00, %521, !fpmath !1
>  %523 = fmul float %511, %522
>  %524 = fmul float %512, %522
>  %525 = fmul float %513, %522
>  %526 = fmul float %422, %459
>  %527 = fadd float %526, %523
>  %528 = fmul float %427, %460
>  %529 = fadd float %528, %524
>  %530 = fmul float %430, %461
>  %531 = fadd float %530, %525
>  %532 = fmul float %527, %195
>  %533 = fmul float %529, %195
>  %534 = fmul float %531, %195
>  %535 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0
>  %536 = load <16 x i8>, <16 x i8> addrspace(2)* %535, align 16
>  %537 = fadd float %250, 2.000000e+00
>  %538 = fmul float %537, 2.500000e-01
>  %539 = fmul float %250, -5.000000e-01
>  %540 = fmul float %43, %60
>  %541 = fmul float %44, %62
>  %542 = fadd float %541, %540
>  %543 = fmul float %45, %64
>  %544 = fadd float %542, %543
>  br label %loop131
>
>loop131:                                          ; preds = %endif135, %main_body
>  %.012 = phi float [ %390, %main_body ], [ %637, %endif135 ]
>  %.011 = phi float [ %388, %main_body ], [ %635, %endif135 ]
>  %.010 = phi float [ %386, %main_body ], [ %633, %endif135 ]
>  %545 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %546 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %547 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %548 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %549 = phi i32 [ 0, %main_body ], [ %694, %endif135 ]
>  %.08 = phi float [ %534, %main_body ], [ %693, %endif135 ]
>  %.07 = phi float [ %533, %main_body ], [ %691, %endif135 ]
>  %.0 = phi float [ %532, %main_body ], [ %689, %endif135 ]
>  %550 = icmp sgt i32 %545, 3
>  br i1 %550, label %endloop191, label %endif135
>
>endif135:                                         ; preds = %loop131
>  %551 = shl i32 %546, 5
>  %552 = shl i32 %546, 5
>  %553 = add i32 %552, 176
>  %554 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %553)
>  %555 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %556 = fsub float %554, %555
>  %557 = shl i32 %546, 5
>  %558 = add i32 %557, 180
>  %559 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %558)
>  %560 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %561 = fsub float %559, %560
>  %562 = add i32 %551, 184
>  %563 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %562)
>  %564 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %565 = fsub float %563, %564
>  %566 = fmul float %556, %556
>  %567 = fmul float %561, %561
>  %568 = fadd float %567, %566
>  %569 = fmul float %565, %565
>  %570 = fadd float %568, %569
>  %571 = call float @llvm.sqrt.f32(float %570)
>  %572 = fdiv float 1.000000e+00, %571, !fpmath !1
>  %573 = fmul float %556, %572
>  %574 = fmul float %561, %572
>  %575 = fmul float %565, %572
>  %576 = fadd float %573, %43
>  %577 = fadd float %574, %44
>  %578 = fadd float %575, %45
>  %579 = fmul float %576, 5.000000e-01
>  %580 = fmul float %577, 5.000000e-01
>  %581 = fmul float %578, 5.000000e-01
>  %582 = fmul float %579, %579
>  %583 = fmul float %580, %580
>  %584 = fadd float %583, %582
>  %585 = fmul float %581, %581
>  %586 = fadd float %584, %585
>  %587 = call float @llvm.sqrt.f32(float %586)
>  %588 = fdiv float 1.000000e+00, %587, !fpmath !1
>  %589 = fmul float %579, %588
>  %590 = fmul float %580, %588
>  %591 = fmul float %581, %588
>  %592 = fmul float %573, %60
>  %593 = fmul float %574, %62
>  %594 = fadd float %593, %592
>  %595 = fmul float %575, %64
>  %596 = fadd float %594, %595
>  %597 = call float @llvm.AMDGPU.clamp.(float %596, float 0.000000e+00, float 1.000000e+00)
>  %598 = shl i32 %547, 1
>  %599 = or i32 %598, 1
>  %600 = fmul float %570, %572
>  %601 = shl i32 %548, 5
>  %602 = add i32 %601, 188
>  %603 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %602)
>  %604 = fmul float %600, %603
>  %605 = call float @llvm.AMDGPU.clamp.(float %604, float 0.000000e+00, float 1.000000e+00)
>  %606 = fsub float 1.000000e+00, %605
>  %607 = shl i32 %599, 4
>  %608 = add i32 %607, 176
>  %609 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %608)
>  %610 = fmul float %609, %606
>  %611 = shl i32 %599, 4
>  %612 = add i32 %611, 180
>  %613 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %612)
>  %614 = fmul float %613, %606
>  %615 = shl i32 %599, 4
>  %616 = add i32 %615, 184
>  %617 = call float @llvm.SI.load.const(<16 x i8> %536, i32 %616)
>  %618 = fmul float %617, %606
>  %619 = fmul float %597, %610
>  %620 = fmul float %597, %614
>  %621 = fmul float %597, %618
>  %622 = call float @llvm.SI.load.const(<16 x i8> %536, i32 352)
>  %623 = call float @llvm.SI.load.const(<16 x i8> %536, i32 356)
>  %624 = call float @llvm.SI.load.const(<16 x i8> %536, i32 360)
>  %625 = fmul float %622, 0x3FD55553E0000000
>  %626 = fmul float %623, 0x3FD55553E0000000
>  %627 = fadd float %626, %625
>  %628 = fmul float %624, 0x3FD55553E0000000
>  %629 = fadd float %627, %628
>  %630 = fsub float 1.000000e+00, %629
>  %631 = call float @llvm.AMDGPU.clamp.(float %630, float 0.000000e+00, float 1.000000e+00)
>  %632 = fmul float %619, %631
>  %633 = fadd float %632, %.010
>  %634 = fmul float %620, %631
>  %635 = fadd float %634, %.011
>  %636 = fmul float %621, %631
>  %637 = fadd float %636, %.012
>  %638 = fmul float %573, %589
>  %639 = fmul float %574, %590
>  %640 = fadd float %639, %638
>  %641 = fmul float %575, %591
>  %642 = fadd float %640, %641
>  %643 = call float @llvm.AMDGPU.clamp.(float %642, float 0.000000e+00, float 1.000000e+00)
>  %644 = fsub float 1.000000e+00, %643
>  %645 = call float @llvm.pow.f32(float %644, float 5.000000e+00)
>  %646 = call float @llvm.SI.load.const(<16 x i8> %536, i32 352)
>  %647 = fsub float 1.000000e+00, %646
>  %648 = call float @llvm.SI.load.const(<16 x i8> %536, i32 356)
>  %649 = fsub float 1.000000e+00, %648
>  %650 = call float @llvm.SI.load.const(<16 x i8> %536, i32 360)
>  %651 = fsub float 1.000000e+00, %650
>  %652 = call float @llvm.SI.load.const(<16 x i8> %536, i32 352)
>  %653 = fmul float %645, %647
>  %654 = fadd float %653, %652
>  %655 = call float @llvm.SI.load.const(<16 x i8> %536, i32 356)
>  %656 = fmul float %645, %649
>  %657 = fadd float %656, %655
>  %658 = call float @llvm.SI.load.const(<16 x i8> %536, i32 360)
>  %659 = fmul float %645, %651
>  %660 = fadd float %659, %658
>  %661 = fmul float %619, %654
>  %662 = fmul float %620, %657
>  %663 = fmul float %621, %660
>  %664 = call float @llvm.exp2.f32(float %539)
>  %665 = fsub float 2.000000e+00, %664
>  %666 = fdiv float 1.000000e+00, %665, !fpmath !1
>  %667 = fmul float %538, %666
>  %668 = fmul float %661, %667
>  %669 = fmul float %662, %667
>  %670 = fmul float %663, %667
>  %671 = fmul float %60, %589
>  %672 = fmul float %62, %590
>  %673 = fadd float %672, %671
>  %674 = fmul float %64, %591
>  %675 = fadd float %673, %674
>  %676 = call float @llvm.AMDGPU.clamp.(float %675, float 0.000000e+00, float 1.000000e+00)
>  %677 = call float @llvm.pow.f32(float %676, float %250)
>  %678 = fmul float %668, %677
>  %679 = fmul float %669, %677
>  %680 = fmul float %670, %677
>  %681 = call float @llvm.AMDGPU.clamp.(float %544, float 0.000000e+00, float 1.000000e+00)
>  %682 = call float @llvm.maxnum.f32(float %597, float %681)
>  %683 = fadd float %682, 0x3EE4F8B580000000
>  %684 = fdiv float 1.000000e+00, %683, !fpmath !1
>  %685 = fmul float %678, %684
>  %686 = fmul float %679, %684
>  %687 = fmul float %680, %684
>  %688 = fmul float %685, %98
>  %689 = fadd float %688, %.0
>  %690 = fmul float %686, %98
>  %691 = fadd float %690, %.07
>  %692 = fmul float %687, %98
>  %693 = fadd float %692, %.08
>  %694 = add i32 %549, 1
>  br label %loop131
>
>endloop191:                                       ; preds = %loop131
>  %695 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %696 = load <16 x i8>, <16 x i8> addrspace(2)* %695, align 16, !invariant.load !0
>  %697 = call float @llvm.SI.load.const(<16 x i8> %696, i32 368)
>  %698 = fmul float %.010, %697
>  %699 = fadd float %698, %.0
>  %700 = call float @llvm.SI.load.const(<16 x i8> %696, i32 372)
>  %701 = fmul float %.011, %700
>  %702 = fadd float %701, %.07
>  %703 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %704 = load <16 x i8>, <16 x i8> addrspace(2)* %703, align 16, !invariant.load !0
>  %705 = call float @llvm.SI.load.const(<16 x i8> %704, i32 376)
>  %706 = fmul float %.012, %705
>  %707 = fadd float %706, %.08
>  %708 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %709 = call float @llvm.SI.load.const(<16 x i8> %704, i32 12)
>  %710 = fsub float %708, %709
>  %711 = call float @llvm.maxnum.f32(float %710, float 0.000000e+00)
>  %712 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %713 = load <16 x i8>, <16 x i8> addrspace(2)* %712, align 16, !invariant.load !0
>  %714 = call float @llvm.SI.load.const(<16 x i8> %713, i32 28)
>  %715 = call float @llvm.SI.load.const(<16 x i8> %713, i32 12)
>  %716 = fsub float %714, %715
>  %717 = fadd float %716, 0x3F50624DE0000000
>  %718 = fdiv float 1.000000e+00, %717, !fpmath !1
>  %719 = fmul float %711, %718
>  %720 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %721 = load <16 x i8>, <16 x i8> addrspace(2)* %720, align 16, !invariant.load !0
>  %722 = call float @llvm.SI.load.const(<16 x i8> %721, i32 28)
>  %723 = call float @llvm.floor.f32(float %722)
>  %724 = fsub float %722, %723
>  %725 = fmul float %724, 8.000000e+00
>  %726 = call float @llvm.pow.f32(float %719, float %725)
>  %727 = call float @llvm.AMDGPU.clamp.(float %726, float 0.000000e+00, float 1.000000e+00)
>  %728 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %729 = fmul float %728, %727
>  %730 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %731 = load <16 x i8>, <16 x i8> addrspace(2)* %730, align 16, !invariant.load !0
>  %732 = call float @llvm.SI.load.const(<16 x i8> %731, i32 32)
>  %733 = fsub float 1.000000e+00, %729
>  %734 = fmul float %699, %729
>  %735 = fmul float %732, %733
>  %736 = fadd float %734, %735
>  %737 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %738 = load <16 x i8>, <16 x i8> addrspace(2)* %737, align 16, !invariant.load !0
>  %739 = call float @llvm.SI.load.const(<16 x i8> %738, i32 36)
>  %740 = fsub float 1.000000e+00, %729
>  %741 = fmul float %702, %729
>  %742 = fmul float %739, %740
>  %743 = fadd float %741, %742
>  %744 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %745 = load <16 x i8>, <16 x i8> addrspace(2)* %744, align 16, !invariant.load !0
>  %746 = call float @llvm.SI.load.const(<16 x i8> %745, i32 40)
>  %747 = fsub float 1.000000e+00, %729
>  %748 = fmul float %707, %729
>  %749 = fmul float %746, %747
>  %750 = fadd float %748, %749
>  %751 = bitcast float %5 to i32
>  %752 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %751, 10
>  %753 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %752, float %736, 11
>  %754 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %753, float %743, 12
>  %755 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %754, float %750, 13
>  %756 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %755, float %67, 14
>  %757 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %756, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %757
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[15:18], v5, s[12:15], 0 idxen ; E00C2000 80030F05
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v12, s4                                   ; 7E180204
>	v_mov_b32_e32 v13, s5                                   ; 7E1A0205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v3, s4                                    ; 7E060204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v20, s7, v12                              ; 08281807
>	v_mov_b32_e32 v4, s8                                    ; 7E080208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v5, s4                                    ; 7E0A0204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v21, s6, v13                              ; 082A1A06
>	v_mov_b32_e32 v7, s7                                    ; 7E0E0207
>	v_mov_b32_e32 v18, s8                                   ; 7E240208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v19, s4                                   ; 7E260204
>	v_sub_f32_e32 v22, s5, v14                              ; 082C1C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[27:30], v7, s[4:7], 0 idxen   ; E00C2000 80011B07
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v27                               ; 7E00111B
>	v_mul_lo_i32 v19, v0, 48                                ; D2D60013 00016100
>	v_add_i32_e32 v0, vcc, s14, v19                         ; 4A00260E
>	v_add_i32_e32 v4, vcc, s13, v19                         ; 4A08260D
>	v_add_i32_e32 v5, vcc, s15, v19                         ; 4A0A260F
>	v_add_i32_e32 v1, vcc, s12, v19                         ; 4A02260C
>	buffer_load_dword v3, v0, s[0:3], 0 offen               ; E0301000 80000300
>	buffer_load_dword v0, v4, s[0:3], 0 offen               ; E0301000 80000004
>	buffer_load_dword v4, v5, s[0:3], 0 offen               ; E0301000 80000405
>	buffer_load_dword v1, v1, s[0:3], 0 offen               ; E0301000 80000101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v12, v4                           ; 0A28090C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0x8c, v19                        ; 4A0A26FF 0000008C
>	v_add_i32_e32 v21, vcc, 0x9c, v19                       ; 4A2A26FF 0000009C
>	v_add_i32_e32 v6, vcc, 0x84, v19                        ; 4A0C26FF 00000084
>	v_add_i32_e32 v7, vcc, 0x88, v19                        ; 4A0E26FF 00000088
>	v_add_i32_e32 v4, vcc, 0x80, v19                        ; 4A0826FF 00000080
>	v_add_i32_e32 v18, vcc, 0x94, v19                       ; 4A2426FF 00000094
>	buffer_load_dword v22, v5, s[0:3], 0 offen              ; E0301000 80001605
>	buffer_load_dword v5, v6, s[0:3], 0 offen               ; E0301000 80000506
>	buffer_load_dword v6, v7, s[0:3], 0 offen               ; E0301000 80000607
>	v_add_i32_e32 v7, vcc, 0x90, v19                        ; 4A0E26FF 00000090
>	v_add_i32_e32 v19, vcc, 0x98, v19                       ; 4A2626FF 00000098
>	buffer_load_dword v23, v21, s[0:3], 0 offen             ; E0301000 80001715
>	buffer_load_dword v4, v4, s[0:3], 0 offen               ; E0301000 80000404
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v21, v13, v22                          ; 0A2A2D0D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v22, v14, v23                          ; 0A2C2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v4, v28                               ; 7E08111C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[23:26], v6, s[4:7], 0 idxen   ; E00C2000 80011706
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	v_add_i32_e32 v5, vcc, s10, v19                         ; 4A0A260A
>	v_add_i32_e32 v6, vcc, s9, v19                          ; 4A0C2609
>	v_add_i32_e32 v7, vcc, s8, v19                          ; 4A0E2608
>	v_add_i32_e32 v18, vcc, s4, v19                         ; 4A242604
>	v_mul_lo_i32 v27, v4, 48                                ; D2D6001B 00016104
>	v_add_i32_e32 v4, vcc, s11, v19                         ; 4A08260B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v22, vcc, s6, v19                         ; 4A2C2606
>	buffer_load_dword v21, v4, s[0:3], 0 offen              ; E0301000 80001504
>	v_add_i32_e32 v4, vcc, s7, v19                          ; 4A082607
>	v_add_i32_e32 v19, vcc, s5, v19                         ; 4A262605
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	buffer_load_dword v28, v4, s[0:3], 0 offen              ; E0301000 80001C04
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v3, v23, v3                               ; 10060717
>	v_mul_f32_e32 v1, v23, v1                               ; 10020317
>	v_mul_f32_e32 v0, v23, v0                               ; 10000117
>	v_mul_f32_e32 v20, v23, v20                             ; 10282917
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v31, v14, v18                          ; 0A3E250E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v4, v23, v5                               ; 10080B17
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v5, v23, v6                               ; 100A0D17
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v6, v23, v7                               ; 100C0F17
>	v_subrev_f32_e32 v7, v13, v21                           ; 0A0E2B0D
>	v_mul_f32_e32 v21, v23, v7                              ; 102A0F17
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v18, v23, v22                             ; 10242D17
>	v_mul_f32_e32 v7, v23, v28                              ; 100E3917
>	v_mul_f32_e32 v19, v23, v19                             ; 10262717
>	v_mul_f32_e32 v22, v23, v31                             ; 102C3F17
>	v_add_i32_e32 v23, vcc, s15, v27                        ; 4A2E360F
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v12, v23                          ; 0A2E2F0C
>	v_mac_f32_e32 v20, v24, v23                             ; 3E282F18
>	v_add_i32_e32 v23, vcc, s11, v27                        ; 4A2E360B
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v13, v23                          ; 0A2E2F0D
>	v_mac_f32_e32 v21, v24, v23                             ; 3E2A2F18
>	v_add_i32_e32 v23, vcc, s14, v27                        ; 4A2E360E
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v24, v23                              ; 3E062F18
>	v_add_i32_e32 v23, vcc, s12, v27                        ; 4A2E360C
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v24, v23                              ; 3E022F18
>	v_add_i32_e32 v23, vcc, s13, v27                        ; 4A2E360D
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v24, v23                              ; 3E002F18
>	v_add_i32_e32 v23, vcc, s10, v27                        ; 4A2E360A
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v24, v23                              ; 3E082F18
>	v_add_i32_e32 v23, vcc, s9, v27                         ; 4A2E3609
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v24, v23                              ; 3E0A2F18
>	v_add_i32_e32 v23, vcc, s8, v27                         ; 4A2E3608
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v24, v23                              ; 3E0C2F18
>	v_add_i32_e32 v23, vcc, s7, v27                         ; 4A2E3607
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v24, v23                              ; 3E0E2F18
>	v_add_i32_e32 v23, vcc, s6, v27                         ; 4A2E3606
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v24, v23                             ; 3E242F18
>	v_add_i32_e32 v23, vcc, s5, v27                         ; 4A2E3605
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v24, v23                             ; 3E262F18
>	v_add_i32_e32 v23, vcc, s4, v27                         ; 4A2E3604
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	v_mac_f32_e32 v22, v24, v23                             ; 3E2C2F18
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v29                              ; 7E2E111D
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0x70, v23                       ; 4A302EFF 00000070
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v25, v24                              ; 3E063119
>	v_add_i32_e32 v24, vcc, 0x7c, v23                       ; 4A302EFF 0000007C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v12, v24                          ; 0A30310C
>	v_mac_f32_e32 v20, v25, v24                             ; 3E283119
>	v_add_i32_e32 v24, vcc, s11, v23                        ; 4A302E0B
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v13, v24                          ; 0A30310D
>	v_mac_f32_e32 v21, v25, v24                             ; 3E2A3119
>	v_add_i32_e32 v24, vcc, 0x74, v23                       ; 4A302EFF 00000074
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v25, v24                              ; 3E023119
>	v_add_i32_e32 v24, vcc, 0x78, v23                       ; 4A302EFF 00000078
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v25, v24                              ; 3E003119
>	v_add_i32_e32 v24, vcc, s10, v23                        ; 4A302E0A
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v25, v24                              ; 3E083119
>	v_add_i32_e32 v24, vcc, s9, v23                         ; 4A302E09
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v25, v24                              ; 3E0A3119
>	v_add_i32_e32 v24, vcc, s8, v23                         ; 4A302E08
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v25, v24                              ; 3E0C3119
>	v_add_i32_e32 v24, vcc, s7, v23                         ; 4A302E07
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v25, v24                              ; 3E0E3119
>	v_add_i32_e32 v24, vcc, s6, v23                         ; 4A302E06
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v25, v24                             ; 3E243119
>	v_add_i32_e32 v24, vcc, s5, v23                         ; 4A302E05
>	v_add_i32_e32 v23, vcc, s4, v23                         ; 4A2E2E04
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v25, v24                             ; 3E263119
>	v_mac_f32_e32 v22, v25, v23                             ; 3E2C2F19
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v30                              ; 7E2E111E
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0x70, v23                       ; 4A302EFF 00000070
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v24                              ; 3E06311A
>	v_add_i32_e32 v24, vcc, 0x7c, v23                       ; 4A302EFF 0000007C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v12, v24                          ; 0A30310C
>	v_mac_f32_e32 v20, v26, v24                             ; 3E28311A
>	v_add_i32_e32 v24, vcc, 0x8c, v23                       ; 4A302EFF 0000008C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v13, v24                          ; 0A30310D
>	v_mac_f32_e32 v21, v26, v24                             ; 3E2A311A
>	v_add_i32_e32 v24, vcc, 0x74, v23                       ; 4A302EFF 00000074
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v24                              ; 3E02311A
>	v_add_i32_e32 v24, vcc, 0x78, v23                       ; 4A302EFF 00000078
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v24                              ; 3E00311A
>	v_add_i32_e32 v24, vcc, 0x80, v23                       ; 4A302EFF 00000080
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v24                              ; 3E08311A
>	v_add_i32_e32 v24, vcc, 0x84, v23                       ; 4A302EFF 00000084
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v24                              ; 3E0A311A
>	v_add_i32_e32 v24, vcc, 0x88, v23                       ; 4A302EFF 00000088
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v24                              ; 3E0C311A
>	v_add_i32_e32 v24, vcc, 0x90, v23                       ; 4A302EFF 00000090
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v24                              ; 3E0E311A
>	v_add_i32_e32 v24, vcc, 0x94, v23                       ; 4A302EFF 00000094
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v26, v24                             ; 3E24311A
>	v_add_i32_e32 v24, vcc, 0x98, v23                       ; 4A302EFF 00000098
>	v_add_i32_e32 v23, vcc, 0x9c, v23                       ; 4A2E2EFF 0000009C
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v26, v24                             ; 3E26311A
>	v_mac_f32_e32 v22, v26, v23                             ; 3E2C2F1A
>	v_mul_f32_e32 v23, v1, v9                               ; 102E1301
>	v_mac_f32_e32 v23, v3, v8                               ; 3E2E1103
>	v_mac_f32_e32 v23, v0, v10                              ; 3E2E1500
>	v_mac_f32_e32 v23, v20, v11                             ; 3E2E1714
>	v_mul_f32_e32 v20, v5, v9                               ; 10281305
>	v_mac_f32_e32 v20, v4, v8                               ; 3E281104
>	v_mac_f32_e32 v20, v6, v10                              ; 3E281506
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v20, v21, v11                             ; 3E281715
>	v_mul_f32_e32 v21, v18, v9                              ; 102A1312
>	v_mul_f32_e32 v9, 0, v9                                 ; 10121280
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	v_mac_f32_e32 v21, v7, v8                               ; 3E2A1107
>	v_mac_f32_e32 v9, 0, v8                                 ; 3E121080
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	v_mac_f32_e32 v21, v19, v10                             ; 3E2A1513
>	v_mac_f32_e32 v9, 0, v10                                ; 3E121480
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	s_buffer_load_dword s20, s[0:3], 0x14                   ; C20A0114
>	v_add_f32_e32 v8, v11, v9                               ; 0610130B
>	v_mac_f32_e32 v21, v22, v11                             ; 3E2A1716
>	v_add_f32_e32 v9, v12, v23                              ; 06122F0C
>	s_buffer_load_dword s21, s[0:3], 0x15                   ; C20A8115
>	v_add_f32_e32 v10, v13, v20                             ; 0614290D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v12, s4, v9                               ; 10181204
>	v_mul_f32_e32 v13, s5, v9                               ; 101A1205
>	v_mul_f32_e32 v20, s7, v9                               ; 10281207
>	v_add_f32_e32 v11, v14, v21                             ; 06162B0E
>	v_mul_f32_e32 v14, s6, v9                               ; 101C1206
>	v_mac_f32_e32 v12, s8, v10                              ; 3E181408
>	v_mac_f32_e32 v13, s9, v10                              ; 3E1A1409
>	v_mac_f32_e32 v14, s10, v10                             ; 3E1C140A
>	v_mac_f32_e32 v20, s11, v10                             ; 3E28140B
>	v_mac_f32_e32 v12, s12, v11                             ; 3E18160C
>	v_mac_f32_e32 v13, s13, v11                             ; 3E1A160D
>	v_mac_f32_e32 v14, s14, v11                             ; 3E1C160E
>	v_mac_f32_e32 v20, s15, v11                             ; 3E28160F
>	v_mac_f32_e32 v12, s16, v8                              ; 3E181010
>	v_mac_f32_e32 v13, s17, v8                              ; 3E1A1011
>	v_mac_f32_e32 v14, s18, v8                              ; 3E1C1012
>	v_mac_f32_e32 v20, s19, v8                              ; 3E281013
>	v_mov_b32_e32 v8, s20                                   ; 7E100214
>	v_mac_f32_e32 v8, s21, v14                              ; 3E101C15
>	v_add_f32_e64 v8, v8, 0 clamp                           ; D2060808 00010108
>	s_buffer_load_dword s22, s[0:3], 0x16                   ; C20B0116
>	s_buffer_load_dword s23, s[0:3], 0x17                   ; C20B8117
>	v_log_f32_e32 v8, v8                                    ; 7E104F08
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v8, s22, v8                        ; 0E101016
>	v_mad_f32 v3, v15, v3, -v3                              ; D2820003 840E070F
>	v_mac_f32_e32 v3, v1, v16                               ; 3E062101
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_exp_f32_e32 v8, v8                                    ; 7E104B08
>	v_sub_f32_e64 v21, 1.0, s23                             ; D2080015 00002EF2
>	v_mad_f32 v1, v15, v4, -v4                              ; D2820001 8412090F
>	v_mad_f32 v4, v15, v7, -v7                              ; D2820004 841E0F0F
>	v_mac_f32_e32 v3, v0, v17                               ; 3E062300
>	v_mul_f32_e32 v0, s0, v20                               ; 10002800
>	v_mac_f32_e32 v21, s23, v8                              ; 3E2A1017
>	v_mac_f32_e32 v1, v5, v16                               ; 3E022105
>	v_mac_f32_e32 v4, v18, v16                              ; 3E082112
>	v_mul_f32_e32 v5, v21, v21                              ; 100A2B15
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v0                   ; F800020F 000B0A09
>	v_mac_f32_e32 v1, v6, v17                               ; 3E022306
>	v_mac_f32_e32 v4, v19, v17                              ; 3E082313
>	exp 15, 33, 0, 0, 0, v5, v0, v0, v0                     ; F800021F 00000005
>	exp 15, 34, 0, 0, 0, v3, v1, v4, v0                     ; F800022F 00040103
>	exp 15, 12, 0, 1, 0, v12, v13, v14, v20                 ; F80008CF 140E0D0C
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1996 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                          ; BE88047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	v_mov_b32_e32 v0, v2                                            ; 7E000302
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v2, v0, 0, 0, [m0]                              ; C8080000
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	v_interp_p2_f32 v2, [v2], v3, 0, 0, [m0]                        ; C8090003
>	v_interp_p1_f32 v1, v0, 1, 0, [m0]                              ; C8040100
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                        ; C8050103
>	v_interp_p1_f32 v6, v0, 2, 0, [m0]                              ; C8180200
>	v_interp_p2_f32 v6, [v6], v3, 2, 0, [m0]                        ; C8190203
>	v_interp_p1_f32 v10, v4, 0, 2, [m0]                             ; C8280804
>	v_interp_p2_f32 v10, [v10], v5, 0, 2, [m0]                      ; C8290805
>	v_interp_p1_f32 v11, v4, 1, 2, [m0]                             ; C82C0904
>	v_interp_p2_f32 v11, [v11], v5, 1, 2, [m0]                      ; C82D0905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                              ; C8100A04
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s12, s[0:3], 0x0                            ; C2060100
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                        ; C8110A05
>	v_mul_f32_e32 v5, v10, v10                                      ; 100A150A
>	v_mac_f32_e32 v5, v11, v11                                      ; 3E0A170B
>	s_buffer_load_dword s13, s[0:3], 0x1                            ; C2068101
>	s_buffer_load_dword s14, s[0:3], 0x2                            ; C2070102
>	v_mac_f32_e32 v5, v4, v4                                        ; 3E0A0904
>	v_rsq_f32_e32 v12, v5                                           ; 7E185D05
>	s_buffer_load_dword s20, s[0:3], 0x11                           ; C20A0111
>	s_buffer_load_dword s21, s[0:3], 0x12                           ; C20A8112
>	s_buffer_load_dword s31, s[0:3], 0x10                           ; C20F8110
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v20, s12, v2                                      ; 0828040C
>	s_buffer_load_dword s22, s[0:3], 0x14                           ; C20B0114
>	s_buffer_load_dword s23, s[0:3], 0x15                           ; C20B8115
>	s_buffer_load_dword s24, s[0:3], 0x16                           ; C20C0116
>	v_sub_f32_e32 v21, s13, v1                                      ; 082A020D
>	v_mul_f32_e32 v7, v20, v20                                      ; 100E2914
>	s_buffer_load_dword s25, s[0:3], 0x18                           ; C20C8118
>	s_buffer_load_dword s26, s[0:3], 0x19                           ; C20D0119
>	s_buffer_load_dword s27, s[0:3], 0x1a                           ; C20D811A
>	v_sub_f32_e32 v22, s14, v6                                      ; 082C0C0E
>	v_mac_f32_e32 v7, v21, v21                                      ; 3E0E2B15
>	v_mul_f32_e32 v5, v12, v10                                      ; 100A150C
>	v_mul_f32_e32 v10, v12, v11                                     ; 1014170C
>	v_mul_f32_e32 v11, v12, v4                                      ; 1016090C
>	v_mov_b32_e32 v12, 0x403b800a                                   ; 7E1802FF 403B800A
>	s_buffer_load_dword s28, s[0:3], 0x1c                           ; C20E011C
>	s_buffer_load_dword s29, s[0:3], 0x1d                           ; C20E811D
>	s_buffer_load_dword s30, s[0:3], 0x1e                           ; C20F011E
>	v_mad_f32 v14, v12, v5, v2                                      ; D282000E 040A0B0C
>	v_mac_f32_e32 v7, v22, v22                                      ; 3E0E2D16
>	v_rsq_f32_e32 v23, v7                                           ; 7E2E5D07
>	v_mad_f32 v15, v12, v10, v1                                     ; D282000F 0406150C
>	v_mul_f32_e32 v16, s31, v14                                     ; 10201C1F
>	v_mul_f32_e32 v17, s20, v14                                     ; 10221C14
>	v_mul_f32_e32 v14, s21, v14                                     ; 101C1C15
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v16, s22, v15                                     ; 3E201E16
>	v_mad_f32 v12, v12, v11, v6                                     ; D282000C 041A170C
>	v_mac_f32_e32 v17, s23, v15                                     ; 3E221E17
>	v_mac_f32_e32 v14, s24, v15                                     ; 3E1C1E18
>	v_mac_f32_e32 v14, s27, v12                                     ; 3E1C181B
>	v_mac_f32_e32 v16, s25, v12                                     ; 3E201819
>	v_mac_f32_e32 v17, s26, v12                                     ; 3E22181A
>	v_add_f32_e32 v15, s28, v16                                     ; 061E201C
>	s_load_dwordx4 s[16:19], s[4:5], 0xc                            ; C088050C
>	v_add_f32_e32 v16, s29, v17                                     ; 0620221D
>	v_add_f32_e32 v14, s30, v14                                     ; 061C1C1E
>	s_load_dwordx8 s[28:35], s[4:5], 0x0                            ; C0CE0500
>	v_mul_f32_e32 v7, v23, v20                                      ; 100E2917
>	v_cubema_f32 v12, v5, v10, v11                                  ; D28E000C 042E1505
>	v_mul_f32_e32 v8, v23, v21                                      ; 10102B17
>	v_mul_f32_e32 v24, v7, v5                                       ; 10300B07
>	v_mul_f32_e32 v9, v23, v22                                      ; 10122D17
>	v_mac_f32_e32 v24, v8, v10                                      ; 3E301508
>	v_rcp_f32_e64 v12, |v12|                                        ; D354010C 0000010C
>	v_mac_f32_e32 v24, v9, v11                                      ; 3E301709
>	v_mul_f32_e32 v25, v5, v24                                      ; 10323105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s16, s16, s35                                         ; 87102310
>	image_sample_c v15, v[14:17], s[28:35], s[16:19] dmask:0x1      ; F0A00100 00870F0E
>	v_mul_f32_e32 v26, v10, v24                                     ; 1034310A
>	v_mac_f32_e32 v25, v5, v24                                      ; 3E323105
>	v_cubetc_f32 v14, v5, v10, v11                                  ; D28C000E 042E1505
>	v_mov_b32_e32 v17, 0x3fc00000                                   ; 7E2202FF 3FC00000
>	v_cubesc_f32 v16, v5, v10, v11                                  ; D28A0010 042E1505
>	v_mul_f32_e32 v27, v11, v24                                     ; 1036310B
>	v_mac_f32_e32 v26, v10, v24                                     ; 3E34310A
>	v_mad_f32 v19, v12, v14, v17                                    ; D2820013 04461D0C
>	v_mad_f32 v18, v12, v16, v17                                    ; D2820012 0446210C
>	v_mad_f32 v12, v20, v23, -v25                                   ; D282000C 84662F14
>	v_mac_f32_e32 v27, v11, v24                                     ; 3E36310B
>	v_mul_f32_e32 v12, v5, v12                                      ; 10181905
>	v_mad_f32 v14, v21, v23, -v26                                   ; D282000E 846A2F15
>	s_buffer_load_dword s40, s[0:3], 0x4d                           ; C214014D
>	v_mac_f32_e32 v12, v10, v14                                     ; 3E181D0A
>	v_mad_f32 v14, v22, v23, -v27                                   ; D282000E 846E2F16
>	v_mac_f32_e32 v12, v11, v14                                     ; 3E181D0B
>	v_sub_f32_e32 v14, 1.0, v24                                     ; 081C30F2
>	s_buffer_load_dword s39, s[0:3], 0x4c                           ; C213814C
>	s_buffer_load_dword s41, s[0:3], 0x4e                           ; C214814E
>	v_add_f32_e32 v12, 1.0, v12                                     ; 061818F2
>	v_add_f32_e64 v14, v14, 0 clamp                                 ; D206080E 0001010E
>	v_subrev_f32_e32 v12, v14, v12                                  ; 0A18190E
>	s_buffer_load_dword s42, s[0:3], 0x4f                           ; C215014F
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	v_sub_f32_e32 v14, 1.0, v12                                     ; 081C18F2
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v16, s40, v10                                     ; 10201428
>	v_mac_f32_e32 v16, s39, v5                                      ; 3E200A27
>	v_mad_f32 v30, -v21, v23, v26                                   ; D282001E 246A2F15
>	v_mad_f32 v12, -v12, v14, v14                                   ; D282000C 243A1D0C
>	v_mul_f32_e32 v14, v10, v10                                     ; 101C150A
>	s_buffer_load_dword s15, s[0:3], 0x51                           ; C2078151
>	v_mad_f32 v25, -v20, v23, v25                                   ; D2820019 24662F14
>	v_mul_f32_e32 v26, s40, v30                                     ; 10343C28
>	s_buffer_load_dword s14, s[0:3], 0x50                           ; C2070150
>	v_mad_f32 v14, v5, v5, -v14                                     ; D282000E 843A0B05
>	v_mac_f32_e32 v16, s41, v11                                     ; 3E201629
>	v_mac_f32_e32 v16, s42, v14                                     ; 3E201C2A
>	v_mul_f32_e32 v14, v30, v30                                     ; 101C3D1E
>	v_mad_f32 v31, -v22, v23, v27                                   ; D282001F 246E2F16
>	v_mac_f32_e32 v26, s39, v25                                     ; 3E343227
>	s_buffer_load_dword s36, s[0:3], 0x52                           ; C2120152
>	s_buffer_load_dword s37, s[0:3], 0x53                           ; C2128153
>	v_mad_f32 v14, v25, v25, -v14                                   ; D282000E 843A3319
>	v_mac_f32_e32 v26, s41, v31                                     ; 3E343E29
>	v_mac_f32_e32 v26, s42, v14                                     ; 3E341C2A
>	v_mul_f32_e32 v14, v11, v10                                     ; 101C150B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s15, v14                                     ; 101C1C0F
>	v_mul_f32_e32 v27, v10, v5                                      ; 10360B0A
>	v_mac_f32_e32 v14, s14, v27                                     ; 3E1C360E
>	v_mul_f32_e32 v27, v5, v11                                      ; 10361705
>	v_mac_f32_e32 v14, s36, v27                                     ; 3E1C3624
>	v_mul_f32_e32 v27, v11, v11                                     ; 1036170B
>	v_mac_f32_e32 v14, s37, v27                                     ; 3E1C3625
>	v_mul_f32_e32 v27, v31, v30                                     ; 10363D1F
>	s_buffer_load_dword s13, s[0:3], 0x60                           ; C2068160
>	s_buffer_load_dword s38, s[0:3], 0x54                           ; C2130154
>	v_mul_f32_e32 v27, s15, v27                                     ; 1036360F
>	v_mul_f32_e32 v28, v30, v25                                     ; 1038331E
>	v_mac_f32_e32 v27, s14, v28                                     ; 3E36380E
>	v_mul_f32_e32 v28, v25, v31                                     ; 10383F19
>	v_mac_f32_e32 v27, s36, v28                                     ; 3E363824
>	v_mul_f32_e32 v28, v31, v31                                     ; 10383F1F
>	s_buffer_load_dword s7, s[0:3], 0x4                             ; C2038104
>	v_add_f32_e32 v14, v14, v16                                     ; 061C210E
>	v_mac_f32_e32 v27, s37, v28                                     ; 3E363825
>	s_buffer_load_dword s6, s[0:3], 0x5                             ; C2030105
>	v_add_f32_e32 v16, v27, v26                                     ; 0620351B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v14, s38, v14                                     ; 061C1C26
>	v_mov_b32_e32 v4, s13                                           ; 7E08020D
>	s_buffer_load_dword s13, s[0:3], 0x6                            ; C2068106
>	v_mul_f32_e32 v14, 0x3fa66666, v14                              ; 101C1CFF 3FA66666
>	v_add_f32_e32 v16, s38, v16                                     ; 06202026
>	v_mov_b32_e32 v26, 0x3feccccd                                   ; 7E3402FF 3FECCCCD
>	v_madak_f32_e32 v16, v26, v16, 0xbe99999a                       ; 4220211A BE99999A
>	v_add_f32_e64 v14, v14, 0 clamp                                 ; D206080E 0001010E
>	v_mov_b32_e32 v26, 0xbf4ccccd                                   ; 7E3402FF BF4CCCCD
>	v_mad_f32 v32, v26, v14, 1.0                                    ; D2820020 03CA1D1A
>	v_mad_f32 v14, v20, v23, -s7                                    ; D282000E 801E2F14
>	v_mad_f32 v20, v21, v23, -s6                                    ; D2820014 801A2F15
>	v_mul_f32_e32 v14, 0.5, v14                                     ; 101C1CF0
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v21, v22, v23, -s13                                   ; D2820015 80362F16
>	v_mul_f32_e32 v20, 0.5, v20                                     ; 102828F0
>	v_mul_f32_e32 v22, v14, v14                                     ; 102C1D0E
>	v_mul_f32_e32 v21, 0.5, v21                                     ; 102A2AF0
>	v_mac_f32_e32 v22, v20, v20                                     ; 3E2C2914
>	v_mac_f32_e32 v22, v21, v21                                     ; 3E2C2B15
>	v_rsq_f32_e32 v22, v22                                          ; 7E2C5D16
>	s_buffer_load_dword s12, s[0:3], 0x61                           ; C2060161
>	s_buffer_load_dword s43, s[0:3], 0xc                            ; C215810C
>	s_buffer_load_dword s44, s[0:3], 0xd                            ; C216010D
>	s_buffer_load_dword s45, s[0:3], 0xe                            ; C216810E
>	v_mul_f32_e32 v33, v22, v14                                     ; 10421D16
>	v_add_f32_e64 v14, v16, 0 clamp                                 ; D206080E 00010110
>	v_mul_f32_e32 v16, s7, v5                                       ; 10200A07
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	s_load_dwordx4 s[16:19], s[4:5], 0x1c                           ; C088051C
>	v_mad_f32 v16, v10, -s6, -v16                                   ; D2820010 C4400D0A
>	s_load_dwordx8 s[28:35], s[4:5], 0x20                           ; C0CE0520
>	s_load_dwordx4 s[36:39], s[4:5], 0x2c                           ; C092052C
>	v_mad_f32 v16, -v11, s13, v16                                   ; D2820010 24401B0B
>	v_mad_f32 v36, -v14, v12, v12                                   ; D2820024 2432190E
>	v_mov_b32_e32 v14, 0x41100000                                   ; 7E1C02FF 41100000
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v15, v15, v15                                     ; 101E1F0F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v14, v14, s12, 2.0                                    ; D282000E 03D0190E
>	v_mul_f32_e32 v34, v22, v20                                     ; 10442916
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	v_mul_f32_e32 v20, s43, v15                                     ; 10281E2B
>	v_mul_f32_e32 v35, v22, v21                                     ; 10462B16
>	v_mul_f32_e32 v21, s44, v15                                     ; 102A1E2C
>	v_mul_f32_e32 v15, s45, v15                                     ; 101E1E2D
>	v_mul_f32_e32 v37, v20, v16                                     ; 104A2114
>	v_exp_f32_e32 v14, v14                                          ; 7E1C4B0E
>	v_cubeid_f32 v20, v5, v10, v11                                  ; D2880014 042E1505
>	v_mul_f32_e32 v38, v21, v16                                     ; 104C2115
>	v_mul_f32_e32 v39, v15, v16                                     ; 104E210F
>	s_and_b32 s16, s16, s27                                         ; 87101B10
>	s_and_b64 exec, exec, s[8:9]                                    ; 87FE087E
>	v_add_f32_e64 v15, v24, 0 clamp                                 ; D206080F 00010118
>	image_sample v[26:29], v[18:21], s[20:27], s[16:19] dmask:0xf   ; F0800F00 00851A12
>	s_buffer_load_dword s4, s[0:3], 0x58                            ; C2020158
>	v_max_f32_e32 v40, v15, v16                                     ; 2050210F
>	v_mov_b32_e32 v16, 0x40c00000                                   ; 7E2002FF 40C00000
>	v_cubeid_f32 v19, v25, v30, v31                                 ; D2880013 047E3D19
>	v_cubetc_f32 v18, v25, v30, v31                                 ; D28C0012 047E3D19
>	v_cubesc_f32 v43, v25, v30, v31                                 ; D28A002B 047E3D19
>	v_cubema_f32 v25, v25, v30, v31                                 ; D28E0019 047E3D19
>	v_mad_f32 v20, -s12, v16, v16                                   ; D2820014 2442200C
>	v_sub_f32_e32 v16, 1.0, v15                                     ; 08201EF2
>	v_rcp_f32_e64 v25, |v25|                                        ; D3540119 00000119
>	v_log_f32_e32 v21, v16                                          ; 7E2A4F10
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v22, s4                                           ; 7E2C0204
>	v_mad_f32 v18, v25, v18, v17                                    ; D2820012 04462519
>	v_mac_f32_e32 v17, v25, v43                                     ; 3E225719
>	v_mov_b32_e32 v16, 0x40a00000                                   ; 7E2002FF 40A00000
>	image_sample_l v[17:19], v[17:20], s[28:35], s[36:39] dmask:0x7 ; F0900700 01271111
>	v_mul_legacy_f32_e32 v20, v16, v21                              ; 0E282B10
>	v_max_f32_e32 v21, s12, v22                                     ; 202A2C0C
>	v_exp_f32_e32 v20, v20                                          ; 7E284B14
>	v_subrev_f32_e32 v21, s4, v21                                   ; 0A2A2A04
>	v_mad_f32 v31, v21, v20, v22                                    ; D282001F 045A2915
>	v_mul_f32_e32 v21, s7, v33                                      ; 102A4207
>	v_mad_f32 v21, v34, -s6, -v21                                   ; D2820015 C4540D22
>	v_mad_f32 v21, -v35, s13, v21                                   ; D2820015 24541B23
>	s_buffer_load_dword s5, s[0:3], 0x59                            ; C2028159
>	v_add_f32_e64 v21, v21, 0 clamp                                 ; D2060815 00010115
>	s_buffer_load_dword s8, s[0:3], 0x5a                            ; C204015A
>	v_sub_f32_e32 v21, 1.0, v21                                     ; 082A2AF2
>	v_log_f32_e32 v21, v21                                          ; 7E2A4F15
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v23, s5                                           ; 7E2E0205
>	v_max_f32_e32 v25, s12, v23                                     ; 20322E0C
>	v_mov_b32_e32 v24, s8                                           ; 7E300208
>	v_max_f32_e32 v30, s12, v24                                     ; 203C300C
>	v_subrev_f32_e32 v25, s5, v25                                   ; 0A323205
>	v_mul_legacy_f32_e32 v21, v16, v21                              ; 0E2A2B10
>	v_mad_f32 v43, v25, v20, v23                                    ; D282002B 045E2919
>	v_subrev_f32_e32 v30, s8, v30                                   ; 0A3C3C08
>	v_exp_f32_e32 v25, v21                                          ; 7E324B15
>	v_sub_f32_e32 v21, 1.0, v22                                     ; 082A2CF2
>	v_mad_f32 v20, v30, v20, v24                                    ; D2820014 0462291E
>	v_mad_f32 v30, v21, v25, v22                                    ; D282001E 045A3315
>	v_sub_f32_e32 v22, 1.0, v23                                     ; 082C2EF2
>	v_mul_f32_e32 v33, v33, v5                                      ; 10420B21
>	v_mad_f32 v44, v22, v25, v23                                    ; D282002C 045E3316
>	v_sub_f32_e32 v23, 1.0, v24                                     ; 082E30F2
>	v_mad_f32 v25, v23, v25, v24                                    ; D2820019 04623317
>	v_mac_f32_e32 v33, v34, v10                                     ; 3E421522
>	v_mul_f32_e32 v24, -0.5, v14                                    ; 10301CF1
>	v_exp_f32_e32 v24, v24                                          ; 7E304B18
>	v_mac_f32_e32 v33, v35, v11                                     ; 3E421723
>	v_sub_f32_e32 v24, 2.0, v24                                     ; 083030F4
>	v_add_f32_e64 v33, v33, 0 clamp                                 ; D2060821 00010121
>	v_log_f32_e32 v33, v33                                          ; 7E424F21
>	v_rcp_f32_e32 v24, v24                                          ; 7E305518
>	v_add_f32_e32 v45, 2.0, v14                                     ; 065A1CF4
>	v_mul_f32_e32 v45, 0x3e800000, v45                              ; 105A5AFF 3E800000
>	v_mul_legacy_f32_e32 v33, v14, v33                              ; 0E42430E
>	v_mul_f32_e32 v24, v24, v45                                     ; 10305B18
>	v_mul_f32_e32 v30, v30, v37                                     ; 103C4B1E
>	v_mul_f32_e32 v34, v44, v38                                     ; 10444D2C
>	v_mul_f32_e32 v25, v25, v39                                     ; 10324F19
>	v_mul_f32_e32 v30, v24, v30                                     ; 103C3D18
>	v_exp_f32_e32 v33, v33                                          ; 7E424B21
>	v_mul_f32_e32 v34, v24, v34                                     ; 10444518
>	v_mul_f32_e32 v25, v24, v25                                     ; 10323318
>	v_mul_f32_e32 v30, v33, v30                                     ; 103C3D21
>	v_mul_f32_e32 v34, v33, v34                                     ; 10444521
>	v_mul_f32_e32 v33, v33, v25                                     ; 10423321
>	v_mov_b32_e32 v25, 0x3727c5ac                                   ; 7E3202FF 3727C5AC
>	v_add_f32_e32 v35, v25, v40                                     ; 06465119
>	v_rcp_f32_e32 v35, v35                                          ; 7E465523
>	v_mov_b32_e32 v41, 0x3eaaaa9f                                   ; 7E5202FF 3EAAAA9F
>	v_mul_f32_e32 v42, s4, v41                                      ; 10545204
>	v_mac_f32_e32 v42, s5, v41                                      ; 3E545205
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_mac_f32_e32 v42, s8, v41                                      ; 3E545208
>	v_mul_f32_e32 v30, v35, v30                                     ; 103C3D23
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mac_f32_e32 v34, v18, v43                                     ; 3E445712
>	v_mul_f32_e32 v26, v29, v26                                     ; 1034351D
>	v_sub_f32_e32 v18, 1.0, v42                                     ; 082454F2
>	v_mac_f32_e32 v30, v17, v31                                     ; 3E3C3F11
>	v_mul_f32_e32 v17, v29, v28                                     ; 1022391D
>	v_add_f32_e64 v28, v18, 0 clamp                                 ; D206081C 00010112
>	v_mul_f32_e32 v18, 4.0, v26                                     ; 102434F6
>	v_mul_f32_e32 v27, v29, v27                                     ; 1036371D
>	v_mul_f32_e32 v18, v18, v28                                     ; 10243912
>	v_mul_f32_e32 v26, v28, v37                                     ; 10344B1C
>	v_mul_f32_e32 v33, v35, v33                                     ; 10424323
>	v_mul_f32_e32 v17, 4.0, v17                                     ; 102222F6
>	v_mac_f32_e32 v26, v32, v18                                     ; 3E342520
>	v_mul_f32_e32 v18, 4.0, v27                                     ; 102436F6
>	v_mac_f32_e32 v33, v19, v20                                     ; 3E422913
>	v_mul_f32_e32 v18, v18, v28                                     ; 10243912
>	v_mul_f32_e32 v27, v28, v38                                     ; 10364D1C
>	v_mul_f32_e32 v17, v17, v28                                     ; 10223911
>	v_mul_f32_e32 v20, v28, v39                                     ; 10284F1C
>	v_mac_f32_e32 v27, v32, v18                                     ; 3E362520
>	v_mac_f32_e32 v20, v32, v17                                     ; 3E282320
>	v_mul_f32_e32 v19, v36, v30                                     ; 10263D24
>	v_mul_f32_e32 v18, v36, v34                                     ; 10244524
>	v_mul_f32_e32 v17, v36, v33                                     ; 10224324
>	v_mov_b32_e32 v29, 0xc8                                         ; 7E3A02FF 000000C8
>	v_mov_b32_e32 v30, 0                                            ; 7E3C0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v31, vcc, 0xffffffe8, v29                         ; 4A3E3AFF FFFFFFE8
>	buffer_load_dword v31, v31, s[0:3], 0 offen                     ; E0301000 80001F1F
>	v_add_i32_e32 v32, vcc, 0xffffffec, v29                         ; 4A403AFF FFFFFFEC
>	buffer_load_dword v32, v32, s[0:3], 0 offen                     ; E0301000 80002020
>	v_add_i32_e32 v33, vcc, -16, v29                                ; 4A423AD0
>	buffer_load_dword v33, v33, s[0:3], 0 offen                     ; E0301000 80002121
>	v_add_i32_e32 v39, vcc, -4, v29                                 ; 4A4E3AC4
>	buffer_load_dword v39, v39, s[0:3], 0 offen                     ; E0301000 80002727
>	buffer_load_dword v40, v29, s[0:3], 0 offen                     ; E0301000 8000281D
>	v_add_i32_e32 v30, vcc, 1, v30                                  ; 4A3C3C81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v31, v2, v31                                   ; 0A3E3F02
>	v_mul_f32_e32 v34, v31, v31                                     ; 10443F1F
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v32, v1, v32                                   ; 0A404101
>	v_mac_f32_e32 v34, v32, v32                                     ; 3E444120
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v33, v6, v33                                   ; 0A424306
>	v_mac_f32_e32 v34, v33, v33                                     ; 3E444321
>	v_rsq_f32_e32 v35, v34                                          ; 7E465D22
>	v_mul_f32_e32 v36, v35, v31                                     ; 10483F23
>	v_mad_f32 v31, v35, v31, v7                                     ; D282001F 041E3F23
>	v_mul_f32_e32 v37, v35, v32                                     ; 104A4123
>	v_mad_f32 v32, v35, v32, v8                                     ; D2820020 04224123
>	v_mul_f32_e32 v38, v35, v33                                     ; 104C4323
>	v_mad_f32 v33, v35, v33, v9                                     ; D2820021 04264323
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_add_i32_e32 v35, vcc, -12, v29                                ; 4A463ACC
>	buffer_load_dword v35, v35, s[0:3], 0 offen                     ; E0301000 80002323
>	v_mul_f32_e32 v31, 0.5, v31                                     ; 103E3EF0
>	v_mul_f32_e32 v32, 0.5, v32                                     ; 104040F0
>	v_mul_f32_e32 v33, 0.5, v33                                     ; 104242F0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v34, v35, v34                                     ; 10444523
>	v_add_i32_e32 v35, vcc, -8, v29                                 ; 4A463AC8
>	buffer_load_dword v35, v35, s[0:3], 0 offen                     ; E0301000 80002323
>	v_add_f32_e64 v34, v34, 0 clamp                                 ; D2060822 00010122
>	v_mad_f32 v39, -v34, v39, v39                                   ; D2820027 249E4F22
>	v_add_i32_e32 v29, vcc, 32, v29                                 ; 4A3A3AA0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v35, -v34, v35, v35                                   ; D2820023 248E4722
>	v_mad_f32 v34, -v34, v40, v40                                   ; D2820022 24A25122
>	v_mul_f32_e32 v40, v31, v31                                     ; 10503F1F
>	v_mac_f32_e32 v40, v32, v32                                     ; 3E504120
>	v_mac_f32_e32 v40, v33, v33                                     ; 3E504321
>	v_rsq_f32_e32 v40, v40                                          ; 7E505D28
>	v_mul_f32_e32 v31, v40, v31                                     ; 103E3F28
>	v_mul_f32_e32 v32, v40, v32                                     ; 10404128
>	v_mul_f32_e32 v33, v40, v33                                     ; 10424328
>	v_mul_f32_e32 v40, v5, v36                                      ; 10504905
>	v_mul_f32_e32 v36, v31, v36                                     ; 1048491F
>	v_mac_f32_e32 v36, v32, v37                                     ; 3E484B20
>	v_mul_f32_e32 v31, v31, v5                                      ; 103E0B1F
>	v_mac_f32_e32 v36, v33, v38                                     ; 3E484D21
>	v_mac_f32_e32 v31, v32, v10                                     ; 3E3E1520
>	v_add_f32_e64 v32, v36, 0 clamp                                 ; D2060820 00010124
>	v_sub_f32_e32 v32, 1.0, v32                                     ; 084040F2
>	v_log_f32_e32 v32, v32                                          ; 7E404F20
>	v_mac_f32_e32 v31, v33, v11                                     ; 3E3E1721
>	v_mac_f32_e32 v40, v10, v37                                     ; 3E504B0A
>	v_add_f32_e64 v31, v31, 0 clamp                                 ; D206081F 0001011F
>	v_mul_legacy_f32_e32 v32, v16, v32                              ; 0E404110
>	v_log_f32_e32 v31, v31                                          ; 7E3E4F1F
>	v_mac_f32_e32 v40, v11, v38                                     ; 3E504D0B
>	v_add_f32_e64 v33, v40, 0 clamp                                 ; D2060821 00010128
>	v_exp_f32_e32 v32, v32                                          ; 7E404B20
>	v_mul_f32_e32 v35, v35, v33                                     ; 10464323
>	v_mad_f32 v36, v32, v21, s4                                     ; D2820024 00122B20
>	v_mac_f32_e32 v26, v28, v35                                     ; 3E34471C
>	v_mul_f32_e32 v35, v36, v35                                     ; 10464724
>	v_mul_f32_e32 v36, v39, v33                                     ; 10484327
>	v_mad_f32 v37, v32, v22, s5                                     ; D2820025 00162D20
>	v_mul_f32_e32 v34, v34, v33                                     ; 10444322
>	v_mad_f32 v32, v32, v23, s8                                     ; D2820020 00222F20
>	v_mul_f32_e32 v32, v32, v34                                     ; 10404520
>	v_mul_legacy_f32_e32 v31, v14, v31                              ; 0E3E3F0E
>	v_mac_f32_e32 v27, v28, v36                                     ; 3E36491C
>	v_mul_f32_e32 v36, v37, v36                                     ; 10484925
>	v_mac_f32_e32 v20, v28, v34                                     ; 3E28451C
>	v_mul_f32_e32 v34, v24, v35                                     ; 10444718
>	v_exp_f32_e32 v31, v31                                          ; 7E3E4B1F
>	v_mul_f32_e32 v35, v24, v36                                     ; 10464918
>	v_mul_f32_e32 v32, v24, v32                                     ; 10404118
>	v_mul_f32_e32 v34, v31, v34                                     ; 1044451F
>	v_mul_f32_e32 v35, v31, v35                                     ; 1046471F
>	v_mul_f32_e32 v31, v31, v32                                     ; 103E411F
>	v_max_f32_e32 v32, v15, v33                                     ; 2040430F
>	v_add_f32_e32 v32, v25, v32                                     ; 06404119
>	v_rcp_f32_e32 v32, v32                                          ; 7E405520
>	v_mul_f32_e32 v33, v32, v34                                     ; 10424520
>	v_mul_f32_e32 v34, v32, v35                                     ; 10444720
>	v_mul_f32_e32 v31, v32, v31                                     ; 103E3F20
>	v_mac_f32_e32 v19, v12, v33                                     ; 3E26430C
>	v_mac_f32_e32 v18, v12, v34                                     ; 3E24450C
>	v_mac_f32_e32 v17, v12, v31                                     ; 3E223F0C
>	v_cmp_lt_i32_e32 vcc, 3, v30                                    ; 7D023C83
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s4, s[0:3], 0x5c                            ; C202015C
>	s_buffer_load_dword s5, s[0:3], 0x5d                            ; C202815D
>	s_buffer_load_dword s6, s[0:3], 0x5e                            ; C203015E
>	s_buffer_load_dword s7, s[0:3], 0x8                             ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                             ; C2040109
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v19, s4, v26                                      ; 3E263404
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v18, s5, v27                                      ; 3E243605
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_subrev_f32_e32 v1, s4, v1                                     ; 0A020204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_max_f32_e32 v1, 0, v1                                         ; 20020280
>	v_interp_p1_f32 v0, v0, 0, 1, [m0]                              ; C8000400
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                        ; C8010403
>	v_mul_f32_e32 v1, v2, v1                                        ; 10020302
>	v_log_f32_e32 v1, v1                                            ; 7E024F01
>	v_floor_f32_e32 v2, s5                                          ; 7E044805
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_mul_f32_e32 v2, 0x41000000, v2                                ; 100404FF 41000000
>	v_mul_legacy_f32_e32 v1, v2, v1                                 ; 0E020302
>	v_exp_f32_e32 v1, v1                                            ; 7E024B01
>	v_add_f32_e64 v1, v1, 0 clamp                                   ; D2060801 00010101
>	v_mul_f32_e32 v3, v1, v0                                        ; 10060101
>	v_mad_f32 v0, -v3, s7, s7                                       ; D2820000 201C0F03
>	v_mad_f32 v1, -v3, s8, s8                                       ; D2820001 20201103
>	v_mac_f32_e32 v17, s6, v20                                      ; 3E222806
>	v_mad_f32 v2, -v3, s0, s0                                       ; D2820002 20000103
>	v_mac_f32_e32 v0, v3, v19                                       ; 3E002703
>	v_mac_f32_e32 v1, v3, v18                                       ; 3E022503
>	v_mac_f32_e32 v2, v3, v17                                       ; 3E042303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 48
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2224 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SVIEW[0], 2D, FLOAT
>DCL SVIEW[1], 2D, FLOAT
>DCL CONST[2]
>DCL TEMP[0..1], LOCAL
>  0: MOV TEMP[0].xy, IN[1].xyyy
>  1: TEX TEMP[0].xw, TEMP[0], SAMP[0], 2D
>  2: LRP TEMP[1].xyz, TEMP[0].xxxx, CONST[2].xyzz, IN[0].xyzz
>  3: MUL TEMP[0].x, TEMP[0].wwww, IN[0].wwww
>  4: MOV TEMP[1].w, TEMP[0].xxxx
>  5: MOV TEMP[0].xy, IN[1].zwww
>  6: TEX TEMP[0].w, TEMP[0], SAMP[1], 2D
>  7: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[0].wwww
>  8: MOV OUT[0], TEMP[1]
>  9: END
>radeonsi: Compiling shader 136
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <8 x i32>, <8 x i32> addrspace(2)* %25, align 32, !invariant.load !0
>  %27 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %28 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %27, i64 0, i64 3, !amdgpu.uniform !0
>  %29 = load <4 x i32>, <4 x i32> addrspace(2)* %28, align 16, !invariant.load !0
>  %30 = extractelement <8 x i32> %26, i32 7
>  %31 = extractelement <4 x i32> %29, i32 0
>  %32 = and i32 %31, %30
>  %33 = insertelement <4 x i32> %29, i32 %32, i32 0
>  %34 = bitcast float %23 to i32
>  %35 = bitcast float %24 to i32
>  %36 = insertelement <2 x i32> undef, i32 %34, i32 0
>  %37 = insertelement <2 x i32> %36, i32 %35, i32 1
>  %38 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %37, <8 x i32> %26, <4 x i32> %33, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %39 = extractelement <4 x float> %38, i32 0
>  %40 = extractelement <4 x float> %38, i32 3
>  %41 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %42 = load <16 x i8>, <16 x i8> addrspace(2)* %41, align 16, !invariant.load !0
>  %43 = call float @llvm.SI.load.const(<16 x i8> %42, i32 32)
>  %44 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %45 = fsub float 1.000000e+00, %39
>  %46 = fmul float %43, %39
>  %47 = fmul float %44, %45
>  %48 = fadd float %46, %47
>  %49 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %50 = load <16 x i8>, <16 x i8> addrspace(2)* %49, align 16, !invariant.load !0
>  %51 = call float @llvm.SI.load.const(<16 x i8> %50, i32 36)
>  %52 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %53 = fsub float 1.000000e+00, %39
>  %54 = fmul float %51, %39
>  %55 = fmul float %52, %53
>  %56 = fadd float %54, %55
>  %57 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %58 = load <16 x i8>, <16 x i8> addrspace(2)* %57, align 16, !invariant.load !0
>  %59 = call float @llvm.SI.load.const(<16 x i8> %58, i32 40)
>  %60 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %61 = fsub float 1.000000e+00, %39
>  %62 = fmul float %59, %39
>  %63 = fmul float %60, %61
>  %64 = fadd float %62, %63
>  %65 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %66 = fmul float %40, %65
>  %67 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %68 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %69 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %70 = load <8 x i32>, <8 x i32> addrspace(2)* %69, align 32, !invariant.load !0
>  %71 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %72 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %71, i64 0, i64 7, !amdgpu.uniform !0
>  %73 = load <4 x i32>, <4 x i32> addrspace(2)* %72, align 16, !invariant.load !0
>  %74 = extractelement <8 x i32> %70, i32 7
>  %75 = extractelement <4 x i32> %73, i32 0
>  %76 = and i32 %75, %74
>  %77 = insertelement <4 x i32> %73, i32 %76, i32 0
>  %78 = bitcast float %67 to i32
>  %79 = bitcast float %68 to i32
>  %80 = insertelement <2 x i32> undef, i32 %78, i32 0
>  %81 = insertelement <2 x i32> %80, i32 %79, i32 1
>  %82 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %81, <8 x i32> %70, <4 x i32> %77, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %83 = extractelement <4 x float> %82, i32 3
>  %84 = fmul float %48, %83
>  %85 = fmul float %56, %83
>  %86 = fmul float %64, %83
>  %87 = bitcast float %5 to i32
>  %88 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %87, 10
>  %89 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %88, float %84, 11
>  %90 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %89, float %85, 12
>  %91 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %90, float %86, 13
>  %92 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %91, float %66, 14
>  %93 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %92, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %93
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                   ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                 ; C0860B04
>	s_load_dwordx4 s[8:11], s[10:11], 0x8                  ; C0840B08
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                     ; C0800300
>	v_mov_b32_e32 v0, 0x36a7c5ac                           ; 7E0002FF 36A7C5AC
>	s_waitcnt lgkmcnt(0)                                   ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen   ; E00C2000 80010704
>	s_waitcnt vmcnt(0)                                     ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[12:15], 0 idxen ; E00C2000 80030905
>	buffer_load_format_xyzw v[3:6], v6, s[8:11], 0 idxen   ; E00C2000 80020306
>	s_buffer_load_dword s10, s[0:3], 0xb                   ; C205010B
>	s_buffer_load_dword s9, s[0:3], 0xa                    ; C204810A
>	s_buffer_load_dword s13, s[0:3], 0xe                   ; C206810E
>	s_buffer_load_dword s4, s[0:3], 0x0                    ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                    ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x6                    ; C2030106
>	s_buffer_load_dword s7, s[0:3], 0x8                    ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                    ; C2040109
>	s_buffer_load_dword s11, s[0:3], 0xc                   ; C205810C
>	s_buffer_load_dword s12, s[0:3], 0xd                   ; C206010D
>	s_buffer_load_dword s0, s[0:3], 0xf                    ; C200010F
>	s_waitcnt vmcnt(0) lgkmcnt(0)                          ; BF8C0070
>	v_mov_b32_e32 v6, s10                                  ; 7E0C020A
>	v_mov_b32_e32 v5, s9                                   ; 7E0A0209
>	v_mov_b32_e32 v13, s13                                 ; 7E1A020D
>	v_mov_b32_e32 v1, 1.0                                  ; 7E0202F2
>	v_mov_b32_e32 v14, s0                                  ; 7E1C0200
>	v_mac_f32_e32 v6, s8, v8                               ; 3E0C1008
>	v_mac_f32_e32 v5, s7, v7                               ; 3E0A0E07
>	v_mac_f32_e32 v13, s11, v7                             ; 3E1A0E0B
>	v_add_f32_e32 v6, v6, v6                               ; 060C0D06
>	v_mac_f32_e32 v14, s12, v8                             ; 3E1C100C
>	v_add_f32_e32 v5, v5, v5                               ; 060A0B05
>	v_add_f32_e32 v7, v0, v13                              ; 060E1B00
>	exp 15, 32, 0, 0, 0, v11, v10, v9, v12                 ; F800020F 0C090A0B
>	v_add_f32_e32 v0, v0, v14                              ; 06001D00
>	v_mul_f32_e32 v6, s5, v6                               ; 100C0C05
>	exp 15, 33, 0, 0, 0, v3, v4, v7, v0                    ; F800021F 00070403
>	v_mad_f32 v5, v5, s4, -1.0                             ; D2820005 03CC0905
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>	v_mad_f32 v0, v6, s6, -s6                              ; D2820000 80180D06
>	v_mov_b32_e32 v3, 0                                    ; 7E060280
>	exp 15, 12, 0, 1, 0, v5, v0, v3, v1                    ; F80008CF 01030005
>	s_waitcnt expcnt(0)                                    ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 228 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                                    ; BE88047E
>	s_wqm_b64 exec, exec                                      ; BEFE0A7E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                      ; C0C60500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                      ; C08E050C
>	s_mov_b32 m0, s11                                         ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                        ; C8000402
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                        ; C0800300
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                  ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                        ; C8040502
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                  ; C8050503
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	s_and_b32 s28, s28, s19                                   ; 871C131C
>	image_sample v[0:1], v[0:1], s[12:19], s[28:31] dmask:0x9 ; F0800900 00E30000
>	v_interp_p1_f32 v4, v2, 0, 0, [m0]                        ; C8100002
>	v_interp_p2_f32 v4, [v4], v3, 0, 0, [m0]                  ; C8110003
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mad_f32 v5, -v0, v4, v4                                 ; D2820005 24120900
>	v_interp_p1_f32 v4, v2, 1, 0, [m0]                        ; C8100102
>	s_buffer_load_dword s11, s[0:3], 0x8                      ; C2058108
>	s_buffer_load_dword s32, s[0:3], 0x9                      ; C2100109
>	s_buffer_load_dword s0, s[0:3], 0xa                       ; C200010A
>	v_interp_p2_f32 v4, [v4], v3, 1, 0, [m0]                  ; C8110103
>	v_mad_f32 v6, -v0, v4, v4                                 ; D2820006 24120900
>	v_interp_p1_f32 v4, v2, 2, 0, [m0]                        ; C8100202
>	v_interp_p2_f32 v4, [v4], v3, 2, 0, [m0]                  ; C8110203
>	v_mad_f32 v7, -v0, v4, v4                                 ; D2820007 24120900
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                     ; C0CA0510
>	s_load_dwordx4 s[4:7], s[4:5], 0x1c                       ; C082051C
>	s_waitcnt lgkmcnt(0)                                      ; BF8C007F
>	v_mac_f32_e32 v5, s11, v0                                 ; 3E0A000B
>	v_mac_f32_e32 v6, s32, v0                                 ; 3E0C0020
>	v_mac_f32_e32 v7, s0, v0                                  ; 3E0E0000
>	v_interp_p1_f32 v0, v2, 3, 0, [m0]                        ; C8000302
>	v_interp_p2_f32 v0, [v0], v3, 3, 0, [m0]                  ; C8010303
>	v_mul_f32_e32 v4, v0, v1                                  ; 10080300
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                        ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]                  ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                        ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]                  ; C8050703
>	s_and_b32 s4, s4, s27                                     ; 87041B04
>	s_and_b64 exec, exec, s[8:9]                              ; 87FE087E
>	image_sample v2, v[0:1], s[20:27], s[4:7] dmask:0x8       ; F0800800 00250200
>	s_waitcnt vmcnt(0)                                        ; BF8C0F70
>	v_mul_f32_e32 v0, v2, v5                                  ; 10000B02
>	v_mul_f32_e32 v1, v2, v6                                  ; 10020D02
>	v_mul_f32_e32 v2, v2, v7                                  ; 10040F02
>	v_mov_b32_e32 v3, v4                                      ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 228 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>VERT
>PROPERTY NEXT_SHADER FRAG
>DCL IN[0]
>DCL IN[1]
>DCL OUT[0], POSITION
>DCL OUT[1], GENERIC[0]
>DCL OUT[2], GENERIC[1]
>DCL OUT[3].x, GENERIC[2]
>DCL CONST[0..230]
>DCL TEMP[0..9], LOCAL
>DCL ADDR[0]
>IMM[0] FLT32 {    1.0000, -32768.0000, -8192.0000,    -0.0000}
>IMM[1] INT32 {-2, 1, 0, 0}
>IMM[2] FLT32 {    0.0039,     0.0000,     0.0000,    -1.0000}
>IMM[3] FLT32 {    0.5000,     0.1000,     0.0010,     8.0000}
>  0: F2I TEMP[0].x, IN[1].xyyy
>  1: UARL ADDR[0].x, TEMP[0].xxxx
>  2: MOV TEMP[1].xyz, CONST[ADDR[0].x+8].xyzx
>  3: UADD TEMP[2].x, TEMP[0].xxxx, IMM[1].xxxx
>  4: UARL ADDR[0].x, TEMP[2].xxxx
>  5: MOV TEMP[2].xyz, CONST[ADDR[0].x+8].xyzx
>  6: UADD TEMP[0].x, TEMP[0].xxxx, IMM[1].yyyy
>  7: UARL ADDR[0].x, TEMP[0].xxxx
>  8: UARL ADDR[0].x, TEMP[0].xxxx
>  9: ADD TEMP[0], CONST[ADDR[0].x+8], IMM[0].yyzw
> 10: FRC TEMP[3].xy, TEMP[0].xyyy
> 11: ADD TEMP[4].xy, TEMP[0].xyyy, -TEMP[3].xyyy
> 12: MUL TEMP[4].xy, TEMP[4].xyyy, IMM[2].xxxx
> 13: MOV TEMP[4].z, TEMP[3].yyxy
> 14: MUL TEMP[5], CONST[0], TEMP[1].xxxx
> 15: MAD TEMP[5], CONST[1], TEMP[1].yyyy, TEMP[5]
> 16: MAD TEMP[5], CONST[2], TEMP[1].zzzz, TEMP[5]
> 17: ADD TEMP[5], TEMP[5], CONST[3]
> 18: MUL TEMP[6], CONST[0], TEMP[2].xxxx
> 19: MAD TEMP[6], CONST[1], TEMP[2].yyyy, TEMP[6]
> 20: MAD TEMP[6], CONST[2], TEMP[2].zzzz, TEMP[6]
> 21: ADD TEMP[6].xyw, TEMP[6], CONST[3]
> 22: RCP TEMP[7].x, TEMP[5].wwww
> 23: RCP TEMP[8].x, TEMP[6].wwww
> 24: MUL TEMP[8].xy, TEMP[6].xyyy, TEMP[8].xxxx
> 25: MAD TEMP[7].xy, TEMP[5].xyyy, TEMP[7].xxxx, -TEMP[8].xyyy
> 26: MUL TEMP[8].x, TEMP[5].wwww, TEMP[6].wwww
> 27: FSLT TEMP[8].x, TEMP[8].xxxx, IMM[2].yyyy
> 28: UCMP TEMP[6].xy, TEMP[8].xxxx, -TEMP[7].xyxx, TEMP[7].xyyy
> 29: MUL TEMP[7].xy, TEMP[6].xyyy, CONST[7].yxxx
> 30: DP2 TEMP[8].x, TEMP[7].xyyy, TEMP[7].xyyy
> 31: RSQ TEMP[8].x, TEMP[8].xxxx
> 32: MUL TEMP[7].xy, TEMP[7].xyyy, TEMP[8].xxxx
> 33: MUL TEMP[7].xy, TEMP[7].xyyy, CONST[7].yyyy
> 34: MUL TEMP[6].x, TEMP[7].xxxx, IN[0].yyyy
> 35: MUL TEMP[7].x, TEMP[7].yyyy, -IN[0].yyyy
> 36: MOV TEMP[6].y, TEMP[7].xxxx
> 37: ADD TEMP[7].xyz, TEMP[1].xyzz, -TEMP[2].xyzz
> 38: DP3 TEMP[7].x, TEMP[7].xyzz, TEMP[7].xyzz
> 39: FSLT TEMP[7].x, TEMP[7].xxxx, IMM[2].zzzz
> 40: UCMP TEMP[2].x, TEMP[7].xxxx, IMM[2].yyyy, TEMP[0].zzzz
> 41: MOV TEMP[7].zw, TEMP[5].wwzw
> 42: MOV TEMP[8].y, IMM[0].xxxx
> 43: RCP TEMP[9].x, CONST[7].yyyy
> 44: MUL TEMP[8].x, CONST[7].xxxx, TEMP[9].xxxx
> 45: ABS TEMP[9].x, TEMP[5].zzzz
> 46: POW TEMP[9].x, TEMP[9].xxxx, CONST[230].wwww
> 47: MUL TEMP[6].xy, TEMP[6].yxxx, TEMP[9].xxxx
> 48: MUL TEMP[2].xy, TEMP[6].xyyy, TEMP[2].xxxx
> 49: MAD TEMP[7].xy, TEMP[2].xyyy, TEMP[8].xyyy, TEMP[5].xyyy
> 50: MOV TEMP[2].w, TEMP[3].yyyy
> 51: MUL TEMP[2].xyz, TEMP[4].xyzz, CONST[230].xxxx
> 52: MOV TEMP[4].x, CONST[230].yyyy
> 53: ADD TEMP[6].x, TEMP[3].yyyy, IMM[2].wwww
> 54: MUL TEMP[6].x, TEMP[6].xxxx, CONST[230].yyyy
> 55: MOV TEMP[4].y, TEMP[6].xxxx
> 56: MOV TEMP[6].y, TEMP[4].xyxx
> 57: ADD TEMP[3].x, CONST[230].yyyy, TEMP[3].yyyy
> 58: FSEQ TEMP[8].x, CONST[230].yyyy, IMM[2].yyyy
> 59: UCMP TEMP[6].x, TEMP[8].xxxx, TEMP[3].xxxx, TEMP[4].xyyy
> 60: ADD TEMP[3].x, IN[0].yyyy, IMM[3].xxxx
> 61: MOV TEMP[3].y, TEMP[0].wwww
> 62: MAD TEMP[4].x, TEMP[5].zzzz, CONST[6].yyyy, CONST[6].xxxx
> 63: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 64: POW TEMP[4].x, TEMP[4].xxxx, CONST[6].zzzz
> 65: ADD TEMP[8].x, IMM[0].xxxx, -CONST[6].wwww
> 66: MAD TEMP[4].x, CONST[6].wwww, TEMP[4].xxxx, TEMP[8].xxxx
> 67: MUL TEMP[0].x, IMM[3].yyyy, TEMP[0].zzzz
> 68: ADD TEMP[0].x, TEMP[5].zzzz, -TEMP[0].xxxx
> 69: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 70: ADD TEMP[1].x, TEMP[1].yyyy, -CONST[4].wwww
> 71: MAX TEMP[1].x, TEMP[1].xxxx, IMM[2].yyyy
> 72: ADD TEMP[5].x, CONST[5].wwww, -CONST[4].wwww
> 73: ADD TEMP[5].x, TEMP[5].xxxx, IMM[3].zzzz
> 74: RCP TEMP[5].x, TEMP[5].xxxx
> 75: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[5].xxxx
> 76: FRC TEMP[5].x, CONST[5].wwww
> 77: MUL TEMP[5].x, TEMP[5].xxxx, IMM[3].wwww
> 78: POW TEMP[1].x, TEMP[1].xxxx, TEMP[5].xxxx
> 79: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 80: MUL TEMP[1].x, TEMP[4].xxxx, TEMP[1].xxxx
> 81: MUL TEMP[1], TEMP[2], TEMP[1].xxxx
> 82: MOV TEMP[2].zw, TEMP[3].yyxy
> 83: MOV TEMP[2].xy, TEMP[6].xyxx
> 84: MOV OUT[1], TEMP[1]
> 85: MOV OUT[2], TEMP[2]
> 86: MOV OUT[0], TEMP[7]
> 87: MOV OUT[3].x, TEMP[0].xxxx
> 88: END
>radeonsi: Compiling shader 137
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_vs <{ float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32) {
>main_body:
>  %16 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 0, !amdgpu.uniform !0
>  %17 = load <16 x i8>, <16 x i8> addrspace(2)* %16, align 16, !invariant.load !0
>  %18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %17, i32 0, i32 %14)
>  %19 = extractelement <4 x float> %18, i32 1
>  %20 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %5, i64 0, i64 1, !amdgpu.uniform !0
>  %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, align 16, !invariant.load !0
>  %22 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %21, i32 0, i32 %15)
>  %23 = extractelement <4 x float> %22, i32 0
>  %24 = fptosi float %23 to i32
>  %25 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, align 16, !invariant.load !0
>  %27 = shl i32 %24, 4
>  %28 = add i32 %27, 128
>  %29 = call float @llvm.SI.load.const(<16 x i8> %26, i32 %28)
>  %30 = shl i32 %24, 4
>  %31 = add i32 %30, 132
>  %32 = call float @llvm.SI.load.const(<16 x i8> %26, i32 %31)
>  %33 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <16 x i8>, <16 x i8> addrspace(2)* %33, align 16, !invariant.load !0
>  %35 = shl i32 %24, 4
>  %36 = add i32 %35, 136
>  %37 = call float @llvm.SI.load.const(<16 x i8> %34, i32 %36)
>  %38 = add i32 %24, -2
>  %39 = shl i32 %38, 4
>  %40 = add i32 %39, 128
>  %41 = call float @llvm.SI.load.const(<16 x i8> %34, i32 %40)
>  %42 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %43 = load <16 x i8>, <16 x i8> addrspace(2)* %42, align 16, !invariant.load !0
>  %44 = shl i32 %38, 4
>  %45 = add i32 %44, 132
>  %46 = call float @llvm.SI.load.const(<16 x i8> %43, i32 %45)
>  %47 = shl i32 %38, 4
>  %48 = add i32 %47, 136
>  %49 = call float @llvm.SI.load.const(<16 x i8> %43, i32 %48)
>  %50 = add i32 %24, 1
>  %51 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %52 = load <16 x i8>, <16 x i8> addrspace(2)* %51, align 16, !invariant.load !0
>  %53 = shl i32 %50, 4
>  %54 = add i32 %53, 128
>  %55 = call float @llvm.SI.load.const(<16 x i8> %52, i32 %54)
>  %56 = fadd float %55, -3.276800e+04
>  %57 = shl i32 %50, 4
>  %58 = add i32 %57, 132
>  %59 = call float @llvm.SI.load.const(<16 x i8> %52, i32 %58)
>  %60 = fadd float %59, -3.276800e+04
>  %61 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %62 = load <16 x i8>, <16 x i8> addrspace(2)* %61, align 16, !invariant.load !0
>  %63 = shl i32 %50, 4
>  %64 = add i32 %63, 136
>  %65 = call float @llvm.SI.load.const(<16 x i8> %62, i32 %64)
>  %66 = fadd float %65, -8.192000e+03
>  %67 = shl i32 %50, 4
>  %68 = add i32 %67, 140
>  %69 = call float @llvm.SI.load.const(<16 x i8> %62, i32 %68)
>  %70 = call float @llvm.floor.f32(float %56)
>  %71 = fsub float %56, %70
>  %72 = call float @llvm.floor.f32(float %60)
>  %73 = fsub float %60, %72
>  %74 = fsub float %56, %71
>  %75 = fsub float %60, %73
>  %76 = fmul float %74, 0x3F70101020000000
>  %77 = fmul float %75, 0x3F70101020000000
>  %78 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %79 = load <16 x i8>, <16 x i8> addrspace(2)* %78, align 16, !invariant.load !0
>  %80 = call float @llvm.SI.load.const(<16 x i8> %79, i32 0)
>  %81 = fmul float %80, %29
>  %82 = call float @llvm.SI.load.const(<16 x i8> %79, i32 4)
>  %83 = fmul float %82, %29
>  %84 = call float @llvm.SI.load.const(<16 x i8> %79, i32 8)
>  %85 = fmul float %84, %29
>  %86 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %87 = load <16 x i8>, <16 x i8> addrspace(2)* %86, align 16, !invariant.load !0
>  %88 = call float @llvm.SI.load.const(<16 x i8> %87, i32 12)
>  %89 = fmul float %88, %29
>  %90 = call float @llvm.SI.load.const(<16 x i8> %87, i32 16)
>  %91 = fmul float %90, %32
>  %92 = fadd float %91, %81
>  %93 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %94 = load <16 x i8>, <16 x i8> addrspace(2)* %93, align 16, !invariant.load !0
>  %95 = call float @llvm.SI.load.const(<16 x i8> %94, i32 20)
>  %96 = fmul float %95, %32
>  %97 = fadd float %96, %83
>  %98 = call float @llvm.SI.load.const(<16 x i8> %94, i32 24)
>  %99 = fmul float %98, %32
>  %100 = fadd float %99, %85
>  %101 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %102 = load <16 x i8>, <16 x i8> addrspace(2)* %101, align 16, !invariant.load !0
>  %103 = call float @llvm.SI.load.const(<16 x i8> %102, i32 28)
>  %104 = fmul float %103, %32
>  %105 = fadd float %104, %89
>  %106 = call float @llvm.SI.load.const(<16 x i8> %102, i32 32)
>  %107 = fmul float %106, %37
>  %108 = fadd float %107, %92
>  %109 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %110 = load <16 x i8>, <16 x i8> addrspace(2)* %109, align 16, !invariant.load !0
>  %111 = call float @llvm.SI.load.const(<16 x i8> %110, i32 36)
>  %112 = fmul float %111, %37
>  %113 = fadd float %112, %97
>  %114 = call float @llvm.SI.load.const(<16 x i8> %110, i32 40)
>  %115 = fmul float %114, %37
>  %116 = fadd float %115, %100
>  %117 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %118 = load <16 x i8>, <16 x i8> addrspace(2)* %117, align 16, !invariant.load !0
>  %119 = call float @llvm.SI.load.const(<16 x i8> %118, i32 44)
>  %120 = fmul float %119, %37
>  %121 = fadd float %120, %105
>  %122 = call float @llvm.SI.load.const(<16 x i8> %118, i32 48)
>  %123 = fadd float %108, %122
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 52)
>  %127 = fadd float %113, %126
>  %128 = call float @llvm.SI.load.const(<16 x i8> %125, i32 56)
>  %129 = fadd float %116, %128
>  %130 = call float @llvm.SI.load.const(<16 x i8> %125, i32 60)
>  %131 = fadd float %121, %130
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 0)
>  %135 = fmul float %134, %41
>  %136 = call float @llvm.SI.load.const(<16 x i8> %133, i32 4)
>  %137 = fmul float %136, %41
>  %138 = call float @llvm.SI.load.const(<16 x i8> %133, i32 12)
>  %139 = fmul float %138, %41
>  %140 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %141 = load <16 x i8>, <16 x i8> addrspace(2)* %140, align 16, !invariant.load !0
>  %142 = call float @llvm.SI.load.const(<16 x i8> %141, i32 16)
>  %143 = fmul float %142, %46
>  %144 = fadd float %143, %135
>  %145 = call float @llvm.SI.load.const(<16 x i8> %141, i32 20)
>  %146 = fmul float %145, %46
>  %147 = fadd float %146, %137
>  %148 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %149 = load <16 x i8>, <16 x i8> addrspace(2)* %148, align 16, !invariant.load !0
>  %150 = call float @llvm.SI.load.const(<16 x i8> %149, i32 28)
>  %151 = fmul float %150, %46
>  %152 = fadd float %151, %139
>  %153 = call float @llvm.SI.load.const(<16 x i8> %149, i32 32)
>  %154 = fmul float %153, %49
>  %155 = fadd float %154, %144
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = call float @llvm.SI.load.const(<16 x i8> %157, i32 36)
>  %159 = fmul float %158, %49
>  %160 = fadd float %159, %147
>  %161 = call float @llvm.SI.load.const(<16 x i8> %157, i32 44)
>  %162 = fmul float %161, %49
>  %163 = fadd float %162, %152
>  %164 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %165 = load <16 x i8>, <16 x i8> addrspace(2)* %164, align 16, !invariant.load !0
>  %166 = call float @llvm.SI.load.const(<16 x i8> %165, i32 48)
>  %167 = fadd float %155, %166
>  %168 = call float @llvm.SI.load.const(<16 x i8> %165, i32 52)
>  %169 = fadd float %160, %168
>  %170 = call float @llvm.SI.load.const(<16 x i8> %165, i32 60)
>  %171 = fadd float %163, %170
>  %172 = fdiv float 1.000000e+00, %131, !fpmath !1
>  %173 = fdiv float 1.000000e+00, %171, !fpmath !1
>  %174 = fmul float %167, %173
>  %175 = fmul float %169, %173
>  %176 = fmul float %123, %172
>  %177 = fsub float %176, %174
>  %178 = fmul float %127, %172
>  %179 = fsub float %178, %175
>  %180 = fmul float %131, %171
>  %181 = fcmp olt float %180, 0.000000e+00
>  %182 = fsub float -0.000000e+00, %177
>  %183 = select i1 %181, float %182, float %177
>  %184 = fsub float -0.000000e+00, %179
>  %185 = select i1 %181, float %184, float %179
>  %186 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %187 = load <16 x i8>, <16 x i8> addrspace(2)* %186, align 16, !invariant.load !0
>  %188 = call float @llvm.SI.load.const(<16 x i8> %187, i32 116)
>  %189 = fmul float %183, %188
>  %190 = call float @llvm.SI.load.const(<16 x i8> %187, i32 112)
>  %191 = fmul float %185, %190
>  %192 = fmul float %189, %189
>  %193 = fmul float %191, %191
>  %194 = fadd float %192, %193
>  %195 = call float @llvm.sqrt.f32(float %194)
>  %196 = fdiv float 1.000000e+00, %195, !fpmath !1
>  %197 = fmul float %189, %196
>  %198 = fmul float %191, %196
>  %199 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %200 = load <16 x i8>, <16 x i8> addrspace(2)* %199, align 16, !invariant.load !0
>  %201 = call float @llvm.SI.load.const(<16 x i8> %200, i32 116)
>  %202 = fmul float %197, %201
>  %203 = call float @llvm.SI.load.const(<16 x i8> %200, i32 116)
>  %204 = fmul float %198, %203
>  %205 = fmul float %202, %19
>  %206 = fmul float %19, %204
>  %207 = fsub float %29, %41
>  %208 = fsub float %32, %46
>  %209 = fsub float %37, %49
>  %210 = fmul float %207, %207
>  %211 = fmul float %208, %208
>  %212 = fadd float %211, %210
>  %213 = fmul float %209, %209
>  %214 = fadd float %212, %213
>  %215 = fcmp olt float %214, 0x3EB0C6F7A0000000
>  %216 = select i1 %215, float 0.000000e+00, float %66
>  %217 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %218 = load <16 x i8>, <16 x i8> addrspace(2)* %217, align 16, !invariant.load !0
>  %219 = call float @llvm.SI.load.const(<16 x i8> %218, i32 116)
>  %220 = fdiv float 1.000000e+00, %219, !fpmath !1
>  %221 = call float @llvm.SI.load.const(<16 x i8> %218, i32 112)
>  %222 = fmul float %221, %220
>  %223 = call float @llvm.fabs.f32(float %129)
>  %224 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %225 = load <16 x i8>, <16 x i8> addrspace(2)* %224, align 16, !invariant.load !0
>  %226 = call float @llvm.SI.load.const(<16 x i8> %225, i32 3692)
>  %227 = call float @llvm.pow.f32(float %223, float %226)
>  %228 = fmul float %206, %227
>  %229 = fmul float %205, %227
>  %230 = fmul float %228, %216
>  %231 = fmul float %229, %216
>  %232 = fmul float %230, %222
>  %233 = fsub float %123, %232
>  %234 = fadd float %231, %127
>  %235 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %236 = load <16 x i8>, <16 x i8> addrspace(2)* %235, align 16, !invariant.load !0
>  %237 = call float @llvm.SI.load.const(<16 x i8> %236, i32 3680)
>  %238 = fmul float %76, %237
>  %239 = call float @llvm.SI.load.const(<16 x i8> %236, i32 3680)
>  %240 = fmul float %77, %239
>  %241 = call float @llvm.SI.load.const(<16 x i8> %236, i32 3680)
>  %242 = fmul float %71, %241
>  %243 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %244 = load <16 x i8>, <16 x i8> addrspace(2)* %243, align 16, !invariant.load !0
>  %245 = call float @llvm.SI.load.const(<16 x i8> %244, i32 3684)
>  %246 = fadd float %73, -1.000000e+00
>  %247 = call float @llvm.SI.load.const(<16 x i8> %244, i32 3684)
>  %248 = fmul float %246, %247
>  %249 = call float @llvm.SI.load.const(<16 x i8> %244, i32 3684)
>  %250 = fadd float %249, %73
>  %251 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %252 = load <16 x i8>, <16 x i8> addrspace(2)* %251, align 16, !invariant.load !0
>  %253 = call float @llvm.SI.load.const(<16 x i8> %252, i32 3684)
>  %254 = fcmp oeq float %253, 0.000000e+00
>  %255 = select i1 %254, float %250, float %245
>  %256 = fadd float %19, 5.000000e-01
>  %257 = call float @llvm.SI.load.const(<16 x i8> %252, i32 100)
>  %258 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %259 = load <16 x i8>, <16 x i8> addrspace(2)* %258, align 16, !invariant.load !0
>  %260 = call float @llvm.SI.load.const(<16 x i8> %259, i32 96)
>  %261 = fmul float %129, %257
>  %262 = fadd float %261, %260
>  %263 = call float @llvm.AMDGPU.clamp.(float %262, float 0.000000e+00, float 1.000000e+00)
>  %264 = call float @llvm.SI.load.const(<16 x i8> %259, i32 104)
>  %265 = call float @llvm.pow.f32(float %263, float %264)
>  %266 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %267 = load <16 x i8>, <16 x i8> addrspace(2)* %266, align 16, !invariant.load !0
>  %268 = call float @llvm.SI.load.const(<16 x i8> %267, i32 108)
>  %269 = fsub float 1.000000e+00, %268
>  %270 = call float @llvm.SI.load.const(<16 x i8> %267, i32 108)
>  %271 = fmul float %270, %265
>  %272 = fadd float %271, %269
>  %273 = fmul float %66, 0x3FB99999A0000000
>  %274 = fsub float %129, %273
>  %275 = fmul float %272, %272
>  %276 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %277 = load <16 x i8>, <16 x i8> addrspace(2)* %276, align 16, !invariant.load !0
>  %278 = call float @llvm.SI.load.const(<16 x i8> %277, i32 76)
>  %279 = fsub float %32, %278
>  %280 = call float @llvm.maxnum.f32(float %279, float 0.000000e+00)
>  %281 = call float @llvm.SI.load.const(<16 x i8> %277, i32 92)
>  %282 = call float @llvm.SI.load.const(<16 x i8> %277, i32 76)
>  %283 = fsub float %281, %282
>  %284 = fadd float %283, 0x3F50624DE0000000
>  %285 = fdiv float 1.000000e+00, %284, !fpmath !1
>  %286 = fmul float %280, %285
>  %287 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %288 = load <16 x i8>, <16 x i8> addrspace(2)* %287, align 16, !invariant.load !0
>  %289 = call float @llvm.SI.load.const(<16 x i8> %288, i32 92)
>  %290 = call float @llvm.floor.f32(float %289)
>  %291 = fsub float %289, %290
>  %292 = fmul float %291, 8.000000e+00
>  %293 = call float @llvm.pow.f32(float %286, float %292)
>  %294 = call float @llvm.AMDGPU.clamp.(float %293, float 0.000000e+00, float 1.000000e+00)
>  %295 = fmul float %275, %294
>  %296 = fmul float %238, %295
>  %297 = fmul float %240, %295
>  %298 = fmul float %242, %295
>  %299 = fmul float %73, %295
>  %300 = bitcast i32 %12 to float
>  %301 = insertvalue <{ float, float, float }> undef, float %300, 2
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %296, float %297, float %298, float %299)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 33, i32 0, float %255, float %248, float %256, float %69)
>  call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 34, i32 0, float %274, float undef, float undef, float undef)
>  call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %233, float %234, float %129, float %131)
>  ret <{ float, float, float }> %301
>}
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #0
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #0
>
>; Function Attrs: nounwind
>declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) #1
>
>attributes #0 = { nounwind readnone }
>attributes #1 = { nounwind }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1], GENERIC[1], PERSPECTIVE
>DCL IN[2].x, GENERIC[2], PERSPECTIVE
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL TEMP[0..1], LOCAL
>  0: MOV_SAT TEMP[0].x, IN[2].xxxx
>  1: MUL TEMP[0].xyz, IN[0].xyzz, TEMP[0].xxxx
>  2: MOV TEMP[1].xy, IN[1].zwww
>  3: TEX TEMP[1], TEMP[1], SAMP[0], 2D
>  4: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
>  5: MAD TEMP[1].x, TEMP[1].wwww, IN[1].xxxx, IN[1].yyyy
>  6: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>  7: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  8: MOV OUT[0], TEMP[0].xyzz
>  9: END
>radeonsi: Compiling shader 138
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %8)
>  %24 = call float @llvm.AMDGPU.clamp.(float %23, float 0.000000e+00, float 1.000000e+00)
>  %25 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %26 = fmul float %25, %24
>  %27 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %28 = fmul float %27, %24
>  %29 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fmul float %29, %24
>  %31 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %32 = call float @llvm.SI.fs.interp(i32 3, i32 1, i32 %6, <2 x i32> %8)
>  %33 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %34 = load <8 x i32>, <8 x i32> addrspace(2)* %33, align 32, !invariant.load !0
>  %35 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %36 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %35, i64 0, i64 3, !amdgpu.uniform !0
>  %37 = load <4 x i32>, <4 x i32> addrspace(2)* %36, align 16, !invariant.load !0
>  %38 = extractelement <8 x i32> %34, i32 7
>  %39 = extractelement <4 x i32> %37, i32 0
>  %40 = and i32 %39, %38
>  %41 = insertelement <4 x i32> %37, i32 %40, i32 0
>  %42 = bitcast float %31 to i32
>  %43 = bitcast float %32 to i32
>  %44 = insertelement <2 x i32> undef, i32 %42, i32 0
>  %45 = insertelement <2 x i32> %44, i32 %43, i32 1
>  %46 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %45, <8 x i32> %34, <4 x i32> %41, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %47 = extractelement <4 x float> %46, i32 0
>  %48 = extractelement <4 x float> %46, i32 1
>  %49 = extractelement <4 x float> %46, i32 2
>  %50 = extractelement <4 x float> %46, i32 3
>  %51 = fmul float %26, %47
>  %52 = fmul float %28, %48
>  %53 = fmul float %30, %49
>  %54 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %55 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %56 = fmul float %50, %54
>  %57 = fadd float %56, %55
>  %58 = call float @llvm.AMDGPU.clamp.(float %57, float 0.000000e+00, float 1.000000e+00)
>  %59 = fmul float %51, %58
>  %60 = fmul float %52, %58
>  %61 = fmul float %53, %58
>  %62 = bitcast float %5 to i32
>  %63 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %62, 10
>  %64 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %63, float %59, 11
>  %65 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %64, float %60, 12
>  %66 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %65, float %61, 13
>  %67 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %66, float %61, 14
>  %68 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %67, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %68
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                 ; C0820B00
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                ; C0840B04
>	v_mov_b32_e32 v0, 0xc7000000                         ; 7E0002FF C7000000
>	v_mov_b32_e32 v1, 0x3b808081                         ; 7E0202FF 3B808081
>	s_waitcnt lgkmcnt(0)                                 ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[4:7], 0 idxen  ; E00C2000 80010604
>	s_waitcnt vmcnt(0)                                   ; BF8C0F70
>	buffer_load_format_xyzw v[3:6], v5, s[8:11], 0 idxen ; E00C2000 80020305
>	s_load_dwordx4 s[4:7], s[2:3], 0x0                   ; C0820300
>	s_waitcnt vmcnt(0)                                   ; BF8C0F70
>	v_mov_b32_e32 v5, 0x358637bd                         ; 7E0A02FF 358637BD
>	v_bfrev_b32_e32 v4, 1                                ; 7E087081
>	s_waitcnt lgkmcnt(0)                                 ; BF8C007F
>	s_buffer_load_dword s29, s[4:7], 0x13                ; C20E8513
>	s_buffer_load_dword s30, s[4:7], 0x17                ; C20F0517
>	s_buffer_load_dword s2, s[4:7], 0x2                  ; C2010502
>	s_buffer_load_dword s3, s[4:7], 0x6                  ; C2018506
>	s_buffer_load_dword s16, s[4:7], 0xa                 ; C208050A
>	s_waitcnt lgkmcnt(0)                                 ; BF8C007F
>	v_mov_b32_e32 v9, s29                                ; 7E12021D
>	v_sub_f32_e32 v9, s30, v9                            ; 0812121E
>	v_add_f32_e32 v9, 0x3a83126f, v9                     ; 061212FF 3A83126F
>	v_rcp_f32_e32 v9, v9                                 ; 7E125509
>	s_buffer_load_dword s31, s[4:7], 0x18                ; C20F8518
>	s_buffer_load_dword s20, s[4:7], 0xe                 ; C20A050E
>	s_buffer_load_dword s32, s[4:7], 0x19                ; C2100519
>	s_buffer_load_dword s23, s[4:7], 0x1a                ; C20B851A
>	s_buffer_load_dword s24, s[4:7], 0x1b                ; C20C051B
>	s_waitcnt lgkmcnt(0)                                 ; BF8C007F
>	v_mov_b32_e32 v8, s31                                ; 7E10021F
>	v_floor_f32_e32 v10, s30                             ; 7E14481E
>	v_sub_f32_e32 v10, s30, v10                          ; 0814141E
>	s_buffer_load_dword s27, s[4:7], 0x398               ; C20D84FF 00000398
>	v_mul_f32_e32 v10, 0x41000000, v10                   ; 101414FF 41000000
>	s_buffer_load_dword s8, s[4:7], 0x0                  ; C2040500
>	s_buffer_load_dword s9, s[4:7], 0x1                  ; C2048501
>	s_buffer_load_dword s10, s[4:7], 0x3                 ; C2050503
>	s_buffer_load_dword s11, s[4:7], 0x4                 ; C2058504
>	s_buffer_load_dword s12, s[4:7], 0x5                 ; C2060505
>	s_buffer_load_dword s13, s[4:7], 0x7                 ; C2068507
>	s_buffer_load_dword s14, s[4:7], 0x8                 ; C2070508
>	s_buffer_load_dword s15, s[4:7], 0x9                 ; C2078509
>	s_buffer_load_dword s17, s[4:7], 0xb                 ; C208850B
>	s_buffer_load_dword s21, s[4:7], 0x399               ; C20A84FF 00000399
>	s_buffer_load_dword s18, s[4:7], 0xc                 ; C209050C
>	s_buffer_load_dword s28, s[4:7], 0xf                 ; C20E050F
>	s_buffer_load_dword s19, s[4:7], 0xd                 ; C209850D
>	s_buffer_load_dword s25, s[4:7], 0x1c                ; C20C851C
>	s_waitcnt lgkmcnt(0)                                 ; BF8C007F
>	v_cmp_eq_f32_e64 s[0:1], s21, 0                      ; D0040000 00010015
>	s_buffer_load_dword s26, s[4:7], 0x1d                ; C20D051D
>	s_buffer_load_dword s22, s[4:7], 0x39b               ; C20B04FF 0000039B
>	s_waitcnt lgkmcnt(0)                                 ; BF8C007F
>	v_rcp_f32_e32 v6, s26                                ; 7E0C541A
>	v_mul_f32_e32 v6, s25, v6                            ; 100C0C19
>	v_cvt_i32_f32_e32 v3, v3                             ; 7E061103
>	v_lshlrev_b32_e32 v3, 4, v3                          ; 34060684
>	v_add_i32_e32 v12, vcc, 0x84, v3                     ; 4A1806FF 00000084
>	v_add_i32_e32 v14, vcc, 0x90, v3                     ; 4A1C06FF 00000090
>	v_add_i32_e32 v15, vcc, 0x94, v3                     ; 4A1E06FF 00000094
>	buffer_load_dword v14, v14, s[4:7], 0 offen          ; E0301000 80010E0E
>	buffer_load_dword v12, v12, s[4:7], 0 offen          ; E0301000 80010C0C
>	buffer_load_dword v15, v15, s[4:7], 0 offen          ; E0301000 80010F0F
>	v_add_i32_e32 v11, vcc, 0x80, v3                     ; 4A1606FF 00000080
>	buffer_load_dword v11, v11, s[4:7], 0 offen          ; E0301000 80010B0B
>	v_add_i32_e32 v13, vcc, 0x88, v3                     ; 4A1A06FF 00000088
>	buffer_load_dword v13, v13, s[4:7], 0 offen          ; E0301000 80010D0D
>	s_waitcnt vmcnt(4)                                   ; BF8C0F74
>	v_add_f32_e32 v14, v0, v14                           ; 061C1D00
>	v_floor_f32_e32 v16, v14                             ; 7E20490E
>	s_waitcnt vmcnt(2)                                   ; BF8C0F72
>	v_add_f32_e32 v0, v0, v15                            ; 06001F00
>	v_subrev_f32_e32 v15, s29, v12                       ; 0A1E181D
>	v_max_f32_e32 v15, 0, v15                            ; 201E1E80
>	v_mul_f32_e32 v9, v9, v15                            ; 10121F09
>	v_floor_f32_e32 v15, v0                              ; 7E1E4900
>	v_subrev_f32_e32 v16, v16, v14                       ; 0A201D10
>	v_subrev_f32_e32 v15, v15, v0                        ; 0A1E010F
>	v_subrev_f32_e32 v14, v16, v14                       ; 0A1C1D10
>	v_subrev_f32_e32 v0, v15, v0                         ; 0A00010F
>	v_mul_f32_e32 v14, v1, v14                           ; 101C1D01
>	v_mul_f32_e32 v0, v1, v0                             ; 10000101
>	s_waitcnt vmcnt(1)                                   ; BF8C0F71
>	v_mul_f32_e32 v1, s2, v11                            ; 10021602
>	v_mac_f32_e32 v1, s3, v12                            ; 3E021803
>	s_waitcnt vmcnt(0)                                   ; BF8C0F70
>	v_mac_f32_e32 v1, s16, v13                           ; 3E021A10
>	v_add_f32_e32 v1, s20, v1                            ; 06020214
>	v_mac_f32_e32 v8, s32, v1                            ; 3E100220
>	v_add_f32_e64 v8, v8, 0 clamp                        ; D2060808 00010108
>	v_log_f32_e32 v8, v8                                 ; 7E104F08
>	v_log_f32_e32 v9, v9                                 ; 7E124F09
>	v_mul_f32_e32 v16, s27, v16                          ; 1020201B
>	v_mul_f32_e32 v14, s27, v14                          ; 101C1C1B
>	v_mul_legacy_f32_e32 v8, s23, v8                     ; 0E101017
>	v_mul_legacy_f32_e32 v9, v10, v9                     ; 0E12130A
>	v_sub_f32_e64 v10, 1.0, s24                          ; D208000A 000030F2
>	v_exp_f32_e32 v8, v8                                 ; 7E104B08
>	v_mac_f32_e32 v10, s24, v8                           ; 3E141018
>	v_exp_f32_e32 v9, v9                                 ; 7E124B09
>	v_add_f32_e64 v9, v9, 0 clamp                        ; D2060809 00010109
>	v_mul_f32_e32 v10, v10, v10                          ; 1014150A
>	v_mul_f32_e32 v9, v9, v10                            ; 10121509
>	v_mul_f32_e32 v0, s27, v0                            ; 1000001B
>	v_add_i32_e32 v10, vcc, 0x60, v3                     ; 4A1406FF 00000060
>	v_mul_f32_e32 v14, v9, v14                           ; 101C1D09
>	v_mul_f32_e32 v0, v9, v0                             ; 10000109
>	v_mul_f32_e32 v16, v9, v16                           ; 10202109
>	v_mul_f32_e32 v9, v9, v15                            ; 10121F09
>	exp 15, 32, 0, 0, 0, v14, v0, v16, v9                ; F800020F 0910000E
>	s_waitcnt expcnt(0)                                  ; BF8C0F0F
>	v_add_i32_e32 v0, vcc, 0x64, v3                      ; 4A0006FF 00000064
>	buffer_load_dword v10, v10, s[4:7], 0 offen          ; E0301000 80010A0A
>	v_add_i32_e32 v9, vcc, 0x68, v3                      ; 4A1206FF 00000068
>	buffer_load_dword v0, v0, s[4:7], 0 offen            ; E0301000 80010000
>	buffer_load_dword v9, v9, s[4:7], 0 offen            ; E0301000 80010909
>	v_mov_b32_e32 v8, s21                                ; 7E100215
>	s_waitcnt vmcnt(2)                                   ; BF8C0F72
>	v_subrev_f32_e32 v14, v10, v11                       ; 0A1C170A
>	v_mul_f32_e32 v14, v14, v14                          ; 101C1D0E
>	s_waitcnt vmcnt(1)                                   ; BF8C0F71
>	v_subrev_f32_e32 v16, v0, v12                        ; 0A201900
>	v_mac_f32_e32 v14, v16, v16                          ; 3E1C2110
>	s_waitcnt vmcnt(0)                                   ; BF8C0F70
>	v_subrev_f32_e32 v16, v9, v13                        ; 0A201B09
>	v_mac_f32_e32 v14, v16, v16                          ; 3E1C2110
>	v_mul_f32_e32 v16, s8, v11                           ; 10201608
>	v_cmp_gt_f32_e64 s[2:3], v5, v14                     ; D0080002 00021D05
>	v_mul_f32_e32 v5, s9, v11                            ; 100A1609
>	v_mul_f32_e32 v11, s10, v11                          ; 1016160A
>	v_mac_f32_e32 v16, s11, v12                          ; 3E20180B
>	v_mac_f32_e32 v5, s12, v12                           ; 3E0A180C
>	v_mac_f32_e32 v11, s13, v12                          ; 3E16180D
>	v_mac_f32_e32 v5, s15, v13                           ; 3E0A1A0F
>	v_mac_f32_e32 v11, s17, v13                          ; 3E161A11
>	v_mac_f32_e32 v16, s14, v13                          ; 3E201A0E
>	v_add_i32_e32 v13, vcc, 0x98, v3                     ; 4A1A06FF 00000098
>	v_add_i32_e32 v3, vcc, 0x9c, v3                      ; 4A0606FF 0000009C
>	buffer_load_dword v3, v3, s[4:7], 0 offen            ; E0301000 80010303
>	buffer_load_dword v13, v13, s[4:7], 0 offen          ; E0301000 80010D0D
>	v_mul_f32_e32 v14, s8, v10                           ; 101C1408
>	v_mul_f32_e32 v12, s9, v10                           ; 10181409
>	v_mul_f32_e32 v10, s10, v10                          ; 1014140A
>	v_mac_f32_e32 v10, s13, v0                           ; 3E14000D
>	v_mac_f32_e32 v14, s11, v0                           ; 3E1C000B
>	v_mac_f32_e32 v12, s12, v0                           ; 3E18000C
>	v_mac_f32_e32 v10, s17, v9                           ; 3E141211
>	v_mac_f32_e32 v14, s14, v9                           ; 3E1C120E
>	v_mac_f32_e32 v12, s15, v9                           ; 3E18120F
>	v_add_f32_e32 v9, s18, v16                           ; 06122012
>	v_mad_f32 v16, v15, s21, -s21                        ; D2820010 80542B0F
>	v_add_f32_e32 v15, s21, v15                          ; 061E1E15
>	v_add_f32_e32 v11, s28, v11                          ; 0616161C
>	v_add_f32_e32 v10, s28, v10                          ; 0614141C
>	v_cndmask_b32_e64 v8, v8, v15, s[0:1]                ; D2000008 00021F08
>	v_rcp_f32_e32 v15, v10                               ; 7E1E550A
>	v_mul_f32_e32 v10, v10, v11                          ; 1014170A
>	v_cmp_gt_f32_e32 vcc, 0, v10                         ; 7C081480
>	v_rcp_f32_e32 v10, v11                               ; 7E14550B
>	v_add_f32_e32 v14, s18, v14                          ; 061C1C12
>	v_add_f32_e32 v12, s19, v12                          ; 06181813
>	v_mul_f32_e32 v14, v15, v14                          ; 101C1D0F
>	v_mul_f32_e32 v12, v15, v12                          ; 1018190F
>	v_add_f32_e32 v5, s19, v5                            ; 060A0A13
>	v_mad_f32 v14, v9, v10, -v14                         ; D282000E 843A1509
>	v_mad_f32 v10, v5, v10, -v12                         ; D282000A 84321505
>	v_xor_b32_e32 v12, v14, v4                           ; 3A18090E
>	v_xor_b32_e32 v4, v10, v4                            ; 3A08090A
>	v_cndmask_b32_e32 v4, v10, v4, vcc                   ; 0008090A
>	v_cndmask_b32_e32 v12, v14, v12, vcc                 ; 0018190E
>	v_mul_f32_e32 v4, s25, v4                            ; 10080819
>	v_mul_f32_e32 v10, s26, v12                          ; 1014181A
>	v_mul_f32_e32 v12, v4, v4                            ; 10180904
>	v_mac_f32_e32 v12, v10, v10                          ; 3E18150A
>	v_and_b32_e32 v15, 0x7fffffff, v1                    ; 361E02FF 7FFFFFFF
>	v_rsq_f32_e32 v12, v12                               ; 7E185D0C
>	v_log_f32_e32 v15, v15                               ; 7E1E4F0F
>	v_add_f32_e32 v0, 0.5, v7                            ; 06000EF0
>	v_mov_b32_e32 v14, v1                                ; 7E1C0301
>	v_mul_legacy_f32_e32 v15, s22, v15                   ; 0E1E1E16
>	v_exp_f32_e32 v15, v15                               ; 7E1E4B0F
>	s_waitcnt vmcnt(1)                                   ; BF8C0F71
>	exp 15, 33, 0, 0, 0, v8, v16, v0, v3                 ; F800021F 03001008
>	s_waitcnt expcnt(0)                                  ; BF8C0F0F
>	v_mul_f32_e32 v3, v12, v4                            ; 1006090C
>	v_mul_f32_e32 v0, v12, v10                           ; 1000150C
>	v_mul_f32_e32 v3, s26, v3                            ; 1006061A
>	v_mul_f32_e32 v0, s26, v0                            ; 1000001A
>	v_mul_f32_e32 v3, v3, v7                             ; 10060F03
>	s_waitcnt vmcnt(0)                                   ; BF8C0F70
>	v_add_f32_e32 v13, 0xc6000000, v13                   ; 061A1AFF C6000000
>	v_mul_f32_e32 v0, v7, v0                             ; 10000107
>	v_mac_f32_e32 v14, 0xbdcccccd, v13                   ; 3E1C1AFF BDCCCCCD
>	v_cndmask_b32_e64 v13, v13, 0, s[2:3]                ; D200000D 0009010D
>	v_mul_f32_e32 v3, v15, v3                            ; 1006070F
>	v_mul_f32_e32 v0, v15, v0                            ; 1000010F
>	v_mul_f32_e32 v3, v13, v3                            ; 1006070D
>	v_mac_f32_e32 v5, v13, v0                            ; 3E0A010D
>	v_mad_f32 v0, -v3, v6, v9                            ; D2820000 24260D03
>	exp 15, 34, 0, 0, 0, v14, v0, v0, v0                 ; F800022F 0000000E
>	exp 15, 12, 0, 1, 0, v0, v5, v1, v11                 ; F80008CF 0B010500
>	s_waitcnt expcnt(0)                                  ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 40
>VGPRS: 20
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1012 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                  ; BE86047E
>	s_wqm_b64 exec, exec                                    ; BEFE0A7E
>	s_mov_b32 m0, s11                                       ; BEFC030B
>	v_interp_p1_f32 v0, v2, 0, 2, [m0]                      ; C8000802
>	v_interp_p2_f32 v0, [v0], v3, 0, 2, [m0]                ; C8010803
>	v_interp_p1_f32 v1, v2, 0, 0, [m0]                      ; C8040002
>	v_add_f32_e64 v0, v0, 0 clamp                           ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                ; C8050003
>	v_mul_f32_e32 v8, v0, v1                                ; 10100300
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; C8040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; C8050103
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C0C60500
>	s_load_dwordx4 s[0:3], s[4:5], 0xc                      ; C080050C
>	v_mul_f32_e32 v9, v0, v1                                ; 10120300
>	v_interp_p1_f32 v1, v2, 2, 0, [m0]                      ; C8040202
>	v_interp_p2_f32 v1, [v1], v3, 2, 0, [m0]                ; C8050203
>	v_mul_f32_e32 v10, v0, v1                               ; 10140300
>	v_interp_p1_f32 v0, v2, 2, 1, [m0]                      ; C8000602
>	v_interp_p2_f32 v0, [v0], v3, 2, 1, [m0]                ; C8010603
>	v_interp_p1_f32 v1, v2, 3, 1, [m0]                      ; C8040702
>	v_interp_p2_f32 v1, [v1], v3, 3, 1, [m0]                ; C8050703
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_and_b32 s0, s0, s19                                   ; 87001300
>	s_and_b64 exec, exec, s[6:7]                            ; 87FE067E
>	image_sample v[4:7], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030400
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v1, v5, v9                                ; 10021305
>	v_interp_p1_f32 v5, v2, 0, 1, [m0]                      ; C8140402
>	v_interp_p2_f32 v5, [v5], v3, 0, 1, [m0]                ; C8150403
>	v_interp_p1_f32 v2, v2, 1, 1, [m0]                      ; C8080502
>	v_interp_p2_f32 v2, [v2], v3, 1, 1, [m0]                ; C8090503
>	v_mac_f32_e32 v2, v5, v7                                ; 3E040F05
>	v_mul_f32_e32 v0, v4, v8                                ; 10001104
>	v_add_f32_e64 v2, v2, 0 clamp                           ; D2060802 00010102
>	v_mul_f32_e32 v4, v6, v10                               ; 10081506
>	v_mul_f32_e32 v0, v2, v0                                ; 10000102
>	v_mul_f32_e32 v1, v2, v1                                ; 10020302
>	v_mul_f32_e32 v2, v2, v4                                ; 10040902
>	v_mov_b32_e32 v3, v2                                    ; 7E060302
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 16
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 188 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].xyz, GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SAMP[3]
>DCL SAMP[4]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL SVIEW[3], 2D, FLOAT
>DCL SVIEW[4], 2D, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..14]
>DCL TEMP[0..9], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,     2.9297,     6.0000}
>IMM[1] FLT32 {    4.0000,     5.0000,     0.0000,     0.0010}
>IMM[2] FLT32 {    8.0000,     0.0000,     0.0000,     0.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[2].xyzz, IN[2].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[2].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].xy, IN[1].xyyy
>  8: TEX TEMP[2].yz, TEMP[2], SAMP[4], 2D
>  9: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[0].xyzz
> 10: MUL TEMP[3].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 11: MUL TEMP[3].xyz, IMM[0].yyyy, TEMP[3].xyzz
> 12: ADD TEMP[3].xyz, TEMP[0].xyzz, -TEMP[3].xyzz
> 13: DP3 TEMP[3].x, TEMP[3].xyzz, TEMP[1].xyzz
> 14: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].xxxx
> 15: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[1].xyzz
> 16: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 17: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 18: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[4].xxxx
> 19: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 20: ADD TEMP[3].x, IMM[0].xxxx, -TEMP[3].xxxx
> 21: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 22: MUL TEMP[3].x, TEMP[2].yyyy, TEMP[3].xxxx
> 23: MAD TEMP[4].xyz, IMM[0].zzzz, TEMP[1].xyzz, IN[0].xyzz
> 24: MUL TEMP[5], CONST[4], TEMP[4].xxxx
> 25: MAD TEMP[5], CONST[5], TEMP[4].yyyy, TEMP[5]
> 26: MAD TEMP[4], CONST[6], TEMP[4].zzzz, TEMP[5]
> 27: ADD TEMP[4].xyz, TEMP[4], CONST[7]
> 28: MOV TEMP[5].xy, TEMP[4].xyyy
> 29: MOV TEMP[5].w, IMM[0].xxxx
> 30: MOV TEMP[5].z, TEMP[4].zzzz
> 31: TXP TEMP[4].x, TEMP[5], SAMP[0], SHADOW2D
> 32: MOV TEMP[5].xyz, TEMP[1].xyzz
> 33: TEX TEMP[5], TEMP[5], SAMP[1], CUBE
> 34: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[0].xyzz
> 35: MUL TEMP[6].xyz, TEMP[6].xxxx, TEMP[1].xyzz
> 36: MAD TEMP[6].xyz, IMM[0].yyyy, TEMP[6].xyzz, -TEMP[0].xyzz
> 37: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[2].zzzz
> 38: MUL TEMP[7].x, TEMP[7].xxxx, IMM[0].wwww
> 39: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[5].wwww
> 40: MUL TEMP[8].x, IMM[1].xxxx, TEMP[2].yyyy
> 41: DP3 TEMP[9].x, -CONST[1].xyzz, TEMP[1].xyzz
> 42: MOV_SAT TEMP[9].x, TEMP[9].xxxx
> 43: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 44: MUL TEMP[4].xyz, CONST[3].xyzz, TEMP[4].xxxx
> 45: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[2].yyyy
> 46: MUL TEMP[4].xyz, TEMP[9].xxxx, TEMP[4].xyzz
> 47: MAD TEMP[4].xyz, TEMP[5].xyzz, TEMP[8].xxxx, TEMP[4].xyzz
> 48: ADD TEMP[5].xyz, CONST[11].xyzz, -IN[0].xyzz
> 49: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 50: RSQ TEMP[9].x, TEMP[8].xxxx
> 51: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 52: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 53: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 54: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 55: MUL TEMP[8].x, TEMP[8].xxxx, CONST[11].wwww
> 56: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 57: ADD TEMP[8].x, IMM[0].xxxx, -TEMP[8].xxxx
> 58: MUL TEMP[8].xyz, CONST[12].xyzz, TEMP[8].xxxx
> 59: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[2].yyyy
> 60: MAD TEMP[4].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[4].xyzz
> 61: ADD TEMP[5].xyz, CONST[13].xyzz, -IN[0].xyzz
> 62: DP3 TEMP[8].x, TEMP[5].xyzz, TEMP[5].xyzz
> 63: RSQ TEMP[9].x, TEMP[8].xxxx
> 64: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[9].xxxx
> 65: DP3 TEMP[5].x, TEMP[5].xyzz, TEMP[1].xyzz
> 66: MOV_SAT TEMP[5].x, TEMP[5].xxxx
> 67: MUL TEMP[8].x, TEMP[8].xxxx, TEMP[9].xxxx
> 68: MUL TEMP[8].x, TEMP[8].xxxx, CONST[13].wwww
> 69: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 70: ADD TEMP[8].x, IMM[0].xxxx, -TEMP[8].xxxx
> 71: MUL TEMP[8].xyz, CONST[14].xyzz, TEMP[8].xxxx
> 72: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[2].yyyy
> 73: MAD TEMP[4].xyz, TEMP[5].xxxx, TEMP[8].xyzz, TEMP[4].xyzz
> 74: MOV TEMP[5].xy, IN[1].xyyy
> 75: TEX TEMP[5].xyz, TEMP[5], SAMP[3], 2D
> 76: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[1].xyzz
> 77: MOV_SAT TEMP[0].x, TEMP[0].xxxx
> 78: ADD TEMP[0].x, IMM[0].xxxx, -TEMP[0].xxxx
> 79: POW TEMP[0].x, TEMP[0].xxxx, IMM[1].yyyy
> 80: MAX TEMP[1].xyz, TEMP[2].zzzz, IMM[1].zzzz
> 81: MUL TEMP[0].xyz, TEMP[0].xxxx, TEMP[1].xyzz
> 82: MOV TEMP[1].xyz, TEMP[6].xyzz
> 83: MOV TEMP[1].w, TEMP[7].xxxx
> 84: TXL TEMP[1].xyz, TEMP[1], SAMP[2], CUBE
> 85: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xyzz
> 86: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx
> 87: MAD TEMP[0].xyz, TEMP[4].xyzz, TEMP[5].xyzz, TEMP[0].xyzz
> 88: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
> 89: MAX TEMP[1].x, TEMP[1].xxxx, IMM[1].zzzz
> 90: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
> 91: ADD TEMP[2].x, TEMP[2].xxxx, IMM[1].wwww
> 92: RCP TEMP[2].x, TEMP[2].xxxx
> 93: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 94: FRC TEMP[2].x, CONST[1].wwww
> 95: MUL TEMP[2].x, TEMP[2].xxxx, IMM[2].xxxx
> 96: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
> 97: MOV_SAT TEMP[1].x, TEMP[1].xxxx
> 98: MUL TEMP[1].x, IN[1].zzzz, TEMP[1].xxxx
> 99: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>100: MOV TEMP[0].w, IN[0].wwww
>101: MOV OUT[0], TEMP[0]
>102: END
>radeonsi: Compiling shader 139
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %66 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %67 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 8, !amdgpu.uniform !0
>  %68 = load <8 x i32>, <8 x i32> addrspace(2)* %67, align 32, !invariant.load !0
>  %69 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %70 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %69, i64 0, i64 19, !amdgpu.uniform !0
>  %71 = load <4 x i32>, <4 x i32> addrspace(2)* %70, align 16, !invariant.load !0
>  %72 = extractelement <8 x i32> %68, i32 7
>  %73 = extractelement <4 x i32> %71, i32 0
>  %74 = and i32 %73, %72
>  %75 = insertelement <4 x i32> %71, i32 %74, i32 0
>  %76 = bitcast float %65 to i32
>  %77 = bitcast float %66 to i32
>  %78 = insertelement <2 x i32> undef, i32 %76, i32 0
>  %79 = insertelement <2 x i32> %78, i32 %77, i32 1
>  %80 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %79, <8 x i32> %68, <4 x i32> %75, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %81 = extractelement <4 x float> %80, i32 1
>  %82 = extractelement <4 x float> %80, i32 2
>  %83 = fmul float %60, %43
>  %84 = fmul float %62, %44
>  %85 = fadd float %84, %83
>  %86 = fmul float %64, %45
>  %87 = fadd float %85, %86
>  %88 = fmul float %87, %60
>  %89 = fmul float %87, %62
>  %90 = fmul float %87, %64
>  %91 = fmul float %88, 2.000000e+00
>  %92 = fmul float %89, 2.000000e+00
>  %93 = fmul float %90, 2.000000e+00
>  %94 = fsub float %43, %91
>  %95 = fsub float %44, %92
>  %96 = fsub float %45, %93
>  %97 = fmul float %94, %60
>  %98 = fmul float %95, %62
>  %99 = fadd float %98, %97
>  %100 = fmul float %96, %64
>  %101 = fadd float %99, %100
>  %102 = fadd float %101, 1.000000e+00
>  %103 = fmul float %43, %60
>  %104 = fmul float %44, %62
>  %105 = fadd float %104, %103
>  %106 = fmul float %45, %64
>  %107 = fadd float %105, %106
>  %108 = fsub float 1.000000e+00, %107
>  %109 = call float @llvm.AMDGPU.clamp.(float %108, float 0.000000e+00, float 1.000000e+00)
>  %110 = fsub float %102, %109
>  %111 = call float @llvm.AMDGPU.clamp.(float %110, float 0.000000e+00, float 1.000000e+00)
>  %112 = fsub float 1.000000e+00, %111
>  %113 = fmul float %112, %112
>  %114 = fmul float %81, %113
>  %115 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %116 = fmul float %60, 0x4007700140000000
>  %117 = fadd float %116, %115
>  %118 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %119 = fmul float %62, 0x4007700140000000
>  %120 = fadd float %119, %118
>  %121 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %122 = fmul float %64, 0x4007700140000000
>  %123 = fadd float %122, %121
>  %124 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %125 = load <16 x i8>, <16 x i8> addrspace(2)* %124, align 16, !invariant.load !0
>  %126 = call float @llvm.SI.load.const(<16 x i8> %125, i32 64)
>  %127 = fmul float %126, %117
>  %128 = call float @llvm.SI.load.const(<16 x i8> %125, i32 68)
>  %129 = fmul float %128, %117
>  %130 = call float @llvm.SI.load.const(<16 x i8> %125, i32 72)
>  %131 = fmul float %130, %117
>  %132 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %133 = load <16 x i8>, <16 x i8> addrspace(2)* %132, align 16, !invariant.load !0
>  %134 = call float @llvm.SI.load.const(<16 x i8> %133, i32 80)
>  %135 = fmul float %134, %120
>  %136 = fadd float %135, %127
>  %137 = call float @llvm.SI.load.const(<16 x i8> %133, i32 84)
>  %138 = fmul float %137, %120
>  %139 = fadd float %138, %129
>  %140 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %141 = load <16 x i8>, <16 x i8> addrspace(2)* %140, align 16, !invariant.load !0
>  %142 = call float @llvm.SI.load.const(<16 x i8> %141, i32 88)
>  %143 = fmul float %142, %120
>  %144 = fadd float %143, %131
>  %145 = call float @llvm.SI.load.const(<16 x i8> %141, i32 96)
>  %146 = fmul float %145, %123
>  %147 = fadd float %146, %136
>  %148 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %149 = load <16 x i8>, <16 x i8> addrspace(2)* %148, align 16, !invariant.load !0
>  %150 = call float @llvm.SI.load.const(<16 x i8> %149, i32 100)
>  %151 = fmul float %150, %123
>  %152 = fadd float %151, %139
>  %153 = call float @llvm.SI.load.const(<16 x i8> %149, i32 104)
>  %154 = fmul float %153, %123
>  %155 = fadd float %154, %144
>  %156 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %157 = load <16 x i8>, <16 x i8> addrspace(2)* %156, align 16, !invariant.load !0
>  %158 = call float @llvm.SI.load.const(<16 x i8> %157, i32 112)
>  %159 = fadd float %147, %158
>  %160 = call float @llvm.SI.load.const(<16 x i8> %157, i32 116)
>  %161 = fadd float %152, %160
>  %162 = call float @llvm.SI.load.const(<16 x i8> %157, i32 120)
>  %163 = fadd float %155, %162
>  %164 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %165 = load <8 x i32>, <8 x i32> addrspace(2)* %164, align 32, !invariant.load !0
>  %166 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %167 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %166, i64 0, i64 3, !amdgpu.uniform !0
>  %168 = load <4 x i32>, <4 x i32> addrspace(2)* %167, align 16, !invariant.load !0
>  %169 = extractelement <8 x i32> %165, i32 7
>  %170 = extractelement <4 x i32> %168, i32 0
>  %171 = and i32 %170, %169
>  %172 = insertelement <4 x i32> %168, i32 %171, i32 0
>  %173 = bitcast float %163 to i32
>  %174 = bitcast float %159 to i32
>  %175 = bitcast float %161 to i32
>  %176 = insertelement <4 x i32> undef, i32 %173, i32 0
>  %177 = insertelement <4 x i32> %176, i32 %174, i32 1
>  %178 = insertelement <4 x i32> %177, i32 %175, i32 2
>  %179 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %178, <8 x i32> %165, <4 x i32> %172, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %180 = extractelement <4 x float> %179, i32 0
>  %181 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %182 = load <8 x i32>, <8 x i32> addrspace(2)* %181, align 32, !invariant.load !0
>  %183 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %184 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %183, i64 0, i64 7, !amdgpu.uniform !0
>  %185 = load <4 x i32>, <4 x i32> addrspace(2)* %184, align 16, !invariant.load !0
>  %186 = extractelement <8 x i32> %182, i32 7
>  %187 = extractelement <4 x i32> %185, i32 0
>  %188 = and i32 %187, %186
>  %189 = insertelement <4 x i32> %185, i32 %188, i32 0
>  %190 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %191 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %192 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %193 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %194 = call float @llvm.fabs.f32(float %192)
>  %195 = fdiv float 1.000000e+00, %194, !fpmath !1
>  %196 = fmul float %190, %195
>  %197 = fadd float %196, 1.500000e+00
>  %198 = fmul float %191, %195
>  %199 = fadd float %198, 1.500000e+00
>  %200 = bitcast float %199 to i32
>  %201 = bitcast float %197 to i32
>  %202 = bitcast float %193 to i32
>  %203 = insertelement <4 x i32> undef, i32 %200, i32 0
>  %204 = insertelement <4 x i32> %203, i32 %201, i32 1
>  %205 = insertelement <4 x i32> %204, i32 %202, i32 2
>  %206 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %205, <8 x i32> %182, <4 x i32> %189, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %207 = extractelement <4 x float> %206, i32 0
>  %208 = extractelement <4 x float> %206, i32 1
>  %209 = extractelement <4 x float> %206, i32 2
>  %210 = extractelement <4 x float> %206, i32 3
>  %211 = fmul float %60, %43
>  %212 = fmul float %62, %44
>  %213 = fadd float %212, %211
>  %214 = fmul float %64, %45
>  %215 = fadd float %213, %214
>  %216 = fmul float %215, %60
>  %217 = fmul float %215, %62
>  %218 = fmul float %215, %64
>  %219 = fmul float %216, 2.000000e+00
>  %220 = fsub float %219, %43
>  %221 = fmul float %217, 2.000000e+00
>  %222 = fsub float %221, %44
>  %223 = fmul float %218, 2.000000e+00
>  %224 = fsub float %223, %45
>  %225 = fsub float 1.000000e+00, %82
>  %226 = fmul float %225, 6.000000e+00
>  %227 = fmul float %207, %210
>  %228 = fmul float %208, %210
>  %229 = fmul float %209, %210
>  %230 = fmul float %81, 4.000000e+00
>  %231 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %232 = load <16 x i8>, <16 x i8> addrspace(2)* %231, align 16, !invariant.load !0
>  %233 = call float @llvm.SI.load.const(<16 x i8> %232, i32 16)
>  %234 = call float @llvm.SI.load.const(<16 x i8> %232, i32 20)
>  %235 = call float @llvm.SI.load.const(<16 x i8> %232, i32 24)
>  %236 = fmul float %233, %60
>  %237 = fsub float -0.000000e+00, %236
>  %238 = fmul float %234, %62
>  %239 = fsub float %237, %238
>  %240 = fmul float %235, %64
>  %241 = fsub float %239, %240
>  %242 = call float @llvm.AMDGPU.clamp.(float %241, float 0.000000e+00, float 1.000000e+00)
>  %243 = fmul float %180, %180
>  %244 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %245 = load <16 x i8>, <16 x i8> addrspace(2)* %244, align 16, !invariant.load !0
>  %246 = call float @llvm.SI.load.const(<16 x i8> %245, i32 48)
>  %247 = fmul float %246, %243
>  %248 = call float @llvm.SI.load.const(<16 x i8> %245, i32 52)
>  %249 = fmul float %248, %243
>  %250 = call float @llvm.SI.load.const(<16 x i8> %245, i32 56)
>  %251 = fmul float %250, %243
>  %252 = fmul float %247, %81
>  %253 = fmul float %249, %81
>  %254 = fmul float %251, %81
>  %255 = fmul float %242, %252
>  %256 = fmul float %242, %253
>  %257 = fmul float %242, %254
>  %258 = fmul float %227, %230
>  %259 = fadd float %258, %255
>  %260 = fmul float %228, %230
>  %261 = fadd float %260, %256
>  %262 = fmul float %229, %230
>  %263 = fadd float %262, %257
>  %264 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %265 = load <16 x i8>, <16 x i8> addrspace(2)* %264, align 16, !invariant.load !0
>  %266 = call float @llvm.SI.load.const(<16 x i8> %265, i32 176)
>  %267 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %268 = fsub float %266, %267
>  %269 = call float @llvm.SI.load.const(<16 x i8> %265, i32 180)
>  %270 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %271 = fsub float %269, %270
>  %272 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %273 = load <16 x i8>, <16 x i8> addrspace(2)* %272, align 16, !invariant.load !0
>  %274 = call float @llvm.SI.load.const(<16 x i8> %273, i32 184)
>  %275 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %276 = fsub float %274, %275
>  %277 = fmul float %268, %268
>  %278 = fmul float %271, %271
>  %279 = fadd float %278, %277
>  %280 = fmul float %276, %276
>  %281 = fadd float %279, %280
>  %282 = call float @llvm.sqrt.f32(float %281)
>  %283 = fdiv float 1.000000e+00, %282, !fpmath !1
>  %284 = fmul float %268, %283
>  %285 = fmul float %271, %283
>  %286 = fmul float %276, %283
>  %287 = fmul float %284, %60
>  %288 = fmul float %285, %62
>  %289 = fadd float %288, %287
>  %290 = fmul float %286, %64
>  %291 = fadd float %289, %290
>  %292 = call float @llvm.AMDGPU.clamp.(float %291, float 0.000000e+00, float 1.000000e+00)
>  %293 = fmul float %281, %283
>  %294 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %295 = load <16 x i8>, <16 x i8> addrspace(2)* %294, align 16, !invariant.load !0
>  %296 = call float @llvm.SI.load.const(<16 x i8> %295, i32 188)
>  %297 = fmul float %293, %296
>  %298 = call float @llvm.AMDGPU.clamp.(float %297, float 0.000000e+00, float 1.000000e+00)
>  %299 = fsub float 1.000000e+00, %298
>  %300 = call float @llvm.SI.load.const(<16 x i8> %295, i32 192)
>  %301 = fmul float %300, %299
>  %302 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %303 = load <16 x i8>, <16 x i8> addrspace(2)* %302, align 16, !invariant.load !0
>  %304 = call float @llvm.SI.load.const(<16 x i8> %303, i32 196)
>  %305 = fmul float %304, %299
>  %306 = call float @llvm.SI.load.const(<16 x i8> %303, i32 200)
>  %307 = fmul float %306, %299
>  %308 = fmul float %301, %81
>  %309 = fmul float %305, %81
>  %310 = fmul float %307, %81
>  %311 = fmul float %292, %308
>  %312 = fadd float %311, %259
>  %313 = fmul float %292, %309
>  %314 = fadd float %313, %261
>  %315 = fmul float %292, %310
>  %316 = fadd float %315, %263
>  %317 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %318 = load <16 x i8>, <16 x i8> addrspace(2)* %317, align 16, !invariant.load !0
>  %319 = call float @llvm.SI.load.const(<16 x i8> %318, i32 208)
>  %320 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %321 = fsub float %319, %320
>  %322 = call float @llvm.SI.load.const(<16 x i8> %318, i32 212)
>  %323 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %324 = fsub float %322, %323
>  %325 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %326 = load <16 x i8>, <16 x i8> addrspace(2)* %325, align 16, !invariant.load !0
>  %327 = call float @llvm.SI.load.const(<16 x i8> %326, i32 216)
>  %328 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %329 = fsub float %327, %328
>  %330 = fmul float %321, %321
>  %331 = fmul float %324, %324
>  %332 = fadd float %331, %330
>  %333 = fmul float %329, %329
>  %334 = fadd float %332, %333
>  %335 = call float @llvm.sqrt.f32(float %334)
>  %336 = fdiv float 1.000000e+00, %335, !fpmath !1
>  %337 = fmul float %321, %336
>  %338 = fmul float %324, %336
>  %339 = fmul float %329, %336
>  %340 = fmul float %337, %60
>  %341 = fmul float %338, %62
>  %342 = fadd float %341, %340
>  %343 = fmul float %339, %64
>  %344 = fadd float %342, %343
>  %345 = call float @llvm.AMDGPU.clamp.(float %344, float 0.000000e+00, float 1.000000e+00)
>  %346 = fmul float %334, %336
>  %347 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %348 = load <16 x i8>, <16 x i8> addrspace(2)* %347, align 16, !invariant.load !0
>  %349 = call float @llvm.SI.load.const(<16 x i8> %348, i32 220)
>  %350 = fmul float %346, %349
>  %351 = call float @llvm.AMDGPU.clamp.(float %350, float 0.000000e+00, float 1.000000e+00)
>  %352 = fsub float 1.000000e+00, %351
>  %353 = call float @llvm.SI.load.const(<16 x i8> %348, i32 224)
>  %354 = fmul float %353, %352
>  %355 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %356 = load <16 x i8>, <16 x i8> addrspace(2)* %355, align 16, !invariant.load !0
>  %357 = call float @llvm.SI.load.const(<16 x i8> %356, i32 228)
>  %358 = fmul float %357, %352
>  %359 = call float @llvm.SI.load.const(<16 x i8> %356, i32 232)
>  %360 = fmul float %359, %352
>  %361 = fmul float %354, %81
>  %362 = fmul float %358, %81
>  %363 = fmul float %360, %81
>  %364 = fmul float %345, %361
>  %365 = fadd float %364, %312
>  %366 = fmul float %345, %362
>  %367 = fadd float %366, %314
>  %368 = fmul float %345, %363
>  %369 = fadd float %368, %316
>  %370 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %371 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %6, <2 x i32> %8)
>  %372 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 6, !amdgpu.uniform !0
>  %373 = load <8 x i32>, <8 x i32> addrspace(2)* %372, align 32, !invariant.load !0
>  %374 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %375 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %374, i64 0, i64 15, !amdgpu.uniform !0
>  %376 = load <4 x i32>, <4 x i32> addrspace(2)* %375, align 16, !invariant.load !0
>  %377 = extractelement <8 x i32> %373, i32 7
>  %378 = extractelement <4 x i32> %376, i32 0
>  %379 = and i32 %378, %377
>  %380 = insertelement <4 x i32> %376, i32 %379, i32 0
>  %381 = bitcast float %370 to i32
>  %382 = bitcast float %371 to i32
>  %383 = insertelement <2 x i32> undef, i32 %381, i32 0
>  %384 = insertelement <2 x i32> %383, i32 %382, i32 1
>  %385 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %384, <8 x i32> %373, <4 x i32> %380, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %386 = extractelement <4 x float> %385, i32 0
>  %387 = extractelement <4 x float> %385, i32 1
>  %388 = extractelement <4 x float> %385, i32 2
>  %389 = fmul float %43, %60
>  %390 = fmul float %44, %62
>  %391 = fadd float %390, %389
>  %392 = fmul float %45, %64
>  %393 = fadd float %391, %392
>  %394 = call float @llvm.AMDGPU.clamp.(float %393, float 0.000000e+00, float 1.000000e+00)
>  %395 = fsub float 1.000000e+00, %394
>  %396 = call float @llvm.pow.f32(float %395, float 5.000000e+00)
>  %397 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %398 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %399 = call float @llvm.maxnum.f32(float %82, float 0.000000e+00)
>  %400 = fmul float %396, %397
>  %401 = fmul float %396, %398
>  %402 = fmul float %396, %399
>  %403 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %404 = load <8 x i32>, <8 x i32> addrspace(2)* %403, align 32, !invariant.load !0
>  %405 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %406 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %405, i64 0, i64 11, !amdgpu.uniform !0
>  %407 = load <4 x i32>, <4 x i32> addrspace(2)* %406, align 16, !invariant.load !0
>  %408 = extractelement <8 x i32> %404, i32 7
>  %409 = extractelement <4 x i32> %407, i32 0
>  %410 = and i32 %409, %408
>  %411 = insertelement <4 x i32> %407, i32 %410, i32 0
>  %412 = call float @llvm.amdgcn.cubetc(float %220, float %222, float %224)
>  %413 = call float @llvm.amdgcn.cubesc(float %220, float %222, float %224)
>  %414 = call float @llvm.amdgcn.cubema(float %220, float %222, float %224)
>  %415 = call float @llvm.amdgcn.cubeid(float %220, float %222, float %224)
>  %416 = call float @llvm.fabs.f32(float %414)
>  %417 = fdiv float 1.000000e+00, %416, !fpmath !1
>  %418 = fmul float %412, %417
>  %419 = fadd float %418, 1.500000e+00
>  %420 = fmul float %413, %417
>  %421 = fadd float %420, 1.500000e+00
>  %422 = bitcast float %421 to i32
>  %423 = bitcast float %419 to i32
>  %424 = bitcast float %415 to i32
>  %425 = bitcast float %226 to i32
>  %426 = insertelement <4 x i32> undef, i32 %422, i32 0
>  %427 = insertelement <4 x i32> %426, i32 %423, i32 1
>  %428 = insertelement <4 x i32> %427, i32 %424, i32 2
>  %429 = insertelement <4 x i32> %428, i32 %425, i32 3
>  %430 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %429, <8 x i32> %404, <4 x i32> %411, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %431 = extractelement <4 x float> %430, i32 0
>  %432 = extractelement <4 x float> %430, i32 1
>  %433 = extractelement <4 x float> %430, i32 2
>  %434 = fmul float %400, %431
>  %435 = fmul float %401, %432
>  %436 = fmul float %402, %433
>  %437 = fmul float %434, %114
>  %438 = fmul float %435, %114
>  %439 = fmul float %436, %114
>  %440 = fmul float %365, %386
>  %441 = fadd float %440, %437
>  %442 = fmul float %367, %387
>  %443 = fadd float %442, %438
>  %444 = fmul float %369, %388
>  %445 = fadd float %444, %439
>  %446 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %447 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %448 = load <16 x i8>, <16 x i8> addrspace(2)* %447, align 16, !invariant.load !0
>  %449 = call float @llvm.SI.load.const(<16 x i8> %448, i32 12)
>  %450 = fsub float %446, %449
>  %451 = call float @llvm.maxnum.f32(float %450, float 0.000000e+00)
>  %452 = call float @llvm.SI.load.const(<16 x i8> %448, i32 28)
>  %453 = call float @llvm.SI.load.const(<16 x i8> %448, i32 12)
>  %454 = fsub float %452, %453
>  %455 = fadd float %454, 0x3F50624DE0000000
>  %456 = fdiv float 1.000000e+00, %455, !fpmath !1
>  %457 = fmul float %451, %456
>  %458 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %459 = load <16 x i8>, <16 x i8> addrspace(2)* %458, align 16, !invariant.load !0
>  %460 = call float @llvm.SI.load.const(<16 x i8> %459, i32 28)
>  %461 = call float @llvm.floor.f32(float %460)
>  %462 = fsub float %460, %461
>  %463 = fmul float %462, 8.000000e+00
>  %464 = call float @llvm.pow.f32(float %457, float %463)
>  %465 = call float @llvm.AMDGPU.clamp.(float %464, float 0.000000e+00, float 1.000000e+00)
>  %466 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %6, <2 x i32> %8)
>  %467 = fmul float %466, %465
>  %468 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %469 = load <16 x i8>, <16 x i8> addrspace(2)* %468, align 16, !invariant.load !0
>  %470 = call float @llvm.SI.load.const(<16 x i8> %469, i32 32)
>  %471 = fsub float 1.000000e+00, %467
>  %472 = fmul float %441, %467
>  %473 = fmul float %470, %471
>  %474 = fadd float %472, %473
>  %475 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %476 = load <16 x i8>, <16 x i8> addrspace(2)* %475, align 16, !invariant.load !0
>  %477 = call float @llvm.SI.load.const(<16 x i8> %476, i32 36)
>  %478 = fsub float 1.000000e+00, %467
>  %479 = fmul float %443, %467
>  %480 = fmul float %477, %478
>  %481 = fadd float %479, %480
>  %482 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %483 = load <16 x i8>, <16 x i8> addrspace(2)* %482, align 16, !invariant.load !0
>  %484 = call float @llvm.SI.load.const(<16 x i8> %483, i32 40)
>  %485 = fsub float 1.000000e+00, %467
>  %486 = fmul float %445, %467
>  %487 = fmul float %484, %485
>  %488 = fadd float %486, %487
>  %489 = call float @llvm.SI.fs.interp(i32 3, i32 0, i32 %6, <2 x i32> %8)
>  %490 = bitcast float %5 to i32
>  %491 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %490, 10
>  %492 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %491, float %474, 11
>  %493 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %492, float %481, 12
>  %494 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %493, float %488, 13
>  %495 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %494, float %489, 14
>  %496 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %495, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %496
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x10                 ; C0880B10
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[12:15], v4, s[4:7], 0 idxen   ; E00C2000 80010C04
>	buffer_load_format_xyzw v[16:19], v5, s[12:15], 0 idxen ; E00C2000 80031005
>	buffer_load_format_xyzw v[8:11], v8, s[16:19], 0 idxen  ; E00C2000 80040808
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt vmcnt(0) lgkmcnt(0)                           ; BF8C0070
>	v_mov_b32_e32 v10, s4                                   ; 7E140204
>	v_mov_b32_e32 v11, s5                                   ; 7E160205
>	v_mov_b32_e32 v19, s6                                   ; 7E260206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v3, s4                                    ; 7E060204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v22, s7, v10                              ; 082C1407
>	v_mov_b32_e32 v5, s8                                    ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v6, s4                                    ; 7E0C0204
>	v_mov_b32_e32 v4, s5                                    ; 7E080205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v23, s6, v11                              ; 082E1606
>	v_mov_b32_e32 v20, s7                                   ; 7E280207
>	v_mov_b32_e32 v21, s8                                   ; 7E2A0208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v7, s4                                    ; 7E0E0204
>	v_sub_f32_e32 v24, s5, v19                              ; 08302605
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v29                               ; 7E00111D
>	v_mul_lo_i32 v7, v0, 48                                 ; D2D60007 00016100
>	v_add_i32_e32 v0, vcc, s14, v7                          ; 4A000E0E
>	v_add_i32_e32 v4, vcc, s13, v7                          ; 4A080E0D
>	v_add_i32_e32 v5, vcc, s15, v7                          ; 4A0A0E0F
>	v_add_i32_e32 v1, vcc, s12, v7                          ; 4A020E0C
>	buffer_load_dword v3, v0, s[0:3], 0 offen               ; E0301000 80000300
>	buffer_load_dword v0, v4, s[0:3], 0 offen               ; E0301000 80000004
>	buffer_load_dword v4, v5, s[0:3], 0 offen               ; E0301000 80000405
>	buffer_load_dword v1, v1, s[0:3], 0 offen               ; E0301000 80000101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v22, v10, v4                           ; 0A2C090A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0x8c, v7                         ; 4A0A0EFF 0000008C
>	v_add_i32_e32 v23, vcc, 0x9c, v7                        ; 4A2E0EFF 0000009C
>	v_add_i32_e32 v4, vcc, 0x80, v7                         ; 4A080EFF 00000080
>	v_add_i32_e32 v20, vcc, 0x88, v7                        ; 4A280EFF 00000088
>	v_add_i32_e32 v6, vcc, 0x84, v7                         ; 4A0C0EFF 00000084
>	v_add_i32_e32 v21, vcc, 0x94, v7                        ; 4A2A0EFF 00000094
>	buffer_load_dword v24, v5, s[0:3], 0 offen              ; E0301000 80001805
>	buffer_load_dword v5, v4, s[0:3], 0 offen               ; E0301000 80000504
>	buffer_load_dword v4, v20, s[0:3], 0 offen              ; E0301000 80000414
>	v_add_i32_e32 v20, vcc, 0x90, v7                        ; 4A280EFF 00000090
>	v_add_i32_e32 v7, vcc, 0x98, v7                         ; 4A0E0EFF 00000098
>	buffer_load_dword v25, v23, s[0:3], 0 offen             ; E0301000 80001917
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v23, v11, v24                          ; 0A2E310B
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v24, v19, v25                          ; 0A303313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v4, v30                               ; 7E08111E
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	v_add_i32_e32 v20, vcc, s8, v7                          ; 4A280E08
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[25:28], v6, s[4:7], 0 idxen   ; E00C2000 80011906
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v21, vcc, s4, v7                          ; 4A2A0E04
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	v_mul_lo_i32 v29, v4, 48                                ; D2D6001D 00016104
>	v_add_i32_e32 v4, vcc, s11, v7                          ; 4A080E0B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v5, vcc, s10, v7                          ; 4A0A0E0A
>	v_add_i32_e32 v6, vcc, s9, v7                           ; 4A0C0E09
>	v_add_i32_e32 v24, vcc, s6, v7                          ; 4A300E06
>	buffer_load_dword v23, v4, s[0:3], 0 offen              ; E0301000 80001704
>	v_add_i32_e32 v4, vcc, s7, v7                           ; 4A080E07
>	v_add_i32_e32 v7, vcc, s5, v7                           ; 4A0E0E05
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v30, v4, s[0:3], 0 offen              ; E0301000 80001E04
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v3, v25, v3                               ; 10060719
>	v_mul_f32_e32 v1, v25, v1                               ; 10020319
>	v_mul_f32_e32 v0, v25, v0                               ; 10000119
>	v_mul_f32_e32 v22, v25, v22                             ; 102C2D19
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v33, v19, v21                          ; 0A422B13
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v4, v25, v20                              ; 10082919
>	v_subrev_f32_e32 v20, v11, v23                          ; 0A282F0B
>	v_mul_f32_e32 v23, v25, v20                             ; 102E2919
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v5, v25, v5                               ; 100A0B19
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v6, v25, v6                               ; 100C0D19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v21, v25, v24                             ; 102A3119
>	v_mul_f32_e32 v20, v25, v30                             ; 10283D19
>	v_mul_f32_e32 v7, v25, v7                               ; 100E0F19
>	v_mul_f32_e32 v24, v25, v33                             ; 10304319
>	v_add_i32_e32 v25, vcc, s15, v29                        ; 4A323A0F
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v10, v25                          ; 0A32330A
>	v_mac_f32_e32 v22, v26, v25                             ; 3E2C331A
>	v_add_i32_e32 v25, vcc, s11, v29                        ; 4A323A0B
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v11, v25                          ; 0A32330B
>	v_mac_f32_e32 v23, v26, v25                             ; 3E2E331A
>	v_add_i32_e32 v25, vcc, s14, v29                        ; 4A323A0E
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v25                              ; 3E06331A
>	v_add_i32_e32 v25, vcc, s12, v29                        ; 4A323A0C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v25                              ; 3E02331A
>	v_add_i32_e32 v25, vcc, s13, v29                        ; 4A323A0D
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v25                              ; 3E00331A
>	v_add_i32_e32 v25, vcc, s10, v29                        ; 4A323A0A
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v25                              ; 3E0A331A
>	v_add_i32_e32 v25, vcc, s9, v29                         ; 4A323A09
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v25                              ; 3E0C331A
>	v_add_i32_e32 v25, vcc, s8, v29                         ; 4A323A08
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v25                              ; 3E08331A
>	v_add_i32_e32 v25, vcc, s7, v29                         ; 4A323A07
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v26, v25                             ; 3E28331A
>	v_add_i32_e32 v25, vcc, s6, v29                         ; 4A323A06
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v26, v25                             ; 3E2A331A
>	v_add_i32_e32 v25, vcc, s5, v29                         ; 4A323A05
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v25                              ; 3E0E331A
>	v_add_i32_e32 v25, vcc, s4, v29                         ; 4A323A04
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	v_mac_f32_e32 v24, v26, v25                             ; 3E30331A
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v31                              ; 7E32111F
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0x70, v25                       ; 4A3432FF 00000070
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v27, v26                              ; 3E06351B
>	v_add_i32_e32 v26, vcc, 0x7c, v25                       ; 4A3432FF 0000007C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v10, v26                          ; 0A34350A
>	v_mac_f32_e32 v22, v27, v26                             ; 3E2C351B
>	v_add_i32_e32 v26, vcc, s11, v25                        ; 4A34320B
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v11, v26                          ; 0A34350B
>	v_mac_f32_e32 v23, v27, v26                             ; 3E2E351B
>	v_add_i32_e32 v26, vcc, 0x74, v25                       ; 4A3432FF 00000074
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v27, v26                              ; 3E02351B
>	v_add_i32_e32 v26, vcc, 0x78, v25                       ; 4A3432FF 00000078
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v27, v26                              ; 3E00351B
>	v_add_i32_e32 v26, vcc, s10, v25                        ; 4A34320A
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v27, v26                              ; 3E0A351B
>	v_add_i32_e32 v26, vcc, s9, v25                         ; 4A343209
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v27, v26                              ; 3E0C351B
>	v_add_i32_e32 v26, vcc, s8, v25                         ; 4A343208
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v27, v26                              ; 3E08351B
>	v_add_i32_e32 v26, vcc, s7, v25                         ; 4A343207
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v27, v26                             ; 3E28351B
>	v_add_i32_e32 v26, vcc, s6, v25                         ; 4A343206
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v27, v26                             ; 3E2A351B
>	v_add_i32_e32 v26, vcc, s5, v25                         ; 4A343205
>	v_add_i32_e32 v25, vcc, s4, v25                         ; 4A323204
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v27, v26                              ; 3E0E351B
>	v_mac_f32_e32 v24, v27, v25                             ; 3E30331B
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v25, v32                              ; 7E321120
>	v_mul_lo_i32 v25, v25, 48                               ; D2D60019 00016119
>	v_add_i32_e32 v26, vcc, 0x70, v25                       ; 4A3432FF 00000070
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v28, v26                              ; 3E06351C
>	v_add_i32_e32 v26, vcc, 0x7c, v25                       ; 4A3432FF 0000007C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v10, v26                          ; 0A34350A
>	v_mac_f32_e32 v22, v28, v26                             ; 3E2C351C
>	v_add_i32_e32 v26, vcc, 0x8c, v25                       ; 4A3432FF 0000008C
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v26, v11, v26                          ; 0A34350B
>	v_mac_f32_e32 v23, v28, v26                             ; 3E2E351C
>	v_add_i32_e32 v26, vcc, 0x74, v25                       ; 4A3432FF 00000074
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v28, v26                              ; 3E02351C
>	v_add_i32_e32 v26, vcc, 0x78, v25                       ; 4A3432FF 00000078
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v28, v26                              ; 3E00351C
>	v_add_i32_e32 v26, vcc, 0x80, v25                       ; 4A3432FF 00000080
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v28, v26                              ; 3E0A351C
>	v_add_i32_e32 v26, vcc, 0x84, v25                       ; 4A3432FF 00000084
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v28, v26                              ; 3E0C351C
>	v_add_i32_e32 v26, vcc, 0x88, v25                       ; 4A3432FF 00000088
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v28, v26                              ; 3E08351C
>	v_add_i32_e32 v26, vcc, 0x90, v25                       ; 4A3432FF 00000090
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v20, v28, v26                             ; 3E28351C
>	v_add_i32_e32 v26, vcc, 0x94, v25                       ; 4A3432FF 00000094
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v21, v28, v26                             ; 3E2A351C
>	v_add_i32_e32 v26, vcc, 0x98, v25                       ; 4A3432FF 00000098
>	v_add_i32_e32 v25, vcc, 0x9c, v25                       ; 4A3232FF 0000009C
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v25, v19, v25                          ; 0A323313
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v28, v26                              ; 3E0E351C
>	v_mac_f32_e32 v24, v28, v25                             ; 3E30331C
>	v_mul_f32_e32 v25, v1, v13                              ; 10321B01
>	v_mac_f32_e32 v25, v3, v12                              ; 3E321903
>	v_mac_f32_e32 v25, v0, v14                              ; 3E321D00
>	v_mac_f32_e32 v25, v22, v15                             ; 3E321F16
>	v_mul_f32_e32 v22, v6, v13                              ; 102C1B06
>	v_mac_f32_e32 v22, v5, v12                              ; 3E2C1905
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_mac_f32_e32 v22, v4, v14                              ; 3E2C1D04
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	v_mac_f32_e32 v22, v23, v15                             ; 3E2C1F17
>	v_mul_f32_e32 v23, v21, v13                             ; 102E1B15
>	v_mul_f32_e32 v13, 0, v13                               ; 101A1A80
>	v_mac_f32_e32 v23, v20, v12                             ; 3E2E1914
>	v_mac_f32_e32 v13, 0, v12                               ; 3E1A1880
>	v_add_f32_e32 v16, v16, v16                             ; 06202110
>	v_mac_f32_e32 v23, v7, v14                              ; 3E2E1D07
>	v_mac_f32_e32 v13, 0, v14                               ; 3E1A1C80
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_mad_f32 v3, v16, v3, -v3                              ; D2820003 840E0710
>	v_add_f32_e32 v10, v10, v25                             ; 0614330A
>	v_mac_f32_e32 v23, v24, v15                             ; 3E2E1F18
>	v_add_f32_e32 v12, v15, v13                             ; 06181B0F
>	v_mac_f32_e32 v3, v1, v17                               ; 3E062301
>	v_mad_f32 v1, v16, v5, -v5                              ; D2820001 84160B10
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v5, s4, v10                               ; 100A1404
>	v_mul_f32_e32 v15, s5, v10                              ; 101E1405
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	v_mac_f32_e32 v1, v6, v17                               ; 3E022306
>	v_mad_f32 v6, v16, v20, -v20                            ; D2820006 84522910
>	v_mul_f32_e32 v16, s6, v10                              ; 10201406
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	v_add_f32_e32 v11, v11, v22                             ; 06162D0B
>	v_mac_f32_e32 v6, v21, v17                              ; 3E0C2315
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v17, s7, v10                              ; 10221407
>	v_mac_f32_e32 v5, s8, v11                               ; 3E0A1608
>	v_mac_f32_e32 v15, s4, v11                              ; 3E1E1604
>	v_mac_f32_e32 v16, s5, v11                              ; 3E201605
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mac_f32_e32 v17, s6, v11                              ; 3E221606
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	v_add_f32_e32 v14, v19, v23                             ; 061C2F13
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v5, s7, v14                               ; 3E0A1C07
>	v_mac_f32_e32 v15, s8, v14                              ; 3E1E1C08
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	v_mac_f32_e32 v16, s4, v14                              ; 3E201C04
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	v_mac_f32_e32 v17, s5, v14                              ; 3E221C05
>	s_buffer_load_dword s4, s[0:3], 0xf                     ; C202010F
>	s_buffer_load_dword s5, s[0:3], 0x14                    ; C2028114
>	v_mac_f32_e32 v5, s6, v12                               ; 3E0A1806
>	s_buffer_load_dword s6, s[0:3], 0x15                    ; C2030115
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v12                              ; 3E1E1807
>	v_mac_f32_e32 v16, s8, v12                              ; 3E201808
>	v_mac_f32_e32 v17, s4, v12                              ; 3E221804
>	v_mov_b32_e32 v12, s5                                   ; 7E180205
>	v_mac_f32_e32 v12, s6, v16                              ; 3E182006
>	v_add_f32_e64 v12, v12, 0 clamp                         ; D206080C 0001010C
>	s_buffer_load_dword s7, s[0:3], 0x16                    ; C2038116
>	v_log_f32_e32 v12, v12                                  ; 7E184F0C
>	s_buffer_load_dword s8, s[0:3], 0x17                    ; C2040117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	v_mad_f32 v13, 2.0, v18, -1.0                           ; D282000D 03CE24F4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v12, s7, v12                       ; 0E181807
>	v_exp_f32_e32 v12, v12                                  ; 7E184B0C
>	v_sub_f32_e64 v18, 1.0, s8                              ; D2080012 000010F2
>	v_mac_f32_e32 v3, v0, v13                               ; 3E061B00
>	v_mul_f32_e32 v0, s0, v17                               ; 10002200
>	v_mac_f32_e32 v18, s8, v12                              ; 3E241808
>	v_mac_f32_e32 v1, v4, v13                               ; 3E021B04
>	v_mul_f32_e32 v4, v18, v18                              ; 10082512
>	exp 15, 32, 0, 0, 0, v10, v11, v14, v0                  ; F800020F 000E0B0A
>	v_mac_f32_e32 v6, v7, v13                               ; 3E0C1B07
>	exp 15, 33, 0, 0, 0, v8, v9, v4, v0                     ; F800021F 00040908
>	exp 15, 34, 0, 0, 0, v3, v1, v6, v0                     ; F800022F 00060103
>	exp 15, 12, 0, 1, 0, v5, v15, v16, v17                  ; F80008CF 11100F05
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 36
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2020 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 7
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                      ; BE86047E
>	s_wqm_b64 exec, exec                                        ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                          ; C0800300
>	s_mov_b32 m0, s11                                           ; BEFC030B
>	v_interp_p1_f32 v11, v2, 0, 0, [m0]                         ; C82C0002
>	v_interp_p2_f32 v11, [v11], v3, 0, 0, [m0]                  ; C82D0003
>	v_interp_p1_f32 v12, v2, 1, 0, [m0]                         ; C8300102
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                         ; C2040100
>	s_buffer_load_dword s9, s[0:3], 0x1                         ; C2048101
>	s_buffer_load_dword s12, s[0:3], 0x2                        ; C2060102
>	v_interp_p2_f32 v12, [v12], v3, 1, 0, [m0]                  ; C8310103
>	v_interp_p1_f32 v15, v2, 2, 0, [m0]                         ; C83C0202
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v8, s8, v11                                   ; 08101608
>	v_interp_p2_f32 v15, [v15], v3, 2, 0, [m0]                  ; C83D0203
>	v_sub_f32_e32 v14, s9, v12                                  ; 081C1809
>	v_mul_f32_e32 v0, v8, v8                                    ; 10001108
>	v_interp_p1_f32 v6, v4, 0, 2, [m0]                          ; C8180804
>	v_sub_f32_e32 v16, s12, v15                                 ; 08201E0C
>	v_mac_f32_e32 v0, v14, v14                                  ; 3E001D0E
>	v_mac_f32_e32 v0, v16, v16                                  ; 3E002110
>	v_interp_p2_f32 v6, [v6], v5, 0, 2, [m0]                    ; C8190805
>	v_interp_p1_f32 v7, v4, 1, 2, [m0]                          ; C81C0904
>	v_rsq_f32_e32 v17, v0                                       ; 7E225D00
>	v_interp_p2_f32 v7, [v7], v5, 1, 2, [m0]                    ; C81D0905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                          ; C8100A04
>	v_mul_f32_e32 v0, v6, v6                                    ; 10000D06
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                    ; C8110A05
>	v_mac_f32_e32 v0, v7, v7                                    ; 3E000F07
>	v_mac_f32_e32 v0, v4, v4                                    ; 3E000904
>	v_rsq_f32_e32 v5, v0                                        ; 7E0A5D00
>	v_mul_f32_e32 v9, v17, v8                                   ; 10121111
>	v_mul_f32_e32 v10, v17, v14                                 ; 10141D11
>	v_mul_f32_e32 v18, v17, v16                                 ; 10242111
>	v_mul_f32_e32 v19, v5, v6                                   ; 10260D05
>	v_mul_f32_e32 v20, v5, v7                                   ; 10280F05
>	v_mul_f32_e32 v22, v9, v19                                  ; 102C2709
>	v_mul_f32_e32 v21, v5, v4                                   ; 102A0905
>	v_mac_f32_e32 v22, v10, v20                                 ; 3E2C290A
>	v_mac_f32_e32 v22, v18, v21                                 ; 3E2C2B12
>	v_mul_f32_e32 v18, v19, v22                                 ; 10242D13
>	v_mul_f32_e32 v23, v20, v22                                 ; 102E2D14
>	v_mac_f32_e32 v18, v19, v22                                 ; 3E242D13
>	v_mul_f32_e32 v24, v21, v22                                 ; 10302D15
>	v_mad_f32 v4, v8, v17, -v18                                 ; D2820004 844A2308
>	v_mac_f32_e32 v23, v20, v22                                 ; 3E2E2D14
>	v_mac_f32_e32 v24, v21, v22                                 ; 3E302D15
>	v_mad_f32 v5, v14, v17, -v23                                ; D2820005 845E230E
>	v_mul_f32_e32 v4, v19, v4                                   ; 10080913
>	v_mac_f32_e32 v4, v20, v5                                   ; 3E080B14
>	v_mad_f32 v5, v16, v17, -v24                                ; D2820005 84622310
>	v_mac_f32_e32 v4, v21, v5                                   ; 3E080B15
>	v_sub_f32_e32 v5, 1.0, v22                                  ; 080A2CF2
>	v_add_f32_e32 v4, 1.0, v4                                   ; 060808F2
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_subrev_f32_e32 v4, v5, v4                                 ; 0A080905
>	s_buffer_load_dword s28, s[0:3], 0x10                       ; C20E0110
>	s_buffer_load_dword s29, s[0:3], 0x11                       ; C20E8111
>	s_buffer_load_dword s8, s[0:3], 0x12                        ; C2040112
>	v_add_f32_e64 v4, v4, 0 clamp                               ; D2060804 00010104
>	s_buffer_load_dword s9, s[0:3], 0x14                        ; C2048114
>	s_buffer_load_dword s11, s[0:3], 0x15                       ; C2058115
>	v_sub_f32_e32 v5, 1.0, v4                                   ; 080A08F2
>	s_buffer_load_dword s30, s[0:3], 0x16                       ; C20F0116
>	s_buffer_load_dword s31, s[0:3], 0x18                       ; C20F8118
>	s_buffer_load_dword s32, s[0:3], 0x19                       ; C2100119
>	v_mad_f32 v7, -v4, v5, v5                                   ; D2820007 24160B04
>	v_mov_b32_e32 v4, 0x403b800a                                ; 7E0802FF 403B800A
>	s_buffer_load_dword s33, s[0:3], 0x1a                       ; C210811A
>	s_buffer_load_dword s34, s[0:3], 0x1c                       ; C211011C
>	s_buffer_load_dword s35, s[0:3], 0x1d                       ; C211811D
>	v_mad_f32 v5, v4, v19, v11                                  ; D2820005 042E2704
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s28, v5                                   ; 100C0A1C
>	v_mul_f32_e32 v9, s29, v5                                   ; 10120A1D
>	v_mul_f32_e32 v10, s8, v5                                   ; 10140A08
>	v_mad_f32 v5, v4, v20, v12                                  ; D2820005 04322904
>	v_mac_f32_e32 v6, s9, v5                                    ; 3E0C0A09
>	v_mad_f32 v4, v4, v21, v15                                  ; D2820004 043E2B04
>	v_mac_f32_e32 v9, s11, v5                                   ; 3E120A0B
>	v_mac_f32_e32 v10, s30, v5                                  ; 3E140A1E
>	v_mac_f32_e32 v6, s31, v4                                   ; 3E0C081F
>	v_mac_f32_e32 v9, s32, v4                                   ; 3E120820
>	v_add_f32_e32 v5, s34, v6                                   ; 060A0C22
>	s_load_dwordx4 s[12:15], s[4:5], 0x4c                       ; C086054C
>	s_buffer_load_dword s40, s[0:3], 0x1e                       ; C214011E
>	v_mac_f32_e32 v10, s33, v4                                  ; 3E140821
>	v_add_f32_e32 v6, s35, v9                                   ; 060C1223
>	s_load_dwordx8 s[28:35], s[4:5], 0x40                       ; C0CE0540
>	s_load_dwordx8 s[16:23], s[4:5], 0x0                        ; C0C80500
>	s_load_dwordx4 s[24:27], s[4:5], 0xc                        ; C08C050C
>	v_interp_p1_f32 v0, v2, 0, 1, [m0]                          ; C8000402
>	v_interp_p2_f32 v0, [v0], v3, 0, 1, [m0]                    ; C8010403
>	v_interp_p1_f32 v1, v2, 1, 1, [m0]                          ; C8040502
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_add_f32_e32 v4, s40, v10                                  ; 06081428
>	v_interp_p2_f32 v1, [v1], v3, 1, 1, [m0]                    ; C8050503
>	s_and_b32 s12, s12, s35                                     ; 870C230C
>	s_and_b32 s24, s24, s23                                     ; 87181718
>	image_sample v[9:10], v[0:1], s[28:35], s[12:15] dmask:0x6  ; F0800600 00670900
>	image_sample_c v25, v[4:7], s[16:23], s[24:27] dmask:0x1    ; F0A00100 00C41904
>	v_cubema_f32 v4, v19, v20, v21                              ; D28E0004 04562913
>	s_load_dwordx4 s[36:39], s[4:5], 0x1c                       ; C092051C
>	s_load_dwordx8 s[40:47], s[4:5], 0x10                       ; C0D40510
>	v_rcp_f32_e64 v5, |v4|                                      ; D3540105 00000104
>	s_load_dwordx4 s[24:27], s[4:5], 0x3c                       ; C08C053C
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                       ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                       ; C08A052C
>	s_load_dwordx8 s[28:35], s[4:5], 0x30                       ; C0CE0530
>	v_cubetc_f32 v6, v19, v20, v21                              ; D28C0006 04562913
>	v_mov_b32_e32 v4, 0x3fc00000                                ; 7E0802FF 3FC00000
>	v_cubesc_f32 v26, v19, v20, v21                             ; D28A001A 04562913
>	v_mad_f32 v6, v5, v6, v4                                    ; D2820006 04120D05
>	v_mad_f32 v5, v5, v26, v4                                   ; D2820005 04123505
>	s_waitcnt vmcnt(1)                                          ; BF8C0F71
>	v_mul_f32_e32 v26, v7, v9                                   ; 10341307
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	s_and_b32 s36, s36, s47                                     ; 87242F24
>	v_cubeid_f32 v7, v19, v20, v21                              ; D2880007 04562913
>	s_and_b64 exec, exec, s[6:7]                                ; 87FE067E
>	s_buffer_load_dword s4, s[0:3], 0x4                         ; C2020104
>	s_buffer_load_dword s5, s[0:3], 0x5                         ; C2028105
>	s_buffer_load_dword s6, s[0:3], 0x6                         ; C2030106
>	v_mad_f32 v18, -v8, v17, v18                                ; D2820012 244A2308
>	image_sample v[5:8], v[5:8], s[40:47], s[36:39] dmask:0xf   ; F0800F00 012A0505
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v5, v8, v5                                    ; 100A0B08
>	v_mul_f32_e32 v6, v8, v6                                    ; 100C0D08
>	v_mul_f32_e32 v7, v8, v7                                    ; 100E0F08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v8, s4, v19                                   ; 10102604
>	v_mad_f32 v8, -s5, v20, -v8                                 ; D2820008 A4222805
>	v_mad_f32 v8, -s6, v21, v8                                  ; D2820008 24222A06
>	s_buffer_load_dword s4, s[0:3], 0xc                         ; C202010C
>	s_buffer_load_dword s5, s[0:3], 0xd                         ; C202810D
>	s_buffer_load_dword s6, s[0:3], 0xe                         ; C203010E
>	s_buffer_load_dword s8, s[0:3], 0x2c                        ; C204012C
>	v_mad_f32 v14, -v14, v17, v23                               ; D282000E 245E230E
>	v_mad_f32 v16, -v16, v17, v24                               ; D2820010 24622310
>	v_mul_f32_e32 v17, v25, v25                                 ; 10223319
>	s_buffer_load_dword s9, s[0:3], 0x2d                        ; C204812D
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v23, s4, v17                                  ; 102E2204
>	v_mul_f32_e32 v24, s5, v17                                  ; 10302205
>	v_mul_f32_e32 v17, s6, v17                                  ; 10222206
>	s_buffer_load_dword s11, s[0:3], 0x2e                       ; C205812E
>	v_add_f32_e64 v8, v8, 0 clamp                               ; D2060808 00010108
>	v_mul_f32_e32 v23, v9, v23                                  ; 102E2F09
>	v_mul_f32_e32 v24, v9, v24                                  ; 10303109
>	v_mul_f32_e32 v17, v9, v17                                  ; 10222309
>	v_mul_f32_e32 v23, v23, v8                                  ; 102E1117
>	v_mul_f32_e32 v24, v24, v8                                  ; 10301118
>	v_mul_f32_e32 v17, v17, v8                                  ; 10221111
>	v_mul_f32_e32 v8, 4.0, v9                                   ; 101012F6
>	v_mac_f32_e32 v23, v8, v5                                   ; 3E2E0B08
>	v_sub_f32_e32 v5, s8, v11                                   ; 080A1608
>	v_mac_f32_e32 v24, v8, v6                                   ; 3E300D08
>	v_mac_f32_e32 v17, v8, v7                                   ; 3E220F08
>	v_sub_f32_e32 v6, s9, v12                                   ; 080C1809
>	v_mul_f32_e32 v7, v5, v5                                    ; 100E0B05
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v8, s11, v15                                  ; 08101E0B
>	v_mac_f32_e32 v7, v6, v6                                    ; 3E0E0D06
>	v_mac_f32_e32 v7, v8, v8                                    ; 3E0E1108
>	v_rsq_f32_e32 v25, v7                                       ; 7E325D07
>	s_buffer_load_dword s36, s[0:3], 0x2f                       ; C212012F
>	s_buffer_load_dword s4, s[0:3], 0x30                        ; C2020130
>	s_buffer_load_dword s5, s[0:3], 0x31                        ; C2028131
>	v_mul_f32_e32 v5, v25, v5                                   ; 100A0B19
>	v_mul_f32_e32 v6, v25, v6                                   ; 100C0D19
>	v_mul_f32_e32 v5, v19, v5                                   ; 100A0B13
>	v_mac_f32_e32 v5, v20, v6                                   ; 3E0A0D14
>	v_mul_f32_e32 v6, v25, v8                                   ; 100C1119
>	v_mac_f32_e32 v5, v21, v6                                   ; 3E0A0D15
>	v_mul_f32_e32 v6, v25, v7                                   ; 100C0F19
>	s_buffer_load_dword s6, s[0:3], 0x32                        ; C2030132
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s36, v6                                   ; 100C0C24
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	s_buffer_load_dword s8, s[0:3], 0x34                        ; C2040134
>	v_mad_f32 v7, -v6, s4, s4                                   ; D2820007 20100906
>	s_buffer_load_dword s9, s[0:3], 0x35                        ; C2048135
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	s_buffer_load_dword s4, s[0:3], 0x36                        ; C2020136
>	v_mac_f32_e32 v23, v7, v5                                   ; 3E2E0B07
>	v_mad_f32 v7, -v6, s5, s5                                   ; D2820007 20140B06
>	v_mad_f32 v6, -v6, s6, s6                                   ; D2820006 20180D06
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_mac_f32_e32 v24, v7, v5                                   ; 3E300B07
>	v_mac_f32_e32 v17, v6, v5                                   ; 3E220B06
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_sub_f32_e32 v5, s8, v11                                   ; 080A1608
>	v_sub_f32_e32 v7, s9, v12                                   ; 080E1809
>	v_mul_f32_e32 v8, v5, v5                                    ; 10100B05
>	v_sub_f32_e32 v6, s4, v15                                   ; 080C1E04
>	v_mac_f32_e32 v8, v7, v7                                    ; 3E100F07
>	v_mac_f32_e32 v8, v6, v6                                    ; 3E100D06
>	v_rsq_f32_e32 v11, v8                                       ; 7E165D08
>	s_buffer_load_dword s5, s[0:3], 0x37                        ; C2028137
>	s_buffer_load_dword s6, s[0:3], 0x38                        ; C2030138
>	s_buffer_load_dword s8, s[0:3], 0x39                        ; C2040139
>	v_mul_f32_e32 v5, v11, v5                                   ; 100A0B0B
>	v_mul_f32_e32 v5, v19, v5                                   ; 100A0B13
>	v_mul_f32_e32 v7, v11, v7                                   ; 100E0F0B
>	v_mac_f32_e32 v5, v20, v7                                   ; 3E0A0F14
>	v_mul_f32_e32 v6, v11, v6                                   ; 100C0D0B
>	v_mac_f32_e32 v5, v21, v6                                   ; 3E0A0D15
>	v_mul_f32_e32 v6, v11, v8                                   ; 100C110B
>	s_buffer_load_dword s11, s[0:3], 0x3a                       ; C205813A
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mul_f32_e32 v6, s5, v6                                    ; 100C0C05
>	v_add_f32_e64 v6, v6, 0 clamp                               ; D2060806 00010106
>	v_mad_f32 v7, -v6, s6, s6                                   ; D2820007 20180D06
>	v_add_f32_e64 v5, v5, 0 clamp                               ; D2060805 00010105
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_add_f32_e64 v8, v22, 0 clamp                              ; D2060808 00010116
>	v_mac_f32_e32 v23, v7, v5                                   ; 3E2E0B07
>	v_mad_f32 v7, -v6, s8, s8                                   ; D2820007 20201106
>	v_mad_f32 v6, -v6, s11, s11                                 ; D2820006 202C1706
>	v_mul_f32_e32 v7, v9, v7                                    ; 100E0F09
>	v_mul_f32_e32 v6, v9, v6                                    ; 100C0D09
>	v_sub_f32_e32 v8, 1.0, v8                                   ; 081010F2
>	v_mac_f32_e32 v24, v7, v5                                   ; 3E300B07
>	v_mac_f32_e32 v17, v6, v5                                   ; 3E220B06
>	v_mov_b32_e32 v7, 0x40c00000                                ; 7E0E02FF 40C00000
>	v_cubeid_f32 v6, v18, v14, v16                              ; D2880006 04421D12
>	v_cubetc_f32 v5, v18, v14, v16                              ; D28C0005 04421D12
>	v_cubesc_f32 v11, v18, v14, v16                             ; D28A000B 04421D12
>	v_cubema_f32 v14, v18, v14, v16                             ; D28E000E 04421D12
>	v_log_f32_e32 v15, v8                                       ; 7E1E4F08
>	s_and_b32 s24, s24, s35                                     ; 87182318
>	v_mad_f32 v7, -v10, v7, v7                                  ; D2820007 241E0F0A
>	v_max_f32_e32 v16, 0, v10                                   ; 20201480
>	image_sample v[8:10], v[0:1], s[28:35], s[24:27] dmask:0x7  ; F0800700 00C70800
>	v_rcp_f32_e64 v1, |v14|                                     ; D3540101 0000010E
>	s_buffer_load_dword s4, s[0:3], 0x3                         ; C2020103
>	v_mul_legacy_f32_e32 v0, 0x40a00000, v15                    ; 0E001EFF 40A00000
>	s_buffer_load_dword s7, s[0:3], 0x7                         ; C2038107
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	v_mad_f32 v5, v1, v5, v4                                    ; D2820005 04120B01
>	s_and_b32 s20, s20, s19                                     ; 87141314
>	v_mac_f32_e32 v4, v1, v11                                   ; 3E081701
>	v_mul_f32_e32 v0, v16, v0                                   ; 10000110
>	image_sample_l v[4:6], v[4:7], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30404
>	s_waitcnt vmcnt(0)                                          ; BF8C0F70
>	v_mul_f32_e32 v1, v4, v0                                    ; 10020104
>	v_mul_f32_e32 v4, v5, v0                                    ; 10080105
>	v_mul_f32_e32 v0, v6, v0                                    ; 10000106
>	v_mul_f32_e32 v5, v26, v0                                   ; 100A011A
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mov_b32_e32 v0, s4                                        ; 7E000204
>	v_sub_f32_e32 v0, s7, v0                                    ; 08000007
>	v_add_f32_e32 v0, 0x3a83126f, v0                            ; 060000FF 3A83126F
>	v_rcp_f32_e32 v0, v0                                        ; 7E005500
>	v_subrev_f32_e32 v6, s4, v12                                ; 0A0C1804
>	v_max_f32_e32 v6, 0, v6                                     ; 200C0C80
>	s_buffer_load_dword s5, s[0:3], 0x8                         ; C2028108
>	v_mul_f32_e32 v0, v0, v6                                    ; 10000D00
>	v_log_f32_e32 v0, v0                                        ; 7E004F00
>	v_floor_f32_e32 v6, s7                                      ; 7E0C4807
>	v_sub_f32_e32 v6, s7, v6                                    ; 080C0C07
>	v_mul_f32_e32 v6, 0x41000000, v6                            ; 100C0CFF 41000000
>	v_mul_legacy_f32_e32 v0, v6, v0                             ; 0E000106
>	s_buffer_load_dword s6, s[0:3], 0x9                         ; C2030109
>	v_interp_p1_f32 v6, v2, 2, 1, [m0]                          ; C8180602
>	v_exp_f32_e32 v0, v0                                        ; 7E004B00
>	s_buffer_load_dword s0, s[0:3], 0xa                         ; C200010A
>	v_add_f32_e64 v0, v0, 0 clamp                               ; D2060800 00010100
>	v_interp_p2_f32 v6, [v6], v3, 2, 1, [m0]                    ; C8190603
>	v_mul_f32_e32 v1, v26, v1                                   ; 1002031A
>	v_mul_f32_e32 v6, v0, v6                                    ; 100C0D00
>	v_mul_f32_e32 v4, v26, v4                                   ; 1008091A
>	v_mac_f32_e32 v1, v8, v23                                   ; 3E022F08
>	s_waitcnt lgkmcnt(0)                                        ; BF8C007F
>	v_mad_f32 v0, -v6, s5, s5                                   ; D2820000 20140B06
>	v_mac_f32_e32 v0, v6, v1                                    ; 3E000306
>	v_mac_f32_e32 v4, v9, v24                                   ; 3E083109
>	v_mad_f32 v1, -v6, s6, s6                                   ; D2820001 20180D06
>	v_mac_f32_e32 v1, v6, v4                                    ; 3E020906
>	v_mac_f32_e32 v5, v10, v17                                  ; 3E0A230A
>	v_mad_f32 v4, -v6, s0, s0                                   ; D2820004 20000106
>	v_mac_f32_e32 v4, v6, v5                                    ; 3E080B06
>	v_interp_p1_f32 v5, v2, 3, 0, [m0]                          ; C8140302
>	v_interp_p2_f32 v5, [v5], v3, 3, 0, [m0]                    ; C8150303
>	v_mov_b32_e32 v2, v4                                        ; 7E040304
>	v_mov_b32_e32 v3, v5                                        ; 7E060305
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 28
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1424 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 9
>********************
>
>
>FRAG
>DCL IN[0], GENERIC[0], PERSPECTIVE
>DCL IN[1].x, GENERIC[1], PERSPECTIVE
>DCL IN[2].xyz, GENERIC[2], PERSPECTIVE, CENTROID
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SAMP[1]
>DCL SAMP[2]
>DCL SVIEW[0], SHADOW2D, FLOAT
>DCL SVIEW[1], CUBE, FLOAT
>DCL SVIEW[2], CUBE, FLOAT
>DCL CONST[0..7]
>DCL CONST[11..20]
>DCL TEMP[0..13], LOCAL
>IMM[0] FLT32 {    1.0000,     2.0000,     1.3000,     1.8500}
>IMM[1] FLT32 {   -0.0000,    -0.3000,     0.8000,     1.0000}
>IMM[2] FLT32 {    2.9297,     9.0000,     0.5000,     6.0000}
>IMM[3] FLT32 {    0.3333,     4.0000,     5.0000,     0.2500}
>IMM[4] FLT32 {    0.0000,     0.0000,     0.0010,     8.0000}
>  0: ADD TEMP[0].xyz, CONST[0].xyzz, -IN[0].xyzz
>  1: DP3 TEMP[1].x, TEMP[0].xyzz, TEMP[0].xyzz
>  2: RSQ TEMP[1].x, TEMP[1].xxxx
>  3: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[1].xxxx
>  4: DP3 TEMP[1].x, IN[2].xyzz, IN[2].xyzz
>  5: RSQ TEMP[1].x, TEMP[1].xxxx
>  6: MUL TEMP[1].xyz, IN[2].xyzz, TEMP[1].xxxx
>  7: MOV TEMP[2].x, IMM[0].xxxx
>  8: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[0].xyzz
>  9: MUL TEMP[3].xyz, TEMP[3].xxxx, TEMP[1].xyzz
> 10: MUL TEMP[3].xyz, IMM[0].yyyy, TEMP[3].xyzz
> 11: ADD TEMP[3].xyz, TEMP[0].xyzz, -TEMP[3].xyzz
> 12: DP3 TEMP[3].x, TEMP[3].xyzz, TEMP[1].xyzz
> 13: ADD TEMP[3].x, TEMP[3].xxxx, IMM[0].xxxx
> 14: DP3 TEMP[4].x, TEMP[0].xyzz, TEMP[1].xyzz
> 15: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
> 16: MOV_SAT TEMP[4].x, TEMP[4].xxxx
> 17: ADD TEMP[3].x, TEMP[3].xxxx, -TEMP[4].xxxx
> 18: MOV_SAT TEMP[3].x, TEMP[3].xxxx
> 19: ADD TEMP[3].x, IMM[0].xxxx, -TEMP[3].xxxx
> 20: MUL TEMP[3].x, TEMP[3].xxxx, TEMP[3].xxxx
> 21: MOV TEMP[2].y, TEMP[3].xxxx
> 22: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[0].xyzz
> 23: MUL TEMP[4].xyz, TEMP[4].xxxx, TEMP[1].xyzz
> 24: MAD TEMP[4].xyz, IMM[0].yyyy, TEMP[4].xyzz, -TEMP[0].xyzz
> 25: MOV TEMP[5].xyz, TEMP[1].xyzx
> 26: MUL TEMP[6].x, TEMP[1].yyyy, TEMP[1].yyyy
> 27: MAD TEMP[6].x, TEMP[1].xxxx, TEMP[1].xxxx, -TEMP[6].xxxx
> 28: MOV TEMP[5].w, TEMP[6].xxxx
> 29: MOV TEMP[6].xyz, TEMP[4].xyzx
> 30: MUL TEMP[7].x, TEMP[4].yyyy, TEMP[4].yyyy
> 31: MAD TEMP[7].x, TEMP[4].xxxx, TEMP[4].xxxx, -TEMP[7].xxxx
> 32: MOV TEMP[6].w, TEMP[7].xxxx
> 33: DP4 TEMP[5].x, CONST[15], TEMP[5]
> 34: DP4 TEMP[6].x, CONST[15], TEMP[6]
> 35: MOV TEMP[5].y, TEMP[6].xxxx
> 36: MUL TEMP[6], TEMP[1].xyzz, TEMP[1].yzxz
> 37: DP4 TEMP[6].x, CONST[16], TEMP[6]
> 38: MUL TEMP[4], TEMP[4].xyzz, TEMP[4].yzxz
> 39: DP4 TEMP[4].x, CONST[16], TEMP[4]
> 40: MOV TEMP[6].y, TEMP[4].xxxx
> 41: ADD TEMP[4].xy, TEMP[5].xyyy, TEMP[6].xyyy
> 42: ADD TEMP[4].xy, TEMP[4].xyyy, CONST[17].xxxx
> 43: MAD TEMP[4].xy, TEMP[4].xyyy, IMM[0].zwww, IMM[1].xyyy
> 44: MOV_SAT TEMP[4].xy, TEMP[4].xyyy
> 45: MUL TEMP[4].xy, TEMP[4].xyyy, IMM[1].zwww
> 46: ADD TEMP[4].xy, IMM[0].xxxx, -TEMP[4].xyyy
> 47: MUL TEMP[2].xy, TEMP[2].xyyy, TEMP[4].xyyy
> 48: MAD TEMP[4].xyz, IMM[2].xxxx, TEMP[1].xyzz, IN[0].xyzz
> 49: MUL TEMP[5], CONST[4], TEMP[4].xxxx
> 50: MAD TEMP[5], CONST[5], TEMP[4].yyyy, TEMP[5]
> 51: MAD TEMP[4], CONST[6], TEMP[4].zzzz, TEMP[5]
> 52: ADD TEMP[4].xyz, TEMP[4], CONST[7]
> 53: MAD TEMP[5].x, IMM[2].yyyy, CONST[20].yyyy, IMM[0].yyyy
> 54: EX2 TEMP[5].x, TEMP[5].xxxx
> 55: MOV TEMP[6].xyz, -CONST[1].xyzx
> 56: ADD TEMP[7].xyz, TEMP[6].xyzz, TEMP[0].xyzz
> 57: MUL TEMP[7].xyz, TEMP[7].xyzz, IMM[2].zzzz
> 58: DP3 TEMP[8].x, TEMP[7].xyzz, TEMP[7].xyzz
> 59: RSQ TEMP[8].x, TEMP[8].xxxx
> 60: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[8].xxxx
> 61: DP3 TEMP[8].x, TEMP[6].xyzz, TEMP[1].xyzz
> 62: MOV_SAT TEMP[8].x, TEMP[8].xxxx
> 63: MOV TEMP[9].xy, TEMP[4].xyyy
> 64: MOV TEMP[9].w, IMM[0].xxxx
> 65: MOV TEMP[9].z, TEMP[4].zzzz
> 66: TXP TEMP[4].x, TEMP[9], SAMP[0], SHADOW2D
> 67: MUL TEMP[4].x, TEMP[4].xxxx, TEMP[4].xxxx
> 68: MUL TEMP[4].xyz, CONST[3].xyzz, TEMP[4].xxxx
> 69: MUL TEMP[4].xyz, TEMP[8].xxxx, TEMP[4].xyzz
> 70: MOV TEMP[9].xyz, TEMP[1].xyzz
> 71: TEX TEMP[9], TEMP[9], SAMP[1], CUBE
> 72: DP3 TEMP[10].x, TEMP[1].xyzz, TEMP[0].xyzz
> 73: MUL TEMP[10].xyz, TEMP[10].xxxx, TEMP[1].xyzz
> 74: MAD TEMP[10].xyz, IMM[0].yyyy, TEMP[10].xyzz, -TEMP[0].xyzz
> 75: ADD TEMP[11].x, IMM[0].xxxx, -CONST[20].yyyy
> 76: MUL TEMP[11].x, TEMP[11].xxxx, IMM[2].wwww
> 77: DP3 TEMP[12].x, CONST[18].xyzz, IMM[3].xxxx
> 78: ADD TEMP[13].x, IMM[0].xxxx, -TEMP[12].xxxx
> 79: MOV_SAT TEMP[13].x, TEMP[13].xxxx
> 80: MUL TEMP[9].xyz, TEMP[9].xyzz, TEMP[9].wwww
> 81: MUL TEMP[9].xyz, TEMP[9].xyzz, IMM[3].yyyy
> 82: MUL TEMP[9].xyz, TEMP[13].xxxx, TEMP[9].xyzz
> 83: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
> 84: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 85: MUL TEMP[12].xyz, TEMP[4].xyzz, TEMP[12].xxxx
> 86: MAD TEMP[9].xyz, TEMP[9].xyzz, TEMP[2].xxxx, TEMP[12].xyzz
> 87: DP3 TEMP[12].x, TEMP[0].xyzz, TEMP[1].xyzz
> 88: MOV_SAT TEMP[12].x, TEMP[12].xxxx
> 89: ADD TEMP[12].x, IMM[0].xxxx, -TEMP[12].xxxx
> 90: POW TEMP[12].x, TEMP[12].xxxx, IMM[3].zzzz
> 91: MAX TEMP[13].xyz, CONST[20].yyyy, CONST[18].xyzz
> 92: ADD TEMP[13].xyz, TEMP[13].xyzz, -CONST[18].xyzz
> 93: MAD TEMP[12].xyz, TEMP[12].xxxx, TEMP[13].xyzz, CONST[18].xyzz
> 94: MOV TEMP[10].xyz, TEMP[10].xyzz
> 95: MOV TEMP[10].w, TEMP[11].xxxx
> 96: TXL TEMP[10].xyz, TEMP[10], SAMP[2], CUBE
> 97: DP3 TEMP[6].x, TEMP[6].xyzz, TEMP[7].xyzz
> 98: MOV_SAT TEMP[6].x, TEMP[6].xxxx
> 99: ADD TEMP[6].x, IMM[0].xxxx, -TEMP[6].xxxx
>100: POW TEMP[6].x, TEMP[6].xxxx, IMM[3].zzzz
>101: ADD TEMP[11].xyz, IMM[0].xxxx, -CONST[18].xyzz
>102: MAD TEMP[6].xyz, TEMP[6].xxxx, TEMP[11].xyzz, CONST[18].xyzz
>103: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xyzz
>104: ADD TEMP[6].x, TEMP[5].xxxx, IMM[0].yyyy
>105: MUL TEMP[6].x, TEMP[6].xxxx, IMM[3].wwww
>106: MUL TEMP[11].x, -TEMP[5].xxxx, IMM[2].zzzz
>107: EX2 TEMP[11].x, TEMP[11].xxxx
>108: ADD TEMP[11].x, IMM[0].yyyy, -TEMP[11].xxxx
>109: RCP TEMP[11].x, TEMP[11].xxxx
>110: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[11].xxxx
>111: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xxxx
>112: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[7].xyzz
>113: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>114: POW TEMP[6].x, TEMP[6].xxxx, TEMP[5].xxxx
>115: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xxxx
>116: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[1].xyzz
>117: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>118: MAX TEMP[6].x, TEMP[8].xxxx, TEMP[6].xxxx
>119: ADD TEMP[6].x, TEMP[6].xxxx, IMM[4].xxxx
>120: RCP TEMP[6].x, TEMP[6].xxxx
>121: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xxxx
>122: MAD TEMP[4].xyz, TEMP[12].xyzz, TEMP[10].xyzz, TEMP[4].xyzz
>123: MUL TEMP[2].xyz, TEMP[4].xyzz, TEMP[2].yyyy
>124: ADD TEMP[4].xyz, CONST[11].xyzz, -IN[0].xyzz
>125: DP3 TEMP[6].x, TEMP[4].xyzz, TEMP[4].xyzz
>126: RSQ TEMP[7].x, TEMP[6].xxxx
>127: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[7].xxxx
>128: ADD TEMP[8].xyz, TEMP[4].xyzz, TEMP[0].xyzz
>129: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[2].zzzz
>130: DP3 TEMP[10].x, TEMP[8].xyzz, TEMP[8].xyzz
>131: RSQ TEMP[10].x, TEMP[10].xxxx
>132: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[10].xxxx
>133: DP3 TEMP[10].x, TEMP[4].xyzz, TEMP[1].xyzz
>134: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>135: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
>136: MUL TEMP[6].x, TEMP[6].xxxx, CONST[11].wwww
>137: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>138: ADD TEMP[6].x, IMM[0].xxxx, -TEMP[6].xxxx
>139: MUL TEMP[6].xyz, CONST[12].xyzz, TEMP[6].xxxx
>140: MUL TEMP[6].xyz, TEMP[10].xxxx, TEMP[6].xyzz
>141: DP3 TEMP[7].x, CONST[18].xyzz, IMM[3].xxxx
>142: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[7].xxxx
>143: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>144: MAD TEMP[9].xyz, TEMP[6].xyzz, TEMP[7].xxxx, TEMP[9].xyzz
>145: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[8].xyzz
>146: MOV_SAT TEMP[4].x, TEMP[4].xxxx
>147: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
>148: POW TEMP[4].x, TEMP[4].xxxx, IMM[3].zzzz
>149: ADD TEMP[7].xyz, IMM[0].xxxx, -CONST[18].xyzz
>150: MAD TEMP[4].xyz, TEMP[4].xxxx, TEMP[7].xyzz, CONST[18].xyzz
>151: MUL TEMP[4].xyz, TEMP[6].xyzz, TEMP[4].xyzz
>152: ADD TEMP[6].x, TEMP[5].xxxx, IMM[0].yyyy
>153: MUL TEMP[6].x, TEMP[6].xxxx, IMM[3].wwww
>154: MUL TEMP[7].x, -TEMP[5].xxxx, IMM[2].zzzz
>155: EX2 TEMP[7].x, TEMP[7].xxxx
>156: ADD TEMP[7].x, IMM[0].yyyy, -TEMP[7].xxxx
>157: RCP TEMP[7].x, TEMP[7].xxxx
>158: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
>159: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xxxx
>160: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[8].xyzz
>161: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>162: POW TEMP[6].x, TEMP[6].xxxx, TEMP[5].xxxx
>163: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xxxx
>164: DP3 TEMP[6].x, TEMP[0].xyzz, TEMP[1].xyzz
>165: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>166: MAX TEMP[6].x, TEMP[10].xxxx, TEMP[6].xxxx
>167: ADD TEMP[6].x, TEMP[6].xxxx, IMM[4].xxxx
>168: RCP TEMP[6].x, TEMP[6].xxxx
>169: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xxxx
>170: MAD TEMP[2].xyz, TEMP[4].xyzz, TEMP[3].xxxx, TEMP[2].xyzz
>171: ADD TEMP[4].xyz, CONST[13].xyzz, -IN[0].xyzz
>172: DP3 TEMP[6].x, TEMP[4].xyzz, TEMP[4].xyzz
>173: RSQ TEMP[7].x, TEMP[6].xxxx
>174: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[7].xxxx
>175: ADD TEMP[8].xyz, TEMP[4].xyzz, TEMP[0].xyzz
>176: MUL TEMP[8].xyz, TEMP[8].xyzz, IMM[2].zzzz
>177: DP3 TEMP[10].x, TEMP[8].xyzz, TEMP[8].xyzz
>178: RSQ TEMP[10].x, TEMP[10].xxxx
>179: MUL TEMP[8].xyz, TEMP[8].xyzz, TEMP[10].xxxx
>180: DP3 TEMP[10].x, TEMP[4].xyzz, TEMP[1].xyzz
>181: MOV_SAT TEMP[10].x, TEMP[10].xxxx
>182: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
>183: MUL TEMP[6].x, TEMP[6].xxxx, CONST[13].wwww
>184: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>185: ADD TEMP[6].x, IMM[0].xxxx, -TEMP[6].xxxx
>186: MUL TEMP[6].xyz, CONST[14].xyzz, TEMP[6].xxxx
>187: MUL TEMP[6].xyz, TEMP[10].xxxx, TEMP[6].xyzz
>188: DP3 TEMP[7].x, CONST[18].xyzz, IMM[3].xxxx
>189: ADD TEMP[7].x, IMM[0].xxxx, -TEMP[7].xxxx
>190: MOV_SAT TEMP[7].x, TEMP[7].xxxx
>191: MAD TEMP[9].xyz, TEMP[6].xyzz, TEMP[7].xxxx, TEMP[9].xyzz
>192: DP3 TEMP[4].x, TEMP[4].xyzz, TEMP[8].xyzz
>193: MOV_SAT TEMP[4].x, TEMP[4].xxxx
>194: ADD TEMP[4].x, IMM[0].xxxx, -TEMP[4].xxxx
>195: POW TEMP[4].x, TEMP[4].xxxx, IMM[3].zzzz
>196: ADD TEMP[7].xyz, IMM[0].xxxx, -CONST[18].xyzz
>197: MAD TEMP[4].xyz, TEMP[4].xxxx, TEMP[7].xyzz, CONST[18].xyzz
>198: MUL TEMP[4].xyz, TEMP[6].xyzz, TEMP[4].xyzz
>199: ADD TEMP[6].x, TEMP[5].xxxx, IMM[0].yyyy
>200: MUL TEMP[6].x, TEMP[6].xxxx, IMM[3].wwww
>201: MUL TEMP[7].x, -TEMP[5].xxxx, IMM[2].zzzz
>202: EX2 TEMP[7].x, TEMP[7].xxxx
>203: ADD TEMP[7].x, IMM[0].yyyy, -TEMP[7].xxxx
>204: RCP TEMP[7].x, TEMP[7].xxxx
>205: MUL TEMP[6].x, TEMP[6].xxxx, TEMP[7].xxxx
>206: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[6].xxxx
>207: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[8].xyzz
>208: MOV_SAT TEMP[6].x, TEMP[6].xxxx
>209: POW TEMP[5].x, TEMP[6].xxxx, TEMP[5].xxxx
>210: MUL TEMP[4].xyz, TEMP[4].xyzz, TEMP[5].xxxx
>211: DP3 TEMP[0].x, TEMP[0].xyzz, TEMP[1].xyzz
>212: MOV_SAT TEMP[0].x, TEMP[0].xxxx
>213: MAX TEMP[0].x, TEMP[10].xxxx, TEMP[0].xxxx
>214: ADD TEMP[0].x, TEMP[0].xxxx, IMM[4].xxxx
>215: RCP TEMP[0].x, TEMP[0].xxxx
>216: MUL TEMP[0].xyz, TEMP[4].xyzz, TEMP[0].xxxx
>217: MAD TEMP[2].xyz, TEMP[0].xyzz, TEMP[3].xxxx, TEMP[2].xyzz
>218: MAD TEMP[0].xyz, TEMP[9].xyzz, CONST[19].xyzz, TEMP[2].xyzz
>219: ADD TEMP[1].x, IN[0].yyyy, -CONST[0].wwww
>220: MAX TEMP[1].x, TEMP[1].xxxx, IMM[4].yyyy
>221: ADD TEMP[2].x, CONST[1].wwww, -CONST[0].wwww
>222: ADD TEMP[2].x, TEMP[2].xxxx, IMM[4].zzzz
>223: RCP TEMP[2].x, TEMP[2].xxxx
>224: MUL TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>225: FRC TEMP[2].x, CONST[1].wwww
>226: MUL TEMP[2].x, TEMP[2].xxxx, IMM[4].wwww
>227: POW TEMP[1].x, TEMP[1].xxxx, TEMP[2].xxxx
>228: MOV_SAT TEMP[1].x, TEMP[1].xxxx
>229: MUL TEMP[1].x, IN[1].xxxx, TEMP[1].xxxx
>230: LRP TEMP[0].xyz, TEMP[1].xxxx, TEMP[0].xyzz, CONST[2].xyzz
>231: MOV TEMP[0].w, CONST[20].xxxx
>232: MOV OUT[0], TEMP[0]
>233: END
>radeonsi: Compiling shader 140
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 0)
>  %26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %27 = fsub float %25, %26
>  %28 = call float @llvm.SI.load.const(<16 x i8> %24, i32 4)
>  %29 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %30 = fsub float %28, %29
>  %31 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <16 x i8>, <16 x i8> addrspace(2)* %31, align 16, !invariant.load !0
>  %33 = call float @llvm.SI.load.const(<16 x i8> %32, i32 8)
>  %34 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %35 = fsub float %33, %34
>  %36 = fmul float %27, %27
>  %37 = fmul float %30, %30
>  %38 = fadd float %37, %36
>  %39 = fmul float %35, %35
>  %40 = fadd float %38, %39
>  %41 = call float @llvm.sqrt.f32(float %40)
>  %42 = fdiv float 1.000000e+00, %41, !fpmath !1
>  %43 = fmul float %27, %42
>  %44 = fmul float %30, %42
>  %45 = fmul float %35, %42
>  %46 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %47 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %48 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %49 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %50 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %51 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %52 = fmul float %46, %49
>  %53 = fmul float %47, %50
>  %54 = fadd float %53, %52
>  %55 = fmul float %48, %51
>  %56 = fadd float %54, %55
>  %57 = call float @llvm.sqrt.f32(float %56)
>  %58 = fdiv float 1.000000e+00, %57, !fpmath !1
>  %59 = call float @llvm.SI.fs.interp(i32 0, i32 2, i32 %6, <2 x i32> %9)
>  %60 = fmul float %59, %58
>  %61 = call float @llvm.SI.fs.interp(i32 1, i32 2, i32 %6, <2 x i32> %9)
>  %62 = fmul float %61, %58
>  %63 = call float @llvm.SI.fs.interp(i32 2, i32 2, i32 %6, <2 x i32> %9)
>  %64 = fmul float %63, %58
>  %65 = fmul float %60, %43
>  %66 = fmul float %62, %44
>  %67 = fadd float %66, %65
>  %68 = fmul float %64, %45
>  %69 = fadd float %67, %68
>  %70 = fmul float %69, %60
>  %71 = fmul float %69, %62
>  %72 = fmul float %69, %64
>  %73 = fmul float %70, 2.000000e+00
>  %74 = fmul float %71, 2.000000e+00
>  %75 = fmul float %72, 2.000000e+00
>  %76 = fsub float %43, %73
>  %77 = fsub float %44, %74
>  %78 = fsub float %45, %75
>  %79 = fmul float %76, %60
>  %80 = fmul float %77, %62
>  %81 = fadd float %80, %79
>  %82 = fmul float %78, %64
>  %83 = fadd float %81, %82
>  %84 = fadd float %83, 1.000000e+00
>  %85 = fmul float %43, %60
>  %86 = fmul float %44, %62
>  %87 = fadd float %86, %85
>  %88 = fmul float %45, %64
>  %89 = fadd float %87, %88
>  %90 = fsub float 1.000000e+00, %89
>  %91 = call float @llvm.AMDGPU.clamp.(float %90, float 0.000000e+00, float 1.000000e+00)
>  %92 = fsub float %84, %91
>  %93 = call float @llvm.AMDGPU.clamp.(float %92, float 0.000000e+00, float 1.000000e+00)
>  %94 = fsub float 1.000000e+00, %93
>  %95 = fmul float %94, %94
>  %96 = fmul float %60, %43
>  %97 = fmul float %62, %44
>  %98 = fadd float %97, %96
>  %99 = fmul float %64, %45
>  %100 = fadd float %98, %99
>  %101 = fmul float %100, %60
>  %102 = fmul float %100, %62
>  %103 = fmul float %100, %64
>  %104 = fmul float %101, 2.000000e+00
>  %105 = fsub float %104, %43
>  %106 = fmul float %102, 2.000000e+00
>  %107 = fsub float %106, %44
>  %108 = fmul float %103, 2.000000e+00
>  %109 = fsub float %108, %45
>  %110 = fmul float %62, %62
>  %111 = fmul float %60, %60
>  %112 = fsub float %111, %110
>  %113 = fmul float %107, %107
>  %114 = fmul float %105, %105
>  %115 = fsub float %114, %113
>  %116 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %117 = load <16 x i8>, <16 x i8> addrspace(2)* %116, align 16, !invariant.load !0
>  %118 = call float @llvm.SI.load.const(<16 x i8> %117, i32 240)
>  %119 = call float @llvm.SI.load.const(<16 x i8> %117, i32 244)
>  %120 = call float @llvm.SI.load.const(<16 x i8> %117, i32 248)
>  %121 = call float @llvm.SI.load.const(<16 x i8> %117, i32 252)
>  %122 = fmul float %118, %60
>  %123 = fmul float %119, %62
>  %124 = fadd float %122, %123
>  %125 = fmul float %120, %64
>  %126 = fadd float %124, %125
>  %127 = fmul float %121, %112
>  %128 = fadd float %126, %127
>  %129 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %130 = load <16 x i8>, <16 x i8> addrspace(2)* %129, align 16, !invariant.load !0
>  %131 = call float @llvm.SI.load.const(<16 x i8> %130, i32 240)
>  %132 = call float @llvm.SI.load.const(<16 x i8> %130, i32 244)
>  %133 = call float @llvm.SI.load.const(<16 x i8> %130, i32 248)
>  %134 = call float @llvm.SI.load.const(<16 x i8> %130, i32 252)
>  %135 = fmul float %131, %105
>  %136 = fmul float %132, %107
>  %137 = fadd float %135, %136
>  %138 = fmul float %133, %109
>  %139 = fadd float %137, %138
>  %140 = fmul float %134, %115
>  %141 = fadd float %139, %140
>  %142 = fmul float %60, %62
>  %143 = fmul float %62, %64
>  %144 = fmul float %64, %60
>  %145 = fmul float %64, %64
>  %146 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %147 = load <16 x i8>, <16 x i8> addrspace(2)* %146, align 16, !invariant.load !0
>  %148 = call float @llvm.SI.load.const(<16 x i8> %147, i32 256)
>  %149 = call float @llvm.SI.load.const(<16 x i8> %147, i32 260)
>  %150 = call float @llvm.SI.load.const(<16 x i8> %147, i32 264)
>  %151 = call float @llvm.SI.load.const(<16 x i8> %147, i32 268)
>  %152 = fmul float %148, %142
>  %153 = fmul float %149, %143
>  %154 = fadd float %152, %153
>  %155 = fmul float %150, %144
>  %156 = fadd float %154, %155
>  %157 = fmul float %151, %145
>  %158 = fadd float %156, %157
>  %159 = fmul float %105, %107
>  %160 = fmul float %107, %109
>  %161 = fmul float %109, %105
>  %162 = fmul float %109, %109
>  %163 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %164 = load <16 x i8>, <16 x i8> addrspace(2)* %163, align 16, !invariant.load !0
>  %165 = call float @llvm.SI.load.const(<16 x i8> %164, i32 256)
>  %166 = call float @llvm.SI.load.const(<16 x i8> %164, i32 260)
>  %167 = call float @llvm.SI.load.const(<16 x i8> %164, i32 264)
>  %168 = call float @llvm.SI.load.const(<16 x i8> %164, i32 268)
>  %169 = fmul float %165, %159
>  %170 = fmul float %166, %160
>  %171 = fadd float %169, %170
>  %172 = fmul float %167, %161
>  %173 = fadd float %171, %172
>  %174 = fmul float %168, %162
>  %175 = fadd float %173, %174
>  %176 = fadd float %128, %158
>  %177 = fadd float %141, %175
>  %178 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %179 = load <16 x i8>, <16 x i8> addrspace(2)* %178, align 16, !invariant.load !0
>  %180 = call float @llvm.SI.load.const(<16 x i8> %179, i32 272)
>  %181 = fadd float %176, %180
>  %182 = call float @llvm.SI.load.const(<16 x i8> %179, i32 272)
>  %183 = fadd float %177, %182
>  %184 = fmul float %181, 0x3FF4CCCCC0000000
>  %185 = fmul float %183, 0x3FFD9999A0000000
>  %186 = fadd float %185, 0xBFD3333340000000
>  %187 = call float @llvm.AMDGPU.clamp.(float %184, float 0.000000e+00, float 1.000000e+00)
>  %188 = call float @llvm.AMDGPU.clamp.(float %186, float 0.000000e+00, float 1.000000e+00)
>  %189 = fmul float %187, 0x3FE99999A0000000
>  %190 = fsub float 1.000000e+00, %189
>  %191 = fsub float 1.000000e+00, %188
>  %192 = fmul float %95, %191
>  %193 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %194 = fmul float %60, 0x4007700140000000
>  %195 = fadd float %194, %193
>  %196 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %197 = fmul float %62, 0x4007700140000000
>  %198 = fadd float %197, %196
>  %199 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %200 = fmul float %64, 0x4007700140000000
>  %201 = fadd float %200, %199
>  %202 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %203 = load <16 x i8>, <16 x i8> addrspace(2)* %202, align 16, !invariant.load !0
>  %204 = call float @llvm.SI.load.const(<16 x i8> %203, i32 64)
>  %205 = fmul float %204, %195
>  %206 = call float @llvm.SI.load.const(<16 x i8> %203, i32 68)
>  %207 = fmul float %206, %195
>  %208 = call float @llvm.SI.load.const(<16 x i8> %203, i32 72)
>  %209 = fmul float %208, %195
>  %210 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %211 = load <16 x i8>, <16 x i8> addrspace(2)* %210, align 16, !invariant.load !0
>  %212 = call float @llvm.SI.load.const(<16 x i8> %211, i32 80)
>  %213 = fmul float %212, %198
>  %214 = fadd float %213, %205
>  %215 = call float @llvm.SI.load.const(<16 x i8> %211, i32 84)
>  %216 = fmul float %215, %198
>  %217 = fadd float %216, %207
>  %218 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %219 = load <16 x i8>, <16 x i8> addrspace(2)* %218, align 16, !invariant.load !0
>  %220 = call float @llvm.SI.load.const(<16 x i8> %219, i32 88)
>  %221 = fmul float %220, %198
>  %222 = fadd float %221, %209
>  %223 = call float @llvm.SI.load.const(<16 x i8> %219, i32 96)
>  %224 = fmul float %223, %201
>  %225 = fadd float %224, %214
>  %226 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %227 = load <16 x i8>, <16 x i8> addrspace(2)* %226, align 16, !invariant.load !0
>  %228 = call float @llvm.SI.load.const(<16 x i8> %227, i32 100)
>  %229 = fmul float %228, %201
>  %230 = fadd float %229, %217
>  %231 = call float @llvm.SI.load.const(<16 x i8> %227, i32 104)
>  %232 = fmul float %231, %201
>  %233 = fadd float %232, %222
>  %234 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %235 = load <16 x i8>, <16 x i8> addrspace(2)* %234, align 16, !invariant.load !0
>  %236 = call float @llvm.SI.load.const(<16 x i8> %235, i32 112)
>  %237 = fadd float %225, %236
>  %238 = call float @llvm.SI.load.const(<16 x i8> %235, i32 116)
>  %239 = fadd float %230, %238
>  %240 = call float @llvm.SI.load.const(<16 x i8> %235, i32 120)
>  %241 = fadd float %233, %240
>  %242 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %243 = load <16 x i8>, <16 x i8> addrspace(2)* %242, align 16, !invariant.load !0
>  %244 = call float @llvm.SI.load.const(<16 x i8> %243, i32 324)
>  %245 = fmul float %244, 9.000000e+00
>  %246 = fadd float %245, 2.000000e+00
>  %247 = call float @llvm.exp2.f32(float %246)
>  %248 = call float @llvm.SI.load.const(<16 x i8> %243, i32 16)
>  %249 = fsub float -0.000000e+00, %248
>  %250 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %251 = load <16 x i8>, <16 x i8> addrspace(2)* %250, align 16, !invariant.load !0
>  %252 = call float @llvm.SI.load.const(<16 x i8> %251, i32 20)
>  %253 = fsub float -0.000000e+00, %252
>  %254 = call float @llvm.SI.load.const(<16 x i8> %251, i32 24)
>  %255 = fsub float -0.000000e+00, %254
>  %256 = fsub float %43, %248
>  %257 = fsub float %44, %252
>  %258 = fsub float %45, %254
>  %259 = fmul float %256, 5.000000e-01
>  %260 = fmul float %257, 5.000000e-01
>  %261 = fmul float %258, 5.000000e-01
>  %262 = fmul float %259, %259
>  %263 = fmul float %260, %260
>  %264 = fadd float %263, %262
>  %265 = fmul float %261, %261
>  %266 = fadd float %264, %265
>  %267 = call float @llvm.sqrt.f32(float %266)
>  %268 = fdiv float 1.000000e+00, %267, !fpmath !1
>  %269 = fmul float %259, %268
>  %270 = fmul float %260, %268
>  %271 = fmul float %261, %268
>  %272 = fmul float %60, %249
>  %273 = fmul float %62, %253
>  %274 = fadd float %273, %272
>  %275 = fmul float %64, %255
>  %276 = fadd float %274, %275
>  %277 = call float @llvm.AMDGPU.clamp.(float %276, float 0.000000e+00, float 1.000000e+00)
>  %278 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %279 = load <8 x i32>, <8 x i32> addrspace(2)* %278, align 32, !invariant.load !0
>  %280 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %281 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %280, i64 0, i64 3, !amdgpu.uniform !0
>  %282 = load <4 x i32>, <4 x i32> addrspace(2)* %281, align 16, !invariant.load !0
>  %283 = extractelement <8 x i32> %279, i32 7
>  %284 = extractelement <4 x i32> %282, i32 0
>  %285 = and i32 %284, %283
>  %286 = insertelement <4 x i32> %282, i32 %285, i32 0
>  %287 = bitcast float %241 to i32
>  %288 = bitcast float %237 to i32
>  %289 = bitcast float %239 to i32
>  %290 = insertelement <4 x i32> undef, i32 %287, i32 0
>  %291 = insertelement <4 x i32> %290, i32 %288, i32 1
>  %292 = insertelement <4 x i32> %291, i32 %289, i32 2
>  %293 = call <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32> %292, <8 x i32> %279, <4 x i32> %286, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %294 = extractelement <4 x float> %293, i32 0
>  %295 = fmul float %294, %294
>  %296 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %297 = load <16 x i8>, <16 x i8> addrspace(2)* %296, align 16, !invariant.load !0
>  %298 = call float @llvm.SI.load.const(<16 x i8> %297, i32 48)
>  %299 = fmul float %298, %295
>  %300 = call float @llvm.SI.load.const(<16 x i8> %297, i32 52)
>  %301 = fmul float %300, %295
>  %302 = call float @llvm.SI.load.const(<16 x i8> %297, i32 56)
>  %303 = fmul float %302, %295
>  %304 = fmul float %277, %299
>  %305 = fmul float %277, %301
>  %306 = fmul float %277, %303
>  %307 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 2, !amdgpu.uniform !0
>  %308 = load <8 x i32>, <8 x i32> addrspace(2)* %307, align 32, !invariant.load !0
>  %309 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %310 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %309, i64 0, i64 7, !amdgpu.uniform !0
>  %311 = load <4 x i32>, <4 x i32> addrspace(2)* %310, align 16, !invariant.load !0
>  %312 = extractelement <8 x i32> %308, i32 7
>  %313 = extractelement <4 x i32> %311, i32 0
>  %314 = and i32 %313, %312
>  %315 = insertelement <4 x i32> %311, i32 %314, i32 0
>  %316 = call float @llvm.amdgcn.cubetc(float %60, float %62, float %64)
>  %317 = call float @llvm.amdgcn.cubesc(float %60, float %62, float %64)
>  %318 = call float @llvm.amdgcn.cubema(float %60, float %62, float %64)
>  %319 = call float @llvm.amdgcn.cubeid(float %60, float %62, float %64)
>  %320 = call float @llvm.fabs.f32(float %318)
>  %321 = fdiv float 1.000000e+00, %320, !fpmath !1
>  %322 = fmul float %316, %321
>  %323 = fadd float %322, 1.500000e+00
>  %324 = fmul float %317, %321
>  %325 = fadd float %324, 1.500000e+00
>  %326 = bitcast float %325 to i32
>  %327 = bitcast float %323 to i32
>  %328 = bitcast float %319 to i32
>  %329 = insertelement <4 x i32> undef, i32 %326, i32 0
>  %330 = insertelement <4 x i32> %329, i32 %327, i32 1
>  %331 = insertelement <4 x i32> %330, i32 %328, i32 2
>  %332 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %331, <8 x i32> %308, <4 x i32> %315, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %333 = extractelement <4 x float> %332, i32 0
>  %334 = extractelement <4 x float> %332, i32 1
>  %335 = extractelement <4 x float> %332, i32 2
>  %336 = extractelement <4 x float> %332, i32 3
>  %337 = fmul float %60, %43
>  %338 = fmul float %62, %44
>  %339 = fadd float %338, %337
>  %340 = fmul float %64, %45
>  %341 = fadd float %339, %340
>  %342 = fmul float %341, %60
>  %343 = fmul float %341, %62
>  %344 = fmul float %341, %64
>  %345 = fmul float %342, 2.000000e+00
>  %346 = fsub float %345, %43
>  %347 = fmul float %343, 2.000000e+00
>  %348 = fsub float %347, %44
>  %349 = fmul float %344, 2.000000e+00
>  %350 = fsub float %349, %45
>  %351 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %352 = load <16 x i8>, <16 x i8> addrspace(2)* %351, align 16, !invariant.load !0
>  %353 = call float @llvm.SI.load.const(<16 x i8> %352, i32 324)
>  %354 = fsub float 1.000000e+00, %353
>  %355 = fmul float %354, 6.000000e+00
>  %356 = call float @llvm.SI.load.const(<16 x i8> %352, i32 288)
>  %357 = call float @llvm.SI.load.const(<16 x i8> %352, i32 292)
>  %358 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %359 = load <16 x i8>, <16 x i8> addrspace(2)* %358, align 16, !invariant.load !0
>  %360 = call float @llvm.SI.load.const(<16 x i8> %359, i32 296)
>  %361 = fmul float %356, 0x3FD55553E0000000
>  %362 = fmul float %357, 0x3FD55553E0000000
>  %363 = fadd float %362, %361
>  %364 = fmul float %360, 0x3FD55553E0000000
>  %365 = fadd float %363, %364
>  %366 = fsub float 1.000000e+00, %365
>  %367 = call float @llvm.AMDGPU.clamp.(float %366, float 0.000000e+00, float 1.000000e+00)
>  %368 = fmul float %333, %336
>  %369 = fmul float %334, %336
>  %370 = fmul float %335, %336
>  %371 = fmul float %368, 4.000000e+00
>  %372 = fmul float %369, 4.000000e+00
>  %373 = fmul float %370, 4.000000e+00
>  %374 = fmul float %367, %371
>  %375 = fmul float %367, %372
>  %376 = fmul float %367, %373
>  %377 = fsub float 1.000000e+00, %365
>  %378 = call float @llvm.AMDGPU.clamp.(float %377, float 0.000000e+00, float 1.000000e+00)
>  %379 = fmul float %304, %378
>  %380 = fmul float %305, %378
>  %381 = fmul float %306, %378
>  %382 = fmul float %374, %190
>  %383 = fadd float %382, %379
>  %384 = fmul float %375, %190
>  %385 = fadd float %384, %380
>  %386 = fmul float %376, %190
>  %387 = fadd float %386, %381
>  %388 = fmul float %43, %60
>  %389 = fmul float %44, %62
>  %390 = fadd float %389, %388
>  %391 = fmul float %45, %64
>  %392 = fadd float %390, %391
>  %393 = call float @llvm.AMDGPU.clamp.(float %392, float 0.000000e+00, float 1.000000e+00)
>  %394 = fsub float 1.000000e+00, %393
>  %395 = call float @llvm.pow.f32(float %394, float 5.000000e+00)
>  %396 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %397 = load <16 x i8>, <16 x i8> addrspace(2)* %396, align 16, !invariant.load !0
>  %398 = call float @llvm.SI.load.const(<16 x i8> %397, i32 324)
>  %399 = call float @llvm.SI.load.const(<16 x i8> %397, i32 288)
>  %400 = call float @llvm.maxnum.f32(float %398, float %399)
>  %401 = call float @llvm.SI.load.const(<16 x i8> %397, i32 324)
>  %402 = call float @llvm.SI.load.const(<16 x i8> %397, i32 292)
>  %403 = call float @llvm.maxnum.f32(float %401, float %402)
>  %404 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %405 = load <16 x i8>, <16 x i8> addrspace(2)* %404, align 16, !invariant.load !0
>  %406 = call float @llvm.SI.load.const(<16 x i8> %405, i32 324)
>  %407 = call float @llvm.SI.load.const(<16 x i8> %405, i32 296)
>  %408 = call float @llvm.maxnum.f32(float %406, float %407)
>  %409 = call float @llvm.SI.load.const(<16 x i8> %405, i32 288)
>  %410 = fsub float %400, %409
>  %411 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %412 = load <16 x i8>, <16 x i8> addrspace(2)* %411, align 16, !invariant.load !0
>  %413 = call float @llvm.SI.load.const(<16 x i8> %412, i32 292)
>  %414 = fsub float %403, %413
>  %415 = call float @llvm.SI.load.const(<16 x i8> %412, i32 296)
>  %416 = fsub float %408, %415
>  %417 = call float @llvm.SI.load.const(<16 x i8> %412, i32 288)
>  %418 = fmul float %395, %410
>  %419 = fadd float %418, %417
>  %420 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %421 = load <16 x i8>, <16 x i8> addrspace(2)* %420, align 16, !invariant.load !0
>  %422 = call float @llvm.SI.load.const(<16 x i8> %421, i32 292)
>  %423 = fmul float %395, %414
>  %424 = fadd float %423, %422
>  %425 = call float @llvm.SI.load.const(<16 x i8> %421, i32 296)
>  %426 = fmul float %395, %416
>  %427 = fadd float %426, %425
>  %428 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 4, !amdgpu.uniform !0
>  %429 = load <8 x i32>, <8 x i32> addrspace(2)* %428, align 32, !invariant.load !0
>  %430 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %431 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %430, i64 0, i64 11, !amdgpu.uniform !0
>  %432 = load <4 x i32>, <4 x i32> addrspace(2)* %431, align 16, !invariant.load !0
>  %433 = extractelement <8 x i32> %429, i32 7
>  %434 = extractelement <4 x i32> %432, i32 0
>  %435 = and i32 %434, %433
>  %436 = insertelement <4 x i32> %432, i32 %435, i32 0
>  %437 = call float @llvm.amdgcn.cubetc(float %346, float %348, float %350)
>  %438 = call float @llvm.amdgcn.cubesc(float %346, float %348, float %350)
>  %439 = call float @llvm.amdgcn.cubema(float %346, float %348, float %350)
>  %440 = call float @llvm.amdgcn.cubeid(float %346, float %348, float %350)
>  %441 = call float @llvm.fabs.f32(float %439)
>  %442 = fdiv float 1.000000e+00, %441, !fpmath !1
>  %443 = fmul float %437, %442
>  %444 = fadd float %443, 1.500000e+00
>  %445 = fmul float %438, %442
>  %446 = fadd float %445, 1.500000e+00
>  %447 = bitcast float %446 to i32
>  %448 = bitcast float %444 to i32
>  %449 = bitcast float %440 to i32
>  %450 = bitcast float %355 to i32
>  %451 = insertelement <4 x i32> undef, i32 %447, i32 0
>  %452 = insertelement <4 x i32> %451, i32 %448, i32 1
>  %453 = insertelement <4 x i32> %452, i32 %449, i32 2
>  %454 = insertelement <4 x i32> %453, i32 %450, i32 3
>  %455 = call <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32> %454, <8 x i32> %429, <4 x i32> %436, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %456 = extractelement <4 x float> %455, i32 0
>  %457 = extractelement <4 x float> %455, i32 1
>  %458 = extractelement <4 x float> %455, i32 2
>  %459 = fmul float %269, %249
>  %460 = fmul float %270, %253
>  %461 = fadd float %460, %459
>  %462 = fmul float %271, %255
>  %463 = fadd float %461, %462
>  %464 = call float @llvm.AMDGPU.clamp.(float %463, float 0.000000e+00, float 1.000000e+00)
>  %465 = fsub float 1.000000e+00, %464
>  %466 = call float @llvm.pow.f32(float %465, float 5.000000e+00)
>  %467 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %468 = load <16 x i8>, <16 x i8> addrspace(2)* %467, align 16, !invariant.load !0
>  %469 = call float @llvm.SI.load.const(<16 x i8> %468, i32 288)
>  %470 = fsub float 1.000000e+00, %469
>  %471 = call float @llvm.SI.load.const(<16 x i8> %468, i32 292)
>  %472 = fsub float 1.000000e+00, %471
>  %473 = call float @llvm.SI.load.const(<16 x i8> %468, i32 296)
>  %474 = fsub float 1.000000e+00, %473
>  %475 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %476 = load <16 x i8>, <16 x i8> addrspace(2)* %475, align 16, !invariant.load !0
>  %477 = call float @llvm.SI.load.const(<16 x i8> %476, i32 288)
>  %478 = fmul float %466, %470
>  %479 = fadd float %478, %477
>  %480 = call float @llvm.SI.load.const(<16 x i8> %476, i32 292)
>  %481 = fmul float %466, %472
>  %482 = fadd float %481, %480
>  %483 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %484 = load <16 x i8>, <16 x i8> addrspace(2)* %483, align 16, !invariant.load !0
>  %485 = call float @llvm.SI.load.const(<16 x i8> %484, i32 296)
>  %486 = fmul float %466, %474
>  %487 = fadd float %486, %485
>  %488 = fmul float %304, %479
>  %489 = fmul float %305, %482
>  %490 = fmul float %306, %487
>  %491 = fadd float %247, 2.000000e+00
>  %492 = fmul float %491, 2.500000e-01
>  %493 = fmul float %247, -5.000000e-01
>  %494 = call float @llvm.exp2.f32(float %493)
>  %495 = fsub float 2.000000e+00, %494
>  %496 = fdiv float 1.000000e+00, %495, !fpmath !1
>  %497 = fmul float %492, %496
>  %498 = fmul float %488, %497
>  %499 = fmul float %489, %497
>  %500 = fmul float %490, %497
>  %501 = fmul float %60, %269
>  %502 = fmul float %62, %270
>  %503 = fadd float %502, %501
>  %504 = fmul float %64, %271
>  %505 = fadd float %503, %504
>  %506 = call float @llvm.AMDGPU.clamp.(float %505, float 0.000000e+00, float 1.000000e+00)
>  %507 = call float @llvm.pow.f32(float %506, float %247)
>  %508 = fmul float %498, %507
>  %509 = fmul float %499, %507
>  %510 = fmul float %500, %507
>  %511 = fmul float %43, %60
>  %512 = fmul float %44, %62
>  %513 = fadd float %512, %511
>  %514 = fmul float %45, %64
>  %515 = fadd float %513, %514
>  %516 = call float @llvm.AMDGPU.clamp.(float %515, float 0.000000e+00, float 1.000000e+00)
>  %517 = call float @llvm.maxnum.f32(float %277, float %516)
>  %518 = fadd float %517, 0x3EE4F8B580000000
>  %519 = fdiv float 1.000000e+00, %518, !fpmath !1
>  %520 = fmul float %508, %519
>  %521 = fmul float %509, %519
>  %522 = fmul float %510, %519
>  %523 = fmul float %419, %456
>  %524 = fadd float %523, %520
>  %525 = fmul float %424, %457
>  %526 = fadd float %525, %521
>  %527 = fmul float %427, %458
>  %528 = fadd float %527, %522
>  %529 = fmul float %524, %192
>  %530 = fmul float %526, %192
>  %531 = fmul float %528, %192
>  %532 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %533 = load <16 x i8>, <16 x i8> addrspace(2)* %532, align 16, !invariant.load !0
>  %534 = call float @llvm.SI.load.const(<16 x i8> %533, i32 176)
>  %535 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %536 = fsub float %534, %535
>  %537 = call float @llvm.SI.load.const(<16 x i8> %533, i32 180)
>  %538 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %539 = fsub float %537, %538
>  %540 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %541 = load <16 x i8>, <16 x i8> addrspace(2)* %540, align 16, !invariant.load !0
>  %542 = call float @llvm.SI.load.const(<16 x i8> %541, i32 184)
>  %543 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %544 = fsub float %542, %543
>  %545 = fmul float %536, %536
>  %546 = fmul float %539, %539
>  %547 = fadd float %546, %545
>  %548 = fmul float %544, %544
>  %549 = fadd float %547, %548
>  %550 = call float @llvm.sqrt.f32(float %549)
>  %551 = fdiv float 1.000000e+00, %550, !fpmath !1
>  %552 = fmul float %536, %551
>  %553 = fmul float %539, %551
>  %554 = fmul float %544, %551
>  %555 = fadd float %552, %43
>  %556 = fadd float %553, %44
>  %557 = fadd float %554, %45
>  %558 = fmul float %555, 5.000000e-01
>  %559 = fmul float %556, 5.000000e-01
>  %560 = fmul float %557, 5.000000e-01
>  %561 = fmul float %558, %558
>  %562 = fmul float %559, %559
>  %563 = fadd float %562, %561
>  %564 = fmul float %560, %560
>  %565 = fadd float %563, %564
>  %566 = call float @llvm.sqrt.f32(float %565)
>  %567 = fdiv float 1.000000e+00, %566, !fpmath !1
>  %568 = fmul float %558, %567
>  %569 = fmul float %559, %567
>  %570 = fmul float %560, %567
>  %571 = fmul float %552, %60
>  %572 = fmul float %553, %62
>  %573 = fadd float %572, %571
>  %574 = fmul float %554, %64
>  %575 = fadd float %573, %574
>  %576 = call float @llvm.AMDGPU.clamp.(float %575, float 0.000000e+00, float 1.000000e+00)
>  %577 = fmul float %549, %551
>  %578 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %579 = load <16 x i8>, <16 x i8> addrspace(2)* %578, align 16, !invariant.load !0
>  %580 = call float @llvm.SI.load.const(<16 x i8> %579, i32 188)
>  %581 = fmul float %577, %580
>  %582 = call float @llvm.AMDGPU.clamp.(float %581, float 0.000000e+00, float 1.000000e+00)
>  %583 = fsub float 1.000000e+00, %582
>  %584 = call float @llvm.SI.load.const(<16 x i8> %579, i32 192)
>  %585 = fmul float %584, %583
>  %586 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %587 = load <16 x i8>, <16 x i8> addrspace(2)* %586, align 16, !invariant.load !0
>  %588 = call float @llvm.SI.load.const(<16 x i8> %587, i32 196)
>  %589 = fmul float %588, %583
>  %590 = call float @llvm.SI.load.const(<16 x i8> %587, i32 200)
>  %591 = fmul float %590, %583
>  %592 = fmul float %576, %585
>  %593 = fmul float %576, %589
>  %594 = fmul float %576, %591
>  %595 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %596 = load <16 x i8>, <16 x i8> addrspace(2)* %595, align 16, !invariant.load !0
>  %597 = call float @llvm.SI.load.const(<16 x i8> %596, i32 288)
>  %598 = call float @llvm.SI.load.const(<16 x i8> %596, i32 292)
>  %599 = call float @llvm.SI.load.const(<16 x i8> %596, i32 296)
>  %600 = fmul float %597, 0x3FD55553E0000000
>  %601 = fmul float %598, 0x3FD55553E0000000
>  %602 = fadd float %601, %600
>  %603 = fmul float %599, 0x3FD55553E0000000
>  %604 = fadd float %602, %603
>  %605 = fsub float 1.000000e+00, %604
>  %606 = call float @llvm.AMDGPU.clamp.(float %605, float 0.000000e+00, float 1.000000e+00)
>  %607 = fmul float %592, %606
>  %608 = fadd float %607, %383
>  %609 = fmul float %593, %606
>  %610 = fadd float %609, %385
>  %611 = fmul float %594, %606
>  %612 = fadd float %611, %387
>  %613 = fmul float %552, %568
>  %614 = fmul float %553, %569
>  %615 = fadd float %614, %613
>  %616 = fmul float %554, %570
>  %617 = fadd float %615, %616
>  %618 = call float @llvm.AMDGPU.clamp.(float %617, float 0.000000e+00, float 1.000000e+00)
>  %619 = fsub float 1.000000e+00, %618
>  %620 = call float @llvm.pow.f32(float %619, float 5.000000e+00)
>  %621 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %622 = load <16 x i8>, <16 x i8> addrspace(2)* %621, align 16, !invariant.load !0
>  %623 = call float @llvm.SI.load.const(<16 x i8> %622, i32 288)
>  %624 = fsub float 1.000000e+00, %623
>  %625 = call float @llvm.SI.load.const(<16 x i8> %622, i32 292)
>  %626 = fsub float 1.000000e+00, %625
>  %627 = call float @llvm.SI.load.const(<16 x i8> %622, i32 296)
>  %628 = fsub float 1.000000e+00, %627
>  %629 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %630 = load <16 x i8>, <16 x i8> addrspace(2)* %629, align 16, !invariant.load !0
>  %631 = call float @llvm.SI.load.const(<16 x i8> %630, i32 288)
>  %632 = fmul float %620, %624
>  %633 = fadd float %632, %631
>  %634 = call float @llvm.SI.load.const(<16 x i8> %630, i32 292)
>  %635 = fmul float %620, %626
>  %636 = fadd float %635, %634
>  %637 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %638 = load <16 x i8>, <16 x i8> addrspace(2)* %637, align 16, !invariant.load !0
>  %639 = call float @llvm.SI.load.const(<16 x i8> %638, i32 296)
>  %640 = fmul float %620, %628
>  %641 = fadd float %640, %639
>  %642 = fmul float %592, %633
>  %643 = fmul float %593, %636
>  %644 = fmul float %594, %641
>  %645 = fadd float %247, 2.000000e+00
>  %646 = fmul float %645, 2.500000e-01
>  %647 = fmul float %247, -5.000000e-01
>  %648 = call float @llvm.exp2.f32(float %647)
>  %649 = fsub float 2.000000e+00, %648
>  %650 = fdiv float 1.000000e+00, %649, !fpmath !1
>  %651 = fmul float %646, %650
>  %652 = fmul float %642, %651
>  %653 = fmul float %643, %651
>  %654 = fmul float %644, %651
>  %655 = fmul float %60, %568
>  %656 = fmul float %62, %569
>  %657 = fadd float %656, %655
>  %658 = fmul float %64, %570
>  %659 = fadd float %657, %658
>  %660 = call float @llvm.AMDGPU.clamp.(float %659, float 0.000000e+00, float 1.000000e+00)
>  %661 = call float @llvm.pow.f32(float %660, float %247)
>  %662 = fmul float %652, %661
>  %663 = fmul float %653, %661
>  %664 = fmul float %654, %661
>  %665 = fmul float %43, %60
>  %666 = fmul float %44, %62
>  %667 = fadd float %666, %665
>  %668 = fmul float %45, %64
>  %669 = fadd float %667, %668
>  %670 = call float @llvm.AMDGPU.clamp.(float %669, float 0.000000e+00, float 1.000000e+00)
>  %671 = call float @llvm.maxnum.f32(float %576, float %670)
>  %672 = fadd float %671, 0x3EE4F8B580000000
>  %673 = fdiv float 1.000000e+00, %672, !fpmath !1
>  %674 = fmul float %662, %673
>  %675 = fmul float %663, %673
>  %676 = fmul float %664, %673
>  %677 = fmul float %674, %95
>  %678 = fadd float %677, %529
>  %679 = fmul float %675, %95
>  %680 = fadd float %679, %530
>  %681 = fmul float %676, %95
>  %682 = fadd float %681, %531
>  %683 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %684 = load <16 x i8>, <16 x i8> addrspace(2)* %683, align 16, !invariant.load !0
>  %685 = call float @llvm.SI.load.const(<16 x i8> %684, i32 208)
>  %686 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %6, <2 x i32> %8)
>  %687 = fsub float %685, %686
>  %688 = call float @llvm.SI.load.const(<16 x i8> %684, i32 212)
>  %689 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %690 = fsub float %688, %689
>  %691 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %692 = load <16 x i8>, <16 x i8> addrspace(2)* %691, align 16, !invariant.load !0
>  %693 = call float @llvm.SI.load.const(<16 x i8> %692, i32 216)
>  %694 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %6, <2 x i32> %8)
>  %695 = fsub float %693, %694
>  %696 = fmul float %687, %687
>  %697 = fmul float %690, %690
>  %698 = fadd float %697, %696
>  %699 = fmul float %695, %695
>  %700 = fadd float %698, %699
>  %701 = call float @llvm.sqrt.f32(float %700)
>  %702 = fdiv float 1.000000e+00, %701, !fpmath !1
>  %703 = fmul float %687, %702
>  %704 = fmul float %690, %702
>  %705 = fmul float %695, %702
>  %706 = fadd float %703, %43
>  %707 = fadd float %704, %44
>  %708 = fadd float %705, %45
>  %709 = fmul float %706, 5.000000e-01
>  %710 = fmul float %707, 5.000000e-01
>  %711 = fmul float %708, 5.000000e-01
>  %712 = fmul float %709, %709
>  %713 = fmul float %710, %710
>  %714 = fadd float %713, %712
>  %715 = fmul float %711, %711
>  %716 = fadd float %714, %715
>  %717 = call float @llvm.sqrt.f32(float %716)
>  %718 = fdiv float 1.000000e+00, %717, !fpmath !1
>  %719 = fmul float %709, %718
>  %720 = fmul float %710, %718
>  %721 = fmul float %711, %718
>  %722 = fmul float %703, %60
>  %723 = fmul float %704, %62
>  %724 = fadd float %723, %722
>  %725 = fmul float %705, %64
>  %726 = fadd float %724, %725
>  %727 = call float @llvm.AMDGPU.clamp.(float %726, float 0.000000e+00, float 1.000000e+00)
>  %728 = fmul float %700, %702
>  %729 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %730 = load <16 x i8>, <16 x i8> addrspace(2)* %729, align 16, !invariant.load !0
>  %731 = call float @llvm.SI.load.const(<16 x i8> %730, i32 220)
>  %732 = fmul float %728, %731
>  %733 = call float @llvm.AMDGPU.clamp.(float %732, float 0.000000e+00, float 1.000000e+00)
>  %734 = fsub float 1.000000e+00, %733
>  %735 = call float @llvm.SI.load.const(<16 x i8> %730, i32 224)
>  %736 = fmul float %735, %734
>  %737 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %738 = load <16 x i8>, <16 x i8> addrspace(2)* %737, align 16, !invariant.load !0
>  %739 = call float @llvm.SI.load.const(<16 x i8> %738, i32 228)
>  %740 = fmul float %739, %734
>  %741 = call float @llvm.SI.load.const(<16 x i8> %738, i32 232)
>  %742 = fmul float %741, %734
>  %743 = fmul float %727, %736
>  %744 = fmul float %727, %740
>  %745 = fmul float %727, %742
>  %746 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %747 = load <16 x i8>, <16 x i8> addrspace(2)* %746, align 16, !invariant.load !0
>  %748 = call float @llvm.SI.load.const(<16 x i8> %747, i32 288)
>  %749 = call float @llvm.SI.load.const(<16 x i8> %747, i32 292)
>  %750 = call float @llvm.SI.load.const(<16 x i8> %747, i32 296)
>  %751 = fmul float %748, 0x3FD55553E0000000
>  %752 = fmul float %749, 0x3FD55553E0000000
>  %753 = fadd float %752, %751
>  %754 = fmul float %750, 0x3FD55553E0000000
>  %755 = fadd float %753, %754
>  %756 = fsub float 1.000000e+00, %755
>  %757 = call float @llvm.AMDGPU.clamp.(float %756, float 0.000000e+00, float 1.000000e+00)
>  %758 = fmul float %743, %757
>  %759 = fadd float %758, %608
>  %760 = fmul float %744, %757
>  %761 = fadd float %760, %610
>  %762 = fmul float %745, %757
>  %763 = fadd float %762, %612
>  %764 = fmul float %703, %719
>  %765 = fmul float %704, %720
>  %766 = fadd float %765, %764
>  %767 = fmul float %705, %721
>  %768 = fadd float %766, %767
>  %769 = call float @llvm.AMDGPU.clamp.(float %768, float 0.000000e+00, float 1.000000e+00)
>  %770 = fsub float 1.000000e+00, %769
>  %771 = call float @llvm.pow.f32(float %770, float 5.000000e+00)
>  %772 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %773 = load <16 x i8>, <16 x i8> addrspace(2)* %772, align 16, !invariant.load !0
>  %774 = call float @llvm.SI.load.const(<16 x i8> %773, i32 288)
>  %775 = fsub float 1.000000e+00, %774
>  %776 = call float @llvm.SI.load.const(<16 x i8> %773, i32 292)
>  %777 = fsub float 1.000000e+00, %776
>  %778 = call float @llvm.SI.load.const(<16 x i8> %773, i32 296)
>  %779 = fsub float 1.000000e+00, %778
>  %780 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %781 = load <16 x i8>, <16 x i8> addrspace(2)* %780, align 16, !invariant.load !0
>  %782 = call float @llvm.SI.load.const(<16 x i8> %781, i32 288)
>  %783 = fmul float %771, %775
>  %784 = fadd float %783, %782
>  %785 = call float @llvm.SI.load.const(<16 x i8> %781, i32 292)
>  %786 = fmul float %771, %777
>  %787 = fadd float %786, %785
>  %788 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %789 = load <16 x i8>, <16 x i8> addrspace(2)* %788, align 16, !invariant.load !0
>  %790 = call float @llvm.SI.load.const(<16 x i8> %789, i32 296)
>  %791 = fmul float %771, %779
>  %792 = fadd float %791, %790
>  %793 = fmul float %743, %784
>  %794 = fmul float %744, %787
>  %795 = fmul float %745, %792
>  %796 = fadd float %247, 2.000000e+00
>  %797 = fmul float %796, 2.500000e-01
>  %798 = fmul float %247, -5.000000e-01
>  %799 = call float @llvm.exp2.f32(float %798)
>  %800 = fsub float 2.000000e+00, %799
>  %801 = fdiv float 1.000000e+00, %800, !fpmath !1
>  %802 = fmul float %797, %801
>  %803 = fmul float %793, %802
>  %804 = fmul float %794, %802
>  %805 = fmul float %795, %802
>  %806 = fmul float %60, %719
>  %807 = fmul float %62, %720
>  %808 = fadd float %807, %806
>  %809 = fmul float %64, %721
>  %810 = fadd float %808, %809
>  %811 = call float @llvm.AMDGPU.clamp.(float %810, float 0.000000e+00, float 1.000000e+00)
>  %812 = call float @llvm.pow.f32(float %811, float %247)
>  %813 = fmul float %803, %812
>  %814 = fmul float %804, %812
>  %815 = fmul float %805, %812
>  %816 = fmul float %43, %60
>  %817 = fmul float %44, %62
>  %818 = fadd float %817, %816
>  %819 = fmul float %45, %64
>  %820 = fadd float %818, %819
>  %821 = call float @llvm.AMDGPU.clamp.(float %820, float 0.000000e+00, float 1.000000e+00)
>  %822 = call float @llvm.maxnum.f32(float %727, float %821)
>  %823 = fadd float %822, 0x3EE4F8B580000000
>  %824 = fdiv float 1.000000e+00, %823, !fpmath !1
>  %825 = fmul float %813, %824
>  %826 = fmul float %814, %824
>  %827 = fmul float %815, %824
>  %828 = fmul float %825, %95
>  %829 = fadd float %828, %678
>  %830 = fmul float %826, %95
>  %831 = fadd float %830, %680
>  %832 = fmul float %827, %95
>  %833 = fadd float %832, %682
>  %834 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %835 = load <16 x i8>, <16 x i8> addrspace(2)* %834, align 16, !invariant.load !0
>  %836 = call float @llvm.SI.load.const(<16 x i8> %835, i32 304)
>  %837 = fmul float %759, %836
>  %838 = fadd float %837, %829
>  %839 = call float @llvm.SI.load.const(<16 x i8> %835, i32 308)
>  %840 = fmul float %761, %839
>  %841 = fadd float %840, %831
>  %842 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %843 = load <16 x i8>, <16 x i8> addrspace(2)* %842, align 16, !invariant.load !0
>  %844 = call float @llvm.SI.load.const(<16 x i8> %843, i32 312)
>  %845 = fmul float %763, %844
>  %846 = fadd float %845, %833
>  %847 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %6, <2 x i32> %8)
>  %848 = call float @llvm.SI.load.const(<16 x i8> %843, i32 12)
>  %849 = fsub float %847, %848
>  %850 = call float @llvm.maxnum.f32(float %849, float 0.000000e+00)
>  %851 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %852 = load <16 x i8>, <16 x i8> addrspace(2)* %851, align 16, !invariant.load !0
>  %853 = call float @llvm.SI.load.const(<16 x i8> %852, i32 28)
>  %854 = call float @llvm.SI.load.const(<16 x i8> %852, i32 12)
>  %855 = fsub float %853, %854
>  %856 = fadd float %855, 0x3F50624DE0000000
>  %857 = fdiv float 1.000000e+00, %856, !fpmath !1
>  %858 = fmul float %850, %857
>  %859 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %860 = load <16 x i8>, <16 x i8> addrspace(2)* %859, align 16, !invariant.load !0
>  %861 = call float @llvm.SI.load.const(<16 x i8> %860, i32 28)
>  %862 = call float @llvm.floor.f32(float %861)
>  %863 = fsub float %861, %862
>  %864 = fmul float %863, 8.000000e+00
>  %865 = call float @llvm.pow.f32(float %858, float %864)
>  %866 = call float @llvm.AMDGPU.clamp.(float %865, float 0.000000e+00, float 1.000000e+00)
>  %867 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %6, <2 x i32> %8)
>  %868 = fmul float %867, %866
>  %869 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %870 = load <16 x i8>, <16 x i8> addrspace(2)* %869, align 16, !invariant.load !0
>  %871 = call float @llvm.SI.load.const(<16 x i8> %870, i32 32)
>  %872 = fsub float 1.000000e+00, %868
>  %873 = fmul float %838, %868
>  %874 = fmul float %871, %872
>  %875 = fadd float %873, %874
>  %876 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %877 = load <16 x i8>, <16 x i8> addrspace(2)* %876, align 16, !invariant.load !0
>  %878 = call float @llvm.SI.load.const(<16 x i8> %877, i32 36)
>  %879 = fsub float 1.000000e+00, %868
>  %880 = fmul float %841, %868
>  %881 = fmul float %878, %879
>  %882 = fadd float %880, %881
>  %883 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %884 = load <16 x i8>, <16 x i8> addrspace(2)* %883, align 16, !invariant.load !0
>  %885 = call float @llvm.SI.load.const(<16 x i8> %884, i32 40)
>  %886 = fsub float 1.000000e+00, %868
>  %887 = fmul float %846, %868
>  %888 = fmul float %885, %886
>  %889 = fadd float %887, %888
>  %890 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %891 = load <16 x i8>, <16 x i8> addrspace(2)* %890, align 16, !invariant.load !0
>  %892 = call float @llvm.SI.load.const(<16 x i8> %891, i32 320)
>  %893 = bitcast float %5 to i32
>  %894 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %893, 10
>  %895 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %894, float %875, 11
>  %896 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %895, float %882, 12
>  %897 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %896, float %889, 13
>  %898 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %897, float %892, 14
>  %899 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %898, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %899
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.sqrt.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.AMDGPU.clamp.(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.exp2.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.c.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubetc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubesc(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubema(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.amdgcn.cubeid(float, float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.pow.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.maxnum.f32(float, float) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.l.v4i32(<4 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.floor.f32(float) #1
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>
>!0 = !{}
>!1 = !{float 2.500000e+00}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[8:11], v4, s[4:7], 0 idxen    ; E00C2000 80010804
>	buffer_load_format_xyzw v[15:18], v5, s[12:15], 0 idxen ; E00C2000 80030F05
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v12, s4                                   ; 7E180204
>	v_mov_b32_e32 v13, s5                                   ; 7E1A0205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v3, s4                                    ; 7E060204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v0, s6                                    ; 7E000206
>	v_sub_f32_e32 v20, s7, v12                              ; 08281807
>	v_mov_b32_e32 v4, s8                                    ; 7E080208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v5, s4                                    ; 7E0A0204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v21, s6, v13                              ; 082A1A06
>	v_mov_b32_e32 v7, s7                                    ; 7E0E0207
>	v_mov_b32_e32 v18, s8                                   ; 7E240208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v19, s4                                   ; 7E260204
>	v_sub_f32_e32 v22, s5, v14                              ; 082C1C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[27:30], v7, s[4:7], 0 idxen   ; E00C2000 80011B07
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v27                               ; 7E00111B
>	v_mul_lo_i32 v19, v0, 48                                ; D2D60013 00016100
>	v_add_i32_e32 v0, vcc, s14, v19                         ; 4A00260E
>	v_add_i32_e32 v4, vcc, s13, v19                         ; 4A08260D
>	v_add_i32_e32 v5, vcc, s15, v19                         ; 4A0A260F
>	v_add_i32_e32 v1, vcc, s12, v19                         ; 4A02260C
>	buffer_load_dword v3, v0, s[0:3], 0 offen               ; E0301000 80000300
>	buffer_load_dword v0, v4, s[0:3], 0 offen               ; E0301000 80000004
>	buffer_load_dword v4, v5, s[0:3], 0 offen               ; E0301000 80000405
>	buffer_load_dword v1, v1, s[0:3], 0 offen               ; E0301000 80000101
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v12, v4                           ; 0A28090C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v5, vcc, 0x8c, v19                        ; 4A0A26FF 0000008C
>	v_add_i32_e32 v21, vcc, 0x9c, v19                       ; 4A2A26FF 0000009C
>	v_add_i32_e32 v6, vcc, 0x84, v19                        ; 4A0C26FF 00000084
>	v_add_i32_e32 v7, vcc, 0x88, v19                        ; 4A0E26FF 00000088
>	v_add_i32_e32 v4, vcc, 0x80, v19                        ; 4A0826FF 00000080
>	v_add_i32_e32 v18, vcc, 0x94, v19                       ; 4A2426FF 00000094
>	buffer_load_dword v22, v5, s[0:3], 0 offen              ; E0301000 80001605
>	buffer_load_dword v5, v6, s[0:3], 0 offen               ; E0301000 80000506
>	buffer_load_dword v6, v7, s[0:3], 0 offen               ; E0301000 80000607
>	v_add_i32_e32 v7, vcc, 0x90, v19                        ; 4A0E26FF 00000090
>	v_add_i32_e32 v19, vcc, 0x98, v19                       ; 4A2626FF 00000098
>	buffer_load_dword v23, v21, s[0:3], 0 offen             ; E0301000 80001715
>	buffer_load_dword v4, v4, s[0:3], 0 offen               ; E0301000 80000404
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v21, v13, v22                          ; 0A2A2D0D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v22, v14, v23                          ; 0A2C2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                    ; C0820B08
>	v_cvt_i32_f32_e32 v4, v28                               ; 7E08111C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[23:26], v6, s[4:7], 0 idxen   ; E00C2000 80011706
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	v_add_i32_e32 v5, vcc, s10, v19                         ; 4A0A260A
>	v_add_i32_e32 v6, vcc, s9, v19                          ; 4A0C2609
>	v_add_i32_e32 v7, vcc, s8, v19                          ; 4A0E2608
>	v_add_i32_e32 v18, vcc, s4, v19                         ; 4A242604
>	v_mul_lo_i32 v27, v4, 48                                ; D2D6001B 00016104
>	v_add_i32_e32 v4, vcc, s11, v19                         ; 4A08260B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v22, vcc, s6, v19                         ; 4A2C2606
>	buffer_load_dword v21, v4, s[0:3], 0 offen              ; E0301000 80001504
>	v_add_i32_e32 v4, vcc, s7, v19                          ; 4A082607
>	v_add_i32_e32 v19, vcc, s5, v19                         ; 4A262605
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	buffer_load_dword v28, v4, s[0:3], 0 offen              ; E0301000 80001C04
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v3, v23, v3                               ; 10060717
>	v_mul_f32_e32 v1, v23, v1                               ; 10020317
>	v_mul_f32_e32 v0, v23, v0                               ; 10000117
>	v_mul_f32_e32 v20, v23, v20                             ; 10282917
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v31, v14, v18                          ; 0A3E250E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v4, v23, v5                               ; 10080B17
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v5, v23, v6                               ; 100A0D17
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v6, v23, v7                               ; 100C0F17
>	v_subrev_f32_e32 v7, v13, v21                           ; 0A0E2B0D
>	v_mul_f32_e32 v21, v23, v7                              ; 102A0F17
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v18, v23, v22                             ; 10242D17
>	v_mul_f32_e32 v7, v23, v28                              ; 100E3917
>	v_mul_f32_e32 v19, v23, v19                             ; 10262717
>	v_mul_f32_e32 v22, v23, v31                             ; 102C3F17
>	v_add_i32_e32 v23, vcc, s15, v27                        ; 4A2E360F
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v12, v23                          ; 0A2E2F0C
>	v_mac_f32_e32 v20, v24, v23                             ; 3E282F18
>	v_add_i32_e32 v23, vcc, s11, v27                        ; 4A2E360B
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v13, v23                          ; 0A2E2F0D
>	v_mac_f32_e32 v21, v24, v23                             ; 3E2A2F18
>	v_add_i32_e32 v23, vcc, s14, v27                        ; 4A2E360E
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v24, v23                              ; 3E062F18
>	v_add_i32_e32 v23, vcc, s12, v27                        ; 4A2E360C
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v24, v23                              ; 3E022F18
>	v_add_i32_e32 v23, vcc, s13, v27                        ; 4A2E360D
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v24, v23                              ; 3E002F18
>	v_add_i32_e32 v23, vcc, s10, v27                        ; 4A2E360A
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v24, v23                              ; 3E082F18
>	v_add_i32_e32 v23, vcc, s9, v27                         ; 4A2E3609
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v24, v23                              ; 3E0A2F18
>	v_add_i32_e32 v23, vcc, s8, v27                         ; 4A2E3608
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v24, v23                              ; 3E0C2F18
>	v_add_i32_e32 v23, vcc, s7, v27                         ; 4A2E3607
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v24, v23                              ; 3E0E2F18
>	v_add_i32_e32 v23, vcc, s6, v27                         ; 4A2E3606
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v24, v23                             ; 3E242F18
>	v_add_i32_e32 v23, vcc, s5, v27                         ; 4A2E3605
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v24, v23                             ; 3E262F18
>	v_add_i32_e32 v23, vcc, s4, v27                         ; 4A2E3604
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	v_mac_f32_e32 v22, v24, v23                             ; 3E2C2F18
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v29                              ; 7E2E111D
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0x70, v23                       ; 4A302EFF 00000070
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v25, v24                              ; 3E063119
>	v_add_i32_e32 v24, vcc, 0x7c, v23                       ; 4A302EFF 0000007C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v12, v24                          ; 0A30310C
>	v_mac_f32_e32 v20, v25, v24                             ; 3E283119
>	v_add_i32_e32 v24, vcc, s11, v23                        ; 4A302E0B
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v13, v24                          ; 0A30310D
>	v_mac_f32_e32 v21, v25, v24                             ; 3E2A3119
>	v_add_i32_e32 v24, vcc, 0x74, v23                       ; 4A302EFF 00000074
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v25, v24                              ; 3E023119
>	v_add_i32_e32 v24, vcc, 0x78, v23                       ; 4A302EFF 00000078
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v25, v24                              ; 3E003119
>	v_add_i32_e32 v24, vcc, s10, v23                        ; 4A302E0A
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v25, v24                              ; 3E083119
>	v_add_i32_e32 v24, vcc, s9, v23                         ; 4A302E09
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v25, v24                              ; 3E0A3119
>	v_add_i32_e32 v24, vcc, s8, v23                         ; 4A302E08
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v25, v24                              ; 3E0C3119
>	v_add_i32_e32 v24, vcc, s7, v23                         ; 4A302E07
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v25, v24                              ; 3E0E3119
>	v_add_i32_e32 v24, vcc, s6, v23                         ; 4A302E06
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v25, v24                             ; 3E243119
>	v_add_i32_e32 v24, vcc, s5, v23                         ; 4A302E05
>	v_add_i32_e32 v23, vcc, s4, v23                         ; 4A2E2E04
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v25, v24                             ; 3E263119
>	v_mac_f32_e32 v22, v25, v23                             ; 3E2C2F19
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v23, v30                              ; 7E2E111E
>	v_mul_lo_i32 v23, v23, 48                               ; D2D60017 00016117
>	v_add_i32_e32 v24, vcc, 0x70, v23                       ; 4A302EFF 00000070
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v3, v26, v24                              ; 3E06311A
>	v_add_i32_e32 v24, vcc, 0x7c, v23                       ; 4A302EFF 0000007C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v12, v24                          ; 0A30310C
>	v_mac_f32_e32 v20, v26, v24                             ; 3E28311A
>	v_add_i32_e32 v24, vcc, 0x8c, v23                       ; 4A302EFF 0000008C
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v24, v13, v24                          ; 0A30310D
>	v_mac_f32_e32 v21, v26, v24                             ; 3E2A311A
>	v_add_i32_e32 v24, vcc, 0x74, v23                       ; 4A302EFF 00000074
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v26, v24                              ; 3E02311A
>	v_add_i32_e32 v24, vcc, 0x78, v23                       ; 4A302EFF 00000078
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v26, v24                              ; 3E00311A
>	v_add_i32_e32 v24, vcc, 0x80, v23                       ; 4A302EFF 00000080
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v26, v24                              ; 3E08311A
>	v_add_i32_e32 v24, vcc, 0x84, v23                       ; 4A302EFF 00000084
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v26, v24                              ; 3E0A311A
>	v_add_i32_e32 v24, vcc, 0x88, v23                       ; 4A302EFF 00000088
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v26, v24                              ; 3E0C311A
>	v_add_i32_e32 v24, vcc, 0x90, v23                       ; 4A302EFF 00000090
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v26, v24                              ; 3E0E311A
>	v_add_i32_e32 v24, vcc, 0x94, v23                       ; 4A302EFF 00000094
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v26, v24                             ; 3E24311A
>	v_add_i32_e32 v24, vcc, 0x98, v23                       ; 4A302EFF 00000098
>	v_add_i32_e32 v23, vcc, 0x9c, v23                       ; 4A2E2EFF 0000009C
>	buffer_load_dword v23, v23, s[0:3], 0 offen             ; E0301000 80001717
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v14, v23                          ; 0A2E2F0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v19, v26, v24                             ; 3E26311A
>	v_mac_f32_e32 v22, v26, v23                             ; 3E2C2F1A
>	v_mul_f32_e32 v23, v1, v9                               ; 102E1301
>	v_mac_f32_e32 v23, v3, v8                               ; 3E2E1103
>	v_mac_f32_e32 v23, v0, v10                              ; 3E2E1500
>	v_mac_f32_e32 v23, v20, v11                             ; 3E2E1714
>	v_mul_f32_e32 v20, v5, v9                               ; 10281305
>	v_mac_f32_e32 v20, v4, v8                               ; 3E281104
>	v_mac_f32_e32 v20, v6, v10                              ; 3E281506
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v20, v21, v11                             ; 3E281715
>	v_mul_f32_e32 v21, v18, v9                              ; 102A1312
>	v_mul_f32_e32 v9, 0, v9                                 ; 10121280
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	s_buffer_load_dword s9, s[0:3], 0x5                     ; C2048105
>	s_buffer_load_dword s10, s[0:3], 0x6                    ; C2050106
>	s_buffer_load_dword s11, s[0:3], 0x7                    ; C2058107
>	v_mac_f32_e32 v21, v7, v8                               ; 3E2A1107
>	v_mac_f32_e32 v9, 0, v8                                 ; 3E121080
>	s_buffer_load_dword s12, s[0:3], 0x8                    ; C2060108
>	s_buffer_load_dword s13, s[0:3], 0x9                    ; C2068109
>	s_buffer_load_dword s14, s[0:3], 0xa                    ; C207010A
>	s_buffer_load_dword s15, s[0:3], 0xb                    ; C207810B
>	v_mac_f32_e32 v21, v19, v10                             ; 3E2A1513
>	v_mac_f32_e32 v9, 0, v10                                ; 3E121480
>	s_buffer_load_dword s16, s[0:3], 0xc                    ; C208010C
>	s_buffer_load_dword s17, s[0:3], 0xd                    ; C208810D
>	s_buffer_load_dword s18, s[0:3], 0xe                    ; C209010E
>	s_buffer_load_dword s19, s[0:3], 0xf                    ; C209810F
>	s_buffer_load_dword s20, s[0:3], 0x14                   ; C20A0114
>	v_add_f32_e32 v8, v11, v9                               ; 0610130B
>	v_mac_f32_e32 v21, v22, v11                             ; 3E2A1716
>	v_add_f32_e32 v9, v12, v23                              ; 06122F0C
>	s_buffer_load_dword s21, s[0:3], 0x15                   ; C20A8115
>	v_add_f32_e32 v10, v13, v20                             ; 0614290D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v12, s4, v9                               ; 10181204
>	v_mul_f32_e32 v13, s5, v9                               ; 101A1205
>	v_mul_f32_e32 v20, s7, v9                               ; 10281207
>	v_add_f32_e32 v11, v14, v21                             ; 06162B0E
>	v_mul_f32_e32 v14, s6, v9                               ; 101C1206
>	v_mac_f32_e32 v12, s8, v10                              ; 3E181408
>	v_mac_f32_e32 v13, s9, v10                              ; 3E1A1409
>	v_mac_f32_e32 v14, s10, v10                             ; 3E1C140A
>	v_mac_f32_e32 v20, s11, v10                             ; 3E28140B
>	v_mac_f32_e32 v12, s12, v11                             ; 3E18160C
>	v_mac_f32_e32 v13, s13, v11                             ; 3E1A160D
>	v_mac_f32_e32 v14, s14, v11                             ; 3E1C160E
>	v_mac_f32_e32 v20, s15, v11                             ; 3E28160F
>	v_mac_f32_e32 v12, s16, v8                              ; 3E181010
>	v_mac_f32_e32 v13, s17, v8                              ; 3E1A1011
>	v_mac_f32_e32 v14, s18, v8                              ; 3E1C1012
>	v_mac_f32_e32 v20, s19, v8                              ; 3E281013
>	v_mov_b32_e32 v8, s20                                   ; 7E100214
>	v_mac_f32_e32 v8, s21, v14                              ; 3E101C15
>	v_add_f32_e64 v8, v8, 0 clamp                           ; D2060808 00010108
>	s_buffer_load_dword s22, s[0:3], 0x16                   ; C20B0116
>	s_buffer_load_dword s23, s[0:3], 0x17                   ; C20B8117
>	v_log_f32_e32 v8, v8                                    ; 7E104F08
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_legacy_f32_e32 v8, s22, v8                        ; 0E101016
>	v_mad_f32 v3, v15, v3, -v3                              ; D2820003 840E070F
>	v_mac_f32_e32 v3, v1, v16                               ; 3E062101
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_exp_f32_e32 v8, v8                                    ; 7E104B08
>	v_sub_f32_e64 v21, 1.0, s23                             ; D2080015 00002EF2
>	v_mad_f32 v1, v15, v4, -v4                              ; D2820001 8412090F
>	v_mad_f32 v4, v15, v7, -v7                              ; D2820004 841E0F0F
>	v_mac_f32_e32 v3, v0, v17                               ; 3E062300
>	v_mul_f32_e32 v0, s0, v20                               ; 10002800
>	v_mac_f32_e32 v21, s23, v8                              ; 3E2A1017
>	v_mac_f32_e32 v1, v5, v16                               ; 3E022105
>	v_mac_f32_e32 v4, v18, v16                              ; 3E082112
>	v_mul_f32_e32 v5, v21, v21                              ; 100A2B15
>	exp 15, 32, 0, 0, 0, v9, v10, v11, v0                   ; F800020F 000B0A09
>	v_mac_f32_e32 v1, v6, v17                               ; 3E022306
>	v_mac_f32_e32 v4, v19, v17                              ; 3E082313
>	exp 15, 33, 0, 0, 0, v5, v0, v0, v0                     ; F800021F 00000005
>	exp 15, 34, 0, 0, 0, v3, v1, v4, v0                     ; F800022F 00040103
>	exp 15, 12, 0, 1, 0, v12, v13, v14, v20                 ; F80008CF 140E0D0C
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1996 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[24:25], exec                                        ; BE98047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v2, 0, 0, [m0]                              ; C8040002
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v2, 1, 0, [m0]                              ; C8000102
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v6, v2, 2, 0, [m0]                              ; C8180202
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v6, [v6], v3, 2, 0, [m0]                        ; C8190203
>	v_interp_p1_f32 v10, v4, 0, 2, [m0]                             ; C8280804
>	v_interp_p2_f32 v10, [v10], v5, 0, 2, [m0]                      ; C8290805
>	v_interp_p1_f32 v11, v4, 1, 2, [m0]                             ; C82C0904
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v12, s8, v1                                       ; 08180208
>	v_interp_p2_f32 v11, [v11], v5, 1, 2, [m0]                      ; C82D0905
>	v_interp_p1_f32 v4, v4, 2, 2, [m0]                              ; C8100A04
>	v_sub_f32_e32 v14, s9, v0                                       ; 081C0009
>	v_mul_f32_e32 v7, v12, v12                                      ; 100E190C
>	v_interp_p2_f32 v4, [v4], v5, 2, 2, [m0]                        ; C8110A05
>	v_mul_f32_e32 v5, v10, v10                                      ; 100A150A
>	v_mac_f32_e32 v5, v11, v11                                      ; 3E0A170B
>	v_sub_f32_e32 v15, s12, v6                                      ; 081E0C0C
>	v_mac_f32_e32 v7, v14, v14                                      ; 3E0E1D0E
>	v_mac_f32_e32 v5, v4, v4                                        ; 3E0A0904
>	v_mac_f32_e32 v7, v15, v15                                      ; 3E0E1F0F
>	v_rsq_f32_e32 v16, v7                                           ; 7E205D07
>	v_rsq_f32_e32 v5, v5                                            ; 7E0A5D05
>	s_buffer_load_dword s7, s[0:3], 0x4                             ; C2038104
>	s_buffer_load_dword s6, s[0:3], 0x5                             ; C2030105
>	v_mul_f32_e32 v8, v16, v12                                      ; 10101910
>	v_mul_f32_e32 v10, v5, v10                                      ; 10141505
>	v_mul_f32_e32 v11, v5, v11                                      ; 10161705
>	v_mul_f32_e32 v7, v16, v14                                      ; 100E1D10
>	v_mul_f32_e32 v22, v8, v10                                      ; 102C1508
>	v_mul_f32_e32 v9, v16, v15                                      ; 10121F10
>	v_mul_f32_e32 v5, v5, v4                                        ; 100A0905
>	v_mac_f32_e32 v22, v7, v11                                      ; 3E2C1707
>	v_mac_f32_e32 v22, v9, v5                                       ; 3E2C0B09
>	v_mul_f32_e32 v4, v10, v22                                      ; 10082D0A
>	v_mul_f32_e32 v17, v11, v22                                     ; 10222D0B
>	v_mac_f32_e32 v4, v10, v22                                      ; 3E082D0A
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	v_mad_f32 v19, v12, v16, -v4                                    ; D2820013 8412210C
>	v_mac_f32_e32 v17, v11, v22                                     ; 3E222D0B
>	v_mad_f32 v23, -v12, v16, v4                                    ; D2820017 2412210C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v4, v12, v16, -s7                                     ; D2820004 801E210C
>	v_mul_f32_e32 v18, v5, v22                                      ; 10242D05
>	v_mul_f32_e32 v12, 0.5, v4                                      ; 101808F0
>	v_mul_f32_e32 v19, v10, v19                                     ; 1026270A
>	v_mad_f32 v4, v14, v16, -v17                                    ; D2820004 8446210E
>	v_mac_f32_e32 v18, v5, v22                                      ; 3E242D05
>	v_mac_f32_e32 v19, v11, v4                                      ; 3E26090B
>	v_mad_f32 v4, v14, v16, -s6                                     ; D2820004 801A210E
>	v_mad_f32 v24, -v14, v16, v17                                   ; D2820018 2446210E
>	v_mul_f32_e32 v17, 0.5, v4                                      ; 102208F0
>	v_mad_f32 v4, v15, v16, -v18                                    ; D2820004 844A210F
>	v_mac_f32_e32 v19, v5, v4                                       ; 3E260905
>	v_mad_f32 v25, -v15, v16, v18                                   ; D2820019 244A210F
>	v_mad_f32 v14, v15, v16, -s8                                    ; D282000E 8022210F
>	v_sub_f32_e32 v15, 1.0, v22                                     ; 081E2CF2
>	v_add_f32_e32 v4, 1.0, v19                                      ; 060826F2
>	v_add_f32_e64 v15, v15, 0 clamp                                 ; D206080F 0001010F
>	v_subrev_f32_e32 v4, v15, v4                                    ; 0A08090F
>	s_buffer_load_dword s16, s[0:3], 0x11                           ; C2080111
>	s_buffer_load_dword s17, s[0:3], 0x12                           ; C2088112
>	s_buffer_load_dword s31, s[0:3], 0x10                           ; C20F8110
>	v_add_f32_e64 v4, v4, 0 clamp                                   ; D2060804 00010104
>	s_buffer_load_dword s18, s[0:3], 0x14                           ; C2090114
>	s_buffer_load_dword s19, s[0:3], 0x15                           ; C2098115
>	s_buffer_load_dword s20, s[0:3], 0x16                           ; C20A0116
>	v_sub_f32_e32 v15, 1.0, v4                                      ; 081E08F2
>	v_mul_f32_e32 v19, 0.5, v14                                     ; 10261CF0
>	v_mul_f32_e32 v14, v24, v24                                     ; 101C3118
>	s_buffer_load_dword s21, s[0:3], 0x18                           ; C20A8118
>	s_buffer_load_dword s22, s[0:3], 0x19                           ; C20B0119
>	s_buffer_load_dword s23, s[0:3], 0x1a                           ; C20B811A
>	v_mad_f32 v4, -v4, v15, v15                                     ; D2820004 243E1F04
>	v_mul_f32_e32 v15, v11, v11                                     ; 101E170B
>	v_mad_f32 v20, v23, v23, -v14                                   ; D2820014 843A2F17
>	v_mov_b32_e32 v14, 0x403b800a                                   ; 7E1C02FF 403B800A
>	v_mad_f32 v18, v10, v10, -v15                                   ; D2820012 843E150A
>	v_mad_f32 v15, v14, v10, v1                                     ; D282000F 0406150E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v16, s31, v15                                     ; 10201E1F
>	v_mul_f32_e32 v21, s16, v15                                     ; 102A1E10
>	v_mul_f32_e32 v26, s17, v15                                     ; 10341E11
>	v_mad_f32 v15, v14, v11, v0                                     ; D282000F 0402170E
>	v_mac_f32_e32 v16, s18, v15                                     ; 3E201E12
>	v_mad_f32 v14, v14, v5, v6                                      ; D282000E 041A0B0E
>	v_mac_f32_e32 v21, s19, v15                                     ; 3E2A1E13
>	v_mac_f32_e32 v26, s20, v15                                     ; 3E341E14
>	s_buffer_load_dword s28, s[0:3], 0x1c                           ; C20E011C
>	v_mac_f32_e32 v16, s21, v14                                     ; 3E201C15
>	s_buffer_load_dword s29, s[0:3], 0x1d                           ; C20E811D
>	s_buffer_load_dword s30, s[0:3], 0x1e                           ; C20F011E
>	s_load_dwordx4 s[12:15], s[4:5], 0xc                            ; C086050C
>	v_mac_f32_e32 v21, s22, v14                                     ; 3E2A1C16
>	v_mac_f32_e32 v26, s23, v14                                     ; 3E341C17
>	s_load_dwordx8 s[16:23], s[4:5], 0x0                            ; C0C80500
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v15, s28, v16                                     ; 061E201C
>	v_add_f32_e32 v14, s30, v26                                     ; 061C341E
>	v_add_f32_e32 v16, s29, v21                                     ; 06202A1D
>	s_buffer_load_dword s40, s[0:3], 0x3d                           ; C214013D
>	s_and_b32 s12, s12, s23                                         ; 870C170C
>	image_sample_c v21, v[14:17], s[16:23], s[12:15] dmask:0x1      ; F0A00100 0064150E
>	v_cubema_f32 v14, v10, v11, v5                                  ; D28E000E 0416170A
>	v_rcp_f32_e64 v15, |v14|                                        ; D354010F 0000010E
>	s_buffer_load_dword s39, s[0:3], 0x3c                           ; C213813C
>	s_buffer_load_dword s41, s[0:3], 0x3e                           ; C214813E
>	s_buffer_load_dword s42, s[0:3], 0x3f                           ; C215013F
>	v_cubetc_f32 v16, v10, v11, v5                                  ; D28C0010 0416170A
>	v_mov_b32_e32 v14, 0x3fc00000                                   ; 7E1C02FF 3FC00000
>	v_cubesc_f32 v26, v10, v11, v5                                  ; D28A001A 0416170A
>	v_mad_f32 v16, v15, v16, v14                                    ; D2820010 043A210F
>	v_mad_f32 v15, v15, v26, v14                                    ; D282000F 043A350F
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v26, s40, v11                                     ; 10341628
>	v_mac_f32_e32 v26, s39, v10                                     ; 3E341427
>	v_mac_f32_e32 v26, s41, v5                                      ; 3E340A29
>	s_buffer_load_dword s27, s[0:3], 0x41                           ; C20D8141
>	v_mac_f32_e32 v26, s42, v18                                     ; 3E34242A
>	v_mul_f32_e32 v18, s40, v24                                     ; 10243028
>	s_buffer_load_dword s26, s[0:3], 0x40                           ; C20D0140
>	v_mac_f32_e32 v18, s39, v23                                     ; 3E242E27
>	s_buffer_load_dword s36, s[0:3], 0x42                           ; C2120142
>	v_mac_f32_e32 v18, s41, v25                                     ; 3E243229
>	s_buffer_load_dword s37, s[0:3], 0x43                           ; C2128143
>	v_mac_f32_e32 v18, s42, v20                                     ; 3E24282A
>	v_mul_f32_e32 v20, v5, v11                                      ; 10281705
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v20, s27, v20                                     ; 1028281B
>	v_mul_f32_e32 v27, v11, v10                                     ; 1036150B
>	v_mac_f32_e32 v20, s26, v27                                     ; 3E28361A
>	v_mul_f32_e32 v27, v10, v5                                      ; 10360B0A
>	v_mac_f32_e32 v20, s36, v27                                     ; 3E283624
>	v_mul_f32_e32 v27, v5, v5                                       ; 10360B05
>	v_mac_f32_e32 v20, s37, v27                                     ; 3E283625
>	v_mul_f32_e32 v27, v25, v24                                     ; 10363119
>	s_buffer_load_dword s38, s[0:3], 0x44                           ; C2130144
>	v_mul_f32_e32 v27, s27, v27                                     ; 1036361B
>	v_mul_f32_e32 v28, v24, v23                                     ; 10382F18
>	v_mac_f32_e32 v27, s26, v28                                     ; 3E36381A
>	v_mul_f32_e32 v28, v23, v25                                     ; 10383317
>	v_mac_f32_e32 v27, s36, v28                                     ; 3E363824
>	v_mul_f32_e32 v28, v25, v25                                     ; 10383319
>	v_add_f32_e32 v20, v20, v26                                     ; 06283514
>	v_mac_f32_e32 v27, s37, v28                                     ; 3E363825
>	v_add_f32_e32 v18, v27, v18                                     ; 0624251B
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v20, s38, v20                                     ; 06282826
>	v_mul_f32_e32 v20, 0x3fa66666, v20                              ; 102828FF 3FA66666
>	v_add_f32_e32 v18, s38, v18                                     ; 06242426
>	v_mov_b32_e32 v26, 0x3feccccd                                   ; 7E3402FF 3FECCCCD
>	v_madak_f32_e32 v18, v26, v18, 0xbe99999a                       ; 4224251A BE99999A
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_mov_b32_e32 v26, 0xbf4ccccd                                   ; 7E3402FF BF4CCCCD
>	v_mad_f32 v26, v26, v20, 1.0                                    ; D282001A 03CA291A
>	v_mul_f32_e32 v20, v12, v12                                     ; 1028190C
>	v_mac_f32_e32 v20, v17, v17                                     ; 3E282311
>	v_mac_f32_e32 v20, v19, v19                                     ; 3E282713
>	v_rsq_f32_e32 v20, v20                                          ; 7E285D14
>	s_buffer_load_dword s9, s[0:3], 0x51                            ; C2048151
>	s_buffer_load_dword s43, s[0:3], 0xc                            ; C215810C
>	s_buffer_load_dword s44, s[0:3], 0xd                            ; C216010D
>	v_mul_f32_e32 v27, v20, v17                                     ; 10362314
>	v_add_f32_e64 v17, v18, 0 clamp                                 ; D2060811 00010112
>	v_mad_f32 v29, -v17, v4, v4                                     ; D282001D 24120911
>	v_mov_b32_e32 v17, 0x41100000                                   ; 7E2202FF 41100000
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v17, v17, s9, 2.0                                     ; D2820011 03D01311
>	s_buffer_load_dword s45, s[0:3], 0xe                            ; C216810E
>	v_exp_f32_e32 v30, v17                                          ; 7E3C4B11
>	v_mul_f32_e32 v17, s7, v10                                      ; 10221407
>	s_load_dwordx8 s[28:35], s[4:5], 0x10                           ; C0CE0510
>	s_load_dwordx4 s[36:39], s[4:5], 0x1c                           ; C092051C
>	v_mad_f32 v17, v11, -s6, -v17                                   ; D2820011 C4440D0B
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[20:23], s[4:5], 0x2c                           ; C08A052C
>	v_mad_f32 v17, -v5, s8, v17                                     ; D2820011 24441105
>	v_add_f32_e64 v31, v17, 0 clamp                                 ; D206081F 00010111
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v17, v21, v21                                     ; 10222B15
>	v_mul_f32_e32 v28, v20, v19                                     ; 10382714
>	v_mul_f32_e32 v18, s43, v17                                     ; 1024222B
>	v_mul_f32_e32 v19, s44, v17                                     ; 1026222C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v17, s45, v17                                     ; 1022222D
>	v_mul_f32_e32 v34, v17, v31                                     ; 10443F11
>	v_mul_f32_e32 v12, v20, v12                                     ; 10181914
>	v_mul_f32_e32 v32, v18, v31                                     ; 10403F12
>	v_mul_f32_e32 v33, v19, v31                                     ; 10423F13
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	v_cubeid_f32 v17, v10, v11, v5                                  ; D2880011 0416170A
>	s_and_b64 exec, exec, s[24:25]                                  ; 87FE187E
>	image_sample v[18:21], v[15:18], s[28:35], s[36:39] dmask:0xf   ; F0800F00 0127120F
>	v_cubeid_f32 v16, v23, v24, v25                                 ; D2880010 04663117
>	v_cubetc_f32 v15, v23, v24, v25                                 ; D28C000F 04663117
>	v_cubesc_f32 v17, v23, v24, v25                                 ; D28A0011 04663117
>	v_cubema_f32 v23, v23, v24, v25                                 ; D28E0017 04663117
>	v_rcp_f32_e64 v23, |v23|                                        ; D3540117 00000117
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	s_buffer_load_dword s4, s[0:3], 0x48                            ; C2020148
>	v_mad_f32 v15, v23, v15, v14                                    ; D282000F 043A1F17
>	v_mac_f32_e32 v14, v23, v17                                     ; 3E1C2317
>	v_mov_b32_e32 v17, 0x40c00000                                   ; 7E2202FF 40C00000
>	v_mad_f32 v17, -s9, v17, v17                                    ; D2820011 24462209
>	image_sample_l v[14:16], v[14:17], s[12:19], s[20:23] dmask:0x7 ; F0900700 00A30E0E
>	v_mul_f32_e32 v17, s7, v12                                      ; 10221807
>	v_mad_f32 v17, v27, -s6, -v17                                   ; D2820011 C4440D1B
>	v_mad_f32 v17, -v28, s8, v17                                    ; D2820011 2444111C
>	s_buffer_load_dword s5, s[0:3], 0x49                            ; C2028149
>	s_buffer_load_dword s24, s[0:3], 0x4a                           ; C20C014A
>	v_sub_f32_e32 v23, 1.0, v22                                     ; 082E2CF2
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_sub_f32_e32 v17, 1.0, v17                                     ; 082222F2
>	v_mul_f32_e32 v41, -0.5, v30                                    ; 10523CF1
>	v_log_f32_e32 v23, v23                                          ; 7E2E4F17
>	v_exp_f32_e32 v41, v41                                          ; 7E524B29
>	v_log_f32_e32 v17, v17                                          ; 7E224F11
>	v_sub_f32_e32 v41, 2.0, v41                                     ; 085252F4
>	v_mov_b32_e32 v24, 0x40a00000                                   ; 7E3002FF 40A00000
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v36, s5                                           ; 7E480205
>	v_mov_b32_e32 v38, s24                                          ; 7E4C0218
>	v_mov_b32_e32 v25, s4                                           ; 7E320204
>	v_rcp_f32_e32 v41, v41                                          ; 7E525529
>	v_mul_legacy_f32_e32 v23, v24, v23                              ; 0E2E2F18
>	v_max_f32_e32 v35, s9, v25                                      ; 20463209
>	v_max_f32_e32 v37, s9, v36                                      ; 204A4809
>	v_max_f32_e32 v39, s9, v38                                      ; 204E4C09
>	v_mul_f32_e32 v12, v12, v10                                     ; 1018150C
>	v_mul_legacy_f32_e32 v17, v24, v17                              ; 0E222318
>	v_add_f32_e32 v43, 2.0, v30                                     ; 06563CF4
>	v_mac_f32_e32 v12, v27, v11                                     ; 3E18171B
>	v_exp_f32_e32 v23, v23                                          ; 7E2E4B17
>	v_subrev_f32_e32 v35, s4, v35                                   ; 0A464604
>	v_subrev_f32_e32 v37, s5, v37                                   ; 0A4A4A05
>	v_subrev_f32_e32 v39, s24, v39                                  ; 0A4E4E18
>	v_mac_f32_e32 v12, v28, v5                                      ; 3E180B1C
>	v_mul_f32_e32 v43, 0x3e800000, v43                              ; 105656FF 3E800000
>	v_mad_f32 v35, v35, v23, v25                                    ; D2820023 04662F23
>	v_mad_f32 v37, v37, v23, v36                                    ; D2820025 04922F25
>	v_mad_f32 v23, v39, v23, v38                                    ; D2820017 049A2F27
>	v_exp_f32_e32 v17, v17                                          ; 7E224B11
>	v_sub_f32_e32 v39, 1.0, v25                                     ; 084E32F2
>	v_add_f32_e64 v12, v12, 0 clamp                                 ; D206080C 0001010C
>	v_mul_f32_e32 v41, v41, v43                                     ; 10525729
>	v_mad_f32 v43, v39, v17, v25                                    ; D282002B 04662327
>	v_log_f32_e32 v12, v12                                          ; 7E184F0C
>	v_mul_f32_e32 v43, v43, v32                                     ; 1056412B
>	v_mul_f32_e32 v28, v41, v43                                     ; 10385729
>	v_max_f32_e32 v31, v22, v31                                     ; 203E3F16
>	v_mov_b32_e32 v43, 0x3727c5ac                                   ; 7E5602FF 3727C5AC
>	v_add_f32_e32 v31, v43, v31                                     ; 063E3F2B
>	v_sub_f32_e32 v40, 1.0, v36                                     ; 085048F2
>	v_sub_f32_e32 v42, 1.0, v38                                     ; 08544CF2
>	v_rcp_f32_e32 v31, v31                                          ; 7E3E551F
>	v_mad_f32 v27, v40, v17, v36                                    ; D282001B 04922328
>	v_mad_f32 v17, v42, v17, v38                                    ; D2820011 049A232A
>	v_mul_legacy_f32_e32 v12, v30, v12                              ; 0E18191E
>	v_mul_f32_e32 v27, v27, v33                                     ; 1036431B
>	v_mul_f32_e32 v17, v17, v34                                     ; 10224511
>	v_exp_f32_e32 v12, v12                                          ; 7E184B0C
>	v_mul_f32_e32 v27, v41, v27                                     ; 10363729
>	v_mul_f32_e32 v17, v41, v17                                     ; 10222329
>	v_mul_f32_e32 v28, v12, v28                                     ; 1038390C
>	v_mul_f32_e32 v27, v12, v27                                     ; 1036370C
>	v_mul_f32_e32 v12, v12, v17                                     ; 1018230C
>	v_mul_f32_e32 v17, v31, v28                                     ; 1022391F
>	v_mul_f32_e32 v27, v31, v27                                     ; 1036371F
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mac_f32_e32 v17, v14, v35                                     ; 3E22470E
>	v_mul_f32_e32 v14, v21, v18                                     ; 101C2515
>	v_mov_b32_e32 v18, 0x3eaaaa9f                                   ; 7E2402FF 3EAAAA9F
>	v_mac_f32_e32 v27, v15, v37                                     ; 3E364B0F
>	v_mul_f32_e32 v15, v21, v19                                     ; 101E2715
>	v_mul_f32_e32 v19, s4, v18                                      ; 10262404
>	s_buffer_load_dword s4, s[0:3], 0x2c                            ; C202012C
>	v_mac_f32_e32 v19, s5, v18                                      ; 3E262405
>	s_buffer_load_dword s5, s[0:3], 0x2d                            ; C202812D
>	s_buffer_load_dword s6, s[0:3], 0x2e                            ; C203012E
>	v_mul_f32_e32 v12, v31, v12                                     ; 1018191F
>	v_mac_f32_e32 v12, v16, v23                                     ; 3E182F10
>	v_mul_f32_e32 v16, v21, v20                                     ; 10202915
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v20, s4, v1                                       ; 08280204
>	v_sub_f32_e32 v21, s5, v0                                       ; 082A0005
>	v_mul_f32_e32 v23, v20, v20                                     ; 102E2914
>	v_sub_f32_e32 v28, s6, v6                                       ; 08380C06
>	v_mac_f32_e32 v23, v21, v21                                     ; 3E2E2B15
>	v_mac_f32_e32 v23, v28, v28                                     ; 3E2E391C
>	v_rsq_f32_e32 v31, v23                                          ; 7E3E5D17
>	v_mac_f32_e32 v19, s24, v18                                     ; 3E262418
>	v_sub_f32_e32 v18, 1.0, v19                                     ; 082426F2
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v14, 4.0, v14                                     ; 101C1CF6
>	v_mul_f32_e32 v19, v18, v32                                     ; 10264112
>	v_mad_f32 v32, v31, v20, v8                                     ; D2820020 0422291F
>	v_mul_f32_e32 v14, v14, v18                                     ; 101C250E
>	v_mac_f32_e32 v19, v26, v14                                     ; 3E261D1A
>	v_mul_f32_e32 v14, 4.0, v15                                     ; 101C1EF6
>	v_mul_f32_e32 v15, 4.0, v16                                     ; 101E20F6
>	v_mul_f32_e32 v16, v18, v33                                     ; 10204312
>	v_mad_f32 v33, v31, v21, v7                                     ; D2820021 041E2B1F
>	v_mul_f32_e32 v32, 0.5, v32                                     ; 104040F0
>	v_mad_f32 v35, v31, v28, v9                                     ; D2820023 0426391F
>	v_mul_f32_e32 v33, 0.5, v33                                     ; 104242F0
>	v_mul_f32_e32 v37, v32, v32                                     ; 104A4120
>	v_mul_f32_e32 v35, 0.5, v35                                     ; 104646F0
>	v_mac_f32_e32 v37, v33, v33                                     ; 3E4A4321
>	v_mac_f32_e32 v37, v35, v35                                     ; 3E4A4723
>	s_buffer_load_dword s4, s[0:3], 0x34                            ; C2020134
>	v_rsq_f32_e32 v37, v37                                          ; 7E4A5D25
>	s_buffer_load_dword s5, s[0:3], 0x35                            ; C2028135
>	s_buffer_load_dword s6, s[0:3], 0x36                            ; C2030136
>	v_mul_f32_e32 v14, v14, v18                                     ; 101C250E
>	v_mac_f32_e32 v16, v26, v14                                     ; 3E201D1A
>	v_mul_f32_e32 v15, v15, v18                                     ; 101E250F
>	v_mul_f32_e32 v34, v18, v34                                     ; 10444512
>	v_mul_f32_e32 v14, v37, v32                                     ; 101C4125
>	v_mul_f32_e32 v20, v31, v20                                     ; 1028291F
>	v_mac_f32_e32 v34, v26, v15                                     ; 3E441F1A
>	v_mul_f32_e32 v32, v10, v20                                     ; 1040290A
>	v_mul_f32_e32 v21, v31, v21                                     ; 102A2B1F
>	v_mul_f32_e32 v20, v14, v20                                     ; 1028290E
>	v_mul_f32_e32 v15, v37, v33                                     ; 101E4325
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v1, s4, v1                                        ; 08020204
>	v_mac_f32_e32 v32, v11, v21                                     ; 3E402B0B
>	v_mac_f32_e32 v20, v15, v21                                     ; 3E282B0F
>	v_mul_f32_e32 v21, v31, v28                                     ; 102A391F
>	v_sub_f32_e32 v28, s5, v0                                       ; 08380005
>	v_mul_f32_e32 v33, v1, v1                                       ; 10420301
>	v_sub_f32_e32 v6, s6, v6                                        ; 080C0C06
>	v_mac_f32_e32 v33, v28, v28                                     ; 3E42391C
>	v_mac_f32_e32 v33, v6, v6                                       ; 3E420D06
>	v_mul_f32_e32 v26, v37, v35                                     ; 10344725
>	v_rsq_f32_e32 v35, v33                                          ; 7E465D21
>	s_buffer_load_dword s7, s[0:3], 0x2f                            ; C203812F
>	v_mac_f32_e32 v20, v26, v21                                     ; 3E282B1A
>	v_add_f32_e64 v20, v20, 0 clamp                                 ; D2060814 00010114
>	v_mac_f32_e32 v8, v35, v1                                       ; 3E100323
>	v_mac_f32_e32 v7, v35, v28                                      ; 3E0E3923
>	v_mul_f32_e32 v8, 0.5, v8                                       ; 101010F0
>	v_mac_f32_e32 v9, v35, v6                                       ; 3E120D23
>	v_mul_f32_e32 v7, 0.5, v7                                       ; 100E0EF0
>	v_mul_f32_e32 v37, v8, v8                                       ; 104A1108
>	v_mul_f32_e32 v9, 0.5, v9                                       ; 101212F0
>	v_mac_f32_e32 v37, v7, v7                                       ; 3E4A0F07
>	v_mac_f32_e32 v37, v9, v9                                       ; 3E4A1309
>	v_rsq_f32_e32 v37, v37                                          ; 7E4A5D25
>	v_mul_f32_e32 v1, v35, v1                                       ; 10020323
>	v_mul_f32_e32 v28, v35, v28                                     ; 10383923
>	v_mul_f32_e32 v6, v35, v6                                       ; 100C0D23
>	v_mul_f32_e32 v8, v37, v8                                       ; 10101125
>	v_mul_f32_e32 v7, v37, v7                                       ; 100E0F25
>	v_mul_f32_e32 v9, v37, v9                                       ; 10121325
>	v_mul_f32_e32 v37, v8, v1                                       ; 104A0308
>	v_mac_f32_e32 v37, v7, v28                                      ; 3E4A3907
>	v_mac_f32_e32 v37, v9, v6                                       ; 3E4A0D09
>	v_add_f32_e64 v37, v37, 0 clamp                                 ; D2060825 00010125
>	v_mul_f32_e32 v8, v8, v10                                       ; 10101508
>	s_buffer_load_dword s8, s[0:3], 0x30                            ; C2040130
>	s_buffer_load_dword s4, s[0:3], 0x31                            ; C2020131
>	s_buffer_load_dword s5, s[0:3], 0x32                            ; C2028132
>	v_mac_f32_e32 v8, v7, v11                                       ; 3E101707
>	v_sub_f32_e32 v20, 1.0, v20                                     ; 082828F2
>	v_sub_f32_e32 v37, 1.0, v37                                     ; 084A4AF2
>	v_mul_f32_e32 v14, v14, v10                                     ; 101C150E
>	v_mac_f32_e32 v8, v9, v5                                        ; 3E100B09
>	v_log_f32_e32 v20, v20                                          ; 7E284F14
>	v_mac_f32_e32 v14, v15, v11                                     ; 3E1C170F
>	v_mul_f32_e32 v9, v31, v23                                      ; 10122F1F
>	v_log_f32_e32 v37, v37                                          ; 7E4A4F25
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v9, s7, v9                                        ; 10121207
>	v_mac_f32_e32 v14, v26, v5                                      ; 3E1C0B1A
>	v_mul_f32_e32 v1, v10, v1                                       ; 1002030A
>	v_add_f32_e64 v14, v14, 0 clamp                                 ; D206080E 0001010E
>	v_mac_f32_e32 v32, v5, v21                                      ; 3E402B05
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_mac_f32_e32 v1, v11, v28                                      ; 3E02390B
>	v_log_f32_e32 v14, v14                                          ; 7E1C4F0E
>	v_mul_f32_e32 v7, v29, v12                                      ; 100E191D
>	v_mad_f32 v11, -v9, s8, s8                                      ; D282000B 20201109
>	v_mad_f32 v12, -v9, s4, s4                                      ; D282000C 20100909
>	v_add_f32_e64 v10, v32, 0 clamp                                 ; D206080A 00010120
>	v_mad_f32 v9, -v9, s5, s5                                       ; D2820009 20140B09
>	v_mul_legacy_f32_e32 v20, v24, v20                              ; 0E282918
>	v_mul_legacy_f32_e32 v24, v24, v37                              ; 0E304B18
>	v_mul_f32_e32 v11, v11, v10                                     ; 1016150B
>	v_mul_f32_e32 v12, v12, v10                                     ; 1018150C
>	v_mul_f32_e32 v9, v9, v10                                       ; 10121509
>	v_max_f32_e32 v10, v22, v10                                     ; 20141516
>	v_add_f32_e32 v10, v43, v10                                     ; 0614152B
>	v_exp_f32_e32 v20, v20                                          ; 7E284B14
>	v_exp_f32_e32 v24, v24                                          ; 7E304B18
>	v_mad_f32 v37, v39, v20, v25                                    ; D2820025 04662927
>	v_mad_f32 v25, v39, v24, v25                                    ; D2820019 04663127
>	v_mad_f32 v39, v40, v20, v36                                    ; D2820027 04922928
>	v_mad_f32 v20, v42, v20, v38                                    ; D2820014 049A292A
>	v_rcp_f32_e32 v10, v10                                          ; 7E14550A
>	v_mul_legacy_f32_e32 v14, v30, v14                              ; 0E1C1D1E
>	v_mac_f32_e32 v34, v18, v9                                      ; 3E441312
>	v_mul_f32_e32 v9, v20, v9                                       ; 10121314
>	s_buffer_load_dword s4, s[0:3], 0x37                            ; C2020137
>	v_mul_f32_e32 v9, v41, v9                                       ; 10121329
>	v_exp_f32_e32 v14, v14                                          ; 7E1C4B0E
>	v_mul_f32_e32 v9, v14, v9                                       ; 1012130E
>	s_buffer_load_dword s5, s[0:3], 0x38                            ; C2028138
>	s_buffer_load_dword s6, s[0:3], 0x39                            ; C2030139
>	s_buffer_load_dword s7, s[0:3], 0x3a                            ; C203813A
>	v_mac_f32_e32 v19, v18, v11                                     ; 3E261712
>	v_mul_f32_e32 v11, v37, v11                                     ; 10161725
>	v_mul_f32_e32 v9, v10, v9                                       ; 1012130A
>	v_mul_f32_e32 v11, v41, v11                                     ; 10161729
>	v_mac_f32_e32 v16, v18, v12                                     ; 3E201912
>	v_mul_f32_e32 v12, v39, v12                                     ; 10181927
>	v_mac_f32_e32 v7, v4, v9                                        ; 3E0E1304
>	v_mul_f32_e32 v9, v35, v33                                      ; 10124323
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v9, s4, v9                                        ; 10121204
>	v_mul_f32_e32 v12, v41, v12                                     ; 10181929
>	v_mul_f32_e32 v11, v14, v11                                     ; 1016170E
>	v_mac_f32_e32 v1, v5, v6                                        ; 3E020D05
>	v_mul_f32_e32 v12, v14, v12                                     ; 1018190E
>	v_add_f32_e64 v8, v8, 0 clamp                                   ; D2060808 00010108
>	v_mul_f32_e32 v5, v29, v17                                      ; 100A231D
>	v_mul_f32_e32 v11, v10, v11                                     ; 1016170A
>	v_add_f32_e64 v9, v9, 0 clamp                                   ; D2060809 00010109
>	v_log_f32_e32 v8, v8                                            ; 7E104F08
>	v_mul_f32_e32 v12, v10, v12                                     ; 1018190A
>	v_mac_f32_e32 v5, v4, v11                                       ; 3E0A1704
>	v_mad_f32 v10, -v9, s5, s5                                      ; D282000A 20140B09
>	v_mad_f32 v11, -v9, s6, s6                                      ; D282000B 20180D09
>	v_add_f32_e64 v1, v1, 0 clamp                                   ; D2060801 00010101
>	v_mad_f32 v9, -v9, s7, s7                                       ; D2820009 201C0F09
>	v_mul_f32_e32 v10, v10, v1                                      ; 1014030A
>	v_mul_f32_e32 v11, v11, v1                                      ; 1016030B
>	v_mul_f32_e32 v9, v9, v1                                        ; 10120309
>	v_max_f32_e32 v1, v22, v1                                       ; 20020316
>	v_add_f32_e32 v1, v43, v1                                       ; 0602032B
>	v_mad_f32 v36, v40, v24, v36                                    ; D2820024 04923128
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mad_f32 v24, v42, v24, v38                                    ; D2820018 049A312A
>	v_rcp_f32_e32 v1, v1                                            ; 7E025501
>	v_mul_legacy_f32_e32 v8, v30, v8                                ; 0E10111E
>	v_mac_f32_e32 v19, v18, v10                                     ; 3E261512
>	v_mul_f32_e32 v10, v25, v10                                     ; 10141519
>	v_mac_f32_e32 v16, v18, v11                                     ; 3E201712
>	v_mul_f32_e32 v11, v36, v11                                     ; 10161724
>	v_mac_f32_e32 v34, v18, v9                                      ; 3E441312
>	v_mul_f32_e32 v9, v24, v9                                       ; 10121318
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v10, v41, v10                                     ; 10141529
>	v_exp_f32_e32 v8, v8                                            ; 7E104B08
>	v_mul_f32_e32 v11, v41, v11                                     ; 10161729
>	v_mul_f32_e32 v9, v41, v9                                       ; 10121329
>	v_mul_f32_e32 v10, v8, v10                                      ; 10141508
>	v_mul_f32_e32 v11, v8, v11                                      ; 10161708
>	v_mul_f32_e32 v8, v8, v9                                        ; 10101308
>	v_mul_f32_e32 v9, v1, v10                                       ; 10121501
>	v_mul_f32_e32 v10, v1, v11                                      ; 10141701
>	v_mul_f32_e32 v1, v1, v8                                        ; 10021101
>	v_mac_f32_e32 v7, v4, v1                                        ; 3E0E0304
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v1, s4                                            ; 7E020204
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_add_f32_e32 v1, 0x3a83126f, v1                                ; 060202FF 3A83126F
>	v_rcp_f32_e32 v1, v1                                            ; 7E025501
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	s_buffer_load_dword s27, s[0:3], 0x4e                           ; C20D814E
>	v_mul_f32_e32 v0, v1, v0                                        ; 10000101
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s25, s[0:3], 0x4c                           ; C20C814C
>	s_buffer_load_dword s26, s[0:3], 0x4d                           ; C20D014D
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s8, s[0:3], 0xa                             ; C204010A
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	s_buffer_load_dword s0, s[0:3], 0x50                            ; C2000150
>	v_interp_p1_f32 v1, v2, 0, 1, [m0]                              ; C8040402
>	v_mul_f32_e32 v6, v29, v27                                      ; 100C371D
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v6, v4, v12                                       ; 3E0C1904
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 0, 1, [m0]                        ; C8050403
>	v_mul_f32_e32 v3, v0, v1                                        ; 10060300
>	v_mac_f32_e32 v5, v4, v9                                        ; 3E0A1304
>	v_mac_f32_e32 v6, v4, v10                                       ; 3E0C1504
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v5, s25, v19                                      ; 3E0A2619
>	v_mad_f32 v0, -v3, s6, s6                                       ; D2820000 20180D03
>	v_mac_f32_e32 v6, s26, v16                                      ; 3E0C201A
>	v_mad_f32 v1, -v3, s7, s7                                       ; D2820001 201C0F03
>	v_mac_f32_e32 v7, s27, v34                                      ; 3E0E441B
>	v_mad_f32 v2, -v3, s8, s8                                       ; D2820002 20201103
>	v_mac_f32_e32 v0, v3, v5                                        ; 3E000B03
>	v_mac_f32_e32 v1, v3, v6                                        ; 3E020D03
>	v_mac_f32_e32 v2, v3, v7                                        ; 3E040F03
>	v_mov_b32_e32 v3, s0                                            ; 7E060200
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 48
>VGPRS: 44
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2484 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 5
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[19:22], v4, s[4:7], 0 idxen   ; E00C2000 80011304
>	buffer_load_format_xyzw v[14:17], v5, s[12:15], 0 idxen ; E00C2000 80030E05
>	buffer_load_format_xyzw v[10:13], v6, s[16:19], 0 idxen ; E00C2000 80040A06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s5, s[0:3], 0x10                    ; C2028110
>	s_buffer_load_dword s6, s[0:3], 0x11                    ; C2030111
>	s_buffer_load_dword s7, s[0:3], 0x12                    ; C2038112
>	s_buffer_load_dword s8, s[0:3], 0x38c                   ; C20400FF 0000038C
>	s_buffer_load_dword s4, s[0:3], 0x39e                   ; C20200FF 0000039E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v23, s5                                   ; 7E2E0205
>	v_mov_b32_e32 v24, s6                                   ; 7E300206
>	v_mov_b32_e32 v25, s7                                   ; 7E320207
>	s_cmp_eq_u32 s8, -1                                     ; BF06C108
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s5, s[0:3], 0x2c                    ; C202812C
>	s_buffer_load_dword s6, s[0:3], 0x2d                    ; C203012D
>	s_buffer_load_dword s7, s[0:3], 0x2e                    ; C203812E
>	s_buffer_load_dword s8, s[0:3], 0x2f                    ; C204012F
>	s_buffer_load_dword s9, s[0:3], 0x30                    ; C2048130
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	s_buffer_load_dword s5, s[0:3], 0x31                    ; C2028131
>	s_buffer_load_dword s6, s[0:3], 0x32                    ; C2030132
>	v_mov_b32_e32 v0, s7                                    ; 7E000207
>	v_sub_f32_e32 v26, s8, v23                              ; 08342E08
>	v_mov_b32_e32 v6, s9                                    ; 7E0C0209
>	s_buffer_load_dword s7, s[0:3], 0x33                    ; C2038133
>	s_buffer_load_dword s8, s[0:3], 0x34                    ; C2040134
>	s_buffer_load_dword s9, s[0:3], 0x35                    ; C2048135
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s5                                    ; 7E100205
>	v_mov_b32_e32 v7, s6                                    ; 7E0E0206
>	s_buffer_load_dword s5, s[0:3], 0x36                    ; C2028136
>	s_buffer_load_dword s6, s[0:3], 0x37                    ; C2030137
>	v_sub_f32_e32 v27, s7, v24                              ; 08363007
>	v_mov_b32_e32 v9, s8                                    ; 7E120208
>	v_mov_b32_e32 v17, s9                                   ; 7E220209
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v18, s5                                   ; 7E240205
>	v_sub_f32_e32 v28, s6, v25                              ; 08383206
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[12:15], s[10:11], 0x10                 ; C0860B10
>	s_movk_i32 s16, 0xbc                                    ; B01000BC
>	s_buffer_load_dword s5, s[0:3], 0x390                   ; C20280FF 00000390
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[12:15], 0 idxen ; E00C2000 80032108
>	s_movk_i32 s15, 0xb0                                    ; B00F00B0
>	s_movk_i32 s14, 0xb8                                    ; B00E00B8
>	s_movk_i32 s13, 0xb4                                    ; B00D00B4
>	s_cmp_eq_u32 s5, -1                                     ; BF06C105
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v0, v33                               ; 7E001121
>	v_mul_lo_i32 v18, v0, 48                                ; D2D60012 00016100
>	v_add_i32_e32 v0, vcc, s15, v18                         ; 4A00240F
>	v_add_i32_e32 v6, vcc, s14, v18                         ; 4A0C240E
>	v_add_i32_e32 v8, vcc, s16, v18                         ; 4A102410
>	v_add_i32_e32 v5, vcc, s13, v18                         ; 4A0A240D
>	buffer_load_dword v1, v0, s[0:3], 0 offen               ; E0301000 80000100
>	buffer_load_dword v0, v6, s[0:3], 0 offen               ; E0301000 80000006
>	buffer_load_dword v6, v8, s[0:3], 0 offen               ; E0301000 80000608
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v26, v23, v6                           ; 0A340D17
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v7, vcc, 0xcc, v18                        ; 4A0E24FF 000000CC
>	v_add_i32_e32 v27, vcc, 0xdc, v18                       ; 4A3624FF 000000DC
>	v_add_i32_e32 v9, vcc, 0xc8, v18                        ; 4A1224FF 000000C8
>	v_add_i32_e32 v6, vcc, 0xc0, v18                        ; 4A0C24FF 000000C0
>	v_add_i32_e32 v8, vcc, 0xc4, v18                        ; 4A1024FF 000000C4
>	v_add_i32_e32 v17, vcc, 0xd4, v18                       ; 4A2224FF 000000D4
>	buffer_load_dword v28, v7, s[0:3], 0 offen              ; E0301000 80001C07
>	buffer_load_dword v7, v9, s[0:3], 0 offen               ; E0301000 80000709
>	v_add_i32_e32 v9, vcc, 0xd0, v18                        ; 4A1224FF 000000D0
>	v_add_i32_e32 v18, vcc, 0xd8, v18                       ; 4A2424FF 000000D8
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v24, v28                          ; 0A363918
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_subrev_f32_e32 v28, v25, v29                          ; 0A383B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[8:11], s[10:11], 0xc                   ; C0840B0C
>	v_cvt_i32_f32_e32 v6, v34                               ; 7E0C1122
>	s_movk_i32 s5, 0xdc                                     ; B00500DC
>	s_movk_i32 s12, 0xcc                                    ; B00C00CC
>	v_add_i32_e32 v17, vcc, s5, v18                         ; 4A222405
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[8:11], 0 idxen  ; E00C2000 80021D07
>	s_movk_i32 s11, 0xc0                                    ; B00B00C0
>	s_movk_i32 s9, 0xc8                                     ; B00900C8
>	v_add_i32_e32 v7, vcc, s11, v18                         ; 4A0E240B
>	v_add_i32_e32 v9, vcc, s9, v18                          ; 4A122409
>	s_movk_i32 s10, 0xc4                                    ; B00A00C4
>	v_mul_lo_i32 v33, v6, 48                                ; D2D60021 00016106
>	v_add_i32_e32 v6, vcc, s12, v18                         ; 4A0C240C
>	s_movk_i32 s7, 0xd4                                     ; B00700D4
>	s_movk_i32 s8, 0xd0                                     ; B00800D0
>	s_movk_i32 s6, 0xd8                                     ; B00600D8
>	v_add_i32_e32 v8, vcc, s10, v18                         ; 4A10240A
>	v_add_i32_e32 v28, vcc, s7, v18                         ; 4A382407
>	buffer_load_dword v27, v6, s[0:3], 0 offen              ; E0301000 80001B06
>	v_add_i32_e32 v6, vcc, s8, v18                          ; 4A0C2408
>	v_add_i32_e32 v18, vcc, s6, v18                         ; 4A242406
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v8, v8, s[0:3], 0 offen               ; E0301000 80000808
>	buffer_load_dword v18, v18, s[0:3], 0 offen             ; E0301000 80001212
>	buffer_load_dword v34, v6, s[0:3], 0 offen              ; E0301000 80002206
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v1, v29, v1                               ; 1002031D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v0, v29, v0                               ; 1000011D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v25, v17                          ; 0A4A2319
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v6, v29, v7                               ; 100C0F1D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	v_subrev_f32_e32 v9, v24, v27                           ; 0A123718
>	v_mul_f32_e32 v27, v29, v9                              ; 1036131D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v17, v29, v28                             ; 1022391D
>	v_mul_f32_e32 v9, v29, v34                              ; 1012451D
>	v_mul_f32_e32 v18, v29, v18                             ; 1024251D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s16, v33                        ; 4A3A4210
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v23, v29                          ; 0A3A3B17
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v24, v29                          ; 0A3A3B18
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v30, v29                              ; 3E023B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s13, s[0:3], 0x394                  ; C20680FF 00000394
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s13, 0                                     ; BF06800D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v30, v29                              ; 3E003B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v30, v29                             ; 3E223B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v30, v29                             ; 3E243B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0xb0, v29                       ; 4A3C3AFF 000000B0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v31, v30                              ; 3E023D1F
>	v_add_i32_e32 v30, vcc, 0xbc, v29                       ; 4A3C3AFF 000000BC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v23, v30                          ; 0A3C3D17
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_add_i32_e32 v30, vcc, s12, v29                        ; 4A3C3A0C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v24, v30                          ; 0A3C3D18
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0xb4, v29                       ; 4A3C3AFF 000000B4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, 0xb8, v29                       ; 4A3C3AFF 000000B8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v31, v30                              ; 3E003D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v31, v30                             ; 3E223D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	v_add_i32_e32 v29, vcc, s5, v29                         ; 4A3A3A05
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v31, v30                             ; 3E243D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s5, s[0:3], 0x398                   ; C20280FF 00000398
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s5, 0                                      ; BF068005
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0xb0, v29                       ; 4A3C3AFF 000000B0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v1, v32, v30                              ; 3E023D20
>	v_add_i32_e32 v30, vcc, 0xbc, v29                       ; 4A3C3AFF 000000BC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v23, v30                          ; 0A3C3D17
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_add_i32_e32 v30, vcc, 0xcc, v29                       ; 4A3C3AFF 000000CC
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v24, v30                          ; 0A3C3D18
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0xb4, v29                       ; 4A3C3AFF 000000B4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0xb8, v29                       ; 4A3C3AFF 000000B8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v0, v32, v30                              ; 3E003D20
>	v_add_i32_e32 v30, vcc, 0xc0, v29                       ; 4A3C3AFF 000000C0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0xc4, v29                       ; 4A3C3AFF 000000C4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0xc8, v29                       ; 4A3C3AFF 000000C8
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0xd0, v29                       ; 4A3C3AFF 000000D0
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0xd4, v29                       ; 4A3C3AFF 000000D4
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v32, v30                             ; 3E223D20
>	v_add_i32_e32 v30, vcc, 0xd8, v29                       ; 4A3C3AFF 000000D8
>	v_add_i32_e32 v29, vcc, 0xdc, v29                       ; 4A3A3AFF 000000DC
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v25, v29                          ; 0A3A3B19
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v32, v30                             ; 3E243D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v20, s4, v20                              ; 10282804
>	v_mul_f32_e32 v19, s4, v19                              ; 10262604
>	v_mul_f32_e32 v29, v5, v20                              ; 103A2905
>	v_mul_f32_e32 v21, s4, v21                              ; 102A2A04
>	v_mac_f32_e32 v29, v1, v19                              ; 3E3A2701
>	v_mac_f32_e32 v29, v0, v21                              ; 3E3A2B00
>	v_mac_f32_e32 v29, v26, v22                             ; 3E3A2D1A
>	v_mul_f32_e32 v26, v8, v20                              ; 10342908
>	v_mac_f32_e32 v26, v6, v19                              ; 3E342706
>	v_mac_f32_e32 v26, v7, v21                              ; 3E342B07
>	s_buffer_load_dword s14, s[0:3], 0x1f                   ; C207011F
>	v_mac_f32_e32 v26, v27, v22                             ; 3E342D1B
>	v_mul_f32_e32 v27, v17, v20                             ; 10362911
>	v_mul_f32_e32 v20, 0, v20                               ; 10282880
>	s_buffer_load_dword s11, s[0:3], 0x1c                   ; C205811C
>	s_buffer_load_dword s12, s[0:3], 0x1d                   ; C206011D
>	s_buffer_load_dword s13, s[0:3], 0x1e                   ; C206811E
>	s_buffer_load_dword s18, s[0:3], 0x23                   ; C2090123
>	v_mac_f32_e32 v20, 0, v19                               ; 3E282680
>	s_buffer_load_dword s15, s[0:3], 0x20                   ; C2078120
>	s_buffer_load_dword s16, s[0:3], 0x21                   ; C2080121
>	s_buffer_load_dword s17, s[0:3], 0x22                   ; C2088122
>	s_buffer_load_dword s22, s[0:3], 0x27                   ; C20B0127
>	v_mac_f32_e32 v27, v9, v19                              ; 3E362709
>	v_mac_f32_e32 v20, 0, v21                               ; 3E282A80
>	s_buffer_load_dword s21, s[0:3], 0x26                   ; C20A8126
>	v_mac_f32_e32 v27, v18, v21                             ; 3E362B12
>	v_add_f32_e32 v19, v22, v20                             ; 06262916
>	v_add_f32_e32 v20, v23, v29                             ; 06283B17
>	s_buffer_load_dword s19, s[0:3], 0x24                   ; C2098124
>	s_buffer_load_dword s20, s[0:3], 0x25                   ; C20A0125
>	v_mac_f32_e32 v27, v28, v22                             ; 3E362D1C
>	v_add_f32_e32 v21, v24, v26                             ; 062A3518
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_subrev_f32_e32 v23, s14, v20                          ; 0A2E280E
>	s_buffer_load_dword s23, s[0:3], 0x28                   ; C20B8128
>	s_buffer_load_dword s24, s[0:3], 0x29                   ; C20C0129
>	s_buffer_load_dword s25, s[0:3], 0x3                    ; C20C8103
>	v_add_f32_e32 v22, v25, v27                             ; 062C3719
>	v_mul_f32_e32 v24, s11, v23                             ; 10302E0B
>	v_mul_f32_e32 v25, s12, v23                             ; 10322E0C
>	v_subrev_f32_e32 v26, s18, v21                          ; 0A342A12
>	v_mul_f32_e32 v23, s13, v23                             ; 102E2E0D
>	s_buffer_load_dword s4, s[0:3], 0x7                     ; C2020107
>	v_mac_f32_e32 v24, s15, v26                             ; 3E30340F
>	v_mac_f32_e32 v25, s16, v26                             ; 3E323410
>	v_mac_f32_e32 v23, s17, v26                             ; 3E2E3411
>	v_subrev_f32_e32 v26, s22, v22                          ; 0A342C16
>	v_mac_f32_e32 v23, s21, v26                             ; 3E2E3415
>	v_mac_f32_e32 v24, s19, v26                             ; 3E303413
>	v_mac_f32_e32 v25, s20, v26                             ; 3E323414
>	v_mul_f32_e32 v26, 0.5, v23                             ; 10342EF0
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mad_f32 v24, s23, v24, v26                            ; D2820018 046A3017
>	v_mac_f32_e32 v26, s24, v25                             ; 3E343218
>	v_mul_f32_e32 v25, s25, v20                             ; 10322819
>	v_mac_f32_e32 v25, s4, v21                              ; 3E322A04
>	s_buffer_load_dword s4, s[0:3], 0xb                     ; C202010B
>	s_buffer_load_dword s5, s[0:3], 0xf                     ; C202810F
>	s_buffer_load_dword s10, s[0:3], 0x1b                   ; C205011B
>	s_buffer_load_dword s17, s[0:3], 0x6                    ; C2088106
>	s_buffer_load_dword s6, s[0:3], 0x14                    ; C2030114
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v25, s4, v22                              ; 3E322C04
>	v_mac_f32_e32 v25, s5, v19                              ; 3E322605
>	s_buffer_load_dword s5, s[0:3], 0x2b                    ; C202812B
>	s_buffer_load_dword s4, s[0:3], 0x2a                    ; C202012A
>	v_mul_f32_e32 v27, s10, v25                             ; 1036320A
>	s_buffer_load_dword s10, s[0:3], 0x2                    ; C2050102
>	exp 15, 32, 0, 0, 0, v20, v21, v22, v27                 ; F800020F 1B161514
>	s_waitcnt expcnt(0) lgkmcnt(0)                          ; BF8C000F
>	v_mov_b32_e32 v27, s5                                   ; 7E360205
>	v_mac_f32_e32 v27, s4, v23                              ; 3E362E04
>	s_buffer_load_dword s7, s[0:3], 0x15                    ; C2038115
>	s_buffer_load_dword s8, s[0:3], 0x16                    ; C2040116
>	s_buffer_load_dword s9, s[0:3], 0x17                    ; C2048117
>	s_buffer_load_dword s26, s[0:3], 0x4                    ; C20D0104
>	s_buffer_load_dword s11, s[0:3], 0x8                    ; C2058108
>	s_buffer_load_dword s12, s[0:3], 0x9                    ; C2060109
>	s_buffer_load_dword s13, s[0:3], 0xc                    ; C206810C
>	s_buffer_load_dword s14, s[0:3], 0xd                    ; C207010D
>	s_buffer_load_dword s15, s[0:3], 0xe                    ; C207810E
>	v_add_f32_e32 v14, v14, v14                             ; 061C1D0E
>	v_add_f32_e32 v10, v10, v10                             ; 0614150A
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	s_buffer_load_dword s16, s[0:3], 0x5                    ; C2080105
>	s_buffer_load_dword s0, s[0:3], 0xa                     ; C200010A
>	exp 15, 33, 0, 0, 0, v24, v26, v27, v23                 ; F800021F 171B1A18
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mad_f32 v23, v14, v1, -v1                             ; D2820017 8406030E
>	v_mad_f32 v15, 2.0, v15, -1.0                           ; D282000F 03CE1EF4
>	v_mad_f32 v11, 2.0, v11, -1.0                           ; D282000B 03CE16F4
>	v_mad_f32 v1, v10, v1, -v1                              ; D2820001 8406030A
>	v_mad_f32 v24, v14, v6, -v6                             ; D2820018 841A0D0E
>	v_mac_f32_e32 v23, v5, v15                              ; 3E2E1F05
>	v_mac_f32_e32 v1, v5, v11                               ; 3E021705
>	v_mad_f32 v5, v10, v6, -v6                              ; D2820005 841A0D0A
>	v_mac_f32_e32 v24, v8, v15                              ; 3E301F08
>	v_mac_f32_e32 v5, v8, v11                               ; 3E0A1708
>	v_mul_f32_e32 v8, s10, v20                              ; 1010280A
>	v_mac_f32_e32 v8, s17, v21                              ; 3E102A11
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v8, s0, v22                               ; 3E102C00
>	v_mad_f32 v6, v10, v9, -v9                              ; D2820006 8426130A
>	v_mad_f32 v14, v14, v9, -v9                             ; D282000E 8426130E
>	v_mac_f32_e32 v8, s15, v19                              ; 3E10260F
>	v_mov_b32_e32 v9, s6                                    ; 7E120206
>	v_mac_f32_e32 v9, s7, v8                                ; 3E121007
>	v_add_f32_e64 v9, v9, 0 clamp                           ; D2060809 00010109
>	v_log_f32_e32 v9, v9                                    ; 7E124F09
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v12, 2.0, v12, -1.0                           ; D282000C 03CE18F4
>	v_mac_f32_e32 v14, v17, v15                             ; 3E1C1F11
>	v_mul_legacy_f32_e32 v9, s8, v9                         ; 0E121208
>	v_mac_f32_e32 v23, v0, v16                              ; 3E2E2100
>	v_mac_f32_e32 v1, v0, v12                               ; 3E021900
>	v_mul_f32_e32 v0, s4, v20                               ; 10002804
>	v_mac_f32_e32 v6, v17, v11                              ; 3E0C1711
>	v_mac_f32_e32 v0, s26, v21                              ; 3E002A1A
>	v_mac_f32_e32 v14, v18, v16                             ; 3E1C2112
>	v_mac_f32_e32 v5, v7, v12                               ; 3E0A1907
>	v_exp_f32_e32 v9, v9                                    ; 7E124B09
>	v_sub_f32_e64 v10, 1.0, s9                              ; D208000A 000012F2
>	v_mac_f32_e32 v10, s9, v9                               ; 3E141209
>	v_mac_f32_e32 v0, s11, v22                              ; 3E002C0B
>	v_mac_f32_e32 v24, v7, v16                              ; 3E302107
>	v_mac_f32_e32 v6, v18, v12                              ; 3E0C1912
>	v_mul_f32_e32 v9, v5, v14                               ; 10121D05
>	v_mul_f32_e32 v11, v6, v23                              ; 10162F06
>	v_mul_f32_e32 v12, v1, v24                              ; 10183101
>	v_add_f32_e32 v13, v13, v13                             ; 061A1B0D
>	v_mad_f32 v9, v24, v6, -v9                              ; D2820009 84260D18
>	v_mac_f32_e32 v0, s13, v19                              ; 3E00260D
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_mul_f32_e32 v7, s5, v20                               ; 100E2805
>	v_mad_f32 v11, v14, v1, -v11                            ; D282000B 842E030E
>	v_mad_f32 v12, v23, v5, -v12                            ; D282000C 84320B17
>	v_mad_f32 v9, v13, v9, -v9                              ; D2820009 8426130D
>	exp 15, 34, 0, 0, 0, v3, v4, v10, v0                    ; F800022F 000A0403
>	v_mac_f32_e32 v7, s16, v21                              ; 3E0E2A10
>	v_mad_f32 v11, v13, v11, -v11                           ; D282000B 842E170D
>	v_mad_f32 v12, v13, v12, -v12                           ; D282000C 8432190D
>	exp 15, 35, 0, 0, 0, v1, v5, v6, v9                     ; F800023F 09060501
>	v_mac_f32_e32 v7, s12, v22                              ; 3E0E2C0C
>	exp 15, 36, 0, 0, 0, v11, v12, v23, v24                 ; F800024F 18170C0B
>	v_mac_f32_e32 v7, s14, v19                              ; 3E0E260E
>	exp 15, 37, 0, 0, 0, v14, v0, v0, v0                    ; F800025F 0000000E
>	exp 15, 12, 0, 1, 0, v0, v7, v8, v25                    ; F80008CF 19080700
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2352 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v20, v4, 3, 3, [m0]                             ; C8500F04
>	v_interp_p2_f32 v20, [v20], v5, 3, 3, [m0]                      ; C8510F05
>	v_interp_p1_f32 v21, v4, 0, 4, [m0]                             ; C8541004
>	v_interp_p2_f32 v21, [v21], v5, 0, 4, [m0]                      ; C8551005
>	v_interp_p1_f32 v22, v4, 1, 4, [m0]                             ; C8581104
>	v_interp_p2_f32 v22, [v22], v5, 1, 4, [m0]                      ; C8591105
>	v_interp_p1_f32 v1, v4, 2, 4, [m0]                              ; C8041204
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	v_interp_p2_f32 v1, [v1], v5, 2, 4, [m0]                        ; C8051205
>	v_interp_p1_f32 v2, v4, 3, 4, [m0]                              ; C8081304
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v2, [v2], v5, 3, 4, [m0]                        ; C8091305
>	v_interp_p1_f32 v7, v4, 0, 5, [m0]                              ; C81C1404
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v7, [v7], v5, 0, 5, [m0]                        ; C81D1405
>	v_interp_p1_f32 v12, v6, 0, 0, [m0]                             ; C8300006
>	v_interp_p2_f32 v12, [v12], v3, 0, 0, [m0]                      ; C8310003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v24, s8, v12                                      ; 08301808
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v14, v6, 2, 0, [m0]                             ; C8380206
>	v_sub_f32_e32 v25, s9, v0                                       ; 08320009
>	v_mul_f32_e32 v8, v24, v24                                      ; 10103118
>	v_interp_p2_f32 v14, [v14], v3, 2, 0, [m0]                      ; C8390203
>	v_sub_f32_e32 v26, s12, v14                                     ; 08341C0C
>	v_mac_f32_e32 v8, v25, v25                                      ; 3E103319
>	v_mac_f32_e32 v8, v26, v26                                      ; 3E10351A
>	v_rsq_f32_e32 v27, v8                                           ; 7E365D08
>	v_mul_f32_e32 v8, v1, v1                                        ; 10100301
>	v_mac_f32_e32 v8, v2, v2                                        ; 3E100502
>	v_mac_f32_e32 v8, v7, v7                                        ; 3E100F07
>	v_rsq_f32_e32 v8, v8                                            ; 7E105D08
>	s_load_dwordx4 s[36:39], s[4:5], 0x4c                           ; C092054C
>	s_load_dwordx8 s[28:35], s[4:5], 0x40                           ; C0CE0540
>	s_load_dwordx8 s[12:19], s[4:5], 0x50                           ; C0C60550
>	s_load_dwordx4 s[44:47], s[4:5], 0x5c                           ; C096055C
>	s_load_dwordx4 s[40:43], s[4:5], 0x6c                           ; C094056C
>	s_load_dwordx8 s[20:27], s[4:5], 0x60                           ; C0CA0560
>	v_mul_f32_e32 v28, v8, v1                                       ; 10380308
>	v_interp_p1_f32 v1, v6, 0, 2, [m0]                              ; C8040806
>	v_mul_f32_e32 v29, v8, v2                                       ; 103A0508
>	v_interp_p2_f32 v1, [v1], v3, 0, 2, [m0]                        ; C8050803
>	v_interp_p1_f32 v2, v6, 1, 2, [m0]                              ; C8080906
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s40, s40, s27                                         ; 87281B28
>	s_and_b32 s44, s44, s19                                         ; 872C132C
>	v_interp_p2_f32 v2, [v2], v3, 1, 2, [m0]                        ; C8090903
>	s_and_b32 s36, s36, s35                                         ; 87242324
>	v_mul_f32_e32 v30, v8, v7                                       ; 103C0F08
>	image_sample v[7:9], v[1:2], s[28:35], s[36:39] dmask:0x7       ; F0800700 01270701
>	image_sample v[10:11], v[1:2], s[20:27], s[40:43] dmask:0x6     ; F0800600 01450A01
>	image_sample v[18:19], v[1:2], s[12:19], s[44:47] dmask:0xa     ; F0800A00 01631201
>	v_interp_p1_f32 v23, v4, 0, 3, [m0]                             ; C85C0C04
>	s_buffer_load_dword s8, s[0:3], 0x11                            ; C2040111
>	v_interp_p2_f32 v23, [v23], v5, 0, 3, [m0]                      ; C85D0C05
>	v_interp_p1_f32 v33, v4, 1, 3, [m0]                             ; C8840D04
>	v_interp_p2_f32 v33, [v33], v5, 1, 3, [m0]                      ; C8850D05
>	v_interp_p1_f32 v4, v4, 2, 3, [m0]                              ; C8100E04
>	v_interp_p2_f32 v4, [v4], v5, 2, 3, [m0]                        ; C8110E05
>	v_mov_b32_e32 v5, 0x403b800a                                    ; 7E0A02FF 403B800A
>	v_mad_f32 v15, v5, v28, v12                                     ; D282000F 04323905
>	s_buffer_load_dword s12, s[0:3], 0x10                           ; C2060110
>	s_buffer_load_dword s9, s[0:3], 0x12                            ; C2048112
>	s_buffer_load_dword s51, s[0:3], 0x15                           ; C2198115
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v17, s8, v15                                      ; 10221E08
>	s_buffer_load_dword s8, s[0:3], 0x19                            ; C2040119
>	v_mad_f32 v34, v5, v29, v0                                      ; D2820022 04023B05
>	s_buffer_load_dword s50, s[0:3], 0x14                           ; C2190114
>	s_buffer_load_dword s52, s[0:3], 0x16                           ; C21A0116
>	v_mul_f32_e32 v16, s12, v15                                     ; 10201E0C
>	v_mul_f32_e32 v15, s9, v15                                      ; 101E1E09
>	s_buffer_load_dword s53, s[0:3], 0x18                           ; C21A8118
>	v_mac_f32_e32 v17, s51, v34                                     ; 3E224433
>	v_mad_f32 v5, v5, v30, v14                                      ; D2820005 043A3D05
>	s_buffer_load_dword s9, s[0:3], 0x1a                            ; C204811A
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v17, s8, v5                                       ; 3E220A08
>	s_buffer_load_dword s13, s[0:3], 0x1d                           ; C206811D
>	s_buffer_load_dword s12, s[0:3], 0x1c                           ; C206011C
>	s_buffer_load_dword s8, s[0:3], 0x1e                            ; C204011E
>	s_load_dwordx8 s[20:27], s[4:5], 0x0                            ; C0CA0500
>	s_load_dwordx4 s[28:31], s[4:5], 0xc                            ; C08E050C
>	v_mac_f32_e32 v16, s50, v34                                     ; 3E204432
>	v_mac_f32_e32 v15, s52, v34                                     ; 3E1E4434
>	v_mac_f32_e32 v15, s9, v5                                       ; 3E1E0A09
>	v_mac_f32_e32 v16, s53, v5                                      ; 3E200A35
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_add_f32_e32 v15, s8, v15                                      ; 061E1E08
>	v_add_f32_e32 v16, s12, v16                                     ; 0620200C
>	v_add_f32_e32 v17, s13, v17                                     ; 0622220D
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	image_sample_c v34, v[15:18], s[20:27], s[28:31] dmask:0x1      ; F0A00100 00E5220F
>	v_add_f32_e32 v16, v19, v19                                     ; 06202713
>	v_mad_f32 v17, 2.0, v19, -1.0                                   ; D2820011 03CE26F4
>	v_add_f32_e32 v19, v18, v18                                     ; 06262512
>	v_mad_f32 v18, 2.0, v18, -1.0                                   ; D2820012 03CE24F4
>	v_mad_f32 v5, v16, v33, -v33                                    ; D2820005 84864310
>	v_mad_f32 v15, v16, v23, -v23                                   ; D282000F 845E2F10
>	v_mad_f32 v4, v16, v4, -v4                                      ; D2820004 84120910
>	v_mad_f32 v16, v19, v18, -v18                                   ; D2820010 844A2513
>	v_mac_f32_e32 v16, v17, v17                                     ; 3E202311
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	v_sub_f32_e32 v16, 0x3f8020c5, v16                              ; 082020FF 3F8020C5
>	v_mac_f32_e32 v15, v18, v20                                     ; 3E1E2912
>	v_sqrt_f32_e32 v16, v16                                         ; 7E206710
>	v_mac_f32_e32 v5, v18, v21                                      ; 3E0A2B12
>	v_mac_f32_e32 v4, v18, v22                                      ; 3E082D12
>	v_mac_f32_e32 v15, v16, v28                                     ; 3E1E3910
>	v_mac_f32_e32 v5, v16, v29                                      ; 3E0A3B10
>	v_mac_f32_e32 v4, v16, v30                                      ; 3E083D10
>	v_cubema_f32 v16, v15, v5, v4                                   ; D28E0010 04120B0F
>	v_rcp_f32_e64 v17, |v16|                                        ; D3540111 00000110
>	v_mul_f32_e32 v31, v27, v24                                     ; 103E311B
>	v_cubetc_f32 v18, v15, v5, v4                                   ; D28C0012 04120B0F
>	v_mov_b32_e32 v16, 0x3fc00000                                   ; 7E2002FF 3FC00000
>	v_cubesc_f32 v19, v15, v5, v4                                   ; D28A0013 04120B0F
>	v_mul_f32_e32 v32, v27, v25                                     ; 1040331B
>	v_mad_f32 v21, v17, v18, v16                                    ; D2820015 04422511
>	v_mad_f32 v20, v17, v19, v16                                    ; D2820014 04422711
>	v_mul_f32_e32 v17, v31, v15                                     ; 10221F1F
>	v_mac_f32_e32 v17, v32, v5                                      ; 3E220B20
>	v_mul_f32_e32 v33, v27, v26                                     ; 1042351B
>	v_mac_f32_e32 v17, v33, v4                                      ; 3E220921
>	v_mul_f32_e32 v35, v15, v17                                     ; 1046230F
>	v_mul_f32_e32 v36, v5, v17                                      ; 10482305
>	v_mul_f32_e32 v37, v4, v17                                      ; 104A2304
>	v_mac_f32_e32 v35, v15, v17                                     ; 3E46230F
>	v_mac_f32_e32 v36, v5, v17                                      ; 3E482305
>	v_mac_f32_e32 v37, v4, v17                                      ; 3E4A2304
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_sub_f32_e32 v17, 1.0, v17                                     ; 082222F2
>	v_mad_f32 v19, -v24, v27, v35                                   ; D2820013 248E3718
>	v_mad_f32 v22, -v25, v27, v36                                   ; D2820016 24923719
>	v_mad_f32 v23, -v26, v27, v37                                   ; D2820017 2496371A
>	v_log_f32_e32 v17, v17                                          ; 7E224F11
>	s_load_dwordx8 s[12:19], s[4:5], 0x10                           ; C0C60510
>	s_load_dwordx4 s[32:35], s[4:5], 0x1c                           ; C090051C
>	v_cubetc_f32 v38, v19, v22, v23                                 ; D28C0026 045E2D13
>	v_cubeid_f32 v18, v19, v22, v23                                 ; D2880012 045E2D13
>	v_cubesc_f32 v39, v19, v22, v23                                 ; D28A0027 045E2D13
>	v_cubema_f32 v22, v19, v22, v23                                 ; D28E0016 045E2D13
>	v_rcp_f32_e64 v22, |v22|                                        ; D3540116 00000116
>	s_load_dwordx4 s[28:31], s[4:5], 0x2c                           ; C08E052C
>	s_load_dwordx8 s[20:27], s[4:5], 0x20                           ; C0CA0520
>	v_mov_b32_e32 v19, 0x40c00000                                   ; 7E2602FF 40C00000
>	v_mul_legacy_f32_e32 v17, 0x40a00000, v17                       ; 0E2222FF 40A00000
>	s_buffer_load_dword s48, s[0:3], 0x4                            ; C2180104
>	v_mad_f32 v19, -v11, v19, v19                                   ; D2820013 244E270B
>	v_exp_f32_e32 v23, v17                                          ; 7E2E4B11
>	v_mad_f32 v17, v22, v38, v16                                    ; D2820011 04424D16
>	v_max_f32_e32 v11, 0, v11                                       ; 20161680
>	v_mac_f32_e32 v16, v22, v39                                     ; 3E204F16
>	s_buffer_load_dword s49, s[0:3], 0x5                            ; C2188105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_cubeid_f32 v22, v15, v5, v4                                   ; D2880016 04120B0F
>	v_mul_f32_e32 v38, v11, v23                                     ; 104C2F0B
>	image_sample v[20:23], v[20:23], s[12:19], s[32:35] dmask:0xf   ; F0800F00 01031414
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	s_buffer_load_dword s9, s[0:3], 0xc                             ; C204810C
>	s_buffer_load_dword s12, s[0:3], 0xd                            ; C206010D
>	s_buffer_load_dword s13, s[0:3], 0xe                            ; C206810E
>	image_sample_l v[17:19], v[16:19], s[20:27], s[28:31] dmask:0x7 ; F0900700 00E51110
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v16, v18, v38                                     ; 10204D12
>	v_mad_f32 v18, v24, v27, -v35                                   ; D2820012 848E3718
>	v_mul_f32_e32 v11, v17, v38                                     ; 10164D11
>	v_mul_f32_e32 v17, v19, v38                                     ; 10224D13
>	v_mul_f32_e32 v38, v23, v20                                     ; 104C2917
>	v_mul_f32_e32 v21, v23, v21                                     ; 102A2B17
>	v_mul_f32_e32 v22, v23, v22                                     ; 102C2D17
>	v_mul_f32_e32 v23, v28, v18                                     ; 102E251C
>	v_mul_f32_e32 v18, s48, v15                                     ; 10241E30
>	v_mad_f32 v19, v25, v27, -v36                                   ; D2820013 84923719
>	v_mad_f32 v18, -s49, v5, -v18                                   ; D2820012 A44A0A31
>	v_mac_f32_e32 v23, v29, v19                                     ; 3E2E271D
>	v_mad_f32 v20, v26, v27, -v37                                   ; D2820014 8496371A
>	v_mul_f32_e32 v19, v34, v34                                     ; 10264522
>	v_mul_f32_e32 v24, v28, v31                                     ; 10303F1C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v18, -s8, v4, v18                                     ; D2820012 244A0808
>	v_mul_f32_e32 v25, s12, v19                                     ; 1032260C
>	v_mac_f32_e32 v23, v30, v20                                     ; 3E2E291E
>	v_mul_f32_e32 v20, s9, v19                                      ; 10282609
>	v_mul_f32_e32 v19, s13, v19                                     ; 1026260D
>	v_mac_f32_e32 v24, v29, v32                                     ; 3E30411D
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v20, v10, v20                                     ; 1028290A
>	v_mul_f32_e32 v25, v10, v25                                     ; 1032330A
>	v_mul_f32_e32 v26, v10, v19                                     ; 1034270A
>	v_mul_f32_e32 v19, v25, v18                                     ; 10262519
>	v_mul_f32_e32 v20, v20, v18                                     ; 10282514
>	v_mul_f32_e32 v25, 4.0, v10                                     ; 103214F6
>	v_mul_f32_e32 v18, v26, v18                                     ; 1024251A
>	v_mac_f32_e32 v24, v30, v33                                     ; 3E30431E
>	v_mac_f32_e32 v18, v25, v22                                     ; 3E242D19
>	v_sub_f32_e32 v22, 1.0, v24                                     ; 082C30F2
>	v_mac_f32_e32 v19, v25, v21                                     ; 3E262B19
>	v_add_f32_e32 v21, 1.0, v23                                     ; 062A2EF2
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_subrev_f32_e32 v21, v22, v21                                  ; 0A2A2B16
>	v_add_f32_e64 v21, v21, 0 clamp                                 ; D2060815 00010115
>	v_sub_f32_e32 v22, 1.0, v21                                     ; 082C2AF2
>	v_mad_f32 v21, -v21, v22, v22                                   ; D2820015 245A2D15
>	v_mac_f32_e32 v20, v25, v38                                     ; 3E284D19
>	v_mul_f32_e32 v21, v21, v10                                     ; 102A1515
>	v_mov_b32_e32 v22, 0xc8                                         ; 7E2C02FF 000000C8
>	v_mov_b32_e32 v23, 0                                            ; 7E2E0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v24, vcc, 0xffffffe8, v22                         ; 4A302CFF FFFFFFE8
>	buffer_load_dword v24, v24, s[0:3], 0 offen                     ; E0301000 80001818
>	v_add_i32_e32 v25, vcc, 0xffffffec, v22                         ; 4A322CFF FFFFFFEC
>	buffer_load_dword v25, v25, s[0:3], 0 offen                     ; E0301000 80001919
>	v_add_i32_e32 v26, vcc, -16, v22                                ; 4A342CD0
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_add_i32_e32 v29, vcc, -12, v22                                ; 4A3A2CCC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -8, v22                                 ; 4A3C2CC8
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v23, vcc, 1, v23                                  ; 4A2E2E81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v24, v12, v24                                  ; 0A30310C
>	v_mul_f32_e32 v27, v24, v24                                     ; 10363118
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v25, v0, v25                                   ; 0A323300
>	v_mac_f32_e32 v27, v25, v25                                     ; 3E363319
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v26, v14, v26                                  ; 0A34350E
>	v_mac_f32_e32 v27, v26, v26                                     ; 3E36351A
>	v_rsq_f32_e32 v28, v27                                          ; 7E385D1B
>	v_mul_f32_e32 v24, v28, v24                                     ; 1030311C
>	v_mul_f32_e32 v27, v28, v27                                     ; 1036371C
>	v_mul_f32_e32 v25, v28, v25                                     ; 1032331C
>	v_mul_f32_e32 v26, v28, v26                                     ; 1034351C
>	v_add_i32_e32 v28, vcc, -4, v22                                 ; 4A382CC4
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v27, v29, v27                                     ; 1036371D
>	buffer_load_dword v29, v22, s[0:3], 0 offen                     ; E0301000 80001D16
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_mul_f32_e32 v24, v15, v24                                     ; 1030310F
>	v_mac_f32_e32 v24, v5, v25                                      ; 3E303305
>	v_add_f32_e64 v25, v27, 0 clamp                                 ; D2060819 0001011B
>	v_mac_f32_e32 v24, v4, v26                                      ; 3E303504
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v26, -v25, v30, v30                                   ; D282001A 247A3D19
>	v_add_f32_e64 v24, v24, 0 clamp                                 ; D2060818 00010118
>	v_mul_f32_e32 v26, v10, v26                                     ; 1034350A
>	v_mac_f32_e32 v20, v26, v24                                     ; 3E28311A
>	v_add_i32_e32 v22, vcc, 32, v22                                 ; 4A2C2CA0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v27, -v25, v28, v28                                   ; D282001B 24723919
>	v_mad_f32 v25, -v25, v29, v29                                   ; D2820019 24763B19
>	v_mul_f32_e32 v27, v10, v27                                     ; 1036370A
>	v_mul_f32_e32 v25, v10, v25                                     ; 1032330A
>	v_mac_f32_e32 v19, v27, v24                                     ; 3E26311B
>	v_mac_f32_e32 v18, v25, v24                                     ; 3E243119
>	v_cmp_lt_i32_e32 vcc, 2, v23                                    ; 7D022E82
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_buffer_load_dword s8, s[0:3], 0x47                            ; C2040147
>	s_buffer_load_dword s9, s[0:3], 0x4b                            ; C204814B
>	s_buffer_load_dword s12, s[0:3], 0x4f                           ; C206014F
>	s_buffer_load_dword s14, s[0:3], 0x53                           ; C2070153
>	s_buffer_load_dword s13, s[0:3], 0x52                           ; C2068152
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v12, s8, v12                                      ; 08181808
>	v_sub_f32_e32 v24, s9, v0                                       ; 08300009
>	v_mul_f32_e32 v25, v12, v12                                     ; 1032190C
>	v_sub_f32_e32 v14, s12, v14                                     ; 081C1C0C
>	v_mac_f32_e32 v25, v24, v24                                     ; 3E323118
>	v_mac_f32_e32 v25, v14, v14                                     ; 3E321D0E
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v27, v6, 2, 1, [m0]                             ; C86C0606
>	v_sqrt_f32_e32 v22, v25                                         ; 7E2C6719
>	v_mov_b32_e32 v26, s14                                          ; 7E34020E
>	v_mac_f32_e32 v26, s13, v22                                     ; 3E342C0D
>	v_interp_p2_f32 v27, [v27], v3, 2, 1, [m0]                      ; C86D0603
>	v_interp_p1_f32 v22, v6, 0, 1, [m0]                             ; C8580406
>	v_interp_p2_f32 v22, [v22], v3, 0, 1, [m0]                      ; C8590403
>	v_interp_p1_f32 v23, v6, 1, 1, [m0]                             ; C85C0506
>	v_interp_p2_f32 v23, [v23], v3, 1, 1, [m0]                      ; C85D0503
>	v_interp_p1_f32 v28, v6, 3, 1, [m0]                             ; C8700706
>	v_interp_p2_f32 v28, [v28], v3, 3, 1, [m0]                      ; C8710703
>	v_mov_b32_e32 v29, 0x6f800000                                   ; 7E3A02FF 6F800000
>	v_cmp_lt_f32_e64 vcc, v29, |v28|                                ; D002026A 0002391D
>	v_mov_b32_e32 v29, 0x2f800000                                   ; 7E3A02FF 2F800000
>	v_cndmask_b32_e32 v29, 1.0, v29, vcc                            ; 003A3AF2
>	v_mul_f32_e32 v28, v29, v28                                     ; 1038391D
>	v_rcp_f32_e32 v28, v28                                          ; 7E38551C
>	s_load_dwordx8 s[12:19], s[4:5], 0x30                           ; C0C60530
>	s_load_dwordx4 s[20:23], s[4:5], 0x3c                           ; C08A053C
>	v_mul_f32_e32 v22, v28, v22                                     ; 102C2D1C
>	v_mul_f32_e32 v23, v28, v23                                     ; 102E2F1C
>	v_mul_f32_e32 v22, v22, v29                                     ; 102C3B16
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s20, s20, s19                                         ; 87141314
>	v_mul_f32_e32 v23, v23, v29                                     ; 102E3B17
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	image_sample v22, v[22:23], s[12:19], s[20:23] dmask:0x8        ; F0800800 00A31616
>	v_rsq_f32_e32 v23, v25                                          ; 7E2E5D19
>	s_load_dwordx8 s[12:19], s[4:5], 0x70                           ; C0C60570
>	s_load_dwordx4 s[4:7], s[4:5], 0x7c                             ; C082057C
>	v_add_f32_e32 v25, -0.5, v26                                    ; 063234F1
>	v_mad_f32 v25, v25, -2.0, 1.0                                   ; D2820019 03C9EB19
>	v_mul_f32_e32 v12, v23, v12                                     ; 10181917
>	v_mul_f32_e32 v12, v15, v12                                     ; 1018190F
>	v_mul_f32_e32 v15, v23, v24                                     ; 101E3117
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v22, v22, v22                                     ; 102C2D16
>	v_add_f32_e64 v25, v25, 0 clamp                                 ; D2060819 00010119
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	v_mac_f32_e32 v12, v5, v15                                      ; 3E181F05
>	v_mul_f32_e32 v5, v23, v14                                      ; 100A1D17
>	v_mul_f32_e32 v25, v25, v22                                     ; 10322D19
>	image_sample v[22:24], v[1:2], s[12:19], s[4:7] dmask:0x7       ; F0800700 00231601
>	s_buffer_load_dword s5, s[0:3], 0x70                            ; C2028170
>	s_buffer_load_dword s4, s[0:3], 0x6f                            ; C202016F
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v22                               ; 10022CFF 3E99999A
>	v_mac_f32_e32 v1, 0x3f170a3d, v23                               ; 3E022EFF 3F170A3D
>	v_mac_f32_e32 v1, 0x3de147ae, v24                               ; 3E0230FF 3DE147AE
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v1, s5, v1                                        ; 10020205
>	v_mac_f32_e32 v1, s4, v1                                        ; 3E020204
>	s_buffer_load_dword s4, s[0:3], 0x54                            ; C2020154
>	s_buffer_load_dword s5, s[0:3], 0x55                            ; C2028155
>	s_buffer_load_dword s6, s[0:3], 0x56                            ; C2030156
>	v_mac_f32_e32 v12, v4, v5                                       ; 3E180B04
>	v_add_f32_e64 v4, v27, 0 clamp                                  ; D2060804 0001011B
>	v_mul_f32_e32 v4, v4, v25                                       ; 10083304
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v14, s4, v4                                       ; 101C0804
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mul_f32_e32 v15, s5, v4                                       ; 101E0805
>	v_mul_f32_e32 v4, s6, v4                                        ; 10080806
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v14, v10, v14                                     ; 101C1D0A
>	v_mul_f32_e32 v15, v10, v15                                     ; 101E1F0A
>	v_mul_f32_e32 v4, v10, v4                                       ; 1008090A
>	v_add_f32_e64 v10, v12, 0 clamp                                 ; D206080A 0001010C
>	v_mac_f32_e32 v18, v4, v10                                      ; 3E241504
>	v_mul_f32_e32 v4, v21, v11                                      ; 10081715
>	v_mac_f32_e32 v20, v14, v10                                     ; 3E28150E
>	v_mac_f32_e32 v4, v7, v20                                       ; 3E082907
>	v_mul_f32_e32 v2, v1, v22                                       ; 10042D01
>	v_mov_b32_e32 v7, 0x42000000                                    ; 7E0E02FF 42000000
>	v_mac_f32_e32 v4, v7, v2                                        ; 3E080507
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v11, v21, v17                                     ; 10162315
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v5, v1, v23                                       ; 100A2F01
>	v_mul_f32_e32 v1, v1, v24                                       ; 10023101
>	v_mac_f32_e32 v11, v9, v18                                      ; 3E162509
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v11, v7, v1                                       ; 3E160307
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	v_interp_p1_f32 v1, v6, 2, 2, [m0]                              ; C8040A06
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v19, v15, v10                                     ; 3E26150F
>	v_mul_f32_e32 v10, v21, v16                                     ; 10142115
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mac_f32_e32 v10, v8, v19                                      ; 3E142708
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 2, 2, [m0]                        ; C8050A03
>	v_mac_f32_e32 v10, v7, v5                                       ; 3E140B07
>	v_mul_f32_e32 v5, v0, v1                                        ; 100A0300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v5, s6, s6                                       ; D2820000 20180D05
>	v_mac_f32_e32 v0, v5, v4                                        ; 3E000905
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_mad_f32 v1, -v5, s7, s7                                       ; D2820001 201C0F05
>	v_mad_f32 v2, -v5, s0, s0                                       ; D2820002 20000105
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mac_f32_e32 v1, v5, v10                                       ; 3E021505
>	v_mac_f32_e32 v2, v5, v11                                       ; 3E041705
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 56
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1968 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>FRAG
>DCL SV[0], POSITION
>DCL OUT[0], COLOR
>DCL SAMP[0]
>DCL SVIEW[0], 2D, FLOAT
>DCL CONST[1..2]
>DCL TEMP[0]
>DCL TEMP[1], LOCAL
>IMM[0] FLT32 {    0.1250,     0.2500,     1.0000,     0.0000}
>  0: MOV TEMP[0], SV[0]
>  1: MAD TEMP[0].y, SV[0], CONST[2].xxxx, CONST[2].yyyy
>  2: MUL TEMP[1].xy, TEMP[0].xyyy, IMM[0].xyyy
>  3: MOV TEMP[1].xy, TEMP[1].xyyy
>  4: TEX TEMP[1].x, TEMP[1], SAMP[0], 2D
>  5: ADD TEMP[1].x, CONST[1].xxxx, -TEMP[1].xxxx
>  6: ABS TEMP[1].x, TEMP[1].xxxx
>  7: FSLT TEMP[1].x, CONST[1].yyyy, TEMP[1].xxxx
>  8: AND TEMP[1].x, TEMP[1].xxxx, IMM[0].zzzz
>  9: KILL_IF -TEMP[1].xxxx
> 10: MOV OUT[0], IMM[0].wwww
> 11: END
>radeonsi: Compiling shader 141
>TGSI shader LLVM IR:
>
>; ModuleID = 'tgsi'
>source_filename = "tgsi"
>target triple = "amdgcn--"
>
>define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615), [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, i32, i32, float, i32) #0 {
>main_body:
>  %23 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %24 = load <16 x i8>, <16 x i8> addrspace(2)* %23, align 16, !invariant.load !0
>  %25 = call float @llvm.SI.load.const(<16 x i8> %24, i32 32)
>  %26 = call float @llvm.SI.load.const(<16 x i8> %24, i32 36)
>  %27 = fmul float %25, %16
>  %28 = fadd float %27, %26
>  %29 = fmul float %15, 1.250000e-01
>  %30 = fmul float %28, 2.500000e-01
>  %31 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %2, i64 0, i64 0, !amdgpu.uniform !0
>  %32 = load <8 x i32>, <8 x i32> addrspace(2)* %31, align 32, !invariant.load !0
>  %33 = bitcast [32 x <8 x i32>] addrspace(2)* %2 to [0 x <4 x i32>] addrspace(2)*
>  %34 = getelementptr [0 x <4 x i32>], [0 x <4 x i32>] addrspace(2)* %33, i64 0, i64 3, !amdgpu.uniform !0
>  %35 = load <4 x i32>, <4 x i32> addrspace(2)* %34, align 16, !invariant.load !0
>  %36 = extractelement <8 x i32> %32, i32 7
>  %37 = extractelement <4 x i32> %35, i32 0
>  %38 = and i32 %37, %36
>  %39 = insertelement <4 x i32> %35, i32 %38, i32 0
>  %40 = bitcast float %29 to i32
>  %41 = bitcast float %30 to i32
>  %42 = insertelement <2 x i32> undef, i32 %40, i32 0
>  %43 = insertelement <2 x i32> %42, i32 %41, i32 1
>  %44 = call <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32> %43, <8 x i32> %32, <4 x i32> %39, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
>  %45 = extractelement <4 x float> %44, i32 0
>  %46 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %1, i64 0, i64 0, !amdgpu.uniform !0
>  %47 = load <16 x i8>, <16 x i8> addrspace(2)* %46, align 16, !invariant.load !0
>  %48 = call float @llvm.SI.load.const(<16 x i8> %47, i32 16)
>  %49 = fsub float %48, %45
>  %50 = call float @llvm.fabs.f32(float %49)
>  %51 = call float @llvm.SI.load.const(<16 x i8> %47, i32 20)
>  %52 = fcmp olt float %51, %50
>  %53 = select i1 %52, float -1.000000e+00, float 0.000000e+00
>  call void @llvm.AMDGPU.kill(float %53)
>  %54 = bitcast float %5 to i32
>  %55 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, i32 %54, 10
>  %56 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %55, float 0.000000e+00, 11
>  %57 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %56, float 0.000000e+00, 12
>  %58 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %57, float 0.000000e+00, 13
>  %59 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %58, float 0.000000e+00, 14
>  %60 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %59, float %21, 24
>  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %60
>}
>
>; Function Attrs: nounwind readnone
>declare float @llvm.SI.load.const(<16 x i8>, i32) #1
>
>; Function Attrs: nounwind readnone
>declare <4 x float> @llvm.SI.image.sample.v2i32(<2 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
>
>; Function Attrs: nounwind readnone
>declare float @llvm.fabs.f32(float) #1
>
>; Function Attrs: nounwind
>declare void @llvm.AMDGPU.kill(float) #2
>
>attributes #0 = { "InitialPSInputAddr"="36983" }
>attributes #1 = { nounwind readnone }
>attributes #2 = { nounwind }
>
>!0 = !{}
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen    ; E00C2000 80010704
>	s_buffer_load_dword s5, s[0:3], 0x10                    ; C2028110
>	s_buffer_load_dword s6, s[0:3], 0x11                    ; C2030111
>	s_buffer_load_dword s7, s[0:3], 0x12                    ; C2038112
>	s_buffer_load_dword s8, s[0:3], 0x374                   ; C20400FF 00000374
>	s_buffer_load_dword s4, s[0:3], 0x386                   ; C20200FF 00000386
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s5                                    ; 7E000205
>	v_mov_b32_e32 v1, s6                                    ; 7E020206
>	v_mov_b32_e32 v3, s7                                    ; 7E060207
>	s_cmp_eq_u32 s8, -1                                     ; BF06C108
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s5, s[0:3], 0x14                    ; C2028114
>	s_buffer_load_dword s6, s[0:3], 0x15                    ; C2030115
>	s_buffer_load_dword s7, s[0:3], 0x16                    ; C2038116
>	s_buffer_load_dword s8, s[0:3], 0x17                    ; C2040117
>	s_buffer_load_dword s9, s[0:3], 0x18                    ; C2048118
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	v_mov_b32_e32 v12, s6                                   ; 7E180206
>	s_buffer_load_dword s5, s[0:3], 0x19                    ; C2028119
>	s_buffer_load_dword s6, s[0:3], 0x1a                    ; C203011A
>	v_mov_b32_e32 v4, s7                                    ; 7E080207
>	v_sub_f32_e32 v11, s8, v0                               ; 08160008
>	v_mov_b32_e32 v5, s9                                    ; 7E0A0209
>	s_buffer_load_dword s7, s[0:3], 0x1b                    ; C203811B
>	s_buffer_load_dword s8, s[0:3], 0x1c                    ; C204011C
>	s_buffer_load_dword s9, s[0:3], 0x1d                    ; C204811D
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v14, s5                                   ; 7E1C0205
>	v_mov_b32_e32 v13, s6                                   ; 7E1A0206
>	s_buffer_load_dword s5, s[0:3], 0x1e                    ; C202811E
>	s_buffer_load_dword s6, s[0:3], 0x1f                    ; C203011F
>	v_sub_f32_e32 v15, s7, v1                               ; 081E0207
>	v_mov_b32_e32 v16, s8                                   ; 7E200208
>	v_mov_b32_e32 v17, s9                                   ; 7E220209
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v18, s5                                   ; 7E240205
>	v_sub_f32_e32 v19, s6, v3                               ; 08260606
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[12:15], s[10:11], 0x8                  ; C0860B08
>	s_movk_i32 s16, 0x5c                                    ; B010005C
>	s_buffer_load_dword s5, s[0:3], 0x378                   ; C20280FF 00000378
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[12:15], 0 idxen ; E00C2000 80031806
>	s_movk_i32 s13, 0x54                                    ; B00D0054
>	s_movk_i32 s15, 0x50                                    ; B00F0050
>	s_movk_i32 s14, 0x58                                    ; B00E0058
>	s_cmp_eq_u32 s5, -1                                     ; BF06C105
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                               ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                                ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s13, v15                        ; 4A161E0D
>	v_add_i32_e32 v14, vcc, s16, v15                        ; 4A1C1E10
>	v_add_i32_e32 v4, vcc, s15, v15                         ; 4A081E0F
>	buffer_load_dword v12, v11, s[0:3], 0 offen             ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen             ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s14, v15                        ; 4A1A1E0E
>	buffer_load_dword v6, v4, s[0:3], 0 offen               ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen              ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                      ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                           ; 0A161700
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                       ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                       ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                       ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                        ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                       ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                       ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen             ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen             ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                       ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                       ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen             ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen             ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen               ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen             ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                           ; 0A1E2701
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                           ; 0A262903
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[8:11], s[10:11], 0x4                   ; C0840B04
>	s_movk_i32 s5, 0x7c                                     ; B005007C
>	s_movk_i32 s12, 0x6c                                    ; B00C006C
>	v_add_i32_e32 v17, vcc, s5, v15                         ; 4A221E05
>	s_movk_i32 s7, 0x74                                     ; B0070074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[8:11], 0 idxen  ; E00C2000 80021405
>	v_cvt_i32_f32_e32 v5, v25                               ; 7E0A1119
>	s_movk_i32 s11, 0x60                                    ; B00B0060
>	s_movk_i32 s10, 0x64                                    ; B00A0064
>	s_movk_i32 s9, 0x68                                     ; B0090068
>	v_mul_lo_i32 v24, v5, 48                                ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s12, v15                         ; 4A0A1E0C
>	s_movk_i32 s8, 0x70                                     ; B0080070
>	s_movk_i32 s6, 0x78                                     ; B0060078
>	v_add_i32_e32 v13, vcc, s11, v15                        ; 4A1A1E0B
>	v_add_i32_e32 v14, vcc, s10, v15                        ; 4A1C1E0A
>	v_add_i32_e32 v16, vcc, s9, v15                         ; 4A201E09
>	v_add_i32_e32 v19, vcc, s7, v15                         ; 4A261E07
>	buffer_load_dword v18, v5, s[0:3], 0 offen              ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s8, v15                          ; 4A0A1E08
>	v_add_i32_e32 v15, vcc, s6, v15                         ; 4A1E1E06
>	buffer_load_dword v17, v17, s[0:3], 0 offen             ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen             ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen             ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen             ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen              ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen             ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen             ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                               ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                             ; 10181914
>	v_mul_f32_e32 v4, v20, v4                               ; 10080914
>	v_mul_f32_e32 v11, v20, v11                             ; 10161714
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                           ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                             ; 101E1F14
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                           ; 0A3A2303
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                             ; 101C1D14
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                             ; 10243914
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                              ; 100A1B14
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                             ; 101A2114
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                             ; 10222714
>	v_mul_f32_e32 v16, v20, v25                             ; 10203314
>	v_mul_f32_e32 v19, v20, v29                             ; 10263B14
>	v_add_i32_e32 v20, vcc, s16, v24                        ; 4A283010
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                           ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                             ; 3E162915
>	v_add_i32_e32 v20, vcc, s12, v24                        ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                           ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                             ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s15, v24                        ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                              ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s13, v24                        ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_buffer_load_dword s13, s[0:3], 0x37c                  ; C20680FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s13, 0                                     ; BF06800D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                             ; 3E182915
>	v_add_i32_e32 v20, vcc, s14, v24                        ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                              ; 3E082915
>	v_add_i32_e32 v20, vcc, s11, v24                        ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                              ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s10, v24                        ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                             ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s9, v24                         ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                             ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s8, v24                         ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                             ; 3E202915
>	v_add_i32_e32 v20, vcc, s7, v24                         ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                             ; 3E222915
>	v_add_i32_e32 v20, vcc, s6, v24                         ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                             ; 3E242915
>	v_add_i32_e32 v20, vcc, s5, v24                         ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                           ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                             ; 3E262915
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                              ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                               ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                       ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                              ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                       ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                           ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                             ; 3E162B16
>	v_add_i32_e32 v21, vcc, s12, v20                        ; 4A2A280C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                           ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                             ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                       ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                             ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                       ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                              ; 3E082B16
>	v_add_i32_e32 v21, vcc, s11, v20                        ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                              ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s10, v20                        ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                             ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s9, v20                         ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                             ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s8, v20                         ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                             ; 3E202B16
>	v_add_i32_e32 v21, vcc, s7, v20                         ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                             ; 3E222B16
>	v_add_i32_e32 v21, vcc, s6, v20                         ; 4A2A2806
>	v_add_i32_e32 v20, vcc, s5, v20                         ; 4A282805
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                           ; 0A282903
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                             ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                             ; 3E262916
>	s_buffer_load_dword s5, s[0:3], 0x380                   ; C20280FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s5, 0                                      ; BF068005
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                              ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                               ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                       ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                              ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                       ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                           ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                             ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                       ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                           ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                             ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                       ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                             ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                       ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                              ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                       ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                              ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                       ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                             ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                       ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                             ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                       ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                             ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                       ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                             ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                       ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                       ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen             ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen             ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                           ; 0A282903
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                             ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                             ; 3E262917
>	v_mul_f32_e32 v8, s4, v8                                ; 10101004
>	v_mul_f32_e32 v12, v12, v8                              ; 1018110C
>	v_mul_f32_e32 v7, s4, v7                                ; 100E0E04
>	v_mac_f32_e32 v12, v6, v7                               ; 3E180F06
>	v_mul_f32_e32 v6, s4, v9                                ; 100C1204
>	v_mac_f32_e32 v12, v4, v6                               ; 3E180D04
>	v_mul_f32_e32 v4, v14, v8                               ; 1008110E
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_mac_f32_e32 v4, v5, v7                                ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                               ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	v_mac_f32_e32 v5, v16, v7                               ; 3E0A0F10
>	v_mac_f32_e32 v4, v13, v6                               ; 3E080D0D
>	v_mac_f32_e32 v5, v18, v6                               ; 3E0A0D12
>	v_mac_f32_e32 v12, v11, v10                             ; 3E18150B
>	v_mac_f32_e32 v4, v15, v10                              ; 3E08150F
>	v_mac_f32_e32 v5, v19, v10                              ; 3E0A1513
>	v_add_f32_e32 v0, v0, v12                               ; 06001900
>	v_mul_f32_e32 v8, 0, v8                                 ; 10101080
>	v_add_f32_e32 v1, v1, v4                                ; 06020901
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                                ; 10080004
>	v_add_f32_e32 v3, v3, v5                                ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                                ; 100A0005
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	v_mac_f32_e32 v8, 0, v7                                 ; 3E100E80
>	v_mul_f32_e32 v7, s6, v0                                ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                                ; 10000007
>	v_mac_f32_e32 v4, s8, v1                                ; 3E080208
>	s_buffer_load_dword s6, s[0:3], 0x7                     ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                     ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                     ; C2040109
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                                ; 3E0A0204
>	v_mac_f32_e32 v7, s5, v1                                ; 3E0E0205
>	s_buffer_load_dword s4, s[0:3], 0xa                     ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                     ; C202810B
>	v_mac_f32_e32 v0, s6, v1                                ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                                ; 3E080607
>	v_mac_f32_e32 v5, s8, v3                                ; 3E0A0608
>	s_buffer_load_dword s6, s[0:3], 0xc                     ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                     ; C203810D
>	s_buffer_load_dword s8, s[0:3], 0xe                     ; C204010E
>	s_buffer_load_dword s0, s[0:3], 0xf                     ; C200010F
>	v_mac_f32_e32 v8, 0, v6                                 ; 3E100C80
>	v_add_f32_e32 v6, v10, v8                               ; 060C110A
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                                ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                                ; 3E000605
>	v_mac_f32_e32 v4, s6, v6                                ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                                ; 3E0A0C07
>	v_mac_f32_e32 v7, s8, v6                                ; 3E0E0C08
>	v_mac_f32_e32 v0, s0, v6                                ; 3E000C00
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v0                     ; F80008CF 00070504
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1848 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                              ; BE88047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                  ; C082050C
>	v_mul_f32_e32 v0, 0x3e000000, v12                   ; 100018FF 3E000000
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_buffer_load_dword s20, s[0:3], 0x9                ; C20A0109
>	s_buffer_load_dword s11, s[0:3], 0x8                ; C2058108
>	s_and_b32 s4, s4, s19                               ; 87041304
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_mov_b32_e32 v1, s20                               ; 7E020214
>	v_mac_f32_e32 v1, s11, v13                          ; 3E021A0B
>	v_mul_f32_e32 v1, 0x3e800000, v1                    ; 100202FF 3E800000
>	s_and_b64 exec, exec, s[8:9]                        ; 87FE087E
>	image_sample v0, v[0:1], s[12:19], s[4:7] dmask:0x1 ; F0800100 00230000
>	s_buffer_load_dword s4, s[0:3], 0x4                 ; C2020104
>	s_buffer_load_dword s0, s[0:3], 0x5                 ; C2000105
>	s_waitcnt vmcnt(0) lgkmcnt(0)                       ; BF8C0070
>	v_sub_f32_e32 v0, s4, v0                            ; 08000004
>	v_cmp_lt_f32_e64 s[0:1], s0, |v0|                   ; D0020200 00020000
>	v_cndmask_b32_e64 v0, 0, -1.0, s[0:1]               ; D2000000 0001E680
>	v_cmpx_le_f32_e32 vcc, 0, v0                        ; 7C260080
>	s_cbranch_execnz BB0_2                              ; BF890000
>	exp 0, 9, 0, 1, 1, v0, v0, v0, v0                   ; F8001890 00000000
>	s_endpgm                                            ; BF810000
>	v_mov_b32_e32 v0, 0                                 ; 7E000280
>	v_mov_b32_e32 v1, 0                                 ; 7E020280
>	v_mov_b32_e32 v2, 0                                 ; 7E040280
>	v_mov_b32_e32 v3, 0                                 ; 7E060280
>	v_mov_b32_e32 v13, v15                              ; 7E1A030F
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd377
>SPI_PS_INPUT_ENA  = 0x0320
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 17
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 168 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                  ; C0820B00
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                    ; C0800300
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[7:10], v4, s[4:7], 0 idxen  ; E00C2000 80010704
>	s_buffer_load_dword s4, s[0:3], 0x10                  ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                  ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                  ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x374                 ; C20380FF 00000374
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v0, s4                                  ; 7E000204
>	v_mov_b32_e32 v1, s5                                  ; 7E020205
>	v_mov_b32_e32 v3, s6                                  ; 7E060206
>	s_cmp_eq_u32 s7, -1                                   ; BF06C107
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                  ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x14                  ; C2020114
>	s_buffer_load_dword s5, s[0:3], 0x15                  ; C2028115
>	s_buffer_load_dword s6, s[0:3], 0x16                  ; C2030116
>	s_buffer_load_dword s7, s[0:3], 0x17                  ; C2038117
>	s_buffer_load_dword s8, s[0:3], 0x18                  ; C2040118
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v6, s4                                  ; 7E0C0204
>	v_mov_b32_e32 v12, s5                                 ; 7E180205
>	s_buffer_load_dword s4, s[0:3], 0x19                  ; C2020119
>	s_buffer_load_dword s5, s[0:3], 0x1a                  ; C202811A
>	v_mov_b32_e32 v4, s6                                  ; 7E080206
>	v_sub_f32_e32 v11, s7, v0                             ; 08160007
>	v_mov_b32_e32 v5, s8                                  ; 7E0A0208
>	s_buffer_load_dword s6, s[0:3], 0x1b                  ; C203011B
>	s_buffer_load_dword s7, s[0:3], 0x1c                  ; C203811C
>	s_buffer_load_dword s8, s[0:3], 0x1d                  ; C204011D
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v14, s4                                 ; 7E1C0204
>	v_mov_b32_e32 v13, s5                                 ; 7E1A0205
>	s_buffer_load_dword s4, s[0:3], 0x1e                  ; C202011E
>	s_buffer_load_dword s5, s[0:3], 0x1f                  ; C202811F
>	v_sub_f32_e32 v15, s6, v1                             ; 081E0206
>	v_mov_b32_e32 v16, s7                                 ; 7E200207
>	v_mov_b32_e32 v17, s8                                 ; 7E220208
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mov_b32_e32 v18, s4                                 ; 7E240204
>	v_sub_f32_e32 v19, s5, v3                             ; 08260605
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x8                  ; C0820B08
>	s_movk_i32 s12, 0x54                                  ; B00C0054
>	s_movk_i32 s15, 0x5c                                  ; B00F005C
>	s_movk_i32 s14, 0x50                                  ; B00E0050
>	s_movk_i32 s13, 0x58                                  ; B00D0058
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[24:27], v6, s[4:7], 0 idxen ; E00C2000 80011806
>	s_buffer_load_dword s4, s[0:3], 0x378                 ; C20200FF 00000378
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                   ; BF06C104
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_cvt_i32_f32_e32 v4, v24                             ; 7E081118
>	v_mul_lo_i32 v15, v4, 48                              ; D2D6000F 00016104
>	v_add_i32_e32 v11, vcc, s12, v15                      ; 4A161E0C
>	v_add_i32_e32 v14, vcc, s15, v15                      ; 4A1C1E0F
>	v_add_i32_e32 v4, vcc, s14, v15                       ; 4A081E0E
>	buffer_load_dword v12, v11, s[0:3], 0 offen           ; E0301000 80000C0B
>	buffer_load_dword v11, v14, s[0:3], 0 offen           ; E0301000 80000B0E
>	v_add_i32_e32 v13, vcc, s13, v15                      ; 4A1A1E0D
>	buffer_load_dword v6, v4, s[0:3], 0 offen             ; E0301000 80000604
>	buffer_load_dword v4, v13, s[0:3], 0 offen            ; E0301000 8000040D
>	s_waitcnt vmcnt(2)                                    ; BF8C0F72
>	v_subrev_f32_e32 v11, v0, v11                         ; 0A161700
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                  ; BF850000
>	v_add_i32_e32 v13, vcc, 0x6c, v15                     ; 4A1A1EFF 0000006C
>	v_add_i32_e32 v18, vcc, 0x7c, v15                     ; 4A241EFF 0000007C
>	v_add_i32_e32 v16, vcc, 0x68, v15                     ; 4A201EFF 00000068
>	v_add_i32_e32 v5, vcc, 0x60, v15                      ; 4A0A1EFF 00000060
>	v_add_i32_e32 v14, vcc, 0x64, v15                     ; 4A1C1EFF 00000064
>	v_add_i32_e32 v17, vcc, 0x74, v15                     ; 4A221EFF 00000074
>	buffer_load_dword v19, v13, s[0:3], 0 offen           ; E0301000 8000130D
>	buffer_load_dword v13, v16, s[0:3], 0 offen           ; E0301000 80000D10
>	v_add_i32_e32 v16, vcc, 0x70, v15                     ; 4A201EFF 00000070
>	v_add_i32_e32 v15, vcc, 0x78, v15                     ; 4A1E1EFF 00000078
>	buffer_load_dword v20, v18, s[0:3], 0 offen           ; E0301000 80001412
>	buffer_load_dword v18, v15, s[0:3], 0 offen           ; E0301000 8000120F
>	buffer_load_dword v5, v5, s[0:3], 0 offen             ; E0301000 80000505
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v19                         ; 0A1E2701
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_subrev_f32_e32 v19, v3, v20                         ; 0A262903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	s_branch BB0_8                                        ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x4                  ; C0820B04
>	s_movk_i32 s11, 0x6c                                  ; B00B006C
>	s_movk_i32 s10, 0x60                                  ; B00A0060
>	s_movk_i32 s9, 0x64                                   ; B0090064
>	s_movk_i32 s8, 0x68                                   ; B0080068
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	buffer_load_format_xyzw v[20:23], v5, s[4:7], 0 idxen ; E00C2000 80011405
>	v_cvt_i32_f32_e32 v5, v25                             ; 7E0A1119
>	s_movk_i32 s4, 0x7c                                   ; B004007C
>	v_add_i32_e32 v17, vcc, s4, v15                       ; 4A221E04
>	s_movk_i32 s6, 0x74                                   ; B0060074
>	v_mul_lo_i32 v24, v5, 48                              ; D2D60018 00016105
>	v_add_i32_e32 v5, vcc, s11, v15                       ; 4A0A1E0B
>	s_movk_i32 s7, 0x70                                   ; B0070070
>	s_movk_i32 s5, 0x78                                   ; B0050078
>	v_add_i32_e32 v13, vcc, s10, v15                      ; 4A1A1E0A
>	v_add_i32_e32 v14, vcc, s9, v15                       ; 4A1C1E09
>	v_add_i32_e32 v16, vcc, s8, v15                       ; 4A201E08
>	v_add_i32_e32 v19, vcc, s6, v15                       ; 4A261E06
>	buffer_load_dword v18, v5, s[0:3], 0 offen            ; E0301000 80001205
>	v_add_i32_e32 v5, vcc, s7, v15                        ; 4A0A1E07
>	v_add_i32_e32 v15, vcc, s5, v15                       ; 4A1E1E05
>	buffer_load_dword v17, v17, s[0:3], 0 offen           ; E0301000 80001111
>	buffer_load_dword v14, v14, s[0:3], 0 offen           ; E0301000 80000E0E
>	buffer_load_dword v28, v15, s[0:3], 0 offen           ; E0301000 80001C0F
>	buffer_load_dword v13, v13, s[0:3], 0 offen           ; E0301000 80000D0D
>	buffer_load_dword v25, v5, s[0:3], 0 offen            ; E0301000 80001905
>	buffer_load_dword v16, v16, s[0:3], 0 offen           ; E0301000 80001010
>	buffer_load_dword v19, v19, s[0:3], 0 offen           ; E0301000 80001313
>	s_waitcnt vmcnt(8)                                    ; BF8C0F78
>	v_mul_f32_e32 v6, v20, v6                             ; 100C0D14
>	v_mul_f32_e32 v12, v20, v12                           ; 10181914
>	v_mul_f32_e32 v4, v20, v4                             ; 10080914
>	v_mul_f32_e32 v11, v20, v11                           ; 10161714
>	s_waitcnt vmcnt(7)                                    ; BF8C0F77
>	v_subrev_f32_e32 v15, v1, v18                         ; 0A1E2501
>	v_mul_f32_e32 v15, v20, v15                           ; 101E1F14
>	s_waitcnt vmcnt(6)                                    ; BF8C0F76
>	v_subrev_f32_e32 v29, v3, v17                         ; 0A3A2303
>	s_waitcnt vmcnt(5)                                    ; BF8C0F75
>	v_mul_f32_e32 v14, v20, v14                           ; 101C1D14
>	s_waitcnt vmcnt(4)                                    ; BF8C0F74
>	v_mul_f32_e32 v18, v20, v28                           ; 10243914
>	s_waitcnt vmcnt(3)                                    ; BF8C0F73
>	v_mul_f32_e32 v5, v20, v13                            ; 100A1B14
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_mul_f32_e32 v13, v20, v16                           ; 101A2114
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mul_f32_e32 v17, v20, v19                           ; 10222714
>	v_mul_f32_e32 v16, v20, v25                           ; 10203314
>	v_mul_f32_e32 v19, v20, v29                           ; 10263B14
>	v_add_i32_e32 v20, vcc, s15, v24                      ; 4A28300F
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v0, v20                         ; 0A282900
>	v_mac_f32_e32 v11, v21, v20                           ; 3E162915
>	v_add_i32_e32 v20, vcc, s11, v24                      ; 4A28300B
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v1, v20                         ; 0A282901
>	v_mac_f32_e32 v15, v21, v20                           ; 3E1E2915
>	v_add_i32_e32 v20, vcc, s14, v24                      ; 4A28300E
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v21, v20                            ; 3E0C2915
>	v_add_i32_e32 v20, vcc, s12, v24                      ; 4A28300C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_buffer_load_dword s12, s[0:3], 0x37c                ; C20600FF 0000037C
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                   ; BF06800C
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v21, v20                           ; 3E182915
>	v_add_i32_e32 v20, vcc, s13, v24                      ; 4A28300D
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v21, v20                            ; 3E082915
>	v_add_i32_e32 v20, vcc, s10, v24                      ; 4A28300A
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v21, v20                            ; 3E0A2915
>	v_add_i32_e32 v20, vcc, s9, v24                       ; 4A283009
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v21, v20                           ; 3E1C2915
>	v_add_i32_e32 v20, vcc, s8, v24                       ; 4A283008
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v21, v20                           ; 3E1A2915
>	v_add_i32_e32 v20, vcc, s7, v24                       ; 4A283007
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v21, v20                           ; 3E202915
>	v_add_i32_e32 v20, vcc, s6, v24                       ; 4A283006
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v21, v20                           ; 3E222915
>	v_add_i32_e32 v20, vcc, s5, v24                       ; 4A283005
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v21, v20                           ; 3E242915
>	v_add_i32_e32 v20, vcc, s4, v24                       ; 4A283004
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	v_mac_f32_e32 v19, v21, v20                           ; 3E262915
>	s_cbranch_scc1 BB0_6                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v26                            ; 7E28111A
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v22, v21                            ; 3E0C2B16
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v22, v21                           ; 3E162B16
>	v_add_i32_e32 v21, vcc, s11, v20                      ; 4A2A280B
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v22, v21                           ; 3E1E2B16
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v22, v21                           ; 3E182B16
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v22, v21                            ; 3E082B16
>	v_add_i32_e32 v21, vcc, s10, v20                      ; 4A2A280A
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v22, v21                            ; 3E0A2B16
>	v_add_i32_e32 v21, vcc, s9, v20                       ; 4A2A2809
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v22, v21                           ; 3E1C2B16
>	v_add_i32_e32 v21, vcc, s8, v20                       ; 4A2A2808
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v22, v21                           ; 3E1A2B16
>	v_add_i32_e32 v21, vcc, s7, v20                       ; 4A2A2807
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v22, v21                           ; 3E202B16
>	v_add_i32_e32 v21, vcc, s6, v20                       ; 4A2A2806
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v22, v21                           ; 3E222B16
>	v_add_i32_e32 v21, vcc, s5, v20                       ; 4A2A2805
>	v_add_i32_e32 v20, vcc, s4, v20                       ; 4A282804
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v22, v21                           ; 3E242B16
>	v_mac_f32_e32 v19, v22, v20                           ; 3E262916
>	s_buffer_load_dword s4, s[0:3], 0x380                 ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                    ; BF068004
>	s_cbranch_scc1 BB0_8                                  ; BF850000
>	v_cvt_i32_f32_e32 v20, v27                            ; 7E28111B
>	v_mul_lo_i32 v20, v20, 48                             ; D2D60014 00016114
>	v_add_i32_e32 v21, vcc, 0x50, v20                     ; 4A2A28FF 00000050
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v6, v23, v21                            ; 3E0C2B17
>	v_add_i32_e32 v21, vcc, 0x5c, v20                     ; 4A2A28FF 0000005C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v0, v21                         ; 0A2A2B00
>	v_mac_f32_e32 v11, v23, v21                           ; 3E162B17
>	v_add_i32_e32 v21, vcc, 0x6c, v20                     ; 4A2A28FF 0000006C
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_subrev_f32_e32 v21, v1, v21                         ; 0A2A2B01
>	v_mac_f32_e32 v15, v23, v21                           ; 3E1E2B17
>	v_add_i32_e32 v21, vcc, 0x54, v20                     ; 4A2A28FF 00000054
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v12, v23, v21                           ; 3E182B17
>	v_add_i32_e32 v21, vcc, 0x58, v20                     ; 4A2A28FF 00000058
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v4, v23, v21                            ; 3E082B17
>	v_add_i32_e32 v21, vcc, 0x60, v20                     ; 4A2A28FF 00000060
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v5, v23, v21                            ; 3E0A2B17
>	v_add_i32_e32 v21, vcc, 0x64, v20                     ; 4A2A28FF 00000064
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v14, v23, v21                           ; 3E1C2B17
>	v_add_i32_e32 v21, vcc, 0x68, v20                     ; 4A2A28FF 00000068
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v13, v23, v21                           ; 3E1A2B17
>	v_add_i32_e32 v21, vcc, 0x70, v20                     ; 4A2A28FF 00000070
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v16, v23, v21                           ; 3E202B17
>	v_add_i32_e32 v21, vcc, 0x74, v20                     ; 4A2A28FF 00000074
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v17, v23, v21                           ; 3E222B17
>	v_add_i32_e32 v21, vcc, 0x78, v20                     ; 4A2A28FF 00000078
>	v_add_i32_e32 v20, vcc, 0x7c, v20                     ; 4A2828FF 0000007C
>	buffer_load_dword v20, v20, s[0:3], 0 offen           ; E0301000 80001414
>	buffer_load_dword v21, v21, s[0:3], 0 offen           ; E0301000 80001515
>	s_waitcnt vmcnt(1)                                    ; BF8C0F71
>	v_subrev_f32_e32 v20, v3, v20                         ; 0A282903
>	s_waitcnt vmcnt(0)                                    ; BF8C0F70
>	v_mac_f32_e32 v18, v23, v21                           ; 3E242B17
>	v_mac_f32_e32 v19, v23, v20                           ; 3E262917
>	v_mul_f32_e32 v12, v12, v8                            ; 1018110C
>	v_mac_f32_e32 v12, v6, v7                             ; 3E180F06
>	v_mac_f32_e32 v12, v4, v9                             ; 3E181304
>	v_mul_f32_e32 v4, v14, v8                             ; 1008110E
>	s_buffer_load_dword s4, s[0:3], 0x0                   ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                   ; C2028101
>	v_mac_f32_e32 v4, v5, v7                              ; 3E080F05
>	v_mul_f32_e32 v5, v17, v8                             ; 100A1111
>	s_buffer_load_dword s6, s[0:3], 0x2                   ; C2030102
>	s_buffer_load_dword s7, s[0:3], 0x3                   ; C2038103
>	s_buffer_load_dword s8, s[0:3], 0x4                   ; C2040104
>	v_mac_f32_e32 v5, v16, v7                             ; 3E0A0F10
>	v_mac_f32_e32 v4, v13, v9                             ; 3E08130D
>	v_mac_f32_e32 v5, v18, v9                             ; 3E0A1312
>	v_mac_f32_e32 v12, v11, v10                           ; 3E18150B
>	v_mac_f32_e32 v4, v15, v10                            ; 3E08150F
>	v_mac_f32_e32 v5, v19, v10                            ; 3E0A1513
>	v_add_f32_e32 v0, v0, v12                             ; 06001900
>	v_mul_f32_e32 v6, 0, v8                               ; 100C1080
>	v_add_f32_e32 v1, v1, v4                              ; 06020901
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mul_f32_e32 v4, s4, v0                              ; 10080004
>	v_add_f32_e32 v3, v3, v5                              ; 06060B03
>	v_mul_f32_e32 v5, s5, v0                              ; 100A0005
>	s_buffer_load_dword s4, s[0:3], 0x5                   ; C2020105
>	s_buffer_load_dword s5, s[0:3], 0x6                   ; C2028106
>	v_mac_f32_e32 v6, 0, v7                               ; 3E0C0E80
>	v_mul_f32_e32 v7, s6, v0                              ; 100E0006
>	v_mul_f32_e32 v0, s7, v0                              ; 10000007
>	v_mac_f32_e32 v4, s8, v1                              ; 3E080208
>	s_buffer_load_dword s6, s[0:3], 0x7                   ; C2030107
>	s_buffer_load_dword s7, s[0:3], 0x8                   ; C2038108
>	s_buffer_load_dword s8, s[0:3], 0x9                   ; C2040109
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v5, s4, v1                              ; 3E0A0204
>	v_mac_f32_e32 v7, s5, v1                              ; 3E0E0205
>	s_buffer_load_dword s4, s[0:3], 0xa                   ; C202010A
>	s_buffer_load_dword s5, s[0:3], 0xb                   ; C202810B
>	v_mac_f32_e32 v0, s6, v1                              ; 3E000206
>	v_mac_f32_e32 v4, s7, v3                              ; 3E080607
>	v_mac_f32_e32 v5, s8, v3                              ; 3E0A0608
>	s_buffer_load_dword s6, s[0:3], 0xc                   ; C203010C
>	s_buffer_load_dword s7, s[0:3], 0xd                   ; C203810D
>	s_buffer_load_dword s8, s[0:3], 0xe                   ; C204010E
>	s_buffer_load_dword s0, s[0:3], 0xf                   ; C200010F
>	v_mac_f32_e32 v6, 0, v9                               ; 3E0C1280
>	v_add_f32_e32 v6, v10, v6                             ; 060C0D0A
>	s_waitcnt lgkmcnt(0)                                  ; BF8C007F
>	v_mac_f32_e32 v7, s4, v3                              ; 3E0E0604
>	v_mac_f32_e32 v0, s5, v3                              ; 3E000605
>	v_mac_f32_e32 v4, s6, v6                              ; 3E080C06
>	v_mac_f32_e32 v5, s7, v6                              ; 3E0A0C07
>	v_mac_f32_e32 v7, s8, v6                              ; 3E0E0C08
>	v_mac_f32_e32 v0, s0, v6                              ; 3E000C00
>	exp 15, 12, 0, 1, 0, v4, v5, v7, v0                   ; F80008CF 00070504
>	s_waitcnt expcnt(0)                                   ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 32
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1832 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 8
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 0
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_mov_b64 s[8:9], exec                              ; BE88047E
>	s_wqm_b64 exec, exec                                ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                  ; C0800300
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                ; C0C60500
>	s_load_dwordx4 s[4:7], s[4:5], 0xc                  ; C082050C
>	v_mul_f32_e32 v0, 0x3e000000, v12                   ; 100018FF 3E000000
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	s_buffer_load_dword s20, s[0:3], 0x9                ; C20A0109
>	s_buffer_load_dword s11, s[0:3], 0x8                ; C2058108
>	s_and_b32 s4, s4, s19                               ; 87041304
>	s_waitcnt lgkmcnt(0)                                ; BF8C007F
>	v_mov_b32_e32 v1, s20                               ; 7E020214
>	v_mac_f32_e32 v1, s11, v13                          ; 3E021A0B
>	v_mul_f32_e32 v1, 0x3e800000, v1                    ; 100202FF 3E800000
>	s_and_b64 exec, exec, s[8:9]                        ; 87FE087E
>	image_sample v0, v[0:1], s[12:19], s[4:7] dmask:0x1 ; F0800100 00230000
>	s_buffer_load_dword s4, s[0:3], 0x4                 ; C2020104
>	s_buffer_load_dword s0, s[0:3], 0x5                 ; C2000105
>	s_waitcnt vmcnt(0) lgkmcnt(0)                       ; BF8C0070
>	v_sub_f32_e32 v0, s4, v0                            ; 08000004
>	v_cmp_lt_f32_e64 s[0:1], s0, |v0|                   ; D0020200 00020000
>	v_cndmask_b32_e64 v0, 0, -1.0, s[0:1]               ; D2000000 0001E680
>	v_cmpx_le_f32_e32 vcc, 0, v0                        ; 7C260080
>	s_cbranch_execnz BB0_2                              ; BF890000
>	exp 0, 9, 0, 1, 1, v0, v0, v0, v0                   ; F8001890 00000000
>	s_endpgm                                            ; BF810000
>	v_mov_b32_e32 v0, 0                                 ; 7E000280
>	v_mov_b32_e32 v1, 0                                 ; 7E020280
>	v_mov_b32_e32 v2, 0                                 ; 7E040280
>	v_mov_b32_e32 v3, 0                                 ; 7E060280
>	v_mov_b32_e32 v13, v15                              ; 7E1A030F
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd377
>SPI_PS_INPUT_ENA  = 0x0320
>*** SHADER STATS ***
>SGPRS: 24
>VGPRS: 17
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 168 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 4A08000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>	v_mov_b32_e32 v6, v4           ; 7E0C0304
>	v_mov_b32_e32 v7, v4           ; 7E0E0304
>	v_mov_b32_e32 v8, v4           ; 7E100304
>	v_mov_b32_e32 v9, v4           ; 7E120304
>Shader main disassembly:
>	s_load_dwordx4 s[4:7], s[10:11], 0x0                    ; C0820B00
>	s_load_dwordx4 s[12:15], s[10:11], 0x4                  ; C0860B04
>	s_load_dwordx4 s[16:19], s[10:11], 0x8                  ; C0880B08
>	s_load_dwordx4 s[20:23], s[10:11], 0x14                 ; C08A0B14
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                      ; C0800300
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[10:13], v4, s[4:7], 0 idxen   ; E00C2000 80010A04
>	buffer_load_format_xyzw v[19:22], v5, s[12:15], 0 idxen ; E00C2000 80031305
>	buffer_load_format_xyzw v[15:18], v6, s[16:19], 0 idxen ; E00C2000 80040F06
>	buffer_load_format_xyzw v[3:6], v9, s[20:23], 0 idxen   ; E00C2000 80050309
>	s_buffer_load_dword s4, s[0:3], 0x10                    ; C2020110
>	s_buffer_load_dword s5, s[0:3], 0x11                    ; C2028111
>	s_buffer_load_dword s6, s[0:3], 0x12                    ; C2030112
>	s_buffer_load_dword s7, s[0:3], 0x37c                   ; C20380FF 0000037C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v0, s4                                    ; 7E000204
>	v_mov_b32_e32 v1, s5                                    ; 7E020205
>	v_mov_b32_e32 v14, s6                                   ; 7E1C0206
>	s_cmp_eq_u32 s7, -1                                     ; BF06C107
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_2                                    ; BF850000
>	s_buffer_load_dword s4, s[0:3], 0x1c                    ; C202011C
>	s_buffer_load_dword s5, s[0:3], 0x1d                    ; C202811D
>	s_buffer_load_dword s6, s[0:3], 0x1e                    ; C203011E
>	s_buffer_load_dword s7, s[0:3], 0x1f                    ; C203811F
>	s_buffer_load_dword s8, s[0:3], 0x20                    ; C2040120
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v8, s4                                    ; 7E100204
>	v_mov_b32_e32 v6, s5                                    ; 7E0C0205
>	s_buffer_load_dword s4, s[0:3], 0x21                    ; C2020121
>	s_buffer_load_dword s5, s[0:3], 0x22                    ; C2028122
>	v_mov_b32_e32 v5, s6                                    ; 7E0A0206
>	v_sub_f32_e32 v23, s7, v0                               ; 082E0007
>	v_mov_b32_e32 v7, s8                                    ; 7E0E0208
>	s_buffer_load_dword s6, s[0:3], 0x23                    ; C2030123
>	s_buffer_load_dword s7, s[0:3], 0x24                    ; C2038124
>	s_buffer_load_dword s8, s[0:3], 0x25                    ; C2040125
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v9, s4                                    ; 7E120204
>	v_mov_b32_e32 v22, s5                                   ; 7E2C0205
>	s_buffer_load_dword s4, s[0:3], 0x26                    ; C2020126
>	s_buffer_load_dword s5, s[0:3], 0x27                    ; C2028127
>	v_sub_f32_e32 v27, s6, v1                               ; 08360206
>	v_mov_b32_e32 v24, s7                                   ; 7E300207
>	v_mov_b32_e32 v25, s8                                   ; 7E320208
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mov_b32_e32 v26, s4                                   ; 7E340204
>	v_sub_f32_e32 v28, s5, v14                              ; 08381C05
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                   ; C0820B10
>	s_movk_i32 s14, 0x70                                    ; B00E0070
>	s_movk_i32 s13, 0x78                                    ; B00D0078
>	s_movk_i32 s15, 0x7c                                    ; B00F007C
>	s_movk_i32 s12, 0x74                                    ; B00C0074
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[33:36], v8, s[4:7], 0 idxen   ; E00C2000 80012108
>	s_buffer_load_dword s4, s[0:3], 0x380                   ; C20200FF 00000380
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, -1                                     ; BF06C104
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_cvt_i32_f32_e32 v5, v33                               ; 7E0A1121
>	v_mul_lo_i32 v26, v5, 48                                ; D2D6001A 00016105
>	v_add_i32_e32 v5, vcc, s14, v26                         ; 4A0A340E
>	v_add_i32_e32 v9, vcc, s13, v26                         ; 4A12340D
>	v_add_i32_e32 v22, vcc, s15, v26                        ; 4A2C340F
>	v_add_i32_e32 v6, vcc, s12, v26                         ; 4A0C340C
>	buffer_load_dword v8, v5, s[0:3], 0 offen               ; E0301000 80000805
>	buffer_load_dword v5, v9, s[0:3], 0 offen               ; E0301000 80000509
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v6, v6, s[0:3], 0 offen               ; E0301000 80000606
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v23, v0, v9                            ; 0A2E1300
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_cbranch_scc1 BB0_4                                    ; BF850000
>	v_add_i32_e32 v9, vcc, 0x8c, v26                        ; 4A1234FF 0000008C
>	v_add_i32_e32 v27, vcc, 0x9c, v26                       ; 4A3634FF 0000009C
>	v_add_i32_e32 v22, vcc, 0x84, v26                       ; 4A2C34FF 00000084
>	v_add_i32_e32 v24, vcc, 0x88, v26                       ; 4A3034FF 00000088
>	v_add_i32_e32 v7, vcc, 0x80, v26                        ; 4A0E34FF 00000080
>	v_add_i32_e32 v25, vcc, 0x94, v26                       ; 4A3234FF 00000094
>	buffer_load_dword v28, v9, s[0:3], 0 offen              ; E0301000 80001C09
>	buffer_load_dword v9, v22, s[0:3], 0 offen              ; E0301000 80000916
>	buffer_load_dword v22, v24, s[0:3], 0 offen             ; E0301000 80001618
>	v_add_i32_e32 v24, vcc, 0x90, v26                       ; 4A3034FF 00000090
>	v_add_i32_e32 v26, vcc, 0x98, v26                       ; 4A3434FF 00000098
>	buffer_load_dword v29, v27, s[0:3], 0 offen             ; E0301000 80001D1B
>	buffer_load_dword v7, v7, s[0:3], 0 offen               ; E0301000 80000707
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	s_waitcnt vmcnt(7)                                      ; BF8C0F77
>	v_subrev_f32_e32 v27, v1, v28                           ; 0A363901
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_subrev_f32_e32 v28, v14, v29                          ; 0A383B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	s_branch BB0_8                                          ; BF820000
>	s_load_dwordx4 s[4:7], s[10:11], 0xc                    ; C0820B0C
>	s_movk_i32 s10, 0x80                                    ; B00A0080
>	s_movk_i32 s9, 0x84                                     ; B0090084
>	s_movk_i32 s8, 0x88                                     ; B0080088
>	s_movk_i32 s11, 0x8c                                    ; B00B008C
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	buffer_load_format_xyzw v[29:32], v7, s[4:7], 0 idxen   ; E00C2000 80011D07
>	v_cvt_i32_f32_e32 v7, v34                               ; 7E0E1122
>	s_movk_i32 s4, 0x9c                                     ; B004009C
>	v_add_i32_e32 v9, vcc, s10, v26                         ; 4A12340A
>	v_add_i32_e32 v22, vcc, s9, v26                         ; 4A2C3409
>	v_add_i32_e32 v24, vcc, s8, v26                         ; 4A303408
>	v_add_i32_e32 v25, vcc, s4, v26                         ; 4A323404
>	v_mul_lo_i32 v33, v7, 48                                ; D2D60021 00016107
>	v_add_i32_e32 v7, vcc, s11, v26                         ; 4A0E340B
>	s_movk_i32 s6, 0x94                                     ; B0060094
>	s_movk_i32 s7, 0x90                                     ; B0070090
>	s_movk_i32 s5, 0x98                                     ; B0050098
>	v_add_i32_e32 v28, vcc, s6, v26                         ; 4A383406
>	buffer_load_dword v27, v7, s[0:3], 0 offen              ; E0301000 80001B07
>	v_add_i32_e32 v7, vcc, s7, v26                          ; 4A0E3407
>	v_add_i32_e32 v26, vcc, s5, v26                         ; 4A343405
>	buffer_load_dword v25, v25, s[0:3], 0 offen             ; E0301000 80001919
>	buffer_load_dword v9, v9, s[0:3], 0 offen               ; E0301000 80000909
>	buffer_load_dword v22, v22, s[0:3], 0 offen             ; E0301000 80001616
>	buffer_load_dword v24, v24, s[0:3], 0 offen             ; E0301000 80001818
>	buffer_load_dword v26, v26, s[0:3], 0 offen             ; E0301000 80001A1A
>	buffer_load_dword v34, v7, s[0:3], 0 offen              ; E0301000 80002207
>	buffer_load_dword v28, v28, s[0:3], 0 offen             ; E0301000 80001C1C
>	s_waitcnt vmcnt(8)                                      ; BF8C0F78
>	v_mul_f32_e32 v8, v29, v8                               ; 1010111D
>	v_mul_f32_e32 v6, v29, v6                               ; 100C0D1D
>	v_mul_f32_e32 v5, v29, v5                               ; 100A0B1D
>	v_mul_f32_e32 v23, v29, v23                             ; 102E2F1D
>	s_waitcnt vmcnt(6)                                      ; BF8C0F76
>	v_subrev_f32_e32 v37, v14, v25                          ; 0A4A330E
>	s_waitcnt vmcnt(5)                                      ; BF8C0F75
>	v_mul_f32_e32 v7, v29, v9                               ; 100E131D
>	s_waitcnt vmcnt(4)                                      ; BF8C0F74
>	v_mul_f32_e32 v9, v29, v22                              ; 10122D1D
>	s_waitcnt vmcnt(3)                                      ; BF8C0F73
>	v_mul_f32_e32 v22, v29, v24                             ; 102C311D
>	v_subrev_f32_e32 v24, v1, v27                           ; 0A303701
>	v_mul_f32_e32 v27, v29, v24                             ; 1036311D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mul_f32_e32 v25, v29, v28                             ; 1032391D
>	v_mul_f32_e32 v24, v29, v34                             ; 1030451D
>	v_mul_f32_e32 v26, v29, v26                             ; 1034351D
>	v_mul_f32_e32 v28, v29, v37                             ; 10384B1D
>	v_add_i32_e32 v29, vcc, s15, v33                        ; 4A3A420F
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v0, v29                           ; 0A3A3B00
>	v_mac_f32_e32 v23, v30, v29                             ; 3E2E3B1E
>	v_add_i32_e32 v29, vcc, s11, v33                        ; 4A3A420B
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v1, v29                           ; 0A3A3B01
>	v_mac_f32_e32 v27, v30, v29                             ; 3E363B1E
>	v_add_i32_e32 v29, vcc, s14, v33                        ; 4A3A420E
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v30, v29                              ; 3E103B1E
>	v_add_i32_e32 v29, vcc, s12, v33                        ; 4A3A420C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_buffer_load_dword s12, s[0:3], 0x384                  ; C20600FF 00000384
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s12, 0                                     ; BF06800C
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v30, v29                              ; 3E0C3B1E
>	v_add_i32_e32 v29, vcc, s13, v33                        ; 4A3A420D
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v30, v29                              ; 3E0A3B1E
>	v_add_i32_e32 v29, vcc, s10, v33                        ; 4A3A420A
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v30, v29                              ; 3E0E3B1E
>	v_add_i32_e32 v29, vcc, s9, v33                         ; 4A3A4209
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v30, v29                              ; 3E123B1E
>	v_add_i32_e32 v29, vcc, s8, v33                         ; 4A3A4208
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v30, v29                             ; 3E2C3B1E
>	v_add_i32_e32 v29, vcc, s7, v33                         ; 4A3A4207
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v30, v29                             ; 3E303B1E
>	v_add_i32_e32 v29, vcc, s6, v33                         ; 4A3A4206
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v30, v29                             ; 3E323B1E
>	v_add_i32_e32 v29, vcc, s5, v33                         ; 4A3A4205
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v30, v29                             ; 3E343B1E
>	v_add_i32_e32 v29, vcc, s4, v33                         ; 4A3A4204
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	v_mac_f32_e32 v28, v30, v29                             ; 3E383B1E
>	s_cbranch_scc1 BB0_6                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v35                              ; 7E3A1123
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v31, v30                              ; 3E103D1F
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v31, v30                             ; 3E2E3D1F
>	v_add_i32_e32 v30, vcc, s11, v29                        ; 4A3C3A0B
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v31, v30                             ; 3E363D1F
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v31, v30                              ; 3E0C3D1F
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v31, v30                              ; 3E0A3D1F
>	v_add_i32_e32 v30, vcc, s10, v29                        ; 4A3C3A0A
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v31, v30                              ; 3E0E3D1F
>	v_add_i32_e32 v30, vcc, s9, v29                         ; 4A3C3A09
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v31, v30                              ; 3E123D1F
>	v_add_i32_e32 v30, vcc, s8, v29                         ; 4A3C3A08
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v31, v30                             ; 3E2C3D1F
>	v_add_i32_e32 v30, vcc, s7, v29                         ; 4A3C3A07
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v31, v30                             ; 3E303D1F
>	v_add_i32_e32 v30, vcc, s6, v29                         ; 4A3C3A06
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v31, v30                             ; 3E323D1F
>	v_add_i32_e32 v30, vcc, s5, v29                         ; 4A3C3A05
>	v_add_i32_e32 v29, vcc, s4, v29                         ; 4A3A3A04
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v31, v30                             ; 3E343D1F
>	v_mac_f32_e32 v28, v31, v29                             ; 3E383B1F
>	s_buffer_load_dword s4, s[0:3], 0x388                   ; C20200FF 00000388
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	s_cmp_eq_u32 s4, 0                                      ; BF068004
>	s_cbranch_scc1 BB0_8                                    ; BF850000
>	v_cvt_i32_f32_e32 v29, v36                              ; 7E3A1124
>	v_mul_lo_i32 v29, v29, 48                               ; D2D6001D 0001611D
>	v_add_i32_e32 v30, vcc, 0x70, v29                       ; 4A3C3AFF 00000070
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v8, v32, v30                              ; 3E103D20
>	v_add_i32_e32 v30, vcc, 0x7c, v29                       ; 4A3C3AFF 0000007C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v0, v30                           ; 0A3C3D00
>	v_mac_f32_e32 v23, v32, v30                             ; 3E2E3D20
>	v_add_i32_e32 v30, vcc, 0x8c, v29                       ; 4A3C3AFF 0000008C
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_subrev_f32_e32 v30, v1, v30                           ; 0A3C3D01
>	v_mac_f32_e32 v27, v32, v30                             ; 3E363D20
>	v_add_i32_e32 v30, vcc, 0x74, v29                       ; 4A3C3AFF 00000074
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v6, v32, v30                              ; 3E0C3D20
>	v_add_i32_e32 v30, vcc, 0x78, v29                       ; 4A3C3AFF 00000078
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v5, v32, v30                              ; 3E0A3D20
>	v_add_i32_e32 v30, vcc, 0x80, v29                       ; 4A3C3AFF 00000080
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v7, v32, v30                              ; 3E0E3D20
>	v_add_i32_e32 v30, vcc, 0x84, v29                       ; 4A3C3AFF 00000084
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v9, v32, v30                              ; 3E123D20
>	v_add_i32_e32 v30, vcc, 0x88, v29                       ; 4A3C3AFF 00000088
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v22, v32, v30                             ; 3E2C3D20
>	v_add_i32_e32 v30, vcc, 0x90, v29                       ; 4A3C3AFF 00000090
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v24, v32, v30                             ; 3E303D20
>	v_add_i32_e32 v30, vcc, 0x94, v29                       ; 4A3C3AFF 00000094
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v25, v32, v30                             ; 3E323D20
>	v_add_i32_e32 v30, vcc, 0x98, v29                       ; 4A3C3AFF 00000098
>	v_add_i32_e32 v29, vcc, 0x9c, v29                       ; 4A3A3AFF 0000009C
>	buffer_load_dword v29, v29, s[0:3], 0 offen             ; E0301000 80001D1D
>	buffer_load_dword v30, v30, s[0:3], 0 offen             ; E0301000 80001E1E
>	s_waitcnt vmcnt(1)                                      ; BF8C0F71
>	v_subrev_f32_e32 v29, v14, v29                          ; 0A3A3B0E
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>	v_mac_f32_e32 v26, v32, v30                             ; 3E343D20
>	v_mac_f32_e32 v28, v32, v29                             ; 3E383B20
>	v_mul_f32_e32 v29, v6, v11                              ; 103A1706
>	v_mac_f32_e32 v29, v8, v10                              ; 3E3A1508
>	v_mac_f32_e32 v29, v5, v12                              ; 3E3A1905
>	v_mac_f32_e32 v29, v23, v13                             ; 3E3A1B17
>	v_mul_f32_e32 v23, v9, v11                              ; 102E1709
>	v_mac_f32_e32 v23, v7, v10                              ; 3E2E1507
>	v_mac_f32_e32 v23, v22, v12                             ; 3E2E1916
>	s_buffer_load_dword s7, s[0:3], 0x3                     ; C2038103
>	v_mac_f32_e32 v23, v27, v13                             ; 3E2E1B1B
>	v_mul_f32_e32 v27, v25, v11                             ; 10361719
>	v_mul_f32_e32 v11, 0, v11                               ; 10161680
>	v_mac_f32_e32 v27, v24, v10                             ; 3E361518
>	v_mac_f32_e32 v11, 0, v10                               ; 3E161480
>	v_add_f32_e32 v19, v19, v19                             ; 06262713
>	v_add_f32_e32 v15, v15, v15                             ; 061E1F0F
>	v_mac_f32_e32 v27, v26, v12                             ; 3E36191A
>	v_mac_f32_e32 v11, 0, v12                               ; 3E161880
>	v_mad_f32 v12, v19, v8, -v8                             ; D282000C 84221113
>	v_mad_f32 v20, 2.0, v20, -1.0                           ; D2820014 03CE28F4
>	v_mad_f32 v16, 2.0, v16, -1.0                           ; D2820010 03CE20F4
>	v_mad_f32 v8, v15, v8, -v8                              ; D2820008 8422110F
>	v_mad_f32 v21, 2.0, v21, -1.0                           ; D2820015 03CE2AF4
>	v_mac_f32_e32 v12, v6, v20                              ; 3E182906
>	v_mac_f32_e32 v8, v6, v16                               ; 3E102106
>	v_mad_f32 v17, 2.0, v17, -1.0                           ; D2820011 03CE22F4
>	v_add_f32_e32 v0, v0, v29                               ; 06003B00
>	v_mad_f32 v6, v15, v24, -v24                            ; D2820006 8462310F
>	v_mac_f32_e32 v12, v5, v21                              ; 3E182B05
>	v_mac_f32_e32 v8, v5, v17                               ; 3E102305
>	v_mad_f32 v5, v15, v7, -v7                              ; D2820005 841E0F0F
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mul_f32_e32 v15, s7, v0                               ; 101E0007
>	s_buffer_load_dword s7, s[0:3], 0x7                     ; C2038107
>	s_buffer_load_dword s11, s[0:3], 0xb                    ; C205810B
>	s_buffer_load_dword s4, s[0:3], 0x0                     ; C2020100
>	s_buffer_load_dword s5, s[0:3], 0x1                     ; C2028101
>	v_add_f32_e32 v1, v1, v23                               ; 06022F01
>	v_mac_f32_e32 v27, v28, v13                             ; 3E361B1C
>	v_add_f32_e32 v10, v13, v11                             ; 0614170D
>	v_add_f32_e32 v11, v14, v27                             ; 0616370E
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s7, v1                               ; 3E1E0207
>	v_mad_f32 v13, v19, v7, -v7                             ; D282000D 841E0F13
>	v_mac_f32_e32 v15, s11, v11                             ; 3E1E160B
>	s_buffer_load_dword s11, s[0:3], 0xf                    ; C205810F
>	v_mac_f32_e32 v13, v9, v20                              ; 3E1A2909
>	v_mac_f32_e32 v5, v9, v16                               ; 3E0A2109
>	v_mul_f32_e32 v7, s4, v0                                ; 100E0004
>	s_buffer_load_dword s8, s[0:3], 0x4                     ; C2040104
>	v_mul_f32_e32 v9, s5, v0                                ; 10120005
>	s_buffer_load_dword s4, s[0:3], 0x5                     ; C2020105
>	s_buffer_load_dword s6, s[0:3], 0x2                     ; C2030102
>	s_buffer_load_dword s5, s[0:3], 0x6                     ; C2028106
>	s_buffer_load_dword s9, s[0:3], 0x8                     ; C2048108
>	s_buffer_load_dword s10, s[0:3], 0x9                    ; C2050109
>	s_buffer_load_dword s7, s[0:3], 0xa                     ; C203810A
>	s_buffer_load_dword s12, s[0:3], 0xc                    ; C206010C
>	s_buffer_load_dword s13, s[0:3], 0xd                    ; C206810D
>	s_buffer_load_dword s14, s[0:3], 0xe                    ; C207010E
>	s_buffer_load_dword s15, s[0:3], 0x14                   ; C2078114
>	s_buffer_load_dword s16, s[0:3], 0x15                   ; C2080115
>	s_buffer_load_dword s17, s[0:3], 0x16                   ; C2088116
>	s_buffer_load_dword s18, s[0:3], 0x17                   ; C2090117
>	s_buffer_load_dword s0, s[0:3], 0x1b                    ; C200011B
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	v_mac_f32_e32 v15, s11, v10                             ; 3E1E140B
>	v_mac_f32_e32 v6, v25, v16                              ; 3E0C2119
>	v_mac_f32_e32 v7, s8, v1                                ; 3E0E0208
>	v_mac_f32_e32 v9, s4, v1                                ; 3E120204
>	v_mul_f32_e32 v16, s0, v15                              ; 10201E00
>	exp 15, 32, 0, 0, 0, v0, v1, v11, v16                   ; F800020F 100B0100
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>	v_mul_f32_e32 v0, s6, v0                                ; 10000006
>	v_mac_f32_e32 v0, s5, v1                                ; 3E000205
>	v_mac_f32_e32 v0, s7, v11                               ; 3E001607
>	v_mac_f32_e32 v0, s14, v10                              ; 3E00140E
>	v_mov_b32_e32 v1, s15                                   ; 7E02020F
>	v_mac_f32_e32 v1, s16, v0                               ; 3E020010
>	v_add_f32_e64 v1, v1, 0 clamp                           ; D2060801 00010101
>	v_log_f32_e32 v1, v1                                    ; 7E024F01
>	v_mad_f32 v14, v19, v24, -v24                           ; D282000E 84623113
>	v_mac_f32_e32 v14, v25, v20                             ; 3E1C2919
>	v_mac_f32_e32 v7, s9, v11                               ; 3E0E1609
>	v_mac_f32_e32 v9, s10, v11                              ; 3E12160A
>	v_mul_legacy_f32_e32 v1, s17, v1                        ; 0E020211
>	v_mac_f32_e32 v14, v26, v21                             ; 3E1C2B1A
>	v_mac_f32_e32 v5, v22, v17                              ; 3E0A2316
>	v_mac_f32_e32 v7, s12, v10                              ; 3E0E140C
>	v_mac_f32_e32 v9, s13, v10                              ; 3E12140D
>	v_exp_f32_e32 v1, v1                                    ; 7E024B01
>	v_sub_f32_e64 v10, 1.0, s18                             ; D208000A 000024F2
>	v_mac_f32_e32 v10, s18, v1                              ; 3E140212
>	v_mac_f32_e32 v13, v22, v21                             ; 3E1A2B16
>	v_mac_f32_e32 v6, v26, v17                              ; 3E0C231A
>	v_mul_f32_e32 v1, v5, v14                               ; 10021D05
>	v_mul_f32_e32 v11, v6, v12                              ; 10161906
>	v_mul_f32_e32 v16, v8, v13                              ; 10201B08
>	v_mul_f32_e32 v10, v10, v10                             ; 1014150A
>	v_add_f32_e32 v18, v18, v18                             ; 06242512
>	v_mad_f32 v1, v13, v6, -v1                              ; D2820001 84060D0D
>	v_mad_f32 v11, v14, v8, -v11                            ; D282000B 842E110E
>	v_mad_f32 v16, v12, v5, -v16                            ; D2820010 84420B0C
>	v_mad_f32 v1, v18, v1, -v1                              ; D2820001 84060312
>	exp 15, 33, 0, 0, 0, v3, v4, v10, v0                    ; F800021F 000A0403
>	v_mad_f32 v11, v18, v11, -v11                           ; D282000B 842E1712
>	v_mad_f32 v16, v18, v16, -v16                           ; D2820010 84422112
>	exp 15, 34, 0, 0, 0, v8, v5, v6, v1                     ; F800022F 01060508
>	exp 15, 35, 0, 0, 0, v11, v16, v12, v13                 ; F800023F 0D0C100B
>	exp 15, 36, 0, 0, 0, v14, v0, v0, v0                    ; F800024F 0000000E
>	exp 15, 12, 0, 1, 0, v7, v9, v0, v15                    ; F80008CF 0F000907
>	s_waitcnt expcnt(0)                                     ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 32
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 2184 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.flatshade_colors = 0
>  prolog.poly_stipple = 0
>  prolog.force_persp_sample_interp = 0
>  prolog.force_linear_sample_interp = 0
>  prolog.force_persp_center_interp = 1
>  prolog.force_linear_center_interp = 0
>  prolog.bc_optimize_for_persp = 0
>  prolog.bc_optimize_for_linear = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader prolog disassembly:
>	s_mov_b64 s[12:13], exec       ; BE8C047E
>	s_wqm_b64 exec, exec           ; BEFE0A7E
>	v_mov_b32_e32 v0, v2           ; 7E000302
>	v_mov_b32_e32 v1, v3           ; 7E020303
>	v_mov_b32_e32 v4, v2           ; 7E080302
>	v_mov_b32_e32 v5, v3           ; 7E0A0303
>	s_and_b64 exec, exec, s[12:13] ; 87FE0C7E
>Shader main disassembly:
>	s_mov_b64 s[6:7], exec                                          ; BE86047E
>	s_wqm_b64 exec, exec                                            ; BEFE0A7E
>	s_load_dwordx4 s[0:3], s[2:3], 0x0                              ; C0800300
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v21, v4, 3, 2, [m0]                             ; C8540B04
>	v_interp_p2_f32 v21, [v21], v5, 3, 2, [m0]                      ; C8550B05
>	v_interp_p1_f32 v22, v4, 0, 3, [m0]                             ; C8580C04
>	v_interp_p2_f32 v22, [v22], v5, 0, 3, [m0]                      ; C8590C05
>	v_interp_p1_f32 v23, v4, 1, 3, [m0]                             ; C85C0D04
>	v_interp_p2_f32 v23, [v23], v5, 1, 3, [m0]                      ; C85D0D05
>	v_interp_p1_f32 v7, v4, 2, 3, [m0]                              ; C81C0E04
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_buffer_load_dword s8, s[0:3], 0x0                             ; C2040100
>	v_interp_p2_f32 v7, [v7], v5, 2, 3, [m0]                        ; C81D0E05
>	v_interp_p1_f32 v8, v4, 3, 3, [m0]                              ; C8200F04
>	s_buffer_load_dword s9, s[0:3], 0x1                             ; C2048101
>	v_interp_p2_f32 v8, [v8], v5, 3, 3, [m0]                        ; C8210F05
>	v_interp_p1_f32 v9, v4, 0, 4, [m0]                              ; C8241004
>	v_mov_b32_e32 v6, v2                                            ; 7E0C0302
>	s_buffer_load_dword s12, s[0:3], 0x2                            ; C2060102
>	v_interp_p2_f32 v9, [v9], v5, 0, 4, [m0]                        ; C8251005
>	v_interp_p1_f32 v1, v6, 0, 0, [m0]                              ; C8040006
>	v_interp_p2_f32 v1, [v1], v3, 0, 0, [m0]                        ; C8050003
>	v_interp_p1_f32 v0, v6, 1, 0, [m0]                              ; C8000106
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_sub_f32_e32 v24, s8, v1                                       ; 08300208
>	v_interp_p2_f32 v0, [v0], v3, 1, 0, [m0]                        ; C8010103
>	v_interp_p1_f32 v2, v6, 2, 0, [m0]                              ; C8080206
>	v_sub_f32_e32 v25, s9, v0                                       ; 08320009
>	v_mul_f32_e32 v10, v24, v24                                     ; 10143118
>	v_interp_p2_f32 v2, [v2], v3, 2, 0, [m0]                        ; C8090203
>	v_sub_f32_e32 v26, s12, v2                                      ; 0834040C
>	v_mac_f32_e32 v10, v25, v25                                     ; 3E143319
>	v_mac_f32_e32 v10, v26, v26                                     ; 3E14351A
>	v_rsq_f32_e32 v27, v10                                          ; 7E365D0A
>	v_mul_f32_e32 v10, v7, v7                                       ; 10140F07
>	v_mac_f32_e32 v10, v8, v8                                       ; 3E141108
>	v_mac_f32_e32 v10, v9, v9                                       ; 3E141309
>	v_rsq_f32_e32 v10, v10                                          ; 7E145D0A
>	s_load_dwordx8 s[44:51], s[4:5], 0x30                           ; C0D60530
>	s_load_dwordx4 s[60:63], s[4:5], 0x3c                           ; C09E053C
>	s_load_dwordx8 s[52:59], s[4:5], 0x40                           ; C0DA0540
>	v_mul_f32_e32 v28, v10, v7                                      ; 10380F0A
>	v_interp_p1_f32 v7, v6, 0, 1, [m0]                              ; C81C0406
>	v_mul_f32_e32 v29, v10, v8                                      ; 103A110A
>	v_interp_p2_f32 v7, [v7], v3, 0, 1, [m0]                        ; C81D0403
>	v_interp_p1_f32 v8, v6, 1, 1, [m0]                              ; C8200506
>	v_interp_p2_f32 v8, [v8], v3, 1, 1, [m0]                        ; C8210503
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s60, s60, s51                                         ; 873C333C
>	v_mul_f32_e32 v30, v10, v9                                      ; 103C130A
>	image_sample v[9:11], v[7:8], s[44:51], s[60:63] dmask:0x7      ; F0800700 01EB0907
>	s_load_dwordx8 s[44:51], s[4:5], 0x50                           ; C0D60550
>	s_load_dwordx4 s[60:63], s[4:5], 0x5c                           ; C09E055C
>	s_buffer_load_dword s8, s[0:3], 0x11                            ; C2040111
>	s_buffer_load_dword s9, s[0:3], 0x12                            ; C2048112
>	s_load_dwordx8 s[32:39], s[4:5], 0x0                            ; C0D00500
>	s_load_dwordx4 s[40:43], s[4:5], 0xc                            ; C094050C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s60, s60, s51                                         ; 873C333C
>	image_sample v[14:15], v[7:8], s[44:51], s[60:63] dmask:0x6     ; F0800600 01EB0E07
>	s_load_dwordx4 s[44:47], s[4:5], 0x4c                           ; C096054C
>	v_mul_f32_e32 v31, v27, v24                                     ; 103E311B
>	s_and_b32 s40, s40, s39                                         ; 87282728
>	v_mul_f32_e32 v32, v27, v25                                     ; 1040331B
>	s_load_dwordx8 s[20:27], s[4:5], 0x10                           ; C0CA0510
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s44, s44, s59                                         ; 872C3B2C
>	image_sample v[19:20], v[7:8], s[52:59], s[44:47] dmask:0xa     ; F0800A00 016D1307
>	v_interp_p1_f32 v12, v4, 0, 2, [m0]                             ; C8300804
>	v_interp_p2_f32 v12, [v12], v5, 0, 2, [m0]                      ; C8310805
>	v_interp_p1_f32 v33, v4, 1, 2, [m0]                             ; C8840904
>	v_interp_p2_f32 v33, [v33], v5, 1, 2, [m0]                      ; C8850905
>	v_interp_p1_f32 v34, v4, 2, 2, [m0]                             ; C8880A04
>	v_mov_b32_e32 v4, 0x403b800a                                    ; 7E0802FF 403B800A
>	s_buffer_load_dword s44, s[0:3], 0x10                           ; C2160110
>	v_interp_p2_f32 v34, [v34], v5, 2, 2, [m0]                      ; C8890A05
>	v_mad_f32 v5, v4, v28, v1                                       ; D2820005 04063904
>	s_buffer_load_dword s45, s[0:3], 0x14                           ; C2168114
>	v_mul_f32_e32 v18, s8, v5                                       ; 10240A08
>	s_buffer_load_dword s46, s[0:3], 0x15                           ; C2170115
>	s_buffer_load_dword s8, s[0:3], 0x18                            ; C2040118
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mul_f32_e32 v16, s44, v5                                      ; 10200A2C
>	v_mad_f32 v17, v4, v29, v0                                      ; D2820011 04023B04
>	s_buffer_load_dword s47, s[0:3], 0x16                           ; C2178116
>	v_mul_f32_e32 v5, s9, v5                                        ; 100A0A09
>	v_mac_f32_e32 v16, s45, v17                                     ; 3E20222D
>	v_mad_f32 v4, v4, v30, v2                                       ; D2820004 040A3D04
>	s_buffer_load_dword s9, s[0:3], 0x19                            ; C2048119
>	s_buffer_load_dword s44, s[0:3], 0x1a                           ; C216011A
>	v_mac_f32_e32 v18, s46, v17                                     ; 3E24222E
>	v_mac_f32_e32 v16, s8, v4                                       ; 3E200808
>	s_buffer_load_dword s45, s[0:3], 0x1c                           ; C216811C
>	s_buffer_load_dword s46, s[0:3], 0x1d                           ; C217011D
>	s_buffer_load_dword s8, s[0:3], 0x1e                            ; C204011E
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mac_f32_e32 v5, s47, v17                                      ; 3E0A222F
>	v_mac_f32_e32 v18, s9, v4                                       ; 3E240809
>	v_mac_f32_e32 v5, s44, v4                                       ; 3E0A082C
>	v_add_f32_e32 v17, s45, v16                                     ; 0622202D
>	v_add_f32_e32 v16, s8, v5                                       ; 06200A08
>	v_add_f32_e32 v18, s46, v18                                     ; 0624242E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	image_sample_c v35, v[16:19], s[32:39], s[40:43] dmask:0x1      ; F0A00100 01482310
>	v_add_f32_e32 v16, v20, v20                                     ; 06202914
>	v_add_f32_e32 v18, v19, v19                                     ; 06242713
>	v_mad_f32 v19, 2.0, v19, -1.0                                   ; D2820013 03CE26F4
>	v_mad_f32 v4, v16, v12, -v12                                    ; D2820004 84321910
>	v_mad_f32 v5, v16, v33, -v33                                    ; D2820005 84864310
>	v_mad_f32 v12, v16, v34, -v34                                   ; D282000C 848A4510
>	v_mad_f32 v17, 2.0, v20, -1.0                                   ; D2820011 03CE28F4
>	v_mad_f32 v16, v18, v19, -v19                                   ; D2820010 844E2712
>	v_mac_f32_e32 v16, v17, v17                                     ; 3E202311
>	v_add_f32_e64 v16, v16, 0 clamp                                 ; D2060810 00010110
>	v_sub_f32_e32 v16, 0x3f8020c5, v16                              ; 082020FF 3F8020C5
>	v_mac_f32_e32 v4, v19, v21                                      ; 3E082B13
>	v_sqrt_f32_e32 v16, v16                                         ; 7E206710
>	v_mac_f32_e32 v5, v19, v22                                      ; 3E0A2D13
>	v_mac_f32_e32 v12, v19, v23                                     ; 3E182F13
>	v_mac_f32_e32 v4, v16, v28                                      ; 3E083910
>	v_mac_f32_e32 v5, v16, v29                                      ; 3E0A3B10
>	v_mac_f32_e32 v12, v16, v30                                     ; 3E183D10
>	v_cubema_f32 v16, v4, v5, v12                                   ; D28E0010 04320B04
>	v_rcp_f32_e64 v17, |v16|                                        ; D3540111 00000110
>	v_cubetc_f32 v18, v4, v5, v12                                   ; D28C0012 04320B04
>	v_mov_b32_e32 v16, 0x3fc00000                                   ; 7E2002FF 3FC00000
>	v_cubesc_f32 v19, v4, v5, v12                                   ; D28A0013 04320B04
>	v_mad_f32 v21, v17, v18, v16                                    ; D2820015 04422511
>	v_mad_f32 v20, v17, v19, v16                                    ; D2820014 04422711
>	v_mul_f32_e32 v17, v31, v4                                      ; 1022091F
>	v_mac_f32_e32 v17, v32, v5                                      ; 3E220B20
>	v_mul_f32_e32 v33, v27, v26                                     ; 1042351B
>	v_mac_f32_e32 v17, v33, v12                                     ; 3E221921
>	v_mul_f32_e32 v34, v4, v17                                      ; 10442304
>	v_mul_f32_e32 v36, v5, v17                                      ; 10482305
>	v_mul_f32_e32 v37, v12, v17                                     ; 104A230C
>	v_mac_f32_e32 v34, v4, v17                                      ; 3E442304
>	v_mac_f32_e32 v36, v5, v17                                      ; 3E482305
>	v_mac_f32_e32 v37, v12, v17                                     ; 3E4A230C
>	v_add_f32_e64 v17, v17, 0 clamp                                 ; D2060811 00010111
>	v_sub_f32_e32 v17, 1.0, v17                                     ; 082222F2
>	v_mad_f32 v19, -v24, v27, v34                                   ; D2820013 248A3718
>	v_mad_f32 v22, -v25, v27, v36                                   ; D2820016 24923719
>	v_mad_f32 v23, -v26, v27, v37                                   ; D2820017 2496371A
>	s_load_dwordx4 s[28:31], s[4:5], 0x1c                           ; C08E051C
>	v_log_f32_e32 v17, v17                                          ; 7E224F11
>	s_load_dwordx8 s[12:19], s[4:5], 0x20                           ; C0C60520
>	s_load_dwordx4 s[32:35], s[4:5], 0x2c                           ; C090052C
>	v_cubetc_f32 v38, v19, v22, v23                                 ; D28C0026 045E2D13
>	v_cubeid_f32 v18, v19, v22, v23                                 ; D2880012 045E2D13
>	v_cubesc_f32 v39, v19, v22, v23                                 ; D28A0027 045E2D13
>	v_cubema_f32 v22, v19, v22, v23                                 ; D28E0016 045E2D13
>	v_rcp_f32_e64 v22, |v22|                                        ; D3540116 00000116
>	v_mov_b32_e32 v19, 0x40c00000                                   ; 7E2602FF 40C00000
>	v_mul_legacy_f32_e32 v17, 0x40a00000, v17                       ; 0E2222FF 40A00000
>	s_buffer_load_dword s64, s[0:3], 0x4                            ; C2200104
>	v_mad_f32 v19, -v15, v19, v19                                   ; D2820013 244E270F
>	v_exp_f32_e32 v23, v17                                          ; 7E2E4B11
>	v_mad_f32 v17, v22, v38, v16                                    ; D2820011 04424D16
>	v_max_f32_e32 v15, 0, v15                                       ; 201E1E80
>	v_mac_f32_e32 v16, v22, v39                                     ; 3E204F16
>	s_buffer_load_dword s65, s[0:3], 0x5                            ; C2208105
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s28, s28, s27                                         ; 871C1B1C
>	v_cubeid_f32 v22, v4, v5, v12                                   ; D2880016 04320B04
>	s_and_b32 s32, s32, s19                                         ; 87201320
>	v_mul_f32_e32 v38, v15, v23                                     ; 104C2F0F
>	image_sample v[20:23], v[20:23], s[20:27], s[28:31] dmask:0xf   ; F0800F00 00E51414
>	image_sample_l v[17:19], v[16:19], s[12:19], s[32:35] dmask:0x7 ; F0900700 01031110
>	s_buffer_load_dword s8, s[0:3], 0x6                             ; C2040106
>	s_buffer_load_dword s9, s[0:3], 0xc                             ; C204810C
>	s_buffer_load_dword s12, s[0:3], 0xd                            ; C206010D
>	s_buffer_load_dword s13, s[0:3], 0xe                            ; C206810E
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v16, v18, v38                                     ; 10204D12
>	v_mad_f32 v18, v24, v27, -v34                                   ; D2820012 848A3718
>	v_mul_f32_e32 v15, v17, v38                                     ; 101E4D11
>	v_mul_f32_e32 v17, v19, v38                                     ; 10224D13
>	v_mul_f32_e32 v38, v23, v20                                     ; 104C2917
>	v_mul_f32_e32 v21, v23, v21                                     ; 102A2B17
>	v_mul_f32_e32 v22, v23, v22                                     ; 102C2D17
>	v_mul_f32_e32 v23, v28, v18                                     ; 102E251C
>	v_mul_f32_e32 v18, s64, v4                                      ; 10240840
>	v_mad_f32 v19, v25, v27, -v36                                   ; D2820013 84923719
>	v_mad_f32 v18, -s65, v5, -v18                                   ; D2820012 A44A0A41
>	v_mac_f32_e32 v23, v29, v19                                     ; 3E2E271D
>	v_mad_f32 v20, v26, v27, -v37                                   ; D2820014 8496371A
>	v_mul_f32_e32 v19, v35, v35                                     ; 10264723
>	v_mul_f32_e32 v24, v28, v31                                     ; 10303F1C
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v18, -s8, v12, v18                                    ; D2820012 244A1808
>	v_mul_f32_e32 v25, s12, v19                                     ; 1032260C
>	v_mac_f32_e32 v23, v30, v20                                     ; 3E2E291E
>	v_mul_f32_e32 v20, s9, v19                                      ; 10282609
>	v_mul_f32_e32 v19, s13, v19                                     ; 1026260D
>	v_mac_f32_e32 v24, v29, v32                                     ; 3E30411D
>	v_add_f32_e64 v18, v18, 0 clamp                                 ; D2060812 00010112
>	v_mul_f32_e32 v20, v14, v20                                     ; 1028290E
>	v_mul_f32_e32 v25, v14, v25                                     ; 1032330E
>	v_mul_f32_e32 v26, v14, v19                                     ; 1034270E
>	v_mul_f32_e32 v19, v25, v18                                     ; 10262519
>	v_mul_f32_e32 v20, v20, v18                                     ; 10282514
>	v_mul_f32_e32 v25, 4.0, v14                                     ; 10321CF6
>	v_mul_f32_e32 v18, v26, v18                                     ; 1024251A
>	v_mac_f32_e32 v24, v30, v33                                     ; 3E30431E
>	v_mac_f32_e32 v18, v25, v22                                     ; 3E242D19
>	v_sub_f32_e32 v22, 1.0, v24                                     ; 082C30F2
>	v_mac_f32_e32 v19, v25, v21                                     ; 3E262B19
>	v_add_f32_e32 v21, 1.0, v23                                     ; 062A2EF2
>	v_add_f32_e64 v22, v22, 0 clamp                                 ; D2060816 00010116
>	v_subrev_f32_e32 v21, v22, v21                                  ; 0A2A2B16
>	v_add_f32_e64 v21, v21, 0 clamp                                 ; D2060815 00010115
>	v_sub_f32_e32 v22, 1.0, v21                                     ; 082C2AF2
>	v_mad_f32 v21, -v21, v22, v22                                   ; D2820015 245A2D15
>	v_mac_f32_e32 v20, v25, v38                                     ; 3E284D19
>	v_mul_f32_e32 v21, v21, v14                                     ; 102A1D15
>	v_mov_b32_e32 v22, 0xc8                                         ; 7E2C02FF 000000C8
>	v_mov_b32_e32 v23, 0                                            ; 7E2E0280
>	s_branch BB0_2                                                  ; BF820000
>	v_add_i32_e32 v24, vcc, 0xffffffe8, v22                         ; 4A302CFF FFFFFFE8
>	buffer_load_dword v24, v24, s[0:3], 0 offen                     ; E0301000 80001818
>	v_add_i32_e32 v25, vcc, 0xffffffec, v22                         ; 4A322CFF FFFFFFEC
>	buffer_load_dword v25, v25, s[0:3], 0 offen                     ; E0301000 80001919
>	v_add_i32_e32 v26, vcc, -16, v22                                ; 4A342CD0
>	buffer_load_dword v26, v26, s[0:3], 0 offen                     ; E0301000 80001A1A
>	v_add_i32_e32 v29, vcc, -12, v22                                ; 4A3A2CCC
>	buffer_load_dword v29, v29, s[0:3], 0 offen                     ; E0301000 80001D1D
>	v_add_i32_e32 v30, vcc, -8, v22                                 ; 4A3C2CC8
>	buffer_load_dword v30, v30, s[0:3], 0 offen                     ; E0301000 80001E1E
>	v_add_i32_e32 v23, vcc, 1, v23                                  ; 4A2E2E81
>	s_waitcnt vmcnt(4)                                              ; BF8C0F74
>	v_subrev_f32_e32 v24, v1, v24                                   ; 0A303101
>	v_mul_f32_e32 v27, v24, v24                                     ; 10363118
>	s_waitcnt vmcnt(3)                                              ; BF8C0F73
>	v_subrev_f32_e32 v25, v0, v25                                   ; 0A323300
>	v_mac_f32_e32 v27, v25, v25                                     ; 3E363319
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_subrev_f32_e32 v26, v2, v26                                   ; 0A343502
>	v_mac_f32_e32 v27, v26, v26                                     ; 3E36351A
>	v_rsq_f32_e32 v28, v27                                          ; 7E385D1B
>	v_mul_f32_e32 v24, v28, v24                                     ; 1030311C
>	v_mul_f32_e32 v27, v28, v27                                     ; 1036371C
>	v_mul_f32_e32 v25, v28, v25                                     ; 1032331C
>	v_mul_f32_e32 v26, v28, v26                                     ; 1034351C
>	v_add_i32_e32 v28, vcc, -4, v22                                 ; 4A382CC4
>	s_waitcnt vmcnt(1)                                              ; BF8C0F71
>	v_mul_f32_e32 v27, v29, v27                                     ; 1036371D
>	buffer_load_dword v29, v22, s[0:3], 0 offen                     ; E0301000 80001D16
>	buffer_load_dword v28, v28, s[0:3], 0 offen                     ; E0301000 80001C1C
>	v_mul_f32_e32 v24, v4, v24                                      ; 10303104
>	v_mac_f32_e32 v24, v5, v25                                      ; 3E303305
>	v_add_f32_e64 v25, v27, 0 clamp                                 ; D2060819 0001011B
>	v_mac_f32_e32 v24, v12, v26                                     ; 3E30350C
>	s_waitcnt vmcnt(2)                                              ; BF8C0F72
>	v_mad_f32 v26, -v25, v30, v30                                   ; D282001A 247A3D19
>	v_add_f32_e64 v24, v24, 0 clamp                                 ; D2060818 00010118
>	v_mul_f32_e32 v26, v14, v26                                     ; 1034350E
>	v_mac_f32_e32 v20, v26, v24                                     ; 3E28311A
>	v_add_i32_e32 v22, vcc, 32, v22                                 ; 4A2C2CA0
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mad_f32 v27, -v25, v28, v28                                   ; D282001B 24723919
>	v_mad_f32 v25, -v25, v29, v29                                   ; D2820019 24763B19
>	v_mul_f32_e32 v27, v14, v27                                     ; 1036370E
>	v_mul_f32_e32 v25, v14, v25                                     ; 1032330E
>	v_mac_f32_e32 v19, v27, v24                                     ; 3E26311B
>	v_mac_f32_e32 v18, v25, v24                                     ; 3E243119
>	v_cmp_lt_i32_e32 vcc, 2, v23                                    ; 7D022E82
>	s_and_b64 vcc, exec, vcc                                        ; 87EA6A7E
>	s_cbranch_vccz BB0_1                                            ; BF860000
>	s_and_b64 exec, exec, s[6:7]                                    ; 87FE067E
>	s_load_dwordx8 s[12:19], s[4:5], 0x60                           ; C0C60560
>	s_load_dwordx4 s[4:7], s[4:5], 0x6c                             ; C082056C
>	s_buffer_load_dword s9, s[0:3], 0x58                            ; C2048158
>	s_buffer_load_dword s8, s[0:3], 0x57                            ; C2040157
>	v_mul_f32_e32 v5, v21, v15                                      ; 100A1F15
>	v_mac_f32_e32 v5, v9, v20                                       ; 3E0A2909
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	s_and_b32 s4, s4, s19                                           ; 87041304
>	image_sample v[22:24], v[7:8], s[12:19], s[4:7] dmask:0x7       ; F0800700 00231607
>	s_waitcnt vmcnt(0)                                              ; BF8C0F70
>	v_mul_f32_e32 v1, 0x3e99999a, v22                               ; 10022CFF 3E99999A
>	v_mac_f32_e32 v1, 0x3f170a3d, v23                               ; 3E022EFF 3F170A3D
>	s_buffer_load_dword s4, s[0:3], 0x3                             ; C2020103
>	v_mac_f32_e32 v1, 0x3de147ae, v24                               ; 3E0230FF 3DE147AE
>	s_buffer_load_dword s5, s[0:3], 0x7                             ; C2028107
>	v_mul_f32_e32 v1, s9, v1                                        ; 10020209
>	v_mac_f32_e32 v1, s8, v1                                        ; 3E020208
>	v_mul_f32_e32 v2, v1, v22                                       ; 10042D01
>	v_mov_b32_e32 v9, 0x42000000                                    ; 7E1202FF 42000000
>	v_mac_f32_e32 v5, v9, v2                                        ; 3E0A0509
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mov_b32_e32 v2, s4                                            ; 7E040204
>	v_sub_f32_e32 v2, s5, v2                                        ; 08040405
>	v_add_f32_e32 v2, 0x3a83126f, v2                                ; 060404FF 3A83126F
>	v_rcp_f32_e32 v2, v2                                            ; 7E045502
>	v_subrev_f32_e32 v0, s4, v0                                     ; 0A000004
>	v_max_f32_e32 v0, 0, v0                                         ; 20000080
>	v_mul_f32_e32 v8, v21, v17                                      ; 10102315
>	v_mul_f32_e32 v0, v2, v0                                        ; 10000102
>	v_mul_f32_e32 v4, v1, v23                                       ; 10082F01
>	v_mul_f32_e32 v1, v1, v24                                       ; 10023101
>	v_mac_f32_e32 v8, v11, v18                                      ; 3E10250B
>	v_log_f32_e32 v0, v0                                            ; 7E004F00
>	v_mac_f32_e32 v8, v9, v1                                        ; 3E100309
>	v_floor_f32_e32 v1, s5                                          ; 7E024805
>	v_sub_f32_e32 v1, s5, v1                                        ; 08020205
>	v_mul_f32_e32 v1, 0x41000000, v1                                ; 100202FF 41000000
>	s_buffer_load_dword s6, s[0:3], 0x8                             ; C2030108
>	s_buffer_load_dword s7, s[0:3], 0x9                             ; C2038109
>	s_buffer_load_dword s0, s[0:3], 0xa                             ; C200010A
>	v_mul_legacy_f32_e32 v0, v1, v0                                 ; 0E000101
>	s_mov_b32 m0, s11                                               ; BEFC030B
>	v_interp_p1_f32 v1, v6, 2, 1, [m0]                              ; C8040606
>	v_mul_f32_e32 v7, v21, v16                                      ; 100E2115
>	v_exp_f32_e32 v0, v0                                            ; 7E004B00
>	v_mac_f32_e32 v7, v10, v19                                      ; 3E0E270A
>	v_add_f32_e64 v0, v0, 0 clamp                                   ; D2060800 00010100
>	v_interp_p2_f32 v1, [v1], v3, 2, 1, [m0]                        ; C8050603
>	v_mac_f32_e32 v7, v9, v4                                        ; 3E0E0909
>	v_mul_f32_e32 v4, v0, v1                                        ; 10080300
>	s_waitcnt lgkmcnt(0)                                            ; BF8C007F
>	v_mad_f32 v0, -v4, s6, s6                                       ; D2820000 20180D04
>	v_mad_f32 v1, -v4, s7, s7                                       ; D2820001 201C0F04
>	v_mad_f32 v2, -v4, s0, s0                                       ; D2820002 20000104
>	v_mac_f32_e32 v0, v4, v5                                        ; 3E000B04
>	v_mac_f32_e32 v1, v4, v7                                        ; 3E020F04
>	v_mac_f32_e32 v2, v4, v8                                        ; 3E041104
>	v_interp_p1_f32 v4, v6, 3, 0, [m0]                              ; C8100306
>	v_interp_p2_f32 v4, [v4], v3, 3, 0, [m0]                        ; C8110303
>	v_mov_b32_e32 v3, v4                                            ; 7E060304
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ; 5E000300
>	v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ; 5E020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; F8001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 72
>VGPRS: 40
>Spilled SGPRs: 0
>Spilled VGPRs: 0
>Code Size: 1668 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 6
>********************
>
>

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Attachments on bug 98541: 127683 | 128004 | 128006

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