Attachment 128899 Details for Bug 99368 – xrandr --verbose

xrandr --verbose

xrandr (text/plain), 2.40 KB, created by Platin on 2017-01-11 21:48:34 UTC

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Creator: Platin

Created: 2017-01-11 21:48:34 UTC

Size: 2.40 KB

patch

obsolete

>Screen 0: minimum 320 x 200, current 1366 x 768, maximum 16384 x 16384
>eDP connected primary 1366x768+0+0 (0x55) normal (normal left inverted right x axis y axis) 344mm x 194mm
>	Identifier: 0x51
>	Timestamp:  461146
>	Subpixel:   horizontal rgb
>	Gamma:      1.1:1.6:2.5
>	Brightness: 1.0
>	Clones:    
>	CRTC:       0
>	CRTCs:      0 1
>	Transform:  1.000000 0.000000 0.000000
>	            0.000000 1.000000 0.000000
>	            0.000000 0.000000 1.000000
>	           filter: 
>	EDID: 
>		00ffffffffffff0030e4680400000000
>		0018010495221378ea05f59458569228
>		1e505400000001010101010101010101
>		010101010101d01d56f4500016303020
>		350058c2100000190000000000000000
>		00000000000000000000000000fe004c
>		4720446973706c61790a2020000000fe
>		004c503135365748422d5450433100b3
>	scaling mode: Full aspect 
>		supported: None, Full, Center, Full aspect
>  1366x768 (0x55) 76.320MHz -HSync -VSync *current +preferred
>        h: width  1366 start 1414 end 1446 total 1610 skew    0 clock  47.40KHz
>        v: height  768 start  771 end  776 total  790           clock  60.00Hz
>  1280x720 (0x56) 74.500MHz -HSync +VSync
>        h: width  1280 start 1344 end 1472 total 1664 skew    0 clock  44.77KHz
>        v: height  720 start  723 end  728 total  748           clock  59.86Hz
>  1152x768 (0x57) 71.750MHz -HSync +VSync
>        h: width  1152 start 1216 end 1328 total 1504 skew    0 clock  47.71KHz
>        v: height  768 start  771 end  781 total  798           clock  59.78Hz
>  1024x768 (0x58) 63.500MHz -HSync +VSync
>        h: width  1024 start 1072 end 1176 total 1328 skew    0 clock  47.82KHz
>        v: height  768 start  771 end  775 total  798           clock  59.92Hz
>  800x600 (0x59) 38.250MHz -HSync +VSync
>        h: width   800 start  832 end  912 total 1024 skew    0 clock  37.35KHz
>        v: height  600 start  603 end  607 total  624           clock  59.86Hz
>  848x480 (0x5a) 31.500MHz -HSync +VSync
>        h: width   848 start  872 end  952 total 1056 skew    0 clock  29.83KHz
>        v: height  480 start  483 end  493 total  500           clock  59.66Hz
>  720x480 (0x5b) 26.750MHz -HSync +VSync
>        h: width   720 start  744 end  808 total  896 skew    0 clock  29.85KHz
>        v: height  480 start  483 end  493 total  500           clock  59.71Hz
>  640x480 (0x5c) 23.750MHz -HSync +VSync
>        h: width   640 start  664 end  720 total  800 skew    0 clock  29.69KHz
>        v: height  480 start  483 end  487 total  500           clock  59.38Hz

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Attachments on bug 99368: 128897 | 128898 | 128899 | 128901 | 129229

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