Attachment 130322 Details for Bug 100280 – drm-tip kernel dmesg hibernation output (drm.debug=0x1e)

drm-tip kernel dmesg hibernation output (drm.debug=0x1e)

drm-tip-dmesg.txt (text/plain), 9.00 KB, created by Jens on 2017-03-20 08:52:45 UTC

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Creator: Jens

Created: 2017-03-20 08:52:45 UTC

Size: 9.00 KB

patch

obsolete

>[ 1066.510283] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:30:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[ 1066.534260] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:85] for plane state ffff9c3c145bbb40
>[ 1066.534282] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:32:pipe A] has [PLANE:30:cursor A] with fb 85
>[ 1066.534294] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:30:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[ 1066.602728] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9c3c5069f800
>[ 1066.602737] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:32:pipe A] ffff9c3c50653800 state to ffff9c3c5069f800
>[ 1066.602742] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:26:primary A] ffff9c3c51cfe9c0 state to ffff9c3c5069f800
>[ 1066.602749] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9c3c51cfe9c0 to [CRTC:32:pipe A]
>[ 1066.602754] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:58] for plane state ffff9c3c51cfe9c0
>[ 1066.602761] [drm:drm_atomic_check_only [drm]] checking ffff9c3c5069f800
>[ 1066.602782] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:32:pipe A] has [PLANE:26:primary A] with fb 58
>[ 1066.602796] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[ 1066.602804] [drm:drm_atomic_nonblocking_commit [drm]] commiting ffff9c3c5069f800 nonblocking
>[ 1066.610391] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9c3c5069f800
>[ 1066.610397] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9c3c5069f800
>[ 1066.618765] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9c3c5069dc00
>[ 1066.618773] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:32:pipe A] ffff9c3c50654000 state to ffff9c3c5069dc00
>[ 1066.618780] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:26:primary A] ffff9c3c51cfecc0 state to ffff9c3c5069dc00
>[ 1066.618786] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9c3c51cfecc0 to [CRTC:32:pipe A]
>[ 1066.618792] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:87] for plane state ffff9c3c51cfecc0
>[ 1066.618798] [drm:drm_atomic_check_only [drm]] checking ffff9c3c5069dc00
>[ 1066.618820] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:32:pipe A] has [PLANE:26:primary A] with fb 87
>[ 1066.618834] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[ 1066.618842] [drm:drm_atomic_nonblocking_commit [drm]] commiting ffff9c3c5069dc00 nonblocking
>[ 1066.627089] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9c3c5069dc00
>[ 1066.627097] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9c3c5069dc00
>[ 1066.753379] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9c3c0f140c00
>[ 1066.753388] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:32:pipe A] ffff9c3c5066f000 state to ffff9c3c0f140c00
>[ 1066.753394] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:26:primary A] ffff9c3c50b96300 state to ffff9c3c0f140c00
>[ 1066.753399] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9c3c50b96300 to [CRTC:32:pipe A]
>[ 1066.753403] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:58] for plane state ffff9c3c50b96300
>[ 1066.753408] [drm:drm_atomic_check_only [drm]] checking ffff9c3c0f140c00
>[ 1066.753443] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:32:pipe A] has [PLANE:26:primary A] with fb 58
>[ 1066.753457] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[ 1066.753466] [drm:drm_atomic_nonblocking_commit [drm]] commiting ffff9c3c0f140c00 nonblocking
>[ 1066.753828] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9c3c0f140000
>[ 1066.753858] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:32:pipe A] ffff9c3c5066d000 state to ffff9c3c0f140000
>[ 1066.753865] [drm:drm_atomic_check_only [drm]] checking ffff9c3c0f140000
>[ 1066.753871] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:32:pipe A] active changed
>[ 1066.753874] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:32:pipe A] needs all connectors, enable: y, active: n
>[ 1066.753879] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:32:pipe A] to ffff9c3c0f140000
>[ 1066.753917] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:47:VGA-1] ffff9c3c52a6e9c0 state to ffff9c3c0f140000
>[ 1066.753934] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:26:primary A] ffff9c3c50b969c0 state to ffff9c3c0f140000
>[ 1066.753939] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:30:cursor A] ffff9c3c50b96600 state to ffff9c3c0f140000
>[ 1066.753944] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:32:pipe A] to ffff9c3c0f140000
>[ 1066.753965] [drm:intel_modeset_pipe_config [i915]] [CONNECTOR:47:VGA-1] checking for sink bpp constrains
>[ 1066.753977] [drm:intel_modeset_pipe_config [i915]] clamping display bpp (was 36) to default limit of 24
>[ 1066.753991] [drm:intel_modeset_pipe_config [i915]] checking fdi config on pipe A, lanes 2
>[ 1066.754002] [drm:intel_modeset_pipe_config [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[ 1066.754026] [drm:intel_dump_pipe_config [i915]] [CRTC:32:pipe A][modeset]
>[ 1066.754038] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[ 1066.754050] [drm:intel_dump_pipe_config [i915]] fdi: lanes: 2; gmch_m: 6920601, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 64
>[ 1066.754061] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[ 1066.754083] [drm:intel_dump_pipe_config [i915]] requested mode:
>[ 1066.754089] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5
>[ 1066.754100] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[ 1066.754117] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[ 1066.754128] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[ 1066.754139] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 148500
>[ 1066.754161] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 1066.754170] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[ 1066.754195] [drm:hsw_dump_hw_state [i915]] dpll_hw_state: wrpll: 0x0 spll: 0x94000000
>[ 1066.754205] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[ 1066.754219] [drm:intel_dump_pipe_config [i915]] [PLANE:26:primary A] FB:58, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[ 1066.754243] [drm:intel_dump_pipe_config [i915]] [PLANE:28:sprite A] disabled, scaler_id = 0
>[ 1066.754254] [drm:intel_dump_pipe_config [i915]] [PLANE:30:cursor A] FB:85, fb = 64x64 format = AR24 little-endian (0x34325241)
>[ 1066.754268] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:32:pipe A] has [PLANE:26:primary A] with fb 58
>[ 1066.754279] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:primary A] visible 1 -> 0, off 1, on 0, ms 1
>[ 1066.754291] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:32:pipe A] has [PLANE:30:cursor A] with fb 85
>[ 1066.754301] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:30:cursor A] visible 1 -> 0, off 1, on 0, ms 1
>[ 1066.754326] [drm:intel_find_shared_dpll [i915]] [CRTC:32:pipe A] allocated SPLL
>[ 1066.754337] [drm:intel_reference_shared_dpll [i915]] using SPLL for pipe A
>[ 1066.754363] [drm:drm_atomic_commit [drm]] commiting ffff9c3c0f140000
>[ 1066.760452] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9c3c0f140c00
>[ 1066.760461] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9c3c0f140c00
>[ 1066.760526] [drm:intel_disable_pipe [i915]] disabling pipe A
>[ 1066.794990] [drm:intel_disable_shared_dpll [i915]] disable SPLL (active 1, on? 1) for crtc 32
>[ 1066.795004] [drm:intel_disable_shared_dpll [i915]] disabling SPLL
>[ 1066.795019] [drm:intel_atomic_commit_tail [i915]] [ENCODER:48:CRT]
>[ 1066.795030] [drm:intel_atomic_commit_tail [i915]] [ENCODER:49:DDI B]
>[ 1066.795041] [drm:intel_atomic_commit_tail [i915]] [ENCODER:54:DDI C]
>[ 1066.795052] [drm:verify_single_dpll_state.isra.107 [i915]] WRPLL 1
>[ 1066.795063] [drm:verify_single_dpll_state.isra.107 [i915]] WRPLL 2
>[ 1066.795073] [drm:verify_single_dpll_state.isra.107 [i915]] SPLL
>[ 1066.795083] [drm:verify_single_dpll_state.isra.107 [i915]] LCPLL 810
>[ 1066.795093] [drm:verify_single_dpll_state.isra.107 [i915]] LCPLL 1350
>[ 1066.795103] [drm:verify_single_dpll_state.isra.107 [i915]] LCPLL 2700
>[ 1066.795116] [drm:verify_connector_state.isra.79 [i915]] [CONNECTOR:47:VGA-1]
>[ 1066.795127] [drm:intel_atomic_commit_tail [i915]] [CRTC:32:pipe A]
>[ 1066.795138] [drm:verify_single_dpll_state.isra.107 [i915]] SPLL
>[ 1066.795149] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9c3c0f140000
>[ 1066.795156] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9c3c0f140000
>[ 1067.082326] PM: Hibernation mode set to 'platform'
>[ 1067.083426] PM: Syncing filesystems ... 
>[ 1067.180813] PM: done.
>

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Attachments on bug 100280: 130312 | 130313 | 130314 | 130315 | 130322

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