Attachment 131192 Details for Bug 100924 – linux kernel 4.8.0-36-generic resume log, use drm.debug=0x1e log_buf_len=1M

linux kernel 4.8.0-36-generic resume log, use drm.debug=0x1e log_buf_len=1M

dmesg_4.8.0-36_resume.txt (text/plain), 248.53 KB, created by changes.liao on 2017-05-04 08:23:47 UTC

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Description:

Filename:

MIME Type:

Creator: changes.liao

Created: 2017-05-04 08:23:47 UTC

Size: 248.53 KB

patch

obsolete

>[   26.708514] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3484800
>[   26.708515] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3484800
>[   26.714684] [drm:drm_mode_addfb2] [FB:57]
>[   26.730677] [drm:drm_mode_addfb2] [FB:55]
>[   26.738539] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad231000
>[   26.738547] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017780 state to ffff9bf1ad231000
>[   26.738550] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad232000 state to ffff9bf1ad231000
>[   26.738552] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017780 to [CRTC:26:pipe A]
>[   26.738553] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017780
>[   26.738555] [drm:drm_atomic_check_only] checking ffff9bf1ad231000
>[   26.738563] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.738565] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.738574] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780176c0 state to ffff9bf1ad231000
>[   26.738579] [drm:drm_atomic_commit] commiting ffff9bf1ad231000
>[   26.738617] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad231000
>[   26.738619] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad231000
>[   26.738630] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad231000
>[   26.738632] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017540 state to ffff9bf1ad231000
>[   26.738634] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad231800 state to ffff9bf1ad231000
>[   26.738635] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017540 to [CRTC:26:pipe A]
>[   26.738636] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017540
>[   26.738637] [drm:drm_atomic_check_only] checking ffff9bf1ad231000
>[   26.738640] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.738641] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.738645] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017e40 state to ffff9bf1ad231000
>[   26.738648] [drm:drm_atomic_commit] commiting ffff9bf1ad231000
>[   26.738661] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad231000
>[   26.738663] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad231000
>[   26.747327] [drm:drm_mode_addfb2] [FB:57]
>[   26.765474] [drm:drm_mode_addfb2] [FB:55]
>[   26.768399] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad230800
>[   26.768405] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017480 state to ffff9bf1ad230800
>[   26.768408] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad233800 state to ffff9bf1ad230800
>[   26.768410] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017480 to [CRTC:26:pipe A]
>[   26.768411] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf178017480
>[   26.768413] [drm:drm_atomic_check_only] checking ffff9bf1ad230800
>[   26.768422] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   26.768424] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.768432] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017180 state to ffff9bf1ad230800
>[   26.768437] [drm:drm_atomic_commit] commiting ffff9bf1ad230800
>[   26.768474] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad230800
>[   26.768476] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad230800
>[   26.768487] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad230800
>[   26.768489] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017540 state to ffff9bf1ad230800
>[   26.768491] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad231800 state to ffff9bf1ad230800
>[   26.768492] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017540 to [CRTC:26:pipe A]
>[   26.768493] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf178017540
>[   26.768494] [drm:drm_atomic_check_only] checking ffff9bf1ad230800
>[   26.768496] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   26.768498] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.768501] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017e40 state to ffff9bf1ad230800
>[   26.768504] [drm:drm_atomic_commit] commiting ffff9bf1ad230800
>[   26.768517] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad230800
>[   26.768519] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad230800
>[   26.782243] [drm:drm_mode_addfb2] [FB:57]
>[   26.798739] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   26.798745] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a19c0 state to ffff9bf1b348f000
>[   26.798748] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   26.798750] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a19c0 to [CRTC:26:pipe A]
>[   26.798751] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828a19c0
>[   26.798753] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   26.798761] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   26.798763] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.798772] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   26.798777] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   26.798819] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   26.798822] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   26.798831] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   26.798833] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1240 state to ffff9bf1b348f000
>[   26.798835] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488800 state to ffff9bf1b348f000
>[   26.798836] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1240 to [CRTC:26:pipe A]
>[   26.798837] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828a1240
>[   26.798838] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   26.798841] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   26.798842] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.798845] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1d80 state to ffff9bf1b348f000
>[   26.798848] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   26.798866] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   26.798868] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   26.799952] [drm:drm_mode_addfb2] [FB:59]
>[   26.815346] [drm:drm_mode_addfb2] [FB:57]
>[   26.829028] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad233800
>[   26.829035] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017180 state to ffff9bf1ad233800
>[   26.829039] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad236000 state to ffff9bf1ad233800
>[   26.829040] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017180 to [CRTC:26:pipe A]
>[   26.829042] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017180
>[   26.829044] [drm:drm_atomic_check_only] checking ffff9bf1ad233800
>[   26.829052] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.829054] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.829063] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017cc0 state to ffff9bf1ad233800
>[   26.829068] [drm:drm_atomic_commit] commiting ffff9bf1ad233800
>[   26.829112] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad233800
>[   26.829115] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad233800
>[   26.829125] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad233800
>[   26.829127] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017d80 state to ffff9bf1ad233800
>[   26.829129] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234000 state to ffff9bf1ad233800
>[   26.829130] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017d80 to [CRTC:26:pipe A]
>[   26.829131] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017d80
>[   26.829132] [drm:drm_atomic_check_only] checking ffff9bf1ad233800
>[   26.829135] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.829136] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.829139] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017540 state to ffff9bf1ad233800
>[   26.829143] [drm:drm_atomic_commit] commiting ffff9bf1ad233800
>[   26.829186] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad233800
>[   26.829188] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad233800
>[   26.833353] [drm:drm_mode_addfb2] [FB:55]
>[   26.850654] [drm:drm_mode_addfb2] [FB:57]
>[   26.859089] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad233800
>[   26.859095] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad233800
>[   26.859099] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad236000 state to ffff9bf1ad233800
>[   26.859101] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   26.859102] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf178017e40
>[   26.859104] [drm:drm_atomic_check_only] checking ffff9bf1ad233800
>[   26.859113] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   26.859115] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.859123] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780176c0 state to ffff9bf1ad233800
>[   26.859129] [drm:drm_atomic_commit] commiting ffff9bf1ad233800
>[   26.859170] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad233800
>[   26.859172] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad233800
>[   26.859185] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad233800
>[   26.859187] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017d80 state to ffff9bf1ad233800
>[   26.859188] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234000 state to ffff9bf1ad233800
>[   26.859190] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017d80 to [CRTC:26:pipe A]
>[   26.859191] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf178017d80
>[   26.859192] [drm:drm_atomic_check_only] checking ffff9bf1ad233800
>[   26.859194] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   26.859196] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.859199] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017540 state to ffff9bf1ad233800
>[   26.859202] [drm:drm_atomic_commit] commiting ffff9bf1ad233800
>[   26.859220] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad233800
>[   26.859221] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad233800
>[   26.867265] [drm:drm_mode_addfb2] [FB:55]
>[   26.883794] [drm:drm_mode_addfb2] [FB:57]
>[   26.889733] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad233800
>[   26.889739] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017780 state to ffff9bf1ad233800
>[   26.889743] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad236000 state to ffff9bf1ad233800
>[   26.889744] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017780 to [CRTC:26:pipe A]
>[   26.889746] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017780
>[   26.889747] [drm:drm_atomic_check_only] checking ffff9bf1ad233800
>[   26.889756] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.889757] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.889766] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad233800
>[   26.889771] [drm:drm_atomic_commit] commiting ffff9bf1ad233800
>[   26.889808] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad233800
>[   26.889810] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad233800
>[   26.889818] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad233800
>[   26.889820] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017d80 state to ffff9bf1ad233800
>[   26.889822] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234000 state to ffff9bf1ad233800
>[   26.889823] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017d80 to [CRTC:26:pipe A]
>[   26.889824] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017d80
>[   26.889825] [drm:drm_atomic_check_only] checking ffff9bf1ad233800
>[   26.889827] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.889829] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.889832] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017540 state to ffff9bf1ad233800
>[   26.889835] [drm:drm_atomic_commit] commiting ffff9bf1ad233800
>[   26.889848] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad233800
>[   26.889849] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad233800
>[   26.900502] [drm:drm_mode_addfb2] [FB:55]
>[   26.916283] [drm:drm_mode_addfb2] [FB:57]
>[   26.920224] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348c800
>[   26.920229] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1000 state to ffff9bf1b348c800
>[   26.920236] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348e800 state to ffff9bf1b348c800
>[   26.920238] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1000 to [CRTC:26:pipe A]
>[   26.920240] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1000
>[   26.920241] [drm:drm_atomic_check_only] checking ffff9bf1b348c800
>[   26.920253] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   26.920255] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.920266] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1a80 state to ffff9bf1b348c800
>[   26.920272] [drm:drm_atomic_commit] commiting ffff9bf1b348c800
>[   26.920309] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348c800
>[   26.920312] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348c800
>[   26.920324] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348c800
>[   26.920326] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a13c0 state to ffff9bf1b348c800
>[   26.920328] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c000 state to ffff9bf1b348c800
>[   26.920329] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a13c0 to [CRTC:26:pipe A]
>[   26.920330] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a13c0
>[   26.920331] [drm:drm_atomic_check_only] checking ffff9bf1b348c800
>[   26.920334] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   26.920335] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.920338] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348c800
>[   26.920342] [drm:drm_atomic_commit] commiting ffff9bf1b348c800
>[   26.920354] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348c800
>[   26.920356] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348c800
>[   26.933058] [drm:drm_mode_addfb2] [FB:55]
>[   26.949426] [drm:drm_mode_addfb2] [FB:57]
>[   26.950212] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348e800
>[   26.950217] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348e800
>[   26.950221] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488000 state to ffff9bf1b348e800
>[   26.950222] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   26.950224] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1540
>[   26.950225] [drm:drm_atomic_check_only] checking ffff9bf1b348e800
>[   26.950234] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.950235] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.950244] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1180 state to ffff9bf1b348e800
>[   26.950249] [drm:drm_atomic_commit] commiting ffff9bf1b348e800
>[   26.950277] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348e800
>[   26.950279] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348e800
>[   26.950289] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348e800
>[   26.950290] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a13c0 state to ffff9bf1b348e800
>[   26.950292] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c000 state to ffff9bf1b348e800
>[   26.950293] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a13c0 to [CRTC:26:pipe A]
>[   26.950294] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a13c0
>[   26.950295] [drm:drm_atomic_check_only] checking ffff9bf1b348e800
>[   26.950298] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   26.950299] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.950302] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348e800
>[   26.950306] [drm:drm_atomic_commit] commiting ffff9bf1b348e800
>[   26.950318] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348e800
>[   26.950320] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348e800
>[   26.961184] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348e800
>[   26.961190] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348e800
>[   26.961194] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488000 state to ffff9bf1b348e800
>[   26.961195] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   26.961197] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828a1540
>[   26.961199] [drm:drm_atomic_check_only] checking ffff9bf1b348e800
>[   26.961208] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   26.961209] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.961218] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1180 state to ffff9bf1b348e800
>[   26.961223] [drm:drm_atomic_commit] commiting ffff9bf1b348e800
>[   26.961267] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348e800
>[   26.961269] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348e800
>[   26.961278] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348e800
>[   26.961280] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a13c0 state to ffff9bf1b348e800
>[   26.961282] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c000 state to ffff9bf1b348e800
>[   26.961283] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a13c0 to [CRTC:26:pipe A]
>[   26.961284] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828a13c0
>[   26.961285] [drm:drm_atomic_check_only] checking ffff9bf1b348e800
>[   26.961288] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   26.961289] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.961292] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348e800
>[   26.961295] [drm:drm_atomic_commit] commiting ffff9bf1b348e800
>[   26.961313] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348e800
>[   26.961314] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348e800
>[   27.024960] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348b800
>[   27.024967] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348b800
>[   27.024971] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348b800
>[   27.024972] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   27.024974] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1cc0
>[   27.024976] [drm:drm_atomic_check_only] checking ffff9bf1b348b800
>[   27.024985] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.024987] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.024996] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348b800
>[   27.025002] [drm:drm_atomic_commit] commiting ffff9bf1b348b800
>[   27.025046] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348b800
>[   27.025049] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348b800
>[   27.025059] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348b800
>[   27.025061] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a13c0 state to ffff9bf1b348b800
>[   27.025063] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c000 state to ffff9bf1b348b800
>[   27.025064] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a13c0 to [CRTC:26:pipe A]
>[   27.025066] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a13c0
>[   27.025066] [drm:drm_atomic_check_only] checking ffff9bf1b348b800
>[   27.025069] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.025071] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.025074] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348b800
>[   27.025078] [drm:drm_atomic_commit] commiting ffff9bf1b348b800
>[   27.025097] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348b800
>[   27.025098] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348b800
>[   27.059466] [drm:drm_mode_addfb2] [FB:55]
>[   27.099930] [drm:drm_mode_addfb2] [FB:57]
>[   27.138571] [drm:drm_mode_addfb2] [FB:55]
>[   27.145355] [drm:drm_mode_addfb2] [FB:57]
>[   27.161182] [drm:drm_mode_addfb2] [FB:55]
>[   27.176554] [drm:drm_mode_addfb2] [FB:57]
>[   27.194282] [drm:drm_mode_addfb2] [FB:55]
>[   27.212942] [drm:drm_mode_addfb2] [FB:57]
>[   27.227788] [drm:drm_mode_addfb2] [FB:55]
>[   27.243678] [drm:drm_mode_addfb2] [FB:57]
>[   27.260071] [drm:drm_mode_addfb2] [FB:55]
>[   27.276938] [drm:drm_mode_addfb2] [FB:57]
>[   27.282375] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.282381] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1cc0 state to ffff9bf1b4054000
>[   27.282386] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4055000 state to ffff9bf1b4054000
>[   27.282387] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1cc0 to [CRTC:26:pipe A]
>[   27.282389] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1cc0
>[   27.282391] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.282400] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.282402] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.282411] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1780 state to ffff9bf1b4054000
>[   27.282417] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.282452] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.282455] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.290418] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.290425] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1780 state to ffff9bf1b348f000
>[   27.290429] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488800 state to ffff9bf1b348f000
>[   27.290430] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1780 to [CRTC:26:pipe A]
>[   27.290432] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1780
>[   27.290433] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.290443] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.290444] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.290454] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a13c0 state to ffff9bf1b348f000
>[   27.290460] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.290496] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.290499] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.293868] [drm:drm_mode_addfb2] [FB:55]
>[   27.298379] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.298385] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1c00 state to ffff9bf1b4054000
>[   27.298389] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4057800 state to ffff9bf1b4054000
>[   27.298390] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1c00 to [CRTC:26:pipe A]
>[   27.298392] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1c00
>[   27.298394] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.298403] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.298405] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.298414] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e16c0 state to ffff9bf1b4054000
>[   27.298420] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.298456] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.298459] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.304381] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.304387] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1a80 state to ffff9bf1b4054000
>[   27.304390] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4054000
>[   27.304392] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1a80 to [CRTC:26:pipe A]
>[   27.304393] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1a80
>[   27.304395] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.304404] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.304405] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.304414] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1540 state to ffff9bf1b4054000
>[   27.304420] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.304455] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.304458] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.310698] [drm:drm_mode_addfb2] [FB:57]
>[   27.312461] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.312467] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1c00 state to ffff9bf1b4054000
>[   27.312471] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4057800 state to ffff9bf1b4054000
>[   27.312473] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1c00 to [CRTC:26:pipe A]
>[   27.312475] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1c00
>[   27.312477] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.312487] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.312489] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.312557] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e16c0 state to ffff9bf1b4054000
>[   27.312563] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.312599] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.312601] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.320409] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.320415] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1a80 state to ffff9bf1b4054000
>[   27.320418] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4054000
>[   27.320420] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1a80 to [CRTC:26:pipe A]
>[   27.320421] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1a80
>[   27.320423] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.320432] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.320434] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.320443] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1540 state to ffff9bf1b4054000
>[   27.320449] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.320484] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.320487] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.327365] [drm:drm_mode_addfb2] [FB:55]
>[   27.328293] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.328299] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1c00 state to ffff9bf1b4054000
>[   27.328304] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4057800 state to ffff9bf1b4054000
>[   27.328306] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1c00 to [CRTC:26:pipe A]
>[   27.328308] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1c00
>[   27.328343] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.328352] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.328353] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.328362] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e16c0 state to ffff9bf1b4054000
>[   27.328367] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.328394] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.328400] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.336371] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.336377] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1a80 state to ffff9bf1b4054000
>[   27.336381] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4054000
>[   27.336382] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1a80 to [CRTC:26:pipe A]
>[   27.336384] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1a80
>[   27.336385] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.336394] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.336396] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.336405] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1540 state to ffff9bf1b4054000
>[   27.336411] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.336447] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.336449] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.344339] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.344345] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e10c0 state to ffff9bf1b4054000
>[   27.344349] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4057800 state to ffff9bf1b4054000
>[   27.344351] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e10c0 to [CRTC:26:pipe A]
>[   27.344383] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e10c0
>[   27.344385] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.344394] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.344395] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.344405] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1c00 state to ffff9bf1b4054000
>[   27.344411] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.344453] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.344484] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.344692] [drm:drm_mode_addfb2] [FB:57]
>[   27.352381] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.352387] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1540 state to ffff9bf1b4054000
>[   27.352390] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4054000
>[   27.352392] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1540 to [CRTC:26:pipe A]
>[   27.352393] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1540
>[   27.352395] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.352404] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.352405] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.352414] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e16c0 state to ffff9bf1b4054000
>[   27.352420] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.352455] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.352457] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.360313] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.360319] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1a80 state to ffff9bf1b4054000
>[   27.360324] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4057800 state to ffff9bf1b4054000
>[   27.360326] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1a80 to [CRTC:26:pipe A]
>[   27.360328] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1a80
>[   27.360330] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.360341] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.360343] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.360353] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e10c0 state to ffff9bf1b4054000
>[   27.360361] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.360408] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.360411] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.361420] [drm:drm_mode_addfb2] [FB:55]
>[   27.368395] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.368401] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e16c0 state to ffff9bf1b4054000
>[   27.368405] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4054000
>[   27.368406] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e16c0 to [CRTC:26:pipe A]
>[   27.368408] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e16c0
>[   27.368410] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.368419] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.368420] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.368429] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1c00 state to ffff9bf1b4054000
>[   27.368435] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.368471] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.368473] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.376189] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.376196] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1540 state to ffff9bf1b4054000
>[   27.376200] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4057800 state to ffff9bf1b4054000
>[   27.376201] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1540 to [CRTC:26:pipe A]
>[   27.376203] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1540
>[   27.376204] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.376214] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.376215] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.376225] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1a80 state to ffff9bf1b4054000
>[   27.376231] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.376275] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.376278] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.378885] [drm:drm_mode_addfb2] [FB:57]
>[   27.384401] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.384406] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1c00 state to ffff9bf1b4054000
>[   27.384410] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4054000
>[   27.384411] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1c00 to [CRTC:26:pipe A]
>[   27.384413] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1c00
>[   27.384415] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.384424] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.384426] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.384435] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e10c0 state to ffff9bf1b4054000
>[   27.384441] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.384478] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.384480] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.390396] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.390402] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1540 state to ffff9bf1b4054000
>[   27.390406] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4057800 state to ffff9bf1b4054000
>[   27.390407] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1540 to [CRTC:26:pipe A]
>[   27.390409] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1540
>[   27.390410] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.390419] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.390421] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.390430] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1a80 state to ffff9bf1b4054000
>[   27.390436] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.390472] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.390474] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.394471] [drm:drm_mode_addfb2] [FB:55]
>[   27.398418] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.398423] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1ae1c1b40 state to ffff9bf1b3487800
>[   27.398427] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3481800 state to ffff9bf1b3487800
>[   27.398429] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1ae1c1b40 to [CRTC:26:pipe A]
>[   27.398430] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1ae1c1b40
>[   27.398432] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.398441] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.398443] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.398451] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1ae1c1e40 state to ffff9bf1b3487800
>[   27.398457] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.398493] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.398495] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.406414] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.406420] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1ae1c1840 state to ffff9bf1b3487800
>[   27.406424] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3487000 state to ffff9bf1b3487800
>[   27.406426] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1ae1c1840 to [CRTC:26:pipe A]
>[   27.406428] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1ae1c1840
>[   27.406429] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.406438] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.406440] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.406449] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067300 state to ffff9bf1b3487800
>[   27.406454] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.406490] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.406492] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.411235] [drm:drm_mode_addfb2] [FB:57]
>[   27.414484] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.414490] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   27.414495] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488800 state to ffff9bf1b348f000
>[   27.414496] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   27.414498] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1f00
>[   27.414499] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.414509] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.414511] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.414519] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   27.414525] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.414563] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.414566] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.422473] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.422479] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   27.422482] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c000 state to ffff9bf1b348f000
>[   27.422484] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   27.422485] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1cc0
>[   27.422487] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.422496] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.422498] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.422506] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1180 state to ffff9bf1b348f000
>[   27.422512] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.422548] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.422551] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.430341] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.430347] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.430352] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234800 state to ffff9bf1ad237000
>[   27.430353] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017780 to [CRTC:26:pipe A]
>[   27.430355] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017780
>[   27.430356] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.430366] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.430367] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.430376] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.430382] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.430425] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.430428] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.432822] [drm:drm_mode_addfb2] [FB:55]
>[   27.438500] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.438506] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017180 state to ffff9bf1ad237000
>[   27.438510] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.438511] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017180 to [CRTC:26:pipe A]
>[   27.438513] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017180
>[   27.438514] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.438524] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.438525] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.438534] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017480 state to ffff9bf1ad237000
>[   27.438540] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.438576] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.438578] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.445549] [drm:drm_mode_addfb2] [FB:57]
>[   27.446451] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.446457] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.446461] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234800 state to ffff9bf1ad237000
>[   27.446462] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017780 to [CRTC:26:pipe A]
>[   27.446464] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017780
>[   27.446465] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.446475] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.446476] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.446484] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.446490] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.446526] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.446528] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.454308] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.454315] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017180 state to ffff9bf1ad237000
>[   27.454318] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.454319] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017180 to [CRTC:26:pipe A]
>[   27.454321] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017180
>[   27.454323] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.454333] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.454335] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.454344] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017480 state to ffff9bf1ad237000
>[   27.454349] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.454387] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.454389] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.461574] [drm:drm_mode_addfb2] [FB:55]
>[   27.462465] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.462471] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.462474] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234800 state to ffff9bf1ad237000
>[   27.462476] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017780 to [CRTC:26:pipe A]
>[   27.462477] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017780
>[   27.462479] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.462488] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.462490] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.462508] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.462522] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.462560] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.462562] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.470485] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.470491] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017180 state to ffff9bf1ad237000
>[   27.470495] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.470497] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017180 to [CRTC:26:pipe A]
>[   27.470498] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017180
>[   27.470500] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.470509] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.470511] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.470520] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017480 state to ffff9bf1ad237000
>[   27.470525] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.470561] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.470563] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.478417] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.478424] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.478427] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234800 state to ffff9bf1ad237000
>[   27.478429] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.478430] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.478432] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.478443] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.478444] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.478453] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.478459] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.478501] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.478503] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.479124] [drm:drm_mode_addfb2] [FB:57]
>[   27.484470] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.484477] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017480 state to ffff9bf1ad237000
>[   27.484482] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.484484] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017480 to [CRTC:26:pipe A]
>[   27.484486] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017480
>[   27.484488] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.484500] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.484502] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.484539] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.484545] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.484580] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.484582] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.492440] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.492446] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.492450] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234800 state to ffff9bf1ad237000
>[   27.492451] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.492453] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.492455] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.492463] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.492465] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.492473] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.492479] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.492531] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.492533] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.497234] [drm:drm_mode_addfb2] [FB:55]
>[   27.500530] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.500536] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.500540] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.500542] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.500544] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017e40
>[   27.500546] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.500557] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.500558] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.500569] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.500576] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.500646] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.500648] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.510327] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.510333] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.510337] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad234800 state to ffff9bf1ad237000
>[   27.510338] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.510340] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.510342] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.510351] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.510353] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.510362] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.510367] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.510412] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.510415] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.512966] [drm:drm_mode_addfb2] [FB:57]
>[   27.516644] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.516652] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067d80 state to ffff9bf1b3487800
>[   27.516656] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3481800 state to ffff9bf1b3487800
>[   27.516658] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067d80 to [CRTC:26:pipe A]
>[   27.516660] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067d80
>[   27.516662] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.516673] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.516676] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.516714] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067540 state to ffff9bf1b3487800
>[   27.516720] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.516755] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.516758] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.524289] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.524295] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067000 state to ffff9bf1b3487800
>[   27.524299] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3484000 state to ffff9bf1b3487800
>[   27.524300] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067000 to [CRTC:26:pipe A]
>[   27.524302] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067000
>[   27.524303] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.524312] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.524314] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.524322] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067e40 state to ffff9bf1b3487800
>[   27.524328] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.524363] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.524365] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.529502] [drm:drm_mode_addfb2] [FB:55]
>[   27.532411] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.532419] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067540 state to ffff9bf1b3487800
>[   27.532448] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3481800 state to ffff9bf1b3487800
>[   27.532450] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067540 to [CRTC:26:pipe A]
>[   27.532452] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067540
>[   27.532454] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.532466] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.532468] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.532479] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067480 state to ffff9bf1b3487800
>[   27.532489] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.532531] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.532535] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.540416] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.540450] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067000 state to ffff9bf1b3487800
>[   27.540454] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3484000 state to ffff9bf1b3487800
>[   27.540455] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067000 to [CRTC:26:pipe A]
>[   27.540457] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067000
>[   27.540459] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.540468] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.540470] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.540479] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067e40 state to ffff9bf1b3487800
>[   27.540484] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.540520] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.540522] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.545653] [drm:drm_mode_addfb2] [FB:57]
>[   27.548420] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.548426] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067480 state to ffff9bf1b3487800
>[   27.548431] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3481800 state to ffff9bf1b3487800
>[   27.548433] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067480 to [CRTC:26:pipe A]
>[   27.548435] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067480
>[   27.548437] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.548474] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.548476] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.548486] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067300 state to ffff9bf1b3487800
>[   27.548494] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.548535] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.548538] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.556429] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.556436] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067000 state to ffff9bf1b3487800
>[   27.556441] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3484000 state to ffff9bf1b3487800
>[   27.556443] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067000 to [CRTC:26:pipe A]
>[   27.556445] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067000
>[   27.556447] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.556485] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.556487] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.556496] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067e40 state to ffff9bf1b3487800
>[   27.556502] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.556538] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.556540] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.562861] [drm:drm_mode_addfb2] [FB:55]
>[   27.564442] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.564447] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067300 state to ffff9bf1b3487800
>[   27.564451] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3481800 state to ffff9bf1b3487800
>[   27.564453] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067300 to [CRTC:26:pipe A]
>[   27.564455] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067300
>[   27.564457] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.564499] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.564501] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.564510] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067f00 state to ffff9bf1b3487800
>[   27.564516] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.564555] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.564558] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.572414] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.572420] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067000 state to ffff9bf1b3487800
>[   27.572423] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3484000 state to ffff9bf1b3487800
>[   27.572424] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067000 to [CRTC:26:pipe A]
>[   27.572426] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067000
>[   27.572428] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.572437] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.572438] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.572448] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067e40 state to ffff9bf1b3487800
>[   27.572454] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.572489] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.572492] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.578262] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.578278] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067300 state to ffff9bf1b3487800
>[   27.578282] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3481800 state to ffff9bf1b3487800
>[   27.578283] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067300 to [CRTC:26:pipe A]
>[   27.578285] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067300
>[   27.578286] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.578295] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.578296] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.578305] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067f00 state to ffff9bf1b3487800
>[   27.578311] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.578350] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.578352] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.580858] [drm:drm_mode_addfb2] [FB:57]
>[   27.586361] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4054000
>[   27.586367] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e10c0 state to ffff9bf1b4054000
>[   27.586371] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4054000
>[   27.586372] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e10c0 to [CRTC:26:pipe A]
>[   27.586374] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e10c0
>[   27.586376] [drm:drm_atomic_check_only] checking ffff9bf1b4054000
>[   27.586385] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.586386] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.586396] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1300 state to ffff9bf1b4054000
>[   27.586401] [drm:drm_atomic_commit] commiting ffff9bf1b4054000
>[   27.586437] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4054000
>[   27.586439] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4054000
>[   27.594248] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.594254] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067000 state to ffff9bf1b3487800
>[   27.594258] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3484000 state to ffff9bf1b3487800
>[   27.594259] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067000 to [CRTC:26:pipe A]
>[   27.594261] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067000
>[   27.594262] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.594272] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.594274] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.594283] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067e40 state to ffff9bf1b3487800
>[   27.594288] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.594332] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.594335] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.597553] [drm:drm_mode_addfb2] [FB:55]
>[   27.602435] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3487800
>[   27.602441] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067300 state to ffff9bf1b3487800
>[   27.602445] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3480800 state to ffff9bf1b3487800
>[   27.602446] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067300 to [CRTC:26:pipe A]
>[   27.602448] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1b0067300
>[   27.602450] [drm:drm_atomic_check_only] checking ffff9bf1b3487800
>[   27.602459] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.602461] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.602470] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067f00 state to ffff9bf1b3487800
>[   27.602476] [drm:drm_atomic_commit] commiting ffff9bf1b3487800
>[   27.602512] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3487800
>[   27.602514] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3487800
>[   27.610285] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.610291] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   27.610294] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488800 state to ffff9bf1b348f000
>[   27.610296] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   27.610297] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1f00
>[   27.610299] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.610308] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.610310] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.610319] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   27.610325] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.610366] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.610368] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.614443] [drm:drm_mode_addfb2] [FB:57]
>[   27.618460] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.618466] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1a80 state to ffff9bf1b348f000
>[   27.618469] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   27.618471] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1a80 to [CRTC:26:pipe A]
>[   27.618472] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1a80
>[   27.618474] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.618483] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.618485] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.618494] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   27.618500] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.618537] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.618540] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.626294] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.626300] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   27.626303] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488800 state to ffff9bf1b348f000
>[   27.626305] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   27.626306] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1f00
>[   27.626308] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.626317] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.626319] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.626328] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   27.626334] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.626371] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.626373] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.631329] [drm:drm_mode_addfb2] [FB:55]
>[   27.634452] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.634458] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   27.634461] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   27.634463] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1000 to [CRTC:26:pipe A]
>[   27.634464] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1000
>[   27.634466] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.634475] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.634477] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.634485] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1e40 state to ffff9bf1b348f000
>[   27.634491] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.634528] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.634530] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.642525] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   27.642531] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   27.642535] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488800 state to ffff9bf1b348f000
>[   27.642536] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   27.642538] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1f00
>[   27.642539] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   27.642548] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.642550] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.642558] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   27.642564] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   27.642601] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   27.642603] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   27.646060] [drm:drm_mode_addfb2] [FB:57]
>[   27.650476] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.650482] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.650486] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.650487] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1780170c0 to [CRTC:26:pipe A]
>[   27.650489] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1780170c0
>[   27.650491] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.650500] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.650501] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.650510] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017d80 state to ffff9bf1ad237000
>[   27.650516] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.650553] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.650555] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.658470] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.658476] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.658480] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.658481] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.658483] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.658484] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.658494] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.658495] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.658504] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.658510] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.658546] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.658548] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.728480] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.728486] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.728489] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.728490] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.728492] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017e40
>[   27.728494] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.728503] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.728504] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.728513] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.728519] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.728563] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.728566] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.744473] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.744479] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.744497] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.744499] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.744500] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.744502] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.744512] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.744514] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.744522] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.744529] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.744589] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.744591] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.752491] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.752498] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.752501] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.752502] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.752504] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017e40
>[   27.752505] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.752515] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.752516] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.752525] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.752531] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.752575] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.752578] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.758499] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.758505] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.758509] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.758510] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.758512] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.758513] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.758523] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.758524] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.758533] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.758539] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.758582] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.758585] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.766497] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.766503] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.766506] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.766508] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.766509] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017e40
>[   27.766511] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.766520] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.766521] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.766530] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.766536] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.766580] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.766582] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.774498] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.774504] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.774507] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.774509] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.774510] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.774512] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.774521] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.774523] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.774532] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.774537] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.774582] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.774584] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.782487] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.782493] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.782496] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.782498] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.782499] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017e40
>[   27.782501] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.782510] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.782512] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.782521] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.782526] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.782571] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.782573] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.798484] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.798490] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.798494] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.798495] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.798497] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.798499] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.798508] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.798510] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.798519] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.798524] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.798569] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.798571] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.806481] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.806487] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.806490] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.806492] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.806493] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017e40
>[   27.806495] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.806504] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.806506] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.806514] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.806520] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.806564] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.806566] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.814498] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.814504] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.814507] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.814509] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.814510] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.814512] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.814521] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.814523] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.814531] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.814537] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.814581] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.814584] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.822473] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.822479] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.822482] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.822484] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.822485] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017e40
>[   27.822487] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.822496] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.822498] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.822507] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.822512] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.822557] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.822559] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.830481] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.830487] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.830491] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.830492] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.830494] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf178017cc0
>[   27.830495] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.830505] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   27.830506] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.830515] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.830521] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.830565] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.830568] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.831590] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.831595] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.831598] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.831600] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.831601] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf178017e40
>[   27.831603] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.831610] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   27.831612] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.831621] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.831626] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.831665] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.831668] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.831679] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.831681] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.831683] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.831684] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.831685] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf178017cc0
>[   27.831686] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.831688] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   27.831690] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.831692] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.831695] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.831713] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.831714] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.838493] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.838500] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.838503] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.838504] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.838506] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf178017e40
>[   27.838508] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.838517] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   27.838519] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.838527] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.838533] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.838578] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.838580] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.846477] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.846484] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.846488] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.846489] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.846491] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf178017cc0
>[   27.846492] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.846501] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   27.846503] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.846512] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.846517] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.846562] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.846564] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.852508] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.852514] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.852518] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.852519] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.852521] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf178017e40
>[   27.852522] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.852532] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   27.852533] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.852542] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.852548] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.852592] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.852595] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.932460] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.932469] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017cc0 state to ffff9bf1ad237000
>[   27.932474] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   27.932477] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017cc0 to [CRTC:26:pipe A]
>[   27.932480] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf178017cc0
>[   27.932482] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.932496] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   27.932499] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.932538] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017780 state to ffff9bf1ad237000
>[   27.932545] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.932588] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.932591] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   27.940502] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   27.940509] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017e40 state to ffff9bf1ad237000
>[   27.940515] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad230000 state to ffff9bf1ad237000
>[   27.940517] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017e40 to [CRTC:26:pipe A]
>[   27.940519] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf178017e40
>[   27.940521] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   27.940545] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   27.940547] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.940556] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1780170c0 state to ffff9bf1ad237000
>[   27.940561] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   27.940604] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   27.940607] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   28.014636] [drm:drm_mode_addfb2] [FB:59]
>[   28.031123] [drm:drm_mode_addfb2] [FB:57]
>[   28.047761] [drm:drm_mode_addfb2] [FB:59]
>[   28.064439] [drm:drm_mode_addfb2] [FB:57]
>[   28.085683] [drm:drm_mode_addfb2] [FB:59]
>[   28.098738] [drm:drm_mode_addfb2] [FB:57]
>[   28.115467] [drm:drm_mode_addfb2] [FB:59]
>[   28.132081] [drm:drm_mode_addfb2] [FB:57]
>[   28.142624] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.142630] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a19c0 state to ffff9bf1b348f000
>[   28.142633] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.142635] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a19c0 to [CRTC:26:pipe A]
>[   28.142636] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828a19c0
>[   28.142638] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.142646] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   28.142648] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.142656] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1600 state to ffff9bf1b348f000
>[   28.142662] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.142698] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.142701] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.148483] [drm:drm_mode_addfb2] [FB:59]
>[   28.158527] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.158548] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1e40 state to ffff9bf1b348f000
>[   28.158552] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348e800 state to ffff9bf1b348f000
>[   28.158553] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1e40 to [CRTC:26:pipe A]
>[   28.158555] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828a1e40
>[   28.158556] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.158565] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   28.158567] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.158576] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.158582] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.158618] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.158620] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.165209] [drm:drm_mode_addfb2] [FB:57]
>[   28.182205] [drm:drm_mode_addfb2] [FB:59]
>[   28.199700] [drm:drm_mode_addfb2] [FB:57]
>[   28.206506] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.206515] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.206519] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.206536] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.206538] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828a1f00
>[   28.206539] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.206548] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   28.206550] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.206559] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.206564] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.206601] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.206603] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.209683] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.209689] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1e40 state to ffff9bf1b348f000
>[   28.209692] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348e800 state to ffff9bf1b348f000
>[   28.209694] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1e40 to [CRTC:26:pipe A]
>[   28.209695] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1e40
>[   28.209697] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.209705] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.209706] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.209714] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.209719] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.209752] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.209754] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.209762] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.209764] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.209765] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.209766] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.209767] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1f00
>[   28.209768] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.209771] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.209772] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.209775] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.209778] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.209795] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.209797] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.215703] [drm:drm_mode_addfb2] [FB:55]
>[   28.233611] [drm:drm_mode_addfb2] [FB:57]
>[   28.292554] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.292560] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348f000
>[   28.292563] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348e800 state to ffff9bf1b348f000
>[   28.292565] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   28.292566] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1540
>[   28.292568] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.292577] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.292579] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.292588] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348f000
>[   28.292594] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.292638] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.292640] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.297423] [drm:drm_mode_addfb2] [FB:55]
>[   28.300518] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   28.300526] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1780176c0 state to ffff9bf1ad237000
>[   28.300531] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad235800 state to ffff9bf1ad237000
>[   28.300533] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1780176c0 to [CRTC:26:pipe A]
>[   28.300535] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1780176c0
>[   28.300537] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   28.300577] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.300579] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.300589] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017d80 state to ffff9bf1ad237000
>[   28.300595] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   28.300634] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   28.300637] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   28.308512] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   28.308535] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017180 state to ffff9bf1ad237000
>[   28.308539] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad236000 state to ffff9bf1ad237000
>[   28.308540] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf178017180 to [CRTC:26:pipe A]
>[   28.308542] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf178017180
>[   28.308544] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   28.308553] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.308555] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.308574] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017c00 state to ffff9bf1ad237000
>[   28.308581] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   28.308618] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   28.308620] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   28.314777] [drm:drm_mode_addfb2] [FB:57]
>[   28.316539] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.316544] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.316547] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.316549] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.316550] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1f00
>[   28.316552] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.316561] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.316562] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.316571] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.316576] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.316604] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.316607] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.322506] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.322514] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.322519] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.322537] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   28.322538] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1cc0
>[   28.322540] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.322550] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.322551] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.322560] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1180 state to ffff9bf1b348f000
>[   28.322566] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.322602] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.322604] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.330296] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.330302] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.330305] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.330307] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.330308] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1f00
>[   28.330310] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.330319] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.330321] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.330330] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.330335] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.330380] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.330382] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.331635] [drm:drm_mode_addfb2] [FB:55]
>[   28.338517] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.338525] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1180 state to ffff9bf1b348f000
>[   28.338544] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.338546] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1180 to [CRTC:26:pipe A]
>[   28.338548] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1180
>[   28.338549] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.338558] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.338560] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.338569] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a16c0 state to ffff9bf1b348f000
>[   28.338575] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.338611] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.338614] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.346298] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.346305] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.346308] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.346310] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.346312] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1f00
>[   28.346313] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.346323] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.346324] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.346333] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.346339] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.346380] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.346382] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.348066] [drm:drm_mode_addfb2] [FB:57]
>[   28.354547] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.354553] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a16c0 state to ffff9bf1b348f000
>[   28.354557] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.354558] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a16c0 to [CRTC:26:pipe A]
>[   28.354560] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a16c0
>[   28.354561] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.354571] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.354572] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.354581] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1780 state to ffff9bf1b348f000
>[   28.354587] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.354623] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.354626] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.362329] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.362336] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.362339] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.362341] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.362342] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1f00
>[   28.362344] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.362353] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.362355] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.362364] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.362370] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.362413] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.362415] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.365609] [drm:drm_mode_addfb2] [FB:55]
>[   28.370503] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.370511] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1780 state to ffff9bf1b348f000
>[   28.370531] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.370532] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1780 to [CRTC:26:pipe A]
>[   28.370534] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1780
>[   28.370535] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.370545] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.370546] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.370555] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a13c0 state to ffff9bf1b348f000
>[   28.370561] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.370621] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.370623] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.378537] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.378544] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.378549] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.378551] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.378553] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1f00
>[   28.378555] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.378567] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.378570] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.378581] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.378607] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.378650] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.378652] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.382156] [drm:drm_mode_addfb2] [FB:57]
>[   28.386509] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.386533] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a13c0 state to ffff9bf1b348f000
>[   28.386536] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.386538] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a13c0 to [CRTC:26:pipe A]
>[   28.386540] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a13c0
>[   28.386541] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.386551] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.386552] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.386561] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.386567] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.386603] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.386607] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.394510] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.394518] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b348f000
>[   28.394523] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.394526] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1f00 to [CRTC:26:pipe A]
>[   28.394544] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1f00
>[   28.394545] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.394554] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.394556] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.394565] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b348f000
>[   28.394571] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.394614] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.394616] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.397874] [drm:drm_mode_addfb2] [FB:55]
>[   28.402498] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.402506] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.402511] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.402513] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   28.402531] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff9bf1828a1cc0
>[   28.402532] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.402542] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 62
>[   28.402544] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.402553] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.402558] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.402594] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.402597] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.414715] [drm:drm_mode_addfb2] [FB:57]
>[   28.431298] [drm:drm_mode_addfb2] [FB:55]
>[   28.568154] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.568160] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348f000
>[   28.568164] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.568165] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   28.568167] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff9bf1828a1540
>[   28.568168] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.568176] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 57
>[   28.568178] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.568186] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348f000
>[   28.568191] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.568235] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.568238] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.568248] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.568250] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.568251] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.568253] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   28.568254] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff9bf1828a1cc0
>[   28.568255] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.568257] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 57
>[   28.568258] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.568261] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.568264] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.568282] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.568283] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.620508] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.620516] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348f000
>[   28.620521] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.620523] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   28.620541] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff9bf1828a1540
>[   28.620542] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.620552] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 57
>[   28.620553] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.620562] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348f000
>[   28.620568] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.620643] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.620645] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.628534] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.628542] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.628547] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.628549] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   28.628567] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff9bf1828a1cc0
>[   28.628568] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.628578] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 57
>[   28.628579] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.628588] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.628594] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.628638] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.628640] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.629410] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.629416] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348f000
>[   28.629419] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.629420] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   28.629421] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1540
>[   28.629423] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.629431] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   28.629432] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.629441] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348f000
>[   28.629446] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.629486] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.629489] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.629500] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.629501] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.629503] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.629504] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   28.629505] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1cc0
>[   28.629506] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.629508] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   28.629510] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.629512] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.629515] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.629532] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.629534] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.636546] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.636552] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348f000
>[   28.636556] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.636557] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   28.636559] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1540
>[   28.636560] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.636570] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   28.636572] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.636581] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348f000
>[   28.636587] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.636631] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.636634] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.644530] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.644538] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.644558] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.644559] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   28.644561] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1cc0
>[   28.644562] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.644572] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   28.644573] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.644582] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.644588] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.644632] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.644634] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.652512] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.652520] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348f000
>[   28.652525] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.652527] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   28.652547] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1540
>[   28.652549] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.652558] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   28.652559] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.652568] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348f000
>[   28.652574] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.652617] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.652620] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.660511] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.660533] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1cc0 state to ffff9bf1b348f000
>[   28.660536] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   28.660538] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1cc0 to [CRTC:26:pipe A]
>[   28.660539] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1cc0
>[   28.660541] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.660550] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   28.660552] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.660561] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   28.660566] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.660610] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.660613] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.668513] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   28.668522] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1540 state to ffff9bf1b348f000
>[   28.668542] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348c800 state to ffff9bf1b348f000
>[   28.668543] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1540 to [CRTC:26:pipe A]
>[   28.668545] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828a1540
>[   28.668546] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   28.668556] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   28.668557] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.668566] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1b40 state to ffff9bf1b348f000
>[   28.668572] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   28.668615] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   28.668618] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   28.834576] [drm:drm_mode_addfb2] [FB:57]
>[   29.117697] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b348f000
>[   29.117703] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1000 state to ffff9bf1b348f000
>[   29.117707] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348d800 state to ffff9bf1b348f000
>[   29.117708] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828a1000 to [NOCRTC]
>[   29.117710] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff9bf1828a1000
>[   29.117711] [drm:drm_atomic_check_only] checking ffff9bf1b348f000
>[   29.117716] [drm:drm_atomic_helper_crtc_normalize_zpos] [CRTC:26:pipe A] calculating normalized zpos values
>[   29.117718] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1e40 state to ffff9bf1b348f000
>[   29.117719] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:23:plane 1A] processing zpos value 0
>[   29.117722] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:23:plane 1A] normalized zpos value 0
>[   29.117727] [drm:skl_update_scaler_plane] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[   29.117729] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:23:plane 1A] with fb 57
>[   29.117731] [drm:intel_plane_atomic_calc_changes] [PLANE:23:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   29.117733] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb -1
>[   29.117734] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[   29.117745] [drm:drm_atomic_commit] commiting ffff9bf1b348f000
>[   29.117796] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b348f000
>[   29.117798] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b348f000
>[   29.122449] [drm:drm_mode_addfb2] [FB:55]
>[   29.149302] [drm:drm_mode_addfb2] [FB:57]
>[   29.304187] [drm:drm_mode_addfb2] [FB:55]
>[   29.320599] [drm:drm_mode_addfb2] [FB:57]
>[   29.337228] [drm:drm_mode_addfb2] [FB:55]
>[   29.353670] [drm:drm_mode_addfb2] [FB:57]
>[   29.370546] [drm:drm_mode_addfb2] [FB:55]
>[   29.387123] [drm:drm_mode_addfb2] [FB:57]
>[   29.403867] [drm:drm_mode_addfb2] [FB:55]
>[   29.420591] [drm:drm_mode_addfb2] [FB:57]
>[   29.437229] [drm:drm_mode_addfb2] [FB:55]
>[   29.453908] [drm:drm_mode_addfb2] [FB:57]
>[   29.470593] [drm:drm_mode_addfb2] [FB:55]
>[   29.487151] [drm:drm_mode_addfb2] [FB:57]
>[   29.503872] [drm:drm_mode_addfb2] [FB:55]
>[   29.520649] [drm:drm_mode_addfb2] [FB:57]
>[   29.537293] [drm:drm_mode_addfb2] [FB:55]
>[   29.554209] [drm:drm_mode_addfb2] [FB:57]
>[   29.570579] [drm:drm_mode_addfb2] [FB:55]
>[   29.587203] [drm:drm_mode_addfb2] [FB:57]
>[   29.603867] [drm:drm_mode_addfb2] [FB:55]
>[   29.620103] [drm:drm_mode_addfb2] [FB:57]
>[   29.723183] [drm:drm_mode_addfb2] [FB:55]
>[   29.866570] [drm:drm_mode_addfb2] [FB:57]
>[   29.893565] [drm:drm_mode_addfb2] [FB:55]
>[   30.066725] [drm:drm_mode_addfb2] [FB:57]
>[   30.299580] [drm:drm_mode_addfb2] [FB:55]
>[   30.435802] [drm:drm_mode_addfb2] [FB:57]
>[   30.688487] [drm:drm_mode_addfb2] [FB:55]
>[   31.263185] [drm:drm_mode_addfb2] [FB:57]
>[   31.378935] [drm:drm_mode_addfb2] [FB:55]
>[   31.653784] [drm:drm_mode_addfb2] [FB:57]
>[   31.849461] [drm:drm_mode_addfb2] [FB:55]
>[   32.423732] [drm:drm_mode_addfb2] [FB:57]
>[   32.772299] [drm:drm_mode_addfb2] [FB:55]
>[   32.798506] [drm:drm_mode_addfb2] [FB:57]
>[   33.119539] [drm:drm_mode_addfb2] [FB:55]
>[   33.449759] [drm:drm_mode_addfb2] [FB:57]
>[   33.690324] [drm:drm_mode_addfb2] [FB:55]
>[   33.908340] [drm:drm_mode_addfb2] [FB:57]
>[   34.483281] [drm:drm_mode_addfb2] [FB:55]
>[   35.085350] [drm:drm_mode_addfb2] [FB:57]
>[   35.685973] [drm:drm_mode_addfb2] [FB:55]
>[   35.796953] [drm:drm_mode_addfb2] [FB:57]
>[   36.070427] [drm:drm_mode_addfb2] [FB:55]
>[   36.614015] [drm:drm_mode_addfb2] [FB:57]
>[   36.948894] [drm:drm_mode_addfb2] [FB:55]
>[   37.136430] [drm:drm_mode_addfb2] [FB:57]
>[   37.151954] [drm:drm_mode_addfb2] [FB:55]
>[   37.370310] [drm:drm_mode_addfb2] [FB:57]
>[   37.851714] [drm:drm_mode_addfb2] [FB:55]
>[   38.169477] [drm:drm_mode_addfb2] [FB:57]
>[   38.446229] [drm:drm_mode_addfb2] [FB:55]
>[   38.484024] [drm:drm_mode_addfb2] [FB:57]
>[   38.500595] [drm:drm_mode_addfb2] [FB:55]
>[   39.015405] [drm:drm_mode_addfb2] [FB:57]
>[   39.051346] [drm:drm_mode_addfb2] [FB:55]
>[   39.078034] [drm:drm_mode_addfb2] [FB:57]
>[   39.244381] [drm:drm_mode_addfb2] [FB:55]
>[   39.815096] [drm:drm_mode_addfb2] [FB:57]
>[   40.061441] [drm:drm_mode_addfb2] [FB:55]
>[   40.088367] [drm:drm_mode_addfb2] [FB:57]
>[   40.535616] [drm:drm_mode_addfb2] [FB:55]
>[   40.708683] [drm:drm_mode_addfb2] [FB:57]
>[   40.830892] [drm:drm_mode_addfb2] [FB:55]
>[   41.137112] [drm:drm_mode_addfb2] [FB:57]
>[   41.153588] [drm:drm_mode_addfb2] [FB:55]
>[   41.403041] [drm:drm_mode_addfb2] [FB:57]
>[   41.683918] [drm:drm_mode_addfb2] [FB:55]
>[   41.709874] [drm:drm_mode_addfb2] [FB:57]
>[   41.742161] [drm:drm_mode_addfb2] [FB:55]
>[   41.759627] [drm:drm_mode_addfb2] [FB:57]
>[   42.282346] [drm:drm_mode_addfb2] [FB:55]
>[   42.880884] [drm:drm_mode_addfb2] [FB:57]
>[   43.479817] [drm:drm_mode_addfb2] [FB:55]
>[   43.912796] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4057800
>[   43.912803] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1840 state to ffff9bf1b4057800
>[   43.912806] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4054000 state to ffff9bf1b4057800
>[   43.912808] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1840 to [CRTC:26:pipe A]
>[   43.912809] [drm:drm_atomic_set_fb_for_plane] Set [FB:57] for plane state ffff9bf1828e1840
>[   43.912811] [drm:drm_atomic_check_only] checking ffff9bf1b4057800
>[   43.912816] [drm:drm_atomic_helper_crtc_normalize_zpos] [CRTC:26:pipe A] calculating normalized zpos values
>[   43.912818] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1e40 state to ffff9bf1b4057800
>[   43.912819] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:23:plane 1A] processing zpos value 0
>[   43.912821] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:25:cursor A] processing zpos value 0
>[   43.912824] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:23:plane 1A] normalized zpos value 0
>[   43.912825] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:25:cursor A] normalized zpos value 1
>[   43.912830] [drm:skl_update_scaler_plane] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[   43.912832] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:23:plane 1A] with fb 55
>[   43.912834] [drm:intel_plane_atomic_calc_changes] [PLANE:23:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   43.912836] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 57
>[   43.912837] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[   43.912849] [drm:drm_atomic_commit] commiting ffff9bf1b4057800
>[   43.912905] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4057800
>[   43.912908] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4057800
>[   43.924284] [drm:drm_mode_addfb2] [FB:59]
>[   43.962806] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3480000
>[   43.962812] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067cc0 state to ffff9bf1b3480000
>[   43.962815] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3485800 state to ffff9bf1b3480000
>[   43.962817] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067cc0 to [CRTC:26:pipe A]
>[   43.962818] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1b0067cc0
>[   43.962820] [drm:drm_atomic_check_only] checking ffff9bf1b3480000
>[   43.962829] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   43.962830] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   43.962839] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067d80 state to ffff9bf1b3480000
>[   43.962844] [drm:drm_atomic_commit] commiting ffff9bf1b3480000
>[   43.962888] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3480000
>[   43.962890] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3480000
>[   43.962899] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3480000
>[   43.962901] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067000 state to ffff9bf1b3480000
>[   43.962903] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3482800 state to ffff9bf1b3480000
>[   43.962904] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1b0067000 to [CRTC:26:pipe A]
>[   43.962905] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1b0067000
>[   43.962906] [drm:drm_atomic_check_only] checking ffff9bf1b3480000
>[   43.962909] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   43.962910] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   43.962913] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067300 state to ffff9bf1b3480000
>[   43.962916] [drm:drm_atomic_commit] commiting ffff9bf1b3480000
>[   43.962934] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3480000
>[   43.962935] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3480000
>[   44.018964] [drm:drm_mode_addfb2] [FB:57]
>[   44.041839] [drm:drm_mode_addfb2] [FB:59]
>[   44.060295] [drm:drm_mode_addfb2] [FB:57]
>[   44.076717] [drm:drm_mode_addfb2] [FB:59]
>[   44.093359] [drm:drm_mode_addfb2] [FB:57]
>[   44.111074] [drm:drm_mode_addfb2] [FB:59]
>[   44.127306] [drm:drm_mode_addfb2] [FB:57]
>[   44.143765] [drm:drm_mode_addfb2] [FB:59]
>[   44.160185] [drm:drm_mode_addfb2] [FB:57]
>[   44.176749] [drm:drm_mode_addfb2] [FB:59]
>[   44.193413] [drm:drm_mode_addfb2] [FB:62]
>[   44.209996] [drm:drm_mode_addfb2] [FB:57]
>[   44.227561] [drm:drm_mode_addfb2] [FB:59]
>[   44.244567] [drm:drm_mode_addfb2] [FB:57]
>[   44.261116] [drm:drm_mode_addfb2] [FB:59]
>[   44.277544] [drm:drm_mode_addfb2] [FB:57]
>[   44.294050] [drm:drm_mode_addfb2] [FB:59]
>[   44.310228] [drm:drm_mode_addfb2] [FB:57]
>[   44.326731] [drm:drm_mode_addfb2] [FB:59]
>[   44.343300] [drm:drm_mode_addfb2] [FB:57]
>[   44.360945] [drm:drm_mode_addfb2] [FB:59]
>[   44.377821] [drm:drm_mode_addfb2] [FB:57]
>[   44.394147] [drm:drm_mode_addfb2] [FB:59]
>[   44.410773] [drm:drm_mode_addfb2] [FB:57]
>[   44.427296] [drm:drm_mode_addfb2] [FB:59]
>[   44.443703] [drm:drm_mode_addfb2] [FB:57]
>[   44.460068] [drm:drm_mode_addfb2] [FB:59]
>[   44.476681] [drm:drm_mode_addfb2] [FB:57]
>[   44.494426] [drm:drm_mode_addfb2] [FB:59]
>[   44.511088] [drm:drm_mode_addfb2] [FB:57]
>[   44.527559] [drm:drm_mode_addfb2] [FB:59]
>[   44.544149] [drm:drm_mode_addfb2] [FB:57]
>[   45.246217] [drm:drm_mode_addfb2] [FB:59]
>[   45.262795] [drm:drm_mode_addfb2] [FB:57]
>[   45.352044] [drm:drm_mode_addfb2] [FB:59]
>[   45.540264] [drm:drm_mode_addfb2] [FB:57]
>[   45.560006] [drm:drm_mode_addfb2] [FB:62]
>[   45.640213] [drm:drm_mode_addfb2] [FB:57]
>[   47.078577] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4057800
>[   47.078584] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1480 state to ffff9bf1b4057800
>[   47.078588] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4057800
>[   47.078589] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1480 to [CRTC:26:pipe A]
>[   47.078591] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1480
>[   47.078592] [drm:drm_atomic_check_only] checking ffff9bf1b4057800
>[   47.078601] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   47.078602] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   47.078611] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1f00 state to ffff9bf1b4057800
>[   47.078617] [drm:drm_atomic_commit] commiting ffff9bf1b4057800
>[   47.078658] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4057800
>[   47.078661] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4057800
>[   47.078671] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4057800
>[   47.078673] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1d80 state to ffff9bf1b4057800
>[   47.078675] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4050000 state to ffff9bf1b4057800
>[   47.078676] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1d80 to [CRTC:26:pipe A]
>[   47.078677] [drm:drm_atomic_set_fb_for_plane] Set [FB:59] for plane state ffff9bf1828e1d80
>[   47.078678] [drm:drm_atomic_check_only] checking ffff9bf1b4057800
>[   47.078681] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   47.078682] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   47.078685] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1900 state to ffff9bf1b4057800
>[   47.078688] [drm:drm_atomic_commit] commiting ffff9bf1b4057800
>[   47.078706] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4057800
>[   47.078708] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4057800
>[   47.087335] [drm:drm_mode_addfb2] [FB:55]
>[   47.103150] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4057800
>[   47.103157] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4057800
>[   47.103159] [drm:drm_atomic_check_only] checking ffff9bf1b4057800
>[   47.103172] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1f00 state to ffff9bf1b4057800
>[   47.103174] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1180 state to ffff9bf1b4057800
>[   47.103180] [drm:drm_atomic_commit] commiting ffff9bf1b4057800
>[   47.108135] [drm:intel_atomic_commit] Preparing state failed with -512
>[   47.108140] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4057800
>[   47.108147] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4057800
>[   47.108176] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4057800
>[   47.108181] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4052000 state to ffff9bf1b4057800
>[   47.108183] [drm:drm_atomic_check_only] checking ffff9bf1b4057800
>[   47.108194] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1180 state to ffff9bf1b4057800
>[   47.108196] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1f00 state to ffff9bf1b4057800
>[   47.108202] [drm:drm_atomic_commit] commiting ffff9bf1b4057800
>[   47.126437] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4057800
>[   47.126444] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4057800
>[   47.126483] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b4057800
>[   47.126488] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b4050000 state to ffff9bf1b4057800
>[   47.126490] [drm:drm_atomic_check_only] checking ffff9bf1b4057800
>[   47.126493] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] active changed
>[   47.126495] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] needs all connectors, enable: y, active: n
>[   47.126497] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b4057800
>[   47.126499] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff9bf1828920c0 state to ffff9bf1b4057800
>[   47.126502] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1d80 state to ffff9bf1b4057800
>[   47.126503] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1900 state to ffff9bf1b4057800
>[   47.126506] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b4057800
>[   47.126509] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[   47.126510] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 18
>[   47.126516] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   47.126518] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 270000 pixel clock 73810KHz
>[   47.126520] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 1 clock 270000 bpp 18
>[   47.126521] [drm:intel_dp_compute_config] DP link bw required 132858 available 216000
>[   47.126523] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   47.126525] [drm:intel_dump_pipe_config] [CRTC:26:pipe A][modeset] config ffff9bf1b4050000 for pipe A
>[   47.126527] [drm:intel_dump_pipe_config] cpu_transcoder: EDP
>[   47.126528] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   47.126529] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   47.126531] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m: 2579846, gmch_n: 4194304, link_m: 143324, link_n: 524288, tu: 64
>[   47.126532] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   47.126533] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   47.126534] [drm:intel_dump_pipe_config] requested mode:
>[   47.126537] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 73810 1366 1406 1438 1532 768 771 783 803 0x0 0xa
>[   47.126538] [drm:intel_dump_pipe_config] adjusted mode:
>[   47.126540] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 73810 1366 1406 1438 1532 768 771 783 803 0x48 0xa
>[   47.126542] [drm:intel_dump_crtc_timings] crtc timings: 73810 1366 1406 1438 1532 768 771 783 803, type: 0x48 flags: 0xa
>[   47.126543] [drm:intel_dump_pipe_config] port clock: 270000
>[   47.126544] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   47.126545] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   47.126546] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   47.126547] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.126548] [drm:intel_dump_pipe_config] ips: 0
>[   47.126549] [drm:intel_dump_pipe_config] double wide: 0
>[   47.126552] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[   47.126552] [drm:intel_dump_pipe_config] planes on this crtc
>[   47.126554] [drm:intel_dump_pipe_config] [PLANE:23:plane 1A] enabled
>[   47.126556] [drm:intel_dump_pipe_config] 	FB:55, fb = 1366x768 format = XR24 little-endian (0x34325258)
>[   47.126558] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+1366+768 dst 0x0+1366+768
>[   47.126559] [drm:intel_dump_pipe_config] [PLANE:25:cursor A] enabled
>[   47.126561] [drm:intel_dump_pipe_config] 	FB:59, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   47.126562] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+256+256 dst 561x321+256+256
>[   47.126564] [drm:intel_dump_pipe_config] [PLANE:27:plane 2A] disabled, scaler_id = -1
>[   47.126565] [drm:intel_dump_pipe_config] [PLANE:28:plane 3A] disabled, scaler_id = -1
>[   47.126568] [drm:intel_modeset_checks] New cdclk calculated to be atomic 144000, actual 144000
>[   47.126574] [drm:skl_update_scaler_plane] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[   47.126576] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:23:plane 1A] with fb 55
>[   47.126577] [drm:intel_plane_atomic_calc_changes] [PLANE:23:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[   47.126580] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   47.126581] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 0, off 1, on 0, ms 1
>[   47.126585] [drm:bxt_get_dpll] [CRTC:26:pipe A] using pre-allocated PORT PLL A
>[   47.126586] [drm:intel_reference_shared_dpll] using PORT PLL A for pipe A
>[   47.126587] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   47.126593] [drm:drm_atomic_get_crtc_state] Added [CRTC:31:pipe B] ffff9bf1b4051000 state to ffff9bf1b4057800
>[   47.126595] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe C] ffff9bf1b4053000 state to ffff9bf1b4057800
>[   47.126600] [drm:drm_atomic_commit] commiting ffff9bf1b4057800
>[   47.126616] [drm:intel_power_well_enable] enabling DC off
>[   47.126618] [drm:gen9_set_dc_state] Setting DC state from 01 to 00
>[   47.126654] [drm:intel_edp_backlight_off] 
>[   47.133093] wlp2s0: deauthenticating from f4:4e:05:81:40:af by local choice (Reason: 3=DEAUTH_LEAVING)
>[   47.332436] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   47.332450] [drm:intel_disable_pipe] disabling pipe A
>[   47.344420] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   47.344426] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[   47.344577] [drm:edp_panel_off] Turn eDP port A panel power off
>[   47.344580] [drm:wait_panel_off] Wait for panel power off time
>[   47.344584] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control 00000060
>[   47.396795] [drm:wait_panel_status] Wait complete
>[   47.396808] [drm:intel_disable_shared_dpll] disable PORT PLL A (active 1, on? 1) for crtc 26
>[   47.396828] [drm:intel_disable_shared_dpll] disabling PORT PLL A
>[   47.396843] [drm:verify_encoder_state] [ENCODER:38:DDI A]
>[   47.396845] [drm:verify_encoder_state] [ENCODER:46:DDI B]
>[   47.396848] [drm:verify_encoder_state] [ENCODER:49:DDI C]
>[   47.396849] [drm:verify_encoder_state] [ENCODER:51:DP-MST A]
>[   47.396850] [drm:verify_encoder_state] [ENCODER:52:DP-MST B]
>[   47.396851] [drm:verify_encoder_state] [ENCODER:53:DP-MST C]
>[   47.396853] [drm:intel_connector_verify_state] [CONNECTOR:47:HDMI-A-1]
>[   47.396854] [drm:intel_connector_verify_state] [CONNECTOR:50:DP-1]
>[   47.396855] [drm:intel_connector_verify_state] [CONNECTOR:54:HDMI-A-2]
>[   47.396857] [drm:verify_single_dpll_state] PORT PLL A
>[   47.396858] [drm:verify_single_dpll_state] PORT PLL B
>[   47.396860] [drm:verify_single_dpll_state] PORT PLL C
>[   47.396868] [drm:intel_power_well_disable] disabling dpio-common-a
>[   47.396871] [drm:intel_connector_verify_state] [CONNECTOR:39:eDP-1]
>[   47.396874] [drm:verify_crtc_state] [CRTC:26:pipe A]
>[   47.396878] [drm:verify_single_dpll_state] PORT PLL A
>[   47.396881] [drm:intel_power_well_disable] disabling DC off
>[   47.396885] [drm:gen9_enable_dc5] Enabling DC5
>[   47.396887] [drm:gen9_set_dc_state] Setting DC state from 00 to 01
>[   47.396891] [drm:intel_power_well_disable] disabling always-on
>[   47.396899] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b4057800
>[   47.396904] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b4057800
>[   47.397518] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3489000
>[   47.397522] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3488000 state to ffff9bf1b3489000
>[   47.397524] [drm:drm_atomic_check_only] checking ffff9bf1b3489000
>[   47.397531] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a1840 state to ffff9bf1b3489000
>[   47.397533] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1f00 state to ffff9bf1b3489000
>[   47.397536] [drm:drm_atomic_commit] commiting ffff9bf1b3489000
>[   47.397547] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3489000
>[   47.397549] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3489000
>[   47.398011] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3489000
>[   47.398013] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b348a800 state to ffff9bf1b3489000
>[   47.398014] [drm:drm_atomic_check_only] checking ffff9bf1b3489000
>[   47.398016] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] active changed
>[   47.398017] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] needs all connectors, enable: y, active: y
>[   47.398018] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b3489000
>[   47.398020] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff9bf1782dfc40 state to ffff9bf1b3489000
>[   47.398022] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828a13c0 state to ffff9bf1b3489000
>[   47.398023] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828a1780 state to ffff9bf1b3489000
>[   47.398025] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b3489000
>[   47.398027] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[   47.398028] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 18
>[   47.398033] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   47.398035] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 270000 pixel clock 73810KHz
>[   47.398037] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 1 clock 270000 bpp 18
>[   47.398038] [drm:intel_dp_compute_config] DP link bw required 132858 available 216000
>[   47.398040] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   47.398042] [drm:intel_dump_pipe_config] [CRTC:26:pipe A][modeset] config ffff9bf1b348a800 for pipe A
>[   47.398043] [drm:intel_dump_pipe_config] cpu_transcoder: EDP
>[   47.398044] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   47.398046] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   47.398048] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m: 2579846, gmch_n: 4194304, link_m: 143324, link_n: 524288, tu: 64
>[   47.398049] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   47.398050] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   47.398051] [drm:intel_dump_pipe_config] requested mode:
>[   47.398053] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 73810 1366 1406 1438 1532 768 771 783 803 0x0 0xa
>[   47.398054] [drm:intel_dump_pipe_config] adjusted mode:
>[   47.398056] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 73810 1366 1406 1438 1532 768 771 783 803 0x48 0xa
>[   47.398058] [drm:intel_dump_crtc_timings] crtc timings: 73810 1366 1406 1438 1532 768 771 783 803, type: 0x48 flags: 0xa
>[   47.398059] [drm:intel_dump_pipe_config] port clock: 270000
>[   47.398060] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   47.398061] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   47.398062] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   47.398063] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.398064] [drm:intel_dump_pipe_config] ips: 0
>[   47.398065] [drm:intel_dump_pipe_config] double wide: 0
>[   47.398067] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[   47.398068] [drm:intel_dump_pipe_config] planes on this crtc
>[   47.398069] [drm:intel_dump_pipe_config] [PLANE:23:plane 1A] enabled
>[   47.398072] [drm:intel_dump_pipe_config] 	FB:55, fb = 1366x768 format = XR24 little-endian (0x34325258)
>[   47.398074] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+1366+768 dst 0x0+1366+768
>[   47.398075] [drm:intel_dump_pipe_config] [PLANE:25:cursor A] enabled
>[   47.398076] [drm:intel_dump_pipe_config] 	FB:59, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   47.398078] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+256+256 dst 561x321+256+256
>[   47.398079] [drm:intel_dump_pipe_config] [PLANE:27:plane 2A] disabled, scaler_id = -1
>[   47.398081] [drm:intel_dump_pipe_config] [PLANE:28:plane 3A] disabled, scaler_id = -1
>[   47.398083] [drm:intel_modeset_checks] New cdclk calculated to be atomic 144000, actual 144000
>[   47.398089] [drm:skl_update_scaler_plane] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[   47.398090] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:23:plane 1A] with fb 55
>[   47.398092] [drm:intel_plane_atomic_calc_changes] [PLANE:23:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[   47.398094] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 59
>[   47.398095] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 0 -> 1, off 0, on 1, ms 1
>[   47.398098] [drm:bxt_get_dpll] [CRTC:26:pipe A] using pre-allocated PORT PLL A
>[   47.398099] [drm:intel_reference_shared_dpll] using PORT PLL A for pipe A
>[   47.398101] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   47.398106] [drm:drm_atomic_get_crtc_state] Added [CRTC:31:pipe B] ffff9bf1b348b000 state to ffff9bf1b3489000
>[   47.398108] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe C] ffff9bf1b3489800 state to ffff9bf1b3489000
>[   47.398113] [drm:drm_atomic_commit] commiting ffff9bf1b3489000
>[   47.398118] [drm:intel_power_well_enable] enabling always-on
>[   47.398119] [drm:intel_power_well_enable] enabling DC off
>[   47.398608] [drm:gen9_set_dc_state] Setting DC state from 01 to 00
>[   47.398615] [drm:intel_power_well_enable] enabling dpio-common-a
>[   47.400510] [drm:verify_encoder_state] [ENCODER:38:DDI A]
>[   47.400523] [drm:verify_encoder_state] [ENCODER:46:DDI B]
>[   47.400534] [drm:verify_encoder_state] [ENCODER:49:DDI C]
>[   47.400542] [drm:verify_encoder_state] [ENCODER:51:DP-MST A]
>[   47.400551] [drm:verify_encoder_state] [ENCODER:52:DP-MST B]
>[   47.400561] [drm:verify_encoder_state] [ENCODER:53:DP-MST C]
>[   47.400571] [drm:intel_connector_verify_state] [CONNECTOR:47:HDMI-A-1]
>[   47.400589] [drm:intel_connector_verify_state] [CONNECTOR:50:DP-1]
>[   47.400598] [drm:intel_connector_verify_state] [CONNECTOR:54:HDMI-A-2]
>[   47.400622] [drm:verify_single_dpll_state] PORT PLL A
>[   47.400626] [drm:verify_single_dpll_state] PORT PLL B
>[   47.400629] [drm:verify_single_dpll_state] PORT PLL C
>[   47.400652] [drm:intel_enable_shared_dpll] enable PORT PLL A (active 1, on? 0) for crtc 26
>[   47.400658] [drm:intel_enable_shared_dpll] enabling PORT PLL A
>[   47.400757] [drm:edp_panel_on] Turn eDP port A panel power on
>[   47.400760] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   47.879428] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control 00000060
>[   47.952128] [drm:wait_panel_status] Wait complete
>[   47.952136] [drm:wait_panel_on] Wait for panel power on
>[   47.952144] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control 00000063
>[   48.153791] [drm:wait_panel_status] Wait complete
>[   48.153810] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   48.153818] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[   48.154922] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   48.154923] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   48.155504] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   48.155505] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   48.156056] [drm:intel_dp_link_training_clock_recovery] clock recovery OK
>[   48.156916] [drm:intel_dp_link_training_channel_equalization] Channel EQ done. DP Training successful
>[   48.157058] [drm:skylake_pfit_enable] for crtc_state = ffff9bf1b348a800
>[   48.157136] [drm:intel_enable_pipe] enabling pipe A
>[   48.157163] [drm:intel_edp_backlight_on] 
>[   48.157165] [drm:intel_panel_enable_backlight] pipe A
>[   48.157167] [drm:intel_panel_actually_set_backlight] set backlight PWM = 96000
>[   48.162647] [drm:intel_psr_enable] PSR not supported on this platform
>[   48.162652] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   48.174096] [drm:intel_connector_verify_state] [CONNECTOR:39:eDP-1]
>[   48.174109] [drm:verify_crtc_state] [CRTC:26:pipe A]
>[   48.174167] [drm:verify_single_dpll_state] PORT PLL A
>[   48.174201] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3489000
>[   48.174210] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3489000
>[   48.174323] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1ad237000
>[   48.174326] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1ad233800 state to ffff9bf1ad237000
>[   48.174328] [drm:drm_atomic_check_only] checking ffff9bf1ad237000
>[   48.174338] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf178017540 state to ffff9bf1ad237000
>[   48.174340] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf178017c00 state to ffff9bf1ad237000
>[   48.174345] [drm:drm_atomic_commit] commiting ffff9bf1ad237000
>[   48.190644] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1ad237000
>[   48.190653] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1ad237000
>[   48.190873] [drm:drm_mode_addfb2] [FB:62]
>[   48.207444] [drm:drm_mode_addfb2] [FB:57]
>[   48.237509] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b24d0800
>[   48.237516] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1300 state to ffff9bf1b24d0800
>[   48.237519] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b24d3800 state to ffff9bf1b24d0800
>[   48.237521] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1300 to [CRTC:26:pipe A]
>[   48.237523] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828e1300
>[   48.237524] [drm:drm_atomic_check_only] checking ffff9bf1b24d0800
>[   48.237533] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   48.237535] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   48.237544] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1240 state to ffff9bf1b24d0800
>[   48.237550] [drm:drm_atomic_commit] commiting ffff9bf1b24d0800
>[   48.237593] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b24d0800
>[   48.237596] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b24d0800
>[   48.237608] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b24d0800
>[   48.237610] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1828e1540 state to ffff9bf1b24d0800
>[   48.237612] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b24d5000 state to ffff9bf1b24d0800
>[   48.237613] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff9bf1828e1540 to [CRTC:26:pipe A]
>[   48.237614] [drm:drm_atomic_set_fb_for_plane] Set [FB:55] for plane state ffff9bf1828e1540
>[   48.237615] [drm:drm_atomic_check_only] checking ffff9bf1b24d0800
>[   48.237618] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   48.237619] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   48.237623] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1828e1b40 state to ffff9bf1b24d0800
>[   48.237626] [drm:drm_atomic_commit] commiting ffff9bf1b24d0800
>[   48.237644] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b24d0800
>[   48.237646] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b24d0800
>[   48.907623] [drm:drm_mode_addfb2] [FB:59]
>[   48.936531] PM: Syncing filesystems ... done.
>[   48.942120] PM: Preparing system for sleep (mem)
>[   48.943280] Freezing user space processes ... (elapsed 0.001 seconds) done.
>[   48.945147] Double checking all user space processes after OOM killer disable... (elapsed 0.000 seconds) 
>[   48.945385] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
>[   48.946975] PM: Suspending system (mem)
>[   48.947006] Suspending console(s) (use no_console_suspend to debug)
>[   49.608579] sd 0:0:0:0: [sda] Synchronizing SCSI cache
>[   49.611002] sd 0:0:0:0: [sda] Stopping disk
>[   49.612646] [drm:intel_power_well_enable] enabling power well 2
>[   49.612650] [drm:skl_set_power_well] Enabling power well 2
>[   49.614698] [drm:intel_power_well_enable] enabling dpio-common-bc
>[   49.615448] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3483000
>[   49.615453] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3487800 state to ffff9bf1b3483000
>[   49.615455] [drm:drm_atomic_get_crtc_state] Added [CRTC:31:pipe B] ffff9bf1b3481800 state to ffff9bf1b3483000
>[   49.615458] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe C] ffff9bf1b3486000 state to ffff9bf1b3483000
>[   49.615461] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b0067d80 state to ffff9bf1b3483000
>[   49.615476] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1b0067c00 state to ffff9bf1b3483000
>[   49.615478] [drm:drm_atomic_get_plane_state] Added [PLANE:27:plane 2A] ffff9bf1b00676c0 state to ffff9bf1b3483000
>[   49.615531] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 3A] ffff9bf1b0067cc0 state to ffff9bf1b3483000
>[   49.615534] [drm:drm_atomic_get_plane_state] Added [PLANE:29:plane 1B] ffff9bf1b00679c0 state to ffff9bf1b3483000
>[   49.615535] [drm:drm_atomic_get_plane_state] Added [PLANE:30:cursor B] ffff9bf1b0067000 state to ffff9bf1b3483000
>[   49.615537] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 2B] ffff9bf1b0067300 state to ffff9bf1b3483000
>[   49.615539] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane 3B] ffff9bf1b00673c0 state to ffff9bf1b3483000
>[   49.615540] [drm:drm_atomic_get_plane_state] Added [PLANE:34:plane 1C] ffff9bf1b0067b40 state to ffff9bf1b3483000
>[   49.615542] [drm:drm_atomic_get_plane_state] Added [PLANE:35:cursor C] ffff9bf1add7a240 state to ffff9bf1b3483000
>[   49.615544] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 2C] ffff9bf1ae00b540 state to ffff9bf1b3483000
>[   49.615547] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff9bf167192580 state to ffff9bf1b3483000
>[   49.615549] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:47] ffff9bf167192dc0 state to ffff9bf1b3483000
>[   49.615551] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:50] ffff9bf1671926c0 state to ffff9bf1b3483000
>[   49.615552] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:54] ffff9bf167192780 state to ffff9bf1b3483000
>[   49.615554] [drm:drm_atomic_state_init] Allocated atomic state ffff9bf1b3485800
>[   49.615556] [drm:drm_atomic_get_crtc_state] Added [CRTC:26:pipe A] ffff9bf1b3484000 state to ffff9bf1b3485800
>[   49.615557] [drm:drm_atomic_check_only] checking ffff9bf1b3485800
>[   49.615561] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] active changed
>[   49.615562] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] needs all connectors, enable: y, active: n
>[   49.615563] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b3485800
>[   49.615565] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:39] ffff9bf167192700 state to ffff9bf1b3485800
>[   49.615566] [drm:drm_atomic_get_plane_state] Added [PLANE:23:plane 1A] ffff9bf1b29d8b40 state to ffff9bf1b3485800
>[   49.615568] [drm:drm_atomic_get_plane_state] Added [PLANE:25:cursor A] ffff9bf1ae1c1600 state to ffff9bf1b3485800
>[   49.615570] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b3485800
>[   49.615573] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[   49.615574] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 18
>[   49.615579] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   49.615581] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 270000 pixel clock 73810KHz
>[   49.615583] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 1 clock 270000 bpp 18
>[   49.615584] [drm:intel_dp_compute_config] DP link bw required 132858 available 216000
>[   49.615586] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   49.615588] [drm:intel_dump_pipe_config] [CRTC:26:pipe A][modeset] config ffff9bf1b3484000 for pipe A
>[   49.615589] [drm:intel_dump_pipe_config] cpu_transcoder: EDP
>[   49.615590] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   49.615591] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   49.615593] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m: 2579846, gmch_n: 4194304, link_m: 143324, link_n: 524288, tu: 64
>[   49.615594] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   49.615595] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   49.615596] [drm:intel_dump_pipe_config] requested mode:
>[   49.615599] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 73810 1366 1406 1438 1532 768 771 783 803 0x0 0xa
>[   49.615599] [drm:intel_dump_pipe_config] adjusted mode:
>[   49.615601] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 73810 1366 1406 1438 1532 768 771 783 803 0x48 0xa
>[   49.615603] [drm:intel_dump_crtc_timings] crtc timings: 73810 1366 1406 1438 1532 768 771 783 803, type: 0x48 flags: 0xa
>[   49.615604] [drm:intel_dump_pipe_config] port clock: 270000
>[   49.615605] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   49.615606] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   49.615607] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   49.615608] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   49.615609] [drm:intel_dump_pipe_config] ips: 0
>[   49.615610] [drm:intel_dump_pipe_config] double wide: 0
>[   49.615612] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[   49.615613] [drm:intel_dump_pipe_config] planes on this crtc
>[   49.615617] [drm:intel_dump_pipe_config] [PLANE:23:plane 1A] enabled
>[   49.615618] [drm:intel_dump_pipe_config] 	FB:59, fb = 1366x768 format = XR24 little-endian (0x34325258)
>[   49.615618] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+1366+768 dst 0x0+1366+768
>[   49.615621] [drm:intel_dump_pipe_config] [PLANE:25:cursor A] enabled
>[   49.615622] [drm:intel_dump_pipe_config] 	FB:55, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   49.615622] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+256+256 dst 565x328+256+256
>[   49.615623] [drm:intel_dump_pipe_config] [PLANE:27:plane 2A] disabled, scaler_id = -1
>[   49.615624] [drm:intel_dump_pipe_config] [PLANE:28:plane 3A] disabled, scaler_id = -1
>[   49.615627] [drm:intel_modeset_checks] New cdclk calculated to be atomic 144000, actual 144000
>[   49.615633] [drm:skl_update_scaler_plane] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[   49.615634] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:23:plane 1A] with fb 59
>[   49.615636] [drm:intel_plane_atomic_calc_changes] [PLANE:23:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[   49.615638] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   49.615639] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 1 -> 0, off 1, on 0, ms 1
>[   49.615643] [drm:bxt_get_dpll] [CRTC:26:pipe A] using pre-allocated PORT PLL A
>[   49.615644] [drm:intel_reference_shared_dpll] using PORT PLL A for pipe A
>[   49.615645] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   49.615650] [drm:drm_atomic_get_crtc_state] Added [CRTC:31:pipe B] ffff9bf1b3480000 state to ffff9bf1b3485800
>[   49.615652] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe C] ffff9bf1b3482800 state to ffff9bf1b3485800
>[   49.615656] [drm:drm_atomic_commit] commiting ffff9bf1b3485800
>[   49.615683] [drm:intel_edp_backlight_off] 
>[   49.823692] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[   49.823710] [drm:intel_disable_pipe] disabling pipe A
>[   49.826130] [drm:edp_panel_off] Turn eDP port A panel power off
>[   49.826134] [drm:wait_panel_off] Wait for panel power off time
>[   49.826139] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control 00000060
>[   49.877028] [drm:wait_panel_status] Wait complete
>[   49.877045] [drm:intel_disable_shared_dpll] disable PORT PLL A (active 1, on? 1) for crtc 26
>[   49.877068] [drm:intel_disable_shared_dpll] disabling PORT PLL A
>[   49.877090] [drm:verify_encoder_state] [ENCODER:38:DDI A]
>[   49.877094] [drm:verify_encoder_state] [ENCODER:46:DDI B]
>[   49.877099] [drm:verify_encoder_state] [ENCODER:49:DDI C]
>[   49.877102] [drm:verify_encoder_state] [ENCODER:51:DP-MST A]
>[   49.877105] [drm:verify_encoder_state] [ENCODER:52:DP-MST B]
>[   49.877107] [drm:verify_encoder_state] [ENCODER:53:DP-MST C]
>[   49.877110] [drm:intel_connector_verify_state] [CONNECTOR:47:HDMI-A-1]
>[   49.877115] [drm:intel_connector_verify_state] [CONNECTOR:50:DP-1]
>[   49.877119] [drm:intel_connector_verify_state] [CONNECTOR:54:HDMI-A-2]
>[   49.877123] [drm:verify_single_dpll_state] PORT PLL A
>[   49.877126] [drm:verify_single_dpll_state] PORT PLL B
>[   49.877128] [drm:verify_single_dpll_state] PORT PLL C
>[   49.877140] [drm:intel_connector_verify_state] [CONNECTOR:39:eDP-1]
>[   49.877147] [drm:verify_crtc_state] [CRTC:26:pipe A]
>[   49.877155] [drm:verify_single_dpll_state] PORT PLL A
>[   49.877172] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3485800
>[   49.877180] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3485800
>[   49.877568] PM: suspend of devices complete after 270.111 msecs
>[   49.882091] [drm:intel_power_well_disable] disabling dpio-common-bc
>[   49.882096] [drm:intel_power_well_disable] disabling dpio-common-a
>[   49.882098] [drm:intel_power_well_disable] disabling power well 2
>[   49.882108] [drm:skl_set_power_well] Disabling power well 2
>[   49.882111] [drm:intel_power_well_disable] disabling DC off
>[   49.882114] [drm:gen9_enable_dc5] Enabling DC5
>[   49.882117] [drm:gen9_set_dc_state] Setting DC state from 00 to 01
>[   49.882121] [drm:intel_power_well_disable] disabling always-on
>[   49.882625] [drm:gen9_set_dc_state] Setting DC state from 01 to 00
>[   49.882643] [drm:bxt_set_cdclk] Changing CDCLK to 19200 kHz (VCO 0 kHz)
>[   49.887105] [drm:intel_update_cdclk] Current CD clock rate: 19200 kHz, VCO: 0 kHz, ref: 19200 kHz
>[   49.887110] [drm:intel_power_well_disable] disabling power well 1
>[   49.887122] [drm:skl_set_power_well] Disabling power well 1
>[   49.887129] [drm:gen9_sanitize_power_well_requests] Clearing auxiliary requests for power well 1 forced on by DMC
>[   49.887138] [drm:bxt_enable_dc9] Enabling DC9
>[   49.887145] [drm:gen9_set_dc_state] Setting DC state from 00 to 08
>[   49.907392] PM: late suspend of devices complete after 29.868 msecs
>[   49.908067] r8169 0000:03:00.0: System wakeup enabled by ACPI
>[   49.915368] xhci_hcd 0000:00:15.0: System wakeup enabled by ACPI
>[   49.946951] acpi device:4d: Cannot transition from D3cold to D3hot
>[   49.950931] acpi device:4b: Cannot transition from D3cold to D3hot
>[   49.950974] PM: noirq suspend of devices complete after 43.651 msecs
>[   49.951383] ACPI: Preparing to enter system sleep state S3
>[   49.951650] ACPI : EC: EC stopped
>[   49.951651] PM: Saving platform NVS memory
>[   49.951656] Disabling non-boot CPUs ...
>[   49.952220] Broke affinity for irq 123
>[   49.952238] Cannot set affinity for irq 131
>[   49.952296] Broke affinity for irq 373
>[   49.953340] smpboot: CPU 1 is now offline
>[   49.968074] Broke affinity for irq 123
>[   49.968144] Broke affinity for irq 369
>[   49.968149] Broke affinity for irq 373
>[   49.969201] smpboot: CPU 2 is now offline
>[   49.991731] Broke affinity for irq 1
>[   49.991770] Broke affinity for irq 9
>[   49.991802] Broke affinity for irq 28
>[   49.991903] Broke affinity for irq 123
>[   49.991973] Broke affinity for irq 369
>[   49.991976] Broke affinity for irq 371
>[   49.991978] Broke affinity for irq 373
>[   49.993029] smpboot: CPU 3 is now offline
>[   50.005791] ACPI: Low-level resume complete
>[   50.005947] ACPI : EC: EC started
>[   50.005949] PM: Restoring platform NVS memory
>[   50.007105] Enabling non-boot CPUs ...
>[   50.030701] x86: Booting SMP configuration:
>[   50.030704] smpboot: Booting Node 0 Processor 1 APIC 0x2
>[   50.034239]  cache: parent cpu1 should not be sleeping
>[   50.034767] CPU1 is up
>[   50.058514] smpboot: Booting Node 0 Processor 2 APIC 0x4
>[   50.061276]  cache: parent cpu2 should not be sleeping
>[   50.061584] CPU2 is up
>[   50.086487] smpboot: Booting Node 0 Processor 3 APIC 0x6
>[   50.089246]  cache: parent cpu3 should not be sleeping
>[   50.089596] CPU3 is up
>[   50.090908] ACPI: Waking up from system sleep state S3
>[   50.306377] acpi LNXPOWER:02: Turning ON
>[   50.307501] xhci_hcd 0000:00:15.0: System wakeup disabled by ACPI
>[   50.386406] PM: noirq resume of devices complete after 79.426 msecs
>[   50.386785] [drm:gen9_sanitize_dc_state] Resetting DC state tracking from 08 to 00
>[   50.386786] [drm:bxt_disable_dc9] Disabling DC9
>[   50.386788] [drm:gen9_set_dc_state] Setting DC state from 00 to 00
>[   50.386795] [drm:bxt_check_bios_rc6_setup] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4
>[   50.386831] [drm:gen9_set_dc_state] Setting DC state from 00 to 00
>[   50.386835] [drm:intel_power_well_enable] enabling power well 1
>[   50.386843] [drm:intel_update_cdclk] Current CD clock rate: 624000 kHz, VCO: 1248000 kHz, ref: 19200 kHz
>[   50.386844] [drm:bxt_sanitize_cdclk] Sanitizing cdclk programmed by pre-os
>[   50.386846] [drm:bxt_set_cdclk] Changing CDCLK to 144000 kHz (VCO 1152000 kHz)
>[   50.392620] [drm:intel_update_cdclk] Current CD clock rate: 144000 kHz, VCO: 1152000 kHz, ref: 19200 kHz
>[   50.392910] [drm:intel_power_well_enable] enabling always-on
>[   50.392911] [drm:intel_power_well_enable] enabling DC off
>[   50.392912] [drm:gen9_set_dc_state] Setting DC state from 00 to 00
>[   50.392918] [drm:intel_power_well_enable] enabling power well 2
>[   50.392921] [drm:intel_power_well_enable] enabling dpio-common-a
>[   50.395025] [drm:intel_power_well_enable] enabling dpio-common-bc
>[   50.395121] [drm:gen9_set_dc_state] Setting DC state from 00 to 00
>[   50.395181] [drm:bxt_ddi_phy_init] DDI PHY 1 already enabled, won't reprogram it
>[   50.395216] [drm:bxt_ddi_phy_init] DDI PHY 0 already enabled, won't reprogram it
>[   50.395316] PM: early resume of devices complete after 8.794 msecs
>[   50.399339] r8169 0000:03:00.0: System wakeup disabled by ACPI
>[   50.399535] [drm:intel_opregion_setup] graphic opregion physical addr: 0x79a29018
>[   50.399572] [drm:intel_opregion_setup] Public ACPI methods supported
>[   50.399573] [drm:intel_opregion_setup] ASLE supported
>[   50.399579] [drm:intel_opregion_setup] Found valid VBT in ACPI OpRegion (RVDA)
>[   50.399590] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[   50.399643] [drm:gen8_init_common_ring] Execlists enabled for render ring
>[   50.399727] [drm:gen8_init_common_ring] Execlists enabled for blitter ring
>[   50.399797] [drm:gen8_init_common_ring] Execlists enabled for bsd ring
>[   50.399865] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring
>[   50.399934] [drm:intel_guc_setup] GuC fw status: path i915/bxt_guc_ver8_7.bin, fetch NONE, load NONE
>[   50.399941] [drm] GuC firmware load skipped
>[   50.399974] [drm:intel_update_cdclk] Current CD clock rate: 144000 kHz, VCO: 1152000 kHz, ref: 19200 kHz
>[   50.399989] [drm:bxt_hpd_irq_setup] Invert bit setting: hp_ctl:10001010 hp_port:38
>[   50.400001] [drm:intel_modeset_readout_hw_state] [CRTC:26:pipe A] hw state readout: disabled
>[   50.400005] [drm:intel_modeset_readout_hw_state] [CRTC:31:pipe B] hw state readout: disabled
>[   50.400009] [drm:intel_modeset_readout_hw_state] [CRTC:36:pipe C] hw state readout: disabled
>[   50.400012] [drm:intel_modeset_readout_hw_state] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0
>[   50.400013] [drm:intel_modeset_readout_hw_state] PORT PLL B hw state readout: crtc_mask 0x00000000, on 0
>[   50.400015] [drm:intel_modeset_readout_hw_state] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>[   50.400018] [drm:intel_modeset_readout_hw_state] [ENCODER:38:DDI A] hw state readout: disabled, pipe A
>[   50.400021] [drm:intel_modeset_readout_hw_state] [ENCODER:46:DDI B] hw state readout: disabled, pipe A
>[   50.400023] [drm:intel_modeset_readout_hw_state] [ENCODER:49:DDI C] hw state readout: disabled, pipe A
>[   50.400024] [drm:intel_modeset_readout_hw_state] [ENCODER:51:DP-MST A] hw state readout: disabled, pipe A
>[   50.400025] [drm:intel_modeset_readout_hw_state] [ENCODER:52:DP-MST B] hw state readout: disabled, pipe B
>[   50.400026] [drm:intel_modeset_readout_hw_state] [ENCODER:53:DP-MST C] hw state readout: disabled, pipe C
>[   50.400029] [drm:intel_modeset_readout_hw_state] [CONNECTOR:39:eDP-1] hw state readout: disabled
>[   50.400032] [drm:intel_modeset_readout_hw_state] [CONNECTOR:47:HDMI-A-1] hw state readout: disabled
>[   50.400034] [drm:intel_modeset_readout_hw_state] [CONNECTOR:50:DP-1] hw state readout: disabled
>[   50.400036] [drm:intel_modeset_readout_hw_state] [CONNECTOR:54:HDMI-A-2] hw state readout: disabled
>[   50.400040] [drm:intel_dump_pipe_config] [CRTC:26:pipe A][setup_hw_state] config ffff9bf1b3484000 for pipe A
>[   50.400046] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[   50.400047] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[   50.400049] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.400050] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.400051] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   50.400052] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   50.400053] [drm:intel_dump_pipe_config] requested mode:
>[   50.400055] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   50.400056] [drm:intel_dump_pipe_config] adjusted mode:
>[   50.400058] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   50.400060] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[   50.400060] [drm:intel_dump_pipe_config] port clock: 0
>[   50.400061] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[   50.400062] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[   50.400063] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   50.400064] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   50.400065] [drm:intel_dump_pipe_config] ips: 0
>[   50.400066] [drm:intel_dump_pipe_config] double wide: 0
>[   50.400068] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[   50.400068] [drm:intel_dump_pipe_config] planes on this crtc
>[   50.400073] [drm:intel_dump_pipe_config] [PLANE:23:plane 1A] enabled
>[   50.400075] [drm:intel_dump_pipe_config] 	FB:59, fb = 1366x768 format = XR24 little-endian (0x34325258)
>[   50.400075] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+1366+768 dst 0x0+1366+768
>[   50.400078] [drm:intel_dump_pipe_config] [PLANE:25:cursor A] enabled
>[   50.400079] [drm:intel_dump_pipe_config] 	FB:55, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   50.400080] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+256+256 dst 565x328+256+256
>[   50.400081] [drm:intel_dump_pipe_config] [PLANE:27:plane 2A] disabled, scaler_id = -1
>[   50.400082] [drm:intel_dump_pipe_config] [PLANE:28:plane 3A] disabled, scaler_id = -1
>[   50.400084] [drm:intel_dump_pipe_config] [CRTC:31:pipe B][setup_hw_state] config ffff9bf1b3480000 for pipe B
>[   50.400085] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[   50.400086] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[   50.400087] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.400088] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.400090] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   50.400090] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   50.400091] [drm:intel_dump_pipe_config] requested mode:
>[   50.400093] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   50.400093] [drm:intel_dump_pipe_config] adjusted mode:
>[   50.400095] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   50.400097] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[   50.400097] [drm:intel_dump_pipe_config] port clock: 0
>[   50.400098] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[   50.400099] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>[   50.400100] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   50.400101] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   50.400102] [drm:intel_dump_pipe_config] ips: 0
>[   50.400103] [drm:intel_dump_pipe_config] double wide: 0
>[   50.400105] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[   50.400105] [drm:intel_dump_pipe_config] planes on this crtc
>[   50.400106] [drm:intel_dump_pipe_config] [PLANE:29:plane 1B] disabled, scaler_id = -1
>[   50.400108] [drm:intel_dump_pipe_config] [PLANE:30:cursor B] disabled, scaler_id = -1
>[   50.400109] [drm:intel_dump_pipe_config] [PLANE:32:plane 2B] disabled, scaler_id = -1
>[   50.400110] [drm:intel_dump_pipe_config] [PLANE:33:plane 3B] disabled, scaler_id = -1
>[   50.400114] [drm:intel_dump_pipe_config] [CRTC:36:pipe C][setup_hw_state] config ffff9bf1b3482800 for pipe C
>[   50.400115] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[   50.400116] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[   50.400117] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.400118] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.400120] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   50.400120] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   50.400121] [drm:intel_dump_pipe_config] requested mode:
>[   50.400123] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   50.400123] [drm:intel_dump_pipe_config] adjusted mode:
>[   50.400125] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[   50.400127] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[   50.400127] [drm:intel_dump_pipe_config] port clock: 0
>[   50.400128] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[   50.400129] [drm:intel_dump_pipe_config] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>[   50.400130] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   50.400131] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   50.400132] [drm:intel_dump_pipe_config] ips: 0
>[   50.400132] [drm:intel_dump_pipe_config] double wide: 0
>[   50.400134] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[   50.400135] [drm:intel_dump_pipe_config] planes on this crtc
>[   50.400136] [drm:intel_dump_pipe_config] [PLANE:34:plane 1C] disabled, scaler_id = -1
>[   50.400137] [drm:intel_dump_pipe_config] [PLANE:35:cursor C] disabled, scaler_id = -1
>[   50.400139] [drm:intel_dump_pipe_config] [PLANE:37:plane 2C] disabled, scaler_id = -1
>[   50.400216] [drm:intel_power_well_disable] disabling dpio-common-bc
>[   50.400219] [drm:intel_power_well_disable] disabling dpio-common-a
>[   50.400223] [drm:drm_atomic_check_only] checking ffff9bf1b3483000
>[   50.400228] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] mode changed
>[   50.400229] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] enable changed
>[   50.400233] [drm:update_connector_routing] Updating routing for [CONNECTOR:39:eDP-1]
>[   50.400234] [drm:update_connector_routing] [CONNECTOR:39:eDP-1] keeps [ENCODER:38:DDI A], now on [CRTC:26:pipe A]
>[   50.400235] [drm:update_connector_routing] Updating routing for [CONNECTOR:47:HDMI-A-1]
>[   50.400236] [drm:update_connector_routing] Disabling [CONNECTOR:47:HDMI-A-1]
>[   50.400237] [drm:update_connector_routing] Updating routing for [CONNECTOR:50:DP-1]
>[   50.400238] [drm:update_connector_routing] Disabling [CONNECTOR:50:DP-1]
>[   50.400239] [drm:update_connector_routing] Updating routing for [CONNECTOR:54:HDMI-A-2]
>[   50.400240] [drm:update_connector_routing] Disabling [CONNECTOR:54:HDMI-A-2]
>[   50.400241] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] active changed
>[   50.400242] [drm:drm_atomic_helper_check_modeset] [CRTC:26:pipe A] needs all connectors, enable: y, active: y
>[   50.400243] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b3483000
>[   50.400245] [drm:drm_atomic_helper_check_modeset] [CRTC:31:pipe B] needs all connectors, enable: n, active: n
>[   50.400246] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:31:pipe B] to ffff9bf1b3483000
>[   50.400247] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe C] needs all connectors, enable: n, active: n
>[   50.400248] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe C] to ffff9bf1b3483000
>[   50.400250] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:26:pipe A] to ffff9bf1b3483000
>[   50.400253] [drm:connected_sink_compute_bpp] [CONNECTOR:39:eDP-1] checking for sink bpp constrains
>[   50.400254] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 18
>[   50.400262] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   50.400264] [drm:intel_dp_compute_config] DP link computation with max lane count 1 max bw 270000 pixel clock 73810KHz
>[   50.400266] [drm:intel_dp_compute_config] DP link bw 0a rate select 00 lane count 1 clock 270000 bpp 18
>[   50.400267] [drm:intel_dp_compute_config] DP link bw required 132858 available 216000
>[   50.400269] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 18, dithering: 1
>[   50.400270] [drm:intel_dump_pipe_config] [CRTC:26:pipe A][modeset] config ffff9bf1b3487800 for pipe A
>[   50.400271] [drm:intel_dump_pipe_config] cpu_transcoder: EDP
>[   50.400272] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1
>[   50.400273] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   50.400274] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m: 2579846, gmch_n: 4194304, link_m: 143324, link_n: 524288, tu: 64
>[   50.400276] [drm:intel_dump_pipe_config] dp: 1, lanes: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   50.400277] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   50.400277] [drm:intel_dump_pipe_config] requested mode:
>[   50.400279] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 73810 1366 1406 1438 1532 768 771 783 803 0x0 0xa
>[   50.400280] [drm:intel_dump_pipe_config] adjusted mode:
>[   50.400282] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 60 73810 1366 1406 1438 1532 768 771 783 803 0x48 0xa
>[   50.400284] [drm:intel_dump_crtc_timings] crtc timings: 73810 1366 1406 1438 1532 768 771 783 803, type: 0x48 flags: 0xa
>[   50.400285] [drm:intel_dump_pipe_config] port clock: 270000
>[   50.400285] [drm:intel_dump_pipe_config] pipe src size: 1366x768
>[   50.400286] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   50.400287] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   50.400288] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   50.400289] [drm:intel_dump_pipe_config] ips: 0
>[   50.400290] [drm:intel_dump_pipe_config] double wide: 0
>[   50.400292] [drm:intel_dump_pipe_config] ddi_pll_sel: 0; dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[   50.400293] [drm:intel_dump_pipe_config] planes on this crtc
>[   50.400295] [drm:intel_dump_pipe_config] [PLANE:23:plane 1A] enabled
>[   50.400297] [drm:intel_dump_pipe_config] 	FB:59, fb = 1366x768 format = XR24 little-endian (0x34325258)
>[   50.400297] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+1366+768 dst 0x0+1366+768
>[   50.400299] [drm:intel_dump_pipe_config] [PLANE:25:cursor A] enabled
>[   50.400301] [drm:intel_dump_pipe_config] 	FB:55, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   50.400301] [drm:intel_dump_pipe_config] 	scaler:-1 src 0x0+256+256 dst 565x328+256+256
>[   50.400302] [drm:intel_dump_pipe_config] [PLANE:27:plane 2A] disabled, scaler_id = -1
>[   50.400303] [drm:intel_dump_pipe_config] [PLANE:28:plane 3A] disabled, scaler_id = -1
>[   50.400305] [drm:intel_modeset_checks] New cdclk calculated to be atomic 144000, actual 144000
>[   50.400307] [drm:drm_atomic_helper_crtc_normalize_zpos] [CRTC:26:pipe A] calculating normalized zpos values
>[   50.400318] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:23:plane 1A] processing zpos value 0
>[   50.400319] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:25:cursor A] processing zpos value 0
>[   50.400321] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:23:plane 1A] normalized zpos value 0
>[   50.400322] [drm:drm_atomic_helper_crtc_normalize_zpos] [PLANE:25:cursor A] normalized zpos value 1
>[   50.400330] [drm:skl_update_scaler_plane] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[   50.400332] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:23:plane 1A] with fb 59
>[   50.400333] [drm:intel_plane_atomic_calc_changes] [PLANE:23:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[   50.400336] [drm:intel_plane_atomic_calc_changes] [CRTC:26:pipe A] has [PLANE:25:cursor A] with fb 55
>[   50.400337] [drm:intel_plane_atomic_calc_changes] [PLANE:25:cursor A] visible 0 -> 1, off 0, on 1, ms 1
>[   50.400341] [drm:bxt_get_dpll] [CRTC:26:pipe A] using pre-allocated PORT PLL A
>[   50.400342] [drm:intel_reference_shared_dpll] using PORT PLL A for pipe A
>[   50.400343] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[   50.400345] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:31:pipe B] scaler_user index 1.31
>[   50.400346] [drm:skl_update_scaler] scaler_user index 1.31: Staged freeing scaler id 0 scaler_users = 0x0
>[   50.400348] [drm:skl_update_scaler_crtc] Updating scaler for [CRTC:36:pipe C] scaler_user index 2.31
>[   50.400349] [drm:skl_update_scaler] scaler_user index 2.31: Staged freeing scaler id 0 scaler_users = 0x0
>[   50.400380] [drm:drm_atomic_commit] commiting ffff9bf1b3483000
>[   50.400394] [drm:intel_power_well_enable] enabling dpio-common-a
>[   50.401592] [drm:intel_power_well_disable] disabling power well 2
>[   50.401602] [drm:skl_set_power_well] Disabling power well 2
>[   50.401818] [drm:intel_power_well_enable] enabling power well 2
>[   50.401820] [drm:skl_set_power_well] Enabling power well 2
>[   50.403858] [drm:verify_encoder_state] [ENCODER:38:DDI A]
>[   50.403860] [drm:verify_encoder_state] [ENCODER:46:DDI B]
>[   50.403862] [drm:verify_encoder_state] [ENCODER:49:DDI C]
>[   50.403863] [drm:verify_encoder_state] [ENCODER:51:DP-MST A]
>[   50.403864] [drm:verify_encoder_state] [ENCODER:52:DP-MST B]
>[   50.403864] [drm:verify_encoder_state] [ENCODER:53:DP-MST C]
>[   50.403865] [drm:intel_connector_verify_state] [CONNECTOR:47:HDMI-A-1]
>[   50.403866] [drm:intel_connector_verify_state] [CONNECTOR:50:DP-1]
>[   50.403868] [drm:intel_connector_verify_state] [CONNECTOR:54:HDMI-A-2]
>[   50.403869] [drm:verify_single_dpll_state] PORT PLL A
>[   50.403871] [drm:verify_single_dpll_state] PORT PLL B
>[   50.403872] [drm:verify_single_dpll_state] PORT PLL C
>[   50.403896] [drm:intel_enable_shared_dpll] enable PORT PLL A (active 1, on? 0) for crtc 26
>[   50.403897] [drm:intel_enable_shared_dpll] enabling PORT PLL A
>[   50.404000] [drm:edp_panel_on] Turn eDP port A panel power on
>[   50.404002] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[   50.404006] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control 00000062
>[   50.404008] [drm:wait_panel_status] Wait complete
>[   50.404014] [drm:wait_panel_on] Wait for panel power on
>[   50.404017] [drm:wait_panel_status] mask b000000f value 80000008 status 9000000a control 00000063
>[   50.407169] sd 0:0:0:0: [sda] Starting disk
>[   50.420428] r8169 0000:03:00.0 enp3s0: link down
>[   50.605154] [drm:wait_panel_status] Wait complete
>[   50.605172] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[   50.605180] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[   50.613646] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.617153] rtc_cmos 00:05: System wakeup disabled by ACPI
>[   50.622102] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.630559] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.639012] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.647465] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.655916] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.664370] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.672822] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.681129] usb 1-6: reset high-speed USB device number 4 using xhci_hcd
>[   50.681275] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.689730] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.698184] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.706660] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.715112] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.723567] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.732018] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.740468] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.748926] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.757378] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.765829] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.774279] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.782731] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.791183] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.799633] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.808084] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.816534] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.824985] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.833439] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.841891] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.850343] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.858796] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.867246] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.875696] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.875700] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   50.880667] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[   50.882076] ata1.00: configured for UDMA/133
>[   50.893108] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.901560] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.910011] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.918464] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.926918] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.935367] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.943819] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.952272] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.960724] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.969176] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.977627] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.986080] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   50.994533] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.002986] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.011435] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.019884] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.028333] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.036785] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.045237] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.053689] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.062141] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.070594] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.079052] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.087502] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.095952] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.104403] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.112853] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.121308] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.129761] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.138212] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.146663] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.155113] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.155116] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   51.172657] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.181109] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.189562] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.198013] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.206464] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.214912] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.223362] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.231812] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.240264] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.248717] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.257168] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.265617] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.274071] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.282522] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.290972] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.299421] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.307872] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.316321] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.324772] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.333223] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.341674] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.350125] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.358576] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.367023] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.375471] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.383921] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.392371] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.400824] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.409275] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.417725] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.426176] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.434625] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.434628] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   51.443769] [drm:intel_dp_sink_dpms] failed to enable sink power state
>[   51.452861] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.461353] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.469846] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.478337] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.486826] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.495314] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.503803] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.512293] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.520783] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.529275] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.537768] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.546259] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.554746] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.563234] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.571725] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.580215] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.588706] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.597197] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.605684] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.614175] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.622664] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.631152] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.639642] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.648132] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.656620] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.665111] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.673601] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.682092] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.690580] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.699069] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.707557] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.716048] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.716051] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   51.724539] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.733030] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.741521] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.750012] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.758499] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.766988] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.775479] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.783968] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.792458] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.800948] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.809436] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.817930] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.826418] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.834907] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.843322] [drm] RC6 on
>[   51.843399] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.851894] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.860384] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.868876] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.877368] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.885859] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.894349] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.902840] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.911329] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.919821] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.928313] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.936805] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.945300] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.953793] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.962279] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.970767] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.979256] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.987747] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   51.987750] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   51.987768] [drm:intel_dp_set_signal_levels] Using vswing level 0
>[   51.987769] [drm:intel_dp_set_signal_levels] Using pre-emphasis level 0
>[   51.996263] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.004754] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.013243] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.021733] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.030221] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.038710] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.047199] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.055690] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.064179] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.072670] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.081161] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.089651] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.098140] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.106629] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.115117] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.123608] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.132099] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.140589] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.149080] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.157570] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.166057] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.174547] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.183037] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.191527] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.200017] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.208507] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.216995] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.225484] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.233972] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.242462] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.250952] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.259442] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.259446] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   52.259488] [drm:intel_dp_link_training_clock_recovery [i915]] *ERROR* failed to enable link training
>[   52.267978] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.276468] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.284959] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.293449] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.301939] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.310429] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.318917] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.327406] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.335898] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.344388] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.352879] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.361368] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.369854] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.378344] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.386833] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.395324] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.403815] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.412305] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.420794] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.429283] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.437772] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.446264] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.454754] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.463244] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.471732] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.480222] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.488713] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.497202] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.505691] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.514180] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.522668] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.531158] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.531161] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   52.531190] [drm:intel_dp_start_link_train [i915]] *ERROR* failed to start channel equalization
>[   52.539642] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.548091] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.556541] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.564989] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.573436] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.581884] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.590332] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.598782] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.607232] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.615682] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.624130] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.632579] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.641030] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.649479] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.657927] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.666376] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.674824] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.683274] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.691725] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.700175] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.708626] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.717075] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.725522] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.733973] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.742423] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.750873] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.759324] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.767774] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.776222] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.784670] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.793120] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.801569] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.801572] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   52.801576] [drm:skylake_pfit_enable] for crtc_state = ffff9bf1b3487800
>[   52.801642] [drm:intel_enable_pipe] enabling pipe A
>[   52.801656] [drm:intel_edp_backlight_on] 
>[   52.801658] [drm:intel_panel_enable_backlight] pipe A
>[   52.801660] [drm:intel_panel_actually_set_backlight] set backlight PWM = 96000
>[   52.801665] [drm:intel_psr_enable] PSR not supported on this platform
>[   52.801666] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[   52.818414] [drm:intel_connector_verify_state] [CONNECTOR:39:eDP-1]
>[   52.818426] [drm:verify_crtc_state] [CRTC:26:pipe A]
>[   52.818491] [drm:verify_single_dpll_state] PORT PLL A
>[   52.818516] [drm:verify_crtc_state] [CRTC:31:pipe B]
>[   52.818525] [drm:verify_crtc_state] [CRTC:36:pipe C]
>[   52.818544] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff9bf1b3483000
>[   52.818558] [drm:drm_atomic_state_free] Freeing atomic state ffff9bf1b3483000
>[   52.818576] [drm:bxt_hpd_irq_setup] Invert bit setting: hp_ctl:18001018 hp_port:38
>[   52.818587] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   52.827030] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.835457] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.843872] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.852288] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.860703] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.869118] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.877532] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.885948] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.894363] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.902778] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.911193] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.919608] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.928021] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.936438] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.944855] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.953270] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.961715] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.970152] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.978568] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.986984] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   52.995399] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.003813] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.012229] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.020645] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.029058] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.037475] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.045890] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.054305] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.062721] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.071136] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.079549] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.087965] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.087968] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   53.096383] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.104798] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.113214] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.121658] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.130097] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.138510] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.146925] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.155339] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.163755] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.172168] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.180581] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.188997] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.197414] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.205828] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.214244] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.222659] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.231072] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.239488] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.247902] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.256317] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.264735] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.273150] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.281577] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.290016] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.298456] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.306873] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.315286] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.323702] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.332115] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.340530] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.348944] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.357361] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.357364] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   53.365778] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.374193] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.382607] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.391023] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.399440] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.407855] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.416271] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.424687] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.433101] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.441516] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.449932] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.458371] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.466811] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.475227] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.483641] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.492058] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.500473] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.508891] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.517307] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.525723] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.534136] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.542552] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.550968] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.559385] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.567802] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.576218] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.584632] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.593049] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.601464] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.609880] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.618297] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.626725] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.626728] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   53.626760] [drm:intel_dp_check_link_status [i915]] *ERROR* Failed to get link status
>[   53.626762] [drm:drm_helper_hpd_irq_event] [CONNECTOR:39:eDP-1] status updated from connected to connected
>[   53.626764] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   53.626914] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   53.626915] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   53.627060] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   53.627062] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   53.627207] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[   53.627208] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   53.627364] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[   53.627366] [drm:drm_helper_hpd_irq_event] [CONNECTOR:47:HDMI-A-1] status updated from disconnected to disconnected
>[   53.627367] [drm:intel_dp_detect] [CONNECTOR:50:DP-1]
>[   53.627369] [drm:intel_power_well_enable] enabling dpio-common-bc
>[   53.627443] [drm:intel_power_well_disable] disabling dpio-common-bc
>[   53.627446] [drm:drm_helper_hpd_irq_event] [CONNECTOR:50:DP-1] status updated from disconnected to disconnected
>[   53.627447] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   53.736662] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 2
>[   53.737280] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   53.848516] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 2
>[   53.849154] [drm:drm_helper_hpd_irq_event] [CONNECTOR:54:HDMI-A-2] status updated from disconnected to disconnected
>[   53.849164] [drm:intel_dp_detect] [CONNECTOR:39:eDP-1]
>[   53.857613] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.866050] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.874457] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.882885] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.891292] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.899696] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.908101] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.916507] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.924916] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.933328] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.941732] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.950151] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.958559] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.966980] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.975385] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.983807] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   53.992211] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.000617] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.009024] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.017431] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.025837] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.034253] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.042660] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.051074] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.059483] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.067902] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.076310] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.084716] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.093123] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.101527] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.109934] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.118345] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.118348] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   54.126754] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.135171] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.143580] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.151997] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.160404] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.168827] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.177232] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.185639] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.194045] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.202450] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.210856] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.219265] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.227670] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.236095] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.244499] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.252921] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.261328] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.269734] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.278140] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.286547] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.294965] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.303369] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.311776] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.320190] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.328597] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.337018] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.345423] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.353844] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.362253] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.370659] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.379065] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.387471] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.387474] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   54.395889] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.404293] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.412699] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.421115] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.429531] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.437941] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.446347] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.454751] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.463159] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.471565] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.479981] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.488387] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.496812] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.505216] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.513622] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.522038] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.530443] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.538863] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.547269] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.555674] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.564080] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.572490] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.580904] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.589310] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.597734] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.606138] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.614544] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.622959] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.631363] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.639771] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.648177] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.656581] [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x7d4003ff
>[   54.656583] [drm:drm_dp_dpcd_access] too many retries, giving up
>[   54.656625] [drm:intel_dp_check_link_status [i915]] *ERROR* Failed to get link status
>[   54.656628] [drm:drm_helper_hpd_irq_event] [CONNECTOR:39:eDP-1] status updated from connected to connected
>[   54.656630] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-1]
>[   54.656811] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   54.656812] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   54.656953] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   54.656955] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   54.657097] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[   54.657098] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   54.657239] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[   54.657241] [drm:drm_helper_hpd_irq_event] [CONNECTOR:47:HDMI-A-1] status updated from disconnected to disconnected
>[   54.657243] [drm:intel_dp_detect] [CONNECTOR:50:DP-1]
>[   54.657245] [drm:intel_power_well_enable] enabling dpio-common-bc
>[   54.657341] [drm:intel_power_well_disable] disabling dpio-common-bc
>[   54.657344] [drm:drm_helper_hpd_irq_event] [CONNECTOR:50:DP-1] status updated from disconnected to disconnected
>[   54.657345] [drm:intel_hdmi_detect] [CONNECTOR:54:HDMI-A-2]
>[   54.767528] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 2
>[   54.768159] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc
>[   54.879411] [drm:do_gmbus_xfer] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 2
>[   54.880030] [drm:drm_helper_hpd_irq_event] [CONNECTOR:54:HDMI-A-2] status updated from disconnected to disconnected
>[   54.880592] [drm:intel_didl_outputs] More than 15 outputs detected via ACPI
>[   54.883647] PM: resume of devices complete after 4494.438 msecs
>[   54.883986] PM: Finishing wakeup.
>[   54.883987] Restarting tasks ... done.
>[   54.901799] [drm:intel_power_well_disable] disabling power well 2
>[   54.901812] [drm:skl_set_power_well] Disabling power well 2
>[   54.934543] [drm:drm_mode_addfb2] [FB:57]
>[   54.954231] [drm:drm_mode_addfb2] [FB:59]
>[   54.982318] [drm:drm_mode_addfb2] [FB:57]
>[   55.002708] [drm:drm_mode_addfb2] [FB:62]
>[   55.018617] [drm:drm_mode_addfb2] [FB:59]
>[   55.035154] [drm:drm_mode_addfb2] [FB:57]
>[   55.302094] [drm:drm_mode_addfb2] [FB:59]
>[   55.308745] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[   55.310906] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   55.311125] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   55.319505] [drm:drm_mode_addfb2] [FB:57]
>[   55.377469] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   55.377653] iwlwifi 0000:02:00.0: L1 Enabled - LTR Enabled
>[   55.392332] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[   55.393955] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
>[   55.413645] r8169 0000:03:00.0 enp3s0: link down
>[   55.413741] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
>[   55.477086] IPv6: ADDRCONF(NETDEV_UP): wlp2s0: link is not ready
>[   57.302700] [drm:drm_mode_addfb2] [FB:59]
>[   57.313377] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[   57.313388] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>[   57.313393] [drm:intel_power_well_disable] disabling DC off
>[   57.313399] [drm:gen9_enable_dc5] Enabling DC5
>[   57.313403] [drm:gen9_set_dc_state] Setting DC state from 00 to 01
>[   57.701620] [drm:drm_mode_addfb2] [FB:57]
>[   58.268460] [drm:drm_mode_addfb2] [FB:59]
>[   58.502885] [drm:drm_mode_addfb2] [FB:57]
>[   58.903405] [drm:drm_mode_addfb2] [FB:59]
>[   59.050257] [drm:drm_mode_addfb2] [FB:57]
>[   59.066480] [drm:drm_mode_addfb2] [FB:59]
>[   59.150714] [drm:drm_mode_addfb2] [FB:57]
>[   59.162137] [drm:drm_mode_addfb2] [FB:59]
>[   59.247019] [drm:drm_mode_addfb2] [FB:57]
>[   59.262301] [drm:drm_mode_addfb2] [FB:59]
>[   59.347870] [drm:drm_mode_addfb2] [FB:57]
>[   59.364234] [drm:drm_mode_addfb2] [FB:59]
>[   59.448487] [drm:drm_mode_addfb2] [FB:57]
>[   59.464317] [drm:drm_mode_addfb2] [FB:59]
>[   59.549301] [drm:drm_mode_addfb2] [FB:57]
>[   59.565199] [drm:drm_mode_addfb2] [FB:59]
>[   59.649846] [drm:drm_mode_addfb2] [FB:57]
>[   59.666320] [drm:drm_mode_addfb2] [FB:59]
>[   59.700023] [drm:drm_mode_addfb2] [FB:57]
>[   59.750683] [drm:drm_mode_addfb2] [FB:59]
>[   59.768919] [drm:drm_mode_addfb2] [FB:62]
>[   59.851262] [drm:drm_mode_addfb2] [FB:57]
>[   59.868743] [drm:drm_mode_addfb2] [FB:59]
>[   59.949305] [drm:drm_mode_addfb2] [FB:57]
>[   59.965178] [drm:drm_mode_addfb2] [FB:59]
>[   60.049449] [drm:drm_mode_addfb2] [FB:57]
>[   60.065159] [drm:drm_mode_addfb2] [FB:59]
>[   60.100135] [drm:drm_mode_addfb2] [FB:57]
>[   60.150282] [drm:drm_mode_addfb2] [FB:59]
>[   60.168668] [drm:drm_mode_addfb2] [FB:62]
>[   60.251271] [drm:drm_mode_addfb2] [FB:57]
>[   60.257428] wlp2s0: authenticate with f4:4e:05:81:40:af
>[   60.260658] wlp2s0: send auth to f4:4e:05:81:40:af (try 1/3)
>[   60.262180] wlp2s0: authenticated
>[   60.263632] wlp2s0: associate with f4:4e:05:81:40:af (try 1/3)
>[   60.267086] wlp2s0: RX AssocResp from f4:4e:05:81:40:af (capab=0x11 status=0 aid=11)
>[   60.268750] wlp2s0: associated
>[   60.268816] IPv6: ADDRCONF(NETDEV_CHANGE): wlp2s0: link becomes ready
>[   60.270383] [drm:drm_mode_addfb2] [FB:59]
>[   60.308419] wlp2s0: Limiting TX power to 23 dBm as advertised by f4:4e:05:81:40:af
>[   60.388544] [drm:drm_mode_addfb2] [FB:57]
>[   60.404060] [drm:drm_mode_addfb2] [FB:59]
>[   60.524854] [drm:drm_mode_addfb2] [FB:57]
>[   60.540183] [drm:drm_mode_addfb2] [FB:59]
>[   60.684444] [drm:drm_mode_addfb2] [FB:57]
>[   60.702112] [drm:drm_mode_addfb2] [FB:62]
>[   60.778007] [drm:drm_mode_addfb2] [FB:57]
>[   60.794354] [drm:drm_mode_addfb2] [FB:59]
>[   60.900325] [drm:drm_mode_addfb2] [FB:57]
>[   61.301608] [drm:drm_mode_addfb2] [FB:59]
>[   62.103227] [drm:drm_mode_addfb2] [FB:57]
>[   62.503835] [drm:drm_mode_addfb2] [FB:59]
>[   63.305023] [drm:drm_mode_addfb2] [FB:57]
>[   63.705587] [drm:drm_mode_addfb2] [FB:59]
>[   64.506605] [drm:drm_mode_addfb2] [FB:57]
>[   64.907766] [drm:drm_mode_addfb2] [FB:59]
>[   65.709435] [drm:drm_mode_addfb2] [FB:57]
>[   66.110505] [drm:drm_mode_addfb2] [FB:59]
>[   66.912336] [drm:drm_mode_addfb2] [FB:57]
>[   67.312738] [drm:drm_mode_addfb2] [FB:59]
>[   68.117350] [drm:drm_mode_addfb2] [FB:57]
>[   68.518386] [drm:drm_mode_addfb2] [FB:59]
>[   69.319831] [drm:drm_mode_addfb2] [FB:57]
>[   69.720434] [drm:drm_mode_addfb2] [FB:59]
>[   70.521247] [drm:drm_mode_addfb2] [FB:57]
>[   70.922619] [drm:drm_mode_addfb2] [FB:59]
>[   71.724452] [drm:drm_mode_addfb2] [FB:57]
>[   72.124476] [drm:drm_mode_addfb2] [FB:59]
>[   72.926126] [drm:drm_mode_addfb2] [FB:57]
>[   73.326594] [drm:drm_mode_addfb2] [FB:59]

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Attachments on bug 100924: 131192 | 131810

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