Attachment 132469 Details for Bug 101702 – dmesg

dmesg

dmesgKmsFlip (text/plain), 20.14 KB, created by Luis Botello on 2017-07-05 23:17:46 UTC

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Creator: Luis Botello

Created: 2017-07-05 23:17:46 UTC

Size: 20.14 KB

patch

obsolete

>[ 6323.219251] Console: switching to colour dummy device 80x25
>[ 6323.219304] [IGT] kms_flip: executing
>[ 6323.248575] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:71:DSI-1]
>[ 6323.248584] [drm:intel_dsi_get_modes]
>[ 6323.248593] [drm:intel_dsi_mode_valid]
>[ 6323.248600] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:71:DSI-1] probed modes :
>[ 6323.248608] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1200" 60 157100 1920 2000 2080 2160 1200 1204 1208 1212 0x8 0xa
>[ 6323.248622] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:DP-1]
>[ 6323.248626] [drm:intel_dp_detect] [CONNECTOR:60:DP-1]
>[ 6323.248635] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:DP-1] disconnected
>[ 6323.248649] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:66:HDMI-A-1]
>[ 6323.248653] [drm:intel_hdmi_detect] [CONNECTOR:66:HDMI-A-1]
>[ 6323.250226] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[ 6323.250233] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[ 6323.252309] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[ 6323.252324] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[ 6323.254307] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[ 6323.254314] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[ 6323.256306] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[ 6323.256321] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>[ 6323.256332] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:66:HDMI-A-1] disconnected
>[ 6323.256373] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:69:HDMI-A-2]
>[ 6323.256384] [drm:intel_hdmi_detect] [CONNECTOR:69:HDMI-A-2]
>[ 6323.335318] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[ 6323.335328] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[ 6323.337388] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[ 6323.337407] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>[ 6323.337418] [drm:drm_detect_monitor_audio] Monitor has basic audio support
>[ 6323.337752] [drm:drm_add_edid_modes.part.24] HDMI: DVI dual 0, max TMDS clock 0 kHz
>[ 6323.337759] [drm:drm_edid_to_eld] ELD monitor VX279
>[ 6323.337767] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[ 6323.337773] [drm:drm_edid_to_eld] ELD size 28, SAD count 1
>[ 6323.337870] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:69:HDMI-A-2] probed modes :
>[ 6323.337882] [drm:drm_mode_debug_printmodeline] Modeline 77:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[ 6323.337891] [drm:drm_mode_debug_printmodeline] Modeline 112:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[ 6323.337900] [drm:drm_mode_debug_printmodeline] Modeline 79:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[ 6323.337908] [drm:drm_mode_debug_printmodeline] Modeline 114:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[ 6323.337916] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[ 6323.337924] [drm:drm_mode_debug_printmodeline] Modeline 106:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[ 6323.337932] [drm:drm_mode_debug_printmodeline] Modeline 88:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[ 6323.337940] [drm:drm_mode_debug_printmodeline] Modeline 85:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[ 6323.337949] [drm:drm_mode_debug_printmodeline] Modeline 84:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 6323.337957] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[ 6323.337965] [drm:drm_mode_debug_printmodeline] Modeline 87:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[ 6323.337973] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[ 6323.337981] [drm:drm_mode_debug_printmodeline] Modeline 82:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[ 6323.337989] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[ 6323.337997] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[ 6323.338005] [drm:drm_mode_debug_printmodeline] Modeline 111:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[ 6323.338013] [drm:drm_mode_debug_printmodeline] Modeline 96:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[ 6323.338021] [drm:drm_mode_debug_printmodeline] Modeline 97:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[ 6323.338030] [drm:drm_mode_debug_printmodeline] Modeline 98:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[ 6323.338038] [drm:drm_mode_debug_printmodeline] Modeline 99:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[ 6323.338046] [drm:drm_mode_debug_printmodeline] Modeline 100:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[ 6323.338054] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[ 6323.338062] [drm:drm_mode_debug_printmodeline] Modeline 90:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[ 6323.338070] [drm:drm_mode_debug_printmodeline] Modeline 107:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[ 6323.338078] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[ 6323.338089] [drm:drm_mode_debug_printmodeline] Modeline 81:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[ 6323.338096] [drm:drm_mode_debug_printmodeline] Modeline 91:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 6323.338104] [drm:drm_mode_debug_printmodeline] Modeline 92:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[ 6323.338112] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 6323.338161] [drm:drm_mode_debug_printmodeline] Modeline 93:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 6323.338169] [drm:drm_mode_debug_printmodeline] Modeline 94:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 6323.338693] [IGT] kms_flip: starting subtest basic-flip-vs-wf_vblank
>[ 6323.339281] [drm:drm_mode_addfb2] [FB:76]
>[ 6323.339321] [drm:drm_mode_addfb2] [FB:108]
>[ 6323.405359] [drm:drm_mode_setcrtc] [CRTC:36:pipe A]
>[ 6323.405395] [drm:intel_atomic_check] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[ 6323.405444] [drm:intel_dsi_disable]
>[ 6323.405447] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 7 - MIPI_SEQ_BACKLIGHT_OFF
>[ 6323.405449] [drm:mipi_exec_gpio]
>[ 6323.405460] [drm:mipi_exec_delay]
>[ 6323.406491] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[ 6323.422932] [drm:intel_dsi_post_disable]
>[ 6323.428160] [drm:intel_disable_dsi_pll]
>[ 6323.428169] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 11 - MIPI_SEQ_POWER_OFF
>[ 6323.428171] [drm:mipi_exec_gpio]
>[ 6323.428188] [drm:__intel_fbc_disable] Disabling FBC on pipe A
>[ 6323.428216] [drm:intel_atomic_commit_tail] [ENCODER:59:DDI B]
>[ 6323.428220] [drm:intel_atomic_commit_tail] [ENCODER:61:DP-MST A]
>[ 6323.428224] [drm:intel_atomic_commit_tail] [ENCODER:62:DP-MST B]
>[ 6323.428227] [drm:intel_atomic_commit_tail] [ENCODER:63:DP-MST C]
>[ 6323.428230] [drm:intel_atomic_commit_tail] [ENCODER:68:DDI C]
>[ 6323.428233] [drm:intel_atomic_commit_tail] [ENCODER:70:DSI A]
>[ 6323.428236] [drm:intel_dsi_get_hw_state]
>[ 6323.428244] [drm:verify_connector_state.isra.84] [CONNECTOR:71:DSI-1]
>[ 6323.428246] [drm:intel_dsi_get_hw_state]
>[ 6323.428251] [drm:verify_single_dpll_state.isra.114] PORT PLL A
>[ 6323.428255] [drm:verify_single_dpll_state.isra.114] PORT PLL B
>[ 6323.428259] [drm:verify_single_dpll_state.isra.114] PORT PLL C
>[ 6323.435021] [drm:intel_atomic_commit_tail] [CRTC:36:pipe A]
>[ 6323.435074] [drm:drm_mode_setcrtc] [CRTC:47:pipe B]
>[ 6323.435107] [drm:intel_atomic_check] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[ 6323.435177] [drm:hsw_audio_codec_disable] Disable audio codec on pipe B
>[ 6323.435203] [drm:i915_audio_component_get_eld] Not valid for port C
>[ 6323.435246] [drm:intel_disable_pipe] disabling pipe B
>[ 6323.452309] [drm:intel_power_well_disable] disabling DDI C IO power well
>[ 6323.452320] [drm:skl_set_power_well] Disabling DDI C IO power well
>[ 6323.452338] [drm:intel_disable_shared_dpll] disable PORT PLL C (active 2, on? 1) for crtc 47
>[ 6323.452390] [drm:intel_disable_shared_dpll] disabling PORT PLL C
>[ 6323.452419] [drm:intel_set_cdclk] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz
>[ 6323.452456] [drm:intel_update_cdclk] Current CD clock rate: 79200 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[ 6323.452463] [drm:intel_atomic_commit_tail] [ENCODER:59:DDI B]
>[ 6323.452469] [drm:intel_atomic_commit_tail] [ENCODER:61:DP-MST A]
>[ 6323.452474] [drm:intel_atomic_commit_tail] [ENCODER:62:DP-MST B]
>[ 6323.452479] [drm:intel_atomic_commit_tail] [ENCODER:63:DP-MST C]
>[ 6323.452483] [drm:intel_atomic_commit_tail] [ENCODER:68:DDI C]
>[ 6323.452490] [drm:intel_atomic_commit_tail] [ENCODER:70:DSI A]
>[ 6323.452495] [drm:verify_connector_state.isra.84] [CONNECTOR:69:HDMI-A-2]
>[ 6323.452503] [drm:verify_single_dpll_state.isra.114] PORT PLL A
>[ 6323.452509] [drm:verify_single_dpll_state.isra.114] PORT PLL B
>[ 6323.452514] [drm:verify_single_dpll_state.isra.114] PORT PLL C
>[ 6323.452540] [drm:intel_atomic_commit_tail] [CRTC:47:pipe B]
>[ 6323.452594] [drm:drm_mode_setcrtc] [CRTC:58:pipe C]
>[ 6323.452669] [drm:drm_mode_setcrtc] [CRTC:36:pipe A]
>[ 6323.452686] [drm:drm_mode_setcrtc] [CONNECTOR:71:DSI-1]
>[ 6323.452720] [drm:intel_modeset_pipe_config] [CONNECTOR:71:DSI-1] checking for sink bpp constrains
>[ 6323.452725] [drm:intel_modeset_pipe_config] clamping display bpp (was 36) to default limit of 24
>[ 6323.452730] [drm:intel_dsi_compute_config]
>[ 6323.452735] [drm:intel_compute_dsi_pll] DSI PLL calculation is Done!!
>[ 6323.452741] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[ 6323.452748] [drm:intel_dump_pipe_config] [CRTC:36:pipe A][modeset]
>[ 6323.452753] [drm:intel_dump_pipe_config] cpu_transcoder: DSI A, pipe bpp: 24, dithering: 0
>[ 6323.452757] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[ 6323.452761] [drm:intel_dump_pipe_config] requested mode:
>[ 6323.452771] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 60 157100 1920 2000 2080 2160 1200 1204 1208 1212 0x8 0xa
>[ 6323.452774] [drm:intel_dump_pipe_config] adjusted mode:
>[ 6323.452781] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1200" 0 157100 1920 2000 2080 2160 1200 1204 1208 1212 0x8 0x0
>[ 6323.452788] [drm:intel_dump_pipe_config] crtc timings: 157100 1920 2000 2080 2160 1200 1204 1208 1212, type: 0x8 flags: 0x0
>[ 6323.452793] [drm:intel_dump_pipe_config] port clock: 157100, pipe src size: 1920x1200, pixel rate 157100
>[ 6323.452798] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[ 6323.452803] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 6323.452807] [drm:intel_dump_pipe_config] ips: 0, double wide: 0
>[ 6323.452816] [drm:bxt_dump_hw_state] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[ 6323.452820] [drm:intel_dump_pipe_config] planes on this crtc
>[ 6323.452825] [drm:intel_dump_pipe_config] [PLANE:26:plane 1A] disabled, scaler_id = -1
>[ 6323.452829] [drm:intel_dump_pipe_config] [PLANE:28:plane 2A] disabled, scaler_id = -1
>[ 6323.452834] [drm:intel_dump_pipe_config] [PLANE:30:plane 3A] disabled, scaler_id = -1
>[ 6323.452838] [drm:intel_dump_pipe_config] [PLANE:32:plane 4A] disabled, scaler_id = -1
>[ 6323.452843] [drm:intel_dump_pipe_config] [PLANE:34:cursor A] disabled, scaler_id = -1
>[ 6323.452855] [drm:intel_atomic_check] New cdclk calculated to be logical 158400 kHz, actual 158400 kHz
>[ 6323.453264] [drm:intel_set_cdclk] Changing CDCLK to 158400 kHz, VCO 633600 kHz, ref 19200 kHz
>[ 6323.453310] [drm:intel_update_cdclk] Current CD clock rate: 158400 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[ 6323.453316] [drm:intel_atomic_commit_tail] [ENCODER:59:DDI B]
>[ 6323.453321] [drm:intel_atomic_commit_tail] [ENCODER:61:DP-MST A]
>[ 6323.453325] [drm:intel_atomic_commit_tail] [ENCODER:62:DP-MST B]
>[ 6323.453330] [drm:intel_atomic_commit_tail] [ENCODER:63:DP-MST C]
>[ 6323.453334] [drm:intel_atomic_commit_tail] [ENCODER:68:DDI C]
>[ 6323.453339] [drm:intel_atomic_commit_tail] [ENCODER:70:DSI A]
>[ 6323.453343] [drm:verify_single_dpll_state.isra.114] PORT PLL A
>[ 6323.453349] [drm:verify_single_dpll_state.isra.114] PORT PLL B
>[ 6323.453354] [drm:verify_single_dpll_state.isra.114] PORT PLL C
>[ 6323.453367] [drm:intel_dsi_pre_enable]
>[ 6323.453370] [drm:intel_disable_dsi_pll]
>[ 6323.453377] [drm:intel_enable_dsi_pll]
>[ 6323.455450] [drm:intel_enable_dsi_pll] DSI PLL locked
>[ 6323.455459] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 10 - MIPI_SEQ_POWER_ON
>[ 6323.455463] [drm:mipi_exec_gpio]
>[ 6323.455477] [drm:mipi_exec_delay]
>[ 6323.460658] [drm:intel_dsi_prepare] pipe A
>[ 6323.482224] [drm:intel_panel_enable_backlight] pipe A
>[ 6323.482233] [drm:intel_panel_actually_set_backlight] set backlight PWM = 65472
>[ 6323.482239] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 6 - MIPI_SEQ_BACKLIGHT_ON
>[ 6323.482242] [drm:mipi_exec_gpio]
>[ 6323.482254] [drm:mipi_exec_delay]
>[ 6323.484880] [drm:intel_dsi_enable_nop]
>[ 6323.484892] [drm:intel_fbc_enable] reserved 18432000 bytes of contiguous stolen space for FBC, threshold: 1
>[ 6323.484895] [drm:intel_fbc_enable] Enabling FBC on pipe A
>[ 6323.499501] [drm:verify_connector_state.isra.84] [CONNECTOR:71:DSI-1]
>[ 6323.499511] [drm:intel_dsi_get_hw_state]
>[ 6323.499525] [drm:intel_atomic_commit_tail] [CRTC:36:pipe A]
>[ 6323.499539] [drm:intel_dsi_get_hw_state]
>[ 6323.499545] [drm:intel_dsi_get_config]
>[ 6323.499559] [drm:intel_dsi_get_pclk] Calculated pclk=158400
>[ 6323.786835] [IGT] kms_flip: exiting, ret=99
>[ 6323.807845] [drm:intel_modeset_pipe_config] [CONNECTOR:69:HDMI-A-2] checking for sink bpp constrains
>[ 6323.807851] [drm:intel_modeset_pipe_config] clamping display bpp (was 36) to EDID reported max of 24
>[ 6323.807862] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 6323.807866] [drm:intel_hdmi_compute_config] forcing pipe bpp to 24 for HDMI
>[ 6323.807873] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[ 6323.807879] [drm:intel_dump_pipe_config] [CRTC:47:pipe B][modeset]
>[ 6323.807884] [drm:intel_dump_pipe_config] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[ 6323.807888] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
>[ 6323.807891] [drm:intel_dump_pipe_config] requested mode:
>[ 6323.807901] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[ 6323.807904] [drm:intel_dump_pipe_config] adjusted mode:
>[ 6323.807911] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[ 6323.807916] [drm:intel_dump_pipe_config] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[ 6323.807921] [drm:intel_dump_pipe_config] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>[ 6323.807925] [drm:intel_dump_pipe_config] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[ 6323.807930] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 6323.807934] [drm:intel_dump_pipe_config] ips: 0, double wide: 0
>[ 6323.807943] [drm:bxt_dump_hw_state] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[ 6323.807946] [drm:intel_dump_pipe_config] planes on this crtc
>[ 6323.807951] [drm:intel_dump_pipe_config] [PLANE:37:plane 1B] disabled, scaler_id = -1
>[ 6323.807954] [drm:intel_dump_pipe_config] [PLANE:39:plane 2B] disabled, scaler_id = -1
>[ 6323.807958] [drm:intel_dump_pipe_config] [PLANE:41:plane 3B] disabled, scaler_id = -1
>[ 6323.807962] [drm:intel_dump_pipe_config] [PLANE:43:plane 4B] disabled, scaler_id = -1
>[ 6323.807966] [drm:intel_dump_pipe_config] [PLANE:45:cursor B] disabled, scaler_id = -1
>[ 6323.807978] [drm:intel_atomic_check] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[ 6323.808005] [drm:bxt_get_dpll] [CRTC:47:pipe B] using pre-allocated PORT PLL C
>[ 6323.808010] [drm:intel_reference_shared_dpll] using PORT PLL C for pipe B
>[ 6323.808082] [drm:intel_dsi_disable]
>[ 6323.808087] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 7 - MIPI_SEQ_BACKLIGHT_OFF
>[ 6323.808090] [drm:mipi_exec_gpio]
>[ 6323.808103] [drm:mipi_exec_delay]
>[ 6323.809302] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[ 6323.825922] [drm:intel_dsi_post_disable]
>[ 6323.831157] [drm:intel_disable_dsi_pll]
>[ 6323.831168] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 11 - MIPI_SEQ_POWER_OFF
>[ 6323.831171] [drm:mipi_exec_gpio]
>[ 6323.831192] [drm:__intel_fbc_disable] Disabling FBC on pipe A
>[ 6323.831224] [drm:intel_set_cdclk] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz
>[ 6323.831260] [drm:intel_update_cdclk] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>[ 6323.831268] [drm:intel_atomic_commit_tail] [ENCODER:59:DDI B]
>[ 6323.831274] [drm:intel_atomic_commit_tail] [ENCODER:61:DP-MST A]
>[ 6323.831279] [drm:intel_atomic_commit_tail] [ENCODER:62:DP-MST B]
>[ 6323.831284] [drm:intel_atomic_commit_tail] [ENCODER:63:DP-MST C]
>[ 6323.831288] [drm:intel_atomic_commit_tail] [ENCODER:68:DDI C]
>[ 6323.831292] [drm:intel_atomic_commit_tail] [ENCODER:70:DSI A]
>[ 6323.831298] [drm:verify_single_dpll_state.isra.114] PORT PLL A
>[ 6323.831306] [drm:verify_single_dpll_state.isra.114] PORT PLL B
>[ 6323.831311] [drm:verify_single_dpll_state.isra.114] PORT PLL C
>[ 6323.831325] [drm:intel_dsi_pre_enable]
>[ 6323.831328] [drm:intel_disable_dsi_pll]
>[ 6323.831333] [drm:intel_enable_dsi_pll]
>[ 6323.833538] [drm:intel_enable_dsi_pll] DSI PLL locked
>[ 6323.833547] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 10 - MIPI_SEQ_POWER_ON
>[ 6323.833551] [drm:mipi_exec_gpio]
>[ 6323.833566] [drm:mipi_exec_delay]
>[ 6323.838784] [drm:intel_dsi_prepare] pipe A
>[ 6323.860325] [drm:intel_panel_enable_backlight] pipe A
>[ 6323.860337] [drm:intel_panel_actually_set_backlight] set backlight PWM = 65472
>[ 6323.860346] [drm:intel_dsi_vbt_exec_sequence] Starting MIPI sequence 6 - MIPI_SEQ_BACKLIGHT_ON
>[ 6323.860350] [drm:mipi_exec_gpio]
>[ 6323.860363] [drm:mipi_exec_delay]
>[ 6323.863094] [drm:intel_dsi_enable_nop]
>[ 6323.863113] [drm:intel_fbc_enable] reserved 18432000 bytes of contiguous stolen space for FBC, threshold: 1
>[ 6323.863140] [drm:intel_fbc_enable] Enabling FBC on pipe A
>[ 6323.877638] [drm:intel_enable_shared_dpll] enable PORT PLL C (active 2, on? 0) for crtc 47
>[ 6323.877644] [drm:intel_enable_shared_dpll] enabling PORT PLL C
>[ 6323.877761] [drm:intel_power_well_enable] enabling DDI C IO power well
>[ 6323.877769] [drm:skl_set_power_well] Enabling DDI C IO power well
>[ 6323.877923] [drm:intel_enable_pipe] enabling pipe B
>[ 6323.877946] [drm:intel_audio_codec_enable] ELD on [CONNECTOR:69:HDMI-A-2], [ENCODER:68:DDI C]
>[ 6323.877953] [drm:hsw_audio_codec_enable] Enable audio codec on pipe B, 28 bytes ELD
>[ 6323.877966] [drm:audio_config_hdmi_pixel_clock.isra.5] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[ 6323.877972] [drm:hsw_audio_config_update] using automatic N
>[ 6323.894989] [drm:verify_connector_state.isra.84] [CONNECTOR:71:DSI-1]
>[ 6323.894998] [drm:intel_dsi_get_hw_state]
>[ 6323.895020] [drm:intel_atomic_commit_tail] [CRTC:36:pipe A]
>[ 6323.895038] [drm:intel_dsi_get_hw_state]
>[ 6323.895046] [drm:intel_dsi_get_config]
>[ 6323.895061] [drm:intel_dsi_get_pclk] Calculated pclk=158400
>[ 6323.895110] [drm:verify_connector_state.isra.84] [CONNECTOR:69:HDMI-A-2]
>[ 6323.895222] [drm:intel_atomic_commit_tail] [CRTC:47:pipe B]
>[ 6323.895286] [drm:verify_single_dpll_state.isra.114] PORT PLL C
>[ 6323.911063] Console: switching to colour frame buffer device 240x67
>

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Attachments on bug 101702: 132469 | 132470

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