Attachment 13443 Details for Bug 13865 – Xorg.0.log

Xorg.0.log

Xorg.0.log (text/plain), 105.37 KB, created by Pierre Ossman on 2008-01-01 08:25:27 UTC

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Creator: Pierre Ossman

Created: 2008-01-01 08:25:27 UTC

Size: 105.37 KB

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obsolete

>
>X Window System Version 1.3.0
>Release Date: 19 April 2007
>X Protocol Version 11, Revision 0, Release 1.3
>Build Operating System: Fedora 8 Red Hat, Inc.
>Current Operating System: Linux chronos.drzeus.cx 2.6.23.9-85.fc8 #1 SMP Fri Dec 7 15:49:59 EST 2007 i686
>Build Date: 13 December 2007
>Build ID: xorg-x11-server 1.3.0.0-37.fc8 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Tue Jan  1 17:19:10 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "<default monitor>"
>(**) |   |-->Device "Videocard0"
>(WW) No monitor specified for screen "Screen0".
>	Using a default monitor configuration.
>(==) |-->Input Device "<default pointer>"
>(==) |-->Input Device "<default keyboard>"
>(WW) The core pointer device wasn't specified explicitly in the layout.
>	Using the default mouse configuration.
>(WW) The core keyboard device wasn't specified explicitly in the layout.
>	Using the default keyboard configuration.
>(WW) No FontPath specified.  Using compiled-in default.
>(==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>(==) RgbPath set to "/usr/share/X11/rgb"
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x820bd60
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 1.2
>	X.Org XInput driver : 0.7
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(--) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 1002,7910 card 1002,7910 rev 00 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 1002,7913 card 0000,0000 rev 00 class 06,04,00 hdr 01
>(II) PCI: 00:07:0: chip 1002,7917 card 0000,0000 rev 00 class 06,04,00 hdr 01
>(II) PCI: 00:12:0: chip 1002,4380 card 1462,7329 rev 00 class 01,06,01 hdr 00
>(II) PCI: 00:13:0: chip 1002,4387 card 1462,7368 rev 00 class 0c,03,10 hdr 80
>(II) PCI: 00:13:1: chip 1002,4388 card 1462,7368 rev 00 class 0c,03,10 hdr 00
>(II) PCI: 00:13:2: chip 1002,4389 card 1462,7368 rev 00 class 0c,03,10 hdr 00
>(II) PCI: 00:13:3: chip 1002,438a card 1462,7368 rev 00 class 0c,03,10 hdr 00
>(II) PCI: 00:13:4: chip 1002,438b card 1462,7368 rev 00 class 0c,03,10 hdr 00
>(II) PCI: 00:13:5: chip 1002,4386 card 1462,7368 rev 00 class 0c,03,20 hdr 00
>(II) PCI: 00:14:0: chip 1002,4385 card 1462,7368 rev 14 class 0c,05,00 hdr 80
>(II) PCI: 00:14:1: chip 1002,438c card 1462,7368 rev 00 class 01,01,8a hdr 00
>(II) PCI: 00:14:2: chip 1002,4383 card 1462,7368 rev 00 class 04,03,00 hdr 00
>(II) PCI: 00:14:3: chip 1002,438d card 1462,7368 rev 00 class 06,01,00 hdr 80
>(II) PCI: 00:14:4: chip 1002,4384 card 0000,0000 rev 00 class 06,04,01 hdr 81
>(II) PCI: 00:18:0: chip 1022,1100 card 0000,0000 rev 00 class 06,00,00 hdr 80
>(II) PCI: 00:18:1: chip 1022,1101 card 0000,0000 rev 00 class 06,00,00 hdr 80
>(II) PCI: 00:18:2: chip 1022,1102 card 0000,0000 rev 00 class 06,00,00 hdr 80
>(II) PCI: 00:18:3: chip 1022,1103 card 0000,0000 rev 00 class 06,00,00 hdr 80
>(II) PCI: 01:00:0: chip 10de,0393 card 1043,820e rev a1 class 03,00,00 hdr 00
>(II) PCI: 02:00:0: chip 10ec,8168 card 1462,368c rev 01 class 02,00,00 hdr 00
>(II) PCI: 03:02:0: chip 1415,8403 card 1415,0000 rev 00 class 07,01,03 hdr 00
>(II) PCI: 03:05:0: chip 1102,0002 card 1102,8026 rev 07 class 04,01,00 hdr 80
>(II) PCI: 03:05:1: chip 1102,7002 card 1102,0020 rev 07 class 09,80,00 hdr 80
>(II) PCI: 03:06:0: chip 1106,3044 card 1462,368d rev c0 class 0c,00,10 hdr 00
>(II) PCI: End of PCI scan
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,3), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:2:0), (0,1,1), BCTRL: 0x001b (VGA_EN is set)
>(II) Bus 1 I/O range:
>	[0] -1	0	0x0000b000 - 0x0000bfff (0x1000) IX[B]
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0xfc000000 - 0xfe9fffff (0x2a00000) MX[B]
>(II) Bus 1 prefetchable memory range:
>	[0] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:7:0), (0,2,2), BCTRL: 0x0003 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x0000c000 - 0x0000cfff (0x1000) IX[B]
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xfea00000 - 0xfeafffff (0x100000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:20:3), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:20:4), (0,3,3), BCTRL: 0x0003 (VGA_EN is cleared)
>(II) Bus 3 I/O range:
>	[0] -1	0	0x0000d000 - 0x0000efff (0x2000) IX[B]
>(II) Bus 3 non-prefetchable memory range:
>	[0] -1	0	0xfeb00000 - 0xfebfffff (0x100000) MX[B]
>(--) PCI:*(1:0:0) nVidia Corporation G70 [GeForce 7300 GT] rev 161, Mem @ 0xfd000000/24, 0xd0000000/28, 0xfc000000/24, I/O @ 0xb800/7, BIOS @ 0xfe9e0000/17
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xfebfe800 - 0xfebfefff (0x800) MX[B]
>	[1] -1	0	0xfebff000 - 0xfebfffff (0x1000) MX[B]
>	[2] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[3] -1	0	0xfbff4000 - 0xfbff7fff (0x4000) MX[B]
>	[4] -1	0	0xfbfff000 - 0xfbfff0ff (0x100) MX[B]
>	[5] -1	0	0xfbffa000 - 0xfbffafff (0x1000) MX[B]
>	[6] -1	0	0xfbffb000 - 0xfbffbfff (0x1000) MX[B]
>	[7] -1	0	0xfbffc000 - 0xfbffcfff (0x1000) MX[B]
>	[8] -1	0	0xfbffd000 - 0xfbffdfff (0x1000) MX[B]
>	[9] -1	0	0xfbffe000 - 0xfbffefff (0x1000) MX[B]
>	[10] -1	0	0xfbfff800 - 0xfbfffbff (0x400) MX[B]
>	[11] -1	0	0xfe9e0000 - 0xfe9fffff (0x20000) MX[B](B)
>	[12] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B](B)
>	[13] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[14] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B](B)
>	[15] -1	0	0x0000d000 - 0x0000d07f (0x80) IX[B]
>	[16] -1	0	0x0000d400 - 0x0000d407 (0x8) IX[B]
>	[17] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[18] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[19] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[20] -1	0	0x0000e800 - 0x0000e807 (0x8) IX[B]
>	[21] -1	0	0x0000c800 - 0x0000c8ff (0x100) IX[B]
>	[22] -1	0	0x0000ff00 - 0x0000ff0f (0x10) IX[B]
>	[23] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[27] -1	0	0x00000b00 - 0x00000b0f (0x10) IX[B]
>	[28] -1	0	0x00006000 - 0x0000600f (0x10) IX[B]
>	[29] -1	0	0x00007000 - 0x00007003 (0x4) IX[B]
>	[30] -1	0	0x00008000 - 0x00008007 (0x8) IX[B]
>	[31] -1	0	0x00009000 - 0x00009003 (0x4) IX[B]
>	[32] -1	0	0x0000a000 - 0x0000a007 (0x8) IX[B]
>	[33] -1	0	0x0000b800 - 0x0000b87f (0x80) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xfebfe800 - 0xfebfefff (0x800) MX[B]
>	[1] -1	0	0xfebff000 - 0xfebfffff (0x1000) MX[B]
>	[2] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[3] -1	0	0xfbff4000 - 0xfbff7fff (0x4000) MX[B]
>	[4] -1	0	0xfbfff000 - 0xfbfff0ff (0x100) MX[B]
>	[5] -1	0	0xfbffa000 - 0xfbffafff (0x1000) MX[B]
>	[6] -1	0	0xfbffb000 - 0xfbffbfff (0x1000) MX[B]
>	[7] -1	0	0xfbffc000 - 0xfbffcfff (0x1000) MX[B]
>	[8] -1	0	0xfbffd000 - 0xfbffdfff (0x1000) MX[B]
>	[9] -1	0	0xfbffe000 - 0xfbffefff (0x1000) MX[B]
>	[10] -1	0	0xfbfff800 - 0xfbfffbff (0x400) MX[B]
>	[11] -1	0	0xfe9e0000 - 0xfe9fffff (0x20000) MX[B](B)
>	[12] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B](B)
>	[13] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[14] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B](B)
>	[15] -1	0	0x0000d000 - 0x0000d07f (0x80) IX[B]
>	[16] -1	0	0x0000d400 - 0x0000d407 (0x8) IX[B]
>	[17] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[18] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[19] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[20] -1	0	0x0000e800 - 0x0000e807 (0x8) IX[B]
>	[21] -1	0	0x0000c800 - 0x0000c8ff (0x100) IX[B]
>	[22] -1	0	0x0000ff00 - 0x0000ff0f (0x10) IX[B]
>	[23] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[24] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[25] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[27] -1	0	0x00000b00 - 0x00000b0f (0x10) IX[B]
>	[28] -1	0	0x00006000 - 0x0000600f (0x10) IX[B]
>	[29] -1	0	0x00007000 - 0x00007003 (0x4) IX[B]
>	[30] -1	0	0x00008000 - 0x00008007 (0x8) IX[B]
>	[31] -1	0	0x00009000 - 0x00009003 (0x4) IX[B]
>	[32] -1	0	0x0000a000 - 0x0000a007 (0x8) IX[B]
>	[33] -1	0	0x0000b800 - 0x0000b87f (0x80) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebfe800 - 0xfebfefff (0x800) MX[B]
>	[5] -1	0	0xfebff000 - 0xfebfffff (0x1000) MX[B]
>	[6] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[7] -1	0	0xfbff4000 - 0xfbff7fff (0x4000) MX[B]
>	[8] -1	0	0xfbfff000 - 0xfbfff0ff (0x100) MX[B]
>	[9] -1	0	0xfbffa000 - 0xfbffafff (0x1000) MX[B]
>	[10] -1	0	0xfbffb000 - 0xfbffbfff (0x1000) MX[B]
>	[11] -1	0	0xfbffc000 - 0xfbffcfff (0x1000) MX[B]
>	[12] -1	0	0xfbffd000 - 0xfbffdfff (0x1000) MX[B]
>	[13] -1	0	0xfbffe000 - 0xfbffefff (0x1000) MX[B]
>	[14] -1	0	0xfbfff800 - 0xfbfffbff (0x400) MX[B]
>	[15] -1	0	0xfe9e0000 - 0xfe9fffff (0x20000) MX[B](B)
>	[16] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B](B)
>	[17] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[18] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B](B)
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x0000d000 - 0x0000d07f (0x80) IX[B]
>	[22] -1	0	0x0000d400 - 0x0000d407 (0x8) IX[B]
>	[23] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[24] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[25] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[26] -1	0	0x0000e800 - 0x0000e807 (0x8) IX[B]
>	[27] -1	0	0x0000c800 - 0x0000c8ff (0x100) IX[B]
>	[28] -1	0	0x0000ff00 - 0x0000ff0f (0x10) IX[B]
>	[29] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[30] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[31] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[32] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[33] -1	0	0x00000b00 - 0x00000b0f (0x10) IX[B]
>	[34] -1	0	0x00006000 - 0x0000600f (0x10) IX[B]
>	[35] -1	0	0x00007000 - 0x00007003 (0x4) IX[B]
>	[36] -1	0	0x00008000 - 0x00008007 (0x8) IX[B]
>	[37] -1	0	0x00009000 - 0x00009003 (0x4) IX[B]
>	[38] -1	0	0x0000a000 - 0x0000a007 (0x8) IX[B]
>	[39] -1	0	0x0000b800 - 0x0000b87f (0x80) IX[B](B)
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules//extensions/libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules//extensions/libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules//extensions/libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.3.0, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "type1"
>(II) Loading /usr/lib/xorg/modules//fonts/libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules//extensions/librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules//extensions/libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "nouveau"
>(II) Loading /usr/lib/xorg/modules//drivers/nouveau_drv.so
>(II) Module nouveau: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules//input/mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules//input/kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) NOUVEAU driver Date:   Tue Jan 1 14:25:54 2008 +0100
>(II) NOUVEAU driver for NVIDIA chipset families :
>	RIVA TNT    (NV04)
>	RIVA TNT2   (NV05)
>	GeForce 256 (NV10)
>	GeForce 2   (NV11, NV15)
>	GeForce 4MX (NV17, NV18)
>	GeForce 3   (NV20)
>	GeForce 4Ti (NV25, NV28)
>	GeForce FX  (NV3x)
>	GeForce 6   (NV4x)
>	GeForce 7   (G7x)
>	GeForce 8   (G8x)
>(II) Primary Device is: PCI 01:00:0
>(--) Assigning device section with no busID to primary device
>(--) Chipset NVIDIA NV4B found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebfe800 - 0xfebfefff (0x800) MX[B]
>	[5] -1	0	0xfebff000 - 0xfebfffff (0x1000) MX[B]
>	[6] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[7] -1	0	0xfbff4000 - 0xfbff7fff (0x4000) MX[B]
>	[8] -1	0	0xfbfff000 - 0xfbfff0ff (0x100) MX[B]
>	[9] -1	0	0xfbffa000 - 0xfbffafff (0x1000) MX[B]
>	[10] -1	0	0xfbffb000 - 0xfbffbfff (0x1000) MX[B]
>	[11] -1	0	0xfbffc000 - 0xfbffcfff (0x1000) MX[B]
>	[12] -1	0	0xfbffd000 - 0xfbffdfff (0x1000) MX[B]
>	[13] -1	0	0xfbffe000 - 0xfbffefff (0x1000) MX[B]
>	[14] -1	0	0xfbfff800 - 0xfbfffbff (0x400) MX[B]
>	[15] -1	0	0xfe9e0000 - 0xfe9fffff (0x20000) MX[B](B)
>	[16] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B](B)
>	[17] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[18] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B](B)
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x0000d000 - 0x0000d07f (0x80) IX[B]
>	[22] -1	0	0x0000d400 - 0x0000d407 (0x8) IX[B]
>	[23] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[24] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[25] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[26] -1	0	0x0000e800 - 0x0000e807 (0x8) IX[B]
>	[27] -1	0	0x0000c800 - 0x0000c8ff (0x100) IX[B]
>	[28] -1	0	0x0000ff00 - 0x0000ff0f (0x10) IX[B]
>	[29] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[30] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[31] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[32] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[33] -1	0	0x00000b00 - 0x00000b0f (0x10) IX[B]
>	[34] -1	0	0x00006000 - 0x0000600f (0x10) IX[B]
>	[35] -1	0	0x00007000 - 0x00007003 (0x4) IX[B]
>	[36] -1	0	0x00008000 - 0x00008007 (0x8) IX[B]
>	[37] -1	0	0x00009000 - 0x00009003 (0x4) IX[B]
>	[38] -1	0	0x0000a000 - 0x0000a007 (0x8) IX[B]
>	[39] -1	0	0x0000b800 - 0x0000b87f (0x80) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebfe800 - 0xfebfefff (0x800) MX[B]
>	[5] -1	0	0xfebff000 - 0xfebfffff (0x1000) MX[B]
>	[6] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[7] -1	0	0xfbff4000 - 0xfbff7fff (0x4000) MX[B]
>	[8] -1	0	0xfbfff000 - 0xfbfff0ff (0x100) MX[B]
>	[9] -1	0	0xfbffa000 - 0xfbffafff (0x1000) MX[B]
>	[10] -1	0	0xfbffb000 - 0xfbffbfff (0x1000) MX[B]
>	[11] -1	0	0xfbffc000 - 0xfbffcfff (0x1000) MX[B]
>	[12] -1	0	0xfbffd000 - 0xfbffdfff (0x1000) MX[B]
>	[13] -1	0	0xfbffe000 - 0xfbffefff (0x1000) MX[B]
>	[14] -1	0	0xfbfff800 - 0xfbfffbff (0x400) MX[B]
>	[15] -1	0	0xfe9e0000 - 0xfe9fffff (0x20000) MX[B](B)
>	[16] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B](B)
>	[17] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[18] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B](B)
>	[19] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[20] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[21] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[22] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[23] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[24] -1	0	0x0000d000 - 0x0000d07f (0x80) IX[B]
>	[25] -1	0	0x0000d400 - 0x0000d407 (0x8) IX[B]
>	[26] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[27] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[28] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[29] -1	0	0x0000e800 - 0x0000e807 (0x8) IX[B]
>	[30] -1	0	0x0000c800 - 0x0000c8ff (0x100) IX[B]
>	[31] -1	0	0x0000ff00 - 0x0000ff0f (0x10) IX[B]
>	[32] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[33] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[34] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[35] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[36] -1	0	0x00000b00 - 0x00000b0f (0x10) IX[B]
>	[37] -1	0	0x00006000 - 0x0000600f (0x10) IX[B]
>	[38] -1	0	0x00007000 - 0x00007003 (0x4) IX[B]
>	[39] -1	0	0x00008000 - 0x00008007 (0x8) IX[B]
>	[40] -1	0	0x00009000 - 0x00009003 (0x4) IX[B]
>	[41] -1	0	0x0000a000 - 0x0000a007 (0x8) IX[B]
>	[42] -1	0	0x0000b800 - 0x0000b87f (0x80) IX[B](B)
>	[43] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[44] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Enabling PCI device
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) NOUVEAU(0): Initializing int10
>(II) NOUVEAU(0): Primary V_BIOS segment is: 0xc000
>(--) NOUVEAU(0): Chipset: "NVIDIA NV4B"
>(==) NOUVEAU(0): Depth 24, (==) framebuffer bpp 32
>(==) NOUVEAU(0): RGB weight 888
>(==) NOUVEAU(0): Default visual is TrueColor
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(**) NOUVEAU(0): Option "Randr12" "true"
>(==) NOUVEAU(0): Randr1.2 support enabled
>(==) NOUVEAU(0): Using HW cursor
>(--) NOUVEAU(0): Linear framebuffer at 0xD0000000
>(--) NOUVEAU(0): MMIO registers at 0xFD000000
>(II) Loading sub module "dri"
>(II) LoadModule: "dri"
>(II) Reloading /usr/lib/xorg/modules//extensions/libdri.so
>(II) NOUVEAU(0): Loaded DRI module
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: Open failed
>drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 10, (OK)
>drmOpenByBusid: drmOpenMinor returns 10
>drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>(II) NOUVEAU(0): [dri] Found DRI library version 1.3.0 and kernel module version 0.0.10
>(II) NOUVEAU(0): Attempting to locate BIOS image in PROM
>(II) NOUVEAU(0): ... appears to be valid
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x1F, Head: 0x00, Data: 0x57
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x11, Head: 0x00, Data: 0x8E
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x11, Head: 0x00, Data: 0x0E
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x03
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x1F, Head: 0x01, Data: 0x57
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x11, Head: 0x01, Data: 0x8E
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x11, Head: 0x01, Data: 0x0E
>(II) NOUVEAU(0): BIT signature found
>(II) NOUVEAU(0): 0x01D4: Found BIT command with id 0x00 ((II) NOUVEAU(0): 0x01DA: Found BIT command with id 0x32 (2)
>(II) NOUVEAU(0): 0x01E0: Found BIT command with id 0x42 (B)
>(II) NOUVEAU(0): Bios version 05.73.22.54
>(II) NOUVEAU(0): 0x01E6: Found BIT command with id 0x43 (C)
>(II) NOUVEAU(0): 0x01EC: Found BIT command with id 0x44 (D)
>(II) NOUVEAU(0): 0x01EC: Found flat panel display table entry in BIT structure
>(II) NOUVEAU(0): 0x01F2: Found BIT command with id 0x49 (I)
>(II) NOUVEAU(0): 0x01F2: Found init table entry in BIT structure
>(II) NOUVEAU(0): 0x01F8: Found BIT command with id 0x4C (L)
>(II) NOUVEAU(0): Pointer to LVDS manufacturer table invalid
>(II) NOUVEAU(0): 0x01FE: Found BIT command with id 0x74 (t)
>(II) NOUVEAU(0): 0x0204: Found BIT command with id 0x4D (M)
>(II) NOUVEAU(0): 0x0204: Found M table entry in BIT structure
>(II) NOUVEAU(0): 0x020A: Found BIT command with id 0x4E (N)
>(II) NOUVEAU(0): 0x0210: Found BIT command with id 0x50 (P)
>(II) NOUVEAU(0): 0x0216: Found BIT command with id 0x53 (S)
>(II) NOUVEAU(0): 0x021C: Found BIT command with id 0x54 (T)
>(II) NOUVEAU(0): Found TMDS table revision 1.1
>(II) NOUVEAU(0): TMDS table script pointers not stubbed
>(II) NOUVEAU(0): 0x0222: Found BIT command with id 0x55 (U)
>(II) NOUVEAU(0): 0x0228: Found BIT command with id 0x56 (V)
>(II) NOUVEAU(0): 0x022E: Found BIT command with id 0x63 (c)
>(II) NOUVEAU(0): 0x0234: Found BIT command with id 0x69 (i)
>(II) NOUVEAU(0): 0x023A: Found BIT command with id 0x73 (s)
>(II) NOUVEAU(0): 0x0240: Found BIT command with id 0x00 ((II) NOUVEAU(0): Parsing previously deferred init table entry
>(II) NOUVEAU(0): 0xCE0D: Parsing init table 0
>(II) NOUVEAU(0): 0xCE0D: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xCE0D: [ (0x53) - INIT_ZM_CR ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x03
>(II) NOUVEAU(0): 0xCE10: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xCE10: Port: 0x03C4, Index: 0x01, Mask: 0xFF, Data: 0x20
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03C4, Index: 0x01, Head: 0x01, Data: 0xFF
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03C4, Index: 0x01, Head: 0x01, Data: 0xFF
>(II) NOUVEAU(0): 0xCE16: [ (0x53) - INIT_ZM_CR ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xCE19: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xCE19: Port: 0x03C4, Index: 0x01, Mask: 0xFF, Data: 0x20
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0xFF
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0xFF
>(II) NOUVEAU(0): 0xCE1F: [ (0x65) - INIT_RESET ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x0000184C, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x0000184C, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00000200, Data: 0x01100000
>(II) NOUVEAU(0): 	Write: Reg: 0x00000200, Data: 0x05110111
>(II) NOUVEAU(0): 	Write: Reg: 0x0000184C, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001850, Data: 0x00000001
>(II) NOUVEAU(0): 	Write: Reg: 0x00001850, Data: 0x00000000
>(II) NOUVEAU(0): 0xCE2C: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0000C040, Data: 0x3C000400
>(II) NOUVEAU(0): 0xCE35: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCE35: Reg: 0x00101000, Mask: 0xFFFFFFFF, Data: 0x80000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00101000, Data: 0xA344FE8B
>(II) NOUVEAU(0): 	Write: Reg: 0x00101000, Data: 0xA344FE8B
>(II) NOUVEAU(0): 0xCE42: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCE42: Reg: 0x0010100C, Mask: 0xFFFFFFFF, Data: 0x80000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x0010100C, Data: 0x80010490
>(II) NOUVEAU(0): 	Write: Reg: 0x0010100C, Data: 0x80010490
>(II) NOUVEAU(0): 0xCE4F: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCE4F: Reg: 0x00600818, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00600818, Data: 0x01100010
>(II) NOUVEAU(0): 	Write: Reg: 0x00600818, Data: 0x01100010
>(II) NOUVEAU(0): 0xCE5C: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCE5C: Reg: 0x0060081C, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x0060081C, Data: 0x22222622
>(II) NOUVEAU(0): 	Write: Reg: 0x0060081C, Data: 0x22222622
>(II) NOUVEAU(0): 0xCE69: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCE69: Reg: 0x00600850, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00600850, Data: 0x00002222
>(II) NOUVEAU(0): 	Write: Reg: 0x00600850, Data: 0x00002222
>(II) NOUVEAU(0): 0xCE76: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00600854, Data: 0x00000000
>(II) NOUVEAU(0): 0xCE7F: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00600858, Data: 0x00001FFF
>(II) NOUVEAU(0): 0xCE88: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00602858, Data: 0x00001FFF
>(II) NOUVEAU(0): 0xCE91: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCE91: Reg: 0x00600818, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00600818, Data: 0x01100010
>(II) NOUVEAU(0): 	Write: Reg: 0x00600818, Data: 0x01100010
>(II) NOUVEAU(0): 0xCE9E: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCE9E: Reg: 0x0060081C, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x0060081C, Data: 0x22222622
>(II) NOUVEAU(0): 	Write: Reg: 0x0060081C, Data: 0x22222622
>(II) NOUVEAU(0): 0xCEAB: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCEAB: Reg: 0x00600850, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00600850, Data: 0x00002222
>(II) NOUVEAU(0): 	Write: Reg: 0x00600850, Data: 0x00002222
>(II) NOUVEAU(0): 0xCEB8: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xCEB8: BaseReg: 0x00001540, Count: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00001540, Data: 0x73F31F0B
>(II) NOUVEAU(0): 	Write: Reg: 0x00001544, Data: 0x00000FFF
>(II) NOUVEAU(0): 0xCEC6: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x00000000
>(II) NOUVEAU(0): 0xCECF: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004000, Data: 0x00010000
>(II) NOUVEAU(0): 0xCED8: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004008, Data: 0x03310000
>(II) NOUVEAU(0): 0xCEE1: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680580, Data: 0x03D0003D
>(II) NOUVEAU(0): 0xCEEA: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004600, Data: 0x80000001
>(II) NOUVEAU(0): 0xCEF3: [ (0x91) - INIT_ZM_REG_GROUP_ADDRESS_LATCHED ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004020, Data: 0x34880000
>(II) NOUVEAU(0): 	Write: Reg: 0x00004020, Data: 0x34800000
>(II) NOUVEAU(0): 	Write: Reg: 0x00004020, Data: 0x24800000
>(II) NOUVEAU(0): 0xCF05: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xCF05: Reg: 0x00100A40, RegIncrement: 0x04, Count: 0x02, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A40, Data: 0x8703405B
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A44, Data: 0x8703405B
>(II) NOUVEAU(0): 0xCF4C: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xCF4C: BaseReg: 0x000015B4, Count: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x000015B4, Data: 0x08000000
>(II) NOUVEAU(0): 	Write: Reg: 0x000015B8, Data: 0x98800F08
>(II) NOUVEAU(0): 0xCF5A: [ (0x75) - INIT_CONDITION ]
>(II) NOUVEAU(0): 0xCF5A: Cond: 0x03, Reg: 0x00000000, Mask: 0x000000FF, Cmpval: 0x000000A1
>(II) NOUVEAU(0): 	Read:  Reg: 0x00000000, Data: 0x04B300B1
>(II) NOUVEAU(0): 0xCF5A: Checking if 0x000000B1 equals 0x000000A1
>(II) NOUVEAU(0): 0xCF5A: CONDITION IS NOT FULFILLED
>(II) NOUVEAU(0): 0xCF5A: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0xCF5C: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 0xCF65: [ (0x38) - INIT_NOT ]
>(II) NOUVEAU(0): 0xCF65: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xCF66: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100360, Data: 0x8B183A98
>(II) NOUVEAU(0): 0xCF6F: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xCF70: [ (0x75) - INIT_CONDITION ]
>(II) NOUVEAU(0): 0xCF70: Cond: 0x00, Reg: 0x00101000, Mask: 0x00000040, Cmpval: 0x00000040
>(II) NOUVEAU(0): 	Read:  Reg: 0x00101000, Data: 0xA344FE8B
>(II) NOUVEAU(0): 0xCF70: Checking if 0x00000000 equals 0x00000040
>(II) NOUVEAU(0): 0xCF70: CONDITION IS NOT FULFILLED
>(II) NOUVEAU(0): 0xCF70: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0xCF72: [ (0x62) - INIT_ZM_INDEX_IO ]
>(II) NOUVEAU(0): 0xCF77: [ (0x38) - INIT_NOT ]
>(II) NOUVEAU(0): 0xCF77: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xCF78: [ (0x62) - INIT_ZM_INDEX_IO ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xCF7D: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xCF7E: [ (0x37) - INIT_COPY ]
>(II) NOUVEAU(0): 0xCF7E: Reg: 0x00101000, Shift: 0xFE, SrcMask: 0xF0, Port: 0x03D4, Index: 0x3C, Mask: 0x0F
>(II) NOUVEAU(0): 	Read:  Reg: 0x00101000, Data: 0xA344FE8B
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xCF89: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680510, Data: 0x00000000
>(II) NOUVEAU(0): 0xCF92: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xCF92: Reg: 0x00001580, Mask: 0xCFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001580, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00001580, Data: 0x00000000
>(II) NOUVEAU(0): 0xCF9F: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00000140, Data: 0x00000000
>(II) NOUVEAU(0): 0xCFA8: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00000200, Data: 0x07110111
>(II) NOUVEAU(0): 0xCFB1: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680608, Data: 0x00100000
>(II) NOUVEAU(0): 0xCFBA: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00682608, Data: 0x00100000
>(II) NOUVEAU(0): 0xCFC3: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680670, Data: 0x00100000
>(II) NOUVEAU(0): 0xCFCC: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001084, Data: 0x00205649
>(II) NOUVEAU(0): 0xCFD5: [ (0x6B) - INIT_SUB ]
>(II) NOUVEAU(0): 0xCFD5: EXECUTING SUB-SCRIPT 6
>(II) NOUVEAU(0): 0xDD17: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ]
>(II) NOUVEAU(0): 0xDD17: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00004004
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xDD17: Reg: 0x00004004, Config: 0x02, Freq: 400000kHz
>(II) NOUVEAU(0): 0xDD17: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xDD42: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xCFD5: END OF SUB-SCRIPT 6
>(II) NOUVEAU(0): 0xCFD7: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xCFD7: EXECUTING SUB-ROUTINE AT 0xDEE2
>(II) NOUVEAU(0): 0xDEE2: [ (0x92) - INIT_RESERVED ]
>(II) NOUVEAU(0): 0xDEE3: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xCFD7: END OF SUB-ROUTINE AT 0xDEE2
>(II) NOUVEAU(0): 0xCFDA: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004024, Data: 0x00005904
>(II) NOUVEAU(0): 0xCFE3: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004020, Data: 0xACB12000
>(II) NOUVEAU(0): 0xCFEC: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xCFEC: Sleeping for 0x00C8 microseconds
>(II) NOUVEAU(0): 0xCFEF: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004020, Data: 0xACB13000
>(II) NOUVEAU(0): 0xCFF8: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00004020, Data: 0xAC313000
>(II) NOUVEAU(0): 0xD001: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x00004024, Data: 0x00000F01
>(II) NOUVEAU(0): 	Write: Reg: 0x0000403C, Data: 0x00000F01
>(II) NOUVEAU(0): 0xD00A: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x00004020, Data: 0xAC301000
>(II) NOUVEAU(0): 	Write: Reg: 0x00004038, Data: 0xAC301000
>(II) NOUVEAU(0): 0xD013: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD013: Reg: 0x00100440, RegIncrement: 0x10, Count: 0x06, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100440, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100450, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100460, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100470, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100480, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100490, Data: 0x00000000
>(II) NOUVEAU(0): 0xD0DA: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD0DA: Reg: 0x00100444, RegIncrement: 0x10, Count: 0x06, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100444, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100454, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100464, Data: 0x00000010
>(II) NOUVEAU(0): 	Write: Reg: 0x00100474, Data: 0x00000010
>(II) NOUVEAU(0): 	Write: Reg: 0x00100484, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100494, Data: 0x00000000
>(II) NOUVEAU(0): 0xD1A1: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD1A1: Reg: 0x001003E4, RegIncrement: 0x04, Count: 0x0E, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001003E4, Data: 0x04040004
>(II) NOUVEAU(0): 	Write: Reg: 0x001003E8, Data: 0x00000404
>(II) NOUVEAU(0): 	Write: Reg: 0x001003EC, Data: 0x04040004
>(II) NOUVEAU(0): 	Write: Reg: 0x001003F0, Data: 0x00000404
>(II) NOUVEAU(0): 	Write: Reg: 0x001003F4, Data: 0x00000404
>(II) NOUVEAU(0): 	Write: Reg: 0x001003F8, Data: 0x04000004
>(II) NOUVEAU(0): 	Write: Reg: 0x001003FC, Data: 0x04000004
>(II) NOUVEAU(0): 	Write: Reg: 0x00100400, Data: 0x0B00000B
>(II) NOUVEAU(0): 	Write: Reg: 0x00100404, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100408, Data: 0x0B00000B
>(II) NOUVEAU(0): 	Write: Reg: 0x0010040C, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100410, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100414, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100418, Data: 0x00000000
>(II) NOUVEAU(0): 0xD368: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xD368: Reg: 0x0000425C, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x0000425C, Data: 0x0C221464
>(II) NOUVEAU(0): 	Write: Reg: 0x0000425C, Data: 0x0C221464
>(II) NOUVEAU(0): 0xD375: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xD375: Reg: 0x00004410, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00004410, Data: 0x161504E0
>(II) NOUVEAU(0): 	Write: Reg: 0x00004410, Data: 0x161504E0
>(II) NOUVEAU(0): 0xD382: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xD382: Reg: 0x0000C040, Mask: 0xFFFCFFFF, Data: 0x00030000
>(II) NOUVEAU(0): 	Read:  Reg: 0x0000C040, Data: 0x3C0B07FF
>(II) NOUVEAU(0): 	Write: Reg: 0x0000C040, Data: 0x3C0B07FF
>(II) NOUVEAU(0): 0xD38F: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD38F: Reg: 0x00100220, RegIncrement: 0x04, Count: 0x09, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100220, Data: 0x06121E18
>(II) NOUVEAU(0): 	Write: Reg: 0x00100224, Data: 0x0B010804
>(II) NOUVEAU(0): 	Write: Reg: 0x00100228, Data: 0x24230606
>(II) NOUVEAU(0): 	Write: Reg: 0x0010022C, Data: 0x5412F405
>(II) NOUVEAU(0): 	Write: Reg: 0x00100230, Data: 0x00000C1F
>(II) NOUVEAU(0): 	Write: Reg: 0x00100234, Data: 0x01E69677
>(II) NOUVEAU(0): 	Write: Reg: 0x00100238, Data: 0x00200311
>(II) NOUVEAU(0): 	Write: Reg: 0x0010023C, Data: 0x00000031
>(II) NOUVEAU(0): 	Write: Reg: 0x00100240, Data: 0x000A0000
>(II) NOUVEAU(0): 0xD4B6: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xD4B7: Parsing init table 1
>(II) NOUVEAU(0): 0xD4B7: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xD4B7: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xD4B7: BaseReg: 0x00100328, Count: 0x09
>(II) NOUVEAU(0): 	Write: Reg: 0x00100328, Data: 0x08030114
>(II) NOUVEAU(0): 	Write: Reg: 0x0010032C, Data: 0xFFFF18FF
>(II) NOUVEAU(0): 	Write: Reg: 0x00100330, Data: 0xCCCC5044
>(II) NOUVEAU(0): 	Write: Reg: 0x00100334, Data: 0x33332022
>(II) NOUVEAU(0): 	Write: Reg: 0x00100338, Data: 0x0000000A
>(II) NOUVEAU(0): 	Write: Reg: 0x0010033C, Data: 0x00041244
>(II) NOUVEAU(0): 	Write: Reg: 0x00100340, Data: 0x000001FB
>(II) NOUVEAU(0): 	Write: Reg: 0x00100344, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100348, Data: 0x00000000
>(II) NOUVEAU(0): 0xD4E1: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xD4E1: BaseReg: 0x00100350, Count: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100350, Data: 0x0000440A
>(II) NOUVEAU(0): 	Write: Reg: 0x00100354, Data: 0x00000806
>(II) NOUVEAU(0): 0xD4EF: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x00000000
>(II) NOUVEAU(0): 0xD4F8: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001220, Data: 0x00000000
>(II) NOUVEAU(0): 0xD501: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001228, Data: 0x00000000
>(II) NOUVEAU(0): 0xD50A: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xD50A: BaseReg: 0x00100A50, Count: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A50, Data: 0x00100077
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A54, Data: 0x00100077
>(II) NOUVEAU(0): 0xD518: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001218, Data: 0x00010000
>(II) NOUVEAU(0): 0xD521: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xD521: BaseReg: 0x00001230, Count: 0x03
>(II) NOUVEAU(0): 	Write: Reg: 0x00001230, Data: 0x8000DFDF
>(II) NOUVEAU(0): 	Write: Reg: 0x00001234, Data: 0x0004000F
>(II) NOUVEAU(0): 	Write: Reg: 0x00001238, Data: 0xF83E0000
>(II) NOUVEAU(0): 0xD533: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xD533: BaseReg: 0x00001240, Count: 0x04
>(II) NOUVEAU(0): 	Write: Reg: 0x00001240, Data: 0x80000A0A
>(II) NOUVEAU(0): 	Write: Reg: 0x00001244, Data: 0x0001000F
>(II) NOUVEAU(0): 	Write: Reg: 0x00001248, Data: 0xF83E0000
>(II) NOUVEAU(0): 	Write: Reg: 0x0000124C, Data: 0xAA11AA11
>(II) NOUVEAU(0): 0xD549: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xD549: Reg: 0x00001280, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001280, Data: 0x2F192F19
>(II) NOUVEAU(0): 	Write: Reg: 0x00001280, Data: 0x2F192F19
>(II) NOUVEAU(0): 0xD556: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xD556: Sleeping for 0x07D0 microseconds
>(II) NOUVEAU(0): 0xD559: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD559: Reg: 0x00100218, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100218, Data: 0x00000100
>(II) NOUVEAU(0): 0xD580: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xD580: Sleeping for 0x07D0 microseconds
>(II) NOUVEAU(0): 0xD583: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xD583: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x0010021C, Data: 0x00000001
>(II) NOUVEAU(0): 0xD585: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xD585: Sleeping for 0x07D0 microseconds
>(II) NOUVEAU(0): 0xD588: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD588: Reg: 0x00100200, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100200, Data: 0x43003071
>(II) NOUVEAU(0): 0xD5AF: [ (0x75) - INIT_CONDITION ]
>(II) NOUVEAU(0): 0xD5AF: Cond: 0x02, Reg: 0x00101000, Mask: 0x00000020, Cmpval: 0x00000020
>(II) NOUVEAU(0): 	Read:  Reg: 0x00101000, Data: 0xA344FE8B
>(II) NOUVEAU(0): 0xD5AF: Checking if 0x00000000 equals 0x00000020
>(II) NOUVEAU(0): 0xD5AF: CONDITION IS NOT FULFILLED
>(II) NOUVEAU(0): 0xD5AF: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0xD5B1: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xD5BE: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xD5BE: ---- EXECUTING FOLLOWING COMMANDS ----
>(II) NOUVEAU(0): 0xD5BF: [ (0x75) - INIT_CONDITION ]
>(II) NOUVEAU(0): 0xD5BF: Cond: 0x04, Reg: 0x00001540, Mask: 0x000F0000, Cmpval: 0x00030000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001540, Data: 0x73F31E0A
>(II) NOUVEAU(0): 0xD5BF: Checking if 0x00030000 equals 0x00030000
>(II) NOUVEAU(0): 0xD5BF: CONDITION FULFILLED - CONTINUING TO EXECUTE
>(II) NOUVEAU(0): 0xD5C1: [ (0x38) - INIT_NOT ]
>(II) NOUVEAU(0): 0xD5C1: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0xD5C2: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xD5CF: [ (0x5F) - INIT_COPY_NV_REG ]
>(II) NOUVEAU(0): 0xD5E5: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xD5E5: ---- EXECUTING FOLLOWING COMMANDS ----
>(II) NOUVEAU(0): 0xD5E6: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xD5E6: Sleeping for 0x07D0 microseconds
>(II) NOUVEAU(0): 0xD5E9: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD5E9: Reg: 0x00100204, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100204, Data: 0x00559220
>(II) NOUVEAU(0): 0xD610: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x00000000
>(II) NOUVEAU(0): 0xD619: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100214, Data: 0x000000B0
>(II) NOUVEAU(0): 0xD622: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xD622: Sleeping for 0x00C8 microseconds
>(II) NOUVEAU(0): 0xD625: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD625: Reg: 0x00100218, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100218, Data: 0x00000100
>(II) NOUVEAU(0): 0xD64C: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xD64C: Sleeping for 0x07D0 microseconds
>(II) NOUVEAU(0): 0xD64F: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD64F: Reg: 0x00100218, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100218, Data: 0x00000101
>(II) NOUVEAU(0): 0xD676: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xD676: Sleeping for 0x07D0 microseconds
>(II) NOUVEAU(0): 0xD679: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xD679: Macro: 0x03, MacroTableIndex: 0x03, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D8, Data: 0x00000001
>(II) NOUVEAU(0): 0xD67B: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xD67B: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D4, Data: 0x00000001
>(II) NOUVEAU(0): 0xD67D: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD67D: Reg: 0x001002E0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001002E0, Data: 0x00200000
>(II) NOUVEAU(0): 0xD6A4: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002E0, Data: 0x00300000
>(II) NOUVEAU(0): 	Write: Reg: 0x001002E8, Data: 0x00300000
>(II) NOUVEAU(0): 0xD6AD: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD6AD: Reg: 0x001002E0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001002E0, Data: 0x00300000
>(II) NOUVEAU(0): 0xD6D4: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002E0, Data: 0x00300000
>(II) NOUVEAU(0): 	Write: Reg: 0x001002E8, Data: 0x00300000
>(II) NOUVEAU(0): 0xD6DD: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD6DD: Reg: 0x001002C4, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C4, Data: 0x00100004
>(II) NOUVEAU(0): 0xD704: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C4, Data: 0x00100004
>(II) NOUVEAU(0): 	Write: Reg: 0x001002CC, Data: 0x00100004
>(II) NOUVEAU(0): 0xD70D: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD70D: Reg: 0x00100900, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100900, Data: 0x00000101
>(II) NOUVEAU(0): 0xD734: [ (0x39) - INIT_IO_FLAG_CONDITION ]
>(II) NOUVEAU(0): 0xD734: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, FlagArray: 0x58E6, FAMask: 0x08, Cmpval: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xD734: Checking if 0x00 equals 0x00
>(II) NOUVEAU(0): 0xD734: CONDITION FULFILLED - CONTINUING TO EXECUTE
>(II) NOUVEAU(0): 0xD736: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xD736: EXECUTING SUB-ROUTINE AT 0xD7FD
>(II) NOUVEAU(0): 0xD7FD: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD7FD: Reg: 0x00100940, RegIncrement: 0x10, Count: 0x06, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100940, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100950, Data: 0xCCCCCCCC
>(II) NOUVEAU(0): 	Write: Reg: 0x00100960, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100970, Data: 0xCCCCCCCC
>(II) NOUVEAU(0): 	Write: Reg: 0x00100980, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100990, Data: 0xACADDCBD
>(II) NOUVEAU(0): 0xD8C4: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD8C4: Reg: 0x00100944, RegIncrement: 0x10, Count: 0x06, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100944, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100954, Data: 0xCCCCCCCC
>(II) NOUVEAU(0): 	Write: Reg: 0x00100964, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100974, Data: 0xCCCCCCCC
>(II) NOUVEAU(0): 	Write: Reg: 0x00100984, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100994, Data: 0xCCDBBCCB
>(II) NOUVEAU(0): 0xD98B: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xD736: END OF SUB-ROUTINE AT 0xD7FD
>(II) NOUVEAU(0): 0xD739: [ (0x38) - INIT_NOT ]
>(II) NOUVEAU(0): 0xD739: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0xD73A: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xD73D: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xD73D: ---- EXECUTING FOLLOWING COMMANDS ----
>(II) NOUVEAU(0): 0xD73E: [ (0x39) - INIT_IO_FLAG_CONDITION ]
>(II) NOUVEAU(0): 0xD73E: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, FlagArray: 0x58E6, FAMask: 0x10, Cmpval: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xD73E: Checking if 0x00 equals 0x00
>(II) NOUVEAU(0): 0xD73E: CONDITION FULFILLED - CONTINUING TO EXECUTE
>(II) NOUVEAU(0): 0xD740: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xD740: EXECUTING SUB-ROUTINE AT 0xDACD
>(II) NOUVEAU(0): 0xDACD: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDACD: Reg: 0x00100A00, RegIncrement: 0x04, Count: 0x02, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A00, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A04, Data: 0x00000000
>(II) NOUVEAU(0): 0xDB14: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDB14: Reg: 0x00100A10, RegIncrement: 0x04, Count: 0x02, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A10, Data: 0x99999999
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A14, Data: 0x99999999
>(II) NOUVEAU(0): 0xDB5B: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xD740: END OF SUB-ROUTINE AT 0xDACD
>(II) NOUVEAU(0): 0xD743: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xD744: [ (0x39) - INIT_IO_FLAG_CONDITION ]
>(II) NOUVEAU(0): 0xD744: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, FlagArray: 0x58E6, FAMask: 0x80, Cmpval: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xD744: Checking if 0x00 equals 0x00
>(II) NOUVEAU(0): 0xD744: CONDITION FULFILLED - CONTINUING TO EXECUTE
>(II) NOUVEAU(0): 0xD746: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xD746: EXECUTING SUB-ROUTINE AT 0xDB5C
>(II) NOUVEAU(0): 0xDB5C: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDB5C: Reg: 0x00100A20, RegIncrement: 0x04, Count: 0x02, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A20, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A24, Data: 0x00000000
>(II) NOUVEAU(0): 0xDBA3: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDBA3: Reg: 0x00100A30, RegIncrement: 0x04, Count: 0x02, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A30, Data: 0xCCCCCCCC
>(II) NOUVEAU(0): 	Write: Reg: 0x00100A34, Data: 0xCCCCCCCC
>(II) NOUVEAU(0): 0xDBEA: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xD746: END OF SUB-ROUTINE AT 0xDB5C
>(II) NOUVEAU(0): 0xD749: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xD74A: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xD74A: BaseReg: 0x00100920, Count: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100920, Data: 0xAAAAAAAA
>(II) NOUVEAU(0): 	Write: Reg: 0x00100924, Data: 0xAAAAAAAA
>(II) NOUVEAU(0): 0xD758: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xD758: EXECUTING SUB-ROUTINE AT 0xD7B5
>(II) NOUVEAU(0): 0xD7B5: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD7B5: Reg: 0x00100930, RegIncrement: 0x04, Count: 0x02, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100930, Data: 0x00001110
>(II) NOUVEAU(0): 	Write: Reg: 0x00100934, Data: 0x00001110
>(II) NOUVEAU(0): 0xD7FC: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xD758: END OF SUB-ROUTINE AT 0xD7B5
>(II) NOUVEAU(0): 0xD75B: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100910, Data: 0x00000000
>(II) NOUVEAU(0): 0xD764: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xD764: Reg: 0x00100914, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100914, Data: 0x10000111
>(II) NOUVEAU(0): 0xD78B: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xD78B: BaseReg: 0x00100080, Count: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00100080, Data: 0xF0000020
>(II) NOUVEAU(0): 	Write: Reg: 0x00100084, Data: 0x0000001D
>(II) NOUVEAU(0): 0xD799: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100090, Data: 0x00000000
>(II) NOUVEAU(0): 0xD7A2: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x001000A0, Data: 0x00000000
>(II) NOUVEAU(0): 0xD7AB: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x001000F0, Data: 0x00000000
>(II) NOUVEAU(0): 0xD7B4: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDBEB: Parsing init table 2
>(II) NOUVEAU(0): 0xDBEB: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xDBEB: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680D38, Data: 0x80000000
>(II) NOUVEAU(0): 0xDBF4: [ (0x4B) - INIT_PLL2 ]
>(II) NOUVEAU(0): 0xDBF4: Reg: 0x680508, Freq: 36000kHz
>(II) NOUVEAU(0): 0xDBF4: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xDBFD: [ (0x58) - INIT_ZM_REG_SEQUENCE ]
>(II) NOUVEAU(0): 0xDBFD: BaseReg: 0x00001088, Count: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x00001088, Data: 0x000011F0
>(II) NOUVEAU(0): 	Write: Reg: 0x0000108C, Data: 0x000000D0
>(II) NOUVEAU(0): 0xDC0B: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDC0B: Reg: 0x00001518, Mask: 0xFCFFFFFF, Data: 0x02000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001518, Data: 0x02000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00001518, Data: 0x02000000
>(II) NOUVEAU(0): 0xDC18: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDC18: Reg: 0x00001530, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001530, Data: 0x800503FF
>(II) NOUVEAU(0): 	Write: Reg: 0x00001530, Data: 0x800503FF
>(II) NOUVEAU(0): 0xDC25: [ (0x52) - INIT_CR ]
>(II) NOUVEAU(0): 0xDC25: Index: 0x2B, Mask: 0x20, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x2B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xDC29: [ (0x54) - INIT_ZM_CR_GROUP ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x38, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x1A, Head: 0x00, Data: 0x3F
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x28, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x33, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x21, Head: 0x00, Data: 0xFA
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x43, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x52, Head: 0x00, Data: 0x04
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x53, Head: 0x00, Data: 0x40
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3A, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4A, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4B, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4C, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xDC47: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ]
>(II) NOUVEAU(0): 0xDC47: Index1: 0x57, Index2: 0x58, BaseAddr: 0x00, Count: 0x10
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x04
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x7F
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x02
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x03
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x04
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x05
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x06
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x07
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x08
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x09
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x0A
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x0B
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x0C
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x0D
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x0E
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x0F
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x04
>(II) NOUVEAU(0): 0xDC5C: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xDC5C: Port: 0x03D4, Index: 0x85, Mask: 0x00, Data: 0xFF
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x85, Head: 0x00, Data: 0xFF
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x85, Head: 0x00, Data: 0xFF
>(II) NOUVEAU(0): 0xDC62: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xDC62: Port: 0x03D4, Index: 0x86, Mask: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x86, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x86, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 0xDC68: [ (0x53) - INIT_ZM_CR ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x03
>(II) NOUVEAU(0): 0xDC6B: [ (0x52) - INIT_CR ]
>(II) NOUVEAU(0): 0xDC6B: Index: 0x2B, Mask: 0x10, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x2B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xDC6F: [ (0x54) - INIT_ZM_CR_GROUP ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x33, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x21, Head: 0x01, Data: 0xFA
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x43, Head: 0x01, Data: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x2C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3A, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x3C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4A, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4B, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x4C, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xDC85: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ]
>(II) NOUVEAU(0): 0xDC85: Index1: 0x57, Index2: 0x58, BaseAddr: 0x00, Count: 0x10
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x7F
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x02
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x03
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x04
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x05
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x06
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x07
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x08
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x09
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x0A
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x0B
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x0C
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x0D
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x0E
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x0F
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x01, Data: 0x00
>(II) NOUVEAU(0): 0xDC9A: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xDC9A: Port: 0x03D4, Index: 0x85, Mask: 0x00, Data: 0xFF
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x85, Head: 0x01, Data: 0xFF
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x85, Head: 0x01, Data: 0xFF
>(II) NOUVEAU(0): 0xDCA0: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xDCA0: Port: 0x03D4, Index: 0x86, Mask: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x86, Head: 0x01, Data: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x86, Head: 0x01, Data: 0x01
>(II) NOUVEAU(0): 0xDCA6: [ (0x53) - INIT_ZM_CR ]
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0xDCA9: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDCA9: Reg: 0x00001584, Mask: 0xFFF00000, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00001584, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00001584, Data: 0x00000000
>(II) NOUVEAU(0): 0xDCB6: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x80000000
>(II) NOUVEAU(0): 0xDCBF: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDCBF: Reg: 0x0068052C, Mask: 0xFFFFFEFF, Data: 0x00000001
>(II) NOUVEAU(0): 	Read:  Reg: 0x0068052C, Data: 0x00000001
>(II) NOUVEAU(0): 	Write: Reg: 0x0068052C, Data: 0x00000001
>(II) NOUVEAU(0): 0xDCCC: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDCCC: Reg: 0x0068252C, Mask: 0xFFFFFFFF, Data: 0x00000101
>(II) NOUVEAU(0): 	Read:  Reg: 0x0068252C, Data: 0x00000100
>(II) NOUVEAU(0): 	Write: Reg: 0x0068252C, Data: 0x00000101
>(II) NOUVEAU(0): 0xDCD9: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDCD9: Reg: 0x00680848, Mask: 0xFFFFFFFF, Data: 0x00100000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680848, Data: 0x15100011
>(II) NOUVEAU(0): 	Write: Reg: 0x00680848, Data: 0x15100011
>(II) NOUVEAU(0): 0xDCE6: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDCE6: Reg: 0x00682848, Mask: 0xFFFFFFFF, Data: 0x00100000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00682848, Data: 0x15100011
>(II) NOUVEAU(0): 	Write: Reg: 0x00682848, Data: 0x15100011
>(II) NOUVEAU(0): 0xDCF3: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDCF3: Reg: 0x00680880, Mask: 0xFFFBFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680880, Data: 0x01101191
>(II) NOUVEAU(0): 	Write: Reg: 0x00680880, Data: 0x01101191
>(II) NOUVEAU(0): 0xDD00: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDD00: Reg: 0x00682880, Mask: 0xDFFBFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00682880, Data: 0x01101111
>(II) NOUVEAU(0): 	Write: Reg: 0x00682880, Data: 0x01101111
>(II) NOUVEAU(0): 0xDD0D: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00001200, Data: 0x0003103C
>(II) NOUVEAU(0): 0xDD16: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDD6F: Parsing init table 3
>(II) NOUVEAU(0): 0xDD6F: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xDD6F: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xDD6F: EXECUTING SUB-ROUTINE AT 0x28BC
>(II) NOUVEAU(0): 0x28BC: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDD6F: END OF SUB-ROUTINE AT 0x28BC
>(II) NOUVEAU(0): 0xDD72: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDD72: Reg: 0x001002C0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C0, Data: 0x00000B52
>(II) NOUVEAU(0): 0xDD99: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C0, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 0xDDA2: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xDDA2: Sleeping for 0x03E8 microseconds
>(II) NOUVEAU(0): 0xDDA5: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA5: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D4, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDA7: [ (0x33) - INIT_REPEAT ]
>(II) NOUVEAU(0): 0xDDA7: REPEATING FOLLOWING SEGMENT 10 TIMES
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDA9: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDA9: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002D0, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDAB: [ (0x36) - INIT_END_REPEAT ]
>(II) NOUVEAU(0): 0xDDAC: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDDAC: Reg: 0x001002C0, Mask: 0xFFFFFEFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C0, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C0, Data: 0x00000A52
>(II) NOUVEAU(0): 0xDDB9: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C0, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 0xDDC2: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xDDC2: Sleeping for 0x0064 microseconds
>(II) NOUVEAU(0): 0xDDC5: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDC5: Macro: 0x04, MacroTableIndex: 0x04, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002DC, Data: 0x00000001
>(II) NOUVEAU(0): 0xDDC7: [ (0x6B) - INIT_SUB ]
>(II) NOUVEAU(0): 0xDDC7: EXECUTING SUB-SCRIPT 7
>(II) NOUVEAU(0): 0xDD43: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ]
>(II) NOUVEAU(0): 0xDD43: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, Count: 0x08, Reg: 0x00004024
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0xDD43: Reg: 0x00004024, Config: 0x02, Freq: 400000kHz
>(II) NOUVEAU(0): 0xDD43: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xDD6E: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDDC7: END OF SUB-SCRIPT 7
>(II) NOUVEAU(0): 0xDDC9: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xDDC9: Sleeping for 0x03E8 microseconds
>(II) NOUVEAU(0): 0xDDCC: [ (0x6F) - INIT_MACRO ]
>(II) NOUVEAU(0): 0xDDCC: Macro: 0x05, MacroTableIndex: 0x05, Count: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x001002DC, Data: 0x00000000
>(II) NOUVEAU(0): 0xDDCE: [ (0x6B) - INIT_SUB ]
>(II) NOUVEAU(0): 0xDDCE: EXECUTING SUB-SCRIPT 8
>(II) NOUVEAU(0): 0x5C03: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0x5C03: Port: 0x03D4, Index: 0x44, Mask: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x04
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 0x5C09: [ (0x39) - INIT_IO_FLAG_CONDITION ]
>(II) NOUVEAU(0): 0x5C09: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, FlagArray: 0x58E6, FAMask: 0x20, Cmpval: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0x5C09: Checking if 0x00 equals 0x00
>(II) NOUVEAU(0): 0x5C09: CONDITION FULFILLED - CONTINUING TO EXECUTE
>(II) NOUVEAU(0): 0x5C0B: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0x5C0B: Reg: 0x001002C8, Mask: 0xFFFFFEFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 0x5C18: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C0, Data: 0x00000A52
>(II) NOUVEAU(0): 0x5C21: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0x5C21: Reg: 0x001002C8, Mask: 0xFFFFFFFF, Data: 0x00000100
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C8, Data: 0x00000B52
>(II) NOUVEAU(0): 0x5C2E: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C0, Data: 0x00000A52
>(II) NOUVEAU(0): 0x5C37: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0x5C37: Reg: 0x001002C8, Mask: 0xFFFFFEFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 0x5C44: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C8, Data: 0x00000A52
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C0, Data: 0x00000A52
>(II) NOUVEAU(0): 0x5C4D: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0x5C4E: [ (0x39) - INIT_IO_FLAG_CONDITION ]
>(II) NOUVEAU(0): 0x5C4E: Port: 0x03D4, Index: 0x3C, Mask: 0x70, Shift: 0x04, FlagArray: 0x58E6, FAMask: 0x2F, Cmpval: 0x03
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x3C, Head: 0x00, Data: 0x20
>(II) NOUVEAU(0): 0x5C4E: Checking if 0x02 equals 0x03
>(II) NOUVEAU(0): 0x5C4E: CONDITION IS NOT FULFILLED
>(II) NOUVEAU(0): 0x5C4E: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0x5C50: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0x5C53: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0x5C53: ---- EXECUTING FOLLOWING COMMANDS ----
>(II) NOUVEAU(0): 0x5C54: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDDCE: END OF SUB-SCRIPT 8
>(II) NOUVEAU(0): 0xDDD0: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0xDDD0: Sleeping for 0x03E8 microseconds
>(II) NOUVEAU(0): 0xDDD3: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDDD3: Reg: 0x001004E0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001004E0, Data: 0x8030010B
>(II) NOUVEAU(0): 0xDDFA: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDDFA: Reg: 0x00100200, Mask: 0xFFFFFFFF, Data: 0x10000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00100200, Data: 0x53003071
>(II) NOUVEAU(0): 	Write: Reg: 0x00100200, Data: 0x53003071
>(II) NOUVEAU(0): 0xDE07: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00100210, Data: 0x80000001
>(II) NOUVEAU(0): 0xDE10: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDE10: Reg: 0x001002C4, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C4, Data: 0x00100384
>(II) NOUVEAU(0): 0xDE37: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C4, Data: 0x00100004
>(II) NOUVEAU(0): 	Write: Reg: 0x001002CC, Data: 0x00100004
>(II) NOUVEAU(0): 0xDE40: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ]
>(II) NOUVEAU(0): 0xDE40: Reg: 0x001002C4, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x02, Index: 0x02
>(II) NOUVEAU(0): 	Write: Reg: 0x001002C4, Data: 0x00100004
>(II) NOUVEAU(0): 0xDE67: [ (0x90) - INIT_COPY_ZM_REG ]
>(II) NOUVEAU(0): 	Read:  Reg: 0x001002C4, Data: 0x00100004
>(II) NOUVEAU(0): 	Write: Reg: 0x001002CC, Data: 0x00100004
>(II) NOUVEAU(0): 0xDE70: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x0070FFF0, Data: 0x00000000
>(II) NOUVEAU(0): 0xDE79: [ (0x63) - INIT_COMPUTE_MEM ]
>(II) NOUVEAU(0): 0xDE79: [ NOT YET IMPLEMENTED ]
>(II) NOUVEAU(0): 0xDE7A: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDE7A: Reg: 0x00100200, Mask: 0xFFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00100200, Data: 0x53003071
>(II) NOUVEAU(0): 	Write: Reg: 0x00100200, Data: 0x53003071
>(II) NOUVEAU(0): 0xDE87: [ (0x78) - INIT_INDEX_IO ]
>(II) NOUVEAU(0): 0xDE87: Port: 0x03C4, Index: 0x01, Mask: 0xDF, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0xFF
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03C4, Index: 0x01, Head: 0x00, Data: 0xDF
>(II) NOUVEAU(0): 0xDE8D: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDE8D: Reg: 0x0000C040, Mask: 0xFFF3FC00, Data: 0x000803FF
>(II) NOUVEAU(0): 	Read:  Reg: 0x0000C040, Data: 0x3C0B07FF
>(II) NOUVEAU(0): 	Write: Reg: 0x0000C040, Data: 0x3C0B07FF
>(II) NOUVEAU(0): 0xDE9A: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDE9A: Reg: 0x00088138, Mask: 0xBFFFFC01, Data: 0x00000100
>(II) NOUVEAU(0): 	Read:  Reg: 0x00088138, Data: 0x00000100
>(II) NOUVEAU(0): 	Write: Reg: 0x00088138, Data: 0x00000100
>(II) NOUVEAU(0): 0xDEA7: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDEA7: Reg: 0x0008813C, Mask: 0xF0FFFFFF, Data: 0x07000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x0008813C, Data: 0x07000000
>(II) NOUVEAU(0): 	Write: Reg: 0x0008813C, Data: 0x07000000
>(II) NOUVEAU(0): 0xDEB4: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDEB4: Reg: 0x00011014, Mask: 0xFFFF7FFF, Data: 0x00008000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00011014, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x00011014, Data: 0x00008000
>(II) NOUVEAU(0): 0xDEC1: [ (0x7A) - INIT_ZM_REG ]
>(II) NOUVEAU(0): 	Write: Reg: 0x00680524, Data: 0x00000000
>(II) NOUVEAU(0): 0xDECA: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xDECA: EXECUTING SUB-ROUTINE AT 0xC2DE
>(II) NOUVEAU(0): 0xC2DE: [ (0x50) - INIT_ZM_TMDS_GROUP ]
>(II) NOUVEAU(0): 0xC2DE: MagicLookupValue: 0x00, Count: 0x03
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000043
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x000000FE
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000033
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x000000FB
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002F
>(II) NOUVEAU(0): 0xC2E7: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDECA: END OF SUB-ROUTINE AT 0xC2DE
>(II) NOUVEAU(0): 0xDECD: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xDECD: EXECUTING SUB-ROUTINE AT 0xC2E8
>(II) NOUVEAU(0): 0xC2E8: [ (0x50) - INIT_ZM_TMDS_GROUP ]
>(II) NOUVEAU(0): 0xC2E8: MagicLookupValue: 0x02, Count: 0x03
>(II) NOUVEAU(0): 	Write: Reg: 0x006828B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006828B0, Data: 0x00000043
>(II) NOUVEAU(0): 	Write: Reg: 0x006828B4, Data: 0x000000FE
>(II) NOUVEAU(0): 	Write: Reg: 0x006828B0, Data: 0x00000033
>(II) NOUVEAU(0): 	Write: Reg: 0x006828B4, Data: 0x000000FB
>(II) NOUVEAU(0): 	Write: Reg: 0x006828B0, Data: 0x0000002F
>(II) NOUVEAU(0): 0xC2F1: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDECD: END OF SUB-ROUTINE AT 0xC2E8
>(II) NOUVEAU(0): 0xDED0: [ (0x75) - INIT_CONDITION ]
>(II) NOUVEAU(0): 0xDED0: Cond: 0x03, Reg: 0x00000000, Mask: 0x000000FF, Cmpval: 0x000000A1
>(II) NOUVEAU(0): 	Read:  Reg: 0x00000000, Data: 0x04B300B1
>(II) NOUVEAU(0): 0xDED0: Checking if 0x000000B1 equals 0x000000A1
>(II) NOUVEAU(0): 0xDED0: CONDITION IS NOT FULFILLED
>(II) NOUVEAU(0): 0xDED0: ------ SKIPPING FOLLOWING COMMANDS  ------
>(II) NOUVEAU(0): 0xDED2: [ (0x38) - INIT_NOT ]
>(II) NOUVEAU(0): 0xDED2: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xDED3: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xDED3: Reg: 0x00100360, Mask: 0xFF00FFFF, Data: 0x00300000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00100360, Data: 0x8B303A98
>(II) NOUVEAU(0): 	Write: Reg: 0x00100360, Data: 0x8B303A98
>(II) NOUVEAU(0): 0xDEE0: [ (0x72) - INIT_RESUME ]
>(II) NOUVEAU(0): 0xDEE1: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xDF7B: Parsing init table 4
>(II) NOUVEAU(0): 0xDF7B: ------ EXECUTING FOLLOWING COMMANDS ------
>(II) NOUVEAU(0): 0xDF7B: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): Display Configuration Block version 3.0 found
>(II) NOUVEAU(0): DCB header length 19, with 0A possible entries
>Raw DCB entry 0: 01000300 00000028
>Raw DCB entry 1: 03011312 00000000
>Raw DCB entry 2: 04011310 00000028
>Raw DCB entry 3: 020223f1 00c0c080
>(II) NOUVEAU(0): Found 4 entries in DCB
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x1F, Head: 0x00, Data: 0x99
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x11, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x11, Head: 0x00, Data: 0x80
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x03
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x1F, Head: 0x01, Data: 0x99
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x11, Head: 0x01, Data: 0x8E
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x11, Head: 0x01, Data: 0x8E
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module already built-in
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module already built-in
>pre-Owner: 0x4
>pbus84: 0x10205649
>pbus84: 0x205649
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>(--) NOUVEAU(0): DCB entry 0: type: 0, i2c_index: 0, heads: 3, bus: 0, or: 1
>(II) NOUVEAU(0): I2C bus "VGA-0" initialized.
>(II) NOUVEAU(0): Output VGA-0 has no monitor section
>(--) NOUVEAU(0): Adding output VGA-0
>(--) NOUVEAU(0): DCB entry 1: type: 2, i2c_index: 1, heads: 3, bus: 1, or: 3
>(II) NOUVEAU(0): I2C bus "DVI-D-0" initialized.
>(II) NOUVEAU(0): Output DVI-D-0 has no monitor section
>(--) NOUVEAU(0): Adding output DVI-D-0
>(--) NOUVEAU(0): DCB entry 2: type: 0, i2c_index: 1, heads: 3, bus: 1, or: 4
>(II) NOUVEAU(0): Output DVI-A-0 has no monitor section
>(--) NOUVEAU(0): Adding output DVI-A-0
>(--) NOUVEAU(0): DCB entry 3: type: 1, i2c_index: 15, heads: 3, bus: 2, or: 2
>nv_analog_output_detect is called
>(II) NOUVEAU(0): I2C device "VGA-0:ddc2" registered at address 0xA0.
>(II) NOUVEAU(0): I2C device "VGA-0:ddc2" removed.
>(II) NOUVEAU(0): EDID for output VGA-0
>nv_tmds_output_detect is called
>(II) NOUVEAU(0): I2C device "DVI-D-0:ddc2" registered at address 0xA0.
>nv_output_get_modes is called
>(II) NOUVEAU(0): EDID for output DVI-D-0
>(II) NOUVEAU(0): Manufacturer: FUS  Model: 648  Serial#: 1
>(II) NOUVEAU(0): Year: 2006  Week: 9
>(II) NOUVEAU(0): EDID Version: 1.3
>(II) NOUVEAU(0): Digital Display Input
>(II) NOUVEAU(0): Max H-Image Size [cm]: horiz.: 89  vert.: 50
>(II) NOUVEAU(0): Gamma: 2.40
>(II) NOUVEAU(0): No DPMS capabilities specified; RGB/Color Display
>(II) NOUVEAU(0): First detailed timing is preferred mode
>(II) NOUVEAU(0): redX: 0.642 redY: 0.332   greenX: 0.276 greenY: 0.600
>(II) NOUVEAU(0): blueX: 0.144 blueY: 0.061   whiteX: 0.280 whiteY: 0.290
>(II) NOUVEAU(0): Supported VESA Video Modes:
>(II) NOUVEAU(0): 640x480@60Hz
>(II) NOUVEAU(0): 800x600@60Hz
>(II) NOUVEAU(0): 1024x768@60Hz
>(II) NOUVEAU(0): 1024x768@75Hz
>(II) NOUVEAU(0): Manufacturer's mask: 0
>(II) NOUVEAU(0): Supported Future Video Modes:
>(II) NOUVEAU(0): #0: hsize: 1280  vsize 720  refresh: 60  vid: 49281
>(II) NOUVEAU(0): Supported additional Video Mode:
>(II) NOUVEAU(0): clock: 85.5 MHz   Image Size:  885 x 498 mm
>(II) NOUVEAU(0): h_active: 1360  h_sync: 1424  h_sync_end 1536 h_blank_end 1792 h_border: 0
>(II) NOUVEAU(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 795 v_border: 0
>(II) NOUVEAU(0): Supported additional Video Mode:
>(II) NOUVEAU(0): clock: 71.2 MHz   Image Size:  885 x 498 mm
>(II) NOUVEAU(0): h_active: 1360  h_sync: 1424  h_sync_end 1536 h_blank_end 1792 h_border: 0
>(II) NOUVEAU(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 795 v_border: 0
>(II) NOUVEAU(0): Monitor name: MYRICA VQ40-1
>(II) NOUVEAU(0): Ranges: V min: 49  V max: 61 Hz, H min: 15  H max: 48 kHz, PixClock max 90 MHz
>(II) NOUVEAU(0): Number of EDID sections to follow: 1
>(II) NOUVEAU(0): EDID (in hex):
>(II) NOUVEAU(0): 	00ffffffffffff001ab3480601000000
>(II) NOUVEAU(0): 	091001038059328c0a4eeda455469924
>(II) NOUVEAU(0): 	0f474a210a0081c00101010101010101
>(II) NOUVEAU(0): 	010101010101662150b051001b304070
>(II) NOUVEAU(0): 	360075f23100001ed51b50b051001b30
>(II) NOUVEAU(0): 	4070360075f23100001e000000fc004d
>(II) NOUVEAU(0): 	595249434120565134302d31000000fd
>(II) NOUVEAU(0): 	00313d0f3009000a202020202020012c
>(II) NOUVEAU(0): EDID vendor "FUS", prod id 1608
>(II) NOUVEAU(0): Not using default mode "640x350" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "640x400" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "720x400" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1152x864" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x960" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x960" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x1024" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x1024" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x1024" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "832x624" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1152x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1152x864" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1152x864" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1152x864" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1152x864" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1152x864" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1152x864" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x720" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1280x720" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1280x720" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1280x720" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1280x800" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x800" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x800" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x800" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1280x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1280x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1280x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1280x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1360x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1360x768" (bad mode clock/interlace/doublescan)
>(II) NOUVEAU(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1440x900" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1600x1024" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1680x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1680x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1680x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1680x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1680x1050" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1920x1080" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1920x1200" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) NOUVEAU(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) NOUVEAU(0): Printing probed modes for output DVI-D-0
>(II) NOUVEAU(0): Modeline "1360x768"x60.0   72.00  1360 1408 1440 1520  768 771 781 790 +hsync -vsync (47.4 kHz)
>(II) NOUVEAU(0): Modeline "1360x768"x60.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz)
>(II) NOUVEAU(0): Modeline "1360x768"x50.0   71.25  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (39.8 kHz)
>(II) NOUVEAU(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) NOUVEAU(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) NOUVEAU(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) NOUVEAU(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>nv_analog_output_detect is called
>(II) NOUVEAU(0): EDID for output DVI-A-0
>(II) NOUVEAU(0): Output VGA-0 disconnected
>(II) NOUVEAU(0): Output DVI-D-0 connected
>(II) NOUVEAU(0): Output DVI-A-0 disconnected
>(II) NOUVEAU(0): Output DVI-D-0 using initial mode 1360x768
>(--) NOUVEAU(0): VideoRAM: 262144 kBytes
>(==) NOUVEAU(0): Using gamma correction (1.0, 1.0, 1.0)
>(--) NOUVEAU(0): Virtual size is 2720x768 (pitch 2752)
>(**) NOUVEAU(0):  Driver mode "1360x768": 72.0 MHz (scaled from 0.0 MHz), 47.4 kHz, 60.0 Hz
>(II) NOUVEAU(0): Modeline "1360x768"   72.00  1360 1408 1440 1520  768 771 781 790 +hsync -vsync
>(**) NOUVEAU(0):  Driver mode "1360x768": 85.5 MHz (scaled from 0.0 MHz), 47.7 kHz, 60.0 Hz
>(II) NOUVEAU(0): Modeline "1360x768"   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync
>(**) NOUVEAU(0):  Driver mode "1360x768": 71.2 MHz (scaled from 0.0 MHz), 39.8 kHz, 50.0 Hz
>(II) NOUVEAU(0): Modeline "1360x768"   71.25  1360 1424 1536 1792  768 771 777 795 +hsync +vsync
>(**) NOUVEAU(0):  Driver mode "1280x720": 74.5 MHz (scaled from 0.0 MHz), 44.8 kHz, 59.9 Hz
>(II) NOUVEAU(0): Modeline "1280x720"   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync
>(**) NOUVEAU(0):  Driver mode "1024x768": 78.8 MHz (scaled from 0.0 MHz), 60.1 kHz, 75.1 Hz
>(II) NOUVEAU(0): Modeline "1024x768"   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync
>(**) NOUVEAU(0):  Driver mode "1024x768": 65.0 MHz (scaled from 0.0 MHz), 48.4 kHz, 60.0 Hz
>(II) NOUVEAU(0): Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(**) NOUVEAU(0):  Driver mode "800x600": 40.0 MHz (scaled from 0.0 MHz), 37.9 kHz, 60.3 Hz
>(II) NOUVEAU(0): Modeline "800x600"   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync
>(**) NOUVEAU(0):  Driver mode "640x480": 25.2 MHz (scaled from 0.0 MHz), 31.5 kHz, 60.0 Hz
>(II) NOUVEAU(0): Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>(==) NOUVEAU(0): DPI set to (100, 100)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 2.2.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module already built-in
>(--) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B]
>	[1] 0	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B]
>	[2] 0	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B]
>	[3] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[4] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[7] -1	0	0xfebfe800 - 0xfebfefff (0x800) MX[B]
>	[8] -1	0	0xfebff000 - 0xfebfffff (0x1000) MX[B]
>	[9] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[10] -1	0	0xfbff4000 - 0xfbff7fff (0x4000) MX[B]
>	[11] -1	0	0xfbfff000 - 0xfbfff0ff (0x100) MX[B]
>	[12] -1	0	0xfbffa000 - 0xfbffafff (0x1000) MX[B]
>	[13] -1	0	0xfbffb000 - 0xfbffbfff (0x1000) MX[B]
>	[14] -1	0	0xfbffc000 - 0xfbffcfff (0x1000) MX[B]
>	[15] -1	0	0xfbffd000 - 0xfbffdfff (0x1000) MX[B]
>	[16] -1	0	0xfbffe000 - 0xfbffefff (0x1000) MX[B]
>	[17] -1	0	0xfbfff800 - 0xfbfffbff (0x400) MX[B]
>	[18] -1	0	0xfe9e0000 - 0xfe9fffff (0x20000) MX[B](B)
>	[19] -1	0	0xfc000000 - 0xfcffffff (0x1000000) MX[B](B)
>	[20] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[21] -1	0	0xfd000000 - 0xfdffffff (0x1000000) MX[B](B)
>	[22] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[23] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[24] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[25] 0	0	0x0000b800 - 0x0000b87f (0x80) IX[B]
>	[26] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[27] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[28] -1	0	0x0000d000 - 0x0000d07f (0x80) IX[B]
>	[29] -1	0	0x0000d400 - 0x0000d407 (0x8) IX[B]
>	[30] -1	0	0x0000d800 - 0x0000d81f (0x20) IX[B]
>	[31] -1	0	0x0000e000 - 0x0000e01f (0x20) IX[B]
>	[32] -1	0	0x0000e400 - 0x0000e403 (0x4) IX[B]
>	[33] -1	0	0x0000e800 - 0x0000e807 (0x8) IX[B]
>	[34] -1	0	0x0000c800 - 0x0000c8ff (0x100) IX[B]
>	[35] -1	0	0x0000ff00 - 0x0000ff0f (0x10) IX[B]
>	[36] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[37] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[38] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[39] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[40] -1	0	0x00000b00 - 0x00000b0f (0x10) IX[B]
>	[41] -1	0	0x00006000 - 0x0000600f (0x10) IX[B]
>	[42] -1	0	0x00007000 - 0x00007003 (0x4) IX[B]
>	[43] -1	0	0x00008000 - 0x00008007 (0x8) IX[B]
>	[44] -1	0	0x00009000 - 0x00009003 (0x4) IX[B]
>	[45] -1	0	0x0000a000 - 0x0000a007 (0x8) IX[B]
>	[46] -1	0	0x0000b800 - 0x0000b87f (0x80) IX[B](B)
>	[47] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[48] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 10, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 10, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 10, (OK)
>drmOpenByBusid: drmOpenMinor returns 10
>drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) NOUVEAU(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) NOUVEAU(0): [drm] framebuffer handle = 0xd8000000
>(II) NOUVEAU(0): [drm] added 1 reserved context for kernel
>(II) NOUVEAU(0): X context handle = 0x1
>(II) NOUVEAU(0): [drm] installed DRM signal handler
>(II) NOUVEAU(0): Allocated 128MiB VRAM for framebuffer + offscreen pixmaps
>(II) NOUVEAU(0): GART: PCI DMA - using 3840KiB
>(II) NOUVEAU(0): GART: Allocated 3MiB as a scratch buffer
>(II) NOUVEAU(0): Opened GPU channel 1
>NVEnterVT is called
>nv_crtc_save is called for CRTC 0
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x0
>nv_crtc_save is called for CRTC 1
>pre-Owner: 0x0
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x3
>nv_output_save is called
>nv_output_save is called
>nv_output_save is called
>pre-Owner: 0x3
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x3
>nv_analog_output_dpms is called with mode 3
>nv_tmds_output_dpms is called with mode 3
>nv_tmds_output_dpms is called for CRTC 0 with mode 3
>nv_analog_output_dpms is called with mode 3
>nv_crtc_dpms is called for CRTC 0 with mode 3
>pre-Owner: 0x3
>post-Owner: 0x0
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x0
>post-Owner: 0x3
>nv_crtc_lock is called for CRTC 0
>nv_output_mode_fixup is called
>nv_crtc_mode_fixup is called for CRTC 0
>nv_output_prepare is called
>nv_tmds_output_dpms is called with mode 3
>nv_tmds_output_dpms is called for CRTC 0 with mode 3
>nv_crtc_prepare is called for CRTC 0
>pre-Owner: 0x3
>post-Owner: 0x0
>nv_crtc_dpms is called for CRTC 0 with mode 3
>pre-Owner: 0x0
>post-Owner: 0x0
>pre-Owner: 0x0
>post-Owner: 0x0
>nv_crtc_mode_set is called for CRTC 0
>(WW) NOUVEAU(0): Mode on CRTC 0
>(II) NOUVEAU(0): Modeline "1360x768"x60.0   72.00  1360 1408 1440 1520  768 771 781 790 +hsync -vsync (47.4 kHz)
>pre-Owner: 0x0
>post-Owner: 0x0
>Mode clock: 72000
>Adjusted mode clock: 72000
>horizDisplay: 0xA9 
>horizStart: 0xB4 
>horizEnd: 0xB7 
>horizTotal: 0xB9 
>horizBlankStart: 0xA9 
>horizBlankEnd: 0xBD 
>vertDisplay: 0x2FF 
>vertStart: 0x311 
>vertEnd: 0x312 
>vertTotal: 0x314 
>vertBlankStart: 0x311 
>vertBlankEnd: 0x315 
>crtc 0 1360 2752
>(II) NOUVEAU(0): Found BIT PLL limits table version 0x21
>(II) NOUVEAU(0): Loading PLL limits for reg 0x00000000
>pll.vco1.minfreq: 100
>pll.vco1.maxfreq: 300
>pll.vco2.minfreq: 500
>pll.vco2.maxfreq: 1000
>pll.vco1.min_inputfreq: 2
>pll.vco1.max_inputfreq: 25
>pll.vco2.min_inputfreq: 27
>pll.vco2.max_inputfreq: 75
>pll.vco1.min_n: 8
>pll.vco1.max_n: 255
>pll.vco1.min_m: 1
>pll.vco1.max_m: 255
>pll.vco2.min_n: 8
>pll.vco2.max_n: 50
>pll.vco2.min_m: 1
>pll.vco2.max_m: 255
>pll.unk1c: 0
>pll.unk1d: 7
>pll.unk1e: 0
>vpll: n1 32 m1 3 p 2 db1_ratio 1
>There are 1 CRTC's enabled
>We are a lover of the DB1 VCLK ratio
>Horizontal:
>REG_DISP_END: 0x54F
>REG_DISP_TOTAL: 0x5EF
>REG_DISP_CRTC: 0x534
>REG_DISP_SYNC_START: 0x57F
>REG_DISP_SYNC_END: 0x59F
>REG_DISP_VALID_START: 0x0
>REG_DISP_VALID_END: 0x54F
>Vertical:
>REG_DISP_END: 0x2FF
>REG_DISP_TOTAL: 0x315
>REG_DISP_CRTC: 0x310
>REG_DISP_SYNC_START: 0x302
>REG_DISP_SYNC_END: 0x30C
>REG_DISP_VALID_START: 0x0
>REG_DISP_VALID_END: 0x2FF
>Pre-panel scaling
>panel-size:1360x768
>panel_ratio=1.770833
>aspect_ratio=1.770833
>h_scale=4096
>v_scale=4096
>GPU is doing the scaling.
>Post-panel scaling
>output 0 debug_0 01101191
>pre-Owner: 0x0
>post-Owner: 0x0
>writing vpll1_a 40022003
>writing vpll1_b 8000011F
>writing pllsel 00000204
>writing reg580 03D0013D
>writing sel_clk 00040000
>writing reg594 00000000
>NVCrtcSetBase: x: 0 y: 0
>nv_output_mode_set is called
>1: crtc 0 output 0 twocrt 0 twomon 0
>(II) NOUVEAU(0): 0xC25D: Parsing digital output script table
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x44, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 0xC25D: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xC25D: EXECUTING SUB-ROUTINE AT 0xC280
>(II) NOUVEAU(0): 0xC280: [ (0x6E) - INIT_NV_REG ]
>(II) NOUVEAU(0): 0xC280: Reg: 0x00680880, Mask: 0xDFFFFFFF, Data: 0x00000000
>(II) NOUVEAU(0): 	Read:  Reg: 0x00680880, Data: 0x01101191
>(II) NOUVEAU(0): 	Write: Reg: 0x00680880, Data: 0x01101191
>(II) NOUVEAU(0): 0xC28D: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xC25D: END OF SUB-ROUTINE AT 0xC280
>(II) NOUVEAU(0): 0xC260: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0xC260: EXECUTING SUB-ROUTINE AT 0x8D06
>(II) NOUVEAU(0): 0x8D06: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0x8D06: EXECUTING SUB-ROUTINE AT 0x8D36
>(II) NOUVEAU(0): 0x8D36: [ (0x50) - INIT_ZM_TMDS_GROUP ]
>(II) NOUVEAU(0): 0x8D36: MagicLookupValue: 0x80, Count: 0x0F
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x000000F1
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000001
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000090
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000002
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000029
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000005
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002E
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x0000002D
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000040
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000008
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000041
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000043
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000080
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000004
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000068
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000005
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002F
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000030
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000031
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000032
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000033
>(II) NOUVEAU(0): 0x8D57: [ (0x50) - INIT_ZM_TMDS_GROUP ]
>(II) NOUVEAU(0): 0x8D57: MagicLookupValue: 0x81, Count: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x006808BC, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B8, Data: 0x00000004
>(II) NOUVEAU(0): 0x8D5C: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0x8D06: END OF SUB-ROUTINE AT 0x8D36
>(II) NOUVEAU(0): 0x8D09: [ (0x5B) - INIT_SUB_DIRECT ]
>(II) NOUVEAU(0): 0x8D09: EXECUTING SUB-ROUTINE AT 0x8D7D
>(II) NOUVEAU(0): 0x8D7D: [ (0x50) - INIT_ZM_TMDS_GROUP ]
>(II) NOUVEAU(0): 0x8D7D: MagicLookupValue: 0x80, Count: 0x01
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000008
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002F
>(II) NOUVEAU(0): 0x8D82: [ (0x74) - INIT_TIME ]
>(II) NOUVEAU(0): 0x8D82: Sleeping for 0xC350 microseconds
>(II) NOUVEAU(0): 0x8D85: [ (0x50) - INIT_ZM_TMDS_GROUP ]
>(II) NOUVEAU(0): 0x8D85: MagicLookupValue: 0x80, Count: 0x02
>(II) NOUVEAU(0): 	Indexed write: Port: 0x03D4, Index: 0x57, Head: 0x00, Data: 0x00
>(II) NOUVEAU(0): 	Indexed read:  Port: 0x03D4, Index: 0x58, Head: 0x00, Data: 0x01
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000021
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002F
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x0000002C
>(II) NOUVEAU(0): 0x8D8C: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0x8D09: END OF SUB-ROUTINE AT 0x8D7D
>(II) NOUVEAU(0): 0x8D0C: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 0xC260: END OF SUB-ROUTINE AT 0x8D06
>(II) NOUVEAU(0): 0xC263: [ (0x71) - INIT_DONE ]
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B4, Data: 0x00000080
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B0, Data: 0x00000004
>(II) NOUVEAU(0): 	Write: Reg: 0x006808BC, Data: 0x00000000
>(II) NOUVEAU(0): 	Write: Reg: 0x006808B8, Data: 0x00000004
>nv_crtc_commit for CRTC 0
>nv_crtc_dpms is called for CRTC 0 with mode 0
>pre-Owner: 0x0
>post-Owner: 0x0
>nv_output_commit is called
>nv_tmds_output_dpms is called with mode 0
>nv_tmds_output_dpms is called for CRTC 0 with mode 0
>nv_analog_output_dpms is called with mode 3
>nv_analog_output_dpms is called with mode 3
>nv_crtc_dpms is called for CRTC 1 with mode 3
>pre-Owner: 0x0
>post-Owner: 0x3
>pre-Owner: 0x3
>post-Owner: 0x0
>(II) EXA(0): Offscreen pixmap area of 125861888 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(II)         UploadToScreen
>(II)         DownloadFromScreen
>(==) NOUVEAU(0): Backing store disabled
>(==) NOUVEAU(0): Silken mouse enabled
>(II) NOUVEAU(0): [DRI] installation complete
>(II) NOUVEAU(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>pre-Owner: 0x0
>post-Owner: 0x0
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenByBusid: drmOpenMinor returns 11
>drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>(EE) AIGLX error: dlopen of /usr/lib/dri/nouveau_dri.so failed (/usr/lib/dri/nouveau_dri.so: cannot open shared object file: No such file or directory)
>(EE) AIGLX: reverting to software rendering
>(II) Loading sub module "GLcore"
>(II) LoadModule: "GLcore"
>(II) Loading /usr/lib/xorg/modules//extensions/libGLcore.so
>(II) Module GLcore: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) GLX: Initialized MESA-PROXY GL provider for screen 0
>(II) NOUVEAU(0): Setting screen physical size to 885 x 498
>nv_xf86crtc_resize is called with 1360x768 resolution
>(WW) <default pointer>: No Device specified, looking for one...
>(II) <default pointer>: Setting Device option to "/dev/input/mice"
>(--) <default pointer>: Device: "/dev/input/mice"
>(==) <default pointer>: Protocol: "Auto"
>(**) Option "CorePointer"
>(**) <default pointer>: Core Pointer
>(==) <default pointer>: Emulate3Buttons, Emulate3Timeout: 50
>(**) <default pointer>: ZAxisMapping: buttons 4 and 5
>(**) <default pointer>: Buttons: 9
>(**) <default pointer>: Sensitivity: 1
>(**) Option "CoreKeyboard"
>(**) <default keyboard>: Core Keyboard
>(**) Option "Protocol" "standard"
>(**) <default keyboard>: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) <default keyboard>: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) <default keyboard>: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) <default keyboard>: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) <default keyboard>: CustomKeycodes disabled
>(II) XINPUT: Adding extended input device "<default keyboard>" (type: KEYBOARD)
>(II) XINPUT: Adding extended input device "<default pointer>" (type: MOUSE)
>(II) <default pointer>: Setting mouse protocol to "ExplorerPS/2"
>(II) <default pointer>: ps2EnableDataReporting: succeeded
>pre-Owner: 0x0
>post-Owner: 0x0

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Attachments on bug 13865: 13442 | 13443 | 13444 | 13445

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