Attachment 134633 Details for Bug 103070 – Fix CSR not loaded WARN.

[patch] Fix CSR not loaded WARN.

0001-drm-i915-cnl-Reprogram-DMC-firmware-after-S3-S4-resu.patch (text/plain), 1.04 KB, created by Imre Deak on 2017-10-03 08:56:26 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Imre Deak

Created: 2017-10-03 08:56:26 UTC

Size: 1.04 KB

patch

obsolete

>From 72c50535aed8a45d5fa358a4f2e373bae1886ca6 Mon Sep 17 00:00:00 2001
>From: Imre Deak <imre.deak@intel.com>
>Date: Tue, 3 Oct 2017 11:54:06 +0300
>Subject: [PATCH] drm/i915/cnl: Reprogram DMC firmware after S3/S4 resume
>
>The DMC firmware program memory is lost after S3/S4 system suspend, so
>we need to reprogram it during resume.
>
>Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>Signed-off-by: Imre Deak <imre.deak@intel.com>
>---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
>index 7933d1bc6a1c..3791c3f5f56d 100644
>--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>@@ -2809,6 +2809,9 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
> 
> 	/* 6. Enable DBUF */
> 	gen9_dbuf_enable(dev_priv);
>+
>+	if (resume && dev_priv->csr.dmc_payload)
>+		intel_csr_load_program(dev_priv);
> }
> 
> static void cnl_display_core_uninit(struct drm_i915_private *dev_priv)
>-- 
>2.13.2
>

Actions: View | Splinter Review

Attachments on bug 103070: 134633

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.