Attachment 135214 Details for Bug 92317 – dmesg log

dmesg log

file_92317.txt (text/plain), 80.51 KB, created by Elizabeth on 2017-11-02 20:52:21 UTC

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Creator: Elizabeth

Created: 2017-11-02 20:52:21 UTC

Size: 80.51 KB

patch

obsolete

>[11874.738222] [IGT] pm_rpm: executing
>[11874.777067] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[11874.812156] [drm:drm_mode_addfb2 [drm]] [FB:128]
>[11874.825706] ahci 0000:00:12.0: port does not support device sleep
>[11875.826212] [IGT] pm_rpm: starting subtest basic-pci-d3-state
>[11875.826312] [drm:drm_mode_setcrtc [drm]] [CRTC:42:pipe A]
>[11875.826368] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b69ac800
>[11875.826414] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b9469000 state to ffff9566b69ac800
>[11875.826453] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff9566b97fff00 state to ffff9566b69ac800
>[11875.826491] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff9566b9469000
>[11875.826581] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97fff00 to [NOCRTC]
>[11875.826615] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97fff00
>[11875.826651] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b69ac800
>[11875.826689] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff9566b167bf00 state to ffff9566b69ac800
>[11875.826724] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167bf00 to [NOCRTC]
>[11875.826759] [drm:drm_atomic_check_only [drm]] checking ffff9566b69ac800
>[11875.826786] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[11875.826805] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[11875.826823] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[11875.826842] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[11875.826860] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:76:eDP-1]
>[11875.826881] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: n, active: n
>[11875.826916] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b69ac800
>[11875.827043] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11875.827140] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11875.827240] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb -1
>[11875.827333] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[11875.827381] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b946f000 state to ffff9566b69ac800
>[11875.827422] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff9566b97ff900 state to ffff9566b69ac800
>[11875.827460] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b946a800 state to ffff9566b69ac800
>[11875.827498] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b97ffd00 state to ffff9566b69ac800
>[11875.827591] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 332) -> (0 - 0)
>[11875.827675] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (332 - 340) -> (0 - 0)
>[11875.827758] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (340 - 672) -> (0 - 502)
>[11875.827841] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (672 - 680) -> (502 - 510)
>[11875.827924] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (680 - 1012) -> (510 - 1012)
>[11875.827960] [drm:drm_atomic_commit [drm]] committing ffff9566b69ac800
>[11875.828114] [drm:intel_edp_backlight_off [i915]] 
>[11876.032710] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[11876.032832] [drm:intel_disable_pipe [i915]] disabling pipe A
>[11876.041163] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[11876.041265] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[11876.041523] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[11876.041611] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[11876.041702] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>[11876.091795] [drm:wait_panel_status [i915]] Wait complete
>[11876.091891] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[11876.094187] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[11876.094294] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[11876.094412] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[11876.094504] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[11876.094593] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[11876.094678] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[11876.094809] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11876.094912] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[11876.095004] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11876.095091] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11876.095178] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11876.095263] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11876.095347] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11876.095437] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:76:eDP-1]
>[11876.095527] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11876.095614] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11876.095716] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11876.105142] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[11876.105221] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b69ac800
>[11876.105272] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b69ac800
>[11876.105340] [drm:drm_mode_setcrtc [drm]] [CRTC:58:pipe B]
>[11876.105387] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b69ac800
>[11876.105428] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b946b800 state to ffff9566b69ac800
>[11876.105467] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff9566b97ff000 state to ffff9566b69ac800
>[11876.105505] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff9566b946b800
>[11876.105539] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ff000 to [NOCRTC]
>[11876.105575] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97ff000
>[11876.105610] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b69ac800
>[11876.105653] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff9566b167b300 state to ffff9566b69ac800
>[11876.105688] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167b300 to [NOCRTC]
>[11876.105725] [drm:drm_atomic_check_only [drm]] checking ffff9566b69ac800
>[11876.105755] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[11876.105773] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[11876.105792] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[11876.105811] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[11876.105829] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:84:DP-1]
>[11876.105849] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: n, active: n
>[11876.105884] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b69ac800
>[11876.105995] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11876.106090] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11876.106192] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb -1
>[11876.106285] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[11876.106330] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b946a000 state to ffff9566b69ac800
>[11876.106370] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b946c800 state to ffff9566b69ac800
>[11876.106416] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b97ff300 state to ffff9566b69ac800
>[11876.106510] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 502) -> (0 - 0)
>[11876.106594] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (502 - 510) -> (0 - 0)
>[11876.106677] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (510 - 1012) -> (0 - 988)
>[11876.106760] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (1012 - 1020) -> (988 - 1020)
>[11876.106795] [drm:drm_atomic_commit [drm]] committing ffff9566b69ac800
>[11876.106961] [drm:intel_disable_pipe [i915]] disabling pipe B
>[11876.121166] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[11876.123441] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[11876.123540] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[11876.123630] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11876.123696] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11876.123762] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11876.123824] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11876.123886] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11876.123947] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11876.124012] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:84:DP-1]
>[11876.124077] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11876.124142] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11876.124205] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11876.138506] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[11876.138582] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b69ac800
>[11876.138632] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b69ac800
>[11876.138701] [drm:drm_mode_setcrtc [drm]] [CRTC:74:pipe C]
>[11876.138747] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b69ac800
>[11876.138793] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b946a800 state to ffff9566b69ac800
>[11876.138832] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b97ffd00 state to ffff9566b69ac800
>[11876.138870] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff9566b946a800
>[11876.138904] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ffd00 to [NOCRTC]
>[11876.138940] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97ffd00
>[11876.138975] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b69ac800
>[11876.139017] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff9566b167bb80 state to ffff9566b69ac800
>[11876.139054] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167bb80 to [NOCRTC]
>[11876.139090] [drm:drm_atomic_check_only [drm]] checking ffff9566b69ac800
>[11876.139119] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] mode changed
>[11876.139137] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] enable changed
>[11876.139155] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] active changed
>[11876.139175] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[11876.139193] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:91:HDMI-A-2]
>[11876.139213] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: n, active: n
>[11876.139248] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b69ac800
>[11876.139364] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11876.139458] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11876.139558] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:74:pipe C] has [PLANE:59:plane 1C] with fb -1
>[11876.139649] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:59:plane 1C] visible 1 -> 0, off 1, on 0, ms 1
>[11876.139699] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b946f000 state to ffff9566b69ac800
>[11876.139738] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b9469000 state to ffff9566b69ac800
>[11876.139832] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (0 - 988) -> (0 - 0)
>[11876.139918] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (988 - 1020) -> (0 - 0)
>[11876.139957] [drm:drm_atomic_commit [drm]] committing ffff9566b69ac800
>[11876.140110] [drm:intel_disable_pipe [i915]] disabling pipe C
>[11876.155325] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[11876.156770] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 4, on? 1) for crtc 74
>[11876.156879] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
>[11876.156980] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11876.157055] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11876.157130] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11876.157203] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11876.157275] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11876.157345] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11876.157423] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:91:HDMI-A-2]
>[11876.157496] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11876.157569] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11876.157643] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11876.157732] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[11876.157791] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b69ac800
>[11876.157831] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b69ac800
>[11886.184964] [IGT] pm_rpm: exiting, ret=99
>[11886.208639] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b69ac800
>[11886.208676] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff9566ba350800 state to ffff9566b69ac800
>[11886.208706] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:30:plane 2A] ffff9566ba350500 state to ffff9566b69ac800
>[11886.208733] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566ba350500 to [NOCRTC]
>[11886.208758] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566ba350500
>[11886.208786] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 3A] ffff9566ba350b00 state to ffff9566b69ac800
>[11886.208811] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566ba350b00 to [NOCRTC]
>[11886.208835] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566ba350b00
>[11886.208861] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:plane 4A] ffff9566ba350d00 state to ffff9566b69ac800
>[11886.208887] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566ba350d00 to [NOCRTC]
>[11886.208911] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566ba350d00
>[11886.208938] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:39:cursor A] ffff9566b2327400 state to ffff9566b69ac800
>[11886.208962] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b2327400 to [NOCRTC]
>[11886.208987] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b2327400
>[11886.209014] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff9566b97ff300 state to ffff9566b69ac800
>[11886.209041] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:46:plane 2B] ffff9566b97ff200 state to ffff9566b69ac800
>[11886.209065] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ff200 to [NOCRTC]
>[11886.209090] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97ff200
>[11886.209119] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 3B] ffff9566b97ffa00 state to ffff9566b69ac800
>[11886.209142] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ffa00 to [NOCRTC]
>[11886.209167] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97ffa00
>[11886.209193] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 4B] ffff9566b97ff900 state to ffff9566b69ac800
>[11886.209217] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ff900 to [NOCRTC]
>[11886.209241] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97ff900
>[11886.209268] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:55:cursor B] ffff9566b3cc5300 state to ffff9566b69ac800
>[11886.209292] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b3cc5300 to [NOCRTC]
>[11886.209316] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b3cc5300
>[11886.209341] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b3cc5500 state to ffff9566b69ac800
>[11886.209368] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 2C] ffff9566b3cc5400 state to ffff9566b69ac800
>[11886.209392] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b3cc5400 to [NOCRTC]
>[11886.209416] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b3cc5400
>[11886.209442] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:65:plane 3C] ffff9566b3cc5100 state to ffff9566b69ac800
>[11886.209466] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b3cc5100 to [NOCRTC]
>[11886.209490] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b3cc5100
>[11886.209519] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:68:plane 4C] ffff9566b3cc5900 state to ffff9566b69ac800
>[11886.209543] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b3cc5900 to [NOCRTC]
>[11886.209567] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b3cc5900
>[11886.209595] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:71:cursor C] ffff9566b3cc5f00 state to ffff9566b69ac800
>[11886.209619] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b3cc5f00 to [NOCRTC]
>[11886.209643] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b3cc5f00
>[11886.209676] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b946c800 state to ffff9566b69ac800
>[11886.209710] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff9566b946c800
>[11886.209735] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566ba350800 to [CRTC:42:pipe A]
>[11886.209762] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:123] for plane state ffff9566ba350800
>[11886.209789] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b69ac800
>[11886.209821] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff9566b167bc80 state to ffff9566b69ac800
>[11886.209845] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167bc80 to [CRTC:42:pipe A]
>[11886.209877] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b946b800 state to ffff9566b69ac800
>[11886.209904] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff9566b946b800
>[11886.209928] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ff300 to [CRTC:58:pipe B]
>[11886.209953] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:123] for plane state ffff9566b97ff300
>[11886.209977] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b69ac800
>[11886.210006] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff9566b167b200 state to ffff9566b69ac800
>[11886.210031] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167b200 to [CRTC:58:pipe B]
>[11886.210059] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b946a000 state to ffff9566b69ac800
>[11886.210089] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff9566b946a000
>[11886.210113] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b3cc5500 to [CRTC:74:pipe C]
>[11886.210137] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:123] for plane state ffff9566b3cc5500
>[11886.210162] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b69ac800
>[11886.210190] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff9566b167b380 state to ffff9566b69ac800
>[11886.210217] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167b380 to [CRTC:74:pipe C]
>[11886.210242] [drm:drm_atomic_check_only [drm]] checking ffff9566b69ac800
>[11886.210266] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[11886.210280] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[11886.210294] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[11886.210307] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[11886.210320] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[11886.210333] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[11886.210345] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] mode changed
>[11886.210358] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] enable changed
>[11886.210373] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] active changed
>[11886.210391] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[11886.210407] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] using [ENCODER:75:DDI A] on [CRTC:42:pipe A]
>[11886.210420] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[11886.210434] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:58:pipe B]
>[11886.210447] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[11886.210461] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] using [ENCODER:90:DDI C] on [CRTC:74:pipe C]
>[11886.210475] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[11886.210500] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b69ac800
>[11886.210515] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[11886.210540] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b69ac800
>[11886.210555] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: y, active: y
>[11886.210580] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b69ac800
>[11886.210609] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b69ac800
>[11886.210704] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[11886.210774] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[11886.210811] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[11886.210889] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[11886.210974] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[11886.211040] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[11886.211112] [drm:intel_psr_compute_config [i915]] PSR disable by flag
>[11886.211185] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[11886.211257] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[11886.211323] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[11886.211390] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[11886.211456] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[11886.211521] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[11886.211583] [drm:intel_dump_pipe_config [i915]] requested mode:
>[11886.211614] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[11886.211676] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[11886.211706] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[11886.211771] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[11886.211834] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[11886.211897] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[11886.211960] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[11886.212022] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[11886.212095] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[11886.212157] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[11886.212220] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[11886.212282] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[11886.212344] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[11886.212406] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[11886.212500] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[11886.213343] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b69ac800
>[11886.213424] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[11886.213496] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[11886.213568] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[11886.213640] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[11886.213706] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[11886.213775] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[11886.213843] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[11886.213911] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[11886.213977] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[11886.214046] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[11886.214109] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[11886.214172] [drm:intel_dump_pipe_config [i915]] requested mode:
>[11886.214204] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11886.214268] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[11886.214300] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11886.214367] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[11886.214430] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[11886.214494] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[11886.214556] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[11886.214620] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[11886.214691] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[11886.214755] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[11886.214817] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[11886.214881] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[11886.214943] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[11886.215006] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[11886.215072] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[11886.215106] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b69ac800
>[11886.215171] [drm:intel_atomic_check [i915]] [CONNECTOR:91:HDMI-A-2] checking for sink bpp constrains
>[11886.215239] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[11886.215316] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[11886.215381] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[11886.215450] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[11886.215514] [drm:intel_dump_pipe_config [i915]] [CRTC:74:pipe C][modeset]
>[11886.215579] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[11886.215643] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
>[11886.215707] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>[11886.215770] [drm:intel_dump_pipe_config [i915]] requested mode:
>[11886.215804] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11886.215866] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[11886.215899] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11886.215963] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[11886.216030] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>[11886.216093] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[11886.216156] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[11886.216218] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[11886.216288] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[11886.216350] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[11886.216414] [drm:intel_dump_pipe_config [i915]] [PLANE:59:plane 1C] disabled, scaler_id = -1
>[11886.216514] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 2C] disabled, scaler_id = -1
>[11886.216549] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 3C] disabled, scaler_id = -1
>[11886.216584] [drm:intel_dump_pipe_config [i915]] [PLANE:68:plane 4C] disabled, scaler_id = -1
>[11886.216618] [drm:intel_dump_pipe_config [i915]] [PLANE:71:cursor C] disabled, scaler_id = -1
>[11886.216659] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11886.216697] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11886.216742] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 123
>[11886.216777] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[11886.216813] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 123
>[11886.216848] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[11886.216885] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:74:pipe C] has [PLANE:59:plane 1C] with fb 123
>[11886.216920] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:59:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>[11886.216961] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[11886.216996] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[11886.217037] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[11886.217073] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[11886.217111] [drm:bxt_get_dpll [i915]] [CRTC:74:pipe C] using pre-allocated PORT PLL C
>[11886.217147] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>[11886.217197] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 332)
>[11886.217230] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (332 - 340)
>[11886.217263] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (340 - 672)
>[11886.217295] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (672 - 680)
>[11886.217328] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (0 - 0) -> (680 - 1012)
>[11886.217360] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (0 - 0) -> (1012 - 1020)
>[11886.217377] [drm:drm_atomic_commit [drm]] committing ffff9566b69ac800
>[11886.217441] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11886.217477] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11886.217512] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11886.217547] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11886.217583] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11886.217618] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11886.217652] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11886.217692] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11886.217725] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11886.217799] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[11886.217833] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[11886.217997] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[11886.218033] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[11886.218074] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
>[11886.218110] [drm:wait_panel_status [i915]] Wait complete
>[11886.218146] [drm:edp_panel_on [i915]] Wait for panel power on
>[11886.218188] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>[11886.244872] ahci 0000:00:12.0: port does not support device sleep
>[11886.320430] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[11886.320511] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[11886.320545] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[11886.320678] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[11886.418379] [drm:wait_panel_status [i915]] Wait complete
>[11886.418461] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[11886.418570] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[11886.418649] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[11886.419802] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[11886.419871] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11886.419943] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[11886.420931] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[11886.421007] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11886.421656] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[11886.421732] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[11886.422685] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[11886.422765] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[11886.423314] [drm:intel_enable_pipe [i915]] enabling pipe A
>[11886.423380] [drm:intel_edp_backlight_on [i915]] 
>[11886.423437] [drm:intel_panel_enable_backlight [i915]] pipe A
>[11886.423496] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000
>[11886.428513] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[11886.428588] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[11886.428645] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[11886.428774] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[11886.428830] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[11886.429007] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[11886.430965] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[11886.431019] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11886.431077] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[11886.433646] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[11886.433698] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11886.436355] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[11886.436402] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[11886.439655] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[11886.441914] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[11886.442699] [drm:intel_enable_pipe [i915]] enabling pipe B
>[11886.442753] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[11886.442852] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 74
>[11886.442891] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>[11886.443043] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[11886.443428] [drm:intel_enable_pipe [i915]] enabling pipe C
>[11886.460607] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:76:eDP-1]
>[11886.460685] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[11886.460795] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11886.460902] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:84:DP-1]
>[11886.460962] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[11886.461104] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11886.461207] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:91:HDMI-A-2]
>[11886.461287] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[11886.461377] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11886.461465] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b69ac800
>[11886.461502] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b69ac800
>[11889.628690] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[11889.628793] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>[11896.170042] [IGT] pm_rpm: executing
>[11896.465152] [drm:drm_mode_addfb2 [drm]] [FB:126]
>[11896.502193] [drm:drm_mode_addfb2 [drm]] [FB:128]
>[11896.515653] ahci 0000:00:12.0: port does not support device sleep
>[11897.516129] [IGT] pm_rpm: starting subtest basic-rte
>[11897.516216] [drm:drm_mode_setcrtc [drm]] [CRTC:42:pipe A]
>[11897.516267] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b4988400
>[11897.516308] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b9468000 state to ffff9566b4988400
>[11897.516344] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff9566b557cc00 state to ffff9566b4988400
>[11897.516377] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff9566b9468000
>[11897.516476] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b557cc00 to [NOCRTC]
>[11897.516507] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b557cc00
>[11897.516815] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b4988400
>[11897.516850] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff9566b167b300 state to ffff9566b4988400
>[11897.516882] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167b300 to [NOCRTC]
>[11897.516913] [drm:drm_atomic_check_only [drm]] checking ffff9566b4988400
>[11897.516941] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[11897.516958] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[11897.516974] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[11897.516991] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[11897.517010] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:76:eDP-1]
>[11897.517029] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: n, active: n
>[11897.517060] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b4988400
>[11897.517175] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11897.517262] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11897.517355] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb -1
>[11897.517438] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[11897.517483] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b9469800 state to ffff9566b4988400
>[11897.517521] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff9566b557cd00 state to ffff9566b4988400
>[11897.517557] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b946d800 state to ffff9566b4988400
>[11897.517590] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b557c300 state to ffff9566b4988400
>[11897.517676] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 332) -> (0 - 0)
>[11897.517751] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (332 - 340) -> (0 - 0)
>[11897.517828] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (340 - 672) -> (0 - 502)
>[11897.517902] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (672 - 680) -> (502 - 510)
>[11897.517979] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (680 - 1012) -> (510 - 1012)
>[11897.518012] [drm:drm_atomic_commit [drm]] committing ffff9566b4988400
>[11897.518153] [drm:intel_edp_backlight_off [i915]] 
>[11897.724688] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[11897.724807] [drm:intel_disable_pipe [i915]] disabling pipe A
>[11897.731000] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[11897.731103] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[11897.731363] [drm:intel_edp_panel_off.part.29 [i915]] Turn eDP port A panel power off
>[11897.731450] [drm:intel_edp_panel_off.part.29 [i915]] Wait for panel power off time
>[11897.731540] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>[11897.782167] [drm:wait_panel_status [i915]] Wait complete
>[11897.782263] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>[11897.784564] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[11897.784671] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[11897.784775] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[11897.784912] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[11897.785011] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 42
>[11897.785129] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[11897.785215] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>[11897.785332] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11897.785427] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11897.785518] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11897.785607] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11897.785695] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11897.785783] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11897.785875] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:76:eDP-1]
>[11897.785968] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11897.786058] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11897.786163] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11897.793837] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[11897.793879] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b4988400
>[11897.793901] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b4988400
>[11897.793937] [drm:drm_mode_setcrtc [drm]] [CRTC:58:pipe B]
>[11897.793958] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b4988400
>[11897.793976] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b946a000 state to ffff9566b4988400
>[11897.793992] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff9566b557cf00 state to ffff9566b4988400
>[11897.794006] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff9566b946a000
>[11897.794020] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b557cf00 to [NOCRTC]
>[11897.794034] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b557cf00
>[11897.794048] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b4988400
>[11897.794064] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff9566b167bc80 state to ffff9566b4988400
>[11897.794078] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b167bc80 to [NOCRTC]
>[11897.794092] [drm:drm_atomic_check_only [drm]] checking ffff9566b4988400
>[11897.794105] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[11897.794113] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[11897.794120] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[11897.794128] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[11897.794135] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:84:DP-1]
>[11897.794144] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: n, active: n
>[11897.794158] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b4988400
>[11897.794208] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11897.794246] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11897.794292] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb -1
>[11897.794328] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>[11897.794349] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b946b800 state to ffff9566b4988400
>[11897.794365] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b946c800 state to ffff9566b4988400
>[11897.794383] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b9735c00 state to ffff9566b4988400
>[11897.794425] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 502) -> (0 - 0)
>[11897.794461] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (502 - 510) -> (0 - 0)
>[11897.794494] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (510 - 1012) -> (0 - 988)
>[11897.794527] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (1012 - 1020) -> (988 - 1020)
>[11897.794542] [drm:drm_atomic_commit [drm]] committing ffff9566b4988400
>[11897.794621] [drm:intel_disable_pipe [i915]] disabling pipe B
>[11897.811233] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[11897.812666] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 58
>[11897.812759] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[11897.812842] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11897.812907] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11897.812967] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11897.813025] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11897.813084] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11897.813141] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11897.813203] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:84:DP-1]
>[11897.813264] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11897.813325] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11897.813383] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11897.827230] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[11897.827287] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b4988400
>[11897.827321] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b4988400
>[11897.827373] [drm:drm_mode_setcrtc [drm]] [CRTC:74:pipe C]
>[11897.827405] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b589d800
>[11897.827438] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b5948800 state to ffff9566b589d800
>[11897.827466] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b158ff00 state to ffff9566b589d800
>[11897.827492] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for CRTC state ffff9566b5948800
>[11897.827514] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b158ff00 to [NOCRTC]
>[11897.827539] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b158ff00
>[11897.827562] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b589d800
>[11897.827593] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff9566b544ad80 state to ffff9566b589d800
>[11897.827617] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b544ad80 to [NOCRTC]
>[11897.827642] [drm:drm_atomic_check_only [drm]] checking ffff9566b589d800
>[11897.827663] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] mode changed
>[11897.827676] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] enable changed
>[11897.827688] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] active changed
>[11897.827701] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[11897.827712] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:91:HDMI-A-2]
>[11897.827726] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: n, active: n
>[11897.827749] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b589d800
>[11897.827828] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11897.827891] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11897.827961] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:74:pipe C] has [PLANE:59:plane 1C] with fb -1
>[11897.828022] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:59:plane 1C] visible 1 -> 0, off 1, on 0, ms 1
>[11897.828057] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b594b800 state to ffff9566b589d800
>[11897.828083] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b5948000 state to ffff9566b589d800
>[11897.828149] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (0 - 988) -> (0 - 0)
>[11897.828207] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (988 - 1020) -> (0 - 0)
>[11897.828231] [drm:drm_atomic_commit [drm]] committing ffff9566b589d800
>[11897.828396] [drm:intel_disable_pipe [i915]] disabling pipe C
>[11897.845606] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>[11897.847889] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 4, on? 1) for crtc 74
>[11897.848006] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
>[11897.848117] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11897.848200] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11897.848281] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11897.848359] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11897.848437] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11897.848573] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11897.848661] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:91:HDMI-A-2]
>[11897.848741] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11897.848827] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11897.848908] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11897.849006] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[11897.849073] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b589d800
>[11897.849119] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b589d800
>[11907.879101] [IGT] pm_rpm: exiting, ret=99
>[11907.899086] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff9566b589ec00
>[11907.899118] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff9566b97ffe00 state to ffff9566b589ec00
>[11907.899141] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:30:plane 2A] ffff9566b97ff300 state to ffff9566b589ec00
>[11907.899162] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ff300 to [NOCRTC]
>[11907.899182] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97ff300
>[11907.899203] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 3A] ffff9566b97fff00 state to ffff9566b589ec00
>[11907.899222] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97fff00 to [NOCRTC]
>[11907.899241] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97fff00
>[11907.899262] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:plane 4A] ffff9566b97ff000 state to ffff9566b589ec00
>[11907.899281] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ff000 to [NOCRTC]
>[11907.899300] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b97ff000
>[11907.899324] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:39:cursor A] ffff9566b776d400 state to ffff9566b589ec00
>[11907.899343] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b776d400 to [NOCRTC]
>[11907.899362] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b776d400
>[11907.899385] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 1B] ffff9566b776d200 state to ffff9566b589ec00
>[11907.899406] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:46:plane 2B] ffff9566b776df00 state to ffff9566b589ec00
>[11907.899424] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b776df00 to [NOCRTC]
>[11907.899443] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b776df00
>[11907.899467] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:plane 3B] ffff9566b776d700 state to ffff9566b589ec00
>[11907.899486] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b776d700 to [NOCRTC]
>[11907.899504] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b776d700
>[11907.899524] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 4B] ffff9566b776dc00 state to ffff9566b589ec00
>[11907.899543] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b776dc00 to [NOCRTC]
>[11907.899562] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b776dc00
>[11907.899584] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:55:cursor B] ffff9566b158fa00 state to ffff9566b589ec00
>[11907.899603] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b158fa00 to [NOCRTC]
>[11907.899622] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b158fa00
>[11907.899644] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:plane 1C] ffff9566b158f500 state to ffff9566b589ec00
>[11907.899665] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 2C] ffff9566b158f300 state to ffff9566b589ec00
>[11907.899684] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b158f300 to [NOCRTC]
>[11907.899702] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b158f300
>[11907.899725] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:65:plane 3C] ffff9566b158fe00 state to ffff9566b589ec00
>[11907.899744] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b158fe00 to [NOCRTC]
>[11907.899762] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b158fe00
>[11907.899785] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:68:plane 4C] ffff9566b158f000 state to ffff9566b589ec00
>[11907.899804] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b158f000 to [NOCRTC]
>[11907.899822] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b158f000
>[11907.899843] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:71:cursor C] ffff9566b158f400 state to ffff9566b589ec00
>[11907.899861] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b158f400 to [NOCRTC]
>[11907.899880] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff9566b158f400
>[11907.899903] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:42:pipe A] ffff9566b594a800 state to ffff9566b589ec00
>[11907.899930] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff9566b594a800
>[11907.899949] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b97ffe00 to [CRTC:42:pipe A]
>[11907.899970] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:123] for plane state ffff9566b97ffe00
>[11907.899990] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b589ec00
>[11907.900014] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:76:eDP-1] ffff9566b544a700 state to ffff9566b589ec00
>[11907.900033] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b544a700 to [CRTC:42:pipe A]
>[11907.900054] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:58:pipe B] ffff9566b594e000 state to ffff9566b589ec00
>[11907.900075] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff9566b594e000
>[11907.900094] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b776d200 to [CRTC:58:pipe B]
>[11907.900114] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:123] for plane state ffff9566b776d200
>[11907.900135] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b589ec00
>[11907.900156] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:84:DP-1] ffff9566b544af00 state to ffff9566b589ec00
>[11907.900175] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b544af00 to [CRTC:58:pipe B]
>[11907.900196] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:74:pipe C] ffff9566b594e800 state to ffff9566b589ec00
>[11907.900217] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff9566b594e800
>[11907.900236] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff9566b158f500 to [CRTC:74:pipe C]
>[11907.900255] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:123] for plane state ffff9566b158f500
>[11907.900274] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b589ec00
>[11907.900295] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:91:HDMI-A-2] ffff9566b544a800 state to ffff9566b589ec00
>[11907.900314] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff9566b544a800 to [CRTC:74:pipe C]
>[11907.900333] [drm:drm_atomic_check_only [drm]] checking ffff9566b589ec00
>[11907.900352] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] mode changed
>[11907.900363] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] enable changed
>[11907.900374] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] active changed
>[11907.900433] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] mode changed
>[11907.900448] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] enable changed
>[11907.900467] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] active changed
>[11907.900481] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] mode changed
>[11907.900495] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] enable changed
>[11907.900509] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] active changed
>[11907.902907] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:76:eDP-1]
>[11907.902927] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:76:eDP-1] using [ENCODER:75:DDI A] on [CRTC:42:pipe A]
>[11907.902945] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:84:DP-1]
>[11907.902962] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:84:DP-1] using [ENCODER:83:DDI B] on [CRTC:58:pipe B]
>[11907.902977] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:91:HDMI-A-2]
>[11907.902995] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:91:HDMI-A-2] using [ENCODER:90:DDI C] on [CRTC:74:pipe C]
>[11907.903010] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:42:pipe A] needs all connectors, enable: y, active: y
>[11907.903046] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b589ec00
>[11907.903066] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:58:pipe B] needs all connectors, enable: y, active: y
>[11907.903097] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b589ec00
>[11907.903119] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:74:pipe C] needs all connectors, enable: y, active: y
>[11907.903151] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b589ec00
>[11907.903184] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:42:pipe A] to ffff9566b589ec00
>[11907.903286] [drm:intel_atomic_check [i915]] [CONNECTOR:76:eDP-1] checking for sink bpp constrains
>[11907.903365] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[11907.903410] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[11907.903495] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>[11907.903591] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>[11907.903665] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>[11907.903745] [drm:intel_psr_compute_config [i915]] PSR disable by flag
>[11907.903826] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[11907.903907] [drm:intel_dump_pipe_config [i915]] [CRTC:42:pipe A][modeset]
>[11907.903980] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[11907.904056] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[11907.904127] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>[11907.904199] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[11907.904268] [drm:intel_dump_pipe_config [i915]] requested mode:
>[11907.904304] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[11907.904376] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[11907.904445] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>[11907.904521] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>[11907.904594] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>[11907.904667] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[11907.904739] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[11907.904813] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[11907.904895] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[11907.904968] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[11907.905040] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 1A] disabled, scaler_id = -1
>[11907.905113] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 2A] disabled, scaler_id = -1
>[11907.905185] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 3A] disabled, scaler_id = -1
>[11907.905256] [drm:intel_dump_pipe_config [i915]] [PLANE:36:plane 4A] disabled, scaler_id = -1
>[11907.905328] [drm:intel_dump_pipe_config [i915]] [PLANE:39:cursor A] disabled, scaler_id = -1
>[11907.905364] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:58:pipe B] to ffff9566b589ec00
>[11907.905440] [drm:intel_atomic_check [i915]] [CONNECTOR:84:DP-1] checking for sink bpp constrains
>[11907.905513] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[11907.905593] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>[11907.905669] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[11907.905747] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>[11907.905826] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[11907.905900] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe B][modeset]
>[11907.905970] [drm:intel_dump_pipe_config [i915]] output_types: DP (0x80)
>[11907.906046] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>[11907.906116] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>[11907.906184] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[11907.906252] [drm:intel_dump_pipe_config [i915]] requested mode:
>[11907.906287] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11907.906355] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[11907.906394] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11907.906468] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[11907.906537] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>[11907.906607] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[11907.906675] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[11907.906745] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[11907.906828] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[11907.906899] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[11907.906972] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 1B] disabled, scaler_id = -1
>[11907.907043] [drm:intel_dump_pipe_config [i915]] [PLANE:46:plane 2B] disabled, scaler_id = -1
>[11907.907111] [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3B] disabled, scaler_id = -1
>[11907.907181] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 4B] disabled, scaler_id = -1
>[11907.907249] [drm:intel_dump_pipe_config [i915]] [PLANE:55:cursor B] disabled, scaler_id = -1
>[11907.907284] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:74:pipe C] to ffff9566b589ec00
>[11907.907356] [drm:intel_atomic_check [i915]] [CONNECTOR:91:HDMI-A-2] checking for sink bpp constrains
>[11907.907428] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[11907.907516] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[11907.907588] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[11907.907662] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[11907.907737] [drm:intel_dump_pipe_config [i915]] [CRTC:74:pipe C][modeset]
>[11907.907808] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[11907.907877] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
>[11907.907947] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>[11907.908014] [drm:intel_dump_pipe_config [i915]] requested mode:
>[11907.908050] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11907.908119] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[11907.908155] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[11907.908226] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[11907.908294] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>[11907.908365] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[11907.908433] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[11907.908518] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[11907.908597] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[11907.908668] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[11907.908739] [drm:intel_dump_pipe_config [i915]] [PLANE:59:plane 1C] disabled, scaler_id = -1
>[11907.908812] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 2C] disabled, scaler_id = -1
>[11907.908883] [drm:intel_dump_pipe_config [i915]] [PLANE:65:plane 3C] disabled, scaler_id = -1
>[11907.908956] [drm:intel_dump_pipe_config [i915]] [PLANE:68:plane 4C] disabled, scaler_id = -1
>[11907.909026] [drm:intel_dump_pipe_config [i915]] [PLANE:71:cursor C] disabled, scaler_id = -1
>[11907.909107] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>[11907.909186] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 4, actual 4
>[11907.909271] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:42:pipe A] has [PLANE:27:plane 1A] with fb 123
>[11907.909344] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[11907.909417] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe B] has [PLANE:43:plane 1B] with fb 123
>[11907.909490] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:43:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>[11907.909564] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:74:pipe C] has [PLANE:59:plane 1C] with fb 123
>[11907.909636] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:59:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>[11907.909715] [drm:bxt_get_dpll [i915]] [CRTC:42:pipe A] using pre-allocated PORT PLL A
>[11907.909790] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>[11907.909869] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe B] using pre-allocated PORT PLL B
>[11907.909941] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>[11907.910021] [drm:bxt_get_dpll [i915]] [CRTC:74:pipe C] using pre-allocated PORT PLL C
>[11907.910090] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>[11907.911838] [drm:skl_compute_wm [i915]] [PLANE:27:plane 1A] ddb (0 - 0) -> (0 - 332)
>[11907.911866] [drm:skl_compute_wm [i915]] [PLANE:39:cursor A] ddb (0 - 0) -> (332 - 340)
>[11907.911893] [drm:skl_compute_wm [i915]] [PLANE:43:plane 1B] ddb (0 - 0) -> (340 - 672)
>[11907.911921] [drm:skl_compute_wm [i915]] [PLANE:55:cursor B] ddb (0 - 0) -> (672 - 680)
>[11907.911948] [drm:skl_compute_wm [i915]] [PLANE:59:plane 1C] ddb (0 - 0) -> (680 - 1012)
>[11907.911975] [drm:skl_compute_wm [i915]] [PLANE:71:cursor C] ddb (0 - 0) -> (1012 - 1020)
>[11907.911989] [drm:drm_atomic_commit [drm]] committing ffff9566b589ec00
>[11907.912043] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DDI A]
>[11907.912073] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI B]
>[11907.912106] [drm:intel_atomic_commit_tail [i915]] [ENCODER:85:DP-MST A]
>[11907.912136] [drm:intel_atomic_commit_tail [i915]] [ENCODER:86:DP-MST B]
>[11907.912165] [drm:intel_atomic_commit_tail [i915]] [ENCODER:87:DP-MST C]
>[11907.912192] [drm:intel_atomic_commit_tail [i915]] [ENCODER:90:DDI C]
>[11907.912223] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11907.912255] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11907.912285] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11907.912356] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 42
>[11907.912384] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>[11907.912704] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[11907.912735] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[11907.912771] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
>[11907.912801] [drm:wait_panel_status [i915]] Wait complete
>[11907.912831] [drm:edp_panel_on [i915]] Wait for panel power on
>[11907.912861] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 00000063
>[11908.015128] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>[11908.015191] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[11908.015247] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[11908.015363] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[11908.084578] ahci 0000:00:12.0: port does not support device sleep
>[11908.115072] [drm:wait_panel_status [i915]] Wait complete
>[11908.115173] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>[11908.115323] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[11908.115419] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>[11908.116879] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[11908.116978] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11908.117074] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[11908.117759] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[11908.117844] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11908.118497] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[11908.118583] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[11908.119544] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[11908.119634] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:76:eDP-1] Link Training Passed at Link Rate = 270000, Lane count = 2
>[11908.120227] [drm:intel_enable_pipe [i915]] enabling pipe A
>[11908.120329] [drm:intel_edp_backlight_on [i915]] 
>[11908.120421] [drm:intel_panel_enable_backlight [i915]] pipe A
>[11908.121079] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 96000
>[11908.121186] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[11908.121295] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>[11908.121386] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[11908.121571] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 58
>[11908.121661] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[11908.121886] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[11908.123879] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[11908.123964] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11908.124048] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[11908.126884] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 2
>[11908.126917] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[11908.129666] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[11908.129699] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[11908.132625] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[11908.134891] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:84:DP-1] Link Training Passed at Link Rate = 162000, Lane count = 4
>[11908.135703] [drm:intel_enable_pipe [i915]] enabling pipe B
>[11908.135747] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[11908.135835] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 74
>[11908.135865] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>[11908.136005] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>[11908.136378] [drm:intel_enable_pipe [i915]] enabling pipe C
>[11908.153515] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:76:eDP-1]
>[11908.153567] [drm:intel_atomic_commit_tail [i915]] [CRTC:42:pipe A]
>[11908.153735] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL A
>[11908.153824] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:84:DP-1]
>[11908.153868] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe B]
>[11908.153945] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL B
>[11908.154069] [drm:verify_connector_state.isra.112 [i915]] [CONNECTOR:91:HDMI-A-2]
>[11908.154111] [drm:intel_atomic_commit_tail [i915]] [CRTC:74:pipe C]
>[11908.154184] [drm:verify_single_dpll_state.isra.113 [i915]] PORT PLL C
>[11908.154273] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff9566b589ec00
>[11908.154301] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff9566b589ec00
>[11911.132688] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[11911.132790] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067

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Attachments on bug 92317: 118713 | 118714 | 135214

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