Attachment 138360 Details for Bug 92225 – successful test dmesg log

successful test dmesg log

file_92225.txt (text/plain), 42.62 KB, created by Elizabeth on 2018-03-26 17:43:20 UTC

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Creator: Elizabeth

Created: 2018-03-26 17:43:20 UTC

Size: 42.62 KB

patch

obsolete

>$ : dmesg -wH
>[Mar11 15:15] Console: switching to colour dummy device 80x25
>[  +0.000029] [IGT] pm_lpsp: executing
>[  +0.269956] [drm:intel_power_well_disable [i915]] disabling display
>[  +1.002121] [IGT] pm_lpsp: starting subtest edp-panel-fitter
>[  +0.000043] [drm:drm_mode_setcrtc] [CRTC:39:pipe A]
>[  +0.000039] [drm:drm_atomic_state_init] Allocated atomic state 00000000a6da303a
>[  +0.000015] [drm:drm_atomic_get_crtc_state] Added [CRTC:39:pipe A] 0000000076aa51c0 state to 00000000a6da303a
>[  +0.000013] [drm:drm_atomic_get_plane_state] Added [PLANE:28:primary A] 0000000034296602 state to 00000000a6da303a
>[  +0.000004] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 0000000076aa51c0
>[  +0.000004] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000034296602 to [NOCRTC]
>[  +0.000004] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000034296602
>[  +0.000005] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 00000000a6da303a
>[  +0.000018] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:65:eDP-1] 000000001af6b722 state to 00000000a6da303a
>[  +0.000005] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000001af6b722 to [NOCRTC]
>[  +0.000004] [drm:drm_atomic_check_only] checking 00000000a6da303a
>[  +0.000009] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] mode changed
>[  +0.000005] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] enable changed
>[  +0.000005] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] active changed
>[  +0.000006] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:65:eDP-1]
>[  +0.000005] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:65:eDP-1]
>[  +0.000007] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] needs all connectors, enable: n, active: n
>[  +0.000005] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 00000000a6da303a
>[  +0.000020] [drm:drm_atomic_get_crtc_state] Added [CRTC:51:pipe B] 00000000b6f5bff8 state to 00000000a6da303a
>[  +0.000010] [drm:drm_atomic_get_crtc_state] Added [CRTC:63:pipe C] 00000000a7e6bec7 state to 00000000a6da303a
>[  +0.000087] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 337500 kHz, actual 337500 kHz
>[  +0.000070] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 2, actual 2
>[  +0.000071] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:28:primary A] with fb -1
>[  +0.000066] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:primary A] visible 1 -> 0, off 1, on 0, ms 1
>[  +0.000011] [drm:drm_atomic_commit] committing 00000000a6da303a
>[  +0.015264] [drm:intel_edp_backlight_off [i915]]
>[  +0.206627] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  +0.000044] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  +0.008036] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  +0.000064] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  +0.000214] [drm:intel_edp_panel_off.part.34 [i915]] Turn eDP port A panel power off
>[  +0.000048] [drm:intel_edp_panel_off.part.34 [i915]] Wait for panel power off time
>[  +0.000051] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  +0.010908] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000061] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000056] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  +0.000070] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.020611] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000083] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000076] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  +0.000092] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.018301] [drm:wait_panel_status [i915]] Wait complete
>[  +0.000089] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  +0.000079] [drm:intel_disable_shared_dpll [i915]] disable LCPLL 2700 (active 1, on? 1) for crtc 39
>[  +0.000069] [drm:intel_disable_shared_dpll [i915]] disabling LCPLL 2700
>[  +0.000083] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 337500 kHz, VCO 0 kHz, ref 0 kHz, bypass 0 kHz, voltage level 2
>[  +0.000090] [drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DDI A]
>[  +0.000073] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DDI B]
>[  +0.000068] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DP-MST A]
>[  +0.000066] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DP-MST B]
>[  +0.000064] [drm:intel_atomic_commit_tail [i915]] [ENCODER:77:DP-MST C]
>[  +0.000064] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI C]
>[  +0.000070] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:65:eDP-1]
>[  +0.000071] [drm:verify_single_dpll_state.isra.115 [i915]] WRPLL 1
>[  +0.000095] [drm:verify_single_dpll_state.isra.115 [i915]] WRPLL 2
>[  +0.000066] [drm:verify_single_dpll_state.isra.115 [i915]] SPLL
>[  +0.000066] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 810
>[  +0.000064] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 1350
>[  +0.000069] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 2700
>[  +0.000149] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe A]
>[  +0.000127] [drm:intel_power_well_disable [i915]] disabling always-on
>[  +0.000029] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000a6da303a
>[  +0.000044] [drm:__drm_atomic_state_free] Freeing atomic state 00000000a6da303a
>[  +0.000048] [drm:drm_mode_setcrtc] [CRTC:51:pipe B]
>[  +0.000040] [drm:drm_atomic_state_init] Allocated atomic state 00000000a6da303a
>[  +0.000021] [drm:drm_atomic_get_crtc_state] Added [CRTC:51:pipe B] 0000000002b8bdd7 state to 00000000a6da303a
>[  +0.000022] [drm:drm_atomic_get_plane_state] Added [PLANE:40:primary B] 000000000c943163 state to 00000000a6da303a
>[  +0.000017] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 0000000002b8bdd7
>[  +0.000017] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000000c943163 to [NOCRTC]
>[  +0.000006] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000000c943163
>[  +0.000007] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:51:pipe B] to 00000000a6da303a
>[  +0.000009] [drm:drm_atomic_check_only] checking 00000000a6da303a
>[  +0.000024] [drm:drm_atomic_commit] committing 00000000a6da303a
>[  +0.000085] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000a6da303a
>[  +0.000016] [drm:__drm_atomic_state_free] Freeing atomic state 00000000a6da303a
>[  +0.000018] [drm:drm_mode_setcrtc] [CRTC:63:pipe C]
>[  +0.000084] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000109] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000006] [drm:drm_atomic_state_init] Allocated atomic state 00000000a6da303a
>[  +0.000102] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 2
>[  +0.000007] [drm:drm_atomic_get_crtc_state] Added [CRTC:63:pipe C] 00000000b6f5bff8 state to 00000000a6da303a
>[  +0.000018] [drm:drm_atomic_get_plane_state] Added [PLANE:52:primary C] 000000008fb7bb85 state to 00000000a6da303a
>[  +0.000007] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000b6f5bff8
>[  +0.000005] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000008fb7bb85 to [NOCRTC]
>[  +0.000006] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000008fb7bb85
>[  +0.000008] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:63:pipe C] to 00000000a6da303a
>[  +0.000010] [drm:drm_atomic_check_only] checking 00000000a6da303a
>[  +0.000011] [drm:drm_atomic_commit] committing 00000000a6da303a
>[  +0.000037] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000a6da303a
>[  +0.000012] [drm:__drm_atomic_state_free] Freeing atomic state 00000000a6da303a
>[  +0.000196] [drm:drm_mode_addfb2] [FB:86]
>[  +0.000108] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.028250] [drm:drm_mode_setcrtc] [CRTC:39:pipe A]
>[  +0.000016] [drm:drm_mode_setcrtc] [CONNECTOR:65:eDP-1]
>[  +0.000015] [drm:drm_atomic_state_init] Allocated atomic state 00000000a6da303a
>[  +0.000006] [drm:drm_atomic_get_crtc_state] Added [CRTC:39:pipe A] 00000000a7e6bec7 state to 00000000a6da303a
>[  +0.000005] [drm:drm_atomic_get_plane_state] Added [PLANE:28:primary A] 00000000b2819f9a state to 00000000a6da303a
>[  +0.000006] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:Custom 1024x768] for CRTC state 00000000a7e6bec7
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000b2819f9a to [CRTC:39:pipe A]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [FB:86] for plane state 00000000b2819f9a
>[  +0.000001] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 00000000a6da303a
>[  +0.000009] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:65:eDP-1] 00000000904d3ef3 state to 00000000a6da303a
>[  +0.000002] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000904d3ef3 to [CRTC:39:pipe A]
>[  +0.000002] [drm:drm_atomic_check_only] checking 00000000a6da303a
>[  +0.000003] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] mode changed
>[  +0.000002] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] enable changed
>[  +0.000002] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] active changed
>[  +0.000002] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:65:eDP-1]
>[  +0.000002] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:65:eDP-1] using [ENCODER:64:DDI A] on [CRTC:39:pipe A]
>[  +0.000002] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] needs all connectors, enable: y, active: y
>[  +0.000001] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 00000000a6da303a
>[  +0.000031] [drm:intel_atomic_check [i915]] [CONNECTOR:65:eDP-1] checking for sink bpp constrains
>[  +0.000020] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  +0.000004] [drm:drm_mode_debug_printmodeline] Modeline 69:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  +0.000021] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[  +0.000025] [drm:intel_dp_compute_config [i915]] DP link bw 14 rate select 00 lane count 4 clock 540000 bpp 24
>[  +0.000018] [drm:intel_dp_compute_config [i915]] DP link bw required 1083930 available 2160000
>[  +0.000017] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[  +0.000020] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  +0.000020] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe A][modeset]
>[  +0.000019] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[  +0.000018] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  +0.000018] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 4209566, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  +0.000017] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  +0.000016] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  +0.000003] [drm:drm_mode_debug_printmodeline] Modeline 0:"Custom 1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  +0.000017] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  +0.000002] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  +0.000018] [drm:intel_dump_pipe_config [i915]] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  +0.000017] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 1024x768, pixel rate 361310
>[  +0.000016] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x01900000, size: 0x09600708, enabled
>[  +0.000016] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  +0.000017] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: wrpll: 0x0 spll: 0x0
>[  +0.000016] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  +0.000016] [drm:intel_dump_pipe_config [i915]] [PLANE:28:primary A] disabled, scaler_id = 0
>[  +0.000016] [drm:intel_dump_pipe_config [i915]] [PLANE:31:sprite A] disabled, scaler_id = 0
>[  +0.000016] [drm:intel_dump_pipe_config [i915]] [PLANE:36:cursor A] disabled, scaler_id = 0
>[  +0.000008] [drm:drm_atomic_get_crtc_state] Added [CRTC:51:pipe B] 00000000aefa614e state to 00000000a6da303a
>[  +0.000004] [drm:drm_atomic_get_crtc_state] Added [CRTC:63:pipe C] 00000000d3604831 state to 00000000a6da303a
>[  +0.000019] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 450000 kHz, actual 450000 kHz
>[  +0.000018] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 0, actual 0
>[  +0.000020] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:28:primary A] with fb 86
>[  +0.000019] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:primary A] visible 0 -> 1, off 0, on 1, ms 1
>[  +0.000020] [drm:intel_reference_shared_dpll [i915]] using LCPLL 2700 for pipe A
>[  +0.000004] [drm:drm_atomic_commit] committing 00000000a6da303a
>[  +0.001151] [drm:intel_power_well_enable [i915]] enabling always-on
>[  +0.000023] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 450000 kHz, VCO 0 kHz, ref 0 kHz, bypass 0 kHz, voltage level 0
>[  +0.000055] [drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DDI A]
>[  +0.000018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DDI B]
>[  +0.000018] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DP-MST A]
>[  +0.000016] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DP-MST B]
>[  +0.000017] [drm:intel_atomic_commit_tail [i915]] [ENCODER:77:DP-MST C]
>[  +0.000016] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI C]
>[  +0.000018] [drm:verify_single_dpll_state.isra.115 [i915]] WRPLL 1
>[  +0.000028] [drm:verify_single_dpll_state.isra.115 [i915]] WRPLL 2
>[  +0.000018] [drm:verify_single_dpll_state.isra.115 [i915]] SPLL
>[  +0.000017] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 810
>[  +0.000016] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 1350
>[  +0.000016] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 2700
>[  +0.000020] [drm:intel_enable_shared_dpll [i915]] enable LCPLL 2700 (active 1, on? 0) for crtc 39
>[  +0.000019] [drm:intel_enable_shared_dpll [i915]] enabling LCPLL 2700
>[  +0.000025] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  +0.000019] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  +0.580312] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  +0.000043] [drm:wait_panel_status [i915]] Wait complete
>[  +0.000039] [drm:edp_panel_on [i915]] Wait for panel power on
>[  +0.000042] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 00000003
>[  +0.061251] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000085] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000077] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 3
>[  +0.000122] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.060993] [drm:wait_panel_status [i915]] Wait complete
>[  +0.000093] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  +0.000078] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  +0.001209] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  +0.000107] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  +0.000097] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  +0.000093] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  +0.000753] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[  +0.000073] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[  +0.000067] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  +0.000704] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  +0.000071] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  +0.001002] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[  +0.000052] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[  +0.000044] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[  +0.000992] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  +0.000075] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:65:eDP-1] Link Training Passed at Link Rate = 540000, Lane count = 4
>[  +0.000296] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  +0.000218] [drm:intel_edp_backlight_on [i915]]
>[  +0.000049] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  +0.000052] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 833
>[  +0.000052] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[  +0.002761] [drm:intel_fbc_enable [i915]] reserved 6291456 bytes of contiguous stolen space for FBC, threshold: 1
>[  +0.000057] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  +0.013727] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:65:eDP-1]
>[  +0.000074] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe A]
>[  +0.000077] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 2700
>[  +0.000049] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000a6da303a
>[  +0.000019] [drm:__drm_atomic_state_free] Freeing atomic state 00000000a6da303a
>[  +0.000157] [drm:drm_atomic_state_init] Allocated atomic state 00000000a6da303a
>[  +0.000020] [drm:drm_atomic_get_plane_state] Added [PLANE:28:primary A] 00000000f34153d4 state to 00000000a6da303a
>[  +0.000015] [drm:drm_atomic_get_crtc_state] Added [CRTC:39:pipe A] 00000000b6f5bff8 state to 00000000a6da303a
>[  +0.000004] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000f34153d4
>[  +0.000005] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000f34153d4 to [NOCRTC]
>[  +0.000007] [drm:drm_atomic_check_only] checking 00000000a6da303a
>[  +0.000092] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:28:primary A] with fb -1
>[  +0.000058] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:primary A] visible 1 -> 0, off 1, on 0, ms 0
>[  +0.000022] [drm:drm_atomic_commit] committing 00000000a6da303a
>[  +0.032706] [drm:drm_atomic_state_default_clear] Clearing atomic state 00000000a6da303a
>[  +0.000019] [drm:__drm_atomic_state_free] Freeing atomic state 00000000a6da303a
>[  +0.000282] [IGT] pm_lpsp: exiting, ret=0
>[  +0.017126] [drm:intel_power_well_enable [i915]] enabling display
>[  +0.020048] [drm:drm_atomic_state_init] Allocated atomic state 000000004d0ed589
>[  +0.000021] [drm:drm_atomic_get_plane_state] Added [PLANE:28:primary A] 00000000d3a92b6e state to 000000004d0ed589
>[  +0.000013] [drm:drm_atomic_get_plane_state] Added [PLANE:31:sprite A] 00000000003e8b32 state to 000000004d0ed589
>[  +0.000004] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000003e8b32 to [NOCRTC]
>[  +0.000005] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000003e8b32
>[  +0.000012] [drm:drm_atomic_get_plane_state] Added [PLANE:36:cursor A] 000000003da6d35e state to 000000004d0ed589
>[  +0.000004] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003da6d35e to [NOCRTC]
>[  +0.000003] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000003da6d35e
>[  +0.000012] [drm:drm_atomic_get_plane_state] Added [PLANE:40:primary B] 00000000a7a88dc6 state to 000000004d0ed589
>[  +0.000012] [drm:drm_atomic_get_plane_state] Added [PLANE:43:sprite B] 00000000cdb147d3 state to 000000004d0ed589
>[  +0.000003] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000cdb147d3 to [NOCRTC]
>[  +0.000004] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000cdb147d3
>[  +0.000012] [drm:drm_atomic_get_plane_state] Added [PLANE:48:cursor B] 00000000bacda866 state to 000000004d0ed589
>[  +0.000003] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000bacda866 to [NOCRTC]
>[  +0.000004] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000bacda866
>[  +0.000012] [drm:drm_atomic_get_plane_state] Added [PLANE:52:primary C] 000000003bbb5693 state to 000000004d0ed589
>[  +0.000011] [drm:drm_atomic_get_plane_state] Added [PLANE:55:sprite C] 0000000010ae8ce5 state to 000000004d0ed589
>[  +0.000004] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000010ae8ce5 to [NOCRTC]
>[  +0.000004] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000010ae8ce5
>[  +0.000011] [drm:drm_atomic_get_plane_state] Added [PLANE:60:cursor C] 000000009a83df1c state to 000000004d0ed589
>[  +0.000004] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000009a83df1c to [NOCRTC]
>[  +0.000003] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000009a83df1c
>[  +0.000020] [drm:drm_atomic_get_crtc_state] Added [CRTC:39:pipe A] 00000000cd713c16 state to 000000004d0ed589
>[  +0.000019] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state 00000000cd713c16
>[  +0.000005] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d3a92b6e to [CRTC:39:pipe A]
>[  +0.000005] [drm:drm_atomic_set_fb_for_plane] Set [FB:88] for plane state 00000000d3a92b6e
>[  +0.000006] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 000000004d0ed589
>[  +0.000022] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:65:eDP-1] 0000000092421736 state to 000000004d0ed589
>[  +0.000006] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000092421736 to [NOCRTC]
>[  +0.000006] [drm:drm_atomic_set_crtc_for_connector] Link connector state 0000000092421736 to [CRTC:39:pipe A]
>[  +0.000014] [drm:drm_atomic_get_crtc_state] Added [CRTC:51:pipe B] 000000003b368198 state to 000000004d0ed589
>[  +0.000004] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 000000003b368198
>[  +0.000004] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a7a88dc6 to [NOCRTC]
>[  +0.000003] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a7a88dc6
>[  +0.000006] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:51:pipe B] to 000000004d0ed589
>[  +0.000013] [drm:drm_atomic_get_crtc_state] Added [CRTC:63:pipe C] 00000000214231c0 state to 000000004d0ed589
>[  +0.000004] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000214231c0
>[  +0.000004] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003bbb5693 to [NOCRTC]
>[  +0.000004] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000003bbb5693
>[  +0.000005] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:63:pipe C] to 000000004d0ed589
>[  +0.000005] [drm:drm_atomic_check_only] checking 000000004d0ed589
>[  +0.000011] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] mode changed
>[  +0.000010] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:65:eDP-1]
>[  +0.000009] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:65:eDP-1] keeps [ENCODER:64:DDI A], now on [CRTC:39:pipe A]
>[  +0.000007] [drm:drm_atomic_helper_check_modeset] [CRTC:39:pipe A] needs all connectors, enable: y, active: y
>[  +0.000005] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 000000004d0ed589
>[  +0.000091] [drm:intel_atomic_check [i915]] [CONNECTOR:65:eDP-1] checking for sink bpp constrains
>[  +0.000074] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  +0.000014] [drm:drm_mode_debug_printmodeline] Modeline 69:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  +0.000074] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[  +0.000086] [drm:intel_dp_compute_config [i915]] DP link bw 14 rate select 00 lane count 4 clock 540000 bpp 24
>[  +0.000064] [drm:intel_dp_compute_config [i915]] DP link bw required 1083930 available 2160000
>[  +0.000062] [drm:intel_dp_compute_config [i915]] PSR disable by flag
>[  +0.000071] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  +0.000072] [drm:intel_dump_pipe_config [i915]] [CRTC:39:pipe A][modeset]
>[  +0.000068] [drm:intel_dump_pipe_config [i915]] output_types: EDP (0x100)
>[  +0.000067] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>[  +0.000067] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 4209566, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[  +0.000062] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[  +0.000060] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  +0.000011] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  +0.000059] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  +0.000010] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[  +0.000063] [drm:intel_dump_pipe_config [i915]] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[  +0.000060] [drm:intel_dump_pipe_config [i915]] port clock: 540000, pipe src size: 3200x1800, pixel rate 361310
>[  +0.000059] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  +0.000058] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  +0.000059] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: wrpll: 0x0 spll: 0x0
>[  +0.000056] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  +0.000057] [drm:intel_dump_pipe_config [i915]] [PLANE:28:primary A] disabled, scaler_id = 0
>[  +0.000058] [drm:intel_dump_pipe_config [i915]] [PLANE:31:sprite A] disabled, scaler_id = 0
>[  +0.000057] [drm:intel_dump_pipe_config [i915]] [PLANE:36:cursor A] disabled, scaler_id = 0
>[  +0.000071] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 450000 kHz, actual 450000 kHz
>[  +0.000065] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 0, actual 0
>[  +0.000073] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:28:primary A] with fb 88
>[  +0.000065] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:primary A] visible 0 -> 1, off 0, on 1, ms 1
>[  +0.000071] [drm:intel_reference_shared_dpll [i915]] using LCPLL 2700 for pipe A
>[  +0.000013] [drm:drm_atomic_commit] committing 000000004d0ed589
>[  +0.003045] [drm:intel_edp_backlight_off [i915]]
>[  +0.206608] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[  +0.000089] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  +0.000973] [drm:intel_edp_panel_off.part.34 [i915]] Turn eDP port A panel power off
>[  +0.000070] [drm:intel_edp_panel_off.part.34 [i915]] Wait for panel power off time
>[  +0.000073] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[  +0.009420] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000082] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000072] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[  +0.000170] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.020451] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000089] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000078] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[  +0.000153] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.020275] [drm:wait_panel_status [i915]] Wait complete
>[  +0.000088] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[  +0.000075] [drm:intel_disable_shared_dpll [i915]] disable LCPLL 2700 (active 1, on? 1) for crtc 39
>[  +0.000066] [drm:intel_disable_shared_dpll [i915]] disabling LCPLL 2700
>[  +0.000077] [drm:intel_atomic_commit_tail [i915]] [ENCODER:64:DDI A]
>[  +0.000068] [drm:intel_atomic_commit_tail [i915]] [ENCODER:73:DDI B]
>[  +0.000065] [drm:intel_atomic_commit_tail [i915]] [ENCODER:75:DP-MST A]
>[  +0.000068] [drm:intel_atomic_commit_tail [i915]] [ENCODER:76:DP-MST B]
>[  +0.000063] [drm:intel_atomic_commit_tail [i915]] [ENCODER:77:DP-MST C]
>[  +0.000061] [drm:intel_atomic_commit_tail [i915]] [ENCODER:83:DDI C]
>[  +0.000066] [drm:verify_single_dpll_state.isra.115 [i915]] WRPLL 1
>[  +0.000067] [drm:verify_single_dpll_state.isra.115 [i915]] WRPLL 2
>[  +0.000064] [drm:verify_single_dpll_state.isra.115 [i915]] SPLL
>[  +0.000062] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 810
>[  +0.000060] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 1350
>[  +0.000059] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 2700
>[  +0.000071] [drm:intel_enable_shared_dpll [i915]] enable LCPLL 2700 (active 1, on? 0) for crtc 39
>[  +0.000065] [drm:intel_enable_shared_dpll [i915]] enabling LCPLL 2700
>[  +0.000083] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[  +0.000068] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[  +0.000131] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000069] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000065] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 2
>[  +0.000160] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.606291] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[  +0.000073] [drm:wait_panel_status [i915]] Wait complete
>[  +0.000067] [drm:edp_panel_on [i915]] Wait for panel power on
>[  +0.000068] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 0000000a control 00000003
>[  +0.061080] [drm:ilk_hpd_irq_handler [i915]] hotplug event received, stat 0x00000008, dig 0x00000012, pins 0x00000010
>[  +0.000081] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[  +0.000072] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 3
>[  +0.000097] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[  +0.059751] [drm:wait_panel_status [i915]] Wait complete
>[  +0.000101] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[  +0.000080] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[  +0.001172] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[  +0.000064] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[  +0.000062] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  +0.000062] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[  +0.000704] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[  +0.000059] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[  +0.000056] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[  +0.000780] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[  +0.000098] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[  +0.001021] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[  +0.000061] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[  +0.000058] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[  +0.000999] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[  +0.000064] [drm:intel_dp_start_link_train [i915]] [CONNECTOR:65:eDP-1] Link Training Passed at Link Rate = 540000, Lane count = 4
>[  +0.000394] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  +0.000241] [drm:intel_edp_backlight_on [i915]]
>[  +0.000066] [drm:intel_panel_enable_backlight [i915]] pipe A
>[  +0.000071] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 833
>[  +0.004443] [drm:intel_enable_ddi [i915]] Panel doesn't support DRRS
>[  +0.001362] [drm:intel_fbc_enable [i915]] reserved 23040000 bytes of contiguous stolen space for FBC, threshold: 1
>[  +0.000038] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[  +0.010672] [drm:verify_connector_state.isra.114 [i915]] [CONNECTOR:65:eDP-1]
>[  +0.000057] [drm:intel_atomic_commit_tail [i915]] [CRTC:39:pipe A]
>[  +0.000054] [drm:verify_single_dpll_state.isra.115 [i915]] LCPLL 2700
>[  +0.000027] [drm:drm_atomic_state_default_clear] Clearing atomic state 000000004d0ed589
>[  +0.000053] [drm:__drm_atomic_state_free] Freeing atomic state 000000004d0ed589
>[  +0.000423] [drm:drm_atomic_state_init] Allocated atomic state 0000000023a2ef97
>[  +0.000010] [drm:drm_atomic_get_plane_state] Added [PLANE:28:primary A] 00000000773838a4 state to 0000000023a2ef97
>[  +0.000009] [drm:drm_atomic_get_crtc_state] Added [CRTC:39:pipe A] 00000000ae88e1da state to 0000000023a2ef97
>[  +0.000006] [drm:drm_atomic_get_plane_state] Added [PLANE:31:sprite A] 000000001d2b7d24 state to 0000000023a2ef97
>[  +0.000003] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000001d2b7d24 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000001d2b7d24
>[  +0.000007] [drm:drm_atomic_get_plane_state] Added [PLANE:36:cursor A] 00000000663a54f4 state to 0000000023a2ef97
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000663a54f4 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000663a54f4
>[  +0.000006] [drm:drm_atomic_get_plane_state] Added [PLANE:40:primary B] 00000000f83002b0 state to 0000000023a2ef97
>[  +0.000006] [drm:drm_atomic_get_plane_state] Added [PLANE:43:sprite B] 00000000a52d0482 state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a52d0482 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a52d0482
>[  +0.000005] [drm:drm_atomic_get_plane_state] Added [PLANE:48:cursor B] 0000000039c2cb45 state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 0000000039c2cb45 to [NOCRTC]
>[  +0.000001] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 0000000039c2cb45
>[  +0.000008] [drm:drm_atomic_get_plane_state] Added [PLANE:52:primary C] 00000000af3bd1f1 state to 0000000023a2ef97
>[  +0.000007] [drm:drm_atomic_get_plane_state] Added [PLANE:55:sprite C] 00000000ba0728cf state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000ba0728cf to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000ba0728cf
>[  +0.000007] [drm:drm_atomic_get_plane_state] Added [PLANE:60:cursor C] 00000000eb903041 state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000eb903041 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000eb903041
>[  +0.000010] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state 00000000ae88e1da
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000773838a4 to [CRTC:39:pipe A]
>[  +0.000003] [drm:drm_atomic_set_fb_for_plane] Set [FB:88] for plane state 00000000773838a4
>[  +0.000003] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 0000000023a2ef97
>[  +0.000011] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:65:eDP-1] 00000000f14ff0ed state to 0000000023a2ef97
>[  +0.000003] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000f14ff0ed to [NOCRTC]
>[  +0.000003] [drm:drm_atomic_set_crtc_for_connector] Link connector state 00000000f14ff0ed to [CRTC:39:pipe A]
>[  +0.000007] [drm:drm_atomic_get_crtc_state] Added [CRTC:51:pipe B] 00000000b6bb1c7d state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000b6bb1c7d
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000f83002b0 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000f83002b0
>[  +0.000002] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:51:pipe B] to 0000000023a2ef97
>[  +0.000007] [drm:drm_atomic_get_crtc_state] Added [CRTC:63:pipe C] 00000000c8f0a65a state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000c8f0a65a
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000af3bd1f1 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000af3bd1f1
>[  +0.000002] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:63:pipe C] to 0000000023a2ef97
>[  +0.000003] [drm:drm_atomic_check_only] checking 0000000023a2ef97
>[  +0.000008] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:65:eDP-1]
>[  +0.000005] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:65:eDP-1] keeps [ENCODER:64:DDI A], now on [CRTC:39:pipe A]
>[  +0.000050] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:28:primary A] with fb 88
>[  +0.000040] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[  +0.000008] [drm:drm_atomic_commit] committing 0000000023a2ef97
>[  +0.015715] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000023a2ef97
>[  +0.000024] [drm:__drm_atomic_state_free] Freeing atomic state 0000000023a2ef97
>[  +0.000086] Console: switching to colour frame buffer device 400x112
>[  +0.000034] [drm:drm_atomic_state_init] Allocated atomic state 0000000023a2ef97
>[  +0.000007] [drm:drm_atomic_get_plane_state] Added [PLANE:28:primary A] 00000000917453b7 state to 0000000023a2ef97
>[  +0.000007] [drm:drm_atomic_get_crtc_state] Added [CRTC:39:pipe A] 00000000e31917f6 state to 0000000023a2ef97
>[  +0.000005] [drm:drm_atomic_get_plane_state] Added [PLANE:31:sprite A] 00000000bacda866 state to 0000000023a2ef97
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000bacda866 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000bacda866
>[  +0.000004] [drm:drm_atomic_get_plane_state] Added [PLANE:36:cursor A] 00000000cdb147d3 state to 0000000023a2ef97
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000cdb147d3 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000cdb147d3
>[  +0.000003] [drm:drm_atomic_get_plane_state] Added [PLANE:40:primary B] 00000000a7a88dc6 state to 0000000023a2ef97
>[  +0.000004] [drm:drm_atomic_get_plane_state] Added [PLANE:43:sprite B] 000000003da6d35e state to 0000000023a2ef97
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 000000003da6d35e to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 000000003da6d35e
>[  +0.000003] [drm:drm_atomic_get_plane_state] Added [PLANE:48:cursor B] 00000000003e8b32 state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000003e8b32 to [NOCRTC]
>[  +0.000001] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000003e8b32
>[  +0.000004] [drm:drm_atomic_get_plane_state] Added [PLANE:52:primary C] 00000000d3a92b6e state to 0000000023a2ef97
>[  +0.000006] [drm:drm_atomic_get_plane_state] Added [PLANE:55:sprite C] 00000000d2382908 state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d2382908 to [NOCRTC]
>[  +0.000001] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d2382908
>[  +0.000004] [drm:drm_atomic_get_plane_state] Added [PLANE:60:cursor C] 00000000c887bd48 state to 0000000023a2ef97
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000c887bd48 to [NOCRTC]
>[  +0.000001] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000c887bd48
>[  +0.000007] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:3200x1800] for CRTC state 00000000e31917f6
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000917453b7 to [CRTC:39:pipe A]
>[  +0.000002] [drm:drm_atomic_set_fb_for_plane] Set [FB:88] for plane state 00000000917453b7
>[  +0.000002] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:39:pipe A] to 0000000023a2ef97
>[  +0.000008] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:65:eDP-1] 000000008a2081b3 state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000008a2081b3 to [NOCRTC]
>[  +0.000002] [drm:drm_atomic_set_crtc_for_connector] Link connector state 000000008a2081b3 to [CRTC:39:pipe A]
>[  +0.000005] [drm:drm_atomic_get_crtc_state] Added [CRTC:51:pipe B] 00000000664080ce state to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 00000000664080ce
>[  +0.000001] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000a7a88dc6 to [NOCRTC]
>[  +0.000001] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000a7a88dc6
>[  +0.000002] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:51:pipe B] to 0000000023a2ef97
>[  +0.000005] [drm:drm_atomic_get_crtc_state] Added [CRTC:63:pipe C] 000000008dbfd55d state to 0000000023a2ef97
>[  +0.000001] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state 000000008dbfd55d
>[  +0.000002] [drm:drm_atomic_set_crtc_for_plane] Link plane state 00000000d3a92b6e to [NOCRTC]
>[  +0.000001] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state 00000000d3a92b6e
>[  +0.000001] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:63:pipe C] to 0000000023a2ef97
>[  +0.000002] [drm:drm_atomic_check_only] checking 0000000023a2ef97
>[  +0.000007] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:65:eDP-1]
>[  +0.000003] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:65:eDP-1] keeps [ENCODER:64:DDI A], now on [CRTC:39:pipe A]
>[  +0.000043] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:28:primary A] with fb 88
>[  +0.000029] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:primary A] visible 1 -> 1, off 0, on 0, ms 0
>[  +0.000005] [drm:drm_atomic_commit] committing 0000000023a2ef97
>[  +0.016389] [drm:drm_atomic_state_default_clear] Clearing atomic state 0000000023a2ef97
>[  +0.000038] [drm:__drm_atomic_state_free] Freeing atomic state 0000000023a2ef97
>[  +3.150557] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[  +0.000053] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007

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Attachments on bug 92225: 118619 | 118929 | 130596 | 130597 | 137797 | 138360

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