Attachment 13850 Details for Bug 14163 – X log from offending system

X log from offending system

Xorg.0.log (text/plain), 95.84 KB, created by Kevin Downey on 2008-01-21 23:12:11 UTC

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Creator: Kevin Downey

Created: 2008-01-21 23:12:11 UTC

Size: 95.84 KB

patch

obsolete

>
>X.Org X Server 1.4.0
>Release Date: 5 September 2007
>X Protocol Version 11, Revision 0
>Build Operating System: FreeBSD 7.0-PRERELEASE i386 
>Current Operating System: FreeBSD eskarina.nexus.lan 7.0-PRERELEASE FreeBSD 7.0-PRERELEASE #54: Thu Jan 17 20:02:57 PST 2008     root@eskarina.nexus.lan:/usr/obj/usr/src/sys/ES i386
>Build Date: 01 January 2008  08:13:46PM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Mon Jan 21 22:55:57 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "X.org Configured"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "SVA VR-17S"
>(**) |   |-->Device "Card0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(**) Option "DontZap" "true"
>(**) Option "AIGLX" "true"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(WW) `fonts.dir' not found (or not valid) in "/usr/local/lib/X11/fonts/util".
>	Entry deleted from font path.
>	(Run 'mkfontdir' on "/usr/local/lib/X11/fonts/util").
>(WW) The directory "/usr/local/lib/X11/fonts/freefont-ttf" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/local/lib/X11/fonts/TrueType" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/local/lib/X11/fonts/texcm-ttf/" does not exist.
>	Entry deleted from font path.
>(==) Including the default font path /usr/local/lib/X11/fonts/misc/,/usr/local/lib/X11/fonts/TTF/,/usr/local/lib/X11/fonts/OTF,/usr/local/lib/X11/fonts/Type1/,/usr/local/lib/X11/fonts/100dpi/,/usr/local/lib/X11/fonts/75dpi/.
>(**) FontPath set to:
>	/usr/local/lib/X11/fonts/misc/,
>	/usr/local/lib/X11/fonts/TTF/,
>	/usr/local/lib/X11/fonts/OTF,
>	/usr/local/lib/X11/fonts/Type1/,
>	/usr/local/lib/X11/fonts/100dpi/,
>	/usr/local/lib/X11/fonts/75dpi/,
>	/usr/local/lib/X11/fonts/webfonts/,
>	/usr/local/lib/X11/fonts/bitstream-vera,
>	/usr/local/lib/X11/fonts/TTF,
>	/usr/local/lib/X11/fonts/misc,
>	/usr/local/lib/X11/fonts/cyrillic,
>	/usr/local/lib/X11/fonts/75dpi,
>	/usr/local/lib/X11/fonts/100dpi,
>	/usr/local/lib/X11/fonts/Type1,
>	/usr/local/lib/X11/fonts/webfonts,
>	/usr/local/share/fonts/amspsfont/type1,
>	/usr/local/lib/X11/fonts/misc/,
>	/usr/local/lib/X11/fonts/TTF/,
>	/usr/local/lib/X11/fonts/OTF,
>	/usr/local/lib/X11/fonts/Type1/,
>	/usr/local/lib/X11/fonts/100dpi/,
>	/usr/local/lib/X11/fonts/75dpi/
>(**) RgbPath set to "/usr/local/share/X11/rgb"
>(**) ModulePath set to "/usr/local/lib/xorg/modules,/usr/local/lib/dri/"
>(**) Extension "Composite" is enabled
>(II) Loader magic: 0x81c2d80
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 2.0
>	X.Org XInput driver : 2.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on freebsd
>(II) LoadModule: "pcidata"
>(II) Loading /usr/local/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(--) Using syscons driver with X support (version 2.0)
>(++) using VT number 9
>
>(II) PCI: Probing config type using method 1
>(II) PCI: Config type is 1
>(II) PCI: stages = 0x03, oldVal1 = 0x80020010, mode1Res1 = 0x80000000
>(WW) OS did not count PCI devices, guessing wildly
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,29a0 card 8086,514d rev 02 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 8086,29a2 card 8086,514d rev 02 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,29a3 card 8086,514d rev 02 class 03,80,00 hdr 80
>(II) PCI: 00:03:0: chip 8086,29a4 card 8086,514d rev 02 class 07,80,00 hdr 80
>(II) PCI: 00:19:0: chip 8086,104b card 8086,0001 rev 02 class 02,00,00 hdr 00
>(II) PCI: 00:1a:0: chip 8086,2834 card 8086,514d rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1a:1: chip 8086,2835 card 8086,514d rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1a:7: chip 8086,283a card 8086,514d rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1b:0: chip 8086,284b card 8086,2114 rev 02 class 04,03,00 hdr 00
>(II) PCI: 00:1c:0: chip 8086,283f card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:1: chip 8086,2841 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:2: chip 8086,2843 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:3: chip 8086,2845 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:4: chip 8086,2847 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,2830 card 8086,514d rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,2831 card 8086,514d rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,2832 card 8086,514d rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,2836 card 8086,514d rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev f2 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,2810 card 8086,514d rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:2: chip 8086,2824 card 8086,514d rev 02 class 01,06,01 hdr 00
>(II) PCI: 00:1f:3: chip 8086,283e card 8086,514d rev 02 class 0c,05,00 hdr 00
>(II) PCI: 02:00:0: chip 11ab,6101 card 11ab,6101 rev b1 class 01,01,8f hdr 00
>(II) PCI: 06:00:0: chip 168c,0013 card 1186,3a13 rev 01 class 02,00,00 hdr 00
>(II) PCI: 06:03:0: chip 104c,8023 card 8086,514d rev 00 class 0c,00,10 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,6), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:28:0), (0,1,1), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0x90500000 - 0x905fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:1), (0,2,2), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x00001000 - 0x000010ff (0x100) IX[B]
>	[1] -1	0	0x00001400 - 0x000014ff (0x100) IX[B]
>	[2] -1	0	0x00001800 - 0x000018ff (0x100) IX[B]
>	[3] -1	0	0x00001c00 - 0x00001cff (0x100) IX[B]
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:28:2), (0,3,3), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 3 non-prefetchable memory range:
>	[0] -1	0	0x90600000 - 0x906fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 4: bridge is at (0:28:3), (0,4,4), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 4 non-prefetchable memory range:
>	[0] -1	0	0x90700000 - 0x907fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 5: bridge is at (0:28:4), (0,5,5), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 5 non-prefetchable memory range:
>	[0] -1	0	0x90800000 - 0x908fffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 6: bridge is at (0:30:0), (0,6,6), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 6 non-prefetchable memory range:
>	[0] -1	0	0x90000000 - 0x900fffff (0x100000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(0:2:0) Intel Corporation 82G965 Integrated Graphics Controller rev 2, Mem @ 0x90300000/20, 0x80000000/28, I/O @ 0x2110/3
>(--) PCI: (0:2:1) Intel Corporation 82G965 Integrated Graphics Controller rev 2, Mem @ 0x90200000/20
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) PCI Memory resource overlap reduced 0x90400000 from 0x907fffff to 0x904fffff
>(II) Active PCI resource ranges:
>	[0] -1	0	0x90010000 - 0x9001ffff (0x10000) MX[B]E
>	[1] -1	0	0x90014000 - 0x90017fff (0x4000) MX[B]E
>	[2] -1	0	0x90000000 - 0x9fffffff (0x10000000) MX[B]E
>	[3] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]E
>	[4] -1	0	0x90426000 - 0x90427fff (0x2000) MX[B]E
>	[5] -1	0	0x90425000 - 0x90425fff (0x1000) MX[B]E
>	[6] -1	0	0x90425800 - 0x90425fff (0x800) MX[B]E
>	[7] -1	0	0x90420000 - 0x9043ffff (0x20000) MX[B]E
>	[8] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]E
>	[9] -1	0	0x90424000 - 0x90427fff (0x4000) MX[B]E
>	[10] -1	0	0x90400000 - 0x904fffff (0x100000) MX[B]E
>	[11] -1	0	0x90426100 - 0x904261ff (0x100) MX[B]E
>	[12] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[13] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[14] -1	0	0x90300000 - 0x903fffff (0x100000) MX[B](B)
>	[15] -1	0	0x00001000 - 0x000010ff (0x100) IX[B]E
>	[16] -1	0	0x00001020 - 0x0000103f (0x20) IX[B]E
>	[17] -1	0	0x00001010 - 0x0000101f (0x10) IX[B]E
>	[18] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]E
>	[19] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]E
>	[20] -1	0	0x00002000 - 0x000020ff (0x100) IX[B]E
>	[21] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]E
>	[22] -1	0	0x00002118 - 0x0000211f (0x8) IX[B]E
>	[23] -1	0	0x00002100 - 0x000021ff (0x100) IX[B]E
>	[24] -1	0	0x0000211c - 0x0000211f (0x4) IX[B]E
>	[25] -1	0	0x00002108 - 0x0000210f (0x8) IX[B]E
>	[26] -1	0	0x00002040 - 0x0000207f (0x40) IX[B]E
>	[27] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]E
>	[28] -1	0	0x00002080 - 0x000020ff (0x80) IX[B]E
>	[29] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]E
>	[30] -1	0	0x000020c0 - 0x000020ff (0x40) IX[B]E
>	[31] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]E
>	[32] -1	0	0x00002110 - 0x00002117 (0x8) IX[B](B)
>(II) PCI Memory resource overlap reduced 0x90010000 from 0x9001ffff to 0x90013fff
>(II) PCI Memory resource overlap reduced 0x90000000 from 0x9fffffff to 0x9000ffff
>(II) PCI I/O resource overlap reduced 0x00001000 from 0x000010ff to 0x0000100f
>(II) PCI I/O resource overlap reduced 0x00001020 from 0x0000103f to 0x00001023
>(II) PCI I/O resource overlap reduced 0x00001010 from 0x0000101f to 0x00001017
>(II) PCI I/O resource overlap reduced 0x00002000 from 0x000020ff to 0x0000201f
>(II) PCI Memory resource overlap reduced 0x90426000 from 0x90427fff to 0x904260ff
>(II) PCI Memory resource overlap reduced 0x90425000 from 0x90425fff to 0x904257ff
>(II) PCI I/O resource overlap reduced 0x00002118 from 0x0000211f to 0x0000211b
>(II) PCI I/O resource overlap reduced 0x00002100 from 0x000021ff to 0x00002107
>(II) PCI Memory resource overlap reduced 0x90425800 from 0x90425fff to 0x90425bff
>(II) PCI I/O resource overlap reduced 0x00002040 from 0x0000207f to 0x0000205f
>(II) PCI I/O resource overlap reduced 0x00002080 from 0x000020ff to 0x0000209f
>(II) PCI Memory resource overlap reduced 0x90420000 from 0x9043ffff to 0x90423fff
>(II) PCI I/O resource overlap reduced 0x000020c0 from 0x000020ff to 0x000020df
>(II) PCI Memory resource overlap reduced 0x90424000 from 0x90427fff to 0x90424fff
>(II) PCI Memory resource overlap reduced 0x90400000 from 0x904fffff to 0x9041ffff
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0x90010000 - 0x90013fff (0x4000) MX[B]E
>	[1] -1	0	0x90014000 - 0x90017fff (0x4000) MX[B]E
>	[2] -1	0	0x90000000 - 0x9000ffff (0x10000) MX[B]E
>	[3] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]E
>	[4] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]E
>	[5] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]E
>	[6] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]E
>	[7] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]E
>	[8] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]E
>	[9] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]E
>	[10] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]E
>	[11] -1	0	0x90426100 - 0x904261ff (0x100) MX[B]E
>	[12] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[13] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[14] -1	0	0x90300000 - 0x903fffff (0x100000) MX[B](B)
>	[15] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]E
>	[16] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]E
>	[17] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]E
>	[18] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]E
>	[19] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]E
>	[20] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]E
>	[21] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]E
>	[22] -1	0	0x00002118 - 0x0000211b (0x4) IX[B]E
>	[23] -1	0	0x00002100 - 0x00002107 (0x8) IX[B]E
>	[24] -1	0	0x0000211c - 0x0000211f (0x4) IX[B]E
>	[25] -1	0	0x00002108 - 0x0000210f (0x8) IX[B]E
>	[26] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]E
>	[27] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]E
>	[28] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]E
>	[29] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]E
>	[30] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]E
>	[31] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]E
>	[32] -1	0	0x00002110 - 0x00002117 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x90010000 - 0x90013fff (0x4000) MX[B]E
>	[5] -1	0	0x90014000 - 0x90017fff (0x4000) MX[B]E
>	[6] -1	0	0x90000000 - 0x9000ffff (0x10000) MX[B]E
>	[7] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]E
>	[8] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]E
>	[9] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]E
>	[10] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]E
>	[11] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]E
>	[12] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]E
>	[13] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]E
>	[14] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]E
>	[15] -1	0	0x90426100 - 0x904261ff (0x100) MX[B]E
>	[16] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[17] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[18] -1	0	0x90300000 - 0x903fffff (0x100000) MX[B](B)
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]E
>	[22] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]E
>	[23] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]E
>	[24] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]E
>	[25] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]E
>	[26] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]E
>	[27] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]E
>	[28] -1	0	0x00002118 - 0x0000211b (0x4) IX[B]E
>	[29] -1	0	0x00002100 - 0x00002107 (0x8) IX[B]E
>	[30] -1	0	0x0000211c - 0x0000211f (0x4) IX[B]E
>	[31] -1	0	0x00002108 - 0x0000210f (0x8) IX[B]E
>	[32] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]E
>	[33] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]E
>	[34] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]E
>	[35] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]E
>	[36] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]E
>	[37] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]E
>	[38] -1	0	0x00002110 - 0x00002117 (0x8) IX[B](B)
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "freetype" will be loaded. This was enabled by default and also specified in the config file.
>(II) "type1" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) LoadModule: "extmod"
>(II) Loading /usr/local/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "record"
>(II) Loading /usr/local/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dbe"
>(II) Loading /usr/local/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/local/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(**) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "xtrap"
>(II) Loading /usr/local/lib/xorg/modules/extensions//libxtrap.so
>(II) Module xtrap: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DEC-XTRAP
>(II) LoadModule: "dri"
>(II) Loading /usr/local/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "freetype"
>(II) Loading /usr/local/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.0, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "type1"
>(II) Loading /usr/local/lib/xorg/modules/fonts//libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "intel"
>(II) Loading /usr/local/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 2.2.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 2.0
>(II) LoadModule: "mouse"
>(II) Loading /usr/local/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.2.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) LoadModule: "kbd"
>(II) Loading /usr/local/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, 965G, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33
>(II) Primary Device is: PCI 00:02:0
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset 965G found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x90010000 - 0x90013fff (0x4000) MX[B]E
>	[5] -1	0	0x90014000 - 0x90017fff (0x4000) MX[B]E
>	[6] -1	0	0x90000000 - 0x9000ffff (0x10000) MX[B]E
>	[7] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]E
>	[8] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]E
>	[9] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]E
>	[10] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]E
>	[11] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]E
>	[12] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]E
>	[13] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]E
>	[14] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]E
>	[15] -1	0	0x90426100 - 0x904261ff (0x100) MX[B]E
>	[16] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[17] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[18] -1	0	0x90300000 - 0x903fffff (0x100000) MX[B](B)
>	[19] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[20] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[21] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]E
>	[22] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]E
>	[23] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]E
>	[24] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]E
>	[25] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]E
>	[26] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]E
>	[27] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]E
>	[28] -1	0	0x00002118 - 0x0000211b (0x4) IX[B]E
>	[29] -1	0	0x00002100 - 0x00002107 (0x8) IX[B]E
>	[30] -1	0	0x0000211c - 0x0000211f (0x4) IX[B]E
>	[31] -1	0	0x00002108 - 0x0000210f (0x8) IX[B]E
>	[32] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]E
>	[33] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]E
>	[34] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]E
>	[35] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]E
>	[36] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]E
>	[37] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]E
>	[38] -1	0	0x00002110 - 0x00002117 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x90010000 - 0x90013fff (0x4000) MX[B]E
>	[5] -1	0	0x90014000 - 0x90017fff (0x4000) MX[B]E
>	[6] -1	0	0x90000000 - 0x9000ffff (0x10000) MX[B]E
>	[7] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]E
>	[8] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]E
>	[9] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]E
>	[10] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]E
>	[11] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]E
>	[12] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]E
>	[13] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]E
>	[14] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]E
>	[15] -1	0	0x90426100 - 0x904261ff (0x100) MX[B]E
>	[16] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[17] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[18] -1	0	0x90300000 - 0x903fffff (0x100000) MX[B](B)
>	[19] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[20] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[21] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[22] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[23] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[24] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]E
>	[25] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]E
>	[26] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]E
>	[27] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]E
>	[28] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]E
>	[29] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]E
>	[30] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]E
>	[31] -1	0	0x00002118 - 0x0000211b (0x4) IX[B]E
>	[32] -1	0	0x00002100 - 0x00002107 (0x8) IX[B]E
>	[33] -1	0	0x0000211c - 0x0000211f (0x4) IX[B]E
>	[34] -1	0	0x00002108 - 0x0000210f (0x8) IX[B]E
>	[35] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]E
>	[36] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]E
>	[37] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]E
>	[38] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]E
>	[39] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]E
>	[40] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]E
>	[41] -1	0	0x00002110 - 0x00002117 (0x8) IX[B](B)
>	[42] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[43] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/local/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /usr/local/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/local/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "AccelMethod" "EXA"
>(**) intel(0): Option "ModeDebug" "true"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 965G
>(--) intel(0): Chipset: "965G"
>(--) intel(0): Linear framebuffer at 0x80000000
>(--) intel(0): IO registers at addr 0x90300000
>(==) intel(0): Write-combining range (0x90300000,0x80000) was already clear
>(==) intel(0): Write-combining range (0x90380000,0x80000) was already clear
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80008018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0008001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x18000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000c80 (3200 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x031f0257 (800, 600)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x041f031f (800 active, 1056 total)
>(II) intel(0):             HBLANK_A: 0x041f031f (800 start, 1056 end)
>(II) intel(0):              HSYNC_A: 0x03c70347 (840 start, 968 end)
>(II) intel(0):             VTOTAL_A: 0x02730257 (600 active, 628 total)
>(II) intel(0):             VBLANK_A: 0x02730257 (600 start, 628 end)
>(II) intel(0):              VSYNC_A: 0x025c0258 (601 start, 605 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0000008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x31
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x00
>(II) intel(0):                 CR0b: 0x0f
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0xff
>(II) intel(0):                 CR0f: 0xff
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x80
>(II) intel(0): pipe A dot 40000 n 1 m1 16 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(**) intel(0): Using EXA for acceleration
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section SVA VR-17S
>(**) intel(0): Option "PreferredMode" "1280x1024"
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVO: R: 04 AA 03 01 01 01 01 00 (Success)
>(II) intel(0): Output TMDS-1 has no monitor section
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVO: R: C4 09 74 40             (Success)
>(II) intel(0): SDVO device VID/DID: 04:AA.03, clock range 25.0MHz - 165.0MHz, input 1: Y, input 2: N, output 1: Y, output 2: N
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): I2C bus "SDVOC DDC Bus" initialized.
>(II) intel(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVO: R: 04 AA 03 01 01 01 01 00 (Success)
>(II) intel(0): Output TMDS-2 has no monitor section
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVO: R: C4 09 74 40             (Success)
>(II) intel(0): SDVO device VID/DID: 04:AA.03, clock range 25.0MHz - 165.0MHz, input 1: Y, input 2: N, output 1: Y, output 2: N
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(==) intel(0): Write-combining range (0xa0000,0x10000) was already clear
>(II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "CRTDDC_A:ddc2" removed.
>(II) intel(0): EDID for output VGA
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
>(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
>(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
>(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
>(II) intel(0): Not using default mode "1152x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Printing probed modes for output VGA
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1600x1200"x60.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz)
>(II) intel(0): Modeline "1600x1024"x60.0  106.91  1600 1620 1640 1670  1024 1027 1030 1067 -hsync -vsync (64.0 kHz)
>(II) intel(0): Modeline "1400x1050"x60.0  122.00  1400 1488 1640 1880  1050 1052 1064 1082 +hsync +vsync (64.9 kHz)
>(II) intel(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-2
>(II) intel(0): Output VGA connected
>(II) intel(0): Output TMDS-1 disconnected
>(II) intel(0): Output TMDS-2 disconnected
>(II) intel(0): Output VGA using initial mode 1280x1024
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(==) intel(0): Write-combining range (0xa0000,0x10000) was already clear
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 7676 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(**) intel(0): Using gamma correction (2.2, 2.2, 2.2)
>(==) intel(0): DPI set to (75, 75)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/local/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/local/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 2.2.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00
>(WW) intel(0): Register 0x70008 (PIPEACONF) changed from 0xc0000000 to 0x00000000
>(WW) intel(0): PIPEACONF before: enabled, active
>(WW) intel(0): PIPEACONF after: disabled, inactive
>(WW) intel(0): Register 0x71008 (PIPEBCONF) changed from 0xc0000000 to 0x00000000
>(WW) intel(0): PIPEBCONF before: enabled, active
>(WW) intel(0): PIPEBCONF after: disabled, inactive
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0x80000000 - 0x8fffffff (0x10000000) MS[B]
>	[1] 0	0	0x90300000 - 0x903fffff (0x100000) MS[B]
>	[2] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[3] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[4] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[5] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[6] -1	0	0x90010000 - 0x90013fff (0x4000) MX[B]E
>	[7] -1	0	0x90014000 - 0x90017fff (0x4000) MX[B]E
>	[8] -1	0	0x90000000 - 0x9000ffff (0x10000) MX[B]E
>	[9] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]E
>	[10] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]E
>	[11] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]E
>	[12] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]E
>	[13] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]E
>	[14] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]E
>	[15] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]E
>	[16] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]E
>	[17] -1	0	0x90426100 - 0x904261ff (0x100) MX[B]E
>	[18] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[19] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[20] -1	0	0x90300000 - 0x903fffff (0x100000) MX[B](B)
>	[21] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[22] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[23] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[24] 0	0	0x00002110 - 0x00002117 (0x8) IS[B]
>	[25] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[26] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[27] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]E
>	[28] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]E
>	[29] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]E
>	[30] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]E
>	[31] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]E
>	[32] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]E
>	[33] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]E
>	[34] -1	0	0x00002118 - 0x0000211b (0x4) IX[B]E
>	[35] -1	0	0x00002100 - 0x00002107 (0x8) IX[B]E
>	[36] -1	0	0x0000211c - 0x0000211f (0x4) IX[B]E
>	[37] -1	0	0x00002108 - 0x0000210f (0x8) IX[B]E
>	[38] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]E
>	[39] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]E
>	[40] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]E
>	[41] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]E
>	[42] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]E
>	[43] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]E
>	[44] -1	0	0x00002110 - 0x00002117 (0x8) IX[B](B)
>	[45] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[46] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 491520 total, 0 used
>(II) intel(0): I830CheckAvailableMemory: 1966080 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such file or directory)
>drmOpenDevice: open result is -1, (No such file or directory)
>drmOpenDevice: Open failed
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such file or directory)
>drmOpenDevice: open result is -1, (No such file or directory)
>drmOpenDevice: Open failed
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: drmOpenMinor returns 13
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] loaded kernel module for "i915" driver.
>(II) [drm] DRM interface version 1.2
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(==) intel(0): VideoRam: 262144 KB
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): Write-combining range (0x90300000,0x80000) was already clear
>(==) intel(0): Write-combining range (0x90380000,0x80000) was already clear
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Success.
>(II) intel(0): [drm] Registers = 0x90300000
>(II) intel(0): [drm] ring buffer = 0x80000000
>(II) intel(0): [drm] mapped front buffer at 0x80100000, handle = 0x80100000
>(II) intel(0): [drm] mapped back buffer at 0x86500000, handle = 0x86500000
>(II) intel(0): [drm] mapped depth buffer at 0x87e00000, handle = 0x87e00000
>(II) intel(0): [drm] mapped classic textures at 0x89700000, handle = 0x89700000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(==) intel(0): Write-combining range (0x90300000,0x80000) was already clear
>(==) intel(0): Write-combining range (0x90380000,0x80000) was already clear
>(==) intel(0): Write-combining range (0x80000000,0x10000000) was already set
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(==) intel(0): Write-combining range (0xa0000,0x10000) was already clear
>(II) EXA(0): Offscreen pixmap area of 78643200 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x01a00000 (pgoffset 6656)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x06500000 (pgoffset 25856)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x07e00000 (pgoffset 32256)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x09700000 (pgoffset 38656)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00041fff: exa G965 state buffer (64 kB)
>(II) intel(0): 0x00100000-0x019fffff: front buffer (25600 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01a00000-0x064fffff: exa offscreen (76800 kB)
>(II) intel(0): 0x06500000-0x07dfffff: back buffer (25600 kB) X tiled
>(II) intel(0): 0x07e00000-0x096fffff: depth buffer (25600 kB) Y tiled
>(II) intel(0): 0x09700000-0x0b6fffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000
>(II) intel(0):       RENCLK_GATE_D1: 0x20800000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0008001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0xd8000400 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002800 (10240 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00100000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x04ff03ff (1280, 1024)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00020e08 (n = 2, m1 = 14, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x94020c00 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x069704ff (1280 active, 1688 total)
>(II) intel(0):             HBLANK_A: 0x069704ff (1280 start, 1688 end)
>(II) intel(0):              HSYNC_A: 0x059f052f (1328 start, 1440 end)
>(II) intel(0):             VTOTAL_A: 0x042903ff (1024 active, 1066 total)
>(II) intel(0):             VBLANK_A: 0x042903ff (1024 start, 1066 end)
>(II) intel(0):              VSYNC_A: 0x04030400 (1025 start, 1028 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x20
>(II) intel(0):                 AR11: 0x30
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x00
>(II) intel(0):                 CR0b: 0x0f
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0xff
>(II) intel(0):                 CR0f: 0xff
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x17
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x80
>(II) intel(0): pipe A dot 108000 n 2 m1 14 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe A
>(II) intel(0):   Output TMDS-1 is connected to pipe none
>(II) intel(0):   Output TMDS-2 is connected to pipe none
>(**) Option "dpms" "true"
>(**) intel(0): DPMS enabled
>(II) intel(0): Set up textured video
>(II) intel(0): direct rendering: Enabled
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(WW) intel(0): Option "RenderAccel" is not used
>(WW) intel(0): Option "PreferredMode" is not used
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 14, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 14, (OK)
>drmOpenByBusid: drmOpenMinor returns 14
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(WW) AIGLX: 3D driver claims to not support visual 0x23
>(WW) AIGLX: 3D driver claims to not support visual 0x24
>(WW) AIGLX: 3D driver claims to not support visual 0x25
>(WW) AIGLX: 3D driver claims to not support visual 0x26
>(WW) AIGLX: 3D driver claims to not support visual 0x27
>(WW) AIGLX: 3D driver claims to not support visual 0x28
>(WW) AIGLX: 3D driver claims to not support visual 0x29
>(WW) AIGLX: 3D driver claims to not support visual 0x2a
>(WW) AIGLX: 3D driver claims to not support visual 0x2b
>(WW) AIGLX: 3D driver claims to not support visual 0x2c
>(WW) AIGLX: 3D driver claims to not support visual 0x2d
>(WW) AIGLX: 3D driver claims to not support visual 0x2e
>(WW) AIGLX: 3D driver claims to not support visual 0x2f
>(WW) AIGLX: 3D driver claims to not support visual 0x30
>(WW) AIGLX: 3D driver claims to not support visual 0x31
>(WW) AIGLX: 3D driver claims to not support visual 0x32
>(II) AIGLX: Loaded and initialized /usr/local/lib/dri/i965_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 338 x 270
>(**) Option "Protocol" "auto"
>(**) Mouse0: Device: "/dev/sysmouse"
>(**) Mouse0: Protocol: "auto"
>(**) Option "CorePointer"
>(**) Mouse0: always reports core events
>(**) Option "Device" "/dev/sysmouse"
>(==) Mouse0: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5 6 7"
>(**) Mouse0: ZAxisMapping: buttons 4, 5, 6 and 7
>(**) Mouse0: Buttons: 11
>(**) Mouse0: Sensitivity: 1
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Keyboard0: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) Keyboard0: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(II) evaluating device (Keyboard0)
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(II) evaluating device (Mouse0)
>(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
>(II) Mouse0: SetupAuto: hw.iftype is 4, hw.model is 0
>(II) Mouse0: SetupAuto: protocol is SysMouse
>(WW) USB-PS/2 Optical Mouse: No Device specified, looking for one...
>(EE) USB-PS/2 Optical Mouse: Cannot find which device to use.
>(==) USB-PS/2 Optical Mouse: Protocol: "Auto"
>(**) USB-PS/2 Optical Mouse: always reports core events
>(EE) xf86OpenSerial: No Device specified.
>(EE) USB-PS/2 Optical Mouse: cannot open input device
>(EE) PreInit failed for input device "USB-PS/2 Optical Mouse"
>(II) UnloadModule: "mouse"
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x6204 (RENCLK_GATE_D1) changed from 0x00000000 to 0x70000000
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00
>(WW) intel(0): Register 0x70008 (PIPEACONF) changed from 0xc0000000 to 0x00000000
>(WW) intel(0): PIPEACONF before: enabled, active
>(WW) intel(0): PIPEACONF after: disabled, inactive
>(WW) intel(0): Register 0x71008 (PIPEBCONF) changed from 0xc0000000 to 0x00000000
>(WW) intel(0): PIPEBCONF before: enabled, active
>(WW) intel(0): PIPEBCONF after: disabled, inactive
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000
>(II) intel(0):       RENCLK_GATE_D1: 0x70000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80008018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0008001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0x18000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000c80 (3200 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x031f0257 (800, 600)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x041f031f (800 active, 1056 total)
>(II) intel(0):             HBLANK_A: 0x041f031f (800 start, 1056 end)
>(II) intel(0):              HSYNC_A: 0x03c70347 (840 start, 968 end)
>(II) intel(0):             VTOTAL_A: 0x02730257 (600 active, 628 total)
>(II) intel(0):             VBLANK_A: 0x02730257 (600 start, 628 end)
>(II) intel(0):              VSYNC_A: 0x025c0258 (601 start, 605 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0000008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x20
>(II) intel(0):                 AR11: 0x30
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x00
>(II) intel(0):                 CR0b: 0x0f
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0xff
>(II) intel(0):                 CR0f: 0xff
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x17
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x80
>(II) intel(0): pipe A dot 40000 n 1 m1 16 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x01a00000 (pgoffset 6656)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x06500000 (pgoffset 25856)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x07e00000 (pgoffset 32256)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x09700000 (pgoffset 38656)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00041fff: exa G965 state buffer (64 kB)
>(II) intel(0): 0x00100000-0x019fffff: front buffer (25600 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01a00000-0x064fffff: exa offscreen (76800 kB)
>(II) intel(0): 0x06500000-0x07dfffff: back buffer (25600 kB) X tiled
>(II) intel(0): 0x07e00000-0x096fffff: depth buffer (25600 kB) Y tiled
>(II) intel(0): 0x09700000-0x0b6fffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000
>(II) intel(0):       RENCLK_GATE_D1: 0x20800000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0008001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0xd8000400 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002800 (10240 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00100000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x04ff03ff (1280, 1024)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00020e08 (n = 2, m1 = 14, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x94020c00 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x069704ff (1280 active, 1688 total)
>(II) intel(0):             HBLANK_A: 0x069704ff (1280 start, 1688 end)
>(II) intel(0):              HSYNC_A: 0x059f052f (1328 start, 1440 end)
>(II) intel(0):             VTOTAL_A: 0x042903ff (1024 active, 1066 total)
>(II) intel(0):             VBLANK_A: 0x042903ff (1024 start, 1066 end)
>(II) intel(0):              VSYNC_A: 0x04030400 (1025 start, 1028 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x31
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x00
>(II) intel(0):                 CR0b: 0x0f
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0xff
>(II) intel(0):                 CR0f: 0xff
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x80
>(II) intel(0): pipe A dot 108000 n 2 m1 14 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe A
>(II) intel(0):   Output TMDS-1 is connected to pipe none
>(II) intel(0):   Output TMDS-2 is connected to pipe none
>(II) intel(0): [drm] mapped front buffer at 0x80100000, handle = 0x80100000
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(**) Option "BaudRate" "1200"
>(**) Option "StopBits" "2"
>(**) Option "DataBits" "8"
>(**) Option "Parity" "None"
>(**) Option "Vmin" "1"
>(**) Option "Vtime" "0"
>(**) Option "FlowControl" "None"

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Attachments on bug 14163: 13850 | 13851

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