Attachment 139383 Details for Bug 106392 – via_reg_dump_differences_not_working_compare_to_working.txt

via_reg_dump_differences_not_working_compare_to_working.txt

dump_regs_diff_working_is_b.txt (text/plain), 8.61 KB, created by ptouchman on 2018-05-05 23:22:52 UTC

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Creator: ptouchman

Created: 2018-05-05 23:22:52 UTC

Size: 8.61 KB

patch

obsolete

>4,7d3
>< Need root privileges.
>< via-chrome-tool (C) 2009 by VIA Technologies, Inc.
>< This is FREE SOFTWARE with ABSOLUTELY NO WARRANTY
>< 
>37c33
><    3c5.1b = 0xf0 (Power Management Control 0)
>---
>>    3c5.1b = 0xb0 (Power Management Control 0)
>40c36
><        0x60 Secondary Display Engine LCK Gating: 0x60
>---
>>        0x60 Secondary Display Engine LCK Gating: 0x20
>43c39
><    3c5.1e = 0x01 (Power Management Control)
>---
>>    3c5.1e = 0xc1 (Power Management Control)
>48c44
><        0xc0 VCP Power Control: 0x00
>---
>>        0xc0 VCP Power Control: 0xc0
>57,58c53,54
><    3c5.2b = 0x00 (LVDS Interrupt Control)
><        0x01 MSI Pending IRQ Re-trigger: 0x00
>---
>>    3c5.2b = 0x01 (LVDS Interrupt Control)
>>        0x01 MSI Pending IRQ Re-trigger: 0x01
>64,65c60,61
><    3c5.2c = 0xfc (General Purpose I/O Port)
><    3c5.2d = 0x3f (Power Management Control 1)
>---
>>    3c5.2c = 0xd6 (General Purpose I/O Port)
>>    3c5.2d = 0x3b (Power Management Control 1)
>67c63
><        0x0c LCK PLL Power Control: 0x0c
>---
>>        0x0c LCK PLL Power Control: 0x08
>90,91c86,87
><    3c5.3d = 0x0c (General Purpose I/O Port)
><    3c5.3e = 0x00 (Miscellaneous Register for AGP Mux)
>---
>>    3c5.3d = 0x0e (General Purpose I/O Port)
>>    3c5.3e = 0x20 (Miscellaneous Register for AGP Mux)
>114c110
><    3c5.44 = 0x84 (VCK Clock Synthesizer Value 0)
>---
>>    3c5.44 = 0x4f (VCK Clock Synthesizer Value 0)
>116c112
><    3c5.46 = 0x05 (VCK Clock Synthesizer Value 2)
>---
>>    3c5.46 = 0x03 (VCK Clock Synthesizer Value 2)
>142,148c138,144
><    3c5.58 = 0x06 (GFX Power Control 1)
><    3c5.59 = 0xdf (GFX Power Control 2)
><        0x01 GFX-NM AGP Dynamic Clock Enable: 0x01
><        0x02 GFX-NM GMINT Channel 0 Dynamic Clock Enable: 0x02
><        0x04 GFX-NM GMINT Channel 1 Dynamic Clock Enable: 0x04
><        0x08 GFX-NM PCIC Dynamic Clock Enable: 0x08
><        0x10 GFX-NM IGA Dynamic Clock Enable: 0x10
>---
>>    3c5.58 = 0x00 (GFX Power Control 1)
>>    3c5.59 = 0x80 (GFX Power Control 2)
>>        0x01 GFX-NM AGP Dynamic Clock Enable: 0x00
>>        0x02 GFX-NM GMINT Channel 0 Dynamic Clock Enable: 0x00
>>        0x04 GFX-NM GMINT Channel 1 Dynamic Clock Enable: 0x00
>>        0x08 GFX-NM PCIC Dynamic Clock Enable: 0x00
>>        0x10 GFX-NM IGA Dynamic Clock Enable: 0x00
>161c157
><    3c5.5c = 0x20 (Device Used Status 1)
>---
>>    3c5.5c = 0x28 (Device Used Status 1)
>168c164
><    3c5.5e = 0x00 (DAC Control 2)
>---
>>    3c5.5e = 0x01 (DAC Control 2)
>194c190
><    3c5.78 = 0x80 (Backlight Control 3)
>---
>>    3c5.78 = 0x00 (Backlight Control 3)
>221,222c217,218
><    3d5.0a = 0x1f (Cursor Start)
><    3d5.0b = 0x1e (Cursor End)
>---
>>    3d5.0a = 0x1e (Cursor Start)
>>    3d5.0b = 0x00 (Cursor End)
>225,226c221,222
><    3d5.0e = 0x08 (Cursor Location High)
><    3d5.0f = 0x20 (Cursor Location Low)
>---
>>    3d5.0e = 0x00 (Cursor Location High)
>>    3d5.0f = 0x00 (Cursor Location Low)
>228c224
><    3d5.11 = 0x63 (Vertical Retrace End)
>---
>>    3d5.11 = 0x03 (Vertical Retrace End)
>234c230
><    3d5.17 = 0xa3 (CRTC Mode Control)
>---
>>    3d5.17 = 0xe3 (CRTC Mode Control)
>249,250c245,246
><    3d5.38 = 0x7d (Signature Data B0)
><    3d5.39 = 0xbf (Signature Data B1)
>---
>>    3d5.38 = 0x3c (Signature Data B0)
>>    3d5.39 = 0xff (Signature Data B1)
>259c255
><    3d5.45 = 0x01 (Power Now Indicator Control 3)
>---
>>    3d5.45 = 0x00 (Power Now Indicator Control 3)
>264,266c260,262
><    3d5.51 = 0xf1 (Second CRTC Horizontal Active Data Period)
><    3d5.52 = 0xf9 (Second CRTC Horizontal Blanking Start)
><    3d5.53 = 0xf3 (Second CRTC Horizontal Blanking End)
>---
>>    3d5.51 = 0xf5 (Second CRTC Horizontal Active Data Period)
>>    3d5.52 = 0xfd (Second CRTC Horizontal Blanking Start)
>>    3d5.53 = 0xf7 (Second CRTC Horizontal Blanking End)
>269,275c265,271
><    3d5.56 = 0xf1 (Second CRTC Horizontal Retrace Start)
><    3d5.57 = 0xf9 (Second CRTC Horizontal Retrace End)
><    3d5.58 = 0xf9 (Second CRTC Vertical Total Period)
><    3d5.59 = 0xb9 (Second CRTC Vertical Active Data Period)
><    3d5.5a = 0xf1 (Second CRTC Vertical Blanking Start)
><    3d5.5b = 0xf1 (Second CRTC Vertical Blanking End)
><    3d5.5c = 0xfb (Second CRTC Vertical Blanking Overflow)
>---
>>    3d5.56 = 0xf5 (Second CRTC Horizontal Retrace Start)
>>    3d5.57 = 0xfd (Second CRTC Horizontal Retrace End)
>>    3d5.58 = 0xfd (Second CRTC Vertical Total Period)
>>    3d5.59 = 0xbd (Second CRTC Vertical Active Data Period)
>>    3d5.5a = 0xf5 (Second CRTC Vertical Blanking Start)
>>    3d5.5b = 0xf5 (Second CRTC Vertical Blanking End)
>>    3d5.5c = 0xff (Second CRTC Vertical Blanking Overflow)
>277,278c273,274
><    3d5.5e = 0xf9 (Second CRTC Vertical Retrace Start)
><    3d5.5f = 0xf3 (Second CRTC Vertical Retrace End)
>---
>>    3d5.5e = 0xfd (Second CRTC Vertical Retrace Start)
>>    3d5.5f = 0xf7 (Second CRTC Vertical Retrace End)
>284,286c280,282
><    3d5.65 = 0xf1 (Second Display Horizontal Quadword Count)
><    3d5.66 = 0xf1 (Second Display Horizontal Offset)
><    3d5.67 = 0x00 (Second Display Color Depth and Horizontal Overflow)
>---
>>    3d5.65 = 0xf5 (Second Display Horizontal Quadword Count)
>>    3d5.66 = 0x00 (Second Display Horizontal Offset)
>>    3d5.67 = 0xc2 (Second Display Color Depth and Horizontal Overflow)
>289c285
><    3d5.6a = 0x40 (Second Display Channel and LCD Enable)
>---
>>    3d5.6a = 0x60 (Second Display Channel and LCD Enable)
>296c292
><    3d5.71 = 0x92 (Vertical Display Overflow Shadow)
>---
>>    3d5.71 = 0x12 (Vertical Display Overflow Shadow)
>303,322c299,318
><    3d5.78 = 0x55 (LCD Vertical Scaling Factor)
><    3d5.79 = 0xcf (LCD Scaling Control)
><    3d5.7a = 0x15 (LCD Scaling Parameter 1)
><    3d5.7b = 0x11 (LCD Scaling Parameter 2)
><    3d5.7c = 0x13 (LCD Scaling Parameter 3)
><    3d5.7d = 0x11 (LCD Scaling Parameter 4)
><    3d5.7e = 0x11 (LCD Scaling Parameter 5)
><    3d5.7f = 0x19 (LCD Scaling Parameter 6)
><    3d5.80 = 0x15 (LCD Scaling Parameter 7)
><    3d5.81 = 0x11 (LCD Scaling Parameter 8)
><    3d5.82 = 0x15 (LCD Scaling Parameter 9)
><    3d5.83 = 0x15 (LCD Scaling Parameter 10)
><    3d5.84 = 0x11 (LCD Scaling Parameter 11)
><    3d5.85 = 0x15 (LCD Scaling Parameter 12)
><    3d5.86 = 0x11 (LCD Scaling Parameter 13)
><    3d5.87 = 0x13 (LCD Scaling Parameter 14)
><    3d5.88 = 0xe1 (LCD Panel Type)
><    3d5.8a = 0x01 (LCD Timing Control 1)
><    3d5.8b = 0x5d (LCD Power Sequence Control 0)
><    3d5.8c = 0x2b (LCD Power Sequence Control 1)
>---
>>    3d5.78 = 0x00 (LCD Vertical Scaling Factor)
>>    3d5.79 = 0x00 (LCD Scaling Control)
>>    3d5.7a = 0x01 (LCD Scaling Parameter 1)
>>    3d5.7b = 0x02 (LCD Scaling Parameter 2)
>>    3d5.7c = 0x03 (LCD Scaling Parameter 3)
>>    3d5.7d = 0x04 (LCD Scaling Parameter 4)
>>    3d5.7e = 0x07 (LCD Scaling Parameter 5)
>>    3d5.7f = 0x0a (LCD Scaling Parameter 6)
>>    3d5.80 = 0x0d (LCD Scaling Parameter 7)
>>    3d5.81 = 0x13 (LCD Scaling Parameter 8)
>>    3d5.82 = 0x16 (LCD Scaling Parameter 9)
>>    3d5.83 = 0x19 (LCD Scaling Parameter 10)
>>    3d5.84 = 0x1c (LCD Scaling Parameter 11)
>>    3d5.85 = 0x1d (LCD Scaling Parameter 12)
>>    3d5.86 = 0x1e (LCD Scaling Parameter 13)
>>    3d5.87 = 0x1f (LCD Scaling Parameter 14)
>>    3d5.88 = 0x40 (LCD Panel Type)
>>    3d5.8a = 0x88 (LCD Timing Control 1)
>>    3d5.8b = 0x00 (LCD Power Sequence Control 0)
>>    3d5.8c = 0x00 (LCD Power Sequence Control 1)
>324,327c320,323
><    3d5.8e = 0xb5 (LCD Power Sequence Control 3)
><    3d5.8f = 0x01 (LCD Power Sequence Control 4)
><    3d5.90 = 0x10 (LCD Power Sequence Control 5)
><    3d5.91 = 0x00 (Software Control Power Sequence)
>---
>>    3d5.8e = 0x00 (LCD Power Sequence Control 3)
>>    3d5.8f = 0x00 (LCD Power Sequence Control 4)
>>    3d5.90 = 0x00 (LCD Power Sequence Control 5)
>>    3d5.91 = 0x80 (Software Control Power Sequence)
>342c338
><    3d5.a2 = 0x08 (Horizontal and Vertical Scaling Enable)
>---
>>    3d5.a2 = 0x40 (Horizontal and Vertical Scaling Enable)
>381,382c377,378
><    3d5.d1 = 0x00 (LVDS PLL2 Control)
><    3d5.d2 = 0xcb (LVDS Control)
>---
>>    3d5.d1 = 0x02 (LVDS PLL2 Control)
>>    3d5.d2 = 0xff (LVDS Control)
>384c380
><    3d5.d4 = 0x00 (LVDS Second Power Sequence Control 1)
>---
>>    3d5.d4 = 0x81 (LVDS Second Power Sequence Control 1)
>419c415
>< VCK PLL: dm=644, dtx=2, dr=1, dn=2 VCK Fvco=2312357 kHz, Fout=1156178 kHz
>---
>> VCK PLL: dm=591, dtx=2, dr=1, dn=1 VCK Fvco=2830191 kHz, Fout=1415095 kHz
>432,434c428,430
><     H total=246, active=242, blank (1530-7924), sync(4081-505)
><     V total=1530, active=1978, blank (1010-2034), sync(2041-19)
>< base_addr=0x00000000, bpp=8
>---
>>     H total=246, active=246, blank (1534-7928), sync(4085-509)
>>     V total=1534, active=1982, blank (2038-2038), sync(2045-23)
>> base_addr=0x00000000, bpp=32
>436,437c432
>< Panel Scaling enabled, mode Interpolation
>< Scaling Factors: horizontal=0, vertical=1707
>---
>> Panel Scaling disabled
>440c435
>< LVDS CRT Mode: LVDS1 + LVDS2
>---
>> LVDS CRT Mode: RESERVED

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Attachments on bug 106392: 139327 | 139360 | 139366 | 139378 | 139379 | 139380 | 139383 | 139384 | 139585 | 140139 | 140176 | 140181 | 140182 | 140183

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