Attachment 140068 Details for Bug 105613 – workaround

[patch] workaround

0001-radv-add-a-workaround-for-DXVK-hangs-by-setting-amdg.patch (text/plain), 4.24 KB, created by Samuel Pitoiset on 2018-06-07 16:03:53 UTC

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Creator: Samuel Pitoiset

Created: 2018-06-07 16:03:53 UTC

Size: 4.24 KB

patch

obsolete

>From e665c9e250a24fb641fb81b3a45e379cf398f0ff Mon Sep 17 00:00:00 2001
>From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
>Date: Thu, 7 Jun 2018 17:55:25 +0200
>Subject: [PATCH] radv: add a workaround for DXVK hangs by setting
> amdgpu-skip-threshold
>
>Workaround for bug in llvm that causes the GPU to hang in presence
>of nested loops because there is an exec mask issue. The proper
>solution is to fix LLVM but this might require a bunch of work.
>
>This fixes a bunch of GPU hangs that happen with DXVK.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105613
>Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
>---
> src/amd/vulkan/radv_shader.c | 79 +++++++++++++++++++++++++++++++++++-
> 1 file changed, 78 insertions(+), 1 deletion(-)
>
>diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
>index 68f2a55e81..2353d164c7 100644
>--- a/src/amd/vulkan/radv_shader.c
>+++ b/src/amd/vulkan/radv_shader.c
>@@ -36,6 +36,7 @@
> 
> #include <llvm-c/Core.h>
> #include <llvm-c/TargetMachine.h>
>+#include <llvm-c/Support.h>
> 
> #include "sid.h"
> #include "gfx9d.h"
>@@ -467,6 +468,82 @@ radv_fill_shader_variant(struct radv_device *device,
> 	memcpy(ptr, binary->code, binary->code_size);
> }
> 
>+static void radv_init_llvm_target()
>+{
>+	LLVMInitializeAMDGPUTargetInfo();
>+	LLVMInitializeAMDGPUTarget();
>+	LLVMInitializeAMDGPUTargetMC();
>+	LLVMInitializeAMDGPUAsmPrinter();
>+
>+	/* For inline assembly. */
>+	LLVMInitializeAMDGPUAsmParser();
>+
>+	/* Workaround for bug in llvm 4.0 that causes image intrinsics
>+	 * to disappear.
>+	 * https://reviews.llvm.org/D26348
>+	 *
>+	 * Workaround for bug in llvm that causes the GPU to hang in presence
>+	 * of nested loops because there is an exec mask issue. The proper
>+	 * solution is to fix LLVM but this might require a bunch of work.
>+	 * https://bugs.freedesktop.org/show_bug.cgi?id=105613
>+	 *
>+	 * "mesa" is the prefix for error messages.
>+	 */
>+	const char *argv[4] = { "mesa", "-simplifycfg-sink-common=false",
>+				"mesa", "-amdgpu-skip-threshold=1" };
>+	LLVMParseCommandLineOptions(4, argv, NULL);
>+}
>+
>+static once_flag radv_init_llvm_target_once_flag = ONCE_FLAG_INIT;
>+
>+static LLVMTargetRef radv_get_llvm_target(const char *triple)
>+{
>+	LLVMTargetRef target = NULL;
>+	char *err_message = NULL;
>+
>+	call_once(&radv_init_llvm_target_once_flag, radv_init_llvm_target);
>+
>+	if (LLVMGetTargetFromTriple(triple, &target, &err_message)) {
>+		fprintf(stderr, "Cannot find target for triple %s ", triple);
>+		if (err_message) {
>+			fprintf(stderr, "%s\n", err_message);
>+		}
>+		LLVMDisposeMessage(err_message);
>+		return NULL;
>+	}
>+	return target;
>+}
>+
>+static LLVMTargetMachineRef radv_create_target_machine(enum radeon_family family,
>+						       enum ac_target_machine_options tm_options,
>+						       const char **out_triple)
>+{
>+	assert(family >= CHIP_TAHITI);
>+	char features[256];
>+	const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--";
>+	LLVMTargetRef target = radv_get_llvm_target(triple);
>+
>+	snprintf(features, sizeof(features),
>+		 "+DumpCode,+vgpr-spilling,-fp32-denormals,+fp64-denormals%s%s%s%s",
>+		 tm_options & AC_TM_SISCHED ? ",+si-scheduler" : "",
>+		 tm_options & AC_TM_FORCE_ENABLE_XNACK ? ",+xnack" : "",
>+		 tm_options & AC_TM_FORCE_DISABLE_XNACK ? ",-xnack" : "",
>+		 tm_options & AC_TM_PROMOTE_ALLOCA_TO_SCRATCH ? ",-promote-alloca" : "");
>+
>+	LLVMTargetMachineRef tm = LLVMCreateTargetMachine(
>+	                             target,
>+	                             triple,
>+	                             ac_get_llvm_processor_name(family),
>+				     features,
>+	                             LLVMCodeGenLevelDefault,
>+	                             LLVMRelocDefault,
>+	                             LLVMCodeModelDefault);
>+
>+	if (out_triple)
>+		*out_triple = triple;
>+	return tm;
>+}
>+
> static struct radv_shader_variant *
> shader_variant_create(struct radv_device *device,
> 		      struct radv_shader_module *module,
>@@ -501,7 +578,7 @@ shader_variant_create(struct radv_device *device,
> 		tm_options |= AC_TM_SUPPORTS_SPILL;
> 	if (device->instance->perftest_flags & RADV_PERFTEST_SISCHED)
> 		tm_options |= AC_TM_SISCHED;
>-	tm = ac_create_target_machine(chip_family, tm_options, NULL);
>+	tm = radv_create_target_machine(chip_family, tm_options, NULL);
> 
> 	if (gs_copy_shader) {
> 		assert(shader_count == 1);
>-- 
>2.17.1
>

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