Attachment 14106 Details for Bug 14332 – X86EMU: handle CPUID instruction (passthrough)

[patch] X86EMU: handle CPUID instruction (passthrough)

0001-X86EMU-handle-CPUID-instruction-passthrough.patch (text/plain), 2.36 KB, created by Bart Trojanowski on 2008-02-02 16:59:00 UTC

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Creator: Bart Trojanowski

Created: 2008-02-02 16:59:00 UTC

Size: 2.36 KB

patch

obsolete

>From 4b0b57fdb3b877577737fe3ef6dca5f70b8cf7a8 Mon Sep 17 00:00:00 2001
>From: Bart Trojanowski <bart@symbio-technologies.com>
>Date: Sat, 2 Feb 2008 12:21:57 -0500
>Subject: [PATCH] X86EMU: handle CPUID instruction (passthrough)
>
>Signed-off-by: Bart Trojanowski <bart@jukie.net>
>---
> hw/xfree86/x86emu/ops2.c |   33 ++++++++++++++++++++++++++++++++-
> 1 files changed, 32 insertions(+), 1 deletions(-)
>
>diff --git a/hw/xfree86/x86emu/ops2.c b/hw/xfree86/x86emu/ops2.c
>index 68e73ab..19190e7 100644
>--- a/hw/xfree86/x86emu/ops2.c
>+++ b/hw/xfree86/x86emu/ops2.c
>@@ -333,6 +333,37 @@ static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
> }
> 
> /****************************************************************************
>+REMARKS: CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
>+Handles opcode 0x0f,0xa2
>+****************************************************************************/
>+static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
>+{
>+    START_OF_INSTR();
>+    DECODE_PRINTF("CPUID\n");
>+    TRACE_AND_STEP();
>+    // see this link for reference...
>+    // http://sam.zoy.org/blog/2007-04-13-shlib-with-non-pic-code-have-inline-assembly-and-pic-mix-well
>+#ifdef __PIC__
>+    __asm__ __volatile__ ("pushl %%ebx      \n\t"
>+		          "cpuid            \n\t"
>+		          "movl %%ebx, %1   \n\t"
>+		          "popl %%ebx       \n\t"
>+                          : "=a" (M.x86.R_EAX), "=r" (M.x86.R_EBX),
>+                            "=c" (M.x86.R_ECX), "=d" (M.x86.R_EDX)
>+                          : "a" (M.x86.R_EAX), "c" (M.x86.R_ECX)
>+                          : "cc");
>+#else
>+    __asm__ __volatile__ ("cpuid"
>+                          : "=a" (M.x86.R_EAX), "=b" (M.x86.R_EBX),
>+                            "=c" (M.x86.R_ECX), "=d" (M.x86.R_EDX)
>+                          : "a" (M.x86.R_EAX), "c" (M.x86.R_ECX)
>+                          : "cc");
>+#endif
>+    DECODE_CLEAR_SEGOVR();
>+    END_OF_INSTR();
>+}
>+
>+/****************************************************************************
> REMARKS:
> Handles opcode 0x0f,0xa3
> ****************************************************************************/
>@@ -2739,7 +2770,7 @@ void (*x86emu_optab2[256])(u8) =
> 
> /*  0xa0 */ x86emuOp2_push_FS,
> /*  0xa1 */ x86emuOp2_pop_FS,
>-/*  0xa2 */ x86emuOp2_illegal_op,
>+/*  0xa2 */ x86emuOp2_cpuid,
> /*  0xa3 */ x86emuOp2_bt_R,
> /*  0xa4 */ x86emuOp2_shld_IMM,
> /*  0xa5 */ x86emuOp2_shld_CL,
>-- 
>1.5.2.5
>

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