Attachment 141556 Details for Bug 107896 – kernel log

kernel log

20180913_CRB_HF1-13_DMESG.log (text/plain), 1.06 MB, created by JingWu Lin on 2018-09-14 05:57:26 UTC

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Creator: JingWu Lin

Created: 2018-09-14 05:57:26 UTC

Size: 1.06 MB

patch

obsolete

>[    0.000000] Linux version 4.19.0-rc2-drm-tip-2018y-09m-04d+ (root@edwardtseng-Geminilake) (gcc version 7.3.0 (Ubuntu 7.3.0-16ubuntu3)) #3 SMP Thu Jan 2 01:04:10 CST 2098
>[    0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-4.19.0-rc2-drm-tip-2018y-09m-04d+ root=UUID=9e89cd70-ef46-4525-93a4-373aa603239c ro quiet splash drm.debug=0x1e log_buf_len=4M vt.handoff=1
>[    0.000000] KERNEL supported cpus:
>[    0.000000]   Intel GenuineIntel
>[    0.000000]   AMD AuthenticAMD
>[    0.000000]   Centaur CentaurHauls
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers'
>[    0.000000] x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR'
>[    0.000000] x86/fpu: xstate_offset[3]:  576, xstate_sizes[3]:   64
>[    0.000000] x86/fpu: xstate_offset[4]:  640, xstate_sizes[4]:   64
>[    0.000000] x86/fpu: Enabled xstate features 0x1b, context size is 704 bytes, using 'compacted' format.
>[    0.000000] BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000059fff] reserved
>[    0.000000] BIOS-e820: [mem 0x000000000005a000-0x000000000009dfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009e000-0x00000000000fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000000fffffff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000010000000-0x0000000012151fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000012152000-0x0000000076ba9fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000076baa000-0x0000000076e90fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000076e91000-0x0000000076f80fff] type 20
>[    0.000000] BIOS-e820: [mem 0x0000000076f81000-0x0000000079980fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000079981000-0x00000000799e0fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000799e1000-0x0000000079a20fff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x0000000079a21000-0x000000007abfffff] usable
>[    0.000000] BIOS-e820: [mem 0x000000007ac00000-0x000000007fffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000d3709000-0x00000000d3709fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000e3ffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed01000-0x00000000fed01fff] reserved
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.60 by EDK II
>[    0.000000] efi:  SMBIOS=0x76e8d000  SMBIOS 3.0=0x76e8b000  ACPI=0x79a20000  ACPI 2.0=0x79a20014  ESRT=0x79940000 
>[    0.000000] SMBIOS 3.1.1 present.
>[    0.000000] DMI: Intel Corp. Geminilake/GLK RVP1 DDR4 (05), BIOS GELKRVPA.X64.0082.B51.1801121400 01/12/2018
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] tsc: Detected 1497.600 MHz processor
>[    0.000035] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000041] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000053] last_pfn = 0x7ac00 max_arch_pfn = 0x400000000
>[    0.000059] MTRR default type: uncachable
>[    0.000061] MTRR fixed ranges enabled:
>[    0.000063]   00000-9FFFF write-back
>[    0.000065]   A0000-BFFFF uncachable
>[    0.000066]   C0000-FFFFF write-protect
>[    0.000068] MTRR variable ranges enabled:
>[    0.000071]   0 base 00FF800000 mask 7FFF800000 write-protect
>[    0.000073]   1 base 0000000000 mask 7F80000000 write-back
>[    0.000075]   2 base 007B000000 mask 7FFF000000 uncachable
>[    0.000076]   3 base 007C000000 mask 7FFC000000 uncachable
>[    0.000078]   4 base 0090000000 mask 7FF0000000 write-combining
>[    0.000079]   5 disabled
>[    0.000080]   6 disabled
>[    0.000081]   7 disabled
>[    0.000083]   8 disabled
>[    0.000084]   9 disabled
>[    0.002252] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WP  UC- WT  
>[    0.009291] esrt: ESRT header is not in the memory map.
>[    0.009353] Scanning 1 areas for low memory corruption
>[    0.009359] Base memory trampoline at [(____ptrval____)] 98000 size 24576
>[    0.009365] Using GB pages for direct mapping
>[    0.009369] BRK [0x1a16e000, 0x1a16efff] PGTABLE
>[    0.009373] BRK [0x1a16f000, 0x1a16ffff] PGTABLE
>[    0.009375] BRK [0x1a170000, 0x1a170fff] PGTABLE
>[    0.009472] BRK [0x1a171000, 0x1a171fff] PGTABLE
>[    0.009477] BRK [0x1a172000, 0x1a172fff] PGTABLE
>[    0.010031] BRK [0x1a173000, 0x1a173fff] PGTABLE
>[    0.010113] BRK [0x1a174000, 0x1a174fff] PGTABLE
>[    0.011045] log_buf_len: 4194304 bytes
>[    0.011047] early log buf free: 257548(98%)
>[    0.011048] Secure boot could not be determined
>[    0.011050] RAMDISK: [mem 0x31d6d000-0x34eadfff]
>[    0.011068] ACPI: Early table checksum verification disabled
>[    0.011076] ACPI: RSDP 0x0000000079A20014 000024 (v02 INTEL )
>[    0.011083] ACPI: XSDT 0x00000000799ED188 0000FC (v01 INTEL  GLK-SOC  00000003 BRXT 01000013)
>[    0.011095] ACPI: FACP 0x0000000079A18000 00010C (v05 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011107] ACPI: DSDT 0x00000000799FE000 01262A (v02 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011114] ACPI: FACS 0x00000000799CE000 000040
>[    0.011120] ACPI: UEFI 0x00000000799D7000 000042 (v01 INTEL  EDK2     00000002 BRXT 01000013)
>[    0.011126] ACPI: SSDT 0x0000000079A1E000 000420 (v02 INTEL  Tpm2Tabl 00001000 INTL 20160527)
>[    0.011133] ACPI: TPM2 0x0000000079A1D000 000034 (v04                 00000000      00000000)
>[    0.011139] ACPI: BDAT 0x0000000079A1C000 000030 (v02                 00000000      00000000)
>[    0.011146] ACPI: HPET 0x0000000079A17000 000038 (v01 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011152] ACPI: LPIT 0x0000000079A16000 00005C (v01 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011158] ACPI: APIC 0x0000000079A15000 000084 (v03 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011164] ACPI: MCFG 0x0000000079A14000 00003C (v01 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011170] ACPI: NPKT 0x0000000079A13000 000065 (v01 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011176] ACPI: PRAM 0x0000000079A12000 000030 (v01 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011182] ACPI: WSMT 0x0000000079A11000 000028 (v01 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011188] ACPI: SSDT 0x00000000799FA000 003F51 (v02 INTEL  DptfTab  00000003 BRXT 0100000D)
>[    0.011195] ACPI: SSDT 0x00000000799F4000 005A24 (v02 INTEL  RVPRtd3  00000003 BRXT 0100000D)
>[    0.011201] ACPI: SSDT 0x00000000799F2000 0010B3 (v02 INTEL  UsbCTabl 00000003 BRXT 0100000D)
>[    0.011207] ACPI: SSDT 0x00000000799F0000 00153E (v01 Intel_ Platform 00001000 INTL 20160527)
>[    0.011213] ACPI: SSDT 0x00000000799EF000 0000B1 (v01 Intel_ ADebTabl 00001000 INTL 20160527)
>[    0.011220] ACPI: SSDT 0x00000000799EE000 0004D5 (v02 PmRef  Cpu0Ist  00003000 INTL 20160527)
>[    0.011226] ACPI: SSDT 0x0000000079A1F000 000775 (v02 CpuRef CpuSsdt  00003000 INTL 20160527)
>[    0.011232] ACPI: SSDT 0x00000000799EC000 000388 (v02 PmRef  Cpu0Tst  00003000 INTL 20160527)
>[    0.011238] ACPI: SSDT 0x00000000799EB000 0001E6 (v02 PmRef  ApTst    00003000 INTL 20160527)
>[    0.011245] ACPI: SSDT 0x00000000799E8000 002939 (v02 SaSsdt SaSsdt   00003000 INTL 20160527)
>[    0.011251] ACPI: FPDT 0x00000000799E7000 000044 (v01 INTEL  EDK2     00000002 BRXT 01000013)
>[    0.011257] ACPI: DBGP 0x0000000079A1A000 000034 (v01 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011263] ACPI: DBG2 0x0000000079A1B000 000072 (v00 INTEL  GLK-SOC  00000003 BRXT 0100000D)
>[    0.011269] ACPI: WDAT 0x0000000079A19000 000104 (v01                 00000000      00000000)
>[    0.011275] ACPI: NHLT 0x00000000799E5000 001A50 (v00 INTEL  EDK2     00000002 BRXT 01000013)
>[    0.011294] ACPI: Local APIC address 0xfee00000
>[    0.011599] No NUMA configuration found
>[    0.011601] Faking a node at [mem 0x0000000000000000-0x000000007abfffff]
>[    0.011622] NODE_DATA(0) allocated [mem 0x75334000-0x7535efff]
>[    0.012177] Zone ranges:
>[    0.012179]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.012182]   DMA32    [mem 0x0000000001000000-0x000000007abfffff]
>[    0.012185]   Normal   empty
>[    0.012187]   Device   empty
>[    0.012189] Movable zone start for each node
>[    0.012195] Early memory node ranges
>[    0.012196]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>[    0.012198]   node   0: [mem 0x000000000005a000-0x000000000009dfff]
>[    0.012199]   node   0: [mem 0x0000000000100000-0x000000000fffffff]
>[    0.012200]   node   0: [mem 0x0000000012152000-0x0000000076ba9fff]
>[    0.012202]   node   0: [mem 0x0000000079a21000-0x000000007abfffff]
>[    0.013858] Reserved but unavailable: 42030 pages
>[    0.013861] Initmem setup node 0 [mem 0x0000000000001000-0x000000007abfffff]
>[    0.013863] On node 0 totalpages: 482258
>[    0.013865]   DMA zone: 64 pages used for memmap
>[    0.013867]   DMA zone: 23 pages reserved
>[    0.013868]   DMA zone: 3995 pages, LIFO batch:0
>[    0.014081]   DMA32 zone: 7792 pages used for memmap
>[    0.014083]   DMA32 zone: 478263 pages, LIFO batch:63
>[    0.039614] Reserving Intel graphics memory at [mem 0x7c000000-0x7fffffff]
>[    0.039857] ACPI: PM-Timer IO Port: 0x408
>[    0.039862] ACPI: Local APIC address 0xfee00000
>[    0.039875] ACPI: LAPIC_NMI (acpi_id[0x01] high level lint[0x1])
>[    0.039876] ACPI: LAPIC_NMI (acpi_id[0x02] high level lint[0x1])
>[    0.039878] ACPI: LAPIC_NMI (acpi_id[0x03] high level lint[0x1])
>[    0.039879] ACPI: LAPIC_NMI (acpi_id[0x04] high level lint[0x1])
>[    0.039929] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-119
>[    0.039933] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.039936] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
>[    0.039939] ACPI: IRQ0 used by override.
>[    0.039941] ACPI: IRQ9 used by override.
>[    0.039944] Using ACPI (MADT) for SMP configuration information
>[    0.039946] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.039955] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
>[    0.039993] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.039996] PM: Registered nosave memory: [mem 0x00058000-0x00059fff]
>[    0.039999] PM: Registered nosave memory: [mem 0x0009e000-0x000fffff]
>[    0.040002] PM: Registered nosave memory: [mem 0x10000000-0x12151fff]
>[    0.040005] PM: Registered nosave memory: [mem 0x76baa000-0x76e90fff]
>[    0.040007] PM: Registered nosave memory: [mem 0x76e91000-0x76f80fff]
>[    0.040008] PM: Registered nosave memory: [mem 0x76f81000-0x79980fff]
>[    0.040009] PM: Registered nosave memory: [mem 0x79981000-0x799e0fff]
>[    0.040010] PM: Registered nosave memory: [mem 0x799e1000-0x79a20fff]
>[    0.040014] [mem 0x80000000-0xd3708fff] available for PCI devices
>[    0.040016] Booting paravirtualized kernel on bare hardware
>[    0.040021] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns
>[    0.040039] random: get_random_bytes called from start_kernel+0x99/0x545 with crng_init=0
>[    0.040054] setup_percpu: NR_CPUS:8192 nr_cpumask_bits:4 nr_cpu_ids:4 nr_node_ids:1
>[    0.040618] percpu: Embedded 47 pages/cpu @(____ptrval____) s155648 r8192 d28672 u524288
>[    0.040631] pcpu-alloc: s155648 r8192 d28672 u524288 alloc=1*2097152
>[    0.040634] pcpu-alloc: [0] 0 1 2 3 
>[    0.040692] Built 1 zonelists, mobility grouping on.  Total pages: 474379
>[    0.040694] Policy zone: DMA32
>[    0.040697] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-4.19.0-rc2-drm-tip-2018y-09m-04d+ root=UUID=9e89cd70-ef46-4525-93a4-373aa603239c ro quiet splash drm.debug=0x1e log_buf_len=4M vt.handoff=1
>[    0.040932] Calgary: detecting Calgary via BIOS EBDA area
>[    0.040935] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
>[    0.057131] Memory: 1769376K/1929032K available (12300K kernel code, 2685K rwdata, 4232K rodata, 2440K init, 2352K bss, 159656K reserved, 0K cma-reserved)
>[    0.057382] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>[    0.057396] Kernel/User page tables isolation: enabled
>[    0.057527] ftrace: allocating 40911 entries in 160 pages
>[    0.084557] rcu: Hierarchical RCU implementation.
>[    0.084560] rcu: 	RCU restricting CPUs from NR_CPUS=8192 to nr_cpu_ids=4.
>[    0.084562] 	Tasks RCU enabled.
>[    0.084563] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
>[    0.090507] NR_IRQS: 524544, nr_irqs: 1024, preallocated irqs: 16
>[    0.090916] Console: colour dummy device 80x25
>[    0.091011] console [tty0] enabled
>[    0.091038] ACPI: Core revision 20180810
>[    0.091689] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 99544814920 ns
>[    0.091727] hpet clockevent registered
>[    0.091788] APIC: Switch to symmetric I/O mode setup
>[    0.093169] x2apic: IRQ remapping doesn't support X2APIC mode
>[    0.098148] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.115742] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x159647815e3, max_idle_ns: 440795269835 ns
>[    0.115763] Calibrating delay loop (skipped), value calculated using timer frequency.. 2995.20 BogoMIPS (lpj=5990400)
>[    0.115768] pid_max: default: 32768 minimum: 301
>[    0.116719] Security Framework initialized
>[    0.116722] Yama: becoming mindful.
>[    0.116755] AppArmor: AppArmor initialized
>[    0.117384] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
>[    0.117697] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
>[    0.117724] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.117737] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.118133] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature
>[    0.118148] mce: CPU supports 7 MCE banks
>[    0.118198] CPU0: Thermal monitoring enabled (TM1)
>[    0.118258] process: using mwait in idle threads
>[    0.118262] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0
>[    0.118263] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0, 1GB 0
>[    0.118269] Spectre V2 : Mitigation: Enhanced IBRS
>[    0.118271] Spectre V2 : Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch
>[    0.118272] Spectre V2 : Spectre v2 mitigation: Enabling Indirect Branch Prediction Barrier
>[    0.118273] Speculative Store Bypass: Vulnerable
>[    0.118684] Freeing SMP alternatives memory: 36K
>[    0.123823] TSC deadline timer enabled
>[    0.123832] smpboot: CPU0: Intel(R) Celeron(R) J4105 CPU @ 1.50GHz (family: 0x6, model: 0x7a, stepping: 0x1)
>[    0.124053] Performance Events: PEBS fmt3+, Goldmont plus events, 32-deep LBR, full-width counters, Intel PMU driver.
>[    0.124082] ... version:                4
>[    0.124083] ... bit width:              48
>[    0.124084] ... generic registers:      4
>[    0.124085] ... value mask:             0000ffffffffffff
>[    0.124086] ... max period:             00007fffffffffff
>[    0.124087] ... fixed-purpose events:   3
>[    0.124088] ... event mask:             000000070000000f
>[    0.124153] rcu: Hierarchical SRCU implementation.
>[    0.125577] NMI watchdog: Enabled. Permanently consumes one hw-PMU counter.
>[    0.125681] smp: Bringing up secondary CPUs ...
>[    0.125851] x86: Booting SMP configuration:
>[    0.125853] .... node  #0, CPUs:      #1
>[    0.000874] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature
>[    0.127296]  #2
>[    0.000874] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature
>[    0.128651]  #3
>[    0.000874] x86/cpu: Activated the Intel User Mode Instruction Prevention (UMIP) CPU feature
>[    0.129120] smp: Brought up 1 node, 4 CPUs
>[    0.129120] smpboot: Max logical packages: 1
>[    0.129120] smpboot: Total of 4 processors activated (11980.80 BogoMIPS)
>[    0.132093] devtmpfs: initialized
>[    0.132093] x86/mm: Memory block size: 128MB
>[    0.132378] PM: Registering ACPI NVS region [mem 0x79981000-0x799e0fff] (393216 bytes)
>[    0.132378] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
>[    0.132378] futex hash table entries: 1024 (order: 4, 65536 bytes)
>[    0.132378] pinctrl core: initialized pinctrl subsystem
>[    0.132378] RTC time: 20:56:41, date: 01/01/98
>[    0.132467] NET: Registered protocol family 16
>[    0.132648] audit: initializing netlink subsys (disabled)
>[    0.132660] audit: type=2000 audit(4039448201.044:1): state=initialized audit_enabled=0 res=1
>[    0.132660] cpuidle: using governor ladder
>[    0.132660] cpuidle: using governor menu
>[    0.132660] ACPI: bus type PCI registered
>[    0.132660] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.132660] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000)
>[    0.132660] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820
>[    0.132660] PCI: Using configuration type 1 for base access
>[    0.137193] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
>[    0.137193] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
>[    0.137193] ACPI: Added _OSI(Module Device)
>[    0.137193] ACPI: Added _OSI(Processor Device)
>[    0.137193] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.137193] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.137193] ACPI: Added _OSI(Linux-Dell-Video)
>[    0.137193] ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio)
>[    0.178387] ACPI: 12 ACPI AML tables successfully acquired and loaded
>[    0.201493] ACPI: Dynamic OEM Table Load:
>[    0.201509] ACPI: SSDT 0xFFFF8BA3F587AE00 0001A5 (v02 PmRef  Cpu0Cst  00003001 INTL 20160527)
>[    0.202710] ACPI: Dynamic OEM Table Load:
>[    0.202723] ACPI: SSDT 0xFFFF8BA3F587A200 0001E6 (v02 PmRef  ApIst    00003000 INTL 20160527)
>[    0.203428] ACPI: Dynamic OEM Table Load:
>[    0.203440] ACPI: SSDT 0xFFFF8BA3F5842600 0000C9 (v02 PmRef  ApCst    00003000 INTL 20160527)
>[    0.207191] ACPI: EC: EC started
>[    0.207193] ACPI: EC: interrupt blocked
>[    0.375960] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as first EC
>[    0.375963] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62
>[    0.375966] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions
>[    0.375967] ACPI: Interpreter enabled
>[    0.376020] ACPI: (supports S0 S3 S4 S5)
>[    0.376022] ACPI: Using IOAPIC for interrupt routing
>[    0.376093] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.378091] ACPI: Enabled 10 GPEs in block 00 to 7F
>[    0.382048] ACPI: Power Resource [PXP] (on)
>[    0.529413] ACPI: Power Resource [DRST] (on)
>[    0.530817] ACPI: Power Resource [PXP] (on)
>[    0.677395] ACPI: Power Resource [DRST] (on)
>[    0.678785] ACPI: Power Resource [PXP] (on)
>[    0.825379] ACPI: Power Resource [DRST] (on)
>[    0.826408] ACPI: Power Resource [PXP] (off)
>[    0.829126] ACPI: Power Resource [DRST] (on)
>[    0.830505] ACPI: Power Resource [PXP] (on)
>[    0.857131] ACPI: Power Resource [DRST] (on)
>[    0.858540] ACPI: Power Resource [PXP] (on)
>[    1.005393] ACPI: Power Resource [DRST] (on)
>[    1.005787] ACPI: Power Resource [SPPR] (on)
>[    1.028481] ACPI: Power Resource [SPPR] (on)
>[    1.029510] ACPI: Power Resource [UPPR] (on)
>[    1.030772] ACPI: Power Resource [BTPR] (on)
>[    1.031747] ACPI: Power Resource [UPPR] (on)
>[    1.033434] ACPI: Power Resource [UPPR] (on)
>[    1.035045] ACPI: Power Resource [PX03] (off)
>[    1.037681] ACPI: Power Resource [BTPR] (on)
>[    1.038699] ACPI: Power Resource [UPPR] (on)
>[    1.040455] ACPI: Power Resource [UPPR] (on)
>[    1.042146] ACPI: Power Resource [UPPR] (on)
>[    1.043467] ACPI: Power Resource [USBC] (on)
>[    1.043733] ACPI: Power Resource [SDPR] (on)
>[    1.068105] ACPI: Power Resource [LSPR] (on)
>[    1.094570] ACPI: Power Resource [WRST] (on)
>[    1.095193] ACPI: Power Resource [PAUD] (on)
>[    1.105021] ACPI: Power Resource [FN00] (on)
>[    1.144625] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
>[    1.144635] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    1.146775] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability LTR]
>[    1.146809] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge
>[    1.148340] PCI host bridge to bus 0000:00
>[    1.148344] pci_bus 0000:00: root bus resource [io  0x0070-0x0077]
>[    1.148346] pci_bus 0000:00: root bus resource [io  0x0000-0x006f window]
>[    1.148349] pci_bus 0000:00: root bus resource [io  0x0078-0x0cf7 window]
>[    1.148351] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    1.148353] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    1.148355] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000dffff window]
>[    1.148357] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000fffff window]
>[    1.148359] pci_bus 0000:00: root bus resource [mem 0x7c000001-0x7fffffff window]
>[    1.148361] pci_bus 0000:00: root bus resource [mem 0x80000000-0xbfffffff window]
>[    1.148363] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xefffffff window]
>[    1.148365] pci_bus 0000:00: root bus resource [mem 0xfea00000-0xfeafffff window]
>[    1.148367] pci_bus 0000:00: root bus resource [mem 0xfed00000-0xfed003ff window]
>[    1.148369] pci_bus 0000:00: root bus resource [mem 0xfed01000-0xfed01fff window]
>[    1.148371] pci_bus 0000:00: root bus resource [mem 0xfed03000-0xfed03fff window]
>[    1.148373] pci_bus 0000:00: root bus resource [mem 0xfed06000-0xfed06fff window]
>[    1.148375] pci_bus 0000:00: root bus resource [mem 0xfed08000-0xfed09fff window]
>[    1.148377] pci_bus 0000:00: root bus resource [mem 0xfed80000-0xfedbffff window]
>[    1.148379] pci_bus 0000:00: root bus resource [mem 0xfed1c000-0xfed1cfff window]
>[    1.148381] pci_bus 0000:00: root bus resource [mem 0xfee00000-0xfeefffff window]
>[    1.148384] pci_bus 0000:00: root bus resource [bus 00-ff]
>[    1.148400] pci 0000:00:00.0: [8086:31f0] type 00 class 0x060000
>[    1.149003] pci 0000:00:00.1: [8086:318c] type 00 class 0x118000
>[    1.149040] pci 0000:00:00.1: reg 0x10: [mem 0x80000000-0x80007fff 64bit]
>[    1.149688] pci 0000:00:00.3: [8086:3190] type 00 class 0x088000
>[    1.149711] pci 0000:00:00.3: reg 0x10: [mem 0xa1218000-0xa1218fff 64bit]
>[    1.150302] pci 0000:00:02.0: [8086:3185] type 00 class 0x030000
>[    1.150319] pci 0000:00:02.0: reg 0x10: [mem 0xa0000000-0xa0ffffff 64bit]
>[    1.150328] pci 0000:00:02.0: reg 0x18: [mem 0x90000000-0x9fffffff 64bit pref]
>[    1.150335] pci 0000:00:02.0: reg 0x20: [io  0x2000-0x203f]
>[    1.150360] pci 0000:00:02.0: BAR 2: assigned to efifb
>[    1.151017] pci 0000:00:0e.0: [8086:3198] type 00 class 0x040100
>[    1.151047] pci 0000:00:0e.0: reg 0x10: [mem 0xa1210000-0xa1213fff 64bit]
>[    1.151075] pci 0000:00:0e.0: reg 0x20: [mem 0xa1000000-0xa10fffff 64bit]
>[    1.151142] pci 0000:00:0e.0: PME# supported from D0 D3hot D3cold
>[    1.152219] pci 0000:00:0f.0: [8086:319a] type 00 class 0x078000
>[    1.152267] pci 0000:00:0f.0: reg 0x10: [mem 0xa1219000-0xa1219fff 64bit]
>[    1.152420] pci 0000:00:0f.0: PME# supported from D3hot
>[    1.152992] pci 0000:00:11.0: [8086:31a2] type 00 class 0x005007
>[    1.153031] pci 0000:00:11.0: reg 0x10: [mem 0xa1214000-0xa1215fff 64bit]
>[    1.153052] pci 0000:00:11.0: reg 0x18: [mem 0xa121a000-0xa121afff 64bit]
>[    1.153720] pci 0000:00:12.0: [8086:31e3] type 00 class 0x010601
>[    1.153742] pci 0000:00:12.0: reg 0x10: [mem 0xa1216000-0xa1217fff]
>[    1.153751] pci 0000:00:12.0: reg 0x14: [mem 0xa123d000-0xa123d0ff]
>[    1.153760] pci 0000:00:12.0: reg 0x18: [io  0x2080-0x2087]
>[    1.153769] pci 0000:00:12.0: reg 0x1c: [io  0x2088-0x208b]
>[    1.153778] pci 0000:00:12.0: reg 0x20: [io  0x2060-0x207f]
>[    1.153788] pci 0000:00:12.0: reg 0x24: [mem 0xa123b000-0xa123b7ff]
>[    1.153839] pci 0000:00:12.0: PME# supported from D3hot
>[    1.154439] pci 0000:00:13.0: [8086:31da] type 01 class 0x060400
>[    1.154532] pci 0000:00:13.0: PME# supported from D0 D3hot D3cold
>[    1.155111] pci 0000:00:15.0: [8086:31a8] type 00 class 0x0c0330
>[    1.155139] pci 0000:00:15.0: reg 0x10: [mem 0xa1200000-0xa120ffff 64bit]
>[    1.155243] pci 0000:00:15.0: PME# supported from D3hot D3cold
>[    1.155810] pci 0000:00:16.0: [8086:31ac] type 00 class 0x118000
>[    1.155842] pci 0000:00:16.0: reg 0x10: [mem 0xa121b000-0xa121bfff 64bit]
>[    1.155856] pci 0000:00:16.0: reg 0x18: [mem 0xa121c000-0xa121cfff 64bit]
>[    1.156443] pci 0000:00:16.1: [8086:31ae] type 00 class 0x118000
>[    1.156471] pci 0000:00:16.1: reg 0x10: [mem 0xa121d000-0xa121dfff 64bit]
>[    1.156486] pci 0000:00:16.1: reg 0x18: [mem 0xa121e000-0xa121efff 64bit]
>[    1.157096] pci 0000:00:16.2: [8086:31b0] type 00 class 0x118000
>[    1.157124] pci 0000:00:16.2: reg 0x10: [mem 0xa121f000-0xa121ffff 64bit]
>[    1.157138] pci 0000:00:16.2: reg 0x18: [mem 0xa1220000-0xa1220fff 64bit]
>[    1.157731] pci 0000:00:16.3: [8086:31b2] type 00 class 0x118000
>[    1.157761] pci 0000:00:16.3: reg 0x10: [mem 0xa1221000-0xa1221fff 64bit]
>[    1.157776] pci 0000:00:16.3: reg 0x18: [mem 0xa1222000-0xa1222fff 64bit]
>[    1.158404] pci 0000:00:17.0: [8086:31b4] type 00 class 0x118000
>[    1.158435] pci 0000:00:17.0: reg 0x10: [mem 0xa1223000-0xa1223fff 64bit]
>[    1.158450] pci 0000:00:17.0: reg 0x18: [mem 0xa1224000-0xa1224fff 64bit]
>[    1.159036] pci 0000:00:17.1: [8086:31b6] type 00 class 0x118000
>[    1.159065] pci 0000:00:17.1: reg 0x10: [mem 0xa1225000-0xa1225fff 64bit]
>[    1.159079] pci 0000:00:17.1: reg 0x18: [mem 0xa1226000-0xa1226fff 64bit]
>[    1.159666] pci 0000:00:17.2: [8086:31b8] type 00 class 0x118000
>[    1.159697] pci 0000:00:17.2: reg 0x10: [mem 0xa1227000-0xa1227fff 64bit]
>[    1.159729] pci 0000:00:17.2: reg 0x18: [mem 0xa1228000-0xa1228fff 64bit]
>[    1.160322] pci 0000:00:17.3: [8086:31ba] type 00 class 0x118000
>[    1.160350] pci 0000:00:17.3: reg 0x10: [mem 0xa1229000-0xa1229fff 64bit]
>[    1.160366] pci 0000:00:17.3: reg 0x18: [mem 0xa122a000-0xa122afff 64bit]
>[    1.160969] pci 0000:00:18.0: [8086:31bc] type 00 class 0x118000
>[    1.160998] pci 0000:00:18.0: reg 0x10: [mem 0xa122b000-0xa122bfff 64bit]
>[    1.161011] pci 0000:00:18.0: reg 0x18: [mem 0xa122c000-0xa122cfff 64bit]
>[    1.161623] pci 0000:00:18.1: [8086:31be] type 00 class 0x118000
>[    1.161652] pci 0000:00:18.1: reg 0x10: [mem 0xa122d000-0xa122dfff 64bit]
>[    1.161667] pci 0000:00:18.1: reg 0x18: [mem 0xa122e000-0xa122efff 64bit]
>[    1.162263] pci 0000:00:18.3: [8086:31ee] type 00 class 0x118000
>[    1.162294] pci 0000:00:18.3: reg 0x10: [mem 0xa122f000-0xa122ffff 64bit]
>[    1.162308] pci 0000:00:18.3: reg 0x18: [mem 0xa1230000-0xa1230fff 64bit]
>[    1.162934] pci 0000:00:19.0: [8086:31c2] type 00 class 0x118000
>[    1.162962] pci 0000:00:19.0: reg 0x10: [mem 0xa1231000-0xa1231fff 64bit]
>[    1.162977] pci 0000:00:19.0: reg 0x18: [mem 0xa1232000-0xa1232fff 64bit]
>[    1.163560] pci 0000:00:19.1: [8086:31c4] type 00 class 0x118000
>[    1.163589] pci 0000:00:19.1: reg 0x10: [mem 0xa1233000-0xa1233fff 64bit]
>[    1.163606] pci 0000:00:19.1: reg 0x18: [mem 0xa1234000-0xa1234fff 64bit]
>[    1.164226] pci 0000:00:19.2: [8086:31c6] type 00 class 0x118000
>[    1.164253] pci 0000:00:19.2: reg 0x10: [mem 0xa1235000-0xa1235fff 64bit]
>[    1.164268] pci 0000:00:19.2: reg 0x18: [mem 0xa1236000-0xa1236fff 64bit]
>[    1.164891] pci 0000:00:1c.0: [8086:31cc] type 00 class 0x080501
>[    1.164921] pci 0000:00:1c.0: reg 0x10: [mem 0xa1237000-0xa1237fff 64bit]
>[    1.164936] pci 0000:00:1c.0: reg 0x18: [mem 0xa1238000-0xa1238fff 64bit]
>[    1.165592] pci 0000:00:1e.0: [8086:31d0] type 00 class 0x080501
>[    1.165620] pci 0000:00:1e.0: reg 0x10: [mem 0xa1239000-0xa1239fff 64bit]
>[    1.165635] pci 0000:00:1e.0: reg 0x18: [mem 0xa123a000-0xa123afff 64bit]
>[    1.166244] pci 0000:00:1f.0: [8086:31e8] type 00 class 0x060100
>[    1.166966] pci 0000:00:1f.1: [8086:31d4] type 00 class 0x0c0500
>[    1.167037] pci 0000:00:1f.1: reg 0x10: [mem 0xa123c000-0xa123c0ff 64bit]
>[    1.167119] pci 0000:00:1f.1: reg 0x20: [io  0x2040-0x205f]
>[    1.167832] pci 0000:01:00.0: [10ec:8168] type 00 class 0x020000
>[    1.167865] pci 0000:01:00.0: reg 0x10: [io  0x1000-0x10ff]
>[    1.167895] pci 0000:01:00.0: reg 0x18: [mem 0xa1104000-0xa1104fff 64bit]
>[    1.167914] pci 0000:01:00.0: reg 0x20: [mem 0xa1100000-0xa1103fff 64bit]
>[    1.167936] pci 0000:01:00.0: Upstream bridge's Max Payload Size set to 128 (was 256, max 256)
>[    1.167943] pci 0000:01:00.0: Max Payload Size set to 128 (was 128, max 128)
>[    1.168035] pci 0000:01:00.0: supports D1 D2
>[    1.168037] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>[    1.168217] pci 0000:00:13.0: PCI bridge to [bus 01]
>[    1.168223] pci 0000:00:13.0:   bridge window [io  0x1000-0x1fff]
>[    1.168227] pci 0000:00:13.0:   bridge window [mem 0xa1100000-0xa11fffff]
>[    1.190286] ACPI: PCI Interrupt Link [LNKA] (IRQs *3 4 5 6 10 11 12 14 15)
>[    1.190466] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 *4 5 6 10 11 12 14 15)
>[    1.190645] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 *5 6 10 11 12 14 15)
>[    1.190823] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 *6 10 11 12 14 15)
>[    1.191001] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *7
>[    1.191179] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *9
>[    1.191357] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 *10 11 12 14 15)
>[    1.191535] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 *11 12 14 15)
>[    1.194254] ACPI: EC: interrupt unblocked
>[    1.194302] ACPI: EC: event unblocked
>[    1.194329] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62
>[    1.194332] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions and events
>[    1.194402] pci 0000:00:02.0: vgaarb: setting as boot VGA device
>[    1.194402] pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
>[    1.194402] pci 0000:00:02.0: vgaarb: bridge control possible
>[    1.194402] vgaarb: loaded
>[    1.194402] SCSI subsystem initialized
>[    1.194402] libata version 3.00 loaded.
>[    1.194402] ACPI: bus type USB registered
>[    1.194402] usbcore: registered new interface driver usbfs
>[    1.194402] usbcore: registered new interface driver hub
>[    1.194402] usbcore: registered new device driver usb
>[    1.194402] pps_core: LinuxPPS API ver. 1 registered
>[    1.194402] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>[    1.194402] PTP clock support registered
>[    1.194402] EDAC MC: Ver: 3.0.0
>[    1.194402] Registered efivars operations
>[    1.203967] PCI: Using ACPI for IRQ routing
>[    1.211209] PCI: pci_cache_line_size set to 64 bytes
>[    1.211389] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    1.211391] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>[    1.211393] e820: reserve RAM buffer [mem 0x76baa000-0x77ffffff]
>[    1.211394] e820: reserve RAM buffer [mem 0x7ac00000-0x7bffffff]
>[    1.211588] NetLabel: Initializing
>[    1.211590] NetLabel:  domain hash size = 128
>[    1.211591] NetLabel:  protocols = UNLABELED CIPSOv4 CALIPSO
>[    1.211617] NetLabel:  unlabeled traffic allowed by default
>[    1.211932] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    1.211940] hpet0: 8 comparators, 64-bit 19.200000 MHz counter
>[    1.215750] clocksource: Switched to clocksource tsc-early
>[    1.238579] VFS: Disk quotas dquot_6.6.0
>[    1.238609] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    1.238842] AppArmor: AppArmor Filesystem Enabled
>[    1.238907] pnp: PnP ACPI init
>[    1.239293] system 00:00: [io  0x06a4] has been reserved
>[    1.239296] system 00:00: [io  0x06a0] has been reserved
>[    1.239307] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    1.240001] pnp 00:01: disabling [io  0x164e-0x164f] because it overlaps 0000:00:13.0 BAR 13 [io  0x1000-0x1fff]
>[    1.240071] system 00:01: [io  0x0680-0x069f] has been reserved
>[    1.240074] system 00:01: [io  0x0400-0x047f] could not be reserved
>[    1.240077] system 00:01: [io  0x0500-0x05fe] has been reserved
>[    1.240079] system 00:01: [io  0x0600-0x061f] has been reserved
>[    1.240087] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    1.240242] pnp 00:02: Plug and Play ACPI device, IDs PNP0303 (active)
>[    1.248725] system 00:03: [mem 0xe0000000-0xefffffff] could not be reserved
>[    1.248728] system 00:03: [mem 0xfea00000-0xfeafffff] has been reserved
>[    1.248731] system 00:03: [mem 0xfed01000-0xfed01fff] has been reserved
>[    1.248733] system 00:03: [mem 0xfed03000-0xfed03fff] has been reserved
>[    1.248735] system 00:03: [mem 0xfed06000-0xfed06fff] has been reserved
>[    1.248738] system 00:03: [mem 0xfed08000-0xfed09fff] has been reserved
>[    1.248740] system 00:03: [mem 0xfed80000-0xfedbffff] has been reserved
>[    1.248743] system 00:03: [mem 0xfed1c000-0xfed1cfff] has been reserved
>[    1.248745] system 00:03: [mem 0xfee00000-0xfeefffff] has been reserved
>[    1.248753] system 00:03: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    1.249423] pnp 00:04: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    1.250273] pnp: PnP ACPI: found 5 devices
>[    1.258008] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>[    1.258036] pci 0000:00:13.0: PCI bridge to [bus 01]
>[    1.258041] pci 0000:00:13.0:   bridge window [io  0x1000-0x1fff]
>[    1.258046] pci 0000:00:13.0:   bridge window [mem 0xa1100000-0xa11fffff]
>[    1.258058] pci_bus 0000:00: resource 4 [io  0x0070-0x0077]
>[    1.258061] pci_bus 0000:00: resource 5 [io  0x0000-0x006f window]
>[    1.258063] pci_bus 0000:00: resource 6 [io  0x0078-0x0cf7 window]
>[    1.258065] pci_bus 0000:00: resource 7 [io  0x0d00-0xffff window]
>[    1.258067] pci_bus 0000:00: resource 8 [mem 0x000a0000-0x000bffff window]
>[    1.258070] pci_bus 0000:00: resource 9 [mem 0x000c0000-0x000dffff window]
>[    1.258072] pci_bus 0000:00: resource 10 [mem 0x000e0000-0x000fffff window]
>[    1.258074] pci_bus 0000:00: resource 11 [mem 0x7c000001-0x7fffffff window]
>[    1.258076] pci_bus 0000:00: resource 12 [mem 0x80000000-0xbfffffff window]
>[    1.258078] pci_bus 0000:00: resource 13 [mem 0xe0000000-0xefffffff window]
>[    1.258080] pci_bus 0000:00: resource 14 [mem 0xfea00000-0xfeafffff window]
>[    1.258082] pci_bus 0000:00: resource 15 [mem 0xfed00000-0xfed003ff window]
>[    1.258084] pci_bus 0000:00: resource 16 [mem 0xfed01000-0xfed01fff window]
>[    1.258086] pci_bus 0000:00: resource 17 [mem 0xfed03000-0xfed03fff window]
>[    1.258088] pci_bus 0000:00: resource 18 [mem 0xfed06000-0xfed06fff window]
>[    1.258090] pci_bus 0000:00: resource 19 [mem 0xfed08000-0xfed09fff window]
>[    1.258093] pci_bus 0000:00: resource 20 [mem 0xfed80000-0xfedbffff window]
>[    1.258095] pci_bus 0000:00: resource 21 [mem 0xfed1c000-0xfed1cfff window]
>[    1.258097] pci_bus 0000:00: resource 22 [mem 0xfee00000-0xfeefffff window]
>[    1.258099] pci_bus 0000:01: resource 0 [io  0x1000-0x1fff]
>[    1.258101] pci_bus 0000:01: resource 1 [mem 0xa1100000-0xa11fffff]
>[    1.258526] NET: Registered protocol family 2
>[    1.258780] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes)
>[    1.258803] TCP established hash table entries: 16384 (order: 5, 131072 bytes)
>[    1.258857] TCP bind hash table entries: 16384 (order: 6, 262144 bytes)
>[    1.258914] TCP: Hash tables configured (established 16384 bind 16384)
>[    1.258964] UDP hash table entries: 1024 (order: 3, 32768 bytes)
>[    1.258977] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes)
>[    1.259100] NET: Registered protocol family 1
>[    1.259129] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
>[    1.259629] PCI: CLS 64 bytes, default 64
>[    1.259696] Unpacking initramfs...
>[    2.601735] Freeing initrd memory: 50436K
>[    2.601842] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x159647815e3, max_idle_ns: 440795269835 ns
>[    2.601882] clocksource: Switched to clocksource tsc
>[    2.602072] Scanning for low memory corruption every 60 seconds
>[    2.603249] Initialise system trusted keyrings
>[    2.603274] Key type blacklist registered
>[    2.603337] workingset: timestamp_bits=36 max_order=19 bucket_order=0
>[    2.605843] zbud: loaded
>[    2.606587] squashfs: version 4.0 (2009/01/31) Phillip Lougher
>[    2.606990] fuse init (API version 7.27)
>[    2.607101] pstore: using deflate compression
>[    2.609607] Key type asymmetric registered
>[    2.609609] Asymmetric key parser 'x509' registered
>[    2.609628] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
>[    2.609686] io scheduler noop registered
>[    2.609687] io scheduler deadline registered
>[    2.609753] io scheduler cfq registered (default)
>[    2.610439] pcieport 0000:00:13.0: Signaling PME with IRQ 120
>[    2.610559] efifb: probing for efifb
>[    2.610586] efifb: framebuffer at 0x90000000, using 32448k, total 32448k
>[    2.610588] efifb: mode is 3840x2160x32, linelength=15360, pages=1
>[    2.610589] efifb: scrolling: redraw
>[    2.610591] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
>[    2.646251] Console: switching to colour frame buffer device 480x135
>[    2.681702] fb0: EFI VGA frame buffer device
>[    2.681719] intel_idle: MWAIT substates: 0x11242020
>[    2.681721] intel_idle: v0.4.1 model 0x7A
>[    2.682121] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    2.682414] ACPI: AC Adapter [ADP1] (off-line)
>[    2.682504] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:01/PNP0C09:00/PNP0C0D:00/input/input0
>[    2.682528] ACPI: Lid Switch [LID0]
>[    2.682631] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1
>[    2.682645] ACPI: Power Button [PWRB]
>[    2.702652] thermal LNXTHERM:00: registered as thermal_zone0
>[    2.702654] ACPI: Thermal Zone [TZ01] (32 C)
>[    2.703028] Serial: 8250/16550 driver, 32 ports, IRQ sharing enabled
>[    2.703148] battery: ACPI: Battery Slot [BAT0] (battery present)
>[    2.703227] battery: ACPI: Battery Slot [BAT1] (battery absent)
>[    2.724225] serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
>[    2.727692] Linux agpgart interface v0.103
>[    2.742261] loop: module loaded
>[    2.743113] libphy: Fixed MDIO Bus: probed
>[    2.743115] tun: Universal TUN/TAP device driver, 1.6
>[    2.743262] PPP generic driver version 2.4.2
>[    2.743411] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>[    2.743426] ehci-pci: EHCI PCI platform driver
>[    2.743443] ehci-platform: EHCI generic platform driver
>[    2.743477] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>[    2.743480] ohci-pci: OHCI PCI platform driver
>[    2.743495] ohci-platform: OHCI generic platform driver
>[    2.743509] uhci_hcd: USB Universal Host Controller Interface driver
>[    2.743843] xhci_hcd 0000:00:15.0: xHCI Host Controller
>[    2.743853] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 1
>[    2.744950] xhci_hcd 0000:00:15.0: hcc params 0x200077c1 hci version 0x100 quirks 0x0000000000009810
>[    2.744957] xhci_hcd 0000:00:15.0: cache line size of 64 is not supported
>[    2.745253] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19
>[    2.745256] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    2.745258] usb usb1: Product: xHCI Host Controller
>[    2.745260] usb usb1: Manufacturer: Linux 4.19.0-rc2-drm-tip-2018y-09m-04d+ xhci-hcd
>[    2.745262] usb usb1: SerialNumber: 0000:00:15.0
>[    2.745503] hub 1-0:1.0: USB hub found
>[    2.745522] hub 1-0:1.0: 9 ports detected
>[    2.749187] xhci_hcd 0000:00:15.0: xHCI Host Controller
>[    2.749193] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 2
>[    2.749198] xhci_hcd 0000:00:15.0: Host supports USB 3.0  SuperSpeed
>[    2.749257] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19
>[    2.749259] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>[    2.749261] usb usb2: Product: xHCI Host Controller
>[    2.749263] usb usb2: Manufacturer: Linux 4.19.0-rc2-drm-tip-2018y-09m-04d+ xhci-hcd
>[    2.749264] usb usb2: SerialNumber: 0000:00:15.0
>[    2.749442] hub 2-0:1.0: USB hub found
>[    2.749461] hub 2-0:1.0: 7 ports detected
>[    2.752049] i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
>[    2.752051] i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
>[    2.752400] i8042: Warning: Keylock active
>[    2.752508] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    2.752714] mousedev: PS/2 mouse device common for all mice
>[    2.753025] rtc_cmos 00:04: RTC can wake from S4
>[    2.753597] rtc_cmos 00:04: registered as rtc0
>[    2.753625] rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    2.753635] i2c /dev entries driver
>[    2.753724] device-mapper: uevent: version 1.0.3
>[    2.753865] device-mapper: ioctl: 4.39.0-ioctl (2018-04-03) initialised: dm-devel@redhat.com
>[    2.753876] intel_pstate: Intel P-state driver initializing
>[    2.754334] ledtrig-cpu: registered to indicate activity on CPUs
>[    2.754338] EFI Variables Facility v0.08 2004-May-17
>[    2.768753] NET: Registered protocol family 10
>[    2.775101] Segment Routing with IPv6
>[    2.775122] NET: Registered protocol family 17
>[    2.775219] Key type dns_resolver registered
>[    2.775731] intel_rdt: Intel RDT L2 allocation detected
>[    2.775732] intel_rdt: Intel RDT L2DATA allocation detected
>[    2.775732] intel_rdt: Intel RDT L2CODE allocation detected
>[    2.775756] RAS: Correctable Errors collector initialized.
>[    2.775831] microcode: sig=0x706a1, pf=0x1, revision=0x22
>[    2.775964] microcode: Microcode Update Driver: v2.2.
>[    2.775990] sched_clock: Marking stable (2779084836, -3125206)->(2785284437, -9324807)
>[    2.776399] registered taskstats version 1
>[    2.776411] Loading compiled-in X.509 certificates
>[    2.777636] Loaded X.509 cert 'Build time autogenerated kernel key: 2e21534835e289dbfc95660b3a2694d489954dc8'
>[    2.777659] zswap: loaded using pool lzo/zbud
>[    2.783146] Key type big_key registered
>[    2.783150] Key type trusted registered
>[    2.785868] Key type encrypted registered
>[    2.785871] AppArmor: AppArmor sha1 policy hashing enabled
>[    2.785884] ima: Allocated hash algorithm: sha1
>[    2.801744] evm: Initialising EVM extended attributes:
>[    2.801746] evm: security.selinux
>[    2.801747] evm: security.SMACK64
>[    2.801747] evm: security.SMACK64EXEC
>[    2.801748] evm: security.SMACK64TRANSMUTE
>[    2.801748] evm: security.SMACK64MMAP
>[    2.801749] evm: security.apparmor
>[    2.801749] evm: security.ima
>[    2.801750] evm: security.capability
>[    2.801751] evm: HMAC attrs: 0x1
>[    2.802919]   Magic number: 2:62:952
>[    2.802979] tty tty9: hash matches
>[    2.803100] memory memory5: hash matches
>[    2.803286] rtc_cmos 00:04: setting system clock to 2098-01-01 20:56:44 UTC (4039448204)
>[    2.807018] Freeing unused kernel image memory: 2440K
>[    2.823934] Write protecting the kernel read-only data: 20480k
>[    2.825047] Freeing unused kernel image memory: 2008K
>[    2.825608] Freeing unused kernel image memory: 1912K
>[    2.839367] x86/mm: Checked W+X mappings: passed, no W+X pages found.
>[    2.839495] x86/mm: Checking user space page tables
>[    2.852808] x86/mm: Checked W+X mappings: passed, no W+X pages found.
>[    2.852816] Run /init as init process
>[    2.979801] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0
>[    3.083776] usb 1-4: new low-speed USB device number 2 using xhci_hcd
>[    3.084650] hidraw: raw HID events driver (C) Jiri Kosina
>[    3.087889] ahci 0000:00:12.0: version 3.0
>[    3.088786] acpi PNP0C14:01: duplicate WMI GUID 05901221-D566-11D1-B2F0-00A0C9062910 (first instance was on PNP0C14:00)
>[    3.092960] sdhci: Secure Digital Host Controller Interface driver
>[    3.092961] sdhci: Copyright(c) Pierre Ossman
>[    3.096584] sdhci-pci 0000:00:1c.0: SDHCI controller found [8086:31cc] (rev 3)
>[    3.097023] mmc0: CQHCI version 5.10
>[    3.098595] libphy: r8169: probed
>[    3.098805] ahci 0000:00:12.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
>[    3.098808] ahci 0000:00:12.0: flags: 64bit ncq sntf pm clo only pmp pio slum part deso sadm sds apst 
>[    3.098822] r8169 0000:01:00.0 eth0: RTL8168h/8111h, 90:49:fa:02:b0:18, XID 54100880, IRQ 123
>[    3.098824] r8169 0000:01:00.0 eth0: jumbo features [frames: 9200 bytes, tx checksumming: ko]
>[    3.100061] mmc0: SDHCI controller on PCI [0000:00:1c.0] using ADMA 64-bit
>[    3.100124] sdhci-pci 0000:00:1e.0: SDHCI controller found [8086:31d0] (rev 3)
>[    3.102501] mmc1: SDHCI controller on PCI [0000:00:1e.0] using ADMA 64-bit
>[    3.103798] scsi host0: ahci
>[    3.103896] ata1: SATA max UDMA/133 abar m2048@0xa123b000 port 0xa123b100 irq 122
>[    3.125901] VFIO - User Level meta-driver version: 0.3
>[    3.139570] r8169 0000:01:00.0 enp1s0: renamed from eth0
>[    3.160080] [drm:i915_driver_load [i915]] No PCH found.
>[    3.160125] [drm:intel_wopcm_init_early [i915]] WOPCM size: 1024KiB
>[    3.160126] [drm] GuC: No firmware known for this platform!
>[    3.160127] [drm] HuC: No firmware known for this platform!
>[    3.160170] [drm:intel_uc_init_early [i915]] enable_guc=0 (submission:no huc:no)
>[    3.160210] [drm:intel_uc_init_early [i915]] guc_log_level=0 (enabled:no, verbose:no, verbosity:0)
>[    3.160250] [drm:intel_power_domains_init [i915]] Allowed DC state mask 09
>[    3.160600] [drm:i915_driver_load [i915]] ppgtt mode: 3
>[    3.160658] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
>[    3.160695] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>[    3.160732] [drm:i915_ggtt_probe_hw [i915]] DSM size = 64M
>[    3.160736] checking generic (90000000 1fb0000) vs hw (90000000 10000000)
>[    3.160737] fb0: switching to inteldrmfb from EFI VGA
>[    3.160774] Console: switching to colour dummy device 80x25
>[    3.160948] [drm] Replacing VGA console driver
>[    3.161008] [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 7f8001c7
>[    3.161048] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 57344K
>[    3.161162] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
>[    3.161205] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x799c9018
>[    3.161252] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>[    3.161311] [drm:intel_opregion_setup [i915]] ASLE supported
>[    3.161350] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
>[    3.161351] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    3.161352] [drm] Driver supports precise vblank timestamp query.
>[    3.161391] [drm:intel_bios_init [i915]] Set default to SSC at 100000 kHz
>[    3.161428] [drm:intel_bios_init [i915]] VBT signature "$VBT GEMINILAKE     ", BDB version 212
>[    3.161465] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    3.161499] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>[    3.161537] [drm:intel_opregion_get_panel_type [i915]] Failed to get panel details from OpRegion (-19)
>[    3.161572] [drm:intel_bios_init [i915]] Panel type: 2 (VBT)
>[    3.161606] [drm:intel_bios_init [i915]] DRRS supported mode is seamless
>[    3.161640] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>[    3.161661] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
>[    3.161694] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>[    3.161728] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 180, controller 0
>[    3.161761] [drm:intel_bios_init [i915]] DRRS State Enabled:1
>[    3.161794] [drm:intel_bios_init [i915]] Skipping SDVO device mapping
>[    3.161827] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    3.161859] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>[    3.161891] [drm:intel_bios_init [i915]] Port B VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0
>[    3.161923] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 8
>[    3.161955] [drm:intel_bios_init [i915]] Port C VBT info: DP:1 HDMI:0 DVI:0 EDP:0 CRT:0
>[    3.161986] [drm:intel_bios_init [i915]] VBT HDMI level shift for port C: 8
>[    3.162082] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>[    3.162122] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[    3.162161] [drm:intel_power_well_enable [i915]] enabling power well 1
>[    3.162200] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
>[    3.162247] [drm:intel_power_well_enable [i915]] enabling always-on
>[    3.162280] [drm:intel_power_well_enable [i915]] enabling DC off
>[    3.162314] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>[    3.162366] [drm:intel_power_well_enable [i915]] enabling power well 2
>[    3.162372] i915 0000:00:02.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    3.162408] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>[    3.162543] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[    3.162604] [drm:_bxt_ddi_phy_init [i915]] DDI PHY 0 already enabled, won't reprogram it
>[    3.162637] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[    3.162793] [drm:intel_power_well_enable [i915]] enabling AUX A
>[    3.162825] [drm:intel_power_well_enable [i915]] enabling AUX B
>[    3.162857] [drm:intel_power_well_enable [i915]] enabling AUX C
>[    3.162928] [drm:intel_csr_ucode_init [i915]] Loading i915/glk_dmc_ver1_04.bin
>[    3.163147] [drm] Finished loading DMC firmware i915/glk_dmc_ver1_04.bin (v1.4)
>[    3.163240] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>[    3.163671] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>[    3.163722] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 7 (7.0 usec)
>[    3.163757] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 7 (7.0 usec)
>[    3.163805] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 8 (8.0 usec)
>[    3.163839] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 22 (22.0 usec)
>[    3.163872] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 22 (22.0 usec)
>[    3.163905] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 22 (22.0 usec)
>[    3.163937] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 22 (22.0 usec)
>[    3.163969] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 22 (22.0 usec)
>[    3.164011] [drm:intel_modeset_init [i915]] 3 display pipes available.
>[    3.164175] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
>[    3.164217] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 316800 kHz
>[    3.164253] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 627264 kHz
>[    3.164599] [drm:intel_ddi_init [i915]] Forcing DDI_A_4_LANES for port A
>[    3.164642] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>[    3.164684] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>[    3.164735] [drm:intel_pps_dump_state [i915]] cur t1_t3 0 t8 0 t9 0 t10 0 t11_t12 0
>[    3.164772] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
>[    3.164808] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
>[    3.164844] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 1, off delay 200
>[    3.164881] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>[    3.164920] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[    3.164955] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[    3.241748] usb 1-4: New USB device found, idVendor=1a2c, idProduct=2124, bcdDevice= 1.10
>[    3.241751] usb 1-4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[    3.241754] usb 1-4: Product: USB Keyboard
>[    3.241755] usb 1-4: Manufacturer: SEM
>[    3.252594] usbcore: registered new interface driver usbhid
>[    3.252596] usbhid: USB HID core driver
>[    3.255627] input: SEM USB Keyboard as /devices/pci0000:00/0000:00:15.0/usb1/1-4/1-4:1.0/0003:1A2C:2124.0001/input/input3
>[    3.312318] hid-generic 0003:1A2C:2124.0001: input,hidraw0: USB HID v1.10 Keyboard [SEM USB Keyboard] on usb-0000:00:15.0-4/input0
>[    3.312585] input: SEM USB Keyboard Consumer Control as /devices/pci0000:00/0000:00:15.0/usb1/1-4/1-4:1.1/0003:1A2C:2124.0002/input/input4
>[    3.355924] atkbd serio0: Failed to enable keyboard on isa0060/serio0
>[    3.356070] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input2
>[    3.372236] input: SEM USB Keyboard System Control as /devices/pci0000:00/0000:00:15.0/usb1/1-4/1-4:1.1/0003:1A2C:2124.0002/input/input5
>[    3.372598] hid-generic 0003:1A2C:2124.0002: input,hidraw1: USB HID v1.10 Device [SEM USB Keyboard] on usb-0000:00:15.0-4/input1
>[    3.583961] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    3.584475] ata1.00: supports DRM functions and may not be fully accessible
>[    3.585756] ata1.00: ATA-10: Crucial_CT525MX300SSD1,  M0CR040, max UDMA/133
>[    3.585760] ata1.00: 1025610768 sectors, multi 16: LBA48 NCQ (depth 32), AA
>[    3.588990] ata1.00: supports DRM functions and may not be fully accessible
>[    3.592905] ata1.00: configured for UDMA/133
>[    3.593266] scsi 0:0:0:0: Direct-Access     ATA      Crucial_CT525MX3 R040 PQ: 0 ANSI: 5
>[    3.593667] ata1.00: Enabling discard_zeroes_data
>[    3.593673] sd 0:0:0:0: Attached scsi generic sg0 type 0
>[    3.594025] sd 0:0:0:0: [sda] 1025610768 512-byte logical blocks: (525 GB/489 GiB)
>[    3.594074] sd 0:0:0:0: [sda] Write Protect is off
>[    3.594076] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    3.594121] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    3.594331] ata1.00: Enabling discard_zeroes_data
>[    3.596055]  sda: sda1 sda2
>[    3.596391] ata1.00: Enabling discard_zeroes_data
>[    3.596908] sd 0:0:0:0: [sda] supports TCG Opal
>[    3.596910] sd 0:0:0:0: [sda] Attached SCSI disk
>[    3.616917] random: fast init done
>[    3.739360] ish-hid {33AECD58-B679-4E54-9BD9-A04D34F0C226}: [hid-ish]: enum_devices_done OK, num_hid_devices=4
>[    3.750865] hid-generic 001F:8086:22D8.0003: hidraw2: <UNKNOWN> HID v2.00 Device [hid-ishtp 8086:22D8] on 
>[    3.763903] hid-generic 001F:8086:22D8.0004: hidraw3: <UNKNOWN> HID v2.00 Device [hid-ishtp 8086:22D8] on 
>[    3.773810] hid-generic 001F:8086:22D8.0005: hidraw4: <UNKNOWN> HID v2.00 Device [hid-ishtp 8086:22D8] on 
>[    3.785845] hid-generic 001F:8086:22D8.0006: hidraw5: <UNKNOWN> HID v2.00 Device [hid-ishtp 8086:22D8] on 
>[    3.795878] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000062
>[    3.795923] [drm:wait_panel_status [i915]] Wait complete
>[    3.795964] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x0000006a
>[    3.796001] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
>[    4.012425] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.020841] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.029247] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.037652] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.046062] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.054485] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.062888] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.071307] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.079727] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.088148] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.096568] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.104970] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.113372] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.121773] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.130175] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.138577] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.146978] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.155393] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.163814] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.172218] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.180619] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.189030] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.197430] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.205832] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.214245] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.222645] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.231057] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.239458] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.247859] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.256260] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.264662] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.273064] [drm:intel_dp_aux_xfer [i915]] dp_aux_ch timeout status 0x7d4003ff
>[    4.273078] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[    4.273080] [drm] failed to retrieve link info, disabling eDP
>[    4.273115] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[    4.273151] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000062
>[    4.273214] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port B
>[    4.273254] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x1 for port B (VBT)
>[    4.273306] [drm:intel_dp_init_connector [i915]] Adding DP connector on port C
>[    4.273341] [drm:intel_dp_init_connector [i915]] using AUX C for port C (VBT)
>[    4.273398] [drm:vlv_dsi_init [i915]] 
>[    4.273493] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x1
>[    4.273534] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x1
>[    4.273575] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x1
>[    4.273615] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x1
>[    4.273654] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x1
>[    4.273695] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:51:pipe A] hw state readout: enabled
>[    4.273738] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[    4.273775] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[    4.273813] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[    4.273850] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[    4.273888] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>[    4.273925] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:75:pipe B] hw state readout: disabled
>[    4.273965] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[    4.274000] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[    4.274037] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[    4.274073] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[    4.274110] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>[    4.274146] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:99:pipe C] hw state readout: disabled
>[    4.274188] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0
>[    4.274255] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000001, on 1
>[    4.274290] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>[    4.274337] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:100:DDI B] hw state readout: enabled, pipe A
>[    4.274373] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:107:DDI C] hw state readout: disabled, pipe A
>[    4.274410] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:109:DP-MST A] hw state readout: disabled, pipe A
>[    4.274444] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:110:DP-MST B] hw state readout: disabled, pipe B
>[    4.274477] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:111:DP-MST C] hw state readout: disabled, pipe C
>[    4.274515] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:101:HDMI-A-1] hw state readout: enabled
>[    4.274549] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:108:DP-1] hw state readout: disabled
>[    4.274579] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 0000000004562e06
>[    4.274622] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[    4.274670] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][setup_hw_state]
>[    4.274705] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[    4.274739] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[    4.274773] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>[    4.274806] [drm:intel_dump_pipe_config [i915]] requested mode:
>[    4.274821] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.274854] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[    4.274869] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.274903] [drm:intel_dump_pipe_config [i915]] crtc timings: 297000 3840 4016 4104 4400 2160 2168 2178 2250, type: 0x40 flags: 0x5
>[    4.274936] [drm:intel_dump_pipe_config [i915]] port clock: 297000, pipe src size: 3840x2160, pixel rate 297000
>[    4.274970] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[    4.275003] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.275035] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[    4.275079] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1d, pll1: 0x100, pll2: 0x2ccccd, pll3: 0x10000, pll6: 0x30b05, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x58
>[    4.275111] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[    4.275146] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[    4.275181] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[    4.275216] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[    4.275250] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[    4.275283] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] disabled, scaler_id = -1
>[    4.275315] [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe B][setup_hw_state]
>[    4.275347] [drm:intel_dump_pipe_config [i915]] output_types:  (0x0)
>[    4.275379] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>[    4.275413] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[    4.275445] [drm:intel_dump_pipe_config [i915]] requested mode:
>[    4.275459] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    4.275492] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[    4.275506] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    4.275539] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    4.275571] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[    4.275603] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[    4.275634] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.275666] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[    4.275704] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[    4.275736] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[    4.275768] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 1B] disabled, scaler_id = -1
>[    4.275852] [drm:intel_dump_pipe_config [i915]] [PLANE:57:plane 2B] disabled, scaler_id = -1
>[    4.275898] [drm:intel_dump_pipe_config [i915]] [PLANE:62:plane 3B] disabled, scaler_id = -1
>[    4.275929] [drm:intel_dump_pipe_config [i915]] [PLANE:67:plane 4B] disabled, scaler_id = -1
>[    4.275961] [drm:intel_dump_pipe_config [i915]] [PLANE:72:cursor B] disabled, scaler_id = -1
>[    4.275992] [drm:intel_dump_pipe_config [i915]] [CRTC:99:pipe C][setup_hw_state]
>[    4.276022] [drm:intel_dump_pipe_config [i915]] output_types:  (0x0)
>[    4.276052] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>[    4.276083] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[    4.276113] [drm:intel_dump_pipe_config [i915]] requested mode:
>[    4.276126] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    4.276157] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[    4.276170] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    4.276201] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    4.276232] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>[    4.276262] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[    4.276293] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.276323] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[    4.276359] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>[    4.276389] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[    4.276420] [drm:intel_dump_pipe_config [i915]] [PLANE:76:plane 1C] disabled, scaler_id = -1
>[    4.276455] [drm:intel_dump_pipe_config [i915]] [PLANE:81:plane 2C] disabled, scaler_id = -1
>[    4.276485] [drm:intel_dump_pipe_config [i915]] [PLANE:86:plane 3C] disabled, scaler_id = -1
>[    4.276515] [drm:intel_dump_pipe_config [i915]] [PLANE:91:plane 4C] disabled, scaler_id = -1
>[    4.276548] [drm:intel_dump_pipe_config [i915]] [PLANE:96:cursor C] disabled, scaler_id = -1
>[    4.276661] [drm:skylake_get_initial_plane_config [i915]] pipe A/plane 1A with fb: size=3840x2160@32, offset=0, pitch 15360, size 0x1fa4000
>[    4.276693] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>[    4.276712] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000005ef14eba
>[    4.276728] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff7dc78 state to 000000005ef14eba
>[    4.276741] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 000000005ef14eba
>[    4.276755] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 000000000c64f010 state to 000000005ef14eba
>[    4.276768] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 000000003b557897 state to 000000005ef14eba
>[    4.276781] [drm:drm_atomic_check_only [drm]] checking 000000005ef14eba
>[    4.276829] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 510) -> (0 - 0)
>[    4.276865] [drm:skl_compute_wm [i915]] [PLANE:48:cursor A] ddb (0 - 0) -> (988 - 1020)
>[    4.276878] [drm:drm_atomic_commit [drm]] committing 000000005ef14eba
>[    4.298604] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, 100000000]
>[    4.298645] [drm:intel_ctx_workarounds_init [i915]] Number of context specific w/a: 10
>[    4.298679] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000005ef14eba
>[    4.298696] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000005ef14eba
>[    4.298782] [drm:i915_gem_contexts_init [i915]] logical context support initialized
>[    4.299651] [drm:intel_init_gt_powersave [i915]] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4
>[    4.300504] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>[    4.300559] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>[    4.300594] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>[    4.300628] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>[    4.300681] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:30
>[    4.301751] [drm:intel_dp_connector_register [i915]] registering DPDDC-C bus for card0-DP-1
>[    4.301866] [drm] Initialized i915 1.6.0 20180903 for 0000:00:02.0 on minor 0
>[    4.302033] [drm:intel_opregion_register [i915]] 2 outputs detected
>[    4.303551] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    4.304089] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input6
>[    4.304254] [drm:intel_power_well_disable [i915]] disabling AUX C
>[    4.304294] [drm:intel_power_well_disable [i915]] disabling AUX B
>[    4.304309] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[    4.304320] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[    4.304366] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[    4.304402] [drm:intel_power_well_disable [i915]] disabling AUX A
>[    4.304439] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[    4.304475] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>[    4.304483] i915 device info: pciid=0x3185 rev=0x03 platform=GEMINILAKE gen=9
>[    4.304484] i915 device info: is_mobile: no
>[    4.304485] i915 device info: is_lp: yes
>[    4.304485] i915 device info: is_alpha_support: no
>[    4.304486] i915 device info: has_64bit_reloc: yes
>[    4.304487] i915 device info: has_aliasing_ppgtt: yes
>[    4.304488] i915 device info: has_csr: yes
>[    4.304488] i915 device info: has_ddi: yes
>[    4.304489] i915 device info: has_dp_mst: yes
>[    4.304490] i915 device info: has_reset_engine: yes
>[    4.304491] i915 device info: has_fbc: yes
>[    4.304491] i915 device info: has_fpga_dbg: yes
>[    4.304492] i915 device info: has_full_ppgtt: yes
>[    4.304493] i915 device info: has_full_48bit_ppgtt: yes
>[    4.304494] i915 device info: has_gmch_display: no
>[    4.304494] i915 device info: has_guc: yes
>[    4.304495] i915 device info: has_guc_ct: no
>[    4.304496] i915 device info: has_hotplug: yes
>[    4.304497] i915 device info: has_l3_dpf: no
>[    4.304497] i915 device info: has_llc: no
>[    4.304498] i915 device info: has_logical_ring_contexts: yes
>[    4.304499] i915 device info: has_logical_ring_elsq: no
>[    4.304500] i915 device info: has_logical_ring_preemption: yes
>[    4.304501] i915 device info: has_overlay: no
>[    4.304501] i915 device info: has_pooled_eu: no
>[    4.304502] i915 device info: has_psr: yes
>[    4.304503] i915 device info: has_rc6: yes
>[    4.304504] i915 device info: has_rc6p: no
>[    4.304504] i915 device info: has_runtime_pm: yes
>[    4.304505] i915 device info: has_snoop: yes
>[    4.304506] i915 device info: has_coherent_ggtt: no
>[    4.304507] i915 device info: unfenced_needs_alignment: no
>[    4.304507] i915 device info: cursor_needs_physical: no
>[    4.304508] i915 device info: hws_needs_physical: no
>[    4.304509] i915 device info: overlay_needs_physical: no
>[    4.304510] i915 device info: supports_tv: no
>[    4.304510] i915 device info: has_ipc: yes
>[    4.304511] i915 device info: slice total: 1, mask=0001
>[    4.304512] i915 device info: subslice total: 2
>[    4.304513] i915 device info: slice0: 2 subslices, mask=0003
>[    4.304514] i915 device info: EU total: 12
>[    4.304515] i915 device info: EU per subslice: 6
>[    4.304516] i915 device info: has slice power gating: no
>[    4.304516] i915 device info: has subslice power gating: yes
>[    4.304517] i915 device info: has EU power gating: yes
>[    4.304518] i915 device info: CS timestamp frequency: 19200 kHz
>[    4.333122] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[    4.333867] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[    4.334625] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[    4.334650] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[    4.334663] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[    4.334675] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] status updated from unknown to connected
>[    4.334696] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    4.334709] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    4.334729] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[    4.334742] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[    4.334753] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[    4.334765] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    4.334776] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    4.335494] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[    4.335508] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[    4.335521] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335533] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335546] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    4.335558] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335571] [drm:drm_mode_debug_printmodeline [drm]] Modeline 179:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335583] [drm:drm_mode_debug_printmodeline [drm]] Modeline 153:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    4.335595] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.335608] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.335620] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.335632] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335644] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335657] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.335669] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335681] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.335694] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.335706] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.335718] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.335731] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.335743] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.335755] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.335784] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.335796] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.335809] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    4.335821] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    4.335834] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    4.335846] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    4.335858] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    4.335871] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.335883] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.335895] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    4.335908] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    4.335920] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    4.335932] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[    4.335945] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[    4.335957] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    4.335969] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    4.335982] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[    4.335994] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[    4.336006] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[    4.336019] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    4.336031] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.336043] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.336056] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.336068] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[    4.336081] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    4.336093] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[    4.336105] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    4.336118] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[    4.336130] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    4.336142] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[    4.336154] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    4.336167] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[    4.336179] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[    4.336191] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[    4.336204] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[    4.336216] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[    4.336228] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[    4.336241] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    4.336253] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[    4.336265] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[    4.336278] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    4.336290] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[    4.336302] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    4.336311] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[    4.336355] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[    4.336396] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[    4.336683] [drm:intel_power_well_enable [i915]] enabling AUX C
>[    4.336722] [drm:intel_power_well_disable [i915]] disabling AUX C
>[    4.336757] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[    4.336766] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] status updated from unknown to disconnected
>[    4.336775] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[    4.336783] [drm:drm_setup_crtcs [drm_kms_helper]] connector 101 enabled? yes
>[    4.336789] [drm:drm_setup_crtcs [drm_kms_helper]] connector 108 enabled? no
>[    4.336838] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[    4.336845] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 101
>[    4.336852] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 101 0
>[    4.336858] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[    4.336864] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 8192x8192 config
>[    4.336873] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 51 (0,0)
>[    4.336916] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>[    4.353416] [drm:intelfb_create [i915]] allocated 3840x2160 fb: 0x00040000
>[    4.353672] fbcon: inteldrmfb (fb0) is primary device
>[    4.353796] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018a2ece4
>[    4.353812] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f5b99600 state to 0000000018a2ece4
>[    4.353826] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000c8a848db state to 0000000018a2ece4
>[    4.353838] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000c8a848db
>[    4.353851] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:plane 3A] 000000001be01c6f state to 0000000018a2ece4
>[    4.353863] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:plane 3A] state 000000001be01c6f
>[    4.353875] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 4A] 00000000916632a7 state to 0000000018a2ece4
>[    4.353887] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:43:plane 4A] state 00000000916632a7
>[    4.353899] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000006a73ef80 state to 0000000018a2ece4
>[    4.353911] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000006a73ef80
>[    4.353923] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 1B] 0000000064d847e1 state to 0000000018a2ece4
>[    4.353935] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:57:plane 2B] 0000000023a7a8f9 state to 0000000018a2ece4
>[    4.353947] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:57:plane 2B] state 0000000023a7a8f9
>[    4.353959] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 3B] 000000008035af3d state to 0000000018a2ece4
>[    4.353970] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:62:plane 3B] state 000000008035af3d
>[    4.353983] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:67:plane 4B] 00000000853d8c91 state to 0000000018a2ece4
>[    4.353994] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:67:plane 4B] state 00000000853d8c91
>[    4.354006] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:72:cursor B] 00000000ce353cbf state to 0000000018a2ece4
>[    4.354018] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:72:cursor B] state 00000000ce353cbf
>[    4.354030] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:76:plane 1C] 0000000010efc3d4 state to 0000000018a2ece4
>[    4.354042] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:81:plane 2C] 00000000d3605407 state to 0000000018a2ece4
>[    4.354054] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:81:plane 2C] state 00000000d3605407
>[    4.354066] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:86:plane 3C] 00000000b26a6cfe state to 0000000018a2ece4
>[    4.354077] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:86:plane 3C] state 00000000b26a6cfe
>[    4.354092] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:91:plane 4C] 000000009bb9a0fd state to 0000000018a2ece4
>[    4.354103] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:91:plane 4C] state 000000009bb9a0fd
>[    4.354115] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:96:cursor C] 00000000cfb287c4 state to 0000000018a2ece4
>[    4.354127] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:96:cursor C] state 00000000cfb287c4
>[    4.354141] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000068d0c8a2 state to 0000000018a2ece4
>[    4.354157] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 0000000068d0c8a2
>[    4.354169] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:28:plane 1A] state 00000000f5b99600 to [CRTC:51:pipe A]
>[    4.354181] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:163] for [PLANE:28:plane 1A] state 00000000f5b99600
>[    4.354193] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000018a2ece4
>[    4.354207] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000cd2a185d state to 0000000018a2ece4
>[    4.354219] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000cd2a185d to [NOCRTC]
>[    4.354232] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000cd2a185d to [CRTC:51:pipe A]
>[    4.354245] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000a1dfbaf5 state to 0000000018a2ece4
>[    4.354257] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:75:pipe B] state 00000000a1dfbaf5
>[    4.354268] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:plane 1B] state 0000000064d847e1
>[    4.354280] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:75:pipe B] to 0000000018a2ece4
>[    4.354293] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 000000001d3920e0 state to 0000000018a2ece4
>[    4.354304] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:99:pipe C] state 000000001d3920e0
>[    4.354331] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:76:plane 1C] state 0000000010efc3d4
>[    4.354342] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:99:pipe C] to 0000000018a2ece4
>[    4.354354] [drm:drm_atomic_check_only [drm]] checking 0000000018a2ece4
>[    4.354369] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[    4.354376] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[    4.354383] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: y
>[    4.354395] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000018a2ece4
>[    4.354406] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 0000000018a2ece4
>[    4.354453] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[    4.354509] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[    4.354547] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[    4.354587] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[    4.354626] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[    4.354663] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[    4.354699] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[    4.354733] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[    4.354766] [drm:intel_dump_pipe_config [i915]] requested mode:
>[    4.354781] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[    4.354815] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[    4.354828] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[    4.354863] [drm:intel_dump_pipe_config [i915]] crtc timings: 297000 3840 4016 4104 4400 2160 2168 2178 2250, type: 0x48 flags: 0x5
>[    4.354896] [drm:intel_dump_pipe_config [i915]] port clock: 297000, pipe src size: 3840x2160, pixel rate 297000
>[    4.354930] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[    4.354962] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    4.354995] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[    4.355033] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1d, pll1: 0x100, pll2: 0x2ccccd, pll3: 0x10000, pll6: 0x30b05, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x58
>[    4.355066] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[    4.355099] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[    4.355131] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[    4.355162] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[    4.355194] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[    4.355225] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] disabled, scaler_id = -1
>[    4.355262] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[    4.355295] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13
>[    4.355335] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 163
>[    4.355369] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[    4.355409] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[    4.355444] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[    4.355490] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988)
>[    4.355505] [drm:drm_atomic_commit [drm]] committing 0000000018a2ece4
>[    4.355573] [drm:intel_disable_pipe [i915]] disabling pipe A
>[    4.365410] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[    4.365501] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Disabling DP dual mode adaptor TMDS output
>[    4.366842] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 51
>[    4.366908] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[    4.366958] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[    4.366996] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[    4.367032] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[    4.367067] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[    4.367101] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[    4.367138] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[    4.367173] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[    4.367206] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[    4.367271] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 51
>[    4.367307] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[    4.367452] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Enabling DP dual mode adaptor TMDS output
>[    4.368631] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[    4.368844] [drm:intel_enable_pipe [i915]] enabling pipe A
>[    4.368897] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:101:HDMI-A-1], [ENCODER:100:DDI B]
>[    4.368935] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 40 bytes ELD
>[    4.368974] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[    4.369010] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[    4.369045] [drm:hsw_audio_config_update [i915]] using automatic N
>[    4.369089] [drm:intel_fbc_enable [i915]] reserved 33177600 bytes of contiguous stolen space for FBC, threshold: 1
>[    4.369126] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>[    4.370549] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[    4.370614] [drm:intel_fbc_underrun_work_fn [i915]] Disabling FBC due to FIFO underrun.
>[    4.402647] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[    4.402699] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[    4.402774] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[    4.402838] Console: switching to colour frame buffer device 480x135
>[    4.402901] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fbd0f2a2
>[    4.402917] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e7009158 state to 00000000fbd0f2a2
>[    4.402932] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048b6a512 state to 00000000fbd0f2a2
>[    4.402945] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000853a8cdb state to 00000000fbd0f2a2
>[    4.402958] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000853a8cdb
>[    4.402971] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:plane 3A] 000000008642dd56 state to 00000000fbd0f2a2
>[    4.402984] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:plane 3A] state 000000008642dd56
>[    4.403012] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018a2ece4
>[    4.403046] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018a2ece4
>[    4.403062] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 4A] 00000000c877fbbf state to 00000000fbd0f2a2
>[    4.403073] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:43:plane 4A] state 00000000c877fbbf
>[    4.403085] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000006b1ba85a state to 00000000fbd0f2a2
>[    4.403096] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000006b1ba85a
>[    4.403107] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 1B] 000000007973f612 state to 00000000fbd0f2a2
>[    4.403119] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:57:plane 2B] 00000000538ac473 state to 00000000fbd0f2a2
>[    4.403130] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:57:plane 2B] state 00000000538ac473
>[    4.403142] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 3B] 0000000075eb8107 state to 00000000fbd0f2a2
>[    4.403153] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:62:plane 3B] state 0000000075eb8107
>[    4.403164] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:67:plane 4B] 00000000c3be4b59 state to 00000000fbd0f2a2
>[    4.403175] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:67:plane 4B] state 00000000c3be4b59
>[    4.403187] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:72:cursor B] 000000008e49eae9 state to 00000000fbd0f2a2
>[    4.403198] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:72:cursor B] state 000000008e49eae9
>[    4.403210] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:76:plane 1C] 000000009059c564 state to 00000000fbd0f2a2
>[    4.403221] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:81:plane 2C] 00000000824b908c state to 00000000fbd0f2a2
>[    4.403232] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:81:plane 2C] state 00000000824b908c
>[    4.403244] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:86:plane 3C] 000000004d28e062 state to 00000000fbd0f2a2
>[    4.403255] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:86:plane 3C] state 000000004d28e062
>[    4.403266] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:91:plane 4C] 000000003f06153a state to 00000000fbd0f2a2
>[    4.403278] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:91:plane 4C] state 000000003f06153a
>[    4.403290] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:96:cursor C] 000000009dc5d1c1 state to 00000000fbd0f2a2
>[    4.403301] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:96:cursor C] state 000000009dc5d1c1
>[    4.403315] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 0000000048b6a512
>[    4.403328] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:163] for [PLANE:28:plane 1A] state 00000000e7009158
>[    4.403339] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000fbd0f2a2
>[    4.403353] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000671b1ded state to 00000000fbd0f2a2
>[    4.403364] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000671b1ded to [NOCRTC]
>[    4.403376] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000671b1ded to [CRTC:51:pipe A]
>[    4.403389] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 0000000018a2ece4 state to 00000000fbd0f2a2
>[    4.403400] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:75:pipe B] state 0000000018a2ece4
>[    4.403411] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:plane 1B] state 000000007973f612
>[    4.403423] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:75:pipe B] to 00000000fbd0f2a2
>[    4.403436] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 00000000d6aadfb5 state to 00000000fbd0f2a2
>[    4.403447] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:99:pipe C] state 00000000d6aadfb5
>[    4.403458] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:76:plane 1C] state 000000009059c564
>[    4.403470] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:99:pipe C] to 00000000fbd0f2a2
>[    4.403484] [drm:drm_atomic_check_only [drm]] checking 00000000fbd0f2a2
>[    4.403499] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[    4.403506] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[    4.403551] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 163
>[    4.403589] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[    4.403611] [drm:drm_atomic_commit [drm]] committing 00000000fbd0f2a2
>[    4.435907] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fbd0f2a2
>[    4.435950] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fbd0f2a2
>[    4.456137] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    4.471958] [drm:drm_fb_helper_hotplug_event.part.36 [drm_kms_helper]] 
>[    4.471967] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[    4.472001] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[    4.472103] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[    4.503186] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[    4.503835] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[    4.504600] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[    4.504627] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[    4.504641] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[    4.504658] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    4.504671] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    4.504689] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[    4.504702] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[    4.504713] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[    4.504725] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    4.504737] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    4.505378] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505390] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505404] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505415] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505428] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    4.505440] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505452] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"4096x2160" 0 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505464] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505477] [drm:drm_mode_debug_printmodeline [drm]] Modeline 179:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505488] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505501] [drm:drm_mode_debug_printmodeline [drm]] Modeline 153:"4096x2160" 0 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    4.505512] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505525] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"4096x2160" 0 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.505536] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505549] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.505560] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505573] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.505584] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.505597] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[    4.505609] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[    4.505622] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505634] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505647] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.505659] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505671] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.505683] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.505696] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.505708] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.505721] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.505733] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.505745] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.505758] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.505770] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.505783] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    4.505796] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    4.505809] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    4.505821] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    4.505834] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    4.505846] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.505859] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.505871] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    4.505884] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    4.505896] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    4.505908] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[    4.505920] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[    4.505933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    4.505945] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    4.505957] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[    4.505969] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[    4.505982] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[    4.505994] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    4.506006] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.506019] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.506031] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.506043] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[    4.506055] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    4.506068] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[    4.506080] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    4.506092] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[    4.506104] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    4.506117] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[    4.506129] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    4.506141] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[    4.506153] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[    4.506166] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[    4.506178] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[    4.506190] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[    4.506203] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[    4.506215] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    4.506227] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[    4.506239] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[    4.506251] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    4.506264] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[    4.506276] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    4.506284] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[    4.506321] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[    4.506350] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[    4.506608] [drm:intel_power_well_enable [i915]] enabling AUX C
>[    4.506637] [drm:intel_power_well_disable [i915]] disabling AUX C
>[    4.506665] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[    4.506674] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[    4.506682] [drm:drm_setup_crtcs [drm_kms_helper]] connector 101 enabled? yes
>[    4.506688] [drm:drm_setup_crtcs [drm_kms_helper]] connector 108 enabled? no
>[    4.506724] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[    4.506731] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 101
>[    4.506737] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 101 0
>[    4.506743] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[    4.506749] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 3840x2160 config
>[    4.506759] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 51 (0,0)
>[    4.506778] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bdb40889
>[    4.506794] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005033346b state to 00000000bdb40889
>[    4.506808] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bdc1a01c state to 00000000bdb40889
>[    4.506821] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 00000000419a7ddc state to 00000000bdb40889
>[    4.506834] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 00000000419a7ddc
>[    4.506846] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:plane 3A] 00000000d4e679f1 state to 00000000bdb40889
>[    4.506858] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:plane 3A] state 00000000d4e679f1
>[    4.506871] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 4A] 00000000c6d0a694 state to 00000000bdb40889
>[    4.506882] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:43:plane 4A] state 00000000c6d0a694
>[    4.506895] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000002a987ed4 state to 00000000bdb40889
>[    4.506906] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000002a987ed4
>[    4.506918] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 1B] 00000000bc2b3f0e state to 00000000bdb40889
>[    4.506930] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:57:plane 2B] 00000000c2bd5098 state to 00000000bdb40889
>[    4.506942] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:57:plane 2B] state 00000000c2bd5098
>[    4.506954] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 3B] 00000000578193f8 state to 00000000bdb40889
>[    4.506966] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:62:plane 3B] state 00000000578193f8
>[    4.506978] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:67:plane 4B] 00000000c3d5f380 state to 00000000bdb40889
>[    4.506989] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:67:plane 4B] state 00000000c3d5f380
>[    4.507002] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:72:cursor B] 00000000182bdf84 state to 00000000bdb40889
>[    4.507013] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:72:cursor B] state 00000000182bdf84
>[    4.507025] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:76:plane 1C] 0000000073a1e4ef state to 00000000bdb40889
>[    4.507037] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:81:plane 2C] 000000008d9fc566 state to 00000000bdb40889
>[    4.507049] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:81:plane 2C] state 000000008d9fc566
>[    4.507061] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:86:plane 3C] 00000000dcd7fc86 state to 00000000bdb40889
>[    4.507072] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:86:plane 3C] state 00000000dcd7fc86
>[    4.507084] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:91:plane 4C] 00000000b280ae08 state to 00000000bdb40889
>[    4.507096] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:91:plane 4C] state 00000000b280ae08
>[    4.507108] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:96:cursor C] 00000000c58747ed state to 00000000bdb40889
>[    4.507120] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:96:cursor C] state 00000000c58747ed
>[    4.507133] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 00000000bdc1a01c
>[    4.507145] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:163] for [PLANE:28:plane 1A] state 000000005033346b
>[    4.507157] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000bdb40889
>[    4.507171] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000ff5943a9 state to 00000000bdb40889
>[    4.507183] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000ff5943a9 to [NOCRTC]
>[    4.507195] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000ff5943a9 to [CRTC:51:pipe A]
>[    4.507208] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 000000006afe84be state to 00000000bdb40889
>[    4.507220] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:75:pipe B] state 000000006afe84be
>[    4.507232] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:plane 1B] state 00000000bc2b3f0e
>[    4.507244] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:75:pipe B] to 00000000bdb40889
>[    4.507257] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 000000000539a634 state to 00000000bdb40889
>[    4.507269] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:99:pipe C] state 000000000539a634
>[    4.507280] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:76:plane 1C] state 0000000073a1e4ef
>[    4.507292] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:99:pipe C] to 00000000bdb40889
>[    4.507304] [drm:drm_atomic_check_only [drm]] checking 00000000bdb40889
>[    4.507315] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[    4.507323] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[    4.507361] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 163
>[    4.507392] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[    4.507416] [drm:drm_atomic_commit [drm]] committing 00000000bdb40889
>[    4.529019] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
>[    4.535759] [drm:drm_fb_helper_hotplug_event.part.36 [drm_kms_helper]] 
>[    4.535782] [drm:drm_setup_crtcs [drm_kms_helper]] 
>[    4.535792] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[    4.535848] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[    4.535958] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bdb40889
>[    4.535981] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bdb40889
>[    4.564119] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[    4.564844] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[    4.565610] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[    4.565632] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[    4.565645] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[    4.565661] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    4.565674] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    4.565694] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[    4.565707] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[    4.565718] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[    4.565730] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    4.565741] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    4.566372] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"4096x2160" 0 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.566384] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566397] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"4096x2160" 0 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    4.566409] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566422] [drm:drm_mode_debug_printmodeline [drm]] Modeline 211:"4096x2160" 0 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566433] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566446] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    4.566458] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566470] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566482] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566494] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.566506] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566518] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.566530] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566542] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566554] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566566] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566578] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: VIRTUAL_X
>[    4.566591] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[    4.566604] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[    4.566616] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566628] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566641] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.566653] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566665] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    4.566677] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.566690] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    4.566702] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.566714] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.566727] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    4.566739] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.566751] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.566763] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.566776] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    4.566788] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    4.566801] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    4.566813] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    4.566826] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    4.566838] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.566850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    4.566862] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    4.566875] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    4.566887] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    4.566899] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[    4.566912] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[    4.566924] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    4.566936] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    4.566949] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[    4.566961] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[    4.566974] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[    4.566986] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    4.566998] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.567011] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.567023] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    4.567035] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[    4.567048] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    4.567060] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[    4.567072] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    4.567085] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[    4.567097] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    4.567109] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[    4.567122] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    4.567134] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[    4.567146] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[    4.567159] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[    4.567171] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[    4.567183] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[    4.567196] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[    4.567208] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    4.567220] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[    4.567233] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[    4.567245] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    4.567257] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[    4.567269] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    4.567278] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[    4.567313] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[    4.567342] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[    4.567596] [drm:intel_power_well_enable [i915]] enabling AUX C
>[    4.567625] [drm:intel_power_well_disable [i915]] disabling AUX C
>[    4.567653] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[    4.567661] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[    4.567669] [drm:drm_setup_crtcs [drm_kms_helper]] connector 101 enabled? yes
>[    4.567675] [drm:drm_setup_crtcs [drm_kms_helper]] connector 108 enabled? no
>[    4.567712] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[    4.567719] [drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 101
>[    4.567726] [drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 101 0
>[    4.567732] [drm:drm_setup_crtcs [drm_kms_helper]] found mode 3840x2160
>[    4.567738] [drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 3840x2160 config
>[    4.567747] [drm:drm_setup_crtcs [drm_kms_helper]] desired mode 3840x2160 set on crtc 51 (0,0)
>[    4.567771] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bdb40889
>[    4.567787] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002277705c state to 00000000bdb40889
>[    4.567802] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000000934bdb state to 00000000bdb40889
>[    4.567815] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:33:plane 2A] 0000000004ddcf8b state to 00000000bdb40889
>[    4.567828] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:33:plane 2A] state 0000000004ddcf8b
>[    4.567840] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:38:plane 3A] 00000000f9859278 state to 00000000bdb40889
>[    4.567853] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:38:plane 3A] state 00000000f9859278
>[    4.567865] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:43:plane 4A] 000000005a3cb42e state to 00000000bdb40889
>[    4.567877] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:43:plane 4A] state 000000005a3cb42e
>[    4.567889] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000006e9d3392 state to 00000000bdb40889
>[    4.567901] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000006e9d3392
>[    4.567913] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 1B] 0000000048aa261f state to 00000000bdb40889
>[    4.567926] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:57:plane 2B] 0000000062f0d7fe state to 00000000bdb40889
>[    4.567938] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:57:plane 2B] state 0000000062f0d7fe
>[    4.567950] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:62:plane 3B] 000000001f5f8f30 state to 00000000bdb40889
>[    4.567962] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:62:plane 3B] state 000000001f5f8f30
>[    4.567974] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:67:plane 4B] 000000004e699181 state to 00000000bdb40889
>[    4.567986] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:67:plane 4B] state 000000004e699181
>[    4.567999] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:72:cursor B] 00000000ee85e3a3 state to 00000000bdb40889
>[    4.568010] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:72:cursor B] state 00000000ee85e3a3
>[    4.568023] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:76:plane 1C] 00000000e52c74cb state to 00000000bdb40889
>[    4.568035] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:81:plane 2C] 000000008eee60ac state to 00000000bdb40889
>[    4.568047] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:81:plane 2C] state 000000008eee60ac
>[    4.568059] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:86:plane 3C] 000000004ab339d9 state to 00000000bdb40889
>[    4.568070] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:86:plane 3C] state 000000004ab339d9
>[    4.568082] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:91:plane 4C] 000000006ea2adcd state to 00000000bdb40889
>[    4.568094] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:91:plane 4C] state 000000006ea2adcd
>[    4.568106] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:96:cursor C] 000000002a402848 state to 00000000bdb40889
>[    4.568118] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:96:cursor C] state 000000002a402848
>[    4.568132] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 0000000000934bdb
>[    4.568144] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:163] for [PLANE:28:plane 1A] state 000000002277705c
>[    4.568156] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000bdb40889
>[    4.568170] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000007b10369f state to 00000000bdb40889
>[    4.568182] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 000000007b10369f to [NOCRTC]
>[    4.568195] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 000000007b10369f to [CRTC:51:pipe A]
>[    4.568208] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 0000000071030fd1 state to 00000000bdb40889
>[    4.568220] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:75:pipe B] state 0000000071030fd1
>[    4.568231] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:plane 1B] state 0000000048aa261f
>[    4.568243] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:75:pipe B] to 00000000bdb40889
>[    4.568260] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 0000000080d9e446 state to 00000000bdb40889
>[    4.568272] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:99:pipe C] state 0000000080d9e446
>[    4.568284] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:76:plane 1C] state 00000000e52c74cb
>[    4.568296] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:99:pipe C] to 00000000bdb40889
>[    4.568309] [drm:drm_atomic_check_only [drm]] checking 00000000bdb40889
>[    4.568319] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[    4.568327] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[    4.568366] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 163
>[    4.568397] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[    4.568420] [drm:drm_atomic_commit [drm]] committing 00000000bdb40889
>[    4.569005] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bdb40889
>[    4.569023] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bdb40889
>[    4.711941] systemd[1]: systemd 237 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2 +IDN -PCRE2 default-hierarchy=hybrid)
>[    4.732231] systemd[1]: Detected architecture x86-64.
>[    4.737909] systemd[1]: Set hostname to <edwardtseng-Geminilake>.
>[    4.838705] random: systemd: uninitialized urandom read (16 bytes read)
>[    4.838823] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
>[    4.838968] random: systemd: uninitialized urandom read (16 bytes read)
>[    4.839226] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point.
>[    4.839248] random: systemd: uninitialized urandom read (16 bytes read)
>[    4.839518] systemd[1]: Created slice User and Session Slice.
>[    4.839546] systemd[1]: Reached target Remote File Systems.
>[    4.839574] systemd[1]: Reached target User and Group Name Lookups.
>[    4.839818] systemd[1]: Created slice System Slice.
>[    4.839961] systemd[1]: Listening on udev Control Socket.
>[    4.869195] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro
>[    4.879335] lp: driver loaded but no devices found
>[    4.886305] ppdev: user-space parallel port driver
>[    4.966388] Adding 2097148k swap on /swapfile.  Priority:-2 extents:6 across:2260988k SSFS
>[    5.018832] systemd-journald[258]: Received request to flush runtime journal from PID 1
>[    5.165328] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[    5.165389] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[    5.184904] input: Intel HID events as /devices/platform/INT33D5:00/input/input7
>[    5.185441] intel-hid INT33D5:00: platform supports 5 button array
>[    5.185481] input: Intel HID 5 button array as /devices/platform/INT33D5:00/input/input8
>[    5.195855] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[    5.196548] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[    5.198337] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[    5.198360] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[    5.198373] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[    5.198390] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    5.198403] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    5.198423] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[    5.198437] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[    5.198449] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[    5.198461] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    5.198473] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    5.199203] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[    5.199218] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[    5.199232] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199245] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199257] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    5.199270] [drm:drm_mode_debug_printmodeline [drm]] Modeline 211:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199283] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199296] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    5.199309] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    5.199321] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    5.199334] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    5.199347] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199359] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199372] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    5.199385] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199397] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    5.199410] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    5.199422] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    5.199435] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    5.199448] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    5.199460] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    5.199473] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    5.199486] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    5.199498] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    5.199511] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    5.199524] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    5.199536] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    5.199549] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    5.199562] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    5.199575] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    5.199587] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    5.199600] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    5.199613] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    5.199625] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    5.199638] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[    5.199650] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[    5.199663] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    5.199675] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    5.199688] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[    5.199701] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[    5.199714] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[    5.199727] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    5.199739] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    5.199752] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    5.199779] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    5.199792] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[    5.199804] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    5.199817] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[    5.199830] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    5.199843] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[    5.199855] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    5.199868] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[    5.199880] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    5.199893] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[    5.199906] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[    5.199919] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[    5.199931] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[    5.199944] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[    5.199957] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[    5.199970] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    5.199982] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[    5.199995] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[    5.200008] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    5.200020] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[    5.200033] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    5.243085] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[    5.243141] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[    5.243173] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[    5.243432] [drm:intel_power_well_enable [i915]] enabling AUX C
>[    5.243462] [drm:intel_power_well_disable [i915]] disabling AUX C
>[    5.243489] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[    5.243498] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[    5.243562] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[    5.258635] input: Intel Virtual Button driver as /devices/pci0000:00/0000:00:1f.0/PNP0C09:00/INT33D6:00/input/input9
>[    5.452766] idma64 idma64.0: Found Intel integrated DMA 64-bit
>[    5.460464] random: crng init done
>[    5.460466] random: 7 urandom warning(s) missed due to ratelimiting
>[    5.471479] idma64 idma64.1: Found Intel integrated DMA 64-bit
>[    5.499565] idma64 idma64.2: Found Intel integrated DMA 64-bit
>[    5.515856] idma64 idma64.3: Found Intel integrated DMA 64-bit
>[    5.534288] idma64 idma64.4: Found Intel integrated DMA 64-bit
>[    5.550791] i2c_hid i2c-ALPS0001:00: i2c-ALPS0001:00 supply vdd not found, using dummy regulator
>[    5.550813] i2c_hid i2c-ALPS0001:00: Linked as a consumer to regulator.0
>[    5.550815] i2c_hid i2c-ALPS0001:00: i2c-ALPS0001:00 supply vddl not found, using dummy regulator
>[    5.554853] idma64 idma64.5: Found Intel integrated DMA 64-bit
>[    5.587689] idma64 idma64.6: Found Intel integrated DMA 64-bit
>[    5.592711] snd_hda_intel 0000:00:0e.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[    5.593993] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[    5.594083] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[    5.594104] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[    5.594123] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000681e1689
>[    5.594140] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001218d048 state to 00000000681e1689
>[    5.594154] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000827cf358 state to 00000000681e1689
>[    5.594168] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 000000001218d048
>[    5.594181] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000827cf358
>[    5.594194] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000681e1689
>[    5.594209] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000ece27078 state to 00000000681e1689
>[    5.594222] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000ece27078 to [NOCRTC]
>[    5.594235] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000ece27078 to [CRTC:51:pipe A]
>[    5.594249] [drm:drm_atomic_check_only [drm]] checking 00000000681e1689
>[    5.594265] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[    5.594273] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[    5.594335] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[    5.594366] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[    5.594388] [drm:drm_atomic_commit [drm]] committing 00000000681e1689
>[    5.613883] idma64 idma64.7: Found Intel integrated DMA 64-bit
>[    5.628274] i2c_hid i2c-WCOM508E:00: i2c-WCOM508E:00 supply vdd not found, using dummy regulator
>[    5.628292] i2c_hid i2c-WCOM508E:00: Linked as a consumer to regulator.0
>[    5.628294] i2c_hid i2c-WCOM508E:00: i2c-WCOM508E:00 supply vddl not found, using dummy regulator
>[    5.628838] snd_hda_codec_realtek hdaudioC0D0: autoconfig for ALC298: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>[    5.628840] snd_hda_codec_realtek hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[    5.628842] snd_hda_codec_realtek hdaudioC0D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>[    5.628843] snd_hda_codec_realtek hdaudioC0D0:    mono: mono_out=0x0
>[    5.628844] snd_hda_codec_realtek hdaudioC0D0:    inputs:
>[    5.628846] snd_hda_codec_realtek hdaudioC0D0:      Mic=0x18
>[    5.628847] snd_hda_codec_realtek hdaudioC0D0:      Internal Mic=0x12
>[    5.629220] i2c_hid i2c-WCOM508E:00: unexpected HID descriptor bcdVersion (0x0000)
>[    5.630861] idma64 idma64.8: Found Intel integrated DMA 64-bit
>[    5.631270] idma64 idma64.9: Found Intel integrated DMA 64-bit
>[    5.635722] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000681e1689
>[    5.635743] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000681e1689
>[    5.640476] idma64 idma64.11: Found Intel integrated DMA 64-bit
>[    5.641114] idma64 idma64.12: Found Intel integrated DMA 64-bit
>[    5.641463] idma64 idma64.13: Found Intel integrated DMA 64-bit
>[    5.645506] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[    5.645533] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[    5.645551] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000681e1689
>[    5.645568] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000028cb41b8 state to 00000000681e1689
>[    5.645582] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000019e8f996 state to 00000000681e1689
>[    5.645597] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 0000000028cb41b8
>[    5.645610] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000019e8f996
>[    5.645623] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000681e1689
>[    5.645637] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000007b10369f state to 00000000681e1689
>[    5.645650] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 000000007b10369f to [NOCRTC]
>[    5.645663] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 000000007b10369f to [CRTC:51:pipe A]
>[    5.645677] [drm:drm_atomic_check_only [drm]] checking 00000000681e1689
>[    5.645691] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[    5.645699] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[    5.645752] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[    5.645784] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[    5.645807] [drm:drm_atomic_commit [drm]] committing 00000000681e1689
>[    5.669068] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000681e1689
>[    5.669088] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000681e1689
>[    5.730283] RAPL PMU: API unit is 2^-32 Joules, 4 fixed counters, 655360 ms ovfl timer
>[    5.730285] RAPL PMU: hw unit of domain pp0-core 2^-14 Joules
>[    5.730285] RAPL PMU: hw unit of domain package 2^-14 Joules
>[    5.730286] RAPL PMU: hw unit of domain dram 2^-14 Joules
>[    5.730287] RAPL PMU: hw unit of domain pp1-gpu 2^-14 Joules
>[    5.743633] cryptd: max_cpu_qlen set to 1000
>[    5.765029] SSE version of gcm_enc/dec engaged.
>[    5.968534] intel_telemetry_core Init
>[    6.003086] intel_rapl: Found RAPL domain package
>[    6.003088] intel_rapl: Found RAPL domain core
>[    6.003089] intel_rapl: Found RAPL domain uncore
>[    6.003091] intel_rapl: Found RAPL domain dram
>[    6.060189] dw-apb-uart.8: ttyS4 at MMIO 0xa122b000 (irq = 4, base_baud = 115200) is a 16550A
>[    6.103992] audit: type=1400 audit(4039448207.799:2): apparmor="STATUS" operation="profile_load" profile="unconfined" name="libreoffice-oopslash" pid=500 comm="apparmor_parser"
>[    6.104198] audit: type=1400 audit(4039448207.799:3): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/bin/man" pid=499 comm="apparmor_parser"
>[    6.104200] audit: type=1400 audit(4039448207.799:4): apparmor="STATUS" operation="profile_load" profile="unconfined" name="man_filter" pid=499 comm="apparmor_parser"
>[    6.104203] audit: type=1400 audit(4039448207.799:5): apparmor="STATUS" operation="profile_load" profile="unconfined" name="man_groff" pid=499 comm="apparmor_parser"
>[    6.105525] audit: type=1400 audit(4039448207.799:6): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/sbin/dhclient" pid=496 comm="apparmor_parser"
>[    6.105529] audit: type=1400 audit(4039448207.799:7): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-client.action" pid=496 comm="apparmor_parser"
>[    6.105531] audit: type=1400 audit(4039448207.799:8): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/NetworkManager/nm-dhcp-helper" pid=496 comm="apparmor_parser"
>[    6.105534] audit: type=1400 audit(4039448207.799:9): apparmor="STATUS" operation="profile_load" profile="unconfined" name="/usr/lib/connman/scripts/dhclient-script" pid=496 comm="apparmor_parser"
>[    6.106580] audit: type=1400 audit(4039448207.799:10): apparmor="STATUS" operation="profile_load" profile="unconfined" name="libreoffice-senddoc" pid=501 comm="apparmor_parser"
>[    6.106585] audit: type=1400 audit(4039448207.799:11): apparmor="STATUS" operation="profile_load" profile="unconfined" name="libreoffice-senddoc//sanitized_helper" pid=501 comm="apparmor_parser"
>[    6.188178] dw-apb-uart.9: ttyS5 at MMIO 0xa122d000 (irq = 5, base_baud = 115200) is a 16550A
>[    6.320201] dw-apb-uart.10: ttyS6 at MMIO 0xa122f000 (irq = 7, base_baud = 115200) is a 16550A
>[    7.610772] IPv6: ADDRCONF(NETDEV_UP): enp1s0: link is not ready
>[    7.613356] Generic PHY r8169-100:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=r8169-100:00, irq=IGNORE)
>[    7.708669] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[    7.708702] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[    7.708732] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[    7.708761] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[    7.708790] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[    7.708819] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[    7.708847] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[    7.708875] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[    7.711780] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:0e.0/sound/card0/input10
>[    7.711925] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:0e.0/sound/card0/input11
>[    7.712022] input: HDA Intel PCH HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input12
>[    7.712110] input: HDA Intel PCH HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input13
>[    7.712203] input: HDA Intel PCH HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input14
>[    7.712297] input: HDA Intel PCH HDMI/DP,pcm=9 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input15
>[    7.712391] input: HDA Intel PCH HDMI/DP,pcm=10 as /devices/pci0000:00/0000:00:0e.0/sound/card0/input16
>[    7.730776] IPv6: ADDRCONF(NETDEV_UP): enp1s0: link is not ready
>[    8.848973] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[    8.849031] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[    8.876743] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[    8.877467] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[    8.878247] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[    8.878273] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[    8.878286] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[    8.878302] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    8.878315] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    8.878339] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[    8.878351] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[    8.878363] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[    8.878375] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[    8.878386] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[    8.879128] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[    8.879142] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[    8.879155] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879168] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879180] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    8.879193] [drm:drm_mode_debug_printmodeline [drm]] Modeline 211:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879205] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879217] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[    8.879229] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    8.879242] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    8.879254] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    8.879266] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879278] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879291] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    8.879303] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879315] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[    8.879327] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    8.879339] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[    8.879352] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    8.879364] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    8.879376] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[    8.879388] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    8.879401] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    8.879413] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    8.879425] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    8.879438] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[    8.879450] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    8.879462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    8.879475] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[    8.879487] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    8.879499] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[    8.879511] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[    8.879524] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    8.879536] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[    8.879548] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[    8.879560] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[    8.879573] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    8.879585] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    8.879597] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[    8.879610] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[    8.879622] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[    8.879634] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    8.879646] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    8.879659] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    8.879671] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[    8.879683] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[    8.879695] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    8.879708] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[    8.879720] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    8.879732] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[    8.879744] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    8.879757] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[    8.879804] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    8.879816] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[    8.879831] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[    8.879848] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[    8.879862] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[    8.879880] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[    8.879895] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[    8.879909] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    8.879923] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[    8.879937] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[    8.879952] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    8.879966] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[    8.879981] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    8.880068] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[    8.880102] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[    8.880135] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[    8.880609] [drm:intel_power_well_enable [i915]] enabling AUX C
>[    8.880639] [drm:intel_power_well_disable [i915]] disabling AUX C
>[    8.880668] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[    8.880676] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[    8.881903] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000dfa9a29c
>[    8.881920] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 00000000dfa9a29c
>[    8.881937] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000009a56f90d state to 00000000dfa9a29c
>[    8.881950] [drm:drm_atomic_check_only [drm]] checking 00000000dfa9a29c
>[    8.881992] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[    8.882025] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[    8.882048] [drm:drm_atomic_commit [drm]] committing 00000000dfa9a29c
>[    8.902590] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000dfa9a29c
>[    8.902626] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000dfa9a29c
>[    8.977925] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000419ccd53
>[    8.977944] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 0000000097e9ecd5 state to 00000000419ccd53
>[    8.977959] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 0000000097e9ecd5
>[    8.977973] [drm:drm_atomic_check_only [drm]] checking 00000000419ccd53
>[    8.977989] [drm:drm_atomic_commit [drm]] committing 00000000419ccd53
>[    8.978027] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000419ccd53
>[    8.978041] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000419ccd53
>[    9.859380] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[    9.859413] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[    9.859441] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[    9.859468] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[    9.859494] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[    9.859521] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[    9.859547] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[    9.859573] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[    9.860514] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[    9.860554] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[    9.860579] [drm:hsw_audio_config_update [i915]] using N 4704
>[    9.874733] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[    9.874766] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[    9.874795] [drm:hsw_audio_config_update [i915]] using N 4704
>[    9.890018] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[    9.890051] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[    9.890081] [drm:hsw_audio_config_update [i915]] using N 4704
>[   10.349637] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f453ae84
>[   10.349655] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 0000000080d49aaa state to 00000000f453ae84
>[   10.349671] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000009fa18dce state to 00000000f453ae84
>[   10.349684] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 0000000080d49aaa to [CRTC:51:pipe A]
>[   10.349698] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 0000000080d49aaa
>[   10.349711] [drm:drm_atomic_check_only [drm]] checking 00000000f453ae84
>[   10.349764] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   10.349796] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[   10.349821] [drm:drm_atomic_commit [drm]] committing 00000000f453ae84
>[   10.349984] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f453ae84
>[   10.349998] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f453ae84
>[   10.350020] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000ca33ff72
>[   10.350053] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   10.350084] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.404131] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000f22f0c2d
>[   12.404190] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   12.404224] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.504548] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   12.504576] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[   12.504600] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[   12.504618] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000dfa9a29c
>[   12.504636] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000028cb41b8 state to 00000000dfa9a29c
>[   12.504650] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000051b2ff92 state to 00000000dfa9a29c
>[   12.504666] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:3840x2160] for [CRTC:51:pipe A] state 0000000028cb41b8
>[   12.504679] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000051b2ff92
>[   12.504692] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000dfa9a29c
>[   12.504708] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000b8ec3a3d state to 00000000dfa9a29c
>[   12.504721] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000b8ec3a3d to [NOCRTC]
>[   12.504733] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000b8ec3a3d to [CRTC:51:pipe A]
>[   12.504748] [drm:drm_atomic_check_only [drm]] checking 00000000dfa9a29c
>[   12.504762] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   12.504770] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   12.504824] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   12.504857] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.504881] [drm:drm_atomic_commit [drm]] committing 00000000dfa9a29c
>[   12.569059] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000dfa9a29c
>[   12.569082] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000dfa9a29c
>[   12.569142] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009ff8b1cf
>[   12.569159] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006bde2cc3 state to 000000009ff8b1cf
>[   12.569173] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000002bc9f90 state to 000000009ff8b1cf
>[   12.569187] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000002bc9f90
>[   12.569199] [drm:drm_atomic_check_only [drm]] checking 000000009ff8b1cf
>[   12.569258] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   12.569290] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.569314] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009ff8b1cf nonblocking
>[   12.569369] [drm:drm_mode_setcrtc [drm]] [CRTC:75:pipe B]
>[   12.569384] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0a2ce15
>[   12.569399] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000df71ad36 state to 00000000c0a2ce15
>[   12.569412] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 1B] 00000000ce15043b state to 00000000c0a2ce15
>[   12.569425] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:75:pipe B] state 00000000df71ad36
>[   12.569437] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:plane 1B] state 00000000ce15043b
>[   12.569449] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:75:pipe B] to 00000000c0a2ce15
>[   12.569463] [drm:drm_atomic_check_only [drm]] checking 00000000c0a2ce15
>[   12.569479] [drm:drm_atomic_commit [drm]] committing 00000000c0a2ce15
>[   12.569502] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0a2ce15
>[   12.569515] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0a2ce15
>[   12.569538] [drm:drm_mode_setcrtc [drm]] [CRTC:99:pipe C]
>[   12.569553] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0a2ce15
>[   12.569567] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 000000005768f325 state to 00000000c0a2ce15
>[   12.569580] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:76:plane 1C] 000000006971875d state to 00000000c0a2ce15
>[   12.569592] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:99:pipe C] state 000000005768f325
>[   12.569604] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:76:plane 1C] state 000000006971875d
>[   12.569617] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:99:pipe C] to 00000000c0a2ce15
>[   12.569629] [drm:drm_atomic_check_only [drm]] checking 00000000c0a2ce15
>[   12.569644] [drm:drm_atomic_commit [drm]] committing 00000000c0a2ce15
>[   12.569666] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0a2ce15
>[   12.569680] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0a2ce15
>[   12.602399] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009ff8b1cf
>[   12.602419] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009ff8b1cf
>[   12.624018] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0a2ce15
>[   12.624038] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000d94ab43 state to 00000000c0a2ce15
>[   12.624052] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000c0a2ce15
>[   12.624067] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000006d7f489e state to 00000000c0a2ce15
>[   12.624080] [drm:drm_atomic_check_only [drm]] checking 00000000c0a2ce15
>[   12.624095] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   12.624103] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   12.624129] [drm:drm_atomic_commit [drm]] committing 00000000c0a2ce15
>[   12.635759] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0a2ce15
>[   12.635792] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0a2ce15
>[   12.638764] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000d6afd2ee
>[   12.638833] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   12.638878] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.649798] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   12.649836] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000090348876
>[   12.649855] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000028cb41b8 state to 0000000090348876
>[   12.649870] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 0000000090348876
>[   12.649884] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   12.649898] [drm:drm_atomic_check_only [drm]] checking 0000000090348876
>[   12.649961] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   12.649994] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.650020] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000090348876 nonblocking
>[   12.672337] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007699da8a
>[   12.672367] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fa56471 state to 000000007699da8a
>[   12.672382] [drm:drm_atomic_check_only [drm]] checking 000000007699da8a
>[   12.672418] [drm:drm_atomic_commit [drm]] committing 000000007699da8a
>[   12.702406] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000090348876
>[   12.702426] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000090348876
>[   12.735734] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007699da8a
>[   12.735752] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007699da8a
>[   12.859928] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   12.859974] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000060d7d6c7
>[   12.859992] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c361da7d state to 0000000060d7d6c7
>[   12.860006] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000052504c71 state to 0000000060d7d6c7
>[   12.860019] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000052504c71
>[   12.860032] [drm:drm_atomic_check_only [drm]] checking 0000000060d7d6c7
>[   12.860096] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   12.860127] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.860153] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000060d7d6c7 nonblocking
>[   12.902424] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000060d7d6c7
>[   12.902443] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000060d7d6c7
>[   12.956693] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   12.956728] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000060d7d6c7
>[   12.956747] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008df324e1 state to 0000000060d7d6c7
>[   12.956761] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 0000000060d7d6c7
>[   12.956775] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   12.956788] [drm:drm_atomic_check_only [drm]] checking 0000000060d7d6c7
>[   12.956844] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   12.956876] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   12.956903] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000060d7d6c7 nonblocking
>[   13.002414] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000060d7d6c7
>[   13.002435] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000060d7d6c7
>[   13.009940] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.009976] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007fa56471
>[   13.009994] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5394f4f state to 000000007fa56471
>[   13.010009] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000809dff34 state to 000000007fa56471
>[   13.010022] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000809dff34
>[   13.010044] [drm:drm_atomic_check_only [drm]] checking 000000007fa56471
>[   13.010099] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.010131] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.010157] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007fa56471 nonblocking
>[   13.035950] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007fa56471
>[   13.035989] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007fa56471
>[   13.040758] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.040823] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   13.040860] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 000000008c44388a
>[   13.040890] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 000000008c44388a
>[   13.040919] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.040947] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   13.041051] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.041121] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.041171] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   13.069224] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   13.069266] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   13.074183] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.074258] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000024e84cbd
>[   13.074302] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b2214e31 state to 0000000024e84cbd
>[   13.074340] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c90c131f state to 0000000024e84cbd
>[   13.074375] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000c90c131f
>[   13.074409] [drm:drm_atomic_check_only [drm]] checking 0000000024e84cbd
>[   13.074546] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.074631] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.074689] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000024e84cbd nonblocking
>[   13.102582] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000024e84cbd
>[   13.102634] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000024e84cbd
>[   13.106911] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.106995] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000024e84cbd
>[   13.107043] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 0000000024e84cbd
>[   13.107084] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000097e9ecd5 state to 0000000024e84cbd
>[   13.107123] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000097e9ecd5
>[   13.107161] [drm:drm_atomic_check_only [drm]] checking 0000000024e84cbd
>[   13.107317] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.107412] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.107476] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000024e84cbd nonblocking
>[   13.135927] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000024e84cbd
>[   13.135973] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000024e84cbd
>[   13.140371] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.140445] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   13.140489] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000024e84cbd state to 000000008c44388a
>[   13.140525] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c90c131f state to 000000008c44388a
>[   13.140560] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000c90c131f
>[   13.140594] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   13.140713] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.140797] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.140854] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   13.169225] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   13.169267] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   13.173084] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.173150] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b2214e31
>[   13.173191] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008c44388a state to 00000000b2214e31
>[   13.173224] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 00000000b2214e31
>[   13.173256] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.173286] [drm:drm_atomic_check_only [drm]] checking 00000000b2214e31
>[   13.173411] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.173487] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.173539] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b2214e31 nonblocking
>[   13.202579] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b2214e31
>[   13.202630] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b2214e31
>[   13.206763] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.206846] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000084006804
>[   13.206895] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b2214e31 state to 0000000084006804
>[   13.206936] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 0000000084006804
>[   13.206976] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   13.207014] [drm:drm_atomic_check_only [drm]] checking 0000000084006804
>[   13.207146] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.207240] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.207313] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000084006804 nonblocking
>[   13.235850] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000084006804
>[   13.235896] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000084006804
>[   13.238605] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.238638] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000024e84cbd
>[   13.238656] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 0000000024e84cbd
>[   13.238670] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000052504c71 state to 0000000024e84cbd
>[   13.238683] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000052504c71
>[   13.238696] [drm:drm_atomic_check_only [drm]] checking 0000000024e84cbd
>[   13.238755] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.238786] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.238812] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000024e84cbd nonblocking
>[   13.269098] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000024e84cbd
>[   13.269118] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000024e84cbd
>[   13.270939] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.270972] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   13.270989] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000024e84cbd state to 000000008c44388a
>[   13.271003] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 000000008c44388a
>[   13.271016] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   13.271029] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   13.271086] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.271117] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.271143] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   13.302431] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   13.302449] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   13.304325] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.304359] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b2214e31
>[   13.304376] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008c44388a state to 00000000b2214e31
>[   13.304390] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 00000000b2214e31
>[   13.304403] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.304416] [drm:drm_atomic_check_only [drm]] checking 00000000b2214e31
>[   13.304470] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.304502] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.304527] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b2214e31 nonblocking
>[   13.335916] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b2214e31
>[   13.335946] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b2214e31
>[   13.339294] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.339341] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b5394f4f
>[   13.339374] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fa56471 state to 00000000b5394f4f
>[   13.339396] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000809dff34 state to 00000000b5394f4f
>[   13.339417] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000809dff34
>[   13.339437] [drm:drm_atomic_check_only [drm]] checking 00000000b5394f4f
>[   13.339514] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.339565] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.339602] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b5394f4f nonblocking
>[   13.369257] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b5394f4f
>[   13.369295] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b5394f4f
>[   13.372374] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.372426] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d1ae15a4
>[   13.372453] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5394f4f state to 00000000d1ae15a4
>[   13.372476] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000027013631 state to 00000000d1ae15a4
>[   13.372496] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000027013631
>[   13.372517] [drm:drm_atomic_check_only [drm]] checking 00000000d1ae15a4
>[   13.372595] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.372646] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.372683] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d1ae15a4 nonblocking
>[   13.402570] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d1ae15a4
>[   13.402610] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d1ae15a4
>[   13.406187] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.406285] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007699da8a
>[   13.406328] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000009e03aed0 state to 000000007699da8a
>[   13.406364] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c68d754c state to 000000007699da8a
>[   13.406398] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000c68d754c
>[   13.406431] [drm:drm_atomic_check_only [drm]] checking 000000007699da8a
>[   13.406549] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.406632] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.406689] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007699da8a nonblocking
>[   13.435936] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007699da8a
>[   13.435988] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007699da8a
>[   13.440753] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.440836] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007699da8a
>[   13.440885] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5394f4f state to 000000007699da8a
>[   13.440927] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a18042c1 state to 000000007699da8a
>[   13.440966] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000a18042c1
>[   13.441004] [drm:drm_atomic_check_only [drm]] checking 000000007699da8a
>[   13.441161] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.441257] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.441320] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007699da8a nonblocking
>[   13.469235] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007699da8a
>[   13.469283] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007699da8a
>[   13.502339] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   13.502383] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   13.502402] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b2214e31 state to 000000008c44388a
>[   13.502418] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 000000008c44388a
>[   13.502433] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.502447] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   13.502509] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   13.502544] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.502572] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   13.535937] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   13.535979] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   13.541708] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   13.541751] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000024e84cbd
>[   13.541773] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 0000000024e84cbd
>[   13.541791] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 0000000024e84cbd
>[   13.541808] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   13.541825] [drm:drm_atomic_check_only [drm]] checking 0000000024e84cbd
>[   13.541912] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   13.541953] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.541989] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000024e84cbd nonblocking
>[   13.569259] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000024e84cbd
>[   13.569299] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000024e84cbd
>[   13.570252] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000c90c131f
>[   13.570346] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   13.570413] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.573082] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.573142] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000024e84cbd
>[   13.573177] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b2214e31 state to 0000000024e84cbd
>[   13.573206] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000097e9ecd5 state to 0000000024e84cbd
>[   13.573234] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000097e9ecd5
>[   13.573262] [drm:drm_atomic_check_only [drm]] checking 0000000024e84cbd
>[   13.573356] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.573422] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.573469] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000024e84cbd nonblocking
>[   13.602579] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000024e84cbd
>[   13.602631] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000024e84cbd
>[   13.606142] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   13.606204] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   13.606243] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000024e84cbd state to 000000008c44388a
>[   13.606273] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 000000008c44388a
>[   13.606301] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   13.606329] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   13.606432] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   13.606501] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.606549] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   13.635918] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   13.635964] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   13.639289] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.639371] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000084006804
>[   13.639420] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008c44388a state to 0000000084006804
>[   13.639460] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 0000000084006804
>[   13.639499] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.639537] [drm:drm_atomic_check_only [drm]] checking 0000000084006804
>[   13.639679] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.639773] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.639887] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000084006804 nonblocking
>[   13.669237] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000084006804
>[   13.669289] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000084006804
>[   13.672497] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   13.672578] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b2214e31
>[   13.672626] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 00000000b2214e31
>[   13.672666] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000052504c71 state to 00000000b2214e31
>[   13.672705] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000052504c71
>[   13.672744] [drm:drm_atomic_check_only [drm]] checking 00000000b2214e31
>[   13.672875] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   13.672968] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.673033] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b2214e31 nonblocking
>[   13.702594] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b2214e31
>[   13.702646] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b2214e31
>[   13.705665] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.705755] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000024e84cbd
>[   13.705805] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b2214e31 state to 0000000024e84cbd
>[   13.705846] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 0000000024e84cbd
>[   13.705884] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.705922] [drm:drm_atomic_check_only [drm]] checking 0000000024e84cbd
>[   13.706052] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.706145] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.706210] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000024e84cbd nonblocking
>[   13.735804] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000024e84cbd
>[   13.735874] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000024e84cbd
>[   13.738938] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   13.739020] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   13.739061] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000024e84cbd state to 000000008c44388a
>[   13.739095] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 000000008c44388a
>[   13.739128] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   13.739160] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   13.739280] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   13.739357] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.739409] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   13.769091] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   13.769111] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   13.770720] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.770759] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000084006804
>[   13.770780] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008c44388a state to 0000000084006804
>[   13.770794] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000097e9ecd5 state to 0000000084006804
>[   13.770808] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000097e9ecd5
>[   13.770820] [drm:drm_atomic_check_only [drm]] checking 0000000084006804
>[   13.770878] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.770911] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.770936] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000084006804 nonblocking
>[   13.802551] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000084006804
>[   13.802580] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000084006804
>[   13.804502] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   13.804549] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000084006804
>[   13.804576] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000024e84cbd state to 0000000084006804
>[   13.804597] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 0000000084006804
>[   13.804618] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   13.804637] [drm:drm_atomic_check_only [drm]] checking 0000000084006804
>[   13.804714] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   13.804764] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.804800] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000084006804 nonblocking
>[   13.835933] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000084006804
>[   13.835980] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000084006804
>[   13.839313] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.839387] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b2214e31
>[   13.839431] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 00000000b2214e31
>[   13.839467] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 00000000b2214e31
>[   13.839501] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.839535] [drm:drm_atomic_check_only [drm]] checking 00000000b2214e31
>[   13.839652] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.839735] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.839830] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b2214e31 nonblocking
>[   13.869272] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b2214e31
>[   13.869324] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b2214e31
>[   13.873967] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   13.874051] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   13.874101] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b2214e31 state to 000000008c44388a
>[   13.874142] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000052504c71 state to 000000008c44388a
>[   13.874182] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000052504c71
>[   13.874219] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   13.874350] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   13.874445] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.874509] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   13.902574] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   13.902620] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   13.905450] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.905522] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000024e84cbd
>[   13.905566] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008c44388a state to 0000000024e84cbd
>[   13.905602] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aa108bf7 state to 0000000024e84cbd
>[   13.905636] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000aa108bf7
>[   13.905670] [drm:drm_atomic_check_only [drm]] checking 0000000024e84cbd
>[   13.905785] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.905869] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.905925] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000024e84cbd nonblocking
>[   13.935916] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000024e84cbd
>[   13.935963] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000024e84cbd
>[   13.938702] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   13.938775] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000084006804
>[   13.938819] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000024e84cbd state to 0000000084006804
>[   13.938855] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005abe1dd0 state to 0000000084006804
>[   13.938888] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000005abe1dd0
>[   13.938922] [drm:drm_atomic_check_only [drm]] checking 0000000084006804
>[   13.939057] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   13.939140] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.939196] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000084006804 nonblocking
>[   13.969258] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000084006804
>[   13.969310] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000084006804
>[   13.972656] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   13.972738] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b2214e31
>[   13.972787] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 00000000b2214e31
>[   13.972828] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000097e9ecd5 state to 00000000b2214e31
>[   13.972866] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000097e9ecd5
>[   13.972904] [drm:drm_atomic_check_only [drm]] checking 00000000b2214e31
>[   13.973033] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   13.973128] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   13.973190] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b2214e31 nonblocking
>[   14.002590] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b2214e31
>[   14.002641] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b2214e31
>[   14.313616] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   14.313653] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000072175bf
>[   14.313671] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000e5cf80f state to 00000000072175bf
>[   14.313685] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004d7dcd19 state to 00000000072175bf
>[   14.313699] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004d7dcd19
>[   14.313712] [drm:drm_atomic_check_only [drm]] checking 00000000072175bf
>[   14.313767] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   14.313799] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   14.313824] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000072175bf nonblocking
>[   14.335940] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000072175bf
>[   14.335980] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000072175bf
>[   17.864793] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   17.864826] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000dd510ab6
>[   17.864845] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007e619fdd state to 00000000dd510ab6
>[   17.864859] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 00000000dd510ab6
>[   17.864872] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000006566c198
>[   17.864885] [drm:drm_atomic_check_only [drm]] checking 00000000dd510ab6
>[   17.864938] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   17.864969] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   17.864994] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000dd510ab6 nonblocking
>[   17.902567] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000dd510ab6
>[   17.902596] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000dd510ab6
>[   17.940251] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   17.940288] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000002e4b0125
>[   17.940306] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000678eb02c state to 000000002e4b0125
>[   17.940334] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 000000002e4b0125
>[   17.940348] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[   17.940361] [drm:drm_atomic_check_only [drm]] checking 000000002e4b0125
>[   17.940416] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   17.940448] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   17.940473] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000002e4b0125 nonblocking
>[   17.969097] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000002e4b0125
>[   17.969117] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000002e4b0125
>[   17.984083] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   17.984133] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   17.984151] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084006804 state to 000000008c44388a
>[   17.984166] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000033c0dc14 state to 000000008c44388a
>[   17.984180] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000033c0dc14
>[   17.984193] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   17.984248] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   17.984280] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   17.984305] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   18.035915] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   18.035951] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   18.056809] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   18.056844] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008c44388a
>[   18.056862] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000024e84cbd state to 000000008c44388a
>[   18.056876] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005cd3a16e state to 000000008c44388a
>[   18.056888] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000005cd3a16e
>[   18.056901] [drm:drm_atomic_check_only [drm]] checking 000000008c44388a
>[   18.056976] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   18.057022] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.057048] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008c44388a nonblocking
>[   18.102594] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008c44388a
>[   18.102641] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008c44388a
>[   18.107871] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   18.107936] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b2214e31
>[   18.107972] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008c44388a state to 00000000b2214e31
>[   18.108003] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007505d20e state to 00000000b2214e31
>[   18.108032] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000007505d20e
>[   18.108059] [drm:drm_atomic_check_only [drm]] checking 00000000b2214e31
>[   18.108161] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   18.108231] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.108279] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b2214e31 nonblocking
>[   18.135940] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b2214e31
>[   18.135975] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b2214e31
>[   18.139939] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   18.139998] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000084006804
>[   18.140033] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b2214e31 state to 0000000084006804
>[   18.140063] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dfc45cc7 state to 0000000084006804
>[   18.140090] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000dfc45cc7
>[   18.140117] [drm:drm_atomic_check_only [drm]] checking 0000000084006804
>[   18.140216] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   18.140282] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.140330] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000084006804 nonblocking
>[   18.169176] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000084006804
>[   18.169222] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000084006804
>[   18.173581] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   18.173663] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000e5cf80f
>[   18.173713] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000018d16e27 state to 000000000e5cf80f
>[   18.173754] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004d7dcd19 state to 000000000e5cf80f
>[   18.173793] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000004d7dcd19
>[   18.173831] [drm:drm_atomic_check_only [drm]] checking 000000000e5cf80f
>[   18.173962] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   18.174058] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.174123] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000e5cf80f nonblocking
>[   18.202576] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000e5cf80f
>[   18.202627] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000e5cf80f
>[   18.212224] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   18.212261] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fdb7cce9
>[   18.212279] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000002a1d7206 state to 00000000fdb7cce9
>[   18.212293] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c62a2c38 state to 00000000fdb7cce9
>[   18.212306] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000c62a2c38
>[   18.212320] [drm:drm_atomic_check_only [drm]] checking 00000000fdb7cce9
>[   18.212374] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   18.212407] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.212433] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fdb7cce9 nonblocking
>[   18.235892] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fdb7cce9
>[   18.235925] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fdb7cce9
>[   18.238867] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   18.238921] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009ff8b1cf
>[   18.238950] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c0a2ce15 state to 000000009ff8b1cf
>[   18.238976] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000cfc07088 state to 000000009ff8b1cf
>[   18.239001] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000cfc07088
>[   18.239025] [drm:drm_atomic_check_only [drm]] checking 000000009ff8b1cf
>[   18.239121] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   18.239180] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.239220] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009ff8b1cf nonblocking
>[   18.269243] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009ff8b1cf
>[   18.269286] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009ff8b1cf
>[   18.312637] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   18.312723] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000d94ab43
>[   18.312773] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006bde2cc3 state to 000000000d94ab43
>[   18.312815] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000048a7d734 state to 000000000d94ab43
>[   18.312856] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000048a7d734
>[   18.312894] [drm:drm_atomic_check_only [drm]] checking 000000000d94ab43
>[   18.313026] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   18.313122] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.313186] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000d94ab43 nonblocking
>[   18.335900] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000d94ab43
>[   18.335938] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000d94ab43
>[   18.897250] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   18.897300] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008bfa6367
>[   18.897318] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000d94ab43 state to 000000008bfa6367
>[   18.897333] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000052131e14 state to 000000008bfa6367
>[   18.897346] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 0000000052131e14
>[   18.897359] [drm:drm_atomic_check_only [drm]] checking 000000008bfa6367
>[   18.897414] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   18.897446] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   18.897471] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008bfa6367 nonblocking
>[   18.935936] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008bfa6367
>[   18.935977] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008bfa6367
>[   19.006455] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   19.006542] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000007db8590
>[   19.006588] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000042c20b1a state to 0000000007db8590
>[   19.006626] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a18042c1 state to 0000000007db8590
>[   19.006662] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a18042c1
>[   19.006697] [drm:drm_atomic_check_only [drm]] checking 0000000007db8590
>[   19.006814] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   19.006899] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.006958] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000007db8590 nonblocking
>[   19.035914] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000007db8590
>[   19.035956] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000007db8590
>[   19.172868] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   19.172929] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003f07d3d5
>[   19.172963] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000007db8590 state to 000000003f07d3d5
>[   19.172992] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006f52d46f state to 000000003f07d3d5
>[   19.173024] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000006f52d46f
>[   19.173050] [drm:drm_atomic_check_only [drm]] checking 000000003f07d3d5
>[   19.173141] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   19.173206] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.173250] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003f07d3d5 nonblocking
>[   19.235918] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003f07d3d5
>[   19.235965] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003f07d3d5
>[   19.251488] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   19.251527] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000023378cff
>[   19.251546] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000077d7a3ec state to 0000000023378cff
>[   19.251562] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004c0bf662 state to 0000000023378cff
>[   19.251577] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004c0bf662
>[   19.251591] [drm:drm_atomic_check_only [drm]] checking 0000000023378cff
>[   19.251649] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   19.251688] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.251716] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000023378cff nonblocking
>[   19.302566] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000023378cff
>[   19.302609] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000023378cff
>[   19.469794] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   19.469868] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b3c3ca1a
>[   19.469890] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004658bc03 state to 00000000b3c3ca1a
>[   19.469914] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009325c257 state to 00000000b3c3ca1a
>[   19.469931] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000009325c257
>[   19.469948] [drm:drm_atomic_check_only [drm]] checking 00000000b3c3ca1a
>[   19.470015] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   19.470063] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.470097] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b3c3ca1a nonblocking
>[   19.502533] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b3c3ca1a
>[   19.502569] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b3c3ca1a
>[   19.572504] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   19.572582] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000dff05da2
>[   19.572638] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b3c3ca1a state to 00000000dff05da2
>[   19.572677] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e624dfeb state to 00000000dff05da2
>[   19.572713] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e624dfeb
>[   19.572748] [drm:drm_atomic_check_only [drm]] checking 00000000dff05da2
>[   19.572870] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   19.572955] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.573013] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000dff05da2 nonblocking
>[   19.602620] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000dff05da2
>[   19.602657] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000dff05da2
>[   19.638146] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   19.638225] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000077d7a3ec
>[   19.638270] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000023378cff state to 0000000077d7a3ec
>[   19.638318] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009325c257 state to 0000000077d7a3ec
>[   19.638354] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000009325c257
>[   19.638389] [drm:drm_atomic_check_only [drm]] checking 0000000077d7a3ec
>[   19.638506] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   19.638597] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.638656] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000077d7a3ec nonblocking
>[   19.669279] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000077d7a3ec
>[   19.669326] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000077d7a3ec
>[   19.807065] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   19.807152] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000007db8590
>[   19.807203] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003f07d3d5 state to 0000000007db8590
>[   19.807260] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004c0bf662 state to 0000000007db8590
>[   19.807301] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004c0bf662
>[   19.807339] [drm:drm_atomic_check_only [drm]] checking 0000000007db8590
>[   19.807469] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   19.807572] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.807636] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000007db8590 nonblocking
>[   19.835922] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000007db8590
>[   19.835958] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000007db8590
>[   19.960672] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   19.960710] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000042c20b1a
>[   19.960729] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000007db8590 state to 0000000042c20b1a
>[   19.960744] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006f52d46f state to 0000000042c20b1a
>[   19.960758] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000006f52d46f
>[   19.960772] [drm:drm_atomic_check_only [drm]] checking 0000000042c20b1a
>[   19.960828] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   19.960862] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.960888] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000042c20b1a nonblocking
>[   19.969058] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000042c20b1a
>[   19.969077] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000023378cff
>[   19.969090] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000042c20b1a
>[   19.969110] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000023378cff
>[   19.969123] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000023378cff
>[   19.985384] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   19.985425] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000678eb02c
>[   19.985446] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000002e4b0125 state to 00000000678eb02c
>[   19.985464] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 00000000678eb02c
>[   19.985480] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[   19.985496] [drm:drm_atomic_check_only [drm]] checking 00000000678eb02c
>[   19.985558] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   19.985597] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   19.985626] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000678eb02c nonblocking
>[   20.002410] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000678eb02c
>[   20.002430] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000678eb02c
>[   20.095664] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   20.095701] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000010d38740
>[   20.095720] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000256d013e state to 0000000010d38740
>[   20.095734] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b6980ee2 state to 0000000010d38740
>[   20.095747] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000b6980ee2
>[   20.095779] [drm:drm_atomic_check_only [drm]] checking 0000000010d38740
>[   20.095837] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   20.095873] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   20.095900] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000010d38740 nonblocking
>[   20.135918] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000010d38740
>[   20.135955] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000010d38740
>[   20.138552] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   20.138585] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca19f8c4
>[   20.138602] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000aa46424f state to 00000000ca19f8c4
>[   20.138615] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 00000000ca19f8c4
>[   20.138628] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000014a4f987
>[   20.138641] [drm:drm_atomic_check_only [drm]] checking 00000000ca19f8c4
>[   20.138694] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   20.138746] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   20.138770] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca19f8c4 nonblocking
>[   20.169226] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca19f8c4
>[   20.169252] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca19f8c4
>[   20.171676] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   20.171725] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca19f8c4
>[   20.171753] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000256d013e state to 00000000ca19f8c4
>[   20.171817] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b6980ee2 state to 00000000ca19f8c4
>[   20.171839] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000b6980ee2
>[   20.171861] [drm:drm_atomic_check_only [drm]] checking 00000000ca19f8c4
>[   20.171953] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   20.172004] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   20.172047] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca19f8c4 nonblocking
>[   20.202555] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca19f8c4
>[   20.202598] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca19f8c4
>[   20.208706] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   20.208755] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca19f8c4
>[   20.208783] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000aa46424f state to 00000000ca19f8c4
>[   20.208806] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 00000000ca19f8c4
>[   20.208828] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[   20.208848] [drm:drm_atomic_check_only [drm]] checking 00000000ca19f8c4
>[   20.208944] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   20.209066] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   20.209119] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca19f8c4 nonblocking
>[   20.235944] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca19f8c4
>[   20.235981] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca19f8c4
>[   20.240531] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   20.240615] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca19f8c4
>[   20.240651] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000256d013e state to 00000000ca19f8c4
>[   20.240681] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 00000000ca19f8c4
>[   20.240710] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 00000000c4a0afbe
>[   20.240738] [drm:drm_atomic_check_only [drm]] checking 00000000ca19f8c4
>[   20.240841] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   20.240911] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   20.240960] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca19f8c4 nonblocking
>[   20.269228] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca19f8c4
>[   20.269255] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca19f8c4
>[   20.272521] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   20.272579] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca19f8c4
>[   20.272605] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000aa46424f state to 00000000ca19f8c4
>[   20.272625] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000ca19f8c4
>[   20.272645] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[   20.272664] [drm:drm_atomic_check_only [drm]] checking 00000000ca19f8c4
>[   20.272742] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   20.272790] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   20.272825] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca19f8c4 nonblocking
>[   20.302488] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca19f8c4
>[   20.302534] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca19f8c4
>[   20.306083] [drm:drm_mode_addfb2 [drm]] [FB:153]
>[   20.306165] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca19f8c4
>[   20.306213] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000256d013e state to 00000000ca19f8c4
>[   20.306254] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 00000000ca19f8c4
>[   20.306292] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:153] for [PLANE:28:plane 1A] state 000000006566c198
>[   20.306329] [drm:drm_atomic_check_only [drm]] checking 00000000ca19f8c4
>[   20.306463] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 153
>[   20.306557] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   20.306620] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca19f8c4 nonblocking
>[   20.335918] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca19f8c4
>[   20.335963] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca19f8c4
>[   20.420595] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   20.447220] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   20.447282] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   20.476274] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   20.477027] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   20.477832] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   20.477864] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[   20.477886] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   20.477912] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   20.477934] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   20.477969] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[   20.477991] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[   20.478010] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[   20.478030] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   20.478050] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   20.479283] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   20.479307] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[   20.479330] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479351] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479372] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   20.479393] [drm:drm_mode_debug_printmodeline [drm]] Modeline 211:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479415] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479436] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   20.479457] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.479478] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.479499] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.479520] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479541] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479562] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   20.479583] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479604] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.479625] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   20.479646] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   20.479667] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.479688] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.479709] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.479730] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.479751] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.479826] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.479852] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   20.479877] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   20.479906] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   20.479933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   20.479957] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   20.479983] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.480007] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.480032] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   20.480058] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   20.480087] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   20.480110] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   20.480135] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   20.480159] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   20.480185] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   20.480213] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   20.480237] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[   20.480261] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[   20.480287] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   20.480314] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   20.480338] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   20.480362] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   20.480388] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   20.480416] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   20.480440] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   20.480462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   20.480484] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   20.480508] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   20.480530] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   20.480551] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   20.480573] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   20.480595] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   20.480619] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   20.480641] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   20.480663] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   20.480685] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   20.480712] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   20.480736] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   20.480762] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   20.480790] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   20.480814] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   20.480840] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   20.481213] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   20.481271] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   20.481321] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   20.481611] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   20.481660] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   20.481709] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   20.481723] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   20.481950] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000aa46424f
>[   20.481977] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 00000000bd1f8063 state to 00000000aa46424f
>[   20.482004] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000091a795e state to 00000000aa46424f
>[   20.482026] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 00000000bd1f8063 to [NOCRTC]
>[   20.482048] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 00000000bd1f8063
>[   20.482070] [drm:drm_atomic_check_only [drm]] checking 00000000aa46424f
>[   20.482134] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb -1
>[   20.482188] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[   20.482226] [drm:drm_atomic_commit [drm]] committing 00000000aa46424f
>[   20.482310] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000aa46424f
>[   20.482335] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000aa46424f
>[   20.482385] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ae4ddcf9
>[   20.482408] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:72:cursor B] 00000000918b8590 state to 00000000ae4ddcf9
>[   20.482429] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:72:cursor B] state 00000000918b8590
>[   20.482452] [drm:drm_atomic_check_only [drm]] checking 00000000ae4ddcf9
>[   20.482473] [drm:drm_atomic_commit [drm]] committing 00000000ae4ddcf9
>[   20.482511] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ae4ddcf9
>[   20.482535] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ae4ddcf9
>[   20.482580] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ae4ddcf9
>[   20.482602] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:96:cursor C] 00000000aac0c4c4 state to 00000000ae4ddcf9
>[   20.482625] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:96:cursor C] state 00000000aac0c4c4
>[   20.482645] [drm:drm_atomic_check_only [drm]] checking 00000000ae4ddcf9
>[   20.482666] [drm:drm_atomic_commit [drm]] committing 00000000ae4ddcf9
>[   20.482704] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ae4ddcf9
>[   20.482725] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ae4ddcf9
>[   20.482760] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   20.482819] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   20.511067] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   20.511814] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   20.512632] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   20.512666] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[   20.512689] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   20.512717] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   20.512740] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   20.512772] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[   20.512795] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[   20.512816] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[   20.512838] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   20.512859] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   20.514161] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   20.514188] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[   20.514212] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514235] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514258] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   20.514281] [drm:drm_mode_debug_printmodeline [drm]] Modeline 211:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514303] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514326] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   20.514349] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.514372] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.514394] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.514417] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514440] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   20.514485] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514508] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   20.514530] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   20.514553] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   20.514575] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.514598] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.514621] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   20.514643] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.514666] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.514689] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.514711] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   20.514734] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   20.514757] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   20.514780] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   20.514802] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   20.514825] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.514848] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   20.514871] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   20.514893] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   20.514916] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   20.514938] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   20.514961] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   20.514984] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   20.515007] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   20.515029] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   20.515052] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[   20.515075] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[   20.515098] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   20.515120] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   20.515143] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   20.515166] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   20.515188] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   20.515211] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   20.515234] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   20.515256] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   20.515279] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   20.515302] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   20.515324] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   20.515347] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   20.515370] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   20.515392] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   20.515415] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   20.515437] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   20.515460] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   20.515483] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   20.515505] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   20.515528] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   20.515551] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   20.515573] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   20.515596] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   20.515618] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   20.520467] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   20.520523] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   20.520567] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   20.520845] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   20.520887] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   20.520928] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   20.520940] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   20.640024] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ae4ddcf9
>[   20.640045] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000002543b440 state to 00000000ae4ddcf9
>[   20.640062] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fa30d783 state to 00000000ae4ddcf9
>[   20.640076] [drm:drm_atomic_check_only [drm]] checking 00000000ae4ddcf9
>[   20.640092] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   20.640100] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   20.640126] [drm:drm_atomic_commit [drm]] committing 00000000ae4ddcf9
>[   20.669240] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ae4ddcf9
>[   20.669271] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ae4ddcf9
>[   20.669344] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ae4ddcf9
>[   20.669366] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ae4ddcf9
>[   20.669386] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ae4ddcf9
>[   20.669428] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ae4ddcf9
>[   20.669457] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 0000000093676f8a state to 00000000ae4ddcf9
>[   20.669481] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000091a795e state to 00000000ae4ddcf9
>[   20.669502] [drm:drm_atomic_check_only [drm]] checking 00000000ae4ddcf9
>[   20.669524] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   20.669537] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   20.669574] [drm:drm_atomic_commit [drm]] committing 00000000ae4ddcf9
>[   20.702578] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ae4ddcf9
>[   20.702619] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ae4ddcf9
>[   20.702715] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ae4ddcf9
>[   20.702754] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000002543b440 state to 00000000ae4ddcf9
>[   20.702789] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fa30d783 state to 00000000ae4ddcf9
>[   20.702821] [drm:drm_atomic_check_only [drm]] checking 00000000ae4ddcf9
>[   20.702849] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   20.702867] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   20.702917] [drm:drm_atomic_commit [drm]] committing 00000000ae4ddcf9
>[   20.735795] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ae4ddcf9
>[   20.735869] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ae4ddcf9
>[   20.736025] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ae4ddcf9
>[   20.736042] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 0000000093676f8a state to 00000000ae4ddcf9
>[   20.736057] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000091a795e state to 00000000ae4ddcf9
>[   20.736070] [drm:drm_atomic_check_only [drm]] checking 00000000ae4ddcf9
>[   20.736087] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   20.736095] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   20.736120] [drm:drm_atomic_commit [drm]] committing 00000000ae4ddcf9
>[   20.769113] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ebd7e1ee
>[   20.769132] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 0000000095c5f38c state to 00000000ebd7e1ee
>[   20.769149] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ef797f8 state to 00000000ebd7e1ee
>[   20.769162] [drm:drm_atomic_check_only [drm]] checking 00000000ebd7e1ee
>[   20.769177] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   20.769185] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   20.769210] [drm:drm_atomic_commit [drm]] committing 00000000ebd7e1ee
>[   20.769247] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ae4ddcf9
>[   20.769261] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ae4ddcf9
>[   20.802466] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004b1b241b
>[   20.802488] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000807634aa state to 000000004b1b241b
>[   20.802505] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000084a144c4 state to 000000004b1b241b
>[   20.802519] [drm:drm_atomic_check_only [drm]] checking 000000004b1b241b
>[   20.802535] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   20.802543] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   20.802569] [drm:drm_atomic_commit [drm]] committing 000000004b1b241b
>[   20.802608] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ebd7e1ee
>[   20.802624] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ebd7e1ee
>[   20.835909] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004b1b241b
>[   20.835928] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004b1b241b
>[   20.836043] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004b1b241b
>[   20.836059] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:108:DP-1] 0000000095c5f38c state to 000000004b1b241b
>[   20.836072] [drm:drm_atomic_check_only [drm]] checking 000000004b1b241b
>[   20.836084] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:108:DP-1]
>[   20.836091] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:108:DP-1]
>[   20.836105] [drm:drm_atomic_commit [drm]] committing 000000004b1b241b
>[   20.836128] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004b1b241b
>[   20.836140] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004b1b241b
>[   20.836163] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004b1b241b
>[   20.836175] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004b1b241b
>[   20.836185] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004b1b241b
>[   20.836211] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004b1b241b
>[   20.836224] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:108:DP-1] 0000000079fa2077 state to 000000004b1b241b
>[   20.836235] [drm:drm_atomic_check_only [drm]] checking 000000004b1b241b
>[   20.836242] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:108:DP-1]
>[   20.836248] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:108:DP-1]
>[   20.836259] [drm:drm_atomic_commit [drm]] committing 000000004b1b241b
>[   20.836277] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004b1b241b
>[   20.836289] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004b1b241b
>[   20.836313] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004b1b241b
>[   20.836325] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:108:DP-1] 0000000095c5f38c state to 000000004b1b241b
>[   20.836336] [drm:drm_atomic_check_only [drm]] checking 000000004b1b241b
>[   20.836343] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:108:DP-1]
>[   20.836349] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:108:DP-1]
>[   20.836360] [drm:drm_atomic_commit [drm]] committing 000000004b1b241b
>[   20.836378] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004b1b241b
>[   20.836389] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004b1b241b
>[   20.836411] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004b1b241b
>[   20.836424] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:108:DP-1] 0000000079fa2077 state to 000000004b1b241b
>[   20.836435] [drm:drm_atomic_check_only [drm]] checking 000000004b1b241b
>[   20.836441] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:108:DP-1]
>[   20.836447] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling [CONNECTOR:108:DP-1]
>[   20.836459] [drm:drm_atomic_commit [drm]] committing 000000004b1b241b
>[   20.836476] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004b1b241b
>[   20.836487] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004b1b241b
>[   21.005532] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000007db8590
>[   21.005554] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e0b6861a state to 0000000007db8590
>[   21.005569] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000007db8590
>[   21.005586] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000c60702af state to 0000000007db8590
>[   21.005600] [drm:drm_atomic_check_only [drm]] checking 0000000007db8590
>[   21.005615] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   21.005623] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   21.005649] [drm:drm_atomic_commit [drm]] committing 0000000007db8590
>[   21.035728] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000007db8590
>[   21.035748] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000007db8590
>[   21.036925] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000025ae9815
>[   21.036947] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000df147ef3 state to 0000000025ae9815
>[   21.036961] [drm:drm_atomic_check_only [drm]] checking 0000000025ae9815
>[   21.036987] [drm:drm_atomic_commit [drm]] committing 0000000025ae9815
>[   21.069095] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000025ae9815
>[   21.069118] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000025ae9815
>[   21.069186] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   21.069214] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[   21.069238] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[   21.069256] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000037d367d3
>[   21.069276] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000297b74c0 state to 0000000037d367d3
>[   21.069292] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007b85a83c state to 0000000037d367d3
>[   21.069309] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:51:pipe A] state 00000000297b74c0
>[   21.069325] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 000000007b85a83c
>[   21.069340] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000037d367d3
>[   21.069358] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 0000000095c5f38c state to 0000000037d367d3
>[   21.069374] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 0000000095c5f38c to [NOCRTC]
>[   21.069389] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 0000000095c5f38c to [CRTC:51:pipe A]
>[   21.069406] [drm:drm_atomic_check_only [drm]] checking 0000000037d367d3
>[   21.069422] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   21.069432] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   21.069493] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   21.069533] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   21.069559] [drm:drm_atomic_commit [drm]] committing 0000000037d367d3
>[   21.102453] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000037d367d3
>[   21.102489] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000037d367d3
>[   21.102566] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000037d367d3
>[   21.102594] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000001de32a5 state to 0000000037d367d3
>[   21.102616] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000037d367d3
>[   21.102639] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000b7fc6e48 state to 0000000037d367d3
>[   21.102661] [drm:drm_atomic_check_only [drm]] checking 0000000037d367d3
>[   21.102682] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   21.102695] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   21.102730] [drm:drm_atomic_commit [drm]] committing 0000000037d367d3
>[   21.135759] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000037d367d3
>[   21.135783] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000037d367d3
>[   21.135815] [drm:drm_mode_setcrtc [drm]] [CRTC:75:pipe B]
>[   21.135834] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000037d367d3
>[   21.135849] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000297b74c0 state to 0000000037d367d3
>[   21.135863] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:52:plane 1B] 00000000c68d754c state to 0000000037d367d3
>[   21.135875] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:75:pipe B] state 00000000297b74c0
>[   21.135887] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:52:plane 1B] state 00000000c68d754c
>[   21.135899] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:75:pipe B] to 0000000037d367d3
>[   21.135913] [drm:drm_atomic_check_only [drm]] checking 0000000037d367d3
>[   21.135933] [drm:drm_atomic_commit [drm]] committing 0000000037d367d3
>[   21.135963] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000037d367d3
>[   21.135976] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000037d367d3
>[   21.135995] [drm:drm_mode_setcrtc [drm]] [CRTC:99:pipe C]
>[   21.136009] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000037d367d3
>[   21.136022] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 00000000cf176606 state to 0000000037d367d3
>[   21.136034] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:76:plane 1C] 000000009325c257 state to 0000000037d367d3
>[   21.136046] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [NOMODE] for [CRTC:99:pipe C] state 00000000cf176606
>[   21.136057] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:76:plane 1C] state 000000009325c257
>[   21.136069] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:99:pipe C] to 0000000037d367d3
>[   21.136081] [drm:drm_atomic_check_only [drm]] checking 0000000037d367d3
>[   21.136096] [drm:drm_atomic_commit [drm]] committing 0000000037d367d3
>[   21.136119] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000037d367d3
>[   21.136131] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000037d367d3
>[   21.784249] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   21.784309] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   21.812961] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   21.813715] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   21.814515] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   21.814547] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[   21.814567] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   21.814592] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   21.814612] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   21.814644] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[   21.814664] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[   21.814683] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[   21.814701] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   21.814720] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   21.815926] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   21.815950] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[   21.815971] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   21.815991] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   21.816012] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   21.816035] [drm:drm_mode_debug_printmodeline [drm]] Modeline 211:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   21.816055] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   21.816075] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   21.816095] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   21.816117] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   21.816137] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   21.816157] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   21.816177] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   21.816199] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   21.816219] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   21.816239] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   21.816259] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   21.816281] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   21.816300] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   21.816320] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   21.816341] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   21.816362] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   21.816382] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   21.816402] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   21.816422] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   21.816442] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   21.816462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   21.816484] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   21.816504] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   21.816524] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   21.816544] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   21.816566] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   21.816586] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   21.816605] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   21.816626] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   21.816648] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   21.816668] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   21.816687] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   21.816708] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   21.816730] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[   21.816750] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[   21.816769] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   21.816790] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   21.816812] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   21.816832] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   21.816851] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   21.816872] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   21.816893] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   21.816913] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   21.816933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   21.816953] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   21.816975] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   21.816995] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   21.817015] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   21.817034] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   21.817055] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   21.817077] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   21.817096] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   21.817116] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   21.817136] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   21.817158] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   21.817178] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   21.817198] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   21.817218] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   21.817240] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   21.819299] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   21.819353] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   21.819403] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   21.819685] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   21.819731] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   21.819777] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   21.819826] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   22.047735] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[   22.047773] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[   22.047828] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[   22.047858] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[   22.047890] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
>[   22.047917] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[   22.047945] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[   22.047975] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
>[   22.048929] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[   22.048956] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[   22.048982] [drm:hsw_audio_config_update [i915]] using N 4704
>[   22.063606] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[   22.063658] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[   22.063706] [drm:hsw_audio_config_update [i915]] using N 4704
>[   22.079364] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[   22.079424] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[   22.079479] [drm:hsw_audio_config_update [i915]] using N 4704
>[   22.413630] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000535849e8
>[   22.413648] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 00000000bbb0c077 state to 00000000535849e8
>[   22.413663] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000e5cf80f state to 00000000535849e8
>[   22.413676] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 00000000bbb0c077 to [CRTC:51:pipe A]
>[   22.413689] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000bbb0c077
>[   22.413701] [drm:drm_atomic_check_only [drm]] checking 00000000535849e8
>[   22.413754] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   22.413785] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[   22.413809] [drm:drm_atomic_commit [drm]] committing 00000000535849e8
>[   22.413885] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000535849e8
>[   22.413899] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000535849e8
>[   22.413919] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000535849e8
>[   22.413932] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000003db1464c state to 00000000535849e8
>[   22.413944] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000005768f325 state to 00000000535849e8
>[   22.413956] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 000000003db1464c to [NOCRTC]
>[   22.413968] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000003db1464c
>[   22.413979] [drm:drm_atomic_check_only [drm]] checking 00000000535849e8
>[   22.414012] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb -1
>[   22.414041] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[   22.414057] [drm:drm_atomic_commit [drm]] committing 00000000535849e8
>[   22.414091] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000535849e8
>[   22.414104] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000535849e8
>[   22.414125] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000535849e8
>[   22.414138] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 00000000bbb0c077 state to 00000000535849e8
>[   22.414150] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 00000000bbb0c077
>[   22.414161] [drm:drm_atomic_check_only [drm]] checking 00000000535849e8
>[   22.414173] [drm:drm_atomic_commit [drm]] committing 00000000535849e8
>[   22.414194] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000535849e8
>[   22.414206] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000535849e8
>[   22.414227] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000535849e8
>[   22.414239] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000003db1464c state to 00000000535849e8
>[   22.414252] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000e5cf80f state to 00000000535849e8
>[   22.414263] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 000000003db1464c to [CRTC:51:pipe A]
>[   22.414275] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 000000003db1464c
>[   22.414287] [drm:drm_atomic_check_only [drm]] checking 00000000535849e8
>[   22.414319] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   22.414347] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[   22.414364] [drm:drm_atomic_commit [drm]] committing 00000000535849e8
>[   22.414397] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000535849e8
>[   22.414410] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000535849e8
>[   24.468105] rfkill: input handler disabled
>[   25.128528] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   25.128586] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   25.159628] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   25.160153] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   25.160922] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   25.160945] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[   25.160958] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   25.160975] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   25.160988] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   25.161010] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[   25.161022] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[   25.161035] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[   25.161047] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   25.161059] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   25.161793] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   25.161811] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[   25.161824] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   25.161837] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   25.161850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   25.161863] [drm:drm_mode_debug_printmodeline [drm]] Modeline 211:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   25.161875] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[   25.161888] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[   25.161901] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   25.161914] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   25.161926] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   25.161939] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   25.161951] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   25.161964] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   25.161977] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   25.161989] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   25.162002] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   25.162015] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   25.162027] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   25.162040] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   25.162053] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   25.162065] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.162078] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.162090] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.162103] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   25.162116] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   25.162129] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   25.162142] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   25.162154] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   25.162167] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.162180] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   25.162192] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   25.162205] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   25.162218] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   25.162230] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[   25.162243] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[   25.162255] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   25.162268] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[   25.162281] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[   25.162293] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[   25.162306] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[   25.162318] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[   25.162331] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   25.162343] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   25.162356] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   25.162369] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   25.162381] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[   25.162394] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[   25.162406] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[   25.162419] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[   25.162431] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[   25.162444] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[   25.162456] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[   25.162469] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   25.162481] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   25.162494] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   25.162506] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   25.162519] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   25.162531] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   25.162544] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[   25.162557] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[   25.162569] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[   25.162582] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   25.162594] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   25.162607] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[   25.172006] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   25.172056] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   25.172088] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   25.172349] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   25.172379] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   25.172407] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   25.172417] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   25.313869] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:48:cursor A] state 0000000028530330
>[   25.313925] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 154
>[   25.313958] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   25.314073] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:48:cursor A] state 000000004e793669
>[   25.314108] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 154
>[   25.314141] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   25.669726] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000084a144c4
>[   25.669748] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c7649ee7 state to 0000000084a144c4
>[   25.669763] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000084a144c4
>[   25.669779] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000fa3a2df4 state to 0000000084a144c4
>[   25.669794] [drm:drm_atomic_check_only [drm]] checking 0000000084a144c4
>[   25.669809] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   25.669817] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   25.669845] [drm:drm_atomic_commit [drm]] committing 0000000084a144c4
>[   25.702387] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000084a144c4
>[   25.702406] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000084a144c4
>[   25.780022] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b47ae5bc
>[   25.780049] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008659bb52 state to 00000000b47ae5bc
>[   25.780063] [drm:drm_atomic_check_only [drm]] checking 00000000b47ae5bc
>[   25.780095] [drm:drm_atomic_commit [drm]] committing 00000000b47ae5bc
>[   25.802417] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b47ae5bc
>[   25.802438] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b47ae5bc
>[   26.408791] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   26.408826] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eeb038e8
>[   26.408844] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000cd8f96f2 state to 00000000eeb038e8
>[   26.408858] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000013086e00 state to 00000000eeb038e8
>[   26.408872] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000013086e00
>[   26.408884] [drm:drm_atomic_check_only [drm]] checking 00000000eeb038e8
>[   26.408946] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   26.408977] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.409002] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eeb038e8 nonblocking
>[   26.435922] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b47ae5bc
>[   26.435943] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b47ae5bc
>[   26.435956] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b47ae5bc
>[   26.436093] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eeb038e8
>[   26.436111] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eeb038e8
>[   26.665805] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   26.665833] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b47ae5bc
>[   26.665850] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c7649ee7 state to 00000000b47ae5bc
>[   26.665864] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006ba62773 state to 00000000b47ae5bc
>[   26.665877] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 000000006ba62773
>[   26.665889] [drm:drm_atomic_check_only [drm]] checking 00000000b47ae5bc
>[   26.665948] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   26.665979] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.666004] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b47ae5bc nonblocking
>[   26.702410] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b47ae5bc
>[   26.702429] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b47ae5bc
>[   26.871560] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   26.871596] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000cd8f96f2
>[   26.871616] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000066b94687 state to 00000000cd8f96f2
>[   26.871631] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000013086e00 state to 00000000cd8f96f2
>[   26.871643] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000013086e00
>[   26.871657] [drm:drm_atomic_check_only [drm]] checking 00000000cd8f96f2
>[   26.871764] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   26.871923] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   26.872778] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000cd8f96f2 nonblocking
>[   26.902446] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000cd8f96f2
>[   26.902467] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000cd8f96f2
>[   27.412882] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   27.412910] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d26e3aaf
>[   27.412928] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000066ec345a state to 00000000d26e3aaf
>[   27.412945] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f665c95c state to 00000000d26e3aaf
>[   27.412957] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000f665c95c
>[   27.412970] [drm:drm_atomic_check_only [drm]] checking 00000000d26e3aaf
>[   27.413029] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   27.413060] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.413084] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d26e3aaf nonblocking
>[   27.469107] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d26e3aaf
>[   27.469128] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d26e3aaf
>[   27.482589] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 00000000ea3ad0ff
>[   27.482649] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   27.482682] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   27.488222] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 000000004e793669
>[   27.488277] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   27.488308] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.020440] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   28.020469] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a5cc3c8
>[   28.020487] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bf59b03f state to 000000000a5cc3c8
>[   28.020501] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089c27bd3 state to 000000000a5cc3c8
>[   28.020514] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000089c27bd3
>[   28.020527] [drm:drm_atomic_check_only [drm]] checking 000000000a5cc3c8
>[   28.020585] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   28.020616] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.020641] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a5cc3c8 nonblocking
>[   28.035754] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a5cc3c8
>[   28.035797] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a5cc3c8
>[   28.054251] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   28.054285] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066ec345a
>[   28.054305] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f4efea31 state to 0000000066ec345a
>[   28.054318] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f665c95c state to 0000000066ec345a
>[   28.054331] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000f665c95c
>[   28.054344] [drm:drm_atomic_check_only [drm]] checking 0000000066ec345a
>[   28.054440] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   28.054470] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.054501] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066ec345a nonblocking
>[   28.069082] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066ec345a
>[   28.069102] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066ec345a
>[   28.092022] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   28.092055] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b093a30d
>[   28.092075] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006db82d2a state to 00000000b093a30d
>[   28.092089] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ef5c7d3e state to 00000000b093a30d
>[   28.092102] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000ef5c7d3e
>[   28.092114] [drm:drm_atomic_check_only [drm]] checking 00000000b093a30d
>[   28.092210] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   28.092241] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.092270] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b093a30d nonblocking
>[   28.135767] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b093a30d
>[   28.135810] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b093a30d
>[   28.142735] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   28.142778] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000adfa4310
>[   28.142800] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 00000000adfa4310
>[   28.142814] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000034063f60 state to 00000000adfa4310
>[   28.142828] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000034063f60
>[   28.142840] [drm:drm_atomic_check_only [drm]] checking 00000000adfa4310
>[   28.142988] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   28.143019] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   28.143057] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000adfa4310 nonblocking
>[   28.169231] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000adfa4310
>[   28.169258] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000adfa4310
>[   29.193538] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   29.193571] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000079fea074
>[   29.193593] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029eabcc0 state to 0000000079fea074
>[   29.193609] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089bbe304 state to 0000000079fea074
>[   29.193625] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000089bbe304
>[   29.193640] [drm:drm_atomic_check_only [drm]] checking 0000000079fea074
>[   29.193708] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   29.193746] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   29.193776] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000079fea074 nonblocking
>[   29.235793] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000079fea074
>[   29.235832] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000079fea074
>[   29.240848] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   29.240879] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   29.240898] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 00000000fb93280e
>[   29.240912] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4788560 state to 00000000fb93280e
>[   29.240926] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000c4788560
>[   29.240939] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   29.241021] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   29.241053] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   29.241079] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   29.269191] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   29.269215] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   29.275922] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   29.275969] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c9c4230
>[   29.275993] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad8c40c state to 000000006c9c4230
>[   29.276008] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000291eb59e state to 000000006c9c4230
>[   29.276021] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000291eb59e
>[   29.276035] [drm:drm_atomic_check_only [drm]] checking 000000006c9c4230
>[   29.276224] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   29.276256] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   29.276299] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c9c4230 nonblocking
>[   29.302446] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c9c4230
>[   29.302469] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c9c4230
>[   30.252764] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 00000000493c55bd
>[   30.252815] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   30.252844] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   30.252876] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 000000006d0f5d14
>[   30.252905] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   30.252931] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   30.257030] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 00000000493c55bd
>[   30.257081] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   30.257112] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   30.257143] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 000000006d0f5d14
>[   30.257173] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   30.257201] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   30.404261] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   30.404295] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ef5bc50
>[   30.404316] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000052365cfd state to 000000006ef5bc50
>[   30.404332] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000493c55bd state to 000000006ef5bc50
>[   30.404346] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000493c55bd
>[   30.404361] [drm:drm_atomic_check_only [drm]] checking 000000006ef5bc50
>[   30.404450] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   30.404485] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   30.404514] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ef5bc50 nonblocking
>[   30.469245] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ef5bc50
>[   30.469292] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ef5bc50
>[   30.733165] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   30.733192] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029eabcc0
>[   30.733209] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000079fea074 state to 0000000029eabcc0
>[   30.733223] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089bbe304 state to 0000000029eabcc0
>[   30.733236] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000089bbe304
>[   30.733248] [drm:drm_atomic_check_only [drm]] checking 0000000029eabcc0
>[   30.733311] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   30.733341] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   30.733367] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029eabcc0 nonblocking
>[   30.769227] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029eabcc0
>[   30.769256] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029eabcc0
>[   34.612253] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   34.612282] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[   34.612302] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000005ef75675 state to 00000000b9d71aea
>[   34.612316] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005158b74d state to 00000000b9d71aea
>[   34.612329] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 000000005158b74d
>[   34.612342] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[   34.612424] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   34.612455] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   34.612482] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[   34.635742] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[   34.635798] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[   36.662145] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   36.662179] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   36.662201] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 000000006ad8c40c
>[   36.662216] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000fdf3c690 state to 000000006ad8c40c
>[   36.662229] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000fdf3c690
>[   36.662243] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   36.662383] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   36.662415] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   36.662455] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   36.736036] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   36.736068] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   37.231672] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   37.231706] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca302471
>[   37.231729] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000017698420 state to 00000000ca302471
>[   37.231745] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000048476e62 state to 00000000ca302471
>[   37.231759] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000048476e62
>[   37.231804] [drm:drm_atomic_check_only [drm]] checking 00000000ca302471
>[   37.231953] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   37.231988] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   37.232023] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca302471 nonblocking
>[   37.335842] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca302471
>[   37.335865] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca302471
>[   37.697707] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   37.697734] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[   37.697751] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000091f22cea state to 000000004f4f75dd
>[   37.697765] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000789360d9 state to 000000004f4f75dd
>[   37.697777] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000789360d9
>[   37.697790] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[   37.697866] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   37.697897] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   37.697924] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[   37.735827] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[   37.735873] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[   37.741841] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   37.741902] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   37.741945] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000be530318
>[   37.741980] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000091b24d31 state to 00000000be530318
>[   37.742014] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000091b24d31
>[   37.742046] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   37.742169] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   37.742249] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   37.742305] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   37.769224] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   37.769254] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   40.632255] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   40.632285] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[   40.632304] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ca302471 state to 00000000e08dfed9
>[   40.632317] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a968c4af state to 00000000e08dfed9
>[   40.632330] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000a968c4af
>[   40.632343] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[   40.632466] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   40.632498] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   40.632528] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[   40.669070] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[   40.669090] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[   40.742644] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   40.742672] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[   40.742691] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 000000008044e50c
>[   40.742706] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000fdf3c690 state to 000000008044e50c
>[   40.742720] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000fdf3c690
>[   40.742734] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[   40.742808] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   40.742840] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   40.742866] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[   40.802399] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[   40.802419] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[   41.732010] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   41.732037] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b2aa5aa
>[   41.732055] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000052365cfd state to 000000009b2aa5aa
>[   41.732068] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000cbf7d898 state to 000000009b2aa5aa
>[   41.732081] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000cbf7d898
>[   41.732093] [drm:drm_atomic_check_only [drm]] checking 000000009b2aa5aa
>[   41.732153] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   41.732184] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   41.732209] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b2aa5aa nonblocking
>[   41.769218] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b2aa5aa
>[   41.769246] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b2aa5aa
>[   42.112570] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   42.112598] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   42.112616] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000004ae2a29e
>[   42.112629] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000fdf3c690 state to 000000004ae2a29e
>[   42.112642] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000fdf3c690
>[   42.112654] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   42.112712] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   42.112742] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   42.112767] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   42.169064] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   42.169081] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   42.169100] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   42.169114] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   42.169127] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   42.219726] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   42.219759] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   42.219836] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000d26e3aaf state to 000000008f7d755e
>[   42.219854] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006711f9c0 state to 000000008f7d755e
>[   42.219872] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000006711f9c0
>[   42.219893] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   42.220051] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   42.220083] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   42.220118] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   42.235727] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   42.235747] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   42.255756] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   42.255815] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bd2739b0
>[   42.255834] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000bd2739b0
>[   42.255848] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000074975688 state to 00000000bd2739b0
>[   42.255861] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000074975688
>[   42.255873] [drm:drm_atomic_check_only [drm]] checking 00000000bd2739b0
>[   42.255949] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   42.255980] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   42.256010] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bd2739b0 nonblocking
>[   42.302436] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bd2739b0
>[   42.302457] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bd2739b0
>[   42.315612] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   42.315644] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca302471
>[   42.315663] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 00000000ca302471
>[   42.315676] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000053f8e025 state to 00000000ca302471
>[   42.315689] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000053f8e025
>[   42.315702] [drm:drm_atomic_check_only [drm]] checking 00000000ca302471
>[   42.315797] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   42.315865] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   42.315909] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca302471 nonblocking
>[   42.335743] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca302471
>[   42.335794] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca302471
>[   42.358122] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   42.358154] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c3291a6c
>[   42.358174] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ca302471 state to 00000000c3291a6c
>[   42.358187] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a968c4af state to 00000000c3291a6c
>[   42.358200] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000a968c4af
>[   42.358213] [drm:drm_atomic_check_only [drm]] checking 00000000c3291a6c
>[   42.358298] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   42.358328] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   42.358357] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c3291a6c nonblocking
>[   42.402458] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c3291a6c
>[   42.402480] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c3291a6c
>[   42.416289] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   42.416323] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[   42.416342] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 000000008826679a
>[   42.416355] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008f81692a state to 000000008826679a
>[   42.416369] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000008f81692a
>[   42.416381] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[   42.416466] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   42.416496] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   42.416526] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[   42.435805] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[   42.435825] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[   44.623883] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   44.623913] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   44.623931] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e08dfed9 state to 000000008f7d755e
>[   44.623944] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000034063f60 state to 000000008f7d755e
>[   44.623957] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000034063f60
>[   44.623970] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   44.624035] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   44.624065] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   44.624091] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   44.669079] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   44.669099] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   49.142386] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:48:cursor A] state 00000000fdf3c690
>[   49.142440] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 154
>[   49.142472] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.142507] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:48:cursor A] state 0000000091b24d31
>[   49.142539] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 154
>[   49.142568] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.182140] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   49.182170] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   49.182188] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 00000000fb93280e
>[   49.182202] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000fdf3c690 state to 00000000fb93280e
>[   49.182215] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000fdf3c690
>[   49.182228] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   49.182314] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   49.182345] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.182373] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   49.235781] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   49.235818] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   49.248744] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   49.248776] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   49.248795] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000091f22cea state to 000000003daeaefa
>[   49.248809] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000033c0dc14 state to 000000003daeaefa
>[   49.248821] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000033c0dc14
>[   49.248834] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   49.248910] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   49.248940] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.248970] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   49.269145] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   49.269169] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   49.404580] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 00000000e8299d76
>[   49.404658] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   49.404689] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.404723] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 0000000091b24d31
>[   49.404753] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   49.404781] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.404972] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   49.404997] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   49.405016] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 000000003daeaefa
>[   49.405029] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e8299d76 state to 000000003daeaefa
>[   49.405042] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000e8299d76
>[   49.405055] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   49.405093] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   49.405120] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.405150] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   49.435752] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   49.435782] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   49.464288] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   49.464321] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006b1c24fe
>[   49.464340] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000adacd36b state to 000000006b1c24fe
>[   49.464354] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089d30976 state to 000000006b1c24fe
>[   49.464367] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000089d30976
>[   49.464380] [drm:drm_atomic_check_only [drm]] checking 000000006b1c24fe
>[   49.464458] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   49.464488] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.464516] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006b1c24fe nonblocking
>[   49.502467] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006b1c24fe
>[   49.502488] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006b1c24fe
>[   49.507118] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   49.507149] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[   49.507168] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 0000000048cfd963
>[   49.507182] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000acba251c state to 0000000048cfd963
>[   49.507194] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000acba251c
>[   49.507207] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[   49.507288] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   49.507318] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   49.507346] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[   49.535814] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[   49.535834] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[   50.009926] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   50.009959] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000091f22cea
>[   50.009980] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 0000000091f22cea
>[   50.009995] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e8299d76 state to 0000000091f22cea
>[   50.010007] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000e8299d76
>[   50.010020] [drm:drm_atomic_check_only [drm]] checking 0000000091f22cea
>[   50.010092] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   50.010122] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   50.010151] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000091f22cea nonblocking
>[   50.035737] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000091f22cea
>[   50.035756] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000091f22cea
>[   50.570530] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   50.570561] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000062ef0e7
>[   50.570580] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 00000000062ef0e7
>[   50.570594] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e0e44823 state to 00000000062ef0e7
>[   50.570607] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000e0e44823
>[   50.570619] [drm:drm_atomic_check_only [drm]] checking 00000000062ef0e7
>[   50.570698] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   50.570728] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   50.570755] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000062ef0e7 nonblocking
>[   50.602444] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000062ef0e7
>[   50.602465] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000062ef0e7
>[   50.607199] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   50.607227] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007eb444d1
>[   50.607245] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000052365cfd state to 000000007eb444d1
>[   50.607260] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005c4ed722 state to 000000007eb444d1
>[   50.607273] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 000000005c4ed722
>[   50.607286] [drm:drm_atomic_check_only [drm]] checking 000000007eb444d1
>[   50.607368] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   50.607398] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   50.607428] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007eb444d1 nonblocking
>[   50.635817] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007eb444d1
>[   50.635837] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007eb444d1
>[   50.825399] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   50.825428] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ef5bc50
>[   50.825445] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000062ef0e7 state to 000000006ef5bc50
>[   50.825459] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006d0f5d14 state to 000000006ef5bc50
>[   50.825472] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000006d0f5d14
>[   50.825485] [drm:drm_atomic_check_only [drm]] checking 000000006ef5bc50
>[   50.825540] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   50.825571] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   50.825596] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ef5bc50 nonblocking
>[   50.835748] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ef5bc50
>[   50.835792] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ef5bc50
>[   50.941417] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   50.941449] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[   50.941467] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000079fea074 state to 00000000b9d71aea
>[   50.941481] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000acba251c state to 00000000b9d71aea
>[   50.941494] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000acba251c
>[   50.941506] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[   50.941566] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   50.941597] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   50.941621] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[   50.969175] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[   50.969200] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[   51.141519] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   51.141548] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000062ef0e7
>[   51.141565] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 00000000062ef0e7
>[   51.141579] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e4c4ae81 state to 00000000062ef0e7
>[   51.141592] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000e4c4ae81
>[   51.141604] [drm:drm_atomic_check_only [drm]] checking 00000000062ef0e7
>[   51.141661] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   51.141691] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   51.141715] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000062ef0e7 nonblocking
>[   51.169107] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000062ef0e7
>[   51.169127] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000062ef0e7
>[   51.363653] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   51.363681] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[   51.363699] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 00000000f281e966
>[   51.363712] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000fdf3c690 state to 00000000f281e966
>[   51.363725] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000fdf3c690
>[   51.363738] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[   51.363805] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   51.363855] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   51.363884] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[   51.402455] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[   51.402474] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[   51.408054] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   51.408085] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[   51.408104] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 00000000f281e966
>[   51.408119] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a101883d state to 00000000f281e966
>[   51.408132] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000a101883d
>[   51.408144] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[   51.408227] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   51.408257] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   51.408286] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[   51.435822] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[   51.435841] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[   51.443658] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   51.443692] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000079fea074
>[   51.443711] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000079fea074
>[   51.443725] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000acba251c state to 0000000079fea074
>[   51.443738] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000acba251c
>[   51.443751] [drm:drm_atomic_check_only [drm]] checking 0000000079fea074
>[   51.443904] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   51.443944] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   51.444000] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000079fea074 nonblocking
>[   51.469135] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000079fea074
>[   51.469154] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000079fea074
>[   51.476163] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   51.476194] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029eabcc0
>[   51.476214] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000099a3cb14 state to 0000000029eabcc0
>[   51.476228] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089d30976 state to 0000000029eabcc0
>[   51.476240] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000089d30976
>[   51.476253] [drm:drm_atomic_check_only [drm]] checking 0000000029eabcc0
>[   51.476333] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   51.476363] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   51.476392] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029eabcc0 nonblocking
>[   51.502478] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029eabcc0
>[   51.502499] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029eabcc0
>[   51.516097] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   51.516129] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029eabcc0
>[   51.516149] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000029eabcc0
>[   51.516163] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000067899db5 state to 0000000029eabcc0
>[   51.516176] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 0000000067899db5
>[   51.516188] [drm:drm_atomic_check_only [drm]] checking 0000000029eabcc0
>[   51.516272] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   51.516303] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   51.516333] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029eabcc0 nonblocking
>[   51.535820] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029eabcc0
>[   51.535840] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029eabcc0
>[   53.700820] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:48:cursor A] state 0000000046d73fba
>[   53.700875] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 154
>[   53.700905] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.700939] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:48:cursor A] state 000000003523b522
>[   53.700970] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 154
>[   53.700997] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.736642] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   53.736670] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[   53.736688] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008044e50c state to 00000000565de791
>[   53.736702] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 00000000565de791
>[   53.736715] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   53.736727] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[   53.736789] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   53.736819] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.736845] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[   53.802414] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[   53.802434] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[   53.878902] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 0000000048476e62
>[   53.878955] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   53.878986] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.879019] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 00000000a968c4af
>[   53.879049] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   53.879077] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.886410] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   53.886442] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[   53.886461] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000017698420 state to 000000008826679a
>[   53.886474] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000048476e62 state to 000000008826679a
>[   53.886488] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000048476e62
>[   53.886500] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[   53.886581] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   53.886611] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.886639] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[   53.902397] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[   53.902417] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[   53.921293] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   53.921325] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d26e3aaf
>[   53.921345] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e08dfed9 state to 00000000d26e3aaf
>[   53.921359] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006711f9c0 state to 00000000d26e3aaf
>[   53.921372] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000006711f9c0
>[   53.921384] [drm:drm_atomic_check_only [drm]] checking 00000000d26e3aaf
>[   53.921464] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   53.921495] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.921524] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d26e3aaf nonblocking
>[   53.969113] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d26e3aaf
>[   53.969137] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d26e3aaf
>[   53.984228] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   53.984264] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   53.984284] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 000000008f7d755e
>[   53.984297] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000048476e62 state to 000000008f7d755e
>[   53.984311] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000048476e62
>[   53.984323] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   53.984410] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   53.984441] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   53.984471] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   54.002407] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   54.002427] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   54.009809] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   54.009844] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   54.009864] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e08dfed9 state to 000000008f7d755e
>[   54.009878] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000034063f60 state to 000000008f7d755e
>[   54.009891] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000034063f60
>[   54.009904] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   54.009993] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   54.010024] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   54.010053] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   54.035814] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   54.035834] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   54.484575] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   54.484609] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d26e3aaf
>[   54.484628] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000017698420 state to 00000000d26e3aaf
>[   54.484642] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f665c95c state to 00000000d26e3aaf
>[   54.484655] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000f665c95c
>[   54.484667] [drm:drm_atomic_check_only [drm]] checking 00000000d26e3aaf
>[   54.484754] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   54.484785] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   54.484810] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d26e3aaf nonblocking
>[   54.502400] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d26e3aaf
>[   54.502420] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d26e3aaf
>[   54.609649] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   54.609680] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   54.609698] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000091f22cea state to 000000004ae2a29e
>[   54.609713] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 000000004ae2a29e
>[   54.609725] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000018fab058
>[   54.609738] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   54.609811] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   54.609841] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   54.609869] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   54.669102] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   54.669122] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   54.673341] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   54.673373] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e6799f7c
>[   54.673393] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000e6799f7c
>[   54.673406] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 00000000e6799f7c
>[   54.673419] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000009376deb8
>[   54.673432] [drm:drm_atomic_check_only [drm]] checking 00000000e6799f7c
>[   54.673493] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   54.673523] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   54.673552] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e6799f7c nonblocking
>[   54.702411] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e6799f7c
>[   54.702432] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e6799f7c
>[   54.874327] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   54.874355] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[   54.874373] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 0000000017698420
>[   54.874387] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f057f9d state to 0000000017698420
>[   54.874399] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000003f057f9d
>[   54.874412] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[   54.874476] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   54.874507] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   54.874532] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[   54.902422] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[   54.902442] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[   54.943873] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   54.943902] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[   54.943920] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000d26e3aaf state to 0000000017698420
>[   54.943934] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000034063f60 state to 0000000017698420
>[   54.943946] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000034063f60
>[   54.943959] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[   54.944018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   54.944049] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   54.944073] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[   54.969233] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[   54.969264] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[   55.078442] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   55.078474] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000062ef0e7
>[   55.078494] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000dff05046 state to 00000000062ef0e7
>[   55.078509] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000493c55bd state to 00000000062ef0e7
>[   55.078524] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000493c55bd
>[   55.078538] [drm:drm_atomic_check_only [drm]] checking 00000000062ef0e7
>[   55.078598] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   55.078634] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   55.078662] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000062ef0e7 nonblocking
>[   55.102403] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000062ef0e7
>[   55.102426] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000062ef0e7
>[   55.248270] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   55.248299] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[   55.248317] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 0000000017698420
>[   55.248331] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000048476e62 state to 0000000017698420
>[   55.248344] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000048476e62
>[   55.248356] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[   55.248413] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   55.248445] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   55.248469] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[   55.302408] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[   55.302428] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[   55.307469] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   55.307501] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d26e3aaf
>[   55.307520] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 00000000d26e3aaf
>[   55.307534] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e983b907 state to 00000000d26e3aaf
>[   55.307547] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e983b907
>[   55.307559] [drm:drm_atomic_check_only [drm]] checking 00000000d26e3aaf
>[   55.307636] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   55.307666] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   55.307695] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d26e3aaf nonblocking
>[   55.335757] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d26e3aaf
>[   55.335784] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d26e3aaf
>[   55.343351] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   55.343382] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c3291a6c
>[   55.343402] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ca302471 state to 00000000c3291a6c
>[   55.343416] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008f81692a state to 00000000c3291a6c
>[   55.343429] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000008f81692a
>[   55.343441] [drm:drm_atomic_check_only [drm]] checking 00000000c3291a6c
>[   55.343522] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   55.343552] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   55.343581] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c3291a6c nonblocking
>[   55.369088] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c3291a6c
>[   55.369108] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c3291a6c
>[   55.375617] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   55.375650] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   55.375668] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 000000008f7d755e
>[   55.375681] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000074975688 state to 000000008f7d755e
>[   55.375694] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000074975688
>[   55.375707] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   55.375787] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   55.375872] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   55.375906] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   55.402486] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   55.402508] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   55.414987] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   55.415020] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   55.415040] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ca302471 state to 000000008f7d755e
>[   55.415054] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004fa621ed state to 000000008f7d755e
>[   55.415066] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000004fa621ed
>[   55.415079] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   55.415156] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   55.415186] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   55.415215] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   55.435739] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   55.435759] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   56.444183] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 000000009376deb8
>[   56.444236] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   56.444267] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.444301] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 00000000c44b407c
>[   56.444332] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   56.444360] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.479393] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   56.479425] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   56.479445] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 000000006ad8c40c
>[   56.479459] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 000000006ad8c40c
>[   56.479472] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 000000009376deb8
>[   56.479485] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   56.479553] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   56.479584] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.479610] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   56.502410] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   56.502429] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   56.507864] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   56.507895] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   56.507914] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008044e50c state to 000000004ae2a29e
>[   56.507928] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f4d86dda state to 000000004ae2a29e
>[   56.507941] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000f4d86dda
>[   56.507953] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   56.508028] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   56.508059] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.508086] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   56.535768] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   56.535796] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   56.619328] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 00000000bba3b3ca
>[   56.619398] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   56.619429] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.619461] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 00000000c44b407c
>[   56.619491] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   56.619519] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.619687] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   56.619713] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   56.619730] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f281e966 state to 00000000be530318
>[   56.619744] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000bba3b3ca state to 00000000be530318
>[   56.619756] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000bba3b3ca
>[   56.619807] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   56.619848] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   56.619877] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.620915] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   56.669231] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   56.669274] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   56.693742] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   56.693772] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[   56.693791] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 0000000086e088c8
>[   56.693805] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f4d86dda state to 0000000086e088c8
>[   56.693817] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000f4d86dda
>[   56.693830] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[   56.693900] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   56.693930] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.693958] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[   56.735918] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[   56.735955] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[   56.753683] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   56.753720] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[   56.753743] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 000000008044e50c
>[   56.753760] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 000000008044e50c
>[   56.753776] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000009376deb8
>[   56.753791] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[   56.753872] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   56.753908] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.753938] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[   56.769167] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[   56.769196] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[   56.777975] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   56.778022] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   56.778051] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 00000000fb93280e
>[   56.778072] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000fb93280e
>[   56.778092] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000018fab058
>[   56.778112] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   56.778198] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   56.778247] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   56.778283] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   56.802571] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   56.802604] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   57.217718] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   57.217768] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   57.217801] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad8c40c state to 000000003daeaefa
>[   57.217828] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000003daeaefa
>[   57.217853] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   57.217878] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   57.217973] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   57.218035] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   57.218079] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   57.235915] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   57.235953] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   57.723650] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   57.723723] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000052365cfd
>[   57.723772] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000dff05046 state to 0000000052365cfd
>[   57.723849] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e4c4ae81 state to 0000000052365cfd
>[   57.723896] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000e4c4ae81
>[   57.723940] [drm:drm_atomic_check_only [drm]] checking 0000000052365cfd
>[   57.724092] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   57.724186] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   57.724252] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000052365cfd nonblocking
>[   57.769275] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000052365cfd
>[   57.769316] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000052365cfd
>[   57.876139] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   57.876194] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bd2739b0
>[   57.876226] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c3291a6c state to 00000000bd2739b0
>[   57.876250] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000053f8e025 state to 00000000bd2739b0
>[   57.876273] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000053f8e025
>[   57.876296] [drm:drm_atomic_check_only [drm]] checking 00000000bd2739b0
>[   57.876391] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   57.876447] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   57.876491] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bd2739b0 nonblocking
>[   57.902583] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bd2739b0
>[   57.902619] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bd2739b0
>[   58.081979] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   58.082053] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[   58.082101] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000d26e3aaf state to 000000007ff6aaaf
>[   58.082140] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f057f9d state to 000000007ff6aaaf
>[   58.082178] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000003f057f9d
>[   58.082214] [drm:drm_atomic_check_only [drm]] checking 000000007ff6aaaf
>[   58.082342] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   58.082433] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   58.082494] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007ff6aaaf nonblocking
>[   58.102574] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[   58.102607] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[   58.215000] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   58.215075] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[   58.215122] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000017698420 state to 000000008826679a
>[   58.215162] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000053f8e025 state to 000000008826679a
>[   58.215200] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000053f8e025
>[   58.215236] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[   58.215364] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   58.215455] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   58.215516] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[   58.235905] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[   58.235938] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[   58.667937] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   58.667973] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[   58.667995] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000d26e3aaf state to 000000008826679a
>[   58.668013] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006711f9c0 state to 000000008826679a
>[   58.668030] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000006711f9c0
>[   58.668046] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[   58.668113] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   58.668153] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   58.668184] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[   58.669113] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[   58.669137] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[   58.884478] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   58.884508] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[   58.884527] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c3291a6c state to 000000007ff6aaaf
>[   58.884541] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000034063f60 state to 000000007ff6aaaf
>[   58.884555] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000034063f60
>[   58.884569] [drm:drm_atomic_check_only [drm]] checking 000000007ff6aaaf
>[   58.884626] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   58.884659] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   58.884686] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007ff6aaaf nonblocking
>[   58.902566] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[   58.902599] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[   59.088906] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   59.088934] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000091f22cea
>[   59.088952] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 0000000091f22cea
>[   59.088965] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003523b522 state to 0000000091f22cea
>[   59.088978] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000003523b522
>[   59.088990] [drm:drm_atomic_check_only [drm]] checking 0000000091f22cea
>[   59.089050] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   59.089081] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   59.089105] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000091f22cea nonblocking
>[   59.135906] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000091f22cea
>[   59.135940] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000091f22cea
>[   59.143711] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   59.143758] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   59.143819] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 000000006ad8c40c
>[   59.143851] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000006ad8c40c
>[   59.143879] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   59.143904] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   59.144007] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   59.144072] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   59.144119] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   59.169246] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   59.169287] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   59.181041] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   59.181109] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   59.181152] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 00000000fb93280e
>[   59.181187] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000fb93280e
>[   59.181220] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000018fab058
>[   59.181253] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   59.181372] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   59.181454] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   59.181512] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   59.202597] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   59.202634] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   59.213175] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   59.213243] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[   59.213287] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000008044e50c
>[   59.213322] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 000000008044e50c
>[   59.213355] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000009376deb8
>[   59.213388] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[   59.213509] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   59.213590] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   59.213648] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[   59.235914] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[   59.235947] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[   59.254448] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   59.254478] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[   59.254496] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f281e966 state to 0000000086e088c8
>[   59.254509] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f4d86dda state to 0000000086e088c8
>[   59.254521] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000f4d86dda
>[   59.254534] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[   59.254602] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   59.254631] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   59.254658] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[   59.269058] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[   59.269078] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[   60.525788] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 00000000f665c95c
>[   60.525838] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   60.525867] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.525898] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 000000004fa621ed
>[   60.525928] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[   60.525954] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.551123] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   60.551157] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[   60.551178] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ca302471 state to 00000000e08dfed9
>[   60.551192] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f665c95c state to 00000000e08dfed9
>[   60.551205] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000f665c95c
>[   60.551218] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[   60.551298] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   60.551329] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.551353] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[   60.569223] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[   60.569248] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[   60.577509] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   60.577552] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   60.577581] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 000000008f7d755e
>[   60.577603] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a968c4af state to 000000008f7d755e
>[   60.577625] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000a968c4af
>[   60.577646] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   60.577732] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   60.577784] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.577823] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   60.602579] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   60.602615] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   60.749130] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 000000008f81692a
>[   60.749190] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   60.749219] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.749249] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:48:cursor A] state 000000004fa621ed
>[   60.749278] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   60.749304] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.749477] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   60.749502] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008f7d755e
>[   60.749519] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ca302471 state to 000000008f7d755e
>[   60.749532] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008f81692a state to 000000008f7d755e
>[   60.749545] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000008f81692a
>[   60.749557] [drm:drm_atomic_check_only [drm]] checking 000000008f7d755e
>[   60.749594] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   60.749622] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.749649] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008f7d755e nonblocking
>[   60.769068] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008f7d755e
>[   60.769087] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008f7d755e
>[   60.791012] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   60.791044] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[   60.791063] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 0000000086e088c8
>[   60.791076] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f4d86dda state to 0000000086e088c8
>[   60.791089] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000f4d86dda
>[   60.791102] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[   60.791167] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   60.791197] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.791223] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[   60.835921] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[   60.835947] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[   60.850090] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   60.850121] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[   60.850141] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 000000008044e50c
>[   60.850155] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c44b407c state to 000000008044e50c
>[   60.850168] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000c44b407c
>[   60.850180] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[   60.850257] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   60.850287] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.850316] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[   60.869222] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[   60.869251] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[   60.877660] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   60.877708] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   60.877737] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 00000000fb93280e
>[   60.877758] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 00000000fb93280e
>[   60.877778] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000009376deb8
>[   60.877798] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   60.877893] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   60.877942] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   60.877983] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   60.902572] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   60.902611] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   61.166301] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   61.166343] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   61.166371] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 000000006ad8c40c
>[   61.166392] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 000000006ad8c40c
>[   61.166411] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000018fab058
>[   61.166430] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   61.166522] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   61.166568] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   61.166604] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   61.202581] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   61.202618] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   61.316057] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   61.316105] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066b94687
>[   61.316133] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 0000000066b94687
>[   61.316155] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000013086e00 state to 0000000066b94687
>[   61.316175] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000013086e00
>[   61.316194] [drm:drm_atomic_check_only [drm]] checking 0000000066b94687
>[   61.316287] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   61.316336] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   61.316376] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066b94687 nonblocking
>[   61.335896] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066b94687
>[   61.335934] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066b94687
>[   61.477410] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   61.477484] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000091f22cea
>[   61.477533] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 0000000091f22cea
>[   61.477573] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 0000000091f22cea
>[   61.477610] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   61.477646] [drm:drm_atomic_check_only [drm]] checking 0000000091f22cea
>[   61.477781] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   61.477872] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   61.477935] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000091f22cea nonblocking
>[   61.502498] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000091f22cea
>[   61.502549] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000091f22cea
>[   61.548288] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   61.548362] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   61.548410] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 000000006ad8c40c
>[   61.548449] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003523b522 state to 000000006ad8c40c
>[   61.548487] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000003523b522
>[   61.548523] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   61.548651] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   61.548742] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   61.548804] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   61.569233] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   61.569273] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   61.648549] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   61.648623] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[   61.648671] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 0000000017698420
>[   61.648710] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e983b907 state to 0000000017698420
>[   61.648747] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e983b907
>[   61.648783] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[   61.648911] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   61.649003] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   61.649065] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[   61.669233] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[   61.669266] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[   61.747278] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   61.747333] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[   61.747367] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008044e50c state to 00000000565de791
>[   61.747396] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003523b522 state to 00000000565de791
>[   61.747424] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000003523b522
>[   61.747450] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[   61.747547] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   61.747614] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   61.747661] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[   61.769116] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[   61.769135] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[   62.446336] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   62.446408] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000062ef0e7
>[   62.446456] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000009b2aa5aa state to 00000000062ef0e7
>[   62.446495] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000059793990 state to 00000000062ef0e7
>[   62.446532] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000059793990
>[   62.446569] [drm:drm_atomic_check_only [drm]] checking 00000000062ef0e7
>[   62.446697] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   62.446787] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   62.446849] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000062ef0e7 nonblocking
>[   62.469244] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000062ef0e7
>[   62.469290] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000062ef0e7
>[   63.046117] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   63.046189] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d26e3aaf
>[   63.046237] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c3291a6c state to 00000000d26e3aaf
>[   63.046277] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000048476e62 state to 00000000d26e3aaf
>[   63.046314] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000048476e62
>[   63.046350] [drm:drm_atomic_check_only [drm]] checking 00000000d26e3aaf
>[   63.046478] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   63.046569] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   63.046630] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d26e3aaf nonblocking
>[   63.069227] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d26e3aaf
>[   63.069266] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d26e3aaf
>[   63.646395] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   63.646469] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[   63.646517] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 000000007ff6aaaf
>[   63.646556] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e983b907 state to 000000007ff6aaaf
>[   63.646593] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e983b907
>[   63.646630] [drm:drm_atomic_check_only [drm]] checking 000000007ff6aaaf
>[   63.646757] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   63.646847] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   63.646909] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007ff6aaaf nonblocking
>[   63.669249] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[   63.669296] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[   64.246618] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   64.246693] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[   64.246742] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000c3291a6c state to 000000007ff6aaaf
>[   64.246781] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008f81692a state to 000000007ff6aaaf
>[   64.246819] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000008f81692a
>[   64.246855] [drm:drm_atomic_check_only [drm]] checking 000000007ff6aaaf
>[   64.246982] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   64.247074] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   64.247136] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007ff6aaaf nonblocking
>[   64.269248] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[   64.269301] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[   64.647414] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   64.647444] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[   64.647464] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000017698420 state to 000000008826679a
>[   64.647480] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a968c4af state to 000000008826679a
>[   64.647496] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a968c4af
>[   64.647509] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[   64.647572] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   64.647605] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   64.647633] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[   64.669058] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[   64.669078] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[   64.673058] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   64.673088] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b2aa5aa
>[   64.673108] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000052365cfd state to 000000009b2aa5aa
>[   64.673121] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000059793990 state to 000000009b2aa5aa
>[   64.673136] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 0000000059793990
>[   64.673149] [drm:drm_atomic_check_only [drm]] checking 000000009b2aa5aa
>[   64.673205] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   64.673238] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   64.673268] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b2aa5aa nonblocking
>[   64.702417] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b2aa5aa
>[   64.702435] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b2aa5aa
>[   64.740763] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   64.740792] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007eb444d1
>[   64.740811] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000dff05046 state to 000000007eb444d1
>[   64.740826] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089c27bd3 state to 000000007eb444d1
>[   64.740840] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000089c27bd3
>[   64.740852] [drm:drm_atomic_check_only [drm]] checking 000000007eb444d1
>[   64.740908] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   64.740940] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   64.740966] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007eb444d1 nonblocking
>[   64.769069] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007eb444d1
>[   64.769091] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007eb444d1
>[   64.774655] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   64.774682] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000099a3cb14
>[   64.774700] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029eabcc0 state to 0000000099a3cb14
>[   64.774713] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001fa39098 state to 0000000099a3cb14
>[   64.774726] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000001fa39098
>[   64.774738] [drm:drm_atomic_check_only [drm]] checking 0000000099a3cb14
>[   64.774792] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   64.774823] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   64.774852] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000099a3cb14 nonblocking
>[   64.802457] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000099a3cb14
>[   64.802486] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000099a3cb14
>[   64.811447] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   64.811487] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   64.811513] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 00000000be530318
>[   64.811532] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a101883d state to 00000000be530318
>[   64.811551] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a101883d
>[   64.811569] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   64.811647] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   64.811693] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   64.811728] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   64.835937] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   64.835976] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   65.229156] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   65.229229] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[   65.229276] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 00000000f281e966
>[   65.229315] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000bba3b3ca state to 00000000f281e966
>[   65.229353] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000bba3b3ca
>[   65.229390] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[   65.229518] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   65.229609] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   65.229671] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[   65.235935] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[   65.235987] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[   65.830354] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   65.830427] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[   65.830474] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 00000000f281e966
>[   65.830513] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 00000000f281e966
>[   65.830550] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   65.830587] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[   65.830717] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   65.830808] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   65.830869] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[   65.835938] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[   65.835989] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[   66.432161] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   66.432242] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000099a3cb14
>[   66.432290] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000099a3cb14
>[   66.432330] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c687da74 state to 0000000099a3cb14
>[   66.432367] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000c687da74
>[   66.432403] [drm:drm_atomic_check_only [drm]] checking 0000000099a3cb14
>[   66.432530] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   66.432621] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   66.432682] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000099a3cb14 nonblocking
>[   66.435847] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000099a3cb14
>[   66.435898] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000099a3cb14
>[   67.031696] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   67.031776] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000079fea074
>[   67.031880] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 0000000079fea074
>[   67.031929] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000352368b2 state to 0000000079fea074
>[   67.031978] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000352368b2
>[   67.032015] [drm:drm_atomic_check_only [drm]] checking 0000000079fea074
>[   67.032151] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   67.032251] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   67.032321] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000079fea074 nonblocking
>[   67.035949] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000079fea074
>[   67.036008] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000079fea074
>[   67.632573] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   67.632647] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[   67.632694] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 00000000f281e966
>[   67.632734] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000bba3b3ca state to 00000000f281e966
>[   67.632772] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000bba3b3ca
>[   67.632808] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[   67.632936] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   67.633027] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   67.633090] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[   67.636089] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   67.636145] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   67.636183] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   67.637823] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[   67.637876] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[   68.233686] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   68.233759] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   68.233807] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000be530318
>[   68.233846] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000be530318
>[   68.233883] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000018fab058
>[   68.233920] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   68.234048] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   68.234139] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   68.234201] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   68.235916] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   68.235973] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   68.834569] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   68.834642] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[   68.834690] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 000000008044e50c
>[   68.834729] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 000000008044e50c
>[   68.834766] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000009376deb8
>[   68.834802] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[   68.834930] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   68.835022] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   68.835084] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[   68.835863] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[   68.835921] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[   69.436491] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   69.436564] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   69.436612] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000004ae2a29e
>[   69.436650] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c44b407c state to 000000004ae2a29e
>[   69.436688] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000c44b407c
>[   69.436724] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   69.436853] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   69.436944] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   69.437006] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   69.469268] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   69.469319] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   70.037952] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   70.038026] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   70.038074] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 000000006ad8c40c
>[   70.038113] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f4d86dda state to 000000006ad8c40c
>[   70.038150] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000f4d86dda
>[   70.038187] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   70.038314] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   70.038404] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   70.038466] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   70.069268] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   70.069320] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   70.638954] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   70.639026] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000091f22cea
>[   70.639074] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad8c40c state to 0000000091f22cea
>[   70.639114] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c44b407c state to 0000000091f22cea
>[   70.639152] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000c44b407c
>[   70.639188] [drm:drm_atomic_check_only [drm]] checking 0000000091f22cea
>[   70.639315] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   70.639406] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   70.639467] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000091f22cea nonblocking
>[   70.669252] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000091f22cea
>[   70.669303] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000091f22cea
>[   71.239947] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   71.240020] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   71.240067] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 00000000fb93280e
>[   71.240107] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 00000000fb93280e
>[   71.240144] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 000000009376deb8
>[   71.240181] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   71.240309] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   71.240400] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   71.240461] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   71.269268] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   71.269318] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   71.840945] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   71.841019] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[   71.841066] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008044e50c state to 00000000565de791
>[   71.841106] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000565de791
>[   71.841143] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000018fab058
>[   71.841180] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[   71.841308] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   71.841399] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   71.841461] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[   71.869271] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[   71.869321] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[   72.441912] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   72.441984] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   72.442032] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000003daeaefa
>[   72.442071] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000bba3b3ca state to 000000003daeaefa
>[   72.442108] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000bba3b3ca
>[   72.442145] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   72.442273] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   72.442365] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   72.442427] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   72.469269] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   72.469321] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   73.042897] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   73.042971] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[   73.043019] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f281e966 state to 000000004f4f75dd
>[   73.043058] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000004f4f75dd
>[   73.043095] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   73.043132] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[   73.043259] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   73.043351] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   73.043413] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[   73.069269] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[   73.069321] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[   73.644196] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   73.644270] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[   73.644318] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 0000000086e088c8
>[   73.644357] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a101883d state to 0000000086e088c8
>[   73.644395] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000a101883d
>[   73.644431] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[   73.644559] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   73.644650] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   73.644712] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[   73.669264] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[   73.669315] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[   74.244920] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   74.244993] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   74.245040] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000be530318
>[   74.245080] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003523b522 state to 00000000be530318
>[   74.245118] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000003523b522
>[   74.245155] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   74.245283] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   74.245373] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   74.245436] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   74.269263] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   74.269314] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   74.845888] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   74.845960] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[   74.846008] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 000000008044e50c
>[   74.846047] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a101883d state to 000000008044e50c
>[   74.846084] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000a101883d
>[   74.846121] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[   74.846249] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   74.846340] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   74.846403] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[   74.869263] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[   74.869314] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[   75.446932] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   75.447006] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   75.447054] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000004ae2a29e
>[   75.447093] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000004ae2a29e
>[   75.447131] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   75.447168] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   75.447296] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   75.447387] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   75.447449] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   75.469261] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   75.469312] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   78.313321] [drm:drm_mode_addfb2 [drm]] [FB:154]
>[   78.313394] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   78.313441] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000091f22cea state to 000000006ad8c40c
>[   78.313480] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000bba3b3ca state to 000000006ad8c40c
>[   78.313518] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:154] for [PLANE:28:plane 1A] state 00000000bba3b3ca
>[   78.313554] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   78.313684] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 154
>[   78.313777] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   78.313840] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   78.335768] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   78.335806] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   90.263754] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   90.263793] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[   90.263812] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000079fea074 state to 00000000da381020
>[   90.263826] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004dfb9521 state to 00000000da381020
>[   90.263839] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004dfb9521
>[   90.263852] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[   90.263906] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   90.263937] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   90.263962] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[   90.302462] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[   90.302481] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[   90.476557] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1200181a, pins 0x00000020, long 0x00000020
>[   90.476622] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[   90.476721] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[   90.476755] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[   90.476790] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   90.477007] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.477035] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   90.477220] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.477247] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.477275] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   90.477303] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   90.478031] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.478075] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   90.480440] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   90.481178] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   90.481977] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   90.482032] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:101:HDMI-A-1] status updated from connected to disconnected
>[   90.487206] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   90.487284] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   90.487503] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.487560] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   90.487777] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.487827] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.487886] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   90.487948] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   90.488524] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.488575] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   90.490875] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   90.491621] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   90.492387] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   90.492403] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] disconnected
>[   90.492788] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   90.492850] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   90.492905] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   90.493230] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   90.493286] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   90.493339] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   90.493356] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   90.495061] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   90.495124] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   90.495356] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.495411] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   90.495630] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.495666] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.495721] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   90.495777] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   90.496388] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.496430] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   90.498552] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   90.499276] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   90.500059] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   90.500070] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] disconnected
>[   90.500112] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   90.500160] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   90.500202] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   90.500465] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   90.500507] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   90.500546] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   90.500558] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   90.505918] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   90.505980] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   90.506194] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.506236] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   90.506438] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   90.506466] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.506508] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   90.506550] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   90.507112] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   90.507153] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   90.509242] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   90.509940] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   90.510717] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   90.510732] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] disconnected
>[   90.510781] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   90.510841] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   90.510893] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   90.511181] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   90.511232] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   90.511281] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   90.511295] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   90.864695] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   90.864731] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ca302471
>[   90.864753] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008f7d755e state to 00000000ca302471
>[   90.864767] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000053f8e025 state to 00000000ca302471
>[   90.864780] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000053f8e025
>[   90.864793] [drm:drm_atomic_check_only [drm]] checking 00000000ca302471
>[   90.864908] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   90.864938] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   90.864969] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ca302471 nonblocking
>[   90.902445] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ca302471
>[   90.902465] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ca302471
>[   90.962948] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   90.962976] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e6799f7c
>[   90.962993] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad8c40c state to 00000000e6799f7c
>[   90.963007] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 00000000e6799f7c
>[   90.963020] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000009376deb8
>[   90.963032] [drm:drm_atomic_check_only [drm]] checking 00000000e6799f7c
>[   90.963086] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   90.963117] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   90.963141] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e6799f7c nonblocking
>[   90.969071] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e6799f7c
>[   90.969089] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e6799f7c
>[   91.120366] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   91.120401] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   91.120422] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 00000000fb93280e
>[   91.120437] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c44b407c state to 00000000fb93280e
>[   91.120451] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000c44b407c
>[   91.120464] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   91.120530] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   91.120563] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.120593] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   91.135900] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   91.135930] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   91.140039] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   91.140105] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[   91.140134] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008044e50c state to 00000000565de791
>[   91.140158] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f4d86dda state to 00000000565de791
>[   91.140183] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000f4d86dda
>[   91.140205] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[   91.140288] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   91.140341] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.140380] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[   91.169232] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[   91.169270] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[   91.177616] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   91.177682] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   91.177726] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000003daeaefa
>[   91.177761] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c44b407c state to 000000003daeaefa
>[   91.177794] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000c44b407c
>[   91.177826] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   91.177943] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   91.178024] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.178079] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   91.202599] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   91.202641] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   91.210974] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   91.211038] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[   91.211081] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 000000004f4f75dd
>[   91.211115] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009376deb8 state to 000000004f4f75dd
>[   91.211148] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000009376deb8
>[   91.211180] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[   91.211294] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   91.211376] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.211431] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[   91.269248] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[   91.269295] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[   91.274265] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   91.274334] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[   91.274382] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 00000000f281e966
>[   91.274422] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000bba3b3ca state to 00000000f281e966
>[   91.274459] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000bba3b3ca
>[   91.274495] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[   91.274622] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   91.274712] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.274773] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[   91.302604] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[   91.302656] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[   91.310999] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   91.311039] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   91.311066] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000be530318
>[   91.311087] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000be530318
>[   91.311107] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000018fab058
>[   91.311127] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   91.311203] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   91.311251] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.311287] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   91.335911] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   91.335940] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   91.343040] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   91.343094] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[   91.343128] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 000000008044e50c
>[   91.343157] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000008044e50c
>[   91.343184] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   91.343210] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[   91.343306] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   91.343372] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.343418] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[   91.369261] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[   91.369300] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[   91.377008] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   91.377073] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   91.377115] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000004ae2a29e
>[   91.377150] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a101883d state to 000000004ae2a29e
>[   91.377183] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a101883d
>[   91.377216] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   91.377330] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   91.377411] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.377467] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   91.402578] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   91.402625] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   91.411077] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   91.411150] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   91.411198] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 000000006ad8c40c
>[   91.411237] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003523b522 state to 000000006ad8c40c
>[   91.411274] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003523b522
>[   91.411310] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   91.411437] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   91.411528] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   91.411590] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[   91.435928] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   91.435980] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   93.039625] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[   93.039709] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[   93.039854] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[   93.039933] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[   93.040020] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   93.053329] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   93.053412] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   93.068146] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   93.068874] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   93.069744] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   93.069797] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0xff
>[   93.069834] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   93.069938] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:101:HDMI-A-1] status updated from disconnected to connected
>[   93.077637] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   93.077752] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   93.091419] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   93.091476] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   93.106930] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   93.107688] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   93.108547] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   93.108589] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0xff
>[   93.108619] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   93.108654] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   93.108684] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   93.108723] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[   93.108753] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 160 1, audio latency 130 2
>[   93.108780] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[   93.108808] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   93.108835] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   93.110644] [drm:drm_mode_debug_printmodeline [drm]] Modeline 202:"1920x1080" 0 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   93.110674] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   93.110706] [drm:drm_mode_debug_printmodeline [drm]] Modeline 205:"1920x1080" 0 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x4005
>[   93.110734] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   93.110766] [drm:drm_mode_debug_printmodeline [drm]] Modeline 253:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   93.110793] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   93.110848] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   93.110880] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[   93.110910] [drm:drm_mode_debug_printmodeline [drm]] Modeline 201:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.110939] [drm:drm_mode_debug_printmodeline [drm]] Modeline 252:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.110969] [drm:drm_mode_debug_printmodeline [drm]] Modeline 198:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   93.110999] [drm:drm_mode_debug_printmodeline [drm]] Modeline 250:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   93.111028] [drm:drm_mode_debug_printmodeline [drm]] Modeline 199:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   93.111058] [drm:drm_mode_debug_printmodeline [drm]] Modeline 200:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.111087] [drm:drm_mode_debug_printmodeline [drm]] Modeline 251:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.111117] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.111147] [drm:drm_mode_debug_printmodeline [drm]] Modeline 203:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   93.111177] [drm:drm_mode_debug_printmodeline [drm]] Modeline 204:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   93.111206] [drm:drm_mode_debug_printmodeline [drm]] Modeline 243:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.111236] [drm:drm_mode_debug_printmodeline [drm]] Modeline 254:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   93.111266] [drm:drm_mode_debug_printmodeline [drm]] Modeline 255:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   93.111296] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"1920x1080i" 120 148500 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.111325] [drm:drm_mode_debug_printmodeline [drm]] Modeline 233:"1920x1080i" 120 148352 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.111355] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   93.111385] [drm:drm_mode_debug_printmodeline [drm]] Modeline 206:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x1c005
>[   93.111414] [drm:drm_mode_debug_printmodeline [drm]] Modeline 207:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x20005
>[   93.111444] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"1920x1080i" 100 148500 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   93.111474] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.111503] [drm:drm_mode_debug_printmodeline [drm]] Modeline 208:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.111533] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.111563] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.111592] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   93.111622] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   93.111651] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.111681] [drm:drm_mode_debug_printmodeline [drm]] Modeline 244:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   93.111711] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   93.111740] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   93.111770] [drm:drm_mode_debug_printmodeline [drm]] Modeline 192:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
>[   93.111826] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x19
>[   93.111874] [drm:drm_mode_debug_printmodeline [drm]] Modeline 197:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x20019
>[   93.111907] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.111937] [drm:drm_mode_debug_printmodeline [drm]] Modeline 212:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.111965] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   93.111995] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   93.112028] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   93.112058] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   93.112086] [drm:drm_mode_debug_printmodeline [drm]] Modeline 213:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   93.112116] [drm:drm_mode_debug_printmodeline [drm]] Modeline 245:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   93.112148] [drm:drm_mode_debug_printmodeline [drm]] Modeline 246:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   93.112176] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   93.112206] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   93.112236] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   93.112266] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   93.112298] [drm:drm_mode_debug_printmodeline [drm]] Modeline 231:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.112326] [drm:drm_mode_debug_printmodeline [drm]] Modeline 232:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.112354] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.112384] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.112416] [drm:drm_mode_debug_printmodeline [drm]] Modeline 225:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.112444] [drm:drm_mode_debug_printmodeline [drm]] Modeline 226:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.112472] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.112502] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.112533] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"1280x720" 120 148500 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.112562] [drm:drm_mode_debug_printmodeline [drm]] Modeline 234:"1280x720" 120 148352 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.112587] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"1280x720" 100 148500 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   93.112613] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.112639] [drm:drm_mode_debug_printmodeline [drm]] Modeline 193:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   93.112665] [drm:drm_mode_debug_printmodeline [drm]] Modeline 194:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   93.112690] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.112716] [drm:drm_mode_debug_printmodeline [drm]] Modeline 248:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   93.112741] [drm:drm_mode_debug_printmodeline [drm]] Modeline 249:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   93.112766] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   93.112792] [drm:drm_mode_debug_printmodeline [drm]] Modeline 195:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
>[   93.112821] [drm:drm_mode_debug_printmodeline [drm]] Modeline 196:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
>[   93.112850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 30 74250 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.112878] [drm:drm_mode_debug_printmodeline [drm]] Modeline 216:"1280x720" 30 74176 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.112905] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"1280x720" 25 74250 1280 3700 3740 3960 720 725 730 750 0x40 0x5
>[   93.112933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1280x720" 24 59400 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.112961] [drm:drm_mode_debug_printmodeline [drm]] Modeline 217:"1280x720" 24 59341 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.112991] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   93.113019] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   93.113047] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   93.113075] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   93.113102] [drm:drm_mode_debug_printmodeline [drm]] Modeline 227:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.113130] [drm:drm_mode_debug_printmodeline [drm]] Modeline 228:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.113157] [drm:drm_mode_debug_printmodeline [drm]] Modeline 229:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.113181] [drm:drm_mode_debug_printmodeline [drm]] Modeline 230:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.113210] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.113237] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.113265] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.113293] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.113322] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.113350] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.113379] [drm:drm_mode_debug_printmodeline [drm]] Modeline 179:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.113404] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.113429] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.113454] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.113479] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.113504] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.113529] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.113554] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.113584] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.113614] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.113644] [drm:drm_mode_debug_printmodeline [drm]] Modeline 239:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113672] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113700] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113728] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113753] [drm:drm_mode_debug_printmodeline [drm]] Modeline 241:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.113778] [drm:drm_mode_debug_printmodeline [drm]] Modeline 242:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.113808] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.113836] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.113863] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113888] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113918] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113945] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.113971] [drm:drm_mode_debug_printmodeline [drm]] Modeline 237:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.113996] [drm:drm_mode_debug_printmodeline [drm]] Modeline 238:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.114025] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.114054] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.114081] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.114106] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.114135] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.114163] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.114189] [drm:drm_mode_debug_printmodeline [drm]] Modeline 220:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.114214] [drm:drm_mode_debug_printmodeline [drm]] Modeline 222:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.114239] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.114264] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.114288] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   93.114313] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   93.114338] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   93.114362] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   93.114387] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   93.114412] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.114436] [drm:drm_mode_debug_printmodeline [drm]] Modeline 224:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.114461] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.114487] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.116549] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   93.116618] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   93.116678] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   93.116979] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   93.117035] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   93.117090] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   93.117109] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   93.120955] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   93.121046] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   93.121290] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   93.121350] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   93.121575] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   93.121611] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[   93.121672] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[   93.121730] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[   93.177823] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[   93.179761] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   93.180560] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   93.181324] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   93.181346] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0xff
>[   93.181359] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   93.181375] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   93.181388] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   93.181409] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[   93.181422] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 160 1, audio latency 130 2
>[   93.181433] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[   93.181445] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   93.181456] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   93.182255] [drm:drm_mode_debug_printmodeline [drm]] Modeline 330:"1920x1080" 0 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   93.182268] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   93.182281] [drm:drm_mode_debug_printmodeline [drm]] Modeline 333:"1920x1080" 0 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x4005
>[   93.182293] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   93.182306] [drm:drm_mode_debug_printmodeline [drm]] Modeline 381:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   93.182318] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   93.182337] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   93.182350] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[   93.182362] [drm:drm_mode_debug_printmodeline [drm]] Modeline 201:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.182375] [drm:drm_mode_debug_printmodeline [drm]] Modeline 252:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.182387] [drm:drm_mode_debug_printmodeline [drm]] Modeline 198:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   93.182399] [drm:drm_mode_debug_printmodeline [drm]] Modeline 250:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   93.182412] [drm:drm_mode_debug_printmodeline [drm]] Modeline 199:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   93.182424] [drm:drm_mode_debug_printmodeline [drm]] Modeline 200:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.182436] [drm:drm_mode_debug_printmodeline [drm]] Modeline 251:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   93.182449] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.182461] [drm:drm_mode_debug_printmodeline [drm]] Modeline 203:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   93.182473] [drm:drm_mode_debug_printmodeline [drm]] Modeline 204:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   93.182486] [drm:drm_mode_debug_printmodeline [drm]] Modeline 243:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.182498] [drm:drm_mode_debug_printmodeline [drm]] Modeline 254:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   93.182510] [drm:drm_mode_debug_printmodeline [drm]] Modeline 255:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   93.182523] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"1920x1080i" 120 148500 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.182535] [drm:drm_mode_debug_printmodeline [drm]] Modeline 233:"1920x1080i" 120 148352 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.182547] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   93.182560] [drm:drm_mode_debug_printmodeline [drm]] Modeline 206:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x1c005
>[   93.182572] [drm:drm_mode_debug_printmodeline [drm]] Modeline 207:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x20005
>[   93.182584] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"1920x1080i" 100 148500 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   93.182597] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.182609] [drm:drm_mode_debug_printmodeline [drm]] Modeline 208:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.182621] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.182634] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.182646] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   93.182658] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   93.182671] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   93.182683] [drm:drm_mode_debug_printmodeline [drm]] Modeline 244:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   93.182695] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   93.182708] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   93.182720] [drm:drm_mode_debug_printmodeline [drm]] Modeline 192:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
>[   93.182732] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x19
>[   93.182744] [drm:drm_mode_debug_printmodeline [drm]] Modeline 197:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x20019
>[   93.182757] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.182769] [drm:drm_mode_debug_printmodeline [drm]] Modeline 212:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   93.182781] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   93.182794] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   93.182806] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   93.182818] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   93.182831] [drm:drm_mode_debug_printmodeline [drm]] Modeline 213:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   93.182843] [drm:drm_mode_debug_printmodeline [drm]] Modeline 245:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   93.182855] [drm:drm_mode_debug_printmodeline [drm]] Modeline 246:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   93.182868] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   93.182880] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   93.182892] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   93.182905] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   93.182917] [drm:drm_mode_debug_printmodeline [drm]] Modeline 231:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.182930] [drm:drm_mode_debug_printmodeline [drm]] Modeline 232:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.182942] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.182954] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   93.182967] [drm:drm_mode_debug_printmodeline [drm]] Modeline 225:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.182979] [drm:drm_mode_debug_printmodeline [drm]] Modeline 226:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.182991] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.183004] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   93.183016] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"1280x720" 120 148500 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.183028] [drm:drm_mode_debug_printmodeline [drm]] Modeline 234:"1280x720" 120 148352 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.183041] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"1280x720" 100 148500 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   93.183053] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.183065] [drm:drm_mode_debug_printmodeline [drm]] Modeline 193:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   93.183078] [drm:drm_mode_debug_printmodeline [drm]] Modeline 194:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   93.183090] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   93.183102] [drm:drm_mode_debug_printmodeline [drm]] Modeline 248:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   93.183115] [drm:drm_mode_debug_printmodeline [drm]] Modeline 249:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   93.183127] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   93.183139] [drm:drm_mode_debug_printmodeline [drm]] Modeline 195:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
>[   93.183152] [drm:drm_mode_debug_printmodeline [drm]] Modeline 196:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
>[   93.183164] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 30 74250 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.183176] [drm:drm_mode_debug_printmodeline [drm]] Modeline 216:"1280x720" 30 74176 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.183189] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"1280x720" 25 74250 1280 3700 3740 3960 720 725 730 750 0x40 0x5
>[   93.183201] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1280x720" 24 59400 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.183213] [drm:drm_mode_debug_printmodeline [drm]] Modeline 217:"1280x720" 24 59341 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   93.183225] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   93.183238] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   93.183250] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   93.183262] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   93.183275] [drm:drm_mode_debug_printmodeline [drm]] Modeline 227:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.183287] [drm:drm_mode_debug_printmodeline [drm]] Modeline 228:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.183299] [drm:drm_mode_debug_printmodeline [drm]] Modeline 229:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.183311] [drm:drm_mode_debug_printmodeline [drm]] Modeline 230:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.183324] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.183336] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   93.183348] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.183361] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   93.183373] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.183385] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.183398] [drm:drm_mode_debug_printmodeline [drm]] Modeline 179:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.183410] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.183422] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.183434] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.183447] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.183459] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.183471] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.183484] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   93.183496] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.183508] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   93.183521] [drm:drm_mode_debug_printmodeline [drm]] Modeline 239:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183533] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183545] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183558] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183570] [drm:drm_mode_debug_printmodeline [drm]] Modeline 241:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183582] [drm:drm_mode_debug_printmodeline [drm]] Modeline 242:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183595] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183607] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183619] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183632] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183644] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183656] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183669] [drm:drm_mode_debug_printmodeline [drm]] Modeline 237:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183681] [drm:drm_mode_debug_printmodeline [drm]] Modeline 238:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183693] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183706] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183718] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183730] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183742] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183755] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   93.183781] [drm:drm_mode_debug_printmodeline [drm]] Modeline 220:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183811] [drm:drm_mode_debug_printmodeline [drm]] Modeline 222:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183826] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183845] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   93.183865] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   93.183883] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   93.183900] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   93.183917] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   93.183936] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   93.183956] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.183973] [drm:drm_mode_debug_printmodeline [drm]] Modeline 224:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.183990] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.184008] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   93.185275] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   93.185316] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   93.185352] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   93.185619] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   93.185654] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   93.185688] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   93.185699] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   93.188025] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[   93.188048] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 000000000a2c9793
>[   93.188065] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000000a2c9793
>[   93.188085] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 0000000017a3e49d state to 000000000a2c9793
>[   93.188101] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[   93.188115] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] active changed
>[   93.188125] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   93.188137] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   93.188145] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: n
>[   93.188161] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000000a2c9793
>[   93.188177] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 000000000a2c9793
>[   93.188194] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dc845d63 state to 000000000a2c9793
>[   93.188213] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 0000000044d24bfb state to 000000000a2c9793
>[   93.188271] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[   93.188326] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[   93.188363] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[   93.188403] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[   93.188442] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[   93.188479] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[   93.188515] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[   93.188552] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[   93.188585] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   93.188604] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x0 0x5
>[   93.188640] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   93.188657] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[   93.188692] [drm:intel_dump_pipe_config [i915]] crtc timings: 297000 3840 4016 4104 4400 2160 2168 2178 2250, type: 0x48 flags: 0x5
>[   93.188728] [drm:intel_dump_pipe_config [i915]] port clock: 297000, pipe src size: 3840x2160, pixel rate 297000
>[   93.188762] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   93.188796] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   93.188831] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   93.188869] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1d, pll1: 0x100, pll2: 0x2ccccd, pll3: 0x10000, pll6: 0x30b05, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x58
>[   93.188903] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   93.188940] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:115, fb = 3840x2160 format = XR24 little-endian (0x34325258)
>[   93.188974] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+3840+2160 dst 0x0+3840+2160
>[   93.189008] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[   93.189043] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[   93.189076] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[   93.189110] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] FB:152, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   93.189146] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+256+220 dst 3449x1940+256+220
>[   93.189167] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 0000000029268802 state to 000000000a2c9793
>[   93.189185] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 0000000048cfd963 state to 000000000a2c9793
>[   93.189223] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 79200 kHz
>[   93.189258] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 4
>[   93.189300] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   93.189337] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[   93.189372] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 152
>[   93.189406] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 0, off 1, on 0, ms 1
>[   93.189449] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[   93.189484] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[   93.189528] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0)
>[   93.189561] [drm:skl_compute_wm [i915]] [PLANE:48:cursor A] ddb (988 - 1020) -> (0 - 0)
>[   93.189579] [drm:drm_atomic_commit [drm]] committing 000000000a2c9793
>[   93.189661] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[   93.189702] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[   93.189797] [drm:intel_disable_pipe [i915]] disabling pipe A
>[   93.202400] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[   93.202464] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Disabling DP dual mode adaptor TMDS output
>[   93.203618] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>[   93.203652] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 51
>[   93.203706] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[   93.203751] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
>[   93.203853] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[   93.203882] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[   93.203911] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[   93.203940] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[   93.203970] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[   93.203999] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[   93.204029] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[   93.204059] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[   93.204093] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[   93.204124] [drm:intel_power_well_disable [i915]] disabling power well 2
>[   93.204162] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[   93.204193] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[   93.204225] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[   93.204279] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[   93.204299] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[   93.204344] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[   93.204359] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[   93.204371] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[   94.534282] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   94.534308] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003523b522 state to 000000006ad8c40c
>[   94.534325] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000006ad8c40c
>[   94.534337] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:28:plane 1A] state 000000003523b522
>[   94.534349] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:28:plane 1A] state 000000003523b522 to [NOCRTC]
>[   94.534363] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   94.534388] [drm:drm_atomic_commit [drm]] committing 000000006ad8c40c
>[   94.534422] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   94.534437] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   94.535316] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   94.535335] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 000000006ad8c40c
>[   94.535347] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   94.535363] [drm:drm_atomic_commit [drm]] committing 000000006ad8c40c
>[   94.535386] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   94.535399] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   94.535426] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   94.535463] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[   94.535482] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[   94.535495] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   94.535508] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000006ad8c40c
>[   94.535520] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000006ad8c40c
>[   94.535534] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:51:pipe A] state 00000000fb93280e
>[   94.535546] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:28:plane 1A] state 0000000046d73fba to [CRTC:51:pipe A]
>[   94.535558] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   94.535570] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000006ad8c40c
>[   94.535585] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 0000000012aaa69a state to 000000006ad8c40c
>[   94.535597] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 0000000012aaa69a to [NOCRTC]
>[   94.535609] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 0000000012aaa69a to [CRTC:51:pipe A]
>[   94.535623] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   94.535639] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] mode changed
>[   94.535645] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] active changed
>[   94.535652] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   94.535660] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   94.535666] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: y
>[   94.535679] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000006ad8c40c
>[   94.535691] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 000000006ad8c40c
>[   94.535703] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 0000000018fab058 state to 000000006ad8c40c
>[   94.535784] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[   94.535843] [drm:intel_hdmi_compute_config [i915]] picking bpc to 12 for HDMI output
>[   94.535879] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 36 for HDMI
>[   94.535915] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 36, dithering: 0
>[   94.535948] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[   94.535981] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[   94.536012] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 36, dithering: 0
>[   94.536042] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[   94.536074] [drm:intel_dump_pipe_config [i915]] requested mode:
>[   94.536094] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5
>[   94.536127] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[   94.536145] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5
>[   94.536179] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5
>[   94.536211] [drm:intel_dump_pipe_config [i915]] port clock: 222750, pipe src size: 1920x1080, pixel rate 148500
>[   94.536243] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[   94.536275] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   94.536307] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[   94.536342] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1d, pll1: 0x100, pll2: 0x2ccccd, pll3: 0x10000, pll6: 0x30b05, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x58
>[   94.536375] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[   94.536405] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[   94.536435] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[   94.536465] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[   94.536492] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[   94.536522] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] FB:152, fb = 256x256 format = AR24 little-endian (0x34325241)
>[   94.536551] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+256+220 dst 3449x1940+256+220
>[   94.536570] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000565de791 state to 000000006ad8c40c
>[   94.536585] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 000000008044e50c state to 000000006ad8c40c
>[   94.536622] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[   94.536654] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13
>[   94.536692] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   94.536721] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[   94.536757] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[   94.536788] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[   94.536823] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988)
>[   94.536852] [drm:skl_compute_wm [i915]] [PLANE:48:cursor A] ddb (0 - 0) -> (988 - 1020)
>[   94.536866] [drm:drm_atomic_commit [drm]] committing 000000006ad8c40c
>[   94.538424] [drm:intel_power_well_enable [i915]] enabling power well 2
>[   94.538493] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[   94.538746] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
>[   94.538805] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[   94.538834] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[   94.538862] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[   94.538890] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[   94.538917] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[   94.538946] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[   94.538975] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[   94.539002] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[   94.539052] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 51
>[   94.539081] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[   94.539202] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Enabling DP dual mode adaptor TMDS output
>[   94.540311] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[   94.540417] [drm:intel_enable_pipe [i915]] enabling pipe A
>[   94.540920] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:101:HDMI-A-1], [ENCODER:100:DDI B]
>[   94.540957] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 52 bytes ELD
>[   94.540989] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[   94.541016] [drm:hsw_audio_config_update [i915]] using automatic N
>[   94.558000] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[   94.558055] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[   94.558134] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[   94.558205] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   94.558228] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   94.558292] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   94.558312] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 000000006ad8c40c
>[   94.558328] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000006ad8c40c
>[   94.558346] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000df0e1ae1 state to 000000006ad8c40c
>[   94.558362] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[   94.558378] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[   94.558388] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[   94.558415] [drm:drm_atomic_commit [drm]] committing 000000006ad8c40c
>[   94.574611] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   94.574639] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   94.574718] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[   94.574739] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[   94.574757] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[   94.575602] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000a101883d
>[   94.575649] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 0000000018fab058
>[   94.575719] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   94.575768] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[   94.577685] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   94.577784] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   94.578943] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[   94.579009] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[   94.607002] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   94.607742] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   94.608626] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   94.608672] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0xff
>[   94.608706] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   94.608745] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   94.608778] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   94.608824] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[   94.608858] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 160 1, audio latency 130 2
>[   94.608888] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[   94.608919] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   94.608950] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   94.611013] [drm:drm_mode_debug_printmodeline [drm]] Modeline 330:"1920x1080" 0 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   94.611046] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   94.611081] [drm:drm_mode_debug_printmodeline [drm]] Modeline 333:"1920x1080" 0 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x4005
>[   94.611113] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   94.611147] [drm:drm_mode_debug_printmodeline [drm]] Modeline 381:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   94.611178] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   94.611226] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   94.611260] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[   94.611293] [drm:drm_mode_debug_printmodeline [drm]] Modeline 201:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.611326] [drm:drm_mode_debug_printmodeline [drm]] Modeline 252:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.611359] [drm:drm_mode_debug_printmodeline [drm]] Modeline 198:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   94.611392] [drm:drm_mode_debug_printmodeline [drm]] Modeline 250:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   94.611424] [drm:drm_mode_debug_printmodeline [drm]] Modeline 199:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   94.611457] [drm:drm_mode_debug_printmodeline [drm]] Modeline 200:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.611490] [drm:drm_mode_debug_printmodeline [drm]] Modeline 251:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.611522] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.611555] [drm:drm_mode_debug_printmodeline [drm]] Modeline 203:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   94.611588] [drm:drm_mode_debug_printmodeline [drm]] Modeline 204:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   94.611621] [drm:drm_mode_debug_printmodeline [drm]] Modeline 243:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.611654] [drm:drm_mode_debug_printmodeline [drm]] Modeline 254:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   94.611687] [drm:drm_mode_debug_printmodeline [drm]] Modeline 255:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   94.611719] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"1920x1080i" 120 148500 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.611752] [drm:drm_mode_debug_printmodeline [drm]] Modeline 233:"1920x1080i" 120 148352 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.611817] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   94.611858] [drm:drm_mode_debug_printmodeline [drm]] Modeline 206:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x1c005
>[   94.611902] [drm:drm_mode_debug_printmodeline [drm]] Modeline 207:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x20005
>[   94.611940] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"1920x1080i" 100 148500 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   94.611979] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.612018] [drm:drm_mode_debug_printmodeline [drm]] Modeline 208:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.612057] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.612099] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.612136] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   94.612176] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   94.612216] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.612259] [drm:drm_mode_debug_printmodeline [drm]] Modeline 244:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   94.612296] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   94.612333] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   94.612373] [drm:drm_mode_debug_printmodeline [drm]] Modeline 192:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
>[   94.612411] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x19
>[   94.612448] [drm:drm_mode_debug_printmodeline [drm]] Modeline 197:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x20019
>[   94.612485] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.612521] [drm:drm_mode_debug_printmodeline [drm]] Modeline 212:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.612558] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   94.612594] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   94.612631] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   94.612668] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   94.612704] [drm:drm_mode_debug_printmodeline [drm]] Modeline 213:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   94.612737] [drm:drm_mode_debug_printmodeline [drm]] Modeline 245:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   94.612771] [drm:drm_mode_debug_printmodeline [drm]] Modeline 246:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   94.612806] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   94.612840] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   94.612874] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   94.612908] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   94.612942] [drm:drm_mode_debug_printmodeline [drm]] Modeline 231:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.612975] [drm:drm_mode_debug_printmodeline [drm]] Modeline 232:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.613009] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.613048] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.613087] [drm:drm_mode_debug_printmodeline [drm]] Modeline 225:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.613125] [drm:drm_mode_debug_printmodeline [drm]] Modeline 226:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.613164] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.613201] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.613238] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"1280x720" 120 148500 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.613276] [drm:drm_mode_debug_printmodeline [drm]] Modeline 234:"1280x720" 120 148352 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.613312] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"1280x720" 100 148500 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   94.613346] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.613380] [drm:drm_mode_debug_printmodeline [drm]] Modeline 193:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   94.613418] [drm:drm_mode_debug_printmodeline [drm]] Modeline 194:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   94.613458] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.613497] [drm:drm_mode_debug_printmodeline [drm]] Modeline 248:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   94.613535] [drm:drm_mode_debug_printmodeline [drm]] Modeline 249:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   94.613573] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   94.613612] [drm:drm_mode_debug_printmodeline [drm]] Modeline 195:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
>[   94.613649] [drm:drm_mode_debug_printmodeline [drm]] Modeline 196:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
>[   94.613684] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 30 74250 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.613721] [drm:drm_mode_debug_printmodeline [drm]] Modeline 216:"1280x720" 30 74176 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.613754] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"1280x720" 25 74250 1280 3700 3740 3960 720 725 730 750 0x40 0x5
>[   94.613787] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1280x720" 24 59400 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.613821] [drm:drm_mode_debug_printmodeline [drm]] Modeline 217:"1280x720" 24 59341 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.613857] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   94.613890] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   94.613923] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   94.613957] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   94.613993] [drm:drm_mode_debug_printmodeline [drm]] Modeline 227:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.614026] [drm:drm_mode_debug_printmodeline [drm]] Modeline 228:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.614059] [drm:drm_mode_debug_printmodeline [drm]] Modeline 229:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.614092] [drm:drm_mode_debug_printmodeline [drm]] Modeline 230:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.614129] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.614162] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.614195] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.614229] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.614265] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.614298] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.614331] [drm:drm_mode_debug_printmodeline [drm]] Modeline 179:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.614365] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.614402] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.614435] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.614468] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.614501] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.614537] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.614570] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.614603] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.614637] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.614674] [drm:drm_mode_debug_printmodeline [drm]] Modeline 239:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.614707] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.614740] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.614773] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.614807] [drm:drm_mode_debug_printmodeline [drm]] Modeline 241:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.614843] [drm:drm_mode_debug_printmodeline [drm]] Modeline 242:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.614876] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.614909] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.614943] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.614979] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.615012] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.615045] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.615078] [drm:drm_mode_debug_printmodeline [drm]] Modeline 237:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615115] [drm:drm_mode_debug_printmodeline [drm]] Modeline 238:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615148] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615181] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615214] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.615251] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.615284] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.615317] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.615350] [drm:drm_mode_debug_printmodeline [drm]] Modeline 220:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615387] [drm:drm_mode_debug_printmodeline [drm]] Modeline 222:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615420] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615453] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.615487] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   94.615523] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   94.615556] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   94.615589] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   94.615623] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   94.615659] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.615692] [drm:drm_mode_debug_printmodeline [drm]] Modeline 224:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.615725] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.615758] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.617978] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   94.618052] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   94.618116] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   94.618382] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   94.618411] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   94.618439] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   94.618449] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   94.640840] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000ff1bfd48
>[   94.640901] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   94.640932] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   94.709186] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[   94.709265] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   94.737051] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   94.737775] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   94.738550] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   94.738577] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0xff
>[   94.738590] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   94.738606] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   94.738619] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   94.738638] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[   94.738651] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 160 1, audio latency 130 2
>[   94.738663] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[   94.738675] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[   94.738686] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[   94.739482] [drm:drm_mode_debug_printmodeline [drm]] Modeline 330:"1920x1080" 0 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   94.739494] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   94.739508] [drm:drm_mode_debug_printmodeline [drm]] Modeline 333:"1920x1080" 0 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x4005
>[   94.739520] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   94.739533] [drm:drm_mode_debug_printmodeline [drm]] Modeline 381:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x4005
>[   94.739545] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: CLOCK_HIGH
>[   94.739563] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[   94.739576] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[   94.739589] [drm:drm_mode_debug_printmodeline [drm]] Modeline 201:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.739602] [drm:drm_mode_debug_printmodeline [drm]] Modeline 252:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.739614] [drm:drm_mode_debug_printmodeline [drm]] Modeline 198:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   94.739627] [drm:drm_mode_debug_printmodeline [drm]] Modeline 250:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[   94.739639] [drm:drm_mode_debug_printmodeline [drm]] Modeline 199:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[   94.739652] [drm:drm_mode_debug_printmodeline [drm]] Modeline 200:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.739664] [drm:drm_mode_debug_printmodeline [drm]] Modeline 251:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[   94.739677] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.739689] [drm:drm_mode_debug_printmodeline [drm]] Modeline 203:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   94.739702] [drm:drm_mode_debug_printmodeline [drm]] Modeline 204:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   94.739714] [drm:drm_mode_debug_printmodeline [drm]] Modeline 243:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.739726] [drm:drm_mode_debug_printmodeline [drm]] Modeline 254:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[   94.739739] [drm:drm_mode_debug_printmodeline [drm]] Modeline 255:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[   94.739751] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"1920x1080i" 120 148500 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.739781] [drm:drm_mode_debug_printmodeline [drm]] Modeline 233:"1920x1080i" 120 148352 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.739797] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   94.739811] [drm:drm_mode_debug_printmodeline [drm]] Modeline 206:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x1c005
>[   94.739829] [drm:drm_mode_debug_printmodeline [drm]] Modeline 207:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x20005
>[   94.739845] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"1920x1080i" 100 148500 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   94.739864] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.739879] [drm:drm_mode_debug_printmodeline [drm]] Modeline 208:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.739894] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.739909] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.739923] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   94.739938] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   94.739953] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[   94.739968] [drm:drm_mode_debug_printmodeline [drm]] Modeline 244:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[   94.739982] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   94.739997] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[   94.740011] [drm:drm_mode_debug_printmodeline [drm]] Modeline 192:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
>[   94.740028] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x19
>[   94.740046] [drm:drm_mode_debug_printmodeline [drm]] Modeline 197:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x20019
>[   94.740062] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.740077] [drm:drm_mode_debug_printmodeline [drm]] Modeline 212:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[   94.740094] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[   94.740111] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   94.740126] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   94.740141] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   94.740157] [drm:drm_mode_debug_printmodeline [drm]] Modeline 213:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[   94.740173] [drm:drm_mode_debug_printmodeline [drm]] Modeline 245:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[   94.740188] [drm:drm_mode_debug_printmodeline [drm]] Modeline 246:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[   94.740202] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   94.740216] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[   94.740230] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   94.740243] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[   94.740256] [drm:drm_mode_debug_printmodeline [drm]] Modeline 231:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.740269] [drm:drm_mode_debug_printmodeline [drm]] Modeline 232:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.740283] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.740296] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[   94.740308] [drm:drm_mode_debug_printmodeline [drm]] Modeline 225:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.740322] [drm:drm_mode_debug_printmodeline [drm]] Modeline 226:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.740336] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.740349] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[   94.740364] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"1280x720" 120 148500 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.740380] [drm:drm_mode_debug_printmodeline [drm]] Modeline 234:"1280x720" 120 148352 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.740397] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"1280x720" 100 148500 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   94.740412] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.740427] [drm:drm_mode_debug_printmodeline [drm]] Modeline 193:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   94.740442] [drm:drm_mode_debug_printmodeline [drm]] Modeline 194:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   94.740460] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[   94.740474] [drm:drm_mode_debug_printmodeline [drm]] Modeline 248:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[   94.740487] [drm:drm_mode_debug_printmodeline [drm]] Modeline 249:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[   94.740500] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[   94.740517] [drm:drm_mode_debug_printmodeline [drm]] Modeline 195:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
>[   94.740531] [drm:drm_mode_debug_printmodeline [drm]] Modeline 196:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
>[   94.740546] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 30 74250 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.740562] [drm:drm_mode_debug_printmodeline [drm]] Modeline 216:"1280x720" 30 74176 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.740576] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"1280x720" 25 74250 1280 3700 3740 3960 720 725 730 750 0x40 0x5
>[   94.740589] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1280x720" 24 59400 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.740602] [drm:drm_mode_debug_printmodeline [drm]] Modeline 217:"1280x720" 24 59341 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[   94.740617] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   94.740630] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[   94.740642] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   94.740655] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[   94.740668] [drm:drm_mode_debug_printmodeline [drm]] Modeline 227:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.740683] [drm:drm_mode_debug_printmodeline [drm]] Modeline 228:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.740695] [drm:drm_mode_debug_printmodeline [drm]] Modeline 229:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.740709] [drm:drm_mode_debug_printmodeline [drm]] Modeline 230:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.740721] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.740734] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[   94.740749] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.740762] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[   94.740775] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.740788] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.740803] [drm:drm_mode_debug_printmodeline [drm]] Modeline 179:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.740815] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.740828] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.740841] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.740855] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.740868] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.740881] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.740894] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[   94.740907] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.740920] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[   94.740932] [drm:drm_mode_debug_printmodeline [drm]] Modeline 239:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.740945] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.740960] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.740972] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.740985] [drm:drm_mode_debug_printmodeline [drm]] Modeline 241:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.740997] [drm:drm_mode_debug_printmodeline [drm]] Modeline 242:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741011] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741027] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741042] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741054] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741066] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741080] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741094] [drm:drm_mode_debug_printmodeline [drm]] Modeline 237:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741106] [drm:drm_mode_debug_printmodeline [drm]] Modeline 238:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741119] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741132] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741146] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741159] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741171] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741185] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[   94.741198] [drm:drm_mode_debug_printmodeline [drm]] Modeline 220:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741211] [drm:drm_mode_debug_printmodeline [drm]] Modeline 222:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741224] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741237] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[   94.741251] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[   94.741263] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   94.741276] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[   94.741289] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   94.741303] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[   94.741315] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.741328] [drm:drm_mode_debug_printmodeline [drm]] Modeline 224:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.741340] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.741353] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[   94.742430] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[   94.742478] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[   94.742509] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[   94.742769] [drm:intel_power_well_enable [i915]] enabling AUX C
>[   94.742798] [drm:intel_power_well_disable [i915]] disabling AUX C
>[   94.742827] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[   94.742836] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[   94.745647] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 0000000013086e00
>[   94.745700] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   94.745734] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   94.817681] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:139] for [PLANE:48:cursor A] state 00000000ccef981e
>[   94.817737] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[   94.817768] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[   96.813081] [drm:drm_mode_addfb2 [drm]] [FB:152]
>[   96.813126] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d26e3aaf
>[   96.813144] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000017698420 state to 00000000d26e3aaf
>[   96.813157] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f515d35e state to 00000000d26e3aaf
>[   96.813183] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:152] for [PLANE:28:plane 1A] state 00000000f515d35e
>[   96.813195] [drm:drm_atomic_check_only [drm]] checking 00000000d26e3aaf
>[   96.813248] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 152
>[   96.813277] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   96.813301] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d26e3aaf nonblocking
>[   96.841109] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d26e3aaf
>[   96.841128] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d26e3aaf
>[   96.966476] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f6d0e225
>[   96.966500] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000005ef75675 state to 00000000f6d0e225
>[   96.966515] [drm:drm_atomic_check_only [drm]] checking 00000000f6d0e225
>[   96.966542] [drm:drm_atomic_commit [drm]] committing 00000000f6d0e225
>[   96.974513] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f6d0e225
>[   96.974536] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f6d0e225
>[   97.029637] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.029664] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[   97.029682] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006b1c24fe state to 00000000070b19ff
>[   97.029695] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005d59d5fd state to 00000000070b19ff
>[   97.029708] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000005d59d5fd
>[   97.029720] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[   97.029778] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.029808] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.029833] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[   97.032046] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066b94687
>[   97.032068] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 0000000066b94687
>[   97.032083] [drm:drm_atomic_check_only [drm]] checking 0000000066b94687
>[   97.032106] [drm:drm_atomic_commit [drm]] committing 0000000066b94687
>[   97.037242] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066b94687
>[   97.037281] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066b94687
>[   97.037327] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066b94687
>[   97.037348] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 0000000066b94687
>[   97.037360] [drm:drm_atomic_check_only [drm]] checking 0000000066b94687
>[   97.037387] [drm:drm_atomic_commit [drm]] committing 0000000066b94687
>[   97.041131] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[   97.041150] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[   97.057942] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066b94687
>[   97.057970] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066b94687
>[   97.100217] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.100247] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   97.100267] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000003daeaefa
>[   97.100281] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 000000003daeaefa
>[   97.100293] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.100306] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   97.100376] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.100406] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.100434] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   97.107755] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   97.107779] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   97.138459] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.138488] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[   97.138507] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f281e966 state to 000000004f4f75dd
>[   97.138520] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000004f4f75dd
>[   97.138533] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.138545] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[   97.138612] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.138642] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.138668] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[   97.157917] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[   97.157948] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[   97.172559] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.172589] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[   97.172608] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 0000000086e088c8
>[   97.172621] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 0000000086e088c8
>[   97.172633] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.172645] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[   97.172712] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.172741] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.172768] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[   97.191265] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[   97.191297] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[   97.203119] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.203165] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   97.203195] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000be530318
>[   97.203218] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 00000000be530318
>[   97.203240] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.203261] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   97.203349] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.203402] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.203443] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   97.207949] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   97.207973] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   97.220514] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.220546] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   97.220566] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000091f22cea state to 00000000fb93280e
>[   97.220581] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000fb93280e
>[   97.220595] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.220608] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   97.220679] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.220712] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.220741] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   97.224444] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   97.224464] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   97.237718] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.237770] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   97.237800] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000004ae2a29e
>[   97.237824] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000004ae2a29e
>[   97.237846] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.237867] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   97.237958] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.238010] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.238048] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   97.241267] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   97.241294] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   97.251724] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.251757] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   97.251793] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000003daeaefa
>[   97.251807] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 000000003daeaefa
>[   97.251823] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.251837] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   97.251943] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.251976] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.252014] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   97.257953] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   97.257991] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   97.269458] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.269497] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[   97.269522] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 000000004f4f75dd
>[   97.269539] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000004f4f75dd
>[   97.269556] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.269572] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[   97.269655] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.269695] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.269729] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[   97.274591] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[   97.274617] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[   97.289898] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.289928] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[   97.289945] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 00000000f281e966
>[   97.289959] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000f281e966
>[   97.289971] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.289983] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[   97.290059] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.290089] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.290118] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[   97.291266] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[   97.291292] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[   97.302162] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.302196] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   97.302218] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000be530318
>[   97.302235] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 00000000be530318
>[   97.302250] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.302266] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   97.302334] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.302372] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.302402] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   97.307950] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   97.307974] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   97.323725] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.323764] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   97.323836] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 00000000fb93280e
>[   97.323852] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000fb93280e
>[   97.323868] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.323884] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   97.323945] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.323980] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.324010] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   97.341277] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   97.341304] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   97.344713] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.344737] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000091f22cea
>[   97.344772] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 0000000091f22cea
>[   97.344786] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 0000000091f22cea
>[   97.344798] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.344810] [drm:drm_atomic_check_only [drm]] checking 0000000091f22cea
>[   97.344881] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.344911] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.344934] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000091f22cea nonblocking
>[   97.357928] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000091f22cea
>[   97.357957] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000091f22cea
>[   97.365273] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.365315] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   97.365341] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000003daeaefa
>[   97.365363] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 000000003daeaefa
>[   97.365383] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.365402] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   97.365478] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.365528] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.365564] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   97.374611] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   97.374646] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   97.383347] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.383406] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[   97.383444] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f281e966 state to 000000004f4f75dd
>[   97.383476] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000004f4f75dd
>[   97.383506] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.383535] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[   97.383639] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.383712] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.383764] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[   97.391281] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[   97.391317] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[   97.399334] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.399385] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[   97.399418] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 0000000086e088c8
>[   97.399444] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 0000000086e088c8
>[   97.399469] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.399494] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[   97.399584] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.399644] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.399687] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[   97.408013] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[   97.408051] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[   97.415375] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.415422] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[   97.415451] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000be530318
>[   97.415476] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 00000000be530318
>[   97.415499] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.415521] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[   97.415606] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.415662] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.415703] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[   97.424601] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[   97.424635] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[   97.432248] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.432307] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[   97.432345] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000091f22cea state to 00000000fb93280e
>[   97.432377] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 00000000fb93280e
>[   97.432407] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.432436] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[   97.432541] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.432614] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.432665] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[   97.441263] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[   97.441305] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[   97.450538] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[   97.450602] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004ae2a29e
>[   97.450646] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 000000004ae2a29e
>[   97.450680] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 000000004ae2a29e
>[   97.450714] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[   97.450746] [drm:drm_atomic_check_only [drm]] checking 000000004ae2a29e
>[   97.450860] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[   97.450941] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.450997] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004ae2a29e nonblocking
>[   97.457947] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004ae2a29e
>[   97.457994] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004ae2a29e
>[   97.466207] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[   97.466258] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[   97.466290] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000003daeaefa
>[   97.466316] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000018fab058 state to 000000003daeaefa
>[   97.466341] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000018fab058
>[   97.466366] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[   97.466456] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[   97.466516] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[   97.466560] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[   97.474524] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[   97.474570] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[   97.725849] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[   97.725942] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[   97.726093] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[   97.726183] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[   97.726279] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   97.754072] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   97.754801] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   97.755622] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   97.755673] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[   98.760749] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[   98.760855] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[   98.761026] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[   98.761126] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[   98.761234] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[   98.789140] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[   98.789869] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[   98.790741] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[   98.790793] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  103.891293] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  103.891328] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000062ef0e7
>[  103.891348] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000009b2aa5aa state to 00000000062ef0e7
>[  103.891361] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089c27bd3 state to 00000000062ef0e7
>[  103.891374] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000089c27bd3
>[  103.891386] [drm:drm_atomic_check_only [drm]] checking 00000000062ef0e7
>[  103.891450] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  103.891481] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  103.891505] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000062ef0e7 nonblocking
>[  103.907822] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000062ef0e7
>[  103.907842] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000062ef0e7
>[  103.947311] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  103.947339] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  103.947357] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 00000000e08dfed9
>[  103.947371] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000006c64ec6 state to 00000000e08dfed9
>[  103.947384] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000006c64ec6
>[  103.947397] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  103.947468] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  103.947499] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  103.947523] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  103.957800] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  103.957820] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  104.254882] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  104.254909] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[  104.254926] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 0000000086e088c8
>[  104.254939] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000046d73fba state to 0000000086e088c8
>[  104.254951] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000046d73fba
>[  104.254963] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[  104.255017] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  104.255046] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.255069] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[  104.274620] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[  104.274646] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[  104.286958] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  104.286991] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e4dce962
>[  104.287013] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000052365cfd state to 00000000e4dce962
>[  104.287029] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e4c4ae81 state to 00000000e4dce962
>[  104.287044] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e4c4ae81
>[  104.287060] [drm:drm_atomic_check_only [drm]] checking 00000000e4dce962
>[  104.287145] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  104.287180] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.287213] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e4dce962 nonblocking
>[  104.291138] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e4dce962
>[  104.291156] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e4dce962
>[  104.300398] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  104.300429] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007eb444d1
>[  104.300449] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000009b2aa5aa state to 000000007eb444d1
>[  104.300465] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089c27bd3 state to 000000007eb444d1
>[  104.300479] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000089c27bd3
>[  104.300492] [drm:drm_atomic_check_only [drm]] checking 000000007eb444d1
>[  104.300574] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  104.300607] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.300637] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007eb444d1 nonblocking
>[  104.307950] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007eb444d1
>[  104.307975] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007eb444d1
>[  104.319131] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  104.319178] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000062ef0e7
>[  104.319207] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 00000000062ef0e7
>[  104.319230] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000308eba02 state to 00000000062ef0e7
>[  104.319252] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000308eba02
>[  104.319273] [drm:drm_atomic_check_only [drm]] checking 00000000062ef0e7
>[  104.319365] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  104.319417] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.319459] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000062ef0e7 nonblocking
>[  104.324595] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000062ef0e7
>[  104.324626] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000062ef0e7
>[  104.338214] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  104.338270] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066b94687
>[  104.338308] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000062ef0e7 state to 0000000066b94687
>[  104.338338] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000004b4fe37 state to 0000000066b94687
>[  104.338366] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000004b4fe37
>[  104.338392] [drm:drm_atomic_check_only [drm]] checking 0000000066b94687
>[  104.338502] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  104.338570] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.338621] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066b94687 nonblocking
>[  104.341192] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066b94687
>[  104.341214] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066b94687
>[  104.350854] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  104.350885] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b2aa5aa
>[  104.350905] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007eb444d1 state to 000000009b2aa5aa
>[  104.350920] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000013086e00 state to 000000009b2aa5aa
>[  104.350935] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000013086e00
>[  104.350949] [drm:drm_atomic_check_only [drm]] checking 000000009b2aa5aa
>[  104.351010] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  104.351046] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.351073] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b2aa5aa nonblocking
>[  104.357934] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b2aa5aa
>[  104.357961] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b2aa5aa
>[  104.369927] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  104.369976] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000052365cfd
>[  104.370008] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e4dce962 state to 0000000052365cfd
>[  104.370034] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000004b4fe37 state to 0000000052365cfd
>[  104.370057] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000004b4fe37
>[  104.370081] [drm:drm_atomic_check_only [drm]] checking 0000000052365cfd
>[  104.370176] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  104.370233] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.370283] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000052365cfd nonblocking
>[  104.374540] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000052365cfd
>[  104.374573] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000052365cfd
>[  104.387398] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  104.387450] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000052365cfd
>[  104.387485] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007eb444d1 state to 0000000052365cfd
>[  104.387511] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000308eba02 state to 0000000052365cfd
>[  104.387537] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000308eba02
>[  104.387562] [drm:drm_atomic_check_only [drm]] checking 0000000052365cfd
>[  104.387671] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  104.387732] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.387828] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000052365cfd nonblocking
>[  104.391286] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000052365cfd
>[  104.391310] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000052365cfd
>[  104.399317] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  104.399347] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b2aa5aa
>[  104.399365] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000062ef0e7 state to 000000009b2aa5aa
>[  104.399379] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089c27bd3 state to 000000009b2aa5aa
>[  104.399392] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000089c27bd3
>[  104.399405] [drm:drm_atomic_check_only [drm]] checking 000000009b2aa5aa
>[  104.399471] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  104.399503] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.399529] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b2aa5aa nonblocking
>[  104.407959] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b2aa5aa
>[  104.407983] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b2aa5aa
>[  104.417698] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  104.417743] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066b94687
>[  104.417772] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 0000000066b94687
>[  104.417794] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e4c4ae81 state to 0000000066b94687
>[  104.417816] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e4c4ae81
>[  104.417837] [drm:drm_atomic_check_only [drm]] checking 0000000066b94687
>[  104.417922] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  104.417975] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.418014] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066b94687 nonblocking
>[  104.424505] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066b94687
>[  104.424535] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066b94687
>[  104.438805] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  104.438833] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066b94687
>[  104.438851] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000062ef0e7 state to 0000000066b94687
>[  104.438864] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089c27bd3 state to 0000000066b94687
>[  104.438877] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000089c27bd3
>[  104.438889] [drm:drm_atomic_check_only [drm]] checking 0000000066b94687
>[  104.438948] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  104.438978] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.439003] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066b94687 nonblocking
>[  104.457950] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066b94687
>[  104.457986] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066b94687
>[  104.465449] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  104.465497] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b2aa5aa
>[  104.465529] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007eb444d1 state to 000000009b2aa5aa
>[  104.465555] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000308eba02 state to 000000009b2aa5aa
>[  104.465580] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000308eba02
>[  104.465604] [drm:drm_atomic_check_only [drm]] checking 000000009b2aa5aa
>[  104.465695] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  104.465756] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.465799] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b2aa5aa nonblocking
>[  104.474631] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b2aa5aa
>[  104.474655] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b2aa5aa
>[  104.485476] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  104.485527] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000052365cfd
>[  104.485559] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e4dce962 state to 0000000052365cfd
>[  104.485585] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000004b4fe37 state to 0000000052365cfd
>[  104.485610] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000004b4fe37
>[  104.485634] [drm:drm_atomic_check_only [drm]] checking 0000000052365cfd
>[  104.485724] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  104.485784] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.485828] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000052365cfd nonblocking
>[  104.491287] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000052365cfd
>[  104.491322] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000052365cfd
>[  104.813392] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  104.813466] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000052365cfd
>[  104.813515] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007eb444d1 state to 0000000052365cfd
>[  104.813554] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000013086e00 state to 0000000052365cfd
>[  104.813591] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000013086e00
>[  104.813627] [drm:drm_atomic_check_only [drm]] checking 0000000052365cfd
>[  104.813760] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  104.813850] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  104.813915] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000052365cfd nonblocking
>[  104.824652] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000052365cfd
>[  104.824674] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000052365cfd
>[  105.414287] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  105.414358] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b2aa5aa
>[  105.414406] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000062ef0e7 state to 000000009b2aa5aa
>[  105.414445] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000004b4fe37 state to 000000009b2aa5aa
>[  105.414483] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000004b4fe37
>[  105.414519] [drm:drm_atomic_check_only [drm]] checking 000000009b2aa5aa
>[  105.414646] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  105.414736] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  105.414798] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b2aa5aa nonblocking
>[  105.441274] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b2aa5aa
>[  105.441316] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b2aa5aa
>[  106.017350] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  106.017422] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000066b94687
>[  106.017469] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ef5bc50 state to 0000000066b94687
>[  106.017508] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000308eba02 state to 0000000066b94687
>[  106.017546] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000308eba02
>[  106.017582] [drm:drm_atomic_check_only [drm]] checking 0000000066b94687
>[  106.017708] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  106.017800] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  106.017861] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000066b94687 nonblocking
>[  106.041199] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000066b94687
>[  106.041240] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000066b94687
>[  106.331049] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  106.331130] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  106.331178] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000005ef75675 state to 00000000da381020
>[  106.331218] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000419f1bc9 state to 00000000da381020
>[  106.331255] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000419f1bc9
>[  106.331292] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  106.331420] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  106.331511] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  106.331573] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  106.341168] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  106.341203] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  106.363125] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  106.363168] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ef5bc50
>[  106.363196] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000066b94687 state to 000000006ef5bc50
>[  106.363219] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e4c4ae81 state to 000000006ef5bc50
>[  106.363241] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e4c4ae81
>[  106.363262] [drm:drm_atomic_check_only [drm]] checking 000000006ef5bc50
>[  106.363342] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  106.363394] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  106.363431] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ef5bc50 nonblocking
>[  106.374594] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ef5bc50
>[  106.374636] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ef5bc50
>[  106.496706] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  106.496738] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[  106.496758] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 000000004f4f75dd
>[  106.496773] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002712002e state to 000000004f4f75dd
>[  106.496787] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000002712002e
>[  106.496801] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[  106.496862] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  106.496897] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  106.496924] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[  106.507964] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[  106.507996] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[  106.646748] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  106.646782] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[  106.646802] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004ae2a29e state to 00000000fb93280e
>[  106.646818] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ed0eb3cd state to 00000000fb93280e
>[  106.646833] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000ed0eb3cd
>[  106.646848] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[  106.646911] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  106.646947] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  106.646976] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[  106.657772] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[  106.657794] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[  106.667218] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  106.667265] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000091f22cea
>[  106.667295] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000fb93280e state to 0000000091f22cea
>[  106.667319] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000000fc22bca state to 0000000091f22cea
>[  106.667342] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000000fc22bca
>[  106.667365] [drm:drm_atomic_check_only [drm]] checking 0000000091f22cea
>[  106.667450] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  106.667506] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  106.667547] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000091f22cea nonblocking
>[  106.674594] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000091f22cea
>[  106.674625] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000091f22cea
>[  106.797482] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  106.797548] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  106.797590] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 0000000017698420
>[  106.797625] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e17c98bc state to 0000000017698420
>[  106.797659] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e17c98bc
>[  106.797691] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  106.797806] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  106.797887] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  106.797943] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  106.807938] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  106.807980] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  107.198748] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  107.198795] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fb93280e
>[  107.198825] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 00000000fb93280e
>[  107.198850] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000000fc22bca state to 00000000fb93280e
>[  107.198873] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000000fc22bca
>[  107.198896] [drm:drm_atomic_check_only [drm]] checking 00000000fb93280e
>[  107.198981] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  107.199037] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  107.199077] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fb93280e nonblocking
>[  107.207991] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fb93280e
>[  107.208033] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fb93280e
>[  107.297023] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  107.297069] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c3291a6c
>[  107.297100] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000c3291a6c
>[  107.297125] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003a368276 state to 00000000c3291a6c
>[  107.297148] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003a368276
>[  107.297171] [drm:drm_atomic_check_only [drm]] checking 00000000c3291a6c
>[  107.297256] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  107.297312] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  107.297353] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c3291a6c nonblocking
>[  107.307999] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c3291a6c
>[  107.308040] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c3291a6c
>[  107.532293] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  107.532321] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000062ef0e7
>[  107.532338] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000009b2aa5aa state to 00000000062ef0e7
>[  107.532352] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e4c4ae81 state to 00000000062ef0e7
>[  107.532364] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e4c4ae81
>[  107.532377] [drm:drm_atomic_check_only [drm]] checking 00000000062ef0e7
>[  107.532432] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  107.532462] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  107.532487] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000062ef0e7 nonblocking
>[  107.541268] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000062ef0e7
>[  107.541294] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000062ef0e7
>[  107.585246] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  107.585301] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007eb444d1
>[  107.585335] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000052365cfd state to 000000007eb444d1
>[  107.585364] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000308eba02 state to 000000007eb444d1
>[  107.585391] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000308eba02
>[  107.585418] [drm:drm_atomic_check_only [drm]] checking 000000007eb444d1
>[  107.585514] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  107.585581] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  107.585627] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007eb444d1 nonblocking
>[  107.591143] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007eb444d1
>[  107.591161] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e4dce962
>[  107.591179] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007eb444d1
>[  107.591194] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e4dce962
>[  107.591207] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e4dce962
>[  108.109368] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  108.109441] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e4dce962
>[  108.109489] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007eb444d1 state to 00000000e4dce962
>[  108.109528] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000004b4fe37 state to 00000000e4dce962
>[  108.109566] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000004b4fe37
>[  108.109602] [drm:drm_atomic_check_only [drm]] checking 00000000e4dce962
>[  108.109729] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  108.109820] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  108.109882] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e4dce962 nonblocking
>[  108.124622] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e4dce962
>[  108.124674] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e4dce962
>[  108.515702] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  108.515774] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009b2aa5aa
>[  108.515863] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000062ef0e7 state to 000000009b2aa5aa
>[  108.515912] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000493c55bd state to 000000009b2aa5aa
>[  108.515959] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000493c55bd
>[  108.516002] [drm:drm_atomic_check_only [drm]] checking 000000009b2aa5aa
>[  108.516136] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  108.516239] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  108.516307] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009b2aa5aa nonblocking
>[  108.524591] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009b2aa5aa
>[  108.524620] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009b2aa5aa
>[  109.980763] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  109.980797] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007eb444d1
>[  109.980818] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e4dce962 state to 000000007eb444d1
>[  109.980835] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000013086e00 state to 000000007eb444d1
>[  109.980851] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000013086e00
>[  109.980867] [drm:drm_atomic_check_only [drm]] checking 000000007eb444d1
>[  109.980930] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  109.980969] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  109.980998] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007eb444d1 nonblocking
>[  109.991091] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007eb444d1
>[  109.991111] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007eb444d1
>[  110.188109] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  110.188139] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  110.188157] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 00000000e08dfed9
>[  110.188172] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 00000000e08dfed9
>[  110.188185] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  110.188199] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  110.188255] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  110.188288] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  110.188313] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  110.191109] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  110.191127] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  110.194999] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  110.195027] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d26e3aaf
>[  110.195044] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000d26e3aaf
>[  110.195058] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004f30a82e state to 00000000d26e3aaf
>[  110.195070] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004f30a82e
>[  110.195083] [drm:drm_atomic_check_only [drm]] checking 00000000d26e3aaf
>[  110.195142] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  110.195172] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  110.195197] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d26e3aaf nonblocking
>[  110.207762] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d26e3aaf
>[  110.207809] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d26e3aaf
>[  110.556744] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  110.556786] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  110.556812] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 00000000b9d71aea
>[  110.556834] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001d46193b state to 00000000b9d71aea
>[  110.556854] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000001d46193b
>[  110.556879] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  110.556956] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  110.557005] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  110.557040] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  110.574606] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  110.574635] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  111.160309] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  111.160376] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  111.160414] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 00000000b9d71aea
>[  111.160445] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000225a11e2 state to 00000000b9d71aea
>[  111.160476] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000225a11e2
>[  111.160505] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  111.160608] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  111.160682] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  111.160733] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  111.174608] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  111.174655] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  111.762664] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  111.762745] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  111.762793] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 000000000a2c9793
>[  111.762833] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001d46193b state to 000000000a2c9793
>[  111.762870] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000001d46193b
>[  111.762907] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  111.763033] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  111.763125] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  111.763185] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  111.774622] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  111.774675] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  112.059220] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  112.059293] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  112.059340] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000680219a0
>[  112.059380] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000068193332 state to 00000000680219a0
>[  112.059417] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000068193332
>[  112.059454] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  112.059581] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  112.059672] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  112.059734] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  112.074619] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  112.074664] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  112.097737] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  112.097792] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  112.097827] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000937ac5a5
>[  112.097856] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000089fca93f state to 00000000937ac5a5
>[  112.097883] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000089fca93f
>[  112.097910] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  112.098006] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  112.098072] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  112.098118] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  112.107967] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  112.108005] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  112.660963] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  112.661036] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  112.661083] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000937ac5a5
>[  112.661123] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008af1be0c state to 00000000937ac5a5
>[  112.661160] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000008af1be0c
>[  112.661196] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  112.661323] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  112.661414] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  112.661476] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  112.674627] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  112.674679] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  113.115843] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  113.115917] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  113.115964] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b62eef4c state to 00000000680219a0
>[  113.116003] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ad7ea707 state to 00000000680219a0
>[  113.116040] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000ad7ea707
>[  113.116077] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  113.116203] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  113.116295] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  113.116357] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  113.124516] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  113.124558] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  113.147017] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  113.147077] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  113.147115] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000680219a0
>[  113.147147] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008af1be0c state to 00000000680219a0
>[  113.147177] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000008af1be0c
>[  113.147207] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  113.147311] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  113.147383] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  113.147434] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  113.157928] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  113.157969] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  113.262712] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  113.262741] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007fca3047
>[  113.262758] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 000000007fca3047
>[  113.262771] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dc845d63 state to 000000007fca3047
>[  113.262784] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000dc845d63
>[  113.262796] [drm:drm_atomic_check_only [drm]] checking 000000007fca3047
>[  113.262850] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  113.262880] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  113.262911] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007fca3047 nonblocking
>[  113.274439] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007fca3047
>[  113.274458] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007fca3047
>[  113.282433] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  113.282476] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  113.282502] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  113.282535] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044d24bfb state to 00000000070b19ff
>[  113.282555] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000044d24bfb
>[  113.282575] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  113.282651] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  113.282700] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  113.282735] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  113.291259] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  113.291288] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  113.462606] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  113.462650] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  113.462678] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 000000000a2c9793
>[  113.462701] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001d46193b state to 000000000a2c9793
>[  113.462723] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000001d46193b
>[  113.462744] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  113.462822] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  113.462875] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  113.462913] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  113.474607] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  113.474638] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  113.652803] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  113.652833] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  113.652852] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 00000000b9d71aea
>[  113.652867] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044d24bfb state to 00000000b9d71aea
>[  113.652880] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000044d24bfb
>[  113.652894] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  113.652951] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  113.652988] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  113.653014] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  113.657943] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  113.657967] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  113.884384] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  113.884449] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  113.913192] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  113.913945] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  113.914707] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  113.914739] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  113.914765] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  113.914785] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  113.914804] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  113.914835] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[  113.914855] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[  113.914873] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[  113.914892] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  113.914910] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  113.914928] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  113.915054] [drm:drm_mode_debug_printmodeline [drm]] Modeline 116:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[  113.915074] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915095] [drm:drm_mode_debug_printmodeline [drm]] Modeline 201:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  113.915114] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: STALE
>[  113.915135] [drm:drm_mode_debug_printmodeline [drm]] Modeline 252:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  113.915153] [drm:drm_mode_prune_invalid [drm]] Not using 4096x2160 mode: STALE
>[  113.915173] [drm:drm_mode_debug_printmodeline [drm]] Modeline 198:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  113.915191] [drm:drm_mode_prune_invalid [drm]] Not using 3840x2160 mode: STALE
>[  113.915211] [drm:drm_mode_debug_printmodeline [drm]] Modeline 250:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  113.915229] [drm:drm_mode_prune_invalid [drm]] Not using 3840x2160 mode: STALE
>[  113.915249] [drm:drm_mode_debug_printmodeline [drm]] Modeline 199:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  113.915267] [drm:drm_mode_prune_invalid [drm]] Not using 3840x2160 mode: STALE
>[  113.915287] [drm:drm_mode_debug_printmodeline [drm]] Modeline 200:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  113.915305] [drm:drm_mode_prune_invalid [drm]] Not using 3840x2160 mode: STALE
>[  113.915325] [drm:drm_mode_debug_printmodeline [drm]] Modeline 251:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  113.915343] [drm:drm_mode_prune_invalid [drm]] Not using 3840x2160 mode: STALE
>[  113.915363] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  113.915381] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915401] [drm:drm_mode_debug_printmodeline [drm]] Modeline 203:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[  113.915419] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915439] [drm:drm_mode_debug_printmodeline [drm]] Modeline 204:"1920x1080" 120 297000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[  113.915457] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915477] [drm:drm_mode_debug_printmodeline [drm]] Modeline 243:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  113.915495] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915516] [drm:drm_mode_debug_printmodeline [drm]] Modeline 254:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x1c005
>[  113.915534] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915554] [drm:drm_mode_debug_printmodeline [drm]] Modeline 255:"1920x1080" 120 296703 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x20005
>[  113.915572] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915592] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"1920x1080i" 120 148500 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  113.915610] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.915630] [drm:drm_mode_debug_printmodeline [drm]] Modeline 233:"1920x1080i" 120 148352 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  113.915648] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.915668] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  113.915686] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915706] [drm:drm_mode_debug_printmodeline [drm]] Modeline 206:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x1c005
>[  113.915724] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915744] [drm:drm_mode_debug_printmodeline [drm]] Modeline 207:"1920x1080" 100 297000 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x20005
>[  113.915762] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915817] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"1920x1080i" 100 148500 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  113.915839] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.915865] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  113.915886] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915913] [drm:drm_mode_debug_printmodeline [drm]] Modeline 208:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  113.915934] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.915957] [drm:drm_mode_debug_printmodeline [drm]] Modeline 117:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  113.915978] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916000] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  113.916021] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916043] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[  113.916066] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916092] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[  113.916114] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916136] [drm:drm_mode_debug_printmodeline [drm]] Modeline 209:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  113.916159] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916185] [drm:drm_mode_debug_printmodeline [drm]] Modeline 244:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x20015
>[  113.916206] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916229] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  113.916253] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916278] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  113.916299] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916322] [drm:drm_mode_debug_printmodeline [drm]] Modeline 192:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x20015
>[  113.916344] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916370] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x19
>[  113.916391] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916413] [drm:drm_mode_debug_printmodeline [drm]] Modeline 197:"1920x1080i" 50 72000 1920 1952 2120 2304 1080 1126 1136 1250 0x40 0x20019
>[  113.916436] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: STALE
>[  113.916462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  113.916483] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916505] [drm:drm_mode_debug_printmodeline [drm]] Modeline 212:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  113.916524] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916544] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  113.916562] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916583] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  113.916604] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916625] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[  113.916643] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916664] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[  113.916683] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916703] [drm:drm_mode_debug_printmodeline [drm]] Modeline 213:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  113.916722] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916742] [drm:drm_mode_debug_printmodeline [drm]] Modeline 245:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x1c005
>[  113.916761] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916781] [drm:drm_mode_debug_printmodeline [drm]] Modeline 246:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x4005
>[  113.916802] [drm:drm_mode_prune_invalid [drm]] Not using 1920x1080 mode: STALE
>[  113.916825] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[  113.916846] [drm:drm_mode_prune_invalid [drm]] Not using 2880x576 mode: STALE
>[  113.916870] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"2880x576" 50 108000 2880 2928 3184 3456 576 581 586 625 0x40 0xa
>[  113.916890] [drm:drm_mode_prune_invalid [drm]] Not using 2880x576 mode: STALE
>[  113.916914] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[  113.916936] [drm:drm_mode_prune_invalid [drm]] Not using 2880x576i mode: STALE
>[  113.916958] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"2880x576i" 50 54000 2880 2928 3180 3456 576 580 586 625 0x40 0x1a
>[  113.916981] [drm:drm_mode_prune_invalid [drm]] Not using 2880x576i mode: STALE
>[  113.917004] [drm:drm_mode_debug_printmodeline [drm]] Modeline 231:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[  113.917025] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480 mode: STALE
>[  113.917048] [drm:drm_mode_debug_printmodeline [drm]] Modeline 232:"2880x480" 60 108108 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[  113.917069] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480 mode: STALE
>[  113.917117] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[  113.917136] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480 mode: STALE
>[  113.917156] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"2880x480" 60 108000 2880 2944 3192 3432 480 489 495 525 0x40 0xa
>[  113.917174] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480 mode: STALE
>[  113.917195] [drm:drm_mode_debug_printmodeline [drm]] Modeline 225:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[  113.917217] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480i mode: STALE
>[  113.917239] [drm:drm_mode_debug_printmodeline [drm]] Modeline 226:"2880x480i" 60 54054 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[  113.917260] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480i mode: STALE
>[  113.917283] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[  113.917304] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480i mode: STALE
>[  113.917325] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"2880x480i" 60 54000 2880 2956 3204 3432 480 488 494 525 0x40 0x1a
>[  113.917343] [drm:drm_mode_prune_invalid [drm]] Not using 2880x480i mode: STALE
>[  113.917363] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"1280x720" 120 148500 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  113.917381] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917405] [drm:drm_mode_debug_printmodeline [drm]] Modeline 234:"1280x720" 120 148352 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  113.917427] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917451] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"1280x720" 100 148500 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  113.917469] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917490] [drm:drm_mode_debug_printmodeline [drm]] Modeline 193:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[  113.917508] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917532] [drm:drm_mode_debug_printmodeline [drm]] Modeline 194:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[  113.917553] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917577] [drm:drm_mode_debug_printmodeline [drm]] Modeline 248:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x1c005
>[  113.917595] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917618] [drm:drm_mode_debug_printmodeline [drm]] Modeline 249:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x4005
>[  113.917639] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917659] [drm:drm_mode_debug_printmodeline [drm]] Modeline 195:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x1c005
>[  113.917678] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917698] [drm:drm_mode_debug_printmodeline [drm]] Modeline 196:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x4005
>[  113.917716] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917736] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x720" 30 74250 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[  113.917754] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917774] [drm:drm_mode_debug_printmodeline [drm]] Modeline 216:"1280x720" 30 74176 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[  113.917792] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917812] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"1280x720" 25 74250 1280 3700 3740 3960 720 725 730 750 0x40 0x5
>[  113.917830] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1280x720" 24 59400 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[  113.917868] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917888] [drm:drm_mode_debug_printmodeline [drm]] Modeline 217:"1280x720" 24 59341 1280 3040 3080 3300 720 725 730 750 0x40 0x5
>[  113.917906] [drm:drm_mode_prune_invalid [drm]] Not using 1280x720 mode: STALE
>[  113.917926] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[  113.917944] [drm:drm_mode_prune_invalid [drm]] Not using 2880x288 mode: STALE
>[  113.917964] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"2880x288" 50 54000 2880 2928 3180 3456 288 290 293 312 0x40 0xa
>[  113.917981] [drm:drm_mode_prune_invalid [drm]] Not using 2880x288 mode: STALE
>[  113.918002] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[  113.918020] [drm:drm_mode_prune_invalid [drm]] Not using 1440x576 mode: STALE
>[  113.918039] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"1440x576" 50 54000 1440 1464 1592 1728 576 581 586 625 0x40 0xa
>[  113.918057] [drm:drm_mode_prune_invalid [drm]] Not using 1440x576 mode: STALE
>[  113.918077] [drm:drm_mode_debug_printmodeline [drm]] Modeline 227:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[  113.918095] [drm:drm_mode_prune_invalid [drm]] Not using 2880x240 mode: STALE
>[  113.918145] [drm:drm_mode_debug_printmodeline [drm]] Modeline 228:"2880x240" 60 54054 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[  113.918163] [drm:drm_mode_prune_invalid [drm]] Not using 2880x240 mode: STALE
>[  113.918184] [drm:drm_mode_debug_printmodeline [drm]] Modeline 229:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  113.918204] [drm:drm_mode_prune_invalid [drm]] Not using 1440x480 mode: STALE
>[  113.918224] [drm:drm_mode_debug_printmodeline [drm]] Modeline 230:"1440x480" 60 54054 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  113.918242] [drm:drm_mode_prune_invalid [drm]] Not using 1440x480 mode: STALE
>[  113.918262] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[  113.918281] [drm:drm_mode_prune_invalid [drm]] Not using 2880x240 mode: STALE
>[  113.918303] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"2880x240" 60 54000 2880 2956 3204 3432 240 244 247 262 0x40 0xa
>[  113.918321] [drm:drm_mode_prune_invalid [drm]] Not using 2880x240 mode: STALE
>[  113.918341] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  113.918359] [drm:drm_mode_prune_invalid [drm]] Not using 1440x480 mode: STALE
>[  113.918380] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"1440x480" 60 54000 1440 1472 1596 1716 480 489 495 525 0x40 0xa
>[  113.918400] [drm:drm_mode_prune_invalid [drm]] Not using 1440x480 mode: STALE
>[  113.918420] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.918438] [drm:drm_mode_prune_invalid [drm]] Not using 720x576 mode: STALE
>[  113.918459] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"720x576" 200 108000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.918479] [drm:drm_mode_prune_invalid [drm]] Not using 720x576 mode: STALE
>[  113.918499] [drm:drm_mode_debug_printmodeline [drm]] Modeline 179:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[  113.918517] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: STALE
>[  113.918538] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"720x576i" 200 54000 720 732 795 864 576 580 586 625 0x40 0x101a
>[  113.918558] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: STALE
>[  113.918578] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.918596] [drm:drm_mode_prune_invalid [drm]] Not using 720x576 mode: STALE
>[  113.918617] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"720x576" 100 54000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.918637] [drm:drm_mode_prune_invalid [drm]] Not using 720x576 mode: STALE
>[  113.918657] [drm:drm_mode_debug_printmodeline [drm]] Modeline 169:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[  113.918675] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: STALE
>[  113.918696] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"720x576i" 100 27000 720 732 795 864 576 580 586 625 0x40 0x101a
>[  113.918714] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: STALE
>[  113.918737] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  113.918755] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: STALE
>[  113.918775] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  113.918793] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: STALE
>[  113.918814] [drm:drm_mode_debug_printmodeline [drm]] Modeline 239:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.918834] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.918854] [drm:drm_mode_debug_printmodeline [drm]] Modeline 240:"720x480" 240 108108 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.918872] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.918892] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.918911] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.918933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"720x480" 240 108000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.918951] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.918971] [drm:drm_mode_debug_printmodeline [drm]] Modeline 241:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.918990] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919012] [drm:drm_mode_debug_printmodeline [drm]] Modeline 242:"720x480i" 240 54054 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919030] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919050] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919069] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919091] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"720x480i" 240 54000 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919109] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919129] [drm:drm_mode_debug_printmodeline [drm]] Modeline 235:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.919147] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.919168] [drm:drm_mode_debug_printmodeline [drm]] Modeline 236:"720x480" 120 54054 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.919188] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.919208] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.919226] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.919247] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"720x480" 120 54000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.919267] [drm:drm_mode_prune_invalid [drm]] Not using 720x480 mode: STALE
>[  113.919287] [drm:drm_mode_debug_printmodeline [drm]] Modeline 237:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919305] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919326] [drm:drm_mode_debug_printmodeline [drm]] Modeline 238:"720x480i" 120 27027 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919346] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919366] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919384] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919405] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"720x480i" 120 27000 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919425] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919445] [drm:drm_mode_debug_printmodeline [drm]] Modeline 220:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919463] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919484] [drm:drm_mode_debug_printmodeline [drm]] Modeline 222:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919504] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919524] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919542] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919563] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  113.919583] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: STALE
>[  113.919603] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[  113.919621] [drm:drm_mode_prune_invalid [drm]] Not using 720x288 mode: STALE
>[  113.919642] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"720x288" 50 13500 720 732 795 864 288 290 293 312 0x40 0x100a
>[  113.919662] [drm:drm_mode_prune_invalid [drm]] Not using 720x288 mode: STALE
>[  113.919682] [drm:drm_mode_debug_printmodeline [drm]] Modeline 223:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[  113.919700] [drm:drm_mode_prune_invalid [drm]] Not using 720x240 mode: STALE
>[  113.919721] [drm:drm_mode_debug_printmodeline [drm]] Modeline 224:"720x240" 60 13514 720 739 801 858 240 244 247 262 0x40 0x100a
>[  113.919741] [drm:drm_mode_prune_invalid [drm]] Not using 720x240 mode: STALE
>[  113.919761] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[  113.919815] [drm:drm_mode_prune_invalid [drm]] Not using 720x240 mode: STALE
>[  113.919844] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"720x240" 60 13500 720 739 801 858 240 244 247 262 0x40 0x100a
>[  113.919879] [drm:drm_mode_prune_invalid [drm]] Not using 720x240 mode: STALE
>[  113.919905] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  113.919935] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x48 0xa
>[  113.919968] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  113.920004] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  113.920034] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  113.920064] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.920098] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.920133] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.920164] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.920197] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.920232] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.920264] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.920294] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  113.920327] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  113.920362] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  113.921510] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  113.921588] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  113.921652] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  113.921923] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  113.921955] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  113.921987] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  113.921996] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  113.925394] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  113.925449] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  113.953778] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  113.954533] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  113.955286] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  113.955317] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  113.955342] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  113.955362] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  113.955381] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  113.955410] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[  113.955430] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[  113.955448] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[  113.955466] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  113.955485] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  113.955503] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  113.955580] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  113.955603] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x48 0xa
>[  113.955624] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  113.955644] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  113.955664] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  113.955684] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.955704] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.955723] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  113.955743] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.955763] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.955813] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.955836] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  113.955862] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  113.955884] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  113.955911] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  113.956760] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  113.956816] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  113.956863] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  113.957149] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  113.957196] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  113.957242] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  113.957255] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  113.967461] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  113.967495] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 00000000da381020
>[  113.967520] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000da381020
>[  113.967547] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000675edf0b state to 00000000da381020
>[  113.967571] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  113.967591] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] active changed
>[  113.967607] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  113.967620] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  113.967633] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: n
>[  113.967657] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000da381020
>[  113.967680] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 00000000da381020
>[  113.967706] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005e2011dd state to 00000000da381020
>[  113.967731] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000001489adf9 state to 00000000da381020
>[  113.967830] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[  113.967919] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  113.967981] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[  113.968030] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[  113.968083] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  113.968137] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[  113.968189] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[  113.968238] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[  113.968284] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  113.968330] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  113.968353] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5
>[  113.968399] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  113.968425] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x0 0x5
>[  113.968472] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x0 flags: 0x5
>[  113.968517] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>[  113.968562] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  113.968607] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  113.968654] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  113.968706] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6200, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  113.968751] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  113.968801] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:113, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>[  113.968846] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>[  113.968890] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[  113.968937] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[  113.968980] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[  113.969026] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] FB:139, fb = 256x256 format = AR24 little-endian (0x34325241)
>[  113.969072] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+199+112 dst 1721x968+199+112
>[  113.969102] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 000000007fca3047 state to 00000000da381020
>[  113.969127] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 00000000070b19ff state to 00000000da381020
>[  113.969175] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 79200 kHz
>[  113.969221] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 4
>[  113.969279] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  113.969325] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>[  113.969374] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 139
>[  113.969419] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 0, off 1, on 0, ms 1
>[  113.969473] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[  113.969522] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[  113.969577] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 988) -> (0 - 0)
>[  113.969624] [drm:skl_compute_wm [i915]] [PLANE:48:cursor A] ddb (988 - 1020) -> (0 - 0)
>[  113.969648] [drm:drm_atomic_commit [drm]] committing 00000000da381020
>[  113.969755] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[  113.969827] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  113.969914] [drm:intel_hdmi_handle_sink_scrambling [i915]] [CONNECTOR:101:HDMI-A-1] scrambling=no, TMDS bit clock ratio=1/10
>[  113.973486] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  113.974910] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  113.974973] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Disabling DP dual mode adaptor TMDS output
>[  113.976099] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 51
>[  113.976156] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  113.976204] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
>[  113.976265] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[  113.976295] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[  113.976324] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[  113.976352] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[  113.976379] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[  113.976410] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[  113.976438] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  113.976467] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[  113.976502] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>[  113.976532] [drm:intel_power_well_disable [i915]] disabling power well 2
>[  113.976570] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[  113.976602] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[  113.976634] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  113.976687] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  113.976705] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  113.976749] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[  113.976763] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[  113.976777] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[  113.978869] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  113.978892] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003a368276 state to 0000000017698420
>[  113.978908] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 0000000017698420
>[  113.978921] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:28:plane 1A] state 000000003a368276
>[  113.978934] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:28:plane 1A] state 000000003a368276 to [NOCRTC]
>[  113.978948] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  113.978972] [drm:drm_atomic_commit [drm]] committing 0000000017698420
>[  113.979001] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  113.979017] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  113.979604] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  113.979622] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 0000000017698420
>[  113.979634] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  113.979650] [drm:drm_atomic_commit [drm]] committing 0000000017698420
>[  113.979674] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  113.979687] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  113.979715] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  113.979733] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[  113.979750] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[  113.979822] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  113.979840] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 0000000017698420
>[  113.979855] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000006c64ec6 state to 0000000017698420
>[  113.979871] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:51:pipe A] state 00000000bd2739b0
>[  113.979888] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:28:plane 1A] state 0000000006c64ec6 to [CRTC:51:pipe A]
>[  113.979905] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000006c64ec6
>[  113.979919] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000017698420
>[  113.979935] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000af36f150 state to 0000000017698420
>[  113.979949] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000af36f150 to [NOCRTC]
>[  113.979966] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000af36f150 to [CRTC:51:pipe A]
>[  113.979984] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  113.980005] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] mode changed
>[  113.980013] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] active changed
>[  113.980021] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  113.980029] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  113.980036] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: y
>[  113.980049] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000017698420
>[  113.980062] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 0000000017698420
>[  113.980076] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 00000000238cb403 state to 0000000017698420
>[  113.980158] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[  113.980191] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  113.980226] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[  113.980256] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[  113.980289] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  113.980320] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[  113.980351] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[  113.980380] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[  113.980407] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  113.980435] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  113.980450] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  113.980478] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  113.980492] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  113.980521] [drm:intel_dump_pipe_config [i915]] crtc timings: 27027 720 736 798 858 480 489 495 525, type: 0x0 flags: 0xa
>[  113.980549] [drm:intel_dump_pipe_config [i915]] port clock: 27027, pipe src size: 720x480, pixel rate 27027
>[  113.980576] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  113.980604] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  113.980633] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  113.980664] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>[  113.980692] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  113.980721] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] disabled, scaler_id = -1
>[  113.980748] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[  113.980775] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[  113.980804] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[  113.980832] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] FB:139, fb = 256x256 format = AR24 little-endian (0x34325241)
>[  113.980860] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+199+112 dst 1721x968+199+112
>[  113.980879] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000ca302471 state to 0000000017698420
>[  113.980893] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 00000000d26e3aaf state to 0000000017698420
>[  113.980922] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  113.980952] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13
>[  113.980986] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  113.981017] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>[  113.981052] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[  113.981083] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[  113.981118] [drm:skl_compute_wm [i915]] [PLANE:28:plane 1A] ddb (0 - 0) -> (0 - 988)
>[  113.981146] [drm:skl_compute_wm [i915]] [PLANE:48:cursor A] ddb (0 - 0) -> (988 - 1020)
>[  113.981162] [drm:drm_atomic_commit [drm]] committing 0000000017698420
>[  113.981521] [drm:intel_power_well_enable [i915]] enabling power well 2
>[  113.981590] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>[  113.981843] [drm:intel_dump_cdclk_state [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
>[  113.981904] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[  113.981933] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[  113.981962] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[  113.981989] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[  113.982017] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[  113.982046] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[  113.982075] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  113.982104] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[  113.982153] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 51
>[  113.982182] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  113.982303] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Enabling DP dual mode adaptor TMDS output
>[  113.983449] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  113.983540] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  113.984052] [drm:intel_hdmi_handle_sink_scrambling [i915]] [CONNECTOR:101:HDMI-A-1] scrambling=yes, TMDS bit clock ratio=1/10
>[  113.988213] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:101:HDMI-A-1], [ENCODER:100:DDI B]
>[  113.988244] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 52 bytes ELD
>[  113.988277] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 27027 (0x00030000)
>[  113.988305] [drm:hsw_audio_config_update [i915]] using automatic N
>[  114.005114] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[  114.005155] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[  114.005223] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  114.005286] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  114.005304] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  114.005354] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  114.005370] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 0000000017698420
>[  114.005383] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000017698420
>[  114.005397] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000008083dff4 state to 0000000017698420
>[  114.005410] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  114.005425] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  114.005434] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  114.005456] [drm:drm_atomic_commit [drm]] committing 0000000017698420
>[  114.021778] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  114.021796] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  114.021851] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  114.021864] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  114.021875] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  114.022398] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:48:cursor A] state 00000000e17c98bc
>[  114.022430] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:48:cursor A] state 00000000238cb403
>[  114.022479] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 117
>[  114.022510] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[  114.026579] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:48:cursor A] state 00000000e17c98bc
>[  114.026630] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 120
>[  114.026660] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  114.026692] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:48:cursor A] state 00000000238cb403
>[  114.026722] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 120
>[  114.026751] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  114.027906] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  114.027957] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  114.041717] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  114.041753] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  114.057122] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  114.057829] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  114.058574] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  114.058599] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  114.058616] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  114.058629] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  114.058641] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  114.058664] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[  114.058677] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[  114.058688] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[  114.058703] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  114.058714] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  114.058726] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  114.058784] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  114.058799] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x48 0xa
>[  114.058812] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  114.058825] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  114.058837] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  114.058850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  114.058862] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  114.058874] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  114.058887] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.058899] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.058912] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.058924] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.058936] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  114.058949] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  114.058961] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  114.059565] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  114.059600] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  114.059631] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  114.060057] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  114.060087] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  114.060118] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  114.060127] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  114.073045] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:48:cursor A] state 0000000046d73fba
>[  114.073109] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 120
>[  114.073140] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  114.191952] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  114.192010] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  114.220414] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  114.221141] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  114.221868] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  114.221891] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  114.221907] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  114.221920] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  114.221932] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  114.221954] [drm:drm_add_edid_modes [drm]] ELD monitor HDMI Analyzer
>[  114.221967] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[  114.221978] [drm:drm_add_edid_modes [drm]] ELD size 52, SAD count 6
>[  114.221990] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  114.222001] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 340000 kHz
>[  114.222013] [drm:drm_add_display_info [drm]] HF-VSDB: max TMDS clock 600000 kHz
>[  114.222067] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  114.222081] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x48 0xa
>[  114.222094] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  114.222107] [drm:drm_mode_debug_printmodeline [drm]] Modeline 215:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  114.222119] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  114.222132] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  114.222144] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  114.222156] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  114.222169] [drm:drm_mode_debug_printmodeline [drm]] Modeline 218:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.222181] [drm:drm_mode_debug_printmodeline [drm]] Modeline 219:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.222193] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.222206] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  114.222218] [drm:drm_mode_debug_printmodeline [drm]] Modeline 210:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  114.222230] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  114.222243] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  114.222869] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  114.222915] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  114.222945] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  114.223205] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  114.223235] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  114.223263] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  114.223272] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  114.225111] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:48:cursor A] state 000000003a368276
>[  114.225166] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 120
>[  114.225199] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  114.428858] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:48:cursor A] state 000000007538baff
>[  114.428912] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 117
>[  114.428942] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  114.428978] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:48:cursor A] state 000000003a368276
>[  114.429008] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 117
>[  114.429038] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  114.987674] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  114.987702] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[  114.987719] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 000000004f4f75dd
>[  114.987733] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000729a17c9 state to 000000004f4f75dd
>[  114.987746] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000729a17c9
>[  114.987758] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[  114.987848] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  114.987880] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  114.987914] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[  115.005079] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[  115.005100] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[  115.076605] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  115.076636] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  115.076656] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 0000000029268802
>[  115.076672] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 0000000029268802
>[  115.076687] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  115.076701] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  115.076762] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  115.076798] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.076825] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  115.088407] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  115.088433] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  115.131361] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  115.131387] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  115.131405] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 000000000a2c9793
>[  115.131417] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 000000000a2c9793
>[  115.131430] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  115.131442] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  115.131495] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  115.131525] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.131548] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  115.138556] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  115.138604] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  115.155647] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  115.155676] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  115.155695] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 00000000070b19ff
>[  115.155708] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 00000000070b19ff
>[  115.155722] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000c4a0afbe
>[  115.155734] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  115.155791] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  115.155847] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.155873] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  115.171893] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  115.171922] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  115.181424] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  115.181457] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  115.181478] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  115.181494] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000070b19ff
>[  115.181509] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  115.181533] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  115.181596] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  115.181632] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.181660] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  115.188596] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  115.188620] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  115.202037] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  115.202094] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  115.202125] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 000000000a2c9793
>[  115.202149] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 000000000a2c9793
>[  115.202173] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  115.202195] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  115.202279] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  115.202335] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.202376] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  115.205156] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  115.205192] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  115.216966] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  115.217004] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  115.217040] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000029268802
>[  115.217060] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 0000000029268802
>[  115.217079] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  115.217097] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  115.217168] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  115.217214] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.217248] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  115.221897] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  115.221922] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  115.232882] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  115.232916] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007fca3047
>[  115.232937] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000070b19ff state to 000000007fca3047
>[  115.232964] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001489adf9 state to 000000007fca3047
>[  115.232979] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000001489adf9
>[  115.232995] [drm:drm_atomic_check_only [drm]] checking 000000007fca3047
>[  115.233060] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  115.233099] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.233129] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007fca3047 nonblocking
>[  115.238568] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007fca3047
>[  115.238592] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007fca3047
>[  115.251809] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  115.251865] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  115.251896] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 0000000048cfd963
>[  115.251921] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 0000000048cfd963
>[  115.251944] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  115.251967] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  115.252051] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  115.252106] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.252147] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  115.255060] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  115.255079] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  115.265956] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  115.265993] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000003daeaefa
>[  115.266017] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 000000003daeaefa
>[  115.266036] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005ecb785e state to 000000003daeaefa
>[  115.266054] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000005ecb785e
>[  115.266071] [drm:drm_atomic_check_only [drm]] checking 000000003daeaefa
>[  115.266140] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  115.266183] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.266216] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000003daeaefa nonblocking
>[  115.271917] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000003daeaefa
>[  115.271943] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000003daeaefa
>[  115.284658] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  115.284702] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000be530318
>[  115.284730] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 00000000be530318
>[  115.284753] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000000f62e6e2 state to 00000000be530318
>[  115.284774] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 000000000f62e6e2
>[  115.284795] [drm:drm_atomic_check_only [drm]] checking 00000000be530318
>[  115.284875] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  115.284927] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.284965] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000be530318 nonblocking
>[  115.288446] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000be530318
>[  115.288467] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000be530318
>[  115.299724] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  115.299759] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  115.299802] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 000000000a2c9793
>[  115.299829] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 000000000a2c9793
>[  115.299847] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  115.299868] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  115.299941] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  115.299984] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.300018] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  115.305239] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  115.305264] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  115.684323] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  115.684373] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  115.684413] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 00000000da381020
>[  115.684439] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000da381020
>[  115.684464] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  115.684489] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  115.684577] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  115.684638] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  115.684680] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  115.688550] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  115.688589] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  116.288495] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  116.288576] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007fca3047
>[  116.288624] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 000000007fca3047
>[  116.288663] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 000000007fca3047
>[  116.288701] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000c4a0afbe
>[  116.288737] [drm:drm_atomic_check_only [drm]] checking 000000007fca3047
>[  116.288864] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  116.288955] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  116.289016] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007fca3047 nonblocking
>[  116.305131] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007fca3047
>[  116.305158] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007fca3047
>[  116.888585] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  116.888658] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  116.888701] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  116.888736] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000070b19ff
>[  116.888770] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  116.888802] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  116.888918] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  116.888999] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  116.889054] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  116.905238] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  116.905285] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  117.491954] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  117.492026] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  117.492074] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 000000000a2c9793
>[  117.492113] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 000000000a2c9793
>[  117.492151] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  117.492187] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  117.492315] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  117.492407] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  117.492470] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  117.505235] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  117.505287] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  117.778200] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:48:cursor A] state 00000000284e539a
>[  117.778250] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 120
>[  117.778280] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  117.778311] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:48:cursor A] state 000000003a368276
>[  117.778341] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 120
>[  117.778367] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  117.801732] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  117.801761] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bd2739b0
>[  117.801778] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000bd2739b0
>[  117.801792] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000284e539a state to 00000000bd2739b0
>[  117.801805] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000284e539a
>[  117.801817] [drm:drm_atomic_check_only [drm]] checking 00000000bd2739b0
>[  117.801871] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  117.801902] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  117.801926] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bd2739b0 nonblocking
>[  117.805092] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bd2739b0
>[  117.805111] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bd2739b0
>[  117.816712] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  117.816740] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  117.816759] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 00000000e08dfed9
>[  117.816773] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004ad54d74 state to 00000000e08dfed9
>[  117.816786] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000004ad54d74
>[  117.816798] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  117.816851] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  117.816882] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  117.816907] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  117.821889] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  117.821915] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  118.056750] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  118.056815] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  118.056857] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 00000000da381020
>[  118.056892] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 00000000da381020
>[  118.056925] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  118.056957] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  118.057072] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  118.057153] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  118.057208] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  118.071892] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  118.071921] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  118.932398] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  118.932426] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  118.932443] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 00000000da381020
>[  118.932456] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001489adf9 state to 00000000da381020
>[  118.932468] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000001489adf9
>[  118.932488] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  118.932543] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  118.932572] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  118.932596] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  118.938586] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  118.938626] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  119.466346] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  119.466372] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  119.466389] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 000000000a2c9793
>[  119.466403] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 000000000a2c9793
>[  119.466415] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  119.466426] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  119.466480] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  119.466509] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  119.466533] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  119.471783] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  119.471818] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  119.502609] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  119.502636] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  119.502654] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 00000000070b19ff
>[  119.502668] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 00000000070b19ff
>[  119.502680] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  119.502692] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  119.502747] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  119.502777] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  119.502803] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  119.521889] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  119.521919] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  119.526771] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  119.526818] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  119.526849] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  119.526873] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000070b19ff
>[  119.526896] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  119.526919] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  119.527014] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  119.527070] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  119.527113] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  119.538549] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  119.538591] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  119.548461] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  119.548500] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  119.548526] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 000000000a2c9793
>[  119.548547] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 000000000a2c9793
>[  119.548566] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  119.548585] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  119.548670] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  119.548716] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  119.548753] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  119.555225] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  119.555253] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  119.564159] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  119.564218] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  119.564255] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 00000000da381020
>[  119.564284] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 00000000da381020
>[  119.564311] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000c4a0afbe
>[  119.564338] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  119.564450] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  119.564517] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  119.564564] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  119.571919] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  119.571952] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  119.580730] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  119.580779] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  119.580811] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 00000000da381020
>[  119.580835] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 00000000da381020
>[  119.580858] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000006566c198
>[  119.580880] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  119.580970] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  119.581032] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  119.581073] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  119.588573] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  119.588610] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  122.167243] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  122.167270] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  122.167287] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 000000000a2c9793
>[  122.167300] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 000000000a2c9793
>[  122.167312] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  122.167324] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  122.167380] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  122.167409] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.167433] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  122.171966] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  122.171989] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  122.182666] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  122.182698] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  122.182716] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 00000000070b19ff
>[  122.182730] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000070b19ff
>[  122.182743] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  122.182757] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  122.182813] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  122.182845] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.182870] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  122.188560] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  122.188585] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  122.757168] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:48:cursor A] state 000000003f97fc6a
>[  122.757224] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 117
>[  122.757255] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.757287] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:48:cursor A] state 00000000a7ddfa61
>[  122.757318] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 117
>[  122.757346] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.757484] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  122.757509] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  122.757525] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  122.757538] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 00000000070b19ff
>[  122.757551] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  122.757563] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  122.757599] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  122.757626] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.757650] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  122.771944] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  122.771970] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  122.782951] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  122.782979] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  122.782997] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  122.783010] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083a4bf3c state to 00000000b62eef4c
>[  122.783023] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000083a4bf3c
>[  122.783035] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  122.783090] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  122.783120] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.783145] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  122.788550] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  122.788576] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  122.797676] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  122.797717] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000038708f7a
>[  122.797744] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000937ac5a5 state to 0000000038708f7a
>[  122.797765] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f78f8a0f state to 0000000038708f7a
>[  122.797785] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000f78f8a0f
>[  122.797805] [drm:drm_atomic_check_only [drm]] checking 0000000038708f7a
>[  122.797880] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  122.797929] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.797964] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000038708f7a nonblocking
>[  122.805233] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000038708f7a
>[  122.805265] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000038708f7a
>[  122.814299] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  122.814350] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e19387aa
>[  122.814384] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000e19387aa
>[  122.814410] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aea61ad9 state to 00000000e19387aa
>[  122.814435] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000aea61ad9
>[  122.814459] [drm:drm_atomic_check_only [drm]] checking 00000000e19387aa
>[  122.814549] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  122.814610] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.814654] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e19387aa nonblocking
>[  122.821875] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e19387aa
>[  122.821902] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e19387aa
>[  122.830438] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  122.830490] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  122.830523] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b62eef4c state to 00000000680219a0
>[  122.830549] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c9165954 state to 00000000680219a0
>[  122.830574] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000c9165954
>[  122.830598] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  122.830688] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  122.830748] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.830792] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  122.838578] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  122.838616] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  122.860717] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  122.860746] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  122.860764] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000680219a0
>[  122.860778] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b16edfec state to 00000000680219a0
>[  122.860791] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000b16edfec
>[  122.860804] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  122.860860] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  122.860892] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.860917] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  122.871889] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  122.871919] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  122.893746] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  122.893778] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000001489adf9 state to 000000000a2c9793
>[  122.893806] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 000000000a2c9793
>[  122.893829] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 000000001489adf9 to [NOCRTC]
>[  122.893852] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000001489adf9
>[  122.893875] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  122.893957] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb -1
>[  122.894013] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[  122.894052] [drm:drm_atomic_commit [drm]] committing 000000000a2c9793
>[  122.894140] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  122.894168] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  122.929873] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  122.929946] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  122.929985] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 000000000a2c9793
>[  122.930016] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 000000000a2c9793
>[  122.930046] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  122.930076] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  122.930180] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  122.930253] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.930301] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  122.938397] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  122.938418] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  122.944921] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  122.944952] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  122.944972] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000029268802
>[  122.944986] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 0000000029268802
>[  122.945000] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  122.945014] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  122.945072] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  122.945109] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  122.945135] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  122.955218] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  122.955249] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  123.499664] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  123.499729] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[  123.499772] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f281e966 state to 000000008044e50c
>[  123.499852] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000050776d58 state to 000000008044e50c
>[  123.499896] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000050776d58
>[  123.499932] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[  123.500065] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  123.500149] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  123.500204] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[  123.505241] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[  123.505292] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[  124.102147] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  124.102220] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[  124.102268] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 000000008044e50c
>[  124.102307] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000026a82688 state to 000000008044e50c
>[  124.102345] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000026a82688
>[  124.102381] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[  124.102509] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  124.102600] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  124.102660] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[  124.105142] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[  124.105193] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[  124.703107] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  124.703188] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  124.703236] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 000000000a2c9793
>[  124.703275] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 000000000a2c9793
>[  124.703313] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  124.703349] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  124.703476] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  124.703567] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  124.703626] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  124.721900] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  124.721954] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  125.303467] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  125.303547] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  125.303595] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 00000000da381020
>[  125.303634] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 00000000da381020
>[  125.303671] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  125.303717] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  125.303847] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  125.303988] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  125.304056] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  125.305135] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  125.305184] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  125.904442] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  125.904523] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007fca3047
>[  125.904572] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000070b19ff state to 000000007fca3047
>[  125.904611] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 000000007fca3047
>[  125.904658] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  125.904697] [drm:drm_atomic_check_only [drm]] checking 000000007fca3047
>[  125.904826] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  125.904918] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  125.904978] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007fca3047 nonblocking
>[  125.921914] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007fca3047
>[  125.921967] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007fca3047
>[  126.505533] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  126.505613] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  126.505662] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 0000000048cfd963
>[  126.505702] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 0000000048cfd963
>[  126.505749] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  126.505788] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  126.505917] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  126.506007] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  126.506067] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  126.521914] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  126.521967] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  126.595115] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  126.595159] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  126.595187] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 00000000b9d71aea
>[  126.595220] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 00000000b9d71aea
>[  126.595242] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000006566c198
>[  126.595263] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  126.595344] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  126.595396] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  126.595433] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  126.605218] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  126.605249] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  126.777776] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  126.777820] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[  126.777848] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 00000000f281e966
>[  126.777871] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000050776d58 state to 00000000f281e966
>[  126.777892] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000050776d58
>[  126.777913] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[  126.777994] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  126.778046] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  126.778083] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[  126.788555] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[  126.788587] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[  126.944728] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  126.944775] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[  126.944805] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 00000000565de791
>[  126.944830] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a821c0e7 state to 00000000565de791
>[  126.944854] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a821c0e7
>[  126.944876] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[  126.944960] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  126.945016] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  126.945055] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[  126.955221] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[  126.955255] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[  127.516486] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  127.516560] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[  127.516609] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 000000004f4f75dd
>[  127.516649] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f9955c73 state to 000000004f4f75dd
>[  127.516687] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000f9955c73
>[  127.516723] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[  127.516850] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  127.516940] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  127.516998] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[  127.521904] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[  127.521955] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[  127.692473] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  127.692546] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e19387aa
>[  127.692594] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000937ac5a5 state to 00000000e19387aa
>[  127.692634] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001abc75a3 state to 00000000e19387aa
>[  127.692671] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000001abc75a3
>[  127.692707] [drm:drm_atomic_check_only [drm]] checking 00000000e19387aa
>[  127.692835] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  127.692927] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  127.692986] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e19387aa nonblocking
>[  127.705100] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e19387aa
>[  127.705131] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e19387aa
>[  127.727644] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  127.727673] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e19387aa
>[  127.727690] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000e19387aa
>[  127.727704] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009b04f243 state to 00000000e19387aa
>[  127.727716] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000009b04f243
>[  127.727729] [drm:drm_atomic_check_only [drm]] checking 00000000e19387aa
>[  127.727782] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  127.727871] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  127.727912] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e19387aa nonblocking
>[  127.738386] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e19387aa
>[  127.738404] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e19387aa
>[  127.924364] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  127.924400] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[  127.924423] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 000000006ad8c40c
>[  127.924441] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000d859c2f6 state to 000000006ad8c40c
>[  127.924458] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000d859c2f6
>[  127.924474] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[  127.924543] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  127.924583] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  127.924613] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[  127.938569] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[  127.938605] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[  128.499771] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  128.499862] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[  128.499905] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000be530318 state to 000000004f4f75dd
>[  128.499939] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006dcb7e8f state to 000000004f4f75dd
>[  128.499973] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000006dcb7e8f
>[  128.500005] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[  128.500120] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  128.500201] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  128.500253] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[  128.505174] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[  128.505225] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[  129.101990] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  129.102070] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  129.102119] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000029268802
>[  129.102158] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 0000000029268802
>[  129.102196] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000c4a0afbe
>[  129.102232] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  129.102359] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  129.102450] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  129.102510] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  129.105146] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  129.105198] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  129.639028] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  129.639094] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  129.639137] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 0000000029268802
>[  129.639172] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 0000000029268802
>[  129.639205] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000006566c198
>[  129.639237] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  129.639351] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  129.639432] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  129.639486] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  129.655229] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  129.655276] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  130.140574] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  130.140639] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  130.140681] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b62eef4c state to 00000000680219a0
>[  130.140716] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009b04f243 state to 00000000680219a0
>[  130.140750] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000009b04f243
>[  130.140782] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  130.140898] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  130.140980] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.141033] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  130.155230] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  130.155266] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  130.183378] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  130.183411] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  130.183432] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000680219a0
>[  130.183448] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dee14694 state to 00000000680219a0
>[  130.183463] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000dee14694
>[  130.183478] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  130.183540] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  130.183577] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.183604] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  130.188552] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  130.188592] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  130.216042] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  130.216096] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e19387aa
>[  130.216132] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000937ac5a5 state to 00000000e19387aa
>[  130.216161] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004c1df376 state to 00000000e19387aa
>[  130.216188] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000004c1df376
>[  130.216215] [drm:drm_atomic_check_only [drm]] checking 00000000e19387aa
>[  130.216313] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  130.216380] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.216424] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e19387aa nonblocking
>[  130.221881] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e19387aa
>[  130.221908] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e19387aa
>[  130.248079] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  130.248120] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  130.248147] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 0000000017698420
>[  130.248168] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e08c7698 state to 0000000017698420
>[  130.248189] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e08c7698
>[  130.248208] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  130.248285] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  130.248334] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.248368] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  130.255129] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  130.255167] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  130.282976] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  130.283009] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  130.283031] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000070b19ff state to 0000000048cfd963
>[  130.283057] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 0000000048cfd963
>[  130.283073] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  130.283089] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  130.283154] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  130.283192] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.283222] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  130.288421] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  130.288445] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  130.299041] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  130.299085] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  130.299114] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 0000000048cfd963
>[  130.299148] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 0000000048cfd963
>[  130.299169] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  130.299190] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  130.299270] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  130.299322] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.299360] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  130.305215] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  130.305246] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  130.333296] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  130.333336] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e19387aa
>[  130.333361] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000e19387aa
>[  130.333381] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007c3039c1 state to 00000000e19387aa
>[  130.333400] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000007c3039c1
>[  130.333419] [drm:drm_atomic_check_only [drm]] checking 00000000e19387aa
>[  130.333491] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  130.333536] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.333569] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e19387aa nonblocking
>[  130.338543] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e19387aa
>[  130.338571] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e19387aa
>[  130.368140] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  130.368206] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  130.368249] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000e08dfed9
>[  130.368284] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004f30a82e state to 00000000e08dfed9
>[  130.368317] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000004f30a82e
>[  130.368349] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  130.368465] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  130.368546] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.368599] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  130.371925] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  130.371957] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  130.398334] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  130.398381] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  130.398422] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 00000000b9d71aea
>[  130.398447] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 00000000b9d71aea
>[  130.398470] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  130.398493] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  130.398577] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  130.398633] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.398673] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  130.405220] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  130.405246] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  130.860769] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  130.860819] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  130.860852] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  130.860878] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007c3039c1 state to 00000000b62eef4c
>[  130.860904] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000007c3039c1
>[  130.860928] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  130.861018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  130.861078] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  130.861120] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  130.871909] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  130.871944] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  131.165787] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  131.165827] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000038708f7a
>[  131.165852] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 0000000038708f7a
>[  131.165872] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004c1df376 state to 0000000038708f7a
>[  131.165891] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000004c1df376
>[  131.165909] [drm:drm_atomic_check_only [drm]] checking 0000000038708f7a
>[  131.165982] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  131.166028] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  131.166061] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000038708f7a nonblocking
>[  131.171922] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000038708f7a
>[  131.171952] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000038708f7a
>[  131.329004] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  131.329064] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[  131.329103] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 00000000565de791
>[  131.329135] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006dcb7e8f state to 00000000565de791
>[  131.329165] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000006dcb7e8f
>[  131.329195] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[  131.329301] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  131.329375] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  131.329423] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[  131.338552] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[  131.338594] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[  131.477801] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  131.477845] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  131.477873] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 00000000e08dfed9
>[  131.477896] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 00000000e08dfed9
>[  131.477917] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  131.477938] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  131.478018] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  131.478071] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  131.478108] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  131.488552] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  131.488594] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  131.610678] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  131.610709] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[  131.610728] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 00000000f281e966
>[  131.610742] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000d859c2f6 state to 00000000f281e966
>[  131.610756] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000d859c2f6
>[  131.610769] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[  131.610827] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  131.610860] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  131.610886] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[  131.621892] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[  131.621923] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[  131.761997] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  131.762043] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  131.762075] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000937ac5a5
>[  131.762100] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dee14694 state to 00000000937ac5a5
>[  131.762123] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000dee14694
>[  131.762145] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  131.762230] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  131.762286] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  131.762325] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  131.771922] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  131.771964] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  131.911680] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  131.911735] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bd2739b0
>[  131.911771] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 00000000bd2739b0
>[  131.911838] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 00000000bd2739b0
>[  131.911873] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  131.911900] [drm:drm_atomic_check_only [drm]] checking 00000000bd2739b0
>[  131.912013] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  131.912086] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  131.912137] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bd2739b0 nonblocking
>[  131.921893] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bd2739b0
>[  131.921931] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bd2739b0
>[  132.078717] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  132.078767] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[  132.078800] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008044e50c state to 00000000565de791
>[  132.078826] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f9955c73 state to 00000000565de791
>[  132.078851] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000f9955c73
>[  132.078876] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[  132.078967] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  132.079028] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  132.079069] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[  132.088503] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[  132.088549] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[  132.228129] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  132.228179] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  132.228224] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 000000000a2c9793
>[  132.228250] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 000000000a2c9793
>[  132.228275] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  132.228300] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  132.228391] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  132.228452] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  132.228493] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  132.238565] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  132.238601] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  132.394356] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  132.394388] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  132.394407] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b62eef4c state to 00000000680219a0
>[  132.394423] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009b04f243 state to 00000000680219a0
>[  132.394437] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000009b04f243
>[  132.394451] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  132.394512] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  132.394547] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  132.394574] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  132.405222] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  132.405254] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  132.956161] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  132.956227] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  132.956266] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 00000000b9d71aea
>[  132.956298] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 00000000b9d71aea
>[  132.956328] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  132.956357] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  132.956463] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  132.956536] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  132.956584] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  132.971892] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  132.971934] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  133.558542] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  133.558621] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  133.558670] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  133.558709] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 00000000070b19ff
>[  133.558747] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  133.558784] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  133.558911] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  133.559002] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  133.559061] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  133.571919] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  133.571971] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  134.159701] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  134.159782] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  134.159871] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000070b19ff state to 0000000048cfd963
>[  134.159918] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 0000000048cfd963
>[  134.159967] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  134.160004] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  134.160143] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  134.160243] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  134.160309] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  134.171918] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  134.171970] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  134.759697] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  134.759777] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  134.759872] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 00000000da381020
>[  134.759921] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 00000000da381020
>[  134.759969] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  134.760007] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  134.760143] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  134.760243] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  134.760311] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  134.771947] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  134.771999] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  135.290709] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  135.290753] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  135.290781] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000029268802
>[  135.290804] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 0000000029268802
>[  135.290830] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  135.290851] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  135.290932] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  135.290984] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  135.291021] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  135.305223] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  135.305249] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  135.860212] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  135.860284] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  135.860328] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b9d71aea state to 0000000029268802
>[  135.860362] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 0000000029268802
>[  135.860396] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000006566c198
>[  135.860428] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  135.860544] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  135.860625] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  135.860678] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  135.871925] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  135.871972] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  136.243900] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  136.243973] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  136.244021] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000070b19ff state to 00000000da381020
>[  136.244060] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 00000000da381020
>[  136.244098] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000c4a0afbe
>[  136.244134] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  136.244260] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  136.244351] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  136.244411] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  136.255250] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  136.255275] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  136.278312] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  136.278359] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  136.278400] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 0000000048cfd963
>[  136.278425] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 0000000048cfd963
>[  136.278448] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000006566c198
>[  136.278470] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  136.278557] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  136.278613] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  136.278651] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  136.288562] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  136.288595] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  136.513286] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  136.513358] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  136.513406] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 00000000070b19ff
>[  136.513445] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000070b19ff
>[  136.513482] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  136.513519] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  136.513644] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  136.513735] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  136.513795] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  136.521907] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  136.521958] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  137.084950] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  137.085022] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  137.085070] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  137.085110] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009b04f243 state to 00000000b62eef4c
>[  137.085148] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000009b04f243
>[  137.085184] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  137.085311] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  137.085402] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  137.085461] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  137.088458] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  137.088510] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  137.233736] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  137.233770] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  137.233792] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  137.233809] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 00000000070b19ff
>[  137.233826] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000006566c198
>[  137.233841] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  137.233915] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  137.233954] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  137.233983] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  137.238477] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  137.238500] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  137.244607] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  137.244653] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  137.244683] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 00000000b9d71aea
>[  137.244718] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 00000000b9d71aea
>[  137.244741] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  137.244764] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  137.244851] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  137.244908] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  137.244946] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  137.255221] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  137.255255] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  137.812938] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  137.813011] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000680219a0
>[  137.813060] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b62eef4c state to 00000000680219a0
>[  137.813099] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009b04f243 state to 00000000680219a0
>[  137.813137] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000009b04f243
>[  137.813173] [drm:drm_atomic_check_only [drm]] checking 00000000680219a0
>[  137.813300] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  137.813391] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  137.813450] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000680219a0 nonblocking
>[  137.821902] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000680219a0
>[  137.821953] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000680219a0
>[  137.862341] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  137.862411] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029268802
>[  137.862449] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000029268802
>[  137.862481] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 0000000029268802
>[  137.862511] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  137.862540] [drm:drm_atomic_check_only [drm]] checking 0000000029268802
>[  137.862645] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  137.862718] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  137.862766] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029268802 nonblocking
>[  137.871904] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029268802
>[  137.871945] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029268802
>[  137.896642] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  137.896715] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[  137.896765] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000003daeaefa state to 000000006ad8c40c
>[  137.896804] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a821c0e7 state to 000000006ad8c40c
>[  137.896841] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a821c0e7
>[  137.896878] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[  137.897004] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  137.897096] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  137.897155] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[  137.905169] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[  137.905220] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[  138.313273] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  138.313346] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000038708f7a
>[  138.313394] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 0000000038708f7a
>[  138.313434] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001abc75a3 state to 0000000038708f7a
>[  138.313471] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000001abc75a3
>[  138.313508] [drm:drm_atomic_check_only [drm]] checking 0000000038708f7a
>[  138.313637] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  138.313729] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  138.313787] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000038708f7a nonblocking
>[  138.321784] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000038708f7a
>[  138.321804] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000038708f7a
>[  138.461818] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  138.461857] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  138.461882] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000937ac5a5
>[  138.461902] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b16edfec state to 00000000937ac5a5
>[  138.461920] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000b16edfec
>[  138.461939] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  138.462012] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  138.462058] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  138.462091] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  138.471900] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  138.471934] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  139.053915] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  139.053973] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  139.054012] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  139.054044] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c9165954 state to 00000000b62eef4c
>[  139.054074] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000c9165954
>[  139.054103] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  139.054208] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  139.054282] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  139.054330] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  139.071898] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  139.071941] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  139.655206] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  139.655278] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  139.655327] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  139.655366] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aea61ad9 state to 00000000b62eef4c
>[  139.655404] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000aea61ad9
>[  139.655440] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  139.655567] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  139.655658] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  139.655717] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  139.671915] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  139.671966] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  140.255726] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  140.255855] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  140.255920] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 000000000a2c9793
>[  140.255969] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 000000000a2c9793
>[  140.256015] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  140.256057] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  140.256191] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  140.256283] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  140.256348] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000a2c9793 nonblocking
>[  140.271897] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000a2c9793
>[  140.271929] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000a2c9793
>[  140.856418] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  140.856499] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  140.856548] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000048cfd963
>[  140.856587] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 0000000048cfd963
>[  140.856632] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  140.856669] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  140.856797] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  140.856888] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  140.856948] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  140.871922] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  140.871974] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  141.457587] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  141.457669] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  141.457717] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000b9d71aea
>[  141.457756] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 00000000b9d71aea
>[  141.457802] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  141.457838] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  141.457967] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  141.458059] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  141.458118] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  141.471917] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  141.471970] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  142.058610] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  142.058691] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  142.058740] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 00000000070b19ff
>[  142.058779] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 00000000070b19ff
>[  142.058825] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  142.058861] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  142.058990] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  142.059082] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  142.059141] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  142.071921] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  142.071973] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  142.659641] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  142.659722] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000070b19ff
>[  142.659770] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000070b19ff
>[  142.659868] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 00000000070b19ff
>[  142.659916] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  142.659956] [drm:drm_atomic_check_only [drm]] checking 00000000070b19ff
>[  142.660103] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  142.660198] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  142.660263] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000070b19ff nonblocking
>[  142.671935] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000070b19ff
>[  142.671987] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000070b19ff
>[  143.260595] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  143.260676] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  143.260724] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 00000000b9d71aea
>[  143.260763] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 00000000b9d71aea
>[  143.260809] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000006566c198
>[  143.260845] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  143.260973] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  143.261064] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  143.261123] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  143.271912] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  143.271965] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  143.861619] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  143.861701] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  143.861750] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 0000000048cfd963
>[  143.861789] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 0000000048cfd963
>[  143.861834] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  143.861870] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  143.861999] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  143.862090] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  143.862150] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  143.871914] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  143.871966] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  144.462634] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  144.462716] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  144.462764] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000048cfd963
>[  144.462803] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 0000000048cfd963
>[  144.462841] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000c4a0afbe
>[  144.462885] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  144.463015] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  144.463107] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  144.463166] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  144.471913] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  144.471965] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  145.062131] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  145.062159] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  145.062177] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000b9d71aea
>[  145.062190] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 00000000b9d71aea
>[  145.062203] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000e36eeca9
>[  145.062216] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  145.062271] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  145.062302] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  145.062329] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  145.071778] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  145.071813] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  145.407737] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  145.407841] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  145.407899] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000070b19ff state to 00000000da381020
>[  145.407936] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006566c198 state to 00000000da381020
>[  145.407970] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000006566c198
>[  145.408008] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  145.408133] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  145.408216] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  145.408273] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  145.421908] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  145.421941] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  145.980763] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  145.980842] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  145.980890] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 00000000b9d71aea
>[  145.980929] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 00000000b9d71aea
>[  145.980967] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  145.981003] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  145.981130] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  145.981221] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  145.981280] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  145.988560] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  145.988594] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  146.581935] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  146.582015] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  146.582064] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000029268802 state to 0000000048cfd963
>[  146.582103] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 0000000048cfd963
>[  146.582140] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  146.582176] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  146.582302] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  146.582393] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  146.582452] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  146.588585] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  146.588637] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  147.183182] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  147.183263] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000048cfd963
>[  147.183311] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000000a2c9793 state to 0000000048cfd963
>[  147.183350] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000003f97fc6a state to 0000000048cfd963
>[  147.183388] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000003f97fc6a
>[  147.183424] [drm:drm_atomic_check_only [drm]] checking 0000000048cfd963
>[  147.183550] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  147.183642] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  147.183701] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000048cfd963 nonblocking
>[  147.188580] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000048cfd963
>[  147.188632] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000048cfd963
>[  147.783135] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  147.783223] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b9d71aea
>[  147.783275] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000070b19ff state to 00000000b9d71aea
>[  147.783316] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a7ddfa61 state to 00000000b9d71aea
>[  147.783354] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000a7ddfa61
>[  147.783391] [drm:drm_atomic_check_only [drm]] checking 00000000b9d71aea
>[  147.783518] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  147.783610] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  147.783671] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b9d71aea nonblocking
>[  147.788551] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b9d71aea
>[  147.788578] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b9d71aea
>[  148.384975] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  148.385056] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000da381020
>[  148.385105] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007fca3047 state to 00000000da381020
>[  148.385144] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000014a4f987 state to 00000000da381020
>[  148.385182] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000014a4f987
>[  148.385227] [drm:drm_atomic_check_only [drm]] checking 00000000da381020
>[  148.385356] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  148.385446] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  148.385505] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000da381020 nonblocking
>[  148.388475] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000da381020
>[  148.388527] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000da381020
>[  148.986127] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  148.986199] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  148.986247] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  148.986286] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aea61ad9 state to 00000000b62eef4c
>[  148.986324] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000aea61ad9
>[  148.986360] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  148.986490] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  148.986581] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  148.986640] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  148.988550] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  148.988604] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  148.988657] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  148.988700] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  148.988740] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  149.587481] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  149.587547] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  149.587589] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000937ac5a5
>[  149.587624] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c9165954 state to 00000000937ac5a5
>[  149.587658] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000c9165954
>[  149.587690] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  149.587807] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  149.587939] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  149.588001] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  149.605226] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  149.605273] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  150.188779] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  150.188852] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  150.188899] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000937ac5a5
>[  150.188938] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f78f8a0f state to 00000000937ac5a5
>[  150.188975] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000f78f8a0f
>[  150.189012] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  150.189141] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  150.189232] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  150.189292] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  150.205248] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  150.205300] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  150.789783] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  150.789856] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  150.789903] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  150.789942] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000083a4bf3c state to 00000000b62eef4c
>[  150.789980] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000083a4bf3c
>[  150.790016] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  150.790145] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  150.790236] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  150.790296] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  150.805245] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  150.805298] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  151.390879] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  151.390952] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  151.391000] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  151.391040] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f78f8a0f state to 00000000b62eef4c
>[  151.391077] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000f78f8a0f
>[  151.391114] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  151.391243] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  151.391335] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  151.391394] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  151.405242] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  151.405294] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  151.991761] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  151.991858] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  151.991906] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000937ac5a5
>[  151.991945] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c9165954 state to 00000000937ac5a5
>[  151.991982] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000c9165954
>[  151.992019] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  151.992148] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  151.992239] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  151.992299] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  152.005225] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  152.005271] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  152.592769] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  152.592843] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  152.592892] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000937ac5a5
>[  152.592931] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000aea61ad9 state to 00000000937ac5a5
>[  152.592968] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000aea61ad9
>[  152.593005] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  152.593133] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  152.593225] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  152.593284] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  152.605244] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  152.605297] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  153.193815] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  153.193887] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  153.193936] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  153.193974] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b16edfec state to 00000000b62eef4c
>[  153.194012] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000b16edfec
>[  153.194048] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  153.194177] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  153.194268] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  153.194328] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  153.205245] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  153.205297] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  153.794762] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  153.794836] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  153.794884] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  153.794923] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001abc75a3 state to 00000000b62eef4c
>[  153.794960] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000001abc75a3
>[  153.794997] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  153.795126] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  153.795218] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  153.795277] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  153.805240] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  153.805292] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  154.395853] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  154.395926] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  154.395974] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000937ac5a5
>[  154.396013] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009b04f243 state to 00000000937ac5a5
>[  154.396051] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000009b04f243
>[  154.396087] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  154.396216] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  154.396308] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  154.396368] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  154.405244] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  154.405296] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  154.996855] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  154.996930] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  154.996978] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000937ac5a5
>[  154.997018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dee14694 state to 00000000937ac5a5
>[  154.997055] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 00000000dee14694
>[  154.997092] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  154.997220] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  154.997311] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  154.997371] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  155.005245] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  155.005297] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  155.597832] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  155.597905] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  155.597953] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  155.597992] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004c1df376 state to 00000000b62eef4c
>[  155.598029] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000004c1df376
>[  155.598066] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  155.598195] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  155.598286] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  155.598346] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  155.605238] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  155.605290] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  156.198788] [drm:drm_mode_addfb2 [drm]] [FB:115]
>[  156.198861] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  156.198909] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000680219a0 state to 00000000b62eef4c
>[  156.198948] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000007c3039c1 state to 00000000b62eef4c
>[  156.198986] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:115] for [PLANE:28:plane 1A] state 000000007c3039c1
>[  156.199022] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  156.199150] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  156.199242] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  156.199302] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  156.205240] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  156.205292] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  196.434639] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[  196.434746] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[  196.434917] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  196.435016] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[  196.435124] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  196.436094] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  196.436178] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  196.463420] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  196.464237] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  196.465059] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  196.465111] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  196.465933] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007fca3047
>[  196.465984] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000da381020 state to 000000007fca3047
>[  196.466024] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000007fca3047
>[  196.466067] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000009630efb1 state to 000000007fca3047
>[  196.466104] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 000000007fca3047
>[  196.466143] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e36eeca9 state to 000000007fca3047
>[  196.466182] [drm:drm_atomic_check_only [drm]] checking 000000007fca3047
>[  196.466214] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  196.466237] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  196.466258] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: y
>[  196.466294] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000007fca3047
>[  196.466330] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 000000007fca3047
>[  196.466445] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[  196.466535] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  196.466636] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[  196.466723] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[  196.466816] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  196.466908] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[  196.466995] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[  196.467083] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[  196.467164] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  196.467244] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  196.467291] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  196.467373] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  196.467415] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  196.467500] [drm:intel_dump_pipe_config [i915]] crtc timings: 27027 720 736 798 858 480 489 495 525, type: 0x0 flags: 0xa
>[  196.467581] [drm:intel_dump_pipe_config [i915]] port clock: 27027, pipe src size: 720x480, pixel rate 27027
>[  196.467661] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  196.467741] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  196.467821] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  196.467959] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8c00, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x1bac71, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x42
>[  196.468030] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  196.468109] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:115, fb = 720x480 format = XR24 little-endian (0x34325258)
>[  196.468180] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+720+480 dst 0x0+720+480
>[  196.468254] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[  196.468327] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[  196.468396] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[  196.468468] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] disabled, scaler_id = -1
>[  196.468547] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  196.468618] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13
>[  196.468707] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  196.468783] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>[  196.468868] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[  196.468937] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[  196.468982] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000070b19ff state to 000000007fca3047
>[  196.469016] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 00000000b9d71aea state to 000000007fca3047
>[  196.469062] [drm:drm_atomic_commit [drm]] committing 000000007fca3047
>[  196.469181] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[  196.469257] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  196.469401] [drm:intel_hdmi_handle_sink_scrambling [i915]] [CONNECTOR:101:HDMI-A-1] scrambling=no, TMDS bit clock ratio=1/10
>[  196.474157] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  196.489414] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  196.489511] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Disabling DP dual mode adaptor TMDS output
>[  196.490740] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 51
>[  196.490850] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  196.490949] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[  196.491027] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[  196.491101] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[  196.491175] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[  196.491247] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[  196.491326] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[  196.491401] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  196.491474] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[  196.491591] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 51
>[  196.491665] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  196.491876] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Enabling DP dual mode adaptor TMDS output
>[  196.493099] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  196.493278] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  196.493387] [drm:intel_hdmi_handle_sink_scrambling [i915]] [CONNECTOR:101:HDMI-A-1] scrambling=yes, TMDS bit clock ratio=1/10
>[  196.497023] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:101:HDMI-A-1], [ENCODER:100:DDI B]
>[  196.497120] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 52 bytes ELD
>[  196.497215] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 27027 (0x00030000)
>[  196.497300] [drm:hsw_audio_config_update [i915]] using automatic N
>[  196.514042] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[  196.514153] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[  196.514297] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  197.469359] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[  197.469464] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[  197.469633] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  197.469732] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[  197.469840] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  197.483321] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  197.483414] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  197.498047] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  197.498789] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  197.499660] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  197.499713] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  197.500570] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000a2c9793
>[  197.500621] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 000000000a2c9793
>[  197.500666] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000000a2c9793
>[  197.500709] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000001ff148da state to 000000000a2c9793
>[  197.500746] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 000000000a2c9793
>[  197.500785] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c4a0afbe state to 000000000a2c9793
>[  197.500826] [drm:drm_atomic_check_only [drm]] checking 000000000a2c9793
>[  197.500862] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  197.500885] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  197.500907] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: y
>[  197.500943] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000000a2c9793
>[  197.500980] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 000000000a2c9793
>[  197.501087] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[  197.501181] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[  197.501280] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[  197.501369] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[  197.501463] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  197.501553] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[  197.501640] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[  197.501729] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[  197.501810] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  197.501891] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  197.501940] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  197.502023] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  197.502066] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  197.502155] [drm:intel_dump_pipe_config [i915]] crtc timings: 27027 720 736 798 858 480 489 495 525, type: 0x0 flags: 0xa
>[  197.502237] [drm:intel_dump_pipe_config [i915]] port clock: 27027, pipe src size: 720x480, pixel rate 27027
>[  197.502319] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  197.502404] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  197.502484] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  197.502579] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8c00, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x1bac71, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x42
>[  197.502665] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  197.502749] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:115, fb = 720x480 format = XR24 little-endian (0x34325258)
>[  197.502832] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+720+480 dst 0x0+720+480
>[  197.502917] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[  197.502998] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[  197.503078] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[  197.503162] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] disabled, scaler_id = -1
>[  197.503252] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  197.503334] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13
>[  197.503435] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 115
>[  197.503519] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>[  197.503620] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[  197.503709] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[  197.503758] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 0000000029268802 state to 000000000a2c9793
>[  197.503829] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 00000000dff05046 state to 000000000a2c9793
>[  197.503896] [drm:drm_atomic_commit [drm]] committing 000000000a2c9793
>[  197.504036] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[  197.504135] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  197.504323] [drm:intel_hdmi_handle_sink_scrambling [i915]] [CONNECTOR:101:HDMI-A-1] scrambling=no, TMDS bit clock ratio=1/10
>[  197.509033] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  197.514665] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  197.514750] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Disabling DP dual mode adaptor TMDS output
>[  197.515943] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 51
>[  197.516017] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  197.516076] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[  197.516122] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[  197.516166] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[  197.516209] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[  197.516251] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[  197.516297] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[  197.516340] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  197.516385] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[  197.516456] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 51
>[  197.516499] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  197.516655] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Enabling DP dual mode adaptor TMDS output
>[  197.517755] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  197.517863] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  197.517922] [drm:intel_hdmi_handle_sink_scrambling [i915]] [CONNECTOR:101:HDMI-A-1] scrambling=yes, TMDS bit clock ratio=1/10
>[  197.522377] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:101:HDMI-A-1], [ENCODER:100:DDI B]
>[  197.522419] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 52 bytes ELD
>[  197.522460] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 27027 (0x00030000)
>[  197.522494] [drm:hsw_audio_config_update [i915]] using automatic N
>[  197.539393] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[  197.539464] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[  197.539565] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  198.312302] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  198.312375] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  198.312423] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000937ac5a5
>[  198.312464] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004c1df376 state to 00000000937ac5a5
>[  198.312502] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000004c1df376
>[  198.312539] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  198.312668] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  198.312760] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  198.312820] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  198.322601] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  198.322621] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  198.322675] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  198.322695] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  198.322708] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  258.314849] [drm:drm_mode_addfb2 [drm]] [FB:120]
>[  258.314878] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  258.314896] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  258.314910] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000dee14694 state to 00000000b62eef4c
>[  258.314923] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:120] for [PLANE:28:plane 1A] state 00000000dee14694
>[  258.314935] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  258.315001] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 120
>[  258.315031] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  258.315055] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  258.322581] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  258.322602] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  318.313670] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  318.313757] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e4dce962
>[  318.313807] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000048cfd963 state to 00000000e4dce962
>[  318.313846] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000021d6d6d7 state to 00000000e4dce962
>[  318.313884] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000021d6d6d7
>[  318.313921] [drm:drm_atomic_check_only [drm]] checking 00000000e4dce962
>[  318.314050] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  318.314142] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  318.314202] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e4dce962 nonblocking
>[  318.322612] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e4dce962
>[  318.322633] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e4dce962
>[  322.262689] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[  322.262794] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[  322.262965] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  322.263064] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[  322.263172] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  322.263629] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.263712] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  322.277541] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.277634] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  322.277890] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.277943] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.278031] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[  322.278115] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[  322.278739] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.278821] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[  322.280990] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  322.281719] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  322.282531] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  322.282632] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:101:HDMI-A-1] status updated from connected to disconnected
>[  322.289798] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  322.289894] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  322.290155] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.290223] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  322.290459] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.290503] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.290570] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[  322.290636] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[  322.291238] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.291304] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[  322.293231] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  322.293947] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  322.294786] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  322.294813] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] disconnected
>[  322.295310] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  322.295412] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  322.295483] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  322.295767] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  322.295827] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  322.295871] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  322.295893] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  322.296420] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  322.296470] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  322.296688] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.296733] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  322.296940] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.296972] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.297017] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[  322.297063] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[  322.297639] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.297682] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[  322.299958] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  322.300661] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  322.301451] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  322.301464] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] disconnected
>[  322.301508] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  322.301558] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  322.301603] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  322.301873] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  322.301917] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  322.301960] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  322.301972] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  322.307627] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  322.307677] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  322.307919] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.307958] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[  322.308159] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>[  322.308184] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.308220] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[  322.308255] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[  322.308823] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  322.308858] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[  322.310962] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  322.311694] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  322.312471] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  322.312481] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] disconnected
>[  322.312513] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  322.312554] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  322.312589] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  322.312846] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  322.312881] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  322.312914] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  322.312924] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  322.707182] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  322.707209] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  322.707226] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000b62eef4c
>[  322.707239] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009b04f243 state to 00000000b62eef4c
>[  322.707269] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 000000009b04f243
>[  322.707282] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  322.707354] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  322.707383] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  322.707406] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b62eef4c nonblocking
>[  322.722524] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  322.722544] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  322.904818] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  322.904844] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  322.904862] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e08dfed9 state to 000000008826679a
>[  322.904874] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000238cb403 state to 000000008826679a
>[  322.904886] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000238cb403
>[  322.904898] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  322.904952] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  322.904981] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  322.905004] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[  322.922678] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  322.922708] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  322.933668] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  322.933711] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e8e10772
>[  322.933739] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 00000000e8e10772
>[  322.933760] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e17c98bc state to 00000000e8e10772
>[  322.933780] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 00000000e17c98bc
>[  322.933800] [drm:drm_atomic_check_only [drm]] checking 00000000e8e10772
>[  322.933884] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  322.933933] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  322.933967] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e8e10772 nonblocking
>[  322.939347] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e8e10772
>[  322.939378] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e8e10772
>[  322.946370] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  322.946434] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  322.946461] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 0000000017698420
>[  322.946481] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 0000000017698420
>[  322.946500] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  322.946518] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  322.946606] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  322.946652] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  322.946688] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  322.956064] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  322.956102] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  322.964278] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  322.964334] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  322.964371] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000e08dfed9
>[  322.964400] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000075acd7a4 state to 00000000e08dfed9
>[  322.964427] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000075acd7a4
>[  322.964454] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  322.964575] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  322.964642] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  322.964687] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  322.972688] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  322.972722] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  322.979863] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  322.979918] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  322.979954] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 00000000e08dfed9
>[  322.979983] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004ad54d74 state to 00000000e08dfed9
>[  322.980010] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000004ad54d74
>[  322.980037] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  322.980135] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  322.980202] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  322.980247] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  322.989344] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  322.989383] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  322.998006] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  322.998072] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  322.998115] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 0000000017698420
>[  322.998150] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000284e539a state to 0000000017698420
>[  322.998183] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 00000000284e539a
>[  322.998216] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  322.998333] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  322.998414] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  322.998468] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  323.006011] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  323.006039] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  323.013274] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.013329] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  323.013365] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 0000000017698420
>[  323.013393] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000006c64ec6 state to 0000000017698420
>[  323.013421] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000006c64ec6
>[  323.013448] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  323.013545] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.013611] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.013656] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  323.022702] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  323.022741] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  323.030888] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.030946] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  323.030986] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000e08dfed9
>[  323.031018] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000284e539a state to 00000000e08dfed9
>[  323.031049] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 00000000284e539a
>[  323.031078] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  323.031183] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.031257] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.031306] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  323.039358] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  323.039393] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  323.046910] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.046965] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  323.047000] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 00000000e08dfed9
>[  323.047029] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004ad54d74 state to 00000000e08dfed9
>[  323.047057] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000004ad54d74
>[  323.047083] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  323.047181] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.047247] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.047292] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  323.056057] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  323.056094] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  323.064625] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.064689] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  323.064732] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 0000000017698420
>[  323.064767] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000075acd7a4 state to 0000000017698420
>[  323.064800] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000075acd7a4
>[  323.064832] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  323.064948] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.065030] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.065084] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  323.072693] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  323.072741] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  323.080522] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.080581] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  323.080620] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 0000000017698420
>[  323.080652] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 0000000017698420
>[  323.080682] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  323.080711] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  323.080817] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.080890] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.080938] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  323.089346] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  323.089388] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  323.097780] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.097844] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  323.097887] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000e08dfed9
>[  323.097922] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e17c98bc state to 00000000e08dfed9
>[  323.097955] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 00000000e17c98bc
>[  323.097988] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  323.098102] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.098184] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.098237] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  323.106024] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  323.106070] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  323.113782] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.113837] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  323.113873] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 00000000e08dfed9
>[  323.113902] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000238cb403 state to 00000000e08dfed9
>[  323.113929] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000238cb403
>[  323.113956] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  323.114052] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.114118] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.114163] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  323.122690] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  323.122728] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  323.131092] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.131156] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  323.131200] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 0000000017698420
>[  323.131236] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e17c98bc state to 0000000017698420
>[  323.131269] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 00000000e17c98bc
>[  323.131301] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  323.131418] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.131499] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.131553] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  323.139359] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  323.139394] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  323.146826] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.146881] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000017698420
>[  323.146917] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 0000000017698420
>[  323.146946] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 0000000017698420
>[  323.146973] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  323.146999] [drm:drm_atomic_check_only [drm]] checking 0000000017698420
>[  323.147096] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.147162] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.147207] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000017698420 nonblocking
>[  323.156048] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000017698420
>[  323.156069] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000017698420
>[  323.163332] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.163382] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  323.163415] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000e08dfed9
>[  323.163441] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000075acd7a4 state to 00000000e08dfed9
>[  323.163466] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000075acd7a4
>[  323.163490] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  323.163579] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.163640] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.163681] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  323.172699] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  323.172735] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  323.180583] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.180642] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e08dfed9
>[  323.180681] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 00000000e08dfed9
>[  323.180713] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004ad54d74 state to 00000000e08dfed9
>[  323.180742] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000004ad54d74
>[  323.180771] [drm:drm_atomic_check_only [drm]] checking 00000000e08dfed9
>[  323.180877] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.180950] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.180999] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e08dfed9 nonblocking
>[  323.189367] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e08dfed9
>[  323.189406] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e08dfed9
>[  323.197039] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.197105] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a1e8e01a
>[  323.197142] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000a64b07e8 state to 00000000a1e8e01a
>[  323.197170] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044568c2b state to 00000000a1e8e01a
>[  323.197198] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000044568c2b
>[  323.197224] [drm:drm_atomic_check_only [drm]] checking 00000000a1e8e01a
>[  323.197320] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.197386] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.197431] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a1e8e01a nonblocking
>[  323.206031] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a1e8e01a
>[  323.206078] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a1e8e01a
>[  323.214044] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.214117] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ee366101
>[  323.214157] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000078bd423b state to 00000000ee366101
>[  323.214189] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000042e7a7ac state to 00000000ee366101
>[  323.214219] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000042e7a7ac
>[  323.214248] [drm:drm_atomic_check_only [drm]] checking 00000000ee366101
>[  323.214352] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.214426] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.214474] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ee366101 nonblocking
>[  323.222686] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ee366101
>[  323.222730] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ee366101
>[  323.230661] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.230733] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a179bdb9
>[  323.230771] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ef49e324 state to 00000000a179bdb9
>[  323.230803] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044568c2b state to 00000000a179bdb9
>[  323.230833] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000044568c2b
>[  323.230862] [drm:drm_atomic_check_only [drm]] checking 00000000a179bdb9
>[  323.230966] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.231040] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.231088] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a179bdb9 nonblocking
>[  323.239367] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a179bdb9
>[  323.239404] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a179bdb9
>[  323.246762] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.246824] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e1ae3642
>[  323.246858] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000a179bdb9 state to 00000000e1ae3642
>[  323.246884] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000021d6d6d7 state to 00000000e1ae3642
>[  323.246909] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000021d6d6d7
>[  323.246934] [drm:drm_atomic_check_only [drm]] checking 00000000e1ae3642
>[  323.247023] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.247084] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.247125] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e1ae3642 nonblocking
>[  323.256048] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e1ae3642
>[  323.256084] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e1ae3642
>[  323.264447] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.264524] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000078bd423b
>[  323.264568] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e1ae3642 state to 0000000078bd423b
>[  323.264603] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044568c2b state to 0000000078bd423b
>[  323.264636] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000044568c2b
>[  323.264669] [drm:drm_atomic_check_only [drm]] checking 0000000078bd423b
>[  323.264784] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.264865] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.264918] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000078bd423b nonblocking
>[  323.272704] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000078bd423b
>[  323.272750] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000078bd423b
>[  323.279954] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.280014] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ef49e324
>[  323.280048] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000078bd423b state to 00000000ef49e324
>[  323.280074] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000042e7a7ac state to 00000000ef49e324
>[  323.280099] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000042e7a7ac
>[  323.280123] [drm:drm_atomic_check_only [drm]] checking 00000000ef49e324
>[  323.280211] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.280271] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.280313] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ef49e324 nonblocking
>[  323.289372] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ef49e324
>[  323.289411] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ef49e324
>[  323.297291] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.297369] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000a179bdb9
>[  323.297412] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000ef49e324 state to 00000000a179bdb9
>[  323.297447] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044568c2b state to 00000000a179bdb9
>[  323.297481] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000044568c2b
>[  323.297513] [drm:drm_atomic_check_only [drm]] checking 00000000a179bdb9
>[  323.297628] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.297709] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.297762] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000a179bdb9 nonblocking
>[  323.306023] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000a179bdb9
>[  323.306070] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000a179bdb9
>[  323.314438] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.314516] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e1ae3642
>[  323.314560] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000a179bdb9 state to 00000000e1ae3642
>[  323.314595] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000021d6d6d7 state to 00000000e1ae3642
>[  323.314628] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 0000000021d6d6d7
>[  323.314660] [drm:drm_atomic_check_only [drm]] checking 00000000e1ae3642
>[  323.314775] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.314855] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.314908] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e1ae3642 nonblocking
>[  323.322692] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e1ae3642
>[  323.322739] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e1ae3642
>[  323.331098] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.331176] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000078bd423b
>[  323.331219] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e1ae3642 state to 0000000078bd423b
>[  323.331254] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044568c2b state to 0000000078bd423b
>[  323.331287] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000044568c2b
>[  323.331319] [drm:drm_atomic_check_only [drm]] checking 0000000078bd423b
>[  323.331433] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.331515] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.331568] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000078bd423b nonblocking
>[  323.339359] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000078bd423b
>[  323.339405] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000078bd423b
>[  323.347473] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  323.347532] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f281e966
>[  323.347571] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000086e088c8 state to 00000000f281e966
>[  323.347602] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008afb7411 state to 00000000f281e966
>[  323.347632] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000008afb7411
>[  323.347661] [drm:drm_atomic_check_only [drm]] checking 00000000f281e966
>[  323.347766] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  323.347874] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.347933] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f281e966 nonblocking
>[  323.356055] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f281e966
>[  323.356107] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f281e966
>[  323.364767] [drm:drm_mode_addfb2 [drm]] [FB:116]
>[  323.364845] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000078bd423b
>[  323.364889] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000a179bdb9 state to 0000000078bd423b
>[  323.364924] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000021d6d6d7 state to 0000000078bd423b
>[  323.364958] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for [PLANE:28:plane 1A] state 0000000021d6d6d7
>[  323.364990] [drm:drm_atomic_check_only [drm]] checking 0000000078bd423b
>[  323.365105] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  323.365186] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  323.365240] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000078bd423b nonblocking
>[  323.372706] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000078bd423b
>[  323.372752] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000078bd423b
>[  326.313608] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[  326.313709] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[  326.313818] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  326.313906] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[  326.314000] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  326.342302] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  326.343040] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  326.343917] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  326.343979] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  326.344030] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  326.344136] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:101:HDMI-A-1] status updated from disconnected to connected
>[  326.344912] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ef49e324
>[  326.344963] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000078bd423b state to 00000000ef49e324
>[  326.345007] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000ef49e324
>[  326.345049] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000675edf0b state to 00000000ef49e324
>[  326.345087] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 00000000ef49e324
>[  326.345126] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044568c2b state to 00000000ef49e324
>[  326.345167] [drm:drm_atomic_check_only [drm]] checking 00000000ef49e324
>[  326.345203] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  326.345226] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  326.345247] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: y
>[  326.345284] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000ef49e324
>[  326.345320] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 00000000ef49e324
>[  326.345427] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[  326.345522] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to default limit of 24
>[  326.345620] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[  326.345708] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[  326.345802] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  326.345892] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[  326.345979] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[  326.346067] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[  326.346148] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  326.346228] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  326.346277] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  326.346359] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  326.346401] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 27027 720 736 798 858 480 489 495 525 0x0 0xa
>[  326.346487] [drm:intel_dump_pipe_config [i915]] crtc timings: 27027 720 736 798 858 480 489 495 525, type: 0x0 flags: 0xa
>[  326.346573] [drm:intel_dump_pipe_config [i915]] port clock: 27027, pipe src size: 720x480, pixel rate 27027
>[  326.346654] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  326.346735] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  326.346818] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  326.346912] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8c00, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x1bac71, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x42
>[  326.346994] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  326.347082] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:116, fb = 720x480 format = XR24 little-endian (0x34325258)
>[  326.347164] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+720+480 dst 0x0+720+480
>[  326.347245] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[  326.347329] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[  326.347409] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[  326.347489] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] disabled, scaler_id = -1
>[  326.347583] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  326.347666] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13
>[  326.347763] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 116
>[  326.347876] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>[  326.347981] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[  326.348075] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[  326.348134] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000e1ae3642 state to 00000000ef49e324
>[  326.348182] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 000000001d0fe28e state to 00000000ef49e324
>[  326.348250] [drm:drm_atomic_commit [drm]] committing 00000000ef49e324
>[  326.348390] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[  326.348486] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  326.348672] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  326.358121] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  326.358171] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Disabling DP dual mode adaptor TMDS output
>[  326.359333] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 51
>[  326.359400] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  326.359452] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[  326.359490] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[  326.359526] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[  326.359562] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[  326.359598] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[  326.359637] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[  326.359672] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  326.359707] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[  326.359774] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 51
>[  326.359845] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  326.360124] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Enabling DP dual mode adaptor TMDS output
>[  326.361227] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  326.361360] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  326.361440] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:101:HDMI-A-1], [ENCODER:100:DDI B]
>[  326.361495] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 52 bytes ELD
>[  326.361552] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 27027 (0x00030000)
>[  326.361604] [drm:hsw_audio_config_update [i915]] using automatic N
>[  326.378501] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[  326.378583] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[  326.378698] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  326.384879] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  326.384976] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  326.413293] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  326.414068] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  326.414917] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  326.414960] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  326.414991] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  326.415027] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.415057] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.415098] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  326.415128] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  326.415156] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  326.415184] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.415212] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.416949] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  326.416984] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  326.417015] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417046] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417080] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.417110] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417139] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417169] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.417200] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.417232] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.417262] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.417291] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417322] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417354] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.417384] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417414] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.417444] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.417477] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.417506] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.417536] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.417566] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.417596] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.417629] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.417658] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.417688] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.417718] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.417748] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.417781] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.417811] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.417841] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.417871] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.417901] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.417934] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.417964] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.417993] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  326.418023] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  326.418053] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.418083] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.418116] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  326.418146] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  326.418176] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  326.418205] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  326.418236] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.418269] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.418299] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.418328] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  326.418358] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  326.418389] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  326.418422] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  326.418452] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  326.418481] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  326.418511] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  326.418541] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  326.418574] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  326.418603] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  326.418633] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.418662] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.418693] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.418726] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.418756] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  326.418785] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  326.418815] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  326.418845] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.418878] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.418908] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  326.422100] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  326.422192] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  326.422274] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  326.422606] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  326.422682] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  326.422758] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  326.422780] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  326.424415] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  326.424520] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  326.452933] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  326.453688] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  326.454497] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  326.454529] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  326.454549] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  326.454574] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.454594] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.454626] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  326.454647] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  326.454665] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  326.454684] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.454703] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.455888] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  326.455912] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  326.455933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.455958] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.455982] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.456004] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.456025] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.456049] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.456072] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.456095] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.456115] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.456135] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.456156] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.456178] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.456197] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.456217] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.456238] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.456259] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.456279] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.456299] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.456319] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.456341] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.456361] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.456380] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.456401] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.456423] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.456442] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.456462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.456482] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.456504] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.456524] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.456544] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.456564] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.456586] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.456606] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  326.456625] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  326.456646] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.456667] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.456687] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  326.456707] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  326.456728] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  326.456749] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  326.456769] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.456789] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.456809] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.456829] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  326.456851] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  326.456871] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  326.456890] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  326.456911] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  326.456933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  326.456952] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  326.456972] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  326.456992] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  326.457014] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  326.457034] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.457054] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.457075] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.457096] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.457116] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  326.457136] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  326.457156] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  326.457178] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.457198] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.457218] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  326.459322] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  326.459377] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  326.459426] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  326.459716] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  326.459763] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  326.459825] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  326.459842] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  326.469462] [drm:drm_mode_addfb2 [drm]] [FB:117]
>[  326.469504] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000937ac5a5
>[  326.469532] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 00000000937ac5a5
>[  326.469554] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001abc75a3 state to 00000000937ac5a5
>[  326.469574] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:117] for [PLANE:28:plane 1A] state 000000001abc75a3
>[  326.469594] [drm:drm_atomic_check_only [drm]] checking 00000000937ac5a5
>[  326.469670] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 117
>[  326.469720] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  326.469754] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000937ac5a5 nonblocking
>[  326.482296] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  326.482326] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  326.482340] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  326.482376] [drm:drm_atomic_commit [drm]] committing 00000000b62eef4c
>[  326.483057] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  326.483071] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  326.483094] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  326.483109] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  326.483121] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  326.483137] [drm:drm_atomic_commit [drm]] committing 00000000b62eef4c
>[  326.488116] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  326.488137] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  326.488181] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  326.488202] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  326.488214] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  326.488239] [drm:drm_atomic_commit [drm]] committing 00000000b62eef4c
>[  326.493270] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  326.493311] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  326.493356] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b62eef4c
>[  326.493376] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000038708f7a state to 00000000b62eef4c
>[  326.493389] [drm:drm_atomic_check_only [drm]] checking 00000000b62eef4c
>[  326.493413] [drm:drm_atomic_commit [drm]] committing 00000000b62eef4c
>[  326.495092] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000937ac5a5
>[  326.495120] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000937ac5a5
>[  326.511749] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b62eef4c
>[  326.511825] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b62eef4c
>[  326.511921] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  326.511961] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[  326.512000] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[  326.512028] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001952f465
>[  326.512061] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001952f465
>[  326.512089] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000044568c2b state to 000000001952f465
>[  326.512116] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:51:pipe A] state 000000007994a2a7
>[  326.512141] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000044568c2b
>[  326.512166] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000001952f465
>[  326.512194] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000aa3bf283 state to 000000001952f465
>[  326.512221] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000aa3bf283 to [NOCRTC]
>[  326.512245] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 00000000aa3bf283 to [CRTC:51:pipe A]
>[  326.512277] [drm:drm_atomic_check_only [drm]] checking 000000001952f465
>[  326.512298] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  326.512313] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  326.512402] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  326.512463] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  326.512503] [drm:drm_atomic_commit [drm]] committing 000000001952f465
>[  326.528353] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001952f465
>[  326.528396] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001952f465
>[  326.528493] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000038708f7a
>[  326.528531] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b62eef4c state to 0000000038708f7a
>[  326.528561] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000038708f7a
>[  326.528593] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 00000000756d8878 state to 0000000038708f7a
>[  326.528623] [drm:drm_atomic_check_only [drm]] checking 0000000038708f7a
>[  326.528647] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  326.528664] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  326.528706] [drm:drm_atomic_commit [drm]] committing 0000000038708f7a
>[  326.545114] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000038708f7a
>[  326.545150] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000038708f7a
>[  326.546538] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000038708f7a
>[  326.546571] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000038708f7a
>[  326.546595] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000038708f7a
>[  326.546675] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000038708f7a
>[  326.546716] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e19387aa state to 0000000038708f7a
>[  326.546743] [drm:drm_atomic_check_only [drm]] checking 0000000038708f7a
>[  326.546783] [drm:drm_atomic_commit [drm]] committing 0000000038708f7a
>[  326.561775] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000038708f7a
>[  326.561823] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000038708f7a
>[  326.561918] [drm:drm_mode_setcrtc [drm]] [CRTC:51:pipe A]
>[  326.561970] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:101:HDMI-A-1]
>[  326.562007] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000038708f7a
>[  326.562048] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b62eef4c state to 0000000038708f7a
>[  326.562084] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000b16edfec state to 0000000038708f7a
>[  326.562120] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:] for [CRTC:51:pipe A] state 00000000b62eef4c
>[  326.562153] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000b16edfec
>[  326.562185] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000038708f7a
>[  326.562221] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000007770e170 state to 0000000038708f7a
>[  326.562255] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 000000007770e170 to [NOCRTC]
>[  326.562287] [drm:drm_atomic_set_crtc_for_connector [drm]] Link [CONNECTOR:101:HDMI-A-1] state 000000007770e170 to [CRTC:51:pipe A]
>[  326.562325] [drm:drm_atomic_check_only [drm]] checking 0000000038708f7a
>[  326.562351] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] mode changed
>[  326.562370] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  326.562390] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  326.562408] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:51:pipe A] needs all connectors, enable: y, active: y
>[  326.562442] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 0000000038708f7a
>[  326.562474] [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:51:pipe A] to 0000000038708f7a
>[  326.562584] [drm:intel_atomic_check [i915]] [CONNECTOR:101:HDMI-A-1] checking for sink bpp constrains
>[  326.562705] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[  326.562783] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>[  326.562869] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[  326.562953] [drm:intel_dump_pipe_config [i915]] [CRTC:51:pipe A][modeset]
>[  326.563032] [drm:intel_dump_pipe_config [i915]] output_types: HDMI (0x40)
>[  326.563125] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>[  326.563199] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[  326.563270] [drm:intel_dump_pipe_config [i915]] requested mode:
>[  326.563312] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x0 0x5
>[  326.563386] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[  326.563423] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"" 0 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x0 0x5
>[  326.563498] [drm:intel_dump_pipe_config [i915]] crtc timings: 297000 3840 4016 4104 4400 2160 2168 2178 2250, type: 0x0 flags: 0x5
>[  326.563571] [drm:intel_dump_pipe_config [i915]] port clock: 297000, pipe src size: 3840x2160, pixel rate 297000
>[  326.563644] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[  326.563716] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  326.563788] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>[  326.563932] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8c00, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x1bac71, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x42
>[  326.564020] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[  326.564102] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1A] FB:113, fb = 3840x2160 format = XR24 little-endian (0x34325258)
>[  326.564182] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+720+480 dst 0x0+720+480
>[  326.564260] [drm:intel_dump_pipe_config [i915]] [PLANE:33:plane 2A] disabled, scaler_id = -1
>[  326.564341] [drm:intel_dump_pipe_config [i915]] [PLANE:38:plane 3A] disabled, scaler_id = -1
>[  326.564422] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4A] disabled, scaler_id = -1
>[  326.564500] [drm:intel_dump_pipe_config [i915]] [PLANE:48:cursor A] disabled, scaler_id = -1
>[  326.564588] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
>[  326.564673] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 13, actual 13
>[  326.564765] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  326.564846] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>[  326.564942] [drm:bxt_get_dpll [i915]] [CRTC:51:pipe A] using pre-allocated PORT PLL B
>[  326.565025] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe A
>[  326.565074] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:75:pipe B] 00000000937ac5a5 state to 0000000038708f7a
>[  326.565115] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:99:pipe C] 00000000f75959f2 state to 0000000038708f7a
>[  326.565166] [drm:drm_atomic_commit [drm]] committing 0000000038708f7a
>[  326.565309] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe A
>[  326.565393] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[  326.565564] [drm:intel_disable_pipe [i915]] disabling pipe A
>[  326.578739] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>[  326.578812] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Disabling DP dual mode adaptor TMDS output
>[  326.579884] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 51
>[  326.579944] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>[  326.579988] [drm:intel_atomic_commit_tail [i915]] [ENCODER:100:DDI B]
>[  326.580021] [drm:intel_atomic_commit_tail [i915]] [ENCODER:107:DDI C]
>[  326.580055] [drm:intel_atomic_commit_tail [i915]] [ENCODER:109:DP-MST A]
>[  326.580089] [drm:intel_atomic_commit_tail [i915]] [ENCODER:110:DP-MST B]
>[  326.580122] [drm:intel_atomic_commit_tail [i915]] [ENCODER:111:DP-MST C]
>[  326.580157] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL A
>[  326.580190] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  326.580226] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL C
>[  326.580286] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 1, on? 0) for crtc 51
>[  326.580320] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>[  326.580461] [drm:intel_dp_dual_mode_set_tmds_output [i915]] Enabling DP dual mode adaptor TMDS output
>[  326.581611] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>[  326.581722] [drm:intel_enable_pipe [i915]] enabling pipe A
>[  326.581773] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:101:HDMI-A-1], [ENCODER:100:DDI B]
>[  326.581808] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe A, 40 bytes ELD
>[  326.581845] [drm:audio_config_hdmi_pixel_clock [i915]] HDMI audio pixel clock setting for 297000 not found, falling back to defaults
>[  326.581879] [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[  326.581912] [drm:hsw_audio_config_update [i915]] using N 4704
>[  326.615480] [drm:verify_connector_state.isra.128 [i915]] [CONNECTOR:101:HDMI-A-1]
>[  326.615555] [drm:intel_atomic_commit_tail [i915]] [CRTC:51:pipe A]
>[  326.615656] [drm:verify_single_dpll_state.isra.88 [i915]] PORT PLL B
>[  326.615740] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000038708f7a
>[  326.615770] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000038708f7a
>[  326.615890] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  326.615920] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001d0fe28e
>[  326.615947] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 000000001d0fe28e
>[  326.615977] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 000000004f7eb055 state to 000000001d0fe28e
>[  326.616003] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  326.616028] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  326.616042] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  326.616080] [drm:drm_atomic_commit [drm]] committing 000000001d0fe28e
>[  326.648777] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  326.648811] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  326.648897] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  326.648921] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  326.648943] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  326.662188] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  326.662304] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  326.690924] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  326.691648] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  326.692474] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  326.692514] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  326.692542] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  326.692575] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.692602] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.692641] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  326.692668] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  326.692693] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  326.692718] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.692743] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.694282] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  326.694313] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  326.694342] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694369] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694396] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.694423] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694449] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694476] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.694503] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.694530] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.694556] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.694583] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694610] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694636] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.694663] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694690] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.694717] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.694743] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.694770] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.694797] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.694824] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.694850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.694877] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.694904] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.694931] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.694958] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.694984] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.695011] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.695038] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.695065] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.695092] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.695118] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.695145] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.695172] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.695199] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  326.695226] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  326.695252] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.695279] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.695306] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  326.695333] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  326.695360] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  326.695387] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  326.695413] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.695440] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.695467] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.695494] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  326.695521] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  326.695547] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  326.695574] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  326.695601] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  326.695628] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  326.695655] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  326.695681] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  326.695708] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  326.695735] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  326.695762] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.695807] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.695836] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.695875] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.695908] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  326.695938] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  326.695971] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  326.696007] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.696040] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.696073] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  326.698867] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  326.698944] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  326.699007] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  326.699316] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  326.699378] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  326.699441] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  326.699458] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  326.859296] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  326.859355] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  326.887507] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  326.888171] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  326.888939] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  326.888961] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  326.888974] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  326.888990] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.889003] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.889026] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  326.889038] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  326.889050] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  326.889062] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  326.889073] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  326.889796] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  326.889811] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  326.889824] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889836] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889849] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.889861] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889874] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889886] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  326.889898] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.889911] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.889923] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.889935] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889948] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889960] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.889972] [drm:drm_mode_debug_printmodeline [drm]] Modeline 144:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889985] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  326.889997] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.890009] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  326.890021] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.890034] [drm:drm_mode_debug_printmodeline [drm]] Modeline 171:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.890046] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  326.890058] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.890071] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.890083] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.890095] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.890108] [drm:drm_mode_debug_printmodeline [drm]] Modeline 180:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  326.890120] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.890133] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.890145] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  326.890157] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.890170] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  326.890182] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  326.890194] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.890207] [drm:drm_mode_debug_printmodeline [drm]] Modeline 181:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  326.890219] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  326.890231] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  326.890244] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.890256] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  326.890268] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  326.890281] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  326.890293] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  326.890305] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  326.890318] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.890330] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.890342] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  326.890355] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  326.890367] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  326.890379] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  326.890392] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  326.890404] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  326.890416] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  326.890429] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  326.890441] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  326.890453] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  326.890466] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  326.890478] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.890490] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  326.890503] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.890515] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  326.890527] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  326.890540] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  326.890552] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  326.890564] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.890577] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  326.890589] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  326.891953] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  326.892001] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  326.892032] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  326.892281] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  326.892310] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  326.892338] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  326.892347] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  327.339926] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  327.339944] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000004ad54d74 state to 000000008826679a
>[  327.339958] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000004ad54d74
>[  327.339971] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  327.339986] [drm:drm_atomic_commit [drm]] committing 000000008826679a
>[  327.340035] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  327.340049] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  327.340080] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  327.340093] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 0000000075acd7a4 state to 000000008826679a
>[  327.340107] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 000000008826679a
>[  327.340119] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 0000000075acd7a4 to [CRTC:51:pipe A]
>[  327.340131] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:48:cursor A] state 0000000075acd7a4
>[  327.340143] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  327.340194] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 119
>[  327.340225] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[  327.340248] [drm:drm_atomic_commit [drm]] committing 000000008826679a
>[  327.340364] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  327.340377] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  331.173031] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[  331.173103] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 0
>[  331.173231] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  331.173297] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[  331.173381] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  331.246608] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 1
>[  331.275787] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  331.275821] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[  331.275864] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[  331.307812] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  331.307854] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[  331.358715] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 1
>[  331.387810] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  331.387859] [drm:intel_encoder_hotplug [i915]] [CONNECTOR:101:HDMI-A-1] status updated from connected to disconnected
>[  331.695868] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  331.695953] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  331.746727] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 1
>[  331.747312] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  331.747363] [drm:intel_hdmi_set_edid [i915]] HDMI GMBUS EDID read failed, retry using GPIO bit-banging
>[  331.747409] [drm:intel_gmbus_force_bit [i915]] enabling bit-banging on i915 gmbus dpb. force bit now 1
>[  331.748033] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[  331.748103] [drm:intel_gmbus_force_bit [i915]] disabling bit-banging on i915 gmbus dpb. force bit now 0
>[  331.800022] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 1
>[  331.800623] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[  331.800645] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] disconnected
>[  331.801539] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  331.801628] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  331.801703] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  331.802028] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  331.802102] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  331.802173] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  331.802193] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  331.804058] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  331.804170] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  331.851715] [drm:intel_get_hpd_pins.isra.12 [i915]] hotplug event received, stat 0x00000010, dig 0x1000181a, pins 0x00000020, long 0x00000020
>[  331.851819] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 5 - cnt: 1
>[  331.856021] [drm:do_gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 1
>[  331.917089] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  331.918020] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  331.918976] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  331.918997] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  331.919009] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  331.919018] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] status updated from disconnected to connected
>[  331.919035] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  331.919048] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  331.919133] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  331.919146] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  331.919157] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  331.919169] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  331.919181] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  331.919895] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  331.919910] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  331.919923] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  331.919935] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  331.919948] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  331.919961] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  331.919973] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  331.919985] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  331.919998] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  331.920010] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  331.920023] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  331.920035] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  331.920048] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  331.920060] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  331.920072] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  331.920085] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  331.920098] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  331.920110] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  331.920123] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  331.920135] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  331.920147] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  331.920160] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  331.920172] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  331.920184] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  331.920197] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  331.920209] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  331.920222] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  331.920235] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  331.920247] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  331.920259] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  331.920272] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  331.920284] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  331.920297] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  331.920309] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  331.920321] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  331.920334] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  331.920346] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  331.920359] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  331.920371] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  331.920383] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  331.920396] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  331.920408] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  331.920421] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  331.920433] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  331.920446] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  331.920458] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  331.920470] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  331.920483] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  331.920495] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  331.920507] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  331.920520] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  331.920532] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  331.920544] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  331.920557] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  331.920569] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  331.920582] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  331.920594] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  331.920606] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  331.920619] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  331.920631] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  331.920643] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  331.920656] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  331.920668] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  331.920680] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  331.920693] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  331.921926] [drm:i915_hotplug_work_func [i915]] running encoder hotplug functions
>[  331.921961] [drm:i915_hotplug_work_func [i915]] Connector HDMI-A-1 (pin 5) received hotplug event.
>[  331.921994] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  331.981785] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  331.982769] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  331.983742] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  331.983764] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  331.983783] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  331.983796] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  331.983832] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  331.983862] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  331.984119] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  331.984148] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  331.984176] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  331.984184] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  331.984836] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  331.984871] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  332.045056] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  332.045987] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  332.046941] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  332.046956] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  332.046967] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  332.046981] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  332.046994] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  332.047010] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  332.047022] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  332.047034] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  332.047045] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  332.047056] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  332.047737] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  332.047750] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  332.047783] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047795] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047808] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  332.047821] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047836] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  332.047865] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.047878] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.047893] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.047906] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047921] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047935] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.047949] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047964] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.047978] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.047993] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.048008] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.048022] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.048036] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.048049] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.048061] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.048074] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.048086] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  332.048099] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  332.048114] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  332.048127] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  332.048142] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  332.048157] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.048171] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.048185] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  332.048198] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  332.048213] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  332.048227] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  332.048240] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  332.048252] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  332.048265] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  332.048277] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  332.048290] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  332.048302] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  332.048314] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  332.048327] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.048339] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.048351] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.048364] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  332.048376] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  332.048388] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  332.048401] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  332.048413] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  332.048425] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  332.048438] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  332.048450] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  332.048462] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  332.048475] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  332.048487] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  332.048499] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  332.048512] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  332.048524] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  332.048536] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  332.048549] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  332.048561] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  332.048573] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  332.048585] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  332.048598] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  332.049872] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  332.049905] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  332.049933] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  332.050179] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  332.050207] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  332.050234] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  332.050243] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  332.051311] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  332.051348] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  332.111513] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  332.112449] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  332.113407] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  332.113425] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  332.113437] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  332.113451] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  332.113463] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  332.113478] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  332.113491] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  332.113502] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  332.113514] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  332.113525] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  332.114231] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  332.114245] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  332.114258] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114271] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114283] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  332.114295] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114308] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114320] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  332.114332] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.114344] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.114357] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.114369] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114381] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114393] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.114406] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114418] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.114430] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.114442] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.114455] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.114467] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.114479] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.114491] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.114504] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.114516] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.114528] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  332.114541] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  332.114553] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  332.114565] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  332.114577] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  332.114590] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.114602] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.114614] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  332.114627] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  332.114639] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  332.114651] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  332.114663] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  332.114676] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  332.114688] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  332.114700] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  332.114713] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  332.114725] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  332.114737] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  332.114749] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.114762] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.114774] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.114786] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  332.114798] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  332.114811] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  332.114823] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  332.114835] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  332.114848] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  332.114860] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  332.114872] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  332.114884] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  332.114897] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  332.114909] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  332.114921] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  332.114933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  332.114946] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  332.114958] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  332.114970] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  332.114982] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  332.114995] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  332.115007] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  332.115019] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  332.116360] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  332.116398] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  332.116431] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  332.116679] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  332.116709] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  332.116739] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  332.116748] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  332.118958] [drm:drm_mode_addfb2 [drm]] [FB:144]
>[  332.118986] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  332.119004] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 00000000b4d5b57d
>[  332.119019] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000072030add state to 00000000b4d5b57d
>[  332.119033] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:144] for [PLANE:28:plane 1A] state 0000000072030add
>[  332.119047] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  332.119102] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 144
>[  332.119136] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  332.119162] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  332.120894] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1]
>[  332.120938] [drm:intel_hdmi_detect [i915]] [CONNECTOR:101:HDMI-A-1]
>[  332.148619] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  332.148636] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  332.181044] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
>[  332.182028] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode adaptor ID: a8 (err 0)
>[  332.183013] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (lspcon) detected (max TMDS clock: 600000 kHz)
>[  332.183026] [drm:drm_rgb_quant_range_selectable [drm]] CEA VCDB 0x0f
>[  332.183039] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[  332.183053] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  332.183065] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  332.183082] [drm:drm_add_edid_modes [drm]] ELD monitor SAMSUNG
>[  332.183094] [drm:drm_add_edid_modes [drm]] HDMI: latency present 0 0, video latency 0 1, audio latency 128 2
>[  332.183105] [drm:drm_add_edid_modes [drm]] ELD size 40, SAD count 4
>[  332.183116] [drm:drm_add_display_info [drm]] non_desktop set to 0
>[  332.183127] [drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[  332.183831] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] probed modes :
>[  332.183845] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x48 0x5
>[  332.183858] [drm:drm_mode_debug_printmodeline [drm]] Modeline 170:"4096x2160" 60 594000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.183875] [drm:drm_mode_debug_printmodeline [drm]] Modeline 191:"4096x2160" 60 593407 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.183889] [drm:drm_mode_debug_printmodeline [drm]] Modeline 168:"4096x2160" 50 594000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  332.183902] [drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"4096x2160" 30 297000 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.183917] [drm:drm_mode_debug_printmodeline [drm]] Modeline 187:"4096x2160" 30 296703 4096 4184 4272 4400 2160 2168 2178 2250 0x40 0x5
>[  332.183931] [drm:drm_mode_debug_printmodeline [drm]] Modeline 159:"4096x2160" 25 297000 4096 5064 5152 5280 2160 2168 2178 2250 0x40 0x5
>[  332.183944] [drm:drm_mode_debug_printmodeline [drm]] Modeline 158:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.183959] [drm:drm_mode_debug_printmodeline [drm]] Modeline 174:"4096x2160" 24 297000 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.183973] [drm:drm_mode_debug_printmodeline [drm]] Modeline 186:"4096x2160" 24 296703 4096 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.183985] [drm:drm_mode_debug_printmodeline [drm]] Modeline 167:"3840x2160" 60 594000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.183998] [drm:drm_mode_debug_printmodeline [drm]] Modeline 190:"3840x2160" 60 593407 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.184010] [drm:drm_mode_debug_printmodeline [drm]] Modeline 166:"3840x2160" 50 594000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.184023] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"3840x2160" 30 297000 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.184035] [drm:drm_mode_debug_printmodeline [drm]] Modeline 175:"3840x2160" 30 296703 3840 4016 4104 4400 2160 2168 2178 2250 0x40 0x5
>[  332.184047] [drm:drm_mode_debug_printmodeline [drm]] Modeline 157:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.184060] [drm:drm_mode_debug_printmodeline [drm]] Modeline 172:"3840x2160" 25 297000 3840 4896 4984 5280 2160 2168 2178 2250 0x40 0x5
>[  332.184072] [drm:drm_mode_debug_printmodeline [drm]] Modeline 156:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.184084] [drm:drm_mode_debug_printmodeline [drm]] Modeline 173:"3840x2160" 24 297000 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.184110] [drm:drm_mode_debug_printmodeline [drm]] Modeline 185:"3840x2160" 24 296703 3840 5116 5204 5500 2160 2168 2178 2250 0x40 0x5
>[  332.184122] [drm:drm_mode_debug_printmodeline [drm]] Modeline 121:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.184134] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.184146] [drm:drm_mode_debug_printmodeline [drm]] Modeline 176:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.184158] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  332.184170] [drm:drm_mode_debug_printmodeline [drm]] Modeline 182:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[  332.184181] [drm:drm_mode_debug_printmodeline [drm]] Modeline 147:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  332.184193] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  332.184205] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[  332.184217] [drm:drm_mode_debug_printmodeline [drm]] Modeline 155:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.184229] [drm:drm_mode_debug_printmodeline [drm]] Modeline 184:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[  332.184240] [drm:drm_mode_debug_printmodeline [drm]] Modeline 154:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[  332.184252] [drm:drm_mode_debug_printmodeline [drm]] Modeline 152:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  332.184264] [drm:drm_mode_debug_printmodeline [drm]] Modeline 183:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
>[  332.184276] [drm:drm_mode_debug_printmodeline [drm]] Modeline 130:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[  332.184288] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>[  332.184299] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  332.184311] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  332.184323] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[  332.184335] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"1366x768" 60 85500 1366 1436 1579 1792 768 771 774 798 0x40 0x5
>[  332.184347] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>[  332.184358] [drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  332.184370] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.184382] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.184394] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  332.184405] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[  332.184417] [drm:drm_mode_debug_printmodeline [drm]] Modeline 138:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  332.184429] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[  332.184441] [drm:drm_mode_debug_printmodeline [drm]] Modeline 140:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  332.184453] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[  332.184464] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  332.184476] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  332.184488] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  332.184500] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  332.184512] [drm:drm_mode_debug_printmodeline [drm]] Modeline 162:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
>[  332.184523] [drm:drm_mode_debug_printmodeline [drm]] Modeline 189:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  332.184535] [drm:drm_mode_debug_printmodeline [drm]] Modeline 164:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  332.184547] [drm:drm_mode_debug_printmodeline [drm]] Modeline 188:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
>[  332.184559] [drm:drm_mode_debug_printmodeline [drm]] Modeline 161:"720x480i" 60 13500 720 739 801 858 480 488 494 525 0x40 0x101a
>[  332.184570] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  332.184582] [drm:drm_mode_debug_printmodeline [drm]] Modeline 133:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[  332.184594] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  332.184606] [drm:drm_mode_debug_printmodeline [drm]] Modeline 178:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  332.184617] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  332.184629] [drm:drm_mode_debug_printmodeline [drm]] Modeline 136:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  332.185858] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1]
>[  332.185890] [drm:intel_dp_detect [i915]] [CONNECTOR:108:DP-1]
>[  332.185918] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>[  332.186162] [drm:intel_power_well_enable [i915]] enabling AUX C
>[  332.186190] [drm:intel_power_well_disable [i915]] disabling AUX C
>[  332.186216] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>[  332.186224] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:108:DP-1] disconnected
>[  334.648606] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  334.648625] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000004ad54d74 state to 000000008826679a
>[  334.648641] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000017698420 state to 000000008826679a
>[  334.648654] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 000000004ad54d74 to [NOCRTC]
>[  334.648666] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 000000004ad54d74
>[  334.648679] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  334.648733] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb -1
>[  334.648764] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[  334.648790] [drm:drm_atomic_commit [drm]] committing 000000008826679a
>[  334.648853] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  334.648868] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  334.650580] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  334.650598] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 0000000075acd7a4 state to 000000008826679a
>[  334.650612] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 0000000075acd7a4
>[  334.650625] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  334.650641] [drm:drm_atomic_commit [drm]] committing 000000008826679a
>[  334.650681] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  334.650695] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  334.650733] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  334.650746] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 000000004ad54d74 state to 000000008826679a
>[  334.650761] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 000000008826679a
>[  334.650773] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 000000004ad54d74 to [CRTC:51:pipe A]
>[  334.650786] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:48:cursor A] state 000000004ad54d74
>[  334.650797] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  334.650893] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb 113
>[  334.650924] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 0 -> 1, off 0, on 1, ms 0
>[  334.650949] [drm:drm_atomic_commit [drm]] committing 000000008826679a
>[  334.651011] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  334.651024] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  335.800017] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  335.800058] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  335.800085] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001d0fe28e
>[  335.800106] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000114f6283 state to 000000001d0fe28e
>[  335.800126] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000114f6283
>[  335.800146] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  335.800222] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  335.800271] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  335.800307] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  335.815290] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  335.815308] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  335.931590] [drm:drm_mode_addfb2 [drm]] [FB:119]
>[  335.931620] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001952f465
>[  335.931638] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b4d5b57d state to 000000001952f465
>[  335.931652] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000feb8b2a2 state to 000000001952f465
>[  335.931665] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:28:plane 1A] state 00000000feb8b2a2
>[  335.931677] [drm:drm_atomic_check_only [drm]] checking 000000001952f465
>[  335.931750] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 119
>[  335.931804] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  335.931838] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001952f465 nonblocking
>[  335.948606] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001952f465
>[  335.948624] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001952f465
>[  336.119277] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  336.119308] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000404fc8fe
>[  336.119327] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad26dc1 state to 00000000404fc8fe
>[  336.119341] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006d6c97ef state to 00000000404fc8fe
>[  336.119354] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000006d6c97ef
>[  336.119366] [drm:drm_atomic_check_only [drm]] checking 00000000404fc8fe
>[  336.119437] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  336.119467] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  336.119495] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000404fc8fe nonblocking
>[  336.148643] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000404fc8fe
>[  336.148662] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000404fc8fe
>[  336.184967] [drm:drm_mode_addfb2 [drm]] [FB:119]
>[  336.184997] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b5c4f265
>[  336.185016] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000404fc8fe state to 00000000b5c4f265
>[  336.185029] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a19868a6 state to 00000000b5c4f265
>[  336.185041] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:28:plane 1A] state 00000000a19868a6
>[  336.185054] [drm:drm_atomic_check_only [drm]] checking 00000000b5c4f265
>[  336.185125] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 119
>[  336.185154] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  336.185179] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b5c4f265 nonblocking
>[  336.215436] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b5c4f265
>[  336.215465] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b5c4f265
>[  336.232810] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  336.232861] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000366cf22d
>[  336.232894] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f453ae84 state to 00000000366cf22d
>[  336.232920] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002838ec79 state to 00000000366cf22d
>[  336.232945] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000002838ec79
>[  336.232969] [drm:drm_atomic_check_only [drm]] checking 00000000366cf22d
>[  336.233061] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  336.233122] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  336.233165] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000366cf22d nonblocking
>[  336.282110] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000366cf22d
>[  336.282153] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000366cf22d
>[  336.300129] [drm:drm_mode_addfb2 [drm]] [FB:119]
>[  336.300159] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7c27575
>[  336.300178] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000366cf22d state to 00000000b7c27575
>[  336.300190] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c85f7b8c state to 00000000b7c27575
>[  336.300203] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:28:plane 1A] state 00000000c85f7b8c
>[  336.300215] [drm:drm_atomic_check_only [drm]] checking 00000000b7c27575
>[  336.300323] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 119
>[  336.300352] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  336.300378] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7c27575 nonblocking
>[  336.315433] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7c27575
>[  336.315460] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7c27575
>[  336.334236] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  336.334264] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000404fc8fe
>[  336.334283] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5c4f265 state to 00000000404fc8fe
>[  336.334296] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005b6fd92c state to 00000000404fc8fe
>[  336.334308] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000005b6fd92c
>[  336.334320] [drm:drm_atomic_check_only [drm]] checking 00000000404fc8fe
>[  336.334397] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  336.334427] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  336.334456] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000404fc8fe nonblocking
>[  336.348768] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000404fc8fe
>[  336.348795] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000404fc8fe
>[  336.356840] [drm:drm_mode_addfb2 [drm]] [FB:119]
>[  336.356880] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad26dc1
>[  336.356907] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000404fc8fe state to 000000006ad26dc1
>[  336.356928] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000d133ae6f state to 000000006ad26dc1
>[  336.356947] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:119] for [PLANE:28:plane 1A] state 00000000d133ae6f
>[  336.356966] [drm:drm_atomic_check_only [drm]] checking 000000006ad26dc1
>[  336.357066] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 119
>[  336.357112] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  336.357152] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad26dc1 nonblocking
>[  336.382111] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad26dc1
>[  336.382137] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad26dc1
>[  336.390440] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  336.390490] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000366cf22d
>[  336.390522] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b7c27575 state to 00000000366cf22d
>[  336.390545] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004bfacb74 state to 00000000366cf22d
>[  336.390566] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000004bfacb74
>[  336.390587] [drm:drm_atomic_check_only [drm]] checking 00000000366cf22d
>[  336.390692] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  336.390744] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  336.390784] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000366cf22d nonblocking
>[  336.415450] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000366cf22d
>[  336.415481] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000366cf22d
>[  345.326094] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f453ae84
>[  345.326150] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000366cf22d state to 00000000f453ae84
>[  345.326191] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:51:pipe A] to 00000000f453ae84
>[  345.326233] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:101:HDMI-A-1] 0000000091208425 state to 00000000f453ae84
>[  345.326270] [drm:drm_atomic_check_only [drm]] checking 00000000f453ae84
>[  345.326303] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:101:HDMI-A-1]
>[  345.326326] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:101:HDMI-A-1] keeps [ENCODER:100:DDI B], now on [CRTC:51:pipe A]
>[  345.326389] [drm:drm_atomic_commit [drm]] committing 00000000f453ae84
>[  345.348798] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f453ae84
>[  345.348851] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f453ae84
>[  345.349059] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f453ae84
>[  345.349109] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:48:cursor A] 00000000ae1063f6 state to 00000000f453ae84
>[  345.349151] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b7c27575 state to 00000000f453ae84
>[  345.349187] [drm:drm_atomic_set_crtc_for_plane [drm]] Link [PLANE:48:cursor A] state 00000000ae1063f6 to [NOCRTC]
>[  345.349223] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for [PLANE:48:cursor A] state 00000000ae1063f6
>[  345.349261] [drm:drm_atomic_check_only [drm]] checking 00000000f453ae84
>[  345.349384] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:48:cursor A] with fb -1
>[  345.349476] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:cursor A] visible 1 -> 0, off 1, on 0, ms 0
>[  345.349535] [drm:drm_atomic_commit [drm]] committing 00000000f453ae84
>[  345.349648] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f453ae84
>[  345.349691] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f453ae84
>[  345.370497] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  345.370529] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000366cf22d
>[  345.370549] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000404fc8fe state to 00000000366cf22d
>[  345.370564] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004af04178 state to 00000000366cf22d
>[  345.370578] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004af04178
>[  345.370591] [drm:drm_atomic_check_only [drm]] checking 00000000366cf22d
>[  345.370650] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  345.370683] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  345.370709] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000366cf22d nonblocking
>[  345.382011] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000366cf22d
>[  345.382038] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000366cf22d
>[  345.557766] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  345.557831] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  345.557875] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 00000000b4d5b57d
>[  345.557910] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000feb8b2a2 state to 00000000b4d5b57d
>[  345.557944] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000feb8b2a2
>[  345.557976] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  345.558091] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  345.558172] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  345.558225] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  345.582139] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  345.582164] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  345.723192] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  345.723239] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  345.723275] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001d0fe28e state to 000000007994a2a7
>[  345.723299] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000291527d5 state to 000000007994a2a7
>[  345.723321] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000291527d5
>[  345.723344] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  345.723428] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  345.723485] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  345.723524] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  345.748774] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  345.748817] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  345.861491] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  345.861519] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[  345.861537] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 000000008044e50c
>[  345.861550] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000048aa261f state to 000000008044e50c
>[  345.861563] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 0000000048aa261f
>[  345.861575] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[  345.861629] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  345.861660] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  345.861684] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[  345.882108] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[  345.882135] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[  346.021639] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  346.021681] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000404fc8fe
>[  346.021707] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000015457699 state to 00000000404fc8fe
>[  346.021729] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004af04178 state to 00000000404fc8fe
>[  346.021749] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004af04178
>[  346.021768] [drm:drm_atomic_check_only [drm]] checking 00000000404fc8fe
>[  346.021845] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  346.021894] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  346.021928] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000404fc8fe nonblocking
>[  346.048775] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000404fc8fe
>[  346.048804] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000404fc8fe
>[  346.189179] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  346.189250] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  346.189290] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001d0fe28e
>[  346.189322] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000291527d5 state to 000000001d0fe28e
>[  346.189352] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000291527d5
>[  346.189381] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  346.189488] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  346.189560] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  346.189609] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  346.215472] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  346.215519] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  346.389500] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  346.389574] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad26dc1
>[  346.389621] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5c4f265 state to 000000006ad26dc1
>[  346.389661] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000388584ec state to 000000006ad26dc1
>[  346.389698] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000388584ec
>[  346.389734] [drm:drm_atomic_check_only [drm]] checking 000000006ad26dc1
>[  346.389862] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  346.389953] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  346.390012] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad26dc1 nonblocking
>[  346.415479] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad26dc1
>[  346.415532] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad26dc1
>[  346.893412] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  346.893483] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[  346.893532] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 000000007ff6aaaf
>[  346.893571] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000006c64ec6 state to 000000007ff6aaaf
>[  346.893609] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 0000000006c64ec6
>[  346.893645] [drm:drm_atomic_check_only [drm]] checking 000000007ff6aaaf
>[  346.893771] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  346.893862] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  346.893921] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007ff6aaaf nonblocking
>[  346.915495] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[  346.915547] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[  347.260171] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  347.260242] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[  347.260291] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 000000006ad8c40c
>[  347.260331] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006e9d3392 state to 000000006ad8c40c
>[  347.260368] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000006e9d3392
>[  347.260404] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[  347.260531] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  347.260622] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  347.260681] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[  347.282133] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[  347.282171] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[  347.323464] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  347.323531] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b5c4f265
>[  347.323573] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad26dc1 state to 00000000b5c4f265
>[  347.323608] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000015c19606 state to 00000000b5c4f265
>[  347.323642] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 0000000015c19606
>[  347.323673] [drm:drm_atomic_check_only [drm]] checking 00000000b5c4f265
>[  347.323788] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  347.323899] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  347.323960] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b5c4f265 nonblocking
>[  347.348638] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b5c4f265
>[  347.348671] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b5c4f265
>[  347.358879] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  347.358911] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[  347.358932] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 000000008044e50c
>[  347.358948] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ee85e3a3 state to 000000008044e50c
>[  347.358963] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000ee85e3a3
>[  347.358978] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[  347.359039] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  347.359076] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  347.359104] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[  347.382054] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[  347.382090] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[  347.393848] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  347.393902] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  347.393953] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 000000007994a2a7
>[  347.393982] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000291527d5 state to 000000007994a2a7
>[  347.394009] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000291527d5
>[  347.394035] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  347.394133] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  347.394200] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  347.394244] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  347.415447] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  347.415477] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  347.679035] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  347.679079] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b5c4f265
>[  347.679107] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000015457699 state to 00000000b5c4f265
>[  347.679130] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002d11a450 state to 00000000b5c4f265
>[  347.679152] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000002d11a450
>[  347.679173] [drm:drm_atomic_check_only [drm]] checking 00000000b5c4f265
>[  347.679256] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  347.679307] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  347.679344] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b5c4f265 nonblocking
>[  347.682003] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b5c4f265
>[  347.682023] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b5c4f265
>[  347.907253] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  347.907296] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000404fc8fe
>[  347.907313] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000366cf22d state to 00000000404fc8fe
>[  347.907326] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c0e12033 state to 00000000404fc8fe
>[  347.907338] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000c0e12033
>[  347.907350] [drm:drm_atomic_check_only [drm]] checking 00000000404fc8fe
>[  347.907406] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  347.907435] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  347.907458] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000404fc8fe nonblocking
>[  347.915434] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000404fc8fe
>[  347.915463] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000404fc8fe
>[  348.468351] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  348.468425] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7c27575
>[  348.468474] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000404fc8fe state to 00000000b7c27575
>[  348.468513] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000080d2c254 state to 00000000b7c27575
>[  348.468551] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000080d2c254
>[  348.468587] [drm:drm_atomic_check_only [drm]] checking 00000000b7c27575
>[  348.468714] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  348.468805] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  348.468864] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7c27575 nonblocking
>[  348.482105] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7c27575
>[  348.482131] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7c27575
>[  348.592917] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  348.592964] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e8e10772
>[  348.592995] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 00000000e8e10772
>[  348.593020] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000006c64ec6 state to 00000000e8e10772
>[  348.593043] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 0000000006c64ec6
>[  348.593065] [drm:drm_atomic_check_only [drm]] checking 00000000e8e10772
>[  348.593151] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  348.593207] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  348.593245] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e8e10772 nonblocking
>[  348.615450] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e8e10772
>[  348.615486] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e8e10772
>[  348.621215] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  348.621243] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  348.621260] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 00000000b4d5b57d
>[  348.621273] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008feb45f9 state to 00000000b4d5b57d
>[  348.621285] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000008feb45f9
>[  348.621297] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  348.621349] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  348.621379] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  348.621407] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  348.648779] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  348.648809] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  348.756238] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  348.756324] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  348.756371] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001d0fe28e state to 000000007994a2a7
>[  348.756410] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000764af3d1 state to 000000007994a2a7
>[  348.756448] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000764af3d1
>[  348.756484] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  348.756611] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  348.756703] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  348.756762] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  348.782145] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  348.782196] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  349.300431] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  349.300512] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  349.300560] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 000000007994a2a7
>[  349.300599] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c2381c09 state to 000000007994a2a7
>[  349.300636] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000c2381c09
>[  349.300673] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  349.300800] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  349.300891] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  349.300951] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  349.315469] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  349.315508] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  349.356268] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  349.356344] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  349.356387] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 00000000b4d5b57d
>[  349.356421] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004b16664a state to 00000000b4d5b57d
>[  349.356455] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000004b16664a
>[  349.356487] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  349.356600] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  349.356681] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  349.356733] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  349.382104] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  349.382131] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  349.391060] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  349.391088] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  349.391106] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 000000008826679a
>[  349.391120] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000f515d35e state to 000000008826679a
>[  349.391132] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000f515d35e
>[  349.391145] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  349.391198] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  349.391229] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  349.391253] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[  349.415455] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  349.415484] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  349.423793] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  349.423865] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e8e10772
>[  349.423901] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000e8e10772
>[  349.423930] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008f81f541 state to 00000000e8e10772
>[  349.423957] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000008f81f541
>[  349.423983] [drm:drm_atomic_check_only [drm]] checking 00000000e8e10772
>[  349.424081] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  349.424147] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  349.424192] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e8e10772 nonblocking
>[  349.448794] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e8e10772
>[  349.448830] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e8e10772
>[  349.679897] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  349.679938] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  349.679965] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001d0fe28e
>[  349.679987] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a4562f44 state to 000000001d0fe28e
>[  349.680007] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a4562f44
>[  349.680032] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  349.680108] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  349.680157] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  349.680191] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  349.715448] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  349.715491] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  349.858883] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  349.858956] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000015457699
>[  349.859003] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5c4f265 state to 0000000015457699
>[  349.859043] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000080d2c254 state to 0000000015457699
>[  349.859080] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 0000000080d2c254
>[  349.859116] [drm:drm_atomic_check_only [drm]] checking 0000000015457699
>[  349.859244] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  349.859334] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  349.859393] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000015457699 nonblocking
>[  349.882175] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000015457699
>[  349.882226] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000015457699
>[  349.990764] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  349.990792] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e8e10772
>[  349.990808] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 00000000e8e10772
>[  349.990821] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000099f50381 state to 00000000e8e10772
>[  349.990834] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000099f50381
>[  349.990846] [drm:drm_atomic_check_only [drm]] checking 00000000e8e10772
>[  349.990916] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  349.990946] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  349.990986] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e8e10772 nonblocking
>[  350.015439] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e8e10772
>[  350.015468] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e8e10772
>[  350.025717] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  350.025761] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001952f465
>[  350.025790] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b4d5b57d state to 000000001952f465
>[  350.025824] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001170d87e state to 000000001952f465
>[  350.025846] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000001170d87e
>[  350.025867] [drm:drm_atomic_check_only [drm]] checking 000000001952f465
>[  350.025950] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  350.026002] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  350.026041] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001952f465 nonblocking
>[  350.048795] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001952f465
>[  350.048826] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001952f465
>[  350.055446] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  350.055500] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  350.055547] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001d0fe28e state to 000000007994a2a7
>[  350.055575] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009c212a3e state to 000000007994a2a7
>[  350.055603] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000009c212a3e
>[  350.055629] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  350.055727] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  350.055793] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  350.055880] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  350.082115] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  350.082157] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  350.533132] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  350.533203] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e6799f7c
>[  350.533251] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f281e966 state to 00000000e6799f7c
>[  350.533291] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e52c74cb state to 00000000e6799f7c
>[  350.533328] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000e52c74cb
>[  350.533365] [drm:drm_atomic_check_only [drm]] checking 00000000e6799f7c
>[  350.533493] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  350.533585] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  350.533643] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e6799f7c nonblocking
>[  350.548771] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e6799f7c
>[  350.548797] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e6799f7c
>[  351.135207] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  351.135261] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000086e088c8
>[  351.135297] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e6799f7c state to 0000000086e088c8
>[  351.135326] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002a402848 state to 0000000086e088c8
>[  351.135353] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000002a402848
>[  351.135380] [drm:drm_atomic_check_only [drm]] checking 0000000086e088c8
>[  351.135479] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  351.135544] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  351.135588] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000086e088c8 nonblocking
>[  351.148790] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000086e088c8
>[  351.148813] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000086e088c8
>[  351.660081] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  351.660110] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f453ae84
>[  351.660128] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad26dc1 state to 00000000f453ae84
>[  351.660142] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c0e12033 state to 00000000f453ae84
>[  351.660155] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000c0e12033
>[  351.660168] [drm:drm_atomic_check_only [drm]] checking 00000000f453ae84
>[  351.660223] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  351.660255] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  351.660280] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f453ae84 nonblocking
>[  351.682134] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f453ae84
>[  351.682172] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f453ae84
>[  351.828359] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  351.828432] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f453ae84
>[  351.828480] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5c4f265 state to 00000000f453ae84
>[  351.828519] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002d11a450 state to 00000000f453ae84
>[  351.828556] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000002d11a450
>[  351.828592] [drm:drm_atomic_check_only [drm]] checking 00000000f453ae84
>[  351.828720] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  351.828812] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  351.828872] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f453ae84 nonblocking
>[  351.848797] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f453ae84
>[  351.848833] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f453ae84
>[  351.988846] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  351.988913] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000015457699
>[  351.988955] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000404fc8fe state to 0000000015457699
>[  351.988989] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000015c19606 state to 0000000015457699
>[  351.989023] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 0000000015c19606
>[  351.989055] [drm:drm_atomic_check_only [drm]] checking 0000000015457699
>[  351.989171] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  351.989252] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  351.989305] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000015457699 nonblocking
>[  352.015487] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000015457699
>[  352.015533] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000015457699
>[  352.063431] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  352.063458] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[  352.063476] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 000000007ff6aaaf
>[  352.063489] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 0000000099f50381 state to 000000007ff6aaaf
>[  352.063502] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 0000000099f50381
>[  352.063514] [drm:drm_atomic_check_only [drm]] checking 000000007ff6aaaf
>[  352.063569] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  352.063599] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  352.063623] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007ff6aaaf nonblocking
>[  352.082116] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[  352.082151] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[  352.195368] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  352.195454] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  352.195503] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001d0fe28e
>[  352.195542] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009c212a3e state to 000000001d0fe28e
>[  352.195587] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000009c212a3e
>[  352.195623] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  352.195750] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  352.195891] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  352.195959] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  352.215449] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  352.215476] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  352.257812] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  352.257853] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008044e50c
>[  352.257879] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000565de791 state to 000000008044e50c
>[  352.257901] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002a402848 state to 000000008044e50c
>[  352.257921] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000002a402848
>[  352.257941] [drm:drm_atomic_check_only [drm]] checking 000000008044e50c
>[  352.258017] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  352.258066] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  352.258100] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008044e50c nonblocking
>[  352.282134] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008044e50c
>[  352.282172] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008044e50c
>[  352.924082] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  352.924108] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004f4f75dd
>[  352.924125] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000006ad8c40c state to 000000004f4f75dd
>[  352.924138] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e52c74cb state to 000000004f4f75dd
>[  352.924150] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000e52c74cb
>[  352.924162] [drm:drm_atomic_check_only [drm]] checking 000000004f4f75dd
>[  352.924215] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  352.924262] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  352.924286] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004f4f75dd nonblocking
>[  352.948776] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004f4f75dd
>[  352.948805] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004f4f75dd
>[  353.093539] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  353.093581] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7c27575
>[  353.093607] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000366cf22d state to 00000000b7c27575
>[  353.093628] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000388584ec state to 00000000b7c27575
>[  353.093649] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000388584ec
>[  353.093669] [drm:drm_atomic_check_only [drm]] checking 00000000b7c27575
>[  353.093744] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  353.093793] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  353.093828] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7c27575 nonblocking
>[  353.115467] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7c27575
>[  353.115506] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7c27575
>[  353.651181] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  353.651254] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad8c40c
>[  353.651302] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000004f4f75dd state to 000000006ad8c40c
>[  353.651341] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ee85e3a3 state to 000000006ad8c40c
>[  353.651379] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000ee85e3a3
>[  353.651415] [drm:drm_atomic_check_only [drm]] checking 000000006ad8c40c
>[  353.651543] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  353.651634] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  353.651693] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad8c40c nonblocking
>[  353.682141] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad8c40c
>[  353.682193] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad8c40c
>[  353.914739] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  353.914812] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000366cf22d
>[  353.914860] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b7c27575 state to 00000000366cf22d
>[  353.914899] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004af04178 state to 00000000366cf22d
>[  353.914937] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004af04178
>[  353.914974] [drm:drm_atomic_check_only [drm]] checking 00000000366cf22d
>[  353.915102] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  353.915193] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  353.915260] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000366cf22d nonblocking
>[  353.948788] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000366cf22d
>[  353.948834] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000366cf22d
>[  353.958061] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  353.958126] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000404fc8fe
>[  353.958173] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 0000000015457699 state to 00000000404fc8fe
>[  353.958207] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004bfacb74 state to 00000000404fc8fe
>[  353.958241] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000004bfacb74
>[  353.958273] [drm:drm_atomic_check_only [drm]] checking 00000000404fc8fe
>[  353.958389] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  353.958470] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  353.958526] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000404fc8fe nonblocking
>[  353.982114] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000404fc8fe
>[  353.982140] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000404fc8fe
>[  354.152360] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  354.152399] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b5c4f265
>[  354.152423] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f453ae84 state to 00000000b5c4f265
>[  354.152441] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000d133ae6f state to 00000000b5c4f265
>[  354.152459] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000d133ae6f
>[  354.152477] [drm:drm_atomic_check_only [drm]] checking 00000000b5c4f265
>[  354.152549] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  354.152592] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  354.152624] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b5c4f265 nonblocking
>[  354.182117] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b5c4f265
>[  354.182148] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b5c4f265
>[  354.185394] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  354.185442] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad26dc1
>[  354.185474] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5c4f265 state to 000000006ad26dc1
>[  354.185500] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000005b6fd92c state to 000000006ad26dc1
>[  354.185526] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000005b6fd92c
>[  354.185550] [drm:drm_atomic_check_only [drm]] checking 000000006ad26dc1
>[  354.185640] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  354.185701] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  354.185742] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad26dc1 nonblocking
>[  354.215455] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad26dc1
>[  354.215491] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad26dc1
>[  354.725348] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  354.725429] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  354.725478] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 00000000b4d5b57d
>[  354.725517] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000001170d87e state to 00000000b4d5b57d
>[  354.725555] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000001170d87e
>[  354.725592] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  354.725720] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  354.725811] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  354.725871] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  354.748807] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  354.748859] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  355.326242] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  355.326322] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  355.326371] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 000000001d0fe28e
>[  355.326410] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ea5c7ecf state to 000000001d0fe28e
>[  355.326447] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000ea5c7ecf
>[  355.326484] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  355.326611] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  355.326703] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  355.326762] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  355.348805] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  355.348857] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  355.661979] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  355.662019] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  355.662045] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001d0fe28e
>[  355.662065] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000904bca94 state to 000000001d0fe28e
>[  355.662083] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000904bca94
>[  355.662102] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  355.662177] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  355.662223] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  355.662256] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  355.682124] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  355.682164] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  355.855273] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  355.855360] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  355.855408] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001d0fe28e state to 00000000b4d5b57d
>[  355.855447] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000ea5c7ecf state to 00000000b4d5b57d
>[  355.855485] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000ea5c7ecf
>[  355.855522] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  355.855656] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  355.855746] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  355.855867] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  355.882146] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  355.882199] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  356.052549] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  356.052575] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001952f465
>[  356.052592] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b4d5b57d state to 000000001952f465
>[  356.052605] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009c212a3e state to 000000001952f465
>[  356.052617] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000009c212a3e
>[  356.052629] [drm:drm_atomic_check_only [drm]] checking 000000001952f465
>[  356.052682] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  356.052711] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  356.052734] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001952f465 nonblocking
>[  356.081986] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001952f465
>[  356.082024] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001952f465
>[  356.628077] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  356.628150] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  356.628207] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 000000007994a2a7
>[  356.628245] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a4562f44 state to 000000007994a2a7
>[  356.628282] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000a4562f44
>[  356.628318] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  356.628447] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  356.628537] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  356.628596] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  356.648808] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  356.648861] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  357.229790] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  357.229870] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  357.229918] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001d0fe28e
>[  357.229958] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000004b16664a state to 000000001d0fe28e
>[  357.229995] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000004b16664a
>[  357.230032] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  357.230166] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  357.230257] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  357.230317] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  357.248782] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  357.248836] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  357.468028] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  357.468073] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  357.468101] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001d0fe28e state to 00000000b4d5b57d
>[  357.468124] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c2381c09 state to 00000000b4d5b57d
>[  357.468152] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000c2381c09
>[  357.468173] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  357.468252] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  357.468304] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  357.468340] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  357.482115] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  357.482146] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  357.967671] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  357.967706] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000015457699
>[  357.967728] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000404fc8fe state to 0000000015457699
>[  357.967746] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000c85f7b8c state to 0000000015457699
>[  357.967763] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000c85f7b8c
>[  357.967800] [drm:drm_atomic_check_only [drm]] checking 0000000015457699
>[  357.967869] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  357.967917] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  357.967950] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000015457699 nonblocking
>[  357.982118] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000015457699
>[  357.982154] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000015457699
>[  358.027715] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  358.027773] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7c27575
>[  358.028278] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000366cf22d state to 00000000b7c27575
>[  358.028310] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000002838ec79 state to 00000000b7c27575
>[  358.028339] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000002838ec79
>[  358.028367] [drm:drm_atomic_check_only [drm]] checking 00000000b7c27575
>[  358.028466] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  358.028533] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.028579] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7c27575 nonblocking
>[  358.048778] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7c27575
>[  358.048812] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7c27575
>[  358.061015] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  358.061076] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b7c27575
>[  358.061115] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000404fc8fe state to 00000000b7c27575
>[  358.061147] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a19868a6 state to 00000000b7c27575
>[  358.061177] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000a19868a6
>[  358.061207] [drm:drm_atomic_check_only [drm]] checking 00000000b7c27575
>[  358.061311] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  358.061385] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.061434] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b7c27575 nonblocking
>[  358.082118] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b7c27575
>[  358.082153] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b7c27575
>[  358.093910] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  358.093975] [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000015457699
>[  358.094017] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b5c4f265 state to 0000000015457699
>[  358.094052] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006d6c97ef state to 0000000015457699
>[  358.094085] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000006d6c97ef
>[  358.094117] [drm:drm_atomic_check_only [drm]] checking 0000000015457699
>[  358.094233] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  358.094314] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.094368] [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000015457699 nonblocking
>[  358.115342] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000015457699
>[  358.115375] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000015457699
>[  358.125341] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  358.125388] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001952f465
>[  358.125429] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001d0fe28e state to 000000001952f465
>[  358.125453] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000764af3d1 state to 000000001952f465
>[  358.125476] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000764af3d1
>[  358.125499] [drm:drm_atomic_check_only [drm]] checking 000000001952f465
>[  358.125583] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  358.125639] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.125678] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001952f465 nonblocking
>[  358.148787] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001952f465
>[  358.148826] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001952f465
>[  358.159450] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  358.159505] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  358.159552] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 00000000b4d5b57d
>[  358.159581] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008feb45f9 state to 00000000b4d5b57d
>[  358.159608] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000008feb45f9
>[  358.159634] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  358.159731] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  358.159797] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.159891] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  358.182123] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  358.182170] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  358.289266] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  358.289340] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008826679a
>[  358.289388] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 000000008826679a
>[  358.289427] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006923fa51 state to 000000008826679a
>[  358.289465] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000006923fa51
>[  358.289501] [drm:drm_atomic_check_only [drm]] checking 000000008826679a
>[  358.289629] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  358.289721] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.289781] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008826679a nonblocking
>[  358.315465] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008826679a
>[  358.315511] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008826679a
>[  358.429157] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  358.429230] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bd2739b0
>[  358.429278] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000e8e10772 state to 00000000bd2739b0
>[  358.429317] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 00000000bd2739b0
>[  358.429355] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  358.429391] [drm:drm_atomic_check_only [drm]] checking 00000000bd2739b0
>[  358.429520] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  358.429612] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.429672] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bd2739b0 nonblocking
>[  358.448792] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bd2739b0
>[  358.448828] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bd2739b0
>[  358.587062] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  358.587094] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000bd2739b0
>[  358.587114] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007ff6aaaf state to 00000000bd2739b0
>[  358.587130] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e17c98bc state to 00000000bd2739b0
>[  358.587145] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e17c98bc
>[  358.587160] [drm:drm_atomic_check_only [drm]] checking 00000000bd2739b0
>[  358.587223] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  358.587259] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.587286] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000bd2739b0 nonblocking
>[  358.615450] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000bd2739b0
>[  358.615483] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000bd2739b0
>[  358.722459] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  358.722545] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  358.722593] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b4d5b57d state to 000000007994a2a7
>[  358.722633] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000008feb45f9 state to 000000007994a2a7
>[  358.722670] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000008feb45f9
>[  358.722706] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  358.722842] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  358.722933] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  358.722993] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  358.748814] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  358.748866] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  359.267303] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  359.267376] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006ad26dc1
>[  359.267423] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000f453ae84 state to 000000006ad26dc1
>[  359.267463] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006d6c97ef state to 000000006ad26dc1
>[  359.267501] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 000000006d6c97ef
>[  359.267538] [drm:drm_atomic_check_only [drm]] checking 000000006ad26dc1
>[  359.267666] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  359.267758] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  359.267869] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006ad26dc1 nonblocking
>[  359.282137] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006ad26dc1
>[  359.282190] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006ad26dc1
>[  359.285371] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  359.285441] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000565de791
>[  359.285488] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008044e50c state to 00000000565de791
>[  359.285527] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000006e9d3392 state to 00000000565de791
>[  359.285564] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000006e9d3392
>[  359.285600] [drm:drm_atomic_check_only [drm]] checking 00000000565de791
>[  359.285729] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  359.285820] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  359.285879] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000565de791 nonblocking
>[  359.315458] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000565de791
>[  359.315504] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000565de791
>[  359.328549] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  359.328579] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007ff6aaaf
>[  359.328598] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 000000007ff6aaaf
>[  359.328612] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e17c98bc state to 000000007ff6aaaf
>[  359.328626] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000e17c98bc
>[  359.328639] [drm:drm_atomic_check_only [drm]] checking 000000007ff6aaaf
>[  359.328696] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  359.328730] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  359.328756] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007ff6aaaf nonblocking
>[  359.348794] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007ff6aaaf
>[  359.348818] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007ff6aaaf
>[  359.461221] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  359.461292] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  359.461331] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 000000001d0fe28e
>[  359.461363] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000291527d5 state to 000000001d0fe28e
>[  359.461393] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000291527d5
>[  359.461422] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  359.461526] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  359.461599] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  359.461652] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  359.482113] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  359.482166] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  360.019726] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  360.019852] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  360.019908] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b4d5b57d state to 000000001d0fe28e
>[  360.019954] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000feb8b2a2 state to 000000001d0fe28e
>[  360.019997] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000feb8b2a2
>[  360.020038] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  360.020177] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  360.020276] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  360.020340] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  360.048790] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  360.048837] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  360.620930] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  360.621010] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007994a2a7
>[  360.621059] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001d0fe28e state to 000000007994a2a7
>[  360.621099] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000e8299d76 state to 000000007994a2a7
>[  360.621136] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000e8299d76
>[  360.621173] [drm:drm_atomic_check_only [drm]] checking 000000007994a2a7
>[  360.621301] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  360.621399] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  360.621459] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007994a2a7 nonblocking
>[  360.648803] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007994a2a7
>[  360.648856] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007994a2a7
>[  361.221975] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  361.222055] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001952f465
>[  361.222103] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000007994a2a7 state to 000000001952f465
>[  361.222142] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000114f6283 state to 000000001952f465
>[  361.222179] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000114f6283
>[  361.222215] [drm:drm_atomic_check_only [drm]] checking 000000001952f465
>[  361.222343] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  361.222441] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  361.222501] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001952f465 nonblocking
>[  361.248802] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001952f465
>[  361.248855] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001952f465
>[  361.822781] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  361.822862] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000b4d5b57d
>[  361.822910] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000001952f465 state to 00000000b4d5b57d
>[  361.822949] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 000000009bf4bee0 state to 00000000b4d5b57d
>[  361.822986] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 000000009bf4bee0
>[  361.823029] [drm:drm_atomic_check_only [drm]] checking 00000000b4d5b57d
>[  361.823157] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  361.823248] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  361.823306] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000b4d5b57d nonblocking
>[  361.848813] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000b4d5b57d
>[  361.848866] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000b4d5b57d
>[  362.423705] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  362.423787] [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001d0fe28e
>[  362.423893] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000b4d5b57d state to 000000001d0fe28e
>[  362.423942] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000114f6283 state to 000000001d0fe28e
>[  362.423990] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000114f6283
>[  362.424032] [drm:drm_atomic_check_only [drm]] checking 000000001d0fe28e
>[  362.424169] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  362.424268] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  362.424335] [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001d0fe28e nonblocking
>[  362.448805] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001d0fe28e
>[  362.448858] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001d0fe28e
>[  362.489166] [drm:drm_mode_addfb2 [drm]] [FB:118]
>[  362.489195] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e8e10772
>[  362.489214] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 000000008826679a state to 00000000e8e10772
>[  362.489230] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000a3ef6cff state to 00000000e8e10772
>[  362.489244] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:118] for [PLANE:28:plane 1A] state 00000000a3ef6cff
>[  362.489258] [drm:drm_atomic_check_only [drm]] checking 00000000e8e10772
>[  362.489315] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 118
>[  362.489347] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  362.489373] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e8e10772 nonblocking
>[  362.515289] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e8e10772
>[  362.515309] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e8e10772
>[  362.521344] [drm:drm_mode_addfb2 [drm]] [FB:113]
>[  362.521371] [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e8e10772
>[  362.521389] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:51:pipe A] 00000000bd2739b0 state to 00000000e8e10772
>[  362.521404] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:28:plane 1A] 00000000238cb403 state to 00000000e8e10772
>[  362.521418] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:113] for [PLANE:28:plane 1A] state 00000000238cb403
>[  362.521432] [drm:drm_atomic_check_only [drm]] checking 00000000e8e10772
>[  362.521487] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:51:pipe A] has [PLANE:28:plane 1A] with fb 113
>[  362.521518] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:28:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>[  362.521544] [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e8e10772 nonblocking
>[  362.548596] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e8e10772
>[  362.548615] [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e8e10772

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Attachments on bug 107896: 141516 | 141556 | 141841 | 142162

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