Attachment 143917 Details for Bug 110377 – patch to disable dispatches in anv

[patch] patch to disable dispatches in anv

anv_no_dispatch.patch (text/plain), 3.18 KB, created by Danylo on 2019-04-10 11:29:07 UTC

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Creator: Danylo

Created: 2019-04-10 11:29:07 UTC

Size: 3.18 KB

patch

obsolete

>diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
>index e5daf8b037d..d274b39a0db 100644
>--- a/src/intel/vulkan/genX_cmd_buffer.c
>+++ b/src/intel/vulkan/genX_cmd_buffer.c
>@@ -3804,18 +3804,18 @@ void genX(CmdDispatchBase)(
>    if (cmd_buffer->state.conditional_render_enabled)
>       genX(cmd_emit_conditional_render_predicate)(cmd_buffer);
> 
>-   anv_batch_emit(&cmd_buffer->batch, GENX(GPGPU_WALKER), ggw) {
>-      ggw.PredicateEnable              = cmd_buffer->state.conditional_render_enabled;
>-      ggw.SIMDSize                     = prog_data->simd_size / 16;
>-      ggw.ThreadDepthCounterMaximum    = 0;
>-      ggw.ThreadHeightCounterMaximum   = 0;
>-      ggw.ThreadWidthCounterMaximum    = prog_data->threads - 1;
>-      ggw.ThreadGroupIDXDimension      = groupCountX;
>-      ggw.ThreadGroupIDYDimension      = groupCountY;
>-      ggw.ThreadGroupIDZDimension      = groupCountZ;
>-      ggw.RightExecutionMask           = pipeline->cs_right_mask;
>-      ggw.BottomExecutionMask          = 0xffffffff;
>-   }
>+   // anv_batch_emit(&cmd_buffer->batch, GENX(GPGPU_WALKER), ggw) {
>+   //    ggw.PredicateEnable              = cmd_buffer->state.conditional_render_enabled;
>+   //    ggw.SIMDSize                     = prog_data->simd_size / 16;
>+   //    ggw.ThreadDepthCounterMaximum    = 0;
>+   //    ggw.ThreadHeightCounterMaximum   = 0;
>+   //    ggw.ThreadWidthCounterMaximum    = prog_data->threads - 1;
>+   //    ggw.ThreadGroupIDXDimension      = groupCountX;
>+   //    ggw.ThreadGroupIDYDimension      = groupCountY;
>+   //    ggw.ThreadGroupIDZDimension      = groupCountZ;
>+   //    ggw.RightExecutionMask           = pipeline->cs_right_mask;
>+   //    ggw.BottomExecutionMask          = 0xffffffff;
>+   // }
> 
>    anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_STATE_FLUSH), msf);
> }
>@@ -3916,17 +3916,17 @@ void genX(CmdDispatchIndirect)(
>       genX(cmd_emit_conditional_render_predicate)(cmd_buffer);
> #endif
> 
>-   anv_batch_emit(batch, GENX(GPGPU_WALKER), ggw) {
>-      ggw.IndirectParameterEnable      = true;
>-      ggw.PredicateEnable              = GEN_GEN <= 7 ||
>-                                         cmd_buffer->state.conditional_render_enabled;
>-      ggw.SIMDSize                     = prog_data->simd_size / 16;
>-      ggw.ThreadDepthCounterMaximum    = 0;
>-      ggw.ThreadHeightCounterMaximum   = 0;
>-      ggw.ThreadWidthCounterMaximum    = prog_data->threads - 1;
>-      ggw.RightExecutionMask           = pipeline->cs_right_mask;
>-      ggw.BottomExecutionMask          = 0xffffffff;
>-   }
>+   // anv_batch_emit(batch, GENX(GPGPU_WALKER), ggw) {
>+   //    ggw.IndirectParameterEnable      = true;
>+   //    ggw.PredicateEnable              = GEN_GEN <= 7 ||
>+   //                                       cmd_buffer->state.conditional_render_enabled;
>+   //    ggw.SIMDSize                     = prog_data->simd_size / 16;
>+   //    ggw.ThreadDepthCounterMaximum    = 0;
>+   //    ggw.ThreadHeightCounterMaximum   = 0;
>+   //    ggw.ThreadWidthCounterMaximum    = prog_data->threads - 1;
>+   //    ggw.RightExecutionMask           = pipeline->cs_right_mask;
>+   //    ggw.BottomExecutionMask          = 0xffffffff;
>+   // }
> 
>    anv_batch_emit(batch, GENX(MEDIA_STATE_FLUSH), msf);
> }

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